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authorKumar Gala <galak@kernel.crashing.org>2008-04-17 10:40:48 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-04-17 10:40:48 -0400
commit998c610363b26f3793ad8121eeb3a749b1034824 (patch)
treef90d357678f79860fe583fced9b88c8c89806a2a /arch
parent280bb34bc0f7c664b59077b609ce93507a54c848 (diff)
[POWERPC] fsl: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/ep88xc.dts73
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts83
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts83
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts97
-rw-r--r--arch/powerpc/boot/dts/mpc8272ads.dts132
-rw-r--r--arch/powerpc/boot/dts/mpc866ads.dts58
-rw-r--r--arch/powerpc/boot/dts/mpc885ads.dts77
-rw-r--r--arch/powerpc/boot/dts/pq2fads.dts126
8 files changed, 372 insertions, 357 deletions
diff --git a/arch/powerpc/boot/dts/ep88xc.dts b/arch/powerpc/boot/dts/ep88xc.dts
index 02705f299790..ae57d6240120 100644
--- a/arch/powerpc/boot/dts/ep88xc.dts
+++ b/arch/powerpc/boot/dts/ep88xc.dts
@@ -2,7 +2,7 @@
2 * EP88xC Device Tree Source 2 * EP88xC Device Tree Source
3 * 3 *
4 * Copyright 2006 MontaVista Software, Inc. 4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc. 5 * Copyright 2007,2008 Freescale Semiconductor, Inc.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -10,6 +10,7 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/dts-v1/;
13 14
14/ { 15/ {
15 model = "EP88xC"; 16 model = "EP88xC";
@@ -23,44 +24,44 @@
23 24
24 PowerPC,885@0 { 25 PowerPC,885@0 {
25 device_type = "cpu"; 26 device_type = "cpu";
26 reg = <0>; 27 reg = <0x0>;
27 d-cache-line-size = <d#16>; 28 d-cache-line-size = <16>;
28 i-cache-line-size = <d#16>; 29 i-cache-line-size = <16>;
29 d-cache-size = <d#8192>; 30 d-cache-size = <8192>;
30 i-cache-size = <d#8192>; 31 i-cache-size = <8192>;
31 timebase-frequency = <0>; 32 timebase-frequency = <0>;
32 bus-frequency = <0>; 33 bus-frequency = <0>;
33 clock-frequency = <0>; 34 clock-frequency = <0>;
34 interrupts = <f 2>; // decrementer interrupt 35 interrupts = <15 2>; // decrementer interrupt
35 interrupt-parent = <&PIC>; 36 interrupt-parent = <&PIC>;
36 }; 37 };
37 }; 38 };
38 39
39 memory { 40 memory {
40 device_type = "memory"; 41 device_type = "memory";
41 reg = <0 0>; 42 reg = <0x0 0x0>;
42 }; 43 };
43 44
44 localbus@fa200100 { 45 localbus@fa200100 {
45 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; 46 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
46 #address-cells = <2>; 47 #address-cells = <2>;
47 #size-cells = <1>; 48 #size-cells = <1>;
48 reg = <fa200100 40>; 49 reg = <0xfa200100 0x40>;
49 50
50 ranges = < 51 ranges = <
51 0 0 fc000000 04000000 52 0x0 0x0 0xfc000000 0x4000000
52 3 0 fa000000 01000000 53 0x3 0x0 0xfa000000 0x1000000
53 >; 54 >;
54 55
55 flash@0,2000000 { 56 flash@0,2000000 {
56 compatible = "cfi-flash"; 57 compatible = "cfi-flash";
57 reg = <0 2000000 2000000>; 58 reg = <0x0 0x2000000 0x2000000>;
58 bank-width = <4>; 59 bank-width = <4>;
59 device-width = <2>; 60 device-width = <2>;
60 }; 61 };
61 62
62 board-control@3,400000 { 63 board-control@3,400000 {
63 reg = <3 400000 10>; 64 reg = <0x3 0x400000 0x10>;
64 compatible = "fsl,ep88xc-bcsr"; 65 compatible = "fsl,ep88xc-bcsr";
65 }; 66 };
66 }; 67 };
@@ -70,25 +71,25 @@
70 #address-cells = <1>; 71 #address-cells = <1>;
71 #size-cells = <1>; 72 #size-cells = <1>;
72 device_type = "soc"; 73 device_type = "soc";
73 ranges = <0 fa200000 00004000>; 74 ranges = <0x0 0xfa200000 0x4000>;
74 bus-frequency = <0>; 75 bus-frequency = <0>;
75 76
76 // Temporary -- will go away once kernel uses ranges for get_immrbase(). 77 // Temporary -- will go away once kernel uses ranges for get_immrbase().
77 reg = <fa200000 4000>; 78 reg = <0xfa200000 0x4000>;
78 79
79 mdio@e00 { 80 mdio@e00 {
80 compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; 81 compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
81 reg = <e00 188>; 82 reg = <0xe00 0x188>;
82 #address-cells = <1>; 83 #address-cells = <1>;
83 #size-cells = <0>; 84 #size-cells = <0>;
84 85
85 PHY0: ethernet-phy@0 { 86 PHY0: ethernet-phy@0 {
86 reg = <0>; 87 reg = <0x0>;
87 device_type = "ethernet-phy"; 88 device_type = "ethernet-phy";
88 }; 89 };
89 90
90 PHY1: ethernet-phy@1 { 91 PHY1: ethernet-phy@1 {
91 reg = <1>; 92 reg = <0x1>;
92 device_type = "ethernet-phy"; 93 device_type = "ethernet-phy";
93 }; 94 };
94 }; 95 };
@@ -97,7 +98,7 @@
97 device_type = "network"; 98 device_type = "network";
98 compatible = "fsl,mpc885-fec-enet", 99 compatible = "fsl,mpc885-fec-enet",
99 "fsl,pq1-fec-enet"; 100 "fsl,pq1-fec-enet";
100 reg = <e00 188>; 101 reg = <0xe00 0x188>;
101 local-mac-address = [ 00 00 00 00 00 00 ]; 102 local-mac-address = [ 00 00 00 00 00 00 ];
102 interrupts = <3 1>; 103 interrupts = <3 1>;
103 interrupt-parent = <&PIC>; 104 interrupt-parent = <&PIC>;
@@ -109,7 +110,7 @@
109 device_type = "network"; 110 device_type = "network";
110 compatible = "fsl,mpc885-fec-enet", 111 compatible = "fsl,mpc885-fec-enet",
111 "fsl,pq1-fec-enet"; 112 "fsl,pq1-fec-enet";
112 reg = <1e00 188>; 113 reg = <0x1e00 0x188>;
113 local-mac-address = [ 00 00 00 00 00 00 ]; 114 local-mac-address = [ 00 00 00 00 00 00 ];
114 interrupts = <7 1>; 115 interrupts = <7 1>;
115 interrupt-parent = <&PIC>; 116 interrupt-parent = <&PIC>;
@@ -120,7 +121,7 @@
120 PIC: interrupt-controller@0 { 121 PIC: interrupt-controller@0 {
121 interrupt-controller; 122 interrupt-controller;
122 #interrupt-cells = <2>; 123 #interrupt-cells = <2>;
123 reg = <0 24>; 124 reg = <0x0 0x24>;
124 compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; 125 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
125 }; 126 };
126 127
@@ -130,29 +131,29 @@
130 #size-cells = <2>; 131 #size-cells = <2>;
131 compatible = "fsl,pq-pcmcia"; 132 compatible = "fsl,pq-pcmcia";
132 device_type = "pcmcia"; 133 device_type = "pcmcia";
133 reg = <80 80>; 134 reg = <0x80 0x80>;
134 interrupt-parent = <&PIC>; 135 interrupt-parent = <&PIC>;
135 interrupts = <d 1>; 136 interrupts = <13 1>;
136 }; 137 };
137 138
138 cpm@9c0 { 139 cpm@9c0 {
139 #address-cells = <1>; 140 #address-cells = <1>;
140 #size-cells = <1>; 141 #size-cells = <1>;
141 compatible = "fsl,mpc885-cpm", "fsl,cpm1"; 142 compatible = "fsl,mpc885-cpm", "fsl,cpm1";
142 command-proc = <9c0>; 143 command-proc = <0x9c0>;
143 interrupts = <0>; // cpm error interrupt 144 interrupts = <0>; // cpm error interrupt
144 interrupt-parent = <&CPM_PIC>; 145 interrupt-parent = <&CPM_PIC>;
145 reg = <9c0 40>; 146 reg = <0x9c0 0x40>;
146 ranges; 147 ranges;
147 148
148 muram@2000 { 149 muram@2000 {
149 #address-cells = <1>; 150 #address-cells = <1>;
150 #size-cells = <1>; 151 #size-cells = <1>;
151 ranges = <0 2000 2000>; 152 ranges = <0x0 0x2000 0x2000>;
152 153
153 data@0 { 154 data@0 {
154 compatible = "fsl,cpm-muram-data"; 155 compatible = "fsl,cpm-muram-data";
155 reg = <0 1c00>; 156 reg = <0x0 0x1c00>;
156 }; 157 };
157 }; 158 };
158 159
@@ -160,7 +161,7 @@
160 compatible = "fsl,mpc885-brg", 161 compatible = "fsl,mpc885-brg",
161 "fsl,cpm1-brg", 162 "fsl,cpm1-brg",
162 "fsl,cpm-brg"; 163 "fsl,cpm-brg";
163 reg = <9f0 10>; 164 reg = <0x9f0 0x10>;
164 }; 165 };
165 166
166 CPM_PIC: interrupt-controller@930 { 167 CPM_PIC: interrupt-controller@930 {
@@ -168,7 +169,7 @@
168 #interrupt-cells = <1>; 169 #interrupt-cells = <1>;
169 interrupts = <5 2 0 2>; 170 interrupts = <5 2 0 2>;
170 interrupt-parent = <&PIC>; 171 interrupt-parent = <&PIC>;
171 reg = <930 20>; 172 reg = <0x930 0x20>;
172 compatible = "fsl,mpc885-cpm-pic", 173 compatible = "fsl,mpc885-cpm-pic",
173 "fsl,cpm1-pic"; 174 "fsl,cpm1-pic";
174 }; 175 };
@@ -178,11 +179,11 @@
178 device_type = "serial"; 179 device_type = "serial";
179 compatible = "fsl,mpc885-smc-uart", 180 compatible = "fsl,mpc885-smc-uart",
180 "fsl,cpm1-smc-uart"; 181 "fsl,cpm1-smc-uart";
181 reg = <a80 10 3e80 40>; 182 reg = <0xa80 0x10 0x3e80 0x40>;
182 interrupts = <4>; 183 interrupts = <4>;
183 interrupt-parent = <&CPM_PIC>; 184 interrupt-parent = <&CPM_PIC>;
184 fsl,cpm-brg = <1>; 185 fsl,cpm-brg = <1>;
185 fsl,cpm-command = <0090>; 186 fsl,cpm-command = <0x90>;
186 linux,planetcore-label = "SMC1"; 187 linux,planetcore-label = "SMC1";
187 }; 188 };
188 189
@@ -191,11 +192,11 @@
191 device_type = "serial"; 192 device_type = "serial";
192 compatible = "fsl,mpc885-scc-uart", 193 compatible = "fsl,mpc885-scc-uart",
193 "fsl,cpm1-scc-uart"; 194 "fsl,cpm1-scc-uart";
194 reg = <a20 20 3d00 80>; 195 reg = <0xa20 0x20 0x3d00 0x80>;
195 interrupts = <1d>; 196 interrupts = <29>;
196 interrupt-parent = <&CPM_PIC>; 197 interrupt-parent = <&CPM_PIC>;
197 fsl,cpm-brg = <2>; 198 fsl,cpm-brg = <2>;
198 fsl,cpm-command = <0040>; 199 fsl,cpm-command = <0x40>;
199 linux,planetcore-label = "SCC2"; 200 linux,planetcore-label = "SCC2";
200 }; 201 };
201 202
@@ -204,9 +205,9 @@
204 #size-cells = <0>; 205 #size-cells = <0>;
205 compatible = "fsl,mpc885-usb", 206 compatible = "fsl,mpc885-usb",
206 "fsl,cpm1-usb"; 207 "fsl,cpm1-usb";
207 reg = <a00 18 1c00 80>; 208 reg = <0xa00 0x18 0x1c00 0x80>;
208 interrupt-parent = <&CPM_PIC>; 209 interrupt-parent = <&CPM_PIC>;
209 interrupts = <1e>; 210 interrupts = <30>;
210 fsl,cpm-command = <0000>; 211 fsl,cpm-command = <0000>;
211 }; 212 };
212 }; 213 };
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 446958854519..2e5a1a1812b6 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -7,6 +7,7 @@
7 * Based on sandpoint.dts 7 * Based on sandpoint.dts
8 * 8 *
9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> 9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
10 * Copyright 2008 Freescale Semiconductor, Inc.
10 * 11 *
11 * This file is licensed under 12 * This file is licensed under
12 * the terms of the GNU General Public License version 2. This program 13 * the terms of the GNU General Public License version 2. This program
@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
17 18
18 */ 19 */
19 20
21/dts-v1/;
22
20/ { 23/ {
21 model = "KuroboxHD"; 24 model = "KuroboxHD";
22 compatible = "linkstation"; 25 compatible = "linkstation";
@@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??
35 38
36 PowerPC,603e { /* Really 8241 */ 39 PowerPC,603e { /* Really 8241 */
37 device_type = "cpu"; 40 device_type = "cpu";
38 reg = <0>; 41 reg = <0x0>;
39 clock-frequency = <bebc200>; /* Fixed by bootloader */ 42 clock-frequency = <200000000>; /* Fixed by bootloader */
40 timebase-frequency = <1743000>; /* Fixed by bootloader */ 43 timebase-frequency = <24391680>; /* Fixed by bootloader */
41 bus-frequency = <0>; /* Fixed by bootloader */ 44 bus-frequency = <0>; /* Fixed by bootloader */
42 /* Following required by dtc but not used */ 45 /* Following required by dtc but not used */
43 i-cache-size = <4000>; 46 i-cache-size = <0x4000>;
44 d-cache-size = <4000>; 47 d-cache-size = <0x4000>;
45 }; 48 };
46 }; 49 };
47 50
48 memory { 51 memory {
49 device_type = "memory"; 52 device_type = "memory";
50 reg = <00000000 04000000>; 53 reg = <0x0 0x4000000>;
51 }; 54 };
52 55
53 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ 56 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
@@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
56 device_type = "soc"; 59 device_type = "soc";
57 compatible = "mpc10x"; 60 compatible = "mpc10x";
58 store-gathering = <0>; /* 0 == off, !0 == on */ 61 store-gathering = <0>; /* 0 == off, !0 == on */
59 reg = <80000000 00100000>; 62 reg = <0x80000000 0x100000>;
60 ranges = <80000000 80000000 70000000 /* pci mem space */ 63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
61 fc000000 fc000000 00100000 /* EUMB */ 64 0xfc000000 0xfc000000 0x100000 /* EUMB */
62 fe000000 fe000000 00c00000 /* pci i/o space */ 65 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
63 fec00000 fec00000 00300000 /* pci cfg regs */ 66 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
64 fef00000 fef00000 00100000>; /* pci iack */ 67 0xfef00000 0xfef00000 0x100000>; /* pci iack */
65 68
66 i2c@80003000 { 69 i2c@80003000 {
67 #address-cells = <1>; 70 #address-cells = <1>;
68 #size-cells = <0>; 71 #size-cells = <0>;
69 cell-index = <0>; 72 cell-index = <0>;
70 compatible = "fsl-i2c"; 73 compatible = "fsl-i2c";
71 reg = <80003000 1000>; 74 reg = <0x80003000 0x1000>;
72 interrupts = <5 2>; 75 interrupts = <5 2>;
73 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
74 77
75 rtc@32 { 78 rtc@32 {
76 device_type = "rtc"; 79 device_type = "rtc";
77 compatible = "ricoh,rs5c372a"; 80 compatible = "ricoh,rs5c372a";
78 reg = <32>; 81 reg = <0x32>;
79 }; 82 };
80 }; 83 };
81 84
@@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
83 cell-index = <0>; 86 cell-index = <0>;
84 device_type = "serial"; 87 device_type = "serial";
85 compatible = "ns16550"; 88 compatible = "ns16550";
86 reg = <80004500 8>; 89 reg = <0x80004500 0x8>;
87 clock-frequency = <5d08d88>; 90 clock-frequency = <97553800>;
88 current-speed = <2580>; 91 current-speed = <9600>;
89 interrupts = <9 0>; 92 interrupts = <9 0>;
90 interrupt-parent = <&mpic>; 93 interrupt-parent = <&mpic>;
91 }; 94 };
@@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
94 cell-index = <1>; 97 cell-index = <1>;
95 device_type = "serial"; 98 device_type = "serial";
96 compatible = "ns16550"; 99 compatible = "ns16550";
97 reg = <80004600 8>; 100 reg = <0x80004600 0x8>;
98 clock-frequency = <5d08d88>; 101 clock-frequency = <97553800>;
99 current-speed = <e100>; 102 current-speed = <57600>;
100 interrupts = <a 0>; 103 interrupts = <10 0>;
101 interrupt-parent = <&mpic>; 104 interrupt-parent = <&mpic>;
102 }; 105 };
103 106
@@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
107 device_type = "open-pic"; 110 device_type = "open-pic";
108 compatible = "chrp,open-pic"; 111 compatible = "chrp,open-pic";
109 interrupt-controller; 112 interrupt-controller;
110 reg = <80040000 40000>; 113 reg = <0x80040000 0x40000>;
111 }; 114 };
112 115
113 pci0: pci@fec00000 { 116 pci0: pci@fec00000 {
@@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
116 #interrupt-cells = <1>; 119 #interrupt-cells = <1>;
117 device_type = "pci"; 120 device_type = "pci";
118 compatible = "mpc10x-pci"; 121 compatible = "mpc10x-pci";
119 reg = <fec00000 400000>; 122 reg = <0xfec00000 0x400000>;
120 ranges = <01000000 0 0 fe000000 0 00c00000 123 ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
121 02000000 0 80000000 80000000 0 70000000>; 124 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
122 bus-range = <0 ff>; 125 bus-range = <0 255>;
123 clock-frequency = <7f28155>; 126 clock-frequency = <133333333>;
124 interrupt-parent = <&mpic>; 127 interrupt-parent = <&mpic>;
125 interrupt-map-mask = <f800 0 0 7>; 128 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
126 interrupt-map = < 129 interrupt-map = <
127 /* IDSEL 11 - IRQ0 ETH */ 130 /* IDSEL 11 - IRQ0 ETH */
128 5800 0 0 1 &mpic 0 1 131 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
129 5800 0 0 2 &mpic 1 1 132 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
130 5800 0 0 3 &mpic 2 1 133 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
131 5800 0 0 4 &mpic 3 1 134 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
132 /* IDSEL 12 - IRQ1 IDE0 */ 135 /* IDSEL 12 - IRQ1 IDE0 */
133 6000 0 0 1 &mpic 1 1 136 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
134 6000 0 0 2 &mpic 2 1 137 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
135 6000 0 0 3 &mpic 3 1 138 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
136 6000 0 0 4 &mpic 0 1 139 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
137 /* IDSEL 14 - IRQ3 USB2.0 */ 140 /* IDSEL 14 - IRQ3 USB2.0 */
138 7000 0 0 1 &mpic 3 1 141 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
139 7000 0 0 2 &mpic 3 1 142 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
140 7000 0 0 3 &mpic 3 1 143 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
141 7000 0 0 4 &mpic 3 1 144 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
142 >; 145 >;
143 }; 146 };
144 }; 147 };
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 8443c85b7b30..e4916e69ad31 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -7,6 +7,7 @@
7 * Based on sandpoint.dts 7 * Based on sandpoint.dts
8 * 8 *
9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> 9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
10 * Copyright 2008 Freescale Semiconductor, Inc.
10 * 11 *
11 * This file is licensed under 12 * This file is licensed under
12 * the terms of the GNU General Public License version 2. This program 13 * the terms of the GNU General Public License version 2. This program
@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
17 18
18 */ 19 */
19 20
21/dts-v1/;
22
20/ { 23/ {
21 model = "KuroboxHG"; 24 model = "KuroboxHG";
22 compatible = "linkstation"; 25 compatible = "linkstation";
@@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??
35 38
36 PowerPC,603e { /* Really 8241 */ 39 PowerPC,603e { /* Really 8241 */
37 device_type = "cpu"; 40 device_type = "cpu";
38 reg = <0>; 41 reg = <0x0>;
39 clock-frequency = <fdad680>; /* Fixed by bootloader */ 42 clock-frequency = <266000000>; /* Fixed by bootloader */
40 timebase-frequency = <1F04000>; /* Fixed by bootloader */ 43 timebase-frequency = <32522240>; /* Fixed by bootloader */
41 bus-frequency = <0>; /* Fixed by bootloader */ 44 bus-frequency = <0>; /* Fixed by bootloader */
42 /* Following required by dtc but not used */ 45 /* Following required by dtc but not used */
43 i-cache-size = <4000>; 46 i-cache-size = <0x4000>;
44 d-cache-size = <4000>; 47 d-cache-size = <0x4000>;
45 }; 48 };
46 }; 49 };
47 50
48 memory { 51 memory {
49 device_type = "memory"; 52 device_type = "memory";
50 reg = <00000000 08000000>; 53 reg = <0x0 0x8000000>;
51 }; 54 };
52 55
53 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ 56 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
@@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
56 device_type = "soc"; 59 device_type = "soc";
57 compatible = "mpc10x"; 60 compatible = "mpc10x";
58 store-gathering = <0>; /* 0 == off, !0 == on */ 61 store-gathering = <0>; /* 0 == off, !0 == on */
59 reg = <80000000 00100000>; 62 reg = <0x80000000 0x100000>;
60 ranges = <80000000 80000000 70000000 /* pci mem space */ 63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
61 fc000000 fc000000 00100000 /* EUMB */ 64 0xfc000000 0xfc000000 0x100000 /* EUMB */
62 fe000000 fe000000 00c00000 /* pci i/o space */ 65 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
63 fec00000 fec00000 00300000 /* pci cfg regs */ 66 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
64 fef00000 fef00000 00100000>; /* pci iack */ 67 0xfef00000 0xfef00000 0x100000>; /* pci iack */
65 68
66 i2c@80003000 { 69 i2c@80003000 {
67 #address-cells = <1>; 70 #address-cells = <1>;
68 #size-cells = <0>; 71 #size-cells = <0>;
69 cell-index = <0>; 72 cell-index = <0>;
70 compatible = "fsl-i2c"; 73 compatible = "fsl-i2c";
71 reg = <80003000 1000>; 74 reg = <0x80003000 0x1000>;
72 interrupts = <5 2>; 75 interrupts = <5 2>;
73 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
74 77
75 rtc@32 { 78 rtc@32 {
76 device_type = "rtc"; 79 device_type = "rtc";
77 compatible = "ricoh,rs5c372a"; 80 compatible = "ricoh,rs5c372a";
78 reg = <32>; 81 reg = <0x32>;
79 }; 82 };
80 }; 83 };
81 84
@@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
83 cell-index = <0>; 86 cell-index = <0>;
84 device_type = "serial"; 87 device_type = "serial";
85 compatible = "ns16550"; 88 compatible = "ns16550";
86 reg = <80004500 8>; 89 reg = <0x80004500 0x8>;
87 clock-frequency = <7c044a8>; 90 clock-frequency = <130041000>;
88 current-speed = <2580>; 91 current-speed = <9600>;
89 interrupts = <9 0>; 92 interrupts = <9 0>;
90 interrupt-parent = <&mpic>; 93 interrupt-parent = <&mpic>;
91 }; 94 };
@@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
94 cell-index = <1>; 97 cell-index = <1>;
95 device_type = "serial"; 98 device_type = "serial";
96 compatible = "ns16550"; 99 compatible = "ns16550";
97 reg = <80004600 8>; 100 reg = <0x80004600 0x8>;
98 clock-frequency = <7c044a8>; 101 clock-frequency = <130041000>;
99 current-speed = <e100>; 102 current-speed = <57600>;
100 interrupts = <a 0>; 103 interrupts = <10 0>;
101 interrupt-parent = <&mpic>; 104 interrupt-parent = <&mpic>;
102 }; 105 };
103 106
@@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
107 device_type = "open-pic"; 110 device_type = "open-pic";
108 compatible = "chrp,open-pic"; 111 compatible = "chrp,open-pic";
109 interrupt-controller; 112 interrupt-controller;
110 reg = <80040000 40000>; 113 reg = <0x80040000 0x40000>;
111 }; 114 };
112 115
113 pci0: pci@fec00000 { 116 pci0: pci@fec00000 {
@@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
116 #interrupt-cells = <1>; 119 #interrupt-cells = <1>;
117 device_type = "pci"; 120 device_type = "pci";
118 compatible = "mpc10x-pci"; 121 compatible = "mpc10x-pci";
119 reg = <fec00000 400000>; 122 reg = <0xfec00000 0x400000>;
120 ranges = <01000000 0 0 fe000000 0 00c00000 123 ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
121 02000000 0 80000000 80000000 0 70000000>; 124 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
122 bus-range = <0 ff>; 125 bus-range = <0 255>;
123 clock-frequency = <7f28155>; 126 clock-frequency = <133333333>;
124 interrupt-parent = <&mpic>; 127 interrupt-parent = <&mpic>;
125 interrupt-map-mask = <f800 0 0 7>; 128 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
126 interrupt-map = < 129 interrupt-map = <
127 /* IDSEL 11 - IRQ0 ETH */ 130 /* IDSEL 11 - IRQ0 ETH */
128 5800 0 0 1 &mpic 0 1 131 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
129 5800 0 0 2 &mpic 1 1 132 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
130 5800 0 0 3 &mpic 2 1 133 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
131 5800 0 0 4 &mpic 3 1 134 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
132 /* IDSEL 12 - IRQ1 IDE0 */ 135 /* IDSEL 12 - IRQ1 IDE0 */
133 6000 0 0 1 &mpic 1 1 136 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
134 6000 0 0 2 &mpic 2 1 137 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
135 6000 0 0 3 &mpic 3 1 138 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
136 6000 0 0 4 &mpic 0 1 139 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
137 /* IDSEL 14 - IRQ3 USB2.0 */ 140 /* IDSEL 14 - IRQ3 USB2.0 */
138 7000 0 0 1 &mpic 3 1 141 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
139 7000 0 0 2 &mpic 3 1 142 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
140 7000 0 0 3 &mpic 3 1 143 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
141 7000 0 0 4 &mpic 3 1 144 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
142 >; 145 >;
143 }; 146 };
144 }; 147 };
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 8fb542387436..4936349b87cd 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC7448HPC2 (Taiga) board Device Tree Source 2 * MPC7448HPC2 (Taiga) board Device Tree Source
3 * 3 *
4 * Copyright 2006 Freescale Semiconductor Inc. 4 * Copyright 2006, 2008 Freescale Semiconductor Inc.
5 * 2006 Roy Zang <Roy Zang at freescale.com>. 5 * 2006 Roy Zang <Roy Zang at freescale.com>.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -10,6 +10,7 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/dts-v1/;
13 14
14/ { 15/ {
15 model = "mpc7448hpc2"; 16 model = "mpc7448hpc2";
@@ -23,11 +24,11 @@
23 24
24 PowerPC,7448@0 { 25 PowerPC,7448@0 {
25 device_type = "cpu"; 26 device_type = "cpu";
26 reg = <0>; 27 reg = <0x0>;
27 d-cache-line-size = <20>; // 32 bytes 28 d-cache-line-size = <32>; // 32 bytes
28 i-cache-line-size = <20>; // 32 bytes 29 i-cache-line-size = <32>; // 32 bytes
29 d-cache-size = <8000>; // L1, 32K bytes 30 d-cache-size = <0x8000>; // L1, 32K bytes
30 i-cache-size = <8000>; // L1, 32K bytes 31 i-cache-size = <0x8000>; // L1, 32K bytes
31 timebase-frequency = <0>; // 33 MHz, from uboot 32 timebase-frequency = <0>; // 33 MHz, from uboot
32 clock-frequency = <0>; // From U-Boot 33 clock-frequency = <0>; // From U-Boot
33 bus-frequency = <0>; // From U-Boot 34 bus-frequency = <0>; // From U-Boot
@@ -36,7 +37,7 @@
36 37
37 memory { 38 memory {
38 device_type = "memory"; 39 device_type = "memory";
39 reg = <00000000 20000000 // DDR2 512M at 0 40 reg = <0x0 0x20000000 // DDR2 512M at 0
40 >; 41 >;
41 }; 42 };
42 43
@@ -44,14 +45,14 @@
44 #address-cells = <1>; 45 #address-cells = <1>;
45 #size-cells = <1>; 46 #size-cells = <1>;
46 device_type = "tsi-bridge"; 47 device_type = "tsi-bridge";
47 ranges = <00000000 c0000000 00010000>; 48 ranges = <0x0 0xc0000000 0x10000>;
48 reg = <c0000000 00010000>; 49 reg = <0xc0000000 0x10000>;
49 bus-frequency = <0>; 50 bus-frequency = <0>;
50 51
51 i2c@7000 { 52 i2c@7000 {
52 interrupt-parent = <&mpic>; 53 interrupt-parent = <&mpic>;
53 interrupts = <E 0>; 54 interrupts = <14 0>;
54 reg = <7000 400>; 55 reg = <0x7000 0x400>;
55 device_type = "i2c"; 56 device_type = "i2c";
56 compatible = "tsi108-i2c"; 57 compatible = "tsi108-i2c";
57 }; 58 };
@@ -59,20 +60,20 @@
59 MDIO: mdio@6000 { 60 MDIO: mdio@6000 {
60 device_type = "mdio"; 61 device_type = "mdio";
61 compatible = "tsi108-mdio"; 62 compatible = "tsi108-mdio";
62 reg = <6000 50>; 63 reg = <0x6000 0x50>;
63 #address-cells = <1>; 64 #address-cells = <1>;
64 #size-cells = <0>; 65 #size-cells = <0>;
65 66
66 phy8: ethernet-phy@8 { 67 phy8: ethernet-phy@8 {
67 interrupt-parent = <&mpic>; 68 interrupt-parent = <&mpic>;
68 interrupts = <2 1>; 69 interrupts = <2 1>;
69 reg = <8>; 70 reg = <0x8>;
70 }; 71 };
71 72
72 phy9: ethernet-phy@9 { 73 phy9: ethernet-phy@9 {
73 interrupt-parent = <&mpic>; 74 interrupt-parent = <&mpic>;
74 interrupts = <2 1>; 75 interrupts = <2 1>;
75 reg = <9>; 76 reg = <0x9>;
76 }; 77 };
77 78
78 }; 79 };
@@ -82,9 +83,9 @@
82 #size-cells = <0>; 83 #size-cells = <0>;
83 device_type = "network"; 84 device_type = "network";
84 compatible = "tsi108-ethernet"; 85 compatible = "tsi108-ethernet";
85 reg = <6000 200>; 86 reg = <0x6000 0x200>;
86 address = [ 00 06 D2 00 00 01 ]; 87 address = [ 00 06 D2 00 00 01 ];
87 interrupts = <10 2>; 88 interrupts = <16 2>;
88 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
89 mdio-handle = <&MDIO>; 90 mdio-handle = <&MDIO>;
90 phy-handle = <&phy8>; 91 phy-handle = <&phy8>;
@@ -96,9 +97,9 @@
96 #size-cells = <0>; 97 #size-cells = <0>;
97 device_type = "network"; 98 device_type = "network";
98 compatible = "tsi108-ethernet"; 99 compatible = "tsi108-ethernet";
99 reg = <6400 200>; 100 reg = <0x6400 0x200>;
100 address = [ 00 06 D2 00 00 02 ]; 101 address = [ 00 06 D2 00 00 02 ];
101 interrupts = <11 2>; 102 interrupts = <17 2>;
102 interrupt-parent = <&mpic>; 103 interrupt-parent = <&mpic>;
103 mdio-handle = <&MDIO>; 104 mdio-handle = <&MDIO>;
104 phy-handle = <&phy9>; 105 phy-handle = <&phy9>;
@@ -107,18 +108,18 @@
107 serial@7808 { 108 serial@7808 {
108 device_type = "serial"; 109 device_type = "serial";
109 compatible = "ns16550"; 110 compatible = "ns16550";
110 reg = <7808 200>; 111 reg = <0x7808 0x200>;
111 clock-frequency = <3f6b5a00>; 112 clock-frequency = <1064000000>;
112 interrupts = <c 0>; 113 interrupts = <12 0>;
113 interrupt-parent = <&mpic>; 114 interrupt-parent = <&mpic>;
114 }; 115 };
115 116
116 serial@7c08 { 117 serial@7c08 {
117 device_type = "serial"; 118 device_type = "serial";
118 compatible = "ns16550"; 119 compatible = "ns16550";
119 reg = <7c08 200>; 120 reg = <0x7c08 0x200>;
120 clock-frequency = <3f6b5a00>; 121 clock-frequency = <1064000000>;
121 interrupts = <d 0>; 122 interrupts = <13 0>;
122 interrupt-parent = <&mpic>; 123 interrupt-parent = <&mpic>;
123 }; 124 };
124 125
@@ -127,7 +128,7 @@
127 interrupt-controller; 128 interrupt-controller;
128 #address-cells = <0>; 129 #address-cells = <0>;
129 #interrupt-cells = <2>; 130 #interrupt-cells = <2>;
130 reg = <7400 400>; 131 reg = <0x7400 0x400>;
131 compatible = "chrp,open-pic"; 132 compatible = "chrp,open-pic";
132 device_type = "open-pic"; 133 device_type = "open-pic";
133 big-endian; 134 big-endian;
@@ -138,39 +139,39 @@
138 #interrupt-cells = <1>; 139 #interrupt-cells = <1>;
139 #size-cells = <2>; 140 #size-cells = <2>;
140 #address-cells = <3>; 141 #address-cells = <3>;
141 reg = <1000 1000>; 142 reg = <0x1000 0x1000>;
142 bus-range = <0 0>; 143 bus-range = <0 0>;
143 ranges = <02000000 0 e0000000 e0000000 0 1A000000 144 ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
144 01000000 0 00000000 fa000000 0 00010000>; 145 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
145 clock-frequency = <7f28154>; 146 clock-frequency = <133333332>;
146 interrupt-parent = <&mpic>; 147 interrupt-parent = <&mpic>;
147 interrupts = <17 2>; 148 interrupts = <23 2>;
148 interrupt-map-mask = <f800 0 0 7>; 149 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
149 interrupt-map = < 150 interrupt-map = <
150 151
151 /* IDSEL 0x11 */ 152 /* IDSEL 0x11 */
152 0800 0 0 1 &RT0 24 0 153 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
153 0800 0 0 2 &RT0 25 0 154 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
154 0800 0 0 3 &RT0 26 0 155 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
155 0800 0 0 4 &RT0 27 0 156 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
156 157
157 /* IDSEL 0x12 */ 158 /* IDSEL 0x12 */
158 1000 0 0 1 &RT0 25 0 159 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
159 1000 0 0 2 &RT0 26 0 160 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
160 1000 0 0 3 &RT0 27 0 161 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
161 1000 0 0 4 &RT0 24 0 162 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
162 163
163 /* IDSEL 0x13 */ 164 /* IDSEL 0x13 */
164 1800 0 0 1 &RT0 26 0 165 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
165 1800 0 0 2 &RT0 27 0 166 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
166 1800 0 0 3 &RT0 24 0 167 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
167 1800 0 0 4 &RT0 25 0 168 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
168 169
169 /* IDSEL 0x14 */ 170 /* IDSEL 0x14 */
170 2000 0 0 1 &RT0 27 0 171 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
171 2000 0 0 2 &RT0 24 0 172 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
172 2000 0 0 3 &RT0 25 0 173 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
173 2000 0 0 4 &RT0 26 0 174 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
174 >; 175 >;
175 176
176 RT0: router@1180 { 177 RT0: router@1180 {
@@ -180,7 +181,7 @@
180 #address-cells = <0>; 181 #address-cells = <0>;
181 #interrupt-cells = <2>; 182 #interrupt-cells = <2>;
182 big-endian; 183 big-endian;
183 interrupts = <17 2>; 184 interrupts = <23 2>;
184 interrupt-parent = <&mpic>; 185 interrupt-parent = <&mpic>;
185 }; 186 };
186 }; 187 };
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 7285ca1325fd..46e2da30c3dd 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8272 ADS Device Tree Source 2 * MPC8272 ADS Device Tree Source
3 * 3 *
4 * Copyright 2005 Freescale Semiconductor Inc. 4 * Copyright 2005,2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,6 +9,8 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "MPC8272ADS"; 15 model = "MPC8272ADS";
14 compatible = "fsl,mpc8272ads"; 16 compatible = "fsl,mpc8272ads";
@@ -21,11 +23,11 @@
21 23
22 PowerPC,8272@0 { 24 PowerPC,8272@0 {
23 device_type = "cpu"; 25 device_type = "cpu";
24 reg = <0>; 26 reg = <0x0>;
25 d-cache-line-size = <d#32>; 27 d-cache-line-size = <32>;
26 i-cache-line-size = <d#32>; 28 i-cache-line-size = <32>;
27 d-cache-size = <d#16384>; 29 d-cache-size = <16384>;
28 i-cache-size = <d#16384>; 30 i-cache-size = <16384>;
29 timebase-frequency = <0>; 31 timebase-frequency = <0>;
30 bus-frequency = <0>; 32 bus-frequency = <0>;
31 clock-frequency = <0>; 33 clock-frequency = <0>;
@@ -34,7 +36,7 @@
34 36
35 memory { 37 memory {
36 device_type = "memory"; 38 device_type = "memory";
37 reg = <0 0>; 39 reg = <0x0 0x0>;
38 }; 40 };
39 41
40 localbus@f0010100 { 42 localbus@f0010100 {
@@ -42,21 +44,21 @@
42 "fsl,pq2-localbus"; 44 "fsl,pq2-localbus";
43 #address-cells = <2>; 45 #address-cells = <2>;
44 #size-cells = <1>; 46 #size-cells = <1>;
45 reg = <f0010100 40>; 47 reg = <0xf0010100 0x40>;
46 48
47 ranges = <0 0 fe000000 02000000 49 ranges = <0x0 0x0 0xfe000000 0x2000000
48 1 0 f4500000 00008000 50 0x1 0x0 0xf4500000 0x8000
49 3 0 f8200000 00008000>; 51 0x3 0x0 0xf8200000 0x8000>;
50 52
51 flash@0,0 { 53 flash@0,0 {
52 compatible = "jedec-flash"; 54 compatible = "jedec-flash";
53 reg = <0 0 2000000>; 55 reg = <0x0 0x0 0x2000000>;
54 bank-width = <4>; 56 bank-width = <4>;
55 device-width = <1>; 57 device-width = <1>;
56 }; 58 };
57 59
58 board-control@1,0 { 60 board-control@1,0 {
59 reg = <1 0 20>; 61 reg = <0x1 0x0 0x20>;
60 compatible = "fsl,mpc8272ads-bcsr"; 62 compatible = "fsl,mpc8272ads-bcsr";
61 }; 63 };
62 64
@@ -65,46 +67,46 @@
65 "fsl,pq2ads-pci-pic"; 67 "fsl,pq2ads-pci-pic";
66 #interrupt-cells = <1>; 68 #interrupt-cells = <1>;
67 interrupt-controller; 69 interrupt-controller;
68 reg = <3 0 8>; 70 reg = <0x3 0x0 0x8>;
69 interrupt-parent = <&PIC>; 71 interrupt-parent = <&PIC>;
70 interrupts = <14 8>; 72 interrupts = <20 8>;
71 }; 73 };
72 }; 74 };
73 75
74 76
75 pci@f0010800 { 77 pci@f0010800 {
76 device_type = "pci"; 78 device_type = "pci";
77 reg = <f0010800 10c f00101ac 8 f00101c4 8>; 79 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
78 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci"; 80 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
79 #interrupt-cells = <1>; 81 #interrupt-cells = <1>;
80 #size-cells = <2>; 82 #size-cells = <2>;
81 #address-cells = <3>; 83 #address-cells = <3>;
82 clock-frequency = <d#66666666>; 84 clock-frequency = <66666666>;
83 interrupt-map-mask = <f800 0 0 7>; 85 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
84 interrupt-map = < 86 interrupt-map = <
85 /* IDSEL 0x16 */ 87 /* IDSEL 0x16 */
86 b000 0 0 1 &PCI_PIC 0 88 0xb000 0x0 0x0 0x1 &PCI_PIC 0
87 b000 0 0 2 &PCI_PIC 1 89 0xb000 0x0 0x0 0x2 &PCI_PIC 1
88 b000 0 0 3 &PCI_PIC 2 90 0xb000 0x0 0x0 0x3 &PCI_PIC 2
89 b000 0 0 4 &PCI_PIC 3 91 0xb000 0x0 0x0 0x4 &PCI_PIC 3
90 92
91 /* IDSEL 0x17 */ 93 /* IDSEL 0x17 */
92 b800 0 0 1 &PCI_PIC 4 94 0xb800 0x0 0x0 0x1 &PCI_PIC 4
93 b800 0 0 2 &PCI_PIC 5 95 0xb800 0x0 0x0 0x2 &PCI_PIC 5
94 b800 0 0 3 &PCI_PIC 6 96 0xb800 0x0 0x0 0x3 &PCI_PIC 6
95 b800 0 0 4 &PCI_PIC 7 97 0xb800 0x0 0x0 0x4 &PCI_PIC 7
96 98
97 /* IDSEL 0x18 */ 99 /* IDSEL 0x18 */
98 c000 0 0 1 &PCI_PIC 8 100 0xc000 0x0 0x0 0x1 &PCI_PIC 8
99 c000 0 0 2 &PCI_PIC 9 101 0xc000 0x0 0x0 0x2 &PCI_PIC 9
100 c000 0 0 3 &PCI_PIC a 102 0xc000 0x0 0x0 0x3 &PCI_PIC 10
101 c000 0 0 4 &PCI_PIC b>; 103 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
102 104
103 interrupt-parent = <&PIC>; 105 interrupt-parent = <&PIC>;
104 interrupts = <12 8>; 106 interrupts = <18 8>;
105 ranges = <42000000 0 80000000 80000000 0 20000000 107 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
106 02000000 0 a0000000 a0000000 0 20000000 108 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
107 01000000 0 00000000 f6000000 0 02000000>; 109 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
108 }; 110 };
109 111
110 soc@f0000000 { 112 soc@f0000000 {
@@ -112,26 +114,26 @@
112 #size-cells = <1>; 114 #size-cells = <1>;
113 device_type = "soc"; 115 device_type = "soc";
114 compatible = "fsl,mpc8272", "fsl,pq2-soc"; 116 compatible = "fsl,mpc8272", "fsl,pq2-soc";
115 ranges = <00000000 f0000000 00053000>; 117 ranges = <0x0 0xf0000000 0x53000>;
116 118
117 // Temporary -- will go away once kernel uses ranges for get_immrbase(). 119 // Temporary -- will go away once kernel uses ranges for get_immrbase().
118 reg = <f0000000 00053000>; 120 reg = <0xf0000000 0x53000>;
119 121
120 cpm@119c0 { 122 cpm@119c0 {
121 #address-cells = <1>; 123 #address-cells = <1>;
122 #size-cells = <1>; 124 #size-cells = <1>;
123 compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; 125 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
124 reg = <119c0 30>; 126 reg = <0x119c0 0x30>;
125 ranges; 127 ranges;
126 128
127 muram@0 { 129 muram@0 {
128 #address-cells = <1>; 130 #address-cells = <1>;
129 #size-cells = <1>; 131 #size-cells = <1>;
130 ranges = <0 0 10000>; 132 ranges = <0x0 0x0 0x10000>;
131 133
132 data@0 { 134 data@0 {
133 compatible = "fsl,cpm-muram-data"; 135 compatible = "fsl,cpm-muram-data";
134 reg = <0 2000 9800 800>; 136 reg = <0x0 0x2000 0x9800 0x800>;
135 }; 137 };
136 }; 138 };
137 139
@@ -139,29 +141,29 @@
139 compatible = "fsl,mpc8272-brg", 141 compatible = "fsl,mpc8272-brg",
140 "fsl,cpm2-brg", 142 "fsl,cpm2-brg",
141 "fsl,cpm-brg"; 143 "fsl,cpm-brg";
142 reg = <119f0 10 115f0 10>; 144 reg = <0x119f0 0x10 0x115f0 0x10>;
143 }; 145 };
144 146
145 serial@11a00 { 147 serial@11a00 {
146 device_type = "serial"; 148 device_type = "serial";
147 compatible = "fsl,mpc8272-scc-uart", 149 compatible = "fsl,mpc8272-scc-uart",
148 "fsl,cpm2-scc-uart"; 150 "fsl,cpm2-scc-uart";
149 reg = <11a00 20 8000 100>; 151 reg = <0x11a00 0x20 0x8000 0x100>;
150 interrupts = <28 8>; 152 interrupts = <40 8>;
151 interrupt-parent = <&PIC>; 153 interrupt-parent = <&PIC>;
152 fsl,cpm-brg = <1>; 154 fsl,cpm-brg = <1>;
153 fsl,cpm-command = <00800000>; 155 fsl,cpm-command = <0x800000>;
154 }; 156 };
155 157
156 serial@11a60 { 158 serial@11a60 {
157 device_type = "serial"; 159 device_type = "serial";
158 compatible = "fsl,mpc8272-scc-uart", 160 compatible = "fsl,mpc8272-scc-uart",
159 "fsl,cpm2-scc-uart"; 161 "fsl,cpm2-scc-uart";
160 reg = <11a60 20 8300 100>; 162 reg = <0x11a60 0x20 0x8300 0x100>;
161 interrupts = <2b 8>; 163 interrupts = <43 8>;
162 interrupt-parent = <&PIC>; 164 interrupt-parent = <&PIC>;
163 fsl,cpm-brg = <4>; 165 fsl,cpm-brg = <4>;
164 fsl,cpm-command = <0ce00000>; 166 fsl,cpm-command = <0xce00000>;
165 }; 167 };
166 168
167 mdio@10d40 { 169 mdio@10d40 {
@@ -169,23 +171,23 @@
169 compatible = "fsl,mpc8272ads-mdio-bitbang", 171 compatible = "fsl,mpc8272ads-mdio-bitbang",
170 "fsl,mpc8272-mdio-bitbang", 172 "fsl,mpc8272-mdio-bitbang",
171 "fsl,cpm2-mdio-bitbang"; 173 "fsl,cpm2-mdio-bitbang";
172 reg = <10d40 14>; 174 reg = <0x10d40 0x14>;
173 #address-cells = <1>; 175 #address-cells = <1>;
174 #size-cells = <0>; 176 #size-cells = <0>;
175 fsl,mdio-pin = <12>; 177 fsl,mdio-pin = <18>;
176 fsl,mdc-pin = <13>; 178 fsl,mdc-pin = <19>;
177 179
178 PHY0: ethernet-phy@0 { 180 PHY0: ethernet-phy@0 {
179 interrupt-parent = <&PIC>; 181 interrupt-parent = <&PIC>;
180 interrupts = <17 8>; 182 interrupts = <23 8>;
181 reg = <0>; 183 reg = <0x0>;
182 device_type = "ethernet-phy"; 184 device_type = "ethernet-phy";
183 }; 185 };
184 186
185 PHY1: ethernet-phy@1 { 187 PHY1: ethernet-phy@1 {
186 interrupt-parent = <&PIC>; 188 interrupt-parent = <&PIC>;
187 interrupts = <17 8>; 189 interrupts = <23 8>;
188 reg = <3>; 190 reg = <0x3>;
189 device_type = "ethernet-phy"; 191 device_type = "ethernet-phy";
190 }; 192 };
191 }; 193 };
@@ -194,33 +196,33 @@
194 device_type = "network"; 196 device_type = "network";
195 compatible = "fsl,mpc8272-fcc-enet", 197 compatible = "fsl,mpc8272-fcc-enet",
196 "fsl,cpm2-fcc-enet"; 198 "fsl,cpm2-fcc-enet";
197 reg = <11300 20 8400 100 11390 1>; 199 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
198 local-mac-address = [ 00 00 00 00 00 00 ]; 200 local-mac-address = [ 00 00 00 00 00 00 ];
199 interrupts = <20 8>; 201 interrupts = <32 8>;
200 interrupt-parent = <&PIC>; 202 interrupt-parent = <&PIC>;
201 phy-handle = <&PHY0>; 203 phy-handle = <&PHY0>;
202 linux,network-index = <0>; 204 linux,network-index = <0>;
203 fsl,cpm-command = <12000300>; 205 fsl,cpm-command = <0x12000300>;
204 }; 206 };
205 207
206 ethernet@11320 { 208 ethernet@11320 {
207 device_type = "network"; 209 device_type = "network";
208 compatible = "fsl,mpc8272-fcc-enet", 210 compatible = "fsl,mpc8272-fcc-enet",
209 "fsl,cpm2-fcc-enet"; 211 "fsl,cpm2-fcc-enet";
210 reg = <11320 20 8500 100 113b0 1>; 212 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
211 local-mac-address = [ 00 00 00 00 00 00 ]; 213 local-mac-address = [ 00 00 00 00 00 00 ];
212 interrupts = <21 8>; 214 interrupts = <33 8>;
213 interrupt-parent = <&PIC>; 215 interrupt-parent = <&PIC>;
214 phy-handle = <&PHY1>; 216 phy-handle = <&PHY1>;
215 linux,network-index = <1>; 217 linux,network-index = <1>;
216 fsl,cpm-command = <16200300>; 218 fsl,cpm-command = <0x16200300>;
217 }; 219 };
218 }; 220 };
219 221
220 PIC: interrupt-controller@10c00 { 222 PIC: interrupt-controller@10c00 {
221 #interrupt-cells = <2>; 223 #interrupt-cells = <2>;
222 interrupt-controller; 224 interrupt-controller;
223 reg = <10c00 80>; 225 reg = <0x10c00 0x80>;
224 compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; 226 compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
225 }; 227 };
226 228
@@ -232,14 +234,14 @@
232 "fsl,talitos-sec2", 234 "fsl,talitos-sec2",
233 "fsl,talitos", 235 "fsl,talitos",
234 "talitos"; 236 "talitos";
235 reg = <30000 10000>; 237 reg = <0x30000 0x10000>;
236 interrupts = <b 8>; 238 interrupts = <11 8>;
237 interrupt-parent = <&PIC>; 239 interrupt-parent = <&PIC>;
238 num-channels = <4>; 240 num-channels = <4>;
239 channel-fifo-len = <18>; 241 channel-fifo-len = <24>;
240 exec-units-mask = <0000007e>; 242 exec-units-mask = <0x7e>;
241/* desc mask is for rev1.x, we need runtime fixup for >=2.x */ 243/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
242 descriptor-types-mask = <01010ebf>; 244 descriptor-types-mask = <0x1010ebf>;
243 }; 245 };
244 }; 246 };
245 247
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index daf9433e906b..765e43c997da 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -2,6 +2,7 @@
2 * MPC866 ADS Device Tree Source 2 * MPC866 ADS Device Tree Source
3 * 3 *
4 * Copyright 2006 MontaVista Software, Inc. 4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2008 Freescale Semiconductor, Inc.
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -9,6 +10,7 @@
9 * option) any later version. 10 * option) any later version.
10 */ 11 */
11 12
13/dts-v1/;
12 14
13/ { 15/ {
14 model = "MPC866ADS"; 16 model = "MPC866ADS";
@@ -22,37 +24,37 @@
22 24
23 PowerPC,866@0 { 25 PowerPC,866@0 {
24 device_type = "cpu"; 26 device_type = "cpu";
25 reg = <0>; 27 reg = <0x0>;
26 d-cache-line-size = <10>; // 16 bytes 28 d-cache-line-size = <16>; // 16 bytes
27 i-cache-line-size = <10>; // 16 bytes 29 i-cache-line-size = <16>; // 16 bytes
28 d-cache-size = <2000>; // L1, 8K 30 d-cache-size = <0x2000>; // L1, 8K
29 i-cache-size = <4000>; // L1, 16K 31 i-cache-size = <0x4000>; // L1, 16K
30 timebase-frequency = <0>; 32 timebase-frequency = <0>;
31 bus-frequency = <0>; 33 bus-frequency = <0>;
32 clock-frequency = <0>; 34 clock-frequency = <0>;
33 interrupts = <f 2>; // decrementer interrupt 35 interrupts = <15 2>; // decrementer interrupt
34 interrupt-parent = <&PIC>; 36 interrupt-parent = <&PIC>;
35 }; 37 };
36 }; 38 };
37 39
38 memory { 40 memory {
39 device_type = "memory"; 41 device_type = "memory";
40 reg = <00000000 800000>; 42 reg = <0x0 0x800000>;
41 }; 43 };
42 44
43 localbus@ff000100 { 45 localbus@ff000100 {
44 compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus"; 46 compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus";
45 #address-cells = <2>; 47 #address-cells = <2>;
46 #size-cells = <1>; 48 #size-cells = <1>;
47 reg = <ff000100 40>; 49 reg = <0xff000100 0x40>;
48 50
49 ranges = < 51 ranges = <
50 1 0 ff080000 00008000 52 0x1 0x0 0xff080000 0x8000
51 5 0 ff0a0000 00008000 53 0x5 0x0 0xff0a0000 0x8000
52 >; 54 >;
53 55
54 board-control@1,0 { 56 board-control@1,0 {
55 reg = <1 0 20 5 300 4>; 57 reg = <0x1 0x0 0x20 0x5 0x300 0x4>;
56 compatible = "fsl,mpc866ads-bcsr"; 58 compatible = "fsl,mpc866ads-bcsr";
57 }; 59 };
58 }; 60 };
@@ -61,17 +63,17 @@
61 #address-cells = <1>; 63 #address-cells = <1>;
62 #size-cells = <1>; 64 #size-cells = <1>;
63 device_type = "soc"; 65 device_type = "soc";
64 ranges = <0 ff000000 00100000>; 66 ranges = <0x0 0xff000000 0x100000>;
65 reg = <ff000000 00000200>; 67 reg = <0xff000000 0x200>;
66 bus-frequency = <0>; 68 bus-frequency = <0>;
67 69
68 mdio@e00 { 70 mdio@e00 {
69 compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio"; 71 compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
70 reg = <e00 188>; 72 reg = <0xe00 0x188>;
71 #address-cells = <1>; 73 #address-cells = <1>;
72 #size-cells = <0>; 74 #size-cells = <0>;
73 PHY: ethernet-phy@f { 75 PHY: ethernet-phy@f {
74 reg = <f>; 76 reg = <0xf>;
75 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
76 }; 78 };
77 }; 79 };
@@ -80,7 +82,7 @@
80 device_type = "network"; 82 device_type = "network";
81 compatible = "fsl,mpc866-fec-enet", 83 compatible = "fsl,mpc866-fec-enet",
82 "fsl,pq1-fec-enet"; 84 "fsl,pq1-fec-enet";
83 reg = <e00 188>; 85 reg = <0xe00 0x188>;
84 local-mac-address = [ 00 00 00 00 00 00 ]; 86 local-mac-address = [ 00 00 00 00 00 00 ];
85 interrupts = <3 1>; 87 interrupts = <3 1>;
86 interrupt-parent = <&PIC>; 88 interrupt-parent = <&PIC>;
@@ -91,7 +93,7 @@
91 PIC: pic@0 { 93 PIC: pic@0 {
92 interrupt-controller; 94 interrupt-controller;
93 #interrupt-cells = <2>; 95 #interrupt-cells = <2>;
94 reg = <0 24>; 96 reg = <0x0 0x24>;
95 compatible = "fsl,mpc866-pic", "fsl,pq1-pic"; 97 compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
96 }; 98 };
97 99
@@ -100,7 +102,7 @@
100 #size-cells = <1>; 102 #size-cells = <1>;
101 compatible = "fsl,mpc866-cpm", "fsl,cpm1"; 103 compatible = "fsl,mpc866-cpm", "fsl,cpm1";
102 ranges; 104 ranges;
103 reg = <9c0 40>; 105 reg = <0x9c0 0x40>;
104 brg-frequency = <0>; 106 brg-frequency = <0>;
105 interrupts = <0 2>; // cpm error interrupt 107 interrupts = <0 2>; // cpm error interrupt
106 interrupt-parent = <&CPM_PIC>; 108 interrupt-parent = <&CPM_PIC>;
@@ -108,11 +110,11 @@
108 muram@2000 { 110 muram@2000 {
109 #address-cells = <1>; 111 #address-cells = <1>;
110 #size-cells = <1>; 112 #size-cells = <1>;
111 ranges = <0 2000 2000>; 113 ranges = <0x0 0x2000 0x2000>;
112 114
113 data@0 { 115 data@0 {
114 compatible = "fsl,cpm-muram-data"; 116 compatible = "fsl,cpm-muram-data";
115 reg = <0 1c00>; 117 reg = <0x0 0x1c00>;
116 }; 118 };
117 }; 119 };
118 120
@@ -120,7 +122,7 @@
120 compatible = "fsl,mpc866-brg", 122 compatible = "fsl,mpc866-brg",
121 "fsl,cpm1-brg", 123 "fsl,cpm1-brg",
122 "fsl,cpm-brg"; 124 "fsl,cpm-brg";
123 reg = <9f0 10>; 125 reg = <0x9f0 0x10>;
124 clock-frequency = <0>; 126 clock-frequency = <0>;
125 }; 127 };
126 128
@@ -130,7 +132,7 @@
130 #interrupt-cells = <1>; 132 #interrupt-cells = <1>;
131 interrupts = <5 2 0 2>; 133 interrupts = <5 2 0 2>;
132 interrupt-parent = <&PIC>; 134 interrupt-parent = <&PIC>;
133 reg = <930 20>; 135 reg = <0x930 0x20>;
134 compatible = "fsl,mpc866-cpm-pic", 136 compatible = "fsl,mpc866-cpm-pic",
135 "fsl,cpm1-pic"; 137 "fsl,cpm1-pic";
136 }; 138 };
@@ -140,31 +142,31 @@
140 device_type = "serial"; 142 device_type = "serial";
141 compatible = "fsl,mpc866-smc-uart", 143 compatible = "fsl,mpc866-smc-uart",
142 "fsl,cpm1-smc-uart"; 144 "fsl,cpm1-smc-uart";
143 reg = <a80 10 3e80 40>; 145 reg = <0xa80 0x10 0x3e80 0x40>;
144 interrupts = <4>; 146 interrupts = <4>;
145 interrupt-parent = <&CPM_PIC>; 147 interrupt-parent = <&CPM_PIC>;
146 fsl,cpm-brg = <1>; 148 fsl,cpm-brg = <1>;
147 fsl,cpm-command = <0090>; 149 fsl,cpm-command = <0x90>;
148 }; 150 };
149 151
150 serial@a90 { 152 serial@a90 {
151 device_type = "serial"; 153 device_type = "serial";
152 compatible = "fsl,mpc866-smc-uart", 154 compatible = "fsl,mpc866-smc-uart",
153 "fsl,cpm1-smc-uart"; 155 "fsl,cpm1-smc-uart";
154 reg = <a90 10 3f80 40>; 156 reg = <0xa90 0x10 0x3f80 0x40>;
155 interrupts = <3>; 157 interrupts = <3>;
156 interrupt-parent = <&CPM_PIC>; 158 interrupt-parent = <&CPM_PIC>;
157 fsl,cpm-brg = <2>; 159 fsl,cpm-brg = <2>;
158 fsl,cpm-command = <00d0>; 160 fsl,cpm-command = <0xd0>;
159 }; 161 };
160 162
161 ethernet@a00 { 163 ethernet@a00 {
162 device_type = "network"; 164 device_type = "network";
163 compatible = "fsl,mpc866-scc-enet", 165 compatible = "fsl,mpc866-scc-enet",
164 "fsl,cpm1-scc-enet"; 166 "fsl,cpm1-scc-enet";
165 reg = <a00 18 3c00 100>; 167 reg = <0xa00 0x18 0x3c00 0x100>;
166 local-mac-address = [ 00 00 00 00 00 00 ]; 168 local-mac-address = [ 00 00 00 00 00 00 ];
167 interrupts = <1e>; 169 interrupts = <30>;
168 interrupt-parent = <&CPM_PIC>; 170 interrupt-parent = <&CPM_PIC>;
169 fsl,cpm-command = <0000>; 171 fsl,cpm-command = <0000>;
170 linux,network-index = <1>; 172 linux,network-index = <1>;
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index d84a012c2aaf..9895043722b9 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -2,7 +2,7 @@
2 * MPC885 ADS Device Tree Source 2 * MPC885 ADS Device Tree Source
3 * 3 *
4 * Copyright 2006 MontaVista Software, Inc. 4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc. 5 * Copyright 2007,2008 Freescale Semiconductor, Inc.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -10,6 +10,7 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/dts-v1/;
13 14
14/ { 15/ {
15 model = "MPC885ADS"; 16 model = "MPC885ADS";
@@ -23,45 +24,45 @@
23 24
24 PowerPC,885@0 { 25 PowerPC,885@0 {
25 device_type = "cpu"; 26 device_type = "cpu";
26 reg = <0>; 27 reg = <0x0>;
27 d-cache-line-size = <d#16>; 28 d-cache-line-size = <16>;
28 i-cache-line-size = <d#16>; 29 i-cache-line-size = <16>;
29 d-cache-size = <d#8192>; 30 d-cache-size = <8192>;
30 i-cache-size = <d#8192>; 31 i-cache-size = <8192>;
31 timebase-frequency = <0>; 32 timebase-frequency = <0>;
32 bus-frequency = <0>; 33 bus-frequency = <0>;
33 clock-frequency = <0>; 34 clock-frequency = <0>;
34 interrupts = <f 2>; // decrementer interrupt 35 interrupts = <15 2>; // decrementer interrupt
35 interrupt-parent = <&PIC>; 36 interrupt-parent = <&PIC>;
36 }; 37 };
37 }; 38 };
38 39
39 memory { 40 memory {
40 device_type = "memory"; 41 device_type = "memory";
41 reg = <0 0>; 42 reg = <0x0 0x0>;
42 }; 43 };
43 44
44 localbus@ff000100 { 45 localbus@ff000100 {
45 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; 46 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
46 #address-cells = <2>; 47 #address-cells = <2>;
47 #size-cells = <1>; 48 #size-cells = <1>;
48 reg = <ff000100 40>; 49 reg = <0xff000100 0x40>;
49 50
50 ranges = < 51 ranges = <
51 0 0 fe000000 00800000 52 0x0 0x0 0xfe000000 0x800000
52 1 0 ff080000 00008000 53 0x1 0x0 0xff080000 0x8000
53 5 0 ff0a0000 00008000 54 0x5 0x0 0xff0a0000 0x8000
54 >; 55 >;
55 56
56 flash@0,0 { 57 flash@0,0 {
57 compatible = "jedec-flash"; 58 compatible = "jedec-flash";
58 reg = <0 0 800000>; 59 reg = <0x0 0x0 0x800000>;
59 bank-width = <4>; 60 bank-width = <4>;
60 device-width = <1>; 61 device-width = <1>;
61 }; 62 };
62 63
63 board-control@1,0 { 64 board-control@1,0 {
64 reg = <1 0 20 5 300 4>; 65 reg = <0x1 0x0 0x20 0x5 0x300 0x4>;
65 compatible = "fsl,mpc885ads-bcsr"; 66 compatible = "fsl,mpc885ads-bcsr";
66 }; 67 };
67 }; 68 };
@@ -71,30 +72,30 @@
71 #address-cells = <1>; 72 #address-cells = <1>;
72 #size-cells = <1>; 73 #size-cells = <1>;
73 device_type = "soc"; 74 device_type = "soc";
74 ranges = <0 ff000000 00004000>; 75 ranges = <0x0 0xff000000 0x4000>;
75 bus-frequency = <0>; 76 bus-frequency = <0>;
76 77
77 // Temporary -- will go away once kernel uses ranges for get_immrbase(). 78 // Temporary -- will go away once kernel uses ranges for get_immrbase().
78 reg = <ff000000 4000>; 79 reg = <0xff000000 0x4000>;
79 80
80 mdio@e00 { 81 mdio@e00 {
81 compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; 82 compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
82 reg = <e00 188>; 83 reg = <0xe00 0x188>;
83 #address-cells = <1>; 84 #address-cells = <1>;
84 #size-cells = <0>; 85 #size-cells = <0>;
85 86
86 PHY0: ethernet-phy@0 { 87 PHY0: ethernet-phy@0 {
87 reg = <0>; 88 reg = <0x0>;
88 device_type = "ethernet-phy"; 89 device_type = "ethernet-phy";
89 }; 90 };
90 91
91 PHY1: ethernet-phy@1 { 92 PHY1: ethernet-phy@1 {
92 reg = <1>; 93 reg = <0x1>;
93 device_type = "ethernet-phy"; 94 device_type = "ethernet-phy";
94 }; 95 };
95 96
96 PHY2: ethernet-phy@2 { 97 PHY2: ethernet-phy@2 {
97 reg = <2>; 98 reg = <0x2>;
98 device_type = "ethernet-phy"; 99 device_type = "ethernet-phy";
99 }; 100 };
100 }; 101 };
@@ -103,7 +104,7 @@
103 device_type = "network"; 104 device_type = "network";
104 compatible = "fsl,mpc885-fec-enet", 105 compatible = "fsl,mpc885-fec-enet",
105 "fsl,pq1-fec-enet"; 106 "fsl,pq1-fec-enet";
106 reg = <e00 188>; 107 reg = <0xe00 0x188>;
107 local-mac-address = [ 00 00 00 00 00 00 ]; 108 local-mac-address = [ 00 00 00 00 00 00 ];
108 interrupts = <3 1>; 109 interrupts = <3 1>;
109 interrupt-parent = <&PIC>; 110 interrupt-parent = <&PIC>;
@@ -115,7 +116,7 @@
115 device_type = "network"; 116 device_type = "network";
116 compatible = "fsl,mpc885-fec-enet", 117 compatible = "fsl,mpc885-fec-enet",
117 "fsl,pq1-fec-enet"; 118 "fsl,pq1-fec-enet";
118 reg = <1e00 188>; 119 reg = <0x1e00 0x188>;
119 local-mac-address = [ 00 00 00 00 00 00 ]; 120 local-mac-address = [ 00 00 00 00 00 00 ];
120 interrupts = <7 1>; 121 interrupts = <7 1>;
121 interrupt-parent = <&PIC>; 122 interrupt-parent = <&PIC>;
@@ -126,7 +127,7 @@
126 PIC: interrupt-controller@0 { 127 PIC: interrupt-controller@0 {
127 interrupt-controller; 128 interrupt-controller;
128 #interrupt-cells = <2>; 129 #interrupt-cells = <2>;
129 reg = <0 24>; 130 reg = <0x0 0x24>;
130 compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; 131 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
131 }; 132 };
132 133
@@ -136,29 +137,29 @@
136 #size-cells = <2>; 137 #size-cells = <2>;
137 compatible = "fsl,pq-pcmcia"; 138 compatible = "fsl,pq-pcmcia";
138 device_type = "pcmcia"; 139 device_type = "pcmcia";
139 reg = <80 80>; 140 reg = <0x80 0x80>;
140 interrupt-parent = <&PIC>; 141 interrupt-parent = <&PIC>;
141 interrupts = <d 1>; 142 interrupts = <13 1>;
142 }; 143 };
143 144
144 cpm@9c0 { 145 cpm@9c0 {
145 #address-cells = <1>; 146 #address-cells = <1>;
146 #size-cells = <1>; 147 #size-cells = <1>;
147 compatible = "fsl,mpc885-cpm", "fsl,cpm1"; 148 compatible = "fsl,mpc885-cpm", "fsl,cpm1";
148 command-proc = <9c0>; 149 command-proc = <0x9c0>;
149 interrupts = <0>; // cpm error interrupt 150 interrupts = <0>; // cpm error interrupt
150 interrupt-parent = <&CPM_PIC>; 151 interrupt-parent = <&CPM_PIC>;
151 reg = <9c0 40>; 152 reg = <0x9c0 0x40>;
152 ranges; 153 ranges;
153 154
154 muram@2000 { 155 muram@2000 {
155 #address-cells = <1>; 156 #address-cells = <1>;
156 #size-cells = <1>; 157 #size-cells = <1>;
157 ranges = <0 2000 2000>; 158 ranges = <0x0 0x2000 0x2000>;
158 159
159 data@0 { 160 data@0 {
160 compatible = "fsl,cpm-muram-data"; 161 compatible = "fsl,cpm-muram-data";
161 reg = <0 1c00>; 162 reg = <0x0 0x1c00>;
162 }; 163 };
163 }; 164 };
164 165
@@ -167,7 +168,7 @@
167 "fsl,cpm1-brg", 168 "fsl,cpm1-brg",
168 "fsl,cpm-brg"; 169 "fsl,cpm-brg";
169 clock-frequency = <0>; 170 clock-frequency = <0>;
170 reg = <9f0 10>; 171 reg = <0x9f0 0x10>;
171 }; 172 };
172 173
173 CPM_PIC: interrupt-controller@930 { 174 CPM_PIC: interrupt-controller@930 {
@@ -175,7 +176,7 @@
175 #interrupt-cells = <1>; 176 #interrupt-cells = <1>;
176 interrupts = <5 2 0 2>; 177 interrupts = <5 2 0 2>;
177 interrupt-parent = <&PIC>; 178 interrupt-parent = <&PIC>;
178 reg = <930 20>; 179 reg = <0x930 0x20>;
179 compatible = "fsl,mpc885-cpm-pic", 180 compatible = "fsl,mpc885-cpm-pic",
180 "fsl,cpm1-pic"; 181 "fsl,cpm1-pic";
181 }; 182 };
@@ -184,34 +185,34 @@
184 device_type = "serial"; 185 device_type = "serial";
185 compatible = "fsl,mpc885-smc-uart", 186 compatible = "fsl,mpc885-smc-uart",
186 "fsl,cpm1-smc-uart"; 187 "fsl,cpm1-smc-uart";
187 reg = <a80 10 3e80 40>; 188 reg = <0xa80 0x10 0x3e80 0x40>;
188 interrupts = <4>; 189 interrupts = <4>;
189 interrupt-parent = <&CPM_PIC>; 190 interrupt-parent = <&CPM_PIC>;
190 fsl,cpm-brg = <1>; 191 fsl,cpm-brg = <1>;
191 fsl,cpm-command = <0090>; 192 fsl,cpm-command = <0x90>;
192 }; 193 };
193 194
194 serial@a90 { 195 serial@a90 {
195 device_type = "serial"; 196 device_type = "serial";
196 compatible = "fsl,mpc885-smc-uart", 197 compatible = "fsl,mpc885-smc-uart",
197 "fsl,cpm1-smc-uart"; 198 "fsl,cpm1-smc-uart";
198 reg = <a90 10 3f80 40>; 199 reg = <0xa90 0x10 0x3f80 0x40>;
199 interrupts = <3>; 200 interrupts = <3>;
200 interrupt-parent = <&CPM_PIC>; 201 interrupt-parent = <&CPM_PIC>;
201 fsl,cpm-brg = <2>; 202 fsl,cpm-brg = <2>;
202 fsl,cpm-command = <00d0>; 203 fsl,cpm-command = <0xd0>;
203 }; 204 };
204 205
205 ethernet@a40 { 206 ethernet@a40 {
206 device_type = "network"; 207 device_type = "network";
207 compatible = "fsl,mpc885-scc-enet", 208 compatible = "fsl,mpc885-scc-enet",
208 "fsl,cpm1-scc-enet"; 209 "fsl,cpm1-scc-enet";
209 reg = <a40 18 3e00 100>; 210 reg = <0xa40 0x18 0x3e00 0x100>;
210 local-mac-address = [ 00 00 00 00 00 00 ]; 211 local-mac-address = [ 00 00 00 00 00 00 ];
211 interrupts = <1c>; 212 interrupts = <28>;
212 interrupt-parent = <&CPM_PIC>; 213 interrupt-parent = <&CPM_PIC>;
213 phy-handle = <&PHY2>; 214 phy-handle = <&PHY2>;
214 fsl,cpm-command = <0080>; 215 fsl,cpm-command = <0x80>;
215 linux,network-index = <2>; 216 linux,network-index = <2>;
216 }; 217 };
217 }; 218 };
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index 2d564921897a..b2d61091b36d 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. 2 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor Inc. 4 * Copyright 2007,2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,6 +9,8 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "pq2fads"; 15 model = "pq2fads";
14 compatible = "fsl,pq2fads"; 16 compatible = "fsl,pq2fads";
@@ -21,11 +23,11 @@
21 23
22 cpu@0 { 24 cpu@0 {
23 device_type = "cpu"; 25 device_type = "cpu";
24 reg = <0>; 26 reg = <0x0>;
25 d-cache-line-size = <d#32>; 27 d-cache-line-size = <32>;
26 i-cache-line-size = <d#32>; 28 i-cache-line-size = <32>;
27 d-cache-size = <d#16384>; 29 d-cache-size = <16384>;
28 i-cache-size = <d#16384>; 30 i-cache-size = <16384>;
29 timebase-frequency = <0>; 31 timebase-frequency = <0>;
30 clock-frequency = <0>; 32 clock-frequency = <0>;
31 }; 33 };
@@ -33,7 +35,7 @@
33 35
34 memory { 36 memory {
35 device_type = "memory"; 37 device_type = "memory";
36 reg = <0 0>; 38 reg = <0x0 0x0>;
37 }; 39 };
38 40
39 localbus@f0010100 { 41 localbus@f0010100 {
@@ -41,67 +43,67 @@
41 "fsl,pq2-localbus"; 43 "fsl,pq2-localbus";
42 #address-cells = <2>; 44 #address-cells = <2>;
43 #size-cells = <1>; 45 #size-cells = <1>;
44 reg = <f0010100 60>; 46 reg = <0xf0010100 0x60>;
45 47
46 ranges = <0 0 fe000000 00800000 48 ranges = <0x0 0x0 0xfe000000 0x800000
47 1 0 f4500000 00008000 49 0x1 0x0 0xf4500000 0x8000
48 8 0 f8200000 00008000>; 50 0x8 0x0 0xf8200000 0x8000>;
49 51
50 flash@0,0 { 52 flash@0,0 {
51 compatible = "jedec-flash"; 53 compatible = "jedec-flash";
52 reg = <0 0 800000>; 54 reg = <0x0 0x0 0x800000>;
53 bank-width = <4>; 55 bank-width = <4>;
54 device-width = <1>; 56 device-width = <1>;
55 }; 57 };
56 58
57 bcsr@1,0 { 59 bcsr@1,0 {
58 reg = <1 0 20>; 60 reg = <0x1 0x0 0x20>;
59 compatible = "fsl,pq2fads-bcsr"; 61 compatible = "fsl,pq2fads-bcsr";
60 }; 62 };
61 63
62 PCI_PIC: pic@8,0 { 64 PCI_PIC: pic@8,0 {
63 #interrupt-cells = <1>; 65 #interrupt-cells = <1>;
64 interrupt-controller; 66 interrupt-controller;
65 reg = <8 0 8>; 67 reg = <0x8 0x0 0x8>;
66 compatible = "fsl,pq2ads-pci-pic"; 68 compatible = "fsl,pq2ads-pci-pic";
67 interrupt-parent = <&PIC>; 69 interrupt-parent = <&PIC>;
68 interrupts = <18 8>; 70 interrupts = <24 8>;
69 }; 71 };
70 }; 72 };
71 73
72 pci@f0010800 { 74 pci@f0010800 {
73 device_type = "pci"; 75 device_type = "pci";
74 reg = <f0010800 10c f00101ac 8 f00101c4 8>; 76 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
75 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; 77 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
76 #interrupt-cells = <1>; 78 #interrupt-cells = <1>;
77 #size-cells = <2>; 79 #size-cells = <2>;
78 #address-cells = <3>; 80 #address-cells = <3>;
79 clock-frequency = <d#66000000>; 81 clock-frequency = <66000000>;
80 interrupt-map-mask = <f800 0 0 7>; 82 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
81 interrupt-map = < 83 interrupt-map = <
82 /* IDSEL 0x16 */ 84 /* IDSEL 0x16 */
83 b000 0 0 1 &PCI_PIC 0 85 0xb000 0x0 0x0 0x1 &PCI_PIC 0
84 b000 0 0 2 &PCI_PIC 1 86 0xb000 0x0 0x0 0x2 &PCI_PIC 1
85 b000 0 0 3 &PCI_PIC 2 87 0xb000 0x0 0x0 0x3 &PCI_PIC 2
86 b000 0 0 4 &PCI_PIC 3 88 0xb000 0x0 0x0 0x4 &PCI_PIC 3
87 89
88 /* IDSEL 0x17 */ 90 /* IDSEL 0x17 */
89 b800 0 0 1 &PCI_PIC 4 91 0xb800 0x0 0x0 0x1 &PCI_PIC 4
90 b800 0 0 2 &PCI_PIC 5 92 0xb800 0x0 0x0 0x2 &PCI_PIC 5
91 b800 0 0 3 &PCI_PIC 6 93 0xb800 0x0 0x0 0x3 &PCI_PIC 6
92 b800 0 0 4 &PCI_PIC 7 94 0xb800 0x0 0x0 0x4 &PCI_PIC 7
93 95
94 /* IDSEL 0x18 */ 96 /* IDSEL 0x18 */
95 c000 0 0 1 &PCI_PIC 8 97 0xc000 0x0 0x0 0x1 &PCI_PIC 8
96 c000 0 0 2 &PCI_PIC 9 98 0xc000 0x0 0x0 0x2 &PCI_PIC 9
97 c000 0 0 3 &PCI_PIC a 99 0xc000 0x0 0x0 0x3 &PCI_PIC 10
98 c000 0 0 4 &PCI_PIC b>; 100 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
99 101
100 interrupt-parent = <&PIC>; 102 interrupt-parent = <&PIC>;
101 interrupts = <12 8>; 103 interrupts = <18 8>;
102 ranges = <42000000 0 80000000 80000000 0 20000000 104 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
103 02000000 0 a0000000 a0000000 0 20000000 105 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
104 01000000 0 00000000 f6000000 0 02000000>; 106 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
105 }; 107 };
106 108
107 soc@f0000000 { 109 soc@f0000000 {
@@ -109,27 +111,27 @@
109 #size-cells = <1>; 111 #size-cells = <1>;
110 device_type = "soc"; 112 device_type = "soc";
111 compatible = "fsl,mpc8280", "fsl,pq2-soc"; 113 compatible = "fsl,mpc8280", "fsl,pq2-soc";
112 ranges = <00000000 f0000000 00053000>; 114 ranges = <0x0 0xf0000000 0x53000>;
113 115
114 // Temporary -- will go away once kernel uses ranges for get_immrbase(). 116 // Temporary -- will go away once kernel uses ranges for get_immrbase().
115 reg = <f0000000 00053000>; 117 reg = <0xf0000000 0x53000>;
116 118
117 cpm@119c0 { 119 cpm@119c0 {
118 #address-cells = <1>; 120 #address-cells = <1>;
119 #size-cells = <1>; 121 #size-cells = <1>;
120 #interrupt-cells = <2>; 122 #interrupt-cells = <2>;
121 compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; 123 compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
122 reg = <119c0 30>; 124 reg = <0x119c0 0x30>;
123 ranges; 125 ranges;
124 126
125 muram@0 { 127 muram@0 {
126 #address-cells = <1>; 128 #address-cells = <1>;
127 #size-cells = <1>; 129 #size-cells = <1>;
128 ranges = <0 0 10000>; 130 ranges = <0x0 0x0 0x10000>;
129 131
130 data@0 { 132 data@0 {
131 compatible = "fsl,cpm-muram-data"; 133 compatible = "fsl,cpm-muram-data";
132 reg = <0 2000 9800 800>; 134 reg = <0x0 0x2000 0x9800 0x800>;
133 }; 135 };
134 }; 136 };
135 137
@@ -137,53 +139,53 @@
137 compatible = "fsl,mpc8280-brg", 139 compatible = "fsl,mpc8280-brg",
138 "fsl,cpm2-brg", 140 "fsl,cpm2-brg",
139 "fsl,cpm-brg"; 141 "fsl,cpm-brg";
140 reg = <119f0 10 115f0 10>; 142 reg = <0x119f0 0x10 0x115f0 0x10>;
141 }; 143 };
142 144
143 serial@11a00 { 145 serial@11a00 {
144 device_type = "serial"; 146 device_type = "serial";
145 compatible = "fsl,mpc8280-scc-uart", 147 compatible = "fsl,mpc8280-scc-uart",
146 "fsl,cpm2-scc-uart"; 148 "fsl,cpm2-scc-uart";
147 reg = <11a00 20 8000 100>; 149 reg = <0x11a00 0x20 0x8000 0x100>;
148 interrupts = <28 8>; 150 interrupts = <40 8>;
149 interrupt-parent = <&PIC>; 151 interrupt-parent = <&PIC>;
150 fsl,cpm-brg = <1>; 152 fsl,cpm-brg = <1>;
151 fsl,cpm-command = <00800000>; 153 fsl,cpm-command = <0x800000>;
152 }; 154 };
153 155
154 serial@11a20 { 156 serial@11a20 {
155 device_type = "serial"; 157 device_type = "serial";
156 compatible = "fsl,mpc8280-scc-uart", 158 compatible = "fsl,mpc8280-scc-uart",
157 "fsl,cpm2-scc-uart"; 159 "fsl,cpm2-scc-uart";
158 reg = <11a20 20 8100 100>; 160 reg = <0x11a20 0x20 0x8100 0x100>;
159 interrupts = <29 8>; 161 interrupts = <41 8>;
160 interrupt-parent = <&PIC>; 162 interrupt-parent = <&PIC>;
161 fsl,cpm-brg = <2>; 163 fsl,cpm-brg = <2>;
162 fsl,cpm-command = <04a00000>; 164 fsl,cpm-command = <0x4a00000>;
163 }; 165 };
164 166
165 ethernet@11320 { 167 ethernet@11320 {
166 device_type = "network"; 168 device_type = "network";
167 compatible = "fsl,mpc8280-fcc-enet", 169 compatible = "fsl,mpc8280-fcc-enet",
168 "fsl,cpm2-fcc-enet"; 170 "fsl,cpm2-fcc-enet";
169 reg = <11320 20 8500 100 113b0 1>; 171 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
170 interrupts = <21 8>; 172 interrupts = <33 8>;
171 interrupt-parent = <&PIC>; 173 interrupt-parent = <&PIC>;
172 phy-handle = <&PHY0>; 174 phy-handle = <&PHY0>;
173 linux,network-index = <0>; 175 linux,network-index = <0>;
174 fsl,cpm-command = <16200300>; 176 fsl,cpm-command = <0x16200300>;
175 }; 177 };
176 178
177 ethernet@11340 { 179 ethernet@11340 {
178 device_type = "network"; 180 device_type = "network";
179 compatible = "fsl,mpc8280-fcc-enet", 181 compatible = "fsl,mpc8280-fcc-enet",
180 "fsl,cpm2-fcc-enet"; 182 "fsl,cpm2-fcc-enet";
181 reg = <11340 20 8600 100 113d0 1>; 183 reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
182 interrupts = <22 8>; 184 interrupts = <34 8>;
183 interrupt-parent = <&PIC>; 185 interrupt-parent = <&PIC>;
184 phy-handle = <&PHY1>; 186 phy-handle = <&PHY1>;
185 linux,network-index = <1>; 187 linux,network-index = <1>;
186 fsl,cpm-command = <1a400300>; 188 fsl,cpm-command = <0x1a400300>;
187 local-mac-address = [00 e0 0c 00 79 01]; 189 local-mac-address = [00 e0 0c 00 79 01];
188 }; 190 };
189 191
@@ -194,21 +196,21 @@
194 "fsl,cpm2-mdio-bitbang"; 196 "fsl,cpm2-mdio-bitbang";
195 #address-cells = <1>; 197 #address-cells = <1>;
196 #size-cells = <0>; 198 #size-cells = <0>;
197 reg = <10d40 14>; 199 reg = <0x10d40 0x14>;
198 fsl,mdio-pin = <9>; 200 fsl,mdio-pin = <9>;
199 fsl,mdc-pin = <a>; 201 fsl,mdc-pin = <10>;
200 202
201 PHY0: ethernet-phy@0 { 203 PHY0: ethernet-phy@0 {
202 interrupt-parent = <&PIC>; 204 interrupt-parent = <&PIC>;
203 interrupts = <19 2>; 205 interrupts = <25 2>;
204 reg = <0>; 206 reg = <0x0>;
205 device_type = "ethernet-phy"; 207 device_type = "ethernet-phy";
206 }; 208 };
207 209
208 PHY1: ethernet-phy@1 { 210 PHY1: ethernet-phy@1 {
209 interrupt-parent = <&PIC>; 211 interrupt-parent = <&PIC>;
210 interrupts = <19 2>; 212 interrupts = <25 2>;
211 reg = <3>; 213 reg = <0x3>;
212 device_type = "ethernet-phy"; 214 device_type = "ethernet-phy";
213 }; 215 };
214 }; 216 };
@@ -218,17 +220,17 @@
218 #size-cells = <0>; 220 #size-cells = <0>;
219 compatible = "fsl,mpc8280-usb", 221 compatible = "fsl,mpc8280-usb",
220 "fsl,cpm2-usb"; 222 "fsl,cpm2-usb";
221 reg = <11b60 18 8b00 100>; 223 reg = <0x11b60 0x18 0x8b00 0x100>;
222 interrupt-parent = <&PIC>; 224 interrupt-parent = <&PIC>;
223 interrupts = <b 8>; 225 interrupts = <11 8>;
224 fsl,cpm-command = <2e600000>; 226 fsl,cpm-command = <0x2e600000>;
225 }; 227 };
226 }; 228 };
227 229
228 PIC: interrupt-controller@10c00 { 230 PIC: interrupt-controller@10c00 {
229 #interrupt-cells = <2>; 231 #interrupt-cells = <2>;
230 interrupt-controller; 232 interrupt-controller;
231 reg = <10c00 80>; 233 reg = <0x10c00 0x80>;
232 compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; 234 compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
233 }; 235 };
234 236
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-10 10:31:58 -0400