diff options
author | Eric Miao <ycmiao@ycmiao-hp520.(none)> | 2008-12-18 09:36:26 -0500 |
---|---|---|
committer | Eric Miao <eric.miao@marvell.com> | 2008-12-29 04:59:17 -0500 |
commit | 878f5783199a95cfa91db45a6e34d2f72756fa18 (patch) | |
tree | c979a4d4fdadf270baff1471f44ac91fe5c5e6af /arch | |
parent | a0427509a76c61984fbba4e206b617c689f419ef (diff) |
[ARM] pxafb: cleanup of the color format manipulation code
1. introduce var_to_depth() to calculate the color depth including the
transparency bit
2. the conversion from 'fb_var_screeninfo' to LCCR3 BPP bits can be re-
used by overlays (in OVLxC1), thus an individual pxafb_var_to_bpp()
has been separated out.
3. pxafb_setmode() should really set the color bitfields correctly at
begining, introduce a pxafb_set_pixfmt() for this
4. allow user apps to specify color formats within fb_var_screeninfo,
and checking of this in pxafb_check_var() has been simplified as
below:
a) pxafb_var_to_bpp() should pass - which means a basically correct
bits_per_pixel and color depth setting
b) the RGBT bitfields are then forced into supported values by
pxafb_set_pixfmt()
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-lcd.h | 15 |
1 files changed, 1 insertions, 14 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-lcd.h b/arch/arm/mach-pxa/include/mach/regs-lcd.h index 5c522263e401..aff3b876a7bf 100644 --- a/arch/arm/mach-pxa/include/mach/regs-lcd.h +++ b/arch/arm/mach-pxa/include/mach/regs-lcd.h | |||
@@ -28,17 +28,7 @@ | |||
28 | #define CMDCR (0x100) /* Command Control Register */ | 28 | #define CMDCR (0x100) /* Command Control Register */ |
29 | #define PRSR (0x104) /* Panel Read Status Register */ | 29 | #define PRSR (0x104) /* Panel Read Status Register */ |
30 | 30 | ||
31 | #define LCCR3_1BPP (0 << 24) | 31 | #define LCCR3_BPP(x) ((((x) & 0x7) << 24) | (((x) & 0x8) ? (1 << 29) : 0)) |
32 | #define LCCR3_2BPP (1 << 24) | ||
33 | #define LCCR3_4BPP (2 << 24) | ||
34 | #define LCCR3_8BPP (3 << 24) | ||
35 | #define LCCR3_16BPP (4 << 24) | ||
36 | #define LCCR3_18BPP (5 << 24) | ||
37 | #define LCCR3_18BPP_P (6 << 24) | ||
38 | #define LCCR3_19BPP (7 << 24) | ||
39 | #define LCCR3_19BPP_P (1 << 29) | ||
40 | #define LCCR3_24BPP ((1 << 29) | (1 << 24)) | ||
41 | #define LCCR3_25BPP ((1 << 29) | (2 << 24)) | ||
42 | 32 | ||
43 | #define LCCR3_PDFOR_0 (0 << 30) | 33 | #define LCCR3_PDFOR_0 (0 << 30) |
44 | #define LCCR3_PDFOR_1 (1 << 30) | 34 | #define LCCR3_PDFOR_1 (1 << 30) |
@@ -133,9 +123,6 @@ | |||
133 | #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ | 123 | #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ |
134 | #define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD))) | 124 | #define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD))) |
135 | 125 | ||
136 | #define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */ | ||
137 | #define LCCR3_Bpp(Bpp) (((Bpp) << FShft (LCCR3_BPP))) | ||
138 | |||
139 | #define LCCR3_ACB Fld (8, 8) /* AC Bias */ | 126 | #define LCCR3_ACB Fld (8, 8) /* AC Bias */ |
140 | #define LCCR3_Acb(Acb) (((Acb) << FShft (LCCR3_ACB))) | 127 | #define LCCR3_Acb(Acb) (((Acb) << FShft (LCCR3_ACB))) |
141 | 128 | ||