Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Set io_map_base for several PCI bridges lacking it
  MIPS: Alchemy: Define eth platform devices in the correct order
  MIPS: BCM63xx: Prevent second enet registration on BCM6338
  MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations.
  MIPS: N32: Define getdents64.
  MIPS: MTX-1: Fix PCI on the MeshCube and related boards
  MIPS: Make init_vdso a subsys_initcall.
  MIPS: "Fix" useless 'init_vdso successfully' message.
  MIPS: PowerTV: Move register setup to before reading registers.
  SOUND: Au1000: Fix section mismatch
  VIDEO: Au1100fb: Fix section mismatch
  VIDEO: PMAGB-B: Fix section mismatch
  VIDEO: PMAG-BA: Fix section mismatch
  NET: declance: Fix section mismatches
  VIDEO. gbefb: Fix section mismatches.

13 files changed, 37 insertions, 29 deletions

diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 2580e77624d2..f9e5622ebc95 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -435,20 +435,21 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
 static int __init au1xxx_platform_init(void)
 {
         unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
-        int i;
+        int err, i;
 
         /* Fill up uartclk. */
         for (i = 0; au1x00_uart_data[i].flags; i++)
                 au1x00_uart_data[i].uartclk = uartclk;
 
+        err = platform_add_devices(au1xxx_platform_devices,
+                                   ARRAY_SIZE(au1xxx_platform_devices));
 #ifndef CONFIG_SOC_AU1100
         /* Register second MAC if enabled in pinfunc */
-        if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
+        if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
                 platform_device_register(&au1xxx_eth1_device);
 #endif
 
-        return platform_add_devices(au1xxx_platform_devices,
-                                    ARRAY_SIZE(au1xxx_platform_devices));
+        return err;
 }
 
 arch_initcall(au1xxx_platform_init);
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index a9f0336e1f1f..52d883d37dd7 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -67,8 +67,6 @@ static void mtx1_power_off(void)
 
 void __init board_setup(void)
 {
-        alchemy_gpio2_enable();
-
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
         /* Enable USB power switch */
         alchemy_gpio_direction_output(204, 0);
@@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
 
         if (assert && devsel != 0)
                 /* Suppress signal to Cardbus */
-                gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
+                alchemy_gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
         else
-                gpio_set_value(1, 1);   /* set EXT_IO3 ON */
+                alchemy_gpio_set_value(1, 1);   /* set EXT_IO3 ON */
 
-        au_sync_udelay(1);
+        udelay(1);
         return 1;
 }
 
diff --git a/arch/mips/bcm63xx/dev-enet.c b/arch/mips/bcm63xx/dev-enet.c
index 9f544badd0b4..39c23366c5c7 100644
--- a/arch/mips/bcm63xx/dev-enet.c
+++ b/arch/mips/bcm63xx/dev-enet.c
@@ -104,6 +104,9 @@ int __init bcm63xx_enet_register(int unit,
         if (unit > 1)
                 return -ENODEV;
 
+        if (unit == 1 && BCMCPU_IS_6338())
+                return -ENODEV;
+
         if (!shared_device_registered) {
                 shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
                 shared_res[0].end = shared_res[0].start;
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 59dc0c7ef733..c63c56bfd184 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -434,7 +434,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_add          \n"
-                "       addu    %0, %2                                  \n"
+                "       daddu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqzl   %0, 1b                                  \n"
                 "       .set    mips0                                   \n"
@@ -446,7 +446,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_add          \n"
-                "       addu    %0, %2                                  \n"
+                "       daddu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqz    %0, 2f                                  \n"
                 "       .subsection 2                                   \n"
@@ -479,7 +479,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_sub          \n"
-                "       subu    %0, %2                                  \n"
+                "       dsubu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqzl   %0, 1b                                  \n"
                 "       .set    mips0                                   \n"
@@ -491,7 +491,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_sub          \n"
-                "       subu    %0, %2                                  \n"
+                "       dsubu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqz    %0, 2f                                  \n"
                 "       .subsection 2                                   \n"
@@ -524,10 +524,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_add_return   \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqzl   %0, 1b                                  \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       .set    mips0                                   \n"
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
@@ -538,10 +538,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_add_return   \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqz    %0, 2f                                  \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       .subsection 2                                   \n"
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
@@ -576,10 +576,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_sub_return   \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqzl   %0, 1b                                  \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       .set    mips0                                   \n"
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
@@ -590,10 +590,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_sub_return   \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqz    %0, 2f                                  \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       .subsection 2                                   \n"
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 1b5a6648eb86..baa318a59c97 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -984,16 +984,17 @@
 #define __NR_perf_event_open            (__NR_Linux + 296)
 #define __NR_accept4                    (__NR_Linux + 297)
 #define __NR_recvmmsg                   (__NR_Linux + 298)
+#define __NR_getdents64                 (__NR_Linux + 299)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls             298
+#define __NR_Linux_syscalls             299
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         298
+#define __NR_N32_Linux_syscalls         299
 
 #ifdef __KERNEL__
 
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index a5297e2a353a..a4faceea9d88 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -419,4 +419,5 @@ EXPORT(sysn32_call_table)
         PTR     sys_perf_event_open
         PTR     sys_accept4
         PTR     compat_sys_recvmmsg
+        PTR     sys_getdents
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c
index b773c1112b14..e5cdfd603f8f 100644
--- a/arch/mips/kernel/vdso.c
+++ b/arch/mips/kernel/vdso.c
@@ -61,11 +61,9 @@ static int __init init_vdso(void)
 
         vunmap(vdso);
 
-        pr_notice("init_vdso successfull\n");
-
         return 0;
 }
-device_initcall(init_vdso);
+subsys_initcall(init_vdso);
 
 static unsigned long vdso_addr(unsigned long start)
 {
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index 2fbfa1a8c3a9..bf80921f2f56 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -247,6 +247,8 @@ void __init mips_pcibios_init(void)
         iomem_resource.end &= 0xfffffffffULL;                   /* 64 GB */
         ioport_resource.end = controller->io_resource->end;
 
+        controller->io_map_base = mips_io_port_base;
+
         register_pci_controller(controller);
 }
 
diff --git a/arch/mips/nxp/pnx8550/common/pci.c b/arch/mips/nxp/pnx8550/common/pci.c
index eee4f3dfc410..98e86ddb86cc 100644
--- a/arch/mips/nxp/pnx8550/common/pci.c
+++ b/arch/mips/nxp/pnx8550/common/pci.c
@@ -44,6 +44,7 @@ extern struct pci_ops pnx8550_pci_ops;
 
 static struct pci_controller pnx8550_controller = {
         .pci_ops        = &pnx8550_pci_ops,
+        .io_map_base    = PNX8550_PORT_BASE,
         .io_resource    = &pci_io_resource,
         .mem_resource   = &pci_mem_resource,
 };
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
index 2aed50fef10f..64246c9c875c 100644
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ b/arch/mips/nxp/pnx8550/common/setup.c
@@ -113,7 +113,7 @@ void __init plat_mem_setup(void)
         PNX8550_GLB2_ENAB_INTA_O = 0;
 
         /* IO/MEM resources. */
-        set_io_port_base(KSEG1);
+        set_io_port_base(PNX8550_PORT_BASE);
         ioport_resource.start = 0;
         ioport_resource.end = ~0;
         iomem_resource.start = 0;
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index 04b31478a6d7..b7c03d80c88c 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -944,6 +944,7 @@ static struct pci_controller msp_pci_controller = {
         .pci_ops        = &msp_pci_ops,
         .mem_resource   = &pci_mem_resource,
         .mem_offset     = 0,
+        .io_map_base    = MSP_PCI_IOSPACE_BASE,
         .io_resource    = &pci_io_resource,
         .io_offset      = 0
 };
diff --git a/arch/mips/pci/pci-yosemite.c b/arch/mips/pci/pci-yosemite.c
index 0357946f30e6..cf5e1a25cb7d 100644
--- a/arch/mips/pci/pci-yosemite.c
+++ b/arch/mips/pci/pci-yosemite.c
@@ -54,6 +54,7 @@ static int __init pmc_yosemite_setup(void)
                 panic(ioremap_failed);
 
         set_io_port_base(io_v_base);
+        py_controller.io_map_base = io_v_base;
         TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
 
         ioport_resource.end = TITAN_IO_SIZE - 1;
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index 8ee77887306a..9ec523e4dd06 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -472,6 +472,9 @@ void __init configure_platform(void)
                  * it*/
                 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
 
+                /* Cronus and Cronus Lite have the same register map */
+                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
+
                 /* ASIC version will determine if this is a real CronusLite or
                  * Castrati(Cronus) */
                 chipversion  = asic_read(chipver3) << 24;
@@ -484,8 +487,6 @@ void __init configure_platform(void)
                 else
                         asic = ASIC_CRONUSLITE;
 
-                /* Cronus and Cronus Lite have the same register map */
-                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
                 gp_resources = non_dvr_cronuslite_resources;
                 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
                         "chipversion=0x%08X\n",