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authorWill Deacon <will.deacon@arm.com>2010-08-16 10:15:14 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-09-01 05:06:08 -0400
commit25d3584797a39f57b69cd835722ac7c41113fb9a (patch)
treeb86ba92c1c31b063248d545808725dc1a65d81ea /arch
parent2bfc96a127bc1cc94d26bfaa40159966064f9c8c (diff)
ARM: 6330/1: perf: reword comments relating to perf_event_do_pending
This is purely a cosmetic change to the ARM perf backend because the current comments about the relationship between NMIs, interrupt context and perf_event_do_pending are misleading. This patch updates the comments so that they reflect what the code actually does (which is in line with other architectures). Acked-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/perf_event.h2
-rw-r--r--arch/arm/kernel/perf_event.c8
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 48837e6d8887..b5799a3b7117 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -17,7 +17,7 @@
17 * counter interrupts are regular interrupts and not an NMI. This 17 * counter interrupts are regular interrupts and not an NMI. This
18 * means that when we receive the interrupt we can call 18 * means that when we receive the interrupt we can call
19 * perf_event_do_pending() that handles all of the work with 19 * perf_event_do_pending() that handles all of the work with
20 * interrupts enabled. 20 * interrupts disabled.
21 */ 21 */
22static inline void 22static inline void
23set_perf_event_pending(void) 23set_perf_event_pending(void)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 417c392ddf1c..e2139256524e 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -1041,8 +1041,8 @@ armv6pmu_handle_irq(int irq_num,
1041 /* 1041 /*
1042 * Handle the pending perf events. 1042 * Handle the pending perf events.
1043 * 1043 *
1044 * Note: this call *must* be run with interrupts enabled. For 1044 * Note: this call *must* be run with interrupts disabled. For
1045 * platforms that can have the PMU interrupts raised as a PMI, this 1045 * platforms that can have the PMU interrupts raised as an NMI, this
1046 * will not work. 1046 * will not work.
1047 */ 1047 */
1048 perf_event_do_pending(); 1048 perf_event_do_pending();
@@ -2017,8 +2017,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
2017 /* 2017 /*
2018 * Handle the pending perf events. 2018 * Handle the pending perf events.
2019 * 2019 *
2020 * Note: this call *must* be run with interrupts enabled. For 2020 * Note: this call *must* be run with interrupts disabled. For
2021 * platforms that can have the PMU interrupts raised as a PMI, this 2021 * platforms that can have the PMU interrupts raised as an NMI, this
2022 * will not work. 2022 * will not work.
2023 */ 2023 */
2024 perf_event_do_pending(); 2024 perf_event_do_pending();