aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorCatalin Marinas <catalin.marinas@arm.com>2009-05-30 09:00:16 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2009-05-30 09:00:16 -0400
commit213fb2a8ee81ec106b9b370a07ccad575e9d3748 (patch)
treeae439bbb35cfa5c96b8d658ea97359c761117e09 /arch
parentd71e1352e240dea32d481ad8d662e8de4406ac7e (diff)
ARMv7: Enable the SWP instruction
The SWP instruction has been deprecated starting with the ARMv6 architecture. On ARMv7 processors with the multiprocessor extensions (like Cortex-A9), this instruction is disabled by default but it can be enabled by setting bit 10 in the System Control register. Note that setting this bit is safe even if the ARMv7 processor has the SWP instruction enabled by default. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mm/proc-v7.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index a18aace32990..095b69f5a833 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -232,14 +232,14 @@ __v7_setup:
232ENDPROC(__v7_setup) 232ENDPROC(__v7_setup)
233 233
234 /* AT 234 /* AT
235 * TFR EV X F I D LR 235 * TFR EV X F I D LR S
236 * .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM 236 * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
237 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced 237 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
238 * 1 0 110 0011 1.00 .111 1101 < we want 238 * 1 0 110 0011 1100 .111 1101 < we want
239 */ 239 */
240 .type v7_crval, #object 240 .type v7_crval, #object
241v7_crval: 241v7_crval:
242 crval clear=0x0120c302, mmuset=0x10c0387d, ucset=0x00c0187c 242 crval clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
243 243
244__v7_setup_stack: 244__v7_setup_stack:
245 .space 4 * 11 @ 11 registers 245 .space 4 * 11 @ 11 registers