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authorStef van Os <stef.van.os@Prodrive.nl>2010-01-19 22:59:39 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-01-29 00:51:12 -0500
commitd234b3c36ff600b2a51cff74c9263cba5b2c24ee (patch)
tree25a725f904ece761e91caca402cc126b784f5596 /arch
parent94afc008e1e6fbadfac0b75fcf193b6d7074b2f1 (diff)
powerpc/4xx: Add pcix type 1 transactions
Some of the newer 4xx pci cores need an explicit bit set to send type 1 transactions instead of just comparing the bus numbers. This patch enables type 1 transations for pcix nodes, thus enabling devices behind PCI bridges. Signed-off-by: Stef van Os <stef.van.os@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 6ff9d71b4c0d..8aa33021e50b 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -569,7 +569,8 @@ static void __init ppc4xx_probe_pcix_bridge(struct device_node *np)
569 hose->last_busno = bus_range ? bus_range[1] : 0xff; 569 hose->last_busno = bus_range ? bus_range[1] : 0xff;
570 570
571 /* Setup config space */ 571 /* Setup config space */
572 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0); 572 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
573 PPC_INDIRECT_TYPE_SET_CFG_TYPE);
573 574
574 /* Disable all windows */ 575 /* Disable all windows */
575 writel(0, reg + PCIX0_POM0SA); 576 writel(0, reg + PCIX0_POM0SA);