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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-12-13 08:18:44 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-22 17:44:34 -0500
commit8437c25e78c3af2b31bf6c8942494e34e267f446 (patch)
tree8f23abf2764d5c565397e3b1b98355fc27ed1177 /arch
parentb460ddbbe29a45cc13e3f13314ec9aed7e9412f2 (diff)
ARM: omap: update clock source registration
In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new interfaces were added which simplify (and optimize) the selection of the divisor shift/mult constants. Switch over to using this new interface. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap1/time.c6
-rw-r--r--arch/arm/mach-omap2/timer-gp.c5
-rw-r--r--arch/arm/plat-omap/counter_32k.c6
3 files changed, 3 insertions, 14 deletions
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 1be6a214d88d..abb34ff2041b 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -208,7 +208,6 @@ static struct clocksource clocksource_mpu = {
208 .rating = 300, 208 .rating = 300,
209 .read = mpu_read, 209 .read = mpu_read,
210 .mask = CLOCKSOURCE_MASK(32), 210 .mask = CLOCKSOURCE_MASK(32),
211 .shift = 24,
212 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 211 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
213}; 212};
214 213
@@ -217,13 +216,10 @@ static void __init omap_init_clocksource(unsigned long rate)
217 static char err[] __initdata = KERN_ERR 216 static char err[] __initdata = KERN_ERR
218 "%s: can't register clocksource!\n"; 217 "%s: can't register clocksource!\n";
219 218
220 clocksource_mpu.mult
221 = clocksource_khz2mult(rate/1000, clocksource_mpu.shift);
222
223 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq); 219 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
224 omap_mpu_timer_start(1, ~0, 1); 220 omap_mpu_timer_start(1, ~0, 1);
225 221
226 if (clocksource_register(&clocksource_mpu)) 222 if (clocksource_register_hz(&clocksource_mpu, rate))
227 printk(err, clocksource_mpu.name); 223 printk(err, clocksource_mpu.name);
228} 224}
229 225
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index e13c29eecf2b..a7816dbdc6b1 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -195,7 +195,6 @@ static struct clocksource clocksource_gpt = {
195 .rating = 300, 195 .rating = 300,
196 .read = clocksource_read_cycles, 196 .read = clocksource_read_cycles,
197 .mask = CLOCKSOURCE_MASK(32), 197 .mask = CLOCKSOURCE_MASK(32),
198 .shift = 24,
199 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 198 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
200}; 199};
201 200
@@ -220,9 +219,7 @@ static void __init omap2_gp_clocksource_init(void)
220 219
221 omap_dm_timer_set_load_start(gpt, 1, 0); 220 omap_dm_timer_set_load_start(gpt, 1, 0);
222 221
223 clocksource_gpt.mult = 222 if (clocksource_register_hz(&clocksource_gpt, tick_rate))
224 clocksource_khz2mult(tick_rate/1000, clocksource_gpt.shift);
225 if (clocksource_register(&clocksource_gpt))
226 printk(err2, clocksource_gpt.name); 223 printk(err2, clocksource_gpt.name);
227} 224}
228#endif 225#endif
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 155fe43a672b..8f149f51cb46 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -102,7 +102,6 @@ static struct clocksource clocksource_32k = {
102 .rating = 250, 102 .rating = 250,
103 .read = omap_32k_read_dummy, 103 .read = omap_32k_read_dummy,
104 .mask = CLOCKSOURCE_MASK(32), 104 .mask = CLOCKSOURCE_MASK(32),
105 .shift = 10,
106 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 105 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
107}; 106};
108 107
@@ -167,12 +166,9 @@ static int __init omap_init_clocksource_32k(void)
167 if (sync_32k_ick) 166 if (sync_32k_ick)
168 clk_enable(sync_32k_ick); 167 clk_enable(sync_32k_ick);
169 168
170 clocksource_32k.mult = clocksource_hz2mult(32768,
171 clocksource_32k.shift);
172
173 offset_32k = clocksource_32k.read(&clocksource_32k); 169 offset_32k = clocksource_32k.read(&clocksource_32k);
174 170
175 if (clocksource_register(&clocksource_32k)) 171 if (clocksource_register_hz(&clocksource_32k, 32768))
176 printk(err, clocksource_32k.name); 172 printk(err, clocksource_32k.name);
177 } 173 }
178 return 0; 174 return 0;