arm: omap: gpio: implement set_debounce method

OMAP supports debouncing of gpio lines, implement the method using
gpiolib.

Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: David Brownell <david-b@pacbell.net>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 68 insertions, 0 deletions

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index dc2ac42d6319..1a65865fcfb6 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -624,6 +624,59 @@ do {	\
         __raw_writel(l, base + reg); \
 } while(0)
 
+/**
+ * _set_gpio_debounce - low level gpio debounce time
+ * @bank: the gpio bank we're acting upon
+ * @gpio: the gpio number on this @gpio
+ * @debounce: debounce time to use
+ *
+ * OMAP's debounce time is in 31us steps so we need
+ * to convert and round up to the closest unit.
+ */
+static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
+                unsigned debounce)
+{
+        void __iomem            *reg = bank->base;
+        u32                     val;
+        u32                     l;
+
+        if (debounce < 32)
+                debounce = 0x01;
+        else if (debounce > 7936)
+                debounce = 0xff;
+        else
+                debounce = (debounce / 0x1f) - 1;
+
+        l = 1 << get_gpio_index(gpio);
+
+        if (cpu_is_omap44xx())
+                reg += OMAP4_GPIO_DEBOUNCINGTIME;
+        else
+                reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
+
+        __raw_writel(debounce, reg);
+
+        reg = bank->base;
+        if (cpu_is_omap44xx())
+                reg += OMAP4_GPIO_DEBOUNCENABLE;
+        else
+                reg += OMAP24XX_GPIO_DEBOUNCE_EN;
+
+        val = __raw_readl(reg);
+
+        if (debounce) {
+                val |= l;
+                if (cpu_is_omap34xx() || cpu_is_omap44xx())
+                        clk_enable(bank->dbck);
+        } else {
+                val &= ~l;
+                if (cpu_is_omap34xx() || cpu_is_omap44xx())
+                        clk_disable(bank->dbck);
+        }
+
+        __raw_writel(val, reg);
+}
+
 void omap_set_gpio_debounce(int gpio, int enable)
 {
         struct gpio_bank *bank;
@@ -1656,6 +1709,20 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
         return 0;
 }
 
+static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
+                unsigned debounce)
+{
+        struct gpio_bank *bank;
+        unsigned long flags;
+
+        bank = container_of(chip, struct gpio_bank, chip);
+        spin_lock_irqsave(&bank->lock, flags);
+        _set_gpio_debounce(bank, offset, debounce);
+        spin_unlock_irqrestore(&bank->lock, flags);
+
+        return 0;
+}
+
 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 {
         struct gpio_bank *bank;
@@ -1909,6 +1976,7 @@ static int __init _omap_gpio_init(void)
                 bank->chip.direction_input = gpio_input;
                 bank->chip.get = gpio_get;
                 bank->chip.direction_output = gpio_output;
+                bank->chip.set_debounce = gpio_debounce;
                 bank->chip.set = gpio_set;
                 bank->chip.to_irq = gpio_2irq;
                 if (bank_is_mpuio(bank)) {