[PATCH] i386: cleanup serialize msr

i386 arch cleanup.  Introduce the serialize macro to serialize processor
state.  Why the microcode update needs it I am not quite sure, since wrmsr()
is already a serializing instruction, but it is a microcode update, so I will
keep the semantic the same, since this could be a timing workaround.  As far
as I can tell, this has always been there since the original microcode update
source.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 5 insertions, 2 deletions

diff --git a/arch/i386/kernel/microcode.c b/arch/i386/kernel/microcode.c
index a77c612aad00..165f13158c60 100644
--- a/arch/i386/kernel/microcode.c
+++ b/arch/i386/kernel/microcode.c
@@ -164,7 +164,8 @@ static void collect_cpu_info (void *unused)
         }
 
         wrmsr(MSR_IA32_UCODE_REV, 0, 0);
-        __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
+        /* see notes above for revision 1.07.  Apparent chip bug */
+        serialize_cpu();
         /* get the current revision from MSR 0x8B */
         rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
         pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
@@ -377,7 +378,9 @@ static void do_update_one (void * unused)
                 (unsigned long) uci->mc->bits >> 16 >> 16);
         wrmsr(MSR_IA32_UCODE_REV, 0, 0);
 
-        __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
+        /* see notes above for revision 1.07.  Apparent chip bug */
+        serialize_cpu();
+
         /* get the current revision from MSR 0x8B */
         rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);