diff options
author | Siddha, Suresh B <suresh.b.siddha@intel.com> | 2006-12-06 20:14:10 -0500 |
---|---|---|
committer | Andi Kleen <andi@basil.nowhere.org> | 2006-12-06 20:14:10 -0500 |
commit | 9899f826fc90beba4f78083f6230e06cbe1050c9 (patch) | |
tree | 5d493eaa17da85c57746ffcc2e01a8a6f484fa5f /arch | |
parent | 72486f1f8f0a2bc828b9d30cf4690cf2dd6807fc (diff) |
[PATCH] x86-64: add genapic_force
Add genapic_force. Used by the next Intel quirks patch.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Li, Shaohua" <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86_64/kernel/genapic.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/genapic.c b/arch/x86_64/kernel/genapic.c index 8e78a75d1866..b007433f96bb 100644 --- a/arch/x86_64/kernel/genapic.c +++ b/arch/x86_64/kernel/genapic.c | |||
@@ -33,7 +33,7 @@ extern struct genapic apic_flat; | |||
33 | extern struct genapic apic_physflat; | 33 | extern struct genapic apic_physflat; |
34 | 34 | ||
35 | struct genapic *genapic = &apic_flat; | 35 | struct genapic *genapic = &apic_flat; |
36 | 36 | struct genapic *genapic_force; | |
37 | 37 | ||
38 | /* | 38 | /* |
39 | * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. | 39 | * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. |
@@ -46,6 +46,13 @@ void __init clustered_apic_check(void) | |||
46 | u8 cluster_cnt[NUM_APIC_CLUSTERS]; | 46 | u8 cluster_cnt[NUM_APIC_CLUSTERS]; |
47 | int max_apic = 0; | 47 | int max_apic = 0; |
48 | 48 | ||
49 | /* genapic selection can be forced because of certain quirks. | ||
50 | */ | ||
51 | if (genapic_force) { | ||
52 | genapic = genapic_force; | ||
53 | goto print; | ||
54 | } | ||
55 | |||
49 | #if defined(CONFIG_ACPI) | 56 | #if defined(CONFIG_ACPI) |
50 | /* | 57 | /* |
51 | * Some x86_64 machines use physical APIC mode regardless of how many | 58 | * Some x86_64 machines use physical APIC mode regardless of how many |