i2c-omap: add mpu wake up latency constraint in i2c

While waiting for completion of the i2c transfer, the
MPU could hit OFF mode and cause several msecs of
delay that made i2c transfers fail more often. The
extra delays and subsequent re-trys cause i2c clocks
to be active more often. This has also an negative
effect on power consumption.

Created a mechanism for passing and using the
constraint setting function in driver code. The used
mpu wake up latency constraints are now set individually
per bus, and they are calculated based on clock rate
and fifo size.

Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley,
and Nishanth Menon for tuning out the details of
this patch.

Updates by Kevin as requested by Tony:

- Remove omap_set_i2c_constraint_func() in favor of conditionally
  adding the flag in omap_i2c_add_bus() in order to keep all the OMAP
  conditional checking in a single location.
- Update set_mpu_wkup_lat prototypes to match OMAP PM layer so
  OMAP PM function can be used directly in pdata.

Cc: Moiz Sonasath <m-sonasath@ti.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

1 files changed, 27 insertions, 12 deletions

diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 624e26298faa..f044b5927508 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,9 +26,12 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
+#include <linux/i2c-omap.h>
+
 #include <mach/irqs.h>
 #include <plat/mux.h>
 #include <plat/i2c.h>
+#include <plat/omap-pm.h>
 
 #define OMAP_I2C_SIZE           0x3f
 #define OMAP1_I2C_BASE          0xfffb3800
@@ -70,14 +73,14 @@ static struct resource i2c_resources[][2] = {
                 },                                      \
         }
 
-static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
+static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
 static struct platform_device omap_i2c_devices[] = {
-        I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
+        I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
 #if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-        I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
+        I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
 #endif
 #if     defined(CONFIG_ARCH_OMAP3)
-        I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
+        I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
 #endif
 };
 
@@ -100,10 +103,12 @@ static int __init omap_i2c_nr_ports(void)
 static int __init omap_i2c_add_bus(int bus_id)
 {
         struct platform_device *pdev;
+        struct omap_i2c_bus_platform_data *pd;
         struct resource *res;
         resource_size_t base, irq;
 
         pdev = &omap_i2c_devices[bus_id - 1];
+        pd = pdev->dev.platform_data;
         if (bus_id == 1) {
                 res = pdev->resource;
                 if (cpu_class_is_omap1()) {
@@ -123,6 +128,15 @@ static int __init omap_i2c_add_bus(int bus_id)
         if (cpu_class_is_omap2())
                 omap2_i2c_mux_pins(bus_id);
 
+        /*
+         * When waiting for completion of a i2c transfer, we need to
+         * set a wake up latency constraint for the MPU. This is to
+         * ensure quick enough wakeup from idle, when transfer
+         * completes.
+         */
+        if (cpu_is_omap34xx())
+                pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat;
+
         return platform_device_register(pdev);
 }
 
@@ -146,8 +160,8 @@ static int __init omap_i2c_bus_setup(char *str)
         get_options(str, 3, ints);
         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
                 return 0;
-        i2c_rate[ints[1] - 1] = ints[2];
-        i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+        i2c_pdata[ints[1] - 1].clkrate = ints[2];
+        i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
 
         return 1;
 }
@@ -161,9 +175,9 @@ static int __init omap_register_i2c_bus_cmdline(void)
 {
         int i, err = 0;
 
-        for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
-                if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
-                        i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+        for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
+                if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
+                        i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
                         err = omap_i2c_add_bus(i + 1);
                         if (err)
                                 goto out;
@@ -197,9 +211,10 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
                         return err;
         }
 
-        if (!i2c_rate[bus_id - 1])
-                i2c_rate[bus_id - 1] = clkrate;
-        i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+        if (!i2c_pdata[bus_id - 1].clkrate)
+                i2c_pdata[bus_id - 1].clkrate = clkrate;
+
+        i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 
         return omap_i2c_add_bus(bus_id);
 }