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authorJacob Pan <jacob.jun.pan@linux.intel.com>2010-05-14 17:41:14 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-05-17 01:45:36 -0400
commite4af4268a34d8cd28c46a03161fc017cbd2db887 (patch)
treecc07341098ee5e12b235da9af44b9d793ac01c06 /arch
parent2b107d93635616db0c3f893c8cc2e6d5cd8d77b2 (diff)
x86, mrst, pci: return 0 for non-present pci bars
Moorestown PCI code has special handling of devices with fixed BARs. In case of BAR sizing writes, we need to update the fake PCI MMCFG space with real size decode value. When a BAR is not present, we need to return 0 instead of ~0. ~0 will be treated as device error per bugzilla 12006. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1273873281-17489-2-git-send-email-jacob.jun.pan@linux.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/pci/mrst.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index 8bf2fcb88d04..d5c7aefe56ff 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -109,7 +109,7 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
109 decode++; 109 decode++;
110 decode = ~(decode - 1); 110 decode = ~(decode - 1);
111 } else { 111 } else {
112 decode = ~0; 112 decode = 0;
113 } 113 }
114 114
115 /* 115 /*