aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorSangbeom Kim <sbkim73@samsung.com>2011-03-11 18:02:12 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-03-11 18:02:12 -0500
commit20780fcc4091897797979985868b1572dc7d78d9 (patch)
tree4346ccd4b58a74e119e3a9bc4e24f9874ef39017 /arch
parentf8bfff8e4c3c3d447fe12e3c0e3a36f3bdd891b5 (diff)
ARM: S5P: Update machine of S5P64X0 and S5PV210 for HRT
This patch adds support HRT for machines of S5P64X0 and S5PV210. Basically, PWM Timer3 is used for clockevent and PWM Timer4 is used for clocksource. Since PWM Timer3 is used for other purpose, PWM Timer2 is used on SMDKV210. Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c4
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-torbreck.c4
7 files changed, 21 insertions, 7 deletions
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 366dca4ec794..2d559f10fd47 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -45,6 +45,7 @@
45#include <plat/pll.h> 45#include <plat/pll.h>
46#include <plat/adc.h> 46#include <plat/adc.h>
47#include <plat/ts.h> 47#include <plat/ts.h>
48#include <plat/s5p-time.h>
48 49
49#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 50#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
50 S3C2410_UCON_RXILEVEL | \ 51 S3C2410_UCON_RXILEVEL | \
@@ -179,6 +180,7 @@ static void __init smdk6440_map_io(void)
179 s5p_init_io(NULL, 0, S5P64X0_SYS_ID); 180 s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
180 s3c24xx_init_clocks(12000000); 181 s3c24xx_init_clocks(12000000);
181 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); 182 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
183 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
182} 184}
183 185
184static void __init smdk6440_machine_init(void) 186static void __init smdk6440_machine_init(void)
@@ -202,5 +204,5 @@ MACHINE_START(SMDK6440, "SMDK6440")
202 .init_irq = s5p6440_init_irq, 204 .init_irq = s5p6440_init_irq,
203 .map_io = smdk6440_map_io, 205 .map_io = smdk6440_map_io,
204 .init_machine = smdk6440_machine_init, 206 .init_machine = smdk6440_machine_init,
205 .timer = &s3c24xx_timer, 207 .timer = &s5p_timer,
206MACHINE_END 208MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 1d8f9fd5af3a..d19c4690ee97 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -45,6 +45,7 @@
45#include <plat/pll.h> 45#include <plat/pll.h>
46#include <plat/adc.h> 46#include <plat/adc.h>
47#include <plat/ts.h> 47#include <plat/ts.h>
48#include <plat/s5p-time.h>
48 49
49#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 50#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
50 S3C2410_UCON_RXILEVEL | \ 51 S3C2410_UCON_RXILEVEL | \
@@ -198,6 +199,7 @@ static void __init smdk6450_map_io(void)
198 s5p_init_io(NULL, 0, S5P64X0_SYS_ID); 199 s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
199 s3c24xx_init_clocks(19200000); 200 s3c24xx_init_clocks(19200000);
200 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); 201 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
202 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
201} 203}
202 204
203static void __init smdk6450_machine_init(void) 205static void __init smdk6450_machine_init(void)
@@ -221,5 +223,5 @@ MACHINE_START(SMDK6450, "SMDK6450")
221 .init_irq = s5p6450_init_irq, 223 .init_irq = s5p6450_init_irq,
222 .map_io = smdk6450_map_io, 224 .map_io = smdk6450_map_io,
223 .init_machine = smdk6450_machine_init, 225 .init_machine = smdk6450_machine_init,
224 .timer = &s3c24xx_timer, 226 .timer = &s5p_timer,
225MACHINE_END 227MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index e5acb36a7a51..4e1d8ff5ae59 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -39,6 +39,7 @@
39#include <plat/fb.h> 39#include <plat/fb.h>
40#include <plat/fimc-core.h> 40#include <plat/fimc-core.h>
41#include <plat/sdhci.h> 41#include <plat/sdhci.h>
42#include <plat/s5p-time.h>
42 43
43/* Following are default values for UCON, ULCON and UFCON UART registers */ 44/* Following are default values for UCON, ULCON and UFCON UART registers */
44#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 45#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -646,6 +647,7 @@ static void __init aquila_map_io(void)
646 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 647 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
647 s3c24xx_init_clocks(24000000); 648 s3c24xx_init_clocks(24000000);
648 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); 649 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
650 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
649} 651}
650 652
651static void __init aquila_machine_init(void) 653static void __init aquila_machine_init(void)
@@ -680,5 +682,5 @@ MACHINE_START(AQUILA, "Aquila")
680 .init_irq = s5pv210_init_irq, 682 .init_irq = s5pv210_init_irq,
681 .map_io = aquila_map_io, 683 .map_io = aquila_map_io,
682 .init_machine = aquila_machine_init, 684 .init_machine = aquila_machine_init,
683 .timer = &s3c24xx_timer, 685 .timer = &s5p_timer,
684MACHINE_END 686MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index a431742884cd..243291722c66 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -45,6 +45,7 @@
45#include <plat/keypad.h> 45#include <plat/keypad.h>
46#include <plat/sdhci.h> 46#include <plat/sdhci.h>
47#include <plat/clock.h> 47#include <plat/clock.h>
48#include <plat/s5p-time.h>
48 49
49/* Following are default values for UCON, ULCON and UFCON UART registers */ 50/* Following are default values for UCON, ULCON and UFCON UART registers */
50#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 51#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -835,6 +836,7 @@ static void __init goni_map_io(void)
835 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 836 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
836 s3c24xx_init_clocks(24000000); 837 s3c24xx_init_clocks(24000000);
837 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); 838 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
839 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
838} 840}
839 841
840static void __init goni_machine_init(void) 842static void __init goni_machine_init(void)
@@ -888,5 +890,5 @@ MACHINE_START(GONI, "GONI")
888 .init_irq = s5pv210_init_irq, 890 .init_irq = s5pv210_init_irq,
889 .map_io = goni_map_io, 891 .map_io = goni_map_io,
890 .init_machine = goni_machine_init, 892 .init_machine = goni_machine_init,
891 .timer = &s3c24xx_timer, 893 .timer = &s5p_timer,
892MACHINE_END 894MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index ce11a02eabf3..6c412c8ceccc 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -30,6 +30,7 @@
30#include <plat/ata.h> 30#include <plat/ata.h>
31#include <plat/iic.h> 31#include <plat/iic.h>
32#include <plat/pm.h> 32#include <plat/pm.h>
33#include <plat/s5p-time.h>
33 34
34/* Following are default values for UCON, ULCON and UFCON UART registers */ 35/* Following are default values for UCON, ULCON and UFCON UART registers */
35#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 36#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -111,6 +112,7 @@ static void __init smdkc110_map_io(void)
111 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 112 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
112 s3c24xx_init_clocks(24000000); 113 s3c24xx_init_clocks(24000000);
113 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 114 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
115 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
114} 116}
115 117
116static void __init smdkc110_machine_init(void) 118static void __init smdkc110_machine_init(void)
@@ -138,5 +140,5 @@ MACHINE_START(SMDKC110, "SMDKC110")
138 .init_irq = s5pv210_init_irq, 140 .init_irq = s5pv210_init_irq,
139 .map_io = smdkc110_map_io, 141 .map_io = smdkc110_map_io,
140 .init_machine = smdkc110_machine_init, 142 .init_machine = smdkc110_machine_init,
141 .timer = &s3c24xx_timer, 143 .timer = &s5p_timer,
142MACHINE_END 144MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 2b5f48806c57..bc08ac42e7cc 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -45,6 +45,7 @@
45#include <plat/pm.h> 45#include <plat/pm.h>
46#include <plat/fb.h> 46#include <plat/fb.h>
47#include <plat/gpio-cfg.h> 47#include <plat/gpio-cfg.h>
48#include <plat/s5p-time.h>
48 49
49/* Following are default values for UCON, ULCON and UFCON UART registers */ 50/* Following are default values for UCON, ULCON and UFCON UART registers */
50#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 51#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -315,6 +316,7 @@ static void __init smdkv210_map_io(void)
315 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 316 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
316 s3c24xx_init_clocks(24000000); 317 s3c24xx_init_clocks(24000000);
317 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 318 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
319 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
318} 320}
319 321
320static void __init smdkv210_machine_init(void) 322static void __init smdkv210_machine_init(void)
@@ -349,5 +351,5 @@ MACHINE_START(SMDKV210, "SMDKV210")
349 .init_irq = s5pv210_init_irq, 351 .init_irq = s5pv210_init_irq,
350 .map_io = smdkv210_map_io, 352 .map_io = smdkv210_map_io,
351 .init_machine = smdkv210_machine_init, 353 .init_machine = smdkv210_machine_init,
352 .timer = &s3c24xx_timer, 354 .timer = &s5p_timer,
353MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 043c938806b0..925fc0dc6252 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -27,6 +27,7 @@
27#include <plat/devs.h> 27#include <plat/devs.h>
28#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/iic.h> 29#include <plat/iic.h>
30#include <plat/s5p-time.h>
30 31
31/* Following are default values for UCON, ULCON and UFCON UART registers */ 32/* Following are default values for UCON, ULCON and UFCON UART registers */
32#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 33#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -104,6 +105,7 @@ static void __init torbreck_map_io(void)
104 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 105 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
105 s3c24xx_init_clocks(24000000); 106 s3c24xx_init_clocks(24000000);
106 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); 107 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
108 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
107} 109}
108 110
109static void __init torbreck_machine_init(void) 111static void __init torbreck_machine_init(void)
@@ -127,5 +129,5 @@ MACHINE_START(TORBRECK, "TORBRECK")
127 .init_irq = s5pv210_init_irq, 129 .init_irq = s5pv210_init_irq,
128 .map_io = torbreck_map_io, 130 .map_io = torbreck_map_io,
129 .init_machine = torbreck_machine_init, 131 .init_machine = torbreck_machine_init,
130 .timer = &s3c24xx_timer, 132 .timer = &s5p_timer,
131MACHINE_END 133MACHINE_END