diff options
author | Alistair Buxton <a.j.buxton@gmail.com> | 2009-09-17 23:09:39 -0400 |
---|---|---|
committer | Alistair Buxton <a.j.buxton@gmail.com> | 2009-10-07 18:14:06 -0400 |
commit | 372b1c32e7e7d7aa5f44e0eaed4ad8ae21e4e9da (patch) | |
tree | 32491b47873015ae75cf2e8bc675cb20e00ab259 /arch | |
parent | b51988db94faec47d6e7c69c8e691cfc194f66db (diff) |
OMAP7XX: Replace omap730 references in irqs.h and all users
This patch is part of a series which removes references to omap730 in code
which is shared with omap850, replacing them with references to omap7xx.
Turns INT_730_* to INT_7XX_* for definitions in irqs.h and all users.
Signed-off-by: Alistair Buxton <a.j.buxton@gmail.com>
Reviewed-by: Zebediah C. McClure <zmc@lurian.net>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap1/board-fsample.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap1/board-perseus2.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap1/irq.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap1/mcbsp.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap1/pm.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap1/serial.c | 4 | ||||
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 14 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/entry-macro.S | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/irqs.h | 148 | ||||
-rw-r--r-- | arch/arm/plat-omap/usb.c | 4 |
10 files changed, 102 insertions, 102 deletions
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index e53f7748ac13..74720e65f114 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -107,7 +107,7 @@ static struct resource smc91x_resources[] = { | |||
107 | .flags = IORESOURCE_MEM, | 107 | .flags = IORESOURCE_MEM, |
108 | }, | 108 | }, |
109 | [1] = { | 109 | [1] = { |
110 | .start = INT_730_MPU_EXT_NIRQ, | 110 | .start = INT_7XX_MPU_EXT_NIRQ, |
111 | .end = 0, | 111 | .end = 0, |
112 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 112 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
113 | }, | 113 | }, |
@@ -196,8 +196,8 @@ static struct platform_device smc91x_device = { | |||
196 | 196 | ||
197 | static struct resource kp_resources[] = { | 197 | static struct resource kp_resources[] = { |
198 | [0] = { | 198 | [0] = { |
199 | .start = INT_730_MPUIO_KEYPAD, | 199 | .start = INT_7XX_MPUIO_KEYPAD, |
200 | .end = INT_730_MPUIO_KEYPAD, | 200 | .end = INT_7XX_MPUIO_KEYPAD, |
201 | .flags = IORESOURCE_IRQ, | 201 | .flags = IORESOURCE_IRQ, |
202 | }, | 202 | }, |
203 | }; | 203 | }; |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index ec22838e8e79..2f897cf23504 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -74,7 +74,7 @@ static struct resource smc91x_resources[] = { | |||
74 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
75 | }, | 75 | }, |
76 | [1] = { | 76 | [1] = { |
77 | .start = INT_730_MPU_EXT_NIRQ, | 77 | .start = INT_7XX_MPU_EXT_NIRQ, |
78 | .end = 0, | 78 | .end = 0, |
79 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 79 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
80 | }, | 80 | }, |
@@ -163,8 +163,8 @@ static struct platform_device smc91x_device = { | |||
163 | 163 | ||
164 | static struct resource kp_resources[] = { | 164 | static struct resource kp_resources[] = { |
165 | [0] = { | 165 | [0] = { |
166 | .start = INT_730_MPUIO_KEYPAD, | 166 | .start = INT_7XX_MPUIO_KEYPAD, |
167 | .end = INT_730_MPUIO_KEYPAD, | 167 | .end = INT_7XX_MPUIO_KEYPAD, |
168 | .flags = IORESOURCE_IRQ, | 168 | .flags = IORESOURCE_IRQ, |
169 | }, | 169 | }, |
170 | }; | 170 | }; |
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index c05999c41165..704a80c29725 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
@@ -234,7 +234,7 @@ void __init omap_init_irq(void) | |||
234 | /* Unmask level 2 handler */ | 234 | /* Unmask level 2 handler */ |
235 | 235 | ||
236 | if (cpu_is_omap7xx()) | 236 | if (cpu_is_omap7xx()) |
237 | omap_unmask_irq(INT_730_IH2_IRQ); | 237 | omap_unmask_irq(INT_7XX_IH2_IRQ); |
238 | else if (cpu_is_omap15xx()) | 238 | else if (cpu_is_omap15xx()) |
239 | omap_unmask_irq(INT_1510_IH2_IRQ); | 239 | omap_unmask_irq(INT_1510_IH2_IRQ); |
240 | else if (cpu_is_omap16xx()) | 240 | else if (cpu_is_omap16xx()) |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 06f380bf221e..7ccca0069dce 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -85,16 +85,16 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { | |||
85 | .phys_base = OMAP730_MCBSP1_BASE, | 85 | .phys_base = OMAP730_MCBSP1_BASE, |
86 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, | 86 | .dma_rx_sync = OMAP_DMA_MCBSP1_RX, |
87 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, | 87 | .dma_tx_sync = OMAP_DMA_MCBSP1_TX, |
88 | .rx_irq = INT_730_McBSP1RX, | 88 | .rx_irq = INT_7XX_McBSP1RX, |
89 | .tx_irq = INT_730_McBSP1TX, | 89 | .tx_irq = INT_7XX_McBSP1TX, |
90 | .ops = &omap1_mcbsp_ops, | 90 | .ops = &omap1_mcbsp_ops, |
91 | }, | 91 | }, |
92 | { | 92 | { |
93 | .phys_base = OMAP730_MCBSP2_BASE, | 93 | .phys_base = OMAP730_MCBSP2_BASE, |
94 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, | 94 | .dma_rx_sync = OMAP_DMA_MCBSP3_RX, |
95 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, | 95 | .dma_tx_sync = OMAP_DMA_MCBSP3_TX, |
96 | .rx_irq = INT_730_McBSP2RX, | 96 | .rx_irq = INT_7XX_McBSP2RX, |
97 | .tx_irq = INT_730_McBSP2TX, | 97 | .tx_irq = INT_7XX_McBSP2TX, |
98 | .ops = &omap1_mcbsp_ops, | 98 | .ops = &omap1_mcbsp_ops, |
99 | }, | 99 | }, |
100 | }; | 100 | }; |
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 12f246e3cdca..58479c75cac4 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -184,8 +184,8 @@ static void omap_pm_wakeup_setup(void) | |||
184 | * wake up to a GPIO interrupt. | 184 | * wake up to a GPIO interrupt. |
185 | */ | 185 | */ |
186 | if (cpu_is_omap7xx()) | 186 | if (cpu_is_omap7xx()) |
187 | level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) | | 187 | level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) | |
188 | OMAP_IRQ_BIT(INT_730_IH2_IRQ); | 188 | OMAP_IRQ_BIT(INT_7XX_IH2_IRQ); |
189 | else if (cpu_is_omap15xx()) | 189 | else if (cpu_is_omap15xx()) |
190 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | | 190 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | |
191 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); | 191 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); |
@@ -197,8 +197,8 @@ static void omap_pm_wakeup_setup(void) | |||
197 | 197 | ||
198 | if (cpu_is_omap7xx()) { | 198 | if (cpu_is_omap7xx()) { |
199 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); | 199 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); |
200 | omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | | 200 | omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) | |
201 | OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), | 201 | OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)), |
202 | OMAP_IH2_1_MIR); | 202 | OMAP_IH2_1_MIR); |
203 | } else if (cpu_is_omap15xx()) { | 203 | } else if (cpu_is_omap15xx()) { |
204 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); | 204 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); |
@@ -687,7 +687,7 @@ static int __init omap_pm_init(void) | |||
687 | pm_idle = omap1_pm_idle; | 687 | pm_idle = omap1_pm_idle; |
688 | 688 | ||
689 | if (cpu_is_omap7xx()) | 689 | if (cpu_is_omap7xx()) |
690 | setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq); | 690 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
691 | else if (cpu_is_omap16xx()) | 691 | else if (cpu_is_omap16xx()) |
692 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); | 692 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); |
693 | 693 | ||
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 49381e271be3..ed07af109f00 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -113,8 +113,8 @@ void __init omap_serial_init(void) | |||
113 | if (cpu_is_omap7xx()) { | 113 | if (cpu_is_omap7xx()) { |
114 | serial_platform_data[0].regshift = 0; | 114 | serial_platform_data[0].regshift = 0; |
115 | serial_platform_data[1].regshift = 0; | 115 | serial_platform_data[1].regshift = 0; |
116 | serial_platform_data[0].irq = INT_730_UART_MODEM_1; | 116 | serial_platform_data[0].irq = INT_7XX_UART_MODEM_1; |
117 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; | 117 | serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2; |
118 | } | 118 | } |
119 | 119 | ||
120 | if (cpu_is_omap15xx()) { | 120 | if (cpu_is_omap15xx()) { |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 665ca050183f..22f6e689f5c0 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -221,13 +221,13 @@ static struct gpio_bank gpio_bank_1510[2] = { | |||
221 | 221 | ||
222 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | 222 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
223 | static struct gpio_bank gpio_bank_730[7] = { | 223 | static struct gpio_bank gpio_bank_730[7] = { |
224 | { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 224 | { OMAP1_MPUIO_VBASE, INT_7XX_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
225 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, | 225 | { OMAP730_GPIO1_BASE, INT_7XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, |
226 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, | 226 | { OMAP730_GPIO2_BASE, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, |
227 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, | 227 | { OMAP730_GPIO3_BASE, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, |
228 | { OMAP730_GPIO4_BASE, INT_730_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_730 }, | 228 | { OMAP730_GPIO4_BASE, INT_7XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_730 }, |
229 | { OMAP730_GPIO5_BASE, INT_730_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_730 }, | 229 | { OMAP730_GPIO5_BASE, INT_7XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_730 }, |
230 | { OMAP730_GPIO6_BASE, INT_730_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_730 }, | 230 | { OMAP730_GPIO6_BASE, INT_7XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_730 }, |
231 | }; | 231 | }; |
232 | #endif | 232 | #endif |
233 | 233 | ||
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index bcf715856658..abe086416e19 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S | |||
@@ -21,7 +21,7 @@ | |||
21 | (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) | 21 | (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) |
22 | #error "FIXME: OMAP7XX doesn't support multiple-OMAP" | 22 | #error "FIXME: OMAP7XX doesn't support multiple-OMAP" |
23 | #elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | 23 | #elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
24 | #define INT_IH2_IRQ INT_730_IH2_IRQ | 24 | #define INT_IH2_IRQ INT_7XX_IH2_IRQ |
25 | #elif defined(CONFIG_ARCH_OMAP15XX) | 25 | #elif defined(CONFIG_ARCH_OMAP15XX) |
26 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | 26 | #define INT_IH2_IRQ INT_1510_IH2_IRQ |
27 | #elif defined(CONFIG_ARCH_OMAP16XX) | 27 | #elif defined(CONFIG_ARCH_OMAP16XX) |
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 7f338f0c7450..6a6d0281e1d5 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h | |||
@@ -86,26 +86,26 @@ | |||
86 | #define INT_1610_SSR_FIFO_0 29 | 86 | #define INT_1610_SSR_FIFO_0 29 |
87 | 87 | ||
88 | /* | 88 | /* |
89 | * OMAP-730 specific IRQ numbers for interrupt handler 1 | 89 | * OMAP-7xx specific IRQ numbers for interrupt handler 1 |
90 | */ | 90 | */ |
91 | #define INT_730_IH2_FIQ 0 | 91 | #define INT_7XX_IH2_FIQ 0 |
92 | #define INT_730_IH2_IRQ 1 | 92 | #define INT_7XX_IH2_IRQ 1 |
93 | #define INT_730_USB_NON_ISO 2 | 93 | #define INT_7XX_USB_NON_ISO 2 |
94 | #define INT_730_USB_ISO 3 | 94 | #define INT_7XX_USB_ISO 3 |
95 | #define INT_730_ICR 4 | 95 | #define INT_7XX_ICR 4 |
96 | #define INT_730_EAC 5 | 96 | #define INT_7XX_EAC 5 |
97 | #define INT_730_GPIO_BANK1 6 | 97 | #define INT_7XX_GPIO_BANK1 6 |
98 | #define INT_730_GPIO_BANK2 7 | 98 | #define INT_7XX_GPIO_BANK2 7 |
99 | #define INT_730_GPIO_BANK3 8 | 99 | #define INT_7XX_GPIO_BANK3 8 |
100 | #define INT_730_McBSP2TX 10 | 100 | #define INT_7XX_McBSP2TX 10 |
101 | #define INT_730_McBSP2RX 11 | 101 | #define INT_7XX_McBSP2RX 11 |
102 | #define INT_730_McBSP2RX_OVF 12 | 102 | #define INT_7XX_McBSP2RX_OVF 12 |
103 | #define INT_730_LCD_LINE 14 | 103 | #define INT_7XX_LCD_LINE 14 |
104 | #define INT_730_GSM_PROTECT 15 | 104 | #define INT_7XX_GSM_PROTECT 15 |
105 | #define INT_730_TIMER3 16 | 105 | #define INT_7XX_TIMER3 16 |
106 | #define INT_730_GPIO_BANK5 17 | 106 | #define INT_7XX_GPIO_BANK5 17 |
107 | #define INT_730_GPIO_BANK6 18 | 107 | #define INT_7XX_GPIO_BANK6 18 |
108 | #define INT_730_SPGIO_WR 29 | 108 | #define INT_7XX_SPGIO_WR 29 |
109 | 109 | ||
110 | /* | 110 | /* |
111 | * IRQ numbers for interrupt handler 2 | 111 | * IRQ numbers for interrupt handler 2 |
@@ -183,62 +183,62 @@ | |||
183 | #define INT_1610_SHA1MD5 (91 + IH2_BASE) | 183 | #define INT_1610_SHA1MD5 (91 + IH2_BASE) |
184 | 184 | ||
185 | /* | 185 | /* |
186 | * OMAP-730 specific IRQ numbers for interrupt handler 2 | 186 | * OMAP-7xx specific IRQ numbers for interrupt handler 2 |
187 | */ | 187 | */ |
188 | #define INT_730_HW_ERRORS (0 + IH2_BASE) | 188 | #define INT_7XX_HW_ERRORS (0 + IH2_BASE) |
189 | #define INT_730_NFIQ_PWR_FAIL (1 + IH2_BASE) | 189 | #define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE) |
190 | #define INT_730_CFCD (2 + IH2_BASE) | 190 | #define INT_7XX_CFCD (2 + IH2_BASE) |
191 | #define INT_730_CFIREQ (3 + IH2_BASE) | 191 | #define INT_7XX_CFIREQ (3 + IH2_BASE) |
192 | #define INT_730_I2C (4 + IH2_BASE) | 192 | #define INT_7XX_I2C (4 + IH2_BASE) |
193 | #define INT_730_PCC (5 + IH2_BASE) | 193 | #define INT_7XX_PCC (5 + IH2_BASE) |
194 | #define INT_730_MPU_EXT_NIRQ (6 + IH2_BASE) | 194 | #define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE) |
195 | #define INT_730_SPI_100K_1 (7 + IH2_BASE) | 195 | #define INT_7XX_SPI_100K_1 (7 + IH2_BASE) |
196 | #define INT_730_SYREN_SPI (8 + IH2_BASE) | 196 | #define INT_7XX_SYREN_SPI (8 + IH2_BASE) |
197 | #define INT_730_VLYNQ (9 + IH2_BASE) | 197 | #define INT_7XX_VLYNQ (9 + IH2_BASE) |
198 | #define INT_730_GPIO_BANK4 (10 + IH2_BASE) | 198 | #define INT_7XX_GPIO_BANK4 (10 + IH2_BASE) |
199 | #define INT_730_McBSP1TX (11 + IH2_BASE) | 199 | #define INT_7XX_McBSP1TX (11 + IH2_BASE) |
200 | #define INT_730_McBSP1RX (12 + IH2_BASE) | 200 | #define INT_7XX_McBSP1RX (12 + IH2_BASE) |
201 | #define INT_730_McBSP1RX_OF (13 + IH2_BASE) | 201 | #define INT_7XX_McBSP1RX_OF (13 + IH2_BASE) |
202 | #define INT_730_UART_MODEM_IRDA_2 (14 + IH2_BASE) | 202 | #define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE) |
203 | #define INT_730_UART_MODEM_1 (15 + IH2_BASE) | 203 | #define INT_7XX_UART_MODEM_1 (15 + IH2_BASE) |
204 | #define INT_730_MCSI (16 + IH2_BASE) | 204 | #define INT_7XX_MCSI (16 + IH2_BASE) |
205 | #define INT_730_uWireTX (17 + IH2_BASE) | 205 | #define INT_7XX_uWireTX (17 + IH2_BASE) |
206 | #define INT_730_uWireRX (18 + IH2_BASE) | 206 | #define INT_7XX_uWireRX (18 + IH2_BASE) |
207 | #define INT_730_SMC_CD (19 + IH2_BASE) | 207 | #define INT_7XX_SMC_CD (19 + IH2_BASE) |
208 | #define INT_730_SMC_IREQ (20 + IH2_BASE) | 208 | #define INT_7XX_SMC_IREQ (20 + IH2_BASE) |
209 | #define INT_730_HDQ_1WIRE (21 + IH2_BASE) | 209 | #define INT_7XX_HDQ_1WIRE (21 + IH2_BASE) |
210 | #define INT_730_TIMER32K (22 + IH2_BASE) | 210 | #define INT_7XX_TIMER32K (22 + IH2_BASE) |
211 | #define INT_730_MMC_SDIO (23 + IH2_BASE) | 211 | #define INT_7XX_MMC_SDIO (23 + IH2_BASE) |
212 | #define INT_730_UPLD (24 + IH2_BASE) | 212 | #define INT_7XX_UPLD (24 + IH2_BASE) |
213 | #define INT_730_USB_HHC_1 (27 + IH2_BASE) | 213 | #define INT_7XX_USB_HHC_1 (27 + IH2_BASE) |
214 | #define INT_730_USB_HHC_2 (28 + IH2_BASE) | 214 | #define INT_7XX_USB_HHC_2 (28 + IH2_BASE) |
215 | #define INT_730_USB_GENI (29 + IH2_BASE) | 215 | #define INT_7XX_USB_GENI (29 + IH2_BASE) |
216 | #define INT_730_USB_OTG (30 + IH2_BASE) | 216 | #define INT_7XX_USB_OTG (30 + IH2_BASE) |
217 | #define INT_730_CAMERA_IF (31 + IH2_BASE) | 217 | #define INT_7XX_CAMERA_IF (31 + IH2_BASE) |
218 | #define INT_730_RNG (32 + IH2_BASE) | 218 | #define INT_7XX_RNG (32 + IH2_BASE) |
219 | #define INT_730_DUAL_MODE_TIMER (33 + IH2_BASE) | 219 | #define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE) |
220 | #define INT_730_DBB_RF_EN (34 + IH2_BASE) | 220 | #define INT_7XX_DBB_RF_EN (34 + IH2_BASE) |
221 | #define INT_730_MPUIO_KEYPAD (35 + IH2_BASE) | 221 | #define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE) |
222 | #define INT_730_SHA1_MD5 (36 + IH2_BASE) | 222 | #define INT_7XX_SHA1_MD5 (36 + IH2_BASE) |
223 | #define INT_730_SPI_100K_2 (37 + IH2_BASE) | 223 | #define INT_7XX_SPI_100K_2 (37 + IH2_BASE) |
224 | #define INT_730_RNG_IDLE (38 + IH2_BASE) | 224 | #define INT_7XX_RNG_IDLE (38 + IH2_BASE) |
225 | #define INT_730_MPUIO (39 + IH2_BASE) | 225 | #define INT_7XX_MPUIO (39 + IH2_BASE) |
226 | #define INT_730_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) | 226 | #define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) |
227 | #define INT_730_LLPC_OE_FALLING (41 + IH2_BASE) | 227 | #define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE) |
228 | #define INT_730_LLPC_OE_RISING (42 + IH2_BASE) | 228 | #define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE) |
229 | #define INT_730_LLPC_VSYNC (43 + IH2_BASE) | 229 | #define INT_7XX_LLPC_VSYNC (43 + IH2_BASE) |
230 | #define INT_730_WAKE_UP_REQ (46 + IH2_BASE) | 230 | #define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE) |
231 | #define INT_730_DMA_CH6 (53 + IH2_BASE) | 231 | #define INT_7XX_DMA_CH6 (53 + IH2_BASE) |
232 | #define INT_730_DMA_CH7 (54 + IH2_BASE) | 232 | #define INT_7XX_DMA_CH7 (54 + IH2_BASE) |
233 | #define INT_730_DMA_CH8 (55 + IH2_BASE) | 233 | #define INT_7XX_DMA_CH8 (55 + IH2_BASE) |
234 | #define INT_730_DMA_CH9 (56 + IH2_BASE) | 234 | #define INT_7XX_DMA_CH9 (56 + IH2_BASE) |
235 | #define INT_730_DMA_CH10 (57 + IH2_BASE) | 235 | #define INT_7XX_DMA_CH10 (57 + IH2_BASE) |
236 | #define INT_730_DMA_CH11 (58 + IH2_BASE) | 236 | #define INT_7XX_DMA_CH11 (58 + IH2_BASE) |
237 | #define INT_730_DMA_CH12 (59 + IH2_BASE) | 237 | #define INT_7XX_DMA_CH12 (59 + IH2_BASE) |
238 | #define INT_730_DMA_CH13 (60 + IH2_BASE) | 238 | #define INT_7XX_DMA_CH13 (60 + IH2_BASE) |
239 | #define INT_730_DMA_CH14 (61 + IH2_BASE) | 239 | #define INT_7XX_DMA_CH14 (61 + IH2_BASE) |
240 | #define INT_730_DMA_CH15 (62 + IH2_BASE) | 240 | #define INT_7XX_DMA_CH15 (62 + IH2_BASE) |
241 | #define INT_730_NAND (63 + IH2_BASE) | 241 | #define INT_7XX_NAND (63 + IH2_BASE) |
242 | 242 | ||
243 | #define INT_24XX_SYS_NIRQ 7 | 243 | #define INT_24XX_SYS_NIRQ 7 |
244 | #define INT_24XX_SDMA_IRQ0 12 | 244 | #define INT_24XX_SDMA_IRQ0 12 |
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index 980d2eb68a24..3c40b8525df6 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
@@ -615,7 +615,7 @@ omap_otg_init(struct omap_usb_config *config) | |||
615 | syscon &= ~HST_IDLE_EN; | 615 | syscon &= ~HST_IDLE_EN; |
616 | ohci_device.dev.platform_data = config; | 616 | ohci_device.dev.platform_data = config; |
617 | if (cpu_is_omap7xx()) | 617 | if (cpu_is_omap7xx()) |
618 | ohci_resources[1].start = INT_730_USB_HHC_1; | 618 | ohci_resources[1].start = INT_7XX_USB_HHC_1; |
619 | status = platform_device_register(&ohci_device); | 619 | status = platform_device_register(&ohci_device); |
620 | if (status) | 620 | if (status) |
621 | pr_debug("can't register OHCI device, %d\n", status); | 621 | pr_debug("can't register OHCI device, %d\n", status); |
@@ -627,7 +627,7 @@ omap_otg_init(struct omap_usb_config *config) | |||
627 | syscon &= ~OTG_IDLE_EN; | 627 | syscon &= ~OTG_IDLE_EN; |
628 | otg_device.dev.platform_data = config; | 628 | otg_device.dev.platform_data = config; |
629 | if (cpu_is_omap7xx()) | 629 | if (cpu_is_omap7xx()) |
630 | otg_resources[1].start = INT_730_USB_OTG; | 630 | otg_resources[1].start = INT_7XX_USB_OTG; |
631 | status = platform_device_register(&otg_device); | 631 | status = platform_device_register(&otg_device); |
632 | if (status) | 632 | if (status) |
633 | pr_debug("can't register OTG device, %d\n", status); | 633 | pr_debug("can't register OTG device, %d\n", status); |