Merge branch 'master' into for-linus

378 files changed, 15488 insertions, 5454 deletions

diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h
index 1bce8169733c..4567aca6fdd6 100644
--- a/arch/alpha/include/asm/dma-mapping.h
+++ b/arch/alpha/include/asm/dma-mapping.h
@@ -41,9 +41,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
 
 #define dma_alloc_noncoherent(d, s, h, f)       dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h)        dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d, h)                 (1)
 
 #define dma_cache_sync(dev, va, size, dir)                ((void)0)
-#define dma_get_cache_alignment()                         L1_CACHE_BYTES
 
 #endif  /* _ALPHA_DMA_MAPPING_H */
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 232f0c758252..92951103255a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -644,6 +644,7 @@ config ARCH_S3C2410
         select ARCH_HAS_CPUFREQ
         select HAVE_CLK
         select ARCH_USES_GETTIMEOFFSET
+        select HAVE_S3C2410_I2C
         help
           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@@ -673,6 +674,8 @@ config ARCH_S3C64XX
         select S3C_DEV_NAND
         select USB_ARCH_HAS_OHCI
         select SAMSUNG_GPIOLIB_4BIT
+        select HAVE_S3C2410_I2C
+        select HAVE_S3C2410_WATCHDOG
         help
           Samsung S3C64XX series based systems
 
@@ -681,7 +684,10 @@ config ARCH_S5P6440
         select CPU_V6
         select GENERIC_GPIO
         select HAVE_CLK
+        select HAVE_S3C2410_WATCHDOG
         select ARCH_USES_GETTIMEOFFSET
+        select HAVE_S3C2410_I2C
+        select HAVE_S3C_RTC
         help
           Samsung S5P6440 CPU based systems
 
@@ -691,6 +697,7 @@ config ARCH_S5P6442
         select GENERIC_GPIO
         select HAVE_CLK
         select ARCH_USES_GETTIMEOFFSET
+        select HAVE_S3C2410_WATCHDOG
         help
           Samsung S5P6442 CPU based systems
 
@@ -701,6 +708,9 @@ config ARCH_S5PC100
         select CPU_V7
         select ARM_L1_CACHE_SHIFT_6
         select ARCH_USES_GETTIMEOFFSET
+        select HAVE_S3C2410_I2C
+        select HAVE_S3C_RTC
+        select HAVE_S3C2410_WATCHDOG
         help
           Samsung S5PC100 series based systems
 
@@ -711,9 +721,21 @@ config ARCH_S5PV210
         select HAVE_CLK
         select ARM_L1_CACHE_SHIFT_6
         select ARCH_USES_GETTIMEOFFSET
+        select HAVE_S3C2410_I2C
+        select HAVE_S3C_RTC
+        select HAVE_S3C2410_WATCHDOG
         help
           Samsung S5PV210/S5PC110 series based systems
 
+config ARCH_S5PV310
+        bool "Samsung S5PV310/S5PC210"
+        select CPU_V7
+        select GENERIC_GPIO
+        select HAVE_CLK
+        select GENERIC_CLOCKEVENTS
+        help
+          Samsung S5PV310 series based systems
+
 config ARCH_SHARK
         bool "Shark"
         select CPU_SA110
@@ -915,6 +937,8 @@ source "arch/arm/mach-s5pc100/Kconfig"
 
 source "arch/arm/mach-s5pv210/Kconfig"
 
+source "arch/arm/mach-s5pv310/Kconfig"
+
 source "arch/arm/mach-shmobile/Kconfig"
 
 source "arch/arm/plat-stmp3xxx/Kconfig"
@@ -1040,6 +1064,18 @@ config PL310_ERRATA_588369
            is not correctly implemented in PL310 as clean lines are not
            invalidated as a result of these operations. Note that this errata
            uses Texas Instrument's secure monitor api.
+
+config ARM_ERRATA_720789
+        bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
+        depends on CPU_V7 && SMP
+        help
+          This option enables the workaround for the 720789 Cortex-A9 (prior to
+          r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
+          broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
+          As a consequence of this erratum, some TLB entries which should be
+          invalidated are not, resulting in an incoherency in the system page
+          tables. The workaround changes the TLB flushing routines to invalidate
+          entries regardless of the ASID.
 endmenu
 
 source "arch/arm/common/Kconfig"
@@ -1108,11 +1144,11 @@ config SMP
         bool "Symmetric Multi-Processing (EXPERIMENTAL)"
         depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
-                 ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
+                 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
         depends on GENERIC_CLOCKEVENTS
         select USE_GENERIC_SMP_HELPERS
-        select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || \
-                 ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
+        select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
+                 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
         help
           This enables support for systems with more than one CPU. If you have
           a system with only one CPU, like most personal computers, say N. If
@@ -1182,10 +1218,10 @@ config LOCAL_TIMERS
         bool "Use local timer interrupts"
         depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
                 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
-                ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_TEGRA)
+                ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
         default y
-        select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || \\
-                ARCH_U8500 || ARCH_TEGRA
+        select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
+                ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
         help
           Enable support for local timers on SMP platforms, rather then the
           legacy IPI broadcast method.  Local timers allows the system
@@ -1196,7 +1232,8 @@ source kernel/Kconfig.preempt
 
 config HZ
         int
-        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
+        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
+                ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
         default AT91_TIMER_HZ if ARCH_AT91
         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a8d4dca9da35..99b8200138d2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -174,6 +174,7 @@ machine-$(CONFIG_ARCH_S5P6440)		:= s5p6440
 machine-$(CONFIG_ARCH_S5P6442)          := s5p6442
 machine-$(CONFIG_ARCH_S5PC100)          := s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          := s5pv210
+machine-$(CONFIG_ARCH_S5PV310)          := s5pv310
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
 machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 7636c9b3f9a7..68775e33476c 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -33,7 +33,7 @@ ifeq ($(CONFIG_CPU_XSCALE),y)
 OBJS            += head-xscale.o
 endif
 
-ifeq ($(CONFIG_PXA_SHARPSL),y)
+ifeq ($(CONFIG_PXA_SHARPSL_DETECT_MACH_ID),y)
 OBJS            += head-sharpsl.o
 endif
 
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index abf4d65acf62..6af9907c3b5c 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -170,9 +170,8 @@ not_angel:
 
                 .text
                 adr     r0, LC0
- ARM(           ldmia   r0, {r1, r2, r3, r5, r6, r11, ip, sp})
- THUMB(         ldmia   r0, {r1, r2, r3, r5, r6, r11, ip}       )
- THUMB(         ldr     sp, [r0, #32]                           )
+                ldmia   r0, {r1, r2, r3, r5, r6, r11, ip}
+                ldr     sp, [r0, #28]
 #ifdef CONFIG_AUTO_ZRELADDR
                 @ determine final kernel image address
                 and     r4, pc, #0xf8000000
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 7974baacafce..6c0913562455 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -263,14 +263,6 @@ static int it8152_pci_platform_notify_remove(struct device *dev)
         return 0;
 }
 
-int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
-{
-        dev_dbg(dev, "%s: dma_addr %08x, size %08x\n",
-                __func__, dma_addr, size);
-        return (dev->bus == &pci_bus_type) &&
-                ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
-}
-
 int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
 {
         it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
deleted file mode 100644
index 22c2d147f793..000000000000
--- a/arch/arm/configs/s5pc110_defconfig
+++ /dev/null
@@ -1,66 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5PV210=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDKC110=y
-CONFIG_VMSPLIT_2G=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
index 1753836d0055..0488a1eb4d7d 100644
--- a/arch/arm/configs/s5pv210_defconfig
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -7,6 +7,11 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_S5PV210=y
 CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_S3C_DEV_FB=y
+CONFIG_S5PV210_SETUP_FB_24BPP=y
+CONFIG_MACH_AQUILA=y
+CONFIG_MACH_GONI=y
+CONFIG_MACH_SMDKC110=y
 CONFIG_MACH_SMDKV210=y
 CONFIG_VMSPLIT_2G=y
 CONFIG_PREEMPT=y
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 66c160b8547f..9d6122096fbe 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -14,7 +14,7 @@
  * cache before the transfer is done, causing old data to be seen by
  * the CPU.
  */
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 /*
  * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 69ce0727edb5..c226fe10553e 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -144,16 +144,6 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
         return 0;
 }
 
-static inline int dma_get_cache_alignment(void)
-{
-        return 32;
-}
-
-static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
-{
-        return !!arch_is_coherent();
-}
-
 /*
  * DMA errors are defined by all-bits-set in the DMA address.
  */
@@ -298,7 +288,15 @@ extern void dmabounce_unregister_dev(struct device *);
  * DMA access and 1 if the buffer needs to be bounced.
  *
  */
+#ifdef CONFIG_SA1111
 extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
+#else
+static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr,
+                                   size_t size)
+{
+        return 0;
+}
+#endif
 
 /*
  * The DMA API, implemented by dmabounce.c.  See below for descriptions.
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 6750b8e45a49..5747a8baa413 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -59,6 +59,8 @@ typedef struct user_fp elf_fpregset_t;
 
 #define R_ARM_THM_CALL          10
 #define R_ARM_THM_JUMP24        30
+#define R_ARM_THM_MOVW_ABS_NC   47
+#define R_ARM_THM_MOVT_ABS      48
 
 /*
  * These are used to set parameters in the core dumps.
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
index f82b25d4f73e..212e47828c79 100644
--- a/arch/arm/include/asm/hardware/coresight.h
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -48,8 +48,6 @@ struct tracectx {
 /* CoreSight Component Registers */
 #define CSCR_CLASS      0xff4
 
-#define CSCR_PRSR       0x314
-
 #define UNLOCK_MAGIC    0xc5acce55
 
 /* ETM control register, "ETM Architecture", 3.3.1 */
@@ -132,6 +130,12 @@ struct tracectx {
                                 ETMCTRL_BRANCH_OUTPUT | \
                                 ETMCTRL_DO_CONTEXTID)
 
+/* ETM management registers, "ETM Architecture", 3.5.24 */
+#define ETMMR_OSLAR     0x300
+#define ETMMR_OSLSR     0x304
+#define ETMMR_OSSRR     0x308
+#define ETMMR_PDSR      0x314
+
 /* ETB registers, "CoreSight Components TRM", 9.3 */
 #define ETBR_DEPTH              0x04
 #define ETBR_STATUS             0x0c
diff --git a/arch/arm/include/asm/hardware/scoop.h b/arch/arm/include/asm/hardware/scoop.h
index 46492a63a7c4..ebb3ceaa8fac 100644
--- a/arch/arm/include/asm/hardware/scoop.h
+++ b/arch/arm/include/asm/hardware/scoop.h
@@ -22,18 +22,23 @@
 #define SCOOP_GPWR 0x24
 #define SCOOP_GPRR 0x28
 
-#define SCOOP_GPCR_PA22 ( 1 << 12 )
-#define SCOOP_GPCR_PA21 ( 1 << 11 )
-#define SCOOP_GPCR_PA20 ( 1 << 10 )
-#define SCOOP_GPCR_PA19 ( 1 << 9 )
-#define SCOOP_GPCR_PA18 ( 1 << 8 )
-#define SCOOP_GPCR_PA17 ( 1 << 7 )
-#define SCOOP_GPCR_PA16 ( 1 << 6 )
-#define SCOOP_GPCR_PA15 ( 1 << 5 )
-#define SCOOP_GPCR_PA14 ( 1 << 4 )
-#define SCOOP_GPCR_PA13 ( 1 << 3 )
-#define SCOOP_GPCR_PA12 ( 1 << 2 )
-#define SCOOP_GPCR_PA11 ( 1 << 1 )
+#define SCOOP_CPR_OUT   (1 << 7)
+#define SCOOP_CPR_SD_3V (1 << 2)
+#define SCOOP_CPR_CF_XV (1 << 1)
+#define SCOOP_CPR_CF_3V (1 << 0)
+
+#define SCOOP_GPCR_PA22 (1 << 12)
+#define SCOOP_GPCR_PA21 (1 << 11)
+#define SCOOP_GPCR_PA20 (1 << 10)
+#define SCOOP_GPCR_PA19 (1 << 9)
+#define SCOOP_GPCR_PA18 (1 << 8)
+#define SCOOP_GPCR_PA17 (1 << 7)
+#define SCOOP_GPCR_PA16 (1 << 6)
+#define SCOOP_GPCR_PA15 (1 << 5)
+#define SCOOP_GPCR_PA14 (1 << 4)
+#define SCOOP_GPCR_PA13 (1 << 3)
+#define SCOOP_GPCR_PA12 (1 << 2)
+#define SCOOP_GPCR_PA11 (1 << 1)
 
 struct scoop_config {
         unsigned short io_out;
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index bd863d8608cd..33b546ae72d4 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -378,7 +378,11 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
         if (tlb_flag(TLB_V6_I_ASID))
                 asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
         if (tlb_flag(TLB_V7_UIS_ASID))
+#ifdef CONFIG_ARM_ERRATA_720789
+                asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+#else
                 asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
+#endif
 
         if (tlb_flag(TLB_BTB)) {
                 /* flush the branch target cache */
@@ -424,7 +428,11 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
         if (tlb_flag(TLB_V6_I_PAGE))
                 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
         if (tlb_flag(TLB_V7_UIS_PAGE))
+#ifdef CONFIG_ARM_ERRATA_720789
+                asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc");
+#else
                 asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
+#endif
 
         if (tlb_flag(TLB_BTB)) {
                 /* flush the branch target cache */
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 2c1db77d7848..f05a35a59694 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -92,75 +92,111 @@ ENDPROC(ret_from_fork)
 #define CALL(x) .long x
 
 #ifdef CONFIG_FUNCTION_TRACER
+/*
+ * When compiling with -pg, gcc inserts a call to the mcount routine at the
+ * start of every function.  In mcount, apart from the function's address (in
+ * lr), we need to get hold of the function's caller's address.
+ *
+ * Older GCCs (pre-4.4) inserted a call to a routine called mcount like this:
+ *
+ *      bl      mcount
+ *
+ * These versions have the limitation that in order for the mcount routine to
+ * be able to determine the function's caller's address, an APCS-style frame
+ * pointer (which is set up with something like the code below) is required.
+ *
+ *      mov     ip, sp
+ *      push    {fp, ip, lr, pc}
+ *      sub     fp, ip, #4
+ *
+ * With EABI, these frame pointers are not available unless -mapcs-frame is
+ * specified, and if building as Thumb-2, not even then.
+ *
+ * Newer GCCs (4.4+) solve this problem by introducing a new version of mcount,
+ * with call sites like:
+ *
+ *      push    {lr}
+ *      bl      __gnu_mcount_nc
+ *
+ * With these compilers, frame pointers are not necessary.
+ *
+ * mcount can be thought of as a function called in the middle of a subroutine
+ * call.  As such, it needs to be transparent for both the caller and the
+ * callee: the original lr needs to be restored when leaving mcount, and no
+ * registers should be clobbered.  (In the __gnu_mcount_nc implementation, we
+ * clobber the ip register.  This is OK because the ARM calling convention
+ * allows it to be clobbered in subroutines and doesn't use it to hold
+ * parameters.)
+ */
 #ifdef CONFIG_DYNAMIC_FTRACE
 ENTRY(mcount)
-        stmdb sp!, {r0-r3, lr}
-        mov r0, lr
-        sub r0, r0, #MCOUNT_INSN_SIZE
+        stmdb   sp!, {r0-r3, lr}
+        mov     r0, lr
+        sub     r0, r0, #MCOUNT_INSN_SIZE
 
         .globl mcount_call
 mcount_call:
-        bl ftrace_stub
-        ldr lr, [fp, #-4]                       @ restore lr
-        ldmia sp!, {r0-r3, pc}
+        bl      ftrace_stub
+        ldr     lr, [fp, #-4]                   @ restore lr
+        ldmia   sp!, {r0-r3, pc}
 
 ENTRY(ftrace_caller)
-        stmdb sp!, {r0-r3, lr}
-        ldr r1, [fp, #-4]
-        mov r0, lr
-        sub r0, r0, #MCOUNT_INSN_SIZE
+        stmdb   sp!, {r0-r3, lr}
+        ldr     r1, [fp, #-4]
+        mov     r0, lr
+        sub     r0, r0, #MCOUNT_INSN_SIZE
 
         .globl ftrace_call
 ftrace_call:
-        bl ftrace_stub
-        ldr lr, [fp, #-4]                       @ restore lr
-        ldmia sp!, {r0-r3, pc}
+        bl      ftrace_stub
+        ldr     lr, [fp, #-4]                   @ restore lr
+        ldmia   sp!, {r0-r3, pc}
 
 #else
 
 ENTRY(__gnu_mcount_nc)
-        stmdb sp!, {r0-r3, lr}
-        ldr r0, =ftrace_trace_function
-        ldr r2, [r0]
-        adr r0, ftrace_stub
-        cmp r0, r2
-        bne gnu_trace
-        ldmia sp!, {r0-r3, ip, lr}
-        mov pc, ip
+        stmdb   sp!, {r0-r3, lr}
+        ldr     r0, =ftrace_trace_function
+        ldr     r2, [r0]
+        adr     r0, ftrace_stub
+        cmp     r0, r2
+        bne     gnu_trace
+        ldmia   sp!, {r0-r3, ip, lr}
+        mov     pc, ip
 
 gnu_trace:
-        ldr r1, [sp, #20]                       @ lr of instrumented routine
-        mov r0, lr
-        sub r0, r0, #MCOUNT_INSN_SIZE
-        mov lr, pc
-        mov pc, r2
-        ldmia sp!, {r0-r3, ip, lr}
-        mov pc, ip
+        ldr     r1, [sp, #20]                   @ lr of instrumented routine
+        mov     r0, lr
+        sub     r0, r0, #MCOUNT_INSN_SIZE
+        mov     lr, pc
+        mov     pc, r2
+        ldmia   sp!, {r0-r3, ip, lr}
+        mov     pc, ip
 
 ENTRY(mcount)
-        stmdb sp!, {r0-r3, lr}
-        ldr r0, =ftrace_trace_function
-        ldr r2, [r0]
-        adr r0, ftrace_stub
-        cmp r0, r2
-        bne trace
-        ldr lr, [fp, #-4]                       @ restore lr
-        ldmia sp!, {r0-r3, pc}
+        stmdb   sp!, {r0-r3, lr}
+        ldr     r0, =ftrace_trace_function
+        ldr     r2, [r0]
+        adr     r0, ftrace_stub
+        cmp     r0, r2
+        bne     trace
+        ldr     lr, [fp, #-4]                   @ restore lr
+        ldmia   sp!, {r0-r3, pc}
 
 trace:
-        ldr r1, [fp, #-4]                       @ lr of instrumented routine
-        mov r0, lr
-        sub r0, r0, #MCOUNT_INSN_SIZE
-        mov lr, pc
-        mov pc, r2
-        ldr lr, [fp, #-4]                       @ restore lr
-        ldmia sp!, {r0-r3, pc}
+        ldr     r1, [fp, #-4]                   @ lr of instrumented routine
+        mov     r0, lr
+        sub     r0, r0, #MCOUNT_INSN_SIZE
+        mov     lr, pc
+        mov     pc, r2
+        ldr     lr, [fp, #-4]                   @ restore lr
+        ldmia   sp!, {r0-r3, pc}
 
 #endif /* CONFIG_DYNAMIC_FTRACE */
 
         .globl ftrace_stub
 ftrace_stub:
-        mov pc, lr
+        mov     pc, lr
 
 #endif /* CONFIG_FUNCTION_TRACER */
 
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 827753966301..56418f98cd01 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -543,7 +543,9 @@ static int __init etm_probe(struct amba_device *dev, struct amba_id *id)
         t->etm_portsz = 1;
 
         etm_unlock(t);
-        ret = etm_readl(t, CSCR_PRSR);
+        (void)etm_readl(t, ETMMR_PDSR);
+        /* dummy first read */
+        (void)etm_readl(&tracer, ETMMR_OSSRR);
 
         t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf;
         etm_writel(t, 0x440, ETMR_CTRL);
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index c628bdf6c430..6b4605893f1e 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -102,7 +102,9 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
                 unsigned long loc;
                 Elf32_Sym *sym;
                 s32 offset;
+#ifdef CONFIG_THUMB2_KERNEL
                 u32 upper, lower, sign, j1, j2;
+#endif
 
                 offset = ELF32_R_SYM(rel->r_info);
                 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
@@ -185,6 +187,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
                                         (offset & 0x0fff);
                         break;
 
+#ifdef CONFIG_THUMB2_KERNEL
                 case R_ARM_THM_CALL:
                 case R_ARM_THM_JUMP24:
                         upper = *(u16 *)loc;
@@ -233,9 +236,40 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
                         *(u16 *)(loc + 2) = (u16)((lower & 0xd000) |
                                                   (j1 << 13) | (j2 << 11) |
                                                   ((offset >> 1) & 0x07ff));
+                        break;
+
+                case R_ARM_THM_MOVW_ABS_NC:
+                case R_ARM_THM_MOVT_ABS:
                         upper = *(u16 *)loc;
                         lower = *(u16 *)(loc + 2);
+
+                        /*
+                         * MOVT/MOVW instructions encoding in Thumb-2:
+                         *
+                         * i    = upper[10]
+                         * imm4 = upper[3:0]
+                         * imm3 = lower[14:12]
+                         * imm8 = lower[7:0]
+                         *
+                         * imm16 = imm4:i:imm3:imm8
+                         */
+                        offset = ((upper & 0x000f) << 12) |
+                                ((upper & 0x0400) << 1) |
+                                ((lower & 0x7000) >> 4) | (lower & 0x00ff);
+                        offset = (offset ^ 0x8000) - 0x8000;
+                        offset += sym->st_value;
+
+                        if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
+                                offset >>= 16;
+
+                        *(u16 *)loc = (u16)((upper & 0xfbf0) |
+                                            ((offset & 0xf000) >> 12) |
+                                            ((offset & 0x0800) >> 1));
+                        *(u16 *)(loc + 2) = (u16)((lower & 0x8f00) |
+                                                  ((offset & 0x0700) << 4) |
+                                                  (offset & 0x00ff));
                         break;
+#endif
 
                 default:
                         printk(KERN_ERR "%s: unknown relocation: %u\n",
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 02138af631e7..44eb9f764938 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -75,7 +75,7 @@ static struct at91_usbh_data __initdata cam60_usbh_data = {
  * SPI devices.
  */
 #if defined(CONFIG_MTD_DATAFLASH)
-static struct mtd_partition __initdata cam60_spi_partitions[] = {
+static struct mtd_partition cam60_spi_partitions[] = {
         {
                 .name   = "BOOT1",
                 .offset = 0,
@@ -98,14 +98,14 @@ static struct mtd_partition __initdata cam60_spi_partitions[] = {
         },
 };
 
-static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
+static struct flash_platform_data cam60_spi_flash_platform_data = {
         .name           = "spi_flash",
         .parts          = cam60_spi_partitions,
         .nr_parts       = ARRAY_SIZE(cam60_spi_partitions)
 };
 #endif
 
-static struct spi_board_info cam60_spi_devices[] = {
+static struct spi_board_info cam60_spi_devices[] __initdata = {
 #if defined(CONFIG_MTD_DATAFLASH)
         {       /* DataFlash chip */
                 .modalias       = "mtd_dataflash",
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index b3ebe9e4871f..d0b7d870be9c 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -69,13 +69,6 @@
 #define SYSPLD_VIRT_BASE        0xfe000000
 #define SYSPLD_BASE             SYSPLD_VIRT_BASE
 
-#ifndef __ASSEMBLER__
-
-#define PCIO_BASE               IO_BASE
-
-#endif
-
-
 #if  defined (CONFIG_ARCH_AUTCPU12)
 
 #define  CS89712_VIRT_BASE      CLPS7111_VIRT_BASE
diff --git a/arch/arm/mach-gemini/Kconfig b/arch/arm/mach-gemini/Kconfig
index 515b75cf2e8b..6f066ee4bf24 100644
--- a/arch/arm/mach-gemini/Kconfig
+++ b/arch/arm/mach-gemini/Kconfig
@@ -2,6 +2,13 @@ if ARCH_GEMINI
 
 menu "Cortina Systems Gemini Implementations"
 
+config MACH_NAS4220B
+        bool "Raidsonic NAS-4220-B"
+        select GEMINI_MEM_SWAP
+        help
+          Say Y here if you intend to run this kernel on a
+          Raidsonic NAS-4220-B.
+
 config MACH_RUT100
         bool "Teltonika RUT100"
         select GEMINI_MEM_SWAP
@@ -9,6 +16,20 @@ config MACH_RUT100
           Say Y here if you intend to run this kernel on a
           Teltonika 3G Router RUT100.
 
+config MACH_WBD111
+        bool "Wiliboard WBD-111"
+        select GEMINI_MEM_SWAP
+        help
+          Say Y here if you intend to run this kernel on a
+          Wiliboard WBD-111.
+
+config MACH_WBD222
+        bool "Wiliboard WBD-222"
+        select GEMINI_MEM_SWAP
+        help
+          Say Y here if you intend to run this kernel on a
+          Wiliboard WBD-222.
+
 endmenu
 
 config GEMINI_MEM_SWAP
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile
index 719505b81821..c5b24b95a76e 100644
--- a/arch/arm/mach-gemini/Makefile
+++ b/arch/arm/mach-gemini/Makefile
@@ -7,4 +7,7 @@
 obj-y                   := irq.o mm.o time.o devices.o gpio.o
 
 # Board-specific support
+obj-$(CONFIG_MACH_NAS4220B)     += board-nas4220b.o
 obj-$(CONFIG_MACH_RUT100)       += board-rut1xx.o
+obj-$(CONFIG_MACH_WBD111)       += board-wbd111.o
+obj-$(CONFIG_MACH_WBD222)       += board-wbd222.o
diff --git a/arch/arm/mach-gemini/board-nas4220b.c b/arch/arm/mach-gemini/board-nas4220b.c
new file mode 100644
index 000000000000..01f1d6daab44
--- /dev/null
+++ b/arch/arm/mach-gemini/board-nas4220b.c
@@ -0,0 +1,111 @@
+/*
+ *  Support for Raidsonic NAS-4220-B
+ *
+ *  Copyright (C) 2009 Janos Laube <janos.dev@gmail.com>
+ *
+ * based on rut1xx.c
+ *  Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/mdio-gpio.h>
+#include <linux/io.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include <mach/hardware.h>
+#include <mach/global_reg.h>
+
+#include "common.h"
+
+static struct sys_timer ib4220b_timer = {
+        .init   = gemini_timer_init,
+};
+
+static struct gpio_led ib4220b_leds[] = {
+        {
+                .name                   = "nas4220b:orange:hdd",
+                .default_trigger        = "none",
+                .gpio                   = 60,
+        },
+        {
+                .name                   = "nas4220b:green:os",
+                .default_trigger        = "heartbeat",
+                .gpio                   = 62,
+        },
+};
+
+static struct gpio_led_platform_data ib4220b_leds_data = {
+        .num_leds       = ARRAY_SIZE(ib4220b_leds),
+        .leds           = ib4220b_leds,
+};
+
+static struct platform_device ib4220b_led_device = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &ib4220b_leds_data,
+        },
+};
+
+static struct gpio_keys_button ib4220b_keys[] = {
+        {
+                .code           = KEY_SETUP,
+                .gpio           = 61,
+                .active_low     = 1,
+                .desc           = "Backup Button",
+                .type           = EV_KEY,
+        },
+        {
+                .code           = KEY_RESTART,
+                .gpio           = 63,
+                .active_low     = 1,
+                .desc           = "Softreset Button",
+                .type           = EV_KEY,
+        },
+};
+
+static struct gpio_keys_platform_data ib4220b_keys_data = {
+        .buttons        = ib4220b_keys,
+        .nbuttons       = ARRAY_SIZE(ib4220b_keys),
+};
+
+static struct platform_device ib4220b_key_device = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &ib4220b_keys_data,
+        },
+};
+
+static void __init ib4220b_init(void)
+{
+        gemini_gpio_init();
+        platform_register_uart();
+        platform_register_pflash(SZ_16M, NULL, 0);
+        platform_device_register(&ib4220b_led_device);
+        platform_device_register(&ib4220b_key_device);
+}
+
+MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
+        .phys_io        = 0x7fffc000,
+        .io_pg_offst    = ((0xffffc000) >> 18) & 0xfffc,
+        .boot_params    = 0x100,
+        .map_io         = gemini_map_io,
+        .init_irq       = gemini_init_irq,
+        .timer          = &ib4220b_timer,
+        .init_machine   = ib4220b_init,
+MACHINE_END
diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c
new file mode 100644
index 000000000000..36538c15b3c4
--- /dev/null
+++ b/arch/arm/mach-gemini/board-wbd111.c
@@ -0,0 +1,143 @@
+/*
+ *  Support for Wiliboard WBD-111
+ *
+ *  Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/input.h>
+#include <linux/skbuff.h>
+#include <linux/gpio_keys.h>
+#include <linux/mdio-gpio.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+
+#include "common.h"
+
+static struct gpio_keys_button wbd111_keys[] = {
+        {
+                .code           = KEY_SETUP,
+                .gpio           = 5,
+                .active_low     = 1,
+                .desc           = "reset",
+                .type           = EV_KEY,
+        },
+};
+
+static struct gpio_keys_platform_data wbd111_keys_data = {
+        .buttons        = wbd111_keys,
+        .nbuttons       = ARRAY_SIZE(wbd111_keys),
+};
+
+static struct platform_device wbd111_keys_device = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &wbd111_keys_data,
+        },
+};
+
+static struct gpio_led wbd111_leds[] = {
+        {
+                .name                   = "L3red",
+                .gpio                   = 1,
+        },
+        {
+                .name                   = "L4green",
+                .gpio                   = 2,
+        },
+        {
+                .name                   = "L4red",
+                .gpio                   = 3,
+        },
+        {
+                .name                   = "L3green",
+                .gpio                   = 5,
+        },
+};
+
+static struct gpio_led_platform_data wbd111_leds_data = {
+        .num_leds       = ARRAY_SIZE(wbd111_leds),
+        .leds           = wbd111_leds,
+};
+
+static struct platform_device wbd111_leds_device = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &wbd111_leds_data,
+        },
+};
+
+static struct sys_timer wbd111_timer = {
+        .init   = gemini_timer_init,
+};
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition wbd111_partitions[] = {
+        {
+                .name           = "RedBoot",
+                .offset         = 0,
+                .size           = 0x020000,
+                .mask_flags     = MTD_WRITEABLE,
+        } , {
+                .name           = "kernel",
+                .offset         = 0x020000,
+                .size           = 0x100000,
+        } , {
+                .name           = "rootfs",
+                .offset         = 0x120000,
+                .size           = 0x6a0000,
+        } , {
+                .name           = "VCTL",
+                .offset         = 0x7c0000,
+                .size           = 0x010000,
+                .mask_flags     = MTD_WRITEABLE,
+        } , {
+                .name           = "cfg",
+                .offset         = 0x7d0000,
+                .size           = 0x010000,
+                .mask_flags     = MTD_WRITEABLE,
+        } , {
+                .name           = "FIS",
+                .offset         = 0x7e0000,
+                .size           = 0x010000,
+                .mask_flags     = MTD_WRITEABLE,
+        }
+};
+#define wbd111_num_partitions   ARRAY_SIZE(wbd111_partitions)
+#else
+#define wbd111_partitions       NULL
+#define wbd111_num_partitions   0
+#endif /* CONFIG_MTD_PARTITIONS */
+
+static void __init wbd111_init(void)
+{
+        gemini_gpio_init();
+        platform_register_uart();
+        platform_register_pflash(SZ_8M, wbd111_partitions,
+                                 wbd111_num_partitions);
+        platform_device_register(&wbd111_leds_device);
+        platform_device_register(&wbd111_keys_device);
+}
+
+MACHINE_START(WBD111, "Wiliboard WBD-111")
+        .phys_io        = 0x7fffc000,
+        .io_pg_offst    = ((0xffffc000) >> 18) & 0xfffc,
+        .boot_params    = 0x100,
+        .map_io         = gemini_map_io,
+        .init_irq       = gemini_init_irq,
+        .timer          = &wbd111_timer,
+        .init_machine   = wbd111_init,
+MACHINE_END
diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c
new file mode 100644
index 000000000000..ece8b4c65110
--- /dev/null
+++ b/arch/arm/mach-gemini/board-wbd222.c
@@ -0,0 +1,143 @@
+/*
+ *  Support for Wiliboard WBD-222
+ *
+ *  Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/input.h>
+#include <linux/skbuff.h>
+#include <linux/gpio_keys.h>
+#include <linux/mdio-gpio.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+
+#include "common.h"
+
+static struct gpio_keys_button wbd222_keys[] = {
+        {
+                .code           = KEY_SETUP,
+                .gpio           = 5,
+                .active_low     = 1,
+                .desc           = "reset",
+                .type           = EV_KEY,
+        },
+};
+
+static struct gpio_keys_platform_data wbd222_keys_data = {
+        .buttons        = wbd222_keys,
+        .nbuttons       = ARRAY_SIZE(wbd222_keys),
+};
+
+static struct platform_device wbd222_keys_device = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &wbd222_keys_data,
+        },
+};
+
+static struct gpio_led wbd222_leds[] = {
+        {
+                .name                   = "L3red",
+                .gpio                   = 1,
+        },
+        {
+                .name                   = "L4green",
+                .gpio                   = 2,
+        },
+        {
+                .name                   = "L4red",
+                .gpio                   = 3,
+        },
+        {
+                .name                   = "L3green",
+                .gpio                   = 5,
+        },
+};
+
+static struct gpio_led_platform_data wbd222_leds_data = {
+        .num_leds       = ARRAY_SIZE(wbd222_leds),
+        .leds           = wbd222_leds,
+};
+
+static struct platform_device wbd222_leds_device = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &wbd222_leds_data,
+        },
+};
+
+static struct sys_timer wbd222_timer = {
+        .init   = gemini_timer_init,
+};
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition wbd222_partitions[] = {
+        {
+                .name           = "RedBoot",
+                .offset         = 0,
+                .size           = 0x020000,
+                .mask_flags     = MTD_WRITEABLE,
+        } , {
+                .name           = "kernel",
+                .offset         = 0x020000,
+                .size           = 0x100000,
+        } , {
+                .name           = "rootfs",
+                .offset         = 0x120000,
+                .size           = 0x6a0000,
+        } , {
+                .name           = "VCTL",
+                .offset         = 0x7c0000,
+                .size           = 0x010000,
+                .mask_flags     = MTD_WRITEABLE,
+        } , {
+                .name           = "cfg",
+                .offset         = 0x7d0000,
+                .size           = 0x010000,
+                .mask_flags     = MTD_WRITEABLE,
+        } , {
+                .name           = "FIS",
+                .offset         = 0x7e0000,
+                .size           = 0x010000,
+                .mask_flags     = MTD_WRITEABLE,
+        }
+};
+#define wbd222_num_partitions   ARRAY_SIZE(wbd222_partitions)
+#else
+#define wbd222_partitions       NULL
+#define wbd222_num_partitions   0
+#endif /* CONFIG_MTD_PARTITIONS */
+
+static void __init wbd222_init(void)
+{
+        gemini_gpio_init();
+        platform_register_uart();
+        platform_register_pflash(SZ_8M, wbd222_partitions,
+                wbd222_num_partitions);
+        platform_device_register(&wbd222_leds_device);
+        platform_device_register(&wbd222_keys_device);
+}
+
+MACHINE_START(WBD222, "Wiliboard WBD-222")
+        .phys_io        = 0x7fffc000,
+        .io_pg_offst    = ((0xffffc000) >> 18) & 0xfffc,
+        .boot_params    = 0x100,
+        .map_io         = gemini_map_io,
+        .init_irq       = gemini_init_irq,
+        .timer          = &wbd222_timer,
+        .init_machine   = wbd222_init,
+MACHINE_END
diff --git a/arch/arm/mach-h720x/include/mach/hardware.h b/arch/arm/mach-h720x/include/mach/hardware.h
index 6c19156e2a42..c55a52c6541d 100644
--- a/arch/arm/mach-h720x/include/mach/hardware.h
+++ b/arch/arm/mach-h720x/include/mach/hardware.h
@@ -182,8 +182,6 @@
 #define SERIAL_ENABLE_EN        (1<<0)
 
 /* General defines to pacify gcc */
-#define PCIO_BASE               (0)     /* for inb, outb and friends */
-#define PCIO_VIRT               PCIO_BASE
 
 #define __ASM_ARCH_HARDWARE_INCMACH_H
 #include "boards.h"
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 6c92deaf468f..a389d1148f18 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -408,7 +408,7 @@ static void __init pca100_init(void)
         mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
         spi_register_board_info(pca100_spi_board_info,
                                 ARRAY_SIZE(pca100_spi_board_info));
-        imx27_add_spi_imx0(&pca100_spi_0_data);
+        imx27_add_spi_imx0(&pca100_spi0_data);
 #endif
 
         gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h
index 8e26360ce9a3..57f51ba11251 100644
--- a/arch/arm/mach-integrator/include/mach/hardware.h
+++ b/arch/arm/mach-integrator/include/mach/hardware.h
@@ -32,7 +32,6 @@
 #define IO_SIZE                 0x0B000000                 // How much?
 #define IO_START                INTEGRATOR_HDR_BASE        // PA of IO
 
-#define PCIO_BASE               PCI_IO_VADDR
 #define PCIMEM_BASE             PCI_MEMORY_VADDR
 
 #define pcibios_assign_all_busses()     1
diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h
index c3192009a886..57b508bfe280 100644
--- a/arch/arm/mach-ixp23xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp23xx/include/mach/hardware.h
@@ -15,7 +15,6 @@
 #define __ASM_ARCH_HARDWARE_H
 
 /* PCI IO info */
-#define PCIO_BASE               IXP23XX_PCI_IO_VIRT
 #define PCIBIOS_MIN_IO          0x00000000
 #define PCIBIOS_MIN_MEM         0xe0000000
 
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 9e5070da17ae..6f991c5ae863 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -140,6 +140,14 @@ config MACH_FSG
           FSG-3 device. For more information on this platform,
           see http://www.nslu2-linux.org/wiki/FSG3/HomePage
 
+config MACH_ARCOM_VULCAN
+        bool
+        prompt "Arcom/Eurotech Vulcan"
+        select PCI
+        help
+          Say 'Y' here if you want your kernel to support Arcom's
+          Vulcan board.
+
 #
 # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
 #
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index 47d1f60d23fa..d807fc367dd3 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -16,6 +16,7 @@ obj-pci-$(CONFIG_MACH_DSMG600)		+= dsmg600-pci.o
 obj-pci-$(CONFIG_MACH_GATEWAY7001)      += gateway7001-pci.o
 obj-pci-$(CONFIG_MACH_WG302V2)          += wg302v2-pci.o
 obj-pci-$(CONFIG_MACH_FSG)              += fsg-pci.o
+obj-pci-$(CONFIG_MACH_ARCOM_VULCAN)     += vulcan-pci.o
 
 obj-y   += common.o
 
@@ -31,6 +32,7 @@ obj-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-setup.o
 obj-$(CONFIG_MACH_WG302V2)      += wg302v2-setup.o
 obj-$(CONFIG_MACH_FSG)          += fsg-setup.o
 obj-$(CONFIG_MACH_GORAMO_MLR)   += goramo_mlr.o
+obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o
 
 obj-$(CONFIG_PCI)               += $(obj-pci-$(CONFIG_PCI)) common-pci.o
 obj-$(CONFIG_IXP4XX_QMGR)       += ixp4xx_qmgr.o
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index 893873eb2a0d..3fc66d6d00a0 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -16,8 +16,10 @@
                 moveq   \rx, #0xc8000000
                 movne   \rx, #0xff000000
                 orrne   \rx, \rx, #0x00b00000
+#ifdef __ARMEB__
                 add     \rx,\rx,#3              @ Uart regs are at off set of 3 if
                                                 @ byte writes used - Big Endian.
+#endif
                 .endm
 
 #define UART_SHIFT      2
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 6ea7e2fb2701..de274a1f19d7 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -353,7 +353,7 @@ static inline unsigned int ioread8(const void __iomem *addr)
                 return (unsigned int)inb(port & PIO_MASK);
         else
 #ifndef CONFIG_IXP4XX_INDIRECT_PCI
-                return (unsigned int)__raw_readb(port);
+                return (unsigned int)__raw_readb(addr);
 #else
                 return (unsigned int)__indirect_readb(addr);
 #endif
@@ -381,7 +381,7 @@ static inline unsigned int ioread16(const void __iomem *addr)
                 return  (unsigned int)inw(port & PIO_MASK);
         else
 #ifndef CONFIG_IXP4XX_INDIRECT_PCI
-                return le16_to_cpu(__raw_readw((u32)port));
+                return le16_to_cpu((__force __le16)__raw_readw(addr));
 #else
                 return (unsigned int)__indirect_readw(addr);
 #endif
@@ -440,7 +440,7 @@ static inline void iowrite8(u8 value, void __iomem *addr)
                 outb(value, port & PIO_MASK);
         else
 #ifndef CONFIG_IXP4XX_INDIRECT_PCI
-                __raw_writeb(value, port);
+                __raw_writeb(value, addr);
 #else
                 __indirect_writeb(value, addr);
 #endif
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
new file mode 100644
index 000000000000..f3111c6840ef
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -0,0 +1,73 @@
+/*
+ * arch/arch/mach-ixp4xx/vulcan-pci.c
+ *
+ * Vulcan board-level PCI initialization
+ *
+ * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
+ *
+ * based on ixdp425-pci.c:
+ *      Copyright (C) 2002 Intel Corporation.
+ *      Copyright (C) 2003-2004 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/mach/pci.h>
+#include <asm/mach-types.h>
+
+/* PCI controller GPIO to IRQ pin mappings */
+#define INTA    2
+#define INTB    3
+
+void __init vulcan_pci_preinit(void)
+{
+#ifndef CONFIG_IXP4XX_INDIRECT_PCI
+        /*
+         * Cardbus bridge wants way more than the SoC can actually offer,
+         * and leaves the whole PCI bus in a mess. Artificially limit it
+         * to 8MB per region. Of course indirect mode doesn't have this
+         * limitation...
+         */
+        pci_cardbus_mem_size = SZ_8M;
+        pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
+                (int)(pci_cardbus_mem_size >> 20));
+#endif
+        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        ixp4xx_pci_preinit();
+}
+
+static int __init vulcan_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+        if (slot == 1)
+                return IXP4XX_GPIO_IRQ(INTA);
+
+        if (slot == 2)
+                return IXP4XX_GPIO_IRQ(INTB);
+
+        return -1;
+}
+
+struct hw_pci vulcan_pci __initdata = {
+        .nr_controllers = 1,
+        .preinit        = vulcan_pci_preinit,
+        .swizzle        = pci_std_swizzle,
+        .setup          = ixp4xx_setup,
+        .scan           = ixp4xx_scan_bus,
+        .map_irq        = vulcan_map_irq,
+};
+
+int __init vulcan_pci_init(void)
+{
+        if (machine_is_arcom_vulcan())
+                pci_common_init(&vulcan_pci);
+        return 0;
+}
+
+subsys_initcall(vulcan_pci_init);
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
new file mode 100644
index 000000000000..465cc5cce687
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -0,0 +1,246 @@
+/*
+ * arch/arm/mach-ixp4xx/vulcan-setup.c
+ *
+ * Arcom/Eurotech Vulcan board-setup
+ *
+ * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
+ *
+ * based on fsg-setup.c:
+ *      Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
+ */
+
+#include <linux/if_ether.h>
+#include <linux/irq.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+#include <linux/io.h>
+#include <linux/w1-gpio.h>
+#include <linux/mtd/plat-ram.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+
+static struct flash_platform_data vulcan_flash_data = {
+        .map_name       = "cfi_probe",
+        .width          = 2,
+};
+
+static struct resource vulcan_flash_resource = {
+        .flags                  = IORESOURCE_MEM,
+};
+
+static struct platform_device vulcan_flash = {
+        .name                   = "IXP4XX-Flash",
+        .id                     = 0,
+        .dev = {
+                .platform_data  = &vulcan_flash_data,
+        },
+        .resource               = &vulcan_flash_resource,
+        .num_resources          = 1,
+};
+
+static struct platdata_mtd_ram vulcan_sram_data = {
+        .mapname        = "Vulcan SRAM",
+        .bankwidth      = 1,
+};
+
+static struct resource vulcan_sram_resource = {
+        .flags                  = IORESOURCE_MEM,
+};
+
+static struct platform_device vulcan_sram = {
+        .name                   = "mtd-ram",
+        .id                     = 0,
+        .dev = {
+                .platform_data  = &vulcan_sram_data,
+        },
+        .resource               = &vulcan_sram_resource,
+        .num_resources          = 1,
+};
+
+static struct resource vulcan_uart_resources[] = {
+        [0] = {
+                .start          = IXP4XX_UART1_BASE_PHYS,
+                .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = IXP4XX_UART2_BASE_PHYS,
+                .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
+                .flags          = IORESOURCE_MEM,
+        },
+        [2] = {
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct plat_serial8250_port vulcan_uart_data[] = {
+        [0] = {
+                .mapbase        = IXP4XX_UART1_BASE_PHYS,
+                .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
+                .irq            = IRQ_IXP4XX_UART1,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = IXP4XX_UART_XTAL,
+        },
+        [1] = {
+                .mapbase        = IXP4XX_UART2_BASE_PHYS,
+                .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
+                .irq            = IRQ_IXP4XX_UART2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = IXP4XX_UART_XTAL,
+        },
+        [2] = {
+                .irq            = IXP4XX_GPIO_IRQ(4),
+                .irqflags       = IRQF_TRIGGER_LOW,
+                .flags          = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+                .uartclk        = 1843200,
+        },
+        [3] = {
+                .irq            = IXP4XX_GPIO_IRQ(4),
+                .irqflags       = IRQF_TRIGGER_LOW,
+                .flags          = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+                .uartclk        = 1843200,
+        },
+        { }
+};
+
+static struct platform_device vulcan_uart = {
+        .name                   = "serial8250",
+        .id                     = PLAT8250_DEV_PLATFORM,
+        .dev = {
+                .platform_data  = vulcan_uart_data,
+        },
+        .resource               = vulcan_uart_resources,
+        .num_resources          = ARRAY_SIZE(vulcan_uart_resources),
+};
+
+static struct eth_plat_info vulcan_plat_eth[] = {
+        [0] = {
+                .phy            = 0,
+                .rxq            = 3,
+                .txreadyq       = 20,
+        },
+        [1] = {
+                .phy            = 1,
+                .rxq            = 4,
+                .txreadyq       = 21,
+        },
+};
+
+static struct platform_device vulcan_eth[] = {
+        [0] = {
+                .name                   = "ixp4xx_eth",
+                .id                     = IXP4XX_ETH_NPEB,
+                .dev = {
+                        .platform_data  = &vulcan_plat_eth[0],
+                },
+        },
+        [1] = {
+                .name                   = "ixp4xx_eth",
+                .id                     = IXP4XX_ETH_NPEC,
+                .dev = {
+                        .platform_data  = &vulcan_plat_eth[1],
+                },
+        },
+};
+
+static struct resource vulcan_max6369_resource = {
+        .flags                  = IORESOURCE_MEM,
+};
+
+static struct platform_device vulcan_max6369 = {
+        .name                   = "max6369_wdt",
+        .id                     = -1,
+        .resource               = &vulcan_max6369_resource,
+        .num_resources          = 1,
+};
+
+static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
+        .pin                    = 14,
+};
+
+static struct platform_device vulcan_w1_gpio = {
+        .name                   = "w1-gpio",
+        .id                     = 0,
+        .dev                    = {
+                .platform_data  = &vulcan_w1_gpio_pdata,
+        },
+};
+
+static struct platform_device *vulcan_devices[] __initdata = {
+        &vulcan_uart,
+        &vulcan_flash,
+        &vulcan_sram,
+        &vulcan_max6369,
+        &vulcan_eth[0],
+        &vulcan_eth[1],
+        &vulcan_w1_gpio,
+};
+
+static void __init vulcan_init(void)
+{
+        ixp4xx_sys_init();
+
+        /* Flash is spread over both CS0 and CS1 */
+        vulcan_flash_resource.start      = IXP4XX_EXP_BUS_BASE(0);
+        vulcan_flash_resource.end        = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
+        *IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN          |
+                          IXP4XX_EXP_BUS_STROBE_T(3)    |
+                          IXP4XX_EXP_BUS_SIZE(0xF)      |
+                          IXP4XX_EXP_BUS_BYTE_RD16      |
+                          IXP4XX_EXP_BUS_WR_EN;
+        *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
+
+        /* SRAM on CS2, (256kB, 8bit, writable) */
+        vulcan_sram_resource.start      = IXP4XX_EXP_BUS_BASE(2);
+        vulcan_sram_resource.end        = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
+        *IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN          |
+                          IXP4XX_EXP_BUS_STROBE_T(1)    |
+                          IXP4XX_EXP_BUS_HOLD_T(2)      |
+                          IXP4XX_EXP_BUS_SIZE(9)        |
+                          IXP4XX_EXP_BUS_SPLT_EN        |
+                          IXP4XX_EXP_BUS_WR_EN          |
+                          IXP4XX_EXP_BUS_BYTE_EN;
+
+        /* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
+        vulcan_uart_resources[2].start  = IXP4XX_EXP_BUS_BASE(3);
+        vulcan_uart_resources[2].end    = IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
+        vulcan_uart_data[2].mapbase     = vulcan_uart_resources[2].start;
+        vulcan_uart_data[3].mapbase     = vulcan_uart_data[2].mapbase + 8;
+        *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN          |
+                          IXP4XX_EXP_BUS_STROBE_T(3)    |
+                          IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
+                          IXP4XX_EXP_BUS_WR_EN          |
+                          IXP4XX_EXP_BUS_BYTE_EN;
+
+        /* GPIOS on CS4 (512 bytes, 8bits, writable) */
+        *IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN          |
+                          IXP4XX_EXP_BUS_WR_EN          |
+                          IXP4XX_EXP_BUS_BYTE_EN;
+
+        /* max6369 on CS5 (512 bytes, 8bits, writable) */
+        vulcan_max6369_resource.start   = IXP4XX_EXP_BUS_BASE(5);
+        vulcan_max6369_resource.end     = IXP4XX_EXP_BUS_BASE(5);
+        *IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN          |
+                          IXP4XX_EXP_BUS_WR_EN          |
+                          IXP4XX_EXP_BUS_BYTE_EN;
+
+        platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
+}
+
+MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
+        /* Maintainer: Marc Zyngier <maz@misterjones.org> */
+        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
+        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
+        .map_io         = ixp4xx_map_io,
+        .init_irq       = ixp4xx_init_irq,
+        .timer          = &ixp4xx_timer,
+        .boot_params    = 0x0100,
+        .init_machine   = vulcan_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 244655d323ea..0629394a5fb9 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -150,9 +150,8 @@ static void __init common_init(void)
 
 MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
@@ -160,9 +159,8 @@ MACHINE_END
 
 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 8c3fa5d14f4b..69bcba11f53f 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -42,9 +42,8 @@ static void __init avengers_lite_init(void)
 
 MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = avengers_lite_init,
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index e1e66c18b446..3b29fa7e9b08 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -31,7 +31,7 @@ static struct map_desc standard_io_desc[] __initdata = {
         },
 };
 
-void __init pxa_map_io(void)
+void __init mmp_map_io(void)
 {
         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 }
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index b4a0ba05a0f4..ec8d65ded25c 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -3,15 +3,6 @@
 struct sys_timer;
 
 extern void timer_init(int irq);
-extern void mmp2_clear_pmic_int(void);
-
-extern struct sys_timer pxa168_timer;
-extern struct sys_timer pxa910_timer;
-extern struct sys_timer mmp2_timer;
-extern void __init pxa168_init_irq(void);
-extern void __init pxa910_init_irq(void);
-extern void __init mmp2_init_icu(void);
-extern void __init mmp2_init_irq(void);
 
 extern void __init icu_init_irq(void);
-extern void __init pxa_map_io(void);
+extern void __init mmp_map_io(void);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 4ec7709a3462..e4312d238eae 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -114,9 +114,8 @@ static void __init flint_init(void)
 
 MACHINE_START(FLINT, "Flint Development Platform")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = flint_init,
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
index 1fa0a492454a..d0ec7dae88e4 100644
--- a/arch/arm/mach-mmp/include/mach/devices.h
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -1,3 +1,6 @@
+#ifndef __MACH_DEVICE_H
+#define __MACH_DEVICE_H
+
 #include <linux/types.h>
 
 #define MAX_RESOURCE_DMA        2
@@ -47,3 +50,4 @@ struct pxa_device_desc mmp2_device_##_name __initdata = {		\
 }
 
 extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
+#endif /* __MACH_DEVICE_H */
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index fec220bd5046..dbba6e8a60c4 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -1,6 +1,13 @@
 #ifndef __ASM_MACH_MMP2_H
 #define __ASM_MACH_MMP2_H
 
+struct sys_timer;
+
+extern struct sys_timer mmp2_timer;
+extern void __init mmp2_init_icu(void);
+extern void __init mmp2_init_irq(void);
+extern void mmp2_clear_pmic_int(void);
+
 #include <linux/i2c.h>
 #include <mach/devices.h>
 #include <plat/i2c.h>
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 3b2bd5d5eb05..27e1bc758623 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -1,6 +1,11 @@
 #ifndef __ASM_MACH_PXA168_H
 #define __ASM_MACH_PXA168_H
 
+struct sys_timer;
+
+extern struct sys_timer pxa168_timer;
+extern void __init pxa168_init_irq(void);
+
 #include <linux/i2c.h>
 #include <mach/devices.h>
 #include <plat/i2c.h>
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 4f0b4ec6f5d0..f13c49d6f8dc 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -1,6 +1,11 @@
 #ifndef __ASM_MACH_PXA910_H
 #define __ASM_MACH_PXA910_H
 
+struct sys_timer;
+
+extern struct sys_timer pxa910_timer;
+extern void __init pxa910_init_irq(void);
+
 #include <linux/i2c.h>
 #include <mach/devices.h>
 #include <plat/i2c.h>
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index cb18221c0af3..01342be91c3c 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 
 #include <mach/regs-icu.h>
+#include <mach/mmp2.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index d77dd41d60e1..80c3e7ab1e17 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -135,9 +135,8 @@ static void __init jasper_init(void)
 
 MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = jasper_init,
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 7f5eb059bb01..daf3993349f8 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -17,6 +17,7 @@
 
 #include <asm/hardware/cache-tauros2.h>
 
+#include <asm/mach/time.h>
 #include <mach/addr-map.h>
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
@@ -26,6 +27,7 @@
 #include <mach/mfp.h>
 #include <mach/gpio.h>
 #include <mach/devices.h>
+#include <mach/mmp2.h>
 
 #include "common.h"
 #include "clock.h"
@@ -158,6 +160,26 @@ static int __init mmp2_init(void)
 }
 postcore_initcall(mmp2_init);
 
+static void __init mmp2_timer_init(void)
+{
+        unsigned long clk_rst;
+
+        __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
+
+        /*
+         * enable bus/functional clock, enable 6.5MHz (divider 4),
+         * release reset
+         */
+        clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
+        __raw_writel(clk_rst, APBC_MMP2_TIMERS);
+
+        timer_init(IRQ_MMP2_TIMER1);
+}
+
+struct sys_timer mmp2_timer = {
+        .init   = mmp2_timer_init,
+};
+
 /* on-chip devices */
 MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
 MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 0e0c9220eaba..e81db7428215 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -100,9 +100,8 @@ static void __init tavorevb_init(void)
 
 MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = tavorevb_init,
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index cf75694e9687..66528193f939 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -200,24 +200,3 @@ void __init timer_init(int irq)
         clocksource_register(&cksrc);
         clockevents_register_device(&ckevt);
 }
-
-static void __init mmp2_timer_init(void)
-{
-        unsigned long clk_rst;
-
-        __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
-
-        /*
-         * enable bus/functional clock, enable 6.5MHz (divider 4),
-         * release reset
-         */
-        clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
-        __raw_writel(clk_rst, APBC_MMP2_TIMERS);
-
-        timer_init(IRQ_MMP2_TIMER1);
-}
-
-struct sys_timer mmp2_timer = {
-        .init   = mmp2_timer_init,
-};
-
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index b22dec4abf78..ee65e05f0cf1 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -123,9 +123,8 @@ static void __init ttc_dkb_init(void)
 
 MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
         .phys_io        = APB_PHYS_BASE,
-        .boot_params    = 0x00000100,
         .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
+        .map_io         = mmp_map_io,
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = ttc_dkb_init,
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 7ff8020d4d24..704610648a25 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
 obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
 obj-$(CONFIG_MSM_SMD) += last_radio_log.o
 
-obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o devices-msm7x00.o
+obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
 obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o
 obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
 obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
diff --git a/arch/arm/mach-msm/acpuclock-arm11.c b/arch/arm/mach-msm/acpuclock-arm11.c
index f060a3959a75..7ffbd987eb5d 100644
--- a/arch/arm/mach-msm/acpuclock-arm11.c
+++ b/arch/arm/mach-msm/acpuclock-arm11.c
@@ -17,7 +17,6 @@
  *
  */
 
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/list.h>
diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c
index 523d213bf79e..c50f3afc3134 100644
--- a/arch/arm/mach-msm/board-trout-gpio.c
+++ b/arch/arm/mach-msm/board-trout-gpio.c
@@ -15,10 +15,20 @@
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/interrupt.h>
 #include <linux/gpio.h>
 
 #include "board-trout.h"
 
+static uint8_t trout_int_mask[2] = {
+        [0] = 0xff, /* mask all interrupts */
+        [1] = 0xff,
+};
+static uint8_t trout_sleep_int_mask[] = {
+        [0] = 0xff,
+        [1] = 0xff,
+};
+
 struct msm_gpio_chip {
         struct gpio_chip        chip;
         void __iomem            *reg;   /* Base of register bank */
@@ -95,16 +105,121 @@ static struct msm_gpio_chip msm_gpio_banks[] = {
         TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0),
 };
 
+static void trout_gpio_irq_ack(unsigned int irq)
+{
+        int bank = TROUT_INT_TO_BANK(irq);
+        uint8_t mask = TROUT_INT_TO_MASK(irq);
+        int reg = TROUT_BANK_TO_STAT_REG(bank);
+        /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/
+        writeb(mask, TROUT_CPLD_BASE + reg);
+}
+
+static void trout_gpio_irq_mask(unsigned int irq)
+{
+        unsigned long flags;
+        uint8_t reg_val;
+        int bank = TROUT_INT_TO_BANK(irq);
+        uint8_t mask = TROUT_INT_TO_MASK(irq);
+        int reg = TROUT_BANK_TO_MASK_REG(bank);
+
+        local_irq_save(flags);
+        reg_val = trout_int_mask[bank] |= mask;
+        /*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n",
+               irq, bank, reg_val);*/
+        writeb(reg_val, TROUT_CPLD_BASE + reg);
+        local_irq_restore(flags);
+}
+
+static void trout_gpio_irq_unmask(unsigned int irq)
+{
+        unsigned long flags;
+        uint8_t reg_val;
+        int bank = TROUT_INT_TO_BANK(irq);
+        uint8_t mask = TROUT_INT_TO_MASK(irq);
+        int reg = TROUT_BANK_TO_MASK_REG(bank);
+
+        local_irq_save(flags);
+        reg_val = trout_int_mask[bank] &= ~mask;
+        /*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n",
+               irq, bank, reg_val);*/
+        writeb(reg_val, TROUT_CPLD_BASE + reg);
+        local_irq_restore(flags);
+}
+
+int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+{
+        unsigned long flags;
+        int bank = TROUT_INT_TO_BANK(irq);
+        uint8_t mask = TROUT_INT_TO_MASK(irq);
+
+        local_irq_save(flags);
+        if(on)
+                trout_sleep_int_mask[bank] &= ~mask;
+        else
+                trout_sleep_int_mask[bank] |= mask;
+        local_irq_restore(flags);
+        return 0;
+}
+
+static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        int j, m;
+        unsigned v;
+        int bank;
+        int stat_reg;
+        int int_base = TROUT_INT_START;
+        uint8_t int_mask;
+
+        for (bank = 0; bank < 2; bank++) {
+                stat_reg = TROUT_BANK_TO_STAT_REG(bank);
+                v = readb(TROUT_CPLD_BASE + stat_reg);
+                int_mask = trout_int_mask[bank];
+                if (v & int_mask) {
+                        writeb(v & int_mask, TROUT_CPLD_BASE + stat_reg);
+                        printk(KERN_ERR "trout_gpio_irq_handler: got masked "
+                               "interrupt: %d:%02x\n", bank, v & int_mask);
+                }
+                v &= ~int_mask;
+                while (v) {
+                        m = v & -v;
+                        j = fls(m) - 1;
+                        /*printk(KERN_INFO "msm_gpio_irq_handler %d:%02x %02x b"
+                               "it %d irq %d\n", bank, v, m, j, int_base + j);*/
+                        v &= ~m;
+                        generic_handle_irq(int_base + j);
+                }
+                int_base += TROUT_INT_BANK0_COUNT;
+        }
+        desc->chip->ack(irq);
+}
+
+static struct irq_chip trout_gpio_irq_chip = {
+        .name      = "troutgpio",
+        .ack       = trout_gpio_irq_ack,
+        .mask      = trout_gpio_irq_mask,
+        .unmask    = trout_gpio_irq_unmask,
+        .set_wake  = trout_gpio_irq_set_wake,
+};
+
 /*
  * Called from the processor-specific init to enable GPIO pin support.
  */
 int __init trout_init_gpio(void)
 {
         int i;
+        for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
+                set_irq_chip(i, &trout_gpio_irq_chip);
+                set_irq_handler(i, handle_edge_irq);
+                set_irq_flags(i, IRQF_VALID);
+        }
 
         for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
                 gpiochip_add(&msm_gpio_banks[i].chip);
 
+        set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
+        set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
+        set_irq_wake(MSM_GPIO_TO_INT(17), 1);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c
new file mode 100644
index 000000000000..44be8464657b
--- /dev/null
+++ b/arch/arm/mach-msm/board-trout-mmc.c
@@ -0,0 +1,186 @@
+/* linux/arch/arm/mach-msm/board-trout-mmc.c
+** Author: Brian Swetland <swetland@google.com>
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/err.h>
+#include <linux/debugfs.h>
+
+#include <asm/gpio.h>
+#include <asm/io.h>
+
+#include <mach/vreg.h>
+
+#include <mach/mmc.h>
+
+#include "devices.h"
+
+#include "board-trout.h"
+
+#include "proc_comm.h"
+
+#define DEBUG_SDSLOT_VDD 1
+
+/* ---- COMMON ---- */
+static void config_gpio_table(uint32_t *table, int len)
+{
+        int n;
+        unsigned id;
+        for(n = 0; n < len; n++) {
+                id = table[n];
+                msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0);
+        }
+}
+
+/* ---- SDCARD ---- */
+
+static uint32_t sdcard_on_gpio_table[] = {
+        PCOM_GPIO_CFG(62, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), /* CLK */
+        PCOM_GPIO_CFG(63, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* CMD */
+        PCOM_GPIO_CFG(64, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT3 */
+        PCOM_GPIO_CFG(65, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT2 */
+        PCOM_GPIO_CFG(66, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT1 */
+        PCOM_GPIO_CFG(67, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT0 */
+};
+
+static uint32_t sdcard_off_gpio_table[] = {
+        PCOM_GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CLK */
+        PCOM_GPIO_CFG(63, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CMD */
+        PCOM_GPIO_CFG(64, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT3 */
+        PCOM_GPIO_CFG(65, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT2 */
+        PCOM_GPIO_CFG(66, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT1 */
+        PCOM_GPIO_CFG(67, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT0 */
+};
+
+static uint opt_disable_sdcard;
+
+static int __init trout_disablesdcard_setup(char *str)
+{
+        int cal = simple_strtol(str, NULL, 0);
+        
+        opt_disable_sdcard = cal;
+        return 1;
+}
+
+__setup("board_trout.disable_sdcard=", trout_disablesdcard_setup);
+
+static struct vreg *vreg_sdslot;        /* SD slot power */
+
+struct mmc_vdd_xlat {
+        int mask;
+        int level;
+};
+
+static struct mmc_vdd_xlat mmc_vdd_table[] = {
+        { MMC_VDD_165_195,      1800 },
+        { MMC_VDD_20_21,        2050 },
+        { MMC_VDD_21_22,        2150 },
+        { MMC_VDD_22_23,        2250 },
+        { MMC_VDD_23_24,        2350 },
+        { MMC_VDD_24_25,        2450 },
+        { MMC_VDD_25_26,        2550 },
+        { MMC_VDD_26_27,        2650 },
+        { MMC_VDD_27_28,        2750 },
+        { MMC_VDD_28_29,        2850 },
+        { MMC_VDD_29_30,        2950 },
+};
+
+static unsigned int sdslot_vdd = 0xffffffff;
+static unsigned int sdslot_vreg_enabled;
+
+static uint32_t trout_sdslot_switchvdd(struct device *dev, unsigned int vdd)
+{
+        int i, rc;
+
+        BUG_ON(!vreg_sdslot);
+
+        if (vdd == sdslot_vdd)
+                return 0;
+
+        sdslot_vdd = vdd;
+
+        if (vdd == 0) {
+#if DEBUG_SDSLOT_VDD
+                printk("%s: Disabling SD slot power\n", __func__);
+#endif
+                config_gpio_table(sdcard_off_gpio_table,
+                                  ARRAY_SIZE(sdcard_off_gpio_table));
+                vreg_disable(vreg_sdslot);
+                sdslot_vreg_enabled = 0;
+                return 0;
+        }
+
+        if (!sdslot_vreg_enabled) {
+                rc = vreg_enable(vreg_sdslot);
+                if (rc) {
+                        printk(KERN_ERR "%s: Error enabling vreg (%d)\n",
+                               __func__, rc);
+                }
+                config_gpio_table(sdcard_on_gpio_table,
+                                  ARRAY_SIZE(sdcard_on_gpio_table));
+                sdslot_vreg_enabled = 1;
+        }
+
+        for (i = 0; i < ARRAY_SIZE(mmc_vdd_table); i++) {
+                if (mmc_vdd_table[i].mask == (1 << vdd)) {
+#if DEBUG_SDSLOT_VDD
+                        printk("%s: Setting level to %u\n",
+                                __func__, mmc_vdd_table[i].level);
+#endif
+                        rc = vreg_set_level(vreg_sdslot,
+                                            mmc_vdd_table[i].level);
+                        if (rc) {
+                                printk(KERN_ERR
+                                       "%s: Error setting vreg level (%d)\n",
+                                       __func__, rc);
+                        }
+                        return 0;
+                }
+        }
+
+        printk(KERN_ERR "%s: Invalid VDD %d specified\n", __func__, vdd);
+        return 0;
+}
+
+static unsigned int trout_sdslot_status(struct device *dev)
+{
+        unsigned int status;
+
+        status = (unsigned int) gpio_get_value(TROUT_GPIO_SDMC_CD_N);
+        return (!status);
+}
+
+#define TROUT_MMC_VDD   MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \
+                        | MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \
+                        | MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \
+                        | MMC_VDD_28_29 | MMC_VDD_29_30
+
+static struct msm_mmc_platform_data trout_sdslot_data = {
+        .ocr_mask       = TROUT_MMC_VDD,
+        .status         = trout_sdslot_status,
+        .translate_vdd  = trout_sdslot_switchvdd,
+};
+
+int __init trout_init_mmc(unsigned int sys_rev)
+{
+        sdslot_vreg_enabled = 0;
+
+        vreg_sdslot = vreg_get(0, "gp6");
+        if (IS_ERR(vreg_sdslot))
+                return PTR_ERR(vreg_sdslot);
+
+        set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
+
+        if (!opt_disable_sdcard)
+                msm_add_sdcc(2, &trout_sdslot_data,
+                             TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 0);
+        else
+                printk(KERN_INFO "trout: SD-Card interface disabled\n");
+        return 0;
+}
+
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index e69a1502e4e8..469e0be3499d 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -30,6 +30,8 @@
 #include "devices.h"
 #include "board-trout.h"
 
+extern int trout_init_mmc(unsigned int);
+
 static struct platform_device *devices[] __initdata = {
         &msm_device_uart3,
         &msm_device_smd,
@@ -55,7 +57,16 @@ static void __init trout_fixup(struct machine_desc *desc, struct tag *tags,
 
 static void __init trout_init(void)
 {
+        int rc;
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
+
+#ifdef CONFIG_MMC
+        rc = trout_init_mmc(system_rev);
+        if (rc)
+                printk(KERN_CRIT "%s: MMC init failure (%d)\n", __func__, rc);
+#endif
+
 }
 
 static struct map_desc trout_io_desc[] __initdata = {
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 9cb1276ab749..c57210f4f06a 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -14,7 +14,6 @@
  *
  */
 
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/module.h>
diff --git a/arch/arm/mach-msm/devices-msm7x00.c b/arch/arm/mach-msm/devices-msm7x00.c
index fde9d8f69f10..4e8c0bcdc92d 100644
--- a/arch/arm/mach-msm/devices-msm7x00.c
+++ b/arch/arm/mach-msm/devices-msm7x00.c
@@ -322,7 +322,8 @@ static struct platform_device *msm_sdcc_devices[] __initdata = {
         &msm_device_sdc4,
 };
 
-int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat,
+int __init msm_add_sdcc(unsigned int controller,
+                        struct msm_mmc_platform_data *plat,
                         unsigned int stat_irq, unsigned long stat_irq_flags)
 {
         struct platform_device  *pdev;
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index e302fbdc439b..5a79bcf50413 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -18,6 +18,7 @@
 #define __ASM_ARCH_MSM_BOARD_H
 
 #include <linux/types.h>
+#include <mach/mmc.h>
 
 /* platform device data structures */
 
@@ -40,5 +41,8 @@ void __init msm_init_irq(void);
 void __init msm_init_gpio(void);
 void __init msm_clock_init(struct clk *clock_tbl, unsigned num_clocks);
 void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *);
+int __init msm_add_sdcc(unsigned int controller,
+                        struct msm_mmc_platform_data *plat,
+                        unsigned int stat_irq, unsigned long stat_irq_flags);
 
 #endif
diff --git a/arch/arm/mach-msm/include/mach/mmc.h b/arch/arm/mach-msm/include/mach/mmc.h
index 0ecf25426284..d54b6b086cff 100644
--- a/arch/arm/mach-msm/include/mach/mmc.h
+++ b/arch/arm/mach-msm/include/mach/mmc.h
@@ -15,7 +15,7 @@ struct embedded_sdio_data {
         int num_funcs;
 };
 
-struct mmc_platform_data {
+struct msm_mmc_platform_data {
         unsigned int ocr_mask;                  /* available voltages */
         u32 (*translate_vdd)(struct device *, unsigned int);
         unsigned int (*status)(struct device *);
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index cf11d414b425..f07dc7c738f0 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -997,7 +997,7 @@ int smd_core_init(void)
         return 0;
 }
 
-static int __init msm_smd_probe(struct platform_device *pdev)
+static int __devinit msm_smd_probe(struct platform_device *pdev)
 {
         pr_info("smd_init()\n");
 
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 55836fa35060..dd3af2be13be 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -32,6 +32,7 @@
 #include <linux/input.h>
 #include <linux/input/matrix_keypad.h>
 #include <linux/gpio_keys.h>
+#include <linux/mmc/card.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -258,6 +259,20 @@ static struct platform_device pandora_dss_device = {
         },
 };
 
+static void pandora_wl1251_init_card(struct mmc_card *card)
+{
+        /*
+         * We have TI wl1251 attached to MMC3. Pass this information to
+         * SDIO core because it can't be probed by normal methods.
+         */
+        card->quirks |= MMC_QUIRK_NONSTD_SDIO;
+        card->cccr.wide_bus = 1;
+        card->cis.vendor = 0x104c;
+        card->cis.device = 0x9066;
+        card->cis.blksize = 512;
+        card->cis.max_dtr = 20000000;
+}
+
 static struct omap2_hsmmc_info omap3pandora_mmc[] = {
         {
                 .mmc            = 1,
@@ -279,6 +294,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
                 .wires          = 4,
                 .gpio_cd        = -EINVAL,
                 .gpio_wp        = -EINVAL,
+                .init_card      = pandora_wl1251_init_card,
         },
         {}      /* Terminator */
 };
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 1ef54b036103..c8f647b6205e 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -268,6 +268,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
                 mmc->slots[0].gpio_wp = c->gpio_wp;
 
                 mmc->slots[0].remux = c->remux;
+                mmc->slots[0].init_card = c->init_card;
 
                 if (c->cover_only)
                         mmc->slots[0].cover = 1;
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index 36f0ba8d89e2..1fe6f0187177 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -6,6 +6,8 @@
  * published by the Free Software Foundation.
  */
 
+struct mmc_card;
+
 struct omap2_hsmmc_info {
         u8      mmc;            /* controller 1/2/3 */
         u8      wires;          /* 1/4/8 wires */
@@ -23,6 +25,8 @@ struct omap2_hsmmc_info {
         int     ocr_mask;       /* temporary HACK */
         /* Remux (pad configuation) when powering on/off */
         void (*remux)(struct device *dev, int slot, int power_on);
+        /* init some special card */
+        void (*init_card)(struct mmc_card *card);
 };
 
 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 3b51741a4810..7aefb9074852 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -238,6 +238,17 @@ config MACH_COLIBRI
         bool "Toradex Colibri PXA270"
         select PXA27x
 
+config MACH_COLIBRI_PXA270_EVALBOARD
+        bool "Toradex Colibri Evaluation Carrier Board support (PXA270)"
+        depends on MACH_COLIBRI
+
+config MACH_COLIBRI_PXA270_INCOME
+        bool "Income s.r.o. PXA270 SBC"
+        depends on MACH_COLIBRI
+        select PXA27x
+        select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
+
 config MACH_COLIBRI300
         bool "Toradex Colibri PXA300/310"
         select PXA3xx
@@ -336,6 +347,9 @@ config ARCH_PXA_PALM
         bool "PXA based Palm PDAs"
         select HAVE_PWM
 
+config MACH_PALM27X
+        bool
+
 config MACH_PALMTE2
         bool "Palm Tungsten|E2"
         default y
@@ -360,6 +374,7 @@ config MACH_PALMT5
         depends on ARCH_PXA_PALM
         select PXA27x
         select IWMMXT
+        select MACH_PALM27X
         help
           Say Y here if you intend to run this kernel on a Palm Tungsten|T5
           handheld computer.
@@ -370,6 +385,7 @@ config MACH_PALMTX
         depends on ARCH_PXA_PALM
         select PXA27x
         select IWMMXT
+        select MACH_PALM27X
         help
           Say Y here if you intend to run this kernel on a Palm T|X
           handheld computer.
@@ -380,6 +396,7 @@ config MACH_PALMZ72
         depends on ARCH_PXA_PALM
         select PXA27x
         select IWMMXT
+        select MACH_PALM27X
         help
           Say Y here if you intend to run this kernel on Palm Zire 72
           handheld computer.
@@ -390,6 +407,7 @@ config MACH_PALMLD
         depends on ARCH_PXA_PALM
         select PXA27x
         select IWMMXT
+        select MACH_PALM27X
         help
           Say Y here if you intend to run this kernel on a Palm LifeDrive
           handheld computer.
@@ -447,16 +465,13 @@ config PXA_SHARPSL
           SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
           handheld computer.
 
-config SHARPSL_PM
-        bool
-        select APM_EMULATION
-        select SHARPSL_PM_MAX1111
-
-config SHARPSL_PM_MAX1111
-        bool
-        depends on !CORGI_SSP_DEPRECATED
-        select HWMON
-        select SENSORS_MAX1111
+config PXA_SHARPSL_DETECT_MACH_ID
+        bool "Detect machine ID at run-time in the decompressor"
+        depends on PXA_SHARPSL
+        help
+          Say Y here if you want the zImage decompressor to detect
+          the Zaurus machine ID at run-time. For latest kexec-based
+          boot loader, this is not necessary.
 
 config MACH_POODLE
         bool "Enable Sharp SL-5600 (Poodle) Support"
@@ -510,6 +525,25 @@ config MACH_TOSA
         select PXA25x
         select PXA_HAVE_BOARD_IRQS
 
+config TOSA_BT
+        tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
+        depends on MACH_TOSA
+        select RFKILL
+        help
+          This is a simple driver that is able to control
+          the state of built in bluetooth chip on tosa.
+
+config TOSA_USE_EXT_KEYCODES
+        bool "Tosa keyboard: use extended keycodes"
+        depends on MACH_TOSA
+        default n
+        help
+          Say Y here to enable the tosa keyboard driver to generate extended
+          (>= 127) keycodes. Be aware, that they can't be correctly interpreted
+          by either console keyboard driver or by Kdrive keybd driver.
+
+          Say Y only if you know, what you are doing!
+
 config MACH_ICONTROL
         bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM"
         select CPU_PXA320
@@ -648,25 +682,15 @@ config PXA_SHARP_Cxx00
         help
           Enable common support for Sharp Cxx00 models
 
-config TOSA_BT
-        tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
-        depends on MACH_TOSA
-        select RFKILL
-        help
-          This is a simple driver that is able to control
-          the state of built in bluetooth chip on tosa.
-
-config TOSA_USE_EXT_KEYCODES
-        bool "Tosa keyboard: use extended keycodes"
-        depends on MACH_TOSA
-        default n
-        help
-          Say Y here to enable the tosa keyboard driver to generate extended
-          (>= 127) keycodes. Be aware, that they can't be correctly interpreted
-          by either console keyboard driver or by Kdrive keybd driver.
-
-          Say Y only if you know, what you are doing!
+config SHARPSL_PM
+        bool
+        select APM_EMULATION
+        select SHARPSL_PM_MAX1111
 
+config SHARPSL_PM_MAX1111
+        bool
+        select HWMON
+        select SENSORS_MAX1111
 
 config PXA_HAVE_BOARD_IRQS
         bool
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index b8f1f4bc7ca7..85c7fb324dbb 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -51,14 +51,16 @@ obj-$(CONFIG_MACH_CAPC7117)     += capc7117.o mxm8x10.o
 obj-$(CONFIG_ARCH_GUMSTIX)      += gumstix.o
 obj-$(CONFIG_GUMSTIX_AM200EPD)  += am200epd.o
 obj-$(CONFIG_GUMSTIX_AM300EPD)  += am300epd.o
-obj-$(CONFIG_MACH_INTELMOTE2)   += imote2.o
+obj-$(CONFIG_MACH_INTELMOTE2)   += stargate2.o
 obj-$(CONFIG_MACH_STARGATE2)    += stargate2.o
 obj-$(CONFIG_MACH_XCEP)         += xcep.o
 obj-$(CONFIG_MACH_TRIZEPS4)     += trizeps4.o
 obj-$(CONFIG_MACH_LOGICPD_PXA270)       += lpd270.o
 obj-$(CONFIG_MACH_PCM027)               += pcm027.o
 obj-$(CONFIG_MACH_PCM990_BASEBOARD)     += pcm990-baseboard.o
-obj-$(CONFIG_MACH_COLIBRI)      += colibri-pxa270.o
+obj-$(CONFIG_MACH_COLIBRI)                      += colibri-pxa270.o
+obj-$(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD)     += colibri-pxa270-evalboard.o
+obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME)        += colibri-pxa270-income.o
 obj-$(CONFIG_MACH_COLIBRI300)   += colibri-pxa3xx.o colibri-pxa300.o
 obj-$(CONFIG_MACH_COLIBRI320)   += colibri-pxa3xx.o colibri-pxa320.o
 obj-$(CONFIG_MACH_VPAC270)      += vpac270.o
@@ -73,6 +75,7 @@ obj-$(CONFIG_PXA_EZX)           += ezx.o
 obj-$(CONFIG_MACH_MP900C)       += mp900.o
 obj-$(CONFIG_MACH_PALMTE2)      += palmte2.o
 obj-$(CONFIG_MACH_PALMTC)       += palmtc.o
+obj-$(CONFIG_MACH_PALM27X)      += palm27x.o
 obj-$(CONFIG_MACH_PALMT5)       += palmt5.o
 obj-$(CONFIG_MACH_PALMTX)       += palmtx.o
 obj-$(CONFIG_MACH_PALMZ72)      += palmz72.o
@@ -84,12 +87,6 @@ obj-$(CONFIG_MACH_POODLE)	+= poodle.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
 obj-$(CONFIG_MACH_ICONTROL)     += icontrol.o mxm8x10.o
 obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o
-obj-$(CONFIG_MACH_E330)         += e330.o
-obj-$(CONFIG_MACH_E350)         += e350.o
-obj-$(CONFIG_MACH_E740)         += e740.o
-obj-$(CONFIG_MACH_E750)         += e750.o
-obj-$(CONFIG_MACH_E400)         += e400.o
-obj-$(CONFIG_MACH_E800)         += e800.o
 obj-$(CONFIG_MACH_RAUMFELD_RC)          += raumfeld.o
 obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR)   += raumfeld.o
 obj-$(CONFIG_MACH_RAUMFELD_SPEAKER)     += raumfeld.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index f3b5ace815e5..9041340fee1d 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -22,9 +22,14 @@
 #include <linux/fb.h>
 #include <linux/gpio.h>
 #include <linux/ioport.h>
+#include <linux/ucb1400.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/types.h>
+#include <linux/i2c/pcf857x.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/physmap.h>
+#include <linux/regulator/max1586.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -51,6 +56,59 @@
 #include "generic.h"
 #include "devices.h"
 
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long balloon3_pin_config[] __initdata = {
+        /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* Reset, configured as GPIO wakeup source */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
+
+        /* LEDs */
+        GPIO9_GPIO,     /* NAND activity LED */
+        GPIO10_GPIO,    /* Heartbeat LED */
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO113_AC97_nRESET,
+        GPIO95_GPIO,
+
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+
+        /* USB Host */
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+
+        /* PC Card */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO85_nPCE_1,
+        GPIO54_nPCE_2,
+        GPIO79_PSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+};
+
+/******************************************************************************
+ * Compatibility: Parameter parsing
+ ******************************************************************************/
 static unsigned long balloon3_irq_enabled;
 
 static unsigned long balloon3_features_present =
@@ -73,6 +131,321 @@ int __init parse_balloon3_features(char *arg)
 }
 early_param("balloon3_features", parse_balloon3_features);
 
+/******************************************************************************
+ * NOR Flash
+ ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition balloon3_nor_partitions[] = {
+        {
+                .name           = "Flash",
+                .offset         = 0x00000000,
+                .size           = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct physmap_flash_data balloon3_flash_data[] = {
+        {
+                .width          = 2,    /* bankwidth in bytes */
+                .parts          = balloon3_nor_partitions,
+                .nr_parts       = ARRAY_SIZE(balloon3_nor_partitions)
+        }
+};
+
+static struct resource balloon3_flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_64M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device balloon3_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .resource       = &balloon3_flash_resource,
+        .num_resources  = 1,
+        .dev            = {
+                .platform_data = balloon3_flash_data,
+        },
+};
+static void __init balloon3_nor_init(void)
+{
+        platform_device_register(&balloon3_flash);
+}
+#else
+static inline void balloon3_nor_init(void) {}
+#endif
+
+/******************************************************************************
+ * Audio and Touchscreen
+ ******************************************************************************/
+#if     defined(CONFIG_TOUCHSCREEN_UCB1400) || \
+        defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
+static struct ucb1400_pdata vpac270_ucb1400_pdata = {
+        .irq            = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ),
+};
+
+
+static struct platform_device balloon3_ucb1400_device = {
+        .name           = "ucb1400_core",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &vpac270_ucb1400_pdata,
+        },
+};
+
+static void __init balloon3_ts_init(void)
+{
+        if (!balloon3_has(BALLOON3_FEATURE_AUDIO))
+                return;
+
+        pxa_set_ac97_info(NULL);
+        platform_device_register(&balloon3_ucb1400_device);
+}
+#else
+static inline void balloon3_ts_init(void) {}
+#endif
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct pxafb_mode_info balloon3_lcd_modes[] = {
+        {
+                .pixclock               = 38000,
+                .xres                   = 480,
+                .yres                   = 640,
+                .bpp                    = 16,
+                .hsync_len              = 8,
+                .left_margin            = 8,
+                .right_margin           = 8,
+                .vsync_len              = 2,
+                .upper_margin           = 4,
+                .lower_margin           = 5,
+                .sync                   = 0,
+        },
+};
+
+static struct pxafb_mach_info balloon3_lcd_screen = {
+        .modes                  = balloon3_lcd_modes,
+        .num_modes              = ARRAY_SIZE(balloon3_lcd_modes),
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static void balloon3_backlight_power(int on)
+{
+        gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
+}
+
+static void __init balloon3_lcd_init(void)
+{
+        int ret;
+
+        if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY))
+                return;
+
+        ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON");
+        if (ret) {
+                pr_err("Requesting BKL-ON GPIO failed!\n");
+                goto err;
+        }
+
+        ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
+        if (ret) {
+                pr_err("Setting BKL-ON GPIO direction failed!\n");
+                goto err2;
+        }
+
+        balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
+        set_pxa_fb_info(&balloon3_lcd_screen);
+        return;
+
+err2:
+        gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT);
+err:
+        return;
+}
+#else
+static inline void balloon3_lcd_init(void) {}
+#endif
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data balloon3_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
+        .detect_delay_ms        = 200,
+};
+
+static void __init balloon3_mmc_init(void)
+{
+        pxa_set_mci_info(&balloon3_mci_platform_data);
+}
+#else
+static inline void balloon3_mmc_init(void) {}
+#endif
+
+/******************************************************************************
+ * USB Gadget
+ ******************************************************************************/
+#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+static void balloon3_udc_command(int cmd)
+{
+        if (cmd == PXA2XX_UDC_CMD_CONNECT)
+                UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE;
+        else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
+                UP2OCR &= ~UP2OCR_DPPUE;
+}
+
+static int balloon3_udc_is_connected(void)
+{
+        return 1;
+}
+
+static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = {
+        .udc_command            = balloon3_udc_command,
+        .udc_is_connected       = balloon3_udc_is_connected,
+        .gpio_pullup            = -1,
+};
+
+static void __init balloon3_udc_init(void)
+{
+        pxa_set_udc_info(&balloon3_udc_info);
+        platform_device_register(&balloon3_gpio_vbus);
+}
+#else
+static inline void balloon3_udc_init(void) {}
+#endif
+
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
+static struct pxaficp_platform_data balloon3_ficp_platform_data = {
+        .transceiver_cap        = IR_FIRMODE | IR_SIRMODE | IR_OFF,
+};
+
+static void __init balloon3_irda_init(void)
+{
+        pxa_set_ficp_info(&balloon3_ficp_platform_data);
+}
+#else
+static inline void balloon3_irda_init(void) {}
+#endif
+
+/******************************************************************************
+ * USB Host
+ ******************************************************************************/
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static struct pxaohci_platform_data balloon3_ohci_info = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+};
+
+static void __init balloon3_uhc_init(void)
+{
+        if (!balloon3_has(BALLOON3_FEATURE_OHCI))
+                return;
+        pxa_set_ohci_info(&balloon3_ohci_info);
+}
+#else
+static inline void balloon3_uhc_init(void) {}
+#endif
+
+/******************************************************************************
+ * LEDs
+ ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+struct gpio_led balloon3_gpio_leds[] = {
+        {
+                .name                   = "balloon3:green:idle",
+                .default_trigger        = "heartbeat",
+                .gpio                   = BALLOON3_GPIO_LED_IDLE,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:green:nand",
+                .default_trigger        = "nand-disk",
+                .gpio                   = BALLOON3_GPIO_LED_NAND,
+                .active_low             = 1,
+        },
+};
+
+static struct gpio_led_platform_data balloon3_gpio_led_info = {
+        .leds           = balloon3_gpio_leds,
+        .num_leds       = ARRAY_SIZE(balloon3_gpio_leds),
+};
+
+static struct platform_device balloon3_leds = {
+        .name   = "leds-gpio",
+        .id     = 0,
+        .dev    = {
+                .platform_data  = &balloon3_gpio_led_info,
+        }
+};
+
+struct gpio_led balloon3_pcf_gpio_leds[] = {
+        {
+                .name                   = "balloon3:green:led0",
+                .gpio                   = BALLOON3_PCF_GPIO_LED0,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:green:led1",
+                .gpio                   = BALLOON3_PCF_GPIO_LED1,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:orange:led2",
+                .gpio                   = BALLOON3_PCF_GPIO_LED2,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:orange:led3",
+                .gpio                   = BALLOON3_PCF_GPIO_LED3,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:orange:led4",
+                .gpio                   = BALLOON3_PCF_GPIO_LED4,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:orange:led5",
+                .gpio                   = BALLOON3_PCF_GPIO_LED5,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:red:led6",
+                .gpio                   = BALLOON3_PCF_GPIO_LED6,
+                .active_low             = 1,
+        }, {
+                .name                   = "balloon3:red:led7",
+                .gpio                   = BALLOON3_PCF_GPIO_LED7,
+                .active_low             = 1,
+        },
+};
+
+static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = {
+        .leds           = balloon3_pcf_gpio_leds,
+        .num_leds       = ARRAY_SIZE(balloon3_pcf_gpio_leds),
+};
+
+static struct platform_device balloon3_pcf_leds = {
+        .name   = "leds-gpio",
+        .id     = 1,
+        .dev    = {
+                .platform_data  = &balloon3_pcf_gpio_led_info,
+        }
+};
+
+static void __init balloon3_leds_init(void)
+{
+        platform_device_register(&balloon3_leds);
+        platform_device_register(&balloon3_pcf_leds);
+}
+#else
+static inline void balloon3_leds_init(void) {}
+#endif
+
+/******************************************************************************
+ * FPGA IRQ
+ ******************************************************************************/
 static void balloon3_mask_irq(unsigned int irq)
 {
         int balloon3_irq = (irq - BALLOON3_IRQ(0));
@@ -98,7 +471,6 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
                                         balloon3_irq_enabled;
-
         do {
                 /* clear useless edge notification */
                 if (desc->chip->ack)
@@ -132,201 +504,259 @@ static void __init balloon3_init_irq(void)
                 "enabled\n", __func__, BALLOON3_AUX_NIRQ);
 }
 
-static unsigned long balloon3_ac97_pin_config[] = {
-        GPIO28_AC97_BITCLK,
-        GPIO29_AC97_SDATA_IN_0,
-        GPIO30_AC97_SDATA_OUT,
-        GPIO31_AC97_SYNC,
-        GPIO113_AC97_nRESET,
-};
-
-static void balloon3_backlight_power(int on)
-{
-        pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
-        gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
-}
-
-static unsigned long balloon3_lcd_pin_config[] = {
-        /* LCD - 16bpp Active TFT */
-        GPIOxx_LCD_TFT_16BPP,
-
-        GPIO99_GPIO,            /* Backlight */
+/******************************************************************************
+ * GPIO expander
+ ******************************************************************************/
+#if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE)
+static struct pcf857x_platform_data balloon3_pcf857x_pdata = {
+        .gpio_base      = BALLOON3_PCF_GPIO_BASE,
+        .n_latch        = 0,
+        .setup          = NULL,
+        .teardown       = NULL,
+        .context        = NULL,
 };
 
-static struct pxafb_mode_info balloon3_lcd_modes[] = {
+static struct i2c_board_info __initdata balloon3_i2c_devs[] = {
         {
-                .pixclock               = 38000,
-                .xres                   = 480,
-                .yres                   = 640,
-                .bpp                    = 16,
-                .hsync_len              = 8,
-                .left_margin            = 8,
-                .right_margin           = 8,
-                .vsync_len              = 2,
-                .upper_margin           = 4,
-                .lower_margin           = 5,
-                .sync                   = 0,
+                I2C_BOARD_INFO("pcf8574a", 0x38),
+                .platform_data  = &balloon3_pcf857x_pdata,
         },
 };
 
-static struct pxafb_mach_info balloon3_pxafb_info = {
-        .modes                  = balloon3_lcd_modes,
-        .num_modes              = ARRAY_SIZE(balloon3_lcd_modes),
-        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-        .pxafb_backlight_power  = balloon3_backlight_power,
-};
+static void __init balloon3_i2c_init(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs));
+}
+#else
+static inline void balloon3_i2c_init(void) {}
+#endif
+
+/******************************************************************************
+ * NAND
+ ******************************************************************************/
+#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
+static uint16_t balloon3_ctl =
+        BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
+        BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
+        BALLOON3_NAND_CONTROL_FLWP;
+
+static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
 
-static unsigned long balloon3_mmc_pin_config[] = {
-        GPIO32_MMC_CLK,
-        GPIO92_MMC_DAT_0,
-        GPIO109_MMC_DAT_1,
-        GPIO110_MMC_DAT_2,
-        GPIO111_MMC_DAT_3,
-        GPIO112_MMC_CMD,
-};
+        if (ctrl & NAND_CTRL_CHANGE) {
+                if (ctrl & NAND_CLE)
+                        balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCLE;
+                else
+                        balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLCLE;
 
-static void balloon3_mci_setpower(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-
-        if ((1 << vdd) & p_d->ocr_mask) {
-                pr_debug("%s: on\n", __func__);
-                /* FIXME something to prod here? */
-        } else {
-                pr_debug("%s: off\n", __func__);
-                /* FIXME something to prod here? */
+                if (ctrl & NAND_ALE)
+                        balloon3_ctl |= BALLOON3_NAND_CONTROL_FLALE;
+                else
+                        balloon3_ctl &= ~BALLOON3_NAND_CONTROL_FLALE;
+
+                __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
         }
+
+        if (cmd != NAND_CMD_NONE)
+                writeb(cmd, this->IO_ADDR_W);
 }
 
-static struct pxamci_platform_data balloon3_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .setpower       = balloon3_mci_setpower,
-};
+static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+        if (chip < 0 || chip > 3)
+                return;
 
-static int balloon3_udc_is_connected(void)
+        balloon3_ctl |= BALLOON3_NAND_CONTROL_FLCE0 |
+                        BALLOON3_NAND_CONTROL_FLCE1 |
+                        BALLOON3_NAND_CONTROL_FLCE2 |
+                        BALLOON3_NAND_CONTROL_FLCE3;
+
+        /* Deassert correct nCE line */
+        balloon3_ctl &= ~(BALLOON3_NAND_CONTROL_FLCE0 << chip);
+
+        __raw_writew(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
+}
+
+static int balloon3_nand_probe(struct platform_device *pdev)
 {
-        pr_debug("%s: udc connected\n", __func__);
-        return 1;
+        void __iomem *temp_map;
+        uint16_t ver;
+        int ret;
+
+        __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, BALLOON3_NAND_CONTROL2_REG);
+
+        ver = __raw_readw(BALLOON3_FPGA_VER);
+        if (ver > 0x0201)
+                pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. "
+                        "NAND support might be broken in this version!", ver);
+
+        /* Power up the NAND chips */
+        ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND");
+        if (ret)
+                goto err1;
+
+        ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1);
+        if (ret)
+                goto err2;
+
+        gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
+
+        /* Deassert all nCE lines and write protect line */
+        __raw_writel(balloon3_ctl, BALLOON3_NAND_CONTROL_REG);
+        return 0;
+
+err2:
+        gpio_free(BALLOON3_GPIO_RUN_NAND);
+err1:
+        return ret;
 }
 
-static void balloon3_udc_command(int cmd)
+static void balloon3_nand_remove(struct platform_device *pdev)
 {
-        switch (cmd) {
-        case PXA2XX_UDC_CMD_CONNECT:
-                UP2OCR |= (UP2OCR_DPPUE + UP2OCR_DPPUBE);
-                pr_debug("%s: connect\n", __func__);
-                break;
-        case PXA2XX_UDC_CMD_DISCONNECT:
-                UP2OCR &= ~UP2OCR_DPPUE;
-                pr_debug("%s: disconnect\n", __func__);
-                break;
-        }
+        /* Power down the NAND chips */
+        gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0);
+        gpio_free(BALLOON3_GPIO_RUN_NAND);
 }
 
-static struct pxa2xx_udc_mach_info balloon3_udc_info = {
-        .udc_is_connected = balloon3_udc_is_connected,
-        .udc_command      = balloon3_udc_command,
+static struct mtd_partition balloon3_partition_info[] = {
+        [0] = {
+                .name   = "Boot",
+                .offset = 0,
+                .size   = SZ_4M,
+        },
+        [1] = {
+                .name   = "RootFS",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = MTDPART_SIZ_FULL
+        },
 };
 
-static struct pxaficp_platform_data balloon3_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-};
+static const char *balloon3_part_probes[] = { "cmdlinepart", NULL };
 
-static unsigned long balloon3_ohci_pin_config[] = {
-        GPIO88_USBH1_PWR,
-        GPIO89_USBH1_PEN,
+struct platform_nand_data balloon3_nand_pdata = {
+        .chip = {
+                .nr_chips       = 4,
+                .chip_offset    = 0,
+                .nr_partitions  = ARRAY_SIZE(balloon3_partition_info),
+                .partitions     = balloon3_partition_info,
+                .chip_delay     = 50,
+                .part_probe_types = balloon3_part_probes,
+        },
+        .ctrl = {
+                .hwcontrol      = 0,
+                .dev_ready      = 0,
+                .select_chip    = balloon3_nand_select_chip,
+                .cmd_ctrl       = balloon3_nand_cmd_ctl,
+                .probe          = balloon3_nand_probe,
+                .remove         = balloon3_nand_remove,
+        },
 };
 
-static struct pxaohci_platform_data balloon3_ohci_platform_data = {
-        .port_mode      = PMM_PERPORT_MODE,
-        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+static struct resource balloon3_nand_resource[] = {
+        [0] = {
+                .start = BALLOON3_NAND_BASE,
+                .end   = BALLOON3_NAND_BASE + 0x4,
+                .flags = IORESOURCE_MEM,
+        },
 };
 
-static unsigned long balloon3_pin_config[] __initdata = {
-        /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-        GPIO45_BTUART_RTS,
-
-        /* Wakeup GPIO */
-        GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
-
-        /* NAND & IDLE LED GPIOs */
-        GPIO9_GPIO,
-        GPIO10_GPIO,
+static struct platform_device balloon3_nand = {
+        .name           = "gen_nand",
+        .num_resources  = ARRAY_SIZE(balloon3_nand_resource),
+        .resource       = balloon3_nand_resource,
+        .id             = -1,
+        .dev            = {
+                .platform_data = &balloon3_nand_pdata,
+        }
 };
 
-static struct gpio_led balloon3_gpio_leds[] = {
+static void __init balloon3_nand_init(void)
+{
+        platform_device_register(&balloon3_nand);
+}
+#else
+static inline void balloon3_nand_init(void) {}
+#endif
+
+/******************************************************************************
+ * Core power regulator
+ ******************************************************************************/
+#if defined(CONFIG_REGULATOR_MAX1586) || \
+    defined(CONFIG_REGULATOR_MAX1586_MODULE)
+static struct regulator_consumer_supply balloon3_max1587a_consumers[] = {
         {
-                .name                   = "balloon3:green:idle",
-                .default_trigger        = "heartbeat",
-                .gpio                   = BALLOON3_GPIO_LED_IDLE,
-                .active_low             = 1,
+                .supply = "vcc_core",
+        }
+};
+
+static struct regulator_init_data balloon3_max1587a_v3_info = {
+        .constraints = {
+                .name           = "vcc_core range",
+                .min_uV         = 900000,
+                .max_uV         = 1705000,
+                .always_on      = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
         },
+        .consumer_supplies      = balloon3_max1587a_consumers,
+        .num_consumer_supplies  = ARRAY_SIZE(balloon3_max1587a_consumers),
+};
+
+static struct max1586_subdev_data balloon3_max1587a_subdevs[] = {
         {
-                .name                   = "balloon3:green:nand",
-                .default_trigger        = "nand-disk",
-                .gpio                   = BALLOON3_GPIO_LED_NAND,
-                .active_low             = 1,
-        },
+                .name           = "vcc_core",
+                .id             = MAX1586_V3,
+                .platform_data  = &balloon3_max1587a_v3_info,
+        }
 };
 
-static struct gpio_led_platform_data balloon3_gpio_leds_platform_data = {
-        .leds           = balloon3_gpio_leds,
-        .num_leds       = ARRAY_SIZE(balloon3_gpio_leds),
+static struct max1586_platform_data balloon3_max1587a_info = {
+        .subdevs     = balloon3_max1587a_subdevs,
+        .num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs),
+        .v3_gain     = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
 };
 
-static struct platform_device balloon3led_device = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &balloon3_gpio_leds_platform_data,
+static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = {
+        {
+                I2C_BOARD_INFO("max1586", 0x14),
+                .platform_data  = &balloon3_max1587a_info,
         },
 };
 
-static void __init balloon3_init(void)
+static void __init balloon3_pmic_init(void)
 {
-        pr_info("Initialising Balloon3\n");
+        pxa27x_set_i2c_power_info(NULL);
+        i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info));
+}
+#else
+static inline void balloon3_pmic_init(void) {}
+#endif
 
-        /* system bus arbiter setting
-         * - Core_Park
-         * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
-         */
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static void __init balloon3_init(void)
+{
         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
+
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        pxa_set_i2c_info(NULL);
-        if (balloon3_has(BALLOON3_FEATURE_AUDIO)) {
-                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
-                pxa_set_ac97_info(NULL);
-        }
-
-        if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
-                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
-                gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT,
-                        "LCD Backlight Power");
-                gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
-                set_pxa_fb_info(&balloon3_pxafb_info);
-        }
-
-        if (balloon3_has(BALLOON3_FEATURE_MMC)) {
-                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
-                pxa_set_mci_info(&balloon3_mci_platform_data);
-        }
-        pxa_set_ficp_info(&balloon3_ficp_platform_data);
-        if (balloon3_has(BALLOON3_FEATURE_OHCI)) {
-                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ohci_pin_config));
-                pxa_set_ohci_info(&balloon3_ohci_platform_data);
-        }
-        pxa_set_udc_info(&balloon3_udc_info);
-
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
-
-        platform_device_register(&balloon3led_device);
+        balloon3_i2c_init();
+        balloon3_irda_init();
+        balloon3_lcd_init();
+        balloon3_leds_init();
+        balloon3_mmc_init();
+        balloon3_nand_init();
+        balloon3_nor_init();
+        balloon3_pmic_init();
+        balloon3_ts_init();
+        balloon3_udc_init();
+        balloon3_uhc_init();
 }
 
 static struct map_desc balloon3_io_desc[] __initdata = {
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index fdda6be6c391..c70e6c2f4e7c 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -689,6 +689,7 @@ static void __init cm_x300_init_da9030(void)
 {
         pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
         i2c_register_board_info(1, &cm_x300_pmic_info, 1);
+        set_irq_wake(IRQ_WAKEUP0, 1);
 }
 
 static void __init cm_x300_init_wi2wi(void)
@@ -745,9 +746,10 @@ static void __init cm_x300_init(void)
 {
         cm_x300_init_mfp();
 
-        pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
+        if (cpu_is_pxa300())
+                pxa_set_ffuart_info(NULL);
 
         cm_x300_init_da9030();
         cm_x300_init_dm9000();
diff --git a/arch/arm/mach-pxa/colibri-pxa270-evalboard.c b/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
new file mode 100644
index 000000000000..0f3b632c3b14
--- /dev/null
+++ b/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
@@ -0,0 +1,111 @@
+/*
+ *  linux/arch/arm/mach-pxa/colibri-pxa270-evalboard.c
+ *
+ *  Support for Toradex PXA270 based Colibri Evaluation Carrier Board
+ *  Daniel Mack <daniel@caiaq.de>
+ *  Marek Vasut <marek.vasut@gmail.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#include <mach/hardware.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa27x.h>
+#include <mach/colibri.h>
+#include <mach/mmc.h>
+#include <mach/ohci.h>
+#include <mach/pxa27x-udc.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        GPIO0_GPIO,     /* SD detect */
+
+        /* FFUART */
+        GPIO39_FFUART_TXD,
+        GPIO34_FFUART_RXD,
+
+        /* UHC */
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+        GPIO119_USBH2_PWR,
+        GPIO120_USBH2_PEN,
+};
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data colibri_pxa270_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_power             = -1,
+        .gpio_card_detect       = GPIO0_COLIBRI_PXA270_SD_DETECT,
+        .gpio_card_ro           = -1,
+        .detect_delay_ms        = 200,
+};
+
+static void __init colibri_pxa270_mmc_init(void)
+{
+        pxa_set_mci_info(&colibri_pxa270_mci_platform_data);
+}
+#else
+static inline void colibri_pxa270_mmc_init(void) {}
+#endif
+
+/******************************************************************************
+ * USB Host
+ ******************************************************************************/
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static int colibri_pxa270_ohci_init(struct device *dev)
+{
+        UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
+        return 0;
+}
+
+static struct pxaohci_platform_data colibri_pxa270_ohci_info = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT2 |
+                          POWER_CONTROL_LOW | POWER_SENSE_LOW,
+        .init           = colibri_pxa270_ohci_init,
+};
+
+static void __init colibri_pxa270_uhc_init(void)
+{
+        pxa_set_ohci_info(&colibri_pxa270_ohci_info);
+}
+#else
+static inline void colibri_pxa270_uhc_init(void) {}
+#endif
+
+void __init colibri_pxa270_evalboard_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_evalboard_pin_config));
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+
+        colibri_pxa270_mmc_init();
+        colibri_pxa270_uhc_init();
+}
+
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
new file mode 100644
index 000000000000..37f0f3ed7c61
--- /dev/null
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -0,0 +1,272 @@
+/*
+ * linux/arch/arm/mach-pxa/income.c
+ *
+ * Support for Income s.r.o. SH-Dmaster PXA270 SBC
+ *
+ * Copyright (C) 2010
+ * Marek Vasut <marek.vasut@gmail.com>
+ * Pavel Revak <palo@bielyvlk.sk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/pwm_backlight.h>
+#include <linux/sysdev.h>
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include <mach/hardware.h>
+#include <mach/mmc.h>
+#include <mach/ohci.h>
+#include <mach/pxa27x.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/pxafb.h>
+
+#include <plat/i2c.h>
+
+#include "devices.h"
+#include "generic.h"
+
+#define GPIO114_INCOME_ETH_IRQ  (114)
+#define GPIO0_INCOME_SD_DETECT  (0)
+#define GPIO0_INCOME_SD_RO      (1)
+#define GPIO54_INCOME_LED_A     (54)
+#define GPIO55_INCOME_LED_B     (55)
+#define GPIO113_INCOME_TS_IRQ   (113)
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static mfp_cfg_t income_pin_config[] __initdata = {
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        GPIO0_GPIO,     /* SD detect */
+        GPIO1_GPIO,     /* SD read-only */
+
+        /* FFUART */
+        GPIO39_FFUART_TXD,
+        GPIO34_FFUART_RXD,
+
+        /* BFUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO45_BTUART_RTS,
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* UHC */
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+
+        /* LCD */
+        GPIOxx_LCD_TFT_16BPP,
+
+        /* PWM */
+        GPIO16_PWM0_OUT,
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* LED */
+        GPIO54_GPIO,    /* LED A */
+        GPIO55_GPIO,    /* LED B */
+};
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data income_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_power             = -1,
+        .gpio_card_detect       = GPIO0_INCOME_SD_DETECT,
+        .gpio_card_ro           = GPIO0_INCOME_SD_RO,
+        .detect_delay_ms        = 200,
+};
+
+static void __init income_mmc_init(void)
+{
+        pxa_set_mci_info(&income_mci_platform_data);
+}
+#else
+static inline void income_mmc_init(void) {}
+#endif
+
+/******************************************************************************
+ * USB Host
+ ******************************************************************************/
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static struct pxaohci_platform_data income_ohci_info = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+};
+
+static void __init income_uhc_init(void)
+{
+        pxa_set_ohci_info(&income_ohci_info);
+}
+#else
+static inline void income_uhc_init(void) {}
+#endif
+
+/******************************************************************************
+ * LED
+ ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+struct gpio_led income_gpio_leds[] = {
+        {
+                .name                   = "income:green:leda",
+                .default_trigger        = "none",
+                .gpio                   = GPIO54_INCOME_LED_A,
+                .active_low             = 1,
+        },
+        {
+                .name                   = "income:green:ledb",
+                .default_trigger        = "none",
+                .gpio                   = GPIO55_INCOME_LED_B,
+                .active_low             = 1,
+        }
+};
+
+static struct gpio_led_platform_data income_gpio_led_info = {
+        .leds           = income_gpio_leds,
+        .num_leds       = ARRAY_SIZE(income_gpio_leds),
+};
+
+static struct platform_device income_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &income_gpio_led_info,
+        }
+};
+
+static void __init income_led_init(void)
+{
+        platform_device_register(&income_leds);
+}
+#else
+static inline void income_led_init(void) {}
+#endif
+
+/******************************************************************************
+ * I2C
+ ******************************************************************************/
+#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
+static struct i2c_board_info __initdata income_i2c_devs[] = {
+        {
+                I2C_BOARD_INFO("ds1340", 0x68),
+        }, {
+                I2C_BOARD_INFO("lm75", 0x4f),
+        },
+};
+
+static void __init income_i2c_init(void)
+{
+        pxa_set_i2c_info(NULL);
+        pxa27x_set_i2c_power_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(income_i2c_devs));
+}
+#else
+static inline void income_i2c_init(void) {}
+#endif
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct pxafb_mode_info income_lcd_modes[] = {
+{
+        .pixclock       = 144700,
+        .xres           = 320,
+        .yres           = 240,
+        .bpp            = 32,
+        .depth          = 18,
+
+        .left_margin    = 10,
+        .right_margin   = 10,
+        .upper_margin   = 7,
+        .lower_margin   = 8,
+
+        .hsync_len      = 20,
+        .vsync_len      = 2,
+
+        .sync           = FB_SYNC_VERT_HIGH_ACT,
+},
+};
+
+static struct pxafb_mach_info income_lcd_screen = {
+        .modes          = income_lcd_modes,
+        .num_modes      = ARRAY_SIZE(income_lcd_modes),
+        .lcd_conn       = LCD_COLOR_TFT_18BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static void __init income_lcd_init(void)
+{
+        set_pxa_fb_info(&income_lcd_screen);
+}
+#else
+static inline void income_lcd_init(void) {}
+#endif
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM__MODULE)
+static struct platform_pwm_backlight_data income_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 0x3ff,
+        .dft_brightness = 0x1ff,
+        .pwm_period_ns  = 1000000,
+};
+
+static struct platform_device income_backlight = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa27x_device_pwm0.dev,
+                .platform_data  = &income_backlight_data,
+        },
+};
+
+static void __init income_pwm_init(void)
+{
+        platform_device_register(&income_backlight);
+}
+#else
+static inline void income_pwm_init(void) {}
+#endif
+
+void __init colibri_pxa270_income_boardinit(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+
+        income_mmc_init();
+        income_uhc_init();
+        income_led_init();
+        income_i2c_init();
+        income_lcd_init();
+        income_pwm_init();
+}
+
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 061c45316de8..98673ac6efd0 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -3,6 +3,7 @@
  *
  *  Support for Toradex PXA270 based Colibri module
  *  Daniel Mack <daniel@caiaq.de>
+ *  Marek Vasut <marek.vasut@gmail.com>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License version 2 as
@@ -10,49 +11,55 @@
  */
 
 #include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
-#include <linux/bitops.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
+#include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <asm/sizes.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/ucb1400.h>
+
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 #include <asm/mach/flash.h>
+#include <asm/mach-types.h>
+#include <asm/sizes.h>
 
-#include <mach/pxa27x.h>
+#include <mach/audio.h>
 #include <mach/colibri.h>
+#include <mach/pxa27x.h>
 
-#include "generic.h"
 #include "devices.h"
+#include "generic.h"
 
-/*
- * GPIO configuration
- */
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
 static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
+        /* Ethernet */
         GPIO78_nCS_2,   /* Ethernet CS */
         GPIO114_GPIO,   /* Ethernet IRQ */
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO95_AC97_nRESET,
+        GPIO98_AC97_SYSCLK,
+        GPIO113_GPIO,   /* Touchscreen IRQ */
 };
 
-/*
- * NOR flash
- */
+/******************************************************************************
+ * NOR Flash
+ ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 static struct mtd_partition colibri_partitions[] = {
         {
                 .name =         "Bootloader",
                 .offset =       0x00000000,
                 .size =         0x00040000,
-                .mask_flags =   MTD_WRITEABLE  /* force read-only */
+                .mask_flags =   MTD_WRITEABLE   /* force read-only */
         }, {
                 .name =         "Kernel",
                 .offset =       0x00040000,
@@ -90,50 +97,113 @@ static struct platform_device colibri_pxa270_flash_device = {
         .num_resources = 1,
 };
 
-/*
- * DM9000 Ethernet
- */
-#if defined(CONFIG_DM9000)
-static struct resource dm9000_resources[] = {
-        [0] = {
-                .start  = COLIBRI_PXA270_ETH_PHYS,
-                .end    = COLIBRI_PXA270_ETH_PHYS + 3,
+static void __init colibri_pxa270_nor_init(void)
+{
+        platform_device_register(&colibri_pxa270_flash_device);
+}
+#else
+static inline void colibri_pxa270_nor_init(void) {}
+#endif
+
+/******************************************************************************
+ * Ethernet
+ ******************************************************************************/
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource colibri_pxa270_dm9000_resources[] = {
+        {
+                .start  = PXA_CS2_PHYS,
+                .end    = PXA_CS2_PHYS + 3,
                 .flags  = IORESOURCE_MEM,
         },
-        [1] = {
-                .start  = COLIBRI_PXA270_ETH_PHYS + 4,
-                .end    = COLIBRI_PXA270_ETH_PHYS + 4 + 500,
+        {
+                .start  = PXA_CS2_PHYS + 4,
+                .end    = PXA_CS2_PHYS + 4 + 500,
                 .flags  = IORESOURCE_MEM,
         },
-        [2] = {
-                .start  = COLIBRI_PXA270_ETH_IRQ,
-                .end    = COLIBRI_PXA270_ETH_IRQ,
+        {
+                .start  = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+                .end    = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
         },
 };
 
-static struct platform_device dm9000_device = {
+static struct platform_device colibri_pxa270_dm9000_device = {
         .name           = "dm9000",
         .id             = -1,
-        .num_resources  = ARRAY_SIZE(dm9000_resources),
-        .resource       = dm9000_resources,
+        .num_resources  = ARRAY_SIZE(colibri_pxa270_dm9000_resources),
+        .resource       = colibri_pxa270_dm9000_resources,
 };
-#endif /* CONFIG_DM9000 */
 
-static struct platform_device *colibri_pxa270_devices[] __initdata = {
-        &colibri_pxa270_flash_device,
-#if defined(CONFIG_DM9000)
-        &dm9000_device,
+static void __init colibri_pxa270_eth_init(void)
+{
+        platform_device_register(&colibri_pxa270_dm9000_device);
+}
+#else
+static inline void colibri_pxa270_eth_init(void) {}
 #endif
+
+/******************************************************************************
+ * Audio and Touchscreen
+ ******************************************************************************/
+#if     defined(CONFIG_TOUCHSCREEN_UCB1400) || \
+        defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
+static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
+        .reset_gpio     = 95,
+};
+
+static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
+        .irq            = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ),
+};
+
+static struct platform_device colibri_pxa270_ucb1400_device = {
+        .name           = "ucb1400_core",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &colibri_pxa270_ucb1400_pdata,
+        },
 };
 
+static void __init colibri_pxa270_tsc_init(void)
+{
+        pxa_set_ac97_info(&colibri_pxa270_ac97_pdata);
+        platform_device_register(&colibri_pxa270_ucb1400_device);
+}
+#else
+static inline void colibri_pxa270_tsc_init(void) {}
+#endif
+
+static int colibri_pxa270_baseboard;
+core_param(colibri_pxa270_baseboard, colibri_pxa270_baseboard, int, 0444);
+
 static void __init colibri_pxa270_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config));
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices));
+
+        colibri_pxa270_nor_init();
+        colibri_pxa270_eth_init();
+        colibri_pxa270_tsc_init();
+
+        switch (colibri_pxa270_baseboard) {
+        case COLIBRI_PXA270_EVALBOARD:
+                colibri_pxa270_evalboard_init();
+                break;
+        case COLIBRI_PXA270_INCOME:
+                colibri_pxa270_income_boardinit();
+                break;
+        default:
+                printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n",
+                                colibri_pxa270_baseboard);
+        }
+}
+
+/* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either
+ * with the INCOME mach type or with COLIBRI and the kernel parameter
+ * "colibri_pxa270_baseboard=1"
+ */
+static void __init colibri_pxa270_income_init(void)
+{
+        colibri_pxa270_baseboard = COLIBRI_PXA270_INCOME;
+        colibri_pxa270_init();
 }
 
 MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
@@ -146,3 +216,13 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
         .timer          = &pxa_timer,
 MACHINE_END
 
+MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .init_machine   = colibri_pxa270_income_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index ae835fad7d10..99e850d84710 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -16,6 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
+#include <linux/usb/gpio_vbus.h>
 
 #include <asm/mach-types.h>
 #include <asm/sizes.h>
@@ -28,6 +29,8 @@
 #include <mach/pxafb.h>
 #include <mach/ohci.h>
 #include <mach/audio.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/udc.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -101,6 +104,42 @@ void __init colibri_pxa320_init_ohci(void)
 static inline void colibri_pxa320_init_ohci(void) {}
 #endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
 
+#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
+        .gpio_vbus              = mfp_to_gpio(MFP_PIN_GPIO96),
+        .gpio_pullup            = -1,
+};
+
+static struct platform_device colibri_pxa320_gpio_vbus = {
+        .name   = "gpio-vbus",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &colibri_pxa320_gpio_vbus_info,
+        },
+};
+
+static void colibri_pxa320_udc_command(int cmd)
+{
+        if (cmd == PXA2XX_UDC_CMD_CONNECT)
+                UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
+        else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
+                UP2OCR = UP2OCR_HXOE;
+}
+
+static struct pxa2xx_udc_mach_info colibri_pxa320_udc_info __initdata = {
+        .udc_command            = colibri_pxa320_udc_command,
+        .gpio_pullup            = -1,
+};
+
+static void __init colibri_pxa320_init_udc(void)
+{
+        pxa_set_udc_info(&colibri_pxa320_udc_info);
+        platform_device_register(&colibri_pxa320_gpio_vbus);
+}
+#else
+static inline void colibri_pxa320_init_udc(void) {}
+#endif
+
 static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = {
         GPIO22_MMC1_CLK,
         GPIO23_MMC1_CMD,
@@ -212,6 +251,7 @@ void __init colibri_pxa320_init(void)
         colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
                                 mfp_to_gpio(MFP_PIN_GPIO28));
         colibri_pxa320_init_uart();
+        colibri_pxa320_init_udc();
 }
 
 MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 461ba4080155..3fb0fc099080 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -50,14 +50,13 @@
 #include <mach/udc.h>
 #include <mach/pxa2xx_spi.h>
 #include <mach/corgi.h>
-#include <mach/sharpsl.h>
+#include <mach/sharpsl_pm.h>
 
 #include <asm/mach/sharpsl_param.h>
 #include <asm/hardware/scoop.h>
 
 #include "generic.h"
 #include "devices.h"
-#include "sharpsl.h"
 
 static unsigned long corgi_pin_config[] __initdata = {
         /* Static Memory I/O */
@@ -185,8 +184,6 @@ static struct scoop_pcmcia_config corgi_pcmcia_config = {
         .num_devs     = 1,
 };
 
-EXPORT_SYMBOL(corgiscoop_device);
-
 static struct w100_mem_info corgi_fb_mem = {
         .ext_cntl          = 0x00040003,
         .sdram_mode_reg    = 0x00650021,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 3f1dc74ac048..29034778bfda 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -23,12 +23,11 @@
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
 
-#include <mach/sharpsl.h>
 #include <mach/corgi.h>
 #include <mach/pxa2xx-regs.h>
+#include <mach/sharpsl_pm.h>
 
 #include "generic.h"
-#include "sharpsl.h"
 
 #define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
 #define SHARPSL_CHARGE_ON_TEMP         0xe0  /* 2.9V */
@@ -134,11 +133,11 @@ unsigned long corgipm_read_devdata(int type)
         case SHARPSL_STATUS_ACIN:
                 return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0);
         case SHARPSL_STATUS_LOCK:
-                return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock);
+                return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
         case SHARPSL_STATUS_CHRGFULL:
-                return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull);
+                return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull);
         case SHARPSL_STATUS_FATAL:
-                return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal);
+                return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal);
         case SHARPSL_ACIN_VOLT:
                 return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT);
         case SHARPSL_BATT_TEMP:
@@ -165,8 +164,6 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
         .should_wakeup   = corgi_should_wakeup,
 #if defined(CONFIG_LCD_CORGI)
         .backlight_limit = corgi_lcd_limit_intensity,
-#elif defined(CONFIG_BACKLIGHT_CORGI)
-        .backlight_limit = corgibl_limit_intensity,
 #endif
         .charge_on_volt   = SHARPSL_CHARGE_ON_VOLT,
         .charge_on_temp   = SHARPSL_CHARGE_ON_TEMP,
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 8e10db148f1b..65447dc736c2 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -4,6 +4,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 
+#include <asm/pmu.h>
 #include <mach/udc.h>
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
@@ -31,6 +32,19 @@ void __init pxa_register_device(struct platform_device *dev, void *data)
                 dev_err(&dev->dev, "unable to register device: %d\n", ret);
 }
 
+static struct resource pxa_resource_pmu = {
+        .start  = IRQ_PMU,
+        .end    = IRQ_PMU,
+        .flags  = IORESOURCE_IRQ,
+};
+
+struct platform_device pxa_device_pmu = {
+        .name           = "arm-pmu",
+        .id             = ARM_PMU_DEVICE_CPU,
+        .resource       = &pxa_resource_pmu,
+        .num_resources  = 1,
+};
+
 static struct resource pxamci_resources[] = {
         [0] = {
                 .start  = 0x41100000,
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 93817d99761e..50353ea49ba4 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -1,3 +1,4 @@
+extern struct platform_device pxa_device_pmu;
 extern struct platform_device pxa_device_mci;
 extern struct platform_device pxa3xx_device_mci2;
 extern struct platform_device pxa3xx_device_mci3;
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c
deleted file mode 100644
index 8fde3387279d..000000000000
--- a/arch/arm/mach-pxa/e330.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Hardware definitions for the Toshiba e330 PDAs
- *
- * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/tc6387xb.h>
-
-#include <asm/setup.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/pxa25x.h>
-#include <mach/eseries-gpio.h>
-#include <mach/udc.h>
-
-#include "generic.h"
-#include "eseries.h"
-#include "clock.h"
-
-/* -------------------- e330 tc6387xb parameters -------------------- */
-
-static struct tc6387xb_platform_data e330_tc6387xb_info = {
-        .enable   = &eseries_tmio_enable,
-        .disable  = &eseries_tmio_disable,
-        .suspend  = &eseries_tmio_suspend,
-        .resume   = &eseries_tmio_resume,
-};
-
-static struct platform_device e330_tc6387xb_device = {
-        .name           = "tc6387xb",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &e330_tc6387xb_info,
-        },
-        .num_resources = 2,
-        .resource      = eseries_tmio_resources,
-};
-
-/* --------------------------------------------------------------- */
-
-static struct platform_device *devices[] __initdata = {
-        &e330_tc6387xb_device,
-};
-
-static void __init e330_init(void)
-{
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        eseries_register_clks();
-        eseries_get_tmio_gpios();
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_udc_info(&e7xx_udc_mach_info);
-}
-
-MACHINE_START(E330, "Toshiba e330")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e330_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c
deleted file mode 100644
index f50f055f5720..000000000000
--- a/arch/arm/mach-pxa/e350.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Hardware definitions for the Toshiba e350 PDAs
- *
- * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/t7l66xb.h>
-
-#include <asm/setup.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/irqs.h>
-#include <mach/pxa25x.h>
-#include <mach/eseries-gpio.h>
-#include <mach/udc.h>
-
-#include "generic.h"
-#include "eseries.h"
-#include "clock.h"
-
-/* -------------------- e350 t7l66xb parameters -------------------- */
-
-static struct t7l66xb_platform_data e350_t7l66xb_info = {
-        .irq_base               = IRQ_BOARD_START,
-        .enable                 = &eseries_tmio_enable,
-        .suspend                = &eseries_tmio_suspend,
-        .resume                 = &eseries_tmio_resume,
-};
-
-static struct platform_device e350_t7l66xb_device = {
-        .name           = "t7l66xb",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &e350_t7l66xb_info,
-        },
-        .num_resources = 2,
-        .resource      = eseries_tmio_resources,
-};
-
-/* ---------------------------------------------------------- */
-
-static struct platform_device *devices[] __initdata = {
-        &e350_t7l66xb_device,
-};
-
-static void __init e350_init(void)
-{
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        eseries_register_clks();
-        eseries_get_tmio_gpios();
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_udc_info(&e7xx_udc_mach_info);
-}
-
-MACHINE_START(E350, "Toshiba e350")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e350_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c
deleted file mode 100644
index 55b950f12844..000000000000
--- a/arch/arm/mach-pxa/e400.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Hardware definitions for the Toshiba eseries PDAs
- *
- * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/t7l66xb.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/setup.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/pxa25x.h>
-#include <mach/eseries-gpio.h>
-#include <mach/pxafb.h>
-#include <mach/udc.h>
-#include <mach/irqs.h>
-
-#include "generic.h"
-#include "eseries.h"
-#include "clock.h"
-
-/* ------------------------ E400 LCD definitions ------------------------ */
-
-static struct pxafb_mode_info e400_pxafb_mode_info = {
-        .pixclock       = 140703,
-        .xres           = 240,
-        .yres           = 320,
-        .bpp            = 16,
-        .hsync_len      = 4,
-        .left_margin    = 28,
-        .right_margin   = 8,
-        .vsync_len      = 3,
-        .upper_margin   = 5,
-        .lower_margin   = 6,
-        .sync           = 0,
-};
-
-static struct pxafb_mach_info e400_pxafb_mach_info = {
-        .modes          = &e400_pxafb_mode_info,
-        .num_modes      = 1,
-        .lcd_conn       = LCD_COLOR_TFT_16BPP,
-        .lccr3          = 0,
-        .pxafb_backlight_power  = NULL,
-};
-
-/* ------------------------ E400 MFP config ----------------------------- */
-
-static unsigned long e400_pin_config[] __initdata = {
-        /* Chip selects */
-        GPIO15_nCS_1,   /* CS1 - Flash */
-        GPIO80_nCS_4,   /* CS4 - TMIO */
-
-        /* Clocks */
-        GPIO12_32KHz,
-
-        /* BTUART */
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-
-        /* TMIO controller */
-        GPIO19_GPIO, /* t7l66xb #PCLR */
-        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
-
-        /* wakeup */
-        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
-};
-
-/* ---------------------------------------------------------------------- */
-
-static struct mtd_partition partition_a = {
-        .name = "Internal NAND flash",
-        .offset =  0,
-        .size =  MTDPART_SIZ_FULL,
-};
-
-static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
-
-static struct nand_bbt_descr e400_t7l66xb_nand_bbt = {
-        .options = 0,
-        .offs = 4,
-        .len = 2,
-        .pattern = scan_ff_pattern
-};
-
-static struct tmio_nand_data e400_t7l66xb_nand_config = {
-        .num_partitions = 1,
-        .partition = &partition_a,
-        .badblock_pattern = &e400_t7l66xb_nand_bbt,
-};
-
-static struct t7l66xb_platform_data e400_t7l66xb_info = {
-        .irq_base               = IRQ_BOARD_START,
-        .enable                 = &eseries_tmio_enable,
-        .suspend                = &eseries_tmio_suspend,
-        .resume                 = &eseries_tmio_resume,
-
-        .nand_data              = &e400_t7l66xb_nand_config,
-};
-
-static struct platform_device e400_t7l66xb_device = {
-        .name           = "t7l66xb",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &e400_t7l66xb_info,
-        },
-        .num_resources = 2,
-        .resource      = eseries_tmio_resources,
-};
-
-/* ---------------------------------------------------------- */
-
-static struct platform_device *devices[] __initdata = {
-        &e400_t7l66xb_device,
-};
-
-static void __init e400_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        /* Fixme - e400 may have a switched clock */
-        eseries_register_clks();
-        eseries_get_tmio_gpios();
-        set_pxa_fb_info(&e400_pxafb_mach_info);
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_udc_info(&e7xx_udc_mach_info);
-}
-
-MACHINE_START(E400, "Toshiba e400")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e400_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
deleted file mode 100644
index d578021d1a10..000000000000
--- a/arch/arm/mach-pxa/e740.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * Hardware definitions for the Toshiba eseries PDAs
- *
- * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/fb.h>
-#include <linux/clk.h>
-#include <linux/mfd/t7l66xb.h>
-
-#include <video/w100fb.h>
-
-#include <asm/setup.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/pxa25x.h>
-#include <mach/eseries-gpio.h>
-#include <mach/udc.h>
-#include <mach/irda.h>
-#include <mach/irqs.h>
-#include <mach/audio.h>
-
-#include "generic.h"
-#include "eseries.h"
-#include "clock.h"
-#include "devices.h"
-
-/* ------------------------ e740 video support --------------------------- */
-
-static struct w100_gen_regs e740_lcd_regs = {
-        .lcd_format =            0x00008023,
-        .lcdd_cntl1 =            0x0f000000,
-        .lcdd_cntl2 =            0x0003ffff,
-        .genlcd_cntl1 =          0x00ffff03,
-        .genlcd_cntl2 =          0x003c0f03,
-        .genlcd_cntl3 =          0x000143aa,
-};
-
-static struct w100_mode e740_lcd_mode = {
-        .xres            = 240,
-        .yres            = 320,
-        .left_margin     = 20,
-        .right_margin    = 28,
-        .upper_margin    = 9,
-        .lower_margin    = 8,
-        .crtc_ss         = 0x80140013,
-        .crtc_ls         = 0x81150110,
-        .crtc_gs         = 0x80050005,
-        .crtc_vpos_gs    = 0x000a0009,
-        .crtc_rev        = 0x0040010a,
-        .crtc_dclk       = 0xa906000a,
-        .crtc_gclk       = 0x80050108,
-        .crtc_goe        = 0x80050108,
-        .pll_freq        = 57,
-        .pixclk_divider         = 4,
-        .pixclk_divider_rotated = 4,
-        .pixclk_src     = CLK_SRC_XTAL,
-        .sysclk_divider  = 1,
-        .sysclk_src     = CLK_SRC_PLL,
-        .crtc_ps1_active =       0x41060010,
-};
-
-static struct w100_gpio_regs e740_w100_gpio_info = {
-        .init_data1 = 0x21002103,
-        .gpio_dir1  = 0xffffdeff,
-        .gpio_oe1   = 0x03c00643,
-        .init_data2 = 0x003f003f,
-        .gpio_dir2  = 0xffffffff,
-        .gpio_oe2   = 0x000000ff,
-};
-
-static struct w100fb_mach_info e740_fb_info = {
-        .modelist   = &e740_lcd_mode,
-        .num_modes  = 1,
-        .regs       = &e740_lcd_regs,
-        .gpio       = &e740_w100_gpio_info,
-        .xtal_freq = 14318000,
-        .xtal_dbl   = 1,
-};
-
-static struct resource e740_fb_resources[] = {
-        [0] = {
-                .start          = 0x0c000000,
-                .end            = 0x0cffffff,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device e740_fb_device = {
-        .name           = "w100fb",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &e740_fb_info,
-        },
-        .num_resources  = ARRAY_SIZE(e740_fb_resources),
-        .resource       = e740_fb_resources,
-};
-
-/* --------------------------- MFP Pin config -------------------------- */
-
-static unsigned long e740_pin_config[] __initdata = {
-        /* Chip selects */
-        GPIO15_nCS_1,   /* CS1 - Flash */
-        GPIO79_nCS_3,   /* CS3 - IMAGEON */
-        GPIO80_nCS_4,   /* CS4 - TMIO */
-
-        /* Clocks */
-        GPIO12_32KHz,
-
-        /* BTUART */
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-
-        /* TMIO controller */
-        GPIO19_GPIO, /* t7l66xb #PCLR */
-        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
-
-        /* UDC */
-        GPIO13_GPIO,
-        GPIO3_GPIO,
-
-        /* IrDA */
-        GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
-
-        /* AC97 */
-        GPIO28_AC97_BITCLK,
-        GPIO29_AC97_SDATA_IN_0,
-        GPIO30_AC97_SDATA_OUT,
-        GPIO31_AC97_SYNC,
-
-        /* Audio power control */
-        GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
-        GPIO40_GPIO,  /* Mic amp power */
-        GPIO41_GPIO,  /* Headphone amp power */
-
-        /* PC Card */
-        GPIO8_GPIO,   /* CD0 */
-        GPIO44_GPIO,  /* CD1 */
-        GPIO11_GPIO,  /* IRQ0 */
-        GPIO6_GPIO,   /* IRQ1 */
-        GPIO27_GPIO,  /* RST0 */
-        GPIO24_GPIO,  /* RST1 */
-        GPIO20_GPIO,  /* PWR0 */
-        GPIO23_GPIO,  /* PWR1 */
-        GPIO48_nPOE,
-        GPIO49_nPWE,
-        GPIO50_nPIOR,
-        GPIO51_nPIOW,
-        GPIO52_nPCE_1,
-        GPIO53_nPCE_2,
-        GPIO54_nPSKTSEL,
-        GPIO55_nPREG,
-        GPIO56_nPWAIT,
-        GPIO57_nIOIS16,
-
-        /* wakeup */
-        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
-};
-
-/* -------------------- e740 t7l66xb parameters -------------------- */
-
-static struct t7l66xb_platform_data e740_t7l66xb_info = {
-        .irq_base               = IRQ_BOARD_START,
-        .enable                 = &eseries_tmio_enable,
-        .suspend                = &eseries_tmio_suspend,
-        .resume                 = &eseries_tmio_resume,
-};
-
-static struct platform_device e740_t7l66xb_device = {
-        .name           = "t7l66xb",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &e740_t7l66xb_info,
-        },
-        .num_resources = 2,
-        .resource      = eseries_tmio_resources,
-};
-
-/* ----------------------------------------------------------------------- */
-
-static struct platform_device *devices[] __initdata = {
-        &e740_fb_device,
-        &e740_t7l66xb_device,
-};
-
-static void __init e740_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        eseries_register_clks();
-        clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
-                        "UDCCLK", &pxa25x_device_udc.dev),
-        eseries_get_tmio_gpios();
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_udc_info(&e7xx_udc_mach_info);
-        pxa_set_ac97_info(NULL);
-        pxa_set_ficp_info(&e7xx_ficp_platform_data);
-}
-
-MACHINE_START(E740, "Toshiba e740")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e740_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
deleted file mode 100644
index af83caa52dd4..000000000000
--- a/arch/arm/mach-pxa/e750.c
+++ /dev/null
@@ -1,226 +0,0 @@
-/*
- * Hardware definitions for the Toshiba eseries PDAs
- *
- * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/fb.h>
-#include <linux/mfd/tc6393xb.h>
-
-#include <video/w100fb.h>
-
-#include <asm/setup.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/pxa25x.h>
-#include <mach/eseries-gpio.h>
-#include <mach/udc.h>
-#include <mach/irda.h>
-#include <mach/irqs.h>
-#include <mach/audio.h>
-
-#include "generic.h"
-#include "eseries.h"
-#include "clock.h"
-
-/* ---------------------- E750 LCD definitions -------------------- */
-
-static struct w100_gen_regs e750_lcd_regs = {
-        .lcd_format =            0x00008003,
-        .lcdd_cntl1 =            0x00000000,
-        .lcdd_cntl2 =            0x0003ffff,
-        .genlcd_cntl1 =          0x00fff003,
-        .genlcd_cntl2 =          0x003c0f03,
-        .genlcd_cntl3 =          0x000143aa,
-};
-
-static struct w100_mode e750_lcd_mode = {
-        .xres            = 240,
-        .yres            = 320,
-        .left_margin     = 21,
-        .right_margin    = 22,
-        .upper_margin    = 5,
-        .lower_margin    = 4,
-        .crtc_ss         = 0x80150014,
-        .crtc_ls         = 0x8014000d,
-        .crtc_gs         = 0xc1000005,
-        .crtc_vpos_gs    = 0x00020147,
-        .crtc_rev        = 0x0040010a,
-        .crtc_dclk       = 0xa1700030,
-        .crtc_gclk       = 0x80cc0015,
-        .crtc_goe        = 0x80cc0015,
-        .crtc_ps1_active = 0x61060017,
-        .pll_freq        = 57,
-        .pixclk_divider         = 4,
-        .pixclk_divider_rotated = 4,
-        .pixclk_src     = CLK_SRC_XTAL,
-        .sysclk_divider  = 1,
-        .sysclk_src     = CLK_SRC_PLL,
-};
-
-static struct w100_gpio_regs e750_w100_gpio_info = {
-        .init_data1 = 0x01192f1b,
-        .gpio_dir1  = 0xd5ffdeff,
-        .gpio_oe1   = 0x000020bf,
-        .init_data2 = 0x010f010f,
-        .gpio_dir2  = 0xffffffff,
-        .gpio_oe2   = 0x000001cf,
-};
-
-static struct w100fb_mach_info e750_fb_info = {
-        .modelist   = &e750_lcd_mode,
-        .num_modes  = 1,
-        .regs       = &e750_lcd_regs,
-        .gpio       = &e750_w100_gpio_info,
-        .xtal_freq  = 14318000,
-        .xtal_dbl   = 1,
-};
-
-static struct resource e750_fb_resources[] = {
-        [0] = {
-                .start          = 0x0c000000,
-                .end            = 0x0cffffff,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device e750_fb_device = {
-        .name           = "w100fb",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &e750_fb_info,
-        },
-        .num_resources  = ARRAY_SIZE(e750_fb_resources),
-        .resource       = e750_fb_resources,
-};
-
-/* -------------------- e750 MFP parameters -------------------- */
-
-static unsigned long e750_pin_config[] __initdata = {
-        /* Chip selects */
-        GPIO15_nCS_1,   /* CS1 - Flash */
-        GPIO79_nCS_3,   /* CS3 - IMAGEON */
-        GPIO80_nCS_4,   /* CS4 - TMIO */
-
-        /* Clocks */
-        GPIO11_3_6MHz,
-
-        /* BTUART */
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-
-        /* TMIO controller */
-        GPIO19_GPIO, /* t7l66xb #PCLR */
-        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
-
-        /* UDC */
-        GPIO13_GPIO,
-        GPIO3_GPIO,
-
-        /* IrDA */
-        GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
-
-        /* AC97 */
-        GPIO28_AC97_BITCLK,
-        GPIO29_AC97_SDATA_IN_0,
-        GPIO30_AC97_SDATA_OUT,
-        GPIO31_AC97_SYNC,
-
-        /* Audio power control */
-        GPIO4_GPIO,  /* Headphone amp power */
-        GPIO7_GPIO,  /* Speaker amp power */
-        GPIO37_GPIO, /* Headphone detect */
-
-        /* PC Card */
-        GPIO8_GPIO,   /* CD0 */
-        GPIO44_GPIO,  /* CD1 */
-        GPIO11_GPIO,  /* IRQ0 */
-        GPIO6_GPIO,   /* IRQ1 */
-        GPIO27_GPIO,  /* RST0 */
-        GPIO24_GPIO,  /* RST1 */
-        GPIO20_GPIO,  /* PWR0 */
-        GPIO23_GPIO,  /* PWR1 */
-        GPIO48_nPOE,
-        GPIO49_nPWE,
-        GPIO50_nPIOR,
-        GPIO51_nPIOW,
-        GPIO52_nPCE_1,
-        GPIO53_nPCE_2,
-        GPIO54_nPSKTSEL,
-        GPIO55_nPREG,
-        GPIO56_nPWAIT,
-        GPIO57_nIOIS16,
-
-        /* wakeup */
-        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
-};
-
-/* ----------------- e750 tc6393xb parameters ------------------ */
-
-static struct tc6393xb_platform_data e750_tc6393xb_info = {
-        .irq_base       = IRQ_BOARD_START,
-        .scr_pll2cr     = 0x0cc1,
-        .scr_gper       = 0,
-        .gpio_base      = -1,
-        .suspend        = &eseries_tmio_suspend,
-        .resume         = &eseries_tmio_resume,
-        .enable         = &eseries_tmio_enable,
-        .disable        = &eseries_tmio_disable,
-};
-
-static struct platform_device e750_tc6393xb_device = {
-        .name           = "tc6393xb",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &e750_tc6393xb_info,
-        },
-        .num_resources = 2,
-        .resource      = eseries_tmio_resources,
-};
-
-/* ------------------------------------------------------------- */
-
-static struct platform_device *devices[] __initdata = {
-        &e750_fb_device,
-        &e750_tc6393xb_device,
-};
-
-static void __init e750_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
-                        "GPIO11_CLK", NULL),
-        eseries_get_tmio_gpios();
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_udc_info(&e7xx_udc_mach_info);
-        pxa_set_ac97_info(NULL);
-        pxa_set_ficp_info(&e7xx_ficp_platform_data);
-}
-
-MACHINE_START(E750, "Toshiba e750")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e750_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
deleted file mode 100644
index 8ea97bf53fe1..000000000000
--- a/arch/arm/mach-pxa/e800.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * Hardware definitions for the Toshiba eseries PDAs
- *
- * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/fb.h>
-#include <linux/mfd/tc6393xb.h>
-
-#include <video/w100fb.h>
-
-#include <asm/setup.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include <mach/pxa25x.h>
-#include <mach/eseries-gpio.h>
-#include <mach/udc.h>
-#include <mach/irqs.h>
-#include <mach/audio.h>
-
-#include "generic.h"
-#include "eseries.h"
-#include "clock.h"
-
-/* ------------------------ e800 LCD definitions ------------------------- */
-
-static unsigned long e800_pin_config[] __initdata = {
-        /* AC97 */
-        GPIO28_AC97_BITCLK,
-        GPIO29_AC97_SDATA_IN_0,
-        GPIO30_AC97_SDATA_OUT,
-        GPIO31_AC97_SYNC,
-};
-
-static struct w100_gen_regs e800_lcd_regs = {
-        .lcd_format =            0x00008003,
-        .lcdd_cntl1 =            0x02a00000,
-        .lcdd_cntl2 =            0x0003ffff,
-        .genlcd_cntl1 =          0x000ff2a3,
-        .genlcd_cntl2 =          0x000002a3,
-        .genlcd_cntl3 =          0x000102aa,
-};
-
-static struct w100_mode e800_lcd_mode[2] = {
-        [0] = {
-                .xres            = 480,
-                .yres            = 640,
-                .left_margin     = 52,
-                .right_margin    = 148,
-                .upper_margin    = 2,
-                .lower_margin    = 6,
-                .crtc_ss         = 0x80350034,
-                .crtc_ls         = 0x802b0026,
-                .crtc_gs         = 0x80160016,
-                .crtc_vpos_gs    = 0x00020003,
-                .crtc_rev        = 0x0040001d,
-                .crtc_dclk       = 0xe0000000,
-                .crtc_gclk       = 0x82a50049,
-                .crtc_goe        = 0x80ee001c,
-                .crtc_ps1_active = 0x00000000,
-                .pll_freq        = 128,
-                .pixclk_divider         = 4,
-                .pixclk_divider_rotated = 6,
-                .pixclk_src     = CLK_SRC_PLL,
-                .sysclk_divider  = 0,
-                .sysclk_src     = CLK_SRC_PLL,
-        },
-        [1] = {
-                .xres            = 240,
-                .yres            = 320,
-                .left_margin     = 15,
-                .right_margin    = 88,
-                .upper_margin    = 0,
-                .lower_margin    = 7,
-                .crtc_ss         = 0xd010000f,
-                .crtc_ls         = 0x80070003,
-                .crtc_gs         = 0x80000000,
-                .crtc_vpos_gs    = 0x01460147,
-                .crtc_rev        = 0x00400003,
-                .crtc_dclk       = 0xa1700030,
-                .crtc_gclk       = 0x814b0008,
-                .crtc_goe        = 0x80cc0015,
-                .crtc_ps1_active = 0x00000000,
-                .pll_freq        = 100,
-                .pixclk_divider         = 6, /* Wince uses 14 which gives a */
-                .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
-                .pixclk_src     = CLK_SRC_PLL,
-                .sysclk_divider  = 0,
-                .sysclk_src     = CLK_SRC_PLL,
-        }
-};
-
-
-static struct w100_gpio_regs e800_w100_gpio_info = {
-        .init_data1 = 0xc13fc019,
-        .gpio_dir1  = 0x3e40df7f,
-        .gpio_oe1   = 0x003c3000,
-        .init_data2 = 0x00000000,
-        .gpio_dir2  = 0x00000000,
-        .gpio_oe2   = 0x00000000,
-};
-
-static struct w100_mem_info e800_w100_mem_info = {
-        .ext_cntl        = 0x09640011,
-        .sdram_mode_reg  = 0x00600021,
-        .ext_timing_cntl = 0x10001545,
-        .io_cntl         = 0x7ddd7333,
-        .size            = 0x1fffff,
-};
-
-static void e800_tg_change(struct w100fb_par *par)
-{
-        unsigned long tmp;
-
-        tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
-        if (par->mode->xres == 480)
-                tmp |= 0x100;
-        else
-                tmp &= ~0x100;
-        w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
-}
-
-static struct w100_tg_info e800_tg_info = {
-        .change = e800_tg_change,
-};
-
-static struct w100fb_mach_info e800_fb_info = {
-        .modelist   = e800_lcd_mode,
-        .num_modes  = 2,
-        .regs       = &e800_lcd_regs,
-        .gpio       = &e800_w100_gpio_info,
-        .mem        = &e800_w100_mem_info,
-        .tg         = &e800_tg_info,
-        .xtal_freq  = 16000000,
-};
-
-static struct resource e800_fb_resources[] = {
-        [0] = {
-                .start          = 0x0c000000,
-                .end            = 0x0cffffff,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device e800_fb_device = {
-        .name           = "w100fb",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &e800_fb_info,
-        },
-        .num_resources  = ARRAY_SIZE(e800_fb_resources),
-        .resource       = e800_fb_resources,
-};
-
-/* --------------------------- UDC definitions --------------------------- */
-
-static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
-        .gpio_vbus   = GPIO_E800_USB_DISC,
-        .gpio_pullup = GPIO_E800_USB_PULLUP,
-        .gpio_pullup_inverted = 1
-};
-
-/* ----------------- e800 tc6393xb parameters ------------------ */
-
-static struct tc6393xb_platform_data e800_tc6393xb_info = {
-        .irq_base       = IRQ_BOARD_START,
-        .scr_pll2cr     = 0x0cc1,
-        .scr_gper       = 0,
-        .gpio_base      = -1,
-        .suspend        = &eseries_tmio_suspend,
-        .resume         = &eseries_tmio_resume,
-        .enable         = &eseries_tmio_enable,
-        .disable        = &eseries_tmio_disable,
-};
-
-static struct platform_device e800_tc6393xb_device = {
-        .name           = "tc6393xb",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &e800_tc6393xb_info,
-        },
-        .num_resources = 2,
-        .resource      = eseries_tmio_resources,
-};
-
-/* ----------------------------------------------------------------------- */
-
-static struct platform_device *devices[] __initdata = {
-        &e800_fb_device,
-        &e800_tc6393xb_device,
-};
-
-static void __init e800_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-        clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
-                        "GPIO11_CLK", NULL),
-        eseries_get_tmio_gpios();
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_udc_info(&e800_udc_mach_info);
-        pxa_set_ac97_info(NULL);
-}
-
-MACHINE_START(E800, "Toshiba e800")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e800_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index a0ab3082a000..349212a1cbd3 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -15,6 +15,13 @@
 #include <linux/gpio.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/tc6387xb.h>
+#include <linux/mfd/tc6393xb.h>
+#include <linux/mfd/t7l66xb.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
+#include <video/w100fb.h>
 
 #include <asm/setup.h>
 #include <asm/mach/arch.h>
@@ -22,9 +29,12 @@
 
 #include <mach/pxa25x.h>
 #include <mach/eseries-gpio.h>
+#include <mach/audio.h>
+#include <mach/pxafb.h>
 #include <mach/udc.h>
 #include <mach/irda.h>
 
+#include "devices.h"
 #include "generic.h"
 #include "clock.h"
 
@@ -130,3 +140,802 @@ void eseries_register_clks(void)
         clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
 }
 
+#ifdef CONFIG_MACH_E330
+/* -------------------- e330 tc6387xb parameters -------------------- */
+
+static struct tc6387xb_platform_data e330_tc6387xb_info = {
+        .enable   = &eseries_tmio_enable,
+        .disable  = &eseries_tmio_disable,
+        .suspend  = &eseries_tmio_suspend,
+        .resume   = &eseries_tmio_resume,
+};
+
+static struct platform_device e330_tc6387xb_device = {
+        .name           = "tc6387xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e330_tc6387xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* --------------------------------------------------------------- */
+
+static struct platform_device *e330_devices[] __initdata = {
+        &e330_tc6387xb_device,
+};
+
+static void __init e330_init(void)
+{
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+        eseries_register_clks();
+        eseries_get_tmio_gpios();
+        platform_add_devices(ARRAY_AND_SIZE(e330_devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E330, "Toshiba e330")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e330_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_E350
+/* -------------------- e350 t7l66xb parameters -------------------- */
+
+static struct t7l66xb_platform_data e350_t7l66xb_info = {
+        .irq_base               = IRQ_BOARD_START,
+        .enable                 = &eseries_tmio_enable,
+        .suspend                = &eseries_tmio_suspend,
+        .resume                 = &eseries_tmio_resume,
+};
+
+static struct platform_device e350_t7l66xb_device = {
+        .name           = "t7l66xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e350_t7l66xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ---------------------------------------------------------- */
+
+static struct platform_device *e350_devices[] __initdata = {
+        &e350_t7l66xb_device,
+};
+
+static void __init e350_init(void)
+{
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+        eseries_register_clks();
+        eseries_get_tmio_gpios();
+        platform_add_devices(ARRAY_AND_SIZE(e350_devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E350, "Toshiba e350")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e350_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_E400
+/* ------------------------ E400 LCD definitions ------------------------ */
+
+static struct pxafb_mode_info e400_pxafb_mode_info = {
+        .pixclock       = 140703,
+        .xres           = 240,
+        .yres           = 320,
+        .bpp            = 16,
+        .hsync_len      = 4,
+        .left_margin    = 28,
+        .right_margin   = 8,
+        .vsync_len      = 3,
+        .upper_margin   = 5,
+        .lower_margin   = 6,
+        .sync           = 0,
+};
+
+static struct pxafb_mach_info e400_pxafb_mach_info = {
+        .modes          = &e400_pxafb_mode_info,
+        .num_modes      = 1,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP,
+        .lccr3          = 0,
+        .pxafb_backlight_power  = NULL,
+};
+
+/* ------------------------ E400 MFP config ----------------------------- */
+
+static unsigned long e400_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,   /* CS1 - Flash */
+        GPIO80_nCS_4,   /* CS4 - TMIO */
+
+        /* Clocks */
+        GPIO12_32KHz,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+
+        /* TMIO controller */
+        GPIO19_GPIO, /* t7l66xb #PCLR */
+        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
+
+        /* wakeup */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
+};
+
+/* ---------------------------------------------------------------------- */
+
+static struct mtd_partition partition_a = {
+        .name = "Internal NAND flash",
+        .offset =  0,
+        .size =  MTDPART_SIZ_FULL,
+};
+
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr e400_t7l66xb_nand_bbt = {
+        .options = 0,
+        .offs = 4,
+        .len = 2,
+        .pattern = scan_ff_pattern
+};
+
+static struct tmio_nand_data e400_t7l66xb_nand_config = {
+        .num_partitions = 1,
+        .partition = &partition_a,
+        .badblock_pattern = &e400_t7l66xb_nand_bbt,
+};
+
+static struct t7l66xb_platform_data e400_t7l66xb_info = {
+        .irq_base               = IRQ_BOARD_START,
+        .enable                 = &eseries_tmio_enable,
+        .suspend                = &eseries_tmio_suspend,
+        .resume                 = &eseries_tmio_resume,
+
+        .nand_data              = &e400_t7l66xb_nand_config,
+};
+
+static struct platform_device e400_t7l66xb_device = {
+        .name           = "t7l66xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e400_t7l66xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ---------------------------------------------------------- */
+
+static struct platform_device *e400_devices[] __initdata = {
+        &e400_t7l66xb_device,
+};
+
+static void __init e400_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+        /* Fixme - e400 may have a switched clock */
+        eseries_register_clks();
+        eseries_get_tmio_gpios();
+        set_pxa_fb_info(&e400_pxafb_mach_info);
+        platform_add_devices(ARRAY_AND_SIZE(e400_devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E400, "Toshiba e400")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e400_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_E740
+/* ------------------------ e740 video support --------------------------- */
+
+static struct w100_gen_regs e740_lcd_regs = {
+        .lcd_format =            0x00008023,
+        .lcdd_cntl1 =            0x0f000000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x00ffff03,
+        .genlcd_cntl2 =          0x003c0f03,
+        .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e740_lcd_mode = {
+        .xres            = 240,
+        .yres            = 320,
+        .left_margin     = 20,
+        .right_margin    = 28,
+        .upper_margin    = 9,
+        .lower_margin    = 8,
+        .crtc_ss         = 0x80140013,
+        .crtc_ls         = 0x81150110,
+        .crtc_gs         = 0x80050005,
+        .crtc_vpos_gs    = 0x000a0009,
+        .crtc_rev        = 0x0040010a,
+        .crtc_dclk       = 0xa906000a,
+        .crtc_gclk       = 0x80050108,
+        .crtc_goe        = 0x80050108,
+        .pll_freq        = 57,
+        .pixclk_divider         = 4,
+        .pixclk_divider_rotated = 4,
+        .pixclk_src     = CLK_SRC_XTAL,
+        .sysclk_divider  = 1,
+        .sysclk_src     = CLK_SRC_PLL,
+        .crtc_ps1_active =       0x41060010,
+};
+
+static struct w100_gpio_regs e740_w100_gpio_info = {
+        .init_data1 = 0x21002103,
+        .gpio_dir1  = 0xffffdeff,
+        .gpio_oe1   = 0x03c00643,
+        .init_data2 = 0x003f003f,
+        .gpio_dir2  = 0xffffffff,
+        .gpio_oe2   = 0x000000ff,
+};
+
+static struct w100fb_mach_info e740_fb_info = {
+        .modelist   = &e740_lcd_mode,
+        .num_modes  = 1,
+        .regs       = &e740_lcd_regs,
+        .gpio       = &e740_w100_gpio_info,
+        .xtal_freq = 14318000,
+        .xtal_dbl   = 1,
+};
+
+static struct resource e740_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device e740_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e740_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e740_fb_resources),
+        .resource       = e740_fb_resources,
+};
+
+/* --------------------------- MFP Pin config -------------------------- */
+
+static unsigned long e740_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,   /* CS1 - Flash */
+        GPIO79_nCS_3,   /* CS3 - IMAGEON */
+        GPIO80_nCS_4,   /* CS4 - TMIO */
+
+        /* Clocks */
+        GPIO12_32KHz,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+
+        /* TMIO controller */
+        GPIO19_GPIO, /* t7l66xb #PCLR */
+        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
+
+        /* UDC */
+        GPIO13_GPIO,
+        GPIO3_GPIO,
+
+        /* IrDA */
+        GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
+        /* Audio power control */
+        GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
+        GPIO40_GPIO,  /* Mic amp power */
+        GPIO41_GPIO,  /* Headphone amp power */
+
+        /* PC Card */
+        GPIO8_GPIO,   /* CD0 */
+        GPIO44_GPIO,  /* CD1 */
+        GPIO11_GPIO,  /* IRQ0 */
+        GPIO6_GPIO,   /* IRQ1 */
+        GPIO27_GPIO,  /* RST0 */
+        GPIO24_GPIO,  /* RST1 */
+        GPIO20_GPIO,  /* PWR0 */
+        GPIO23_GPIO,  /* PWR1 */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* wakeup */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
+};
+
+/* -------------------- e740 t7l66xb parameters -------------------- */
+
+static struct t7l66xb_platform_data e740_t7l66xb_info = {
+        .irq_base               = IRQ_BOARD_START,
+        .enable                 = &eseries_tmio_enable,
+        .suspend                = &eseries_tmio_suspend,
+        .resume                 = &eseries_tmio_resume,
+};
+
+static struct platform_device e740_t7l66xb_device = {
+        .name           = "t7l66xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e740_t7l66xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ----------------------------------------------------------------------- */
+
+static struct platform_device *e740_devices[] __initdata = {
+        &e740_fb_device,
+        &e740_t7l66xb_device,
+};
+
+static void __init e740_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+        eseries_register_clks();
+        clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
+                        "UDCCLK", &pxa25x_device_udc.dev),
+        eseries_get_tmio_gpios();
+        platform_add_devices(ARRAY_AND_SIZE(e740_devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+        pxa_set_ac97_info(NULL);
+        pxa_set_ficp_info(&e7xx_ficp_platform_data);
+}
+
+MACHINE_START(E740, "Toshiba e740")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e740_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_E750
+/* ---------------------- E750 LCD definitions -------------------- */
+
+static struct w100_gen_regs e750_lcd_regs = {
+        .lcd_format =            0x00008003,
+        .lcdd_cntl1 =            0x00000000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x00fff003,
+        .genlcd_cntl2 =          0x003c0f03,
+        .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e750_lcd_mode = {
+        .xres            = 240,
+        .yres            = 320,
+        .left_margin     = 21,
+        .right_margin    = 22,
+        .upper_margin    = 5,
+        .lower_margin    = 4,
+        .crtc_ss         = 0x80150014,
+        .crtc_ls         = 0x8014000d,
+        .crtc_gs         = 0xc1000005,
+        .crtc_vpos_gs    = 0x00020147,
+        .crtc_rev        = 0x0040010a,
+        .crtc_dclk       = 0xa1700030,
+        .crtc_gclk       = 0x80cc0015,
+        .crtc_goe        = 0x80cc0015,
+        .crtc_ps1_active = 0x61060017,
+        .pll_freq        = 57,
+        .pixclk_divider         = 4,
+        .pixclk_divider_rotated = 4,
+        .pixclk_src     = CLK_SRC_XTAL,
+        .sysclk_divider  = 1,
+        .sysclk_src     = CLK_SRC_PLL,
+};
+
+static struct w100_gpio_regs e750_w100_gpio_info = {
+        .init_data1 = 0x01192f1b,
+        .gpio_dir1  = 0xd5ffdeff,
+        .gpio_oe1   = 0x000020bf,
+        .init_data2 = 0x010f010f,
+        .gpio_dir2  = 0xffffffff,
+        .gpio_oe2   = 0x000001cf,
+};
+
+static struct w100fb_mach_info e750_fb_info = {
+        .modelist   = &e750_lcd_mode,
+        .num_modes  = 1,
+        .regs       = &e750_lcd_regs,
+        .gpio       = &e750_w100_gpio_info,
+        .xtal_freq  = 14318000,
+        .xtal_dbl   = 1,
+};
+
+static struct resource e750_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device e750_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e750_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e750_fb_resources),
+        .resource       = e750_fb_resources,
+};
+
+/* -------------------- e750 MFP parameters -------------------- */
+
+static unsigned long e750_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,   /* CS1 - Flash */
+        GPIO79_nCS_3,   /* CS3 - IMAGEON */
+        GPIO80_nCS_4,   /* CS4 - TMIO */
+
+        /* Clocks */
+        GPIO11_3_6MHz,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+
+        /* TMIO controller */
+        GPIO19_GPIO, /* t7l66xb #PCLR */
+        GPIO45_GPIO, /* t7l66xb #SUSPEND (NOT BTUART!) */
+
+        /* UDC */
+        GPIO13_GPIO,
+        GPIO3_GPIO,
+
+        /* IrDA */
+        GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
+        /* Audio power control */
+        GPIO4_GPIO,  /* Headphone amp power */
+        GPIO7_GPIO,  /* Speaker amp power */
+        GPIO37_GPIO, /* Headphone detect */
+
+        /* PC Card */
+        GPIO8_GPIO,   /* CD0 */
+        GPIO44_GPIO,  /* CD1 */
+        GPIO11_GPIO,  /* IRQ0 */
+        GPIO6_GPIO,   /* IRQ1 */
+        GPIO27_GPIO,  /* RST0 */
+        GPIO24_GPIO,  /* RST1 */
+        GPIO20_GPIO,  /* PWR0 */
+        GPIO23_GPIO,  /* PWR1 */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* wakeup */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
+};
+
+/* ----------------- e750 tc6393xb parameters ------------------ */
+
+static struct tc6393xb_platform_data e750_tc6393xb_info = {
+        .irq_base       = IRQ_BOARD_START,
+        .scr_pll2cr     = 0x0cc1,
+        .scr_gper       = 0,
+        .gpio_base      = -1,
+        .suspend        = &eseries_tmio_suspend,
+        .resume         = &eseries_tmio_resume,
+        .enable         = &eseries_tmio_enable,
+        .disable        = &eseries_tmio_disable,
+};
+
+static struct platform_device e750_tc6393xb_device = {
+        .name           = "tc6393xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e750_tc6393xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ------------------------------------------------------------- */
+
+static struct platform_device *e750_devices[] __initdata = {
+        &e750_fb_device,
+        &e750_tc6393xb_device,
+};
+
+static void __init e750_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+        clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
+                        "GPIO11_CLK", NULL),
+        eseries_get_tmio_gpios();
+        platform_add_devices(ARRAY_AND_SIZE(e750_devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+        pxa_set_ac97_info(NULL);
+        pxa_set_ficp_info(&e7xx_ficp_platform_data);
+}
+
+MACHINE_START(E750, "Toshiba e750")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e750_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_E800
+/* ------------------------ e800 LCD definitions ------------------------- */
+
+static unsigned long e800_pin_config[] __initdata = {
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+};
+
+static struct w100_gen_regs e800_lcd_regs = {
+        .lcd_format =            0x00008003,
+        .lcdd_cntl1 =            0x02a00000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x000ff2a3,
+        .genlcd_cntl2 =          0x000002a3,
+        .genlcd_cntl3 =          0x000102aa,
+};
+
+static struct w100_mode e800_lcd_mode[2] = {
+        [0] = {
+                .xres            = 480,
+                .yres            = 640,
+                .left_margin     = 52,
+                .right_margin    = 148,
+                .upper_margin    = 2,
+                .lower_margin    = 6,
+                .crtc_ss         = 0x80350034,
+                .crtc_ls         = 0x802b0026,
+                .crtc_gs         = 0x80160016,
+                .crtc_vpos_gs    = 0x00020003,
+                .crtc_rev        = 0x0040001d,
+                .crtc_dclk       = 0xe0000000,
+                .crtc_gclk       = 0x82a50049,
+                .crtc_goe        = 0x80ee001c,
+                .crtc_ps1_active = 0x00000000,
+                .pll_freq        = 128,
+                .pixclk_divider         = 4,
+                .pixclk_divider_rotated = 6,
+                .pixclk_src     = CLK_SRC_PLL,
+                .sysclk_divider  = 0,
+                .sysclk_src     = CLK_SRC_PLL,
+        },
+        [1] = {
+                .xres            = 240,
+                .yres            = 320,
+                .left_margin     = 15,
+                .right_margin    = 88,
+                .upper_margin    = 0,
+                .lower_margin    = 7,
+                .crtc_ss         = 0xd010000f,
+                .crtc_ls         = 0x80070003,
+                .crtc_gs         = 0x80000000,
+                .crtc_vpos_gs    = 0x01460147,
+                .crtc_rev        = 0x00400003,
+                .crtc_dclk       = 0xa1700030,
+                .crtc_gclk       = 0x814b0008,
+                .crtc_goe        = 0x80cc0015,
+                .crtc_ps1_active = 0x00000000,
+                .pll_freq        = 100,
+                .pixclk_divider         = 6, /* Wince uses 14 which gives a */
+                .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
+                .pixclk_src     = CLK_SRC_PLL,
+                .sysclk_divider  = 0,
+                .sysclk_src     = CLK_SRC_PLL,
+        }
+};
+
+
+static struct w100_gpio_regs e800_w100_gpio_info = {
+        .init_data1 = 0xc13fc019,
+        .gpio_dir1  = 0x3e40df7f,
+        .gpio_oe1   = 0x003c3000,
+        .init_data2 = 0x00000000,
+        .gpio_dir2  = 0x00000000,
+        .gpio_oe2   = 0x00000000,
+};
+
+static struct w100_mem_info e800_w100_mem_info = {
+        .ext_cntl        = 0x09640011,
+        .sdram_mode_reg  = 0x00600021,
+        .ext_timing_cntl = 0x10001545,
+        .io_cntl         = 0x7ddd7333,
+        .size            = 0x1fffff,
+};
+
+static void e800_tg_change(struct w100fb_par *par)
+{
+        unsigned long tmp;
+
+        tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
+        if (par->mode->xres == 480)
+                tmp |= 0x100;
+        else
+                tmp &= ~0x100;
+        w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
+}
+
+static struct w100_tg_info e800_tg_info = {
+        .change = e800_tg_change,
+};
+
+static struct w100fb_mach_info e800_fb_info = {
+        .modelist   = e800_lcd_mode,
+        .num_modes  = 2,
+        .regs       = &e800_lcd_regs,
+        .gpio       = &e800_w100_gpio_info,
+        .mem        = &e800_w100_mem_info,
+        .tg         = &e800_tg_info,
+        .xtal_freq  = 16000000,
+};
+
+static struct resource e800_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device e800_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e800_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e800_fb_resources),
+        .resource       = e800_fb_resources,
+};
+
+/* --------------------------- UDC definitions --------------------------- */
+
+static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
+        .gpio_vbus   = GPIO_E800_USB_DISC,
+        .gpio_pullup = GPIO_E800_USB_PULLUP,
+        .gpio_pullup_inverted = 1
+};
+
+/* ----------------- e800 tc6393xb parameters ------------------ */
+
+static struct tc6393xb_platform_data e800_tc6393xb_info = {
+        .irq_base       = IRQ_BOARD_START,
+        .scr_pll2cr     = 0x0cc1,
+        .scr_gper       = 0,
+        .gpio_base      = -1,
+        .suspend        = &eseries_tmio_suspend,
+        .resume         = &eseries_tmio_resume,
+        .enable         = &eseries_tmio_enable,
+        .disable        = &eseries_tmio_disable,
+};
+
+static struct platform_device e800_tc6393xb_device = {
+        .name           = "tc6393xb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &e800_tc6393xb_info,
+        },
+        .num_resources = 2,
+        .resource      = eseries_tmio_resources,
+};
+
+/* ----------------------------------------------------------------------- */
+
+static struct platform_device *e800_devices[] __initdata = {
+        &e800_fb_device,
+        &e800_tc6393xb_device,
+};
+
+static void __init e800_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+        clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
+                        "GPIO11_CLK", NULL),
+        eseries_get_tmio_gpios();
+        platform_add_devices(ARRAY_AND_SIZE(e800_devices));
+        pxa_set_udc_info(&e800_udc_mach_info);
+        pxa_set_ac97_info(NULL);
+}
+
+MACHINE_START(E800, "Toshiba e800")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e800_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
deleted file mode 100644
index 5161dca8ccc0..000000000000
--- a/arch/arm/mach-pxa/imote2.c
+++ /dev/null
@@ -1,590 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/imote2.c
- *
- * Author:      Ed C. Epp
- * Created:     Nov 05, 2002
- * Copyright:   Intel Corp.
- *
- * Modified 2008:  Jonathan Cameron
- *
- * The Imote2 is a wireless sensor node platform sold
- * by Crossbow (www.xbow.com).
- */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/platform_device.h>
-#include <linux/regulator/machine.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/spi/spi.h>
-#include <linux/i2c.h>
-#include <linux/mfd/da903x.h>
-#include <linux/sht15.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/flash.h>
-
-#include <mach/pxa27x.h>
-#include <plat/i2c.h>
-#include <mach/udc.h>
-#include <mach/mmc.h>
-#include <mach/pxa2xx_spi.h>
-#include <mach/pxa27x-udc.h>
-
-#include "devices.h"
-#include "generic.h"
-
-static unsigned long imote2_pin_config[] __initdata = {
-
-        /* Device Identification for wakeup*/
-        GPIO102_GPIO,
-
-        /* Button */
-        GPIO91_GPIO,
-
-        /* DA9030 */
-        GPIO1_GPIO,
-
-        /* MMC */
-        GPIO32_MMC_CLK,
-        GPIO112_MMC_CMD,
-        GPIO92_MMC_DAT_0,
-        GPIO109_MMC_DAT_1,
-        GPIO110_MMC_DAT_2,
-        GPIO111_MMC_DAT_3,
-
-        /* 802.15.4 radio - driver out of mainline */
-        GPIO22_GPIO,                    /* CC_RSTN */
-        GPIO114_GPIO,                   /* CC_FIFO */
-        GPIO116_GPIO,                   /* CC_CCA */
-        GPIO0_GPIO,                     /* CC_FIFOP */
-        GPIO16_GPIO,                    /* CCSFD */
-        GPIO115_GPIO,                   /* Power enable */
-
-        /* I2C */
-        GPIO117_I2C_SCL,
-        GPIO118_I2C_SDA,
-
-        /* SSP 3 - 802.15.4 radio */
-        GPIO39_GPIO,                    /* Chip Select */
-        GPIO34_SSP3_SCLK,
-        GPIO35_SSP3_TXD,
-        GPIO41_SSP3_RXD,
-
-        /* SSP 2 - to daughter boards */
-        GPIO37_GPIO,                    /* Chip Select */
-        GPIO36_SSP2_SCLK,
-        GPIO38_SSP2_TXD,
-        GPIO11_SSP2_RXD,
-
-        /* SSP 1 - to daughter boards */
-        GPIO24_GPIO,                    /* Chip Select */
-        GPIO23_SSP1_SCLK,
-        GPIO25_SSP1_TXD,
-        GPIO26_SSP1_RXD,
-
-        /* BTUART Basic Connector*/
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-        GPIO45_BTUART_RTS,
-
-        /* STUART Serial console via debug board*/
-        GPIO46_STUART_RXD,
-        GPIO47_STUART_TXD,
-
-        /* Basic sensor board */
-        GPIO96_GPIO,    /* accelerometer interrupt */
-        GPIO99_GPIO,    /* ADC interrupt */
-
-        /* SHT15 */
-        GPIO100_GPIO,
-        GPIO98_GPIO,
-
-        /* Connector pins specified as gpios */
-        GPIO94_GPIO, /* large basic connector pin 14 */
-        GPIO10_GPIO, /* large basic connector pin 23 */
-
-        /* LEDS */
-        GPIO103_GPIO, /* red led */
-        GPIO104_GPIO, /* green led */
-        GPIO105_GPIO, /* blue led */
-};
-
-static struct sht15_platform_data platform_data_sht15 = {
-        .gpio_data =  100,
-        .gpio_sck  =  98,
-};
-
-static struct platform_device sht15 = {
-        .name = "sht15",
-        .id = -1,
-        .dev = {
-                .platform_data = &platform_data_sht15,
-        },
-};
-
-static struct regulator_consumer_supply imote2_sensor_3_con[] = {
-        {
-                .dev = &sht15.dev,
-                .supply = "vcc",
-        },
-};
-
-static struct gpio_led imote2_led_pins[] = {
-        {
-                .name       =  "imote2:red",
-                .gpio       = 103,
-                .active_low = 1,
-        }, {
-                .name       = "imote2:green",
-                .gpio       = 104,
-                .active_low = 1,
-        }, {
-                .name       = "imote2:blue",
-                .gpio       = 105,
-                .active_low = 1,
-        },
-};
-
-static struct gpio_led_platform_data imote2_led_data = {
-        .num_leds = ARRAY_SIZE(imote2_led_pins),
-        .leds     = imote2_led_pins,
-};
-
-static struct platform_device imote2_leds = {
-        .name = "leds-gpio",
-        .id   = -1,
-        .dev = {
-                .platform_data = &imote2_led_data,
-        },
-};
-
-/* Reverse engineered partly from Platformx drivers */
-enum imote2_ldos{
-        vcc_vref,
-        vcc_cc2420,
-        vcc_mica,
-        vcc_bt,
-        /* The two voltages available to sensor boards */
-        vcc_sensor_1_8,
-        vcc_sensor_3,
-
-        vcc_sram_ext, /* directly connected to the pxa271 */
-        vcc_pxa_pll,
-        vcc_pxa_usim, /* Reference voltage for certain gpios */
-        vcc_pxa_mem,
-        vcc_pxa_flash,
-        vcc_pxa_core, /*Dc-Dc buck not yet supported */
-        vcc_lcd,
-        vcc_bb,
-        vcc_bbio,
-        vcc_io, /* cc2420 802.15.4 radio and pxa vcc_io ?*/
-};
-
-/* The values of the various regulator constraints are obviously dependent
- * on exactly what is wired to each ldo.  Unfortunately this information is
- * not generally available.  More information has been requested from Xbow
- * but as of yet they haven't been forthcoming.
- *
- * Some of these are clearly Stargate 2 related (no way of plugging
- * in an lcd on the IM2 for example!).
- */
-static struct regulator_init_data imote2_ldo_init_data[] = {
-        [vcc_bbio] = {
-                .constraints = { /* board default 1.8V */
-                        .name = "vcc_bbio",
-                        .min_uV = 1800000,
-                        .max_uV = 1800000,
-                },
-        },
-        [vcc_bb] = {
-                .constraints = { /* board default 2.8V */
-                        .name = "vcc_bb",
-                        .min_uV = 2700000,
-                        .max_uV = 3000000,
-                },
-        },
-        [vcc_pxa_flash] = {
-                .constraints = {/* default is 1.8V */
-                        .name = "vcc_pxa_flash",
-                        .min_uV = 1800000,
-                        .max_uV = 1800000,
-                },
-        },
-        [vcc_cc2420] = { /* also vcc_io */
-                .constraints = {
-                        /* board default is 2.8V */
-                        .name = "vcc_cc2420",
-                        .min_uV = 2700000,
-                        .max_uV = 3300000,
-                },
-        },
-        [vcc_vref] = { /* Reference for what? */
-                .constraints = { /* default 1.8V */
-                        .name = "vcc_vref",
-                        .min_uV = 1800000,
-                        .max_uV = 1800000,
-                },
-        },
-        [vcc_sram_ext] = {
-                .constraints = { /* default 2.8V */
-                        .name = "vcc_sram_ext",
-                        .min_uV = 2800000,
-                        .max_uV = 2800000,
-                },
-        },
-        [vcc_mica] = {
-                .constraints = { /* default 2.8V */
-                        .name = "vcc_mica",
-                        .min_uV = 2800000,
-                        .max_uV = 2800000,
-                },
-        },
-        [vcc_bt] = {
-                .constraints = { /* default 2.8V */
-                        .name = "vcc_bt",
-                        .min_uV = 2800000,
-                        .max_uV = 2800000,
-                },
-        },
-        [vcc_lcd] = {
-                .constraints = { /* default 2.8V */
-                        .name = "vcc_lcd",
-                        .min_uV = 2700000,
-                        .max_uV = 3300000,
-                },
-        },
-        [vcc_io] = { /* Same or higher than everything
-                          * bar vccbat and vccusb */
-                .constraints = { /* default 2.8V */
-                        .name = "vcc_io",
-                        .min_uV = 2692000,
-                        .max_uV = 3300000,
-                },
-        },
-        [vcc_sensor_1_8] = {
-                .constraints = { /* default 1.8V */
-                        .name = "vcc_sensor_1_8",
-                        .min_uV = 1800000,
-                        .max_uV = 1800000,
-                },
-        },
-        [vcc_sensor_3] = { /* curiously default 2.8V */
-                .constraints = {
-                        .name = "vcc_sensor_3",
-                        .min_uV = 2800000,
-                        .max_uV = 3000000,
-                },
-                .num_consumer_supplies = ARRAY_SIZE(imote2_sensor_3_con),
-                .consumer_supplies = imote2_sensor_3_con,
-        },
-        [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/
-                .constraints = {
-                        .name = "vcc_pxa_pll",
-                        .min_uV = 1170000,
-                        .max_uV = 1430000,
-                },
-        },
-        [vcc_pxa_usim] = {
-                .constraints = { /* default 1.8V */
-                        .name = "vcc_pxa_usim",
-                        .min_uV = 1710000,
-                        .max_uV = 2160000,
-                },
-        },
-        [vcc_pxa_mem] = {
-                .constraints = { /* default 1.8V */
-                        .name = "vcc_pxa_mem",
-                        .min_uV = 1800000,
-                        .max_uV = 1800000,
-                },
-        },
-};
-
-static struct da903x_subdev_info imote2_da9030_subdevs[] = {
-        {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO2,
-                .platform_data = &imote2_ldo_init_data[vcc_bbio],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO3,
-                .platform_data = &imote2_ldo_init_data[vcc_bb],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO4,
-                .platform_data = &imote2_ldo_init_data[vcc_pxa_flash],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO5,
-                .platform_data = &imote2_ldo_init_data[vcc_cc2420],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO6,
-                .platform_data = &imote2_ldo_init_data[vcc_vref],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO7,
-                .platform_data = &imote2_ldo_init_data[vcc_sram_ext],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO8,
-                .platform_data = &imote2_ldo_init_data[vcc_mica],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO9,
-                .platform_data = &imote2_ldo_init_data[vcc_bt],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO10,
-                .platform_data = &imote2_ldo_init_data[vcc_sensor_1_8],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO11,
-                .platform_data = &imote2_ldo_init_data[vcc_sensor_3],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO12,
-                .platform_data = &imote2_ldo_init_data[vcc_lcd],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO15,
-                .platform_data = &imote2_ldo_init_data[vcc_pxa_pll],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO17,
-                .platform_data = &imote2_ldo_init_data[vcc_pxa_usim],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO18,
-                .platform_data = &imote2_ldo_init_data[vcc_io],
-        }, {
-                .name = "da903x-regulator",
-                .id = DA9030_ID_LDO19,
-                .platform_data = &imote2_ldo_init_data[vcc_pxa_mem],
-        },
-};
-
-static struct da903x_platform_data imote2_da9030_pdata = {
-        .num_subdevs = ARRAY_SIZE(imote2_da9030_subdevs),
-        .subdevs = imote2_da9030_subdevs,
-};
-
-/* As the the imote2 doesn't currently have a conventional SD slot
- * there is no option to hotplug cards, making all this rather simple
- */
-static int imote2_mci_get_ro(struct device *dev)
-{
-        return 0;
-}
-
-/* Rather simple case as hotplugging not possible */
-static struct pxamci_platform_data imote2_mci_platform_data = {
-        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */
-        .get_ro = imote2_mci_get_ro,
-        .gpio_card_detect = -1,
-        .gpio_card_ro   = -1,
-        .gpio_power = -1,
-};
-
-static struct mtd_partition imote2flash_partitions[] = {
-        {
-                .name = "Bootloader",
-                .size = 0x00040000,
-                .offset = 0,
-                .mask_flags = MTD_WRITEABLE,
-        }, {
-                .name = "Kernel",
-                .size = 0x00200000,
-                .offset = 0x00040000,
-                .mask_flags = 0,
-        }, {
-                .name = "Filesystem",
-                .size = 0x01DC0000,
-                .offset = 0x00240000,
-                .mask_flags = 0,
-        },
-};
-
-static struct resource flash_resources = {
-        .start = PXA_CS0_PHYS,
-        .end = PXA_CS0_PHYS + SZ_32M - 1,
-        .flags = IORESOURCE_MEM,
-};
-
-static struct flash_platform_data imote2_flash_data = {
-        .map_name = "cfi_probe",
-        .parts = imote2flash_partitions,
-        .nr_parts = ARRAY_SIZE(imote2flash_partitions),
-        .name = "PXA27xOnChipROM",
-        .width = 2,
-};
-
-static struct platform_device imote2_flash_device = {
-        .name = "pxa2xx-flash",
-        .id = 0,
-        .dev = {
-                .platform_data = &imote2_flash_data,
-        },
-        .resource = &flash_resources,
-        .num_resources = 1,
-};
-
-/* Some of the drivers here are out of kernel at the moment (parts of IIO)
- * and it may be a while before they are in the mainline.
- */
-static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
-        { /* UCAM sensor board */
-                .type = "max1239",
-                .addr = 0x35,
-        }, { /* ITS400 Sensor board only */
-                .type = "max1363",
-                .addr = 0x34,
-                /* Through a nand gate - Also beware, on V2 sensor board the
-                 * pull up resistors are missing.
-                 */
-                .irq = IRQ_GPIO(99),
-        }, { /* ITS400 Sensor board only */
-                .type = "tsl2561",
-                .addr = 0x49,
-                /* Through a nand gate - Also beware, on V2 sensor board the
-                 * pull up resistors are missing.
-                 */
-                .irq = IRQ_GPIO(99),
-        }, { /* ITS400 Sensor board only */
-                .type = "tmp175",
-                .addr = 0x4A,
-                .irq = IRQ_GPIO(96),
-        }, { /* IMB400 Multimedia board */
-                .type = "wm8940",
-                .addr = 0x1A,
-        },
-};
-
-static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
-        {
-                .type = "da9030",
-                .addr = 0x49,
-                .platform_data = &imote2_da9030_pdata,
-                .irq = gpio_to_irq(1),
-        },
-};
-
-static struct pxa2xx_spi_master pxa_ssp_master_0_info = {
-        .num_chipselect = 1,
-};
-
-static struct pxa2xx_spi_master pxa_ssp_master_1_info = {
-        .num_chipselect = 1,
-};
-
-static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
-        .num_chipselect = 1,
-};
-
-static struct pxa2xx_spi_chip staccel_chip_info = {
-        .tx_threshold = 8,
-        .rx_threshold = 8,
-        .dma_burst_size = 8,
-        .timeout = 235,
-        .gpio_cs = 24,
-};
-
-static struct pxa2xx_spi_chip cc2420_info = {
-        .tx_threshold = 8,
-        .rx_threshold = 8,
-        .dma_burst_size = 8,
-        .timeout = 235,
-        .gpio_cs = 39,
-};
-
-static struct spi_board_info spi_board_info[] __initdata = {
-        { /* Driver in IIO */
-                .modalias = "lis3l02dq",
-                .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */
-                .bus_num = 1,
-                .chip_select = 0,
-                .controller_data = &staccel_chip_info,
-                .irq = IRQ_GPIO(96),
-        }, { /* Driver out of kernel as it needs considerable rewriting */
-                .modalias = "cc2420",
-                .max_speed_hz = 6500000,
-                .bus_num = 3,
-                .chip_select = 0,
-                .controller_data = &cc2420_info,
-        },
-};
-
-static void im2_udc_command(int cmd)
-{
-        switch (cmd) {
-        case PXA2XX_UDC_CMD_CONNECT:
-                UP2OCR |=  UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE;
-                break;
-        case PXA2XX_UDC_CMD_DISCONNECT:
-                UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE);
-                break;
-        }
-}
-
-static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = {
-        .udc_command            = im2_udc_command,
-};
-
-static struct platform_device *imote2_devices[] = {
-        &imote2_flash_device,
-        &imote2_leds,
-        &sht15,
-};
-
-static struct i2c_pxa_platform_data i2c_pwr_pdata = {
-        .fast_mode = 1,
-};
-
-static struct i2c_pxa_platform_data i2c_pdata = {
-        .fast_mode = 1,
-};
-
-static void __init imote2_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config));
-
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
-
-        platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
-
-        pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
-        pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info);
-        pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info);
-
-        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
-
-        i2c_register_board_info(0, imote2_i2c_board_info,
-                                ARRAY_SIZE(imote2_i2c_board_info));
-        i2c_register_board_info(1, imote2_pwr_i2c_board_info,
-                                ARRAY_SIZE(imote2_pwr_i2c_board_info));
-
-        pxa27x_set_i2c_power_info(&i2c_pwr_pdata);
-        pxa_set_i2c_info(&i2c_pdata);
-
-        pxa_set_mci_info(&imote2_mci_platform_data);
-        pxa_set_udc_info(&imote2_udc_info);
-}
-
-MACHINE_START(INTELMOTE2, "IMOTE 2")
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa27x_init_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = imote2_init,
-        .boot_params    = 0xA0000100,
-MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 1a741065045f..eec92e6fd7cf 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -26,21 +26,55 @@ enum balloon3_features {
 #define BALLOON3_FPGA_VIRT      (0xf1000000)    /* as per balloon2 */
 #define BALLOON3_FPGA_LENGTH    0x01000000
 
-/* FPGA/CPLD registers */
-#define BALLOON3_PCMCIA0_REG            (BALLOON3_FPGA_VIRT + 0x00e00008)
-/* fixme - same for now */
-#define BALLOON3_PCMCIA1_REG            (BALLOON3_FPGA_VIRT + 0x00e00008)
-#define BALLOON3_NANDIO_IO_REG          (BALLOON3_FPGA_VIRT + 0x00e00000)
+/* FPGA / CPLD registers for CF socket */
+#define BALLOON3_CF_STATUS_REG          (BALLOON3_FPGA_VIRT + 0x00e00008)
+#define BALLOON3_CF_CONTROL_REG         (BALLOON3_FPGA_VIRT + 0x00e00008)
+/* FPGA / CPLD version register */
+#define BALLOON3_FPGA_VER               (BALLOON3_FPGA_VIRT + 0x00e0001c)
+/* FPGA / CPLD registers for NAND flash */
+#define BALLOON3_NAND_BASE              (PXA_CS4_PHYS + 0x00e00000)
+#define BALLOON3_NAND_IO_REG            (BALLOON3_FPGA_VIRT + 0x00e00000)
+#define BALLOON3_NAND_CONTROL2_REG      (BALLOON3_FPGA_VIRT + 0x00e00010)
+#define BALLOON3_NAND_STAT_REG          (BALLOON3_FPGA_VIRT + 0x00e00010)
+#define BALLOON3_NAND_CONTROL_REG       (BALLOON3_FPGA_VIRT + 0x00e00014)
+
 /* fpga/cpld interrupt control register */
 #define BALLOON3_INT_CONTROL_REG        (BALLOON3_FPGA_VIRT + 0x00e0000C)
-#define BALLOON3_NANDIO_CTL2_REG        (BALLOON3_FPGA_VIRT + 0x00e00010)
-#define BALLOON3_NANDIO_CTL_REG         (BALLOON3_FPGA_VIRT + 0x00e00014)
 #define BALLOON3_VERSION_REG            (BALLOON3_FPGA_VIRT + 0x00e0001c)
 
 #define BALLOON3_SAMOSA_ADDR_REG        (BALLOON3_FPGA_VIRT + 0x00c00000)
 #define BALLOON3_SAMOSA_DATA_REG        (BALLOON3_FPGA_VIRT + 0x00c00004)
 #define BALLOON3_SAMOSA_STATUS_REG      (BALLOON3_FPGA_VIRT + 0x00c0001c)
 
+/* CF Status Register bits (read-only) bits */
+#define BALLOON3_CF_nIRQ                (1 << 0)
+#define BALLOON3_CF_nSTSCHG_BVD1        (1 << 1)
+
+/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */
+#define BALLOON3_CF_RESET               (1 << 0)
+#define BALLOON3_CF_ENABLE              (1 << 1)
+#define BALLOON3_CF_ADD_ENABLE          (1 << 2)
+
+/* CF Interrupt sources */
+#define BALLOON3_BP_CF_NRDY_IRQ         BALLOON3_IRQ(0)
+#define BALLOON3_BP_NSTSCHG_IRQ         BALLOON3_IRQ(1)
+
+/* NAND Control register */
+#define BALLOON3_NAND_CONTROL_FLWP      (1 << 7)
+#define BALLOON3_NAND_CONTROL_FLSE      (1 << 6)
+#define BALLOON3_NAND_CONTROL_FLCE3     (1 << 5)
+#define BALLOON3_NAND_CONTROL_FLCE2     (1 << 4)
+#define BALLOON3_NAND_CONTROL_FLCE1     (1 << 3)
+#define BALLOON3_NAND_CONTROL_FLCE0     (1 << 2)
+#define BALLOON3_NAND_CONTROL_FLALE     (1 << 1)
+#define BALLOON3_NAND_CONTROL_FLCLE     (1 << 0)
+
+/* NAND Status register */
+#define BALLOON3_NAND_STAT_RNB          (1 << 0)
+
+/* NAND Control2 register */
+#define BALLOON3_NAND_CONTROL2_16BIT    (1 << 0)
+
 /* GPIOs for irqs */
 #define BALLOON3_GPIO_AUX_NIRQ          (94)
 #define BALLOON3_GPIO_CODEC_IRQ         (95)
@@ -54,20 +88,24 @@ enum balloon3_features {
 
 #define BALLOON3_GPIO_S0_CD             (105)
 
+/* NAND */
+#define BALLOON3_GPIO_RUN_NAND          (102)
+
+/* PCF8574A Leds */
+#define BALLOON3_PCF_GPIO_BASE          160
+#define BALLOON3_PCF_GPIO_LED0          (BALLOON3_PCF_GPIO_BASE + 0)
+#define BALLOON3_PCF_GPIO_LED1          (BALLOON3_PCF_GPIO_BASE + 1)
+#define BALLOON3_PCF_GPIO_LED2          (BALLOON3_PCF_GPIO_BASE + 2)
+#define BALLOON3_PCF_GPIO_LED3          (BALLOON3_PCF_GPIO_BASE + 3)
+#define BALLOON3_PCF_GPIO_LED4          (BALLOON3_PCF_GPIO_BASE + 4)
+#define BALLOON3_PCF_GPIO_LED5          (BALLOON3_PCF_GPIO_BASE + 5)
+#define BALLOON3_PCF_GPIO_LED6          (BALLOON3_PCF_GPIO_BASE + 6)
+#define BALLOON3_PCF_GPIO_LED7          (BALLOON3_PCF_GPIO_BASE + 7)
+
 /* FPGA Interrupt Mask/Acknowledge Register */
 #define BALLOON3_INT_S0_IRQ             (1 << 0)  /* PCMCIA 0 IRQ */
 #define BALLOON3_INT_S0_STSCHG          (1 << 1)  /* PCMCIA 0 status changed */
 
-/* CF Status Register */
-#define BALLOON3_PCMCIA_nIRQ            (1 << 0)  /* IRQ / ready signal */
-#define BALLOON3_PCMCIA_nSTSCHG_BVD1    (1 << 1)
-                                        /* VDD sense / card status changed */
-
-/* CF control register (write) */
-#define BALLOON3_PCMCIA_RESET           (1 << 0)   /* Card reset signal */
-#define BALLOON3_PCMCIA_ENABLE          (1 << 1)
-#define BALLOON3_PCMCIA_ADD_ENABLE      (1 << 2)
-
 /* CPLD (and FPGA) interface definitions */
 #define CPLD_LCD0_DATA_SET             0x00
 #define CPLD_LCD0_DATA_CLR             0x10
@@ -132,9 +170,6 @@ enum balloon3_features {
 /* Balloon3 Interrupts */
 #define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
 
-#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
-#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
-
 #define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
 #define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
 #define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 5f2ba8d9015c..58dada11054f 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -5,6 +5,27 @@
 #include <mach/mfp.h>
 
 /*
+ * base board glue for PXA270 module
+ */
+
+enum {
+        COLIBRI_PXA270_EVALBOARD = 0,
+        COLIBRI_PXA270_INCOME,
+};
+
+#if defined(CONFIG_MACH_COLIBRI_PXA270_EVALBOARD)
+extern void colibri_pxa270_evalboard_init(void);
+#else
+static inline void colibri_pxa270_evalboard_init(void) {}
+#endif
+
+#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME)
+extern void colibri_pxa270_income_boardinit(void);
+#else
+static inline void colibri_pxa270_income_boardinit(void) {}
+#endif
+
+/*
  * common settings for all modules
  */
 
@@ -33,13 +54,10 @@ static inline void colibri_pxa3xx_init_nand(void) {}
 /* physical memory regions */
 #define COLIBRI_SDRAM_BASE      0xa0000000      /* SDRAM region */
 
-/* definitions for Colibri PXA270 */
-
-#define COLIBRI_PXA270_FLASH_PHYS       (PXA_CS0_PHYS)  /* Flash region */
-#define COLIBRI_PXA270_ETH_PHYS         (PXA_CS2_PHYS)  /* Ethernet */
-#define COLIBRI_PXA270_ETH_IRQ_GPIO     114
-#define COLIBRI_PXA270_ETH_IRQ          \
-        gpio_to_irq(mfp_to_gpio(COLIBRI_PXA270_ETH_IRQ_GPIO))
+/* GPIO definitions for Colibri PXA270 */
+#define GPIO114_COLIBRI_PXA270_ETH_IRQ  114
+#define GPIO0_COLIBRI_PXA270_SD_DETECT  0
+#define GPIO113_COLIBRI_PXA270_TS_IRQ   113
 
 #endif /* _COLIBRI_H_ */
 
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 585970ef08ce..0011055bc3f9 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -109,10 +109,5 @@
 #define CORGI_GPIO_BACKLIGHT_CONT       (CORGI_SCOOP_GPIO_BASE + 7)
 #define CORGI_GPIO_MIC_BIAS             (CORGI_SCOOP_GPIO_BASE + 8)
 
-/*
- * Shared data structures
- */
-extern struct platform_device corgiscoop_device;
-
 #endif /* __ASM_ARCH_CORGI_H  */
 
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 06abd4160607..9b898680b206 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -14,25 +14,15 @@
 
 /*
 GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean
-interrupt signal for determining cable presence. On the original gumstix,
-this is GPIO81, and GPIO83 needs to be defined as well. On the gumstix F,
+interrupt signal for determining cable presence. On the gumstix F,
 this moves to GPIO17 and GPIO37. */
 
 /* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
 has detected a cable insertion; driven low otherwise. */
 
-#ifdef CONFIG_ARCH_GUMSTIX_ORIG
-
-#define GPIO_GUMSTIX_USB_GPIOn          81
-#define GPIO_GUMSTIX_USB_GPIOx          83
-
-#else
-
 #define GPIO_GUMSTIX_USB_GPIOn          35
 #define GPIO_GUMSTIX_USB_GPIOx          41
 
-#endif
-
 /* usb state change */
 #define GUMSTIX_USB_INTR_IRQ            IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)
 
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 3d8d8cb09685..7f64d24cd564 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -14,11 +14,6 @@
 #define __ASM_ARCH_HARDWARE_H
 
 /*
- * We requires absolute addresses.
- */
-#define PCIO_BASE               0
-
-/*
  * Workarounds for at least 2 errata so far require this.
  * The mapping is set in mach-pxa/generic.c.
  */
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
new file mode 100644
index 000000000000..0a5e5eadebf5
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -0,0 +1,81 @@
+/*
+ * Common functions for Palm LD, T5, TX, Z72
+ *
+ * Copyright (C) 2010
+ * Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __INCLUDE_MACH_PALM27X__
+#define __INCLUDE_MACH_PALM27X__
+
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+extern void __init palm27x_mmc_init(int detect, int ro, int power,
+                                        int power_inverted);
+#else
+static inline void palm27x_mmc_init(int detect, int ro, int power,
+                                        int power_inverted)
+{}
+#endif
+
+#if defined(CONFIG_SUSPEND)
+extern void __init palm27x_pm_init(unsigned long str_base);
+#else
+static inline void palm27x_pm_init(unsigned long str_base) {}
+#endif
+
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+extern struct pxafb_mode_info palm_320x480_lcd_mode;
+extern struct pxafb_mode_info palm_320x320_lcd_mode;
+extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
+extern void __init palm27x_lcd_init(int power,
+                                        struct pxafb_mode_info *mode);
+#else
+static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {}
+#endif
+
+#if     defined(CONFIG_USB_GADGET_PXA27X) || \
+        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+extern void __init palm27x_udc_init(int vbus, int pullup,
+                                        int vbus_inverted);
+#else
+static inline void palm27x_udc_init(int vbus, int pullup, int vbus_inverted) {}
+#endif
+
+#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
+extern void __init palm27x_irda_init(int pwdn);
+#else
+static inline void palm27x_irda_init(int pwdn) {}
+#endif
+
+#if     defined(CONFIG_TOUCHSCREEN_WM97XX) || \
+        defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE)
+extern void __init palm27x_ac97_init(int minv, int maxv, int jack,
+                                        int reset);
+#else
+static inline void palm27x_ac97_init(int minv, int maxv, int jack, int reset) {}
+#endif
+
+#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
+extern void __init palm27x_pwm_init(int bl, int lcd);
+#else
+static inline void palm27x_pwm_init(int bl, int lcd) {}
+#endif
+
+#if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE)
+extern void __init palm27x_power_init(int ac, int usb);
+#else
+static inline void palm27x_power_init(int ac, int usb) {}
+#endif
+
+#if defined(CONFIG_REGULATOR_MAX1586) || \
+    defined(CONFIG_REGULATOR_MAX1586_MODULE)
+extern void __init palm27x_pmic_init(void);
+#else
+static inline void palm27x_pmic_init(void) {}
+#endif
+
+#endif  /* __INCLUDE_MACH_PALM27X__ */
diff --git a/arch/arm/mach-pxa/include/mach/pata_pxa.h b/arch/arm/mach-pxa/include/mach/pata_pxa.h
new file mode 100644
index 000000000000..6cf7df1d5830
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pata_pxa.h
@@ -0,0 +1,33 @@
+/*
+ * Generic PXA PATA driver
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; see the file COPYING.  If not, write to
+ *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __MACH_PATA_PXA_H__
+#define __MACH_PATA_PXA_H__
+
+struct pata_pxa_pdata {
+        /* PXA DMA DREQ<0:2> pin */
+        uint32_t        dma_dreq;
+        /* Register shift */
+        uint32_t        reg_shift;
+        /* IRQ flags */
+        uint32_t        irq_flags;
+};
+
+#endif  /* __MACH_PATA_PXA_H__ */
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl.h b/arch/arm/mach-pxa/include/mach/sharpsl.h
deleted file mode 100644
index 8242e14a44fa..000000000000
--- a/arch/arm/mach-pxa/include/mach/sharpsl.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * SharpSL SSP Driver
- */
-
-unsigned long corgi_ssp_ads7846_putget(unsigned long);
-unsigned long corgi_ssp_ads7846_get(void);
-void corgi_ssp_ads7846_put(unsigned long data);
-void corgi_ssp_ads7846_lock(void);
-void corgi_ssp_ads7846_unlock(void);
-void corgi_ssp_lcdtg_send (unsigned char adrs, unsigned char data);
-void corgi_ssp_blduty_set(int duty);
-int corgi_ssp_max1111_get(unsigned long data);
-
-/*
- * SharpSL Touchscreen Driver
- */
-
-struct corgits_machinfo {
-        unsigned long (*get_hsync_invperiod)(void);
-        void (*put_hsync)(void);
-        void (*wait_hsync)(void);
-};
-
-
-/*
- * SharpSL Backlight
- */
-extern void corgibl_limit_intensity(int limit);
-extern void corgi_lcd_limit_intensity(int limit);
-
-
-/*
- * SharpSL Battery/PM Driver
- */
-extern void sharpsl_battery_kick(void);
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl_pm.h b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
index 1920dc6b05dc..905be6755f04 100644
--- a/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
+++ b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
@@ -93,6 +93,8 @@ struct sharpsl_pm_status {
 
 extern struct sharpsl_pm_status sharpsl_pm;
 
+extern struct battery_thresh sharpsl_battery_levels_acin[];
+extern struct battery_thresh sharpsl_battery_levels_noac[];
 
 #define SHARPSL_LED_ERROR  2
 #define SHARPSL_LED_ON     1
@@ -101,4 +103,11 @@ extern struct sharpsl_pm_status sharpsl_pm;
 void sharpsl_battery_kick(void);
 void sharpsl_pm_led(int val);
 
+/* MAX1111 Channel Definitions */
+#define MAX1111_BATT_VOLT   4u
+#define MAX1111_BATT_TEMP   2u
+#define MAX1111_ACIN_VOLT   6u
+int sharpsl_pm_pxa_read_max1111(int channel);
+
+void corgi_lcd_limit_intensity(int limit);
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index fa1998caa78e..685749a51c42 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -185,7 +185,5 @@
 /*
  * Shared data structures
  */
-extern struct platform_device spitzscoop_device;
-extern struct platform_device spitzscoop2_device;
 extern struct platform_device spitzssp_device;
 extern struct sharpsl_charger_machinfo spitz_pm_machinfo;
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index fa6a708b4099..dc66942ef9ab 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -34,7 +34,7 @@
 #include <linux/irq.h>
 #include <linux/pda_power.h>
 #include <linux/power_supply.h>
-#include <linux/wm97xx_batt.h>
+#include <linux/wm97xx.h>
 #include <linux/mtd/physmap.h>
 #include <linux/usb/gpio_vbus.h>
 #include <linux/regulator/max1586.h>
@@ -636,7 +636,7 @@ static struct platform_device power_dev = {
         },
 };
 
-static struct wm97xx_batt_info mioa701_battery_data = {
+static struct wm97xx_batt_pdata mioa701_battery_data = {
         .batt_aux       = WM97XX_AUX_ID1,
         .temp_aux       = -1,
         .charge_gpio    = -1,
@@ -648,6 +648,10 @@ static struct wm97xx_batt_info mioa701_battery_data = {
         .batt_name      = "mioa701_battery",
 };
 
+static struct wm97xx_pdata mioa701_wm97xx_pdata = {
+        .batt_pdata     = &mioa701_battery_data,
+};
+
 /*
  * Voltage regulation
  */
@@ -716,6 +720,7 @@ struct i2c_pxa_platform_data i2c_pdata = {
 
 static pxa2xx_audio_ops_t mioa701_ac97_info = {
         .reset_gpio = 95,
+        .codec_pdata = { &mioa701_wm97xx_pdata, },
 };
 
 /*
@@ -794,7 +799,6 @@ static void __init mioa701_machine_init(void)
         set_pxa_fb_info(&mioa701_pxafb_info);
         pxa_set_mci_info(&mioa701_mci_info);
         pxa_set_keypad_info(&mioa701_keypad_info);
-        wm97xx_bat_set_pdata(&mioa701_battery_data);
         pxa_set_udc_info(&mioa701_udc_info);
         pxa_set_ac97_info(&mioa701_ac97_info);
         pm_power_off = mioa701_poweroff;
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
new file mode 100644
index 000000000000..77ad6d34ab5b
--- /dev/null
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -0,0 +1,477 @@
+/*
+ * Common code for Palm LD, T5, TX, Z72
+ *
+ * Copyright (C) 2010
+ * Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/pda_power.h>
+#include <linux/pwm_backlight.h>
+#include <linux/gpio.h>
+#include <linux/wm97xx.h>
+#include <linux/power_supply.h>
+#include <linux/usb/gpio_vbus.h>
+#include <linux/regulator/max1586.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/pxa27x.h>
+#include <mach/audio.h>
+#include <mach/mmc.h>
+#include <mach/pxafb.h>
+#include <mach/irda.h>
+#include <mach/udc.h>
+#include <mach/palmasoc.h>
+#include <mach/palm27x.h>
+
+#include <plat/i2c.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
+static struct pxamci_platform_data palm27x_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .detect_delay_ms        = 200,
+};
+
+void __init palm27x_mmc_init(int detect, int ro, int power,
+                                        int power_inverted)
+{
+        palm27x_mci_platform_data.gpio_card_detect      = detect;
+        palm27x_mci_platform_data.gpio_card_ro          = ro;
+        palm27x_mci_platform_data.gpio_power            = power;
+        palm27x_mci_platform_data.gpio_power_invert     = power_inverted;
+
+        pxa_set_mci_info(&palm27x_mci_platform_data);
+}
+#endif
+
+/******************************************************************************
+ * Power management - standby
+ ******************************************************************************/
+#if defined(CONFIG_SUSPEND)
+void __init palm27x_pm_init(unsigned long str_base)
+{
+        static const unsigned long resume[] = {
+                0xe3a00101,     /* mov  r0,     #0x40000000 */
+                0xe380060f,     /* orr  r0, r0, #0x00f00000 */
+                0xe590f008,     /* ldr  pc, [r0, #0x08] */
+        };
+
+        /*
+         * Copy the bootloader.
+         * NOTE: PalmZ72 uses a different wakeup method!
+         */
+        memcpy(phys_to_virt(str_base), resume, sizeof(resume));
+}
+#endif
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+struct pxafb_mode_info palm_320x480_lcd_mode = {
+        .pixclock       = 57692,
+        .xres           = 320,
+        .yres           = 480,
+        .bpp            = 16,
+
+        .left_margin    = 32,
+        .right_margin   = 1,
+        .upper_margin   = 7,
+        .lower_margin   = 1,
+
+        .hsync_len      = 4,
+        .vsync_len      = 1,
+};
+
+struct pxafb_mode_info palm_320x320_lcd_mode = {
+        .pixclock       = 115384,
+        .xres           = 320,
+        .yres           = 320,
+        .bpp            = 16,
+
+        .left_margin    = 27,
+        .right_margin   = 7,
+        .upper_margin   = 7,
+        .lower_margin   = 8,
+
+        .hsync_len      = 6,
+        .vsync_len      = 1,
+};
+
+struct pxafb_mode_info palm_320x320_new_lcd_mode = {
+        .pixclock       = 86538,
+        .xres           = 320,
+        .yres           = 320,
+        .bpp            = 16,
+
+        .left_margin    = 20,
+        .right_margin   = 8,
+        .upper_margin   = 8,
+        .lower_margin   = 5,
+
+        .hsync_len      = 4,
+        .vsync_len      = 1,
+};
+
+static struct pxafb_mach_info palm27x_lcd_screen = {
+        .num_modes      = 1,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static int palm27x_lcd_power;
+static void palm27x_lcd_ctl(int on, struct fb_var_screeninfo *info)
+{
+        gpio_set_value(palm27x_lcd_power, on);
+}
+
+void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
+{
+        palm27x_lcd_screen.modes = mode;
+
+        if (gpio_is_valid(power)) {
+                if (!gpio_request(power, "LCD power")) {
+                        pr_err("Palm27x: failed to claim lcd power gpio!\n");
+                        return;
+                }
+                if (!gpio_direction_output(power, 1)) {
+                        pr_err("Palm27x: lcd power configuration failed!\n");
+                        return;
+                }
+                palm27x_lcd_power = power;
+                palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
+        }
+
+        set_pxa_fb_info(&palm27x_lcd_screen);
+}
+#endif
+
+/******************************************************************************
+ * USB Gadget
+ ******************************************************************************/
+#if     defined(CONFIG_USB_GADGET_PXA27X) || \
+        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+static struct gpio_vbus_mach_info palm27x_udc_info = {
+        .gpio_vbus_inverted     = 1,
+};
+
+static struct platform_device palm27x_gpio_vbus = {
+        .name   = "gpio-vbus",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &palm27x_udc_info,
+        },
+};
+
+void __init palm27x_udc_init(int vbus, int pullup, int vbus_inverted)
+{
+        palm27x_udc_info.gpio_vbus      = vbus;
+        palm27x_udc_info.gpio_pullup    = pullup;
+
+        palm27x_udc_info.gpio_vbus_inverted = vbus_inverted;
+
+        if (!gpio_request(pullup, "USB Pullup")) {
+                gpio_direction_output(pullup,
+                        palm27x_udc_info.gpio_vbus_inverted);
+                gpio_free(pullup);
+        } else
+                return;
+
+        platform_device_register(&palm27x_gpio_vbus);
+}
+#endif
+
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
+static struct pxaficp_platform_data palm27x_ficp_platform_data = {
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+};
+
+void __init palm27x_irda_init(int pwdn)
+{
+        palm27x_ficp_platform_data.gpio_pwdown = pwdn;
+        pxa_set_ficp_info(&palm27x_ficp_platform_data);
+}
+#endif
+
+/******************************************************************************
+ * WM97xx audio, battery
+ ******************************************************************************/
+#if     defined(CONFIG_TOUCHSCREEN_WM97XX) || \
+        defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE)
+static struct wm97xx_batt_pdata palm27x_batt_pdata = {
+        .batt_aux       = WM97XX_AUX_ID3,
+        .temp_aux       = WM97XX_AUX_ID2,
+        .charge_gpio    = -1,
+        .batt_mult      = 1000,
+        .batt_div       = 414,
+        .temp_mult      = 1,
+        .temp_div       = 1,
+        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LIPO,
+        .batt_name      = "main-batt",
+};
+
+static struct wm97xx_pdata palm27x_wm97xx_pdata = {
+        .batt_pdata     = &palm27x_batt_pdata,
+};
+
+static pxa2xx_audio_ops_t palm27x_ac97_pdata = {
+        .codec_pdata    = { &palm27x_wm97xx_pdata, },
+};
+
+static struct palm27x_asoc_info palm27x_asoc_pdata = {
+        .jack_gpio      = -1,
+};
+
+static struct platform_device palm27x_asoc = {
+        .name = "palm27x-asoc",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &palm27x_asoc_pdata,
+        },
+};
+
+void __init palm27x_ac97_init(int minv, int maxv, int jack, int reset)
+{
+        palm27x_ac97_pdata.reset_gpio   = reset;
+        palm27x_asoc_pdata.jack_gpio    = jack;
+
+        if (minv < 0 || maxv < 0) {
+                palm27x_ac97_pdata.codec_pdata[0] = NULL;
+                pxa_set_ac97_info(&palm27x_ac97_pdata);
+        } else {
+                palm27x_batt_pdata.min_voltage  = minv,
+                palm27x_batt_pdata.max_voltage  = maxv,
+
+                pxa_set_ac97_info(&palm27x_ac97_pdata);
+                platform_device_register(&palm27x_asoc);
+        }
+}
+#endif
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
+static int palm_bl_power;
+static int palm_lcd_power;
+
+static int palm27x_backlight_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(palm_bl_power, "BL POWER");
+        if (ret)
+                goto err;
+        ret = gpio_direction_output(palm_bl_power, 0);
+        if (ret)
+                goto err2;
+
+        if (gpio_is_valid(palm_lcd_power)) {
+                ret = gpio_request(palm_lcd_power, "LCD POWER");
+                if (ret)
+                        goto err2;
+                ret = gpio_direction_output(palm_lcd_power, 0);
+                if (ret)
+                        goto err3;
+        }
+
+        return 0;
+err3:
+        gpio_free(palm_lcd_power);
+err2:
+        gpio_free(palm_bl_power);
+err:
+        return ret;
+}
+
+static int palm27x_backlight_notify(struct device *dev, int brightness)
+{
+        gpio_set_value(palm_bl_power, brightness);
+        if (gpio_is_valid(palm_lcd_power))
+                gpio_set_value(palm_lcd_power, brightness);
+        return brightness;
+}
+
+static void palm27x_backlight_exit(struct device *dev)
+{
+        gpio_free(palm_bl_power);
+        if (gpio_is_valid(palm_lcd_power))
+                gpio_free(palm_lcd_power);
+}
+
+static struct platform_pwm_backlight_data palm27x_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 0xfe,
+        .dft_brightness = 0x7e,
+        .pwm_period_ns  = 3500,
+        .init           = palm27x_backlight_init,
+        .notify         = palm27x_backlight_notify,
+        .exit           = palm27x_backlight_exit,
+};
+
+static struct platform_device palm27x_backlight = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa27x_device_pwm0.dev,
+                .platform_data  = &palm27x_backlight_data,
+        },
+};
+
+void __init palm27x_pwm_init(int bl, int lcd)
+{
+        palm_bl_power   = bl;
+        palm_lcd_power  = lcd;
+        platform_device_register(&palm27x_backlight);
+}
+#endif
+
+/******************************************************************************
+ * Power supply
+ ******************************************************************************/
+#if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE)
+static int palm_ac_state;
+static int palm_usb_state;
+
+static int palm27x_power_supply_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(palm_ac_state, "AC state");
+        if (ret)
+                goto err1;
+        ret = gpio_direction_input(palm_ac_state);
+        if (ret)
+                goto err2;
+
+        if (gpio_is_valid(palm_usb_state)) {
+                ret = gpio_request(palm_usb_state, "USB state");
+                if (ret)
+                        goto err2;
+                ret = gpio_direction_input(palm_usb_state);
+                if (ret)
+                        goto err3;
+        }
+
+        return 0;
+err3:
+        gpio_free(palm_usb_state);
+err2:
+        gpio_free(palm_ac_state);
+err1:
+        return ret;
+}
+
+static void palm27x_power_supply_exit(struct device *dev)
+{
+        gpio_free(palm_usb_state);
+        gpio_free(palm_ac_state);
+}
+
+static int palm27x_is_ac_online(void)
+{
+        return gpio_get_value(palm_ac_state);
+}
+
+static int palm27x_is_usb_online(void)
+{
+        return !gpio_get_value(palm_usb_state);
+}
+static char *palm27x_supplicants[] = {
+        "main-battery",
+};
+
+static struct pda_power_pdata palm27x_ps_info = {
+        .init                   = palm27x_power_supply_init,
+        .exit                   = palm27x_power_supply_exit,
+        .is_ac_online           = palm27x_is_ac_online,
+        .is_usb_online          = palm27x_is_usb_online,
+        .supplied_to            = palm27x_supplicants,
+        .num_supplicants        = ARRAY_SIZE(palm27x_supplicants),
+};
+
+static struct platform_device palm27x_power_supply = {
+        .name = "pda-power",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &palm27x_ps_info,
+        },
+};
+
+void __init palm27x_power_init(int ac, int usb)
+{
+        palm_ac_state   = ac;
+        palm_usb_state  = usb;
+        platform_device_register(&palm27x_power_supply);
+}
+#endif
+
+/******************************************************************************
+ * Core power regulator
+ ******************************************************************************/
+#if defined(CONFIG_REGULATOR_MAX1586) || \
+    defined(CONFIG_REGULATOR_MAX1586_MODULE)
+static struct regulator_consumer_supply palm27x_max1587a_consumers[] = {
+        {
+                .supply = "vcc_core",
+        }
+};
+
+static struct regulator_init_data palm27x_max1587a_v3_info = {
+        .constraints = {
+                .name           = "vcc_core range",
+                .min_uV         = 900000,
+                .max_uV         = 1705000,
+                .always_on      = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+        },
+        .consumer_supplies      = palm27x_max1587a_consumers,
+        .num_consumer_supplies  = ARRAY_SIZE(palm27x_max1587a_consumers),
+};
+
+static struct max1586_subdev_data palm27x_max1587a_subdevs[] = {
+        {
+                .name           = "vcc_core",
+                .id             = MAX1586_V3,
+                .platform_data  = &palm27x_max1587a_v3_info,
+        }
+};
+
+static struct max1586_platform_data palm27x_max1587a_info = {
+        .subdevs     = palm27x_max1587a_subdevs,
+        .num_subdevs = ARRAY_SIZE(palm27x_max1587a_subdevs),
+        .v3_gain     = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
+};
+
+static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = {
+        {
+                I2C_BOARD_INFO("max1586", 0x14),
+                .platform_data  = &palm27x_max1587a_info,
+        },
+};
+
+void __init palm27x_pmic_init(void)
+{
+        i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info));
+        pxa27x_set_i2c_power_info(NULL);
+}
+#endif
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 1963819dba98..91038eeafe44 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -22,7 +22,7 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
-#include <linux/wm97xx_batt.h>
+#include <linux/wm97xx.h>
 #include <linux/power_supply.h>
 #include <linux/sysdev.h>
 #include <linux/mtd/mtd.h>
@@ -41,6 +41,7 @@
 #include <mach/irda.h>
 #include <mach/pxa27x_keypad.h>
 #include <mach/palmasoc.h>
+#include <mach/palm27x.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -127,6 +128,7 @@ static unsigned long palmld_pin_config[] __initdata = {
 /******************************************************************************
  * NOR Flash
  ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 static struct mtd_partition palmld_partitions[] = {
         {
                 .name           = "Flash",
@@ -160,20 +162,18 @@ static struct platform_device palmld_flash = {
         },
 };
 
-/******************************************************************************
- * SD/MMC card controller
- ******************************************************************************/
-static struct pxamci_platform_data palmld_mci_platform_data = {
-        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .gpio_card_detect       = GPIO_NR_PALMLD_SD_DETECT_N,
-        .gpio_card_ro           = GPIO_NR_PALMLD_SD_READONLY,
-        .gpio_power             = GPIO_NR_PALMLD_SD_POWER,
-        .detect_delay_ms        = 200,
-};
+static void __init palmld_nor_init(void)
+{
+        platform_device_register(&palmld_flash);
+}
+#else
+static inline void palmld_nor_init(void) {}
+#endif
 
 /******************************************************************************
  * GPIO keyboard
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int palmld_matrix_keys[] = {
         KEY(0, 1, KEY_F2),
         KEY(0, 2, KEY_UP),
@@ -200,9 +200,18 @@ static struct pxa27x_keypad_platform_data palmld_keypad_platform_data = {
         .debounce_interval      = 30,
 };
 
+static void __init palmld_kpc_init(void)
+{
+        pxa_set_keypad_info(&palmld_keypad_platform_data);
+}
+#else
+static inline void palmld_kpc_init(void) {}
+#endif
+
 /******************************************************************************
  * GPIO keys
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 static struct gpio_keys_button palmld_pxa_buttons[] = {
         {KEY_F8, GPIO_NR_PALMLD_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
         {KEY_F9, GPIO_NR_PALMLD_LOCK_SWITCH, 0, "Lock Switch" },
@@ -222,77 +231,18 @@ static struct platform_device palmld_pxa_keys = {
         },
 };
 
-/******************************************************************************
- * Backlight
- ******************************************************************************/
-static int palmld_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMLD_BL_POWER, "BL POWER");
-        if (ret)
-                goto err;
-        ret = gpio_direction_output(GPIO_NR_PALMLD_BL_POWER, 0);
-        if (ret)
-                goto err2;
-        ret = gpio_request(GPIO_NR_PALMLD_LCD_POWER, "LCD POWER");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_output(GPIO_NR_PALMLD_LCD_POWER, 0);
-        if (ret)
-                goto err3;
-
-        return 0;
-err3:
-        gpio_free(GPIO_NR_PALMLD_LCD_POWER);
-err2:
-        gpio_free(GPIO_NR_PALMLD_BL_POWER);
-err:
-        return ret;
-}
-
-static int palmld_backlight_notify(struct device *dev, int brightness)
+static void __init palmld_keys_init(void)
 {
-        gpio_set_value(GPIO_NR_PALMLD_BL_POWER, brightness);
-        gpio_set_value(GPIO_NR_PALMLD_LCD_POWER, brightness);
-        return brightness;
+        platform_device_register(&palmld_pxa_keys);
 }
-
-static void palmld_backlight_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMLD_BL_POWER);
-        gpio_free(GPIO_NR_PALMLD_LCD_POWER);
-}
-
-static struct platform_pwm_backlight_data palmld_backlight_data = {
-        .pwm_id         = 0,
-        .max_brightness = PALMLD_MAX_INTENSITY,
-        .dft_brightness = PALMLD_MAX_INTENSITY,
-        .pwm_period_ns  = PALMLD_PERIOD_NS,
-        .init           = palmld_backlight_init,
-        .notify         = palmld_backlight_notify,
-        .exit           = palmld_backlight_exit,
-};
-
-static struct platform_device palmld_backlight = {
-        .name   = "pwm-backlight",
-        .dev    = {
-                .parent         = &pxa27x_device_pwm0.dev,
-                .platform_data  = &palmld_backlight_data,
-        },
-};
-
-/******************************************************************************
- * IrDA
- ******************************************************************************/
-static struct pxaficp_platform_data palmld_ficp_platform_data = {
-        .gpio_pwdown            = GPIO_NR_PALMLD_IR_DISABLE,
-        .transceiver_cap        = IR_SIRMODE | IR_OFF,
-};
+#else
+static inline void palmld_keys_init(void) {}
+#endif
 
 /******************************************************************************
  * LEDs
  ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
 struct gpio_led gpio_leds[] = {
 {
         .name                   = "palmld:green:led",
@@ -318,174 +268,34 @@ static struct platform_device palmld_leds = {
         }
 };
 
-/******************************************************************************
- * Power supply
- ******************************************************************************/
-static int power_supply_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMLD_POWER_DETECT, "CABLE_STATE_AC");
-        if (ret)
-                goto err1;
-        ret = gpio_direction_input(GPIO_NR_PALMLD_POWER_DETECT);
-        if (ret)
-                goto err2;
-
-        ret = gpio_request(GPIO_NR_PALMLD_USB_DETECT_N, "CABLE_STATE_USB");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_input(GPIO_NR_PALMLD_USB_DETECT_N);
-        if (ret)
-                goto err3;
-
-        return 0;
-
-err3:
-        gpio_free(GPIO_NR_PALMLD_USB_DETECT_N);
-err2:
-        gpio_free(GPIO_NR_PALMLD_POWER_DETECT);
-err1:
-        return ret;
-}
-
-static int palmld_is_ac_online(void)
+static void __init palmld_leds_init(void)
 {
-        return gpio_get_value(GPIO_NR_PALMLD_POWER_DETECT);
+        platform_device_register(&palmld_leds);
 }
-
-static int palmld_is_usb_online(void)
-{
-        return !gpio_get_value(GPIO_NR_PALMLD_USB_DETECT_N);
-}
-
-static void power_supply_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMLD_USB_DETECT_N);
-        gpio_free(GPIO_NR_PALMLD_POWER_DETECT);
-}
-
-static char *palmld_supplicants[] = {
-        "main-battery",
-};
-
-static struct pda_power_pdata power_supply_info = {
-        .init            = power_supply_init,
-        .is_ac_online    = palmld_is_ac_online,
-        .is_usb_online   = palmld_is_usb_online,
-        .exit            = power_supply_exit,
-        .supplied_to     = palmld_supplicants,
-        .num_supplicants = ARRAY_SIZE(palmld_supplicants),
-};
-
-static struct platform_device power_supply = {
-        .name = "pda-power",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &power_supply_info,
-        },
-};
-
-/******************************************************************************
- * WM97xx battery
- ******************************************************************************/
-static struct wm97xx_batt_info wm97xx_batt_pdata = {
-        .batt_aux       = WM97XX_AUX_ID3,
-        .temp_aux       = WM97XX_AUX_ID2,
-        .charge_gpio    = -1,
-        .max_voltage    = PALMLD_BAT_MAX_VOLTAGE,
-        .min_voltage    = PALMLD_BAT_MIN_VOLTAGE,
-        .batt_mult      = 1000,
-        .batt_div       = 414,
-        .temp_mult      = 1,
-        .temp_div       = 1,
-        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LIPO,
-        .batt_name      = "main-batt",
-};
-
-/******************************************************************************
- * aSoC audio
- ******************************************************************************/
-static struct palm27x_asoc_info palmld_asoc_pdata = {
-        .jack_gpio      = GPIO_NR_PALMLD_EARPHONE_DETECT,
-};
-
-static pxa2xx_audio_ops_t palmld_ac97_pdata = {
-        .reset_gpio     = 95,
-};
-
-static struct platform_device palmld_asoc = {
-        .name = "palm27x-asoc",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &palmld_asoc_pdata,
-        },
-};
+#else
+static inline void palmld_leds_init(void) {}
+#endif
 
 /******************************************************************************
  * HDD
  ******************************************************************************/
-static struct platform_device palmld_hdd = {
+#if defined(CONFIG_PATA_PALMLD) || defined(CONFIG_PATA_PALMLD_MODULE)
+static struct platform_device palmld_ide_device = {
         .name   = "pata_palmld",
         .id     = -1,
 };
 
-/******************************************************************************
- * Framebuffer
- ******************************************************************************/
-static struct pxafb_mode_info palmld_lcd_modes[] = {
-{
-        .pixclock       = 57692,
-        .xres           = 320,
-        .yres           = 480,
-        .bpp            = 16,
-
-        .left_margin    = 32,
-        .right_margin   = 1,
-        .upper_margin   = 7,
-        .lower_margin   = 1,
-
-        .hsync_len      = 4,
-        .vsync_len      = 1,
-},
-};
-
-static struct pxafb_mach_info palmld_lcd_screen = {
-        .modes          = palmld_lcd_modes,
-        .num_modes      = ARRAY_SIZE(palmld_lcd_modes),
-        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-};
-
-/******************************************************************************
- * Power management - standby
- ******************************************************************************/
-static void __init palmld_pm_init(void)
+static void __init palmld_ide_init(void)
 {
-        static u32 resume[] = {
-                0xe3a00101,     /* mov  r0,     #0x40000000 */
-                0xe380060f,     /* orr  r0, r0, #0x00f00000 */
-                0xe590f008,     /* ldr  pc, [r0, #0x08] */
-        };
-
-        /* copy the bootloader */
-        memcpy(phys_to_virt(PALMLD_STR_BASE), resume, sizeof(resume));
+        platform_device_register(&palmld_ide_device);
 }
+#else
+static inline void palmld_ide_init(void) {}
+#endif
 
 /******************************************************************************
  * Machine init
  ******************************************************************************/
-static struct platform_device *devices[] __initdata = {
-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-        &palmld_pxa_keys,
-#endif
-        &palmld_backlight,
-        &palmld_leds,
-        &power_supply,
-        &palmld_asoc,
-        &palmld_hdd,
-        &palmld_flash,
-};
-
 static struct map_desc palmld_io_desc[] __initdata = {
 {
         .virtual        = PALMLD_IDE_VIRT,
@@ -510,20 +320,26 @@ static void __init palmld_map_io(void)
 static void __init palmld_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config));
-
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        palmld_pm_init();
-        set_pxa_fb_info(&palmld_lcd_screen);
-        pxa_set_mci_info(&palmld_mci_platform_data);
-        pxa_set_ac97_info(&palmld_ac97_pdata);
-        pxa_set_ficp_info(&palmld_ficp_platform_data);
-        pxa_set_keypad_info(&palmld_keypad_platform_data);
-        wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
-
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        palm27x_mmc_init(GPIO_NR_PALMLD_SD_DETECT_N, GPIO_NR_PALMLD_SD_READONLY,
+                        GPIO_NR_PALMLD_SD_POWER, 0);
+        palm27x_pm_init(PALMLD_STR_BASE);
+        palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
+        palm27x_irda_init(GPIO_NR_PALMLD_IR_DISABLE);
+        palm27x_ac97_init(PALMLD_BAT_MIN_VOLTAGE, PALMLD_BAT_MAX_VOLTAGE,
+                        GPIO_NR_PALMLD_EARPHONE_DETECT, 95);
+        palm27x_pwm_init(GPIO_NR_PALMLD_BL_POWER, GPIO_NR_PALMLD_LCD_POWER);
+        palm27x_power_init(GPIO_NR_PALMLD_POWER_DETECT,
+                        GPIO_NR_PALMLD_USB_DETECT_N);
+        palm27x_pmic_init();
+        palmld_kpc_init();
+        palmld_keys_init();
+        palmld_nor_init();
+        palmld_leds_init();
+        palmld_ide_init();
 }
 
 MACHINE_START(PALMLD, "Palm LifeDrive")
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 5e92d84fe50d..1c281995f658 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -25,7 +25,7 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
-#include <linux/wm97xx_batt.h>
+#include <linux/wm97xx.h>
 #include <linux/power_supply.h>
 #include <linux/usb/gpio_vbus.h>
 
@@ -42,6 +42,7 @@
 #include <mach/pxa27x_keypad.h>
 #include <mach/udc.h>
 #include <mach/palmasoc.h>
+#include <mach/palm27x.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -104,19 +105,9 @@ static unsigned long palmt5_pin_config[] __initdata = {
 };
 
 /******************************************************************************
- * SD/MMC card controller
- ******************************************************************************/
-static struct pxamci_platform_data palmt5_mci_platform_data = {
-        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .gpio_card_detect       = GPIO_NR_PALMT5_SD_DETECT_N,
-        .gpio_card_ro           = GPIO_NR_PALMT5_SD_READONLY,
-        .gpio_power             = GPIO_NR_PALMT5_SD_POWER,
-        .detect_delay_ms        = 200,
-};
-
-/******************************************************************************
  * GPIO keyboard
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int palmt5_matrix_keys[] = {
         KEY(0, 0, KEY_POWER),
         KEY(0, 1, KEY_F1),
@@ -142,9 +133,18 @@ static struct pxa27x_keypad_platform_data palmt5_keypad_platform_data = {
         .debounce_interval      = 30,
 };
 
+static void __init palmt5_kpc_init(void)
+{
+        pxa_set_keypad_info(&palmt5_keypad_platform_data);
+}
+#else
+static inline void palmt5_kpc_init(void) {}
+#endif
+
 /******************************************************************************
  * GPIO keys
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 static struct gpio_keys_button palmt5_pxa_buttons[] = {
         {KEY_F8, GPIO_NR_PALMT5_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
 };
@@ -162,241 +162,17 @@ static struct platform_device palmt5_pxa_keys = {
         },
 };
 
-/******************************************************************************
- * Backlight
- ******************************************************************************/
-static int palmt5_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMT5_BL_POWER, "BL POWER");
-        if (ret)
-                goto err;
-        ret = gpio_direction_output(GPIO_NR_PALMT5_BL_POWER, 0);
-        if (ret)
-                goto err2;
-        ret = gpio_request(GPIO_NR_PALMT5_LCD_POWER, "LCD POWER");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_output(GPIO_NR_PALMT5_LCD_POWER, 0);
-        if (ret)
-                goto err3;
-
-        return 0;
-err3:
-        gpio_free(GPIO_NR_PALMT5_LCD_POWER);
-err2:
-        gpio_free(GPIO_NR_PALMT5_BL_POWER);
-err:
-        return ret;
-}
-
-static int palmt5_backlight_notify(struct device *dev, int brightness)
-{
-        gpio_set_value(GPIO_NR_PALMT5_BL_POWER, brightness);
-        gpio_set_value(GPIO_NR_PALMT5_LCD_POWER, brightness);
-        return brightness;
-}
-
-static void palmt5_backlight_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMT5_BL_POWER);
-        gpio_free(GPIO_NR_PALMT5_LCD_POWER);
-}
-
-static struct platform_pwm_backlight_data palmt5_backlight_data = {
-        .pwm_id         = 0,
-        .max_brightness = PALMT5_MAX_INTENSITY,
-        .dft_brightness = PALMT5_MAX_INTENSITY,
-        .pwm_period_ns  = PALMT5_PERIOD_NS,
-        .init           = palmt5_backlight_init,
-        .notify         = palmt5_backlight_notify,
-        .exit           = palmt5_backlight_exit,
-};
-
-static struct platform_device palmt5_backlight = {
-        .name   = "pwm-backlight",
-        .dev    = {
-                .parent         = &pxa27x_device_pwm0.dev,
-                .platform_data  = &palmt5_backlight_data,
-        },
-};
-
-/******************************************************************************
- * IrDA
- ******************************************************************************/
-static struct pxaficp_platform_data palmt5_ficp_platform_data = {
-        .gpio_pwdown            = GPIO_NR_PALMT5_IR_DISABLE,
-        .transceiver_cap        = IR_SIRMODE | IR_OFF,
-};
-
-/******************************************************************************
- * UDC
- ******************************************************************************/
-static struct gpio_vbus_mach_info palmt5_udc_info = {
-        .gpio_vbus              = GPIO_NR_PALMT5_USB_DETECT_N,
-        .gpio_vbus_inverted     = 1,
-        .gpio_pullup            = GPIO_NR_PALMT5_USB_PULLUP,
-};
-
-static struct platform_device palmt5_gpio_vbus = {
-        .name   = "gpio-vbus",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &palmt5_udc_info,
-        },
-};
-
-/******************************************************************************
- * Power supply
- ******************************************************************************/
-static int power_supply_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMT5_POWER_DETECT, "CABLE_STATE_AC");
-        if (ret)
-                goto err1;
-        ret = gpio_direction_input(GPIO_NR_PALMT5_POWER_DETECT);
-        if (ret)
-                goto err2;
-
-        return 0;
-err2:
-        gpio_free(GPIO_NR_PALMT5_POWER_DETECT);
-err1:
-        return ret;
-}
-
-static int palmt5_is_ac_online(void)
-{
-        return gpio_get_value(GPIO_NR_PALMT5_POWER_DETECT);
-}
-
-static void power_supply_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMT5_POWER_DETECT);
-}
-
-static char *palmt5_supplicants[] = {
-        "main-battery",
-};
-
-static struct pda_power_pdata power_supply_info = {
-        .init            = power_supply_init,
-        .is_ac_online    = palmt5_is_ac_online,
-        .exit            = power_supply_exit,
-        .supplied_to     = palmt5_supplicants,
-        .num_supplicants = ARRAY_SIZE(palmt5_supplicants),
-};
-
-static struct platform_device power_supply = {
-        .name = "pda-power",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &power_supply_info,
-        },
-};
-
-/******************************************************************************
- * WM97xx battery
- ******************************************************************************/
-static struct wm97xx_batt_info wm97xx_batt_pdata = {
-        .batt_aux       = WM97XX_AUX_ID3,
-        .temp_aux       = WM97XX_AUX_ID2,
-        .charge_gpio    = -1,
-        .max_voltage    = PALMT5_BAT_MAX_VOLTAGE,
-        .min_voltage    = PALMT5_BAT_MIN_VOLTAGE,
-        .batt_mult      = 1000,
-        .batt_div       = 414,
-        .temp_mult      = 1,
-        .temp_div       = 1,
-        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LIPO,
-        .batt_name      = "main-batt",
-};
-
-/******************************************************************************
- * aSoC audio
- ******************************************************************************/
-static struct palm27x_asoc_info palmt5_asoc_pdata = {
-        .jack_gpio      = GPIO_NR_PALMT5_EARPHONE_DETECT,
-};
-
-static pxa2xx_audio_ops_t palmt5_ac97_pdata = {
-        .reset_gpio     = 95,
-};
-
-static struct platform_device palmt5_asoc = {
-        .name = "palm27x-asoc",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &palmt5_asoc_pdata,
-        },
-};
-
-/******************************************************************************
- * Framebuffer
- ******************************************************************************/
-static struct pxafb_mode_info palmt5_lcd_modes[] = {
-{
-        .pixclock       = 57692,
-        .xres           = 320,
-        .yres           = 480,
-        .bpp            = 16,
-
-        .left_margin    = 32,
-        .right_margin   = 1,
-        .upper_margin   = 7,
-        .lower_margin   = 1,
-
-        .hsync_len      = 4,
-        .vsync_len      = 1,
-},
-};
-
-static struct pxafb_mach_info palmt5_lcd_screen = {
-        .modes          = palmt5_lcd_modes,
-        .num_modes      = ARRAY_SIZE(palmt5_lcd_modes),
-        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-};
-
-/******************************************************************************
- * Power management - standby
- ******************************************************************************/
-static void __init palmt5_pm_init(void)
+static void __init palmt5_keys_init(void)
 {
-        static u32 resume[] = {
-                0xe3a00101,     /* mov  r0,     #0x40000000 */
-                0xe380060f,     /* orr  r0, r0, #0x00f00000 */
-                0xe590f008,     /* ldr  pc, [r0, #0x08] */
-        };
-
-        /* copy the bootloader */
-        memcpy(phys_to_virt(PALMT5_STR_BASE), resume, sizeof(resume));
+        platform_device_register(&palmt5_pxa_keys);
 }
+#else
+static inline void palmt5_keys_init(void) {}
+#endif
 
 /******************************************************************************
  * Machine init
  ******************************************************************************/
-static struct platform_device *devices[] __initdata = {
-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-        &palmt5_pxa_keys,
-#endif
-        &palmt5_backlight,
-        &power_supply,
-        &palmt5_asoc,
-        &palmt5_gpio_vbus,
-};
-
-/* setup udc GPIOs initial state */
-static void __init palmt5_udc_init(void)
-{
-        if (!gpio_request(GPIO_NR_PALMT5_USB_PULLUP, "UDC Vbus")) {
-                gpio_direction_output(GPIO_NR_PALMT5_USB_PULLUP, 1);
-                gpio_free(GPIO_NR_PALMT5_USB_PULLUP);
-        }
-}
-
 static void __init palmt5_reserve(void)
 {
         memblock_reserve(0xa0200000, 0x1000);
@@ -405,21 +181,24 @@ static void __init palmt5_reserve(void)
 static void __init palmt5_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config));
-
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        palmt5_pm_init();
-        set_pxa_fb_info(&palmt5_lcd_screen);
-        pxa_set_mci_info(&palmt5_mci_platform_data);
-        palmt5_udc_init();
-        pxa_set_ac97_info(&palmt5_ac97_pdata);
-        pxa_set_ficp_info(&palmt5_ficp_platform_data);
-        pxa_set_keypad_info(&palmt5_keypad_platform_data);
-        wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
-
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        palm27x_mmc_init(GPIO_NR_PALMT5_SD_DETECT_N, GPIO_NR_PALMT5_SD_READONLY,
+                        GPIO_NR_PALMT5_SD_POWER, 0);
+        palm27x_pm_init(PALMT5_STR_BASE);
+        palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
+        palm27x_udc_init(GPIO_NR_PALMT5_USB_DETECT_N,
+                        GPIO_NR_PALMT5_USB_PULLUP, 1);
+        palm27x_irda_init(GPIO_NR_PALMT5_IR_DISABLE);
+        palm27x_ac97_init(PALMT5_BAT_MIN_VOLTAGE, PALMT5_BAT_MAX_VOLTAGE,
+                        GPIO_NR_PALMT5_EARPHONE_DETECT, 95);
+        palm27x_pwm_init(GPIO_NR_PALMT5_BL_POWER, GPIO_NR_PALMT5_LCD_POWER);
+        palm27x_power_init(GPIO_NR_PALMT5_POWER_DETECT, -1);
+        palm27x_pmic_init();
+        palmt5_kpc_init();
+        palmt5_keys_init();
 }
 
 MACHINE_START(PALMT5, "Palm Tungsten|T5")
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 3d284ff1a64e..93c11a0438d5 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -23,7 +23,7 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
-#include <linux/wm97xx_batt.h>
+#include <linux/wm97xx.h>
 #include <linux/power_supply.h>
 #include <linux/usb/gpio_vbus.h>
 
@@ -271,9 +271,9 @@ static struct platform_device power_supply = {
 };
 
 /******************************************************************************
- * WM97xx battery
+ * WM97xx audio, battery
  ******************************************************************************/
-static struct wm97xx_batt_info wm97xx_batt_pdata = {
+static struct wm97xx_batt_pdata palmte2_batt_pdata = {
         .batt_aux       = WM97XX_AUX_ID3,
         .temp_aux       = WM97XX_AUX_ID2,
         .charge_gpio    = -1,
@@ -287,9 +287,14 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = {
         .batt_name      = "main-batt",
 };
 
-/******************************************************************************
- * aSoC audio
- ******************************************************************************/
+static struct wm97xx_pdata palmte2_wm97xx_pdata = {
+        .batt_pdata     = &palmte2_batt_pdata,
+};
+
+static pxa2xx_audio_ops_t palmte2_ac97_pdata = {
+        .codec_pdata    = { &palmte2_wm97xx_pdata, },
+};
+
 static struct palm27x_asoc_info palmte2_asoc_pdata = {
         .jack_gpio      = GPIO_NR_PALMTE2_EARPHONE_DETECT,
 };
@@ -361,9 +366,8 @@ static void __init palmte2_init(void)
         set_pxa_fb_info(&palmte2_lcd_screen);
         pxa_set_mci_info(&palmte2_mci_platform_data);
         palmte2_udc_init();
-        pxa_set_ac97_info(NULL);
+        pxa_set_ac97_info(&palmte2_ac97_pdata);
         pxa_set_ficp_info(&palmte2_ficp_platform_data);
-        wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 3d0c9cc2a406..52defd5e42e5 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -24,7 +24,6 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
-#include <linux/wm97xx_batt.h>
 #include <linux/power_supply.h>
 #include <linux/sysdev.h>
 #include <linux/w1-gpio.h>
@@ -46,6 +45,7 @@
 #include <mach/pxa2xx-regs.h>
 #include <mach/palmasoc.h>
 #include <mach/camera.h>
+#include <mach/palm27x.h>
 
 #include <sound/pxa2xx-lib.h>
 
@@ -160,31 +160,9 @@ static unsigned long centro685_pin_config[] __initdata = {
 #endif /* CONFIG_MACH_CENTRO */
 
 /******************************************************************************
- * SD/MMC card controller
- ******************************************************************************/
-#ifdef CONFIG_MACH_TREO680
-static struct pxamci_platform_data treo680_mci_platform_data = {
-        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .gpio_card_detect       = GPIO_NR_TREO_SD_DETECT_N,
-        .gpio_card_ro           = GPIO_NR_TREO680_SD_READONLY,
-        .gpio_power             = GPIO_NR_TREO680_SD_POWER,
-};
-#endif /* CONFIG_MACH_TREO680 */
-
-#ifdef CONFIG_MACH_CENTRO
-static struct pxamci_platform_data centro_mci_platform_data = {
-        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .gpio_card_detect       = GPIO_NR_TREO_SD_DETECT_N,
-        .gpio_card_ro           = -1,
-        .gpio_power             = GPIO_NR_CENTRO_SD_POWER,
-        .gpio_power_invert      = 1,
-};
-#endif /* CONFIG_MACH_CENTRO */
-
-/******************************************************************************
  * GPIO keyboard
  ******************************************************************************/
-#ifdef CONFIG_MACH_TREO680
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int treo680_matrix_keys[] = {
         KEY(0, 0, KEY_F8),              /* Red/Off/Power */
         KEY(0, 1, KEY_LEFT),
@@ -244,19 +222,6 @@ static unsigned int treo680_matrix_keys[] = {
         KEY(7, 5, KEY_I),
 };
 
-static struct pxa27x_keypad_platform_data treo680_keypad_platform_data = {
-        .matrix_key_rows        = 8,
-        .matrix_key_cols        = 7,
-        .matrix_key_map         = treo680_matrix_keys,
-        .matrix_key_map_size    = ARRAY_SIZE(treo680_matrix_keys),
-        .direct_key_map         = { KEY_CONNECT },
-        .direct_key_num         = 1,
-
-        .debounce_interval      = 30,
-};
-#endif /* CONFIG_MACH_TREO680 */
-
-#ifdef CONFIG_MACH_CENTRO
 static unsigned int centro_matrix_keys[] = {
         KEY(0, 0, KEY_F9),              /* Home */
         KEY(0, 1, KEY_LEFT),
@@ -316,157 +281,50 @@ static unsigned int centro_matrix_keys[] = {
         KEY(7, 5, KEY_I),
 };
 
-static struct pxa27x_keypad_platform_data centro_keypad_platform_data = {
+static struct pxa27x_keypad_platform_data treo680_keypad_pdata = {
         .matrix_key_rows        = 8,
         .matrix_key_cols        = 7,
-        .matrix_key_map         = centro_matrix_keys,
-        .matrix_key_map_size    = ARRAY_SIZE(centro_matrix_keys),
+        .matrix_key_map         = treo680_matrix_keys,
+        .matrix_key_map_size    = ARRAY_SIZE(treo680_matrix_keys),
         .direct_key_map         = { KEY_CONNECT },
         .direct_key_num         = 1,
 
         .debounce_interval      = 30,
 };
-#endif /* CONFIG_MACH_CENTRO */
 
-/******************************************************************************
- * aSoC audio
- ******************************************************************************/
-
-static pxa2xx_audio_ops_t treo_ac97_pdata = {
-        .reset_gpio     = 95,
-};
-
-/******************************************************************************
- * Backlight
- ******************************************************************************/
-static int treo_backlight_init(struct device *dev)
+static void __init palmtreo_kpc_init(void)
 {
-        int ret;
-
-        ret = gpio_request(GPIO_NR_TREO_BL_POWER, "BL POWER");
-        if (ret)
-                goto err;
-        ret = gpio_direction_output(GPIO_NR_TREO_BL_POWER, 0);
-        if (ret)
-                goto err2;
-
-        return 0;
+        static struct pxa27x_keypad_platform_data *data = &treo680_keypad_pdata;
 
-err2:
-        gpio_free(GPIO_NR_TREO_BL_POWER);
-err:
-        return ret;
-}
-
-static int treo_backlight_notify(struct device *dev, int brightness)
-{
-        gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness);
-        return TREO_MAX_INTENSITY - brightness;
-};
+        if (machine_is_centro()) {
+                data->matrix_key_map = centro_matrix_keys;
+                data->matrix_key_map_size = ARRAY_SIZE(centro_matrix_keys);
+        }
 
-static void treo_backlight_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_TREO_BL_POWER);
+        pxa_set_keypad_info(&treo680_keypad_pdata);
 }
-
-static struct platform_pwm_backlight_data treo_backlight_data = {
-        .pwm_id         = 0,
-        .max_brightness = TREO_MAX_INTENSITY,
-        .dft_brightness = TREO_DEFAULT_INTENSITY,
-        .pwm_period_ns  = TREO_PERIOD_NS,
-        .init           = treo_backlight_init,
-        .notify         = treo_backlight_notify,
-        .exit           = treo_backlight_exit,
-};
-
-static struct platform_device treo_backlight = {
-        .name   = "pwm-backlight",
-        .dev    = {
-                .parent         = &pxa27x_device_pwm0.dev,
-                .platform_data  = &treo_backlight_data,
-        },
-};
-
-/******************************************************************************
- * IrDA
- ******************************************************************************/
-static struct pxaficp_platform_data treo_ficp_info = {
-        .gpio_pwdown            = GPIO_NR_TREO_IR_EN,
-        .transceiver_cap        = IR_SIRMODE | IR_OFF,
-};
-
-/******************************************************************************
- * UDC
- ******************************************************************************/
-static struct pxa2xx_udc_mach_info treo_udc_info __initdata = {
-        .gpio_vbus              = GPIO_NR_TREO_USB_DETECT,
-        .gpio_vbus_inverted     = 1,
-        .gpio_pullup            = GPIO_NR_TREO_USB_PULLUP,
-};
-
+#else
+static inline void palmtreo_kpc_init(void) {}
+#endif
 
 /******************************************************************************
  * USB host
  ******************************************************************************/
-#ifdef CONFIG_MACH_TREO680
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static struct pxaohci_platform_data treo680_ohci_info = {
         .port_mode    = PMM_PERPORT_MODE,
         .flags        = ENABLE_PORT1 | ENABLE_PORT3,
         .power_budget = 0,
 };
-#endif /* CONFIG_MACH_TREO680 */
 
-/******************************************************************************
- * Power supply
- ******************************************************************************/
-static int power_supply_init(struct device *dev)
+static void __init palmtreo_uhc_init(void)
 {
-        int ret;
-
-        ret = gpio_request(GPIO_NR_TREO_POWER_DETECT, "CABLE_STATE_AC");
-        if (ret)
-                goto err1;
-        ret = gpio_direction_input(GPIO_NR_TREO_POWER_DETECT);
-        if (ret)
-                goto err2;
-
-        return 0;
-
-err2:
-        gpio_free(GPIO_NR_TREO_POWER_DETECT);
-err1:
-        return ret;
-}
-
-static int treo_is_ac_online(void)
-{
-        return gpio_get_value(GPIO_NR_TREO_POWER_DETECT);
+        if (machine_is_treo680())
+                pxa_set_ohci_info(&treo680_ohci_info);
 }
-
-static void power_supply_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_TREO_POWER_DETECT);
-}
-
-static char *treo_supplicants[] = {
-        "main-battery",
-};
-
-static struct pda_power_pdata power_supply_info = {
-        .init            = power_supply_init,
-        .is_ac_online    = treo_is_ac_online,
-        .exit            = power_supply_exit,
-        .supplied_to     = treo_supplicants,
-        .num_supplicants = ARRAY_SIZE(treo_supplicants),
-};
-
-static struct platform_device power_supply = {
-        .name = "pda-power",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &power_supply_info,
-        },
-};
+#else
+static inline void palmtreo_uhc_init(void) {}
+#endif
 
 /******************************************************************************
  * Vibra and LEDs
@@ -495,16 +353,6 @@ static struct gpio_led_platform_data treo680_gpio_led_info = {
         .num_leds       = ARRAY_SIZE(treo680_gpio_leds),
 };
 
-static struct platform_device treo680_leds = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &treo680_gpio_led_info,
-        }
-};
-#endif /* CONFIG_MACH_TREO680 */
-
-#ifdef CONFIG_MACH_CENTRO
 static struct gpio_led centro_gpio_leds[] = {
         {
                 .name                   = "centro:vibra:vibra",
@@ -529,145 +377,67 @@ static struct gpio_led_platform_data centro_gpio_led_info = {
         .num_leds       = ARRAY_SIZE(centro_gpio_leds),
 };
 
-static struct platform_device centro_leds = {
+static struct platform_device palmtreo_leds = {
         .name   = "leds-gpio",
         .id     = -1,
         .dev    = {
-                .platform_data  = &centro_gpio_led_info,
+                .platform_data  = &treo680_gpio_led_info,
         }
 };
-#endif /* CONFIG_MACH_CENTRO */
-
-/******************************************************************************
- * Framebuffer
- ******************************************************************************/
-/* TODO: add support for 324x324 */
-static struct pxafb_mode_info treo_lcd_modes[] = {
-{
-        .pixclock               = 86538,
-        .xres                   = 320,
-        .yres                   = 320,
-        .bpp                    = 16,
-
-        .left_margin            = 20,
-        .right_margin           = 8,
-        .upper_margin           = 8,
-        .lower_margin           = 5,
-
-        .hsync_len              = 4,
-        .vsync_len              = 1,
-},
-};
 
-static void treo_lcd_power(int on, struct fb_var_screeninfo *info)
+static void __init palmtreo_leds_init(void)
 {
-        gpio_set_value(GPIO_NR_TREO_BL_POWER, on);
-}
-
-static struct pxafb_mach_info treo_lcd_screen = {
-        .modes          = treo_lcd_modes,
-        .num_modes      = ARRAY_SIZE(treo_lcd_modes),
-        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-};
+        if (machine_is_centro())
+                palmtreo_leds.dev.platform_data = &centro_gpio_led_info;
 
-/******************************************************************************
- * Power management - standby
- ******************************************************************************/
-static void __init treo_pm_init(void)
-{
-        static u32 resume[] = {
-                0xe3a00101,     /* mov  r0,     #0x40000000 */
-                0xe380060f,     /* orr  r0, r0, #0x00f00000 */
-                0xe590f008,     /* ldr  pc, [r0, #0x08] */
-        };
-
-        /* this is where the bootloader jumps */
-        memcpy(phys_to_virt(TREO_STR_BASE), resume, sizeof(resume));
+        platform_device_register(&palmtreo_leds);
 }
+#else
+static inline void palmtreo_leds_init(void) {}
+#endif
 
 /******************************************************************************
  * Machine init
  ******************************************************************************/
-static struct platform_device *treo_devices[] __initdata = {
-        &treo_backlight,
-        &power_supply,
-};
-
-#ifdef CONFIG_MACH_TREO680
-static struct platform_device *treo680_devices[] __initdata = {
-        &treo680_leds,
-};
-#endif /* CONFIG_MACH_TREO680 */
-
-#ifdef CONFIG_MACH_CENTRO
-static struct platform_device *centro_devices[] __initdata = {
-        &centro_leds,
-};
-#endif /* CONFIG_MACH_CENTRO */
-
-/* setup udc GPIOs initial state */
-static void __init treo_udc_init(void)
-{
-        if (!gpio_request(GPIO_NR_TREO_USB_PULLUP, "UDC Vbus")) {
-                gpio_direction_output(GPIO_NR_TREO_USB_PULLUP, 1);
-                gpio_free(GPIO_NR_TREO_USB_PULLUP);
-        }
-}
-
-static void __init treo_lcd_power_init(void)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_TREO_LCD_POWER, "LCD POWER");
-        if (ret) {
-                pr_err("Treo680: LCD power GPIO request failed!\n");
-                return;
-        }
-
-        ret = gpio_direction_output(GPIO_NR_TREO_LCD_POWER, 0);
-        if (ret) {
-                pr_err("Treo680: setting LCD power GPIO direction failed!\n");
-                gpio_free(GPIO_NR_TREO_LCD_POWER);
-                return;
-        }
-
-        treo_lcd_screen.pxafb_lcd_power = treo_lcd_power;
-}
-
 static void __init treo_reserve(void)
 {
         memblock_reserve(0xa0000000, 0x1000);
         memblock_reserve(0xa2000000, 0x1000);
 }
 
-static void __init treo_init(void)
+static void __init palmphone_common_init(void)
 {
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config));
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
-
-        treo_pm_init();
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config));
-        treo_lcd_power_init();
-        set_pxa_fb_info(&treo_lcd_screen);
-        treo_udc_init();
-        pxa_set_udc_info(&treo_udc_info);
-        pxa_set_ac97_info(&treo_ac97_pdata);
-        pxa_set_ficp_info(&treo_ficp_info);
-
-        platform_add_devices(ARRAY_AND_SIZE(treo_devices));
+        palm27x_pm_init(TREO_STR_BASE);
+        palm27x_lcd_init(GPIO_NR_TREO_BL_POWER, &palm_320x320_new_lcd_mode);
+        palm27x_udc_init(GPIO_NR_TREO_USB_DETECT, GPIO_NR_TREO_USB_PULLUP, 1);
+        palm27x_irda_init(GPIO_NR_TREO_IR_EN);
+        palm27x_ac97_init(-1, -1, -1, 95);
+        palm27x_pwm_init(GPIO_NR_TREO_BL_POWER, -1);
+        palm27x_power_init(GPIO_NR_TREO_POWER_DETECT, -1);
+        palm27x_pmic_init();
+        palmtreo_kpc_init();
+        palmtreo_uhc_init();
+        palmtreo_leds_init();
 }
 
-#ifdef CONFIG_MACH_TREO680
 static void __init treo680_init(void)
 {
-        treo_init();
         pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
-        pxa_set_mci_info(&treo680_mci_platform_data);
-        pxa_set_keypad_info(&treo680_keypad_platform_data);
-        pxa_set_ohci_info(&treo680_ohci_info);
+        palmphone_common_init();
+        palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY,
+                        GPIO_NR_TREO680_SD_POWER, 0);
+}
 
-        platform_add_devices(ARRAY_AND_SIZE(treo680_devices));
+static void __init centro_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
+        palmphone_common_init();
+        palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1,
+                        GPIO_NR_CENTRO_SD_POWER, 1);
 }
 
 MACHINE_START(TREO680, "Palm Treo 680")
@@ -680,19 +450,6 @@ MACHINE_START(TREO680, "Palm Treo 680")
         .timer          = &pxa_timer,
         .init_machine   = treo680_init,
 MACHINE_END
-#endif /* CONFIG_MACH_TREO680 */
-
-#ifdef CONFIG_MACH_CENTRO
-static void __init centro_init(void)
-{
-        treo_init();
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
-        pxa_set_mci_info(&centro_mci_platform_data);
-
-        pxa_set_keypad_info(&centro_keypad_platform_data);
-
-        platform_add_devices(ARRAY_AND_SIZE(centro_devices));
-}
 
 MACHINE_START(CENTRO, "Palm Centro 685")
         .phys_io        = TREO_PHYS_IO_START,
@@ -702,6 +459,5 @@ MACHINE_START(CENTRO, "Palm Centro 685")
         .reserve        = treo_reserve,
         .init_irq       = pxa27x_init_irq,
         .timer          = &pxa_timer,
-       .init_machine   = centro_init,
+        .init_machine   = centro_init,
 MACHINE_END
-#endif /* CONFIG_MACH_CENTRO */
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index ecc1a401598e..144dc2b6911f 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -25,7 +25,7 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
-#include <linux/wm97xx_batt.h>
+#include <linux/wm97xx.h>
 #include <linux/power_supply.h>
 #include <linux/usb/gpio_vbus.h>
 #include <linux/mtd/nand.h>
@@ -46,6 +46,7 @@
 #include <mach/pxa27x_keypad.h>
 #include <mach/udc.h>
 #include <mach/palmasoc.h>
+#include <mach/palm27x.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -129,6 +130,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
 /******************************************************************************
  * NOR Flash
  ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 static struct mtd_partition palmtx_partitions[] = {
         {
                 .name           = "Flash",
@@ -162,20 +164,18 @@ static struct platform_device palmtx_flash = {
         },
 };
 
-/******************************************************************************
- * SD/MMC card controller
- ******************************************************************************/
-static struct pxamci_platform_data palmtx_mci_platform_data = {
-        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .gpio_card_detect       = GPIO_NR_PALMTX_SD_DETECT_N,
-        .gpio_card_ro           = GPIO_NR_PALMTX_SD_READONLY,
-        .gpio_power             = GPIO_NR_PALMTX_SD_POWER,
-        .detect_delay_ms        = 200,
-};
+static void __init palmtx_nor_init(void)
+{
+        platform_device_register(&palmtx_flash);
+}
+#else
+static inline void palmtx_nor_init(void) {}
+#endif
 
 /******************************************************************************
  * GPIO keyboard
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int palmtx_matrix_keys[] = {
         KEY(0, 0, KEY_POWER),
         KEY(0, 1, KEY_F1),
@@ -201,9 +201,18 @@ static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = {
         .debounce_interval      = 30,
 };
 
+static void __init palmtx_kpc_init(void)
+{
+        pxa_set_keypad_info(&palmtx_keypad_platform_data);
+}
+#else
+static inline void palmtx_kpc_init(void) {}
+#endif
+
 /******************************************************************************
  * GPIO keys
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 static struct gpio_keys_button palmtx_pxa_buttons[] = {
         {KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
 };
@@ -221,208 +230,18 @@ static struct platform_device palmtx_pxa_keys = {
         },
 };
 
-/******************************************************************************
- * Backlight
- ******************************************************************************/
-static int palmtx_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER");
-        if (ret)
-                goto err;
-        ret = gpio_direction_output(GPIO_NR_PALMTX_BL_POWER, 0);
-        if (ret)
-                goto err2;
-        ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_output(GPIO_NR_PALMTX_LCD_POWER, 0);
-        if (ret)
-                goto err3;
-
-        return 0;
-err3:
-        gpio_free(GPIO_NR_PALMTX_LCD_POWER);
-err2:
-        gpio_free(GPIO_NR_PALMTX_BL_POWER);
-err:
-        return ret;
-}
-
-static int palmtx_backlight_notify(struct device *dev, int brightness)
-{
-        gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness);
-        gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness);
-        return brightness;
-}
-
-static void palmtx_backlight_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMTX_BL_POWER);
-        gpio_free(GPIO_NR_PALMTX_LCD_POWER);
-}
-
-static struct platform_pwm_backlight_data palmtx_backlight_data = {
-        .pwm_id         = 0,
-        .max_brightness = PALMTX_MAX_INTENSITY,
-        .dft_brightness = PALMTX_MAX_INTENSITY,
-        .pwm_period_ns  = PALMTX_PERIOD_NS,
-        .init           = palmtx_backlight_init,
-        .notify         = palmtx_backlight_notify,
-        .exit           = palmtx_backlight_exit,
-};
-
-static struct platform_device palmtx_backlight = {
-        .name   = "pwm-backlight",
-        .dev    = {
-                .parent         = &pxa27x_device_pwm0.dev,
-                .platform_data  = &palmtx_backlight_data,
-        },
-};
-
-/******************************************************************************
- * IrDA
- ******************************************************************************/
-static struct pxaficp_platform_data palmtx_ficp_platform_data = {
-        .gpio_pwdown            = GPIO_NR_PALMTX_IR_DISABLE,
-        .transceiver_cap        = IR_SIRMODE | IR_OFF,
-};
-
-/******************************************************************************
- * UDC
- ******************************************************************************/
-static struct gpio_vbus_mach_info palmtx_udc_info = {
-        .gpio_vbus              = GPIO_NR_PALMTX_USB_DETECT_N,
-        .gpio_vbus_inverted     = 1,
-        .gpio_pullup            = GPIO_NR_PALMTX_USB_PULLUP,
-};
-
-static struct platform_device palmtx_gpio_vbus = {
-        .name   = "gpio-vbus",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &palmtx_udc_info,
-        },
-};
-
-/******************************************************************************
- * Power supply
- ******************************************************************************/
-static int power_supply_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC");
-        if (ret)
-                goto err1;
-        ret = gpio_direction_input(GPIO_NR_PALMTX_POWER_DETECT);
-        if (ret)
-                goto err2;
-
-        return 0;
-
-err2:
-        gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
-err1:
-        return ret;
-}
-
-static int palmtx_is_ac_online(void)
-{
-        return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT);
-}
-
-static void power_supply_exit(struct device *dev)
+static void __init palmtx_keys_init(void)
 {
-        gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
+        platform_device_register(&palmtx_pxa_keys);
 }
-
-static char *palmtx_supplicants[] = {
-        "main-battery",
-};
-
-static struct pda_power_pdata power_supply_info = {
-        .init            = power_supply_init,
-        .is_ac_online    = palmtx_is_ac_online,
-        .exit            = power_supply_exit,
-        .supplied_to     = palmtx_supplicants,
-        .num_supplicants = ARRAY_SIZE(palmtx_supplicants),
-};
-
-static struct platform_device power_supply = {
-        .name = "pda-power",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &power_supply_info,
-        },
-};
-
-/******************************************************************************
- * WM97xx battery
- ******************************************************************************/
-static struct wm97xx_batt_info wm97xx_batt_pdata = {
-        .batt_aux       = WM97XX_AUX_ID3,
-        .temp_aux       = WM97XX_AUX_ID2,
-        .charge_gpio    = -1,
-        .max_voltage    = PALMTX_BAT_MAX_VOLTAGE,
-        .min_voltage    = PALMTX_BAT_MIN_VOLTAGE,
-        .batt_mult      = 1000,
-        .batt_div       = 414,
-        .temp_mult      = 1,
-        .temp_div       = 1,
-        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LIPO,
-        .batt_name      = "main-batt",
-};
-
-/******************************************************************************
- * aSoC audio
- ******************************************************************************/
-static struct palm27x_asoc_info palmtx_asoc_pdata = {
-        .jack_gpio      = GPIO_NR_PALMTX_EARPHONE_DETECT,
-};
-
-static pxa2xx_audio_ops_t palmtx_ac97_pdata = {
-        .reset_gpio     = 95,
-};
-
-static struct platform_device palmtx_asoc = {
-        .name = "palm27x-asoc",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &palmtx_asoc_pdata,
-        },
-};
-
-/******************************************************************************
- * Framebuffer
- ******************************************************************************/
-static struct pxafb_mode_info palmtx_lcd_modes[] = {
-{
-        .pixclock       = 57692,
-        .xres           = 320,
-        .yres           = 480,
-        .bpp            = 16,
-
-        .left_margin    = 32,
-        .right_margin   = 1,
-        .upper_margin   = 7,
-        .lower_margin   = 1,
-
-        .hsync_len      = 4,
-        .vsync_len      = 1,
-},
-};
-
-static struct pxafb_mach_info palmtx_lcd_screen = {
-        .modes          = palmtx_lcd_modes,
-        .num_modes      = ARRAY_SIZE(palmtx_lcd_modes),
-        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-};
+#else
+static inline void palmtx_keys_init(void) {}
+#endif
 
 /******************************************************************************
  * NAND Flash
  ******************************************************************************/
+#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
 static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
                                  unsigned int ctrl)
 {
@@ -482,36 +301,17 @@ static struct platform_device palmtx_nand = {
         }
 };
 
-/******************************************************************************
- * Power management - standby
- ******************************************************************************/
-static void __init palmtx_pm_init(void)
+static void __init palmtx_nand_init(void)
 {
-        static u32 resume[] = {
-                0xe3a00101,     /* mov  r0,     #0x40000000 */
-                0xe380060f,     /* orr  r0, r0, #0x00f00000 */
-                0xe590f008,     /* ldr  pc, [r0, #0x08] */
-        };
-
-        /* copy the bootloader */
-        memcpy(phys_to_virt(PALMTX_STR_BASE), resume, sizeof(resume));
+        platform_device_register(&palmtx_nand);
 }
+#else
+static inline void palmtx_nand_init(void) {}
+#endif
 
 /******************************************************************************
  * Machine init
  ******************************************************************************/
-static struct platform_device *devices[] __initdata = {
-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-        &palmtx_pxa_keys,
-#endif
-        &palmtx_backlight,
-        &power_supply,
-        &palmtx_asoc,
-        &palmtx_gpio_vbus,
-        &palmtx_flash,
-        &palmtx_nand,
-};
-
 static struct map_desc palmtx_io_desc[] __initdata = {
 {
         .virtual        = PALMTX_PCMCIA_VIRT,
@@ -537,34 +337,29 @@ static void __init palmtx_map_io(void)
         iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
 }
 
-/* setup udc GPIOs initial state */
-static void __init palmtx_udc_init(void)
-{
-        if (!gpio_request(GPIO_NR_PALMTX_USB_PULLUP, "UDC Vbus")) {
-                gpio_direction_output(GPIO_NR_PALMTX_USB_PULLUP, 1);
-                gpio_free(GPIO_NR_PALMTX_USB_PULLUP);
-        }
-}
-
-
 static void __init palmtx_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
-
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        palmtx_pm_init();
-        set_pxa_fb_info(&palmtx_lcd_screen);
-        pxa_set_mci_info(&palmtx_mci_platform_data);
-        palmtx_udc_init();
-        pxa_set_ac97_info(&palmtx_ac97_pdata);
-        pxa_set_ficp_info(&palmtx_ficp_platform_data);
-        pxa_set_keypad_info(&palmtx_keypad_platform_data);
-        wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
-
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        palm27x_mmc_init(GPIO_NR_PALMTX_SD_DETECT_N, GPIO_NR_PALMTX_SD_READONLY,
+                        GPIO_NR_PALMTX_SD_POWER, 0);
+        palm27x_pm_init(PALMTX_STR_BASE);
+        palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
+        palm27x_udc_init(GPIO_NR_PALMTX_USB_DETECT_N,
+                        GPIO_NR_PALMTX_USB_PULLUP, 1);
+        palm27x_irda_init(GPIO_NR_PALMTX_IR_DISABLE);
+        palm27x_ac97_init(PALMTX_BAT_MIN_VOLTAGE, PALMTX_BAT_MAX_VOLTAGE,
+                        GPIO_NR_PALMTX_EARPHONE_DETECT, 95);
+        palm27x_pwm_init(GPIO_NR_PALMTX_BL_POWER, GPIO_NR_PALMTX_LCD_POWER);
+        palm27x_power_init(GPIO_NR_PALMTX_POWER_DETECT, -1);
+        palm27x_pmic_init();
+        palmtx_kpc_init();
+        palmtx_keys_init();
+        palmtx_nor_init();
+        palmtx_nand_init();
 }
 
 MACHINE_START(PALMTX, "Palm T|X")
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 3a7925ca3944..87e4b1044e0b 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -27,7 +27,7 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
-#include <linux/wm97xx_batt.h>
+#include <linux/wm97xx.h>
 #include <linux/power_supply.h>
 #include <linux/usb/gpio_vbus.h>
 
@@ -44,6 +44,7 @@
 #include <mach/pxa27x_keypad.h>
 #include <mach/udc.h>
 #include <mach/palmasoc.h>
+#include <mach/palm27x.h>
 
 #include <mach/pm.h>
 
@@ -109,21 +110,9 @@ static unsigned long palmz72_pin_config[] __initdata = {
 };
 
 /******************************************************************************
- * SD/MMC card controller
- ******************************************************************************/
-/* SD_POWER is not actually power, but it is more like chip
- * select, i.e. it is inverted */
-static struct pxamci_platform_data palmz72_mci_platform_data = {
-        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .gpio_card_detect       = GPIO_NR_PALMZ72_SD_DETECT_N,
-        .gpio_card_ro           = GPIO_NR_PALMZ72_SD_RO,
-        .gpio_power             = GPIO_NR_PALMZ72_SD_POWER_N,
-        .gpio_power_invert      = 1,
-};
-
-/******************************************************************************
  * GPIO keyboard
  ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int palmz72_matrix_keys[] = {
         KEY(0, 0, KEY_POWER),
         KEY(0, 1, KEY_F1),
@@ -149,77 +138,18 @@ static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = {
         .debounce_interval      = 30,
 };
 
-/******************************************************************************
- * Backlight
- ******************************************************************************/
-static int palmz72_backlight_init(struct device *dev)
+static void __init palmz72_kpc_init(void)
 {
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER");
-        if (ret)
-                goto err;
-        ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0);
-        if (ret)
-                goto err2;
-        ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0);
-        if (ret)
-                goto err3;
-
-        return 0;
-err3:
-        gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
-err2:
-        gpio_free(GPIO_NR_PALMZ72_BL_POWER);
-err:
-        return ret;
-}
-
-static int palmz72_backlight_notify(struct device *dev, int brightness)
-{
-        gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness);
-        gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness);
-        return brightness;
-}
-
-static void palmz72_backlight_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMZ72_BL_POWER);
-        gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
+        pxa_set_keypad_info(&palmz72_keypad_platform_data);
 }
-
-static struct platform_pwm_backlight_data palmz72_backlight_data = {
-        .pwm_id         = 0,
-        .max_brightness = PALMZ72_MAX_INTENSITY,
-        .dft_brightness = PALMZ72_MAX_INTENSITY,
-        .pwm_period_ns  = PALMZ72_PERIOD_NS,
-        .init           = palmz72_backlight_init,
-        .notify         = palmz72_backlight_notify,
-        .exit           = palmz72_backlight_exit,
-};
-
-static struct platform_device palmz72_backlight = {
-        .name   = "pwm-backlight",
-        .dev    = {
-                .parent         = &pxa27x_device_pwm0.dev,
-                .platform_data  = &palmz72_backlight_data,
-        },
-};
-
-/******************************************************************************
- * IrDA
- ******************************************************************************/
-static struct pxaficp_platform_data palmz72_ficp_platform_data = {
-        .gpio_pwdown            = GPIO_NR_PALMZ72_IR_DISABLE,
-        .transceiver_cap        = IR_SIRMODE | IR_OFF,
-};
+#else
+static inline void palmz72_kpc_init(void) {}
+#endif
 
 /******************************************************************************
  * LEDs
  ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
 static struct gpio_led gpio_leds[] = {
         {
                 .name                   = "palmz72:green:led",
@@ -241,139 +171,13 @@ static struct platform_device palmz72_leds = {
         }
 };
 
-/******************************************************************************
- * UDC
- ******************************************************************************/
-static struct gpio_vbus_mach_info palmz72_udc_info = {
-        .gpio_vbus              = GPIO_NR_PALMZ72_USB_DETECT_N,
-        .gpio_pullup            = GPIO_NR_PALMZ72_USB_PULLUP,
-};
-
-static struct platform_device palmz72_gpio_vbus = {
-        .name   = "gpio-vbus",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &palmz72_udc_info,
-        },
-};
-
-/******************************************************************************
- * Power supply
- ******************************************************************************/
-static int power_supply_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC");
-        if (ret)
-                goto err1;
-        ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT);
-        if (ret)
-                goto err2;
-
-        ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N);
-        if (ret)
-                goto err3;
-
-        return 0;
-err3:
-        gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
-err2:
-        gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
-err1:
-        return ret;
-}
-
-static int palmz72_is_ac_online(void)
-{
-        return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT);
-}
-
-static int palmz72_is_usb_online(void)
+static void __init palmz72_leds_init(void)
 {
-        return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N);
+        platform_device_register(&palmz72_leds);
 }
-
-static void power_supply_exit(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
-        gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
-}
-
-static char *palmz72_supplicants[] = {
-        "main-battery",
-};
-
-static struct pda_power_pdata power_supply_info = {
-        .init            = power_supply_init,
-        .is_ac_online    = palmz72_is_ac_online,
-        .is_usb_online   = palmz72_is_usb_online,
-        .exit            = power_supply_exit,
-        .supplied_to     = palmz72_supplicants,
-        .num_supplicants = ARRAY_SIZE(palmz72_supplicants),
-};
-
-static struct platform_device power_supply = {
-        .name = "pda-power",
-        .id   = -1,
-        .dev  = {
-                .platform_data = &power_supply_info,
-        },
-};
-
-/******************************************************************************
- * WM97xx battery
- ******************************************************************************/
-static struct wm97xx_batt_info wm97xx_batt_pdata = {
-        .batt_aux       = WM97XX_AUX_ID3,
-        .temp_aux       = WM97XX_AUX_ID2,
-        .charge_gpio    = -1,
-        .max_voltage    = PALMZ72_BAT_MAX_VOLTAGE,
-        .min_voltage    = PALMZ72_BAT_MIN_VOLTAGE,
-        .batt_mult      = 1000,
-        .batt_div       = 414,
-        .temp_mult      = 1,
-        .temp_div       = 1,
-        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LIPO,
-        .batt_name      = "main-batt",
-};
-
-/******************************************************************************
- * aSoC audio
- ******************************************************************************/
-static struct platform_device palmz72_asoc = {
-        .name = "palm27x-asoc",
-        .id   = -1,
-};
-
-/******************************************************************************
- * Framebuffer
- ******************************************************************************/
-static struct pxafb_mode_info palmz72_lcd_modes[] = {
-{
-        .pixclock       = 115384,
-        .xres           = 320,
-        .yres           = 320,
-        .bpp            = 16,
-
-        .left_margin    = 27,
-        .right_margin   = 7,
-        .upper_margin   = 7,
-        .lower_margin   = 8,
-
-        .hsync_len      = 6,
-        .vsync_len      = 1,
-},
-};
-
-static struct pxafb_mach_info palmz72_lcd_screen = {
-        .modes          = palmz72_lcd_modes,
-        .num_modes      = ARRAY_SIZE(palmz72_lcd_modes),
-        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-};
+#else
+static inline void palmz72_leds_init(void) {}
+#endif
 
 #ifdef CONFIG_PM
 
@@ -452,40 +256,26 @@ device_initcall(palmz72_pm_init);
 /******************************************************************************
  * Machine init
  ******************************************************************************/
-static struct platform_device *devices[] __initdata = {
-        &palmz72_backlight,
-        &palmz72_leds,
-        &palmz72_asoc,
-        &power_supply,
-        &palmz72_gpio_vbus,
-};
-
-/* setup udc GPIOs initial state */
-static void __init palmz72_udc_init(void)
-{
-        if (!gpio_request(GPIO_NR_PALMZ72_USB_PULLUP, "USB Pullup")) {
-                gpio_direction_output(GPIO_NR_PALMZ72_USB_PULLUP, 0);
-                gpio_free(GPIO_NR_PALMZ72_USB_PULLUP);
-        }
-}
-
 static void __init palmz72_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
-
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        set_pxa_fb_info(&palmz72_lcd_screen);
-        pxa_set_mci_info(&palmz72_mci_platform_data);
-        palmz72_udc_init();
-        pxa_set_ac97_info(NULL);
-        pxa_set_ficp_info(&palmz72_ficp_platform_data);
-        pxa_set_keypad_info(&palmz72_keypad_platform_data);
-        wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
-
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        palm27x_mmc_init(GPIO_NR_PALMZ72_SD_DETECT_N, GPIO_NR_PALMZ72_SD_RO,
+                        GPIO_NR_PALMZ72_SD_POWER_N, 1);
+        palm27x_lcd_init(-1, &palm_320x320_lcd_mode);
+        palm27x_udc_init(GPIO_NR_PALMZ72_USB_DETECT_N,
+                        GPIO_NR_PALMZ72_USB_PULLUP, 0);
+        palm27x_irda_init(GPIO_NR_PALMZ72_IR_DISABLE);
+        palm27x_ac97_init(PALMZ72_BAT_MIN_VOLTAGE, PALMZ72_BAT_MAX_VOLTAGE,
+                        -1, 113);
+        palm27x_pwm_init(-1, -1);
+        palm27x_power_init(-1, -1);
+        palm27x_pmic_init();
+        palmz72_kpc_init();
+        palmz72_leds_init();
 }
 
 MACHINE_START(PALMZ72, "Palm Zire72")
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index bc2758b54446..55e8fcde0141 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -43,7 +43,6 @@
 #include <mach/irda.h>
 #include <mach/poodle.h>
 #include <mach/pxafb.h>
-#include <mach/sharpsl.h>
 #include <mach/pxa2xx_spi.h>
 #include <plat/i2c.h>
 
@@ -53,7 +52,6 @@
 
 #include "generic.h"
 #include "devices.h"
-#include "sharpsl.h"
 
 static unsigned long poodle_pin_config[] __initdata = {
         /* I/O */
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 0b9ad30bfd51..de53f2e4aa39 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -322,6 +322,7 @@ void __init pxa26x_init_irq(void)
 
 static struct platform_device *pxa25x_devices[] __initdata = {
         &pxa25x_device_udc,
+        &pxa_device_pmu,
         &pxa_device_i2s,
         &sa1100_device_rtc,
         &pxa25x_device_ssp,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index c059dac02b61..12e5b9f01e6f 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -383,6 +383,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 
 static struct platform_device *devices[] __initdata = {
         &pxa27x_device_udc,
+        &pxa_device_pmu,
         &pxa_device_i2s,
         &sa1100_device_rtc,
         &pxa_device_rtc,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f544e58e1536..fa0014847c71 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -52,7 +52,7 @@
 static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
 
 /* crystal frequency to HSIO bus frequency multiplier (HSS) */
-static unsigned char hss_mult[4] = { 8, 12, 16, 0 };
+static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
 
 /*
  * Get the clock frequency as reflected by CCSR and the turbo flag.
@@ -552,11 +552,23 @@ static void pxa_unmask_ext_wakeup(unsigned int irq)
         PECR |= PECR_IE(irq - IRQ_WAKEUP0);
 }
 
+static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type)
+{
+        if (flow_type & IRQ_TYPE_EDGE_RISING)
+                PWER |= 1 << (irq - IRQ_WAKEUP0);
+
+        if (flow_type & IRQ_TYPE_EDGE_FALLING)
+                PWER |= 1 << (irq - IRQ_WAKEUP0 + 2);
+
+        return 0;
+}
+
 static struct irq_chip pxa_ext_wakeup_chip = {
         .name           = "WAKEUP",
         .ack            = pxa_ack_ext_wakeup,
         .mask           = pxa_mask_ext_wakeup,
         .unmask         = pxa_unmask_ext_wakeup,
+        .set_type       = pxa_set_ext_wakeup_type,
 };
 
 static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
@@ -596,6 +608,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 
 static struct platform_device *devices[] __initdata = {
         &pxa27x_device_udc,
+        &pxa_device_pmu,
         &pxa_device_i2s,
         &sa1100_device_rtc,
         &pxa_device_rtc,
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index d4b61b3f08f3..67e04f4e07c1 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -745,13 +745,32 @@ static int raumfeld_is_usb_online(void)
 
 static char *raumfeld_power_supplicants[] = { "ds2760-battery.0" };
 
+static void raumfeld_power_signal_charged(void)
+{
+        struct power_supply *psy =
+                power_supply_get_by_name(raumfeld_power_supplicants[0]);
+
+        if (psy)
+                power_supply_set_battery_charged(psy);
+}
+
+static int raumfeld_power_resume(void)
+{
+        /* check if GPIO_CHARGE_DONE went low while we were sleeping */
+        if (!gpio_get_value(GPIO_CHARGE_DONE))
+                raumfeld_power_signal_charged();
+
+        return 0;
+}
+
 static struct pda_power_pdata power_supply_info = {
         .init                   = power_supply_init,
         .is_ac_online           = raumfeld_is_ac_online,
         .is_usb_online          = raumfeld_is_usb_online,
         .exit                   = power_supply_exit,
         .supplied_to            = raumfeld_power_supplicants,
-        .num_supplicants        = ARRAY_SIZE(raumfeld_power_supplicants)
+        .num_supplicants        = ARRAY_SIZE(raumfeld_power_supplicants),
+        .resume                 = raumfeld_power_resume,
 };
 
 static struct resource power_supply_resources[] = {
@@ -766,13 +785,7 @@ static struct resource power_supply_resources[] = {
 
 static irqreturn_t charge_done_irq(int irq, void *dev_id)
 {
-        struct power_supply *psy;
-
-        psy = power_supply_get_by_name("ds2760-battery.0");
-
-        if (psy)
-                power_supply_set_battery_charged(psy);
-
+        raumfeld_power_signal_charged();
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h
deleted file mode 100644
index 0cc1203c5bef..000000000000
--- a/arch/arm/mach-pxa/sharpsl.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2004-2005 Richard Purdie
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <mach/sharpsl_pm.h>
-
-/*
- * SharpSL Battery/PM Driver
- */
-#define READ_GPIO_BIT(x)    (GPLR(x) & GPIO_bit(x))
-
-/* MAX1111 Channel Definitions */
-#define MAX1111_BATT_VOLT   4u
-#define MAX1111_BATT_TEMP   2u
-#define MAX1111_ACIN_VOLT   6u
-
-extern struct battery_thresh sharpsl_battery_levels_acin[];
-extern struct battery_thresh sharpsl_battery_levels_noac[];
-int sharpsl_pm_pxa_read_max1111(int channel);
-
-
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index cb4767251f3c..8fed027b12dc 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -29,11 +29,8 @@
 #include <mach/pm.h>
 #include <mach/pxa2xx-regs.h>
 #include <mach/regs-rtc.h>
-#include <mach/sharpsl.h>
 #include <mach/sharpsl_pm.h>
 
-#include "sharpsl.h"
-
 /*
  * Constants
  */
@@ -180,17 +177,12 @@ int sharpsl_pm_pxa_read_max1111(int channel)
         if (machine_is_tosa())
             return 0;
 
-#ifdef CONFIG_CORGI_SSP_DEPRECATED
-        return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1
-                        | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR);
-#else
         extern int max1111_read_channel(int);
 
         /* max1111 accepts channels from 0-3, however,
          * it is encoded from 0-7 here in the code.
          */
         return max1111_read_channel(channel >> 1);
-#endif
 }
 
 static int get_percentage(int voltage)
@@ -277,21 +269,6 @@ static void sharpsl_battery_thread(struct work_struct *private_)
         dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage,
                         sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies);
 
-#ifdef CONFIG_BACKLIGHT_CORGI
-        /* If battery is low. limit backlight intensity to save power. */
-        if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
-            && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW)
-            || (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
-                if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
-                        sharpsl_pm.machinfo->backlight_limit(1);
-                        sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
-                }
-        } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) {
-                sharpsl_pm.machinfo->backlight_limit(0);
-                sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
-        }
-#endif
-
         /* Suspend if critical battery level */
         if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
              && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL)
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 2ed95f369cfc..52c30b01a671 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -339,10 +339,6 @@ ENTRY(pxa_cpu_resume)
         mcr     p15, 0, r1, c8, c7, 0           @ invalidate I & D TLBs
         mcr     p15, 0, r1, c7, c7, 0           @ invalidate I & D caches, BTB
 
-#ifdef CONFIG_XSCALE_CACHE_ERRATA
-        bic     r9, r9, #0x0004                 @ see cpu_xscale_proc_init
-#endif
-
         mcr     p14, 0, r3, c6, c0, 0           @ clock configuration, turbo mode.
         mcr     p15, 0, r4, c15, c1, 0          @ CP access reg
         mcr     p15, 0, r5, c13, c0, 0          @ PID
@@ -368,9 +364,6 @@ sleep_save_sp:
 
         .text
 resume_after_mmu:
-#ifdef CONFIG_XSCALE_CACHE_ERRATA
-        bl      cpu_xscale_proc_init
-#endif
         ldmfd   sp!, {r2, r3}
 #ifndef CONFIG_IWMMXT
         mar     acc0, r2, r3
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 51756c723557..1cd99cb87bb1 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -18,14 +18,15 @@
 #include <linux/gpio_keys.h>
 #include <linux/gpio.h>
 #include <linux/leds.h>
-#include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/i2c/pca953x.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 #include <linux/spi/corgi_lcd.h>
+#include <linux/mtd/physmap.h>
 #include <linux/mtd/sharpsl.h>
 #include <linux/input/matrix_keypad.h>
+#include <linux/regulator/machine.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -33,22 +34,25 @@
 #include <asm/mach/sharpsl_param.h>
 #include <asm/hardware/scoop.h>
 
-
 #include <mach/pxa27x.h>
 #include <mach/pxa27x-udc.h>
 #include <mach/reset.h>
-#include <plat/i2c.h>
 #include <mach/irda.h>
 #include <mach/mmc.h>
 #include <mach/ohci.h>
 #include <mach/pxafb.h>
 #include <mach/pxa2xx_spi.h>
 #include <mach/spitz.h>
+#include <mach/sharpsl_pm.h>
+
+#include <plat/i2c.h>
 
 #include "generic.h"
 #include "devices.h"
-#include "sharpsl.h"
 
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
 static unsigned long spitz_pin_config[] __initdata = {
         /* Chip Selects */
         GPIO78_nCS_2,   /* SCOOP #2 */
@@ -124,10 +128,13 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO1_GPIO | WAKEUP_ON_EDGE_FALL,       /* SPITZ_GPIO_RESET */
 };
 
-/*
- * Spitz SCOOP Device #1
- */
-static struct resource spitz_scoop_resources[] = {
+
+/******************************************************************************
+ * Scoop GPIO expander
+ ******************************************************************************/
+#if defined(CONFIG_SHARP_SCOOP) || defined(CONFIG_SHARP_SCOOP_MODULE)
+/* SCOOP Device #1 */
+static struct resource spitz_scoop_1_resources[] = {
         [0] = {
                 .start          = 0x10800000,
                 .end            = 0x10800fff,
@@ -135,7 +142,7 @@ static struct resource spitz_scoop_resources[] = {
         },
 };
 
-static struct scoop_config spitz_scoop_setup = {
+static struct scoop_config spitz_scoop_1_setup = {
         .io_dir         = SPITZ_SCP_IO_DIR,
         .io_out         = SPITZ_SCP_IO_OUT,
         .suspend_clr    = SPITZ_SCP_SUS_CLR,
@@ -143,20 +150,18 @@ static struct scoop_config spitz_scoop_setup = {
         .gpio_base      = SPITZ_SCP_GPIO_BASE,
 };
 
-struct platform_device spitzscoop_device = {
+struct platform_device spitz_scoop_1_device = {
         .name           = "sharp-scoop",
         .id             = 0,
         .dev            = {
-                .platform_data  = &spitz_scoop_setup,
+                .platform_data  = &spitz_scoop_1_setup,
         },
-        .num_resources  = ARRAY_SIZE(spitz_scoop_resources),
-        .resource       = spitz_scoop_resources,
+        .num_resources  = ARRAY_SIZE(spitz_scoop_1_resources),
+        .resource       = spitz_scoop_1_resources,
 };
 
-/*
- * Spitz SCOOP Device #2
- */
-static struct resource spitz_scoop2_resources[] = {
+/* SCOOP Device #2 */
+static struct resource spitz_scoop_2_resources[] = {
         [0] = {
                 .start          = 0x08800040,
                 .end            = 0x08800fff,
@@ -164,7 +169,7 @@ static struct resource spitz_scoop2_resources[] = {
         },
 };
 
-static struct scoop_config spitz_scoop2_setup = {
+static struct scoop_config spitz_scoop_2_setup = {
         .io_dir         = SPITZ_SCP2_IO_DIR,
         .io_out         = SPITZ_SCP2_IO_OUT,
         .suspend_clr    = SPITZ_SCP2_SUS_CLR,
@@ -172,82 +177,110 @@ static struct scoop_config spitz_scoop2_setup = {
         .gpio_base      = SPITZ_SCP2_GPIO_BASE,
 };
 
-struct platform_device spitzscoop2_device = {
+struct platform_device spitz_scoop_2_device = {
         .name           = "sharp-scoop",
         .id             = 1,
         .dev            = {
-                .platform_data  = &spitz_scoop2_setup,
+                .platform_data  = &spitz_scoop_2_setup,
         },
-        .num_resources  = ARRAY_SIZE(spitz_scoop2_resources),
-        .resource       = spitz_scoop2_resources,
+        .num_resources  = ARRAY_SIZE(spitz_scoop_2_resources),
+        .resource       = spitz_scoop_2_resources,
 };
 
-#define SPITZ_PWR_SD 0x01
-#define SPITZ_PWR_CF 0x02
+static void __init spitz_scoop_init(void)
+{
+        platform_device_register(&spitz_scoop_1_device);
+
+        /* Akita doesn't have the second SCOOP chip */
+        if (!machine_is_akita())
+                platform_device_register(&spitz_scoop_2_device);
+}
 
 /* Power control is shared with between one of the CF slots and SD */
-static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
+static void spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr)
 {
-        unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR);
+        unsigned short cpr;
+        unsigned long flags;
 
-        if (new_cpr & 0x0007) {
+        if (new_cpr & 0x7) {
                 gpio_set_value(SPITZ_GPIO_CF_POWER, 1);
-                if (!(cpr & 0x0002) && !(cpr & 0x0004))
-                        mdelay(5);
-                if (device == SPITZ_PWR_CF)
-                        cpr |= 0x0002;
-                if (device == SPITZ_PWR_SD)
-                        cpr |= 0x0004;
-                write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
-        } else {
-                if (device == SPITZ_PWR_CF)
-                        cpr &= ~0x0002;
-                if (device == SPITZ_PWR_SD)
-                        cpr &= ~0x0004;
-                if (!(cpr & 0x0002) && !(cpr & 0x0004)) {
-                        write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000);
-                        mdelay(1);
-                        gpio_set_value(SPITZ_GPIO_CF_POWER, 0);
-                } else {
-                        write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
-                }
+                mdelay(5);
+        }
+
+        local_irq_save(flags);
+
+        cpr = read_scoop_reg(&spitz_scoop_1_device.dev, SCOOP_CPR);
+
+        if (enable & new_cpr)
+                cpr |= new_cpr;
+        else
+                cpr &= ~enable;
+
+        write_scoop_reg(&spitz_scoop_1_device.dev, SCOOP_CPR, cpr);
+
+        local_irq_restore(flags);
+
+        if (!(cpr & 0x7)) {
+                mdelay(1);
+                gpio_set_value(SPITZ_GPIO_CF_POWER, 0);
         }
 }
 
-static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr)
+#else
+static inline void spitz_scoop_init(void) {}
+static inline void spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr) {}
+#endif
+
+/******************************************************************************
+ * PCMCIA
+ ******************************************************************************/
+#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+static void spitz_pcmcia_pwr(struct device *scoop, uint16_t cpr, int nr)
 {
         /* Only need to override behaviour for slot 0 */
         if (nr == 0)
-                spitz_card_pwr_ctrl(SPITZ_PWR_CF, cpr);
+                spitz_card_pwr_ctrl(
+                        cpr & (SCOOP_CPR_CF_3V | SCOOP_CPR_CF_XV), cpr);
         else
                 write_scoop_reg(scoop, SCOOP_CPR, cpr);
 }
 
 static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = {
-{
-        .dev        = &spitzscoop_device.dev,
-        .irq        = SPITZ_IRQ_GPIO_CF_IRQ,
-        .cd_irq     = SPITZ_IRQ_GPIO_CF_CD,
-        .cd_irq_str = "PCMCIA0 CD",
-},{
-        .dev        = &spitzscoop2_device.dev,
-        .irq        = SPITZ_IRQ_GPIO_CF2_IRQ,
-        .cd_irq     = -1,
-},
+        {
+                .dev            = &spitz_scoop_1_device.dev,
+                .irq            = SPITZ_IRQ_GPIO_CF_IRQ,
+                .cd_irq         = SPITZ_IRQ_GPIO_CF_CD,
+                .cd_irq_str     = "PCMCIA0 CD",
+        }, {
+                .dev            = &spitz_scoop_2_device.dev,
+                .irq            = SPITZ_IRQ_GPIO_CF2_IRQ,
+                .cd_irq         = -1,
+        },
 };
 
 static struct scoop_pcmcia_config spitz_pcmcia_config = {
-        .devs         = &spitz_pcmcia_scoop[0],
-        .num_devs     = 2,
-        .power_ctrl   = spitz_pcmcia_pwr,
+        .devs           = &spitz_pcmcia_scoop[0],
+        .num_devs       = 2,
+        .power_ctrl     = spitz_pcmcia_pwr,
 };
 
-EXPORT_SYMBOL(spitzscoop_device);
-EXPORT_SYMBOL(spitzscoop2_device);
+static void __init spitz_pcmcia_init(void)
+{
+        /* Akita has only one PCMCIA slot used */
+        if (machine_is_akita())
+                spitz_pcmcia_config.num_devs = 1;
+
+        platform_scoop_config = &spitz_pcmcia_config;
+}
+#else
+static inline void spitz_pcmcia_init(void) {}
+#endif
+
+/******************************************************************************
+ * GPIO keyboard
+ ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
 
-/*
- * Spitz Keyboard Device
- */
 #define SPITZ_KEY_CALENDAR      KEY_F1
 #define SPITZ_KEY_ADDRESS       KEY_F2
 #define SPITZ_KEY_FN            KEY_F3
@@ -263,7 +296,7 @@ EXPORT_SYMBOL(spitzscoop2_device);
 #define SPITZ_KEY_OK            KEY_F11
 #define SPITZ_KEY_MENU          KEY_F12
 
-static const uint32_t spitzkbd_keymap[] = {
+static const uint32_t spitz_keymap[] = {
         KEY(0, 0, KEY_LEFTCTRL),
         KEY(0, 1, KEY_1),
         KEY(0, 2, KEY_3),
@@ -330,36 +363,47 @@ static const uint32_t spitzkbd_keymap[] = {
         KEY(6, 8, KEY_RIGHT),
 };
 
-static const struct matrix_keymap_data spitzkbd_keymap_data = {
-        .keymap         = spitzkbd_keymap,
-        .keymap_size    = ARRAY_SIZE(spitzkbd_keymap),
+static const struct matrix_keymap_data spitz_keymap_data = {
+        .keymap         = spitz_keymap,
+        .keymap_size    = ARRAY_SIZE(spitz_keymap),
 };
 
-static const uint32_t spitzkbd_row_gpios[] =
+static const uint32_t spitz_row_gpios[] =
                 { 12, 17, 91, 34, 36, 38, 39 };
-static const uint32_t spitzkbd_col_gpios[] =
+static const uint32_t spitz_col_gpios[] =
                 { 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 };
 
-static struct matrix_keypad_platform_data spitzkbd_pdata = {
-        .keymap_data            = &spitzkbd_keymap_data,
-        .row_gpios              = spitzkbd_row_gpios,
-        .col_gpios              = spitzkbd_col_gpios,
-        .num_row_gpios          = ARRAY_SIZE(spitzkbd_row_gpios),
-        .num_col_gpios          = ARRAY_SIZE(spitzkbd_col_gpios),
+static struct matrix_keypad_platform_data spitz_mkp_pdata = {
+        .keymap_data            = &spitz_keymap_data,
+        .row_gpios              = spitz_row_gpios,
+        .col_gpios              = spitz_col_gpios,
+        .num_row_gpios          = ARRAY_SIZE(spitz_row_gpios),
+        .num_col_gpios          = ARRAY_SIZE(spitz_col_gpios),
         .col_scan_delay_us      = 10,
         .debounce_ms            = 10,
         .wakeup                 = 1,
 };
 
-static struct platform_device spitzkbd_device = {
+static struct platform_device spitz_mkp_device = {
         .name           = "matrix-keypad",
         .id             = -1,
         .dev            = {
-                .platform_data = &spitzkbd_pdata,
+                .platform_data  = &spitz_mkp_pdata,
         },
 };
 
+static void __init spitz_mkp_init(void)
+{
+        platform_device_register(&spitz_mkp_device);
+}
+#else
+static inline void spitz_mkp_init(void) {}
+#endif
 
+/******************************************************************************
+ * GPIO keys
+ ******************************************************************************/
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 static struct gpio_keys_button spitz_gpio_keys[] = {
         {
                 .type   = EV_PWR,
@@ -396,10 +440,18 @@ static struct platform_device spitz_gpio_keys_device = {
         },
 };
 
+static void __init spitz_keys_init(void)
+{
+        platform_device_register(&spitz_gpio_keys_device);
+}
+#else
+static inline void spitz_keys_init(void) {}
+#endif
 
-/*
- * Spitz LEDs
- */
+/******************************************************************************
+ * LEDs
+ ******************************************************************************/
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
 static struct gpio_led spitz_gpio_leds[] = {
         {
                 .name                   = "spitz:amber:charge",
@@ -418,20 +470,27 @@ static struct gpio_led_platform_data spitz_gpio_leds_info = {
         .num_leds       = ARRAY_SIZE(spitz_gpio_leds),
 };
 
-static struct platform_device spitzled_device = {
+static struct platform_device spitz_led_device = {
         .name           = "leds-gpio",
         .id             = -1,
         .dev            = {
-                .platform_data = &spitz_gpio_leds_info,
+                .platform_data  = &spitz_gpio_leds_info,
         },
 };
 
-#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
-static struct pxa2xx_spi_master spitz_spi_info = {
-        .num_chipselect = 3,
-};
+static void __init spitz_leds_init(void)
+{
+        platform_device_register(&spitz_led_device);
+}
+#else
+static inline void spitz_leds_init(void) {}
+#endif
 
-static void spitz_wait_for_hsync(void)
+/******************************************************************************
+ * SSP Devices
+ ******************************************************************************/
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
+static void spitz_ads7846_wait_for_hsync(void)
 {
         while (gpio_get_value(SPITZ_GPIO_HSYNC))
                 cpu_relax();
@@ -447,7 +506,7 @@ static struct ads7846_platform_data spitz_ads7846_info = {
         .y_plate_ohms           = 486,
         .pressure_max           = 1024,
         .gpio_pendown           = SPITZ_GPIO_TP_INT,
-        .wait_for_sync          = spitz_wait_for_hsync,
+        .wait_for_sync          = spitz_ads7846_wait_for_hsync,
 };
 
 static struct pxa2xx_spi_chip spitz_ads7846_chip = {
@@ -485,72 +544,88 @@ static struct pxa2xx_spi_chip spitz_max1111_chip = {
 
 static struct spi_board_info spitz_spi_devices[] = {
         {
-                .modalias       = "ads7846",
-                .max_speed_hz   = 1200000,
-                .bus_num        = 2,
-                .chip_select    = 0,
-                .platform_data  = &spitz_ads7846_info,
-                .controller_data= &spitz_ads7846_chip,
-                .irq            = gpio_to_irq(SPITZ_GPIO_TP_INT),
+                .modalias               = "ads7846",
+                .max_speed_hz           = 1200000,
+                .bus_num                = 2,
+                .chip_select            = 0,
+                .platform_data          = &spitz_ads7846_info,
+                .controller_data        = &spitz_ads7846_chip,
+                .irq                    = gpio_to_irq(SPITZ_GPIO_TP_INT),
         }, {
-                .modalias       = "corgi-lcd",
-                .max_speed_hz   = 50000,
-                .bus_num        = 2,
-                .chip_select    = 1,
-                .platform_data  = &spitz_lcdcon_info,
-                .controller_data= &spitz_lcdcon_chip,
+                .modalias               = "corgi-lcd",
+                .max_speed_hz           = 50000,
+                .bus_num                = 2,
+                .chip_select            = 1,
+                .platform_data          = &spitz_lcdcon_info,
+                .controller_data        = &spitz_lcdcon_chip,
         }, {
-                .modalias       = "max1111",
-                .max_speed_hz   = 450000,
-                .bus_num        = 2,
-                .chip_select    = 2,
-                .controller_data= &spitz_max1111_chip,
+                .modalias               = "max1111",
+                .max_speed_hz           = 450000,
+                .bus_num                = 2,
+                .chip_select            = 2,
+                .controller_data        = &spitz_max1111_chip,
         },
 };
 
-static void __init spitz_init_spi(void)
+static struct pxa2xx_spi_master spitz_spi_info = {
+        .num_chipselect = 3,
+};
+
+static void __init spitz_spi_init(void)
 {
+        struct corgi_lcd_platform_data *lcd_data = &spitz_lcdcon_info;
+
         if (machine_is_akita()) {
-                spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
-                spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
+                lcd_data->gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
+                lcd_data->gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
         }
 
         pxa2xx_set_spi_info(2, &spitz_spi_info);
         spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
 }
 #else
-static inline void spitz_init_spi(void) {}
+static inline void spitz_spi_init(void) {}
 #endif
 
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
 /*
- * MMC/SD Device
- *
- * The card detect interrupt isn't debounced so we delay it by 250ms
- * to give the card a chance to fully insert/eject.
+ * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to
+ * give the card a chance to fully insert/eject.
  */
 static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
-        if (( 1 << vdd) & p_d->ocr_mask)
-                spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0004);
+        if ((1 << vdd) & p_d->ocr_mask)
+                spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V);
         else
-                spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0000);
+                spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0);
 }
 
 static struct pxamci_platform_data spitz_mci_platform_data = {
         .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
-        .setpower               = spitz_mci_setpower,
+        .setpower               = spitz_mci_setpower,
         .gpio_card_detect       = SPITZ_GPIO_nSD_DETECT,
         .gpio_card_ro           = SPITZ_GPIO_nSD_WP,
         .gpio_power             = -1,
 };
 
+static void __init spitz_mmc_init(void)
+{
+        pxa_set_mci_info(&spitz_mci_platform_data);
+}
+#else
+static inline void spitz_mmc_init(void) {}
+#endif
 
-/*
- * USB Host (OHCI)
- */
+/******************************************************************************
+ * USB Host
+ ******************************************************************************/
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static int spitz_ohci_init(struct device *dev)
 {
         int err;
@@ -559,9 +634,7 @@ static int spitz_ohci_init(struct device *dev)
         if (err)
                 return err;
 
-        /* Only Port 2 is connected
-         * Setup USB Port 2 Output Control Register
-         */
+        /* Only Port 2 is connected, setup USB Port 2 Output Control Register */
         UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
 
         return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
@@ -580,67 +653,95 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = {
         .power_budget   = 150,
 };
 
+static void __init spitz_uhc_init(void)
+{
+        pxa_set_ohci_info(&spitz_ohci_platform_data);
+}
+#else
+static inline void spitz_uhc_init(void) {}
+#endif
 
-/*
- * Irda
- */
-
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+#if defined(CONFIG_PXA_FICP) || defined(CONFIG_PXA_FICP_MODULE)
 static struct pxaficp_platform_data spitz_ficp_platform_data = {
-/* .gpio_pwdown is set in spitz_init() and akita_init() accordingly */
         .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
+static void __init spitz_irda_init(void)
+{
+        if (machine_is_akita())
+                spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;
+        else
+                spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
 
-/*
- * Spitz PXA Framebuffer
- */
+        pxa_set_ficp_info(&spitz_ficp_platform_data);
+}
+#else
+static inline void spitz_irda_init(void) {}
+#endif
 
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 static struct pxafb_mode_info spitz_pxafb_modes[] = {
-{
-        .pixclock       = 19231,
-        .xres           = 480,
-        .yres           = 640,
-        .bpp            = 16,
-        .hsync_len      = 40,
-        .left_margin    = 46,
-        .right_margin   = 125,
-        .vsync_len      = 3,
-        .upper_margin   = 1,
-        .lower_margin   = 0,
-        .sync           = 0,
-},{
-        .pixclock       = 134617,
-        .xres           = 240,
-        .yres           = 320,
-        .bpp            = 16,
-        .hsync_len      = 20,
-        .left_margin    = 20,
-        .right_margin   = 46,
-        .vsync_len      = 2,
-        .upper_margin   = 1,
-        .lower_margin   = 0,
-        .sync           = 0,
-},
+        {
+                .pixclock       = 19231,
+                .xres           = 480,
+                .yres           = 640,
+                .bpp            = 16,
+                .hsync_len      = 40,
+                .left_margin    = 46,
+                .right_margin   = 125,
+                .vsync_len      = 3,
+                .upper_margin   = 1,
+                .lower_margin   = 0,
+                .sync           = 0,
+        }, {
+                .pixclock       = 134617,
+                .xres           = 240,
+                .yres           = 320,
+                .bpp            = 16,
+                .hsync_len      = 20,
+                .left_margin    = 20,
+                .right_margin   = 46,
+                .vsync_len      = 2,
+                .upper_margin   = 1,
+                .lower_margin   = 0,
+                .sync           = 0,
+        },
 };
 
 static struct pxafb_mach_info spitz_pxafb_info = {
-        .modes          = &spitz_pxafb_modes[0],
-        .num_modes      = 2,
+        .modes          = spitz_pxafb_modes,
+        .num_modes      = ARRAY_SIZE(spitz_pxafb_modes),
         .fixed_modes    = 1,
         .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING,
 };
 
-static struct mtd_partition sharpsl_nand_partitions[] = {
+static void __init spitz_lcd_init(void)
+{
+        set_pxa_fb_info(&spitz_pxafb_info);
+}
+#else
+static inline void spitz_lcd_init(void) {}
+#endif
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+#if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE)
+static struct mtd_partition spitz_nand_partitions[] = {
         {
                 .name = "System Area",
                 .offset = 0,
                 .size = 7 * 1024 * 1024,
-        },
-        {
+        }, {
                 .name = "Root Filesystem",
                 .offset = 7 * 1024 * 1024,
-        },
-        {
+        }, {
                 .name = "Home Filesystem",
                 .offset = MTDPART_OFS_APPEND,
                 .size = MTDPART_SIZ_FULL,
@@ -649,37 +750,72 @@ static struct mtd_partition sharpsl_nand_partitions[] = {
 
 static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
 
-static struct nand_bbt_descr sharpsl_bbt = {
-        .options = 0,
-        .offs = 4,
-        .len = 2,
-        .pattern = scan_ff_pattern
+static struct nand_bbt_descr spitz_nand_bbt = {
+        .options        = 0,
+        .offs           = 4,
+        .len            = 2,
+        .pattern        = scan_ff_pattern
+};
+
+static struct nand_ecclayout akita_oobinfo = {
+        .oobfree        = { {0x08, 0x09} },
+        .eccbytes       = 24,
+        .eccpos         = {
+                        0x05, 0x01, 0x02, 0x03, 0x06, 0x07, 0x15, 0x11,
+                        0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
+                        0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37,
+        },
 };
 
-static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
-        .badblock_pattern       = &sharpsl_bbt,
-        .partitions             = sharpsl_nand_partitions,
-        .nr_partitions          = ARRAY_SIZE(sharpsl_nand_partitions),
+static struct sharpsl_nand_platform_data spitz_nand_pdata = {
+        .badblock_pattern       = &spitz_nand_bbt,
+        .partitions             = spitz_nand_partitions,
+        .nr_partitions          = ARRAY_SIZE(spitz_nand_partitions),
 };
 
-static struct resource sharpsl_nand_resources[] = {
+static struct resource spitz_nand_resources[] = {
         {
-                .start  = 0x0C000000,
-                .end    = 0x0C000FFF,
+                .start  = PXA_CS3_PHYS,
+                .end    = PXA_CS3_PHYS + SZ_4K - 1,
                 .flags  = IORESOURCE_MEM,
         },
 };
 
-static struct platform_device sharpsl_nand_device = {
+static struct platform_device spitz_nand_device = {
         .name           = "sharpsl-nand",
         .id             = -1,
-        .resource       = sharpsl_nand_resources,
-        .num_resources  = ARRAY_SIZE(sharpsl_nand_resources),
-        .dev.platform_data      = &sharpsl_nand_platform_data,
+        .resource       = spitz_nand_resources,
+        .num_resources  = ARRAY_SIZE(spitz_nand_resources),
+        .dev            = {
+                .platform_data  = &spitz_nand_pdata,
+        }
 };
 
+static void __init spitz_nand_init(void)
+{
+        if (machine_is_spitz()) {
+                spitz_nand_partitions[1].size = 5 * 1024 * 1024;
+        } else if (machine_is_akita()) {
+                spitz_nand_partitions[1].size = 58 * 1024 * 1024;
+                spitz_nand_bbt.len = 1;
+                spitz_nand_pdata.ecc_layout = &akita_oobinfo;
+        } else if (machine_is_borzoi()) {
+                spitz_nand_partitions[1].size = 32 * 1024 * 1024;
+                spitz_nand_bbt.len = 1;
+                spitz_nand_pdata.ecc_layout = &akita_oobinfo;
+        }
+
+        platform_device_register(&spitz_nand_device);
+}
+#else
+static inline void spitz_nand_init(void) {}
+#endif
 
-static struct mtd_partition sharpsl_rom_parts[] = {
+/******************************************************************************
+ * NOR Flash
+ ******************************************************************************/
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition spitz_rom_parts[] = {
         {
                 .name   ="Boot PROM Filesystem",
                 .offset = 0x00140000,
@@ -687,37 +823,105 @@ static struct mtd_partition sharpsl_rom_parts[] = {
         },
 };
 
-static struct physmap_flash_data sharpsl_rom_data = {
+static struct physmap_flash_data spitz_rom_data = {
         .width          = 2,
-        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
-        .parts          = sharpsl_rom_parts,
+        .nr_parts       = ARRAY_SIZE(spitz_rom_parts),
+        .parts          = spitz_rom_parts,
 };
 
-static struct resource sharpsl_rom_resources[] = {
+static struct resource spitz_rom_resources[] = {
         {
-                .start  = 0x00000000,
-                .end    = 0x007fffff,
+                .start  = PXA_CS0_PHYS,
+                .end    = PXA_CS0_PHYS + SZ_8M - 1,
                 .flags  = IORESOURCE_MEM,
         },
 };
 
-static struct platform_device sharpsl_rom_device = {
-        .name   = "physmap-flash",
-        .id     = -1,
-        .resource = sharpsl_rom_resources,
-        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
-        .dev.platform_data = &sharpsl_rom_data,
+static struct platform_device spitz_rom_device = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .resource       = spitz_rom_resources,
+        .num_resources  = ARRAY_SIZE(spitz_rom_resources),
+        .dev            = {
+                .platform_data  = &spitz_rom_data,
+        },
 };
 
-static struct platform_device *devices[] __initdata = {
-        &spitzscoop_device,
-        &spitzkbd_device,
-        &spitz_gpio_keys_device,
-        &spitzled_device,
-        &sharpsl_nand_device,
-        &sharpsl_rom_device,
+static void __init spitz_nor_init(void)
+{
+        platform_device_register(&spitz_rom_device);
+}
+#else
+static inline void spitz_nor_init(void) {}
+#endif
+
+/******************************************************************************
+ * GPIO expander
+ ******************************************************************************/
+#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
+static struct pca953x_platform_data akita_pca953x_pdata = {
+        .gpio_base              = AKITA_IOEXP_GPIO_BASE,
 };
 
+static struct i2c_board_info spitz_i2c_devs[] = {
+        {
+                .type           = "wm8750",
+                .addr           = 0x1b,
+        }, {
+                .type           = "max7310",
+                .addr           = 0x18,
+                .platform_data  = &akita_pca953x_pdata,
+        },
+};
+
+static struct regulator_consumer_supply isl6271a_consumers[] = {
+        {
+                .supply = "vcc_core",
+        }
+};
+
+static struct regulator_init_data isl6271a_info[] = {
+        {
+                .constraints = {
+                        .name           = "vcc_core range",
+                        .min_uV         = 850000,
+                        .max_uV         = 1600000,
+                        .always_on      = 1,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+                },
+        .consumer_supplies      = isl6271a_consumers,
+        .num_consumer_supplies  = ARRAY_SIZE(isl6271a_consumers),
+        }
+};
+
+static struct i2c_board_info spitz_pi2c_devs[] = {
+        {
+                .type           = "isl6271a",
+                .addr           = 0x0c,
+                .platform_data  = &isl6271a_info,
+        },
+};
+
+static void __init spitz_i2c_init(void)
+{
+        int size = ARRAY_SIZE(spitz_i2c_devs);
+
+        /* Only Akita has the max7310 chip */
+        if (!machine_is_akita())
+                size--;
+
+        pxa_set_i2c_info(NULL);
+        pxa27x_set_i2c_power_info(NULL);
+        i2c_register_board_info(0, spitz_i2c_devs, size);
+        i2c_register_board_info(1, ARRAY_AND_SIZE(spitz_pi2c_devs));
+}
+#else
+static inline void spitz_i2c_init(void) {}
+#endif
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
 static void spitz_poweroff(void)
 {
         arm_machine_restart('g', NULL);
@@ -726,26 +930,18 @@ static void spitz_poweroff(void)
 static void spitz_restart(char mode, const char *cmd)
 {
         /* Bootloader magic for a reboot */
-        if((MSC0 & 0xffff0000) == 0x7ff00000)
+        if ((MSC0 & 0xffff0000) == 0x7ff00000)
                 MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
 
         spitz_poweroff();
 }
 
-static void __init common_init(void)
+static void __init spitz_init(void)
 {
         init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
         pm_power_off = spitz_poweroff;
         arm_pm_restart = spitz_restart;
 
-        if (machine_is_spitz()) {
-                sharpsl_nand_partitions[1].size = 5 * 1024 * 1024;
-        } else if (machine_is_akita()) {
-                sharpsl_nand_partitions[1].size = 58 * 1024 * 1024;
-        } else if (machine_is_borzoi()) {
-                sharpsl_nand_partitions[1].size = 32 * 1024 * 1024;
-        }
-
         PMCR = 0x00;
 
         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
@@ -757,91 +953,22 @@ static void __init common_init(void)
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        spitz_init_spi();
-
-        platform_add_devices(devices, ARRAY_SIZE(devices));
-        pxa_set_mci_info(&spitz_mci_platform_data);
-        pxa_set_ohci_info(&spitz_ohci_platform_data);
-        pxa_set_ficp_info(&spitz_ficp_platform_data);
-        set_pxa_fb_info(&spitz_pxafb_info);
-        pxa_set_i2c_info(NULL);
+        spitz_spi_init();
+        spitz_scoop_init();
+        spitz_mkp_init();
+        spitz_keys_init();
+        spitz_leds_init();
+        spitz_mmc_init();
+        spitz_pcmcia_init();
+        spitz_irda_init();
+        spitz_uhc_init();
+        spitz_lcd_init();
+        spitz_nor_init();
+        spitz_nand_init();
+        spitz_i2c_init();
 }
 
-#if defined(CONFIG_MACH_AKITA) || defined(CONFIG_MACH_BORZOI)
-static struct nand_bbt_descr sharpsl_akita_bbt = {
-        .options = 0,
-        .offs = 4,
-        .len = 1,
-        .pattern = scan_ff_pattern
-};
-
-static struct nand_ecclayout akita_oobinfo = {
-        .eccbytes = 24,
-        .eccpos = {
-                   0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
-                   0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
-                   0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
-        .oobfree = {{0x08, 0x09}}
-};
-#endif
-
-#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
-static void __init spitz_init(void)
-{
-        spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
-
-#ifdef CONFIG_MACH_BORZOI
-        if (machine_is_borzoi()) {
-                sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
-                sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;
-        }
-#endif
-
-        platform_scoop_config = &spitz_pcmcia_config;
-
-        common_init();
-
-        platform_device_register(&spitzscoop2_device);
-}
-#endif
-
-#ifdef CONFIG_MACH_AKITA
-/*
- * Akita IO Expander
- */
-static struct pca953x_platform_data akita_ioexp = {
-        .gpio_base              = AKITA_IOEXP_GPIO_BASE,
-};
-
-static struct i2c_board_info akita_i2c_board_info[] = {
-        {
-                .type           = "max7310",
-                .addr           = 0x18,
-                .platform_data  = &akita_ioexp,
-        }, {
-                .type           = "wm8750",
-                .addr           = 0x1b,
-        },
-};
-
-static void __init akita_init(void)
-{
-        spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;
-
-        sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
-        sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;
-
-        /* We just pretend the second element of the array doesn't exist */
-        spitz_pcmcia_config.num_devs = 1;
-        platform_scoop_config = &spitz_pcmcia_config;
-
-        i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info));
-
-        common_init();
-}
-#endif
-
-static void __init fixup_spitz(struct machine_desc *desc,
+static void __init spitz_fixup(struct machine_desc *desc,
                 struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         sharpsl_save_param();
@@ -854,7 +981,7 @@ static void __init fixup_spitz(struct machine_desc *desc,
 MACHINE_START(SPITZ, "SHARP Spitz")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup          = fixup_spitz,
+        .fixup          = spitz_fixup,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .init_machine   = spitz_init,
@@ -866,7 +993,7 @@ MACHINE_END
 MACHINE_START(BORZOI, "SHARP Borzoi")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup          = fixup_spitz,
+        .fixup          = spitz_fixup,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
         .init_machine   = spitz_init,
@@ -878,10 +1005,10 @@ MACHINE_END
 MACHINE_START(AKITA, "SHARP Akita")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .fixup          = fixup_spitz,
+        .fixup          = spitz_fixup,
         .map_io         = pxa_map_io,
         .init_irq       = pxa27x_init_irq,
-        .init_machine   = akita_init,
+        .init_machine   = spitz_init,
         .timer          = &pxa_timer,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 4209ddf6da61..7fe74067d85f 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -22,11 +22,10 @@
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
 
-#include <mach/sharpsl.h>
 #include <mach/spitz.h>
 #include <mach/pxa27x.h>
+#include <mach/sharpsl_pm.h>
 
-#include "sharpsl.h"
 #include "generic.h"
 
 #define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
@@ -178,11 +177,11 @@ unsigned long spitzpm_read_devdata(int type)
         case SHARPSL_STATUS_ACIN:
                 return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0);
         case SHARPSL_STATUS_LOCK:
-                return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batlock);
+                return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
         case SHARPSL_STATUS_CHRGFULL:
-                return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_batfull);
+                return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull);
         case SHARPSL_STATUS_FATAL:
-                return READ_GPIO_BIT(sharpsl_pm.machinfo->gpio_fatal);
+                return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal);
         case SHARPSL_ACIN_VOLT:
                 return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT);
         case SHARPSL_BATT_TEMP:
@@ -212,8 +211,6 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
         .should_wakeup    = spitz_should_wakeup,
 #if defined(CONFIG_LCD_CORGI)
         .backlight_limit = corgi_lcd_limit_intensity,
-#elif defined(CONFIG_BACKLIGHT_CORGI)
-        .backlight_limit  = corgibl_limit_intensity,
 #endif
         .charge_on_volt   = SHARPSL_CHARGE_ON_VOLT,
         .charge_on_temp   = SHARPSL_CHARGE_ON_TEMP,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index af40d2a12d37..a654d1e6b38a 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -29,6 +29,7 @@
 #include <linux/i2c/at24.h>
 #include <linux/smc91x.h>
 #include <linux/gpio.h>
+#include <linux/leds.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -62,37 +63,12 @@
 #define SG2_GPIO_nSD_DETECT     90
 #define SG2_SD_POWER_ENABLE     89
 
-static unsigned long stargate2_pin_config[] __initdata = {
-
-        GPIO15_nCS_1, /* SRAM */
-        /* SMC91x */
-        GPIO80_nCS_4,
-        GPIO40_GPIO, /*cable detect?*/
+static unsigned long sg2_im2_unified_pin_config[] __initdata = {
         /* Device Identification for wakeup*/
         GPIO102_GPIO,
-
-        /* Button */
-        GPIO91_GPIO | WAKEUP_ON_LEVEL_HIGH,
-
         /* DA9030 */
         GPIO1_GPIO,
 
-        /* Compact Flash */
-        GPIO79_PSKTSEL,
-        GPIO48_nPOE,
-        GPIO49_nPWE,
-        GPIO50_nPIOR,
-        GPIO51_nPIOW,
-        GPIO85_nPCE_1,
-        GPIO54_nPCE_2,
-        GPIO55_nPREG,
-        GPIO56_nPWAIT,
-        GPIO57_nIOIS16,
-        GPIO120_GPIO, /* Buff ctrl */
-        GPIO108_GPIO, /* Power ctrl */
-        GPIO82_GPIO, /* Reset */
-        GPIO53_GPIO, /* SG2_S0_GPIO_DETECT */
-
         /* MMC */
         GPIO32_MMC_CLK,
         GPIO112_MMC_CMD,
@@ -100,49 +76,44 @@ static unsigned long stargate2_pin_config[] __initdata = {
         GPIO109_MMC_DAT_1,
         GPIO110_MMC_DAT_2,
         GPIO111_MMC_DAT_3,
-        GPIO90_GPIO, /* nSD detect */
-        GPIO89_GPIO, /* SD_POWER_ENABLE */
 
-        /* Bluetooth */
-        GPIO81_GPIO, /* reset */
-
-        /* cc2420 802.15.4 radio */
-        GPIO22_GPIO,            /* CC_RSTN  (out)*/
-        GPIO114_GPIO,           /* CC_FIFO (in) */
-        GPIO116_GPIO,           /* CC_CCA (in) */
-        GPIO0_GPIO,             /* CC_FIFOP (in) */
-        GPIO16_GPIO,            /* CCSFD (in) */
-        GPIO39_GPIO,            /* CSn (out) */
+        /* 802.15.4 radio - driver out of mainline */
+        GPIO22_GPIO,                    /* CC_RSTN */
+        GPIO114_GPIO,                   /* CC_FIFO */
+        GPIO116_GPIO,                   /* CC_CCA */
+        GPIO0_GPIO,                     /* CC_FIFOP */
+        GPIO16_GPIO,                    /* CCSFD */
+        GPIO115_GPIO,                   /* Power enable */
 
         /* I2C */
         GPIO117_I2C_SCL,
         GPIO118_I2C_SDA,
 
         /* SSP 3 - 802.15.4 radio */
-        GPIO39_GPIO, /* chip select */
+        GPIO39_GPIO,                    /* Chip Select */
         GPIO34_SSP3_SCLK,
         GPIO35_SSP3_TXD,
         GPIO41_SSP3_RXD,
 
-        /* SSP 2 */
+        /* SSP 2 to daughter boards */
         GPIO11_SSP2_RXD,
         GPIO38_SSP2_TXD,
         GPIO36_SSP2_SCLK,
         GPIO37_GPIO, /* chip select */
 
-        /* SSP 1 */
-        GPIO26_SSP1_RXD,
-        GPIO25_SSP1_TXD,
+        /* SSP 1 - to daughter boards */
+        GPIO24_GPIO,                    /* Chip Select */
         GPIO23_SSP1_SCLK,
-        GPIO24_GPIO, /* chip select */
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
 
-        /* BTUART */
+        /* BTUART Basic Connector*/
         GPIO42_BTUART_RXD,
         GPIO43_BTUART_TXD,
         GPIO44_BTUART_CTS,
         GPIO45_BTUART_RTS,
 
-        /* STUART */
+        /* STUART  - IM2 via debug board not sure on SG2*/
         GPIO46_STUART_RXD,
         GPIO47_STUART_TXD,
 
@@ -150,47 +121,17 @@ static unsigned long stargate2_pin_config[] __initdata = {
         GPIO96_GPIO,    /* accelerometer interrupt */
         GPIO99_GPIO,    /* ADC interrupt */
 
-        /* Connector pins specified as gpios */
-        GPIO94_GPIO, /* large basic connector pin 14 */
-        GPIO10_GPIO, /* large basic connector pin 23 */
-
         /* SHT15 */
         GPIO100_GPIO,
         GPIO98_GPIO,
-};
 
-/**
- * stargate2_reset_bluetooth() reset the bluecore to ensure consistent state
- **/
-static int stargate2_reset_bluetooth(void)
-{
-        int err;
-        err = gpio_request(SG2_BT_RESET, "SG2_BT_RESET");
-        if (err) {
-                printk(KERN_ERR "Could not get gpio for bluetooth reset \n");
-                return err;
-        }
-        gpio_direction_output(SG2_BT_RESET, 1);
-        mdelay(5);
-        /* now reset it - 5 msec minimum */
-        gpio_set_value(SG2_BT_RESET, 0);
-        mdelay(10);
-        gpio_set_value(SG2_BT_RESET, 1);
-        gpio_free(SG2_BT_RESET);
-        return 0;
-}
+        /* Basic sensor board */
+        GPIO96_GPIO,    /* accelerometer interrupt */
+        GPIO99_GPIO,    /* ADC interrupt */
 
-static struct led_info stargate2_leds[] = {
-        {
-                .name = "sg2:red",
-                .flags = DA9030_LED_RATE_ON,
-        }, {
-                .name = "sg2:blue",
-                .flags = DA9030_LED_RATE_ON,
-        }, {
-                .name = "sg2:green",
-                .flags = DA9030_LED_RATE_ON,
-        },
+        /* Connector pins specified as gpios */
+        GPIO94_GPIO, /* large basic connector pin 14 */
+        GPIO10_GPIO, /* large basic connector pin 23 */
 };
 
 static struct sht15_platform_data platform_data_sht15 = {
@@ -352,20 +293,184 @@ static struct regulator_init_data stargate2_ldo_init_data[] = {
         },
 };
 
-static struct da903x_subdev_info stargate2_da9030_subdevs[] = {
+static struct mtd_partition stargate2flash_partitions[] = {
         {
-                .name = "da903x-led",
-                .id = DA9030_ID_LED_2,
-                .platform_data = &stargate2_leds[0],
+                .name = "Bootloader",
+                .size = 0x00040000,
+                .offset = 0,
+                .mask_flags = 0,
         }, {
-                .name = "da903x-led",
-                .id = DA9030_ID_LED_3,
-                .platform_data = &stargate2_leds[2],
+                .name = "Kernel",
+                .size = 0x00200000,
+                .offset = 0x00040000,
+                .mask_flags = 0
         }, {
-                .name = "da903x-led",
-                .id = DA9030_ID_LED_4,
-                .platform_data = &stargate2_leds[1],
+                .name = "Filesystem",
+                .size = 0x01DC0000,
+                .offset = 0x00240000,
+                .mask_flags = 0
+        },
+};
+
+static struct resource flash_resources = {
+        .start = PXA_CS0_PHYS,
+        .end = PXA_CS0_PHYS + SZ_32M - 1,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct flash_platform_data stargate2_flash_data = {
+        .map_name = "cfi_probe",
+        .parts = stargate2flash_partitions,
+        .nr_parts = ARRAY_SIZE(stargate2flash_partitions),
+        .name = "PXA27xOnChipROM",
+        .width = 2,
+};
+
+static struct platform_device stargate2_flash_device = {
+        .name = "pxa2xx-flash",
+        .id = 0,
+        .dev = {
+                .platform_data = &stargate2_flash_data,
+        },
+        .resource = &flash_resources,
+        .num_resources = 1,
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_0_info = {
+        .num_chipselect = 1,
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_1_info = {
+        .num_chipselect = 1,
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
+        .num_chipselect = 1,
+};
+
+/* An upcoming kernel change will scrap SFRM usage so these
+ * drivers have been moved to use gpio's via cs_control */
+static struct pxa2xx_spi_chip staccel_chip_info = {
+        .tx_threshold = 8,
+        .rx_threshold = 8,
+        .dma_burst_size = 8,
+        .timeout = 235,
+        .gpio_cs = 24,
+};
+
+static struct pxa2xx_spi_chip cc2420_info = {
+        .tx_threshold = 8,
+        .rx_threshold = 8,
+        .dma_burst_size = 8,
+        .timeout = 235,
+        .gpio_cs = 39,
+};
+
+static struct spi_board_info spi_board_info[] __initdata = {
+        {
+                .modalias = "lis3l02dq",
+                .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */
+                .bus_num = 1,
+                .chip_select = 0,
+                .controller_data = &staccel_chip_info,
+                .irq = IRQ_GPIO(96),
         }, {
+                .modalias = "cc2420",
+                .max_speed_hz = 6500000,
+                .bus_num = 3,
+                .chip_select = 0,
+                .controller_data = &cc2420_info,
+        },
+};
+
+static void sg2_udc_command(int cmd)
+{
+        switch (cmd) {
+        case PXA2XX_UDC_CMD_CONNECT:
+                UP2OCR |=  UP2OCR_HXOE  | UP2OCR_DPPUE | UP2OCR_DPPUBE;
+                break;
+        case PXA2XX_UDC_CMD_DISCONNECT:
+                UP2OCR &= ~(UP2OCR_HXOE  | UP2OCR_DPPUE | UP2OCR_DPPUBE);
+                break;
+        }
+}
+
+static struct i2c_pxa_platform_data i2c_pwr_pdata = {
+        .fast_mode = 1,
+};
+
+static struct i2c_pxa_platform_data i2c_pdata = {
+        .fast_mode = 1,
+};
+
+static void __init imote2_stargate2_init(void)
+{
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(sg2_im2_unified_pin_config));
+
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+
+        pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
+        pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info);
+        pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info);
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+
+
+        pxa27x_set_i2c_power_info(&i2c_pwr_pdata);
+        pxa_set_i2c_info(&i2c_pdata);
+}
+
+#ifdef CONFIG_MACH_INTELMOTE2
+/* As the the imote2 doesn't currently have a conventional SD slot
+ * there is no option to hotplug cards, making all this rather simple
+ */
+static int imote2_mci_get_ro(struct device *dev)
+{
+        return 0;
+}
+
+/* Rather simple case as hotplugging not possible */
+static struct pxamci_platform_data imote2_mci_platform_data = {
+        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */
+        .get_ro = imote2_mci_get_ro,
+        .gpio_card_detect = -1,
+        .gpio_card_ro   = -1,
+        .gpio_power = -1,
+};
+
+static struct gpio_led imote2_led_pins[] = {
+        {
+                .name       =  "imote2:red",
+                .gpio       = 103,
+                .active_low = 1,
+        }, {
+                .name       = "imote2:green",
+                .gpio       = 104,
+                .active_low = 1,
+        }, {
+                .name       = "imote2:blue",
+                .gpio       = 105,
+                .active_low = 1,
+        },
+};
+
+static struct gpio_led_platform_data imote2_led_data = {
+        .num_leds = ARRAY_SIZE(imote2_led_pins),
+        .leds     = imote2_led_pins,
+};
+
+static struct platform_device imote2_leds = {
+        .name = "leds-gpio",
+        .id   = -1,
+        .dev = {
+                .platform_data = &imote2_led_data,
+        },
+};
+
+static struct da903x_subdev_info imote2_da9030_subdevs[] = {
+        {
                 .name = "da903x-regulator",
                 .id = DA9030_ID_LDO2,
                 .platform_data = &stargate2_ldo_init_data[vcc_bbio],
@@ -428,9 +533,121 @@ static struct da903x_subdev_info stargate2_da9030_subdevs[] = {
         },
 };
 
-static struct da903x_platform_data stargate2_da9030_pdata = {
-        .num_subdevs = ARRAY_SIZE(stargate2_da9030_subdevs),
-        .subdevs = stargate2_da9030_subdevs,
+static struct da903x_platform_data imote2_da9030_pdata = {
+        .num_subdevs = ARRAY_SIZE(imote2_da9030_subdevs),
+        .subdevs = imote2_da9030_subdevs,
+};
+
+static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
+        {
+                .type = "da9030",
+                .addr = 0x49,
+                .platform_data = &imote2_da9030_pdata,
+                .irq = gpio_to_irq(1),
+        },
+};
+
+static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
+        { /* UCAM sensor board */
+                .type = "max1239",
+                .addr = 0x35,
+        }, { /* ITS400 Sensor board only */
+                .type = "max1363",
+                .addr = 0x34,
+                /* Through a nand gate - Also beware, on V2 sensor board the
+                 * pull up resistors are missing.
+                 */
+                .irq = IRQ_GPIO(99),
+        }, { /* ITS400 Sensor board only */
+                .type = "tsl2561",
+                .addr = 0x49,
+                /* Through a nand gate - Also beware, on V2 sensor board the
+                 * pull up resistors are missing.
+                 */
+                .irq = IRQ_GPIO(99),
+        }, { /* ITS400 Sensor board only */
+                .type = "tmp175",
+                .addr = 0x4A,
+                .irq = IRQ_GPIO(96),
+        }, { /* IMB400 Multimedia board */
+                .type = "wm8940",
+                .addr = 0x1A,
+        },
+};
+
+static unsigned long imote2_pin_config[] __initdata = {
+
+        /* Button */
+        GPIO91_GPIO,
+
+        /* LEDS */
+        GPIO103_GPIO, /* red led */
+        GPIO104_GPIO, /* green led */
+        GPIO105_GPIO, /* blue led */
+};
+
+static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = {
+        .udc_command            = sg2_udc_command,
+};
+
+static struct platform_device *imote2_devices[] = {
+        &stargate2_flash_device,
+        &imote2_leds,
+        &sht15,
+};
+
+static void __init imote2_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(imote2_pin_config));
+
+        imote2_stargate2_init();
+
+        platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
+
+        i2c_register_board_info(0, imote2_i2c_board_info,
+                                ARRAY_SIZE(imote2_i2c_board_info));
+        i2c_register_board_info(1, imote2_pwr_i2c_board_info,
+                                ARRAY_SIZE(imote2_pwr_i2c_board_info));
+
+        pxa_set_mci_info(&imote2_mci_platform_data);
+        pxa_set_udc_info(&imote2_udc_info);
+}
+#endif
+
+#ifdef CONFIG_MACH_STARGATE2
+
+static unsigned long stargate2_pin_config[] __initdata = {
+
+        GPIO15_nCS_1, /* SRAM */
+        /* SMC91x */
+        GPIO80_nCS_4,
+        GPIO40_GPIO, /*cable detect?*/
+
+        /* Button */
+        GPIO91_GPIO | WAKEUP_ON_LEVEL_HIGH,
+
+        /* Compact Flash */
+        GPIO79_PSKTSEL,
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO85_nPCE_1,
+        GPIO54_nPCE_2,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+        GPIO120_GPIO, /* Buff ctrl */
+        GPIO108_GPIO, /* Power ctrl */
+        GPIO82_GPIO, /* Reset */
+        GPIO53_GPIO, /* SG2_S0_GPIO_DETECT */
+
+        /* MMC not shared with imote2 */
+        GPIO90_GPIO, /* nSD detect */
+        GPIO89_GPIO, /* SD_POWER_ENABLE */
+
+        /* Bluetooth */
+        GPIO81_GPIO, /* reset */
 };
 
 static struct resource smc91x_resources[] = {
@@ -463,7 +680,6 @@ static struct platform_device smc91x_device = {
 };
 
 
-
 /*
  * The card detect interrupt isn't debounced so we delay it by 250ms
  * to give the card a chance to fully insert / eject.
@@ -532,48 +748,6 @@ static struct pxamci_platform_data stargate2_mci_platform_data = {
         .exit = stargate2_mci_exit,
 };
 
-static struct mtd_partition stargate2flash_partitions[] = {
-        {
-                .name = "Bootloader",
-                .size = 0x00040000,
-                .offset = 0,
-                .mask_flags = 0,
-        }, {
-                .name = "Kernel",
-                .size = 0x00200000,
-                .offset = 0x00040000,
-                .mask_flags = 0
-        }, {
-                .name = "Filesystem",
-                .size = 0x01DC0000,
-                .offset = 0x00240000,
-                .mask_flags = 0
-        },
-};
-
-static struct resource flash_resources = {
-        .start = PXA_CS0_PHYS,
-        .end = PXA_CS0_PHYS + SZ_32M - 1,
-        .flags = IORESOURCE_MEM,
-};
-
-static struct flash_platform_data stargate2_flash_data = {
-        .map_name = "cfi_probe",
-        .parts = stargate2flash_partitions,
-        .nr_parts = ARRAY_SIZE(stargate2flash_partitions),
-        .name = "PXA27xOnChipROM",
-        .width = 2,
-};
-
-static struct platform_device stargate2_flash_device = {
-        .name = "pxa2xx-flash",
-        .id = 0,
-        .dev = {
-                .platform_data = &stargate2_flash_data,
-        },
-        .resource = &flash_resources,
-        .num_resources = 1,
-};
 
 /*
  * SRAM - The Stargate 2 has 32MB of SRAM.
@@ -616,6 +790,129 @@ static struct at24_platform_data pca9500_eeprom_pdata = {
         .page_size = 4,
 };
 
+/**
+ * stargate2_reset_bluetooth() reset the bluecore to ensure consistent state
+ **/
+static int stargate2_reset_bluetooth(void)
+{
+        int err;
+        err = gpio_request(SG2_BT_RESET, "SG2_BT_RESET");
+        if (err) {
+                printk(KERN_ERR "Could not get gpio for bluetooth reset\n");
+                return err;
+        }
+        gpio_direction_output(SG2_BT_RESET, 1);
+        mdelay(5);
+        /* now reset it - 5 msec minimum */
+        gpio_set_value(SG2_BT_RESET, 0);
+        mdelay(10);
+        gpio_set_value(SG2_BT_RESET, 1);
+        gpio_free(SG2_BT_RESET);
+        return 0;
+}
+
+static struct led_info stargate2_leds[] = {
+        {
+                .name = "sg2:red",
+                .flags = DA9030_LED_RATE_ON,
+        }, {
+                .name = "sg2:blue",
+                .flags = DA9030_LED_RATE_ON,
+        }, {
+                .name = "sg2:green",
+                .flags = DA9030_LED_RATE_ON,
+        },
+};
+
+static struct da903x_subdev_info stargate2_da9030_subdevs[] = {
+        {
+                .name = "da903x-led",
+                .id = DA9030_ID_LED_2,
+                .platform_data = &stargate2_leds[0],
+        }, {
+                .name = "da903x-led",
+                .id = DA9030_ID_LED_3,
+                .platform_data = &stargate2_leds[2],
+        }, {
+                .name = "da903x-led",
+                .id = DA9030_ID_LED_4,
+                .platform_data = &stargate2_leds[1],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO2,
+                .platform_data = &stargate2_ldo_init_data[vcc_bbio],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO3,
+                .platform_data = &stargate2_ldo_init_data[vcc_bb],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO4,
+                .platform_data = &stargate2_ldo_init_data[vcc_pxa_flash],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO5,
+                .platform_data = &stargate2_ldo_init_data[vcc_cc2420],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO6,
+                .platform_data = &stargate2_ldo_init_data[vcc_vref],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO7,
+                .platform_data = &stargate2_ldo_init_data[vcc_sram_ext],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO8,
+                .platform_data = &stargate2_ldo_init_data[vcc_mica],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO9,
+                .platform_data = &stargate2_ldo_init_data[vcc_bt],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO10,
+                .platform_data = &stargate2_ldo_init_data[vcc_sensor_1_8],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO11,
+                .platform_data = &stargate2_ldo_init_data[vcc_sensor_3],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO12,
+                .platform_data = &stargate2_ldo_init_data[vcc_lcd],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO15,
+                .platform_data = &stargate2_ldo_init_data[vcc_pxa_pll],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO17,
+                .platform_data = &stargate2_ldo_init_data[vcc_pxa_usim],
+        }, {
+                .name = "da903x-regulator", /*pxa vcc i/o and cc2420 vcc i/o */
+                .id = DA9030_ID_LDO18,
+                .platform_data = &stargate2_ldo_init_data[vcc_io],
+        }, {
+                .name = "da903x-regulator",
+                .id = DA9030_ID_LDO19,
+                .platform_data = &stargate2_ldo_init_data[vcc_pxa_mem],
+        },
+};
+
+static struct da903x_platform_data stargate2_da9030_pdata = {
+        .num_subdevs = ARRAY_SIZE(stargate2_da9030_subdevs),
+        .subdevs = stargate2_da9030_subdevs,
+};
+
+static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
+        {
+                .type = "da9030",
+                .addr = 0x49,
+                .platform_data = &stargate2_da9030_pdata,
+                .irq = gpio_to_irq(1),
+        },
+};
 
 static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
         /* Techically this a pca9500 - but it's compatible with the 8574
@@ -653,74 +950,6 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
         },
 };
 
-static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
-        {
-                .type = "da9030",
-                .addr = 0x49,
-                .platform_data = &stargate2_da9030_pdata,
-                .irq = gpio_to_irq(1),
-        },
-};
-
-static struct pxa2xx_spi_master pxa_ssp_master_0_info = {
-        .num_chipselect = 1,
-};
-
-static struct pxa2xx_spi_master pxa_ssp_master_1_info = {
-        .num_chipselect = 1,
-};
-
-static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
-        .num_chipselect = 1,
-};
-
-/* An upcoming kernel change will scrap SFRM usage so these
- * drivers have been moved to use gpio's via cs_control */
-static struct pxa2xx_spi_chip staccel_chip_info = {
-        .tx_threshold = 8,
-        .rx_threshold = 8,
-        .dma_burst_size = 8,
-        .timeout = 235,
-        .gpio_cs = 24,
-};
-
-static struct pxa2xx_spi_chip cc2420_info = {
-        .tx_threshold = 8,
-        .rx_threshold = 8,
-        .dma_burst_size = 8,
-        .timeout = 235,
-        .gpio_cs = 39,
-};
-
-static struct spi_board_info spi_board_info[] __initdata = {
-        {
-                .modalias = "lis3l02dq",
-                .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */
-                .bus_num = 1,
-                .chip_select = 0,
-                .controller_data = &staccel_chip_info,
-                .irq = IRQ_GPIO(96),
-        }, {
-                .modalias = "cc2420",
-                .max_speed_hz = 6500000,
-                .bus_num = 3,
-                .chip_select = 0,
-                .controller_data = &cc2420_info,
-        },
-};
-
-static void sg2_udc_command(int cmd)
-{
-        switch (cmd) {
-        case PXA2XX_UDC_CMD_CONNECT:
-                UP2OCR |=  UP2OCR_HXOE  | UP2OCR_DPPUE | UP2OCR_DPPUBE;
-                break;
-        case PXA2XX_UDC_CMD_DISCONNECT:
-                UP2OCR &= ~(UP2OCR_HXOE  | UP2OCR_DPPUE | UP2OCR_DPPUBE);
-                break;
-        }
-}
-
 /* Board doesn't support cable detection - so always lie and say
  * something is there.
  */
@@ -741,14 +970,6 @@ static struct platform_device *stargate2_devices[] = {
         &sht15,
 };
 
-static struct i2c_pxa_platform_data i2c_pwr_pdata = {
-        .fast_mode = 1,
-};
-
-static struct i2c_pxa_platform_data i2c_pdata = {
-        .fast_mode = 1,
-};
-
 static void __init stargate2_init(void)
 {
         /* This is probably a board specific hack as this must be set
@@ -757,22 +978,13 @@ static void __init stargate2_init(void)
 
         pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
 
-        pxa_set_ffuart_info(NULL);
-        pxa_set_btuart_info(NULL);
-        pxa_set_stuart_info(NULL);
+        imote2_stargate2_init();
 
         platform_add_devices(ARRAY_AND_SIZE(stargate2_devices));
 
-        pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
-        pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info);
-        pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info);
-        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
-
         i2c_register_board_info(0, ARRAY_AND_SIZE(stargate2_i2c_board_info));
-        i2c_register_board_info(1,
-                                ARRAY_AND_SIZE(stargate2_pwr_i2c_board_info));
-        pxa27x_set_i2c_power_info(&i2c_pwr_pdata);
-        pxa_set_i2c_info(&i2c_pdata);
+        i2c_register_board_info(1, stargate2_pwr_i2c_board_info,
+                                ARRAY_SIZE(stargate2_pwr_i2c_board_info));
 
         pxa_set_mci_info(&stargate2_mci_platform_data);
 
@@ -780,7 +992,21 @@ static void __init stargate2_init(void)
 
         stargate2_reset_bluetooth();
 }
+#endif
+
+#ifdef CONFIG_MACH_INTELMOTE2
+MACHINE_START(INTELMOTE2, "IMOTE 2")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = imote2_init,
+        .boot_params    = 0xA0000100,
+MACHINE_END
+#endif
 
+#ifdef CONFIG_MACH_STARGATE2
 MACHINE_START(STARGATE2, "Stargate 2")
         .phys_io = 0x40000000,
         .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
@@ -790,3 +1016,4 @@ MACHINE_START(STARGATE2, "Stargate 2")
         .init_machine = stargate2_init,
         .boot_params = 0xA0000100,
 MACHINE_END
+#endif
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 69689112eae7..0acff172ef22 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -530,13 +530,9 @@ static void __init trizeps4_init(void)
         i2c_register_board_info(0, trizeps4_i2c_devices,
                                         ARRAY_SIZE(trizeps4_i2c_devices));
 
-#ifdef CONFIG_IDE_PXA_CF
-        /* if boot direct from compact flash dont disable power */
-        trizeps_conxs_bcr = 0x0009;
-#else
         /* this is the reset value */
         trizeps_conxs_bcr = 0x00A0;
-#endif
+
         BCR_writew(trizeps_conxs_bcr);
         board_backlight_power(1);
 }
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 9884fa978f16..c9b747cedea8 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -25,6 +25,7 @@
 #include <linux/dm9000.h>
 #include <linux/ucb1400.h>
 #include <linux/ata_platform.h>
+#include <linux/regulator/max1586.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -37,6 +38,7 @@
 #include <mach/ohci.h>
 #include <mach/pxa27x-udc.h>
 #include <mach/udc.h>
+#include <mach/pata_pxa.h>
 
 #include <plat/i2c.h>
 
@@ -464,7 +466,6 @@ static struct i2c_board_info __initdata vpac270_i2c_devs[] = {
 
 static void __init vpac270_rtc_init(void)
 {
-        pxa_set_i2c_info(NULL);
         i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs));
 }
 #else
@@ -492,7 +493,55 @@ static struct pxafb_mode_info vpac270_lcd_modes[] = {
         .vsync_len      = 2,
 
         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-},
+}, {    /* CRT 640x480 */
+        .pixclock       = 35000,
+        .xres           = 640,
+        .yres           = 480,
+        .bpp            = 16,
+        .depth          = 16,
+
+        .left_margin    = 96,
+        .right_margin   = 48,
+        .upper_margin   = 33,
+        .lower_margin   = 10,
+
+        .hsync_len      = 48,
+        .vsync_len      = 1,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+}, {    /* CRT 800x600 H=30kHz V=48HZ */
+        .pixclock       = 25000,
+        .xres           = 800,
+        .yres           = 600,
+        .bpp            = 16,
+        .depth          = 16,
+
+        .left_margin    = 50,
+        .right_margin   = 1,
+        .upper_margin   = 21,
+        .lower_margin   = 12,
+
+        .hsync_len      = 8,
+        .vsync_len      = 1,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+}, {    /* CRT 1024x768 H=40kHz V=50Hz */
+        .pixclock       = 15000,
+        .xres           = 1024,
+        .yres           = 768,
+        .bpp            = 16,
+        .depth          = 16,
+
+        .left_margin    = 220,
+        .right_margin   = 8,
+        .upper_margin   = 33,
+        .lower_margin   = 2,
+
+        .hsync_len      = 48,
+        .vsync_len      = 1,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+}
 };
 
 static struct pxafb_mach_info vpac270_lcd_screen = {
@@ -538,9 +587,10 @@ static inline void vpac270_lcd_init(void) {}
 /******************************************************************************
  * PATA IDE
  ******************************************************************************/
-#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
-static struct pata_platform_info vpac270_pata_pdata = {
-        .ioport_shift   = 1,
+#if defined(CONFIG_PATA_PXA) || defined(CONFIG_PATA_PXA_MODULE)
+static struct pata_pxa_pdata vpac270_pata_pdata = {
+        .reg_shift      = 1,
+        .dma_dreq       = 1,
         .irq_flags      = IRQF_TRIGGER_RISING,
 };
 
@@ -555,7 +605,12 @@ static struct resource vpac270_ide_resources[] = {
                .end     = PXA_CS3_PHYS + 0x15f,
                .flags   = IORESOURCE_MEM
         },
-        [2] = { /* IDE IRQ pin */
+        [2] = { /* DMA Base address */
+               .start   = PXA_CS3_PHYS + 0x20,
+               .end     = PXA_CS3_PHYS + 0x2f,
+               .flags   = IORESOURCE_DMA
+        },
+        [3] = { /* IDE IRQ pin */
                .start   = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
                .end     = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
                .flags   = IORESOURCE_IRQ
@@ -563,11 +618,12 @@ static struct resource vpac270_ide_resources[] = {
 };
 
 static struct platform_device vpac270_ide_device = {
-        .name           = "pata_platform",
+        .name           = "pata_pxa",
         .num_resources  = ARRAY_SIZE(vpac270_ide_resources),
         .resource       = vpac270_ide_resources,
         .dev            = {
                 .platform_data  = &vpac270_pata_pdata,
+                .coherent_dma_mask      = 0xffffffff,
         }
 };
 
@@ -580,6 +636,59 @@ static inline void vpac270_ide_init(void) {}
 #endif
 
 /******************************************************************************
+ * Core power regulator
+ ******************************************************************************/
+#if defined(CONFIG_REGULATOR_MAX1586) || \
+    defined(CONFIG_REGULATOR_MAX1586_MODULE)
+static struct regulator_consumer_supply vpac270_max1587a_consumers[] = {
+        {
+                .supply = "vcc_core",
+        }
+};
+
+static struct regulator_init_data vpac270_max1587a_v3_info = {
+        .constraints = {
+                .name           = "vcc_core range",
+                .min_uV         = 900000,
+                .max_uV         = 1705000,
+                .always_on      = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+        },
+        .consumer_supplies      = vpac270_max1587a_consumers,
+        .num_consumer_supplies  = ARRAY_SIZE(vpac270_max1587a_consumers),
+};
+
+static struct max1586_subdev_data vpac270_max1587a_subdevs[] = {
+        {
+                .name           = "vcc_core",
+                .id             = MAX1586_V3,
+                .platform_data  = &vpac270_max1587a_v3_info,
+        }
+};
+
+static struct max1586_platform_data vpac270_max1587a_info = {
+        .subdevs     = vpac270_max1587a_subdevs,
+        .num_subdevs = ARRAY_SIZE(vpac270_max1587a_subdevs),
+        .v3_gain     = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
+};
+
+static struct i2c_board_info __initdata vpac270_pi2c_board_info[] = {
+        {
+                I2C_BOARD_INFO("max1586", 0x14),
+                .platform_data  = &vpac270_max1587a_info,
+        },
+};
+
+static void __init vpac270_pmic_init(void)
+{
+        i2c_register_board_info(1, ARRAY_AND_SIZE(vpac270_pi2c_board_info));
+}
+#else
+static inline void vpac270_pmic_init(void) {}
+#endif
+
+
+/******************************************************************************
  * Machine init
  ******************************************************************************/
 static void __init vpac270_init(void)
@@ -589,7 +698,10 @@ static void __init vpac270_init(void)
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
+        pxa_set_i2c_info(NULL);
+        pxa27x_set_i2c_power_info(NULL);
 
+        vpac270_pmic_init();
         vpac270_lcd_init();
         vpac270_mmc_init();
         vpac270_nor_init();
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index d303c6929d32..f0d02288b4ca 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -17,6 +17,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/pwm_backlight.h>
+#include <linux/z2_battery.h>
 #include <linux/dma-mapping.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/libertas_spi.h>
@@ -26,6 +27,7 @@
 #include <linux/gpio.h>
 #include <linux/gpio_keys.h>
 #include <linux/delay.h>
+#include <linux/regulator/machine.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -162,7 +164,7 @@ static struct mtd_partition z2_flash_parts[] = {
         }, {
                 .name   = "U-Boot Environment",
                 .offset = 0x40000,
-                .size   = 0x60000,
+                .size   = 0x20000,
         }, {
                 .name   = "Flash",
                 .offset = 0x60000,
@@ -452,6 +454,42 @@ static inline void z2_keys_init(void) {}
 #endif
 
 /******************************************************************************
+ * Battery
+ ******************************************************************************/
+#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
+static struct z2_battery_info batt_chip_info = {
+        .batt_I2C_bus   = 0,
+        .batt_I2C_addr  = 0x55,
+        .batt_I2C_reg   = 2,
+        .charge_gpio    = GPIO0_ZIPITZ2_AC_DETECT,
+        .min_voltage    = 2400000,
+        .max_voltage    = 3700000,
+        .batt_div       = 69,
+        .batt_mult      = 1000000,
+        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LION,
+        .batt_name      = "Z2",
+};
+
+static struct i2c_board_info __initdata z2_i2c_board_info[] = {
+        {
+                I2C_BOARD_INFO("aer915", 0x55),
+                .platform_data  = &batt_chip_info,
+        }, {
+                I2C_BOARD_INFO("wm8750", 0x1b),
+        },
+
+};
+
+static void __init z2_i2c_init(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(z2_i2c_board_info));
+}
+#else
+static inline void z2_i2c_init(void) {}
+#endif
+
+/******************************************************************************
  * SSP Devices - WiFi and LCD control
  ******************************************************************************/
 #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
@@ -573,23 +611,95 @@ static inline void z2_spi_init(void) {}
 #endif
 
 /******************************************************************************
+ * Core power regulator
+ ******************************************************************************/
+#if defined(CONFIG_REGULATOR_TPS65023) || \
+        defined(CONFIG_REGULATOR_TPS65023_MODULE)
+static struct regulator_consumer_supply z2_tps65021_consumers[] = {
+        {
+                .supply = "vcc_core",
+        }
+};
+
+static struct regulator_init_data z2_tps65021_info[] = {
+        {
+                .constraints = {
+                        .name           = "vcc_core range",
+                        .min_uV         = 800000,
+                        .max_uV         = 1600000,
+                        .always_on      = 1,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+                },
+                .consumer_supplies      = z2_tps65021_consumers,
+                .num_consumer_supplies  = ARRAY_SIZE(z2_tps65021_consumers),
+        }, {
+                .constraints = {
+                        .name           = "DCDC2",
+                        .min_uV         = 3300000,
+                        .max_uV         = 3300000,
+                        .always_on      = 1,
+                },
+        }, {
+                .constraints = {
+                        .name           = "DCDC3",
+                        .min_uV         = 1800000,
+                        .max_uV         = 1800000,
+                        .always_on      = 1,
+                },
+        }, {
+                .constraints = {
+                        .name           = "LDO1",
+                        .min_uV         = 1000000,
+                        .max_uV         = 3150000,
+                        .always_on      = 1,
+                },
+        }, {
+                .constraints = {
+                        .name           = "LDO2",
+                        .min_uV         = 1050000,
+                        .max_uV         = 3300000,
+                        .always_on      = 1,
+                },
+        }
+};
+
+static struct i2c_board_info __initdata z2_pi2c_board_info[] = {
+        {
+                I2C_BOARD_INFO("tps65021", 0x48),
+                .platform_data  = &z2_tps65021_info,
+        },
+};
+
+static void __init z2_pmic_init(void)
+{
+        pxa27x_set_i2c_power_info(NULL);
+        i2c_register_board_info(1, ARRAY_AND_SIZE(z2_pi2c_board_info));
+}
+#else
+static inline void z2_pmic_init(void) {}
+#endif
+
+/******************************************************************************
  * Machine init
  ******************************************************************************/
 static void __init z2_init(void)
 {
         pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config));
 
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+
         z2_lcd_init();
         z2_mmc_init();
         z2_mkp_init();
-
-        pxa_set_i2c_info(NULL);
-
+        z2_i2c_init();
         z2_spi_init();
         z2_nor_init();
         z2_pwm_init();
         z2_leds_init();
         z2_keys_init();
+        z2_pmic_init();
 }
 
 MACHINE_START(ZIPIT2, "Zipit Z2")
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 35dabccd0ac2..bc30245e133b 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -55,6 +55,7 @@
 #include <plat/cpu.h>
 
 #include <plat/iic-core.h>
+#include <plat/fb-core.h>
 
 static struct map_desc s3c2416_iodesc[] __initdata = {
         IODESC_ENT(WATCHDOG),
@@ -90,7 +91,7 @@ int __init s3c2416_init(void)
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
 
-        s3c_device_fb.name = "s3c2443-fb";
+        s3c_fb_setname("s3c2443-fb");
 
         return sysdev_register(&s3c2416_sysdev);
 }
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 9e39faa283b9..deaabe86741d 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -90,24 +90,17 @@
 static struct pcf50633 *gta02_pcf;
 
 /*
- * This gets called every 1ms when we paniced.
+ * This gets called frequently when we paniced.
  */
 
-static long gta02_panic_blink(long count)
+static long gta02_panic_blink(int state)
 {
         long delay = 0;
-        static long last_blink;
-        static char led;
+        char led;
 
-        /* Fast blink: 200ms period. */
-        if (count - last_blink < 100)
-                return 0;
-
-        led ^= 1;
+        led = (state) ? 1 : 0;
         gpio_direction_output(GTA02_GPIO_AUX_LED, led);
 
-        last_blink = count;
-
         return delay;
 }
 
@@ -556,7 +549,7 @@ static void gta02_poweroff(void)
 
 static void __init gta02_machine_init(void)
 {
-        /* Set the panic callback to make AUX LED blink at ~5Hz. */
+        /* Set the panic callback to turn AUX LED on or off. */
         panic_blink = gta02_panic_blink;
 
         s3c_pm_init();
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index ce2ec3298930..839b6b2ced74 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -35,6 +35,7 @@
 #include <plat/s3c2443.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/fb-core.h>
 
 static struct map_desc s3c2443_iodesc[] __initdata = {
         IODESC_ENT(WATCHDOG),
@@ -62,6 +63,7 @@ int __init s3c2443_init(void)
         s3c24xx_reset_hook = s3c2443_hard_reset;
 
         s3c_device_nand.name = "s3c2412-nand";
+        s3c_fb_setname("s3c2443-fb");
 
         /* change WDT IRQ number */
         s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index f5a59727949f..071e8a1e0765 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -57,11 +57,21 @@ config S3C64XX_SETUP_I2C1
         help
           Common setup code for i2c bus 1.
 
+config S3C64XX_SETUP_IDE
+        bool
+        help
+          Common setup code for S3C64XX IDE.
+
 config S3C64XX_SETUP_FB_24BPP
         bool
         help
           Common setup code for S3C64XX with an 24bpp RGB display helper.
 
+config S3C64XX_SETUP_KEYPAD
+        bool
+        help
+          Common setup code for S3C64XX KEYPAD GPIO configurations
+
 config S3C64XX_SETUP_SDHCI_GPIO
         bool
         help
@@ -95,15 +105,20 @@ config MACH_SMDK6410
         select S3C_DEV_HSMMC
         select S3C_DEV_HSMMC1
         select S3C_DEV_I2C1
+        select SAMSUNG_DEV_IDE
         select S3C_DEV_FB
+        select S3C_DEV_RTC
         select SAMSUNG_DEV_TS
         select S3C_DEV_USB_HOST
         select S3C_DEV_USB_HSOTG
         select S3C_DEV_WDT
+        select SAMSUNG_DEV_KEYPAD
         select HAVE_S3C2410_WATCHDOG
         select S3C64XX_SETUP_SDHCI
         select S3C64XX_SETUP_I2C1
+        select S3C64XX_SETUP_IDE
         select S3C64XX_SETUP_FB_24BPP
+        select S3C64XX_SETUP_KEYPAD
         help
           Machine support for the Samsung SMDK6410
 
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 9d1006938f5c..48d3dfac8dd7 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -35,6 +35,8 @@ obj-$(CONFIG_S3C64XX_DMA)	+= dma.o
 
 obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
 obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
+obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
 obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
 obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
 obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index fbd85a9b7bbf..7e03f0ae2fc8 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -133,6 +133,12 @@ static struct clk init_clocks_disable[] = {
                 .id             = -1,
                 .parent         = &clk_h,
         }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
+        }, {
                 .name           = "adc",
                 .id             = -1,
                 .parent         = &clk_p,
@@ -165,6 +171,12 @@ static struct clk init_clocks_disable[] = {
                 .ctrlbit        = S3C6410_CLKCON_PCLK_IIS2,
         }, {
 #endif
+                .name           = "keypad",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_KEYPAD,
+        }, {
                 .name           = "spi",
                 .id             = 0,
                 .parent         = &clk_p,
@@ -295,12 +307,6 @@ static struct clk init_clocks[] = {
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_UART3,
         }, {
-                .name           = "rtc",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
-        }, {
                 .name           = "watchdog",
                 .id             = -1,
                 .parent         = &clk_p,
@@ -310,6 +316,12 @@ static struct clk init_clocks[] = {
                 .id             = -1,
                 .parent         = &clk_p,
                 .ctrlbit        = S3C_CLKCON_PCLK_AC97,
+        }, {
+                .name           = "cfcon",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_IHOST,
         }
 };
 
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
index c3e9e73bd0f9..9648fbc36eec 100644
--- a/arch/arm/mach-s3c64xx/dev-audio.c
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -12,11 +12,11 @@
 #include <linux/string.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <mach/irqs.h>
 #include <mach/map.h>
 #include <mach/dma.h>
-#include <mach/gpio.h>
 
 #include <plat/devs.h>
 #include <plat/audio.h>
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 29c32d088515..a492b982aa06 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -12,10 +12,10 @@
 #include <linux/string.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <mach/dma.h>
 #include <mach/map.h>
-#include <mach/gpio.h>
 #include <mach/gpio-bank-c.h>
 #include <mach/spi-clocks.h>
 
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index 60c929a3cab6..300dee4a667b 100644
--- a/arch/arm/mach-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -15,9 +15,9 @@
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <mach/map.h>
-#include <mach/gpio.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index e1eab3c94aea..a1f13f02c841 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -67,6 +67,7 @@
 #define S3C64XX_PA_USB_HSOTG    (0x7C000000)
 #define S3C64XX_PA_WATCHDOG     (0x7E004000)
 #define S3C64XX_PA_RTC          (0x7E005000)
+#define S3C64XX_PA_KEYPAD       (0x7E00A000)
 #define S3C64XX_PA_ADC          (0x7E00B000)
 #define S3C64XX_PA_SYSCON       (0x7E00F000)
 #define S3C64XX_PA_AC97         (0x7F001000)
@@ -86,6 +87,9 @@
 #define S3C64XX_SZ_GPIO         SZ_4K
 
 #define S3C64XX_PA_SDRAM        (0x50000000)
+
+#define S3C64XX_PA_CFCON        (0x70300000)
+
 #define S3C64XX_PA_VIC0         (0x71200000)
 #define S3C64XX_PA_VIC1         (0x71300000)
 
@@ -120,5 +124,7 @@
 #define S3C_PA_WDT              S3C64XX_PA_WATCHDOG
 
 #define SAMSUNG_PA_ADC          S3C64XX_PA_ADC
+#define SAMSUNG_PA_CFCON        S3C64XX_PA_CFCON
+#define SAMSUNG_PA_KEYPAD       S3C64XX_PA_KEYPAD
 
 #endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index 0114eb0c1fe7..05332b998ec0 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -34,6 +34,7 @@
 #define S3C_SCLK_GATE           S3C_CLKREG(0x38)
 #define S3C_MEM0_GATE           S3C_CLKREG(0x3C)
 #define S3C6410_CLK_SRC2        S3C_CLKREG(0x10C)
+#define S3C_MEM_SYS_CFG         S3C_CLKREG(0x120)
 
 /* CLKDIV0 */
 #define S3C6400_CLKDIV0_PCLK_MASK       (0xf << 12)
@@ -154,4 +155,8 @@
 #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT  (2)
 #define S3C6400_CLKSRC_MFC              (1 << 4)
 
+/* MEM_SYS_CFG */
+#define MEM_SYS_CFG_INDEP_CF            0x4000
+#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON   0x30
+
 #endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
index f56611526c63..a06ee0af9a4b 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
@@ -18,24 +18,4 @@
 
 #include <plat/regs-fb-v4.h>
 
-/* Palette registers */
-#define WIN2_PAL(_entry)                        (0x300 + ((_entry) * 2))
-#define WIN3_PAL(_entry)                        (0x320 + ((_entry) * 2))
-#define WIN4_PAL(_entry)                        (0x340 + ((_entry) * 2))
-#define WIN0_PAL(_entry)                        (0x400 + ((_entry) * 4))
-#define WIN1_PAL(_entry)                        (0x800 + ((_entry) * 4))
-
-static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
-{
-        switch (window) {
-        case 0: return WIN0_PAL(reg);
-        case 1: return WIN1_PAL(reg);
-        case 2: return WIN2_PAL(reg);
-        case 3: return WIN3_PAL(reg);
-        case 4: return WIN4_PAL(reg);
-        }
-
-        BUG();
-}
-
 #endif /* __ASM_ARCH_MACH_REGS_FB_H */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 4a0bb243d14a..742dc87bd9c1 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -134,7 +134,6 @@ static struct platform_device anw6410_lcd_powerdev = {
 static struct s3c_fb_pd_win anw6410_fb_win0 = {
         /* this is to ensure we use win0 */
         .win_mode       = {
-                .pixclock       = 41094,
                 .left_margin    = 8,
                 .right_margin   = 13,
                 .upper_margin   = 7,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 187441a78dd5..fba90229f0df 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -128,7 +128,6 @@ static struct platform_device hmt_backlight_device = {
 
 static struct s3c_fb_pd_win hmt_fb_win0 = {
         .win_mode       = {
-                .pixclock       = 41094,
                 .left_margin    = 8,
                 .right_margin   = 13,
                 .upper_margin   = 7,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 1d0326ead90f..a065062ec2a4 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -134,8 +134,6 @@ static struct platform_device smartq5_buttons_device  = {
 
 static struct s3c_fb_pd_win smartq5_fb_win0 = {
         .win_mode       = {
-                .pixclock       = 1000000000000ULL /
-                                ((40+1+216+800)*(10+1+35+480)*80),
                 .left_margin    = 40,
                 .right_margin   = 216,
                 .upper_margin   = 10,
@@ -144,6 +142,7 @@ static struct s3c_fb_pd_win smartq5_fb_win0 = {
                 .vsync_len      = 1,
                 .xres           = 800,
                 .yres           = 480,
+                .refresh        = 80,
         },
         .max_bpp        = 32,
         .default_bpp    = 16,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index e0bc78ecb156..0ecf45137546 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -150,8 +150,6 @@ static struct platform_device smartq7_buttons_device  = {
 
 static struct s3c_fb_pd_win smartq7_fb_win0 = {
         .win_mode       = {
-                .pixclock       = 1000000000000ULL /
-                                ((3+10+5+800)*(1+3+20+480)*80),
                 .left_margin    = 3,
                 .right_margin   = 5,
                 .upper_margin   = 1,
@@ -160,6 +158,7 @@ static struct s3c_fb_pd_win smartq7_fb_win0 = {
                 .vsync_len      = 3,
                 .xres           = 800,
                 .yres           = 480,
+                .refresh        = 80,
         },
         .max_bpp        = 32,
         .default_bpp    = 16,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index d9a03555f88b..2d43128f939f 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -17,6 +17,7 @@
 #include <linux/list.h>
 #include <linux/timer.h>
 #include <linux/init.h>
+#include <linux/input.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -56,6 +57,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-sys.h>
 #include <mach/regs-srom.h>
+#include <plat/ata.h>
 #include <plat/iic.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
@@ -66,6 +68,7 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/keypad.h>
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
@@ -141,7 +144,6 @@ static struct platform_device smdk6410_lcd_powerdev = {
 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
         /* this is to ensure we use win0 */
         .win_mode       = {
-                .pixclock       = 41094,
                 .left_margin    = 8,
                 .right_margin   = 13,
                 .upper_margin   = 7,
@@ -242,6 +244,29 @@ static struct platform_device smdk6410_b_pwr_5v = {
 };
 #endif
 
+static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
+        .setup_gpio     = s3c64xx_ide_setup_gpio,
+};
+
+static uint32_t smdk6410_keymap[] __initdata = {
+        /* KEY(row, col, keycode) */
+        KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
+        KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
+        KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
+        KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
+};
+
+static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
+        .keymap         = smdk6410_keymap,
+        .keymap_size    = ARRAY_SIZE(smdk6410_keymap),
+};
+
+static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
+        .keymap_data    = &smdk6410_keymap_data,
+        .rows           = 2,
+        .cols           = 8,
+};
+
 static struct map_desc smdk6410_iodesc[] = {};
 
 static struct platform_device *smdk6410_devices[] __initdata = {
@@ -257,6 +282,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
         &s3c_device_ohci,
         &s3c_device_usb_hsotg,
         &s3c64xx_device_iisv4,
+        &samsung_device_keypad,
 
 #ifdef CONFIG_REGULATOR
         &smdk6410_b_pwr_5v,
@@ -265,6 +291,8 @@ static struct platform_device *smdk6410_devices[] __initdata = {
 
         &smdk6410_smsc911x,
         &s3c_device_adc,
+        &s3c_device_cfcon,
+        &s3c_device_rtc,
         &s3c_device_ts,
         &s3c_device_wdt,
 };
@@ -636,6 +664,8 @@ static void __init smdk6410_machine_init(void)
         s3c_i2c1_set_platdata(NULL);
         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 
+        samsung_keypad_set_platdata(&smdk6410_keypad_data);
+
         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 
         /* configure nCS1 width to 16 bits */
@@ -665,6 +695,8 @@ static void __init smdk6410_machine_init(void)
         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 
+        s3c_ide_set_platdata(&smdk6410_ide_pdata);
+
         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 }
 
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 014401c39f36..312aa6b115e8 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -37,8 +37,9 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/sdhci.h>
+#include <plat/ata-core.h>
+#include <plat/adc-core.h>
 #include <plat/iic-core.h>
-#include <plat/adc.h>
 #include <plat/onenand-core.h>
 #include <mach/s3c6400.h>
 #include <mach/s3c6410.h>
@@ -54,10 +55,11 @@ void __init s3c6410_map_io(void)
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
 
-        s3c_device_adc.name     = "s3c64xx-adc";
+        s3c_adc_setname("s3c64xx-adc");
         s3c_device_nand.name = "s3c6400-nand";
         s3c_onenand_setname("s3c6410-onenand");
         s3c64xx_onenand1_setname("s3c6410-onenand");
+        s3c_cfcon_setname("s3c64xx-pata");
 }
 
 void __init s3c6410_init_clocks(int xtal)
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 8e28e448dd20..000736877df2 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -15,9 +15,9 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/fb.h>
+#include <linux/gpio.h>
 
 #include <mach/regs-fb.h>
-#include <mach/gpio.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index d1b11e6e77e8..406192a43c6e 100644
--- a/arch/arm/mach-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -14,10 +14,10 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/gpio.h>
 
 struct platform_device; /* don't need the contents */
 
-#include <mach/gpio.h>
 #include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index 2dce57d8c6f8..1ee62c97cd7f 100644
--- a/arch/arm/mach-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -14,10 +14,10 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/gpio.h>
 
 struct platform_device; /* don't need the contents */
 
-#include <mach/gpio.h>
 #include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c
new file mode 100644
index 000000000000..c12c315f33bc
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-ide.c
@@ -0,0 +1,46 @@
+/* linux/arch/arm/mach-s3c64xx/setup-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S3C64XX setup information for IDE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <plat/gpio-cfg.h>
+
+void s3c64xx_ide_setup_gpio(void)
+{
+        u32 reg;
+        u32 gpio = 0;
+
+        reg = readl(S3C_MEM_SYS_CFG) & (~0x3f);
+
+        /* Independent CF interface, CF chip select configuration */
+        writel(reg | MEM_SYS_CFG_INDEP_CF |
+                MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG);
+
+        s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4));
+
+        /* Set XhiDATA[15:0] pins as CF Data[15:0] */
+        for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++)
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5));
+
+        /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */
+        for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++)
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6));
+
+        /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */
+        s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1));
+        for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++)
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6));
+}
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c
new file mode 100644
index 000000000000..abc34e4e1a93
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-keypad.c
@@ -0,0 +1,34 @@
+/* linux/arch/arm/mach-s3c64xx/setup-keypad.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * GPIO configuration for S3C64XX KeyPad device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
+
+void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
+{
+        unsigned int gpio;
+        unsigned int end;
+
+        /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
+        end = S3C64XX_GPK(8 + rows);
+        for (gpio = S3C64XX_GPK(8); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
+        end = S3C64XX_GPL(0 + cols);
+        for (gpio = S3C64XX_GPL(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+}
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
index a58c0cc7ba5e..322359591374 100644
--- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
@@ -16,12 +16,14 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
-#include <mach/gpio.h>
 #include <plat/gpio-cfg.h>
+#include <plat/sdhci.h>
 
 void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
         unsigned int end;
 
@@ -33,12 +35,15 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
                 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
         }
 
-        s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2));
+        }
 }
 
 void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
         unsigned int end;
 
@@ -50,8 +55,10 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
                 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
         }
 
-        s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
+        }
 }
 
 void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
index f066fae07c57..6a4af7f57584 100644
--- a/arch/arm/mach-s5p6440/Kconfig
+++ b/arch/arm/mach-s5p6440/Kconfig
@@ -13,13 +13,20 @@ config CPU_S5P6440
         help
           Enable S5P6440 CPU support
 
+config S5P6440_SETUP_I2C1
+        bool
+        help
+          Common setup code for i2c bus 1.
+
 config MACH_SMDK6440
         bool "SMDK6440"
         select CPU_S5P6440
-        select SAMSUNG_DEV_TS
-        select SAMSUNG_DEV_ADC
+        select S3C_DEV_I2C1
+        select S3C_DEV_RTC
         select S3C_DEV_WDT
-        select HAVE_S3C2410_WATCHDOG
+        select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_TS
+        select S5P6440_SETUP_I2C1
         help
           Machine support for the Samsung SMDK6440
 
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
index be3c53aab23f..c3fe4d3662a9 100644
--- a/arch/arm/mach-s5p6440/Makefile
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_MACH_SMDK6440)	+= mach-smdk6440.o
 # device support
 obj-y                           += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
+obj-$(CONFIG_S5P6440_SETUP_I2C1)        += setup-i2c1.o
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
index b2fe6a58155a..526f33adb31d 100644
--- a/arch/arm/mach-s5p6440/cpu.c
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -37,6 +37,7 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/s5p6440.h>
+#include <plat/adc-core.h>
 
 static void s5p6440_idle(void)
 {
@@ -61,7 +62,7 @@ static void s5p6440_idle(void)
 void __init s5p6440_map_io(void)
 {
         /* initialize any device information early */
-        s3c_device_adc.name     = "s3c64xx-adc";
+        s3c_adc_setname("s3c64xx-adc");
 }
 
 void __init s5p6440_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c
index 0c5367962830..3ca0d2b8275d 100644
--- a/arch/arm/mach-s5p6440/dev-audio.c
+++ b/arch/arm/mach-s5p6440/dev-audio.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/audio.h>
 
-#include <mach/gpio.h>
 #include <mach/map.h>
 #include <mach/dma.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c
index 0a30280019c0..510af44d180c 100644
--- a/arch/arm/mach-s5p6440/dev-spi.c
+++ b/arch/arm/mach-s5p6440/dev-spi.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <mach/dma.h>
 #include <mach/map.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/spi-clocks.h>
 
 #include <plat/s3c64xx-spi.h>
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
index 92efc05b1ba2..8bf6e0ce51c9 100644
--- a/arch/arm/mach-s5p6440/gpio.c
+++ b/arch/arm/mach-s5p6440/gpio.c
@@ -13,9 +13,11 @@
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
+
 #include <mach/map.h>
-#include <mach/gpio.h>
 #include <mach/regs-gpio.h>
+
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h
index 911854d9ad42..16a761270de1 100644
--- a/arch/arm/mach-s5p6440/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6440/include/mach/irqs.h
@@ -51,7 +51,7 @@
 #define IRQ_DISPCON3            S5P_IRQ_VIC1(19)
 #define IRQ_FIMGVG              S5P_IRQ_VIC1(20)
 #define IRQ_EINT_GROUPS         S5P_IRQ_VIC1(21)
-#define IRQ_PMUIRQ              S5P_IRQ_VIC1(23)
+#define IRQ_PMU                 S5P_IRQ_VIC1(23)
 #define IRQ_HSMMC0              S5P_IRQ_VIC1(24)
 #define IRQ_HSMMC1              S5P_IRQ_VIC1(25)
 #define IRQ_HSMMC2              IRQ_SPI1        /* shared with SPI1 */
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 44011b91fbd1..6cc5cbc88ffb 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -38,7 +38,6 @@
 #define S5P_PA_TIMER            S5P6440_PA_TIMER
 
 #define S5P6440_PA_RTC          (0xEA100000)
-#define S5P_PA_RTC              S5P6440_PA_RTC
 
 #define S5P6440_PA_WDT          (0xEA200000)
 #define S5P_PA_WDT              S5P6440_PA_WDT
@@ -53,6 +52,7 @@
 #define S5P_SZ_UART             SZ_256
 
 #define S5P6440_PA_IIC0         (0xEC104000)
+#define S5P6440_PA_IIC1         (0xEC20F000)
 
 #define S5P6440_PA_SPI0         0xEC400000
 #define S5P6440_PA_SPI1         0xEC500000
@@ -77,6 +77,8 @@
 /* compatibiltiy defines. */
 #define S3C_PA_UART             S5P6440_PA_UART
 #define S3C_PA_IIC              S5P6440_PA_IIC0
+#define S3C_PA_RTC              S5P6440_PA_RTC
+#define S3C_PA_IIC1             S5P6440_PA_IIC1
 #define S3C_PA_WDT              S5P6440_PA_WDT
 
 #define SAMSUNG_PA_ADC          S5P6440_PA_ADC
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p6440/include/mach/system.h
index d2dd817da66a..a359ee3fa510 100644
--- a/arch/arm/mach-s5p6440/include/mach/system.h
+++ b/arch/arm/mach-s5p6440/include/mach/system.h
@@ -13,12 +13,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
+#include <plat/system-reset.h>
 
-static void arch_reset(char mode, const char *cmd)
+static void arch_idle(void)
 {
         /* nothing here yet */
 }
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
index 8291fecc701a..9202aaac3b56 100644
--- a/arch/arm/mach-s5p6440/mach-smdk6440.c
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -15,6 +15,7 @@
 #include <linux/timer.h>
 #include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/i2c.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -37,20 +38,21 @@
 #include <mach/regs-clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/iic.h>
 #include <plat/pll.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
 
-#define S5P6440_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define SMDK6440_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
                                 S3C2410_UCON_TXIRQMODE |        \
                                 S3C2410_UCON_RXIRQMODE |        \
                                 S3C2410_UCON_RXFIFO_TOI |       \
                                 S3C2443_UCON_RXERR_IRQEN)
 
-#define S5P6440_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define SMDK6440_ULCON_DEFAULT  S3C2410_LCON_CS8
 
-#define S5P6440_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+#define SMDK6440_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
                                 S3C2440_UFCON_TXTRIG16 |        \
                                 S3C2410_UFCON_RXTRIG8)
 
@@ -58,40 +60,51 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
                 .flags       = 0,
-                .ucon        = S5P6440_UCON_DEFAULT,
-                .ulcon       = S5P6440_ULCON_DEFAULT,
-                .ufcon       = S5P6440_UFCON_DEFAULT,
+                .ucon        = SMDK6440_UCON_DEFAULT,
+                .ulcon       = SMDK6440_ULCON_DEFAULT,
+                .ufcon       = SMDK6440_UFCON_DEFAULT,
         },
         [1] = {
                 .hwport      = 1,
                 .flags       = 0,
-                .ucon        = S5P6440_UCON_DEFAULT,
-                .ulcon       = S5P6440_ULCON_DEFAULT,
-                .ufcon       = S5P6440_UFCON_DEFAULT,
+                .ucon        = SMDK6440_UCON_DEFAULT,
+                .ulcon       = SMDK6440_ULCON_DEFAULT,
+                .ufcon       = SMDK6440_UFCON_DEFAULT,
         },
         [2] = {
                 .hwport      = 2,
                 .flags       = 0,
-                .ucon        = S5P6440_UCON_DEFAULT,
-                .ulcon       = S5P6440_ULCON_DEFAULT,
-                .ufcon       = S5P6440_UFCON_DEFAULT,
+                .ucon        = SMDK6440_UCON_DEFAULT,
+                .ulcon       = SMDK6440_ULCON_DEFAULT,
+                .ufcon       = SMDK6440_UFCON_DEFAULT,
         },
         [3] = {
                 .hwport      = 3,
                 .flags       = 0,
-                .ucon        = S5P6440_UCON_DEFAULT,
-                .ulcon       = S5P6440_ULCON_DEFAULT,
-                .ufcon       = S5P6440_UFCON_DEFAULT,
+                .ucon        = SMDK6440_UCON_DEFAULT,
+                .ulcon       = SMDK6440_ULCON_DEFAULT,
+                .ufcon       = SMDK6440_UFCON_DEFAULT,
         },
 };
 
 static struct platform_device *smdk6440_devices[] __initdata = {
         &s5p6440_device_iis,
         &s3c_device_adc,
+        &s3c_device_rtc,
+        &s3c_device_i2c0,
+        &s3c_device_i2c1,
         &s3c_device_ts,
         &s3c_device_wdt,
 };
 
+static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
+        { I2C_BOARD_INFO("24c08", 0x50), },
+};
+
+static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
+        /* To be populated */
+};
+
 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .delay                  = 10000,
         .presc                  = 49,
@@ -109,6 +122,14 @@ static void __init smdk6440_machine_init(void)
 {
         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 
+        /* I2C */
+        s3c_i2c0_set_platdata(NULL);
+        s3c_i2c1_set_platdata(NULL);
+        i2c_register_board_info(0, smdk6440_i2c_devs0,
+                        ARRAY_SIZE(smdk6440_i2c_devs0));
+        i2c_register_board_info(1, smdk6440_i2c_devs1,
+                        ARRAY_SIZE(smdk6440_i2c_devs1));
+
         platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
 }
 
diff --git a/arch/arm/mach-s5p6440/setup-i2c0.c b/arch/arm/mach-s5p6440/setup-i2c0.c
index 69e8a664aedb..2c99d14f7ac7 100644
--- a/arch/arm/mach-s5p6440/setup-i2c0.c
+++ b/arch/arm/mach-s5p6440/setup-i2c0.c
@@ -17,9 +17,14 @@
 
 struct platform_device; /* don't need the contents */
 
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
 #include <plat/iic.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
-        /* Will be populated later */
+        s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s5p6440/setup-i2c1.c b/arch/arm/mach-s5p6440/setup-i2c1.c
new file mode 100644
index 000000000000..9a1537f786e0
--- /dev/null
+++ b/arch/arm/mach-s5p6440/setup-i2c1.c
@@ -0,0 +1,30 @@
+/* linux/arch/arm/mach-s5p6440/setup-i2c1.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * I2C1 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/gpio.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <plat/gpio-cfg.h>
+#include <plat/iic.h>
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6));
+        s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
+        s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
index 0fd41b447915..0fda0a5df968 100644
--- a/arch/arm/mach-s5p6442/Kconfig
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -19,6 +19,7 @@ config CPU_S5P6442
 config MACH_SMDK6442
         bool "SMDK6442"
         select CPU_S5P6442
+        select S3C_DEV_WDT
         help
           Machine support for Samsung SMDK6442
 
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
index 087e57f20ad5..dcd20f17212a 100644
--- a/arch/arm/mach-s5p6442/clock.c
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -361,6 +361,12 @@ static struct clk init_clocks[] = {
                 .enable         = s5p6442_clk_ip3_ctrl,
                 .ctrlbit        = (1<<19),
         }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1 << 22),
+        }, {
                 .name           = "timers",
                 .id             = -1,
                 .parent         = &clk_pclkd1,
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
index cb801e1f5e23..7a4e34720b7b 100644
--- a/arch/arm/mach-s5p6442/dev-audio.c
+++ b/arch/arm/mach-s5p6442/dev-audio.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/audio.h>
 
-#include <mach/gpio.h>
 #include <mach/map.h>
 #include <mach/dma.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
index 30199525daca..e894651a88bd 100644
--- a/arch/arm/mach-s5p6442/dev-spi.c
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <mach/dma.h>
 #include <mach/map.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/spi-clocks.h>
 
 #include <plat/s3c64xx-spi.h>
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
index 02c23749c023..3fbc6c3ad2da 100644
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -32,7 +32,7 @@
 #define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
 
 /* VIC1 */
-#define IRQ_nPMUIRQ             S5P_IRQ_VIC1(0)
+#define IRQ_PMU                 S5P_IRQ_VIC1(0)
 #define IRQ_ONENAND             S5P_IRQ_VIC1(7)
 #define IRQ_UART0               S5P_IRQ_VIC1(10)
 #define IRQ_UART1               S5P_IRQ_VIC1(11)
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 32ca424ef7f9..281d256faafb 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -42,6 +42,8 @@
 
 #define S5P6442_PA_SYSTIMER     (0xEA100000)
 
+#define S5P6442_PA_WATCHDOG     (0xEA200000)
+
 #define S5P6442_PA_UART         (0xEC000000)
 
 #define S5P_PA_UART0            (S5P6442_PA_UART + 0x0)
@@ -65,6 +67,7 @@
 #define S5P6442_PA_PCM1         0xF2500000
 
 /* compatibiltiy defines. */
+#define S3C_PA_WDT              S5P6442_PA_WATCHDOG
 #define S3C_PA_UART             S5P6442_PA_UART
 #define S3C_PA_IIC              S5P6442_PA_IIC0
 
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
index 8bcd8ed0c3c3..c30c1cc1b97e 100644
--- a/arch/arm/mach-s5p6442/include/mach/system.h
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -13,12 +13,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
+#include <plat/system-reset.h>
 
-static void arch_reset(char mode, const char *cmd)
+static void arch_idle(void)
 {
         /* nothing here yet */
 }
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
index ebcf99777259..8d8d04272f85 100644
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -27,16 +27,16 @@
 #include <plat/cpu.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5P6442_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define SMDK6442_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
                                  S3C2410_UCON_TXIRQMODE |       \
                                  S3C2410_UCON_RXIRQMODE |       \
                                  S3C2410_UCON_RXFIFO_TOI |      \
                                  S3C2443_UCON_RXERR_IRQEN)
 
-#define S5P6442_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define SMDK6442_ULCON_DEFAULT  S3C2410_LCON_CS8
 
-#define S5P6442_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+#define SMDK6442_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
                                  S5PV210_UFCON_TXTRIG4 |        \
                                  S5PV210_UFCON_RXTRIG4)
 
@@ -44,28 +44,29 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
         [0] = {
                 .hwport         = 0,
                 .flags          = 0,
-                .ucon           = S5P6442_UCON_DEFAULT,
-                .ulcon          = S5P6442_ULCON_DEFAULT,
-                .ufcon          = S5P6442_UFCON_DEFAULT,
+                .ucon           = SMDK6442_UCON_DEFAULT,
+                .ulcon          = SMDK6442_ULCON_DEFAULT,
+                .ufcon          = SMDK6442_UFCON_DEFAULT,
         },
         [1] = {
                 .hwport         = 1,
                 .flags          = 0,
-                .ucon           = S5P6442_UCON_DEFAULT,
-                .ulcon          = S5P6442_ULCON_DEFAULT,
-                .ufcon          = S5P6442_UFCON_DEFAULT,
+                .ucon           = SMDK6442_UCON_DEFAULT,
+                .ulcon          = SMDK6442_ULCON_DEFAULT,
+                .ufcon          = SMDK6442_UFCON_DEFAULT,
         },
         [2] = {
                 .hwport         = 2,
                 .flags          = 0,
-                .ucon           = S5P6442_UCON_DEFAULT,
-                .ulcon          = S5P6442_ULCON_DEFAULT,
-                .ufcon          = S5P6442_UFCON_DEFAULT,
+                .ucon           = SMDK6442_UCON_DEFAULT,
+                .ulcon          = SMDK6442_ULCON_DEFAULT,
+                .ufcon          = SMDK6442_UFCON_DEFAULT,
         },
 };
 
 static struct platform_device *smdk6442_devices[] __initdata = {
         &s5p6442_device_iis0,
+        &s3c_device_wdt,
 };
 
 static void __init smdk6442_map_io(void)
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index b2a11dfa3399..77ae4bfb74ba 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -25,6 +25,16 @@ config S5PC100_SETUP_I2C1
         help
           Common setup code for i2c bus 1.
 
+config S5PC100_SETUP_IDE
+        bool
+        help
+          Common setup code for S5PC100 IDE GPIO configurations
+
+config S5PC100_SETUP_KEYPAD
+        bool
+        help
+          Common setup code for KEYPAD GPIO configurations.
+
 config S5PC100_SETUP_SDHCI
         bool
         select S5PC100_SETUP_SDHCI_GPIO
@@ -40,13 +50,24 @@ config MACH_SMDKC100
         bool "SMDKC100"
         select CPU_S5PC100
         select S3C_DEV_FB
-        select S3C_DEV_I2C1
         select S3C_DEV_HSMMC
         select S3C_DEV_HSMMC1
         select S3C_DEV_HSMMC2
+        select S3C_DEV_I2C1
+        select S3C_DEV_RTC
+        select S3C_DEV_WDT
+        select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_IDE
+        select SAMSUNG_DEV_KEYPAD
+        select SAMSUNG_DEV_TS
         select S5PC100_SETUP_FB_24BPP
         select S5PC100_SETUP_I2C1
+        select S5PC100_SETUP_IDE
+        select S5PC100_SETUP_KEYPAD
         select S5PC100_SETUP_SDHCI
+        select S5P_DEV_FIMC0
+        select S5P_DEV_FIMC1
+        select S5P_DEV_FIMC2
         help
           Machine support for the Samsung SMDKC100
 
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 543f3de5131e..a021ed1fb4b6 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -19,6 +19,8 @@ obj-$(CONFIG_CPU_S5PC100)	+= dma.o
 
 obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)    += setup-fb-24bpp.o
 obj-$(CONFIG_S5PC100_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PC100_SETUP_IDE)         += setup-ide.o
+obj-$(CONFIG_S5PC100_SETUP_KEYPAD)      += setup-keypad.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
 
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index e3fed4cfe7ad..084abd13b0a5 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -737,7 +737,7 @@ static struct clk init_clocks_disable[] = {
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
-                .name           = "keyif",
+                .name           = "keypad",
                 .id             = -1,
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_5_ctrl,
@@ -1078,7 +1078,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "mmc_bus",
+                        .name           = "sclk_mmc",
                         .id             = 0,
                         .ctrlbit        = (1 << 12),
                         .enable         = s5pc100_sclk1_ctrl,
@@ -1089,7 +1089,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "mmc_bus",
+                        .name           = "sclk_mmc",
                         .id             = 1,
                         .ctrlbit        = (1 << 13),
                         .enable         = s5pc100_sclk1_ctrl,
@@ -1100,7 +1100,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "mmc_bus",
+                        .name           = "sclk_mmc",
                         .id             = 2,
                         .ctrlbit        = (1 << 14),
                         .enable         = s5pc100_sclk1_ctrl,
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
index 7b5bdbc9a5df..251c92ac5b22 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/cpu.c
@@ -38,9 +38,12 @@
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
+#include <plat/ata-core.h>
 #include <plat/iic-core.h>
 #include <plat/sdhci.h>
+#include <plat/adc-core.h>
 #include <plat/onenand-core.h>
+#include <plat/fb-core.h>
 
 #include <plat/s5pc100.h>
 
@@ -87,11 +90,15 @@ void __init s5pc100_map_io(void)
         s5pc100_default_sdhci1();
         s5pc100_default_sdhci2();
 
+        s3c_adc_setname("s3c64xx-adc");
+
         /* the i2c devices are directly compatible with s3c2440 */
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
 
         s3c_onenand_setname("s5pc100-onenand");
+        s3c_fb_setname("s5pc100-fb");
+        s3c_cfcon_setname("s5pc100-pata");
 }
 
 void __init s5pc100_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c
index 18cfe9ae1936..a699ed6acc23 100644
--- a/arch/arm/mach-s5pc100/dev-audio.c
+++ b/arch/arm/mach-s5pc100/dev-audio.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/audio.h>
 
-#include <mach/gpio.h>
 #include <mach/map.h>
 #include <mach/dma.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index 14618c346057..a0ef7c302c16 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -10,10 +10,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <mach/dma.h>
 #include <mach/map.h>
-#include <mach/gpio.h>
 #include <mach/spi-clocks.h>
 
 #include <plat/s3c64xx-spi.h>
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 28aa551dc3a8..06513e647242 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -29,7 +29,7 @@
 #define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
 
 /* VIC1: ARM, power, memory, connectivity */
-#define IRQ_CORTEX0             S5P_IRQ_VIC1(0)
+#define IRQ_PMU                 S5P_IRQ_VIC1(0)
 #define IRQ_CORTEX1             S5P_IRQ_VIC1(1)
 #define IRQ_CORTEX2             S5P_IRQ_VIC1(2)
 #define IRQ_CORTEX3             S5P_IRQ_VIC1(3)
@@ -38,7 +38,7 @@
 #define IRQ_IEMIEC              S5P_IRQ_VIC1(6)
 #define IRQ_ONENAND             S5P_IRQ_VIC1(7)
 #define IRQ_NFC                 S5P_IRQ_VIC1(8)
-#define IRQ_CFC                 S5P_IRQ_VIC1(9)
+#define IRQ_CFCON               S5P_IRQ_VIC1(9)
 #define IRQ_UART0               S5P_IRQ_VIC1(10)
 #define IRQ_UART1               S5P_IRQ_VIC1(11)
 #define IRQ_UART2               S5P_IRQ_VIC1(12)
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index cadae4305688..01b9134feff0 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -61,6 +61,8 @@
 
 #define S5PC100_PA_ONENAND      (0xE7100000)
 
+#define S5PC100_PA_CFCON        (0xE7800000)
+
 /* DMA */
 #define S5PC100_PA_MDMA         (0xE8100000)
 #define S5PC100_PA_PDMA0        (0xE9000000)
@@ -72,6 +74,9 @@
 
 #define S5PC100_PA_SYSTIMER     (0xEA100000)
 
+#define S5PC100_PA_WATCHDOG     (0xEA200000)
+#define S5PC100_PA_RTC          (0xEA300000)
+
 #define S5PC100_PA_UART         (0xEC000000)
 
 #define S5P_PA_UART0            (S5PC100_PA_UART + 0x0)
@@ -94,6 +99,10 @@
 
 #define S5PC100_PA_FB           (0xEE000000)
 
+#define S5PC100_PA_FIMC0        (0xEE200000)
+#define S5PC100_PA_FIMC1        (0xEE300000)
+#define S5PC100_PA_FIMC2        (0xEE400000)
+
 #define S5PC100_PA_I2S0         (0xF2000000)
 #define S5PC100_PA_I2S1         (0xF2100000)
 #define S5PC100_PA_I2S2         (0xF2200000)
@@ -104,6 +113,8 @@
 #define S5PC100_PA_PCM0         0xF2400000
 #define S5PC100_PA_PCM1         0xF2500000
 
+#define S5PC100_PA_TSADC        (0xF3000000)
+
 /* KEYPAD */
 #define S5PC100_PA_KEYPAD       (0xF3100000)
 
@@ -130,9 +141,19 @@
 #define S3C_PA_HSMMC1           S5PC100_PA_HSMMC(1)
 #define S3C_PA_HSMMC2           S5PC100_PA_HSMMC(2)
 #define S3C_PA_KEYPAD           S5PC100_PA_KEYPAD
+#define S3C_PA_WDT              S5PC100_PA_WATCHDOG
 #define S3C_PA_TSADC            S5PC100_PA_TSADC
 #define S3C_PA_ONENAND          S5PC100_PA_ONENAND
 #define S3C_PA_ONENAND_BUF      S5PC100_PA_ONENAND_BUF
 #define S3C_SZ_ONENAND_BUF      S5PC100_SZ_ONENAND_BUF
+#define S3C_PA_RTC              S5PC100_PA_RTC
+
+#define SAMSUNG_PA_ADC          S5PC100_PA_TSADC
+#define SAMSUNG_PA_CFCON        S5PC100_PA_CFCON
+#define SAMSUNG_PA_KEYPAD       S5PC100_PA_KEYPAD
+
+#define S5P_PA_FIMC0            S5PC100_PA_FIMC0
+#define S5P_PA_FIMC1            S5PC100_PA_FIMC1
+#define S5P_PA_FIMC2            S5PC100_PA_FIMC2
 
 #endif /* __ASM_ARCH_C100_MAP_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
index 5d27d286d504..bc92da2e0ba2 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
@@ -71,7 +71,10 @@
 #define S5P_CLKDIV1_PCLKD1_SHIFT        (16)
 
 #define S5PC100_SWRESET         S5PC100_REG_OTHERS(0x000)
+#define S5PC100_MEM_SYS_CFG     S5PC100_REG_OTHERS(0x200)
 
 #define S5PC100_SWRESET_RESETVAL        0xc100
 
+#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON   0x30
+
 #endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
index 1732cd28c765..4be4cc9abf75 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
@@ -100,40 +100,6 @@
 #define BLENDCON                                        (0x260)
 #define BLENDCON_8BIT_ALPHA                             (1 << 0)
 
-/* Per-window palette base addresses (start of palette memory).
- * Each window palette area consists of 256 32-bit entries.
- * START is the first address (entry 0th), END is the address of 255th entry.
- */
-#define WIN0_PAL_BASE                                   (0x2400)
-#define WIN0_PAL_END                                    (0x27fc)
-#define WIN1_PAL_BASE                                   (0x2800)
-#define WIN1_PAL_END                                    (0x2bfc)
-#define WIN2_PAL_BASE                                   (0x2c00)
-#define WIN2_PAL_END                                    (0x2ffc)
-#define WIN3_PAL_BASE                                   (0x3000)
-#define WIN3_PAL_END                                    (0x33fc)
-#define WIN4_PAL_BASE                                   (0x3400)
-#define WIN4_PAL_END                                    (0x37fc)
-
-#define WIN0_PAL(_entry)                        (WIN0_PAL_BASE + ((_entry) * 4))
-#define WIN1_PAL(_entry)                        (WIN1_PAL_BASE + ((_entry) * 4))
-#define WIN2_PAL(_entry)                        (WIN2_PAL_BASE + ((_entry) * 4))
-#define WIN3_PAL(_entry)                        (WIN3_PAL_BASE + ((_entry) * 4))
-#define WIN4_PAL(_entry)                        (WIN4_PAL_BASE + ((_entry) * 4))
-
-static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
-{
-        switch (window) {
-        case 0: return WIN0_PAL(reg);
-        case 1: return WIN1_PAL(reg);
-        case 2: return WIN2_PAL(reg);
-        case 3: return WIN3_PAL(reg);
-        case 4: return WIN4_PAL(reg);
-        }
-
-        BUG();
-}
-
 
 #endif /* __ASM_ARCH_REGS_FB_H */
 
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index 681f626a9ae1..a9ea57c06600 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,18 +11,11 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <linux/io.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
+#include <plat/system-reset.h>
 
 static void arch_idle(void)
 {
         /* nothing here yet */
 }
 
-static void arch_reset(char mode, const char *cmd)
-{
-        __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET);
-        return;
-}
 #endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index af22f8202a07..020c3f98f81f 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -22,6 +22,7 @@
 #include <linux/i2c.h>
 #include <linux/fb.h>
 #include <linux/delay.h>
+#include <linux/input.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -42,18 +43,22 @@
 #include <plat/s5pc100.h>
 #include <plat/fb.h>
 #include <plat/iic.h>
+#include <plat/ata.h>
+#include <plat/adc.h>
+#include <plat/keypad.h>
+#include <plat/ts.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PC100_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define SMDKC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
                                  S3C2410_UCON_TXIRQMODE |       \
                                  S3C2410_UCON_RXIRQMODE |       \
                                  S3C2410_UCON_RXFIFO_TOI |      \
                                  S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PC100_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define SMDKC100_ULCON_DEFAULT  S3C2410_LCON_CS8
 
-#define S5PC100_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKC100_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
                                  S3C2440_UFCON_RXTRIG8 |        \
                                  S3C2440_UFCON_TXTRIG16)
 
@@ -61,30 +66,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
                 .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
         },
         [1] = {
                 .hwport      = 1,
                 .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
         },
         [2] = {
                 .hwport      = 2,
                 .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
         },
         [3] = {
                 .hwport      = 3,
                 .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
         },
 };
 
@@ -128,7 +133,6 @@ static struct platform_device smdkc100_lcd_powerdev = {
 static struct s3c_fb_pd_win smdkc100_fb_win0 = {
         /* this is to ensure we use win0 */
         .win_mode       = {
-                .pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80),
                 .left_margin    = 8,
                 .right_margin   = 13,
                 .upper_margin   = 7,
@@ -137,6 +141,7 @@ static struct s3c_fb_pd_win smdkc100_fb_win0 = {
                 .vsync_len      = 1,
                 .xres           = 800,
                 .yres           = 480,
+                .refresh        = 80,
         },
         .max_bpp        = 32,
         .default_bpp    = 16,
@@ -149,16 +154,54 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = {
         .setup_gpio     = s5pc100_fb_gpio_setup_24bpp,
 };
 
+static struct s3c_ide_platdata smdkc100_ide_pdata __initdata = {
+        .setup_gpio     = s5pc100_ide_setup_gpio,
+};
+
+static uint32_t smdkc100_keymap[] __initdata = {
+        /* KEY(row, col, keycode) */
+        KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
+        KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
+        KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
+        KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
+};
+
+static struct matrix_keymap_data smdkc100_keymap_data __initdata = {
+        .keymap         = smdkc100_keymap,
+        .keymap_size    = ARRAY_SIZE(smdkc100_keymap),
+};
+
+static struct samsung_keypad_platdata smdkc100_keypad_data __initdata = {
+        .keymap_data    = &smdkc100_keymap_data,
+        .rows           = 2,
+        .cols           = 8,
+};
+
 static struct platform_device *smdkc100_devices[] __initdata = {
+        &s3c_device_adc,
+        &s3c_device_cfcon,
         &s3c_device_i2c0,
         &s3c_device_i2c1,
         &s3c_device_fb,
         &s3c_device_hsmmc0,
         &s3c_device_hsmmc1,
         &s3c_device_hsmmc2,
+        &s3c_device_ts,
+        &s3c_device_wdt,
         &smdkc100_lcd_powerdev,
         &s5pc100_device_iis0,
+        &samsung_device_keypad,
         &s5pc100_device_ac97,
+        &s3c_device_rtc,
+        &s5p_device_fimc0,
+        &s5p_device_fimc1,
+        &s5p_device_fimc2,
+};
+
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+        .delay                  = 10000,
+        .presc                  = 49,
+        .oversampling_shift     = 2,
 };
 
 static void __init smdkc100_map_io(void)
@@ -170,6 +213,8 @@ static void __init smdkc100_map_io(void)
 
 static void __init smdkc100_machine_init(void)
 {
+        s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
         /* I2C */
         s3c_i2c0_set_platdata(NULL);
         s3c_i2c1_set_platdata(NULL);
@@ -177,6 +222,9 @@ static void __init smdkc100_machine_init(void)
         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 
         s3c_fb_set_platdata(&smdkc100_lcd_pdata);
+        s3c_ide_set_platdata(&smdkc100_ide_pdata);
+
+        samsung_keypad_set_platdata(&smdkc100_keypad_data);
 
         /* LCD init */
         gpio_request(S5PC100_GPD(0), "GPD");
diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c
new file mode 100644
index 000000000000..83575671fb59
--- /dev/null
+++ b/arch/arm/mach-s5pc100/setup-ide.c
@@ -0,0 +1,70 @@
+/* linux/arch/arm/mach-s5pc100/setup-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * S5PC100 setup information for IDE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <mach/regs-clock.h>
+#include <plat/gpio-cfg.h>
+
+void s5pc100_ide_setup_gpio(void)
+{
+        u32 reg;
+        u32 gpio = 0;
+
+        /* Independent CF interface, CF chip select configuration */
+        reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f);
+        writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG);
+
+        /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
+        for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        /*CF_Data[0 - 7] */
+        for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        /* CF_Data[8 - 15] */
+        for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
+        for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        /* EBI_OE, EBI_WE */
+        for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++)
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
+
+        /* CF_OE, CF_WE */
+        for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        /* CF_CD */
+        s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PC100_GPK3(5), S3C_GPIO_PULL_NONE);
+}
diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c
new file mode 100644
index 000000000000..d0837a72a58e
--- /dev/null
+++ b/arch/arm/mach-s5pc100/setup-keypad.c
@@ -0,0 +1,34 @@
+/* linux/arch/arm/mach-s5pc100/setup-keypad.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * GPIO configuration for S5PC100 KeyPad device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
+
+void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
+{
+        unsigned int gpio;
+        unsigned int end;
+
+        /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
+        end = S5PC100_GPH3(rows);
+        for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
+        end = S5PC100_GPH2(cols);
+        for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+}
diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
index 7769c760c9ef..dc7208c639ea 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
@@ -20,9 +20,11 @@
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
+#include <plat/sdhci.h>
 
 void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
         unsigned int end;
         unsigned int num;
@@ -47,12 +49,15 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
                 }
         }
 
-        s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2));
+        }
 }
 
 void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
         unsigned int end;
 
@@ -64,12 +69,15 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
                 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
         }
 
-        s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S5PC100_GPG2(6), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PC100_GPG2(6), S3C_GPIO_SFN(2));
+        }
 }
 
 void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
         unsigned int end;
 
@@ -81,6 +89,8 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
                 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
         }
 
-        s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S5PC100_GPG3(6), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PC100_GPG3(6), S3C_GPIO_SFN(2));
+        }
 }
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index ea7ff19adb95..f16946e456e9 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -26,10 +26,10 @@
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pc100_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",
-        [1] = "hsmmc",
-        /* [2] = "mmc_bus", not yet successfully used yet */
-        /* [3] = "48m", - note not successfully used yet */
+        [0] = "hsmmc",          /* HCLK */
+        /* [1] = "hsmmc",       - duplicate HCLK entry */
+        [2] = "sclk_mmc",       /* mmc_bus */
+        /* [3] = "48m",         - note not successfully used yet */
 };
 
 
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 0761eac9aaea..d3a38955c741 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -27,11 +27,21 @@ config S5PV210_SETUP_I2C2
         help
           Common setup code for i2c bus 2.
 
+config S5PV210_SETUP_IDE
+        bool
+        help
+          Common setup code for S5PV210 IDE GPIO configurations
+
 config S5PV210_SETUP_FB_24BPP
         bool
         help
           Common setup code for S5PV210 with an 24bpp RGB display helper.
 
+config S5PV210_SETUP_KEYPAD
+        bool
+        help
+          Common setup code for keypad.
+
 config S5PV210_SETUP_SDHCI
         bool
         select S5PV210_SETUP_SDHCI_GPIO
@@ -43,14 +53,27 @@ config S5PV210_SETUP_SDHCI_GPIO
         help
           Common setup code for SDHCI gpio.
 
-# machine support
+config S5PC110_DEV_ONENAND
+        bool
+        help
+          Compile in platform device definition for OneNAND1 controller
+
+menu "S5PC110 Machines"
 
 config MACH_AQUILA
-        bool "Samsung Aquila"
+        bool "Aquila"
         select CPU_S5PV210
         select ARCH_SPARSEMEM_ENABLE
-        select S5PV210_SETUP_FB_24BPP
         select S3C_DEV_FB
+        select S5P_DEV_FIMC0
+        select S5P_DEV_FIMC1
+        select S5P_DEV_FIMC2
+        select S3C_DEV_HSMMC
+        select S3C_DEV_HSMMC1
+        select S3C_DEV_HSMMC2
+        select S5PC110_DEV_ONENAND
+        select S5PV210_SETUP_FB_24BPP
+        select S5PV210_SETUP_SDHCI
         help
           Machine support for the Samsung Aquila target based on S5PC110 SoC
 
@@ -58,34 +81,64 @@ config MACH_GONI
         bool "GONI"
         select CPU_S5PV210
         select ARCH_SPARSEMEM_ENABLE
+        select S3C_DEV_FB
+        select S5P_DEV_FIMC0
+        select S5P_DEV_FIMC1
+        select S5P_DEV_FIMC2
+        select S3C_DEV_HSMMC
+        select S3C_DEV_HSMMC1
+        select S3C_DEV_HSMMC2
+        select S5PC110_DEV_ONENAND
+        select S5PV210_SETUP_FB_24BPP
+        select S5PV210_SETUP_SDHCI
         help
           Machine support for Samsung GONI board
           S5PC110(MCP) is one of package option of S5PV210
 
-config S5PC110_DEV_ONENAND
-        bool
+config MACH_SMDKC110
+        bool "SMDKC110"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        select S3C_DEV_I2C1
+        select S3C_DEV_I2C2
+        select S3C_DEV_RTC
+        select S3C_DEV_WDT
+        select SAMSUNG_DEV_IDE
+        select S5PV210_SETUP_I2C1
+        select S5PV210_SETUP_I2C2
+        select S5PV210_SETUP_IDE
         help
-          Compile in platform device definition for OneNAND1 controller
+          Machine support for Samsung SMDKC110
+          S5PC110(MCP) is one of package option of S5PV210
+
+endmenu
+
+menu "S5PV210 Machines"
 
 config MACH_SMDKV210
         bool "SMDKV210"
         select CPU_S5PV210
         select ARCH_SPARSEMEM_ENABLE
+        select S3C_DEV_HSMMC
+        select S3C_DEV_HSMMC1
+        select S3C_DEV_HSMMC2
+        select S3C_DEV_HSMMC3
+        select S3C_DEV_I2C1
+        select S3C_DEV_I2C2
+        select S3C_DEV_RTC
+        select S3C_DEV_WDT
         select SAMSUNG_DEV_ADC
+        select SAMSUNG_DEV_IDE
+        select SAMSUNG_DEV_KEYPAD
         select SAMSUNG_DEV_TS
-        select S3C_DEV_WDT
-        select HAVE_S3C2410_WATCHDOG
+        select S5PV210_SETUP_I2C1
+        select S5PV210_SETUP_I2C2
+        select S5PV210_SETUP_IDE
+        select S5PV210_SETUP_KEYPAD
+        select S5PV210_SETUP_SDHCI
         help
           Machine support for Samsung SMDKV210
 
-config MACH_SMDKC110
-        bool "SMDKC110"
-        select CPU_S5PV210
-        select ARCH_SPARSEMEM_ENABLE
-        select S3C_DEV_WDT
-        select HAVE_S3C2410_WATCHDOG
-        help
-          Machine support for Samsung SMDKC110
-          S5PC110(MCP) is one of package option of S5PV210
+endmenu
 
 endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 30be9a6a4620..05048c5aa4c6 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -31,5 +31,7 @@ obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o
 obj-$(CONFIG_S5PV210_SETUP_FB_24BPP)    += setup-fb-24bpp.o
 obj-$(CONFIG_S5PV210_SETUP_I2C1)        += setup-i2c1.o
 obj-$(CONFIG_S5PV210_SETUP_I2C2)        += setup-i2c2.o
+obj-$(CONFIG_S5PV210_SETUP_IDE)         += setup-ide.o
+obj-$(CONFIG_S5PV210_SETUP_KEYPAD)      += setup-keypad.o
 obj-$(CONFIG_S5PV210_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 411a4a9cbfc7..b9f4d677cf55 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -31,9 +31,15 @@
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
+#include <plat/fb-core.h>
 #include <plat/s5pv210.h>
+#include <plat/adc-core.h>
+#include <plat/ata-core.h>
+#include <plat/fimc-core.h>
 #include <plat/iic-core.h>
+#include <plat/keypad-core.h>
 #include <plat/sdhci.h>
+#include <plat/reset.h>
 
 /* Initial IO mappings */
 
@@ -69,6 +75,11 @@ static void s5pv210_idle(void)
         local_irq_enable();
 }
 
+static void s5pv210_sw_reset(void)
+{
+        __raw_writel(0x1, S5P_SWRESET);
+}
+
 /* s5pv210_map_io
  *
  * register the standard cpu IO areas
@@ -76,21 +87,31 @@ static void s5pv210_idle(void)
 
 void __init s5pv210_map_io(void)
 {
-#ifdef CONFIG_S3C_DEV_ADC
-        s3c_device_adc.name     = "s3c64xx-adc";
-#endif
-
         iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
 
         /* initialise device information early */
         s5pv210_default_sdhci0();
         s5pv210_default_sdhci1();
         s5pv210_default_sdhci2();
+        s5pv210_default_sdhci3();
+
+        s3c_adc_setname("s3c64xx-adc");
+
+        s3c_cfcon_setname("s5pv210-pata");
+
+        s3c_fimc_setname(0, "s5pv210-fimc");
+        s3c_fimc_setname(1, "s5pv210-fimc");
+        s3c_fimc_setname(2, "s5pv210-fimc");
 
         /* the i2c devices are directly compatible with s3c2440 */
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
         s3c_i2c2_setname("s3c2440-i2c");
+
+        s3c_fb_setname("s5pv210-fb");
+
+        /* Use s5pv210-keypad instead of samsung-keypad */
+        samsung_keypad_setname("s5pv210-keypad");
 }
 
 void __init s5pv210_init_clocks(int xtal)
@@ -138,5 +159,8 @@ int __init s5pv210_init(void)
         /* set idle function */
         pm_idle = s5pv210_idle;
 
+        /* set sw_reset function */
+        s5p_reset_hook = s5pv210_sw_reset;
+
         return sysdev_register(&s5pv210_sysdev);
 }
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
index 6e215330a1be..21dc6cf955c3 100644
--- a/arch/arm/mach-s5pv210/dev-audio.c
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <plat/gpio-cfg.h>
 #include <plat/audio.h>
 
-#include <mach/gpio.h>
 #include <mach/map.h>
 #include <mach/dma.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c
index 34997b752f93..f8ede33ee82b 100644
--- a/arch/arm/mach-s5pv210/dev-onenand.c
+++ b/arch/arm/mach-s5pv210/dev-onenand.c
@@ -27,9 +27,14 @@ static struct resource s5pc110_onenand_resources[] = {
         },
         [1] = {
                 .start  = S5PC110_PA_ONENAND_DMA,
-                .end    = S5PC110_PA_ONENAND_DMA + SZ_2K - 1,
+                .end    = S5PC110_PA_ONENAND_DMA + SZ_8K - 1,
                 .flags  = IORESOURCE_MEM,
         },
+        [2] = {
+                .start  = IRQ_ONENAND_AUDI,
+                .end    = IRQ_ONENAND_AUDI,
+                .flags  = IORESOURCE_IRQ,
+        },
 };
 
 struct platform_device s5pc110_device_onenand = {
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index 337a62b57a0b..826cdbc43e20 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -10,11 +10,11 @@
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <mach/dma.h>
 #include <mach/map.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/spi-clocks.h>
 
 #include <plat/s3c64xx-spi.h>
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 9ea8972e023d..0d459112d039 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -207,6 +207,20 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
                         .label  = "MP03",
                 },
         }, {
+                .config = &gpio_cfg_noint,
+                .chip   = {
+                        .base   = S5PV210_MP04(0),
+                        .ngpio  = S5PV210_GPIO_MP04_NR,
+                        .label  = "MP04",
+                },
+        }, {
+                .config = &gpio_cfg_noint,
+                .chip   = {
+                        .base   = S5PV210_MP05(0),
+                        .ngpio  = S5PV210_GPIO_MP05_NR,
+                        .label  = "MP05",
+                },
+        }, {
                 .base   = (S5P_VA_GPIO + 0xC00),
                 .config = &gpio_cfg_noint,
                 .chip   = {
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index d6461ba2b71d..1f4b595534c2 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -52,6 +52,8 @@
 #define S5PV210_GPIO_MP01_NR    (8)
 #define S5PV210_GPIO_MP02_NR    (4)
 #define S5PV210_GPIO_MP03_NR    (8)
+#define S5PV210_GPIO_MP04_NR    (8)
+#define S5PV210_GPIO_MP05_NR    (8)
 
 /* GPIO bank numbers */
 
@@ -94,6 +96,8 @@ enum s5p_gpio_number {
         S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
         S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
         S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
+        S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03),
+        S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04),
 };
 
 /* S5PV210 GPIO number definitions */
@@ -127,13 +131,15 @@ enum s5p_gpio_number {
 #define S5PV210_MP01(_nr)       (S5PV210_GPIO_MP01_START + (_nr))
 #define S5PV210_MP02(_nr)       (S5PV210_GPIO_MP02_START + (_nr))
 #define S5PV210_MP03(_nr)       (S5PV210_GPIO_MP03_START + (_nr))
+#define S5PV210_MP04(_nr)       (S5PV210_GPIO_MP04_START + (_nr))
+#define S5PV210_MP05(_nr)       (S5PV210_GPIO_MP05_START + (_nr))
 
 /* the end of the S5PV210 specific gpios */
-#define S5PV210_GPIO_END        (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1)
+#define S5PV210_GPIO_END        (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1)
 #define S3C_GPIO_END            S5PV210_GPIO_END
 
-/* define the number of gpios we need to the one after the MP03() range */
-#define ARCH_NR_GPIOS           (S5PV210_MP03(S5PV210_GPIO_MP03_NR) +   \
+/* define the number of gpios we need to the one after the MP05() range */
+#define ARCH_NR_GPIOS           (S5PV210_MP05(S5PV210_GPIO_MP05_NR) +   \
                                  CONFIG_SAMSUNG_GPIO_EXTRA + 1)
 
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 96895378ea27..e1c020e5a49b 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -36,7 +36,7 @@
 
 /* VIC1: ARM, Power, Memory, Connectivity, Storage */
 
-#define IRQ_CORTEX0             S5P_IRQ_VIC1(0)
+#define IRQ_PMU                 S5P_IRQ_VIC1(0)
 #define IRQ_CORTEX1             S5P_IRQ_VIC1(1)
 #define IRQ_CORTEX2             S5P_IRQ_VIC1(2)
 #define IRQ_CORTEX3             S5P_IRQ_VIC1(3)
@@ -45,7 +45,7 @@
 #define IRQ_IEMIEC              S5P_IRQ_VIC1(6)
 #define IRQ_ONENAND             S5P_IRQ_VIC1(7)
 #define IRQ_NFC                 S5P_IRQ_VIC1(8)
-#define IRQ_CFC                 S5P_IRQ_VIC1(9)
+#define IRQ_CFCON               S5P_IRQ_VIC1(9)
 #define IRQ_UART0               S5P_IRQ_VIC1(10)
 #define IRQ_UART1               S5P_IRQ_VIC1(11)
 #define IRQ_UART2               S5P_IRQ_VIC1(12)
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 34eb168ec950..dd4fb6bf14b5 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -32,6 +32,8 @@
 #define S5PV210_PA_SPI0         0xE1300000
 #define S5PV210_PA_SPI1         0xE1400000
 
+#define S5PV210_PA_KEYPAD       (0xE1600000)
+
 #define S5PV210_PA_IIC0         (0xE1800000)
 #define S5PV210_PA_IIC1         (0xFAB00000)
 #define S5PV210_PA_IIC2         (0xE1A00000)
@@ -43,6 +45,7 @@
 
 #define S5PV210_PA_WATCHDOG     (0xE2700000)
 
+#define S5PV210_PA_RTC          (0xE2800000)
 #define S5PV210_PA_UART         (0xE2900000)
 
 #define S5P_PA_UART0            (S5PV210_PA_UART + 0x0)
@@ -54,12 +57,18 @@
 
 #define S5PV210_PA_SROMC        (0xE8000000)
 
+#define S5PV210_PA_CFCON        (0xE8200000)
+
 #define S5PV210_PA_MDMA         0xFA200000
 #define S5PV210_PA_PDMA0        0xE0900000
 #define S5PV210_PA_PDMA1        0xE0A00000
 
 #define S5PV210_PA_FB           (0xF8000000)
 
+#define S5PV210_PA_FIMC0        (0xFB200000)
+#define S5PV210_PA_FIMC1        (0xFB300000)
+#define S5PV210_PA_FIMC2        (0xFB400000)
+
 #define S5PV210_PA_HSMMC(x)     (0xEB000000 + ((x) * 0x100000))
 
 #define S5PV210_PA_VIC0         (0xF2000000)
@@ -97,12 +106,19 @@
 #define S3C_PA_HSMMC0           S5PV210_PA_HSMMC(0)
 #define S3C_PA_HSMMC1           S5PV210_PA_HSMMC(1)
 #define S3C_PA_HSMMC2           S5PV210_PA_HSMMC(2)
+#define S3C_PA_HSMMC3           S5PV210_PA_HSMMC(3)
 #define S3C_PA_IIC              S5PV210_PA_IIC0
 #define S3C_PA_IIC1             S5PV210_PA_IIC1
 #define S3C_PA_IIC2             S5PV210_PA_IIC2
 #define S3C_PA_FB               S5PV210_PA_FB
+#define S3C_PA_RTC              S5PV210_PA_RTC
 #define S3C_PA_WDT              S5PV210_PA_WATCHDOG
+#define S5P_PA_FIMC0            S5PV210_PA_FIMC0
+#define S5P_PA_FIMC1            S5PV210_PA_FIMC1
+#define S5P_PA_FIMC2            S5PV210_PA_FIMC2
 
 #define SAMSUNG_PA_ADC          S5PV210_PA_ADC
+#define SAMSUNG_PA_CFCON        S5PV210_PA_CFCON
+#define SAMSUNG_PA_KEYPAD       S5PV210_PA_KEYPAD
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
index 379117e27600..d503e0c4ce4f 100644
--- a/arch/arm/mach-s5pv210/include/mach/memory.h
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -16,8 +16,13 @@
 #define PHYS_OFFSET             UL(0x20000000)
 #define CONSISTENT_DMA_SIZE     (SZ_8M + SZ_4M + SZ_2M)
 
-/* Maximum of 256MiB in one bank */
-#define MAX_PHYSMEM_BITS        32
+/*
+ * Sparsemem support
+ * Physical memory can be located from 0x20000000 to 0x7fffffff,
+ * so MAX_PHYSMEM_BITS is 31.
+ */
+
+#define MAX_PHYSMEM_BITS        31
 #define SECTION_SIZE_BITS       28
 
 #endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 2a25ab40c863..499aef737476 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -90,6 +90,8 @@
 #define S5P_CLKDIV0_PCLK66_SHIFT        (28)
 #define S5P_CLKDIV0_PCLK66_MASK         (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
 
+#define S5P_SWRESET             S5P_CLKREG(0x2000)
+
 /* Registers related to power management */
 #define S5P_PWR_CFG             S5P_CLKREG(0xC000)
 #define S5P_EINT_WAKEUP_MASK    S5P_CLKREG(0xC004)
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
index 1ca04d5025b3..af8a200b2135 100644
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -13,12 +13,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
+#include <plat/system-reset.h>
 
-static void arch_reset(char mode, const char *cmd)
+static void arch_idle(void)
 {
         /* nothing here yet */
 }
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 10bc76ec4025..0dda8012d6b2 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -13,6 +13,12 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 #include <linux/fb.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/mfd/max8998.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -23,61 +29,69 @@
 #include <mach/regs-clock.h>
 #include <mach/regs-fb.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
 #include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/fb.h>
+#include <plat/fimc-core.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define AQUILA_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
                                  S3C2410_UCON_TXIRQMODE |       \
                                  S3C2410_UCON_RXIRQMODE |       \
                                  S3C2410_UCON_RXFIFO_TOI |      \
                                  S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define AQUILA_ULCON_DEFAULT    S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
-                                 S5PV210_UFCON_TXTRIG4 |        \
-                                 S5PV210_UFCON_RXTRIG4)
+#define AQUILA_UFCON_DEFAULT    S3C2410_UFCON_FIFOMODE
 
-static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
         [0] = {
                 .hwport         = 0,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = AQUILA_UCON_DEFAULT,
+                .ulcon          = AQUILA_ULCON_DEFAULT,
+                /*
+                 * Actually UART0 can support 256 bytes fifo, but aquila board
+                 * supports 128 bytes fifo because of initial chip bug
+                 */
+                .ufcon          = AQUILA_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
         },
         [1] = {
                 .hwport         = 1,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = AQUILA_UCON_DEFAULT,
+                .ulcon          = AQUILA_ULCON_DEFAULT,
+                .ufcon          = AQUILA_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
         },
         [2] = {
                 .hwport         = 2,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = AQUILA_UCON_DEFAULT,
+                .ulcon          = AQUILA_ULCON_DEFAULT,
+                .ufcon          = AQUILA_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
         },
         [3] = {
                 .hwport         = 3,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = AQUILA_UCON_DEFAULT,
+                .ulcon          = AQUILA_ULCON_DEFAULT,
+                .ufcon          = AQUILA_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
         },
 };
 
 /* Frame Buffer */
 static struct s3c_fb_pd_win aquila_fb_win0 = {
         .win_mode = {
-                .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
                 .left_margin = 16,
                 .right_margin = 16,
                 .upper_margin = 3,
@@ -93,7 +107,6 @@ static struct s3c_fb_pd_win aquila_fb_win0 = {
 
 static struct s3c_fb_pd_win aquila_fb_win1 = {
         .win_mode = {
-                .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
                 .left_margin = 16,
                 .right_margin = 16,
                 .upper_margin = 3,
@@ -116,19 +129,383 @@ static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
         .setup_gpio     = s5pv210_fb_gpio_setup_24bpp,
 };
 
+/* MAX8998 regulators */
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+
+static struct regulator_init_data aquila_ldo2_data = {
+        .constraints    = {
+                .name           = "VALIVE_1.1V",
+                .min_uV         = 1100000,
+                .max_uV         = 1100000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+                .state_mem      = {
+                        .enabled = 1,
+                },
+        },
+};
+
+static struct regulator_init_data aquila_ldo3_data = {
+        .constraints    = {
+                .name           = "VUSB/MIPI_1.1V",
+                .min_uV         = 1100000,
+                .max_uV         = 1100000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo4_data = {
+        .constraints    = {
+                .name           = "VDAC_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo5_data = {
+        .constraints    = {
+                .name           = "VTF_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo6_data = {
+        .constraints    = {
+                .name           = "VCC_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo7_data = {
+        .constraints    = {
+                .name           = "VCC_3.0V",
+                .min_uV         = 3000000,
+                .max_uV         = 3000000,
+                .apply_uV       = 1,
+                .boot_on        = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo8_data = {
+        .constraints    = {
+                .name           = "VUSB/VADC_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo9_data = {
+        .constraints    = {
+                .name           = "VCC/VCAM_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo10_data = {
+        .constraints    = {
+                .name           = "VPLL_1.1V",
+                .min_uV         = 1100000,
+                .max_uV         = 1100000,
+                .apply_uV       = 1,
+                .boot_on        = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo11_data = {
+        .constraints    = {
+                .name           = "CAM_IO_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo12_data = {
+        .constraints    = {
+                .name           = "CAM_ISP_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo13_data = {
+        .constraints    = {
+                .name           = "CAM_A_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo14_data = {
+        .constraints    = {
+                .name           = "CAM_CIF_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo15_data = {
+        .constraints    = {
+                .name           = "CAM_AF_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo16_data = {
+        .constraints    = {
+                .name           = "VMIPI_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data aquila_ldo17_data = {
+        .constraints    = {
+                .name           = "CAM_8M_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+/* BUCK */
+static struct regulator_consumer_supply buck1_consumer[] = {
+        {       .supply = "vddarm", },
+};
+
+static struct regulator_consumer_supply buck2_consumer[] = {
+        {       .supply = "vddint", },
+};
+
+static struct regulator_init_data aquila_buck1_data = {
+        .constraints    = {
+                .name           = "VARM_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                  REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(buck1_consumer),
+        .consumer_supplies      = buck1_consumer,
+};
+
+static struct regulator_init_data aquila_buck2_data = {
+        .constraints    = {
+                .name           = "VINT_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                  REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(buck2_consumer),
+        .consumer_supplies      = buck2_consumer,
+};
+
+static struct regulator_init_data aquila_buck3_data = {
+        .constraints    = {
+                .name           = "VCC_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .state_mem      = {
+                        .enabled = 1,
+                },
+        },
+};
+
+static struct regulator_init_data aquila_buck4_data = {
+        .constraints    = {
+                .name           = "CAM_CORE_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct max8998_regulator_data aquila_regulators[] = {
+        { MAX8998_LDO2,  &aquila_ldo2_data },
+        { MAX8998_LDO3,  &aquila_ldo3_data },
+        { MAX8998_LDO4,  &aquila_ldo4_data },
+        { MAX8998_LDO5,  &aquila_ldo5_data },
+        { MAX8998_LDO6,  &aquila_ldo6_data },
+        { MAX8998_LDO7,  &aquila_ldo7_data },
+        { MAX8998_LDO8,  &aquila_ldo8_data },
+        { MAX8998_LDO9,  &aquila_ldo9_data },
+        { MAX8998_LDO10, &aquila_ldo10_data },
+        { MAX8998_LDO11, &aquila_ldo11_data },
+        { MAX8998_LDO12, &aquila_ldo12_data },
+        { MAX8998_LDO13, &aquila_ldo13_data },
+        { MAX8998_LDO14, &aquila_ldo14_data },
+        { MAX8998_LDO15, &aquila_ldo15_data },
+        { MAX8998_LDO16, &aquila_ldo16_data },
+        { MAX8998_LDO17, &aquila_ldo17_data },
+        { MAX8998_BUCK1, &aquila_buck1_data },
+        { MAX8998_BUCK2, &aquila_buck2_data },
+        { MAX8998_BUCK3, &aquila_buck3_data },
+        { MAX8998_BUCK4, &aquila_buck4_data },
+};
+
+static struct max8998_platform_data aquila_max8998_pdata = {
+        .num_regulators = ARRAY_SIZE(aquila_regulators),
+        .regulators     = aquila_regulators,
+};
+#endif
+
+/* GPIO I2C PMIC */
+#define AP_I2C_GPIO_PMIC_BUS_4  4
+static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
+        .sda_pin        = S5PV210_GPJ4(0),      /* XMSMCSN */
+        .scl_pin        = S5PV210_GPJ4(3),      /* XMSMIRQN */
+};
+
+static struct platform_device aquila_i2c_gpio_pmic = {
+        .name           = "i2c-gpio",
+        .id             = AP_I2C_GPIO_PMIC_BUS_4,
+        .dev            = {
+                .platform_data = &aquila_i2c_gpio_pmic_data,
+        },
+};
+
+static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+        {
+                /* 0xCC when SRAD = 0 */
+                I2C_BOARD_INFO("max8998", 0xCC >> 1),
+                .platform_data = &aquila_max8998_pdata,
+        },
+#endif
+};
+
+/* PMIC Power button */
+static struct gpio_keys_button aquila_gpio_keys_table[] = {
+        {
+                .code           = KEY_POWER,
+                .gpio           = S5PV210_GPH2(6),
+                .desc           = "gpio-keys: KEY_POWER",
+                .type           = EV_KEY,
+                .active_low     = 1,
+                .wakeup         = 1,
+                .debounce_interval = 1,
+        },
+};
+
+static struct gpio_keys_platform_data aquila_gpio_keys_data = {
+        .buttons        = aquila_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(aquila_gpio_keys_table),
+};
+
+static struct platform_device aquila_device_gpiokeys = {
+        .name = "gpio-keys",
+        .dev = {
+                .platform_data = &aquila_gpio_keys_data,
+        },
+};
+
+static void __init aquila_pmic_init(void)
+{
+        /* AP_PMIC_IRQ: EINT7 */
+        s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
+        s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+
+        /* nPower: EINT22 */
+        s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
+        s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
+}
+
+/* MoviNAND */
+static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_PERMANENT,
+};
+
+/* Wireless LAN */
+static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_EXTERNAL,
+        /* ext_cd_{init,cleanup} callbacks will be added later */
+};
+
+/* External Flash */
+#define AQUILA_EXT_FLASH_EN     S5PV210_MP05(4)
+#define AQUILA_EXT_FLASH_CD     S5PV210_GPH3(4)
+static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_GPIO,
+        .ext_cd_gpio            = AQUILA_EXT_FLASH_CD,
+        .ext_cd_gpio_invert     = 1,
+};
+
+static void aquila_setup_sdhci(void)
+{
+        gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
+        gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
+
+        s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
+        s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
+        s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
+};
+
 static struct platform_device *aquila_devices[] __initdata = {
+        &aquila_i2c_gpio_pmic,
+        &aquila_device_gpiokeys,
         &s3c_device_fb,
+        &s5pc110_device_onenand,
+        &s3c_device_hsmmc0,
+        &s3c_device_hsmmc1,
+        &s3c_device_hsmmc2,
+        &s5p_device_fimc0,
+        &s5p_device_fimc1,
+        &s5p_device_fimc2,
 };
 
 static void __init aquila_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
         s3c24xx_init_clocks(24000000);
-        s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+        s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
 }
 
 static void __init aquila_machine_init(void)
 {
+        /* PMIC */
+        aquila_pmic_init();
+        i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
+                        ARRAY_SIZE(i2c_gpio_pmic_devs));
+        /* SDHCI */
+        aquila_setup_sdhci();
+
+        s3c_fimc_setname(0, "s5p-fimc");
+        s3c_fimc_setname(1, "s5p-fimc");
+        s3c_fimc_setname(2, "s5p-fimc");
+
         /* FB */
         s3c_fb_set_platdata(&aquila_lcd_pdata);
 
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 4863b13824e4..53754d7d364e 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -12,6 +12,13 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/serial_core.h>
+#include <linux/fb.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/mfd/max8998.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -20,58 +27,444 @@
 
 #include <mach/map.h>
 #include <mach/regs-clock.h>
+#include <mach/regs-fb.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
 #include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/fb.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define GONI_UCON_DEFAULT       (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
                                  S3C2410_UCON_TXIRQMODE |       \
                                  S3C2410_UCON_RXIRQMODE |       \
                                  S3C2410_UCON_RXFIFO_TOI |      \
                                  S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define GONI_ULCON_DEFAULT      S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
-                                 S5PV210_UFCON_TXTRIG4 |        \
-                                 S5PV210_UFCON_RXTRIG4)
+#define GONI_UFCON_DEFAULT      S3C2410_UFCON_FIFOMODE
 
 static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
         [0] = {
                 .hwport         = 0,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = GONI_UCON_DEFAULT,
+                .ulcon          = GONI_ULCON_DEFAULT,
+                .ufcon          = GONI_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256,
         },
         [1] = {
                 .hwport         = 1,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = GONI_UCON_DEFAULT,
+                .ulcon          = GONI_ULCON_DEFAULT,
+                .ufcon          = GONI_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
         },
         [2] = {
                 .hwport         = 2,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = GONI_UCON_DEFAULT,
+                .ulcon          = GONI_ULCON_DEFAULT,
+                .ufcon          = GONI_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
         },
         [3] = {
                 .hwport         = 3,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = GONI_UCON_DEFAULT,
+                .ulcon          = GONI_ULCON_DEFAULT,
+                .ufcon          = GONI_UFCON_DEFAULT |
+                        S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
         },
 };
 
+/* Frame Buffer */
+static struct s3c_fb_pd_win goni_fb_win0 = {
+        .win_mode = {
+                .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*55),
+                .left_margin    = 16,
+                .right_margin   = 16,
+                .upper_margin   = 3,
+                .lower_margin   = 28,
+                .hsync_len      = 2,
+                .vsync_len      = 2,
+                .xres           = 480,
+                .yres           = 800,
+                .refresh        = 55,
+        },
+        .max_bpp        = 32,
+        .default_bpp    = 16,
+};
+
+static struct s3c_fb_platdata goni_lcd_pdata __initdata = {
+        .win[0]         = &goni_fb_win0,
+        .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
+                          VIDCON0_CLKSEL_LCD,
+        .vidcon1        = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
+                          | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+        .setup_gpio     = s5pv210_fb_gpio_setup_24bpp,
+};
+
+/* MAX8998 regulators */
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+
+static struct regulator_init_data goni_ldo2_data = {
+        .constraints    = {
+                .name           = "VALIVE_1.1V",
+                .min_uV         = 1100000,
+                .max_uV         = 1100000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+                .state_mem      = {
+                        .enabled = 1,
+                },
+        },
+};
+
+static struct regulator_init_data goni_ldo3_data = {
+        .constraints    = {
+                .name           = "VUSB/MIPI_1.1V",
+                .min_uV         = 1100000,
+                .max_uV         = 1100000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo4_data = {
+        .constraints    = {
+                .name           = "VDAC_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo5_data = {
+        .constraints    = {
+                .name           = "VTF_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo6_data = {
+        .constraints    = {
+                .name           = "VCC_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo7_data = {
+        .constraints    = {
+                .name           = "VLCD_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo8_data = {
+        .constraints    = {
+                .name           = "VUSB/VADC_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo9_data = {
+        .constraints    = {
+                .name           = "VCC/VCAM_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo10_data = {
+        .constraints    = {
+                .name           = "VPLL_1.1V",
+                .min_uV         = 1100000,
+                .max_uV         = 1100000,
+                .apply_uV       = 1,
+                .boot_on        = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo11_data = {
+        .constraints    = {
+                .name           = "CAM_IO_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo12_data = {
+        .constraints    = {
+                .name           = "CAM_ISP_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo13_data = {
+        .constraints    = {
+                .name           = "CAM_A_2.8V",
+                .min_uV         = 2800000,
+                .max_uV         = 2800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo14_data = {
+        .constraints    = {
+                .name           = "CAM_CIF_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo15_data = {
+        .constraints    = {
+                .name           = "CAM_AF_3.3V",
+                .min_uV         = 3300000,
+                .max_uV         = 3300000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo16_data = {
+        .constraints    = {
+                .name           = "VMIPI_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct regulator_init_data goni_ldo17_data = {
+        .constraints    = {
+                .name           = "VCC_3.0V_LCD",
+                .min_uV         = 3000000,
+                .max_uV         = 3000000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+/* BUCK */
+static struct regulator_consumer_supply buck1_consumer[] = {
+        {       .supply = "vddarm", },
+};
+
+static struct regulator_consumer_supply buck2_consumer[] = {
+        {       .supply = "vddint", },
+};
+
+static struct regulator_init_data goni_buck1_data = {
+        .constraints    = {
+                .name           = "VARM_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                  REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(buck1_consumer),
+        .consumer_supplies      = buck1_consumer,
+};
+
+static struct regulator_init_data goni_buck2_data = {
+        .constraints    = {
+                .name           = "VINT_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                  REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(buck2_consumer),
+        .consumer_supplies      = buck2_consumer,
+};
+
+static struct regulator_init_data goni_buck3_data = {
+        .constraints    = {
+                .name           = "VCC_1.8V",
+                .min_uV         = 1800000,
+                .max_uV         = 1800000,
+                .apply_uV       = 1,
+                .state_mem      = {
+                        .enabled = 1,
+                },
+        },
+};
+
+static struct regulator_init_data goni_buck4_data = {
+        .constraints    = {
+                .name           = "CAM_CORE_1.2V",
+                .min_uV         = 1200000,
+                .max_uV         = 1200000,
+                .apply_uV       = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct max8998_regulator_data goni_regulators[] = {
+        { MAX8998_LDO2,  &goni_ldo2_data },
+        { MAX8998_LDO3,  &goni_ldo3_data },
+        { MAX8998_LDO4,  &goni_ldo4_data },
+        { MAX8998_LDO5,  &goni_ldo5_data },
+        { MAX8998_LDO6,  &goni_ldo6_data },
+        { MAX8998_LDO7,  &goni_ldo7_data },
+        { MAX8998_LDO8,  &goni_ldo8_data },
+        { MAX8998_LDO9,  &goni_ldo9_data },
+        { MAX8998_LDO10, &goni_ldo10_data },
+        { MAX8998_LDO11, &goni_ldo11_data },
+        { MAX8998_LDO12, &goni_ldo12_data },
+        { MAX8998_LDO13, &goni_ldo13_data },
+        { MAX8998_LDO14, &goni_ldo14_data },
+        { MAX8998_LDO15, &goni_ldo15_data },
+        { MAX8998_LDO16, &goni_ldo16_data },
+        { MAX8998_LDO17, &goni_ldo17_data },
+        { MAX8998_BUCK1, &goni_buck1_data },
+        { MAX8998_BUCK2, &goni_buck2_data },
+        { MAX8998_BUCK3, &goni_buck3_data },
+        { MAX8998_BUCK4, &goni_buck4_data },
+};
+
+static struct max8998_platform_data goni_max8998_pdata = {
+        .num_regulators = ARRAY_SIZE(goni_regulators),
+        .regulators     = goni_regulators,
+};
+#endif
+
+/* GPIO I2C PMIC */
+#define AP_I2C_GPIO_PMIC_BUS_4  4
+static struct i2c_gpio_platform_data goni_i2c_gpio_pmic_data = {
+        .sda_pin        = S5PV210_GPJ4(0),      /* XMSMCSN */
+        .scl_pin        = S5PV210_GPJ4(3),      /* XMSMIRQN */
+};
+
+static struct platform_device goni_i2c_gpio_pmic = {
+        .name           = "i2c-gpio",
+        .id             = AP_I2C_GPIO_PMIC_BUS_4,
+        .dev            = {
+                .platform_data  = &goni_i2c_gpio_pmic_data,
+        },
+};
+
+static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
+#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
+        {
+                /* 0xCC when SRAD = 0 */
+                I2C_BOARD_INFO("max8998", 0xCC >> 1),
+                .platform_data = &goni_max8998_pdata,
+        },
+#endif
+};
+
+/* PMIC Power button */
+static struct gpio_keys_button goni_gpio_keys_table[] = {
+        {
+                .code           = KEY_POWER,
+                .gpio           = S5PV210_GPH2(6),
+                .desc           = "gpio-keys: KEY_POWER",
+                .type           = EV_KEY,
+                .active_low     = 1,
+                .wakeup         = 1,
+                .debounce_interval = 1,
+        },
+};
+
+static struct gpio_keys_platform_data goni_gpio_keys_data = {
+        .buttons        = goni_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(goni_gpio_keys_table),
+};
+
+static struct platform_device goni_device_gpiokeys = {
+        .name = "gpio-keys",
+        .dev = {
+                .platform_data = &goni_gpio_keys_data,
+        },
+};
+
+static void __init goni_pmic_init(void)
+{
+        /* AP_PMIC_IRQ: EINT7 */
+        s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
+        s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
+
+        /* nPower: EINT22 */
+        s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
+        s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
+}
+
+/* MoviNAND */
+static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_PERMANENT,
+};
+
+/* Wireless LAN */
+static struct s3c_sdhci_platdata goni_hsmmc1_data __initdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_EXTERNAL,
+        /* ext_cd_{init,cleanup} callbacks will be added later */
+};
+
+/* External Flash */
+#define GONI_EXT_FLASH_EN       S5PV210_MP05(4)
+#define GONI_EXT_FLASH_CD       S5PV210_GPH3(4)
+static struct s3c_sdhci_platdata goni_hsmmc2_data __initdata = {
+        .max_width              = 4,
+        .cd_type                = S3C_SDHCI_CD_GPIO,
+        .ext_cd_gpio            = GONI_EXT_FLASH_CD,
+        .ext_cd_gpio_invert     = 1,
+};
+
+static void goni_setup_sdhci(void)
+{
+        gpio_request(GONI_EXT_FLASH_EN, "FLASH_EN");
+        gpio_direction_output(GONI_EXT_FLASH_EN, 1);
+
+        s3c_sdhci0_set_platdata(&goni_hsmmc0_data);
+        s3c_sdhci1_set_platdata(&goni_hsmmc1_data);
+        s3c_sdhci2_set_platdata(&goni_hsmmc2_data);
+};
+
 static struct platform_device *goni_devices[] __initdata = {
+        &s3c_device_fb,
+        &s5pc110_device_onenand,
+        &goni_i2c_gpio_pmic,
+        &goni_device_gpiokeys,
+        &s5p_device_fimc0,
+        &s5p_device_fimc1,
+        &s5p_device_fimc2,
+        &s3c_device_hsmmc0,
+        &s3c_device_hsmmc1,
+        &s3c_device_hsmmc2,
 };
 
 static void __init goni_map_io(void)
@@ -83,6 +476,16 @@ static void __init goni_map_io(void)
 
 static void __init goni_machine_init(void)
 {
+        /* PMIC */
+        goni_pmic_init();
+        i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
+                        ARRAY_SIZE(i2c_gpio_pmic_devs));
+        /* SDHCI */
+        goni_setup_sdhci();
+
+        /* FB */
+        s3c_fb_set_platdata(&goni_lcd_pdata);
+
         platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices));
 }
 
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 4c8903c6d104..8211bb87c54b 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -12,6 +12,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/serial_core.h>
+#include <linux/i2c.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -25,18 +26,20 @@
 #include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/ata.h>
+#include <plat/iic.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define SMDKC110_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
                                  S3C2410_UCON_TXIRQMODE |       \
                                  S3C2410_UCON_RXIRQMODE |       \
                                  S3C2410_UCON_RXFIFO_TOI |      \
                                  S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define SMDKC110_ULCON_DEFAULT  S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKC110_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
                                  S5PV210_UFCON_TXTRIG4 |        \
                                  S5PV210_UFCON_RXTRIG4)
 
@@ -44,39 +47,60 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
         [0] = {
                 .hwport         = 0,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKC110_UCON_DEFAULT,
+                .ulcon          = SMDKC110_ULCON_DEFAULT,
+                .ufcon          = SMDKC110_UFCON_DEFAULT,
         },
         [1] = {
                 .hwport         = 1,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKC110_UCON_DEFAULT,
+                .ulcon          = SMDKC110_ULCON_DEFAULT,
+                .ufcon          = SMDKC110_UFCON_DEFAULT,
         },
         [2] = {
                 .hwport         = 2,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKC110_UCON_DEFAULT,
+                .ulcon          = SMDKC110_ULCON_DEFAULT,
+                .ufcon          = SMDKC110_UFCON_DEFAULT,
         },
         [3] = {
                 .hwport         = 3,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKC110_UCON_DEFAULT,
+                .ulcon          = SMDKC110_ULCON_DEFAULT,
+                .ufcon          = SMDKC110_UFCON_DEFAULT,
         },
 };
 
+static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
+        .setup_gpio     = s5pv210_ide_setup_gpio,
+};
+
 static struct platform_device *smdkc110_devices[] __initdata = {
         &s5pv210_device_iis0,
         &s5pv210_device_ac97,
+        &s3c_device_cfcon,
+        &s3c_device_i2c0,
+        &s3c_device_i2c1,
+        &s3c_device_i2c2,
+        &s3c_device_rtc,
         &s3c_device_wdt,
 };
 
+static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = {
+        { I2C_BOARD_INFO("24c08", 0x50), },     /* Samsung S524AD0XD1 */
+};
+
+static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = {
+        /* To Be Updated */
+};
+
+static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
+        /* To Be Updated */
+};
+
 static void __init smdkc110_map_io(void)
 {
         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -86,6 +110,18 @@ static void __init smdkc110_map_io(void)
 
 static void __init smdkc110_machine_init(void)
 {
+        s3c_i2c0_set_platdata(NULL);
+        s3c_i2c1_set_platdata(NULL);
+        s3c_i2c2_set_platdata(NULL);
+        i2c_register_board_info(0, smdkc110_i2c_devs0,
+                        ARRAY_SIZE(smdkc110_i2c_devs0));
+        i2c_register_board_info(1, smdkc110_i2c_devs1,
+                        ARRAY_SIZE(smdkc110_i2c_devs1));
+        i2c_register_board_info(2, smdkc110_i2c_devs2,
+                        ARRAY_SIZE(smdkc110_i2c_devs2));
+
+        s3c_ide_set_platdata(&smdkc110_ide_pdata);
+
         platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
 }
 
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 0d4627948040..fbbc0a3c3738 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -10,6 +10,7 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/serial_core.h>
 
@@ -27,18 +28,21 @@
 #include <plat/cpu.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
+#include <plat/ata.h>
+#include <plat/iic.h>
+#include <plat/keypad.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define SMDKV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
                                  S3C2410_UCON_TXIRQMODE |       \
                                  S3C2410_UCON_RXIRQMODE |       \
                                  S3C2410_UCON_RXFIFO_TOI |      \
                                  S3C2443_UCON_RXERR_IRQEN)
 
-#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define SMDKV210_ULCON_DEFAULT  S3C2410_LCON_CS8
 
-#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKV210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
                                  S5PV210_UFCON_TXTRIG4 |        \
                                  S5PV210_UFCON_RXTRIG4)
 
@@ -46,41 +50,86 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
         [0] = {
                 .hwport         = 0,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKV210_UCON_DEFAULT,
+                .ulcon          = SMDKV210_ULCON_DEFAULT,
+                .ufcon          = SMDKV210_UFCON_DEFAULT,
         },
         [1] = {
                 .hwport         = 1,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKV210_UCON_DEFAULT,
+                .ulcon          = SMDKV210_ULCON_DEFAULT,
+                .ufcon          = SMDKV210_UFCON_DEFAULT,
         },
         [2] = {
                 .hwport         = 2,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKV210_UCON_DEFAULT,
+                .ulcon          = SMDKV210_ULCON_DEFAULT,
+                .ufcon          = SMDKV210_UFCON_DEFAULT,
         },
         [3] = {
                 .hwport         = 3,
                 .flags          = 0,
-                .ucon           = S5PV210_UCON_DEFAULT,
-                .ulcon          = S5PV210_ULCON_DEFAULT,
-                .ufcon          = S5PV210_UFCON_DEFAULT,
+                .ucon           = SMDKV210_UCON_DEFAULT,
+                .ulcon          = SMDKV210_ULCON_DEFAULT,
+                .ufcon          = SMDKV210_UFCON_DEFAULT,
         },
 };
 
+static struct s3c_ide_platdata smdkv210_ide_pdata __initdata = {
+        .setup_gpio     = s5pv210_ide_setup_gpio,
+};
+
+static uint32_t smdkv210_keymap[] __initdata = {
+        /* KEY(row, col, keycode) */
+        KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
+        KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
+        KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
+        KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
+};
+
+static struct matrix_keymap_data smdkv210_keymap_data __initdata = {
+        .keymap         = smdkv210_keymap,
+        .keymap_size    = ARRAY_SIZE(smdkv210_keymap),
+};
+
+static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {
+        .keymap_data    = &smdkv210_keymap_data,
+        .rows           = 8,
+        .cols           = 8,
+};
+
 static struct platform_device *smdkv210_devices[] __initdata = {
         &s5pv210_device_iis0,
         &s5pv210_device_ac97,
         &s3c_device_adc,
+        &s3c_device_cfcon,
+        &s3c_device_hsmmc0,
+        &s3c_device_hsmmc1,
+        &s3c_device_hsmmc2,
+        &s3c_device_hsmmc3,
+        &s3c_device_i2c0,
+        &s3c_device_i2c1,
+        &s3c_device_i2c2,
+        &samsung_device_keypad,
+        &s3c_device_rtc,
         &s3c_device_ts,
         &s3c_device_wdt,
 };
 
+static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = {
+        { I2C_BOARD_INFO("24c08", 0x50), },     /* Samsung S524AD0XD1 */
+};
+
+static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = {
+        /* To Be Updated */
+};
+
+static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = {
+        /* To Be Updated */
+};
+
 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
         .delay                  = 10000,
         .presc                  = 49,
@@ -96,7 +145,21 @@ static void __init smdkv210_map_io(void)
 
 static void __init smdkv210_machine_init(void)
 {
+        samsung_keypad_set_platdata(&smdkv210_keypad_data);
         s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
+        s3c_i2c0_set_platdata(NULL);
+        s3c_i2c1_set_platdata(NULL);
+        s3c_i2c2_set_platdata(NULL);
+        i2c_register_board_info(0, smdkv210_i2c_devs0,
+                        ARRAY_SIZE(smdkv210_i2c_devs0));
+        i2c_register_board_info(1, smdkv210_i2c_devs1,
+                        ARRAY_SIZE(smdkv210_i2c_devs1));
+        i2c_register_board_info(2, smdkv210_i2c_devs2,
+                        ARRAY_SIZE(smdkv210_i2c_devs2));
+
+        s3c_ide_set_platdata(&smdkv210_ide_pdata);
+
         platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
 }
 
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
index a50cbac8720d..928cf1f125fa 100644
--- a/arch/arm/mach-s5pv210/setup-fb-24bpp.c
+++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c
@@ -13,9 +13,9 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/fb.h>
+#include <linux/gpio.h>
 
 #include <mach/regs-fb.h>
-#include <mach/gpio.h>
 #include <mach/map.h>
 #include <plat/fb.h>
 #include <mach/regs-clock.h>
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c
index c718253c70b8..d38f7cb7e662 100644
--- a/arch/arm/mach-s5pv210/setup-i2c0.c
+++ b/arch/arm/mach-s5pv210/setup-i2c0.c
@@ -14,10 +14,10 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/gpio.h>
 
 struct platform_device; /* don't need the contents */
 
-#include <mach/gpio.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c
index 45e0e6ed2ed0..148bb7857d89 100644
--- a/arch/arm/mach-s5pv210/setup-i2c1.c
+++ b/arch/arm/mach-s5pv210/setup-i2c1.c
@@ -14,10 +14,10 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/gpio.h>
 
 struct platform_device; /* don't need the contents */
 
-#include <mach/gpio.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c
index b11b4bff69ac..2396cb8c373e 100644
--- a/arch/arm/mach-s5pv210/setup-i2c2.c
+++ b/arch/arm/mach-s5pv210/setup-i2c2.c
@@ -14,10 +14,10 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/gpio.h>
 
 struct platform_device; /* don't need the contents */
 
-#include <mach/gpio.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 
diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c
new file mode 100644
index 000000000000..b558b1cc8d60
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-ide.c
@@ -0,0 +1,50 @@
+/* linux/arch/arm/mach-s5pv210/setup-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * S5PV210 setup information for IDE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+
+#include <plat/gpio-cfg.h>
+
+void s5pv210_ide_setup_gpio(void)
+{
+        unsigned int gpio = 0;
+
+        for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) {
+                /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST,
+                        CF_DMACK */
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) {
+                /*CF_Data[0 - 7] */
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) {
+                /* CF_Data[8 - 15] */
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+
+        for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) {
+                /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+                s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+        }
+}
diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c
new file mode 100644
index 000000000000..37b2790aafc3
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-keypad.c
@@ -0,0 +1,34 @@
+/*
+ * linux/arch/arm/mach-s5pv210/setup-keypad.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
+
+void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
+{
+        unsigned int gpio, end;
+
+        /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
+        end = S5PV210_GPH3(rows);
+        for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
+        end = S5PV210_GPH2(cols);
+        for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index fe7d86dad14c..b18587b1ec58 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -15,15 +15,17 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/card.h>
 
-#include <mach/gpio.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-sdhci.h>
+#include <plat/sdhci.h>
 
 void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
 
         /* Set all the necessary GPG0/GPG1 pins to special-function 2 */
@@ -48,12 +50,15 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
                 break;
         }
 
-        s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2));
+        }
 }
 
 void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
 
         /* Set all the necessary GPG1[0:1] pins to special-function 2 */
@@ -68,12 +73,15 @@ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
                 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
         }
 
-        s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2));
+        }
 }
 
 void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
 {
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
         unsigned int gpio;
 
         /* Set all the necessary GPG2[0:1] pins to special-function 2 */
@@ -99,6 +107,31 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
                 break;
         }
 
-        s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
+        }
+}
+
+void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
+{
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
+        unsigned int gpio;
+
+        /* Set all the necessary GPG3[0:2] pins to special-function 2 */
+        for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        /* Data pin GPG3[3:6] to special-function 2 */
+        for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
+                s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+                s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+        }
+
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
+                s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2));
+        }
 }
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index 51815ec60c2a..c32e202731c1 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -26,9 +26,9 @@
 
 char *s5pv210_hsmmc_clksrcs[4] = {
         [0] = "hsmmc",          /* HCLK */
-        [1] = "hsmmc",          /* HCLK */
+        /* [1] = "hsmmc",       - duplicate HCLK entry */
         [2] = "sclk_mmc",       /* mmc_bus */
-        /*[4] = reserved */
+        /* [3] = NULL,          - reserved */
 };
 
 void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
new file mode 100644
index 000000000000..331b5bd97aba
--- /dev/null
+++ b/arch/arm/mach-s5pv310/Kconfig
@@ -0,0 +1,45 @@
+# arch/arm/mach-s5pv310/Kconfig
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+# Configuration options for the S5PV310
+
+if ARCH_S5PV310
+
+config CPU_S5PV310
+        bool
+        select PLAT_S5P
+        help
+          Enable S5PV310 CPU support
+
+config S5PV310_SETUP_I2C1
+        bool
+        help
+          Common setup code for i2c bus 1.
+
+config S5PV310_SETUP_I2C2
+        bool
+        help
+          Common setup code for i2c bus 2.
+
+# machine support
+
+config MACH_SMDKV310
+        bool "SMDKV310"
+        select CPU_S5PV310
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung SMDKV310
+
+config MACH_UNIVERSAL_C210
+        bool "Mobile UNIVERSAL_C210 Board"
+        select CPU_S5PV310
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung Mobile Universal S5PC210 Reference
+          Board. S5PC210(MCP) is one of package option of S5PV310
+
+endif
diff --git a/arch/arm/mach-s5pv310/Makefile b/arch/arm/mach-s5pv310/Makefile
new file mode 100644
index 000000000000..d5b51c72340f
--- /dev/null
+++ b/arch/arm/mach-s5pv310/Makefile
@@ -0,0 +1,30 @@
+# arch/arm/mach-s5pv310/Makefile
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5PV310 system
+
+obj-$(CONFIG_CPU_S5PV310)       += cpu.o init.o clock.o irq-combiner.o
+obj-$(CONFIG_CPU_S5PV310)       += setup-i2c0.o time.o
+
+obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
+obj-$(CONFIG_LOCAL_TIMERS)      += localtimer.o
+obj-$(CONFIG_HOTPLUG_CPU)       += hotplug.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDKV310)     += mach-smdkv310.o
+obj-$(CONFIG_MACH_UNIVERSAL_C210)       += mach-universal_c210.o
+
+# device support
+
+obj-$(CONFIG_S5PV310_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PV310_SETUP_I2C2)        += setup-i2c2.o
diff --git a/arch/arm/mach-s5pv310/Makefile.boot b/arch/arm/mach-s5pv310/Makefile.boot
new file mode 100644
index 000000000000..d65956ffb43d
--- /dev/null
+++ b/arch/arm/mach-s5pv310/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x40008000
+params_phys-y   := 0x40000100
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c
new file mode 100644
index 000000000000..77f2b4d85e6b
--- /dev/null
+++ b/arch/arm/mach-s5pv310/clock.c
@@ -0,0 +1,544 @@
+/* linux/arch/arm/mach-s5pv310/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+static struct clk clk_sclk_hdmi27m = {
+        .name           = "sclk_hdmi27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
+/* Core list of CMU_CPU side */
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 },
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLKSRC_CPU, .shift = 8, .size = 1 },
+};
+
+static struct clk *clkset_moutcore_list[] = {
+        [0] = &clk_mout_apll.clk,
+        [1] = &clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_moutcore = {
+        .sources        = clkset_moutcore_list,
+        .nr_sources     = ARRAY_SIZE(clkset_moutcore_list),
+};
+
+static struct clksrc_clk clk_moutcore = {
+        .clk    = {
+                .name           = "moutcore",
+                .id             = -1,
+        },
+        .sources        = &clkset_moutcore,
+        .reg_src        = { .reg = S5P_CLKSRC_CPU, .shift = 16, .size = 1 },
+};
+
+static struct clksrc_clk clk_coreclk = {
+        .clk    = {
+                .name           = "core_clk",
+                .id             = -1,
+                .parent         = &clk_moutcore.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 0, .size = 3 },
+};
+
+static struct clksrc_clk clk_armclk = {
+        .clk    = {
+                .name           = "armclk",
+                .id             = -1,
+                .parent         = &clk_coreclk.clk,
+        },
+};
+
+static struct clksrc_clk clk_aclk_corem0 = {
+        .clk    = {
+                .name           = "aclk_corem0",
+                .id             = -1,
+                .parent         = &clk_coreclk.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 },
+};
+
+static struct clksrc_clk clk_aclk_cores = {
+        .clk    = {
+                .name           = "aclk_cores",
+                .id             = -1,
+                .parent         = &clk_coreclk.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 },
+};
+
+static struct clksrc_clk clk_aclk_corem1 = {
+        .clk    = {
+                .name           = "aclk_corem1",
+                .id             = -1,
+                .parent         = &clk_coreclk.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 8, .size = 3 },
+};
+
+static struct clksrc_clk clk_periphclk = {
+        .clk    = {
+                .name           = "periphclk",
+                .id             = -1,
+                .parent         = &clk_coreclk.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 },
+};
+
+static struct clksrc_clk clk_atclk = {
+        .clk    = {
+                .name           = "atclk",
+                .id             = -1,
+                .parent         = &clk_moutcore.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 16, .size = 3 },
+};
+
+static struct clksrc_clk clk_pclk_dbg = {
+        .clk    = {
+                .name           = "pclk_dbg",
+                .id             = -1,
+                .parent         = &clk_atclk.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CPU, .shift = 20, .size = 3 },
+};
+
+/* Core list of CMU_CORE side */
+
+static struct clk *clkset_corebus_list[] = {
+        [0] = &clk_mout_mpll.clk,
+        [1] = &clk_mout_apll.clk,
+};
+
+static struct clksrc_sources clkset_mout_corebus = {
+        .sources        = clkset_corebus_list,
+        .nr_sources     = ARRAY_SIZE(clkset_corebus_list),
+};
+
+static struct clksrc_clk clk_mout_corebus = {
+        .clk    = {
+                .name           = "mout_corebus",
+                .id             = -1,
+        },
+        .sources        = &clkset_mout_corebus,
+        .reg_src        = { .reg = S5P_CLKSRC_CORE, .shift = 4, .size = 1 },
+};
+
+static struct clksrc_clk clk_sclk_dmc = {
+        .clk    = {
+                .name           = "sclk_dmc",
+                .id             = -1,
+                .parent         = &clk_mout_corebus.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CORE0, .shift = 12, .size = 3 },
+};
+
+static struct clksrc_clk clk_aclk_cored = {
+        .clk    = {
+                .name           = "aclk_cored",
+                .id             = -1,
+                .parent         = &clk_sclk_dmc.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CORE0, .shift = 16, .size = 3 },
+};
+
+static struct clksrc_clk clk_aclk_corep = {
+        .clk    = {
+                .name           = "aclk_corep",
+                .id             = -1,
+                .parent         = &clk_aclk_cored.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CORE0, .shift = 20, .size = 3 },
+};
+
+static struct clksrc_clk clk_aclk_acp = {
+        .clk    = {
+                .name           = "aclk_acp",
+                .id             = -1,
+                .parent         = &clk_mout_corebus.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CORE0, .shift = 0, .size = 3 },
+};
+
+static struct clksrc_clk clk_pclk_acp = {
+        .clk    = {
+                .name           = "pclk_acp",
+                .id             = -1,
+                .parent         = &clk_aclk_acp.clk,
+        },
+        .reg_div        = { .reg = S5P_CLKDIV_CORE0, .shift = 4, .size = 3 },
+};
+
+/* Core list of CMU_TOP side */
+
+static struct clk *clkset_aclk_top_list[] = {
+        [0] = &clk_mout_mpll.clk,
+        [1] = &clk_mout_apll.clk,
+};
+
+static struct clksrc_sources clkset_aclk_200 = {
+        .sources        = clkset_aclk_top_list,
+        .nr_sources     = ARRAY_SIZE(clkset_aclk_top_list),
+};
+
+static struct clksrc_clk clk_aclk_200 = {
+        .clk    = {
+                .name           = "aclk_200",
+                .id             = -1,
+        },
+        .sources        = &clkset_aclk_200,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 12, .size = 1 },
+        .reg_div        = { .reg = S5P_CLKDIV_TOP, .shift = 0, .size = 3 },
+};
+
+static struct clksrc_sources clkset_aclk_100 = {
+        .sources        = clkset_aclk_top_list,
+        .nr_sources     = ARRAY_SIZE(clkset_aclk_top_list),
+};
+
+static struct clksrc_clk clk_aclk_100 = {
+        .clk    = {
+                .name           = "aclk_100",
+                .id             = -1,
+        },
+        .sources        = &clkset_aclk_100,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 16, .size = 1 },
+        .reg_div        = { .reg = S5P_CLKDIV_TOP, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_sources clkset_aclk_160 = {
+        .sources        = clkset_aclk_top_list,
+        .nr_sources     = ARRAY_SIZE(clkset_aclk_top_list),
+};
+
+static struct clksrc_clk clk_aclk_160 = {
+        .clk    = {
+                .name           = "aclk_160",
+                .id             = -1,
+        },
+        .sources        = &clkset_aclk_160,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 20, .size = 1 },
+        .reg_div        = { .reg = S5P_CLKDIV_TOP, .shift = 8, .size = 3 },
+};
+
+static struct clksrc_sources clkset_aclk_133 = {
+        .sources        = clkset_aclk_top_list,
+        .nr_sources     = ARRAY_SIZE(clkset_aclk_top_list),
+};
+
+static struct clksrc_clk clk_aclk_133 = {
+        .clk    = {
+                .name           = "aclk_133",
+                .id             = -1,
+        },
+        .sources        = &clkset_aclk_133,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 24, .size = 1 },
+        .reg_div        = { .reg = S5P_CLKDIV_TOP, .shift = 12, .size = 3 },
+};
+
+static struct clk *clkset_vpllsrc_list[] = {
+        [0] = &clk_fin_vpll,
+        [1] = &clk_sclk_hdmi27m,
+};
+
+static struct clksrc_sources clkset_vpllsrc = {
+        .sources        = clkset_vpllsrc_list,
+        .nr_sources     = ARRAY_SIZE(clkset_vpllsrc_list),
+};
+
+static struct clksrc_clk clk_vpllsrc = {
+        .clk    = {
+                .name           = "vpll_src",
+                .id             = -1,
+        },
+        .sources        = &clkset_vpllsrc,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP1, .shift = 0, .size = 1 },
+};
+
+static struct clk *clkset_sclk_vpll_list[] = {
+        [0] = &clk_vpllsrc.clk,
+        [1] = &clk_fout_vpll,
+};
+
+static struct clksrc_sources clkset_sclk_vpll = {
+        .sources        = clkset_sclk_vpll_list,
+        .nr_sources     = ARRAY_SIZE(clkset_sclk_vpll_list),
+};
+
+static struct clksrc_clk clk_sclk_vpll = {
+        .clk    = {
+                .name           = "sclk_vpll",
+                .id             = -1,
+        },
+        .sources        = &clkset_sclk_vpll,
+        .reg_src        = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
+};
+
+static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
+}
+
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_aclk_100.clk,
+                .enable         = s5pv310_clk_ip_peril_ctrl,
+                .ctrlbit        = (1<<24),
+        }
+};
+
+static struct clk init_clocks[] = {
+        /* Nothing here yet */
+};
+
+static struct clk *clkset_group_list[] = {
+        [0] = &clk_ext_xtal_mux,
+        [1] = &clk_xusbxti,
+        [2] = &clk_sclk_hdmi27m,
+        [6] = &clk_mout_mpll.clk,
+        [7] = &clk_mout_epll.clk,
+        [8] = &clk_sclk_vpll.clk,
+};
+
+static struct clksrc_sources clkset_group = {
+        .sources        = clkset_group_list,
+        .nr_sources     = ARRAY_SIZE(clkset_group_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = 0,
+                        .ctrlbit        = (1 << 0),
+                        .enable         = s5pv310_clk_ip_peril_ctrl,
+                },
+                .sources = &clkset_group,
+                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 },
+        }, {
+                .clk            = {
+                        .name           = "uclk1",
+                        .id             = 1,
+                        .enable         = s5pv310_clk_ip_peril_ctrl,
+                        .ctrlbit        = (1 << 1),
+                },
+                .sources = &clkset_group,
+                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 },
+        }, {
+                .clk            = {
+                        .name           = "uclk1",
+                        .id             = 2,
+                        .enable         = s5pv310_clk_ip_peril_ctrl,
+                        .ctrlbit        = (1 << 2),
+                },
+                .sources = &clkset_group,
+                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 },
+        }, {
+                .clk            = {
+                        .name           = "uclk1",
+                        .id             = 3,
+                        .enable         = s5pv310_clk_ip_peril_ctrl,
+                        .ctrlbit        = (1 << 3),
+                },
+                .sources = &clkset_group,
+                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 },
+        }, {
+                .clk            = {
+                        .name           = "sclk_pwm",
+                        .id             = -1,
+                        .enable         = s5pv310_clk_ip_peril_ctrl,
+                        .ctrlbit        = (1 << 24),
+                },
+                .sources = &clkset_group,
+                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 24, .size = 4 },
+                .reg_div = { .reg = S5P_CLKDIV_PERIL3, .shift = 0, .size = 4 },
+        },
+};
+
+/* Clock initialization code */
+static struct clksrc_clk *sysclks[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+        &clk_moutcore,
+        &clk_coreclk,
+        &clk_armclk,
+        &clk_aclk_corem0,
+        &clk_aclk_cores,
+        &clk_aclk_corem1,
+        &clk_periphclk,
+        &clk_atclk,
+        &clk_pclk_dbg,
+        &clk_mout_corebus,
+        &clk_sclk_dmc,
+        &clk_aclk_cored,
+        &clk_aclk_corep,
+        &clk_aclk_acp,
+        &clk_pclk_acp,
+        &clk_vpllsrc,
+        &clk_sclk_vpll,
+        &clk_aclk_200,
+        &clk_aclk_100,
+        &clk_aclk_160,
+        &clk_aclk_133,
+};
+
+void __init_or_cpufreq s5pv310_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned long epll;
+        unsigned long vpll;
+        unsigned long vpllsrc;
+        unsigned long xtal;
+        unsigned long armclk;
+        unsigned long aclk_corem0;
+        unsigned long aclk_cores;
+        unsigned long aclk_corem1;
+        unsigned long periphclk;
+        unsigned long sclk_dmc;
+        unsigned long aclk_cored;
+        unsigned long aclk_corep;
+        unsigned long aclk_acp;
+        unsigned long pclk_acp;
+        unsigned int ptr;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508);
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508);
+        epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0),
+                                __raw_readl(S5P_EPLL_CON1), pll_4500);
+
+        vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
+        vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
+                                __raw_readl(S5P_VPLL_CON1), pll_4502);
+
+        clk_fout_apll.rate = apll;
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_vpll.rate = vpll;
+
+        printk(KERN_INFO "S5PV310: PLL settings, A=%ld, M=%ld, E=%ld V=%ld",
+                        apll, mpll, epll, vpll);
+
+        armclk = clk_get_rate(&clk_armclk.clk);
+        aclk_corem0 = clk_get_rate(&clk_aclk_corem0.clk);
+        aclk_cores = clk_get_rate(&clk_aclk_cores.clk);
+        aclk_corem1 = clk_get_rate(&clk_aclk_corem1.clk);
+        periphclk = clk_get_rate(&clk_periphclk.clk);
+        sclk_dmc = clk_get_rate(&clk_sclk_dmc.clk);
+        aclk_cored = clk_get_rate(&clk_aclk_cored.clk);
+        aclk_corep = clk_get_rate(&clk_aclk_corep.clk);
+        aclk_acp = clk_get_rate(&clk_aclk_acp.clk);
+        pclk_acp = clk_get_rate(&clk_pclk_acp.clk);
+
+        printk(KERN_INFO "S5PV310: ARMCLK=%ld, COREM0=%ld, CORES=%ld\n"
+                         "COREM1=%ld, PERI=%ld, DMC=%ld, CORED=%ld\n"
+                         "COREP=%ld, ACLK_ACP=%ld, PCLK_ACP=%ld",
+                        armclk, aclk_corem0, aclk_cores, aclk_corem1,
+                        periphclk, sclk_dmc, aclk_cored, aclk_corep,
+                        aclk_acp, pclk_acp);
+
+        clk_f.rate = armclk;
+        clk_h.rate = sclk_dmc;
+        clk_p.rate = periphclk;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+        /* Nothing here yet */
+};
+
+void __init s5pv310_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register %u clocks\n", ret);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
+                s3c_register_clksrc(sysclks[ptr], 1);
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
new file mode 100644
index 000000000000..196c9f12ed85
--- /dev/null
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -0,0 +1,122 @@
+/* linux/arch/arm/mach-s5pv310/cpu.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/sched.h>
+#include <linux/sysdev.h>
+
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+
+#include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/s5pv310.h>
+
+#include <mach/regs-irq.h>
+
+void __iomem *gic_cpu_base_addr;
+
+extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
+                         unsigned int irq_start);
+extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
+
+/* Initial IO mappings */
+static struct map_desc s5pv310_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_COREPERI_BASE,
+                .pfn            = __phys_to_pfn(S5PV310_PA_COREPERI),
+                .length         = SZ_8K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
+                .pfn            = __phys_to_pfn(S5PV310_PA_COMBINER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_L2CC,
+                .pfn            = __phys_to_pfn(S5PV310_PA_L2CC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static void s5pv310_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+/* s5pv310_map_io
+ *
+ * register the standard cpu IO areas
+*/
+void __init s5pv310_map_io(void)
+{
+        iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc));
+}
+
+void __init s5pv310_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5pv310_register_clocks();
+        s5pv310_setup_clocks();
+}
+
+void __init s5pv310_init_irq(void)
+{
+        int irq;
+
+        gic_cpu_base_addr = S5P_VA_GIC_CPU;
+        gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER);
+        gic_cpu_init(0, S5P_VA_GIC_CPU);
+
+        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
+                                COMBINER_IRQ(irq, 0));
+                combiner_cascade_irq(irq, IRQ_SPI(irq));
+        }
+
+        /* The parameters of s5p_init_irq() are for VIC init.
+         * Theses parameters should be NULL and 0 because S5PV310
+         * uses GIC instead of VIC.
+         */
+        s5p_init_irq(NULL, 0);
+}
+
+struct sysdev_class s5pv310_sysclass = {
+        .name   = "s5pv310-core",
+};
+
+static struct sys_device s5pv310_sysdev = {
+        .cls    = &s5pv310_sysclass,
+};
+
+static int __init s5pv310_core_init(void)
+{
+        return sysdev_class_register(&s5pv310_sysclass);
+}
+
+core_initcall(s5pv310_core_init);
+
+int __init s5pv310_init(void)
+{
+        printk(KERN_INFO "S5PV310: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5pv310_idle;
+
+        return sysdev_register(&s5pv310_sysdev);
+}
diff --git a/arch/arm/mach-s5pv310/headsmp.S b/arch/arm/mach-s5pv310/headsmp.S
new file mode 100644
index 000000000000..164b7b045713
--- /dev/null
+++ b/arch/arm/mach-s5pv310/headsmp.S
@@ -0,0 +1,41 @@
+/*
+ *  linux/arch/arm/mach-s5pv310/headsmp.S
+ *
+ *  Cloned from linux/arch/arm/mach-realview/headsmp.S
+ *
+ *  Copyright (c) 2003 ARM Limited
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+
+        __INIT
+
+/*
+ * s5pv310 specific entry point for secondary CPUs.  This provides
+ * a "holding pen" into which all secondary cores are held until we're
+ * ready for them to initialise.
+ */
+ENTRY(s5pv310_secondary_startup)
+        mrc     p15, 0, r0, c0, c0, 5
+        and     r0, r0, #15
+        adr     r4, 1f
+        ldmia   r4, {r5, r6}
+        sub     r4, r4, r5
+        add     r6, r6, r4
+pen:    ldr     r7, [r6]
+        cmp     r7, r0
+        bne     pen
+
+        /*
+         * we've been released from the holding pen: secondary_stack
+         * should now contain the SVC stack for this core
+         */
+        b       secondary_startup
+
+1:      .long   .
+        .long   pen_release
diff --git a/arch/arm/mach-s5pv310/include/mach/debug-macro.S b/arch/arm/mach-s5pv310/include/mach/debug-macro.S
new file mode 100644
index 000000000000..6fb3893486be
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+
+        /* note, for the boot process to work we have to keep the UART
+         * virtual address aligned to an 1MiB boundary for the L1
+         * mapping the head code makes. We keep the UART virtual address
+         * aligned and add in the offset when we load the value here.
+         */
+
+        .macro addruart, rx, tmp
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x10000 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+#define fifo_full fifo_full_s5pv210
+#define fifo_level fifo_level_s5pv210
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5pv310/include/mach/entry-macro.S b/arch/arm/mach-s5pv310/include/mach/entry-macro.S
new file mode 100644
index 000000000000..e600e1d522df
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/entry-macro.S
@@ -0,0 +1,84 @@
+/* arch/arm/mach-s5pv310/include/mach/entry-macro.S
+ *
+ * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for S5PV310 platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+*/
+
+#include <mach/hardware.h>
+#include <asm/hardware/gic.h>
+
+                .macro  disable_fiq
+                .endm
+
+                .macro  get_irqnr_preamble, base, tmp
+                ldr     \base, =gic_cpu_base_addr
+                ldr     \base, [\base]
+                .endm
+
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
+
+                /*
+                 * The interrupt numbering scheme is defined in the
+                 * interrupt controller spec.  To wit:
+                 *
+                 * Interrupts 0-15 are IPI
+                 * 16-28 are reserved
+                 * 29-31 are local.  We allow 30 to be used for the watchdog.
+                 * 32-1020 are global
+                 * 1021-1022 are reserved
+                 * 1023 is "spurious" (no interrupt)
+                 *
+                 * For now, we ignore all local interrupts so only return an interrupt if it's
+                 * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
+                 *
+                 * A simple read from the controller will tell us the number of the highest
+                 * priority enabled interrupt.  We then just need to check whether it is in the
+                 * valid range for an IRQ (30-1020 inclusive).
+                 */
+
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+                ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
+
+                ldr     \tmp, =1021
+
+                bic     \irqnr, \irqstat, #0x1c00
+
+                cmp     \irqnr, #29
+                cmpcc   \irqnr, \irqnr
+                cmpne   \irqnr, \tmp
+                cmpcs   \irqnr, \irqnr
+                addne   \irqnr, \irqnr, #32
+
+                .endm
+
+                /* We assume that irqstat (the raw value of the IRQ acknowledge
+                 * register) is preserved from the macro above.
+                 * If there is an IPI, we immediately signal end of interrupt on the
+                 * controller, since this requires the original irqstat value which
+                 * we won't easily be able to recreate later.
+                 */
+
+                .macro test_for_ipi, irqnr, irqstat, base, tmp
+                bic     \irqnr, \irqstat, #0x1c00
+                cmp     \irqnr, #16
+                strcc   \irqstat, [\base, #GIC_CPU_EOI]
+                cmpcs   \irqnr, \irqnr
+                .endm
+
+                /* As above, this assumes that irqstat and base are preserved.. */
+
+                .macro test_for_ltirq, irqnr, irqstat, base, tmp
+                bic     \irqnr, \irqstat, #0x1c00
+                mov     \tmp, #0
+                cmp     \irqnr, #29
+                moveq   \tmp, #1
+                streq   \irqstat, [\base, #GIC_CPU_EOI]
+                cmp     \tmp, #0
+                .endm
diff --git a/arch/arm/mach-s5pv310/include/mach/gpio.h b/arch/arm/mach-s5pv310/include/mach/gpio.h
new file mode 100644
index 000000000000..20cb80c23466
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/gpio.h
@@ -0,0 +1,135 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/gpio.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* Practically, GPIO banks upto GPZ are the configurable gpio banks */
+
+/* GPIO bank sizes */
+#define S5PV310_GPIO_A0_NR      (8)
+#define S5PV310_GPIO_A1_NR      (6)
+#define S5PV310_GPIO_B_NR       (8)
+#define S5PV310_GPIO_C0_NR      (5)
+#define S5PV310_GPIO_C1_NR      (5)
+#define S5PV310_GPIO_D0_NR      (4)
+#define S5PV310_GPIO_D1_NR      (4)
+#define S5PV310_GPIO_E0_NR      (5)
+#define S5PV310_GPIO_E1_NR      (8)
+#define S5PV310_GPIO_E2_NR      (6)
+#define S5PV310_GPIO_E3_NR      (8)
+#define S5PV310_GPIO_E4_NR      (8)
+#define S5PV310_GPIO_F0_NR      (8)
+#define S5PV310_GPIO_F1_NR      (8)
+#define S5PV310_GPIO_F2_NR      (8)
+#define S5PV310_GPIO_F3_NR      (6)
+#define S5PV310_GPIO_J0_NR      (8)
+#define S5PV310_GPIO_J1_NR      (5)
+#define S5PV310_GPIO_K0_NR      (7)
+#define S5PV310_GPIO_K1_NR      (7)
+#define S5PV310_GPIO_K2_NR      (7)
+#define S5PV310_GPIO_K3_NR      (7)
+#define S5PV310_GPIO_L0_NR      (8)
+#define S5PV310_GPIO_L1_NR      (3)
+#define S5PV310_GPIO_L2_NR      (8)
+#define S5PV310_GPIO_X0_NR      (8)
+#define S5PV310_GPIO_X1_NR      (8)
+#define S5PV310_GPIO_X2_NR      (8)
+#define S5PV310_GPIO_X3_NR      (8)
+#define S5PV310_GPIO_Z_NR       (7)
+
+/* GPIO bank numbers */
+
+#define S5PV310_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5PV310_GPIO_A0_START   = 0,
+        S5PV310_GPIO_A1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_A0),
+        S5PV310_GPIO_B_START    = S5PV310_GPIO_NEXT(S5PV310_GPIO_A1),
+        S5PV310_GPIO_C0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_B),
+        S5PV310_GPIO_C1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_C0),
+        S5PV310_GPIO_D0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_C1),
+        S5PV310_GPIO_D1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_D0),
+        S5PV310_GPIO_E0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_D1),
+        S5PV310_GPIO_E1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_E0),
+        S5PV310_GPIO_E2_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_E1),
+        S5PV310_GPIO_E3_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_E2),
+        S5PV310_GPIO_E4_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_E3),
+        S5PV310_GPIO_F0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_E4),
+        S5PV310_GPIO_F1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_F0),
+        S5PV310_GPIO_F2_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_F1),
+        S5PV310_GPIO_F3_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_F2),
+        S5PV310_GPIO_J0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_F3),
+        S5PV310_GPIO_J1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_J0),
+        S5PV310_GPIO_K0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_J1),
+        S5PV310_GPIO_K1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_K0),
+        S5PV310_GPIO_K2_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_K1),
+        S5PV310_GPIO_K3_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_K2),
+        S5PV310_GPIO_L0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_K3),
+        S5PV310_GPIO_L1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_L0),
+        S5PV310_GPIO_L2_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_L1),
+        S5PV310_GPIO_X0_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_L2),
+        S5PV310_GPIO_X1_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_X0),
+        S5PV310_GPIO_X2_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_X1),
+        S5PV310_GPIO_X3_START   = S5PV310_GPIO_NEXT(S5PV310_GPIO_X2),
+        S5PV310_GPIO_Z_START    = S5PV310_GPIO_NEXT(S5PV310_GPIO_X3),
+};
+
+/* S5PV310 GPIO number definitions */
+#define S5PV310_GPA0(_nr)       (S5PV310_GPIO_A0_START + (_nr))
+#define S5PV310_GPA1(_nr)       (S5PV310_GPIO_A1_START + (_nr))
+#define S5PV310_GPB(_nr)        (S5PV310_GPIO_B_START + (_nr))
+#define S5PV310_GPC0(_nr)       (S5PV310_GPIO_C0_START + (_nr))
+#define S5PV310_GPC1(_nr)       (S5PV310_GPIO_C1_START + (_nr))
+#define S5PV310_GPD0(_nr)       (S5PV310_GPIO_D0_START + (_nr))
+#define S5PV310_GPD1(_nr)       (S5PV310_GPIO_D1_START + (_nr))
+#define S5PV310_GPE0(_nr)       (S5PV310_GPIO_E0_START + (_nr))
+#define S5PV310_GPE1(_nr)       (S5PV310_GPIO_E1_START + (_nr))
+#define S5PV310_GPE2(_nr)       (S5PV310_GPIO_E2_START + (_nr))
+#define S5PV310_GPE3(_nr)       (S5PV310_GPIO_E3_START + (_nr))
+#define S5PV310_GPE4(_nr)       (S5PV310_GPIO_E4_START + (_nr))
+#define S5PV310_GPF0(_nr)       (S5PV310_GPIO_F0_START + (_nr))
+#define S5PV310_GPF1(_nr)       (S5PV310_GPIO_F1_START + (_nr))
+#define S5PV310_GPF2(_nr)       (S5PV310_GPIO_F2_START + (_nr))
+#define S5PV310_GPF3(_nr)       (S5PV310_GPIO_F3_START + (_nr))
+#define S5PV310_GPJ0(_nr)       (S5PV310_GPIO_J0_START + (_nr))
+#define S5PV310_GPJ1(_nr)       (S5PV310_GPIO_J1_START + (_nr))
+#define S5PV310_GPK0(_nr)       (S5PV310_GPIO_K0_START + (_nr))
+#define S5PV310_GPK1(_nr)       (S5PV310_GPIO_K1_START + (_nr))
+#define S5PV310_GPK2(_nr)       (S5PV310_GPIO_K2_START + (_nr))
+#define S5PV310_GPK3(_nr)       (S5PV310_GPIO_K3_START + (_nr))
+#define S5PV310_GPL0(_nr)       (S5PV310_GPIO_L0_START + (_nr))
+#define S5PV310_GPL1(_nr)       (S5PV310_GPIO_L1_START + (_nr))
+#define S5PV310_GPL2(_nr)       (S5PV310_GPIO_L2_START + (_nr))
+#define S5PV310_GPX0(_nr)       (S5PV310_GPIO_X0_START + (_nr))
+#define S5PV310_GPX1(_nr)       (S5PV310_GPIO_X1_START + (_nr))
+#define S5PV310_GPX2(_nr)       (S5PV310_GPIO_X2_START + (_nr))
+#define S5PV310_GPX3(_nr)       (S5PV310_GPIO_X3_START + (_nr))
+#define S5PV310_GPZ(_nr)        (S5PV310_GPIO_Z_START + (_nr))
+
+/* the end of the S5PV310 specific gpios */
+#define S5PV310_GPIO_END        (S5PV310_GPZ(S5PV310_GPIO_Z_NR) + 1)
+#define S3C_GPIO_END            S5PV310_GPIO_END
+
+/* define the number of gpios we need to the one after the GPZ() range */
+#define ARCH_NR_GPIOS           (S5PV310_GPZ(S5PV310_GPIO_Z_NR) +       \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/hardware.h b/arch/arm/mach-s5pv310/include/mach/hardware.h
new file mode 100644
index 000000000000..28ff9881f1a6
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/hardware.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/io.h b/arch/arm/mach-s5pv310/include/mach/io.h
new file mode 100644
index 000000000000..8a7f9128391f
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/io.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/io.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/io.h
+ *
+ * Default IO routines for S5PV310
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H __FILE__
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h
new file mode 100644
index 000000000000..56885ca3773c
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/irqs.h
@@ -0,0 +1,74 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/irqs.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* Private Peripheral Interrupt */
+#define IRQ_PPI(x)              S5P_IRQ(x+16)
+
+#define IRQ_LOCALTIMER          IRQ_PPI(13)
+
+/* Shared Peripheral Interrupt */
+#define IRQ_SPI(x)              S5P_IRQ(x+32)
+
+#define IRQ_EINT0               IRQ_SPI(40)
+#define IRQ_EINT1               IRQ_SPI(41)
+#define IRQ_EINT2               IRQ_SPI(42)
+#define IRQ_EINT3               IRQ_SPI(43)
+#define IRQ_USB_HSOTG           IRQ_SPI(44)
+#define IRQ_USB_HOST            IRQ_SPI(45)
+#define IRQ_MODEM_IF            IRQ_SPI(46)
+#define IRQ_ROTATOR             IRQ_SPI(47)
+#define IRQ_JPEG                IRQ_SPI(48)
+#define IRQ_2D                  IRQ_SPI(49)
+#define IRQ_PCIE                IRQ_SPI(50)
+#define IRQ_SYSTEM_TIMER        IRQ_SPI(51)
+#define IRQ_MFC                 IRQ_SPI(52)
+#define IRQ_WTD                 IRQ_SPI(53)
+#define IRQ_AUDIO_SS            IRQ_SPI(54)
+#define IRQ_AC97                IRQ_SPI(55)
+#define IRQ_SPDIF               IRQ_SPI(56)
+#define IRQ_KEYPAD              IRQ_SPI(57)
+#define IRQ_INTFEEDCTRL_SSS     IRQ_SPI(58)
+#define IRQ_SLIMBUS             IRQ_SPI(59)
+#define IRQ_PMU                 IRQ_SPI(60)
+#define IRQ_TSI                 IRQ_SPI(61)
+#define IRQ_SATA                IRQ_SPI(62)
+#define IRQ_GPS                 IRQ_SPI(63)
+
+#define MAX_IRQ_IN_COMBINER     8
+#define COMBINER_GROUP(x)       ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64))
+#define COMBINER_IRQ(x, y)      (COMBINER_GROUP(x) + y)
+
+#define IRQ_TIMER0_VIC          COMBINER_IRQ(22, 0)
+#define IRQ_TIMER1_VIC          COMBINER_IRQ(22, 1)
+#define IRQ_TIMER2_VIC          COMBINER_IRQ(22, 2)
+#define IRQ_TIMER3_VIC          COMBINER_IRQ(22, 3)
+#define IRQ_TIMER4_VIC          COMBINER_IRQ(22, 4)
+
+#define IRQ_UART0               COMBINER_IRQ(26, 0)
+#define IRQ_UART1               COMBINER_IRQ(26, 1)
+#define IRQ_UART2               COMBINER_IRQ(26, 2)
+#define IRQ_UART3               COMBINER_IRQ(26, 3)
+#define IRQ_UART4               COMBINER_IRQ(26, 4)
+
+#define IRQ_IIC                 COMBINER_IRQ(27, 0)
+
+/* Set the default NR_IRQS */
+#define NR_IRQS                 COMBINER_IRQ(MAX_COMBINER_NR, 0)
+
+#define MAX_COMBINER_NR         39
+
+#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
new file mode 100644
index 000000000000..87697c9fca5b
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -0,0 +1,69 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/map.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+
+/*
+ * S5PV310 UART offset is 0x10000 but the older S5P SoCs are 0x400.
+ * So need to define it, and here is to avoid redefinition warning.
+ */
+#define S3C_UART_OFFSET                 (0x10000)
+
+#include <plat/map-s5p.h>
+
+#define S5PV310_PA_CHIPID               (0x10000000)
+#define S5P_PA_CHIPID                   S5PV310_PA_CHIPID
+
+#define S5PV310_PA_SYSCON               (0x10020000)
+#define S5P_PA_SYSCON                   S5PV310_PA_SYSCON
+
+#define S5PV310_PA_WATCHDOG             (0x10060000)
+
+#define S5PV310_PA_COMBINER             (0x10448000)
+
+#define S5PV310_PA_COREPERI             (0x10500000)
+#define S5PV310_PA_GIC_CPU              (0x10500100)
+#define S5PV310_PA_TWD                  (0x10500600)
+#define S5PV310_PA_GIC_DIST             (0x10501000)
+#define S5PV310_PA_L2CC                 (0x10502000)
+
+#define S5PV310_PA_GPIO                 (0x11000000)
+#define S5P_PA_GPIO                     S5PV310_PA_GPIO
+
+#define S5PV310_PA_UART                 (0x13800000)
+
+#define S5P_PA_UART(x)                  (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART0                    S5P_PA_UART(0)
+#define S5P_PA_UART1                    S5P_PA_UART(1)
+#define S5P_PA_UART2                    S5P_PA_UART(2)
+#define S5P_PA_UART3                    S5P_PA_UART(3)
+#define S5P_PA_UART4                    S5P_PA_UART(4)
+
+#define S5P_SZ_UART                     SZ_256
+
+#define S5PV310_PA_IIC0                 (0x13860000)
+
+#define S5PV310_PA_TIMER                (0x139D0000)
+#define S5P_PA_TIMER                    S5PV310_PA_TIMER
+
+#define S5PV310_PA_SDRAM                (0x40000000)
+#define S5P_PA_SDRAM                    S5PV310_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART                     S5PV310_PA_UART
+#define S3C_PA_IIC                      S5PV310_PA_IIC0
+#define S3C_PA_WDT                      S5PV310_PA_WATCHDOG
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/memory.h b/arch/arm/mach-s5pv310/include/mach/memory.h
new file mode 100644
index 000000000000..1dffb4823245
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/memory.h
@@ -0,0 +1,22 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/memory.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H __FILE__
+
+#define PHYS_OFFSET             UL(0x40000000)
+
+/* Maximum of 256MiB in one bank */
+#define MAX_PHYSMEM_BITS        32
+#define SECTION_SIZE_BITS       28
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/pwm-clock.h b/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..7e6da2701088
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
@@ -0,0 +1,70 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
+ *
+ * S5PV310 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWMCLK_H
+#define __ASM_ARCH_PWMCLK_H __FILE__
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @tcfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C64XX_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << tcfg1;
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 1;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div);
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
+
+#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h
new file mode 100644
index 000000000000..59e3a7e94d80
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h
@@ -0,0 +1,62 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)                   (S3C_VA_SYS + (x))
+
+#define S5P_INFORM0                     S5P_CLKREG(0x800)
+
+#define S5P_EPLL_CON0                   S5P_CLKREG(0x1C110)
+#define S5P_EPLL_CON1                   S5P_CLKREG(0x1C114)
+#define S5P_VPLL_CON0                   S5P_CLKREG(0x1C120)
+#define S5P_VPLL_CON1                   S5P_CLKREG(0x1C124)
+
+#define S5P_CLKSRC_TOP0                 S5P_CLKREG(0x1C210)
+#define S5P_CLKSRC_TOP1                 S5P_CLKREG(0x1C214)
+
+#define S5P_CLKSRC_PERIL0               S5P_CLKREG(0x1C250)
+
+#define S5P_CLKDIV_TOP                  S5P_CLKREG(0x1C510)
+
+#define S5P_CLKDIV_PERIL0               S5P_CLKREG(0x1C550)
+#define S5P_CLKDIV_PERIL1               S5P_CLKREG(0x1C554)
+#define S5P_CLKDIV_PERIL2               S5P_CLKREG(0x1C558)
+#define S5P_CLKDIV_PERIL3               S5P_CLKREG(0x1C55C)
+#define S5P_CLKDIV_PERIL4               S5P_CLKREG(0x1C560)
+#define S5P_CLKDIV_PERIL5               S5P_CLKREG(0x1C564)
+
+#define S5P_CLKGATE_IP_PERIL            S5P_CLKREG(0x1C950)
+
+#define S5P_CLKSRC_CORE                 S5P_CLKREG(0x20200)
+
+#define S5P_CLKDIV_CORE0                S5P_CLKREG(0x20500)
+
+#define S5P_APLL_LOCK                   S5P_CLKREG(0x24000)
+#define S5P_MPLL_LOCK                   S5P_CLKREG(0x24004)
+#define S5P_APLL_CON0                   S5P_CLKREG(0x24100)
+#define S5P_APLL_CON1                   S5P_CLKREG(0x24104)
+#define S5P_MPLL_CON0                   S5P_CLKREG(0x24108)
+#define S5P_MPLL_CON1                   S5P_CLKREG(0x2410C)
+
+#define S5P_CLKSRC_CPU                  S5P_CLKREG(0x24200)
+#define S5P_CLKMUX_STATCPU              S5P_CLKREG(0x24400)
+
+#define S5P_CLKDIV_CPU                  S5P_CLKREG(0x24500)
+#define S5P_CLKDIV_STATCPU              S5P_CLKREG(0x24600)
+
+#define S5P_CLKGATE_SCLKCPU             S5P_CLKREG(0x24800)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-irq.h b/arch/arm/mach-s5pv310/include/mach/regs-irq.h
new file mode 100644
index 000000000000..c6e09c7f9161
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/gic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h
new file mode 100644
index 000000000000..990f3ba88a1f
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/smp.h
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/smp.h
+ *
+ * Cloned from arch/arm/mach-realview/include/mach/smp.h
+*/
+
+#ifndef ASM_ARCH_SMP_H
+#define ASM_ARCH_SMP_H __FILE__
+
+#include <asm/hardware/gic.h>
+
+extern void __iomem *gic_cpu_base_addr;
+
+#define hard_smp_processor_id()                 \
+        ({                                              \
+                unsigned int cpunum;                    \
+                __asm__("mrc p15, 0, %0, c0, c0, 5"     \
+                        : "=r" (cpunum));               \
+                cpunum &= 0x03;                         \
+        })
+
+/*
+ * We use IRQ1 as the IPI
+ */
+static inline void smp_cross_call(const struct cpumask *mask)
+{
+        gic_raise_softirq(mask, 1);
+}
+
+#endif
diff --git a/arch/arm/mach-s5pv310/include/mach/system.h b/arch/arm/mach-s5pv310/include/mach/system.h
new file mode 100644
index 000000000000..d10c009cf0f1
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/system.h
@@ -0,0 +1,22 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/system.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+#include <plat/system-reset.h>
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/timex.h b/arch/arm/mach-s5pv310/include/mach/timex.h
new file mode 100644
index 000000000000..bd2359b952b4
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/timex.h
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/timex.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Copyright (c) 2003-2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/timex.h
+ *
+ * S5PV310 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H __FILE__
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/uncompress.h b/arch/arm/mach-s5pv310/include/mach/uncompress.h
new file mode 100644
index 000000000000..59593c1e2416
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/uncompress.h
@@ -0,0 +1,30 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/uncompress.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV310 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H __FILE__
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+
+        /*
+         * For preventing FIFO overrun or infinite loop of UART console,
+         * fifo_max should be the minimum fifo size of all of the UART channels
+         */
+        fifo_mask = S5PV210_UFSTAT_TXMASK;
+        fifo_max = 15 << S5PV210_UFSTAT_TXSHIFT;
+}
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-s5pv310/include/mach/vmalloc.h
new file mode 100644
index 000000000000..3f565ebb7daa
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S5PV310 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H __FILE__
+
+#define VMALLOC_END       (0xF0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv310/init.c b/arch/arm/mach-s5pv310/init.c
new file mode 100644
index 000000000000..182dcf42cfb4
--- /dev/null
+++ b/arch/arm/mach-s5pv310/init.c
@@ -0,0 +1,41 @@
+/* linux/arch/arm/mach-s5pv310/init.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = {
+        [0] = {
+                .name           = "uclk1",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->has_fracval = 1;
+                        tcfg->clocks = s5pv310_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5pv310_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-s5pv310/irq-combiner.c
new file mode 100644
index 000000000000..0f7052164f23
--- /dev/null
+++ b/arch/arm/mach-s5pv310/irq-combiner.c
@@ -0,0 +1,125 @@
+/* linux/arch/arm/mach-s5pv310/irq-combiner.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Based on arch/arm/common/gic.c
+ *
+ * IRQ COMBINER support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/io.h>
+
+#include <asm/mach/irq.h>
+
+#define COMBINER_ENABLE_SET     0x0
+#define COMBINER_ENABLE_CLEAR   0x4
+#define COMBINER_INT_STATUS     0xC
+
+static DEFINE_SPINLOCK(irq_controller_lock);
+
+struct combiner_chip_data {
+        unsigned int irq_offset;
+        void __iomem *base;
+};
+
+static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
+
+static inline void __iomem *combiner_base(unsigned int irq)
+{
+        struct combiner_chip_data *combiner_data = get_irq_chip_data(irq);
+        return combiner_data->base;
+}
+
+static void combiner_mask_irq(unsigned int irq)
+{
+        u32 mask = 1 << (irq % 32);
+
+        __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR);
+}
+
+static void combiner_unmask_irq(unsigned int irq)
+{
+        u32 mask = 1 << (irq % 32);
+
+        __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET);
+}
+
+static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
+{
+        struct combiner_chip_data *chip_data = get_irq_data(irq);
+        struct irq_chip *chip = get_irq_chip(irq);
+        unsigned int cascade_irq, combiner_irq;
+        unsigned long status;
+
+        /* primary controller ack'ing */
+        chip->ack(irq);
+
+        spin_lock(&irq_controller_lock);
+        status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
+        spin_unlock(&irq_controller_lock);
+
+        if (status == 0)
+                goto out;
+
+        for (combiner_irq = 0; combiner_irq < 32; combiner_irq++) {
+                if (status & 0x1)
+                        break;
+                status >>= 1;
+        }
+
+        cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
+        if (unlikely(cascade_irq >= NR_IRQS))
+                do_bad_IRQ(cascade_irq, desc);
+        else
+                generic_handle_irq(cascade_irq);
+
+ out:
+        /* primary controller unmasking */
+        chip->unmask(irq);
+}
+
+static struct irq_chip combiner_chip = {
+        .name           = "COMBINER",
+        .mask           = combiner_mask_irq,
+        .unmask         = combiner_unmask_irq,
+};
+
+void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
+{
+        if (combiner_nr >= MAX_COMBINER_NR)
+                BUG();
+        if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0)
+                BUG();
+        set_irq_chained_handler(irq, combiner_handle_cascade_irq);
+}
+
+void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
+                          unsigned int irq_start)
+{
+        unsigned int i;
+
+        if (combiner_nr >= MAX_COMBINER_NR)
+                BUG();
+
+        combiner_data[combiner_nr].base = base;
+        combiner_data[combiner_nr].irq_offset = irq_start;
+
+        /* Disable all interrupts */
+
+        __raw_writel(0xffffffff, base + COMBINER_ENABLE_CLEAR);
+
+        /* Setup the Linux IRQ subsystem */
+
+        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
+                                + MAX_IRQ_IN_COMBINER; i++) {
+                set_irq_chip(i, &combiner_chip);
+                set_irq_chip_data(i, &combiner_data[combiner_nr]);
+                set_irq_handler(i, handle_level_irq);
+                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+        }
+}
diff --git a/arch/arm/mach-s5pv310/localtimer.c b/arch/arm/mach-s5pv310/localtimer.c
new file mode 100644
index 000000000000..2784036cd8b1
--- /dev/null
+++ b/arch/arm/mach-s5pv310/localtimer.c
@@ -0,0 +1,25 @@
+/* linux/arch/arm/mach-s5pv310/localtimer.c
+ *
+ * Cloned from linux/arch/arm/mach-realview/localtimer.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/clockchips.h>
+
+#include <asm/irq.h>
+#include <asm/localtimer.h>
+
+/*
+ * Setup the local clock events for a CPU.
+ */
+void __cpuinit local_timer_setup(struct clock_event_device *evt)
+{
+        evt->irq = IRQ_LOCALTIMER;
+        twd_timer_setup(evt);
+}
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c
new file mode 100644
index 000000000000..0d6ab77709d2
--- /dev/null
+++ b/arch/arm/mach-s5pv310/mach-smdkv310.c
@@ -0,0 +1,92 @@
+/* linux/arch/arm/mach-s5pv310/mach-smdkv310.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv310.h>
+#include <plat/cpu.h>
+
+#include <mach/map.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
+
+#define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = SMDKV310_UCON_DEFAULT,
+                .ulcon          = SMDKV310_ULCON_DEFAULT,
+                .ufcon          = SMDKV310_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = SMDKV310_UCON_DEFAULT,
+                .ulcon          = SMDKV310_ULCON_DEFAULT,
+                .ufcon          = SMDKV310_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = SMDKV310_UCON_DEFAULT,
+                .ulcon          = SMDKV310_ULCON_DEFAULT,
+                .ufcon          = SMDKV310_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = SMDKV310_UCON_DEFAULT,
+                .ulcon          = SMDKV310_ULCON_DEFAULT,
+                .ufcon          = SMDKV310_UFCON_DEFAULT,
+        },
+};
+
+static void __init smdkv310_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
+}
+
+static void __init smdkv310_machine_init(void)
+{
+#ifdef CONFIG_CACHE_L2X0
+        l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff);
+#endif
+}
+
+MACHINE_START(SMDKV310, "SMDKV310")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv310_init_irq,
+        .map_io         = smdkv310_map_io,
+        .init_machine   = smdkv310_machine_init,
+        .timer          = &s5pv310_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pv310/mach-universal_c210.c b/arch/arm/mach-s5pv310/mach-universal_c210.c
new file mode 100644
index 000000000000..2388cb947936
--- /dev/null
+++ b/arch/arm/mach-s5pv310/mach-universal_c210.c
@@ -0,0 +1,86 @@
+/* linux/arch/arm/mach-s5pv310/mach-universal_c210.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv310.h>
+#include <plat/cpu.h>
+
+#include <mach/map.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define UNIVERSAL_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
+
+#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG256 |      \
+                                 S5PV210_UFCON_RXTRIG256)
+
+static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .ucon           = UNIVERSAL_UCON_DEFAULT,
+                .ulcon          = UNIVERSAL_ULCON_DEFAULT,
+                .ufcon          = UNIVERSAL_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .ucon           = UNIVERSAL_UCON_DEFAULT,
+                .ulcon          = UNIVERSAL_ULCON_DEFAULT,
+                .ufcon          = UNIVERSAL_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .ucon           = UNIVERSAL_UCON_DEFAULT,
+                .ulcon          = UNIVERSAL_ULCON_DEFAULT,
+                .ufcon          = UNIVERSAL_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .ucon           = UNIVERSAL_UCON_DEFAULT,
+                .ulcon          = UNIVERSAL_ULCON_DEFAULT,
+                .ufcon          = UNIVERSAL_UFCON_DEFAULT,
+        },
+};
+
+static void __init universal_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
+}
+
+static void __init universal_machine_init(void)
+{
+#ifdef CONFIG_CACHE_L2X0
+        l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff);
+#endif
+}
+
+MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
+        /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv310_init_irq,
+        .map_io         = universal_map_io,
+        .init_machine   = universal_machine_init,
+        .timer          = &s5pv310_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c
new file mode 100644
index 000000000000..fe9469abd006
--- /dev/null
+++ b/arch/arm/mach-s5pv310/platsmp.c
@@ -0,0 +1,192 @@
+/* linux/arch/arm/mach-s5pv310/platsmp.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Cloned from linux/arch/arm/mach-vexpress/platsmp.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/jiffies.h>
+#include <linux/smp.h>
+#include <linux/io.h>
+
+#include <asm/cacheflush.h>
+#include <asm/localtimer.h>
+#include <asm/smp_scu.h>
+#include <asm/unified.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-clock.h>
+
+extern void s5pv310_secondary_startup(void);
+
+/*
+ * control for which core is the next to come out of the secondary
+ * boot "holding pen"
+ */
+
+volatile int __cpuinitdata pen_release = -1;
+
+static void __iomem *scu_base_addr(void)
+{
+        return (void __iomem *)(S5P_VA_SCU);
+}
+
+static DEFINE_SPINLOCK(boot_lock);
+
+void __cpuinit platform_secondary_init(unsigned int cpu)
+{
+        trace_hardirqs_off();
+
+        /*
+         * if any interrupts are already enabled for the primary
+         * core (e.g. timer irq), then they will not have been enabled
+         * for us: do so
+         */
+        gic_cpu_init(0, gic_cpu_base_addr);
+
+        /*
+         * let the primary processor know we're out of the
+         * pen, then head off into the C entry point
+         */
+        pen_release = -1;
+        smp_wmb();
+
+        /*
+         * Synchronise with the boot thread.
+         */
+        spin_lock(&boot_lock);
+        spin_unlock(&boot_lock);
+}
+
+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+        unsigned long timeout;
+
+        /*
+         * Set synchronisation state between this boot processor
+         * and the secondary one
+         */
+        spin_lock(&boot_lock);
+
+        /*
+         * The secondary processor is waiting to be released from
+         * the holding pen - release it, then wait for it to flag
+         * that it has been released by resetting pen_release.
+         *
+         * Note that "pen_release" is the hardware CPU ID, whereas
+         * "cpu" is Linux's internal ID.
+         */
+        pen_release = cpu;
+        __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
+        outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
+
+        /*
+         * Send the secondary CPU a soft interrupt, thereby causing
+         * the boot monitor to read the system wide flags register,
+         * and branch to the address found there.
+         */
+        smp_cross_call(cpumask_of(cpu));
+
+        timeout = jiffies + (1 * HZ);
+        while (time_before(jiffies, timeout)) {
+                smp_rmb();
+                if (pen_release == -1)
+                        break;
+
+                udelay(10);
+        }
+
+        /*
+         * now the secondary core is starting up let it run its
+         * calibrations, then wait for it to finish
+         */
+        spin_unlock(&boot_lock);
+
+        return pen_release != -1 ? -ENOSYS : 0;
+}
+
+/*
+ * Initialise the CPU possible map early - this describes the CPUs
+ * which may be present or become present in the system.
+ */
+
+void __init smp_init_cpus(void)
+{
+        void __iomem *scu_base = scu_base_addr();
+        unsigned int i, ncores;
+
+        ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+
+        /* sanity check */
+        if (ncores == 0) {
+                printk(KERN_ERR
+                       "S5PV310: strange CM count of 0? Default to 1\n");
+
+                ncores = 1;
+        }
+
+        if (ncores > NR_CPUS) {
+                printk(KERN_WARNING
+                       "S5PV310: no. of cores (%d) greater than configured "
+                       "maximum of %d - clipping\n",
+                       ncores, NR_CPUS);
+                ncores = NR_CPUS;
+        }
+
+        for (i = 0; i < ncores; i++)
+                set_cpu_possible(i, true);
+}
+
+void __init smp_prepare_cpus(unsigned int max_cpus)
+{
+        unsigned int ncores = num_possible_cpus();
+        unsigned int cpu = smp_processor_id();
+        int i;
+
+        smp_store_cpu_info(cpu);
+
+        /* are we trying to boot more cores than exist? */
+        if (max_cpus > ncores)
+                max_cpus = ncores;
+
+        /*
+         * Initialise the present map, which describes the set of CPUs
+         * actually populated at the present time.
+         */
+        for (i = 0; i < max_cpus; i++)
+                set_cpu_present(i, true);
+
+        /*
+         * Initialise the SCU if there are more than one CPU and let
+         * them know where to start.
+         */
+        if (max_cpus > 1) {
+                /*
+                 * Enable the local timer or broadcast device for the
+                 * boot CPU, but only if we have more than one CPU.
+                 */
+                percpu_timer_setup();
+
+                scu_enable(scu_base_addr());
+
+                /*
+                 * Write the address of secondary startup into the
+                 * system-wide flags register. The boot monitor waits
+                 * until it receives a soft interrupt, and then the
+                 * secondary CPU branches to this address.
+                 */
+        __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_INFORM0);
+        }
+}
diff --git a/arch/arm/mach-s5pv310/setup-i2c0.c b/arch/arm/mach-s5pv310/setup-i2c0.c
new file mode 100644
index 000000000000..436712807383
--- /dev/null
+++ b/arch/arm/mach-s5pv310/setup-i2c0.c
@@ -0,0 +1,28 @@
+/*
+ * linux/arch/arm/mach-s5pv310/setup-i2c0.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * I2C0 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+struct platform_device; /* don't need the contents */
+
+#include <linux/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV310_GPD1(0), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV310_GPD1(0), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV310_GPD1(1), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV310_GPD1(1), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/mach-s5pv310/setup-i2c1.c b/arch/arm/mach-s5pv310/setup-i2c1.c
new file mode 100644
index 000000000000..1ecd5bc35b5a
--- /dev/null
+++ b/arch/arm/mach-s5pv310/setup-i2c1.c
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/arm/mach-s5pv310/setup-i2c1.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co., Ltd.
+ *
+ * I2C1 GPIO configuration.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+struct platform_device; /* don't need the contents */
+
+#include <linux/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV310_GPD1(2), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV310_GPD1(2), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV310_GPD1(3), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV310_GPD1(3), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/mach-s5pv310/setup-i2c2.c b/arch/arm/mach-s5pv310/setup-i2c2.c
new file mode 100644
index 000000000000..4c0d8def660a
--- /dev/null
+++ b/arch/arm/mach-s5pv310/setup-i2c2.c
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/arm/mach-s5pv310/setup-i2c2.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ *
+ * I2C2 GPIO configuration.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+struct platform_device; /* don't need the contents */
+
+#include <linux/gpio.h>
+#include <plat/iic.h>
+#include <plat/gpio-cfg.h>
+
+void s3c_i2c2_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV310_GPA0(6), S3C_GPIO_SFN(3));
+        s3c_gpio_setpull(S5PV310_GPA0(6), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgpin(S5PV310_GPA0(7), S3C_GPIO_SFN(3));
+        s3c_gpio_setpull(S5PV310_GPA0(7), S3C_GPIO_PULL_UP);
+}
diff --git a/arch/arm/mach-s5pv310/time.c b/arch/arm/mach-s5pv310/time.c
new file mode 100644
index 000000000000..01b012ad1bfd
--- /dev/null
+++ b/arch/arm/mach-s5pv310/time.c
@@ -0,0 +1,287 @@
+/* linux/arch/arm/mach-s5pv310/time.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * S5PV310 (and compatible) HRT support
+ * PWM 2/4 is used for this feature
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/platform_device.h>
+
+#include <asm/smp_twd.h>
+
+#include <mach/map.h>
+#include <plat/regs-timer.h>
+#include <asm/mach/time.h>
+
+static unsigned long clock_count_per_tick;
+
+static struct clk *tin2;
+static struct clk *tin4;
+static struct clk *tdiv2;
+static struct clk *tdiv4;
+static struct clk *timerclk;
+
+static void s5pv310_pwm_stop(unsigned int pwm_id)
+{
+        unsigned long tcon;
+
+        tcon = __raw_readl(S3C2410_TCON);
+
+        switch (pwm_id) {
+        case 2:
+                tcon &= ~S3C2410_TCON_T2START;
+                break;
+        case 4:
+                tcon &= ~S3C2410_TCON_T4START;
+                break;
+        default:
+                break;
+        }
+        __raw_writel(tcon, S3C2410_TCON);
+}
+
+static void s5pv310_pwm_init(unsigned int pwm_id, unsigned long tcnt)
+{
+        unsigned long tcon;
+
+        tcon = __raw_readl(S3C2410_TCON);
+
+        /* timers reload after counting zero, so reduce the count by 1 */
+        tcnt--;
+
+        /* ensure timer is stopped... */
+        switch (pwm_id) {
+        case 2:
+                tcon &= ~(0xf<<12);
+                tcon |= S3C2410_TCON_T2MANUALUPD;
+
+                __raw_writel(tcnt, S3C2410_TCNTB(2));
+                __raw_writel(tcnt, S3C2410_TCMPB(2));
+                __raw_writel(tcon, S3C2410_TCON);
+
+                break;
+        case 4:
+                tcon &= ~(7<<20);
+                tcon |= S3C2410_TCON_T4MANUALUPD;
+
+                __raw_writel(tcnt, S3C2410_TCNTB(4));
+                __raw_writel(tcnt, S3C2410_TCMPB(4));
+                __raw_writel(tcon, S3C2410_TCON);
+
+                break;
+        default:
+                break;
+        }
+}
+
+static inline void s5pv310_pwm_start(unsigned int pwm_id, bool periodic)
+{
+        unsigned long tcon;
+
+        tcon  = __raw_readl(S3C2410_TCON);
+
+        switch (pwm_id) {
+        case 2:
+                tcon |= S3C2410_TCON_T2START;
+                tcon &= ~S3C2410_TCON_T2MANUALUPD;
+
+                if (periodic)
+                        tcon |= S3C2410_TCON_T2RELOAD;
+                else
+                        tcon &= ~S3C2410_TCON_T2RELOAD;
+                break;
+        case 4:
+                tcon |= S3C2410_TCON_T4START;
+                tcon &= ~S3C2410_TCON_T4MANUALUPD;
+
+                if (periodic)
+                        tcon |= S3C2410_TCON_T4RELOAD;
+                else
+                        tcon &= ~S3C2410_TCON_T4RELOAD;
+                break;
+        default:
+                break;
+        }
+        __raw_writel(tcon, S3C2410_TCON);
+}
+
+static int s5pv310_pwm_set_next_event(unsigned long cycles,
+                                        struct clock_event_device *evt)
+{
+        s5pv310_pwm_init(2, cycles);
+        s5pv310_pwm_start(2, 0);
+        return 0;
+}
+
+static void s5pv310_pwm_set_mode(enum clock_event_mode mode,
+                                struct clock_event_device *evt)
+{
+        s5pv310_pwm_stop(2);
+
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                s5pv310_pwm_init(2, clock_count_per_tick);
+                s5pv310_pwm_start(2, 1);
+                break;
+        case CLOCK_EVT_MODE_ONESHOT:
+                break;
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_RESUME:
+                break;
+        }
+}
+
+static struct clock_event_device pwm_event_device = {
+        .name           = "pwm_timer2",
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .rating         = 200,
+        .shift          = 32,
+        .set_next_event = s5pv310_pwm_set_next_event,
+        .set_mode       = s5pv310_pwm_set_mode,
+};
+
+irqreturn_t s5pv310_clock_event_isr(int irq, void *dev_id)
+{
+        struct clock_event_device *evt = &pwm_event_device;
+
+        evt->event_handler(evt);
+
+        return IRQ_HANDLED;
+}
+
+static struct irqaction s5pv310_clock_event_irq = {
+        .name           = "pwm_timer2_irq",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .handler        = s5pv310_clock_event_isr,
+};
+
+static void __init s5pv310_clockevent_init(void)
+{
+        unsigned long pclk;
+        unsigned long clock_rate;
+        struct clk *tscaler;
+
+        pclk = clk_get_rate(timerclk);
+
+        /* configure clock tick */
+
+        tscaler = clk_get_parent(tdiv2);
+
+        clk_set_rate(tscaler, pclk / 2);
+        clk_set_rate(tdiv2, pclk / 2);
+        clk_set_parent(tin2, tdiv2);
+
+        clock_rate = clk_get_rate(tin2);
+
+        clock_count_per_tick = clock_rate / HZ;
+
+        pwm_event_device.mult =
+                div_sc(clock_rate, NSEC_PER_SEC, pwm_event_device.shift);
+        pwm_event_device.max_delta_ns =
+                clockevent_delta2ns(-1, &pwm_event_device);
+        pwm_event_device.min_delta_ns =
+                clockevent_delta2ns(1, &pwm_event_device);
+
+        pwm_event_device.cpumask = cpumask_of(0);
+        clockevents_register_device(&pwm_event_device);
+
+        setup_irq(IRQ_TIMER2, &s5pv310_clock_event_irq);
+}
+
+static cycle_t s5pv310_pwm4_read(struct clocksource *cs)
+{
+        return (cycle_t) ~__raw_readl(S3C_TIMERREG(0x40));
+}
+
+struct clocksource pwm_clocksource = {
+        .name           = "pwm_timer4",
+        .rating         = 250,
+        .read           = s5pv310_pwm4_read,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .shift          = 20,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS ,
+};
+
+static void __init s5pv310_clocksource_init(void)
+{
+        unsigned long pclk;
+        unsigned long clock_rate;
+
+        pclk = clk_get_rate(timerclk);
+
+        clk_set_rate(tdiv4, pclk / 2);
+        clk_set_parent(tin4, tdiv4);
+
+        clock_rate = clk_get_rate(tin4);
+
+        s5pv310_pwm_init(4, ~0);
+        s5pv310_pwm_start(4, 1);
+
+        pwm_clocksource.mult =
+                clocksource_khz2mult(clock_rate/1000, pwm_clocksource.shift);
+
+        if (clocksource_register(&pwm_clocksource))
+                panic("%s: can't register clocksource\n", pwm_clocksource.name);
+}
+
+static void __init s5pv310_timer_resources(void)
+{
+        struct platform_device tmpdev;
+
+        tmpdev.dev.bus = &platform_bus_type;
+
+        timerclk = clk_get(NULL, "timers");
+        if (IS_ERR(timerclk))
+                panic("failed to get timers clock for system timer");
+
+        clk_enable(timerclk);
+
+        tmpdev.id = 2;
+        tin2 = clk_get(&tmpdev.dev, "pwm-tin");
+        if (IS_ERR(tin2))
+                panic("failed to get pwm-tin2 clock for system timer");
+
+        tdiv2 = clk_get(&tmpdev.dev, "pwm-tdiv");
+        if (IS_ERR(tdiv2))
+                panic("failed to get pwm-tdiv2 clock for system timer");
+        clk_enable(tin2);
+
+        tmpdev.id = 4;
+        tin4 = clk_get(&tmpdev.dev, "pwm-tin");
+        if (IS_ERR(tin4))
+                panic("failed to get pwm-tin4 clock for system timer");
+
+        tdiv4 = clk_get(&tmpdev.dev, "pwm-tdiv");
+        if (IS_ERR(tdiv4))
+                panic("failed to get pwm-tdiv4 clock for system timer");
+
+        clk_enable(tin4);
+}
+
+static void __init s5pv310_timer_init(void)
+{
+#ifdef CONFIG_LOCAL_TIMERS
+        twd_base = S5P_VA_TWD;
+#endif
+
+        s5pv310_timer_resources();
+        s5pv310_clockevent_init();
+        s5pv310_clocksource_init();
+}
+
+struct sys_timer s5pv310_timer = {
+        .init           = s5pv310_timer_init,
+};
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h
index 8c8845b5ae5b..d18f21abef80 100644
--- a/arch/arm/mach-sa1100/include/mach/irqs.h
+++ b/arch/arm/mach-sa1100/include/mach/irqs.h
@@ -77,7 +77,7 @@
  */
 #ifdef CONFIG_SA1111
 #define NR_IRQS                 (IRQ_BOARD_END + 55)
-#elif defined(CONFIG_SHARPSL_LOCOMO)
+#elif defined(CONFIG_SHARP_LOCOMO)
 #define NR_IRQS                 (IRQ_BOARD_START + 4)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 4c704b4e8b34..54b479c35ee0 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -7,6 +7,7 @@ config ARCH_SH7367
         select CPU_V6
         select HAVE_CLK
         select COMMON_CLKDEV
+        select SH_CLK_CPG
         select GENERIC_CLOCKEVENTS
 
 config ARCH_SH7377
@@ -14,6 +15,7 @@ config ARCH_SH7377
         select CPU_V7
         select HAVE_CLK
         select COMMON_CLKDEV
+        select SH_CLK_CPG
         select GENERIC_CLOCKEVENTS
 
 config ARCH_SH7372
@@ -21,6 +23,7 @@ config ARCH_SH7372
         select CPU_V7
         select HAVE_CLK
         select COMMON_CLKDEV
+        select SH_CLK_CPG
         select GENERIC_CLOCKEVENTS
 
 comment "SH-Mobile Board Type"
@@ -39,6 +42,20 @@ config MACH_AP4EVB
         bool "AP4EVB board"
         depends on ARCH_SH7372
         select ARCH_REQUIRE_GPIOLIB
+        select SH_LCD_MIPI_DSI
+
+choice
+        prompt "AP4EVB LCD panel selection"
+        default AP4EVB_QHD
+        depends on MACH_AP4EVB
+
+config AP4EVB_QHD
+        bool "MIPI-DSI QHD (960x540)"
+
+config AP4EVB_WVGA
+        bool "Parallel WVGA (800x480)"
+
+endchoice
 
 comment "SH-Mobile System Configuration"
 
@@ -88,6 +105,15 @@ config SH_TIMER_CMT
         help
           This enables build of the CMT timer driver.
 
+config SH_TIMER_TMU
+        bool "TMU timer driver"
+        default y
+        help
+          This enables build of the TMU timer driver.
+
 endmenu
 
+config SH_CLK_CPG
+        bool
+
 endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 6d385d371c33..5e16b4c69222 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,12 +3,12 @@
 #
 
 # Common objects
-obj-y                           := timer.o console.o
+obj-y                           := timer.o console.o clock.o
 
 # CPU objects
 obj-$(CONFIG_ARCH_SH7367)       += setup-sh7367.o clock-sh7367.o intc-sh7367.o
-obj-$(CONFIG_ARCH_SH7377)       += setup-sh7377.o clock-sh7367.o intc-sh7377.o
-obj-$(CONFIG_ARCH_SH7372)       += setup-sh7372.o clock-sh7367.o intc-sh7372.o
+obj-$(CONFIG_ARCH_SH7377)       += setup-sh7377.o clock-sh7377.o intc-sh7377.o
+obj-$(CONFIG_ARCH_SH7372)       += setup-sh7372.o clock-sh7372.o intc-sh7372.o
 
 # Pinmux setup
 pfc-$(CONFIG_ARCH_SH7367)       := pfc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 1c2ec96ce261..23d472f9525e 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -17,25 +17,45 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
+#include <linux/clk.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
+#include <linux/mmc/host.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
+#include <linux/i2c.h>
+#include <linux/i2c/tsc2007.h>
 #include <linux/io.h>
 #include <linux/smsc911x.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_clk.h>
 #include <linux/gpio.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
+#include <linux/usb/r8a66597.h>
+
+#include <sound/sh_fsi.h>
+
+#include <video/sh_mobile_hdmi.h>
+#include <video/sh_mobile_lcdc.h>
+#include <video/sh_mipi_dsi.h>
+
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/time.h>
 
 /*
  * Address      Interface               BusWidth        note
@@ -80,12 +100,56 @@
  */
 
 /*
- * KEYSC
+ * LCD / IRQ / KEYSC / IrDA
+ *
+ * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
+ * LCD = 2nd LCDC (WVGA)
  *
- * SW43         KEYSC
- * -------------------------
- * ON           enable
- * OFF          disable
+ *              |               SW43                    |
+ * SW3          |       ON              |       OFF     |
+ * -------------+-----------------------+---------------+
+ * ON           | KEY / IrDA            | LCD           |
+ * OFF          | KEY / IrDA / IRQ      | IRQ           |
+ *
+ *
+ * QHD / WVGA display
+ *
+ * You can choice display type on menuconfig.
+ * Then, check above dip-switch.
+ */
+
+/*
+ * USB
+ *
+ * J7 : 1-2  MAX3355E VBUS
+ *      2-3  DC 5.0V
+ *
+ * S39: bit2: off
+ */
+
+/*
+ * FSI/FSMI
+ *
+ * SW41 :  ON : SH-Mobile AP4 Audio Mode
+ *      : OFF : Bluetooth Audio Mode
+ */
+
+/*
+ * MMC0/SDHI1 (CN7)
+ *
+ * J22 : select card voltage
+ *       1-2 pin : 1.8v
+ *       2-3 pin : 3.3v
+ *
+ *        SW1  |             SW33
+ *             | bit1 | bit2 | bit3 | bit4
+ * ------------+------+------+------+-------
+ * MMC0   OFF  |  OFF |  ON  |  ON  |  X
+ * SDHI1  OFF  |  ON  |   X  |  OFF | ON
+ *
+ * voltage lebel
+ * CN7 : 1.8v
+ * CN12: 3.3v
  */
 
 /* MTD */
@@ -148,7 +212,7 @@ static struct resource smc911x_resources[] = {
                 .end    = 0x16000000 - 1,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = 6,
+                .start  = evt2irq(0x02c0) /* IRQ6A */,
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
         },
 };
@@ -169,6 +233,180 @@ static struct platform_device smc911x_device = {
         },
 };
 
+/* SH_MMCIF */
+static struct resource sh_mmcif_resources[] = {
+        [0] = {
+                .name   = "SH_MMCIF",
+                .start  = 0xE6BD0000,
+                .end    = 0xE6BD00FF,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* MMC ERR */
+                .start  = evt2irq(0x1ac0),
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* MMC NOR */
+                .start  = evt2irq(0x1ae0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct sh_mmcif_plat_data sh_mmcif_plat = {
+        .sup_pclk       = 0,
+        .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+        .caps           = MMC_CAP_4_BIT_DATA |
+                          MMC_CAP_8_BIT_DATA |
+                          MMC_CAP_NEEDS_POLL,
+};
+
+static struct platform_device sh_mmcif_device = {
+        .name           = "sh_mmcif",
+        .id             = 0,
+        .dev            = {
+                .dma_mask               = NULL,
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &sh_mmcif_plat,
+        },
+        .num_resources  = ARRAY_SIZE(sh_mmcif_resources),
+        .resource       = sh_mmcif_resources,
+};
+
+/* SDHI0 */
+static struct sh_mobile_sdhi_info sdhi0_info = {
+        .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
+        .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
+};
+
+static struct resource sdhi0_resources[] = {
+        [0] = {
+                .name   = "SDHI0",
+                .start  = 0xe6850000,
+                .end    = 0xe68501ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x0e00) /* SDHI0 */,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device sdhi0_device = {
+        .name           = "sh_mobile_sdhi",
+        .num_resources  = ARRAY_SIZE(sdhi0_resources),
+        .resource       = sdhi0_resources,
+        .id             = 0,
+        .dev    = {
+                .platform_data  = &sdhi0_info,
+        },
+};
+
+/* SDHI1 */
+static struct sh_mobile_sdhi_info sdhi1_info = {
+        .dma_slave_tx   = SHDMA_SLAVE_SDHI1_TX,
+        .dma_slave_rx   = SHDMA_SLAVE_SDHI1_RX,
+        .tmio_ocr_mask  = MMC_VDD_165_195,
+};
+
+static struct resource sdhi1_resources[] = {
+        [0] = {
+                .name   = "SDHI1",
+                .start  = 0xe6860000,
+                .end    = 0xe68601ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x0e80),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device sdhi1_device = {
+        .name           = "sh_mobile_sdhi",
+        .num_resources  = ARRAY_SIZE(sdhi1_resources),
+        .resource       = sdhi1_resources,
+        .id             = 1,
+        .dev    = {
+                .platform_data  = &sdhi1_info,
+        },
+};
+
+/* USB1 */
+static void usb1_host_port_power(int port, int power)
+{
+        if (!power) /* only power-on supported for now */
+                return;
+
+        /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
+        __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
+}
+
+static struct r8a66597_platdata usb1_host_data = {
+        .on_chip        = 1,
+        .port_power     = usb1_host_port_power,
+};
+
+static struct resource usb1_host_resources[] = {
+        [0] = {
+                .name   = "USBHS",
+                .start  = 0xE68B0000,
+                .end    = 0xE68B00E6 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x1ce0) /* USB1_USB1I0 */,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb1_host_device = {
+        .name   = "r8a66597_hcd",
+        .id     = 1,
+        .dev = {
+                .dma_mask               = NULL,         /*  not use dma */
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &usb1_host_data,
+        },
+        .num_resources  = ARRAY_SIZE(usb1_host_resources),
+        .resource       = usb1_host_resources,
+};
+
+static struct sh_mobile_lcdc_info lcdc_info = {
+        .ch[0] = {
+                .chan = LCDC_CHAN_MAINLCD,
+                .bpp = 16,
+        }
+};
+
+static struct resource lcdc_resources[] = {
+        [0] = {
+                .name   = "LCDC",
+                .start  = 0xfe940000, /* P4-only space */
+                .end    = 0xfe943fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0x580),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device lcdc_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(lcdc_resources),
+        .resource       = lcdc_resources,
+        .dev    = {
+                .platform_data  = &lcdc_info,
+                .coherent_dma_mask = ~0,
+        },
+};
+
+/*
+ * QHD display
+ */
+#ifdef CONFIG_AP4EVB_QHD
+
 /* KEYSC (Needs SW43 set to ON) */
 static struct sh_keysc_info keysc_info = {
         .mode           = SH_KEYSC_MODE_1,
@@ -191,7 +429,7 @@ static struct resource keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 79,
+                .start  = evt2irq(0x0be0), /* KEYSC_KEY */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -206,32 +444,362 @@ static struct platform_device keysc_device = {
         },
 };
 
-/* SDHI0 */
-static struct resource sdhi0_resources[] = {
+/* MIPI-DSI */
+static struct resource mipidsi0_resources[] = {
         [0] = {
-                .name   = "SDHI0",
-                .start  = 0xe6850000,
-                .end    = 0xe68501ff,
+                .start  = 0xffc60000,
+                .end    = 0xffc68fff,
                 .flags  = IORESOURCE_MEM,
         },
+};
+
+static struct sh_mipi_dsi_info mipidsi0_info = {
+        .data_format    = MIPI_RGB888,
+        .lcd_chan       = &lcdc_info.ch[0],
+};
+
+static struct platform_device mipidsi0_device = {
+        .name           = "sh-mipi-dsi",
+        .num_resources  = ARRAY_SIZE(mipidsi0_resources),
+        .resource       = mipidsi0_resources,
+        .id             = 0,
+        .dev    = {
+                .platform_data  = &mipidsi0_info,
+        },
+};
+
+/* This function will disappear when we switch to (runtime) PM */
+static int __init ap4evb_init_display_clk(void)
+{
+        struct clk *lcdc_clk;
+        struct clk *dsitx_clk;
+        int ret;
+
+        lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
+        if (IS_ERR(lcdc_clk))
+                return PTR_ERR(lcdc_clk);
+
+        dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
+        if (IS_ERR(dsitx_clk)) {
+                ret = PTR_ERR(dsitx_clk);
+                goto eclkdsitxget;
+        }
+
+        ret = clk_enable(lcdc_clk);
+        if (ret < 0)
+                goto eclklcdcon;
+
+        ret = clk_enable(dsitx_clk);
+        if (ret < 0)
+                goto eclkdsitxon;
+
+        return 0;
+
+eclkdsitxon:
+        clk_disable(lcdc_clk);
+eclklcdcon:
+        clk_put(dsitx_clk);
+eclkdsitxget:
+        clk_put(lcdc_clk);
+
+        return ret;
+}
+device_initcall(ap4evb_init_display_clk);
+
+static struct platform_device *qhd_devices[] __initdata = {
+        &mipidsi0_device,
+        &keysc_device,
+};
+#endif /* CONFIG_AP4EVB_QHD */
+
+/* FSI */
+#define IRQ_FSI         evt2irq(0x1840)
+#define FSIACKCR        0xE6150018
+static void fsiackcr_init(struct clk *clk)
+{
+        u32 status = __raw_readl(clk->enable_reg);
+
+        /* use external clock */
+        status &= ~0x000000ff;
+        status |= 0x00000080;
+        __raw_writel(status, clk->enable_reg);
+}
+
+static struct clk_ops fsiackcr_clk_ops = {
+        .init = fsiackcr_init,
+};
+
+static struct clk fsiackcr_clk = {
+        .ops            = &fsiackcr_clk_ops,
+        .enable_reg     = (void __iomem *)FSIACKCR,
+        .rate           = 0, /* unknown */
+};
+
+static struct sh_fsi_platform_info fsi_info = {
+        .porta_flags = SH_FSI_BRS_INV |
+                       SH_FSI_OUT_SLAVE_MODE |
+                       SH_FSI_IN_SLAVE_MODE |
+                       SH_FSI_OFMT(PCM) |
+                       SH_FSI_IFMT(PCM),
+};
+
+static struct resource fsi_resources[] = {
+        [0] = {
+                .name   = "FSI",
+                .start  = 0xFE3C0000,
+                .end    = 0xFE3C0400 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
         [1] = {
-                .start  = 96,
+                .start  = IRQ_FSI,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-static struct platform_device sdhi0_device = {
-        .name           = "sh_mobile_sdhi",
-        .num_resources  = ARRAY_SIZE(sdhi0_resources),
-        .resource       = sdhi0_resources,
-        .id             = 0,
+static struct platform_device fsi_device = {
+        .name           = "sh_fsi2",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(fsi_resources),
+        .resource       = fsi_resources,
+        .dev    = {
+                .platform_data  = &fsi_info,
+        },
+};
+
+static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
+        .clock_source = LCDC_CLK_EXTERNAL,
+        .ch[0] = {
+                .chan = LCDC_CHAN_MAINLCD,
+                .bpp = 16,
+                .interface_type = RGB24,
+                .clock_divider = 1,
+                .flags = LCDC_FLAGS_DWPOL,
+                .lcd_cfg = {
+                        .name = "HDMI",
+                        /* So far only 720p is supported */
+                        .xres = 1280,
+                        .yres = 720,
+                        /*
+                         * If left and right margins are not multiples of 8,
+                         * LDHAJR will be adjusted accordingly by the LCDC
+                         * driver. Until we start using EDID, these values
+                         * might have to be adjusted for different monitors.
+                         */
+                        .left_margin = 200,
+                        .right_margin = 88,
+                        .hsync_len = 48,
+                        .upper_margin = 20,
+                        .lower_margin = 5,
+                        .vsync_len = 5,
+                        .pixclock = 13468,
+                        .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+                },
+        }
+};
+
+static struct resource lcdc1_resources[] = {
+        [0] = {
+                .name   = "LCDC1",
+                .start  = 0xfe944000,
+                .end    = 0xfe947fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0x17a0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device lcdc1_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(lcdc1_resources),
+        .resource       = lcdc1_resources,
+        .id             = 1,
+        .dev    = {
+                .platform_data  = &sh_mobile_lcdc1_info,
+                .coherent_dma_mask = ~0,
+        },
+};
+
+static struct sh_mobile_hdmi_info hdmi_info = {
+        .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
+        .lcd_dev = &lcdc1_device.dev,
+};
+
+static struct resource hdmi_resources[] = {
+        [0] = {
+                .name   = "HDMI",
+                .start  = 0xe6be0000,
+                .end    = 0xe6be00ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
+                .start  = evt2irq(0x17e0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device hdmi_device = {
+        .name           = "sh-mobile-hdmi",
+        .num_resources  = ARRAY_SIZE(hdmi_resources),
+        .resource       = hdmi_resources,
+        .id             = -1,
+        .dev    = {
+                .platform_data  = &hdmi_info,
+        },
 };
 
 static struct platform_device *ap4evb_devices[] __initdata = {
         &nor_flash_device,
         &smc911x_device,
-        &keysc_device,
         &sdhi0_device,
+        &sdhi1_device,
+        &usb1_host_device,
+        &fsi_device,
+        &sh_mmcif_device,
+        &lcdc1_device,
+        &lcdc_device,
+        &hdmi_device,
+};
+
+static int __init hdmi_init_pm_clock(void)
+{
+        struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
+        int ret;
+        long rate;
+
+        if (IS_ERR(hdmi_ick)) {
+                ret = PTR_ERR(hdmi_ick);
+                pr_err("Cannot get HDMI ICK: %d\n", ret);
+                goto out;
+        }
+
+        ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk);
+        if (ret < 0) {
+                pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount);
+                goto out;
+        }
+
+        pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk));
+
+        rate = clk_round_rate(&pllc2_clk, 594000000);
+        if (rate < 0) {
+                pr_err("Cannot get suitable rate: %ld\n", rate);
+                ret = rate;
+                goto out;
+        }
+
+        ret = clk_set_rate(&pllc2_clk, rate);
+        if (ret < 0) {
+                pr_err("Cannot set rate %ld: %d\n", rate, ret);
+                goto out;
+        }
+
+        pr_debug("PLLC2 set frequency %lu\n", rate);
+
+        ret = clk_set_parent(hdmi_ick, &pllc2_clk);
+        if (ret < 0) {
+                pr_err("Cannot set HDMI parent: %d\n", ret);
+                goto out;
+        }
+
+out:
+        if (!IS_ERR(hdmi_ick))
+                clk_put(hdmi_ick);
+        return ret;
+}
+
+device_initcall(hdmi_init_pm_clock);
+
+/*
+ * FIXME !!
+ *
+ * gpio_no_direction
+ * gpio_pull_up
+ * are quick_hack.
+ *
+ * current gpio frame work doesn't have
+ * the method to control only pull up/down/free.
+ * this function should be replaced by correct gpio function
+ */
+static void __init gpio_no_direction(u32 addr)
+{
+        __raw_writeb(0x00, addr);
+}
+
+static void __init gpio_pull_up(u32 addr)
+{
+        u8 data = __raw_readb(addr);
+
+        data &= 0x0F;
+        data |= 0xC0;
+        __raw_writeb(data, addr);
+}
+
+/* TouchScreen */
+#define IRQ28   evt2irq(0x3380) /* IRQ28A */
+#define IRQ7    evt2irq(0x02e0) /* IRQ7A */
+static int ts_get_pendown_state(void)
+{
+        int val1, val2;
+
+        gpio_free(GPIO_FN_IRQ28_123);
+        gpio_free(GPIO_FN_IRQ7_40);
+
+        gpio_request(GPIO_PORT123, NULL);
+        gpio_request(GPIO_PORT40, NULL);
+
+        gpio_direction_input(GPIO_PORT123);
+        gpio_direction_input(GPIO_PORT40);
+
+        val1 = gpio_get_value(GPIO_PORT123);
+        val2 = gpio_get_value(GPIO_PORT40);
+
+        gpio_request(GPIO_FN_IRQ28_123, NULL);  /* for QHD */
+        gpio_request(GPIO_FN_IRQ7_40, NULL);    /* for WVGA */
+
+        return val1 ^ val2;
+}
+
+#define PORT40CR        0xE6051028
+#define PORT123CR       0xE605007B
+static int ts_init(void)
+{
+        gpio_request(GPIO_FN_IRQ28_123, NULL);  /* for QHD */
+        gpio_request(GPIO_FN_IRQ7_40, NULL);    /* for WVGA */
+
+        gpio_pull_up(PORT40CR);
+        gpio_pull_up(PORT123CR);
+
+        return 0;
+}
+
+static struct tsc2007_platform_data tsc2007_info = {
+        .model                  = 2007,
+        .x_plate_ohms           = 180,
+        .get_pendown_state      = ts_get_pendown_state,
+        .init_platform_hw       = ts_init,
+};
+
+static struct i2c_board_info tsc_device = {
+        I2C_BOARD_INFO("tsc2007", 0x48),
+        .type           = "tsc2007",
+        .platform_data  = &tsc2007_info,
+        /*.irq is selected on ap4evb_init */
+};
+
+/* I2C */
+static struct i2c_board_info i2c0_devices[] = {
+        {
+                I2C_BOARD_INFO("ak4643", 0x13),
+        },
+};
+
+static struct i2c_board_info i2c1_devices[] = {
+        {
+                I2C_BOARD_INFO("r2025sd", 0x32),
+        },
 };
 
 static struct map_desc ap4evb_io_desc[] __initdata = {
@@ -250,14 +818,18 @@ static void __init ap4evb_map_io(void)
 {
         iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
 
-        /* setup early devices, clocks and console here as well */
+        /* setup early devices and console here as well */
         sh7372_add_early_devices();
-        sh7367_clock_init(); /* use g3 clocks for now */
         shmobile_setup_console();
 }
 
+#define GPIO_PORT9CR    0xE6051009
+#define GPIO_PORT10CR   0xE605100A
 static void __init ap4evb_init(void)
 {
+        u32 srcr4;
+        struct clk *clk;
+
         sh7372_pinmux_init();
 
         /* enable SCIFA0 */
@@ -296,6 +868,93 @@ static void __init ap4evb_init(void)
         gpio_export(GPIO_PORT34, 0);
         gpio_export(GPIO_PORT35, 0);
 
+        /* SDHI0 */
+        gpio_request(GPIO_FN_SDHICD0, NULL);
+        gpio_request(GPIO_FN_SDHIWP0, NULL);
+        gpio_request(GPIO_FN_SDHICMD0, NULL);
+        gpio_request(GPIO_FN_SDHICLK0, NULL);
+        gpio_request(GPIO_FN_SDHID0_3, NULL);
+        gpio_request(GPIO_FN_SDHID0_2, NULL);
+        gpio_request(GPIO_FN_SDHID0_1, NULL);
+        gpio_request(GPIO_FN_SDHID0_0, NULL);
+
+        /* SDHI1 */
+        gpio_request(GPIO_FN_SDHICMD1, NULL);
+        gpio_request(GPIO_FN_SDHICLK1, NULL);
+        gpio_request(GPIO_FN_SDHID1_3, NULL);
+        gpio_request(GPIO_FN_SDHID1_2, NULL);
+        gpio_request(GPIO_FN_SDHID1_1, NULL);
+        gpio_request(GPIO_FN_SDHID1_0, NULL);
+
+        /* MMCIF */
+        gpio_request(GPIO_FN_MMCD0_0, NULL);
+        gpio_request(GPIO_FN_MMCD0_1, NULL);
+        gpio_request(GPIO_FN_MMCD0_2, NULL);
+        gpio_request(GPIO_FN_MMCD0_3, NULL);
+        gpio_request(GPIO_FN_MMCD0_4, NULL);
+        gpio_request(GPIO_FN_MMCD0_5, NULL);
+        gpio_request(GPIO_FN_MMCD0_6, NULL);
+        gpio_request(GPIO_FN_MMCD0_7, NULL);
+        gpio_request(GPIO_FN_MMCCMD0, NULL);
+        gpio_request(GPIO_FN_MMCCLK0, NULL);
+
+        /* USB enable */
+        gpio_request(GPIO_FN_VBUS0_1,    NULL);
+        gpio_request(GPIO_FN_IDIN_1_18,  NULL);
+        gpio_request(GPIO_FN_PWEN_1_115, NULL);
+        gpio_request(GPIO_FN_OVCN_1_114, NULL);
+        gpio_request(GPIO_FN_EXTLP_1,    NULL);
+        gpio_request(GPIO_FN_OVCN2_1,    NULL);
+
+        /* setup USB phy */
+        __raw_writew(0x8a0a, 0xE6058130);       /* USBCR2 */
+
+        /* enable FSI2 */
+        gpio_request(GPIO_FN_FSIAIBT,   NULL);
+        gpio_request(GPIO_FN_FSIAILR,   NULL);
+        gpio_request(GPIO_FN_FSIAISLD,  NULL);
+        gpio_request(GPIO_FN_FSIAOSLD,  NULL);
+        gpio_request(GPIO_PORT161,      NULL);
+        gpio_direction_output(GPIO_PORT161, 0); /* slave */
+
+        gpio_request(GPIO_PORT9, NULL);
+        gpio_request(GPIO_PORT10, NULL);
+        gpio_no_direction(GPIO_PORT9CR);  /* FSIAOBT needs no direction */
+        gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
+
+        /* set SPU2 clock to 119.6 MHz */
+        clk = clk_get(NULL, "spu_clk");
+        if (!IS_ERR(clk)) {
+                clk_set_rate(clk, clk_round_rate(clk, 119600000));
+                clk_put(clk);
+        }
+
+        /* change parent of FSI A */
+        clk = clk_get(NULL, "fsia_clk");
+        if (!IS_ERR(clk)) {
+                clk_register(&fsiackcr_clk);
+                clk_set_parent(clk, &fsiackcr_clk);
+                clk_put(clk);
+        }
+
+        /*
+         * set irq priority, to avoid sound chopping
+         * when NFS rootfs is used
+         *  FSI(3) > SMSC911X(2)
+         */
+        intc_set_priority(IRQ_FSI, 3);
+
+        i2c_register_board_info(0, i2c0_devices,
+                                ARRAY_SIZE(i2c0_devices));
+
+        i2c_register_board_info(1, i2c1_devices,
+                                ARRAY_SIZE(i2c1_devices));
+
+#ifdef CONFIG_AP4EVB_QHD
+        /*
+         * QHD
+         */
+
         /* enable KEYSC */
         gpio_request(GPIO_FN_KEYOUT0, NULL);
         gpio_request(GPIO_FN_KEYOUT1, NULL);
@@ -308,26 +967,122 @@ static void __init ap4evb_init(void)
         gpio_request(GPIO_FN_KEYIN3_133, NULL);
         gpio_request(GPIO_FN_KEYIN4,     NULL);
 
-        /* SDHI0 */
-        gpio_request(GPIO_FN_SDHICD0, NULL);
-        gpio_request(GPIO_FN_SDHIWP0, NULL);
-        gpio_request(GPIO_FN_SDHICMD0, NULL);
-        gpio_request(GPIO_FN_SDHICLK0, NULL);
-        gpio_request(GPIO_FN_SDHID0_3, NULL);
-        gpio_request(GPIO_FN_SDHID0_2, NULL);
-        gpio_request(GPIO_FN_SDHID0_1, NULL);
-        gpio_request(GPIO_FN_SDHID0_0, NULL);
+        /* enable TouchScreen */
+        set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
+
+        tsc_device.irq = IRQ28;
+        i2c_register_board_info(1, &tsc_device, 1);
+
+        /* LCDC0 */
+        lcdc_info.clock_source                  = LCDC_CLK_PERIPHERAL;
+        lcdc_info.ch[0].interface_type          = RGB24;
+        lcdc_info.ch[0].clock_divider           = 1;
+        lcdc_info.ch[0].flags                   = LCDC_FLAGS_DWPOL;
+        lcdc_info.ch[0].lcd_cfg.name            = "R63302(QHD)";
+        lcdc_info.ch[0].lcd_cfg.xres            = 544;
+        lcdc_info.ch[0].lcd_cfg.yres            = 961;
+        lcdc_info.ch[0].lcd_cfg.left_margin     = 72;
+        lcdc_info.ch[0].lcd_cfg.right_margin    = 600;
+        lcdc_info.ch[0].lcd_cfg.hsync_len       = 16;
+        lcdc_info.ch[0].lcd_cfg.upper_margin    = 8;
+        lcdc_info.ch[0].lcd_cfg.lower_margin    = 8;
+        lcdc_info.ch[0].lcd_cfg.vsync_len       = 2;
+        lcdc_info.ch[0].lcd_cfg.sync            = FB_SYNC_VERT_HIGH_ACT |
+                                                  FB_SYNC_HOR_HIGH_ACT;
+        lcdc_info.ch[0].lcd_size_cfg.width      = 44;
+        lcdc_info.ch[0].lcd_size_cfg.height     = 79;
+
+        platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
+
+#else
+        /*
+         * WVGA
+         */
+        gpio_request(GPIO_FN_LCDD17,   NULL);
+        gpio_request(GPIO_FN_LCDD16,   NULL);
+        gpio_request(GPIO_FN_LCDD15,   NULL);
+        gpio_request(GPIO_FN_LCDD14,   NULL);
+        gpio_request(GPIO_FN_LCDD13,   NULL);
+        gpio_request(GPIO_FN_LCDD12,   NULL);
+        gpio_request(GPIO_FN_LCDD11,   NULL);
+        gpio_request(GPIO_FN_LCDD10,   NULL);
+        gpio_request(GPIO_FN_LCDD9,    NULL);
+        gpio_request(GPIO_FN_LCDD8,    NULL);
+        gpio_request(GPIO_FN_LCDD7,    NULL);
+        gpio_request(GPIO_FN_LCDD6,    NULL);
+        gpio_request(GPIO_FN_LCDD5,    NULL);
+        gpio_request(GPIO_FN_LCDD4,    NULL);
+        gpio_request(GPIO_FN_LCDD3,    NULL);
+        gpio_request(GPIO_FN_LCDD2,    NULL);
+        gpio_request(GPIO_FN_LCDD1,    NULL);
+        gpio_request(GPIO_FN_LCDD0,    NULL);
+        gpio_request(GPIO_FN_LCDDISP,  NULL);
+        gpio_request(GPIO_FN_LCDDCK,   NULL);
+
+        gpio_request(GPIO_PORT189, NULL); /* backlight */
+        gpio_direction_output(GPIO_PORT189, 1);
+
+        gpio_request(GPIO_PORT151, NULL); /* LCDDON */
+        gpio_direction_output(GPIO_PORT151, 1);
+
+        lcdc_info.clock_source                  = LCDC_CLK_BUS;
+        lcdc_info.ch[0].interface_type          = RGB18;
+        lcdc_info.ch[0].clock_divider           = 2;
+        lcdc_info.ch[0].flags                   = 0;
+        lcdc_info.ch[0].lcd_cfg.name            = "WVGA Panel";
+        lcdc_info.ch[0].lcd_cfg.xres            = 800;
+        lcdc_info.ch[0].lcd_cfg.yres            = 480;
+        lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
+        lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
+        lcdc_info.ch[0].lcd_cfg.hsync_len       = 70;
+        lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
+        lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
+        lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+        lcdc_info.ch[0].lcd_cfg.sync            = 0;
+        lcdc_info.ch[0].lcd_size_cfg.width      = 152;
+        lcdc_info.ch[0].lcd_size_cfg.height     = 91;
+
+        /* enable TouchScreen */
+        set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
+
+        tsc_device.irq = IRQ7;
+        i2c_register_board_info(0, &tsc_device, 1);
+#endif /* CONFIG_AP4EVB_QHD */
 
         sh7372_add_standard_devices();
 
+        /* HDMI */
+        gpio_request(GPIO_FN_HDMI_HPD, NULL);
+        gpio_request(GPIO_FN_HDMI_CEC, NULL);
+
+        /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
+#define SRCR4 0xe61580bc
+        srcr4 = __raw_readl(SRCR4);
+        __raw_writel(srcr4 | (1 << 13), SRCR4);
+        udelay(50);
+        __raw_writel(srcr4 & ~(1 << 13), SRCR4);
+
         platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
 }
 
+static void __init ap4evb_timer_init(void)
+{
+        sh7372_clock_init();
+        shmobile_timer.init();
+
+        /* External clock source */
+        clk_set_rate(&dv_clki_clk, 27000000);
+}
+
+static struct sys_timer ap4evb_timer = {
+        .init           = ap4evb_timer_init,
+};
+
 MACHINE_START(AP4EVB, "ap4evb")
         .phys_io        = 0xe6000000,
         .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
         .map_io         = ap4evb_map_io,
         .init_irq       = sh7372_init_irq,
         .init_machine   = ap4evb_init,
-        .timer          = &shmobile_timer,
+        .timer          = &ap4evb_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 9247503296c4..a5525901e91f 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -37,6 +37,15 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/time.h>
+
+/*
+ * IrDA
+ *
+ * S67: 5bit : ON  power
+ *    : 6bit : ON  remote control
+ *             OFF IrDA
+ */
 
 static struct mtd_partition nor_flash_partitions[] = {
         {
@@ -91,7 +100,7 @@ static struct platform_device nor_flash_device = {
 };
 
 /* USBHS */
-void usb_host_port_power(int port, int power)
+static void usb_host_port_power(int port, int power)
 {
         if (!power) /* only power-on supported for now */
                 return;
@@ -113,7 +122,7 @@ static struct resource usb_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 65,
+                .start  = evt2irq(0xa20), /* USBHS_USHI0 */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -153,7 +162,7 @@ static struct resource keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 79,
+                .start  = evt2irq(0xbe0), /* KEYSC_KEY */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -209,11 +218,31 @@ static struct platform_device nand_flash_device = {
         },
 };
 
+static struct resource irda_resources[] = {
+        [0] = {
+                .start  = 0xE6D00000,
+                .end    = 0xE6D01FD4 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x480), /* IRDA */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device irda_device = {
+        .name           = "sh_irda",
+        .id             = -1,
+        .resource       = irda_resources,
+        .num_resources  = ARRAY_SIZE(irda_resources),
+};
+
 static struct platform_device *g3evm_devices[] __initdata = {
         &nor_flash_device,
         &usb_host_device,
         &keysc_device,
         &nand_flash_device,
+        &irda_device,
 };
 
 static struct map_desc g3evm_io_desc[] __initdata = {
@@ -232,9 +261,8 @@ static void __init g3evm_map_io(void)
 {
         iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
 
-        /* setup early devices, clocks and console here as well */
+        /* setup early devices and console here as well */
         sh7367_add_early_devices();
-        sh7367_clock_init();
         shmobile_setup_console();
 }
 
@@ -271,9 +299,6 @@ static void __init g3evm_init(void)
         gpio_request(GPIO_FN_EXTLP, NULL);
         gpio_request(GPIO_FN_IDIN, NULL);
 
-        /* enable clock in SYMSTPCR2 */
-        __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048);
-
         /* setup USB phy */
         __raw_writew(0x0300, 0xe605810a);       /* USBCR1 */
         __raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
@@ -318,16 +343,32 @@ static void __init g3evm_init(void)
         /* FOE, FCDE, FSC on dedicated pins */
         __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
 
+        /* IrDA */
+        gpio_request(GPIO_FN_IRDA_OUT, NULL);
+        gpio_request(GPIO_FN_IRDA_IN, NULL);
+        gpio_request(GPIO_FN_IRDA_FIRSEL, NULL);
+        set_irq_type(evt2irq(0x480), IRQ_TYPE_LEVEL_LOW);
+
         sh7367_add_standard_devices();
 
         platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
 }
 
+static void __init g3evm_timer_init(void)
+{
+        sh7367_clock_init();
+        shmobile_timer.init();
+}
+
+static struct sys_timer g3evm_timer = {
+        .init           = g3evm_timer_init,
+};
+
 MACHINE_START(G3EVM, "g3evm")
         .phys_io        = 0xe6000000,
         .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
         .map_io         = g3evm_map_io,
         .init_irq       = sh7367_init_irq,
         .init_machine   = g3evm_init,
-        .timer          = &shmobile_timer,
+        .timer          = &g3evm_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 10673a90be52..2c3ff6f7f34c 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -30,12 +30,39 @@
 #include <linux/io.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/gpio.h>
 #include <mach/sh7377.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/time.h>
+
+/*
+ * SDHI
+ *
+ * SDHI0 : card detection is possible
+ * SDHI1 : card detection is impossible
+ *
+ * [G4-MAIN-BOARD]
+ * JP74 : short         # DBG_2V8A    for SDHI0
+ * JP75 : NC            # DBG_3V3A    for SDHI0
+ * JP76 : NC            # DBG_3V3A_SD for SDHI0
+ * JP77 : NC            # 3V3A_SDIO   for SDHI1
+ * JP78 : short         # DBG_2V8A    for SDHI1
+ * JP79 : NC            # DBG_3V3A    for SDHI1
+ * JP80 : NC            # DBG_3V3A_SD for SDHI1
+ *
+ * [G4-CORE-BOARD]
+ * S32 : all off        # to dissever from G3-CORE_DBG board
+ * S33 : all off        # to dissever from G3-CORE_DBG board
+ *
+ * [G3-CORE_DBG-BOARD]
+ * S1  : all off        # to dissever from G3-CORE_DBG board
+ * S3  : all off        # to dissever from G3-CORE_DBG board
+ * S4  : all off        # to dissever from G3-CORE_DBG board
+ */
 
 static struct mtd_partition nor_flash_partitions[] = {
         {
@@ -90,7 +117,7 @@ static struct platform_device nor_flash_device = {
 };
 
 /* USBHS */
-void usb_host_port_power(int port, int power)
+static void usb_host_port_power(int port, int power)
 {
         if (!power) /* only power-on supported for now */
                 return;
@@ -112,8 +139,7 @@ static struct resource usb_host_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 65,
-                .end    = 65,
+                .start  = evt2irq(0x0a20), /* USBHS_USHI0 */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -154,7 +180,7 @@ static struct resource keysc_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 79,
+                .start  = evt2irq(0x0be0), /* KEYSC_KEY */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -169,10 +195,53 @@ static struct platform_device keysc_device = {
         },
 };
 
+/* SDHI */
+static struct resource sdhi0_resources[] = {
+        [0] = {
+                .name   = "SDHI0",
+                .start  = 0xe6d50000,
+                .end    = 0xe6d501ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x0e00), /* SDHI0 */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device sdhi0_device = {
+        .name           = "sh_mobile_sdhi",
+        .num_resources  = ARRAY_SIZE(sdhi0_resources),
+        .resource       = sdhi0_resources,
+        .id             = 0,
+};
+
+static struct resource sdhi1_resources[] = {
+        [0] = {
+                .name   = "SDHI1",
+                .start  = 0xe6d60000,
+                .end    = 0xe6d601ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x0e80), /* SDHI1 */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device sdhi1_device = {
+        .name           = "sh_mobile_sdhi",
+        .num_resources  = ARRAY_SIZE(sdhi1_resources),
+        .resource       = sdhi1_resources,
+        .id             = 1,
+};
+
 static struct platform_device *g4evm_devices[] __initdata = {
         &nor_flash_device,
         &usb_host_device,
         &keysc_device,
+        &sdhi0_device,
+        &sdhi1_device,
 };
 
 static struct map_desc g4evm_io_desc[] __initdata = {
@@ -191,12 +260,41 @@ static void __init g4evm_map_io(void)
 {
         iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
 
-        /* setup early devices, clocks and console here as well */
+        /* setup early devices and console here as well */
         sh7377_add_early_devices();
-        sh7367_clock_init(); /* use g3 clocks for now */
         shmobile_setup_console();
 }
 
+#define GPIO_SDHID0_D0  0xe60520fc
+#define GPIO_SDHID0_D1  0xe60520fd
+#define GPIO_SDHID0_D2  0xe60520fe
+#define GPIO_SDHID0_D3  0xe60520ff
+#define GPIO_SDHICMD0   0xe6052100
+
+#define GPIO_SDHID1_D0  0xe6052103
+#define GPIO_SDHID1_D1  0xe6052104
+#define GPIO_SDHID1_D2  0xe6052105
+#define GPIO_SDHID1_D3  0xe6052106
+#define GPIO_SDHICMD1   0xe6052107
+
+/*
+ * FIXME !!
+ *
+ * gpio_pull_up is quick_hack.
+ *
+ * current gpio frame work doesn't have
+ * the method to control only pull up/down/free.
+ * this function should be replaced by correct gpio function
+ */
+static void __init gpio_pull_up(u32 addr)
+{
+        u8 data = __raw_readb(addr);
+
+        data &= 0x0F;
+        data |= 0xC0;
+        __raw_writeb(data, addr);
+}
+
 static void __init g4evm_init(void)
 {
         sh7377_pinmux_init();
@@ -229,9 +327,6 @@ static void __init g4evm_init(void)
         gpio_request(GPIO_FN_EXTLP, NULL);
         gpio_request(GPIO_FN_IDIN, NULL);
 
-        /* enable clock in SMSTPCR3 */
-        __raw_writel(__raw_readl(0xe615013c) & ~(1 << 22), 0xe615013c);
-
         /* setup USB phy */
         __raw_writew(0x0200, 0xe605810a);       /* USBCR1 */
         __raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
@@ -253,16 +348,54 @@ static void __init g4evm_init(void)
         gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL);
         gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL);
 
+        /* SDHI0 */
+        gpio_request(GPIO_FN_SDHICLK0, NULL);
+        gpio_request(GPIO_FN_SDHICD0, NULL);
+        gpio_request(GPIO_FN_SDHID0_0, NULL);
+        gpio_request(GPIO_FN_SDHID0_1, NULL);
+        gpio_request(GPIO_FN_SDHID0_2, NULL);
+        gpio_request(GPIO_FN_SDHID0_3, NULL);
+        gpio_request(GPIO_FN_SDHICMD0, NULL);
+        gpio_request(GPIO_FN_SDHIWP0, NULL);
+        gpio_pull_up(GPIO_SDHID0_D0);
+        gpio_pull_up(GPIO_SDHID0_D1);
+        gpio_pull_up(GPIO_SDHID0_D2);
+        gpio_pull_up(GPIO_SDHID0_D3);
+        gpio_pull_up(GPIO_SDHICMD0);
+
+        /* SDHI1 */
+        gpio_request(GPIO_FN_SDHICLK1, NULL);
+        gpio_request(GPIO_FN_SDHID1_0, NULL);
+        gpio_request(GPIO_FN_SDHID1_1, NULL);
+        gpio_request(GPIO_FN_SDHID1_2, NULL);
+        gpio_request(GPIO_FN_SDHID1_3, NULL);
+        gpio_request(GPIO_FN_SDHICMD1, NULL);
+        gpio_pull_up(GPIO_SDHID1_D0);
+        gpio_pull_up(GPIO_SDHID1_D1);
+        gpio_pull_up(GPIO_SDHID1_D2);
+        gpio_pull_up(GPIO_SDHID1_D3);
+        gpio_pull_up(GPIO_SDHICMD1);
+
         sh7377_add_standard_devices();
 
         platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
 }
 
+static void __init g4evm_timer_init(void)
+{
+        sh7377_clock_init();
+        shmobile_timer.init();
+}
+
+static struct sys_timer g4evm_timer = {
+        .init           = g4evm_timer_init,
+};
+
 MACHINE_START(G4EVM, "g4evm")
         .phys_io        = 0xe6000000,
         .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
         .map_io         = g4evm_map_io,
         .init_irq       = sh7377_init_irq,
         .init_machine   = g4evm_init,
-        .timer          = &shmobile_timer,
+        .timer          = &g4evm_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index bb940c6e4e6c..b6454c9f2abb 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -1,5 +1,5 @@
 /*
- * Preliminary clock framework support for sh7367
+ * SH7367 clock framework support
  *
  * Copyright (C) 2010  Magnus Damm
  *
@@ -17,87 +17,342 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 #include <linux/init.h>
-#include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sh_clk.h>
+#include <mach/common.h>
+#include <asm/clkdev.h>
+
+/* SH7367 registers */
+#define RTFRQCR    0xe6150000
+#define SYFRQCR    0xe6150004
+#define CMFRQCR    0xe61500E0
+#define VCLKCR1    0xe6150008
+#define VCLKCR2    0xe615000C
+#define VCLKCR3    0xe615001C
+#define SCLKACR    0xe6150010
+#define SCLKBCR    0xe6150014
+#define SUBUSBCKCR 0xe6158080
+#define SPUCKCR    0xe6150084
+#define MSUCKCR    0xe6150088
+#define MVI3CKCR   0xe6150090
+#define VOUCKCR    0xe6150094
+#define MFCK1CR    0xe6150098
+#define MFCK2CR    0xe615009C
+#define PLLC1CR    0xe6150028
+#define PLLC2CR    0xe615002C
+#define RTMSTPCR0  0xe6158030
+#define RTMSTPCR2  0xe6158038
+#define SYMSTPCR0  0xe6158040
+#define SYMSTPCR2  0xe6158048
+#define CMMSTPCR0  0xe615804c
 
-struct clk {
-        const char *name;
-        unsigned long rate;
+/* Fixed 32 KHz root clock from EXTALR pin */
+static struct clk r_clk = {
+        .rate           = 32768,
 };
 
-#include <asm/clkdev.h>
+/*
+ * 26MHz default rate for the EXTALB1 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+struct clk sh7367_extalb1_clk = {
+        .rate           = 26666666,
+};
 
-int __clk_get(struct clk *clk)
-{
-        return 1;
-}
-EXPORT_SYMBOL(__clk_get);
+/*
+ * 48MHz default rate for the EXTAL2 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+struct clk sh7367_extal2_clk = {
+        .rate           = 48000000,
+};
 
-void __clk_put(struct clk *clk)
+/* A fixed divide-by-2 block */
+static unsigned long div2_recalc(struct clk *clk)
 {
+        return clk->parent->rate / 2;
 }
-EXPORT_SYMBOL(__clk_put);
 
+static struct clk_ops div2_clk_ops = {
+        .recalc         = div2_recalc,
+};
+
+/* Divide extalb1 by two */
+static struct clk extalb1_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &sh7367_extalb1_clk,
+};
+
+/* Divide extal2 by two */
+static struct clk extal2_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &sh7367_extal2_clk,
+};
 
-int clk_enable(struct clk *clk)
+/* PLLC1 */
+static unsigned long pllc1_recalc(struct clk *clk)
 {
-        return 0;
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLC1CR) & (1 << 14))
+                mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
 }
-EXPORT_SYMBOL(clk_enable);
 
-void clk_disable(struct clk *clk)
+static struct clk_ops pllc1_clk_ops = {
+        .recalc         = pllc1_recalc,
+};
+
+static struct clk pllc1_clk = {
+        .ops            = &pllc1_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extalb1_div2_clk,
+};
+
+/* Divide PLLC1 by two */
+static struct clk pllc1_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &pllc1_clk,
+};
+
+/* PLLC2 */
+static unsigned long pllc2_recalc(struct clk *clk)
 {
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLC2CR) & (1 << 31))
+                mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
 }
-EXPORT_SYMBOL(clk_disable);
 
-unsigned long clk_get_rate(struct clk *clk)
+static struct clk_ops pllc2_clk_ops = {
+        .recalc         = pllc2_recalc,
+};
+
+static struct clk pllc2_clk = {
+        .ops            = &pllc2_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extalb1_div2_clk,
+};
+
+static struct clk *main_clks[] = {
+        &r_clk,
+        &sh7367_extalb1_clk,
+        &sh7367_extal2_clk,
+        &extalb1_div2_clk,
+        &extal2_div2_clk,
+        &pllc1_clk,
+        &pllc1_div2_clk,
+        &pllc2_clk,
+};
+
+static void div4_kick(struct clk *clk)
 {
-        return clk ? clk->rate : 0;
+        unsigned long value;
+
+        /* set KICK bit in SYFRQCR to update hardware setting */
+        value = __raw_readl(SYFRQCR);
+        value |= (1 << 31);
+        __raw_writel(value, SYFRQCR);
 }
-EXPORT_SYMBOL(clk_get_rate);
 
-/* a static peripheral clock for now - enough to get sh-sci working */
-static struct clk peripheral_clk = {
-        .name       = "peripheral_clk",
-        .rate       = 48000000,
+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
+                          24, 32, 36, 48, 0, 72, 0, 0 };
+
+static struct clk_div_mult_table div4_div_mult_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
 };
 
-/* a static rclk for now - enough to get sh_cmt working */
-static struct clk r_clk = {
-        .name       = "r_clk",
-        .rate       = 32768,
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+        .kick = div4_kick,
+};
+
+enum { DIV4_I, DIV4_G, DIV4_S, DIV4_B,
+       DIV4_ZX, DIV4_ZT, DIV4_Z, DIV4_ZD, DIV4_HP,
+       DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR };
+
+#define DIV4(_reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
+
+static struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_G] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_S] = DIV4(RTFRQCR, 12, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_ZX] = DIV4(SYFRQCR, 20, 0x6fff, 0),
+        [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0),
+        [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0),
+        [DIV4_ZD] = DIV4(SYFRQCR, 8, 0x6fff, 0),
+        [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0),
+        [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0),
+        [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0),
+        [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0),
+        [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0),
 };
 
-/* a static usb0 for now - enough to get r8a66597 working */
-static struct clk usb0_clk = {
-        .name       = "usb0",
+enum { DIV6_SUB, DIV6_SIUA, DIV6_SIUB, DIV6_MSU, DIV6_SPU,
+       DIV6_MVI3, DIV6_MF1, DIV6_MF2,
+       DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_VOU,
+       DIV6_NR };
+
+static struct clk div6_clks[DIV6_NR] = {
+        [DIV6_SUB] = SH_CLK_DIV6(&sh7367_extal2_clk, SUBUSBCKCR, 0),
+        [DIV6_SIUA] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKACR, 0),
+        [DIV6_SIUB] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKBCR, 0),
+        [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0),
+        [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
+        [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0),
+        [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0),
+        [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0),
+        [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
+        [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
+        [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
+        [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0),
 };
 
-/* a static keysc0 clk for now - enough to get sh_keysc working */
-static struct clk keysc0_clk = {
-        .name       = "keysc0",
+enum { RTMSTP001,
+       RTMSTP231, RTMSTP230, RTMSTP229, RTMSTP228, RTMSTP226,
+       RTMSTP216, RTMSTP206, RTMSTP205, RTMSTP201,
+       SYMSTP023, SYMSTP007, SYMSTP006, SYMSTP004,
+       SYMSTP003, SYMSTP002, SYMSTP001, SYMSTP000,
+       SYMSTP231, SYMSTP229, SYMSTP225, SYMSTP223, SYMSTP222,
+       SYMSTP215, SYMSTP214, SYMSTP213, SYMSTP211,
+       CMMSTP003,
+       MSTP_NR };
+
+#define MSTP(_parent, _reg, _bit, _flags) \
+  SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
+
+static struct clk mstp_clks[MSTP_NR] = {
+        [RTMSTP001] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR0, 1, 0), /* IIC2 */
+        [RTMSTP231] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 31, 0), /* VEU3 */
+        [RTMSTP230] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 30, 0), /* VEU2 */
+        [RTMSTP229] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 29, 0), /* VEU1 */
+        [RTMSTP228] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 28, 0), /* VEU0 */
+        [RTMSTP226] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 26, 0), /* VEU2H */
+        [RTMSTP216] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR2, 16, 0), /* IIC0 */
+        [RTMSTP206] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 6, 0), /* JPU */
+        [RTMSTP205] = MSTP(&div6_clks[DIV6_VOU], RTMSTPCR2, 5, 0), /* VOU */
+        [RTMSTP201] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 1, 0), /* VPU */
+        [SYMSTP023] = MSTP(&div6_clks[DIV6_SPU], SYMSTPCR0, 23, 0), /* SPU1 */
+        [SYMSTP007] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 7, 0), /* SCIFA5 */
+        [SYMSTP006] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 6, 0), /* SCIFB */
+        [SYMSTP004] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 4, 0), /* SCIFA0 */
+        [SYMSTP003] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 3, 0), /* SCIFA1 */
+        [SYMSTP002] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 2, 0), /* SCIFA2 */
+        [SYMSTP001] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 1, 0), /* SCIFA3 */
+        [SYMSTP000] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 0, 0), /* SCIFA4 */
+        [SYMSTP231] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 31, 0), /* SIU */
+        [SYMSTP229] = MSTP(&r_clk, SYMSTPCR2, 29, 0), /* CMT10 */
+        [SYMSTP225] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 25, 0), /* IRDA */
+        [SYMSTP223] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 23, 0), /* IIC1 */
+        [SYMSTP222] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 22, 0), /* USBHS */
+        [SYMSTP215] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 15, 0), /* FLCTL */
+        [SYMSTP214] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 14, 0), /* SDHI0 */
+        [SYMSTP213] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 13, 0), /* SDHI1 */
+        [SYMSTP211] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 11, 0), /* SDHI2 */
+        [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */
 };
 
+#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
+#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+
 static struct clk_lookup lookups[] = {
-        {
-                .clk = &peripheral_clk,
-        }, {
-                .clk = &r_clk,
-        }, {
-                .clk = &usb0_clk,
-        }, {
-                .clk = &keysc0_clk,
-        }
+        /* main clocks */
+        CLKDEV_CON_ID("r_clk", &r_clk),
+        CLKDEV_CON_ID("extalb1", &sh7367_extalb1_clk),
+        CLKDEV_CON_ID("extal2", &sh7367_extal2_clk),
+        CLKDEV_CON_ID("extalb1_div2_clk", &extalb1_div2_clk),
+        CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
+        CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
+        CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
+        CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
+
+        /* DIV4 clocks */
+        CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
+        CLKDEV_CON_ID("g_clk", &div4_clks[DIV4_G]),
+        CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
+        CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]),
+        CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
+        CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]),
+        CLKDEV_CON_ID("zd_clk", &div4_clks[DIV4_ZD]),
+        CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
+        CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]),
+        CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
+        CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
+        CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
+
+        /* DIV6 clocks */
+        CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
+        CLKDEV_CON_ID("siua_clk", &div6_clks[DIV6_SIUA]),
+        CLKDEV_CON_ID("siub_clk", &div6_clks[DIV6_SIUB]),
+        CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]),
+        CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
+        CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]),
+        CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]),
+        CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]),
+        CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
+        CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
+        CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
+        CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
+
+        /* MSTP32 clocks */
+        CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */
+        CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP205]), /* VOU */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[RTMSTP201]), /* VPU */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[SYMSTP023]), /* SPU1 */
+        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[SYMSTP007]), /* SCIFA5 */
+        CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[SYMSTP006]), /* SCIFB */
+        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[SYMSTP004]), /* SCIFA0 */
+        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[SYMSTP003]), /* SCIFA1 */
+        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[SYMSTP002]), /* SCIFA2 */
+        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */
+        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */
+        CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */
+        CLKDEV_CON_ID("cmt1", &mstp_clks[SYMSTP229]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */
+        CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */
+        CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */
+        CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[SYMSTP222]), /* USBHS */
+        CLKDEV_DEV_ID("sh_flctl", &mstp_clks[SYMSTP215]), /* FLCTL */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[SYMSTP214]), /* SDHI0 */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[SYMSTP213]), /* SDHI1 */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[SYMSTP211]), /* SDHI2 */
+        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[CMMSTP003]), /* KEYSC */
 };
 
 void __init sh7367_clock_init(void)
 {
-        int i;
+        int k, ret = 0;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
+
+        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
-        for (i = 0; i < ARRAY_SIZE(lookups); i++) {
-                lookups[i].con_id = lookups[i].clk->name;
-                clkdev_add(&lookups[i]);
-        }
+        if (!ret)
+                clk_init();
+        else
+                panic("failed to setup sh7367 clocks\n");
 }
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
new file mode 100644
index 000000000000..fb4e9b1d788e
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -0,0 +1,560 @@
+/*
+ * SH7372 clock framework support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/sh_clk.h>
+#include <mach/common.h>
+#include <asm/clkdev.h>
+
+/* SH7372 registers */
+#define FRQCRA          0xe6150000
+#define FRQCRB          0xe6150004
+#define FRQCRC          0xe61500e0
+#define FRQCRD          0xe61500e4
+#define VCLKCR1         0xe6150008
+#define VCLKCR2         0xe615000c
+#define VCLKCR3         0xe615001c
+#define FMSICKCR        0xe6150010
+#define FMSOCKCR        0xe6150014
+#define FSIACKCR        0xe6150018
+#define FSIBCKCR        0xe6150090
+#define SUBCKCR         0xe6150080
+#define SPUCKCR         0xe6150084
+#define VOUCKCR         0xe6150088
+#define HDMICKCR        0xe6150094
+#define DSITCKCR        0xe6150060
+#define DSI0PCKCR       0xe6150064
+#define DSI1PCKCR       0xe6150098
+#define PLLC01CR        0xe6150028
+#define PLLC2CR         0xe615002c
+#define SMSTPCR0        0xe6150130
+#define SMSTPCR1        0xe6150134
+#define SMSTPCR2        0xe6150138
+#define SMSTPCR3        0xe615013c
+#define SMSTPCR4        0xe6150140
+
+/* Platforms must set frequency on their DV_CLKI pin */
+struct clk dv_clki_clk = {
+};
+
+/* Fixed 32 KHz root clock from EXTALR pin */
+static struct clk r_clk = {
+        .rate           = 32768,
+};
+
+/*
+ * 26MHz default rate for the EXTAL1 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+struct clk sh7372_extal1_clk = {
+        .rate           = 26000000,
+};
+
+/*
+ * 48MHz default rate for the EXTAL2 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+struct clk sh7372_extal2_clk = {
+        .rate           = 48000000,
+};
+
+/* A fixed divide-by-2 block */
+static unsigned long div2_recalc(struct clk *clk)
+{
+        return clk->parent->rate / 2;
+}
+
+static struct clk_ops div2_clk_ops = {
+        .recalc         = div2_recalc,
+};
+
+/* Divide dv_clki by two */
+struct clk dv_clki_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &dv_clki_clk,
+};
+
+/* Divide extal1 by two */
+static struct clk extal1_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &sh7372_extal1_clk,
+};
+
+/* Divide extal2 by two */
+static struct clk extal2_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &sh7372_extal2_clk,
+};
+
+/* Divide extal2 by four */
+static struct clk extal2_div4_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &extal2_div2_clk,
+};
+
+/* PLLC0 and PLLC1 */
+static unsigned long pllc01_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLC01CR) & (1 << 14))
+                mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops pllc01_clk_ops = {
+        .recalc         = pllc01_recalc,
+};
+
+static struct clk pllc0_clk = {
+        .ops            = &pllc01_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extal1_div2_clk,
+        .enable_reg     = (void __iomem *)FRQCRC,
+};
+
+static struct clk pllc1_clk = {
+        .ops            = &pllc01_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extal1_div2_clk,
+        .enable_reg     = (void __iomem *)FRQCRA,
+};
+
+/* Divide PLLC1 by two */
+static struct clk pllc1_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &pllc1_clk,
+};
+
+/* PLLC2 */
+
+/* Indices are important - they are the actual src selecting values */
+static struct clk *pllc2_parent[] = {
+        [0] = &extal1_div2_clk,
+        [1] = &extal2_div2_clk,
+        [2] = &dv_clki_div2_clk,
+};
+
+/* Only multipliers 20 * 2 to 46 * 2 are valid, last entry for CPUFREQ_TABLE_END */
+static struct cpufreq_frequency_table pllc2_freq_table[29];
+
+static void pllc2_table_rebuild(struct clk *clk)
+{
+        int i;
+
+        /* Initialise PLLC2 frequency table */
+        for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) {
+                pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2;
+                pllc2_freq_table[i].index = i;
+        }
+
+        /* This is a special entry - switching PLL off makes it a repeater */
+        pllc2_freq_table[i].frequency = clk->parent->rate;
+        pllc2_freq_table[i].index = i;
+
+        pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END;
+        pllc2_freq_table[i].index = i;
+}
+
+static unsigned long pllc2_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+
+        pllc2_table_rebuild(clk);
+
+        /*
+         * If the PLL is off, mult == 1, clk->rate will be updated in
+         * pllc2_enable().
+         */
+        if (__raw_readl(PLLC2CR) & (1 << 31))
+                mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
+}
+
+static long pllc2_round_rate(struct clk *clk, unsigned long rate)
+{
+        return clk_rate_table_round(clk, clk->freq_table, rate);
+}
+
+static int pllc2_enable(struct clk *clk)
+{
+        int i;
+
+        __raw_writel(__raw_readl(PLLC2CR) | 0x80000000, PLLC2CR);
+
+        for (i = 0; i < 100; i++)
+                if (__raw_readl(PLLC2CR) & 0x80000000) {
+                        clk->rate = pllc2_recalc(clk);
+                        return 0;
+                }
+
+        pr_err("%s(): timeout!\n", __func__);
+
+        return -ETIMEDOUT;
+}
+
+static void pllc2_disable(struct clk *clk)
+{
+        __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR);
+}
+
+static int pllc2_set_rate(struct clk *clk,
+                          unsigned long rate, int algo_id)
+{
+        unsigned long value;
+        int idx;
+
+        idx = clk_rate_table_find(clk, clk->freq_table, rate);
+        if (idx < 0)
+                return idx;
+
+        if (rate == clk->parent->rate) {
+                pllc2_disable(clk);
+                return 0;
+        }
+
+        value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
+
+        if (value & 0x80000000)
+                pllc2_disable(clk);
+
+        __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
+
+        if (value & 0x80000000)
+                return pllc2_enable(clk);
+
+        return 0;
+}
+
+static int pllc2_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 value;
+        int ret, i;
+
+        if (!clk->parent_table || !clk->parent_num)
+                return -EINVAL;
+
+        /* Search the parent */
+        for (i = 0; i < clk->parent_num; i++)
+                if (clk->parent_table[i] == parent)
+                        break;
+
+        if (i == clk->parent_num)
+                return -ENODEV;
+
+        ret = clk_reparent(clk, parent);
+        if (ret < 0)
+                return ret;
+
+        value = __raw_readl(PLLC2CR) & ~(3 << 6);
+
+        __raw_writel(value | (i << 6), PLLC2CR);
+
+        /* Rebiuld the frequency table */
+        pllc2_table_rebuild(clk);
+
+        return 0;
+}
+
+static struct clk_ops pllc2_clk_ops = {
+        .recalc         = pllc2_recalc,
+        .round_rate     = pllc2_round_rate,
+        .set_rate       = pllc2_set_rate,
+        .enable         = pllc2_enable,
+        .disable        = pllc2_disable,
+        .set_parent     = pllc2_set_parent,
+};
+
+struct clk pllc2_clk = {
+        .ops            = &pllc2_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extal1_div2_clk,
+        .freq_table     = pllc2_freq_table,
+        .parent_table   = pllc2_parent,
+        .parent_num     = ARRAY_SIZE(pllc2_parent),
+};
+
+static struct clk *main_clks[] = {
+        &dv_clki_clk,
+        &r_clk,
+        &sh7372_extal1_clk,
+        &sh7372_extal2_clk,
+        &dv_clki_div2_clk,
+        &extal1_div2_clk,
+        &extal2_div2_clk,
+        &extal2_div4_clk,
+        &pllc0_clk,
+        &pllc1_clk,
+        &pllc1_div2_clk,
+        &pllc2_clk,
+};
+
+static void div4_kick(struct clk *clk)
+{
+        unsigned long value;
+
+        /* set KICK bit in FRQCRB to update hardware setting */
+        value = __raw_readl(FRQCRB);
+        value |= (1 << 31);
+        __raw_writel(value, FRQCRB);
+}
+
+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
+                          24, 32, 36, 48, 0, 72, 96, 0 };
+
+static struct clk_div_mult_table div4_div_mult_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+};
+
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+        .kick = div4_kick,
+};
+
+enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR,
+       DIV4_ZTR, DIV4_ZT, DIV4_ZX, DIV4_HP,
+       DIV4_ISPB, DIV4_S, DIV4_ZB, DIV4_ZB3, DIV4_CP,
+       DIV4_DDRP, DIV4_NR };
+
+#define DIV4(_reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
+
+static struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4(FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_ZG] = DIV4(FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4(FRQCRA, 8, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_M1] = DIV4(FRQCRA, 4, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_CSIR] = DIV4(FRQCRA, 0, 0x6fff, 0),
+        [DIV4_ZTR] = DIV4(FRQCRB, 20, 0x6fff, 0),
+        [DIV4_ZT] = DIV4(FRQCRB, 16, 0x6fff, 0),
+        [DIV4_ZX] = DIV4(FRQCRB, 12, 0x6fff, 0),
+        [DIV4_HP] = DIV4(FRQCRB, 4, 0x6fff, 0),
+        [DIV4_ISPB] = DIV4(FRQCRC, 20, 0x6fff, 0),
+        [DIV4_S] = DIV4(FRQCRC, 12, 0x6fff, 0),
+        [DIV4_ZB] = DIV4(FRQCRC, 8, 0x6fff, 0),
+        [DIV4_ZB3] = DIV4(FRQCRC, 4, 0x6fff, 0),
+        [DIV4_CP] = DIV4(FRQCRC, 0, 0x6fff, 0),
+        [DIV4_DDRP] = DIV4(FRQCRD, 0, 0x677c, 0),
+};
+
+enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO,
+       DIV6_FSIA, DIV6_FSIB, DIV6_SUB, DIV6_SPU,
+       DIV6_VOU, DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
+       DIV6_NR };
+
+static struct clk div6_clks[DIV6_NR] = {
+        [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
+        [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
+        [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
+        [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0),
+        [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0),
+        [DIV6_FSIA] = SH_CLK_DIV6(&pllc1_div2_clk, FSIACKCR, 0),
+        [DIV6_FSIB] = SH_CLK_DIV6(&pllc1_div2_clk, FSIBCKCR, 0),
+        [DIV6_SUB] = SH_CLK_DIV6(&sh7372_extal2_clk, SUBCKCR, 0),
+        [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
+        [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0),
+        [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0),
+        [DIV6_DSI0P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI0PCKCR, 0),
+        [DIV6_DSI1P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI1PCKCR, 0),
+};
+
+enum { DIV6_HDMI, DIV6_REPARENT_NR };
+
+/* Indices are important - they are the actual src selecting values */
+static struct clk *hdmi_parent[] = {
+        [0] = &pllc1_div2_clk,
+        [1] = &pllc2_clk,
+        [2] = &dv_clki_clk,
+        [3] = NULL,     /* pllc2_div4 not implemented yet */
+};
+
+static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
+        [DIV6_HDMI] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, HDMICKCR, 0,
+                                      hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
+};
+
+enum { MSTP001,
+       MSTP131, MSTP130,
+       MSTP129, MSTP128,
+       MSTP118, MSTP117, MSTP116,
+       MSTP106, MSTP101, MSTP100,
+       MSTP223,
+       MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
+       MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
+       MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
+       MSTP_NR };
+
+#define MSTP(_parent, _reg, _bit, _flags) \
+  SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
+
+static struct clk mstp_clks[MSTP_NR] = {
+        [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
+        [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
+        [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
+        [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
+        [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
+        [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */
+        [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
+        [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
+        [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */
+        [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */
+        [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
+        [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
+        [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
+        [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
+        [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
+        [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
+        [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
+        [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
+        [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
+        [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+        [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, CLK_ENABLE_ON_INIT), /* FSIA */
+        [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
+        [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
+        [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
+        [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
+        [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
+        [MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
+        [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
+        [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
+        [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
+        [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
+        [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
+};
+
+#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
+#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+
+static struct clk_lookup lookups[] = {
+        /* main clocks */
+        CLKDEV_CON_ID("dv_clki_div2_clk", &dv_clki_div2_clk),
+        CLKDEV_CON_ID("r_clk", &r_clk),
+        CLKDEV_CON_ID("extal1", &sh7372_extal1_clk),
+        CLKDEV_CON_ID("extal2", &sh7372_extal2_clk),
+        CLKDEV_CON_ID("extal1_div2_clk", &extal1_div2_clk),
+        CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
+        CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk),
+        CLKDEV_CON_ID("pllc0_clk", &pllc0_clk),
+        CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
+        CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
+        CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
+
+        /* DIV4 clocks */
+        CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
+        CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
+        CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
+        CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
+        CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
+        CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]),
+        CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
+        CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]),
+        CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
+        CLKDEV_CON_ID("ispb_clk", &div4_clks[DIV4_ISPB]),
+        CLKDEV_CON_ID("s_clk", &div4_clks[DIV4_S]),
+        CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
+        CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
+        CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
+        CLKDEV_CON_ID("ddrp_clk", &div4_clks[DIV4_DDRP]),
+
+        /* DIV6 clocks */
+        CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
+        CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
+        CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
+        CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
+        CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
+        CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FSIA]),
+        CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FSIB]),
+        CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
+        CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
+        CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
+        CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
+        CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
+        CLKDEV_CON_ID("dsi0p_clk", &div6_clks[DIV6_DSI0P]),
+        CLKDEV_CON_ID("dsi1p_clk", &div6_clks[DIV6_DSI1P]),
+
+        /* MSTP32 clocks */
+        CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
+        CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
+        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
+        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */
+        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
+        CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
+        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
+        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
+        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
+        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
+        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
+        CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
+        CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
+        CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */
+        CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP323]), /* USB0 */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
+        CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
+        CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
+        CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
+        CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
+        CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
+        CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
+        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
+        {.con_id = "ick", .dev_id = "sh-mobile-hdmi", .clk = &div6_reparent_clks[DIV6_HDMI]},
+};
+
+void __init sh7372_clock_init(void)
+{
+        int k, ret = 0;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+
+        if (!ret)
+                ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_NR);
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
+
+        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
+        if (!ret)
+                clk_init();
+        else
+                panic("failed to setup sh7372 clocks\n");
+
+}
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
new file mode 100644
index 000000000000..e007c28cf0a8
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -0,0 +1,369 @@
+/*
+ * SH7377 clock framework support
+ *
+ * Copyright (C) 2010 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/sh_clk.h>
+#include <mach/common.h>
+#include <asm/clkdev.h>
+
+/* SH7377 registers */
+#define RTFRQCR    0xe6150000
+#define SYFRQCR    0xe6150004
+#define CMFRQCR    0xe61500E0
+#define VCLKCR1    0xe6150008
+#define VCLKCR2    0xe615000C
+#define VCLKCR3    0xe615001C
+#define FMSICKCR   0xe6150010
+#define FMSOCKCR   0xe6150014
+#define FSICKCR    0xe6150018
+#define PLLC1CR    0xe6150028
+#define PLLC2CR    0xe615002C
+#define SUBUSBCKCR 0xe6150080
+#define SPUCKCR    0xe6150084
+#define MSUCKCR    0xe6150088
+#define MVI3CKCR   0xe6150090
+#define HDMICKCR   0xe6150094
+#define MFCK1CR    0xe6150098
+#define MFCK2CR    0xe615009C
+#define DSITCKCR   0xe6150060
+#define DSIPCKCR   0xe6150064
+#define SMSTPCR0   0xe6150130
+#define SMSTPCR1   0xe6150134
+#define SMSTPCR2   0xe6150138
+#define SMSTPCR3   0xe615013C
+#define SMSTPCR4   0xe6150140
+
+/* Fixed 32 KHz root clock from EXTALR pin */
+static struct clk r_clk = {
+        .rate           = 32768,
+};
+
+/*
+ * 26MHz default rate for the EXTALC1 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+struct clk sh7377_extalc1_clk = {
+        .rate           = 26666666,
+};
+
+/*
+ * 48MHz default rate for the EXTAL2 root input clock.
+ * If needed, reset this with clk_set_rate() from the platform code.
+ */
+struct clk sh7377_extal2_clk = {
+        .rate           = 48000000,
+};
+
+/* A fixed divide-by-2 block */
+static unsigned long div2_recalc(struct clk *clk)
+{
+        return clk->parent->rate / 2;
+}
+
+static struct clk_ops div2_clk_ops = {
+        .recalc         = div2_recalc,
+};
+
+/* Divide extalc1 by two */
+static struct clk extalc1_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &sh7377_extalc1_clk,
+};
+
+/* Divide extal2 by two */
+static struct clk extal2_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &sh7377_extal2_clk,
+};
+
+/* Divide extal2 by four */
+static struct clk extal2_div4_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &extal2_div2_clk,
+};
+
+/* PLLC1 */
+static unsigned long pllc1_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLC1CR) & (1 << 14))
+                mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops pllc1_clk_ops = {
+        .recalc         = pllc1_recalc,
+};
+
+static struct clk pllc1_clk = {
+        .ops            = &pllc1_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extalc1_div2_clk,
+};
+
+/* Divide PLLC1 by two */
+static struct clk pllc1_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &pllc1_clk,
+};
+
+/* PLLC2 */
+static unsigned long pllc2_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLC2CR) & (1 << 31))
+                mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops pllc2_clk_ops = {
+        .recalc         = pllc2_recalc,
+};
+
+static struct clk pllc2_clk = {
+        .ops            = &pllc2_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+        .parent         = &extalc1_div2_clk,
+};
+
+static struct clk *main_clks[] = {
+        &r_clk,
+        &sh7377_extalc1_clk,
+        &sh7377_extal2_clk,
+        &extalc1_div2_clk,
+        &extal2_div2_clk,
+        &extal2_div4_clk,
+        &pllc1_clk,
+        &pllc1_div2_clk,
+        &pllc2_clk,
+};
+
+static void div4_kick(struct clk *clk)
+{
+        unsigned long value;
+
+        /* set KICK bit in SYFRQCR to update hardware setting */
+        value = __raw_readl(SYFRQCR);
+        value |= (1 << 31);
+        __raw_writel(value, SYFRQCR);
+}
+
+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
+                          24, 32, 36, 48, 0, 72, 96, 0 };
+
+static struct clk_div_mult_table div4_div_mult_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+};
+
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+        .kick = div4_kick,
+};
+
+enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR,
+       DIV4_ZTR, DIV4_ZT, DIV4_Z, DIV4_HP,
+       DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR };
+
+#define DIV4(_reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags)
+
+static struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_ZG] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_M1] = DIV4(RTFRQCR, 4, 0x6fff, CLK_ENABLE_ON_INIT),
+        [DIV4_CSIR] = DIV4(RTFRQCR, 0, 0x6fff, 0),
+        [DIV4_ZTR] = DIV4(SYFRQCR, 20, 0x6fff, 0),
+        [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0),
+        [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0),
+        [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0),
+        [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0),
+        [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0),
+        [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0),
+        [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0),
+};
+
+enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO,
+       DIV6_FSI, DIV6_SUB, DIV6_SPU, DIV6_MSU, DIV6_MVI3, DIV6_HDMI,
+       DIV6_MF1, DIV6_MF2, DIV6_DSIT, DIV6_DSIP,
+       DIV6_NR };
+
+static struct clk div6_clks[] = {
+        [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0),
+        [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
+        [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
+        [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0),
+        [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0),
+        [DIV6_FSI] = SH_CLK_DIV6(&pllc1_div2_clk, FSICKCR, 0),
+        [DIV6_SUB] = SH_CLK_DIV6(&sh7377_extal2_clk, SUBUSBCKCR, 0),
+        [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
+        [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0),
+        [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0),
+        [DIV6_HDMI] = SH_CLK_DIV6(&pllc1_div2_clk, HDMICKCR, 0),
+        [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0),
+        [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0),
+        [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0),
+        [DIV6_DSIP] = SH_CLK_DIV6(&pllc1_div2_clk, DSIPCKCR, 0),
+};
+
+enum { MSTP001,
+       MSTP131, MSTP130, MSTP129, MSTP128, MSTP116, MSTP106, MSTP101,
+       MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
+       MSTP331, MSTP329, MSTP325, MSTP323, MSTP322,
+       MSTP315, MSTP314, MSTP313,
+       MSTP403,
+       MSTP_NR };
+
+#define MSTP(_parent, _reg, _bit, _flags) \
+  SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
+
+static struct clk mstp_clks[] = {
+        [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
+        [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
+        [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
+        [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
+        [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
+        [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
+        [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */
+        [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */
+        [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
+        [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
+        [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
+        [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
+        [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
+        [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
+        [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
+        [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
+        [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
+        [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+        [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IRDA */
+        [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
+        [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
+        [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */
+        [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
+        [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
+        [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
+};
+
+#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
+#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+
+static struct clk_lookup lookups[] = {
+        /* main clocks */
+        CLKDEV_CON_ID("r_clk", &r_clk),
+        CLKDEV_CON_ID("extalc1", &sh7377_extalc1_clk),
+        CLKDEV_CON_ID("extal2", &sh7377_extal2_clk),
+        CLKDEV_CON_ID("extalc1_div2_clk", &extalc1_div2_clk),
+        CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk),
+        CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk),
+        CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
+        CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
+        CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
+
+        /* DIV4 clocks */
+        CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
+        CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
+        CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
+        CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
+        CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
+        CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]),
+        CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
+        CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]),
+        CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
+        CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]),
+        CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
+        CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
+        CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
+
+        /* DIV6 clocks */
+        CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
+        CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
+        CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
+        CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
+        CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
+        CLKDEV_CON_ID("fsi_clk", &div6_clks[DIV6_FSI]),
+        CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
+        CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
+        CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]),
+        CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]),
+        CLKDEV_CON_ID("hdmi_clk", &div6_clks[DIV6_HDMI]),
+        CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]),
+        CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]),
+        CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
+        CLKDEV_CON_ID("dsip_clk", &div6_clks[DIV6_DSIP]),
+
+        /* MSTP32 clocks */
+        CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */
+        CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */
+        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
+        CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP206]), /* SCIFB */
+        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
+        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
+        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
+        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
+        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
+        CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
+        CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */
+        CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
+        CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */
+        CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USBHS */
+        CLKDEV_DEV_ID("sh_flctl", &mstp_clks[MSTP315]), /* FLCTL */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
+        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
+        CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
+};
+
+void __init sh7377_clock_init(void)
+{
+        int k, ret = 0;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
+
+        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
+        if (!ret)
+                clk_init();
+        else
+                panic("failed to setup sh7377 clocks\n");
+}
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
new file mode 100644
index 000000000000..b7c705a213a2
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock.c
@@ -0,0 +1,44 @@
+/*
+ * SH-Mobile Timer
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sh_clk.h>
+
+int __init clk_init(void)
+{
+        /* Kick the child clocks.. */
+        recalculate_root_clocks();
+
+        /* Enable the necessary init clocks */
+        clk_enable_init_clocks();
+
+        return 0;
+}
+
+int __clk_get(struct clk *clk)
+{
+        return 1;
+}
+EXPORT_SYMBOL(__clk_get);
+
+void __clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(__clk_put);
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 57903605cc51..efeef778a875 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -3,21 +3,31 @@
 
 extern struct sys_timer shmobile_timer;
 extern void shmobile_setup_console(void);
+struct clk;
+extern int clk_init(void);
 
 extern void sh7367_init_irq(void);
 extern void sh7367_add_early_devices(void);
 extern void sh7367_add_standard_devices(void);
 extern void sh7367_clock_init(void);
 extern void sh7367_pinmux_init(void);
+extern struct clk sh7367_extalb1_clk;
+extern struct clk sh7367_extal2_clk;
 
 extern void sh7377_init_irq(void);
 extern void sh7377_add_early_devices(void);
 extern void sh7377_add_standard_devices(void);
+extern void sh7377_clock_init(void);
 extern void sh7377_pinmux_init(void);
+extern struct clk sh7377_extalc1_clk;
+extern struct clk sh7377_extal2_clk;
 
 extern void sh7372_init_irq(void);
 extern void sh7372_add_early_devices(void);
 extern void sh7372_add_standard_devices(void);
+extern void sh7372_clock_init(void);
 extern void sh7372_pinmux_init(void);
+extern struct clk sh7372_extal1_clk;
+extern struct clk sh7372_extal2_clk;
 
 #endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index 132256bb8c81..fa15b5f8a001 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -3,7 +3,13 @@
 
 #define NR_IRQS         512
 
+/* INTCA */
 #define evt2irq(evt)            (((evt) >> 5) - 16)
 #define irq2evt(irq)            (((irq) + 16) << 5)
 
+/* INTCS */
+#define INTCS_VECT_BASE         0x2200
+#define INTCS_VECT(n, vect)     INTC_VECT((n), INTCS_VECT_BASE + (vect))
+#define intcs_evt2irq(evt)      evt2irq(INTCS_VECT_BASE + (evt))
+
 #endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/memory.h b/arch/arm/mach-shmobile/include/mach/memory.h
index e188183f4dce..377584e57e03 100644
--- a/arch/arm/mach-shmobile/include/mach/memory.h
+++ b/arch/arm/mach-shmobile/include/mach/memory.h
@@ -4,4 +4,7 @@
 #define PHYS_OFFSET     UL(CONFIG_MEMORY_START)
 #define MEM_SIZE        UL(CONFIG_MEMORY_SIZE)
 
+/* DMA memory at 0xf6000000 - 0xffdfffff */
+#define CONSISTENT_DMA_SIZE (158 << 20)
+
 #endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index dc34f00c56b8..33e9700ded7e 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -11,6 +11,8 @@
 #ifndef __ASM_SH7372_H__
 #define __ASM_SH7372_H__
 
+#include <linux/sh_clk.h>
+
 /*
  * Pin Function Controller:
  *      GPIO_FN_xx - GPIO used to select pin function
@@ -431,4 +433,32 @@ enum {
         GPIO_FN_SDENC_DV_CLKI,
 };
 
+/* DMA slave IDs */
+enum {
+        SHDMA_SLAVE_SCIF0_TX,
+        SHDMA_SLAVE_SCIF0_RX,
+        SHDMA_SLAVE_SCIF1_TX,
+        SHDMA_SLAVE_SCIF1_RX,
+        SHDMA_SLAVE_SCIF2_TX,
+        SHDMA_SLAVE_SCIF2_RX,
+        SHDMA_SLAVE_SCIF3_TX,
+        SHDMA_SLAVE_SCIF3_RX,
+        SHDMA_SLAVE_SCIF4_TX,
+        SHDMA_SLAVE_SCIF4_RX,
+        SHDMA_SLAVE_SCIF5_TX,
+        SHDMA_SLAVE_SCIF5_RX,
+        SHDMA_SLAVE_SCIF6_TX,
+        SHDMA_SLAVE_SCIF6_RX,
+        SHDMA_SLAVE_SDHI0_RX,
+        SHDMA_SLAVE_SDHI0_TX,
+        SHDMA_SLAVE_SDHI1_RX,
+        SHDMA_SLAVE_SDHI1_TX,
+        SHDMA_SLAVE_SDHI2_RX,
+        SHDMA_SLAVE_SDHI2_TX,
+};
+
+extern struct clk dv_clki_clk;
+extern struct clk dv_clki_div2_clk;
+extern struct clk pllc2_clk;
+
 #endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
index fb3c4f1ab252..4aecf6e3a859 100644
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -1,6 +1,7 @@
 #ifndef __ASM_MACH_VMALLOC_H
 #define __ASM_MACH_VMALLOC_H
 
-#define VMALLOC_END       (PAGE_OFFSET + 0x24000000)
+/* Vmalloc at ... - 0xe5ffffff */
+#define VMALLOC_END 0xe6000000
 
 #endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
index 5ff70cadfc32..1a20c489b20d 100644
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -75,7 +75,7 @@ enum {
         ETM11, ARM11, USBHS, FLCTL, IIC1
 };
 
-static struct intc_vect intca_vectors[] = {
+static struct intc_vect intca_vectors[] __initdata = {
         INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
         INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
         INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
@@ -162,7 +162,7 @@ static struct intc_group intca_groups[] __initdata = {
         INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
 };
 
-static struct intc_mask_reg intca_mask_registers[] = {
+static struct intc_mask_reg intca_mask_registers[] __initdata = {
         { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
           { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
         { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
@@ -211,7 +211,7 @@ static struct intc_mask_reg intca_mask_registers[] = {
             MISTY, CMT3, RWDT1, RWDT0 } },
 };
 
-static struct intc_prio_reg intca_prio_registers[] = {
+static struct intc_prio_reg intca_prio_registers[] __initdata = {
         { 0xe6900010, 0, 32, 4, /* INTPRI00A */
           { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
         { 0xe6900014, 0, 32, 4, /* INTPRI10A */
@@ -263,8 +263,178 @@ static struct intc_desc intca_desc __initdata = {
                            intca_sense_registers, intca_ack_registers),
 };
 
+enum {
+        UNUSED_INTCS = 0,
+
+        INTCS,
+
+        /* interrupt sources INTCS */
+        VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3,
+        VIO3_VOU,
+        RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3,
+        VIO1_CEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2,
+        VPU,
+        SGX530,
+        _2DDMAC_2DDM0, _2DDMAC_2DDM1, _2DDMAC_2DDM2, _2DDMAC_2DDM3,
+        IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
+        IPMMU_IPMMUB, IPMMU_IPMMUS,
+        RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR,
+        MSIOF,
+        IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
+        TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
+        CMT,
+        TSIF,
+        IPMMUI,
+        MVI3,
+        ICB,
+        PEP,
+        ASA,
+        BEM,
+        VE2HO,
+        HQE,
+        JPEG,
+        LCDC,
+
+        /* interrupt groups INTCS */
+        _2DDMAC, RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2,
+};
+
+static struct intc_vect intcs_vectors[] = {
+        INTCS_VECT(VIO2_VEU0, 0x700), INTCS_VECT(VIO2_VEU1, 0x720),
+        INTCS_VECT(VIO2_VEU2, 0x740), INTCS_VECT(VIO2_VEU3, 0x760),
+        INTCS_VECT(VIO3_VOU, 0x780),
+        INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820),
+        INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860),
+        INTCS_VECT(VIO1_CEU, 0x880), INTCS_VECT(VIO1_BEU0, 0x8a0),
+        INTCS_VECT(VIO1_BEU1, 0x8c0), INTCS_VECT(VIO1_BEU2, 0x8e0),
+        INTCS_VECT(VPU, 0x980),
+        INTCS_VECT(SGX530, 0x9e0),
+        INTCS_VECT(_2DDMAC_2DDM0, 0xa00), INTCS_VECT(_2DDMAC_2DDM1, 0xa20),
+        INTCS_VECT(_2DDMAC_2DDM2, 0xa40), INTCS_VECT(_2DDMAC_2DDM3, 0xa60),
+        INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
+        INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
+        INTCS_VECT(IPMMU_IPMMUB, 0xb20), INTCS_VECT(IPMMU_IPMMUS, 0xb60),
+        INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0),
+        INTCS_VECT(RTDMAC_2_DADERR, 0xbc0),
+        INTCS_VECT(MSIOF, 0xd20),
+        INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20),
+        INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60),
+        INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0),
+        INTCS_VECT(TMU_TUNI2, 0xec0),
+        INTCS_VECT(CMT, 0xf00),
+        INTCS_VECT(TSIF, 0xf20),
+        INTCS_VECT(IPMMUI, 0xf60),
+        INTCS_VECT(MVI3, 0x420),
+        INTCS_VECT(ICB, 0x480),
+        INTCS_VECT(PEP, 0x4a0),
+        INTCS_VECT(ASA, 0x4c0),
+        INTCS_VECT(BEM, 0x4e0),
+        INTCS_VECT(VE2HO, 0x520),
+        INTCS_VECT(HQE, 0x540),
+        INTCS_VECT(JPEG, 0x560),
+        INTCS_VECT(LCDC, 0x580),
+
+        INTC_VECT(INTCS, 0xf80),
+};
+
+static struct intc_group intcs_groups[] __initdata = {
+        INTC_GROUP(_2DDMAC, _2DDMAC_2DDM0, _2DDMAC_2DDM1,
+                   _2DDMAC_2DDM2, _2DDMAC_2DDM3),
+        INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1,
+                   RTDMAC_1_DEI2, RTDMAC_1_DEI3),
+        INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR),
+        INTC_GROUP(VEU, VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3),
+        INTC_GROUP(BEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2),
+        INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
+        INTC_GROUP(IPMMU, IPMMU_IPMMUS, IPMMU_IPMMUB),
+        INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
+};
+
+static struct intc_mask_reg intcs_mask_registers[] = {
+        { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */
+          { VIO1_BEU2, VIO1_BEU1, VIO1_BEU0, VIO1_CEU,
+            VIO2_VEU3, VIO2_VEU2, VIO2_VEU1, VIO2_VEU0 } },
+        { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */
+          { VIO3_VOU, 0, VE2HO, VPU,
+            0, 0, 0, 0 } },
+        { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */
+          { _2DDMAC_2DDM3, _2DDMAC_2DDM2, _2DDMAC_2DDM1, _2DDMAC_2DDM0,
+            BEM, ASA, PEP, ICB } },
+        { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */
+          { 0, 0, MVI3, 0,
+            JPEG, HQE, 0, LCDC } },
+        { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */
+          { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4,
+            RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
+        { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
+          { 0, 0, MSIOF, 0,
+            SGX530, 0, 0, 0 } },
+        { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
+          { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
+            0, 0, 0, 0 } },
+        { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */
+          { 0, 0, 0, CMT,
+            IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
+        { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */
+          { IPMMU_IPMMUS, 0, IPMMU_IPMMUB, 0,
+            0, 0, 0, 0 } },
+        { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */
+          { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
+            0, 0, IPMMUI, TSIF } },
+        { 0xffd20104, 0, 16, /* INTAMASK */
+          { 0, 0, 0, 0, 0, 0, 0, 0,
+            0, 0, 0, 0, 0, 0, 0, INTCS } },
+};
+
+/* Priority is needed for INTCA to receive the INTCS interrupt */
+static struct intc_prio_reg intcs_prio_registers[] = {
+        { 0xffd20000, 0, 16, 4, /* IPRAS */ { 0, MVI3, _2DDMAC, ICB } },
+        { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPEG, LCDC, 0, 0 } },
+        { 0xffd20008, 0, 16, 4, /* IPRCS */ { BBIF2, 0, 0, 0 } },
+        { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, VIO1_CEU, 0, VPU } },
+        { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT } },
+        { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1,
+                                              TMU_TUNI2, 0 } },
+        { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, VIO3_VOU, VEU, BEU } },
+        { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF, IIC0 } },
+        { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, SGX530, 0, 0 } },
+        { 0xffd20028, 0, 16, 4, /* IPRKS */ { BEM, ASA, IPMMUI, PEP } },
+        { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, VE2HO, HQE } },
+        { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
+};
+
+static struct resource intcs_resources[] __initdata = {
+        [0] = {
+                .start  = 0xffd20000,
+                .end    = 0xffd2ffff,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct intc_desc intcs_desc __initdata = {
+        .name = "sh7367-intcs",
+        .resource = intcs_resources,
+        .num_resources = ARRAY_SIZE(intcs_resources),
+        .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
+                           intcs_prio_registers, NULL, NULL),
+};
+
+static void intcs_demux(unsigned int irq, struct irq_desc *desc)
+{
+        void __iomem *reg = (void *)get_irq_data(irq);
+        unsigned int evtcodeas = ioread32(reg);
+
+        generic_handle_irq(intcs_evt2irq(evtcodeas));
+}
+
 void __init sh7367_init_irq(void)
 {
-        /* INTCA */
+        void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+
         register_intc_controller(&intca_desc);
+        register_intc_controller(&intcs_desc);
+
+        /* demux using INTEVTSA */
+        set_irq_data(evt2irq(0xf80), (void *)intevtsa);
+        set_irq_chained_handler(evt2irq(0xf80), intcs_demux);
 }
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 3ce9d9bd5899..e3551b56cd03 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -319,17 +319,17 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = {
         { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
         { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
                                                CMT14, CMT15 } },
-        { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
+        { 0xe695003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
                                                MMC_MMC_ERR, MMC_MMC_NOR } },
-        { 0xe6940040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
+        { 0xe6950040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
                                                IIC4_WAITI4, IIC4_DTEI4 } },
-        { 0xe6940044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
+        { 0xe6950044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
                                                IIC3_WAITI3, IIC3_DTEI3 } },
-        { 0xe6940048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
+        { 0xe6950048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
                                                0/*TXI*/, 0/*TEI*/} },
-        { 0xe694004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
+        { 0xe695004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
                                                USB1_USB1I1, USB1_USB1I0 } },
-        { 0xe6940050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
+        { 0xe6950050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
 };
 
 static struct intc_sense_reg intca_sense_registers[] __initdata = {
@@ -363,7 +363,227 @@ static struct intc_desc intca_desc __initdata = {
                            intca_sense_registers, intca_ack_registers),
 };
 
+enum {
+        UNUSED_INTCS = 0,
+
+        INTCS,
+
+        /* interrupt sources INTCS */
+        VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3,
+        RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3,
+        CEU, BEU_BEU0, BEU_BEU1, BEU_BEU2,
+        VPU,
+        TSIF1,
+        _3DG_SGX530,
+        _2DDMAC,
+        IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
+        IPMMU_IPMMUR, IPMMU_IPMMUR2,
+        RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR,
+        MSIOF,
+        IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
+        TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
+        CMT0,
+        TSIF0,
+        LMB,
+        CTI,
+        ICB,
+        JPU_JPEG,
+        LCDC,
+        LCRC,
+        RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
+        RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR,
+        ISP,
+        LCDC1,
+        CSIRX,
+        DSITX_DSITX0,
+        DSITX_DSITX1,
+        TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2,
+        CMT4,
+        DSITX1_DSITX1_0,
+        DSITX1_DSITX1_1,
+        CPORTS2R,
+        JPU6E,
+
+        /* interrupt groups INTCS */
+        RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2,
+        RTDMAC2_1, RTDMAC2_2, TMU1, DSITX,
+};
+
+static struct intc_vect intcs_vectors[] = {
+        INTCS_VECT(VEU_VEU0, 0x700), INTCS_VECT(VEU_VEU1, 0x720),
+        INTCS_VECT(VEU_VEU2, 0x740), INTCS_VECT(VEU_VEU3, 0x760),
+        INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820),
+        INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860),
+        INTCS_VECT(CEU, 0x880), INTCS_VECT(BEU_BEU0, 0x8a0),
+        INTCS_VECT(BEU_BEU1, 0x8c0), INTCS_VECT(BEU_BEU2, 0x8e0),
+        INTCS_VECT(VPU, 0x980),
+        INTCS_VECT(TSIF1, 0x9a0),
+        INTCS_VECT(_3DG_SGX530, 0x9e0),
+        INTCS_VECT(_2DDMAC, 0xa00),
+        INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
+        INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
+        INTCS_VECT(IPMMU_IPMMUR, 0xb00), INTCS_VECT(IPMMU_IPMMUR2, 0xb20),
+        INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0),
+        INTCS_VECT(RTDMAC_2_DADERR, 0xbc0),
+        INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20),
+        INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60),
+        INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0),
+        INTCS_VECT(TMU_TUNI2, 0xec0),
+        INTCS_VECT(CMT0, 0xf00),
+        INTCS_VECT(TSIF0, 0xf20),
+        INTCS_VECT(LMB, 0xf60),
+        INTCS_VECT(CTI, 0x400),
+        INTCS_VECT(ICB, 0x480),
+        INTCS_VECT(JPU_JPEG, 0x560),
+        INTCS_VECT(LCDC, 0x580),
+        INTCS_VECT(LCRC, 0x5a0),
+        INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320),
+        INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360),
+        INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13a0),
+        INTCS_VECT(RTDMAC2_2_DADERR, 0x13c0),
+        INTCS_VECT(ISP, 0x1720),
+        INTCS_VECT(LCDC1, 0x1780),
+        INTCS_VECT(CSIRX, 0x17a0),
+        INTCS_VECT(DSITX_DSITX0, 0x17c0),
+        INTCS_VECT(DSITX_DSITX1, 0x17e0),
+        INTCS_VECT(TMU1_TUNI0, 0x1900), INTCS_VECT(TMU1_TUNI1, 0x1920),
+        INTCS_VECT(TMU1_TUNI2, 0x1940),
+        INTCS_VECT(CMT4, 0x1980),
+        INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
+        INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
+        INTCS_VECT(CPORTS2R, 0x1a20),
+        INTCS_VECT(JPU6E, 0x1a80),
+
+        INTC_VECT(INTCS, 0xf80),
+};
+
+static struct intc_group intcs_groups[] __initdata = {
+        INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1,
+                   RTDMAC_1_DEI2, RTDMAC_1_DEI3),
+        INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR),
+        INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3),
+        INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2),
+        INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
+        INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2),
+        INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
+        INTC_GROUP(RTDMAC2_1, RTDMAC2_1_DEI0, RTDMAC2_1_DEI1,
+                   RTDMAC2_1_DEI2, RTDMAC2_1_DEI3),
+        INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4,
+                   RTDMAC2_2_DEI5, RTDMAC2_2_DADERR),
+        INTC_GROUP(TMU1, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0),
+        INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1),
+};
+
+static struct intc_mask_reg intcs_mask_registers[] = {
+        { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */
+          { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU,
+            VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } },
+        { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */
+          { 0, 0, 0, VPU,
+            0, 0, 0, 0 } },
+        { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */
+          { 0, 0, 0, _2DDMAC,
+            0, 0, 0, ICB } },
+        { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */
+          { 0, 0, 0, CTI,
+            JPU_JPEG, 0, LCRC, LCDC } },
+        { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */
+          { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4,
+            RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
+        { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
+          { 0, 0, MSIOF, 0,
+            _3DG_SGX530, 0, 0, 0 } },
+        { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
+          { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
+            0, 0, 0, 0 } },
+        { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */
+          { 0, 0, 0, CMT0,
+            IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
+        { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */
+          { 0, 0, IPMMU_IPMMUR2, IPMMU_IPMMUR,
+            0, 0, 0, 0 } },
+        { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */
+          { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
+            0, TSIF1, LMB, TSIF0 } },
+        { 0xffd50180, 0xffd501c0, 8, /* IMR0SA3 / IMCR0SA3 */
+          { 0, RTDMAC2_2_DADERR, RTDMAC2_2_DEI5, RTDMAC2_2_DEI4,
+            RTDMAC2_1_DEI3, RTDMAC2_1_DEI2, RTDMAC2_1_DEI1, RTDMAC2_1_DEI0 } },
+        { 0xffd50190, 0xffd501d0, 8, /* IMR4SA3 / IMCR4SA3 */
+          { 0, ISP, 0, 0,
+            LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } },
+        { 0xffd50198, 0xffd501d8, 8, /* IMR6SA3 / IMCR6SA3 */
+          { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
+            CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
+        { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
+          { 0, CPORTS2R, 0, 0,
+            JPU6E, 0, 0, 0 } },
+        { 0xffd20104, 0, 16, /* INTAMASK */
+          { 0, 0, 0, 0, 0, 0, 0, 0,
+            0, 0, 0, 0, 0, 0, 0, INTCS } },
+};
+
+/* Priority is needed for INTCA to receive the INTCS interrupt */
+static struct intc_prio_reg intcs_prio_registers[] = {
+        { 0xffd20000, 0, 16, 4, /* IPRAS */ { CTI, 0, _2DDMAC, ICB } },
+        { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPU_JPEG, LCDC, 0, LCRC } },
+        { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, CEU, 0, VPU } },
+        { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT0 } },
+        { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1,
+                                              TMU_TUNI2, TSIF1 } },
+        { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } },
+        { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } },
+        { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, _3DG_SGX530, 0, 0 } },
+        { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } },
+        { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } },
+        { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
+        { 0xffd50000, 0, 16, 4, /* IPRAS3 */ { RTDMAC2_1, 0, 0, 0 } },
+        { 0xffd50004, 0, 16, 4, /* IPRBS3 */ { RTDMAC2_2, 0, 0, 0 } },
+        { 0xffd50020, 0, 16, 4, /* IPRIS3 */ { 0, ISP, 0, 0 } },
+        { 0xffd50024, 0, 16, 4, /* IPRJS3 */ { LCDC1, CSIRX, DSITX, 0 } },
+        { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
+        { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
+                                               DSITX1_DSITX1_1, 0 } },
+        { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } },
+        { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
+};
+
+static struct resource intcs_resources[] __initdata = {
+        [0] = {
+                .start  = 0xffd20000,
+                .end    = 0xffd201ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 0xffd50000,
+                .end    = 0xffd501ff,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct intc_desc intcs_desc __initdata = {
+        .name = "sh7372-intcs",
+        .resource = intcs_resources,
+        .num_resources = ARRAY_SIZE(intcs_resources),
+        .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
+                           intcs_prio_registers, NULL, NULL),
+};
+
+static void intcs_demux(unsigned int irq, struct irq_desc *desc)
+{
+        void __iomem *reg = (void *)get_irq_data(irq);
+        unsigned int evtcodeas = ioread32(reg);
+
+        generic_handle_irq(intcs_evt2irq(evtcodeas));
+}
+
 void __init sh7372_init_irq(void)
 {
+        void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+
         register_intc_controller(&intca_desc);
+        register_intc_controller(&intcs_desc);
+
+        /* demux using INTEVTSA */
+        set_irq_data(evt2irq(0xf80), (void *)intevtsa);
+        set_irq_chained_handler(evt2irq(0xf80), intcs_demux);
 }
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
index 5c781e2d1897..2cdeb8ccd821 100644
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -90,7 +90,7 @@ enum {
         ICUSB, ICUDMC
 };
 
-static struct intc_vect intca_vectors[] = {
+static struct intc_vect intca_vectors[] __initdata = {
         INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
         INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
         INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
@@ -202,7 +202,7 @@ static struct intc_group intca_groups[] __initdata = {
         INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
 };
 
-static struct intc_mask_reg intca_mask_registers[] = {
+static struct intc_mask_reg intca_mask_registers[] __initdata = {
         { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
           { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
         { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
@@ -272,7 +272,7 @@ static struct intc_mask_reg intca_mask_registers[] = {
             SCIFA6, 0, 0, 0 } },
 };
 
-static struct intc_prio_reg intca_prio_registers[] = {
+static struct intc_prio_reg intca_prio_registers[] __initdata = {
         { 0xe6900010, 0, 32, 4, /* INTPRI00A */
           { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
         { 0xe6900014, 0, 32, 4, /* INTPRI10A */
@@ -346,7 +346,301 @@ static struct intc_desc intca_desc __initdata = {
                            intca_sense_registers, intca_ack_registers),
 };
 
+/* this macro ignore entry which is also in INTCA */
+#define __IGNORE(a...)
+#define __IGNORE0(a...) 0
+
+enum {
+        UNUSED_INTCS = 0,
+
+        INTCS,
+
+        /* interrupt sources INTCS */
+        VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3,
+        RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, RTDMAC1_1_DEI2, RTDMAC1_1_DEI3,
+        CEU,
+        BEU_BEU0, BEU_BEU1, BEU_BEU2,
+        __IGNORE(MFI)
+        __IGNORE(BBIF2)
+        VPU,
+        TSIF1,
+        __IGNORE(SGX540)
+        _2DDMAC,
+        IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
+        IPMMU_IPMMUR, IPMMU_IPMMUR2,
+        RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR,
+        __IGNORE(KEYSC)
+        __IGNORE(TTI20)
+        __IGNORE(MSIOF)
+        IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
+        TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
+        CMT0,
+        TSIF0,
+        __IGNORE(CMT2)
+        LMB,
+        __IGNORE(MSUG)
+        __IGNORE(MSU_MSU, MSU_MSU2)
+        __IGNORE(CTI)
+        MVI3,
+        __IGNORE(RWDT0)
+        __IGNORE(RWDT1)
+        ICB,
+        PEP,
+        ASA,
+        __IGNORE(_2DG)
+        HQE,
+        JPU,
+        LCDC0,
+        __IGNORE(LCRC)
+        RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
+        RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR,
+        FRC,
+        LCDC1,
+        CSIRX,
+        DSITX_DSITX0, DSITX_DSITX1,
+        __IGNORE(SPU2_SPU0, SPU2_SPU1)
+        __IGNORE(FSI)
+        __IGNORE(FMSI)
+        __IGNORE(SCUV)
+        TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12,
+        TSIF2,
+        CMT4,
+        __IGNORE(MFIS2)
+        CPORTS2R,
+
+        /* interrupt groups INTCS */
+        RTDMAC1_1, RTDMAC1_2, VEU, BEU, IIC0, __IGNORE(MSU) IPMMU,
+        IIC2, RTDMAC2_1, RTDMAC2_2, DSITX, __IGNORE(SPU2) TMU1,
+};
+
+#define INTCS_INTVECT 0x0F80
+static struct intc_vect intcs_vectors[] __initdata = {
+        INTCS_VECT(VEU_VEU0, 0x0700), INTCS_VECT(VEU_VEU1, 0x0720),
+        INTCS_VECT(VEU_VEU2, 0x0740), INTCS_VECT(VEU_VEU3, 0x0760),
+        INTCS_VECT(RTDMAC1_1_DEI0, 0x0800), INTCS_VECT(RTDMAC1_1_DEI1, 0x0820),
+        INTCS_VECT(RTDMAC1_1_DEI2, 0x0840), INTCS_VECT(RTDMAC1_1_DEI3, 0x0860),
+        INTCS_VECT(CEU, 0x0880),
+        INTCS_VECT(BEU_BEU0, 0x08A0),
+        INTCS_VECT(BEU_BEU1, 0x08C0),
+        INTCS_VECT(BEU_BEU2, 0x08E0),
+        __IGNORE(INTCS_VECT(MFI, 0x0900))
+        __IGNORE(INTCS_VECT(BBIF2, 0x0960))
+        INTCS_VECT(VPU, 0x0980),
+        INTCS_VECT(TSIF1, 0x09A0),
+        __IGNORE(INTCS_VECT(SGX540, 0x09E0))
+        INTCS_VECT(_2DDMAC, 0x0A00),
+        INTCS_VECT(IIC2_ALI2, 0x0A80), INTCS_VECT(IIC2_TACKI2, 0x0AA0),
+        INTCS_VECT(IIC2_WAITI2, 0x0AC0), INTCS_VECT(IIC2_DTEI2, 0x0AE0),
+        INTCS_VECT(IPMMU_IPMMUR, 0x0B00), INTCS_VECT(IPMMU_IPMMUR2, 0x0B20),
+        INTCS_VECT(RTDMAC1_2_DEI4, 0x0B80),
+        INTCS_VECT(RTDMAC1_2_DEI5, 0x0BA0),
+        INTCS_VECT(RTDMAC1_2_DADERR, 0x0BC0),
+        __IGNORE(INTCS_VECT(KEYSC 0x0BE0))
+        __IGNORE(INTCS_VECT(TTI20, 0x0C80))
+        __IGNORE(INTCS_VECT(MSIOF, 0x0D20))
+        INTCS_VECT(IIC0_ALI0, 0x0E00), INTCS_VECT(IIC0_TACKI0, 0x0E20),
+        INTCS_VECT(IIC0_WAITI0, 0x0E40), INTCS_VECT(IIC0_DTEI0, 0x0E60),
+        INTCS_VECT(TMU_TUNI0, 0x0E80),
+        INTCS_VECT(TMU_TUNI1, 0x0EA0),
+        INTCS_VECT(TMU_TUNI2, 0x0EC0),
+        INTCS_VECT(CMT0, 0x0F00),
+        INTCS_VECT(TSIF0, 0x0F20),
+        __IGNORE(INTCS_VECT(CMT2, 0x0F40))
+        INTCS_VECT(LMB, 0x0F60),
+        __IGNORE(INTCS_VECT(MSUG, 0x0F80))
+        __IGNORE(INTCS_VECT(MSU_MSU, 0x0FA0))
+        __IGNORE(INTCS_VECT(MSU_MSU2, 0x0FC0))
+        __IGNORE(INTCS_VECT(CTI, 0x0400))
+        INTCS_VECT(MVI3, 0x0420),
+        __IGNORE(INTCS_VECT(RWDT0, 0x0440))
+        __IGNORE(INTCS_VECT(RWDT1, 0x0460))
+        INTCS_VECT(ICB, 0x0480),
+        INTCS_VECT(PEP, 0x04A0),
+        INTCS_VECT(ASA, 0x04C0),
+        __IGNORE(INTCS_VECT(_2DG, 0x04E0))
+        INTCS_VECT(HQE, 0x0540),
+        INTCS_VECT(JPU, 0x0560),
+        INTCS_VECT(LCDC0, 0x0580),
+        __IGNORE(INTCS_VECT(LCRC, 0x05A0))
+        INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320),
+        INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360),
+        INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13A0),
+        INTCS_VECT(RTDMAC2_2_DADERR, 0x13C0),
+        INTCS_VECT(FRC, 0x1700),
+        INTCS_VECT(LCDC1, 0x1780),
+        INTCS_VECT(CSIRX, 0x17A0),
+        INTCS_VECT(DSITX_DSITX0, 0x17C0), INTCS_VECT(DSITX_DSITX1, 0x17E0),
+        __IGNORE(INTCS_VECT(SPU2_SPU0, 0x1800))
+        __IGNORE(INTCS_VECT(SPU2_SPU1, 0x1820))
+        __IGNORE(INTCS_VECT(FSI, 0x1840))
+        __IGNORE(INTCS_VECT(FMSI, 0x1860))
+        __IGNORE(INTCS_VECT(SCUV, 0x1880))
+        INTCS_VECT(TMU1_TUNI10, 0x1900), INTCS_VECT(TMU1_TUNI11, 0x1920),
+        INTCS_VECT(TMU1_TUNI12, 0x1940),
+        INTCS_VECT(TSIF2, 0x1960),
+        INTCS_VECT(CMT4, 0x1980),
+        __IGNORE(INTCS_VECT(MFIS2, 0x1A00))
+        INTCS_VECT(CPORTS2R, 0x1A20),
+
+        INTC_VECT(INTCS, INTCS_INTVECT),
+};
+
+static struct intc_group intcs_groups[] __initdata = {
+        INTC_GROUP(RTDMAC1_1,
+                   RTDMAC1_1_DEI0, RTDMAC1_1_DEI1,
+                   RTDMAC1_1_DEI2, RTDMAC1_1_DEI3),
+        INTC_GROUP(RTDMAC1_2,
+                   RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR),
+        INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3),
+        INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2),
+        INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0),
+        __IGNORE(INTC_GROUP(MSU, MSU_MSU, MSU_MSU2))
+        INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2),
+        INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2),
+        INTC_GROUP(RTDMAC2_1,
+                   RTDMAC2_1_DEI0, RTDMAC2_1_DEI1,
+                   RTDMAC2_1_DEI2, RTDMAC2_1_DEI3),
+        INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR),
+        INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1),
+        __IGNORE(INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1))
+        INTC_GROUP(TMU1, TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12),
+};
+
+static struct intc_mask_reg intcs_mask_registers[] __initdata = {
+        { 0xE6940184, 0xE69401C4, 8, /* IMR1AS / IMCR1AS  */
+          { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU,
+            VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } },
+        { 0xE6940188, 0xE69401C8, 8, /* IMR2AS / IMCR2AS */
+          { 0, 0, 0, VPU,
+            __IGNORE0(BBIF2), 0, 0, __IGNORE0(MFI) } },
+        { 0xE694018C, 0xE69401CC, 8, /* IMR3AS / IMCR3AS */
+          { 0, 0, 0, _2DDMAC,
+            __IGNORE0(_2DG), ASA, PEP, ICB } },
+        { 0xE6940190, 0xE69401D0, 8, /* IMR4AS / IMCR4AS */
+          { 0, 0, MVI3, __IGNORE0(CTI),
+            JPU, HQE, __IGNORE0(LCRC), LCDC0 } },
+        { 0xE6940194, 0xE69401D4, 8, /* IMR5AS / IMCR5AS */
+          { __IGNORE0(KEYSC), RTDMAC1_2_DADERR, RTDMAC1_2_DEI5, RTDMAC1_2_DEI4,
+            RTDMAC1_1_DEI3, RTDMAC1_1_DEI2, RTDMAC1_1_DEI1, RTDMAC1_1_DEI0 } },
+        __IGNORE({ 0xE6940198, 0xE69401D8, 8, /* IMR6AS / IMCR6AS */
+          { 0, 0, MSIOF, 0,
+            SGX540, 0, TTI20, 0 } })
+        { 0xE694019C, 0xE69401DC, 8, /* IMR7AS / IMCR7AS */
+          { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
+            0, 0, 0, 0 } },
+        __IGNORE({ 0xE69401A0, 0xE69401E0, 8, /* IMR8AS / IMCR8AS */
+          { 0, 0, 0, 0,
+            0, MSU_MSU, MSU_MSU2, MSUG } })
+        { 0xE69401A4, 0xE69401E4, 8, /* IMR9AS / IMCR9AS */
+          { __IGNORE0(RWDT1), __IGNORE0(RWDT0), __IGNORE0(CMT2), CMT0,
+            IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } },
+        { 0xE69401A8, 0xE69401E8, 8, /* IMR10AS / IMCR10AS */
+          { 0, 0, IPMMU_IPMMUR, IPMMU_IPMMUR2,
+            0, 0, 0, 0 } },
+        { 0xE69401AC, 0xE69401EC, 8, /* IMR11AS / IMCR11AS */
+          { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0,
+            0, TSIF1, LMB, TSIF0 } },
+        { 0xE6950180, 0xE69501C0, 8, /* IMR0AS3 / IMCR0AS3 */
+          { RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3,
+            RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, 0 } },
+        { 0xE6950190, 0xE69501D0, 8, /* IMR4AS3 / IMCR4AS3 */
+          { FRC, 0, 0, 0,
+            LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } },
+        __IGNORE({ 0xE6950194, 0xE69501D4, 8, /* IMR5AS3 / IMCR5AS3 */
+          {SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
+           SCUV, 0, 0, 0 } })
+        { 0xE6950198, 0xE69501D8, 8, /* IMR6AS3 / IMCR6AS3 */
+          { TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, TSIF2,
+            CMT4, 0, 0, 0 } },
+        { 0xE695019C, 0xE69501DC, 8, /* IMR7AS3 / IMCR7AS3 */
+          { __IGNORE0(MFIS2), CPORTS2R, 0, 0,
+            0, 0, 0, 0 } },
+        { 0xFFD20104, 0, 16, /* INTAMASK */
+          { 0, 0, 0, 0, 0, 0, 0, 0,
+            0, 0, 0, 0, 0, 0, 0, INTCS } }
+};
+
+static struct intc_prio_reg intcs_prio_registers[] __initdata = {
+        /* IPRAS */
+        { 0xFFD20000, 0, 16, 4, { __IGNORE0(CTI), MVI3, _2DDMAC, ICB } },
+        /* IPRBS */
+        { 0xFFD20004, 0, 16, 4, { JPU, LCDC0, 0, __IGNORE0(LCRC) } },
+        /* IPRCS */
+        __IGNORE({ 0xFFD20008, 0, 16, 4, { BBIF2, 0, 0, 0 } })
+        /* IPRES */
+        { 0xFFD20010, 0, 16, 4, { RTDMAC1_1, CEU, __IGNORE0(MFI), VPU } },
+        /* IPRFS */
+        { 0xFFD20014, 0, 16, 4,
+          { __IGNORE0(KEYSC), RTDMAC1_2, __IGNORE0(CMT2), CMT0 } },
+        /* IPRGS */
+        { 0xFFD20018, 0, 16, 4, { TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, TSIF1 } },
+        /* IPRHS */
+        { 0xFFD2001C, 0, 16, 4, { __IGNORE0(TTI20), 0, VEU, BEU } },
+        /* IPRIS */
+        { 0xFFD20020, 0, 16, 4, { 0, __IGNORE0(MSIOF), TSIF0, IIC0 } },
+        /* IPRJS */
+        __IGNORE({ 0xFFD20024, 0, 16, 4, { 0, SGX540, MSUG, MSU } })
+        /* IPRKS */
+        { 0xFFD20028, 0, 16, 4, { __IGNORE0(_2DG), ASA, LMB, PEP } },
+        /* IPRLS */
+        { 0xFFD2002C, 0, 16, 4, { IPMMU, 0, 0, HQE } },
+        /* IPRMS */
+        { 0xFFD20030, 0, 16, 4,
+          { IIC2, 0, __IGNORE0(RWDT1), __IGNORE0(RWDT0) } },
+        /* IPRAS3 */
+        { 0xFFD50000, 0, 16, 4, { RTDMAC2_1, 0, 0, 0 } },
+        /* IPRBS3 */
+        { 0xFFD50004, 0, 16, 4, { RTDMAC2_2, 0, 0, 0 } },
+        /* IPRIS3 */
+        { 0xFFD50020, 0, 16, 4, { FRC, 0, 0, 0 } },
+        /* IPRJS3 */
+        { 0xFFD50024, 0, 16, 4, { LCDC1, CSIRX, DSITX, 0 } },
+        /* IPRKS3 */
+        __IGNORE({ 0xFFD50028, 0, 16, 4, { SPU2, 0, FSI, FMSI } })
+        /* IPRLS3 */
+        __IGNORE({ 0xFFD5002C, 0, 16, 4, { SCUV, 0, 0, 0 } })
+        /* IPRMS3 */
+        { 0xFFD50030, 0, 16, 4, { TMU1, 0, 0, TSIF2 } },
+        /* IPRNS3 */
+        { 0xFFD50034, 0, 16, 4, { CMT4, 0, 0, 0 } },
+        /* IPROS3 */
+        { 0xFFD50038, 0, 16, 4, { __IGNORE0(MFIS2), CPORTS2R, 0, 0 } },
+};
+
+static struct resource intcs_resources[] __initdata = {
+        [0] = {
+                .start  = 0xffd20000,
+                .end    = 0xffd500ff,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct intc_desc intcs_desc __initdata = {
+        .name = "sh7377-intcs",
+        .resource = intcs_resources,
+        .num_resources = ARRAY_SIZE(intcs_resources),
+        .hw = INTC_HW_DESC(intcs_vectors, intcs_groups,
+                           intcs_mask_registers, intcs_prio_registers,
+                           NULL, NULL),
+};
+
+static void intcs_demux(unsigned int irq, struct irq_desc *desc)
+{
+        void __iomem *reg = (void *)get_irq_data(irq);
+        unsigned int evtcodeas = ioread32(reg);
+
+        generic_handle_irq(intcs_evt2irq(evtcodeas));
+}
+
+#define INTEVTSA 0xFFD20100
 void __init sh7377_init_irq(void)
 {
+        void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE);
+
         register_intc_controller(&intca_desc);
+        register_intc_controller(&intcs_desc);
+
+        /* demux using INTEVTSA */
+        set_irq_data(evt2irq(INTCS_INTVECT), (void *)intevtsa);
+        set_irq_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux);
 }
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 9557d0964d73..ec420353f8e3 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -1160,6 +1160,9 @@ static struct pinmux_gpio pinmux_gpios[] = {
         GPIO_FN(LCDD18),        GPIO_FN(LCDD19),        GPIO_FN(LCDD20),
         GPIO_FN(LCDD21),        GPIO_FN(LCDD22),        GPIO_FN(LCDD23),
 
+        GPIO_FN(LCDC0_SELECT),
+        GPIO_FN(LCDC1_SELECT),
+
         /* IRDA */
         GPIO_FN(IRDA_OUT),      GPIO_FN(IRDA_IN),       GPIO_FN(IRDA_FIRSEL),
         GPIO_FN(IROUT_139),     GPIO_FN(IROUT_140),
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index eca90716140e..3148c11a550e 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -31,11 +31,13 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+/* SCIFA0 */
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xe6c40000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 80, 80, 80, 80 },
+        .irqs           = { evt2irq(0xc00), evt2irq(0xc00),
+                            evt2irq(0xc00), evt2irq(0xc00) },
 };
 
 static struct platform_device scif0_device = {
@@ -46,11 +48,13 @@ static struct platform_device scif0_device = {
         },
 };
 
+/* SCIFA1 */
 static struct plat_sci_port scif1_platform_data = {
         .mapbase        = 0xe6c50000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 81, 81, 81, 81 },
+        .irqs           = { evt2irq(0xc20), evt2irq(0xc20),
+                            evt2irq(0xc20), evt2irq(0xc20) },
 };
 
 static struct platform_device scif1_device = {
@@ -61,11 +65,13 @@ static struct platform_device scif1_device = {
         },
 };
 
+/* SCIFA2 */
 static struct plat_sci_port scif2_platform_data = {
         .mapbase        = 0xe6c60000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 82, 82, 82, 82 },
+        .irqs           = { evt2irq(0xc40), evt2irq(0xc40),
+                            evt2irq(0xc40), evt2irq(0xc40) },
 };
 
 static struct platform_device scif2_device = {
@@ -76,11 +82,13 @@ static struct platform_device scif2_device = {
         },
 };
 
+/* SCIFA3 */
 static struct plat_sci_port scif3_platform_data = {
         .mapbase        = 0xe6c70000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 83, 83, 83, 83 },
+        .irqs           = { evt2irq(0xc60), evt2irq(0xc60),
+                            evt2irq(0xc60), evt2irq(0xc60) },
 };
 
 static struct platform_device scif3_device = {
@@ -91,11 +99,13 @@ static struct platform_device scif3_device = {
         },
 };
 
+/* SCIFA4 */
 static struct plat_sci_port scif4_platform_data = {
         .mapbase        = 0xe6c80000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 89, 89, 89, 89 },
+        .irqs           = { evt2irq(0xd20), evt2irq(0xd20),
+                            evt2irq(0xd20), evt2irq(0xd20) },
 };
 
 static struct platform_device scif4_device = {
@@ -106,11 +116,13 @@ static struct platform_device scif4_device = {
         },
 };
 
+/* SCIFA5 */
 static struct plat_sci_port scif5_platform_data = {
         .mapbase        = 0xe6cb0000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 90, 90, 90, 90 },
+        .irqs           = { evt2irq(0xd40), evt2irq(0xd40),
+                            evt2irq(0xd40), evt2irq(0xd40) },
 };
 
 static struct platform_device scif5_device = {
@@ -121,11 +133,13 @@ static struct platform_device scif5_device = {
         },
 };
 
+/* SCIFB */
 static struct plat_sci_port scif6_platform_data = {
         .mapbase        = 0xe6c30000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 91, 91, 91, 91 },
+        .irqs           = { evt2irq(0xd60), evt2irq(0xd60),
+                            evt2irq(0xd60), evt2irq(0xd60) },
 };
 
 static struct platform_device scif6_device = {
@@ -153,7 +167,7 @@ static struct resource cmt10_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 72,
+                .start  = evt2irq(0xb00), /* CMT1_CMT10 */
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 1d1153290f59..e26686c9d0b6 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -26,17 +26,21 @@
 #include <linux/input.h>
 #include <linux/io.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_dma.h>
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/sh7372.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+/* SCIFA0 */
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xe6c40000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 80, 80, 80, 80 },
+        .type           = PORT_SCIFA,
+        .irqs           = { evt2irq(0x0c00), evt2irq(0x0c00),
+                            evt2irq(0x0c00), evt2irq(0x0c00) },
 };
 
 static struct platform_device scif0_device = {
@@ -47,11 +51,13 @@ static struct platform_device scif0_device = {
         },
 };
 
+/* SCIFA1 */
 static struct plat_sci_port scif1_platform_data = {
         .mapbase        = 0xe6c50000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 81, 81, 81, 81 },
+        .type           = PORT_SCIFA,
+        .irqs           = { evt2irq(0x0c20), evt2irq(0x0c20),
+                            evt2irq(0x0c20), evt2irq(0x0c20) },
 };
 
 static struct platform_device scif1_device = {
@@ -62,11 +68,13 @@ static struct platform_device scif1_device = {
         },
 };
 
+/* SCIFA2 */
 static struct plat_sci_port scif2_platform_data = {
         .mapbase        = 0xe6c60000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 82, 82, 82, 82 },
+        .type           = PORT_SCIFA,
+        .irqs           = { evt2irq(0x0c40), evt2irq(0x0c40),
+                            evt2irq(0x0c40), evt2irq(0x0c40) },
 };
 
 static struct platform_device scif2_device = {
@@ -77,11 +85,13 @@ static struct platform_device scif2_device = {
         },
 };
 
+/* SCIFA3 */
 static struct plat_sci_port scif3_platform_data = {
         .mapbase        = 0xe6c70000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 83, 83, 83, 83 },
+        .type           = PORT_SCIFA,
+        .irqs           = { evt2irq(0x0c60), evt2irq(0x0c60),
+                            evt2irq(0x0c60), evt2irq(0x0c60) },
 };
 
 static struct platform_device scif3_device = {
@@ -92,11 +102,13 @@ static struct platform_device scif3_device = {
         },
 };
 
+/* SCIFA4 */
 static struct plat_sci_port scif4_platform_data = {
         .mapbase        = 0xe6c80000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 89, 89, 89, 89 },
+        .type           = PORT_SCIFA,
+        .irqs           = { evt2irq(0x0d20), evt2irq(0x0d20),
+                            evt2irq(0x0d20), evt2irq(0x0d20) },
 };
 
 static struct platform_device scif4_device = {
@@ -107,11 +119,13 @@ static struct platform_device scif4_device = {
         },
 };
 
+/* SCIFA5 */
 static struct plat_sci_port scif5_platform_data = {
         .mapbase        = 0xe6cb0000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 90, 90, 90, 90 },
+        .type           = PORT_SCIFA,
+        .irqs           = { evt2irq(0x0d40), evt2irq(0x0d40),
+                            evt2irq(0x0d40), evt2irq(0x0d40) },
 };
 
 static struct platform_device scif5_device = {
@@ -122,11 +136,13 @@ static struct platform_device scif5_device = {
         },
 };
 
+/* SCIFB */
 static struct plat_sci_port scif6_platform_data = {
         .mapbase        = 0xe6c30000,
         .flags          = UPF_BOOT_AUTOCONF,
-        .type           = PORT_SCIF,
-        .irqs           = { 91, 91, 91, 91 },
+        .type           = PORT_SCIFB,
+        .irqs           = { evt2irq(0x0d60), evt2irq(0x0d60),
+                            evt2irq(0x0d60), evt2irq(0x0d60) },
 };
 
 static struct platform_device scif6_device = {
@@ -137,11 +153,12 @@ static struct platform_device scif6_device = {
         },
 };
 
+/* CMT */
 static struct sh_timer_config cmt10_platform_data = {
         .name = "CMT10",
         .channel_offset = 0x10,
         .timer_bit = 0,
-        .clk = "r_clk",
+        .clk = "cmt1",
         .clockevent_rating = 125,
         .clocksource_rating = 125,
 };
@@ -154,7 +171,7 @@ static struct resource cmt10_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 72,
+                .start  = evt2irq(0x0b00), /* CMT1_CMT10 */
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -169,6 +186,337 @@ static struct platform_device cmt10_device = {
         .num_resources  = ARRAY_SIZE(cmt10_resources),
 };
 
+/* I2C */
+static struct resource iic0_resources[] = {
+        [0] = {
+                .name   = "IIC0",
+                .start  = 0xFFF20000,
+                .end    = 0xFFF20425 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0xe00), /* IIC0_ALI0 */
+                .end    = intcs_evt2irq(0xe60), /* IIC0_DTEI0 */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device iic0_device = {
+        .name           = "i2c-sh_mobile",
+        .id             = 0, /* "i2c0" clock */
+        .num_resources  = ARRAY_SIZE(iic0_resources),
+        .resource       = iic0_resources,
+};
+
+static struct resource iic1_resources[] = {
+        [0] = {
+                .name   = "IIC1",
+                .start  = 0xE6C20000,
+                .end    = 0xE6C20425 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = evt2irq(0x780), /* IIC1_ALI1 */
+                .end    = evt2irq(0x7e0), /* IIC1_DTEI1 */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device iic1_device = {
+        .name           = "i2c-sh_mobile",
+        .id             = 1, /* "i2c1" clock */
+        .num_resources  = ARRAY_SIZE(iic1_resources),
+        .resource       = iic1_resources,
+};
+
+/* DMA */
+/* Transmit sizes and respective CHCR register values */
+enum {
+        XMIT_SZ_8BIT            = 0,
+        XMIT_SZ_16BIT           = 1,
+        XMIT_SZ_32BIT           = 2,
+        XMIT_SZ_64BIT           = 7,
+        XMIT_SZ_128BIT          = 3,
+        XMIT_SZ_256BIT          = 4,
+        XMIT_SZ_512BIT          = 5,
+};
+
+/* log2(size / 8) - used to calculate number of transfers */
+#define TS_SHIFT {                      \
+        [XMIT_SZ_8BIT]          = 0,    \
+        [XMIT_SZ_16BIT]         = 1,    \
+        [XMIT_SZ_32BIT]         = 2,    \
+        [XMIT_SZ_64BIT]         = 3,    \
+        [XMIT_SZ_128BIT]        = 4,    \
+        [XMIT_SZ_256BIT]        = 5,    \
+        [XMIT_SZ_512BIT]        = 6,    \
+}
+
+#define TS_INDEX2VAL(i) ((((i) & 3) << 3) | \
+                         (((i) & 0xc) << (20 - 2)))
+
+static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
+        {
+                .slave_id       = SHDMA_SLAVE_SCIF0_TX,
+                .addr           = 0xe6c40020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x21,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF0_RX,
+                .addr           = 0xe6c40024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x22,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_TX,
+                .addr           = 0xe6c50020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x25,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_RX,
+                .addr           = 0xe6c50024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x26,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_TX,
+                .addr           = 0xe6c60020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x29,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_RX,
+                .addr           = 0xe6c60024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2a,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF3_TX,
+                .addr           = 0xe6c70020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2d,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF3_RX,
+                .addr           = 0xe6c70024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2e,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF4_TX,
+                .addr           = 0xe6c80020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x39,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF4_RX,
+                .addr           = 0xe6c80024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x3a,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF5_TX,
+                .addr           = 0xe6cb0020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x35,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF5_RX,
+                .addr           = 0xe6cb0024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x36,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF6_TX,
+                .addr           = 0xe6c30040,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x3d,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF6_RX,
+                .addr           = 0xe6c30060,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x3e,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI0_TX,
+                .addr           = 0xe6850030,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xc1,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI0_RX,
+                .addr           = 0xe6850030,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xc2,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI1_TX,
+                .addr           = 0xe6860030,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xc9,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI1_RX,
+                .addr           = 0xe6860030,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xca,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI2_TX,
+                .addr           = 0xe6870030,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xcd,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI2_RX,
+                .addr           = 0xe6870030,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xce,
+        },
+};
+
+static const struct sh_dmae_channel sh7372_dmae_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static const unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma_platform_data = {
+        .slave          = sh7372_dmae_slaves,
+        .slave_num      = ARRAY_SIZE(sh7372_dmae_slaves),
+        .channel        = sh7372_dmae_channels,
+        .channel_num    = ARRAY_SIZE(sh7372_dmae_channels),
+        .ts_low_shift   = 3,
+        .ts_low_mask    = 0x18,
+        .ts_high_shift  = (20 - 2),     /* 2 bits for shifted low TS */
+        .ts_high_mask   = 0x00300000,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_DME,
+};
+
+/* Resource order important! */
+static struct resource sh7372_dmae0_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe008020,
+                .end    = 0xfe00808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfe009000,
+                .end    = 0xfe00900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 246,
+                .end    = 246,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-5 */
+                .start  = 240,
+                .end    = 245,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+/* Resource order important! */
+static struct resource sh7372_dmae1_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe018020,
+                .end    = 0xfe01808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfe019000,
+                .end    = 0xfe01900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 254,
+                .end    = 254,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-5 */
+                .start  = 248,
+                .end    = 253,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+/* Resource order important! */
+static struct resource sh7372_dmae2_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe028020,
+                .end    = 0xfe02808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfe029000,
+                .end    = 0xfe02900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 262,
+                .end    = 262,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-5 */
+                .start  = 256,
+                .end    = 261,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device dma0_device = {
+        .name           = "sh-dma-engine",
+        .id             = 0,
+        .resource       = sh7372_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7372_dmae0_resources),
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7372_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7372_dmae1_resources),
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+};
+
+static struct platform_device dma2_device = {
+        .name           = "sh-dma-engine",
+        .id             = 2,
+        .resource       = sh7372_dmae2_resources,
+        .num_resources  = ARRAY_SIZE(sh7372_dmae2_resources),
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+};
+
 static struct platform_device *sh7372_early_devices[] __initdata = {
         &scif0_device,
         &scif1_device,
@@ -178,6 +526,11 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
         &scif5_device,
         &scif6_device,
         &cmt10_device,
+        &iic0_device,
+        &iic1_device,
+        &dma0_device,
+        &dma1_device,
+        &dma2_device,
 };
 
 void __init sh7372_add_standard_devices(void)
@@ -186,14 +539,8 @@ void __init sh7372_add_standard_devices(void)
                             ARRAY_SIZE(sh7372_early_devices));
 }
 
-#define SMSTPCR3 0xe615013c
-#define SMSTPCR3_CMT1 (1 << 29)
-
 void __init sh7372_add_early_devices(void)
 {
-        /* enable clock to CMT1 */
-        __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
-
         early_platform_add_devices(sh7372_early_devices,
                                    ARRAY_SIZE(sh7372_early_devices));
 }
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 60e37774c35c..bb4adf17dbf4 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -32,11 +32,13 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+/* SCIFA0 */
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xe6c40000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 80, 80, 80, 80 },
+        .irqs           = { evt2irq(0xc00), evt2irq(0xc00),
+                            evt2irq(0xc00), evt2irq(0xc00) },
 };
 
 static struct platform_device scif0_device = {
@@ -47,11 +49,13 @@ static struct platform_device scif0_device = {
         },
 };
 
+/* SCIFA1 */
 static struct plat_sci_port scif1_platform_data = {
         .mapbase        = 0xe6c50000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 81, 81, 81, 81 },
+        .irqs           = { evt2irq(0xc20), evt2irq(0xc20),
+                            evt2irq(0xc20), evt2irq(0xc20) },
 };
 
 static struct platform_device scif1_device = {
@@ -62,11 +66,13 @@ static struct platform_device scif1_device = {
         },
 };
 
+/* SCIFA2 */
 static struct plat_sci_port scif2_platform_data = {
         .mapbase        = 0xe6c60000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 82, 82, 82, 82 },
+        .irqs           = { evt2irq(0xc40), evt2irq(0xc40),
+                            evt2irq(0xc40), evt2irq(0xc40) },
 };
 
 static struct platform_device scif2_device = {
@@ -77,11 +83,13 @@ static struct platform_device scif2_device = {
         },
 };
 
+/* SCIFA3 */
 static struct plat_sci_port scif3_platform_data = {
         .mapbase        = 0xe6c70000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 83, 83, 83, 83 },
+        .irqs           = { evt2irq(0xc60), evt2irq(0xc60),
+                            evt2irq(0xc60), evt2irq(0xc60) },
 };
 
 static struct platform_device scif3_device = {
@@ -92,11 +100,13 @@ static struct platform_device scif3_device = {
         },
 };
 
+/* SCIFA4 */
 static struct plat_sci_port scif4_platform_data = {
         .mapbase        = 0xe6c80000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 89, 89, 89, 89 },
+        .irqs           = { evt2irq(0xd20), evt2irq(0xd20),
+                            evt2irq(0xd20), evt2irq(0xd20) },
 };
 
 static struct platform_device scif4_device = {
@@ -107,11 +117,13 @@ static struct platform_device scif4_device = {
         },
 };
 
+/* SCIFA5 */
 static struct plat_sci_port scif5_platform_data = {
         .mapbase        = 0xe6cb0000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 90, 90, 90, 90 },
+        .irqs           = { evt2irq(0xd40), evt2irq(0xd40),
+                            evt2irq(0xd40), evt2irq(0xd40) },
 };
 
 static struct platform_device scif5_device = {
@@ -122,11 +134,13 @@ static struct platform_device scif5_device = {
         },
 };
 
+/* SCIFA6 */
 static struct plat_sci_port scif6_platform_data = {
         .mapbase        = 0xe6cc0000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 196, 196, 196, 196 },
+        .irqs           = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80),
+                            intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) },
 };
 
 static struct platform_device scif6_device = {
@@ -137,11 +151,13 @@ static struct platform_device scif6_device = {
         },
 };
 
+/* SCIFB */
 static struct plat_sci_port scif7_platform_data = {
         .mapbase        = 0xe6c30000,
         .flags          = UPF_BOOT_AUTOCONF,
         .type           = PORT_SCIF,
-        .irqs           = { 91, 91, 91, 91 },
+        .irqs           = { evt2irq(0xd60), evt2irq(0xd60),
+                            evt2irq(0xd60), evt2irq(0xd60) },
 };
 
 static struct platform_device scif7_device = {
@@ -169,7 +185,7 @@ static struct resource cmt10_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = 72,
+                .start  = evt2irq(0xb00), /* CMT1_CMT10 */
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c
index 5d12d547789e..60acf9e708ae 100644
--- a/arch/arm/mach-u300/clock.c
+++ b/arch/arm/mach-u300/clock.c
@@ -947,6 +947,10 @@ static struct clk fast_clk = {
         .lock       = __SPIN_LOCK_UNLOCKED(fast_clk.lock),
 };
 
+/*
+ * The MMCI apb_pclk is hardwired to the same terminal as the
+ * external MCI clock. Thus this will be referenced twice.
+ */
 static struct clk mmcsd_clk = {
         .name       = "MCLK",
         .parent     = &fast_clk,
@@ -1024,6 +1028,10 @@ static struct clk i2c1_clk = {
         .lock       = __SPIN_LOCK_UNLOCKED(i2c1_clk.lock),
 };
 
+/*
+ * The SPI apb_pclk is hardwired to the same terminal as the
+ * external SPI clock. Thus this will be referenced twice.
+ */
 static struct clk spi_clk = {
         .name       = "SPI",
         .parent     = &fast_clk,
@@ -1040,10 +1048,9 @@ static struct clk spi_clk = {
 };
 
 #ifdef CONFIG_MACH_U300_BS335
-static struct clk uart1_clk = {
-        .name       = "UART1",
+static struct clk uart1_pclk = {
+        .name       = "UART1_PCLK",
         .parent     = &fast_clk,
-        .rate       = 13000000,
         .hw_ctrld   = false,
         .reset      = true,
         .res_reg    = U300_SYSCON_VBASE + U300_SYSCON_RFR,
@@ -1051,6 +1058,14 @@ static struct clk uart1_clk = {
         .clk_val    = U300_SYSCON_SBCER_UART1_CLK_EN,
         .enable     = syscon_clk_enable,
         .disable    = syscon_clk_disable,
+        .lock       = __SPIN_LOCK_UNLOCKED(uart1_pclk.lock),
+};
+
+/* This one is hardwired to PLL13 */
+static struct clk uart1_clk = {
+        .name       = "UART1_CLK",
+        .rate       = 13000000,
+        .hw_ctrld   = true,
         .lock       = __SPIN_LOCK_UNLOCKED(uart1_clk.lock),
 };
 #endif
@@ -1085,11 +1100,9 @@ static struct clk wdog_clk = {
         .lock       = __SPIN_LOCK_UNLOCKED(wdog_clk.lock),
 };
 
-/* This one is hardwired to PLL13 */
-static struct clk uart_clk = {
-        .name       = "UARTCLK",
+static struct clk uart0_pclk = {
+        .name       = "UART0_PCLK",
         .parent     = &slow_clk,
-        .rate       = 13000000,
         .hw_ctrld   = false,
         .reset      = true,
         .res_reg    = U300_SYSCON_VBASE + U300_SYSCON_RSR,
@@ -1097,7 +1110,16 @@ static struct clk uart_clk = {
         .clk_val    = U300_SYSCON_SBCER_UART_CLK_EN,
         .enable     = syscon_clk_enable,
         .disable    = syscon_clk_disable,
-        .lock       = __SPIN_LOCK_UNLOCKED(uart_clk.lock),
+        .lock       = __SPIN_LOCK_UNLOCKED(uart0_pclk.lock),
+};
+
+/* This one is hardwired to PLL13 */
+static struct clk uart0_clk = {
+        .name       = "UART0_CLK",
+        .parent     = &slow_clk,
+        .rate       = 13000000,
+        .hw_ctrld   = true,
+        .lock       = __SPIN_LOCK_UNLOCKED(uart0_clk.lock),
 };
 
 static struct clk keypad_clk = {
@@ -1182,10 +1204,14 @@ static struct clk timer_clk = {
         .lock       = __SPIN_LOCK_UNLOCKED(timer_clk.lock),
 };
 
+/*
+ * There is a binary divider in the hardware that divides
+ * the 13MHz PLL by 13 down to 1 MHz.
+ */
 static struct clk app_timer_clk = {
         .name       = "TIMER_APP",
         .parent     = &slow_clk,
-        .rate       = 13000000,
+        .rate       = 1000000,
         .hw_ctrld   = true,
         .reset      = true,
         .res_reg    = U300_SYSCON_VBASE + U300_SYSCON_RSR,
@@ -1212,23 +1238,24 @@ static struct clk ppm_clk = {
 };
 #endif
 
-static struct clk dummy_apb_pclk;
-
 #define DEF_LOOKUP(devid, clkref)               \
         {                                       \
         .dev_id = devid,                        \
         .clk = clkref,                          \
         }
 
+#define DEF_LOOKUP_CON(devid, conid, clkref)    \
+        {                                       \
+        .dev_id = devid,                        \
+        .con_id = conid,                        \
+        .clk = clkref,                          \
+        }
+
 /*
  * Here we only define clocks that are meaningful to
  * look up through clockdevice.
  */
 static struct clk_lookup lookups[] = {
-        {
-                .con_id = "apb_pclk",
-                .clk = &dummy_apb_pclk,
-        },
         /* Connected directly to the AMBA bus */
         DEF_LOOKUP("amba",      &amba_clk),
         DEF_LOOKUP("cpu",       &cpu_clk),
@@ -1247,11 +1274,14 @@ static struct clk_lookup lookups[] = {
         /* AHB bridge clocks */
         DEF_LOOKUP("ahb_subsys", &ahb_subsys_clk),
         DEF_LOOKUP("intcon",    &intcon_clk),
+        DEF_LOOKUP_CON("intcon", "apb_pclk", &intcon_clk),
         DEF_LOOKUP("mspro",     &mspro_clk),
         DEF_LOOKUP("pl172",     &emif_clk),
+        DEF_LOOKUP_CON("pl172", "apb_pclk", &emif_clk),
         /* FAST bridge clocks */
         DEF_LOOKUP("fast",      &fast_clk),
         DEF_LOOKUP("mmci",      &mmcsd_clk),
+        DEF_LOOKUP_CON("mmci", "apb_pclk", &mmcsd_clk),
         /*
          * The .0 and .1 identifiers on these comes from the platform device
          * .id field and are assigned when the platform devices are registered.
@@ -1261,13 +1291,16 @@ static struct clk_lookup lookups[] = {
         DEF_LOOKUP("stu300.0",  &i2c0_clk),
         DEF_LOOKUP("stu300.1",  &i2c1_clk),
         DEF_LOOKUP("pl022",     &spi_clk),
+        DEF_LOOKUP_CON("pl022", "apb_pclk", &spi_clk),
 #ifdef CONFIG_MACH_U300_BS335
         DEF_LOOKUP("uart1",     &uart1_clk),
+        DEF_LOOKUP_CON("uart1", "apb_pclk", &uart1_pclk),
 #endif
         /* SLOW bridge clocks */
         DEF_LOOKUP("slow",      &slow_clk),
         DEF_LOOKUP("coh901327_wdog",      &wdog_clk),
-        DEF_LOOKUP("uart0",     &uart_clk),
+        DEF_LOOKUP("uart0",     &uart0_clk),
+        DEF_LOOKUP_CON("uart0", "apb_pclk", &uart0_pclk),
         DEF_LOOKUP("apptimer",  &app_timer_clk),
         DEF_LOOKUP("coh901461-keypad",    &keypad_clk),
         DEF_LOOKUP("u300-gpio", &gpio_clk),
@@ -1286,64 +1319,6 @@ static void __init clk_register(void)
         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 }
 
-/*
- * These are the clocks for cells registered as primecell drivers
- * on the AMBA bus. These must be on during AMBA device registration
- * since the bus probe will attempt to read magic configuration
- * registers for these devices. If they are deactivated these probes
- * will fail.
- *
- *
- * Please note that on emif, both RAM and NAND is connected in dual
- * RAM phones. On single RAM phones, ram is on semi and NAND on emif.
- *
- */
-void u300_clock_primecells(void)
-{
-        clk_enable(&intcon_clk);
-        clk_enable(&uart_clk);
-#ifdef CONFIG_MACH_U300_BS335
-        clk_enable(&uart1_clk);
-#endif
-        clk_enable(&spi_clk);
-
-        clk_enable(&mmcsd_clk);
-
-}
-EXPORT_SYMBOL(u300_clock_primecells);
-
-void u300_unclock_primecells(void)
-{
-
-        clk_disable(&intcon_clk);
-        clk_disable(&uart_clk);
-#ifdef CONFIG_MACH_U300_BS335
-        clk_disable(&uart1_clk);
-#endif
-        clk_disable(&spi_clk);
-        clk_disable(&mmcsd_clk);
-
-}
-EXPORT_SYMBOL(u300_unclock_primecells);
-
-/*
- * The interrupt controller is enabled before the clock API is registered.
- */
-void u300_enable_intcon_clock(void)
-{
-        clk_enable(&intcon_clk);
-}
-EXPORT_SYMBOL(u300_enable_intcon_clock);
-
-/*
- * The timer is enabled before the clock API is registered.
- */
-void u300_enable_timer_clock(void)
-{
-        clk_enable(&app_timer_clk);
-}
-EXPORT_SYMBOL(u300_enable_timer_clock);
-
 #if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
 /*
  * The following makes it possible to view the status (especially
@@ -1385,11 +1360,13 @@ static struct clk *clks[] = {
         &spi_clk,
 #ifdef CONFIG_MACH_U300_BS335
         &uart1_clk,
+        &uart1_pclk,
 #endif
         /* SLOW bridge clocks */
         &slow_clk,
         &wdog_clk,
-        &uart_clk,
+        &uart0_clk,
+        &uart0_pclk,
         &app_timer_clk,
         &keypad_clk,
         &gpio_clk,
@@ -1430,7 +1407,7 @@ static int u300_clocks_show(struct seq_file *s, void *data)
                                 chars++;
                         }
                         cdp[32] = '\0';
-                        if (clk->get_rate)
+                        if (clk->get_rate || clk->rate != 0)
                                 seq_printf(s,
                                            "%s%s\t%s\t%d\t%s\t%lu Hz\n",
                                            &cdp[0],
@@ -1439,7 +1416,7 @@ static int u300_clocks_show(struct seq_file *s, void *data)
                                            clk->usecount ? "ON" : "OFF",
                                            clk->usecount,
                                            clk->hw_ctrld  ? "YES" : "NO ",
-                                           clk->get_rate(clk));
+                                           clk_get_rate(clk));
                         else
                                 seq_printf(s,
                                            "%s%s\t%s\t%d\t%s\t" \
@@ -1483,7 +1460,7 @@ static int __init init_clk_read_debugfs(void)
 module_init(init_clk_read_debugfs);
 #endif
 
-static int __init u300_clock_init(void)
+int __init u300_clock_init(void)
 {
         u16 val;
 
@@ -1520,10 +1497,8 @@ static int __init u300_clock_init(void)
          */
         syscon_block_reset_disable(&semi_clk);
         syscon_block_reset_disable(&emif_clk);
-        semi_clk.enable(&semi_clk);
-        emif_clk.enable(&emif_clk);
+        clk_enable(&semi_clk);
+        clk_enable(&emif_clk);
 
         return 0;
 }
-/* initialize clocking early to be available later in the boot */
-core_initcall(u300_clock_init);
diff --git a/arch/arm/mach-u300/clock.h b/arch/arm/mach-u300/clock.h
index fc6d9ccfe7e3..c34f3ea3017c 100644
--- a/arch/arm/mach-u300/clock.h
+++ b/arch/arm/mach-u300/clock.h
@@ -45,9 +45,6 @@ struct clk {
         void (*disable) (struct clk *);
 };
 
-void u300_clock_primecells(void);
-void u300_unclock_primecells(void);
-void u300_enable_intcon_clock(void);
-void u300_enable_timer_clock(void);
+int u300_clock_init(void);
 
 #endif
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 653b3e0ab7ba..ea41c236be0f 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -19,6 +19,8 @@
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
+#include <linux/clk.h>
+#include <linux/err.h>
 #include <mach/coh901318.h>
 
 #include <asm/types.h>
@@ -1477,11 +1479,19 @@ static struct platform_device *platform_devs[] __initdata = {
 void __init u300_init_irq(void)
 {
         u32 mask[2] = {0, 0};
+        struct clk *clk;
         int i;
 
+        /* initialize clocking early, we want to clock the INTCON */
+        u300_clock_init();
+
+        /* Clock the interrupt controller */
+        clk = clk_get_sys("intcon", NULL);
+        BUG_ON(IS_ERR(clk));
+        clk_enable(clk);
+
         for (i = 0; i < NR_IRQS; i++)
                 set_bit(i, (unsigned long *) &mask[0]);
-        u300_enable_intcon_clock();
         vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
         vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
 }
@@ -1635,12 +1645,10 @@ void __init u300_init_devices(void)
         u300_spi_init(&pl022_device);
 
         /* Register the AMBA devices in the AMBA bus abstraction layer */
-        u300_clock_primecells();
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
         }
-        u300_unclock_primecells();
 
         u300_assign_physmem();
 
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 88506d030596..de1ac9ad2213 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -74,16 +74,16 @@ static void _mmci_callback(struct work_struct *ws)
 
         mdelay(20);
 
-        mmci_card->mmc_inserted = !!gpio_get_value(U300_GPIO_PIN_MMC_CD);
+        mmci_card->mmc_inserted = !gpio_get_value(U300_GPIO_PIN_MMC_CD);
 
         input_report_switch(mmci_card->mmc_input, KEY_INSERT,
-                            !mmci_card->mmc_inserted);
+                            mmci_card->mmc_inserted);
         input_sync(mmci_card->mmc_input);
 
         pr_debug("MMC/SD card was %s\n",
-                 mmci_card->mmc_inserted ? "removed" : "inserted");
+                 mmci_card->mmc_inserted ? "inserted" : "removed");
 
-        enable_irq_on_gpio_pin(U300_GPIO_PIN_MMC_CD, !mmci_card->mmc_inserted);
+        enable_irq_on_gpio_pin(U300_GPIO_PIN_MMC_CD, mmci_card->mmc_inserted);
 }
 
 int __devinit mmc_init(struct amba_device *adev)
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 26d26f5100fe..3fc4472719be 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -15,6 +15,8 @@
 #include <linux/clocksource.h>
 #include <linux/types.h>
 #include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/err.h>
 
 #include <mach/hardware.h>
 
@@ -23,7 +25,8 @@
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
-#include "clock.h"
+/* Be able to sleep for atleast 4 seconds (usually more) */
+#define APPTIMER_MIN_RANGE 4
 
 /*
  * APP side special timer registers
@@ -307,8 +310,6 @@ static struct clock_event_device clockevent_u300_1mhz = {
         .name           = "GPT1",
         .rating         = 300, /* Reasonably fast and accurate clock event */
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        /* 22 calculated using the algorithm in arch/mips/kernel/time.c */
-        .shift          = 22,
         .set_next_event = u300_set_next_event,
         .set_mode       = u300_set_mode,
 };
@@ -341,8 +342,6 @@ static struct clocksource clocksource_u300_1mhz = {
         .rating         = 300, /* Reasonably fast and accurate clock source */
         .read           = u300_get_cycles,
         .mask           = CLOCKSOURCE_MASK(32), /* 32 bits */
-        /* 22 calculated using the algorithm in arch/mips/kernel/time.c */
-        .shift          = 22,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
@@ -367,7 +366,15 @@ unsigned long long notrace sched_clock(void)
  */
 static void __init u300_timer_init(void)
 {
-        u300_enable_timer_clock();
+        struct clk *clk;
+        unsigned long rate;
+
+        /* Clock the interrupt controller */
+        clk = clk_get_sys("apptimer", NULL);
+        BUG_ON(IS_ERR(clk));
+        clk_enable(clk);
+        rate = clk_get_rate(clk);
+
         /*
          * Disable the "OS" and "DD" timers - these are designed for Symbian!
          * Example usage in cnh1601578 cpu subsystem pd_timer_app.c
@@ -405,15 +412,14 @@ static void __init u300_timer_init(void)
         writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE,
                 U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2);
 
-        /* This is a pure microsecond clock source */
-        clocksource_u300_1mhz.mult =
-                clocksource_khz2mult(1000, clocksource_u300_1mhz.shift);
+        clocksource_calc_mult_shift(&clocksource_u300_1mhz,
+                                    rate, APPTIMER_MIN_RANGE);
         if (clocksource_register(&clocksource_u300_1mhz))
                 printk(KERN_ERR "timer: failed to initialize clock "
                        "source %s\n", clocksource_u300_1mhz.name);
 
-        clockevent_u300_1mhz.mult =
-                div_sc(1000000, NSEC_PER_SEC, clockevent_u300_1mhz.shift);
+        clockevents_calc_mult_shift(&clockevent_u300_1mhz,
+                                    rate, APPTIMER_MIN_RANGE);
         /* 32bit counter, so 32bits delta is max */
         clockevent_u300_1mhz.max_delta_ns =
                 clockevent_delta2ns(0xffffffff, &clockevent_u300_1mhz);
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 4f8f99aac938..b5e75bb44965 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -30,15 +30,6 @@
 #define VERSATILE_PCI_VIRT_BASE         (void __iomem *)0xe8000000ul
 #define VERSATILE_PCI_CFG_VIRT_BASE     (void __iomem *)0xe9000000ul
 
-#if 0
-#define VERSATILE_PCI_VIRT_MEM_BASE0    0xf4000000
-#define VERSATILE_PCI_VIRT_MEM_BASE1    0xf5000000
-#define VERSATILE_PCI_VIRT_MEM_BASE2    0xf6000000
-
-#define PCIO_BASE                       VERSATILE_PCI_VIRT_MEM_BASE0
-#define PCIMEM_BASE                     VERSATILE_PCI_VIRT_MEM_BASE1
-#endif
-
 /* CIK guesswork */
 #define PCIBIOS_MIN_IO                  0x44000000
 #define PCIBIOS_MIN_MEM                 0x50000000
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e1fd98fff8fa..33c3f570aaa0 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -771,8 +771,8 @@ config CACHE_L2X0
         bool "Enable the L2x0 outer cache controller"
         depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
                    REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
-                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                   ARCH_TEGRA
+                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \
+                   ARCH_U8500 || ARCH_VEXPRESS_CA9X4
         default y
         select OUTER_CACHE
         select OUTER_CACHE_SYNC
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
index 661fbc605759..af33b74f569e 100644
--- a/arch/arm/plat-mxc/include/mach/gpio.h
+++ b/arch/arm/plat-mxc/include/mach/gpio.h
@@ -19,6 +19,7 @@
 #ifndef __ASM_ARCH_MXC_GPIO_H__
 #define __ASM_ARCH_MXC_GPIO_H__
 
+#include <linux/spinlock.h>
 #include <mach/hardware.h>
 #include <asm-generic/gpio.h>
 
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index c835f1e994c6..9b89ec601ee2 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -122,6 +122,8 @@ struct omap_mmc_platform_data {
                 /* Call back after enabling / disabling regulators */
                 void (*after_set_reg)(struct device *dev, int slot,
                                       int power_on, int vdd);
+                /* if we have special card, init it using this callback */
+                void (*init_card)(struct mmc_card *card);
 
                 /* return MMC cover switch state, can be NULL if not supported.
                  *
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index a17cc0c6a6b0..4aacdd12c9cc 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -4,7 +4,6 @@
 
 obj-y   := dma.o
 
-obj-$(CONFIG_ARCH_PXA)          += pmu.o
 obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
 obj-$(CONFIG_PXA3xx)            += mfp.o
 obj-$(CONFIG_ARCH_MMP)          += mfp.o
diff --git a/arch/arm/plat-pxa/pmu.c b/arch/arm/plat-pxa/pmu.c
deleted file mode 100644
index 267ceb6feb2f..000000000000
--- a/arch/arm/plat-pxa/pmu.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * PMU IRQ registration for the PXA xscale PMU families.
- * Copyright (C) 2010 Will Deacon, ARM Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/platform_device.h>
-#include <asm/pmu.h>
-#include <mach/irqs.h>
-
-static struct resource pmu_resource = {
-        .start  = IRQ_PMU,
-        .end    = IRQ_PMU,
-        .flags  = IORESOURCE_IRQ,
-};
-
-static struct platform_device pmu_device = {
-        .name           = "arm-pmu",
-        .id             = ARM_PMU_DEVICE_CPU,
-        .resource       = &pmu_resource,
-        .num_resources  = 1,
-};
-
-static int __init pxa_pmu_init(void)
-{
-        platform_device_register(&pmu_device);
-        return 0;
-}
-arch_initcall(pxa_pmu_init);
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 11d6a1bbd90d..c6a855db2fb6 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,9 +7,10 @@
 
 config PLAT_S5P
         bool
-        depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210)
+        depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
         default y
-        select ARM_VIC
+        select ARM_VIC if !ARCH_S5PV310
+        select ARM_GIC if ARCH_S5PV310
         select NO_IOPORT
         select ARCH_REQUIRE_GPIOLIB
         select S3C_GPIO_TRACK
@@ -30,3 +31,18 @@ config S5P_EXT_INT
         help
           Use the external interrupts (other than GPIO interrupts.)
           Note: Do not choose this for S5P6440.
+
+config S5P_DEV_FIMC0
+        bool
+        help
+          Compile in platform device definitions for FIMC controller 0
+
+config S5P_DEV_FIMC1
+        bool
+        help
+          Compile in platform device definitions for FIMC controller 1
+
+config S5P_DEV_FIMC2
+        bool
+        help
+          Compile in platform device definitions for FIMC controller 2
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 39c242bb9d58..b2e029673950 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -12,9 +12,15 @@ obj-				:=
 
 # Core files
 
+obj-y                           += dev-pmu.o
 obj-y                           += dev-uart.o
 obj-y                           += cpu.o
 obj-y                           += clock.o
 obj-y                           += irq.o
 obj-$(CONFIG_S5P_EXT_INT)       += irq-eint.o
 
+# devices
+
+obj-$(CONFIG_S5P_DEV_FIMC0)     += dev-fimc0.o
+obj-$(CONFIG_S5P_DEV_FIMC1)     += dev-fimc1.o
+obj-$(CONFIG_S5P_DEV_FIMC2)     += dev-fimc2.o
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 75cb8c37ca2c..b07a078fd284 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -21,6 +21,7 @@
 #include <plat/s5p6442.h>
 #include <plat/s5pc100.h>
 #include <plat/s5pv210.h>
+#include <plat/s5pv310.h>
 
 /* table of supported CPUs */
 
@@ -28,6 +29,7 @@ static const char name_s5p6440[] = "S5P6440";
 static const char name_s5p6442[] = "S5P6442";
 static const char name_s5pc100[] = "S5PC100";
 static const char name_s5pv210[] = "S5PV210/S5PC110";
+static const char name_s5pv310[] = "S5PV310";
 
 static struct cpu_table cpu_ids[] __initdata = {
         {
@@ -62,6 +64,14 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .init_uarts     = s5pv210_init_uarts,
                 .init           = s5pv210_init,
                 .name           = name_s5pv210,
+        }, {
+                .idcode         = 0x43200000,
+                .idmask         = 0xfffff000,
+                .map_io         = s5pv310_map_io,
+                .init_clocks    = s5pv310_init_clocks,
+                .init_uarts     = s5pv310_init_uarts,
+                .init           = s5pv310_init,
+                .name           = name_s5pv310,
         },
 };
 
@@ -81,8 +91,9 @@ static struct map_desc s5p_iodesc[] __initdata = {
         }, {
                 .virtual        = (unsigned long)S3C_VA_UART,
                 .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_4K,
+                .length         = SZ_512K,
                 .type           = MT_DEVICE,
+#ifdef CONFIG_ARM_VIC
         }, {
                 .virtual        = (unsigned long)VA_VIC0,
                 .pfn            = __phys_to_pfn(S5P_PA_VIC0),
@@ -93,6 +104,7 @@ static struct map_desc s5p_iodesc[] __initdata = {
                 .pfn            = __phys_to_pfn(S5P_PA_VIC1),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
+#endif
         }, {
                 .virtual        = (unsigned long)S3C_VA_TIMER,
                 .pfn            = __phys_to_pfn(S5P_PA_TIMER),
@@ -103,6 +115,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
                 .pfn            = __phys_to_pfn(S5P_PA_GPIO),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S3C_PA_WDT),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
         },
 };
 
diff --git a/arch/arm/plat-s5p/dev-fimc0.c b/arch/arm/plat-s5p/dev-fimc0.c
new file mode 100644
index 000000000000..d3f1a9b5d2b5
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-fimc0.c
@@ -0,0 +1,36 @@
+/* linux/arch/arm/plat-s5p/dev-fimc0.c
+ *
+ * Copyright (c) 2010 Samsung Electronics
+ *
+ * Base S5P FIMC0 resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <mach/map.h>
+
+static struct resource s5p_fimc0_resource[] = {
+        [0] = {
+                .start  = S5P_PA_FIMC0,
+                .end    = S5P_PA_FIMC0 + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_FIMC0,
+                .end    = IRQ_FIMC0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s5p_device_fimc0 = {
+        .name           = "s5p-fimc",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
+        .resource       = s5p_fimc0_resource,
+};
diff --git a/arch/arm/plat-s5p/dev-fimc1.c b/arch/arm/plat-s5p/dev-fimc1.c
new file mode 100644
index 000000000000..41bd6986d0ad
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-fimc1.c
@@ -0,0 +1,36 @@
+/* linux/arch/arm/plat-s5p/dev-fimc1.c
+ *
+ * Copyright (c) 2010 Samsung Electronics
+ *
+ * Base S5P FIMC1 resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <mach/map.h>
+
+static struct resource s5p_fimc1_resource[] = {
+        [0] = {
+                .start  = S5P_PA_FIMC1,
+                .end    = S5P_PA_FIMC1 + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_FIMC1,
+                .end    = IRQ_FIMC1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s5p_device_fimc1 = {
+        .name           = "s5p-fimc",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
+        .resource       = s5p_fimc1_resource,
+};
diff --git a/arch/arm/plat-s5p/dev-fimc2.c b/arch/arm/plat-s5p/dev-fimc2.c
new file mode 100644
index 000000000000..dfddeda6d4a3
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-fimc2.c
@@ -0,0 +1,36 @@
+/* linux/arch/arm/plat-s5p/dev-fimc2.c
+ *
+ * Copyright (c) 2010 Samsung Electronics
+ *
+ * Base S5P FIMC2 resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <mach/map.h>
+
+static struct resource s5p_fimc2_resource[] = {
+        [0] = {
+                .start  = S5P_PA_FIMC2,
+                .end    = S5P_PA_FIMC2 + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_FIMC2,
+                .end    = IRQ_FIMC2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s5p_device_fimc2 = {
+        .name           = "s5p-fimc",
+        .id             = 2,
+        .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
+        .resource       = s5p_fimc2_resource,
+};
diff --git a/arch/arm/plat-s5p/dev-pmu.c b/arch/arm/plat-s5p/dev-pmu.c
new file mode 100644
index 000000000000..a08576da72b0
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-pmu.c
@@ -0,0 +1,36 @@
+/*
+ * linux/arch/arm/plat-s5p/dev-pmu.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <asm/pmu.h>
+#include <mach/irqs.h>
+
+static struct resource s5p_pmu_resource = {
+        .start  = IRQ_PMU,
+        .end    = IRQ_PMU,
+        .flags  = IORESOURCE_IRQ,
+};
+
+struct platform_device s5p_device_pmu = {
+        .name           = "arm-pmu",
+        .id             = ARM_PMU_DEVICE_CPU,
+        .num_resources  = 1,
+        .resource       = &s5p_pmu_resource,
+};
+
+static int __init s5p_pmu_init(void)
+{
+        platform_device_register(&s5p_device_pmu);
+        return 0;
+}
+arch_initcall(s5p_pmu_init);
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
index 14828521f70c..54e9fb9d315e 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -18,12 +18,27 @@
 #define S5P_VA_SYSTIMER         S3C_ADDR(0x01200000)
 #define S5P_VA_SROMC            S3C_ADDR(0x01100000)
 
-#define S5P_VA_UART0            (S3C_VA_UART + 0x0)
-#define S5P_VA_UART1            (S3C_VA_UART + 0x400)
-#define S5P_VA_UART2            (S3C_VA_UART + 0x800)
-#define S5P_VA_UART3            (S3C_VA_UART + 0xC00)
+#define S5P_VA_COMBINER_BASE    S3C_ADDR(0x00600000)
+#define S5P_VA_COMBINER(x)      (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
 
+#define S5P_VA_COREPERI_BASE    S3C_ADDR(0x00800000)
+#define S5P_VA_COREPERI(x)      (S5P_VA_COREPERI_BASE + (x))
+#define S5P_VA_SCU              S5P_VA_COREPERI(0x0)
+#define S5P_VA_GIC_CPU          S5P_VA_COREPERI(0x100)
+#define S5P_VA_TWD              S5P_VA_COREPERI(0x600)
+#define S5P_VA_GIC_DIST         S5P_VA_COREPERI(0x1000)
+
+#define S5P_VA_L2CC             S3C_ADDR(0x00900000)
+
+#define S5P_VA_UART(x)          (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_VA_UART0            S5P_VA_UART(0)
+#define S5P_VA_UART1            S5P_VA_UART(1)
+#define S5P_VA_UART2            S5P_VA_UART(2)
+#define S5P_VA_UART3            S5P_VA_UART(3)
+
+#ifndef S3C_UART_OFFSET
 #define S3C_UART_OFFSET         (0x400)
+#endif
 
 #define VA_VIC(x)               (S3C_VA_IRQ + ((x) * 0x10000))
 #define VA_VIC0                 VA_VIC(0)
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index 7db322726bc2..4e8fe08cb70d 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -46,6 +46,47 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
         return (unsigned long)fvco;
 }
 
+#define PLL46XX_KDIV_MASK       (0xFFFF)
+#define PLL46XX_MDIV_MASK       (0x1FF)
+#define PLL46XX_PDIV_MASK       (0x3F)
+#define PLL46XX_SDIV_MASK       (0x7)
+#define PLL46XX_MDIV_SHIFT      (16)
+#define PLL46XX_PDIV_SHIFT      (8)
+#define PLL46XX_SDIV_SHIFT      (0)
+
+enum pll46xx_type_t {
+        pll_4600,
+        pll_4650,
+};
+
+static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
+                                            u32 pll_con0, u32 pll_con1,
+                                            enum pll46xx_type_t pll_type)
+{
+        unsigned long result;
+        u32 mdiv, pdiv, sdiv, kdiv;
+        u64 tmp;
+
+        mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
+        pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
+        sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
+        kdiv = pll_con1 & PLL46XX_KDIV_MASK;
+
+        tmp = baseclk;
+
+        if (pll_type == pll_4600) {
+                tmp *= (mdiv << 16) + kdiv;
+                do_div(tmp, (pdiv << sdiv));
+                result = tmp >> 16;
+        } else {
+                tmp *= (mdiv << 10) + kdiv;
+                do_div(tmp, (pdiv << sdiv));
+                result = tmp >> 10;
+        }
+
+        return result;
+}
+
 #define PLL90XX_MDIV_MASK       (0xFF)
 #define PLL90XX_PDIV_MASK       (0x3F)
 #define PLL90XX_SDIV_MASK       (0x7)
diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-s5p/include/plat/reset.h
new file mode 100644
index 000000000000..335e97812eed
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/reset.h
@@ -0,0 +1,16 @@
+/* linux/arch/arm/plat-s5p/include/plat/reset.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S5P_RESET_H
+#define __ASM_PLAT_S5P_RESET_H __FILE__
+
+extern void (*s5p_reset_hook)(void);
+
+#endif /* __ASM_PLAT_S5P_RESET_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5pv310.h b/arch/arm/plat-s5p/include/plat/s5pv310.h
new file mode 100644
index 000000000000..769c991ceb37
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv310.h
@@ -0,0 +1,34 @@
+/* linux/arch/arm/plat-s5p/include/plat/s5pv310.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5pv310 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5PV310 related SoCs */
+
+extern void s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5pv310_register_clocks(void);
+extern void s5pv310_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5PV310
+
+extern  int s5pv310_init(void);
+extern void s5pv310_init_irq(void);
+extern void s5pv310_map_io(void);
+extern void s5pv310_init_clocks(int xtal);
+extern struct sys_timer s5pv310_timer;
+
+#define s5pv310_init_uarts s5pv310_common_init_uarts
+
+#else
+#define s5pv310_init_clocks NULL
+#define s5pv310_init_uarts NULL
+#define s5pv310_map_io NULL
+#define s5pv310_init NULL
+#endif
diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-s5p/include/plat/system-reset.h
new file mode 100644
index 000000000000..f307f34e6422
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/system-reset.h
@@ -0,0 +1,31 @@
+/* linux/arch/arm/plat-s5p/include/plat/system-reset.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
+ *
+ * S5P - System define for arch_reset()
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <plat/watchdog-reset.h>
+
+void (*s5p_reset_hook)(void);
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* SWRESET support in s5p_reset_hook() */
+
+        if (s5p_reset_hook)
+                s5p_reset_hook();
+
+        /* Perform reset using Watchdog reset
+         * if there is no s5p_reset_hook()
+         */
+
+        arch_wdt_reset();
+}
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index 25e1eb6de59e..5560b12035d1 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -56,11 +56,13 @@ static struct s3c_uart_irq uart_irqs[] = {
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
 {
+#ifdef CONFIG_ARM_VIC
         int irq;
 
         /* initialize the VICs */
         for (irq = 0; irq < num_vic; irq++)
                 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
+#endif
 
         s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
         s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 2753fb3e4f73..4529dd6232bc 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -160,6 +160,11 @@ config S3C_DEV_HSMMC2
         help
           Compile in platform device definitions for HSMMC channel 2
 
+config S3C_DEV_HSMMC3
+        bool
+        help
+          Compile in platform device definitions for HSMMC channel 3
+
 config S3C_DEV_HWMON
         bool
         help
@@ -216,6 +221,11 @@ config SAMSUNG_DEV_ADC
         help
           Compile in platform device definition for ADC controller
 
+config SAMSUNG_DEV_IDE
+        bool
+        help
+          Compile in platform device definitions for IDE
+
 config S3C64XX_DEV_SPI
         bool
         help
@@ -227,6 +237,11 @@ config SAMSUNG_DEV_TS
         help
             Common in platform device definitions for touchscreen device
 
+config SAMSUNG_DEV_KEYPAD
+        bool
+        help
+          Compile in platform device definitions for keypad
+
 # DMA
 
 config S3C_DMA
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index b1d82cc5e716..4d8ff923207a 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,7 +12,7 @@ obj-				:=
 # Objects we always build independent of SoC choice
 
 obj-y                           += init.o
-obj-y                           += time.o
+obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET)   += time.o
 obj-y                           += clock.o
 obj-y                           += pwm-clock.o
 obj-y                           += gpio.o
@@ -30,9 +30,12 @@ obj-$(CONFIG_S3C_ADC)	+= adc.o
 
 # devices
 
+obj-y                           += platformdata.o
+
 obj-$(CONFIG_S3C_DEV_HSMMC)     += dev-hsmmc.o
 obj-$(CONFIG_S3C_DEV_HSMMC1)    += dev-hsmmc1.o
 obj-$(CONFIG_S3C_DEV_HSMMC2)    += dev-hsmmc2.o
+obj-$(CONFIG_S3C_DEV_HSMMC3)    += dev-hsmmc3.o
 obj-$(CONFIG_S3C_DEV_HWMON)     += dev-hwmon.o
 obj-y                           += dev-i2c0.o
 obj-$(CONFIG_S3C_DEV_I2C1)      += dev-i2c1.o
@@ -47,7 +50,9 @@ obj-$(CONFIG_S3C_DEV_ONENAND)	+= dev-onenand.o
 obj-$(CONFIG_S3C_DEV_RTC)       += dev-rtc.o
 
 obj-$(CONFIG_SAMSUNG_DEV_ADC)   += dev-adc.o
+obj-$(CONFIG_SAMSUNG_DEV_IDE)   += dev-ide.o
 obj-$(CONFIG_SAMSUNG_DEV_TS)    += dev-ts.o
+obj-$(CONFIG_SAMSUNG_DEV_KEYPAD)        += dev-keypad.o
 
 # DMA support
 
diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index 4c05b39810e2..b0f93f11e281 100644
--- a/arch/arm/plat-samsung/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
@@ -60,6 +60,11 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
         struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata;
 
         set->max_width = pd->max_width;
+        set->cd_type = pd->cd_type;
+        set->ext_cd_init = pd->ext_cd_init;
+        set->ext_cd_cleanup = pd->ext_cd_cleanup;
+        set->ext_cd_gpio = pd->ext_cd_gpio;
+        set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
 
         if (pd->cfg_gpio)
                 set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index e49bc4cd0ee6..1504fd802865 100644
--- a/arch/arm/plat-samsung/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
@@ -60,6 +60,11 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
         struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata;
 
         set->max_width = pd->max_width;
+        set->cd_type = pd->cd_type;
+        set->ext_cd_init = pd->ext_cd_init;
+        set->ext_cd_cleanup = pd->ext_cd_cleanup;
+        set->ext_cd_gpio = pd->ext_cd_gpio;
+        set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
 
         if (pd->cfg_gpio)
                 set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index 824580bc0e06..b28ef173444d 100644
--- a/arch/arm/plat-samsung/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
@@ -61,6 +61,11 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
         struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata;
 
         set->max_width = pd->max_width;
+        set->cd_type = pd->cd_type;
+        set->ext_cd_init = pd->ext_cd_init;
+        set->ext_cd_cleanup = pd->ext_cd_cleanup;
+        set->ext_cd_gpio = pd->ext_cd_gpio;
+        set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
 
         if (pd->cfg_gpio)
                 set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c
new file mode 100644
index 000000000000..85aaf0f2842f
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hsmmc3.c
@@ -0,0 +1,77 @@
+/* linux/arch/arm/plat-samsung/dev-hsmmc3.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Based on arch/arm/plat-samsung/dev-hsmmc1.c
+ *
+ * Samsung device definition for hsmmc device 3
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/mmc/host.h>
+
+#include <mach/map.h>
+#include <plat/sdhci.h>
+#include <plat/devs.h>
+
+#define S3C_SZ_HSMMC    (0x1000)
+
+static struct resource s3c_hsmmc3_resource[] = {
+        [0] = {
+                .start  = S3C_PA_HSMMC3,
+                .end    = S3C_PA_HSMMC3 + S3C_SZ_HSMMC - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_MMC3,
+                .end    = IRQ_MMC3,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+static u64 s3c_device_hsmmc3_dmamask = 0xffffffffUL;
+
+struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
+        .max_width      = 4,
+        .host_caps      = (MMC_CAP_4_BIT_DATA |
+                           MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+};
+
+struct platform_device s3c_device_hsmmc3 = {
+        .name           = "s3c-sdhci",
+        .id             = 3,
+        .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
+        .resource       = s3c_hsmmc3_resource,
+        .dev            = {
+                .dma_mask               = &s3c_device_hsmmc3_dmamask,
+                .coherent_dma_mask      = 0xffffffffUL,
+                .platform_data          = &s3c_hsmmc3_def_platdata,
+        },
+};
+
+void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
+{
+        struct s3c_sdhci_platdata *set = &s3c_hsmmc3_def_platdata;
+
+        set->max_width = pd->max_width;
+        set->cd_type = pd->cd_type;
+        set->ext_cd_init = pd->ext_cd_init;
+        set->ext_cd_cleanup = pd->ext_cd_cleanup;
+        set->ext_cd_gpio = pd->ext_cd_gpio;
+        set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+
+        if (pd->cfg_gpio)
+                set->cfg_gpio = pd->cfg_gpio;
+        if (pd->cfg_card)
+                set->cfg_card = pd->cfg_card;
+}
diff --git a/arch/arm/plat-samsung/dev-ide.c b/arch/arm/plat-samsung/dev-ide.c
new file mode 100644
index 000000000000..b497982795a7
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-ide.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/plat-samsung/dev-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung CF-ATA device definition.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+
+#include <mach/map.h>
+#include <plat/ata.h>
+#include <plat/devs.h>
+
+static struct resource s3c_cfcon_resource[] = {
+        [0] = {
+                .start  = SAMSUNG_PA_CFCON,
+                .end    = SAMSUNG_PA_CFCON + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_CFCON,
+                .end    = IRQ_CFCON,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s3c_device_cfcon = {
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
+        .resource       = s3c_cfcon_resource,
+};
+
+void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
+{
+        s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
+                         &s3c_device_cfcon);
+}
diff --git a/arch/arm/plat-samsung/dev-keypad.c b/arch/arm/plat-samsung/dev-keypad.c
new file mode 100644
index 000000000000..677c2d731b65
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-keypad.c
@@ -0,0 +1,50 @@
+/*
+ * linux/arch/arm/plat-samsung/dev-keypad.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <mach/irqs.h>
+#include <mach/map.h>
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/keypad.h>
+
+static struct resource samsung_keypad_resources[] = {
+        [0] = {
+                .start  = SAMSUNG_PA_KEYPAD,
+                .end    = SAMSUNG_PA_KEYPAD + 0x20 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_KEYPAD,
+                .end    = IRQ_KEYPAD,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device samsung_device_keypad = {
+        .name           = "samsung-keypad",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
+        .resource       = samsung_keypad_resources,
+};
+
+void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
+{
+        struct samsung_keypad_platdata *npd;
+
+        npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
+                        &samsung_device_keypad);
+
+        if (!npd->cfg_gpio)
+                npd->cfg_gpio = samsung_keypad_cfg_gpio;
+}
diff --git a/arch/arm/plat-samsung/dev-wdt.c b/arch/arm/plat-samsung/dev-wdt.c
index 5efca87cddbd..019b5b8cf14c 100644
--- a/arch/arm/plat-samsung/dev-wdt.c
+++ b/arch/arm/plat-samsung/dev-wdt.c
@@ -21,7 +21,7 @@
 static struct resource s3c_wdt_resource[] = {
         [0] = {
                 .start  = S3C_PA_WDT,
-                .end    = S3C_PA_WDT + SZ_1M - 1,
+                .end    = S3C_PA_WDT + SZ_1K,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/plat-samsung/gpiolib.c b/arch/arm/plat-samsung/gpiolib.c
index 8a8ba8bc1d96..c354089254fc 100644
--- a/arch/arm/plat-samsung/gpiolib.c
+++ b/arch/arm/plat-samsung/gpiolib.c
@@ -18,7 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <mach/gpio.h>
+#include <linux/gpio.h>
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/plat-samsung/include/plat/adc-core.h
new file mode 100644
index 000000000000..a281568d5856
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/adc-core.h
@@ -0,0 +1,28 @@
+/* linux/arch/arm/plat-samsung/include/plat/adc-core.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Samsung ADC Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_ADC_CORE_H
+#define __ASM_PLAT_ADC_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c_adc_setname(char *name)
+{
+#ifdef CONFIG_SAMSUNG_DEV_ADC
+        s3c_device_adc.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_ADC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/ata-core.h b/arch/arm/plat-samsung/include/plat/ata-core.h
new file mode 100644
index 000000000000..f5a4ec7141b1
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/ata-core.h
@@ -0,0 +1,28 @@
+/* linux/arch/arm/plat-samsung/include/plat/ata-core.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung CF-ATA Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_ATA_CORE_H
+#define __ASM_PLAT_ATA_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+*/
+
+/* re-define device name depending on support. */
+static inline void s3c_cfcon_setname(char *name)
+{
+#ifdef CONFIG_SAMSUNG_DEV_IDE
+        s3c_device_cfcon.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_ATA_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/ata.h b/arch/arm/plat-samsung/include/plat/ata.h
new file mode 100644
index 000000000000..2a3855a8372a
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/ata.h
@@ -0,0 +1,36 @@
+/* linux/arch/arm/plat-samsung/include/plat/ata.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung CF-ATA platform_device info
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_ATA_H
+#define __ASM_PLAT_ATA_H __FILE__
+
+/**
+ * struct s3c_ide_platdata - S3C IDE driver platform data.
+ * @setup_gpio: Setup the external GPIO pins to the right state for data
+ * transfer in true-ide mode.
+ */
+struct s3c_ide_platdata {
+        void (*setup_gpio)(void);
+};
+
+/*
+ * s3c_ide_set_platdata() - Setup the platform specifc data for IDE driver.
+ * @pdata: Platform data for IDE driver.
+ */
+extern void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata);
+
+/* architecture-specific IDE configuration */
+extern void s3c64xx_ide_setup_gpio(void);
+extern void s5pc100_ide_setup_gpio(void);
+extern void s5pv210_ide_setup_gpio(void);
+
+#endif /*__ASM_PLAT_ATA_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index e6144e4b9118..85f6f23a510f 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -54,6 +54,8 @@ extern struct platform_device s3c_device_hwmon;
 extern struct platform_device s3c_device_hsmmc0;
 extern struct platform_device s3c_device_hsmmc1;
 extern struct platform_device s3c_device_hsmmc2;
+extern struct platform_device s3c_device_hsmmc3;
+extern struct platform_device s3c_device_cfcon;
 
 extern struct platform_device s3c_device_spi0;
 extern struct platform_device s3c_device_spi1;
@@ -100,6 +102,12 @@ extern struct platform_device s5pc100_device_iis0;
 extern struct platform_device s5pc100_device_iis1;
 extern struct platform_device s5pc100_device_iis2;
 
+extern struct platform_device samsung_device_keypad;
+
+extern struct platform_device s5p_device_fimc0;
+extern struct platform_device s5p_device_fimc1;
+extern struct platform_device s5p_device_fimc2;
+
 /* s3c2440 specific devices */
 
 #ifdef CONFIG_CPU_S3C2440
@@ -108,3 +116,15 @@ extern struct platform_device s3c_device_camif;
 extern struct platform_device s3c_device_ac97;
 
 #endif
+
+/**
+ * s3c_set_platdata() - helper for setting platform data
+ * @pd: The default platform data for this device.
+ * @pdsize: The size of the platform data.
+ * @pdev: Pointer to the device to fill in.
+ *
+ * This helper replaces a number of calls that copy and then set the
+ * platform data of the device.
+ */
+extern void *s3c_set_platdata(void *pd, size_t pdsize,
+                              struct platform_device *pdev);
diff --git a/arch/arm/plat-samsung/include/plat/fb-core.h b/arch/arm/plat-samsung/include/plat/fb-core.h
new file mode 100644
index 000000000000..bca383efcf6d
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/fb-core.h
@@ -0,0 +1,29 @@
+/*
+ * arch/arm/plat-samsung/include/plat/fb-core.h
+ *
+ * Copyright 2010 Samsung Electronics Co., Ltd.
+ *      Pawel Osciak <p.osciak@samsung.com>
+ *
+ * Samsung framebuffer driver core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_PLAT_FB_CORE_H
+#define __ASM_PLAT_FB_CORE_H __FILE__
+
+/*
+ * These functions are only for use with the core support code, such as
+ * the CPU-specific initialization code.
+ */
+
+/* Re-define device name depending on support. */
+static inline void s3c_fb_setname(char *name)
+{
+#ifdef CONFIG_S3C_DEV_FB
+        s3c_device_fb.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_FB_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index 27d3b497b55b..cb3ca3adc685 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -42,6 +42,7 @@ struct s3c_fb_pd_win {
  * @setup_gpio: Setup the external GPIO pins to the right state to transfer
  *              the data from the display system to the connected display
  *              device.
+ * @default_win: default window layer number to be used for UI layer.
  * @vidcon0: The base vidcon0 values to control the panel data format.
  * @vidcon1: The base vidcon1 values to control the panel data output.
  * @win: The setup data for each hardware window, or NULL for unused.
@@ -58,6 +59,8 @@ struct s3c_fb_platdata {
 
         struct s3c_fb_pd_win    *win[S3C_FB_MAX_WIN];
 
+        u32                      default_win;
+
         u32                      vidcon0;
         u32                      vidcon1;
 };
diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h
new file mode 100644
index 000000000000..81a3bfeeccad
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/fimc-core.h
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/plat-samsung/include/plat/fimc-core.h
+ *
+ * Copyright 2010 Samsung Electronics Co., Ltd.
+ *      Sylwester Nawrocki <s.nawrocki@samsung.com>
+ *
+ * Samsung camera interface driver core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_PLAT_FIMC_CORE_H
+#define __ASM_PLAT_FIMC_CORE_H __FILE__
+
+/*
+ * These functions are only for use with the core support code, such as
+ * the CPU-specific initialization code.
+ */
+
+/* Re-define device name to differentiate the subsystem in various SoCs. */
+static inline void s3c_fimc_setname(int id, char *name)
+{
+        switch (id) {
+#ifdef CONFIG_S5P_DEV_FIMC0
+        case 0:
+                s5p_device_fimc0.name = name;
+                break;
+#endif
+#ifdef CONFIG_S5P_DEV_FIMC1
+        case 1:
+                s5p_device_fimc1.name = name;
+                break;
+#endif
+#ifdef CONFIG_S5P_DEV_FIMC2
+        case 2:
+                s5p_device_fimc2.name = name;
+                break;
+#endif
+        }
+}
+
+#endif /* __ASM_PLAT_FIMC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/keypad-core.h b/arch/arm/plat-samsung/include/plat/keypad-core.h
new file mode 100644
index 000000000000..d513e1b3a31e
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/keypad-core.h
@@ -0,0 +1,31 @@
+/*
+ * linux/arch/arm/plat-samsung/include/plat/keypad-core.h
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * Samsung keypad controller core function
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_KEYPAD_CORE_H
+#define __ASM_ARCH_KEYPAD_CORE_H
+
+/* These function are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void samsung_keypad_setname(char *name)
+{
+#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
+        samsung_device_keypad.name = name;
+#endif
+}
+
+#endif /* __ASM_ARCH_KEYPAD_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/keypad.h b/arch/arm/plat-samsung/include/plat/keypad.h
index 3a70c125fe51..b59a6483cd8a 100644
--- a/arch/arm/plat-samsung/include/plat/keypad.h
+++ b/arch/arm/plat-samsung/include/plat/keypad.h
@@ -40,4 +40,17 @@ struct samsung_keypad_platdata {
         void (*cfg_gpio)(unsigned int rows, unsigned int cols);
 };
 
+/**
+ * samsung_keypad_set_platdata - Set platform data for Samsung Keypad device.
+ * @pd: Platform data to register to device.
+ *
+ * Register the given platform data for use with Samsung Keypad device.
+ * The call will copy the platform data, so the board definitions can
+ * make the structure itself __initdata.
+ */
+extern void samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd);
+
+/* defined by architecture to configure gpio. */
+extern void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols);
+
 #endif /* __PLAT_SAMSUNG_KEYPAD_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-ata.h b/arch/arm/plat-samsung/include/plat/regs-ata.h
new file mode 100644
index 000000000000..f5df92fdae26
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/regs-ata.h
@@ -0,0 +1,56 @@
+/* linux/arch/arm/plat-samsung/include/plat/regs-ata.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Samsung CF-ATA register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_REGS_ATA_H
+#define __ASM_PLAT_REGS_ATA_H __FILE__
+
+#define S3C_CFATA_REG(x)        (x)
+
+#define S3C_CFATA_MUX           S3C_CFATA_REG(0x0)
+
+#define S3C_ATA_CTRL            S3C_CFATA_REG(0x0)
+#define S3C_ATA_STATUS          S3C_CFATA_REG(0x4)
+#define S3C_ATA_CMD             S3C_CFATA_REG(0x8)
+#define S3C_ATA_SWRST           S3C_CFATA_REG(0xc)
+#define S3C_ATA_IRQ             S3C_CFATA_REG(0x10)
+#define S3C_ATA_IRQ_MSK         S3C_CFATA_REG(0x14)
+#define S3C_ATA_CFG             S3C_CFATA_REG(0x18)
+
+#define S3C_ATA_MDMA_TIME       S3C_CFATA_REG(0x28)
+#define S3C_ATA_PIO_TIME        S3C_CFATA_REG(0x2c)
+#define S3C_ATA_UDMA_TIME       S3C_CFATA_REG(0x30)
+#define S3C_ATA_XFR_NUM         S3C_CFATA_REG(0x34)
+#define S3C_ATA_XFR_CNT         S3C_CFATA_REG(0x38)
+#define S3C_ATA_TBUF_START      S3C_CFATA_REG(0x3c)
+#define S3C_ATA_TBUF_SIZE       S3C_CFATA_REG(0x40)
+#define S3C_ATA_SBUF_START      S3C_CFATA_REG(0x44)
+#define S3C_ATA_SBUF_SIZE       S3C_CFATA_REG(0x48)
+#define S3C_ATA_CADR_TBUF       S3C_CFATA_REG(0x4c)
+#define S3C_ATA_CADR_SBUF       S3C_CFATA_REG(0x50)
+#define S3C_ATA_PIO_DTR         S3C_CFATA_REG(0x54)
+#define S3C_ATA_PIO_FED         S3C_CFATA_REG(0x58)
+#define S3C_ATA_PIO_SCR         S3C_CFATA_REG(0x5c)
+#define S3C_ATA_PIO_LLR         S3C_CFATA_REG(0x60)
+#define S3C_ATA_PIO_LMR         S3C_CFATA_REG(0x64)
+#define S3C_ATA_PIO_LHR         S3C_CFATA_REG(0x68)
+#define S3C_ATA_PIO_DVR         S3C_CFATA_REG(0x6c)
+#define S3C_ATA_PIO_CSD         S3C_CFATA_REG(0x70)
+#define S3C_ATA_PIO_DAD         S3C_CFATA_REG(0x74)
+#define S3C_ATA_PIO_READY       S3C_CFATA_REG(0x78)
+#define S3C_ATA_PIO_RDATA       S3C_CFATA_REG(0x7c)
+
+#define S3C_CFATA_MUX_TRUEIDE   0x01
+
+#define S3C_ATA_CFG_SWAP        0x40
+#define S3C_ATA_CFG_IORDYEN     0x02
+
+#endif /* __ASM_PLAT_REGS_ATA_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index 0f43599248ad..4c3647f80057 100644
--- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -40,16 +40,10 @@
 
 /* OSD1 and OSD4 do not have register D */
 
-#define VIDOSD_A(_win)                          (0x40 + ((_win) * 16))
-#define VIDOSD_B(_win)                          (0x44 + ((_win) * 16))
-#define VIDOSD_C(_win)                          (0x48 + ((_win) * 16))
-#define VIDOSD_D(_win)                          (0x4C + ((_win) * 16))
-
+#define VIDOSD_BASE                             (0x40)
 
 #define VIDINTCON0                              (0x130)
 
-#define WxKEYCONy(_win, _con)                   ((0x140 + ((_win) * 8)) + ((_con) * 4))
-
 /* WINCONx */
 
 #define WINCONx_CSCWIDTH_MASK                   (0x3 << 26)
@@ -143,76 +137,6 @@
 #define WPALCON_W2PAL_16BPP_A555                (1 << 6)
 
 
-/* system specific implementation code for palette sizes, and other
- * information that changes depending on which architecture is being
- * compiled.
-*/
-
-/* return true if window _win has OSD register D */
-#define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0)
-
-static inline unsigned int s3c_fb_win_pal_size(unsigned int win)
-{
-        if (win < 2)
-                return 256;
-        if (win < 4)
-                return 16;
-        if (win == 4)
-                return 4;
-
-        BUG();  /* shouldn't get here */
-}
-
-static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp)
-{
-        /* all windows can do 1/2 bpp */
-
-        if ((bpp == 25 || bpp == 19) && win == 0)
-                return 0;       /* win 0 does not have 19 or 25bpp modes */
-
-        if (bpp == 4 && win == 4)
-                return 0;
-
-        if (bpp == 8 && (win >= 3))
-                return 0;       /* win 3/4 cannot do 8bpp in any mode */
-
-        return 1;
-}
-
-static inline int s3c_fb_pal_is16(unsigned int window)
-{
-        return window > 1;
-}
-
-struct s3c_fb_palette {
-        struct fb_bitfield      r;
-        struct fb_bitfield      g;
-        struct fb_bitfield      b;
-        struct fb_bitfield      a;
-};
-
-static inline void s3c_fb_init_palette(unsigned int window,
-                                       struct s3c_fb_palette *palette)
-{
-        if (window < 2) {
-                /* Windows 0/1 are 8/8/8 or A/8/8/8 */
-                palette->r.offset = 16;
-                palette->r.length = 8;
-                palette->g.offset = 8;
-                palette->g.length = 8;
-                palette->b.offset = 0;
-                palette->b.length = 8;
-        } else {
-                /* currently we assume RGB 5/6/5 */
-                palette->r.offset = 11;
-                palette->r.length = 5;
-                palette->g.offset = 5;
-                palette->g.length = 6;
-                palette->b.offset = 0;
-                palette->b.length = 5;
-        }
-}
-
 /* Notes on per-window bpp settings
  *
  * Value        Win0     Win1     Win2     Win3     Win 4
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index 0ef806e50344..8f39aa5b26ea 100644
--- a/arch/arm/plat-samsung/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -112,6 +112,13 @@
 #define VIDCON2_ORGYCbCr                        (1 << 8)
 #define VIDCON2_YUVORDCrCb                      (1 << 7)
 
+/* PRTCON (S3C6410, S5PC100)
+ * Might not be present in the S3C6410 documentation,
+ * but tests prove it's there almost for sure; shouldn't hurt in any case.
+ */
+#define PRTCON                                  (0x0c)
+#define PRTCON_PROTECT                          (1 << 11)
+
 /* VIDTCON0 */
 
 #define VIDTCON0_VBPDE_MASK                     (0xff << 24)
@@ -173,6 +180,7 @@
 #define WINCONx_BITSWP                          (1 << 18)
 #define WINCONx_BYTSWP                          (1 << 17)
 #define WINCONx_HAWSWP                          (1 << 16)
+#define WINCONx_WSWP                            (1 << 15)
 #define WINCONx_BURSTLEN_MASK                   (0x3 << 9)
 #define WINCONx_BURSTLEN_SHIFT                  (9)
 #define WINCONx_BURSTLEN_16WORD                 (0x0 << 9)
@@ -212,6 +220,13 @@
 #define WINCON1_BPPMODE_25BPP_A1888             (0xd << 2)
 #define WINCON1_BPPMODE_28BPP_A4888             (0xd << 2)
 
+/* S5PV210 */
+#define SHADOWCON                               (0x34)
+#define SHADOWCON_WINx_PROTECT(_win)            (1 << (10 + (_win)))
+/* DMA channels (all windows) */
+#define SHADOWCON_CHx_ENABLE(_win)              (1 << (_win))
+/* Local input channels (windows 0-2) */
+#define SHADOWCON_CHx_LOCAL_ENABLE(_win)        (1 << (5 + (_win)))
 
 #define VIDOSDxA_TOPLEFT_X_MASK                 (0x7ff << 11)
 #define VIDOSDxA_TOPLEFT_X_SHIFT                (11)
@@ -291,11 +306,12 @@
 #define VIDINTCON0_FRAMESEL0_ACTIVE             (0x2 << 15)
 #define VIDINTCON0_FRAMESEL0_FRONTPORCH         (0x3 << 15)
 
-#define VIDINTCON0_FRAMESEL1                    (1 << 14)
-#define VIDINTCON0_FRAMESEL1_NONE               (0x0 << 14)
-#define VIDINTCON0_FRAMESEL1_BACKPORCH          (0x1 << 14)
-#define VIDINTCON0_FRAMESEL1_VSYNC              (0x2 << 14)
-#define VIDINTCON0_FRAMESEL1_FRONTPORCH         (0x3 << 14)
+#define VIDINTCON0_FRAMESEL1                    (1 << 13)
+#define VIDINTCON0_FRAMESEL1_MASK               (0x3 << 13)
+#define VIDINTCON0_FRAMESEL1_NONE               (0x0 << 13)
+#define VIDINTCON0_FRAMESEL1_BACKPORCH          (0x1 << 13)
+#define VIDINTCON0_FRAMESEL1_VSYNC              (0x2 << 13)
+#define VIDINTCON0_FRAMESEL1_FRONTPORCH         (0x3 << 13)
 
 #define VIDINTCON0_INT_FRAME                    (1 << 12)
 #define VIDINTCON0_FIFIOSEL_MASK                (0x7f << 5)
@@ -321,6 +337,10 @@
 #define VIDINTCON1_INT_FIFO                     (1 << 0)
 
 /* Window colour-key control registers */
+#define WKEYCON                                 (0x140) /* 6410,V210 */
+
+#define WKEYCON0                                (0x00)
+#define WKEYCON1                                (0x04)
 
 #define WxKEYCON0_KEYBL_EN                      (1 << 26)
 #define WxKEYCON0_KEYEN_F                       (1 << 25)
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index 65c190d142dd..30b7cc14cef5 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -14,6 +14,9 @@
 #define __ASM_ARCH_REGS_RTC_H __FILE__
 
 #define S3C2410_RTCREG(x) (x)
+#define S3C2410_INTP            S3C2410_RTCREG(0x30)
+#define S3C2410_INTP_ALM        (1 << 1)
+#define S3C2410_INTP_TIC        (1 << 0)
 
 #define S3C2410_RTCCON        S3C2410_RTCREG(0x40)
 #define S3C2410_RTCCON_RTCEN  (1<<0)
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index a6eba8496b24..788837e99cb3 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -259,6 +259,8 @@ struct s3c2410_uartcfg {
         unsigned short     flags;
         upf_t              uart_flags;   /* default uart flags */
 
+        unsigned int       has_fracval;
+
         unsigned long      ucon;         /* value of ucon for port */
         unsigned long      ulcon;        /* value of ulcon for port */
         unsigned long      ufcon;        /* value of ufcon for port */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 016674fa20dd..30844c263d03 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -20,10 +20,31 @@ struct mmc_host;
 struct mmc_card;
 struct mmc_ios;
 
+enum cd_types {
+        S3C_SDHCI_CD_INTERNAL,  /* use mmc internal CD line */
+        S3C_SDHCI_CD_EXTERNAL,  /* use external callback */
+        S3C_SDHCI_CD_GPIO,      /* use external gpio pin for CD line */
+        S3C_SDHCI_CD_NONE,      /* no CD line, use polling to detect card */
+        S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */
+};
+
 /**
  * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
  * @max_width: The maximum number of data bits supported.
  * @host_caps: Standard MMC host capabilities bit field.
+ * @cd_type: Type of Card Detection method (see cd_types enum above)
+ * @ext_cd_init: Initialize external card detect subsystem. Called on
+ *               sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
+ *               notify_func argument is a callback to the sdhci-s3c driver
+ *               that triggers the card detection event. Callback arguments:
+ *               dev is pointer to platform device of the host controller,
+ *               state is new state of the card (0 - removed, 1 - inserted).
+ * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on
+ *               sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL.
+ *               notify_func argument is the same callback as for ext_cd_init.
+ * @ext_cd_gpio: gpio pin used for external CD line, valid only if
+ *               cd_type == S3C_SDHCI_CD_GPIO
+ * @ext_cd_gpio_invert: invert values for external CD gpio line
  * @cfg_gpio: Configure the GPIO for a specific card bit-width
  * @cfg_card: Configure the interface for a specific card and speed. This
  *            is necessary the controllers and/or GPIO blocks require the
@@ -37,9 +58,17 @@ struct mmc_ios;
 struct s3c_sdhci_platdata {
         unsigned int    max_width;
         unsigned int    host_caps;
+        enum cd_types   cd_type;
 
         char            **clocks;       /* set of clock sources */
 
+        int             ext_cd_gpio;
+        bool            ext_cd_gpio_invert;
+        int     (*ext_cd_init)(void (*notify_func)(struct platform_device *,
+                                                   int state));
+        int     (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *,
+                                                      int state));
+
         void    (*cfg_gpio)(struct platform_device *dev, int width);
         void    (*cfg_card)(struct platform_device *dev,
                             void __iomem *regbase,
@@ -58,6 +87,7 @@ struct s3c_sdhci_platdata {
 extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
 extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
 extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
+extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd);
 
 /* Default platform data, exported so that per-cpu initialisation can
  * set the correct one when there are more than one cpu type selected.
@@ -66,6 +96,7 @@ extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
 extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
 extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
 extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
+extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata;
 
 /* Helper function availablity */
 
@@ -78,13 +109,13 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
 extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
 extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
+extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
 
-/* S3C6400 SDHCI setup */
+/* S3C64XX SDHCI setup */
 
 #ifdef CONFIG_S3C64XX_SETUP_SDHCI
 extern char *s3c64xx_hsmmc_clksrcs[4];
 
-#ifdef CONFIG_S3C_DEV_HSMMC
 extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
                                          void __iomem *r,
                                          struct mmc_ios *ios,
@@ -92,76 +123,62 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
 
 static inline void s3c6400_default_sdhci0(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC
         s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
         s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
+#endif
 }
 
-#else
-static inline void s3c6400_default_sdhci0(void) { }
-#endif  /* CONFIG_S3C_DEV_HSMMC */
-
-#ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s3c6400_default_sdhci1(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC1
         s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
         s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s3c6400_default_sdhci1(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC1 */
 
-#ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s3c6400_default_sdhci2(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC2
         s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
         s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s3c6400_default_sdhci2(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC2 */
-
-/* S3C6410 SDHCI setup */
 
 extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
                                          void __iomem *r,
                                          struct mmc_ios *ios,
                                          struct mmc_card *card);
 
-#ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s3c6410_default_sdhci0(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC
         s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
         s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s3c6410_default_sdhci0(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC */
 
-#ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s3c6410_default_sdhci1(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC1
         s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
         s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s3c6410_default_sdhci1(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC1 */
 
-#ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s3c6410_default_sdhci2(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC2
         s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
         s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s3c6410_default_sdhci2(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC2 */
 
 #else
 static inline void s3c6410_default_sdhci0(void) { }
@@ -183,48 +200,42 @@ extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
                                            struct mmc_ios *ios,
                                            struct mmc_card *card);
 
-#ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s5pc100_default_sdhci0(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC
         s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
         s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
+#endif
 }
-#else
-static inline void s5pc100_default_sdhci0(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC */
 
-#ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s5pc100_default_sdhci1(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC1
         s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
         s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
+#endif
 }
-#else
-static inline void s5pc100_default_sdhci1(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC1 */
 
-#ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s5pc100_default_sdhci2(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC2
         s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
         s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
+#endif
 }
-#else
-static inline void s5pc100_default_sdhci2(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC1 */
-
 
 #else
 static inline void s5pc100_default_sdhci0(void) { }
 static inline void s5pc100_default_sdhci1(void) { }
 static inline void s5pc100_default_sdhci2(void) { }
+
 #endif /* CONFIG_S5PC100_SETUP_SDHCI */
 
+/* S5PV210 SDHCI setup */
 
-/* S5PC110 SDHCI setup */
 #ifdef CONFIG_S5PV210_SETUP_SDHCI
 extern char *s5pv210_hsmmc_clksrcs[4];
 
@@ -233,46 +244,48 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
                                            struct mmc_ios *ios,
                                            struct mmc_card *card);
 
-#ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s5pv210_default_sdhci0(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC
         s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
         s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s5pv210_default_sdhci0(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC */
 
-#ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s5pv210_default_sdhci1(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC1
         s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
         s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s5pv210_default_sdhci1(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC1 */
 
-#ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s5pv210_default_sdhci2(void)
 {
+#ifdef CONFIG_S3C_DEV_HSMMC2
         s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
         s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
+#endif
+}
+
+static inline void s5pv210_default_sdhci3(void)
+{
+#ifdef CONFIG_S3C_DEV_HSMMC3
+        s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
+        s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
+        s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
+#endif
 }
-#else
-static inline void s5pv210_default_sdhci2(void) { }
-#endif /* CONFIG_S3C_DEV_HSMMC2 */
 
 #else
 static inline void s5pv210_default_sdhci0(void) { }
 static inline void s5pv210_default_sdhci1(void) { }
 static inline void s5pv210_default_sdhci2(void) { }
-#endif /* CONFIG_S5PC100_SETUP_SDHCI */
-
-
+static inline void s5pv210_default_sdhci3(void) { }
 
+#endif /* CONFIG_S5PV210_SETUP_SDHCI */
 
 #endif /* __PLAT_S3C_SDHCI_H */
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c
new file mode 100644
index 000000000000..7cf2e1e3b20f
--- /dev/null
+++ b/arch/arm/plat-samsung/platformdata.c
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-samsung/platformdata.c
+ *
+ * Copyright 2010 Ben Dooks <ben-linux <at> fluff.org>
+ *
+ * Helper for platform data setting
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <plat/devs.h>
+
+void __init *s3c_set_platdata(void *pd, size_t pdsize,
+                              struct platform_device *pdev)
+{
+        void *npd;
+
+        if (!pd) {
+                /* too early to use dev_name(), may not be registered */
+                printk(KERN_ERR "%s: no platform data supplied\n", pdev->name);
+                return NULL;
+        }
+
+        npd = kmemdup(pd, pdsize, GFP_KERNEL);
+        if (!npd) {
+                printk(KERN_ERR "%s: cannot clone platform data\n", pdev->name);
+                return NULL;
+        }
+
+        pdev->dev.platform_data = npd;
+        return npd;
+}
diff --git a/arch/avr32/include/asm/cache.h b/arch/avr32/include/asm/cache.h
index d3cf35ab11ab..c3a58a189a91 100644
--- a/arch/avr32/include/asm/cache.h
+++ b/arch/avr32/include/asm/cache.h
@@ -11,7 +11,7 @@
  * cache before the transfer is done, causing old data to be seen by
  * the CPU.
  */
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 #ifndef __ASSEMBLER__
 struct cache_info {
diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h
index 0399359ab5d8..aaf5199d8fcb 100644
--- a/arch/avr32/include/asm/dma-mapping.h
+++ b/arch/avr32/include/asm/dma-mapping.h
@@ -336,14 +336,4 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 
-static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
-{
-        return 1;
-}
-
-static inline int dma_get_cache_alignment(void)
-{
-        return boot_cpu_data.dcache.linesz;
-}
-
 #endif /* __ASM_AVR32_DMA_MAPPING_H */
diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h
index 93f6c634fdf4..bd0641a267f1 100644
--- a/arch/blackfin/include/asm/cache.h
+++ b/arch/blackfin/include/asm/cache.h
@@ -15,7 +15,7 @@
 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
 #define SMP_CACHE_BYTES L1_CACHE_BYTES
 
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 #ifdef CONFIG_SMP
 #define __cacheline_aligned
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index 212cb80fd74b..bbf461076a0a 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -21,8 +21,6 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 #define dma_supported(d, m)         (1)
-#define dma_get_cache_alignment()   (32)
-#define dma_is_consistent(d, h)     (1)
 
 static inline int
 dma_set_mask(struct device *dev, u64 dma_mask)
diff --git a/arch/cris/include/asm/dma-mapping.h b/arch/cris/include/asm/dma-mapping.h
index da8ef8e8f842..8588b2ccf854 100644
--- a/arch/cris/include/asm/dma-mapping.h
+++ b/arch/cris/include/asm/dma-mapping.h
@@ -152,14 +152,6 @@ dma_set_mask(struct device *dev, u64 mask)
         return 0;
 }
 
-static inline int
-dma_get_cache_alignment(void)
-{
-        return (1 << INTERNODE_CACHE_SHIFT);
-}
-
-#define dma_is_consistent(d, h) (1)
-
 static inline void
 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
diff --git a/arch/cris/include/asm/pgtable.h b/arch/cris/include/asm/pgtable.h
index 99ea6cd1b143..f63d6fccbc6c 100644
--- a/arch/cris/include/asm/pgtable.h
+++ b/arch/cris/include/asm/pgtable.h
@@ -260,6 +260,9 @@ static inline pgd_t * pgd_offset(const struct mm_struct *mm, unsigned long addre
 #define pgd_ERROR(e) \
         printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
 
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
+                remap_pfn_range(vma, vaddr, pfn, size, prot)
+
 
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
 
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h
index 6af5d83e2fb2..dfb811002c64 100644
--- a/arch/frv/include/asm/dma-mapping.h
+++ b/arch/frv/include/asm/dma-mapping.h
@@ -126,14 +126,6 @@ int dma_set_mask(struct device *dev, u64 mask)
 }
 
 static inline
-int dma_get_cache_alignment(void)
-{
-        return 1 << L1_CACHE_SHIFT;
-}
-
-#define dma_is_consistent(d, h) (1)
-
-static inline
 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                     enum dma_data_direction direction)
 {
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h
index ccae981876fa..e9a0ec85a402 100644
--- a/arch/frv/include/asm/mem-layout.h
+++ b/arch/frv/include/asm/mem-layout.h
@@ -35,7 +35,7 @@
  * the slab must be aligned such that load- and store-double instructions don't
  * fault if used
  */
-#define ARCH_KMALLOC_MINALIGN           L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN               L1_CACHE_BYTES
 #define ARCH_SLAB_MINALIGN              L1_CACHE_BYTES
 
 /*****************************************************************************/
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 7d09a09cdaad..a2e7368a0150 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -86,8 +86,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
         return daddr;
 }
 
-extern int dma_get_cache_alignment(void);
-
 static inline void
 dma_cache_sync (struct device *dev, void *vaddr, size_t size,
         enum dma_data_direction dir)
@@ -99,6 +97,4 @@ dma_cache_sync (struct device *dev, void *vaddr, size_t size,
         mb();
 }
 
-#define dma_is_consistent(d, h) (1)     /* all we do is coherent memory... */
-
 #endif /* _ASM_IA64_DMA_MAPPING_H */
diff --git a/arch/ia64/include/asm/rwsem.h b/arch/ia64/include/asm/rwsem.h
index e8762688e8e3..215d5454c7d3 100644
--- a/arch/ia64/include/asm/rwsem.h
+++ b/arch/ia64/include/asm/rwsem.h
@@ -40,9 +40,9 @@ struct rw_semaphore {
 };
 
 #define RWSEM_UNLOCKED_VALUE            __IA64_UL_CONST(0x0000000000000000)
-#define RWSEM_ACTIVE_BIAS               __IA64_UL_CONST(0x0000000000000001)
-#define RWSEM_ACTIVE_MASK               __IA64_UL_CONST(0x00000000ffffffff)
-#define RWSEM_WAITING_BIAS              -__IA64_UL_CONST(0x0000000100000000)
+#define RWSEM_ACTIVE_BIAS               (1L)
+#define RWSEM_ACTIVE_MASK               (0xffffffffL)
+#define RWSEM_WAITING_BIAS              (-0x100000000L)
 #define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
 #define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
 
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 744329072f33..cce050e85c73 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2191,8 +2191,15 @@ pfmfs_delete_dentry(struct dentry *dentry)
         return 1;
 }
 
+static char *pfmfs_dname(struct dentry *dentry, char *buffer, int buflen)
+{
+        return dynamic_dname(dentry, buffer, buflen, "pfm:[%lu]",
+                             dentry->d_inode->i_ino);
+}
+
 static const struct dentry_operations pfmfs_dentry_operations = {
         .d_delete = pfmfs_delete_dentry,
+        .d_dname = pfmfs_dname,
 };
 
 
@@ -2202,8 +2209,7 @@ pfm_alloc_file(pfm_context_t *ctx)
         struct file *file;
         struct inode *inode;
         struct path path;
-        char name[32];
-        struct qstr this;
+        struct qstr this = { .name = "" };
 
         /*
          * allocate a new inode
@@ -2218,11 +2224,6 @@ pfm_alloc_file(pfm_context_t *ctx)
         inode->i_uid  = current_fsuid();
         inode->i_gid  = current_fsgid();
 
-        sprintf(name, "[%lu]", inode->i_ino);
-        this.name = name;
-        this.len  = strlen(name);
-        this.hash = inode->i_ino;
-
         /*
          * allocate a new dcache entry
          */
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 41ae6a596b50..8fb958abf8d0 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -98,12 +98,6 @@ static struct resource bss_resource = {
 
 unsigned long ia64_max_cacheline_size;
 
-int dma_get_cache_alignment(void)
-{
-        return ia64_max_cacheline_size;
-}
-EXPORT_SYMBOL(dma_get_cache_alignment);
-
 unsigned long ia64_iobase;      /* virtual address for I/O accesses */
 EXPORT_SYMBOL(ia64_iobase);
 struct io_space io_space[MAX_IO_SPACES];
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index ecafbe1718c3..0395c51e46a6 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -8,6 +8,6 @@
 #define        L1_CACHE_SHIFT  4
 #define        L1_CACHE_BYTES  (1<< L1_CACHE_SHIFT)
 
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 #endif
diff --git a/arch/m68k/include/asm/dma-mapping.h b/arch/m68k/include/asm/dma-mapping.h
index 26f505488c11..17f7a45948ea 100644
--- a/arch/m68k/include/asm/dma-mapping.h
+++ b/arch/m68k/include/asm/dma-mapping.h
@@ -16,16 +16,6 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
         return 0;
 }
 
-static inline int dma_get_cache_alignment(void)
-{
-        return 1 << L1_CACHE_SHIFT;
-}
-
-static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
-{
-        return 0;
-}
-
 extern void *dma_alloc_coherent(struct device *, size_t,
                                 dma_addr_t *, gfp_t);
 extern void dma_free_coherent(struct device *, size_t,
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
index 507389580709..8fbb0ec10233 100644
--- a/arch/microblaze/include/asm/dma-mapping.h
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -106,7 +106,6 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d, h) (1)
 
 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
                                         dma_addr_t *dma_handle, gfp_t flag)
@@ -132,11 +131,6 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
         ops->free_coherent(dev, size, cpu_addr, dma_handle);
 }
 
-static inline int dma_get_cache_alignment(void)
-{
-        return L1_CACHE_BYTES;
-}
-
 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                 enum dma_data_direction direction)
 {
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 4f268faa0126..cf377d91da71 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -40,7 +40,7 @@
 #ifndef __ASSEMBLY__
 
 /* MS be sure that SLAB allocates aligned objects */
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 #define ARCH_SLAB_MINALIGN      L1_CACHE_BYTES
 
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 664ba53dc32a..18fbf7af8e93 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -62,15 +62,6 @@ dma_set_mask(struct device *dev, u64 mask)
         return 0;
 }
 
-static inline int
-dma_get_cache_alignment(void)
-{
-        /* XXX Largest on any MIPS */
-        return 128;
-}
-
-extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr);
-
 extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction);
 
diff --git a/arch/mips/include/asm/mach-generic/kmalloc.h b/arch/mips/include/asm/mach-generic/kmalloc.h
index b8e6deba352f..a5d669086ed9 100644
--- a/arch/mips/include/asm/mach-generic/kmalloc.h
+++ b/arch/mips/include/asm/mach-generic/kmalloc.h
@@ -7,7 +7,7 @@
  * Total overkill for most systems but need as a safe default.
  * Set this one if any device in the system might do non-coherent DMA.
  */
-#define ARCH_KMALLOC_MINALIGN   128
+#define ARCH_DMA_MINALIGN       128
 #endif
 
 #endif /* __ASM_MACH_GENERIC_KMALLOC_H */
diff --git a/arch/mips/include/asm/mach-ip27/kmalloc.h b/arch/mips/include/asm/mach-ip27/kmalloc.h
index 426bd049b2d7..82c23ce2afa7 100644
--- a/arch/mips/include/asm/mach-ip27/kmalloc.h
+++ b/arch/mips/include/asm/mach-ip27/kmalloc.h
@@ -2,7 +2,7 @@
 #define __ASM_MACH_IP27_KMALLOC_H
 
 /*
- * All happy, no need to define ARCH_KMALLOC_MINALIGN
+ * All happy, no need to define ARCH_DMA_MINALIGN
  */
 
 #endif /* __ASM_MACH_IP27_KMALLOC_H */
diff --git a/arch/mips/include/asm/mach-ip32/kmalloc.h b/arch/mips/include/asm/mach-ip32/kmalloc.h
index b1e0be60f720..042ca926c48f 100644
--- a/arch/mips/include/asm/mach-ip32/kmalloc.h
+++ b/arch/mips/include/asm/mach-ip32/kmalloc.h
@@ -3,9 +3,9 @@
 
 
 #if defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_RM7000)
-#define ARCH_KMALLOC_MINALIGN   32
+#define ARCH_DMA_MINALIGN       32
 #else
-#define ARCH_KMALLOC_MINALIGN   128
+#define ARCH_DMA_MINALIGN       128
 #endif
 
 #endif /* __ASM_MACH_IP32_KMALLOC_H */
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 9547bc0cf188..7ba890860d98 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -357,13 +357,6 @@ int dma_supported(struct device *dev, u64 mask)
 
 EXPORT_SYMBOL(dma_supported);
 
-int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
-{
-        return plat_device_is_coherent(dev);
-}
-
-EXPORT_SYMBOL(dma_is_consistent);
-
 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
 {
diff --git a/arch/mn10300/boot/compressed/misc.c b/arch/mn10300/boot/compressed/misc.c
index f673383518e4..42cbd77bd439 100644
--- a/arch/mn10300/boot/compressed/misc.c
+++ b/arch/mn10300/boot/compressed/misc.c
@@ -167,6 +167,7 @@ static uch *high_buffer_start /* = (uch *)(((ulg)&end) + HEAP_SIZE)*/;
 static char *vidmem = (char *)0xb8000;
 static int lines, cols;
 
+#define BOOTLOADER_INFLATE
 #include "../../../../lib/inflate.c"
 
 static inline void scroll(void)
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h
index 6e2fe28dde4e..781bf613366d 100644
--- a/arch/mn10300/include/asm/cache.h
+++ b/arch/mn10300/include/asm/cache.h
@@ -21,7 +21,7 @@
 #define L1_CACHE_DISPARITY      L1_CACHE_NENTRIES * L1_CACHE_BYTES
 #endif
 
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 /* data cache purge registers
  * - read from the register to unconditionally purge that cache line
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
index 4ed1522b38d2..c1be4397b1ed 100644
--- a/arch/mn10300/include/asm/dma-mapping.h
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -162,14 +162,6 @@ int dma_set_mask(struct device *dev, u64 mask)
 }
 
 static inline
-int dma_get_cache_alignment(void)
-{
-        return 1 << L1_CACHE_SHIFT;
-}
-
-#define dma_is_consistent(d)    (1)
-
-static inline
 void dma_cache_sync(void *vaddr, size_t size,
                     enum dma_data_direction direction)
 {
diff --git a/arch/mn10300/include/asm/gdb-stub.h b/arch/mn10300/include/asm/gdb-stub.h
index 556cce992548..41ed26763964 100644
--- a/arch/mn10300/include/asm/gdb-stub.h
+++ b/arch/mn10300/include/asm/gdb-stub.h
@@ -157,25 +157,25 @@ void gdbstub_printk(const char *fmt, ...)
 #ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
 #define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
 #else
-#define gdbstub_entry(FMT, ...) ({ 0; })
+#define gdbstub_entry(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
 #endif
 
 #ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
 #define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
 #else
-#define gdbstub_proto(FMT, ...) ({ 0; })
+#define gdbstub_proto(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
 #endif
 
 #ifdef CONFIG_GDBSTUB_DEBUG_IO
 #define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
 #else
-#define gdbstub_io(FMT, ...) ({ 0; })
+#define gdbstub_io(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
 #endif
 
 #ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
 #define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
 #else
-#define gdbstub_bkpt(FMT, ...) ({ 0; })
+#define gdbstub_bkpt(FMT, ...) no_printk(FMT, ##__VA_ARGS__)
 #endif
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/mn10300/include/asm/posix_types.h b/arch/mn10300/include/asm/posix_types.h
index 077567c37798..56ffbc158798 100644
--- a/arch/mn10300/include/asm/posix_types.h
+++ b/arch/mn10300/include/asm/posix_types.h
@@ -25,8 +25,13 @@ typedef int		__kernel_pid_t;
 typedef unsigned short  __kernel_ipc_pid_t;
 typedef unsigned short  __kernel_uid_t;
 typedef unsigned short  __kernel_gid_t;
+#if __GNUC__ == 4
+typedef unsigned int    __kernel_size_t;
+typedef signed int      __kernel_ssize_t;
+#else
 typedef unsigned long   __kernel_size_t;
-typedef long            __kernel_ssize_t;
+typedef signed long     __kernel_ssize_t;
+#endif
 typedef int             __kernel_ptrdiff_t;
 typedef long            __kernel_time_t;
 typedef long            __kernel_suseconds_t;
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index ef34d5a0f8bd..9d49073e827a 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -44,11 +44,6 @@ static const char serial_revdate[] = "2007-11-06";
 #include <unit/timex.h>
 #include "mn10300-serial.h"
 
-static inline __attribute__((format(printf, 1, 2)))
-void no_printk(const char *fmt, ...)
-{
-}
-
 #define kenter(FMT, ...) \
         printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
 #define _enter(FMT, ...) \
diff --git a/arch/mn10300/kernel/rtc.c b/arch/mn10300/kernel/rtc.c
index 815a933aafa8..4eef0e7224f6 100644
--- a/arch/mn10300/kernel/rtc.c
+++ b/arch/mn10300/kernel/rtc.c
@@ -20,9 +20,6 @@
 DEFINE_SPINLOCK(rtc_lock);
 EXPORT_SYMBOL(rtc_lock);
 
-/* last time the RTC got updated */
-static long last_rtc_update;
-
 /* time for RTC to update itself in ioclks */
 static unsigned long mn10300_rtc_update_period;
 
@@ -110,7 +107,7 @@ static int set_rtc_mmss(unsigned long nowtime)
 
 int update_persistent_clock(struct timespec now)
 {
-        return set_rtc_mms(now.tv_sec);
+        return set_rtc_mmss(now.tv_sec);
 }
 
 /*
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 45effe6978fa..039880e7d2c9 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -28,6 +28,8 @@
 
 #define SMP_CACHE_BYTES L1_CACHE_BYTES
 
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
+
 #define __read_mostly __attribute__((__section__(".data..read_mostly")))
 
 void parisc_cache_init(void);   /* initializes cache-flushing */
diff --git a/arch/parisc/include/asm/dma-mapping.h b/arch/parisc/include/asm/dma-mapping.h
index da6943380908..4ef73b09b168 100644
--- a/arch/parisc/include/asm/dma-mapping.h
+++ b/arch/parisc/include/asm/dma-mapping.h
@@ -184,18 +184,6 @@ dma_set_mask(struct device *dev, u64 mask)
         return 0;
 }
 
-static inline int
-dma_get_cache_alignment(void)
-{
-        return dcache_stride;
-}
-
-static inline int
-dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
-{
-        return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
-}
-
 static inline void
 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
diff --git a/arch/parisc/mm/ioremap.c b/arch/parisc/mm/ioremap.c
index 92d496ad07c9..838d0259cd27 100644
--- a/arch/parisc/mm/ioremap.c
+++ b/arch/parisc/mm/ioremap.c
@@ -71,7 +71,7 @@ void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned l
          */
         offset = phys_addr & ~PAGE_MASK;
         phys_addr &= PAGE_MASK;
-        size = PAGE_ALIGN(last_addr) - phys_addr;
+        size = PAGE_ALIGN(last_addr + 1) - phys_addr;
 
         /*
          * Ok, go for it..
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 6b29eab05362..2f0de24e3822 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -280,6 +280,8 @@
                         reg = <0x114000 0x1000>;
                         interrupts = <48 2>;
                         interrupt-parent = <&mpic>;
+                        voltage-ranges = <3300 3300>;
+                        sdhci,auto-cmd12;
                 };
 
                 i2c@118000 {
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index c85ef230135b..8c9c6ad2004e 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -209,26 +209,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define dma_is_consistent(d, h) (0)
-#else
-#define dma_is_consistent(d, h) (1)
-#endif
-
-static inline int dma_get_cache_alignment(void)
-{
-#ifdef CONFIG_PPC64
-        /* no easy way to get cache size on all processors, so return
-         * the maximum possible, to be safe */
-        return (1 << INTERNODE_CACHE_SHIFT);
-#else
-        /*
-         * Each processor family will define its own L1_CACHE_SHIFT,
-         * L1_CACHE_BYTES wraps to this, so this is always safe.
-         */
-        return L1_CACHE_BYTES;
-#endif
-}
 
 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                 enum dma_data_direction direction)
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index bd0849dbcaaa..68d73b2a7bfc 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -10,7 +10,7 @@
 #define VM_DATA_DEFAULT_FLAGS   VM_DATA_DEFAULT_FLAGS32
 
 #ifdef CONFIG_NOT_COHERENT_CACHE
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 #endif
 
 #ifdef CONFIG_PTE_64BIT
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 51df7e754698..f9751c8905be 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -102,7 +102,7 @@ static struct of_device_id mpc837x_ids[] = {
 
 static int __init mpc837x_declare_of_platform_devices(void)
 {
-        /* Publish of_device */
+        /* Publish platform_device */
         of_platform_bus_probe(NULL, mpc837x_ids, NULL);
 
         return 0;
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index e00801c42540..910caa6b5810 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -78,7 +78,7 @@ static struct of_device_id mpc837x_ids[] = {
 
 static int __init mpc837x_declare_of_platform_devices(void)
 {
-        /* Publish of_device */
+        /* Publish platform_device */
         of_platform_bus_probe(NULL, mpc837x_ids, NULL);
 
         return 0;
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 8bd86530ee25..6425abe5b7db 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -1332,7 +1332,7 @@ static inline void fsl_rio_info(struct device *dev, u32 ccsr)
 
 /**
  * fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
- * @dev: of_device pointer
+ * @dev: platform_device pointer
  *
  * Initializes MPC85xx RapidIO hardware interface, configures
  * master port with system-specific info, and registers the
diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c
index f02e89ce4df1..5da7c562a90b 100644
--- a/arch/s390/appldata/appldata_net_sum.c
+++ b/arch/s390/appldata/appldata_net_sum.c
@@ -85,9 +85,10 @@ static void appldata_get_net_sum_data(void *data)
 
         rcu_read_lock();
         for_each_netdev_rcu(&init_net, dev) {
+                const struct rtnl_link_stats64 *stats;
                 struct rtnl_link_stats64 temp;
-                const struct net_device_stats *stats = dev_get_stats(dev, &temp);
 
+                stats = dev_get_stats(dev, &temp);
                 rx_packets += stats->rx_packets;
                 tx_packets += stats->tx_packets;
                 rx_bytes   += stats->rx_bytes;
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 5f0075150a65..1049ef27c15e 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -269,7 +269,10 @@
 #define __NR_pwritev            329
 #define __NR_rt_tgsigqueueinfo  330
 #define __NR_perf_event_open    331
-#define NR_syscalls 332
+#define __NR_fanotify_init      332
+#define __NR_fanotify_mark      333
+#define __NR_prlimit64          334
+#define NR_syscalls 335
 
 /* 
  * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 672ce52341b4..8e60fb23b90d 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -614,7 +614,7 @@ sys32_sysfs_wrapper:
 
         .globl  sys32_personality_wrapper
 sys32_personality_wrapper:
-        llgfr   %r2,%r2                 # unsigned long
+        llgfr   %r2,%r2                 # unsigned int
         jg      sys_s390_personality    # branch to system call
 
         .globl  sys32_setfsuid16_wrapper
@@ -1853,3 +1853,27 @@ sys32_execve_wrapper:
         llgtr   %r3,%r3                 # compat_uptr_t *
         llgtr   %r4,%r4                 # compat_uptr_t *
         jg      sys32_execve            # branch to system call
+
+        .globl  sys_fanotify_init_wrapper
+sys_fanotify_init_wrapper:
+        llgfr   %r2,%r2                 # unsigned int
+        llgfr   %r3,%r3                 # unsigned int
+        jg      sys_fanotify_init       # branch to system call
+
+        .globl  sys_fanotify_mark_wrapper
+sys_fanotify_mark_wrapper:
+        lgfr    %r2,%r2                 # int
+        llgfr   %r3,%r3                 # unsigned int
+        sllg    %r4,%r4,32              # get high word of 64bit mask
+        lr      %r4,%r5                 # get low word of 64bit mask
+        llgfr   %r5,%r6                 # unsigned int
+        llgt    %r6,164(%r15)           # char *
+        jg      sys_fanotify_mark       # branch to system call
+
+        .globl  sys_prlimit64_wrapper
+sys_prlimit64_wrapper:
+        lgfr    %r2,%r2                 # pid_t
+        llgfr   %r3,%r3                 # unsigned int
+        llgtr   %r4,%r4                 # const struct rlimit64 __user *
+        llgtr   %r5,%r5                 # struct rlimit64 __user *
+        jg      sys_prlimit64           # branch to system call
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index eb15c12ec158..5bb1e6b5db26 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -31,7 +31,7 @@ struct old_sigaction;
 long sys_mmap2(struct s390_mmap_arg_struct __user  *arg);
 long sys_s390_ipc(uint call, int first, unsigned long second,
              unsigned long third, void __user *ptr);
-long sys_s390_personality(unsigned long personality);
+long sys_s390_personality(unsigned int personality);
 long sys_s390_fadvise64(int fd, u32 offset_high, u32 offset_low,
                     size_t len, int advice);
 long sys_s390_fadvise64_64(struct fadvise64_64_args __user *args);
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 7b6b0f81a283..476081440df9 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -131,9 +131,9 @@ SYSCALL_DEFINE5(s390_ipc, uint, call, int, first, unsigned long, second,
 }
 
 #ifdef CONFIG_64BIT
-SYSCALL_DEFINE1(s390_personality, unsigned long, personality)
+SYSCALL_DEFINE1(s390_personality, unsigned int, personality)
 {
-        int ret;
+        unsigned int ret;
 
         if (current->personality == PER_LINUX32 && personality == PER_LINUX)
                 personality = PER_LINUX32;
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 201ce6bed34e..a8fee1b14395 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -340,3 +340,6 @@ SYSCALL(sys_preadv,sys_preadv,compat_sys_preadv_wrapper)
 SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper)
 SYSCALL(sys_rt_tgsigqueueinfo,sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo_wrapper) /* 330 */
 SYSCALL(sys_perf_event_open,sys_perf_event_open,sys_perf_event_open_wrapper)
+SYSCALL(sys_fanotify_init,sys_fanotify_init,sys_fanotify_init_wrapper)
+SYSCALL(sys_fanotify_mark,sys_fanotify_mark,sys_fanotify_mark_wrapper)
+SYSCALL(sys_prlimit64,sys_prlimit64,sys_prlimit64_wrapper)
diff --git a/arch/score/mm/tlb-score.c b/arch/score/mm/tlb-score.c
index 4fa5aa5afecc..6fdb100244c8 100644
--- a/arch/score/mm/tlb-score.c
+++ b/arch/score/mm/tlb-score.c
@@ -158,7 +158,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
 
 void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
-        if (!vma || vma->vm_mm->context != 0) {
+        if (vma && vma->vm_mm->context != 0) {
                 unsigned long flags;
                 int oldpid, newpid, idx;
                 unsigned long vma_ASID = vma->vm_mm->context;
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index de375b64e410..3da116f47f01 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -154,7 +154,7 @@ static struct platform_device nand_flash_device = {
 #define PORT_DRVCRA     0xA405018A
 #define PORT_DRVCRB     0xA405018C
 
-static void ap320_wvga_power_on(void *board_data)
+static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
 {
         msleep(100);
 
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile
index 4e577a3bf658..60dd63f4a427 100644
--- a/arch/sh/boards/mach-kfr2r09/Makefile
+++ b/arch/sh/boards/mach-kfr2r09/Makefile
@@ -1,2 +1,4 @@
-obj-y    := setup.o sdram.o
-obj-$(CONFIG_FB_SH_MOBILE_LCDC) +=  lcd_wqvga.o
+obj-y   := setup.o sdram.o
+ifneq ($(CONFIG_FB_SH_MOBILE_LCDC),)
+obj-y   +=  lcd_wqvga.o
+endif
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
index e9b970846c41..25e145fb7087 100644
--- a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -327,7 +327,7 @@ static int kfr2r09_lcd_backlight(int on)
         return 0;
 }
 
-void kfr2r09_lcd_on(void *board_data)
+void kfr2r09_lcd_on(void *board_data, struct fb_info *info)
 {
         kfr2r09_lcd_backlight(1);
 }
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h
index bea3337a426a..1a73c3e759a7 100644
--- a/arch/sh/include/asm/dma-mapping.h
+++ b/arch/sh/include/asm/dma-mapping.h
@@ -42,21 +42,6 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 
-#ifdef CONFIG_DMA_COHERENT
-#define dma_is_consistent(d, h) (1)
-#else
-#define dma_is_consistent(d, h) (0)
-#endif
-
-static inline int dma_get_cache_alignment(void)
-{
-        /*
-         * Each processor family will define its own L1_CACHE_SHIFT,
-         * L1_CACHE_BYTES wraps to this, so this is always safe.
-         */
-        return L1_CACHE_BYTES;
-}
-
 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
         struct dma_map_ops *ops = get_dma_ops(dev);
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index fb703d120d09..c4e0b3d472b9 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -180,7 +180,7 @@ typedef struct page *pgtable_t;
  * Some drivers need to perform DMA into kmalloc'ed buffers
  * and so we have to increase the kmalloc minalign for this.
  */
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 #ifdef CONFIG_SUPERH64
 /*
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
index 484ef42c2fb5..07e635b0e04c 100644
--- a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
+++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
@@ -3,23 +3,23 @@
 
 #include <video/sh_mobile_lcdc.h>
 
-#ifdef CONFIG_FB_SH_MOBILE_LCDC
-void kfr2r09_lcd_on(void *board_data);
+#if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE)
+void kfr2r09_lcd_on(void *board_data, struct fb_info *info);
 void kfr2r09_lcd_off(void *board_data);
 int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
                       struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
 void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
                        struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
 #else
-static inline void kfr2r09_lcd_on(void *board_data) {}
-static inline void kfr2r09_lcd_off(void *board_data) {}
-static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
-                                    struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
+static void kfr2r09_lcd_on(void *board_data) {}
+static void kfr2r09_lcd_off(void *board_data) {}
+static int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
+                                struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
 {
         return -ENODEV;
 }
-static inline void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
-                                     struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
+static void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle,
+                                struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
 {
 }
 #endif
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 4b4a0c0b0ccd..8c0e4f7bb204 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -11,7 +11,6 @@ extern int dma_supported(struct device *dev, u64 mask);
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d, h) (1)
 
 extern struct dma_map_ops *dma_ops, pci32_dma_ops;
 extern struct bus_type pci_bus_type;
@@ -52,15 +51,6 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
         return (dma_addr == DMA_ERROR_CODE);
 }
 
-static inline int dma_get_cache_alignment(void)
-{
-        /*
-         * no easy way to get cache size on all processors, so return
-         * the maximum possible, to be safe
-         */
-        return (1 << INTERNODE_CACHE_SHIFT);
-}
-
 static inline int dma_set_mask(struct device *dev, u64 mask)
 {
 #ifdef CONFIG_PCI
diff --git a/arch/tile/include/asm/dma-mapping.h b/arch/tile/include/asm/dma-mapping.h
index cf466b39aa13..15e1dceecc64 100644
--- a/arch/tile/include/asm/dma-mapping.h
+++ b/arch/tile/include/asm/dma-mapping.h
@@ -90,13 +90,4 @@ dma_set_mask(struct device *dev, u64 mask)
         return 0;
 }
 
-static inline int
-dma_get_cache_alignment(void)
-{
-        return L2_CACHE_BYTES;
-}
-
-#define dma_is_consistent(d, h) (1)
-
-
 #endif /* _ASM_TILE_DMA_MAPPING_H */
diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c
index 68142df76608..0c46e398cd8f 100644
--- a/arch/um/drivers/hostaudio_kern.c
+++ b/arch/um/drivers/hostaudio_kern.c
@@ -187,7 +187,9 @@ static int hostaudio_open(struct inode *inode, struct file *file)
         int ret;
 
 #ifdef DEBUG
+        kparam_block_sysfs_write(dsp);
         printk(KERN_DEBUG "hostaudio: open called (host: %s)\n", dsp);
+        kparam_unblock_sysfs_write(dsp);
 #endif
 
         state = kmalloc(sizeof(struct hostaudio_state), GFP_KERNEL);
@@ -199,9 +201,11 @@ static int hostaudio_open(struct inode *inode, struct file *file)
         if (file->f_mode & FMODE_WRITE)
                 w = 1;
 
+        kparam_block_sysfs_write(dsp);
         lock_kernel();
         ret = os_open_file(dsp, of_set_rw(OPENFLAGS(), r, w), 0);
         unlock_kernel();
+        kparam_unblock_sysfs_write(dsp);
 
         if (ret < 0) {
                 kfree(state);
@@ -258,13 +262,17 @@ static int hostmixer_open_mixdev(struct inode *inode, struct file *file)
         if (file->f_mode & FMODE_WRITE)
                 w = 1;
 
+        kparam_block_sysfs_write(mixer);
         lock_kernel();
         ret = os_open_file(mixer, of_set_rw(OPENFLAGS(), r, w), 0);
         unlock_kernel();
+        kparam_unblock_sysfs_write(mixer);
 
         if (ret < 0) {
+                kparam_block_sysfs_write(dsp);
                 printk(KERN_ERR "hostaudio_open_mixdev failed to open '%s', "
                        "err = %d\n", dsp, -ret);
+                kparam_unblock_sysfs_write(dsp);
                 kfree(state);
                 return ret;
         }
@@ -320,8 +328,10 @@ MODULE_LICENSE("GPL");
 
 static int __init hostaudio_init_module(void)
 {
+        __kernel_param_lock();
         printk(KERN_INFO "UML Audio Relay (host dsp = %s, host mixer = %s)\n",
                dsp, mixer);
+        __kernel_param_unlock();
 
         module_data.dev_audio = register_sound_dsp(&hostaudio_fops, -1);
         if (module_data.dev_audio < 0) {
diff --git a/arch/um/include/asm/dma-mapping.h b/arch/um/include/asm/dma-mapping.h
index b948c14a7867..17a2cb5a4178 100644
--- a/arch/um/include/asm/dma-mapping.h
+++ b/arch/um/include/asm/dma-mapping.h
@@ -94,7 +94,6 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d, h) (1)
 
 static inline int
 dma_get_cache_alignment(void)
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index ac91eed21061..d4c419f883a0 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -54,7 +54,6 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#define dma_is_consistent(d, h) (1)
 
 extern int dma_supported(struct device *hwdev, u64 mask);
 extern int dma_set_mask(struct device *dev, u64 mask);
@@ -87,13 +86,6 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
         flush_write_buffers();
 }
 
-static inline int dma_get_cache_alignment(void)
-{
-        /* no easy way to get cache size on all x86, so return the
-         * maximum possible, to be safe */
-        return boot_cpu_data.x86_clflush_size;
-}
-
 static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
                                                     gfp_t gfp)
 {
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h
index 625c3f0e741a..8ca82839288a 100644
--- a/arch/x86/include/asm/page.h
+++ b/arch/x86/include/asm/page.h
@@ -37,6 +37,13 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
 #define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))
 /* __pa_symbol should be used for C visible symbols.
    This seems to be the official gcc blessed way to do such arithmetic. */
+/*
+ * We need __phys_reloc_hide() here because gcc may assume that there is no
+ * overflow during __pa() calculation and can optimize it unexpectedly.
+ * Newer versions of gcc provide -fno-strict-overflow switch to handle this
+ * case properly. Once all supported versions of gcc understand it, we can
+ * remove this Voodoo magic stuff. (i.e. once gcc3.x is deprecated)
+ */
 #define __pa_symbol(x)  __pa(__phys_reloc_hide((unsigned long)(x)))
 
 #define __va(x)                 ((void *)((unsigned long)(x)+PAGE_OFFSET))
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index aa558ac0306e..42d412fd8b02 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -34,6 +34,7 @@
  */
 
 #define UV_ITEMS_PER_DESCRIPTOR         8
+/* the 'throttle' to prevent the hardware stay-busy bug */
 #define MAX_BAU_CONCURRENT              3
 #define UV_CPUS_PER_ACT_STATUS          32
 #define UV_ACT_STATUS_MASK              0x3
@@ -45,10 +46,26 @@
 #define UV_DESC_BASE_PNODE_SHIFT        49
 #define UV_PAYLOADQ_PNODE_SHIFT         49
 #define UV_PTC_BASENAME                 "sgi_uv/ptc_statistics"
+#define UV_BAU_BASENAME                 "sgi_uv/bau_tunables"
+#define UV_BAU_TUNABLES_DIR             "sgi_uv"
+#define UV_BAU_TUNABLES_FILE            "bau_tunables"
+#define WHITESPACE                      " \t\n"
 #define uv_physnodeaddr(x)              ((__pa((unsigned long)(x)) & uv_mmask))
 #define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15
 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16
-#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
+#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x0000000009UL
+/* [19:16] SOFT_ACK timeout period  19: 1 is urgency 7  17:16 1 is multiplier */
+#define BAU_MISC_CONTROL_MULT_MASK 3
+
+#define UVH_AGING_PRESCALE_SEL 0x000000b000UL
+/* [30:28] URGENCY_7  an index into a table of times */
+#define BAU_URGENCY_7_SHIFT 28
+#define BAU_URGENCY_7_MASK 7
+
+#define UVH_TRANSACTION_TIMEOUT 0x000000b200UL
+/* [45:40] BAU - BAU transaction timeout select - a multiplier */
+#define BAU_TRANS_SHIFT 40
+#define BAU_TRANS_MASK 0x3f
 
 /*
  * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
@@ -59,24 +76,21 @@
 #define DESC_STATUS_SOURCE_TIMEOUT      3
 
 /*
- * source side threshholds at which message retries print a warning
- */
-#define SOURCE_TIMEOUT_LIMIT            20
-#define DESTINATION_TIMEOUT_LIMIT       20
-
-/*
- * misc. delays, in microseconds
+ * delay for 'plugged' timeout retries, in microseconds
  */
-#define THROTTLE_DELAY                  10
-#define TIMEOUT_DELAY                   10
-#define BIOS_TO                         1000
-/* BIOS is assumed to set the destination timeout to 1003520 nanoseconds */
+#define PLUGGED_DELAY                   10
 
 /*
  * threshholds at which to use IPI to free resources
  */
+/* after this # consecutive 'plugged' timeouts, use IPI to release resources */
 #define PLUGSB4RESET 100
-#define TIMEOUTSB4RESET 100
+/* after this many consecutive timeouts, use IPI to release resources */
+#define TIMEOUTSB4RESET 1
+/* at this number uses of IPI to release resources, giveup the request */
+#define IPI_RESET_LIMIT 1
+/* after this # consecutive successes, bump up the throttle if it was lowered */
+#define COMPLETE_THRESHOLD 5
 
 /*
  * number of entries in the destination side payload queue
@@ -96,6 +110,13 @@
 #define FLUSH_COMPLETE                  4
 
 /*
+ * tuning the action when the numalink network is extremely delayed
+ */
+#define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in microseconds */
+#define CONGESTED_REPS 10 /* long delays averaged over this many broadcasts */
+#define CONGESTED_PERIOD 30 /* time for the bau to be disabled, in seconds */
+
+/*
  * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
  * If the 'multilevel' flag in the header portion of the descriptor
  * has been set to 0, then endpoint multi-unicast mode is selected.
@@ -300,37 +321,16 @@ struct bau_payload_queue_entry {
         /* bytes 24-31 */
 };
 
-/*
- * one per-cpu; to locate the software tables
- */
-struct bau_control {
-        struct bau_desc *descriptor_base;
+struct msg_desc {
+        struct bau_payload_queue_entry *msg;
+        int msg_slot;
+        int sw_ack_slot;
         struct bau_payload_queue_entry *va_queue_first;
         struct bau_payload_queue_entry *va_queue_last;
-        struct bau_payload_queue_entry *bau_msg_head;
-        struct bau_control *uvhub_master;
-        struct bau_control *socket_master;
-        unsigned long timeout_interval;
-        atomic_t active_descriptor_count;
-        int max_concurrent;
-        int max_concurrent_constant;
-        int retry_message_scans;
-        int plugged_tries;
-        int timeout_tries;
-        int ipi_attempts;
-        int conseccompletes;
-        short cpu;
-        short uvhub_cpu;
-        short uvhub;
-        short cpus_in_socket;
-        short cpus_in_uvhub;
-        unsigned short message_number;
-        unsigned short uvhub_quiesce;
-        short socket_acknowledge_count[DEST_Q_SIZE];
-        cycles_t send_message;
-        spinlock_t masks_lock;
-        spinlock_t uvhub_lock;
-        spinlock_t queue_lock;
+};
+
+struct reset_args {
+        int sender;
 };
 
 /*
@@ -344,18 +344,25 @@ struct ptc_stats {
         unsigned long s_dtimeout; /* destination side timeouts */
         unsigned long s_time; /* time spent in sending side */
         unsigned long s_retriesok; /* successful retries */
-        unsigned long s_ntargcpu; /* number of cpus targeted */
-        unsigned long s_ntarguvhub; /* number of uvhubs targeted */
-        unsigned long s_ntarguvhub16; /* number of times >= 16 target hubs */
-        unsigned long s_ntarguvhub8; /* number of times >= 8 target hubs */
-        unsigned long s_ntarguvhub4; /* number of times >= 4 target hubs */
-        unsigned long s_ntarguvhub2; /* number of times >= 2 target hubs */
-        unsigned long s_ntarguvhub1; /* number of times == 1 target hub */
+        unsigned long s_ntargcpu; /* total number of cpu's targeted */
+        unsigned long s_ntargself; /* times the sending cpu was targeted */
+        unsigned long s_ntarglocals; /* targets of cpus on the local blade */
+        unsigned long s_ntargremotes; /* targets of cpus on remote blades */
+        unsigned long s_ntarglocaluvhub; /* targets of the local hub */
+        unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */
+        unsigned long s_ntarguvhub; /* total number of uvhubs targeted */
+        unsigned long s_ntarguvhub16; /* number of times target hubs >= 16*/
+        unsigned long s_ntarguvhub8; /* number of times target hubs >= 8 */
+        unsigned long s_ntarguvhub4; /* number of times target hubs >= 4 */
+        unsigned long s_ntarguvhub2; /* number of times target hubs >= 2 */
+        unsigned long s_ntarguvhub1; /* number of times target hubs == 1 */
         unsigned long s_resets_plug; /* ipi-style resets from plug state */
         unsigned long s_resets_timeout; /* ipi-style resets from timeouts */
         unsigned long s_busy; /* status stayed busy past s/w timer */
         unsigned long s_throttles; /* waits in throttle */
         unsigned long s_retry_messages; /* retry broadcasts */
+        unsigned long s_bau_reenabled; /* for bau enable/disable */
+        unsigned long s_bau_disabled; /* for bau enable/disable */
         /* destination statistics */
         unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */
         unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */
@@ -370,6 +377,52 @@ struct ptc_stats {
         unsigned long d_rcanceled; /* number of messages canceled by resets */
 };
 
+/*
+ * one per-cpu; to locate the software tables
+ */
+struct bau_control {
+        struct bau_desc *descriptor_base;
+        struct bau_payload_queue_entry *va_queue_first;
+        struct bau_payload_queue_entry *va_queue_last;
+        struct bau_payload_queue_entry *bau_msg_head;
+        struct bau_control *uvhub_master;
+        struct bau_control *socket_master;
+        struct ptc_stats *statp;
+        unsigned long timeout_interval;
+        unsigned long set_bau_on_time;
+        atomic_t active_descriptor_count;
+        int plugged_tries;
+        int timeout_tries;
+        int ipi_attempts;
+        int conseccompletes;
+        int baudisabled;
+        int set_bau_off;
+        short cpu;
+        short uvhub_cpu;
+        short uvhub;
+        short cpus_in_socket;
+        short cpus_in_uvhub;
+        unsigned short message_number;
+        unsigned short uvhub_quiesce;
+        short socket_acknowledge_count[DEST_Q_SIZE];
+        cycles_t send_message;
+        spinlock_t uvhub_lock;
+        spinlock_t queue_lock;
+        /* tunables */
+        int max_bau_concurrent;
+        int max_bau_concurrent_constant;
+        int plugged_delay;
+        int plugsb4reset;
+        int timeoutsb4reset;
+        int ipi_reset_limit;
+        int complete_threshold;
+        int congested_response_us;
+        int congested_reps;
+        int congested_period;
+        cycles_t period_time;
+        long period_requests;
+};
+
 static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp)
 {
         return constant_test_bit(uvhub, &dstp->bits[0]);
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 018a0a400799..bf5f7d32bd08 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -112,13 +112,9 @@ static inline xpaddr_t machine_to_phys(xmaddr_t machine)
  */
 static inline unsigned long mfn_to_local_pfn(unsigned long mfn)
 {
-        extern unsigned long max_mapnr;
         unsigned long pfn = mfn_to_pfn(mfn);
-        if ((pfn < max_mapnr)
-            && !xen_feature(XENFEAT_auto_translated_physmap)
-            && (get_phys_to_machine(pfn) != mfn))
-                return max_mapnr; /* force !pfn_valid() */
-        /* XXX fixme; not true with sparsemem */
+        if (get_phys_to_machine(pfn) != mfn)
+                return -1; /* force !pfn_valid() */
         return pfn;
 }
 
diff --git a/arch/x86/include/asm/xen/swiotlb-xen.h b/arch/x86/include/asm/xen/swiotlb-xen.h
new file mode 100644
index 000000000000..1be1ab7d6a41
--- /dev/null
+++ b/arch/x86/include/asm/xen/swiotlb-xen.h
@@ -0,0 +1,14 @@
+#ifndef _ASM_X86_SWIOTLB_XEN_H
+#define _ASM_X86_SWIOTLB_XEN_H
+
+#ifdef CONFIG_SWIOTLB_XEN
+extern int xen_swiotlb;
+extern int __init pci_xen_swiotlb_detect(void);
+extern void __init pci_xen_swiotlb_init(void);
+#else
+#define xen_swiotlb (0)
+static inline int __init pci_xen_swiotlb_detect(void) { return 0; }
+static inline void __init pci_xen_swiotlb_init(void) { }
+#endif
+
+#endif /* _ASM_X86_SWIOTLB_XEN_H */
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 980508c79082..e3b534cda49a 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1606,7 +1606,7 @@ void __init init_apic_mappings(void)
                  * acpi lapic path already maps that address in
                  * acpi_register_lapic_address()
                  */
-                if (!acpi_lapic)
+                if (!acpi_lapic && !smp_found_config)
                         set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
 
                 apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n",
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
index a36de5bbb622..994230d4dc4e 100644
--- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
@@ -110,7 +110,7 @@ struct pcc_cpu {
         u32 output_offset;
 };
 
-static struct pcc_cpu *pcc_cpu_info;
+static struct pcc_cpu __percpu *pcc_cpu_info;
 
 static int pcc_cpufreq_verify(struct cpufreq_policy *policy)
 {
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 107711bf0ee8..febb12cea795 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -656,6 +656,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
         cpuc = &__get_cpu_var(cpu_hw_events);
 
         for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+                int overflow;
 
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
@@ -666,12 +667,14 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
                 WARN_ON_ONCE(hwc->idx != idx);
 
                 /* it might be unflagged overflow */
-                handled = p4_pmu_clear_cccr_ovf(hwc);
+                overflow = p4_pmu_clear_cccr_ovf(hwc);
 
                 val = x86_perf_event_update(event);
-                if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
+                if (!overflow && (val & (1ULL << (x86_pmu.cntval_bits - 1))))
                         continue;
 
+                handled += overflow;
+
                 /* event overflow for sure */
                 data.period = event->hw.last_period;
 
@@ -687,7 +690,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
                 inc_irq_stat(apic_perf_irqs);
         }
 
-        return handled;
+        return handled > 0;
 }
 
 /*
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 33dbcc4ec5ff..351f9c0fea1f 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -582,7 +582,7 @@ static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
          * scaled math multiplication factor for nanosecond to hpet tick
          * conversion.
          */
-        hpet_freq = 1000000000000000ULL;
+        hpet_freq = FSEC_PER_SEC;
         do_div(hpet_freq, hpet_period);
         evt->mult = div_sc((unsigned long) hpet_freq,
                                       NSEC_PER_SEC, evt->shift);
@@ -837,7 +837,7 @@ static int hpet_clocksource_register(void)
          * cyc/sec = FSEC_PER_SEC/hpet_period(fsec/cyc)
          * cyc/sec = (FSEC_PER_NSEC * NSEC_PER_SEC)/hpet_period
          */
-        hpet_freq = FSEC_PER_NSEC * NSEC_PER_SEC;
+        hpet_freq = FSEC_PER_SEC;
         do_div(hpet_freq, hpet_period);
         clocksource_register_hz(&clocksource_hpet, (u32)hpet_freq);
 
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index d86dbf7e54be..d7b6f7fb4fec 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -274,6 +274,18 @@ static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
 
 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
 
+static void __init smp_register_lapic_address(unsigned long address)
+{
+        mp_lapic_addr = address;
+
+        set_fixmap_nocache(FIX_APIC_BASE, address);
+        if (boot_cpu_physical_apicid == -1U) {
+                boot_cpu_physical_apicid  = read_apic_id();
+                apic_version[boot_cpu_physical_apicid] =
+                         GET_APIC_VERSION(apic_read(APIC_LVR));
+        }
+}
+
 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
 {
         char str[16];
@@ -295,6 +307,10 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
         if (early)
                 return 1;
 
+        /* Initialize the lapic mapping */
+        if (!acpi_lapic)
+                smp_register_lapic_address(mpc->lapic);
+
         if (mpc->oemptr)
                 x86_init.mpparse.smp_read_mpc_oem(mpc);
 
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 4b7e3d8b01dd..9f07cfcbd3a5 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -13,6 +13,7 @@
 #include <asm/calgary.h>
 #include <asm/amd_iommu.h>
 #include <asm/x86_init.h>
+#include <asm/xen/swiotlb-xen.h>
 
 static int forbid_dac __read_mostly;
 
@@ -132,7 +133,7 @@ void __init pci_iommu_alloc(void)
         /* free the range so iommu could get some range less than 4G */
         dma32_free_bootmem();
 
-        if (pci_swiotlb_detect())
+        if (pci_xen_swiotlb_detect() || pci_swiotlb_detect())
                 goto out;
 
         gart_iommu_hole_init();
@@ -144,6 +145,8 @@ void __init pci_iommu_alloc(void)
         /* needs to be called after gart_iommu_hole_init */
         amd_iommu_detect();
 out:
+        pci_xen_swiotlb_init();
+
         pci_swiotlb_init();
 }
 
@@ -296,7 +299,7 @@ static int __init pci_iommu_init(void)
 #endif
         x86_init.iommu.iommu_init();
 
-        if (swiotlb) {
+        if (swiotlb || xen_swiotlb) {
                 printk(KERN_INFO "PCI-DMA: "
                        "Using software bounce buffering for IO (SWIOTLB)\n");
                 swiotlb_print_info();
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 7fea555929e2..59efb5390b37 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -8,6 +8,7 @@
  */
 #include <linux/seq_file.h>
 #include <linux/proc_fs.h>
+#include <linux/debugfs.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
 
@@ -22,19 +23,37 @@
 #include <asm/irq_vectors.h>
 #include <asm/timer.h>
 
-struct msg_desc {
-        struct bau_payload_queue_entry *msg;
-        int msg_slot;
-        int sw_ack_slot;
-        struct bau_payload_queue_entry *va_queue_first;
-        struct bau_payload_queue_entry *va_queue_last;
+/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
+static int timeout_base_ns[] = {
+                20,
+                160,
+                1280,
+                10240,
+                81920,
+                655360,
+                5242880,
+                167772160
 };
-
-#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
-
-static int uv_bau_max_concurrent __read_mostly;
-
+static int timeout_us;
 static int nobau;
+static int baudisabled;
+static spinlock_t disable_lock;
+static cycles_t congested_cycles;
+
+/* tunables: */
+static int max_bau_concurrent = MAX_BAU_CONCURRENT;
+static int max_bau_concurrent_constant = MAX_BAU_CONCURRENT;
+static int plugged_delay = PLUGGED_DELAY;
+static int plugsb4reset = PLUGSB4RESET;
+static int timeoutsb4reset = TIMEOUTSB4RESET;
+static int ipi_reset_limit = IPI_RESET_LIMIT;
+static int complete_threshold = COMPLETE_THRESHOLD;
+static int congested_response_us = CONGESTED_RESPONSE_US;
+static int congested_reps = CONGESTED_REPS;
+static int congested_period = CONGESTED_PERIOD;
+static struct dentry *tunables_dir;
+static struct dentry *tunables_file;
+
 static int __init setup_nobau(char *arg)
 {
         nobau = 1;
@@ -52,10 +71,6 @@ static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
 static DEFINE_PER_CPU(struct bau_control, bau_control);
 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
 
-struct reset_args {
-        int sender;
-};
-
 /*
  * Determine the first node on a uvhub. 'Nodes' are used for kernel
  * memory allocation.
@@ -126,7 +141,7 @@ static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
         struct ptc_stats *stat;
 
         msg = mdp->msg;
-        stat = &per_cpu(ptcstats, bcp->cpu);
+        stat = bcp->statp;
         stat->d_retries++;
         /*
          * cancel any message from msg+1 to the retry itself
@@ -146,15 +161,14 @@ static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
                         slot2 = msg2 - mdp->va_queue_first;
                         mmr = uv_read_local_mmr
                                 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
-                        msg_res = ((msg2->sw_ack_vector << 8) |
-                                   msg2->sw_ack_vector);
+                        msg_res = msg2->sw_ack_vector;
                         /*
                          * This is a message retry; clear the resources held
                          * by the previous message only if they timed out.
                          * If it has not timed out we have an unexpected
                          * situation to report.
                          */
-                        if (mmr & (msg_res << 8)) {
+                        if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
                                 /*
                                  * is the resource timed out?
                                  * make everyone ignore the cancelled message.
@@ -164,9 +178,9 @@ static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
                                 cancel_count++;
                                 uv_write_local_mmr(
                                     UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
-                                        (msg_res << 8) | msg_res);
-                        } else
-                                printk(KERN_INFO "note bau retry: no effect\n");
+                                        (msg_res << UV_SW_ACK_NPENDING) |
+                                         msg_res);
+                        }
                 }
         }
         if (!cancel_count)
@@ -190,7 +204,7 @@ static void uv_bau_process_message(struct msg_desc *mdp,
          * This must be a normal message, or retry of a normal message
          */
         msg = mdp->msg;
-        stat = &per_cpu(ptcstats, bcp->cpu);
+        stat = bcp->statp;
         if (msg->address == TLB_FLUSH_ALL) {
                 local_flush_tlb();
                 stat->d_alltlb++;
@@ -274,7 +288,7 @@ uv_do_reset(void *ptr)
 
         bcp = &per_cpu(bau_control, smp_processor_id());
         rap = (struct reset_args *)ptr;
-        stat = &per_cpu(ptcstats, bcp->cpu);
+        stat = bcp->statp;
         stat->d_resets++;
 
         /*
@@ -302,13 +316,13 @@ uv_do_reset(void *ptr)
                          */
                         mmr = uv_read_local_mmr
                                         (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
-                        msg_res = ((msg->sw_ack_vector << 8) |
-                                                   msg->sw_ack_vector);
+                        msg_res = msg->sw_ack_vector;
                         if (mmr & msg_res) {
                                 stat->d_rcanceled++;
                                 uv_write_local_mmr(
                                     UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
-                                                        msg_res);
+                                        (msg_res << UV_SW_ACK_NPENDING) |
+                                         msg_res);
                         }
                 }
         }
@@ -386,17 +400,12 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
         unsigned long mmr_offset, int right_shift, int this_cpu,
         struct bau_control *bcp, struct bau_control *smaster, long try)
 {
-        int relaxes = 0;
         unsigned long descriptor_status;
-        unsigned long mmr;
-        unsigned long mask;
         cycles_t ttime;
-        cycles_t timeout_time;
-        struct ptc_stats *stat = &per_cpu(ptcstats, this_cpu);
+        struct ptc_stats *stat = bcp->statp;
         struct bau_control *hmaster;
 
         hmaster = bcp->uvhub_master;
-        timeout_time = get_cycles() + bcp->timeout_interval;
 
         /* spin on the status MMR, waiting for it to go idle */
         while ((descriptor_status = (((unsigned long)
@@ -423,7 +432,8 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
                          * pending.  In that case hardware returns the
                          * ERROR that looks like a destination timeout.
                          */
-                        if (cycles_2_us(ttime - bcp->send_message) < BIOS_TO) {
+                        if (cycles_2_us(ttime - bcp->send_message) <
+                                                        timeout_us) {
                                 bcp->conseccompletes = 0;
                                 return FLUSH_RETRY_PLUGGED;
                         }
@@ -435,26 +445,6 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
                          * descriptor_status is still BUSY
                          */
                         cpu_relax();
-                        relaxes++;
-                        if (relaxes >= 10000) {
-                                relaxes = 0;
-                                if (get_cycles() > timeout_time) {
-                                        quiesce_local_uvhub(hmaster);
-
-                                        /* single-thread the register change */
-                                        spin_lock(&hmaster->masks_lock);
-                                        mmr = uv_read_local_mmr(mmr_offset);
-                                        mask = 0UL;
-                                        mask |= (3UL < right_shift);
-                                        mask = ~mask;
-                                        mmr &= mask;
-                                        uv_write_local_mmr(mmr_offset, mmr);
-                                        spin_unlock(&hmaster->masks_lock);
-                                        end_uvhub_quiesce(hmaster);
-                                        stat->s_busy++;
-                                        return FLUSH_GIVEUP;
-                                }
-                        }
                 }
         }
         bcp->conseccompletes++;
@@ -494,56 +484,116 @@ static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
         return 1;
 }
 
+/*
+ * Our retries are blocked by all destination swack resources being
+ * in use, and a timeout is pending. In that case hardware immediately
+ * returns the ERROR that looks like a destination timeout.
+ */
+static void
+destination_plugged(struct bau_desc *bau_desc, struct bau_control *bcp,
+                        struct bau_control *hmaster, struct ptc_stats *stat)
+{
+        udelay(bcp->plugged_delay);
+        bcp->plugged_tries++;
+        if (bcp->plugged_tries >= bcp->plugsb4reset) {
+                bcp->plugged_tries = 0;
+                quiesce_local_uvhub(hmaster);
+                spin_lock(&hmaster->queue_lock);
+                uv_reset_with_ipi(&bau_desc->distribution, bcp->cpu);
+                spin_unlock(&hmaster->queue_lock);
+                end_uvhub_quiesce(hmaster);
+                bcp->ipi_attempts++;
+                stat->s_resets_plug++;
+        }
+}
+
+static void
+destination_timeout(struct bau_desc *bau_desc, struct bau_control *bcp,
+                        struct bau_control *hmaster, struct ptc_stats *stat)
+{
+        hmaster->max_bau_concurrent = 1;
+        bcp->timeout_tries++;
+        if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
+                bcp->timeout_tries = 0;
+                quiesce_local_uvhub(hmaster);
+                spin_lock(&hmaster->queue_lock);
+                uv_reset_with_ipi(&bau_desc->distribution, bcp->cpu);
+                spin_unlock(&hmaster->queue_lock);
+                end_uvhub_quiesce(hmaster);
+                bcp->ipi_attempts++;
+                stat->s_resets_timeout++;
+        }
+}
+
+/*
+ * Completions are taking a very long time due to a congested numalink
+ * network.
+ */
+static void
+disable_for_congestion(struct bau_control *bcp, struct ptc_stats *stat)
+{
+        int tcpu;
+        struct bau_control *tbcp;
+
+        /* let only one cpu do this disabling */
+        spin_lock(&disable_lock);
+        if (!baudisabled && bcp->period_requests &&
+            ((bcp->period_time / bcp->period_requests) > congested_cycles)) {
+                /* it becomes this cpu's job to turn on the use of the
+                   BAU again */
+                baudisabled = 1;
+                bcp->set_bau_off = 1;
+                bcp->set_bau_on_time = get_cycles() +
+                        sec_2_cycles(bcp->congested_period);
+                stat->s_bau_disabled++;
+                for_each_present_cpu(tcpu) {
+                        tbcp = &per_cpu(bau_control, tcpu);
+                                tbcp->baudisabled = 1;
+                }
+        }
+        spin_unlock(&disable_lock);
+}
+
 /**
  * uv_flush_send_and_wait
  *
  * Send a broadcast and wait for it to complete.
  *
- * The flush_mask contains the cpus the broadcast is to be sent to, plus
+ * The flush_mask contains the cpus the broadcast is to be sent to including
  * cpus that are on the local uvhub.
  *
- * Returns NULL if all flushing represented in the mask was done. The mask
- * is zeroed.
- * Returns @flush_mask if some remote flushing remains to be done. The
- * mask will have some bits still set, representing any cpus on the local
- * uvhub (not current cpu) and any on remote uvhubs if the broadcast failed.
+ * Returns 0 if all flushing represented in the mask was done.
+ * Returns 1 if it gives up entirely and the original cpu mask is to be
+ * returned to the kernel.
  */
-const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
-                                             struct cpumask *flush_mask,
-                                             struct bau_control *bcp)
+int uv_flush_send_and_wait(struct bau_desc *bau_desc,
+                           struct cpumask *flush_mask, struct bau_control *bcp)
 {
         int right_shift;
-        int uvhub;
-        int bit;
         int completion_status = 0;
         int seq_number = 0;
         long try = 0;
         int cpu = bcp->uvhub_cpu;
         int this_cpu = bcp->cpu;
-        int this_uvhub = bcp->uvhub;
         unsigned long mmr_offset;
         unsigned long index;
         cycles_t time1;
         cycles_t time2;
-        struct ptc_stats *stat = &per_cpu(ptcstats, bcp->cpu);
+        cycles_t elapsed;
+        struct ptc_stats *stat = bcp->statp;
         struct bau_control *smaster = bcp->socket_master;
         struct bau_control *hmaster = bcp->uvhub_master;
 
-        /*
-         * Spin here while there are hmaster->max_concurrent or more active
-         * descriptors. This is the per-uvhub 'throttle'.
-         */
         if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
                         &hmaster->active_descriptor_count,
-                        hmaster->max_concurrent)) {
+                        hmaster->max_bau_concurrent)) {
                 stat->s_throttles++;
                 do {
                         cpu_relax();
                 } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
                         &hmaster->active_descriptor_count,
-                        hmaster->max_concurrent));
+                        hmaster->max_bau_concurrent));
         }
-
         while (hmaster->uvhub_quiesce)
                 cpu_relax();
 
@@ -557,23 +607,10 @@ const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
         }
         time1 = get_cycles();
         do {
-                /*
-                 * Every message from any given cpu gets a unique message
-                 * sequence number. But retries use that same number.
-                 * Our message may have timed out at the destination because
-                 * all sw-ack resources are in use and there is a timeout
-                 * pending there.  In that case, our last send never got
-                 * placed into the queue and we need to persist until it
-                 * does.
-                 *
-                 * Make any retry a type MSG_RETRY so that the destination will
-                 * free any resource held by a previous message from this cpu.
-                 */
                 if (try == 0) {
-                        /* use message type set by the caller the first time */
+                        bau_desc->header.msg_type = MSG_REGULAR;
                         seq_number = bcp->message_number++;
                 } else {
-                        /* use RETRY type on all the rest; same sequence */
                         bau_desc->header.msg_type = MSG_RETRY;
                         stat->s_retry_messages++;
                 }
@@ -581,50 +618,17 @@ const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
                 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
                         bcp->uvhub_cpu;
                 bcp->send_message = get_cycles();
-
                 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
-
                 try++;
                 completion_status = uv_wait_completion(bau_desc, mmr_offset,
                         right_shift, this_cpu, bcp, smaster, try);
 
                 if (completion_status == FLUSH_RETRY_PLUGGED) {
-                        /*
-                         * Our retries may be blocked by all destination swack
-                         * resources being consumed, and a timeout pending. In
-                         * that case hardware immediately returns the ERROR
-                         * that looks like a destination timeout.
-                         */
-                        udelay(TIMEOUT_DELAY);
-                        bcp->plugged_tries++;
-                        if (bcp->plugged_tries >= PLUGSB4RESET) {
-                                bcp->plugged_tries = 0;
-                                quiesce_local_uvhub(hmaster);
-                                spin_lock(&hmaster->queue_lock);
-                                uv_reset_with_ipi(&bau_desc->distribution,
-                                                        this_cpu);
-                                spin_unlock(&hmaster->queue_lock);
-                                end_uvhub_quiesce(hmaster);
-                                bcp->ipi_attempts++;
-                                stat->s_resets_plug++;
-                        }
+                        destination_plugged(bau_desc, bcp, hmaster, stat);
                 } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
-                        hmaster->max_concurrent = 1;
-                        bcp->timeout_tries++;
-                        udelay(TIMEOUT_DELAY);
-                        if (bcp->timeout_tries >= TIMEOUTSB4RESET) {
-                                bcp->timeout_tries = 0;
-                                quiesce_local_uvhub(hmaster);
-                                spin_lock(&hmaster->queue_lock);
-                                uv_reset_with_ipi(&bau_desc->distribution,
-                                                                this_cpu);
-                                spin_unlock(&hmaster->queue_lock);
-                                end_uvhub_quiesce(hmaster);
-                                bcp->ipi_attempts++;
-                                stat->s_resets_timeout++;
-                        }
+                        destination_timeout(bau_desc, bcp, hmaster, stat);
                 }
-                if (bcp->ipi_attempts >= 3) {
+                if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
                         bcp->ipi_attempts = 0;
                         completion_status = FLUSH_GIVEUP;
                         break;
@@ -633,49 +637,36 @@ const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
         } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
                  (completion_status == FLUSH_RETRY_TIMEOUT));
         time2 = get_cycles();
-
-        if ((completion_status == FLUSH_COMPLETE) && (bcp->conseccompletes > 5)
-            && (hmaster->max_concurrent < hmaster->max_concurrent_constant))
-                        hmaster->max_concurrent++;
-
-        /*
-         * hold any cpu not timing out here; no other cpu currently held by
-         * the 'throttle' should enter the activation code
-         */
+        bcp->plugged_tries = 0;
+        bcp->timeout_tries = 0;
+        if ((completion_status == FLUSH_COMPLETE) &&
+            (bcp->conseccompletes > bcp->complete_threshold) &&
+            (hmaster->max_bau_concurrent <
+                                        hmaster->max_bau_concurrent_constant))
+                        hmaster->max_bau_concurrent++;
         while (hmaster->uvhub_quiesce)
                 cpu_relax();
         atomic_dec(&hmaster->active_descriptor_count);
-
-        /* guard against cycles wrap */
-        if (time2 > time1)
-                stat->s_time += (time2 - time1);
-        else
-                stat->s_requestor--; /* don't count this one */
+        if (time2 > time1) {
+                elapsed = time2 - time1;
+                stat->s_time += elapsed;
+                if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
+                        bcp->period_requests++;
+                        bcp->period_time += elapsed;
+                        if ((elapsed > congested_cycles) &&
+                            (bcp->period_requests > bcp->congested_reps)) {
+                                disable_for_congestion(bcp, stat);
+                        }
+                }
+        } else
+                stat->s_requestor--;
         if (completion_status == FLUSH_COMPLETE && try > 1)
                 stat->s_retriesok++;
         else if (completion_status == FLUSH_GIVEUP) {
-                /*
-                 * Cause the caller to do an IPI-style TLB shootdown on
-                 * the target cpu's, all of which are still in the mask.
-                 */
                 stat->s_giveup++;
-                return flush_mask;
-        }
-
-        /*
-         * Success, so clear the remote cpu's from the mask so we don't
-         * use the IPI method of shootdown on them.
-         */
-        for_each_cpu(bit, flush_mask) {
-                uvhub = uv_cpu_to_blade_id(bit);
-                if (uvhub == this_uvhub)
-                        continue;
-                cpumask_clear_cpu(bit, flush_mask);
+                return 1;
         }
-        if (!cpumask_empty(flush_mask))
-                return flush_mask;
-
-        return NULL;
+        return 0;
 }
 
 /**
@@ -707,70 +698,89 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
                                           struct mm_struct *mm,
                                           unsigned long va, unsigned int cpu)
 {
-        int remotes;
         int tcpu;
         int uvhub;
         int locals = 0;
+        int remotes = 0;
+        int hubs = 0;
         struct bau_desc *bau_desc;
         struct cpumask *flush_mask;
         struct ptc_stats *stat;
         struct bau_control *bcp;
+        struct bau_control *tbcp;
 
+        /* kernel was booted 'nobau' */
         if (nobau)
                 return cpumask;
 
         bcp = &per_cpu(bau_control, cpu);
+        stat = bcp->statp;
+
+        /* bau was disabled due to slow response */
+        if (bcp->baudisabled) {
+                /* the cpu that disabled it must re-enable it */
+                if (bcp->set_bau_off) {
+                        if (get_cycles() >= bcp->set_bau_on_time) {
+                                stat->s_bau_reenabled++;
+                                baudisabled = 0;
+                                for_each_present_cpu(tcpu) {
+                                        tbcp = &per_cpu(bau_control, tcpu);
+                                        tbcp->baudisabled = 0;
+                                        tbcp->period_requests = 0;
+                                        tbcp->period_time = 0;
+                                }
+                        }
+                }
+                return cpumask;
+        }
+
         /*
          * Each sending cpu has a per-cpu mask which it fills from the caller's
-         * cpu mask.  Only remote cpus are converted to uvhubs and copied.
+         * cpu mask.  All cpus are converted to uvhubs and copied to the
+         * activation descriptor.
          */
         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
-        /*
-         * copy cpumask to flush_mask, removing current cpu
-         * (current cpu should already have been flushed by the caller and
-         *  should never be returned if we return flush_mask)
-         */
+        /* don't actually do a shootdown of the local cpu */
         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
         if (cpu_isset(cpu, *cpumask))
-                locals++;  /* current cpu was targeted */
+                stat->s_ntargself++;
 
         bau_desc = bcp->descriptor_base;
         bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
-
         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
-        remotes = 0;
+
+        /* cpu statistics */
         for_each_cpu(tcpu, flush_mask) {
                 uvhub = uv_cpu_to_blade_id(tcpu);
-                if (uvhub == bcp->uvhub) {
-                        locals++;
-                        continue;
-                }
                 bau_uvhub_set(uvhub, &bau_desc->distribution);
-                remotes++;
-        }
-        if (remotes == 0) {
-                /*
-                 * No off_hub flushing; return status for local hub.
-                 * Return the caller's mask if all were local (the current
-                 * cpu may be in that mask).
-                 */
-                if (locals)
-                        return cpumask;
+                if (uvhub == bcp->uvhub)
+                        locals++;
                 else
-                        return NULL;
+                        remotes++;
         }
-        stat = &per_cpu(ptcstats, cpu);
+        if ((locals + remotes) == 0)
+                return NULL;
         stat->s_requestor++;
-        stat->s_ntargcpu += remotes;
+        stat->s_ntargcpu += remotes + locals;
+        stat->s_ntargremotes += remotes;
+        stat->s_ntarglocals += locals;
         remotes = bau_uvhub_weight(&bau_desc->distribution);
-        stat->s_ntarguvhub += remotes;
-        if (remotes >= 16)
+
+        /* uvhub statistics */
+        hubs = bau_uvhub_weight(&bau_desc->distribution);
+        if (locals) {
+                stat->s_ntarglocaluvhub++;
+                stat->s_ntargremoteuvhub += (hubs - 1);
+        } else
+                stat->s_ntargremoteuvhub += hubs;
+        stat->s_ntarguvhub += hubs;
+        if (hubs >= 16)
                 stat->s_ntarguvhub16++;
-        else if (remotes >= 8)
+        else if (hubs >= 8)
                 stat->s_ntarguvhub8++;
-        else if (remotes >= 4)
+        else if (hubs >= 4)
                 stat->s_ntarguvhub4++;
-        else if (remotes >= 2)
+        else if (hubs >= 2)
                 stat->s_ntarguvhub2++;
         else
                 stat->s_ntarguvhub1++;
@@ -779,10 +789,13 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
         bau_desc->payload.sending_cpu = cpu;
 
         /*
-         * uv_flush_send_and_wait returns null if all cpu's were messaged, or
-         * the adjusted flush_mask if any cpu's were not messaged.
+         * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
+         * or 1 if it gave up and the original cpumask should be returned.
          */
-        return uv_flush_send_and_wait(bau_desc, flush_mask, bcp);
+        if (!uv_flush_send_and_wait(bau_desc, flush_mask, bcp))
+                return NULL;
+        else
+                return cpumask;
 }
 
 /*
@@ -810,7 +823,7 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
 
         time_start = get_cycles();
         bcp = &per_cpu(bau_control, smp_processor_id());
-        stat = &per_cpu(ptcstats, smp_processor_id());
+        stat = bcp->statp;
         msgdesc.va_queue_first = bcp->va_queue_first;
         msgdesc.va_queue_last = bcp->va_queue_last;
         msg = bcp->bau_msg_head;
@@ -908,12 +921,12 @@ static void uv_ptc_seq_stop(struct seq_file *file, void *data)
 }
 
 static inline unsigned long long
-millisec_2_cycles(unsigned long millisec)
+microsec_2_cycles(unsigned long microsec)
 {
         unsigned long ns;
         unsigned long long cyc;
 
-        ns = millisec * 1000;
+        ns = microsec * 1000;
         cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
         return cyc;
 }
@@ -931,15 +944,19 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
 
         if (!cpu) {
                 seq_printf(file,
-                        "# cpu sent stime numuvhubs numuvhubs16 numuvhubs8 ");
+                        "# cpu sent stime self locals remotes ncpus localhub ");
                 seq_printf(file,
-                        "numuvhubs4 numuvhubs2 numuvhubs1 numcpus dto ");
+                        "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
+                seq_printf(file,
+                        "numuvhubs4 numuvhubs2 numuvhubs1 dto ");
                 seq_printf(file,
                         "retries rok resetp resett giveup sto bz throt ");
                 seq_printf(file,
                         "sw_ack recv rtime all ");
                 seq_printf(file,
-                        "one mult none retry canc nocan reset rcan\n");
+                        "one mult none retry canc nocan reset rcan ");
+                seq_printf(file,
+                        "disable enable\n");
         }
         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
                 stat = &per_cpu(ptcstats, cpu);
@@ -947,18 +964,23 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
                 seq_printf(file,
                         "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
                            cpu, stat->s_requestor, cycles_2_us(stat->s_time),
-                           stat->s_ntarguvhub, stat->s_ntarguvhub16,
+                           stat->s_ntargself, stat->s_ntarglocals,
+                           stat->s_ntargremotes, stat->s_ntargcpu,
+                           stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
+                           stat->s_ntarguvhub, stat->s_ntarguvhub16);
+                seq_printf(file, "%ld %ld %ld %ld %ld ",
                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
-                           stat->s_ntargcpu, stat->s_dtimeout);
+                           stat->s_dtimeout);
                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
                            stat->s_retry_messages, stat->s_retriesok,
                            stat->s_resets_plug, stat->s_resets_timeout,
                            stat->s_giveup, stat->s_stimeout,
                            stat->s_busy, stat->s_throttles);
+
                 /* destination side statistics */
                 seq_printf(file,
-                           "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
+                           "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
                            uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
                                         UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
                            stat->d_requestee, cycles_2_us(stat->d_time),
@@ -966,15 +988,36 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
                            stat->d_nocanceled, stat->d_resets,
                            stat->d_rcanceled);
+                seq_printf(file, "%ld %ld\n",
+                        stat->s_bau_disabled, stat->s_bau_reenabled);
         }
 
         return 0;
 }
 
 /*
+ * Display the tunables thru debugfs
+ */
+static ssize_t tunables_read(struct file *file, char __user *userbuf,
+                                                size_t count, loff_t *ppos)
+{
+        char buf[300];
+        int ret;
+
+        ret = snprintf(buf, 300, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
+                "max_bau_concurrent plugged_delay plugsb4reset",
+                "timeoutsb4reset ipi_reset_limit complete_threshold",
+                "congested_response_us congested_reps congested_period",
+                max_bau_concurrent, plugged_delay, plugsb4reset,
+                timeoutsb4reset, ipi_reset_limit, complete_threshold,
+                congested_response_us, congested_reps, congested_period);
+
+        return simple_read_from_buffer(userbuf, count, ppos, buf, ret);
+}
+
+/*
  * -1: resetf the statistics
  *  0: display meaning of the statistics
- * >0: maximum concurrent active descriptors per uvhub (throttle)
  */
 static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
                                  size_t count, loff_t *data)
@@ -983,7 +1026,6 @@ static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
         long input_arg;
         char optstr[64];
         struct ptc_stats *stat;
-        struct bau_control *bcp;
 
         if (count == 0 || count > sizeof(optstr))
                 return -EINVAL;
@@ -1059,29 +1101,158 @@ static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
                 "reset:    number of ipi-style reset requests processed\n");
                 printk(KERN_DEBUG
                 "rcan:     number messages canceled by reset requests\n");
+                printk(KERN_DEBUG
+                "disable:  number times use of the BAU was disabled\n");
+                printk(KERN_DEBUG
+                "enable:   number times use of the BAU was re-enabled\n");
         } else if (input_arg == -1) {
                 for_each_present_cpu(cpu) {
                         stat = &per_cpu(ptcstats, cpu);
                         memset(stat, 0, sizeof(struct ptc_stats));
                 }
-        } else {
-                uv_bau_max_concurrent = input_arg;
-                bcp = &per_cpu(bau_control, smp_processor_id());
-                if (uv_bau_max_concurrent < 1 ||
-                    uv_bau_max_concurrent > bcp->cpus_in_uvhub) {
-                        printk(KERN_DEBUG
-                                "Error: BAU max concurrent %d; %d is invalid\n",
-                                bcp->max_concurrent, uv_bau_max_concurrent);
-                        return -EINVAL;
-                }
-                printk(KERN_DEBUG "Set BAU max concurrent:%d\n",
-                       uv_bau_max_concurrent);
-                for_each_present_cpu(cpu) {
-                        bcp = &per_cpu(bau_control, cpu);
-                        bcp->max_concurrent = uv_bau_max_concurrent;
+        }
+
+        return count;
+}
+
+static int local_atoi(const char *name)
+{
+        int val = 0;
+
+        for (;; name++) {
+                switch (*name) {
+                case '0' ... '9':
+                        val = 10*val+(*name-'0');
+                        break;
+                default:
+                        return val;
                 }
         }
+}
+
+/*
+ * set the tunables
+ * 0 values reset them to defaults
+ */
+static ssize_t tunables_write(struct file *file, const char __user *user,
+                                 size_t count, loff_t *data)
+{
+        int cpu;
+        int cnt = 0;
+        int val;
+        char *p;
+        char *q;
+        char instr[64];
+        struct bau_control *bcp;
+
+        if (count == 0 || count > sizeof(instr)-1)
+                return -EINVAL;
+        if (copy_from_user(instr, user, count))
+                return -EFAULT;
+
+        instr[count] = '\0';
+        /* count the fields */
+        p = instr + strspn(instr, WHITESPACE);
+        q = p;
+        for (; *p; p = q + strspn(q, WHITESPACE)) {
+                q = p + strcspn(p, WHITESPACE);
+                cnt++;
+                if (q == p)
+                        break;
+        }
+        if (cnt != 9) {
+                printk(KERN_INFO "bau tunable error: should be 9 numbers\n");
+                return -EINVAL;
+        }
 
+        p = instr + strspn(instr, WHITESPACE);
+        q = p;
+        for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
+                q = p + strcspn(p, WHITESPACE);
+                val = local_atoi(p);
+                switch (cnt) {
+                case 0:
+                        if (val == 0) {
+                                max_bau_concurrent = MAX_BAU_CONCURRENT;
+                                max_bau_concurrent_constant =
+                                                        MAX_BAU_CONCURRENT;
+                                continue;
+                        }
+                        bcp = &per_cpu(bau_control, smp_processor_id());
+                        if (val < 1 || val > bcp->cpus_in_uvhub) {
+                                printk(KERN_DEBUG
+                                "Error: BAU max concurrent %d is invalid\n",
+                                val);
+                                return -EINVAL;
+                        }
+                        max_bau_concurrent = val;
+                        max_bau_concurrent_constant = val;
+                        continue;
+                case 1:
+                        if (val == 0)
+                                plugged_delay = PLUGGED_DELAY;
+                        else
+                                plugged_delay = val;
+                        continue;
+                case 2:
+                        if (val == 0)
+                                plugsb4reset = PLUGSB4RESET;
+                        else
+                                plugsb4reset = val;
+                        continue;
+                case 3:
+                        if (val == 0)
+                                timeoutsb4reset = TIMEOUTSB4RESET;
+                        else
+                                timeoutsb4reset = val;
+                        continue;
+                case 4:
+                        if (val == 0)
+                                ipi_reset_limit = IPI_RESET_LIMIT;
+                        else
+                                ipi_reset_limit = val;
+                        continue;
+                case 5:
+                        if (val == 0)
+                                complete_threshold = COMPLETE_THRESHOLD;
+                        else
+                                complete_threshold = val;
+                        continue;
+                case 6:
+                        if (val == 0)
+                                congested_response_us = CONGESTED_RESPONSE_US;
+                        else
+                                congested_response_us = val;
+                        continue;
+                case 7:
+                        if (val == 0)
+                                congested_reps = CONGESTED_REPS;
+                        else
+                                congested_reps = val;
+                        continue;
+                case 8:
+                        if (val == 0)
+                                congested_period = CONGESTED_PERIOD;
+                        else
+                                congested_period = val;
+                        continue;
+                }
+                if (q == p)
+                        break;
+        }
+        for_each_present_cpu(cpu) {
+                bcp = &per_cpu(bau_control, cpu);
+                bcp->max_bau_concurrent = max_bau_concurrent;
+                bcp->max_bau_concurrent_constant = max_bau_concurrent;
+                bcp->plugged_delay = plugged_delay;
+                bcp->plugsb4reset = plugsb4reset;
+                bcp->timeoutsb4reset = timeoutsb4reset;
+                bcp->ipi_reset_limit = ipi_reset_limit;
+                bcp->complete_threshold = complete_threshold;
+                bcp->congested_response_us = congested_response_us;
+                bcp->congested_reps = congested_reps;
+                bcp->congested_period = congested_period;
+        }
         return count;
 }
 
@@ -1097,6 +1268,11 @@ static int uv_ptc_proc_open(struct inode *inode, struct file *file)
         return seq_open(file, &uv_ptc_seq_ops);
 }
 
+static int tunables_open(struct inode *inode, struct file *file)
+{
+        return 0;
+}
+
 static const struct file_operations proc_uv_ptc_operations = {
         .open           = uv_ptc_proc_open,
         .read           = seq_read,
@@ -1105,6 +1281,12 @@ static const struct file_operations proc_uv_ptc_operations = {
         .release        = seq_release,
 };
 
+static const struct file_operations tunables_fops = {
+        .open           = tunables_open,
+        .read           = tunables_read,
+        .write          = tunables_write,
+};
+
 static int __init uv_ptc_init(void)
 {
         struct proc_dir_entry *proc_uv_ptc;
@@ -1119,6 +1301,20 @@ static int __init uv_ptc_init(void)
                        UV_PTC_BASENAME);
                 return -EINVAL;
         }
+
+        tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
+        if (!tunables_dir) {
+                printk(KERN_ERR "unable to create debugfs directory %s\n",
+                       UV_BAU_TUNABLES_DIR);
+                return -EINVAL;
+        }
+        tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
+                        tunables_dir, NULL, &tunables_fops);
+        if (!tunables_file) {
+                printk(KERN_ERR "unable to create debugfs file %s\n",
+                       UV_BAU_TUNABLES_FILE);
+                return -EINVAL;
+        }
         return 0;
 }
 
@@ -1259,15 +1455,44 @@ static void __init uv_init_uvhub(int uvhub, int vector)
 }
 
 /*
+ * We will set BAU_MISC_CONTROL with a timeout period.
+ * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
+ * So the destination timeout period has be be calculated from them.
+ */
+static int
+calculate_destination_timeout(void)
+{
+        unsigned long mmr_image;
+        int mult1;
+        int mult2;
+        int index;
+        int base;
+        int ret;
+        unsigned long ts_ns;
+
+        mult1 = UV_INTD_SOFT_ACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
+        mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
+        index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
+        mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
+        mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
+        base = timeout_base_ns[index];
+        ts_ns = base * mult1 * mult2;
+        ret = ts_ns / 1000;
+        return ret;
+}
+
+/*
  * initialize the bau_control structure for each cpu
  */
 static void uv_init_per_cpu(int nuvhubs)
 {
-        int i, j, k;
+        int i;
         int cpu;
         int pnode;
         int uvhub;
         short socket = 0;
+        unsigned short socket_mask;
+        unsigned int uvhub_mask;
         struct bau_control *bcp;
         struct uvhub_desc *bdp;
         struct socket_desc *sdp;
@@ -1278,7 +1503,7 @@ static void uv_init_per_cpu(int nuvhubs)
                 short cpu_number[16];
         };
         struct uvhub_desc {
-                short num_sockets;
+                unsigned short socket_mask;
                 short num_cpus;
                 short uvhub;
                 short pnode;
@@ -1286,57 +1511,83 @@ static void uv_init_per_cpu(int nuvhubs)
         };
         struct uvhub_desc *uvhub_descs;
 
+        timeout_us = calculate_destination_timeout();
+
         uvhub_descs = (struct uvhub_desc *)
                 kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
         memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
         for_each_present_cpu(cpu) {
                 bcp = &per_cpu(bau_control, cpu);
                 memset(bcp, 0, sizeof(struct bau_control));
-                spin_lock_init(&bcp->masks_lock);
-                bcp->max_concurrent = uv_bau_max_concurrent;
                 pnode = uv_cpu_hub_info(cpu)->pnode;
                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
+                uvhub_mask |= (1 << uvhub);
                 bdp = &uvhub_descs[uvhub];
                 bdp->num_cpus++;
                 bdp->uvhub = uvhub;
                 bdp->pnode = pnode;
-                /* time interval to catch a hardware stay-busy bug */
-                bcp->timeout_interval = millisec_2_cycles(3);
-                /* kludge: assume uv_hub.h is constant */
-                socket = (cpu_physical_id(cpu)>>5)&1;
-                if (socket >= bdp->num_sockets)
-                        bdp->num_sockets = socket+1;
+                /* kludge: 'assuming' one node per socket, and assuming that
+                   disabling a socket just leaves a gap in node numbers */
+                socket = (cpu_to_node(cpu) & 1);;
+                bdp->socket_mask |= (1 << socket);
                 sdp = &bdp->socket[socket];
                 sdp->cpu_number[sdp->num_cpus] = cpu;
                 sdp->num_cpus++;
         }
-        socket = 0;
-        for_each_possible_blade(uvhub) {
+        uvhub = 0;
+        while (uvhub_mask) {
+                if (!(uvhub_mask & 1))
+                        goto nexthub;
                 bdp = &uvhub_descs[uvhub];
-                for (i = 0; i < bdp->num_sockets; i++) {
-                        sdp = &bdp->socket[i];
-                        for (j = 0; j < sdp->num_cpus; j++) {
-                                cpu = sdp->cpu_number[j];
+                socket_mask = bdp->socket_mask;
+                socket = 0;
+                while (socket_mask) {
+                        if (!(socket_mask & 1))
+                                goto nextsocket;
+                        sdp = &bdp->socket[socket];
+                        for (i = 0; i < sdp->num_cpus; i++) {
+                                cpu = sdp->cpu_number[i];
                                 bcp = &per_cpu(bau_control, cpu);
                                 bcp->cpu = cpu;
-                                if (j == 0) {
+                                if (i == 0) {
                                         smaster = bcp;
-                                        if (i == 0)
+                                        if (socket == 0)
                                                 hmaster = bcp;
                                 }
                                 bcp->cpus_in_uvhub = bdp->num_cpus;
                                 bcp->cpus_in_socket = sdp->num_cpus;
                                 bcp->socket_master = smaster;
+                                bcp->uvhub = bdp->uvhub;
                                 bcp->uvhub_master = hmaster;
-                                for (k = 0; k < DEST_Q_SIZE; k++)
-                                        bcp->socket_acknowledge_count[k] = 0;
-                                bcp->uvhub_cpu =
-                                  uv_cpu_hub_info(cpu)->blade_processor_id;
+                                bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->
+                                                blade_processor_id;
                         }
+nextsocket:
                         socket++;
+                        socket_mask = (socket_mask >> 1);
                 }
+nexthub:
+                uvhub++;
+                uvhub_mask = (uvhub_mask >> 1);
         }
         kfree(uvhub_descs);
+        for_each_present_cpu(cpu) {
+                bcp = &per_cpu(bau_control, cpu);
+                bcp->baudisabled = 0;
+                bcp->statp = &per_cpu(ptcstats, cpu);
+                /* time interval to catch a hardware stay-busy bug */
+                bcp->timeout_interval = microsec_2_cycles(2*timeout_us);
+                bcp->max_bau_concurrent = max_bau_concurrent;
+                bcp->max_bau_concurrent_constant = max_bau_concurrent;
+                bcp->plugged_delay = plugged_delay;
+                bcp->plugsb4reset = plugsb4reset;
+                bcp->timeoutsb4reset = timeoutsb4reset;
+                bcp->ipi_reset_limit = ipi_reset_limit;
+                bcp->complete_threshold = complete_threshold;
+                bcp->congested_response_us = congested_response_us;
+                bcp->congested_reps = congested_reps;
+                bcp->congested_period = congested_period;
+        }
 }
 
 /*
@@ -1361,10 +1612,11 @@ static int __init uv_bau_init(void)
                 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
                                        GFP_KERNEL, cpu_to_node(cur_cpu));
 
-        uv_bau_max_concurrent = MAX_BAU_CONCURRENT;
         uv_nshift = uv_hub_info->m_val;
         uv_mmask = (1UL << uv_hub_info->m_val) - 1;
         nuvhubs = uv_num_possible_blades();
+        spin_lock_init(&disable_lock);
+        congested_cycles = microsec_2_cycles(congested_response_us);
 
         uv_init_per_cpu(nuvhubs);
 
@@ -1383,15 +1635,19 @@ static int __init uv_bau_init(void)
         alloc_intr_gate(vector, uv_bau_message_intr1);
 
         for_each_possible_blade(uvhub) {
-                pnode = uv_blade_to_pnode(uvhub);
-                /* INIT the bau */
-                uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL,
-                                      ((unsigned long)1 << 63));
-                mmr = 1; /* should be 1 to broadcast to both sockets */
-                uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, mmr);
+                if (uv_blade_nr_possible_cpus(uvhub)) {
+                        pnode = uv_blade_to_pnode(uvhub);
+                        /* INIT the bau */
+                        uv_write_global_mmr64(pnode,
+                                        UVH_LB_BAU_SB_ACTIVATION_CONTROL,
+                                        ((unsigned long)1 << 63));
+                        mmr = 1; /* should be 1 to broadcast to both sockets */
+                        uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST,
+                                                mmr);
+                }
         }
 
         return 0;
 }
 core_initcall(uv_bau_init);
-core_initcall(uv_ptc_init);
+fs_initcall(uv_ptc_init);
diff --git a/arch/x86/lib/atomic64_386_32.S b/arch/x86/lib/atomic64_386_32.S
index 4a5979aa6883..2cda60a06e65 100644
--- a/arch/x86/lib/atomic64_386_32.S
+++ b/arch/x86/lib/atomic64_386_32.S
@@ -25,150 +25,172 @@
         CFI_ADJUST_CFA_OFFSET -4
 .endm
 
-.macro BEGIN func reg
-$v = \reg
-
-ENTRY(atomic64_\func\()_386)
-        CFI_STARTPROC
-        LOCK $v
-
-.macro RETURN
-        UNLOCK $v
+#define BEGIN(op) \
+.macro endp; \
+        CFI_ENDPROC; \
+ENDPROC(atomic64_##op##_386); \
+.purgem endp; \
+.endm; \
+ENTRY(atomic64_##op##_386); \
+        CFI_STARTPROC; \
+        LOCK v;
+
+#define ENDP endp
+
+#define RET \
+        UNLOCK v; \
         ret
-.endm
-
-.macro END_
-        CFI_ENDPROC
-ENDPROC(atomic64_\func\()_386)
-.purgem RETURN
-.purgem END_
-.purgem END
-.endm
-
-.macro END
-RETURN
-END_
-.endm
-.endm
 
-BEGIN read %ecx
-        movl  ($v), %eax
-        movl 4($v), %edx
-END
-
-BEGIN set %esi
-        movl %ebx,  ($v)
-        movl %ecx, 4($v)
-END
-
-BEGIN xchg %esi
-        movl  ($v), %eax
-        movl 4($v), %edx
-        movl %ebx,  ($v)
-        movl %ecx, 4($v)
-END
-
-BEGIN add %ecx
-        addl %eax,  ($v)
-        adcl %edx, 4($v)
-END
-
-BEGIN add_return %ecx
-        addl  ($v), %eax
-        adcl 4($v), %edx
-        movl %eax,  ($v)
-        movl %edx, 4($v)
-END
-
-BEGIN sub %ecx
-        subl %eax,  ($v)
-        sbbl %edx, 4($v)
-END
-
-BEGIN sub_return %ecx
+#define RET_ENDP \
+        RET; \
+        ENDP
+
+#define v %ecx
+BEGIN(read)
+        movl  (v), %eax
+        movl 4(v), %edx
+RET_ENDP
+#undef v
+
+#define v %esi
+BEGIN(set)
+        movl %ebx,  (v)
+        movl %ecx, 4(v)
+RET_ENDP
+#undef v
+
+#define v  %esi
+BEGIN(xchg)
+        movl  (v), %eax
+        movl 4(v), %edx
+        movl %ebx,  (v)
+        movl %ecx, 4(v)
+RET_ENDP
+#undef v
+
+#define v %ecx
+BEGIN(add)
+        addl %eax,  (v)
+        adcl %edx, 4(v)
+RET_ENDP
+#undef v
+
+#define v %ecx
+BEGIN(add_return)
+        addl  (v), %eax
+        adcl 4(v), %edx
+        movl %eax,  (v)
+        movl %edx, 4(v)
+RET_ENDP
+#undef v
+
+#define v %ecx
+BEGIN(sub)
+        subl %eax,  (v)
+        sbbl %edx, 4(v)
+RET_ENDP
+#undef v
+
+#define v %ecx
+BEGIN(sub_return)
         negl %edx
         negl %eax
         sbbl $0, %edx
-        addl  ($v), %eax
-        adcl 4($v), %edx
-        movl %eax,  ($v)
-        movl %edx, 4($v)
-END
-
-BEGIN inc %esi
-        addl $1,  ($v)
-        adcl $0, 4($v)
-END
-
-BEGIN inc_return %esi
-        movl  ($v), %eax
-        movl 4($v), %edx
+        addl  (v), %eax
+        adcl 4(v), %edx
+        movl %eax,  (v)
+        movl %edx, 4(v)
+RET_ENDP
+#undef v
+
+#define v %esi
+BEGIN(inc)
+        addl $1,  (v)
+        adcl $0, 4(v)
+RET_ENDP
+#undef v
+
+#define v %esi
+BEGIN(inc_return)
+        movl  (v), %eax
+        movl 4(v), %edx
         addl $1, %eax
         adcl $0, %edx
-        movl %eax,  ($v)
-        movl %edx, 4($v)
-END
-
-BEGIN dec %esi
-        subl $1,  ($v)
-        sbbl $0, 4($v)
-END
-
-BEGIN dec_return %esi
-        movl  ($v), %eax
-        movl 4($v), %edx
+        movl %eax,  (v)
+        movl %edx, 4(v)
+RET_ENDP
+#undef v
+
+#define v %esi
+BEGIN(dec)
+        subl $1,  (v)
+        sbbl $0, 4(v)
+RET_ENDP
+#undef v
+
+#define v %esi
+BEGIN(dec_return)
+        movl  (v), %eax
+        movl 4(v), %edx
         subl $1, %eax
         sbbl $0, %edx
-        movl %eax,  ($v)
-        movl %edx, 4($v)
-END
+        movl %eax,  (v)
+        movl %edx, 4(v)
+RET_ENDP
+#undef v
 
-BEGIN add_unless %ecx
+#define v %ecx
+BEGIN(add_unless)
         addl %eax, %esi
         adcl %edx, %edi
-        addl  ($v), %eax
-        adcl 4($v), %edx
+        addl  (v), %eax
+        adcl 4(v), %edx
         cmpl %eax, %esi
         je 3f
 1:
-        movl %eax,  ($v)
-        movl %edx, 4($v)
+        movl %eax,  (v)
+        movl %edx, 4(v)
         movl $1, %eax
 2:
-RETURN
+        RET
 3:
         cmpl %edx, %edi
         jne 1b
         xorl %eax, %eax
         jmp 2b
-END_
+ENDP
+#undef v
 
-BEGIN inc_not_zero %esi
-        movl  ($v), %eax
-        movl 4($v), %edx
+#define v %esi
+BEGIN(inc_not_zero)
+        movl  (v), %eax
+        movl 4(v), %edx
         testl %eax, %eax
         je 3f
 1:
         addl $1, %eax
         adcl $0, %edx
-        movl %eax,  ($v)
-        movl %edx, 4($v)
+        movl %eax,  (v)
+        movl %edx, 4(v)
         movl $1, %eax
 2:
-RETURN
+        RET
 3:
         testl %edx, %edx
         jne 1b
         jmp 2b
-END_
+ENDP
+#undef v
 
-BEGIN dec_if_positive %esi
-        movl  ($v), %eax
-        movl 4($v), %edx
+#define v %esi
+BEGIN(dec_if_positive)
+        movl  (v), %eax
+        movl 4(v), %edx
         subl $1, %eax
         sbbl $0, %edx
         js 1f
-        movl %eax,  ($v)
-        movl %edx, 4($v)
+        movl %eax,  (v)
+        movl %edx, 4(v)
 1:
-END
+RET_ENDP
+#undef v
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index f62777940dfb..4c4508e8a204 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -802,8 +802,10 @@ do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
         up_read(&mm->mmap_sem);
 
         /* Kernel mode? Handle exceptions or die: */
-        if (!(error_code & PF_USER))
+        if (!(error_code & PF_USER)) {
                 no_context(regs, error_code, address);
+                return;
+        }
 
         /* User-space => ok to do another page fault: */
         if (is_prefetch(regs, error_code, address))
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 1ba67dc8006a..f6b48f6c5951 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -668,6 +668,7 @@ static int __init ppro_init(char **cpu_type)
                 *cpu_type = "i386/core_2";
                 break;
         case 0x1a:
+        case 0x1e:
         case 0x2e:
                 spec = &op_arch_perfmon_spec;
                 *cpu_type = "i386/core_i7";
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile
index 930954685980..779385158915 100644
--- a/arch/x86/xen/Makefile
+++ b/arch/x86/xen/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_SMP)		+= smp.o
 obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o
 obj-$(CONFIG_XEN_DEBUG_FS)      += debugfs.o
 
+obj-$(CONFIG_SWIOTLB_XEN)       += pci-swiotlb-xen.o
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index d4ff5e83621d..7d46c8441418 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1172,6 +1172,10 @@ asmlinkage void __init xen_start_kernel(void)
 
         pgd = (pgd_t *)xen_start_info->pt_base;
 
+        if (!xen_initial_domain())
+                __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
+
+        __supported_pte_mask |= _PAGE_IOMAP;
         /* Don't do the full vcpu_info placement stuff until we have a
            possible map and a non-dummy shared_info. */
         per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 413b19b3d0fe..42086ac406af 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -42,6 +42,7 @@
 #include <linux/highmem.h>
 #include <linux/debugfs.h>
 #include <linux/bug.h>
+#include <linux/vmalloc.h>
 #include <linux/module.h>
 #include <linux/gfp.h>
 
@@ -51,15 +52,19 @@
 #include <asm/mmu_context.h>
 #include <asm/setup.h>
 #include <asm/paravirt.h>
+#include <asm/e820.h>
 #include <asm/linkage.h>
+#include <asm/page.h>
 
 #include <asm/xen/hypercall.h>
 #include <asm/xen/hypervisor.h>
 
+#include <xen/xen.h>
 #include <xen/page.h>
 #include <xen/interface/xen.h>
 #include <xen/interface/hvm/hvm_op.h>
 #include <xen/interface/version.h>
+#include <xen/interface/memory.h>
 #include <xen/hvc-console.h>
 
 #include "multicalls.h"
@@ -68,6 +73,13 @@
 
 #define MMU_UPDATE_HISTO        30
 
+/*
+ * Protects atomic reservation decrease/increase against concurrent increases.
+ * Also protects non-atomic updates of current_pages and driver_pages, and
+ * balloon lists.
+ */
+DEFINE_SPINLOCK(xen_reservation_lock);
+
 #ifdef CONFIG_XEN_DEBUG_FS
 
 static struct {
@@ -378,6 +390,28 @@ static bool xen_page_pinned(void *ptr)
         return PagePinned(page);
 }
 
+static bool xen_iomap_pte(pte_t pte)
+{
+        return pte_flags(pte) & _PAGE_IOMAP;
+}
+
+static void xen_set_iomap_pte(pte_t *ptep, pte_t pteval)
+{
+        struct multicall_space mcs;
+        struct mmu_update *u;
+
+        mcs = xen_mc_entry(sizeof(*u));
+        u = mcs.args;
+
+        /* ptep might be kmapped when using 32-bit HIGHPTE */
+        u->ptr = arbitrary_virt_to_machine(ptep).maddr;
+        u->val = pte_val_ma(pteval);
+
+        MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_IO);
+
+        xen_mc_issue(PARAVIRT_LAZY_MMU);
+}
+
 static void xen_extend_mmu_update(const struct mmu_update *update)
 {
         struct multicall_space mcs;
@@ -454,6 +488,11 @@ void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
                     pte_t *ptep, pte_t pteval)
 {
+        if (xen_iomap_pte(pteval)) {
+                xen_set_iomap_pte(ptep, pteval);
+                goto out;
+        }
+
         ADD_STATS(set_pte_at, 1);
 //      ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
         ADD_STATS(set_pte_at_current, mm == current->mm);
@@ -524,8 +563,25 @@ static pteval_t pte_pfn_to_mfn(pteval_t val)
         return val;
 }
 
+static pteval_t iomap_pte(pteval_t val)
+{
+        if (val & _PAGE_PRESENT) {
+                unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
+                pteval_t flags = val & PTE_FLAGS_MASK;
+
+                /* We assume the pte frame number is a MFN, so
+                   just use it as-is. */
+                val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
+        }
+
+        return val;
+}
+
 pteval_t xen_pte_val(pte_t pte)
 {
+        if (xen_initial_domain() && (pte.pte & _PAGE_IOMAP))
+                return pte.pte;
+
         return pte_mfn_to_pfn(pte.pte);
 }
 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
@@ -538,7 +594,22 @@ PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
 
 pte_t xen_make_pte(pteval_t pte)
 {
-        pte = pte_pfn_to_mfn(pte);
+        phys_addr_t addr = (pte & PTE_PFN_MASK);
+
+        /*
+         * Unprivileged domains are allowed to do IOMAPpings for
+         * PCI passthrough, but not map ISA space.  The ISA
+         * mappings are just dummy local mappings to keep other
+         * parts of the kernel happy.
+         */
+        if (unlikely(pte & _PAGE_IOMAP) &&
+            (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
+                pte = iomap_pte(pte);
+        } else {
+                pte &= ~_PAGE_IOMAP;
+                pte = pte_pfn_to_mfn(pte);
+        }
+
         return native_make_pte(pte);
 }
 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
@@ -594,6 +665,11 @@ void xen_set_pud(pud_t *ptr, pud_t val)
 
 void xen_set_pte(pte_t *ptep, pte_t pte)
 {
+        if (xen_iomap_pte(pte)) {
+                xen_set_iomap_pte(ptep, pte);
+                return;
+        }
+
         ADD_STATS(pte_update, 1);
 //      ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
         ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
@@ -610,6 +686,11 @@ void xen_set_pte(pte_t *ptep, pte_t pte)
 #ifdef CONFIG_X86_PAE
 void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
 {
+        if (xen_iomap_pte(pte)) {
+                xen_set_iomap_pte(ptep, pte);
+                return;
+        }
+
         set_64bit((u64 *)ptep, native_pte_val(pte));
 }
 
@@ -936,8 +1017,6 @@ static int xen_pin_page(struct mm_struct *mm, struct page *page,
    read-only, and can be pinned. */
 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
 {
-        vm_unmap_aliases();
-
         xen_mc_batch();
 
         if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
@@ -1501,7 +1580,6 @@ static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned l
         if (PagePinned(virt_to_page(mm->pgd))) {
                 SetPagePinned(page);
 
-                vm_unmap_aliases();
                 if (!PageHighMem(page)) {
                         make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
                         if (level == PT_PTE && USE_SPLIT_PTLOCKS)
@@ -1812,9 +1890,16 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
                 pte = pfn_pte(phys, prot);
                 break;
 
-        default:
+        case FIX_PARAVIRT_BOOTMAP:
+                /* This is an MFN, but it isn't an IO mapping from the
+                   IO domain */
                 pte = mfn_pte(phys, prot);
                 break;
+
+        default:
+                /* By default, set_fixmap is used for hardware mappings */
+                pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
+                break;
         }
 
         __native_set_fixmap(idx, pte);
@@ -1940,7 +2025,205 @@ void __init xen_init_mmu_ops(void)
         x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
         x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
         pv_mmu_ops = xen_mmu_ops;
+
+        vmap_lazy_unmap = false;
+}
+
+/* Protected by xen_reservation_lock. */
+#define MAX_CONTIG_ORDER 9 /* 2MB */
+static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
+
+#define VOID_PTE (mfn_pte(0, __pgprot(0)))
+static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
+                                unsigned long *in_frames,
+                                unsigned long *out_frames)
+{
+        int i;
+        struct multicall_space mcs;
+
+        xen_mc_batch();
+        for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
+                mcs = __xen_mc_entry(0);
+
+                if (in_frames)
+                        in_frames[i] = virt_to_mfn(vaddr);
+
+                MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
+                set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
+
+                if (out_frames)
+                        out_frames[i] = virt_to_pfn(vaddr);
+        }
+        xen_mc_issue(0);
+}
+
+/*
+ * Update the pfn-to-mfn mappings for a virtual address range, either to
+ * point to an array of mfns, or contiguously from a single starting
+ * mfn.
+ */
+static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
+                                     unsigned long *mfns,
+                                     unsigned long first_mfn)
+{
+        unsigned i, limit;
+        unsigned long mfn;
+
+        xen_mc_batch();
+
+        limit = 1u << order;
+        for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
+                struct multicall_space mcs;
+                unsigned flags;
+
+                mcs = __xen_mc_entry(0);
+                if (mfns)
+                        mfn = mfns[i];
+                else
+                        mfn = first_mfn + i;
+
+                if (i < (limit - 1))
+                        flags = 0;
+                else {
+                        if (order == 0)
+                                flags = UVMF_INVLPG | UVMF_ALL;
+                        else
+                                flags = UVMF_TLB_FLUSH | UVMF_ALL;
+                }
+
+                MULTI_update_va_mapping(mcs.mc, vaddr,
+                                mfn_pte(mfn, PAGE_KERNEL), flags);
+
+                set_phys_to_machine(virt_to_pfn(vaddr), mfn);
+        }
+
+        xen_mc_issue(0);
+}
+
+/*
+ * Perform the hypercall to exchange a region of our pfns to point to
+ * memory with the required contiguous alignment.  Takes the pfns as
+ * input, and populates mfns as output.
+ *
+ * Returns a success code indicating whether the hypervisor was able to
+ * satisfy the request or not.
+ */
+static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
+                               unsigned long *pfns_in,
+                               unsigned long extents_out,
+                               unsigned int order_out,
+                               unsigned long *mfns_out,
+                               unsigned int address_bits)
+{
+        long rc;
+        int success;
+
+        struct xen_memory_exchange exchange = {
+                .in = {
+                        .nr_extents   = extents_in,
+                        .extent_order = order_in,
+                        .extent_start = pfns_in,
+                        .domid        = DOMID_SELF
+                },
+                .out = {
+                        .nr_extents   = extents_out,
+                        .extent_order = order_out,
+                        .extent_start = mfns_out,
+                        .address_bits = address_bits,
+                        .domid        = DOMID_SELF
+                }
+        };
+
+        BUG_ON(extents_in << order_in != extents_out << order_out);
+
+        rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
+        success = (exchange.nr_exchanged == extents_in);
+
+        BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
+        BUG_ON(success && (rc != 0));
+
+        return success;
+}
+
+int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
+                                 unsigned int address_bits)
+{
+        unsigned long *in_frames = discontig_frames, out_frame;
+        unsigned long  flags;
+        int            success;
+
+        /*
+         * Currently an auto-translated guest will not perform I/O, nor will
+         * it require PAE page directories below 4GB. Therefore any calls to
+         * this function are redundant and can be ignored.
+         */
+
+        if (xen_feature(XENFEAT_auto_translated_physmap))
+                return 0;
+
+        if (unlikely(order > MAX_CONTIG_ORDER))
+                return -ENOMEM;
+
+        memset((void *) vstart, 0, PAGE_SIZE << order);
+
+        spin_lock_irqsave(&xen_reservation_lock, flags);
+
+        /* 1. Zap current PTEs, remembering MFNs. */
+        xen_zap_pfn_range(vstart, order, in_frames, NULL);
+
+        /* 2. Get a new contiguous memory extent. */
+        out_frame = virt_to_pfn(vstart);
+        success = xen_exchange_memory(1UL << order, 0, in_frames,
+                                      1, order, &out_frame,
+                                      address_bits);
+
+        /* 3. Map the new extent in place of old pages. */
+        if (success)
+                xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
+        else
+                xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
+
+        spin_unlock_irqrestore(&xen_reservation_lock, flags);
+
+        return success ? 0 : -ENOMEM;
+}
+EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
+
+void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
+{
+        unsigned long *out_frames = discontig_frames, in_frame;
+        unsigned long  flags;
+        int success;
+
+        if (xen_feature(XENFEAT_auto_translated_physmap))
+                return;
+
+        if (unlikely(order > MAX_CONTIG_ORDER))
+                return;
+
+        memset((void *) vstart, 0, PAGE_SIZE << order);
+
+        spin_lock_irqsave(&xen_reservation_lock, flags);
+
+        /* 1. Find start MFN of contiguous extent. */
+        in_frame = virt_to_mfn(vstart);
+
+        /* 2. Zap current PTEs. */
+        xen_zap_pfn_range(vstart, order, NULL, out_frames);
+
+        /* 3. Do the exchange for non-contiguous MFNs. */
+        success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
+                                        0, out_frames, 0);
+
+        /* 4. Map new pages in place of old pages. */
+        if (success)
+                xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
+        else
+                xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
+
+        spin_unlock_irqrestore(&xen_reservation_lock, flags);
 }
+EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
 
 #ifdef CONFIG_XEN_PVHVM
 static void xen_hvm_exit_mmap(struct mm_struct *mm)
diff --git a/arch/x86/xen/pci-swiotlb-xen.c b/arch/x86/xen/pci-swiotlb-xen.c
new file mode 100644
index 000000000000..a013ec9d0c54
--- /dev/null
+++ b/arch/x86/xen/pci-swiotlb-xen.c
@@ -0,0 +1,58 @@
+/* Glue code to lib/swiotlb-xen.c */
+
+#include <linux/dma-mapping.h>
+#include <xen/swiotlb-xen.h>
+
+#include <asm/xen/hypervisor.h>
+#include <xen/xen.h>
+
+int xen_swiotlb __read_mostly;
+
+static struct dma_map_ops xen_swiotlb_dma_ops = {
+        .mapping_error = xen_swiotlb_dma_mapping_error,
+        .alloc_coherent = xen_swiotlb_alloc_coherent,
+        .free_coherent = xen_swiotlb_free_coherent,
+        .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,
+        .sync_single_for_device = xen_swiotlb_sync_single_for_device,
+        .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,
+        .sync_sg_for_device = xen_swiotlb_sync_sg_for_device,
+        .map_sg = xen_swiotlb_map_sg_attrs,
+        .unmap_sg = xen_swiotlb_unmap_sg_attrs,
+        .map_page = xen_swiotlb_map_page,
+        .unmap_page = xen_swiotlb_unmap_page,
+        .dma_supported = xen_swiotlb_dma_supported,
+};
+
+/*
+ * pci_xen_swiotlb_detect - set xen_swiotlb to 1 if necessary
+ *
+ * This returns non-zero if we are forced to use xen_swiotlb (by the boot
+ * option).
+ */
+int __init pci_xen_swiotlb_detect(void)
+{
+
+        /* If running as PV guest, either iommu=soft, or swiotlb=force will
+         * activate this IOMMU. If running as PV privileged, activate it
+         * irregardlesss.
+         */
+        if ((xen_initial_domain() || swiotlb || swiotlb_force) &&
+            (xen_pv_domain()))
+                xen_swiotlb = 1;
+
+        /* If we are running under Xen, we MUST disable the native SWIOTLB.
+         * Don't worry about swiotlb_force flag activating the native, as
+         * the 'swiotlb' flag is the only one turning it on. */
+        if (xen_pv_domain())
+                swiotlb = 0;
+
+        return xen_swiotlb;
+}
+
+void __init pci_xen_swiotlb_init(void)
+{
+        if (xen_swiotlb) {
+                xen_swiotlb_init(1);
+                dma_ops = &xen_swiotlb_dma_ops;
+        }
+}
diff --git a/arch/xtensa/include/asm/cache.h b/arch/xtensa/include/asm/cache.h
index ed8cd3cbd499..d2fd932fdb4d 100644
--- a/arch/xtensa/include/asm/cache.h
+++ b/arch/xtensa/include/asm/cache.h
@@ -29,6 +29,6 @@
 # define CACHE_WAY_SIZE ICACHE_WAY_SIZE
 #endif
 
-#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN       L1_CACHE_BYTES
 
 #endif  /* _XTENSA_CACHE_H */
diff --git a/arch/xtensa/include/asm/dma-mapping.h b/arch/xtensa/include/asm/dma-mapping.h
index 51882ae3db4d..492c95790ad5 100644
--- a/arch/xtensa/include/asm/dma-mapping.h
+++ b/arch/xtensa/include/asm/dma-mapping.h
@@ -161,14 +161,6 @@ dma_set_mask(struct device *dev, u64 mask)
         return 0;
 }
 
-static inline int
-dma_get_cache_alignment(void)
-{
-        return L1_CACHE_BYTES;
-}
-
-#define dma_is_consistent(d, h) (1)
-
 static inline void
 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)