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authorDavid Woodhouse <dwmw2@infradead.org>2007-04-27 14:16:19 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2007-04-27 14:16:19 -0400
commitd1da4e50e5d09f02c340927a4fcb7f54202fa033 (patch)
tree7f98317bdd45dbdb7644e9179891c5af6a3a8ef1 /arch
parent78ab67da1002d954ea4c3e2b441e2483c41f94e8 (diff)
parenta205752d1ad2d37d6597aaae5a56fc396a770868 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: drivers/mtd/Kconfig Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/lib/Makefile1
-rw-r--r--arch/alpha/lib/strcasecmp.c26
-rw-r--r--arch/avr32/Kconfig13
-rw-r--r--arch/avr32/Makefile1
-rw-r--r--arch/avr32/boards/atngw100/Makefile1
-rw-r--r--arch/avr32/boards/atngw100/flash.c95
-rw-r--r--arch/avr32/boards/atngw100/setup.c124
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c4
-rw-r--r--arch/avr32/boards/atstk1000/setup.c30
-rw-r--r--arch/avr32/configs/atngw100_defconfig1085
-rw-r--r--arch/avr32/kernel/cpu.c64
-rw-r--r--arch/avr32/kernel/entry-avr32b.S124
-rw-r--r--arch/avr32/kernel/module.c11
-rw-r--r--arch/avr32/kernel/process.c193
-rw-r--r--arch/avr32/kernel/setup.c484
-rw-r--r--arch/avr32/kernel/time.c150
-rw-r--r--arch/avr32/kernel/traps.c421
-rw-r--r--arch/avr32/kernel/vmlinux.lds.c9
-rw-r--r--arch/avr32/mach-at32ap/Kconfig31
-rw-r--r--arch/avr32/mach-at32ap/Makefile1
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c70
-rw-r--r--arch/avr32/mach-at32ap/hmatrix.h182
-rw-r--r--arch/avr32/mach-at32ap/hsmc.c23
-rw-r--r--arch/avr32/mach-at32ap/time-tc.c218
-rw-r--r--arch/avr32/mm/fault.c116
-rw-r--r--arch/avr32/mm/init.c238
-rw-r--r--arch/ia64/hp/sim/simeth.c3
-rw-r--r--arch/ia64/sn/kernel/xpnet.c18
-rw-r--r--arch/mips/Kconfig27
-rw-r--r--arch/mips/Makefile6
-rw-r--r--arch/mips/basler/excite/excite_setup.c2
-rw-r--r--arch/mips/cobalt/Makefile1
-rw-r--r--arch/mips/cobalt/console.c8
-rw-r--r--arch/mips/cobalt/irq.c2
-rw-r--r--arch/mips/cobalt/pci.c47
-rw-r--r--arch/mips/cobalt/reset.c11
-rw-r--r--arch/mips/cobalt/setup.c32
-rw-r--r--arch/mips/configs/jmr3927_defconfig254
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig1540
-rw-r--r--arch/mips/gt64120/wrppmc/pci.c4
-rw-r--r--arch/mips/jmr3927/common/prom.c12
-rw-r--r--arch/mips/jmr3927/common/puts.c122
-rw-r--r--arch/mips/jmr3927/rbhma3100/Makefile1
-rw-r--r--arch/mips/jmr3927/rbhma3100/init.c16
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c312
-rw-r--r--arch/mips/jmr3927/rbhma3100/kgdb_io.c54
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c157
-rw-r--r--arch/mips/kernel/asm-offsets.c1
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/kernel/kspd.c5
-rw-r--r--arch/mips/kernel/rtlx.c7
-rw-r--r--arch/mips/mips-boards/generic/display.c8
-rw-r--r--arch/mips/mips-boards/generic/pci.c4
-rw-r--r--arch/mips/mips-boards/generic/reset.c12
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c4
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c4
-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/mm/init.c25
-rw-r--r--arch/mips/pci/Makefile3
-rw-r--r--arch/mips/pci/fixup-jmr3927.c11
-rw-r--r--arch/mips/pci/ops-gt64111.c100
-rw-r--r--arch/mips/pci/ops-gt64xxx_pci0.c (renamed from arch/mips/pci/ops-gt64120.c)30
-rw-r--r--arch/mips/pci/ops-tx3927.c232
-rw-r--r--arch/mips/pci/pci-lasat.c4
-rw-r--r--arch/mips/pci/pci-ocelot.c2
-rw-r--r--arch/mips/pci/pci.c25
-rw-r--r--arch/mips/sgi-ip22/ip22-nvram.c24
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c14
-rw-r--r--arch/mips/sibyte/Kconfig2
-rw-r--r--arch/mips/sibyte/common/Makefile5
-rw-r--r--arch/mips/sibyte/common/sb_tbprof.c (renamed from arch/mips/sibyte/sb1250/bcm1250_tbprof.c)158
-rw-r--r--arch/mips/sibyte/sb1250/Makefile1
-rw-r--r--arch/mips/sni/pcimt.c105
-rw-r--r--arch/mips/sni/pcit.c122
-rw-r--r--arch/mips/vr41xx/Kconfig92
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c2
-rw-r--r--arch/powerpc/lib/Makefile5
-rw-r--r--arch/powerpc/lib/strcase.c25
-rw-r--r--arch/ppc/8260_io/enet.c1
-rw-r--r--arch/ppc/8260_io/fcc_enet.c1
-rw-r--r--arch/ppc/8xx_io/enet.c1
-rw-r--r--arch/ppc/8xx_io/fec.c1
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c2
-rw-r--r--arch/ppc/lib/Makefile2
-rw-r--r--arch/ppc/lib/strcase.c24
-rw-r--r--arch/s390/Kconfig13
-rw-r--r--arch/s390/Makefile5
-rw-r--r--arch/s390/appldata/appldata_base.c38
-rw-r--r--arch/s390/appldata/appldata_net_sum.c4
-rw-r--r--arch/s390/crypto/sha1_s390.c129
-rw-r--r--arch/s390/crypto/sha256_s390.c38
-rw-r--r--arch/s390/defconfig3
-rw-r--r--arch/s390/kernel/Makefile2
-rw-r--r--arch/s390/kernel/compat_linux.c60
-rw-r--r--arch/s390/kernel/compat_signal.c14
-rw-r--r--arch/s390/kernel/dis.c1278
-rw-r--r--arch/s390/kernel/early.c7
-rw-r--r--arch/s390/kernel/entry.S87
-rw-r--r--arch/s390/kernel/entry64.S100
-rw-r--r--arch/s390/kernel/head64.S72
-rw-r--r--arch/s390/kernel/ipl.c253
-rw-r--r--arch/s390/kernel/module.c4
-rw-r--r--arch/s390/kernel/process.c82
-rw-r--r--arch/s390/kernel/setup.c38
-rw-r--r--arch/s390/kernel/signal.c10
-rw-r--r--arch/s390/kernel/smp.c369
-rw-r--r--arch/s390/kernel/sys_s390.c20
-rw-r--r--arch/s390/kernel/syscalls.S14
-rw-r--r--arch/s390/kernel/time.c34
-rw-r--r--arch/s390/kernel/traps.c72
-rw-r--r--arch/s390/kernel/vmlinux.lds.S10
-rw-r--r--arch/s390/kernel/vtime.c16
-rw-r--r--arch/s390/lib/Makefile2
-rw-r--r--arch/s390/lib/div64.c2
-rw-r--r--arch/s390/mm/fault.c331
-rw-r--r--arch/sh/lib/Makefile2
-rw-r--r--arch/sh/lib/strcasecmp.c26
-rw-r--r--arch/sparc/kernel/ebus.c14
-rw-r--r--arch/sparc/kernel/of_device.c21
-rw-r--r--arch/sparc/kernel/pcic.c4
-rw-r--r--arch/sparc/kernel/prom.c19
-rw-r--r--arch/sparc/kernel/time.c2
-rw-r--r--arch/sparc64/Kconfig15
-rw-r--r--arch/sparc64/kernel/central.c12
-rw-r--r--arch/sparc64/kernel/chmc.c4
-rw-r--r--arch/sparc64/kernel/ebus.c14
-rw-r--r--arch/sparc64/kernel/irq.c28
-rw-r--r--arch/sparc64/kernel/isa.c36
-rw-r--r--arch/sparc64/kernel/of_device.c59
-rw-r--r--arch/sparc64/kernel/pci.c599
-rw-r--r--arch/sparc64/kernel/pci_common.c806
-rw-r--r--arch/sparc64/kernel/pci_impl.h33
-rw-r--r--arch/sparc64/kernel/pci_iommu.c104
-rw-r--r--arch/sparc64/kernel/pci_psycho.c154
-rw-r--r--arch/sparc64/kernel/pci_sabre.c465
-rw-r--r--arch/sparc64/kernel/pci_schizo.c295
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c402
-rw-r--r--arch/sparc64/kernel/process.c15
-rw-r--r--arch/sparc64/kernel/prom.c39
-rw-r--r--arch/sparc64/kernel/sbus.c243
-rw-r--r--arch/sparc64/kernel/smp.c116
-rw-r--r--arch/sparc64/kernel/sparc64_ksyms.c1
-rw-r--r--arch/sparc64/kernel/time.c484
-rw-r--r--arch/sparc64/kernel/ttable.S6
-rw-r--r--arch/sparc64/mm/init.c280
-rw-r--r--arch/sparc64/solaris/misc.c3
-rw-r--r--arch/um/drivers/daemon_kern.c2
-rw-r--r--arch/um/drivers/mcast_kern.c2
-rw-r--r--arch/um/drivers/net_kern.c2
-rw-r--r--arch/um/drivers/pcap_kern.c2
-rw-r--r--arch/um/drivers/slip_kern.c2
-rw-r--r--arch/um/drivers/slirp_kern.c2
-rw-r--r--arch/um/os-Linux/drivers/ethertap_kern.c2
-rw-r--r--arch/um/os-Linux/drivers/tuntap_kern.c2
-rw-r--r--arch/xtensa/lib/Makefile2
-rw-r--r--arch/xtensa/lib/strcasecmp.c32
-rw-r--r--arch/xtensa/platform-iss/network.c2
157 files changed, 7038 insertions, 7836 deletions
diff --git a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile
index 21cf624d7329..ea098f3b629f 100644
--- a/arch/alpha/lib/Makefile
+++ b/arch/alpha/lib/Makefile
@@ -36,7 +36,6 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
36 $(ev6-y)csum_ipv6_magic.o \ 36 $(ev6-y)csum_ipv6_magic.o \
37 $(ev6-y)clear_page.o \ 37 $(ev6-y)clear_page.o \
38 $(ev6-y)copy_page.o \ 38 $(ev6-y)copy_page.o \
39 strcasecmp.o \
40 fpreg.o \ 39 fpreg.o \
41 callback_srm.o srm_puts.o srm_printk.o 40 callback_srm.o srm_puts.o srm_printk.o
42 41
diff --git a/arch/alpha/lib/strcasecmp.c b/arch/alpha/lib/strcasecmp.c
deleted file mode 100644
index 4e57a216feaf..000000000000
--- a/arch/alpha/lib/strcasecmp.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/arch/alpha/lib/strcasecmp.c
3 */
4
5#include <linux/string.h>
6
7
8/* We handle nothing here except the C locale. Since this is used in
9 only one place, on strings known to contain only 7 bit ASCII, this
10 is ok. */
11
12int strcasecmp(const char *a, const char *b)
13{
14 int ca, cb;
15
16 do {
17 ca = *a++ & 0xff;
18 cb = *b++ & 0xff;
19 if (ca >= 'A' && ca <= 'Z')
20 ca += 'a' - 'A';
21 if (cb >= 'A' && cb <= 'Z')
22 cb += 'a' - 'A';
23 } while (ca == cb && ca != '\0');
24
25 return ca - cb;
26}
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index ce4013aee59b..3ec76586877e 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -57,9 +57,6 @@ config ARCH_HAS_ILOG2_U64
57 bool 57 bool
58 default n 58 default n
59 59
60config GENERIC_BUST_SPINLOCK
61 bool
62
63config GENERIC_HWEIGHT 60config GENERIC_HWEIGHT
64 bool 61 bool
65 default y 62 default y
@@ -68,6 +65,11 @@ config GENERIC_CALIBRATE_DELAY
68 bool 65 bool
69 default y 66 default y
70 67
68config GENERIC_BUG
69 bool
70 default y
71 depends on BUG
72
71source "init/Kconfig" 73source "init/Kconfig"
72 74
73menu "System Type and features" 75menu "System Type and features"
@@ -106,6 +108,9 @@ choice
106config BOARD_ATSTK1000 108config BOARD_ATSTK1000
107 bool "ATSTK1000 evaluation board" 109 bool "ATSTK1000 evaluation board"
108 select BOARD_ATSTK1002 if CPU_AT32AP7000 110 select BOARD_ATSTK1002 if CPU_AT32AP7000
111
112config BOARD_ATNGW100
113 bool "ATNGW100 Network Gateway"
109endchoice 114endchoice
110 115
111choice 116choice
@@ -116,6 +121,8 @@ config LOADER_U_BOOT
116 bool "U-Boot (or similar) bootloader" 121 bool "U-Boot (or similar) bootloader"
117endchoice 122endchoice
118 123
124source "arch/avr32/mach-at32ap/Kconfig"
125
119config LOAD_ADDRESS 126config LOAD_ADDRESS
120 hex 127 hex
121 default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y 128 default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
index 7b842e98efed..6115fc1f0cfa 100644
--- a/arch/avr32/Makefile
+++ b/arch/avr32/Makefile
@@ -27,6 +27,7 @@ head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o
27head-y += arch/avr32/kernel/head.o 27head-y += arch/avr32/kernel/head.o
28core-$(CONFIG_PLATFORM_AT32AP) += arch/avr32/mach-at32ap/ 28core-$(CONFIG_PLATFORM_AT32AP) += arch/avr32/mach-at32ap/
29core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/ 29core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
30core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
30core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ 31core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
31core-y += arch/avr32/kernel/ 32core-y += arch/avr32/kernel/
32core-y += arch/avr32/mm/ 33core-y += arch/avr32/mm/
diff --git a/arch/avr32/boards/atngw100/Makefile b/arch/avr32/boards/atngw100/Makefile
new file mode 100644
index 000000000000..c740aa116755
--- /dev/null
+++ b/arch/avr32/boards/atngw100/Makefile
@@ -0,0 +1 @@
obj-y += setup.o flash.o
diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
new file mode 100644
index 000000000000..f9b32a8eab9b
--- /dev/null
+++ b/arch/avr32/boards/atngw100/flash.c
@@ -0,0 +1,95 @@
1/*
2 * ATNGW100 board-specific flash initialization
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15
16#include <asm/arch/smc.h>
17
18static struct smc_config flash_config __initdata = {
19 .ncs_read_setup = 0,
20 .nrd_setup = 40,
21 .ncs_write_setup = 0,
22 .nwe_setup = 10,
23
24 .ncs_read_pulse = 80,
25 .nrd_pulse = 40,
26 .ncs_write_pulse = 65,
27 .nwe_pulse = 55,
28
29 .read_cycle = 120,
30 .write_cycle = 120,
31
32 .bus_width = 2,
33 .nrd_controlled = 1,
34 .nwe_controlled = 1,
35 .byte_write = 1,
36};
37
38static struct mtd_partition flash_parts[] = {
39 {
40 .name = "u-boot",
41 .offset = 0x00000000,
42 .size = 0x00020000, /* 128 KiB */
43 .mask_flags = MTD_WRITEABLE,
44 },
45 {
46 .name = "root",
47 .offset = 0x00020000,
48 .size = 0x007d0000,
49 },
50 {
51 .name = "env",
52 .offset = 0x007f0000,
53 .size = 0x00010000,
54 .mask_flags = MTD_WRITEABLE,
55 },
56};
57
58static struct physmap_flash_data flash_data = {
59 .width = 2,
60 .nr_parts = ARRAY_SIZE(flash_parts),
61 .parts = flash_parts,
62};
63
64static struct resource flash_resource = {
65 .start = 0x00000000,
66 .end = 0x007fffff,
67 .flags = IORESOURCE_MEM,
68};
69
70static struct platform_device flash_device = {
71 .name = "physmap-flash",
72 .id = 0,
73 .resource = &flash_resource,
74 .num_resources = 1,
75 .dev = {
76 .platform_data = &flash_data,
77 },
78};
79
80/* This needs to be called after the SMC has been initialized */
81static int __init atngw100_flash_init(void)
82{
83 int ret;
84
85 ret = smc_set_configuration(0, &flash_config);
86 if (ret < 0) {
87 printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
88 return ret;
89 }
90
91 platform_device_register(&flash_device);
92
93 return 0;
94}
95device_initcall(atngw100_flash_init);
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
new file mode 100644
index 000000000000..9bc37d4f6687
--- /dev/null
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -0,0 +1,124 @@
1/*
2 * Board-specific setup code for the ATNGW100 Network Gateway
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/etherdevice.h>
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <linux/platform_device.h>
15#include <linux/types.h>
16#include <linux/spi/spi.h>
17
18#include <asm/io.h>
19#include <asm/setup.h>
20
21#include <asm/arch/at32ap7000.h>
22#include <asm/arch/board.h>
23#include <asm/arch/init.h>
24
25/* Initialized by bootloader-specific startup code. */
26struct tag *bootloader_tags __initdata;
27
28struct eth_addr {
29 u8 addr[6];
30};
31static struct eth_addr __initdata hw_addr[2];
32static struct eth_platform_data __initdata eth_data[2];
33
34static struct spi_board_info spi0_board_info[] __initdata = {
35 {
36 .modalias = "mtd_dataflash",
37 .max_speed_hz = 10000000,
38 .chip_select = 0,
39 },
40};
41
42/*
43 * The next two functions should go away as the boot loader is
44 * supposed to initialize the macb address registers with a valid
45 * ethernet address. But we need to keep it around for a while until
46 * we can be reasonably sure the boot loader does this.
47 *
48 * The phy_id is ignored as the driver will probe for it.
49 */
50static int __init parse_tag_ethernet(struct tag *tag)
51{
52 int i;
53
54 i = tag->u.ethernet.mac_index;
55 if (i < ARRAY_SIZE(hw_addr))
56 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
57 sizeof(hw_addr[i].addr));
58
59 return 0;
60}
61__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
62
63static void __init set_hw_addr(struct platform_device *pdev)
64{
65 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
66 const u8 *addr;
67 void __iomem *regs;
68 struct clk *pclk;
69
70 if (!res)
71 return;
72 if (pdev->id >= ARRAY_SIZE(hw_addr))
73 return;
74
75 addr = hw_addr[pdev->id].addr;
76 if (!is_valid_ether_addr(addr))
77 return;
78
79 /*
80 * Since this is board-specific code, we'll cheat and use the
81 * physical address directly as we happen to know that it's
82 * the same as the virtual address.
83 */
84 regs = (void __iomem __force *)res->start;
85 pclk = clk_get(&pdev->dev, "pclk");
86 if (!pclk)
87 return;
88
89 clk_enable(pclk);
90 __raw_writel((addr[3] << 24) | (addr[2] << 16)
91 | (addr[1] << 8) | addr[0], regs + 0x98);
92 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
93 clk_disable(pclk);
94 clk_put(pclk);
95}
96
97struct platform_device *at32_usart_map[1];
98unsigned int at32_nr_usarts = 1;
99
100void __init setup_board(void)
101{
102 at32_map_usart(1, 0); /* USART 1: /dev/ttyS0, DB9 */
103 at32_setup_serial_console(0);
104}
105
106static int __init atngw100_init(void)
107{
108 /*
109 * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
110 * reserve any pins for it.
111 */
112
113 at32_add_system_devices();
114
115 at32_add_device_usart(0);
116
117 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
118 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
119
120 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
121
122 return 0;
123}
124postcore_initcall(atngw100_init);
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 5974768a59e5..abe6ca203fa7 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -33,7 +33,7 @@ struct eth_addr {
33static struct eth_addr __initdata hw_addr[2]; 33static struct eth_addr __initdata hw_addr[2];
34 34
35static struct eth_platform_data __initdata eth_data[2]; 35static struct eth_platform_data __initdata eth_data[2];
36extern struct lcdc_platform_data atstk1000_fb0_data; 36static struct lcdc_platform_data atstk1000_fb0_data;
37 37
38static struct spi_board_info spi0_board_info[] __initdata = { 38static struct spi_board_info spi0_board_info[] __initdata = {
39 { 39 {
@@ -148,6 +148,8 @@ static int __init atstk1002_init(void)
148 set_hw_addr(at32_add_device_eth(0, &eth_data[0])); 148 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
149 149
150 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); 150 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
151 atstk1000_fb0_data.fbmem_start = fbmem_start;
152 atstk1000_fb0_data.fbmem_size = fbmem_size;
151 at32_add_device_lcdc(0, &atstk1000_fb0_data); 153 at32_add_device_lcdc(0, &atstk1000_fb0_data);
152 154
153 return 0; 155 return 0;
diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
index 272c011802a7..2bc4b88d7edb 100644
--- a/arch/avr32/boards/atstk1000/setup.c
+++ b/arch/avr32/boards/atstk1000/setup.c
@@ -18,33 +18,3 @@
18 18
19/* Initialized by bootloader-specific startup code. */ 19/* Initialized by bootloader-specific startup code. */
20struct tag *bootloader_tags __initdata; 20struct tag *bootloader_tags __initdata;
21
22struct lcdc_platform_data __initdata atstk1000_fb0_data;
23
24void __init board_setup_fbmem(unsigned long fbmem_start,
25 unsigned long fbmem_size)
26{
27 if (!fbmem_size)
28 return;
29
30 if (!fbmem_start) {
31 void *fbmem;
32
33 fbmem = alloc_bootmem_low_pages(fbmem_size);
34 fbmem_start = __pa(fbmem);
35 } else {
36 pg_data_t *pgdat;
37
38 for_each_online_pgdat(pgdat) {
39 if (fbmem_start >= pgdat->bdata->node_boot_start
40 && fbmem_start <= pgdat->bdata->node_low_pfn)
41 reserve_bootmem_node(pgdat, fbmem_start,
42 fbmem_size);
43 }
44 }
45
46 printk("%luKiB framebuffer memory at address 0x%08lx\n",
47 fbmem_size >> 10, fbmem_start);
48 atstk1000_fb0_data.fbmem_start = fbmem_start;
49 atstk1000_fb0_data.fbmem_size = fbmem_size;
50}
diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
new file mode 100644
index 000000000000..c254ffcfa458
--- /dev/null
+++ b/arch/avr32/configs/atngw100_defconfig
@@ -0,0 +1,1085 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21-rc6
4# Thu Apr 12 16:35:07 2007
5#
6CONFIG_AVR32=y
7CONFIG_GENERIC_GPIO=y
8CONFIG_GENERIC_HARDIRQS=y
9CONFIG_HARDIRQS_SW_RESEND=y
10CONFIG_GENERIC_IRQ_PROBE=y
11CONFIG_RWSEM_GENERIC_SPINLOCK=y
12CONFIG_GENERIC_TIME=y
13# CONFIG_ARCH_HAS_ILOG2_U32 is not set
14# CONFIG_ARCH_HAS_ILOG2_U64 is not set
15CONFIG_GENERIC_HWEIGHT=y
16CONFIG_GENERIC_CALIBRATE_DELAY=y
17CONFIG_GENERIC_BUG=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
19
20#
21# Code maturity level options
22#
23CONFIG_EXPERIMENTAL=y
24CONFIG_BROKEN_ON_SMP=y
25CONFIG_INIT_ENV_ARG_LIMIT=32
26
27#
28# General setup
29#
30CONFIG_LOCALVERSION=""
31# CONFIG_LOCALVERSION_AUTO is not set
32CONFIG_SWAP=y
33CONFIG_SYSVIPC=y
34# CONFIG_IPC_NS is not set
35CONFIG_SYSVIPC_SYSCTL=y
36CONFIG_POSIX_MQUEUE=y
37CONFIG_BSD_PROCESS_ACCT=y
38CONFIG_BSD_PROCESS_ACCT_V3=y
39# CONFIG_TASKSTATS is not set
40# CONFIG_UTS_NS is not set
41# CONFIG_AUDIT is not set
42# CONFIG_IKCONFIG is not set
43CONFIG_SYSFS_DEPRECATED=y
44# CONFIG_RELAY is not set
45CONFIG_BLK_DEV_INITRD=y
46CONFIG_INITRAMFS_SOURCE=""
47CONFIG_CC_OPTIMIZE_FOR_SIZE=y
48CONFIG_SYSCTL=y
49CONFIG_EMBEDDED=y
50# CONFIG_SYSCTL_SYSCALL is not set
51CONFIG_KALLSYMS=y
52# CONFIG_KALLSYMS_ALL is not set
53# CONFIG_KALLSYMS_EXTRA_PASS is not set
54CONFIG_HOTPLUG=y
55CONFIG_PRINTK=y
56CONFIG_BUG=y
57CONFIG_ELF_CORE=y
58# CONFIG_BASE_FULL is not set
59CONFIG_FUTEX=y
60CONFIG_EPOLL=y
61CONFIG_SHMEM=y
62CONFIG_SLAB=y
63CONFIG_VM_EVENT_COUNTERS=y
64CONFIG_RT_MUTEXES=y
65# CONFIG_TINY_SHMEM is not set
66CONFIG_BASE_SMALL=1
67# CONFIG_SLOB is not set
68
69#
70# Loadable module support
71#
72CONFIG_MODULES=y
73CONFIG_MODULE_UNLOAD=y
74CONFIG_MODULE_FORCE_UNLOAD=y
75# CONFIG_MODVERSIONS is not set
76# CONFIG_MODULE_SRCVERSION_ALL is not set
77CONFIG_KMOD=y
78
79#
80# Block layer
81#
82CONFIG_BLOCK=y
83# CONFIG_LBD is not set
84# CONFIG_BLK_DEV_IO_TRACE is not set
85# CONFIG_LSF is not set
86
87#
88# IO Schedulers
89#
90CONFIG_IOSCHED_NOOP=y
91# CONFIG_IOSCHED_AS is not set
92# CONFIG_IOSCHED_DEADLINE is not set
93CONFIG_IOSCHED_CFQ=y
94# CONFIG_DEFAULT_AS is not set
95# CONFIG_DEFAULT_DEADLINE is not set
96CONFIG_DEFAULT_CFQ=y
97# CONFIG_DEFAULT_NOOP is not set
98CONFIG_DEFAULT_IOSCHED="cfq"
99
100#
101# System Type and features
102#
103CONFIG_SUBARCH_AVR32B=y
104CONFIG_MMU=y
105CONFIG_PERFORMANCE_COUNTERS=y
106CONFIG_PLATFORM_AT32AP=y
107CONFIG_CPU_AT32AP7000=y
108# CONFIG_BOARD_ATSTK1000 is not set
109CONFIG_BOARD_ATNGW100=y
110CONFIG_LOADER_U_BOOT=y
111
112#
113# Atmel AVR32 AP options
114#
115# CONFIG_AP7000_32_BIT_SMC is not set
116CONFIG_AP7000_16_BIT_SMC=y
117# CONFIG_AP7000_8_BIT_SMC is not set
118CONFIG_LOAD_ADDRESS=0x10000000
119CONFIG_ENTRY_ADDRESS=0x90000000
120CONFIG_PHYS_OFFSET=0x10000000
121CONFIG_PREEMPT_NONE=y
122# CONFIG_PREEMPT_VOLUNTARY is not set
123# CONFIG_PREEMPT is not set
124# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
125# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
126# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
127CONFIG_ARCH_FLATMEM_ENABLE=y
128# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
129# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
130CONFIG_SELECT_MEMORY_MODEL=y
131CONFIG_FLATMEM_MANUAL=y
132# CONFIG_DISCONTIGMEM_MANUAL is not set
133# CONFIG_SPARSEMEM_MANUAL is not set
134CONFIG_FLATMEM=y
135CONFIG_FLAT_NODE_MEM_MAP=y
136# CONFIG_SPARSEMEM_STATIC is not set
137CONFIG_SPLIT_PTLOCK_CPUS=4
138# CONFIG_RESOURCES_64BIT is not set
139CONFIG_ZONE_DMA_FLAG=0
140# CONFIG_OWNERSHIP_TRACE is not set
141# CONFIG_HZ_100 is not set
142CONFIG_HZ_250=y
143# CONFIG_HZ_300 is not set
144# CONFIG_HZ_1000 is not set
145CONFIG_HZ=250
146CONFIG_CMDLINE=""
147
148#
149# Bus options
150#
151
152#
153# PCCARD (PCMCIA/CardBus) support
154#
155# CONFIG_PCCARD is not set
156
157#
158# Executable file formats
159#
160CONFIG_BINFMT_ELF=y
161# CONFIG_BINFMT_MISC is not set
162
163#
164# Networking
165#
166CONFIG_NET=y
167
168#
169# Networking options
170#
171# CONFIG_NETDEBUG is not set
172CONFIG_PACKET=y
173CONFIG_PACKET_MMAP=y
174CONFIG_UNIX=y
175CONFIG_XFRM=y
176CONFIG_XFRM_USER=y
177# CONFIG_XFRM_SUB_POLICY is not set
178# CONFIG_XFRM_MIGRATE is not set
179CONFIG_NET_KEY=y
180# CONFIG_NET_KEY_MIGRATE is not set
181CONFIG_INET=y
182CONFIG_IP_MULTICAST=y
183CONFIG_IP_ADVANCED_ROUTER=y
184CONFIG_ASK_IP_FIB_HASH=y
185# CONFIG_IP_FIB_TRIE is not set
186CONFIG_IP_FIB_HASH=y
187# CONFIG_IP_MULTIPLE_TABLES is not set
188# CONFIG_IP_ROUTE_MULTIPATH is not set
189# CONFIG_IP_ROUTE_VERBOSE is not set
190CONFIG_IP_PNP=y
191CONFIG_IP_PNP_DHCP=y
192# CONFIG_IP_PNP_BOOTP is not set
193# CONFIG_IP_PNP_RARP is not set
194# CONFIG_NET_IPIP is not set
195# CONFIG_NET_IPGRE is not set
196CONFIG_IP_MROUTE=y
197CONFIG_IP_PIMSM_V1=y
198# CONFIG_IP_PIMSM_V2 is not set
199# CONFIG_ARPD is not set
200CONFIG_SYN_COOKIES=y
201CONFIG_INET_AH=y
202CONFIG_INET_ESP=y
203CONFIG_INET_IPCOMP=y
204CONFIG_INET_XFRM_TUNNEL=y
205CONFIG_INET_TUNNEL=y
206CONFIG_INET_XFRM_MODE_TRANSPORT=y
207CONFIG_INET_XFRM_MODE_TUNNEL=y
208CONFIG_INET_XFRM_MODE_BEET=y
209CONFIG_INET_DIAG=y
210CONFIG_INET_TCP_DIAG=y
211# CONFIG_TCP_CONG_ADVANCED is not set
212CONFIG_TCP_CONG_CUBIC=y
213CONFIG_DEFAULT_TCP_CONG="cubic"
214# CONFIG_TCP_MD5SIG is not set
215
216#
217# IP: Virtual Server Configuration
218#
219# CONFIG_IP_VS is not set
220CONFIG_IPV6=y
221# CONFIG_IPV6_PRIVACY is not set
222# CONFIG_IPV6_ROUTER_PREF is not set
223CONFIG_INET6_AH=y
224CONFIG_INET6_ESP=y
225CONFIG_INET6_IPCOMP=y
226# CONFIG_IPV6_MIP6 is not set
227CONFIG_INET6_XFRM_TUNNEL=y
228CONFIG_INET6_TUNNEL=y
229CONFIG_INET6_XFRM_MODE_TRANSPORT=y
230CONFIG_INET6_XFRM_MODE_TUNNEL=y
231CONFIG_INET6_XFRM_MODE_BEET=y
232# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
233CONFIG_IPV6_SIT=y
234# CONFIG_IPV6_TUNNEL is not set
235# CONFIG_IPV6_MULTIPLE_TABLES is not set
236# CONFIG_NETWORK_SECMARK is not set
237CONFIG_NETFILTER=y
238# CONFIG_NETFILTER_DEBUG is not set
239
240#
241# Core Netfilter Configuration
242#
243# CONFIG_NETFILTER_NETLINK is not set
244CONFIG_NF_CONNTRACK_ENABLED=m
245CONFIG_NF_CONNTRACK_SUPPORT=y
246# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
247CONFIG_NF_CONNTRACK=m
248CONFIG_NF_CT_ACCT=y
249CONFIG_NF_CONNTRACK_MARK=y
250# CONFIG_NF_CONNTRACK_EVENTS is not set
251CONFIG_NF_CT_PROTO_GRE=m
252# CONFIG_NF_CT_PROTO_SCTP is not set
253CONFIG_NF_CONNTRACK_AMANDA=m
254CONFIG_NF_CONNTRACK_FTP=m
255CONFIG_NF_CONNTRACK_H323=m
256CONFIG_NF_CONNTRACK_IRC=m
257CONFIG_NF_CONNTRACK_NETBIOS_NS=m
258CONFIG_NF_CONNTRACK_PPTP=m
259CONFIG_NF_CONNTRACK_SANE=m
260CONFIG_NF_CONNTRACK_SIP=m
261CONFIG_NF_CONNTRACK_TFTP=m
262CONFIG_NETFILTER_XTABLES=y
263CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
264# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
265# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
266CONFIG_NETFILTER_XT_TARGET_MARK=m
267CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
268CONFIG_NETFILTER_XT_TARGET_NFLOG=m
269# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
270CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
271CONFIG_NETFILTER_XT_MATCH_COMMENT=m
272CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
273CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
274CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
275# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
276# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
277CONFIG_NETFILTER_XT_MATCH_ESP=m
278CONFIG_NETFILTER_XT_MATCH_HELPER=m
279CONFIG_NETFILTER_XT_MATCH_LENGTH=m
280CONFIG_NETFILTER_XT_MATCH_LIMIT=m
281CONFIG_NETFILTER_XT_MATCH_MAC=m
282CONFIG_NETFILTER_XT_MATCH_MARK=m
283CONFIG_NETFILTER_XT_MATCH_POLICY=m
284CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
285CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
286CONFIG_NETFILTER_XT_MATCH_QUOTA=m
287CONFIG_NETFILTER_XT_MATCH_REALM=m
288# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
289CONFIG_NETFILTER_XT_MATCH_STATE=m
290CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
291CONFIG_NETFILTER_XT_MATCH_STRING=m
292CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
293CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
294
295#
296# IP: Netfilter Configuration
297#
298CONFIG_NF_CONNTRACK_IPV4=m
299CONFIG_NF_CONNTRACK_PROC_COMPAT=y
300# CONFIG_IP_NF_QUEUE is not set
301CONFIG_IP_NF_IPTABLES=m
302CONFIG_IP_NF_MATCH_IPRANGE=m
303CONFIG_IP_NF_MATCH_TOS=m
304CONFIG_IP_NF_MATCH_RECENT=m
305CONFIG_IP_NF_MATCH_ECN=m
306CONFIG_IP_NF_MATCH_AH=m
307CONFIG_IP_NF_MATCH_TTL=m
308CONFIG_IP_NF_MATCH_OWNER=m
309CONFIG_IP_NF_MATCH_ADDRTYPE=m
310CONFIG_IP_NF_FILTER=m
311CONFIG_IP_NF_TARGET_REJECT=m
312CONFIG_IP_NF_TARGET_LOG=m
313# CONFIG_IP_NF_TARGET_ULOG is not set
314CONFIG_NF_NAT=m
315CONFIG_NF_NAT_NEEDED=y
316CONFIG_IP_NF_TARGET_MASQUERADE=m
317CONFIG_IP_NF_TARGET_REDIRECT=m
318CONFIG_IP_NF_TARGET_NETMAP=m
319CONFIG_IP_NF_TARGET_SAME=m
320CONFIG_NF_NAT_SNMP_BASIC=m
321CONFIG_NF_NAT_PROTO_GRE=m
322CONFIG_NF_NAT_FTP=m
323CONFIG_NF_NAT_IRC=m
324CONFIG_NF_NAT_TFTP=m
325CONFIG_NF_NAT_AMANDA=m
326CONFIG_NF_NAT_PPTP=m
327CONFIG_NF_NAT_H323=m
328CONFIG_NF_NAT_SIP=m
329CONFIG_IP_NF_MANGLE=m
330CONFIG_IP_NF_TARGET_TOS=m
331CONFIG_IP_NF_TARGET_ECN=m
332CONFIG_IP_NF_TARGET_TTL=m
333CONFIG_IP_NF_TARGET_CLUSTERIP=m
334CONFIG_IP_NF_RAW=m
335CONFIG_IP_NF_ARPTABLES=m
336CONFIG_IP_NF_ARPFILTER=m
337CONFIG_IP_NF_ARP_MANGLE=m
338
339#
340# IPv6: Netfilter Configuration (EXPERIMENTAL)
341#
342CONFIG_NF_CONNTRACK_IPV6=m
343CONFIG_IP6_NF_QUEUE=m
344CONFIG_IP6_NF_IPTABLES=m
345CONFIG_IP6_NF_MATCH_RT=m
346CONFIG_IP6_NF_MATCH_OPTS=m
347CONFIG_IP6_NF_MATCH_FRAG=m
348CONFIG_IP6_NF_MATCH_HL=m
349CONFIG_IP6_NF_MATCH_OWNER=m
350CONFIG_IP6_NF_MATCH_IPV6HEADER=m
351CONFIG_IP6_NF_MATCH_AH=m
352CONFIG_IP6_NF_MATCH_MH=m
353CONFIG_IP6_NF_MATCH_EUI64=m
354CONFIG_IP6_NF_FILTER=m
355CONFIG_IP6_NF_TARGET_LOG=m
356CONFIG_IP6_NF_TARGET_REJECT=m
357CONFIG_IP6_NF_MANGLE=m
358CONFIG_IP6_NF_TARGET_HL=m
359CONFIG_IP6_NF_RAW=m
360
361#
362# DCCP Configuration (EXPERIMENTAL)
363#
364# CONFIG_IP_DCCP is not set
365
366#
367# SCTP Configuration (EXPERIMENTAL)
368#
369# CONFIG_IP_SCTP is not set
370
371#
372# TIPC Configuration (EXPERIMENTAL)
373#
374# CONFIG_TIPC is not set
375# CONFIG_ATM is not set
376# CONFIG_BRIDGE is not set
377CONFIG_VLAN_8021Q=m
378# CONFIG_DECNET is not set
379# CONFIG_LLC2 is not set
380# CONFIG_IPX is not set
381# CONFIG_ATALK is not set
382# CONFIG_X25 is not set
383# CONFIG_LAPB is not set
384# CONFIG_ECONET is not set
385# CONFIG_WAN_ROUTER is not set
386
387#
388# QoS and/or fair queueing
389#
390# CONFIG_NET_SCHED is not set
391CONFIG_NET_CLS_ROUTE=y
392
393#
394# Network testing
395#
396# CONFIG_NET_PKTGEN is not set
397# CONFIG_HAMRADIO is not set
398# CONFIG_IRDA is not set
399# CONFIG_BT is not set
400# CONFIG_IEEE80211 is not set
401
402#
403# Device Drivers
404#
405
406#
407# Generic Driver Options
408#
409CONFIG_STANDALONE=y
410# CONFIG_PREVENT_FIRMWARE_BUILD is not set
411# CONFIG_FW_LOADER is not set
412# CONFIG_DEBUG_DRIVER is not set
413# CONFIG_DEBUG_DEVRES is not set
414# CONFIG_SYS_HYPERVISOR is not set
415
416#
417# Connector - unified userspace <-> kernelspace linker
418#
419# CONFIG_CONNECTOR is not set
420
421#
422# Memory Technology Devices (MTD)
423#
424CONFIG_MTD=y
425# CONFIG_MTD_DEBUG is not set
426# CONFIG_MTD_CONCAT is not set
427CONFIG_MTD_PARTITIONS=y
428# CONFIG_MTD_REDBOOT_PARTS is not set
429CONFIG_MTD_CMDLINE_PARTS=y
430
431#
432# User Modules And Translation Layers
433#
434CONFIG_MTD_CHAR=y
435CONFIG_MTD_BLKDEVS=y
436CONFIG_MTD_BLOCK=y
437# CONFIG_FTL is not set
438# CONFIG_NFTL is not set
439# CONFIG_INFTL is not set
440# CONFIG_RFD_FTL is not set
441# CONFIG_SSFDC is not set
442
443#
444# RAM/ROM/Flash chip drivers
445#
446CONFIG_MTD_CFI=y
447# CONFIG_MTD_JEDECPROBE is not set
448CONFIG_MTD_GEN_PROBE=y
449# CONFIG_MTD_CFI_ADV_OPTIONS is not set
450CONFIG_MTD_MAP_BANK_WIDTH_1=y
451CONFIG_MTD_MAP_BANK_WIDTH_2=y
452CONFIG_MTD_MAP_BANK_WIDTH_4=y
453# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
454# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
455# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
456CONFIG_MTD_CFI_I1=y
457CONFIG_MTD_CFI_I2=y
458# CONFIG_MTD_CFI_I4 is not set
459# CONFIG_MTD_CFI_I8 is not set
460# CONFIG_MTD_CFI_INTELEXT is not set
461CONFIG_MTD_CFI_AMDSTD=y
462# CONFIG_MTD_CFI_STAA is not set
463CONFIG_MTD_CFI_UTIL=y
464# CONFIG_MTD_RAM is not set
465# CONFIG_MTD_ROM is not set
466# CONFIG_MTD_ABSENT is not set
467# CONFIG_MTD_OBSOLETE_CHIPS is not set
468
469#
470# Mapping drivers for chip access
471#
472# CONFIG_MTD_COMPLEX_MAPPINGS is not set
473CONFIG_MTD_PHYSMAP=y
474CONFIG_MTD_PHYSMAP_START=0x80000000
475CONFIG_MTD_PHYSMAP_LEN=0x0
476CONFIG_MTD_PHYSMAP_BANKWIDTH=2
477# CONFIG_MTD_PLATRAM is not set
478
479#
480# Self-contained MTD device drivers
481#
482CONFIG_MTD_DATAFLASH=y
483# CONFIG_MTD_M25P80 is not set
484# CONFIG_MTD_SLRAM is not set
485# CONFIG_MTD_PHRAM is not set
486# CONFIG_MTD_MTDRAM is not set
487# CONFIG_MTD_BLOCK2MTD is not set
488
489#
490# Disk-On-Chip Device Drivers
491#
492# CONFIG_MTD_DOC2000 is not set
493# CONFIG_MTD_DOC2001 is not set
494# CONFIG_MTD_DOC2001PLUS is not set
495
496#
497# NAND Flash Device Drivers
498#
499# CONFIG_MTD_NAND is not set
500
501#
502# OneNAND Flash Device Drivers
503#
504# CONFIG_MTD_ONENAND is not set
505
506#
507# Parallel port support
508#
509# CONFIG_PARPORT is not set
510
511#
512# Plug and Play support
513#
514# CONFIG_PNPACPI is not set
515
516#
517# Block devices
518#
519# CONFIG_BLK_DEV_COW_COMMON is not set
520CONFIG_BLK_DEV_LOOP=m
521# CONFIG_BLK_DEV_CRYPTOLOOP is not set
522CONFIG_BLK_DEV_NBD=m
523CONFIG_BLK_DEV_RAM=m
524CONFIG_BLK_DEV_RAM_COUNT=16
525CONFIG_BLK_DEV_RAM_SIZE=4096
526CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
527# CONFIG_CDROM_PKTCDVD is not set
528# CONFIG_ATA_OVER_ETH is not set
529
530#
531# Misc devices
532#
533
534#
535# ATA/ATAPI/MFM/RLL support
536#
537# CONFIG_IDE is not set
538
539#
540# SCSI device support
541#
542# CONFIG_RAID_ATTRS is not set
543# CONFIG_SCSI is not set
544# CONFIG_SCSI_NETLINK is not set
545
546#
547# Serial ATA (prod) and Parallel ATA (experimental) drivers
548#
549# CONFIG_ATA is not set
550
551#
552# Multi-device support (RAID and LVM)
553#
554# CONFIG_MD is not set
555
556#
557# Fusion MPT device support
558#
559# CONFIG_FUSION is not set
560
561#
562# IEEE 1394 (FireWire) support
563#
564
565#
566# I2O device support
567#
568
569#
570# Network device support
571#
572CONFIG_NETDEVICES=y
573# CONFIG_DUMMY is not set
574# CONFIG_BONDING is not set
575# CONFIG_EQUALIZER is not set
576CONFIG_TUN=m
577
578#
579# PHY device support
580#
581# CONFIG_PHYLIB is not set
582
583#
584# Ethernet (10 or 100Mbit)
585#
586CONFIG_NET_ETHERNET=y
587CONFIG_MII=y
588CONFIG_MACB=y
589
590#
591# Ethernet (1000 Mbit)
592#
593
594#
595# Ethernet (10000 Mbit)
596#
597
598#
599# Token Ring devices
600#
601
602#
603# Wireless LAN (non-hamradio)
604#
605# CONFIG_NET_RADIO is not set
606
607#
608# Wan interfaces
609#
610# CONFIG_WAN is not set
611CONFIG_PPP=m
612# CONFIG_PPP_MULTILINK is not set
613CONFIG_PPP_FILTER=y
614CONFIG_PPP_ASYNC=m
615# CONFIG_PPP_SYNC_TTY is not set
616CONFIG_PPP_DEFLATE=m
617CONFIG_PPP_BSDCOMP=m
618CONFIG_PPP_MPPE=m
619CONFIG_PPPOE=m
620# CONFIG_SLIP is not set
621CONFIG_SLHC=m
622# CONFIG_SHAPER is not set
623# CONFIG_NETCONSOLE is not set
624# CONFIG_NETPOLL is not set
625# CONFIG_NET_POLL_CONTROLLER is not set
626
627#
628# ISDN subsystem
629#
630# CONFIG_ISDN is not set
631
632#
633# Telephony Support
634#
635# CONFIG_PHONE is not set
636
637#
638# Input device support
639#
640# CONFIG_INPUT is not set
641
642#
643# Hardware I/O ports
644#
645# CONFIG_SERIO is not set
646# CONFIG_GAMEPORT is not set
647
648#
649# Character devices
650#
651# CONFIG_VT is not set
652# CONFIG_SERIAL_NONSTANDARD is not set
653
654#
655# Serial drivers
656#
657# CONFIG_SERIAL_8250 is not set
658
659#
660# Non-8250 serial port support
661#
662CONFIG_SERIAL_ATMEL=y
663CONFIG_SERIAL_ATMEL_CONSOLE=y
664# CONFIG_SERIAL_ATMEL_TTYAT is not set
665CONFIG_SERIAL_CORE=y
666CONFIG_SERIAL_CORE_CONSOLE=y
667CONFIG_UNIX98_PTYS=y
668# CONFIG_LEGACY_PTYS is not set
669
670#
671# IPMI
672#
673# CONFIG_IPMI_HANDLER is not set
674
675#
676# Watchdog Cards
677#
678# CONFIG_WATCHDOG is not set
679# CONFIG_HW_RANDOM is not set
680# CONFIG_RTC is not set
681# CONFIG_GEN_RTC is not set
682# CONFIG_DTLK is not set
683# CONFIG_R3964 is not set
684# CONFIG_RAW_DRIVER is not set
685
686#
687# TPM devices
688#
689# CONFIG_TCG_TPM is not set
690
691#
692# I2C support
693#
694# CONFIG_I2C is not set
695
696#
697# SPI support
698#
699CONFIG_SPI=y
700# CONFIG_SPI_DEBUG is not set
701CONFIG_SPI_MASTER=y
702
703#
704# SPI Master Controller Drivers
705#
706CONFIG_SPI_ATMEL=y
707# CONFIG_SPI_BITBANG is not set
708
709#
710# SPI Protocol Masters
711#
712# CONFIG_SPI_AT25 is not set
713
714#
715# Dallas's 1-wire bus
716#
717# CONFIG_W1 is not set
718
719#
720# Hardware Monitoring support
721#
722# CONFIG_HWMON is not set
723# CONFIG_HWMON_VID is not set
724
725#
726# Multifunction device drivers
727#
728# CONFIG_MFD_SM501 is not set
729
730#
731# Multimedia devices
732#
733# CONFIG_VIDEO_DEV is not set
734
735#
736# Digital Video Broadcasting Devices
737#
738# CONFIG_DVB is not set
739
740#
741# Graphics support
742#
743# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
744# CONFIG_FB is not set
745
746#
747# Sound
748#
749# CONFIG_SOUND is not set
750
751#
752# USB support
753#
754# CONFIG_USB_ARCH_HAS_HCD is not set
755# CONFIG_USB_ARCH_HAS_OHCI is not set
756# CONFIG_USB_ARCH_HAS_EHCI is not set
757
758#
759# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
760#
761
762#
763# USB Gadget Support
764#
765# CONFIG_USB_GADGET is not set
766
767#
768# MMC/SD Card support
769#
770# CONFIG_MMC is not set
771
772#
773# LED devices
774#
775# CONFIG_NEW_LEDS is not set
776
777#
778# LED drivers
779#
780
781#
782# LED Triggers
783#
784
785#
786# InfiniBand support
787#
788
789#
790# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
791#
792
793#
794# Real Time Clock
795#
796# CONFIG_RTC_CLASS is not set
797
798#
799# DMA Engine support
800#
801# CONFIG_DMA_ENGINE is not set
802
803#
804# DMA Clients
805#
806
807#
808# DMA Devices
809#
810
811#
812# Auxiliary Display support
813#
814
815#
816# Virtualization
817#
818
819#
820# File systems
821#
822CONFIG_EXT2_FS=y
823# CONFIG_EXT2_FS_XATTR is not set
824# CONFIG_EXT2_FS_XIP is not set
825CONFIG_EXT3_FS=y
826# CONFIG_EXT3_FS_XATTR is not set
827# CONFIG_EXT4DEV_FS is not set
828CONFIG_JBD=y
829# CONFIG_JBD_DEBUG is not set
830# CONFIG_REISERFS_FS is not set
831# CONFIG_JFS_FS is not set
832# CONFIG_FS_POSIX_ACL is not set
833# CONFIG_XFS_FS is not set
834# CONFIG_GFS2_FS is not set
835# CONFIG_OCFS2_FS is not set
836# CONFIG_MINIX_FS is not set
837# CONFIG_ROMFS_FS is not set
838# CONFIG_INOTIFY is not set
839# CONFIG_QUOTA is not set
840# CONFIG_DNOTIFY is not set
841# CONFIG_AUTOFS_FS is not set
842# CONFIG_AUTOFS4_FS is not set
843CONFIG_FUSE_FS=m
844
845#
846# CD-ROM/DVD Filesystems
847#
848# CONFIG_ISO9660_FS is not set
849# CONFIG_UDF_FS is not set
850
851#
852# DOS/FAT/NT Filesystems
853#
854CONFIG_FAT_FS=m
855CONFIG_MSDOS_FS=m
856CONFIG_VFAT_FS=m
857CONFIG_FAT_DEFAULT_CODEPAGE=850
858CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
859# CONFIG_NTFS_FS is not set
860
861#
862# Pseudo filesystems
863#
864CONFIG_PROC_FS=y
865# CONFIG_PROC_KCORE is not set
866CONFIG_PROC_SYSCTL=y
867CONFIG_SYSFS=y
868CONFIG_TMPFS=y
869# CONFIG_TMPFS_POSIX_ACL is not set
870# CONFIG_HUGETLB_PAGE is not set
871CONFIG_RAMFS=y
872CONFIG_CONFIGFS_FS=y
873
874#
875# Miscellaneous filesystems
876#
877# CONFIG_ADFS_FS is not set
878# CONFIG_AFFS_FS is not set
879# CONFIG_HFS_FS is not set
880# CONFIG_HFSPLUS_FS is not set
881# CONFIG_BEFS_FS is not set
882# CONFIG_BFS_FS is not set
883# CONFIG_EFS_FS is not set
884CONFIG_JFFS2_FS=y
885CONFIG_JFFS2_FS_DEBUG=0
886CONFIG_JFFS2_FS_WRITEBUFFER=y
887# CONFIG_JFFS2_SUMMARY is not set
888# CONFIG_JFFS2_FS_XATTR is not set
889# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
890CONFIG_JFFS2_ZLIB=y
891CONFIG_JFFS2_RTIME=y
892# CONFIG_JFFS2_RUBIN is not set
893# CONFIG_CRAMFS is not set
894# CONFIG_VXFS_FS is not set
895# CONFIG_HPFS_FS is not set
896# CONFIG_QNX4FS_FS is not set
897# CONFIG_SYSV_FS is not set
898# CONFIG_UFS_FS is not set
899
900#
901# Network File Systems
902#
903CONFIG_NFS_FS=y
904CONFIG_NFS_V3=y
905# CONFIG_NFS_V3_ACL is not set
906# CONFIG_NFS_V4 is not set
907# CONFIG_NFS_DIRECTIO is not set
908# CONFIG_NFSD is not set
909CONFIG_ROOT_NFS=y
910CONFIG_LOCKD=y
911CONFIG_LOCKD_V4=y
912CONFIG_NFS_COMMON=y
913CONFIG_SUNRPC=y
914# CONFIG_RPCSEC_GSS_KRB5 is not set
915# CONFIG_RPCSEC_GSS_SPKM3 is not set
916CONFIG_SMB_FS=m
917# CONFIG_SMB_NLS_DEFAULT is not set
918CONFIG_CIFS=m
919# CONFIG_CIFS_STATS is not set
920# CONFIG_CIFS_WEAK_PW_HASH is not set
921# CONFIG_CIFS_XATTR is not set
922# CONFIG_CIFS_DEBUG2 is not set
923# CONFIG_CIFS_EXPERIMENTAL is not set
924# CONFIG_NCP_FS is not set
925# CONFIG_CODA_FS is not set
926# CONFIG_AFS_FS is not set
927# CONFIG_9P_FS is not set
928
929#
930# Partition Types
931#
932# CONFIG_PARTITION_ADVANCED is not set
933CONFIG_MSDOS_PARTITION=y
934
935#
936# Native Language Support
937#
938CONFIG_NLS=y
939CONFIG_NLS_DEFAULT="iso8859-1"
940# CONFIG_NLS_CODEPAGE_437 is not set
941# CONFIG_NLS_CODEPAGE_737 is not set
942# CONFIG_NLS_CODEPAGE_775 is not set
943CONFIG_NLS_CODEPAGE_850=y
944# CONFIG_NLS_CODEPAGE_852 is not set
945# CONFIG_NLS_CODEPAGE_855 is not set
946# CONFIG_NLS_CODEPAGE_857 is not set
947# CONFIG_NLS_CODEPAGE_860 is not set
948# CONFIG_NLS_CODEPAGE_861 is not set
949# CONFIG_NLS_CODEPAGE_862 is not set
950# CONFIG_NLS_CODEPAGE_863 is not set
951# CONFIG_NLS_CODEPAGE_864 is not set
952# CONFIG_NLS_CODEPAGE_865 is not set
953# CONFIG_NLS_CODEPAGE_866 is not set
954# CONFIG_NLS_CODEPAGE_869 is not set
955# CONFIG_NLS_CODEPAGE_936 is not set
956# CONFIG_NLS_CODEPAGE_950 is not set
957# CONFIG_NLS_CODEPAGE_932 is not set
958# CONFIG_NLS_CODEPAGE_949 is not set
959# CONFIG_NLS_CODEPAGE_874 is not set
960# CONFIG_NLS_ISO8859_8 is not set
961# CONFIG_NLS_CODEPAGE_1250 is not set
962# CONFIG_NLS_CODEPAGE_1251 is not set
963# CONFIG_NLS_ASCII is not set
964CONFIG_NLS_ISO8859_1=y
965# CONFIG_NLS_ISO8859_2 is not set
966# CONFIG_NLS_ISO8859_3 is not set
967# CONFIG_NLS_ISO8859_4 is not set
968# CONFIG_NLS_ISO8859_5 is not set
969# CONFIG_NLS_ISO8859_6 is not set
970# CONFIG_NLS_ISO8859_7 is not set
971# CONFIG_NLS_ISO8859_9 is not set
972# CONFIG_NLS_ISO8859_13 is not set
973# CONFIG_NLS_ISO8859_14 is not set
974# CONFIG_NLS_ISO8859_15 is not set
975# CONFIG_NLS_KOI8_R is not set
976# CONFIG_NLS_KOI8_U is not set
977CONFIG_NLS_UTF8=y
978
979#
980# Distributed Lock Manager
981#
982# CONFIG_DLM is not set
983
984#
985# Kernel hacking
986#
987CONFIG_TRACE_IRQFLAGS_SUPPORT=y
988# CONFIG_PRINTK_TIME is not set
989CONFIG_ENABLE_MUST_CHECK=y
990CONFIG_MAGIC_SYSRQ=y
991# CONFIG_UNUSED_SYMBOLS is not set
992# CONFIG_DEBUG_FS is not set
993# CONFIG_HEADERS_CHECK is not set
994CONFIG_DEBUG_KERNEL=y
995# CONFIG_DEBUG_SHIRQ is not set
996CONFIG_LOG_BUF_SHIFT=14
997CONFIG_DETECT_SOFTLOCKUP=y
998# CONFIG_SCHEDSTATS is not set
999# CONFIG_TIMER_STATS is not set
1000# CONFIG_DEBUG_SLAB is not set
1001# CONFIG_DEBUG_RT_MUTEXES is not set
1002# CONFIG_RT_MUTEX_TESTER is not set
1003# CONFIG_DEBUG_SPINLOCK is not set
1004# CONFIG_DEBUG_MUTEXES is not set
1005# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1006# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1007# CONFIG_DEBUG_KOBJECT is not set
1008CONFIG_DEBUG_BUGVERBOSE=y
1009# CONFIG_DEBUG_INFO is not set
1010# CONFIG_DEBUG_VM is not set
1011# CONFIG_DEBUG_LIST is not set
1012CONFIG_FRAME_POINTER=y
1013# CONFIG_FORCED_INLINING is not set
1014# CONFIG_RCU_TORTURE_TEST is not set
1015# CONFIG_FAULT_INJECTION is not set
1016# CONFIG_KPROBES is not set
1017
1018#
1019# Security options
1020#
1021# CONFIG_KEYS is not set
1022# CONFIG_SECURITY is not set
1023
1024#
1025# Cryptographic options
1026#
1027CONFIG_CRYPTO=y
1028CONFIG_CRYPTO_ALGAPI=y
1029CONFIG_CRYPTO_BLKCIPHER=y
1030CONFIG_CRYPTO_HASH=y
1031CONFIG_CRYPTO_MANAGER=y
1032CONFIG_CRYPTO_HMAC=y
1033# CONFIG_CRYPTO_XCBC is not set
1034# CONFIG_CRYPTO_NULL is not set
1035# CONFIG_CRYPTO_MD4 is not set
1036CONFIG_CRYPTO_MD5=y
1037CONFIG_CRYPTO_SHA1=y
1038# CONFIG_CRYPTO_SHA256 is not set
1039# CONFIG_CRYPTO_SHA512 is not set
1040# CONFIG_CRYPTO_WP512 is not set
1041# CONFIG_CRYPTO_TGR192 is not set
1042# CONFIG_CRYPTO_GF128MUL is not set
1043CONFIG_CRYPTO_ECB=m
1044CONFIG_CRYPTO_CBC=y
1045CONFIG_CRYPTO_PCBC=m
1046# CONFIG_CRYPTO_LRW is not set
1047CONFIG_CRYPTO_DES=y
1048# CONFIG_CRYPTO_FCRYPT is not set
1049# CONFIG_CRYPTO_BLOWFISH is not set
1050# CONFIG_CRYPTO_TWOFISH is not set
1051# CONFIG_CRYPTO_SERPENT is not set
1052# CONFIG_CRYPTO_AES is not set
1053# CONFIG_CRYPTO_CAST5 is not set
1054# CONFIG_CRYPTO_CAST6 is not set
1055# CONFIG_CRYPTO_TEA is not set
1056CONFIG_CRYPTO_ARC4=m
1057# CONFIG_CRYPTO_KHAZAD is not set
1058# CONFIG_CRYPTO_ANUBIS is not set
1059CONFIG_CRYPTO_DEFLATE=y
1060# CONFIG_CRYPTO_MICHAEL_MIC is not set
1061# CONFIG_CRYPTO_CRC32C is not set
1062# CONFIG_CRYPTO_CAMELLIA is not set
1063# CONFIG_CRYPTO_TEST is not set
1064
1065#
1066# Hardware crypto devices
1067#
1068
1069#
1070# Library routines
1071#
1072CONFIG_BITREVERSE=y
1073CONFIG_CRC_CCITT=m
1074# CONFIG_CRC16 is not set
1075CONFIG_CRC32=y
1076# CONFIG_LIBCRC32C is not set
1077CONFIG_ZLIB_INFLATE=y
1078CONFIG_ZLIB_DEFLATE=y
1079CONFIG_TEXTSEARCH=y
1080CONFIG_TEXTSEARCH_KMP=m
1081CONFIG_TEXTSEARCH_BM=m
1082CONFIG_TEXTSEARCH_FSM=m
1083CONFIG_PLIST=y
1084CONFIG_HAS_IOMEM=y
1085CONFIG_HAS_IOPORT=y
diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c
index 2e72fd2699df..2714cf6452b5 100644
--- a/arch/avr32/kernel/cpu.c
+++ b/arch/avr32/kernel/cpu.c
@@ -209,16 +209,17 @@ static const char *mmu_types[] = {
209void __init setup_processor(void) 209void __init setup_processor(void)
210{ 210{
211 unsigned long config0, config1; 211 unsigned long config0, config1;
212 unsigned long features;
212 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; 213 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
213 unsigned tmp; 214 unsigned tmp;
214 215
215 config0 = sysreg_read(CONFIG0); /* 0x0000013e; */ 216 config0 = sysreg_read(CONFIG0);
216 config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */ 217 config1 = sysreg_read(CONFIG1);
217 cpu_id = config0 >> 24; 218 cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
218 cpu_rev = (config0 >> 16) & 0xff; 219 cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
219 arch_id = (config0 >> 13) & 0x07; 220 arch_id = SYSREG_BFEXT(AT, config0);
220 arch_rev = (config0 >> 10) & 0x07; 221 arch_rev = SYSREG_BFEXT(AR, config0);
221 mmu_type = (config0 >> 7) & 0x03; 222 mmu_type = SYSREG_BFEXT(MMUT, config0);
222 223
223 boot_cpu_data.arch_type = arch_id; 224 boot_cpu_data.arch_type = arch_id;
224 boot_cpu_data.cpu_type = cpu_id; 225 boot_cpu_data.cpu_type = cpu_id;
@@ -226,16 +227,16 @@ void __init setup_processor(void)
226 boot_cpu_data.cpu_revision = cpu_rev; 227 boot_cpu_data.cpu_revision = cpu_rev;
227 boot_cpu_data.tlb_config = mmu_type; 228 boot_cpu_data.tlb_config = mmu_type;
228 229
229 tmp = (config1 >> 13) & 0x07; 230 tmp = SYSREG_BFEXT(ILSZ, config1);
230 if (tmp) { 231 if (tmp) {
231 boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07); 232 boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
232 boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f); 233 boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
233 boot_cpu_data.icache.linesz = 1 << (tmp + 1); 234 boot_cpu_data.icache.linesz = 1 << (tmp + 1);
234 } 235 }
235 tmp = (config1 >> 3) & 0x07; 236 tmp = SYSREG_BFEXT(DLSZ, config1);
236 if (tmp) { 237 if (tmp) {
237 boot_cpu_data.dcache.ways = 1 << (config1 & 0x07); 238 boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
238 boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f); 239 boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
239 boot_cpu_data.dcache.linesz = 1 << (tmp + 1); 240 boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
240 } 241 }
241 242
@@ -250,16 +251,39 @@ void __init setup_processor(void)
250 cpu_names[cpu_id], cpu_id, cpu_rev, 251 cpu_names[cpu_id], cpu_id, cpu_rev,
251 arch_names[arch_id], arch_rev); 252 arch_names[arch_id], arch_rev);
252 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); 253 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
254
253 printk ("CPU: features:"); 255 printk ("CPU: features:");
254 if (config0 & (1 << 6)) 256 features = 0;
255 printk(" fpu"); 257 if (config0 & SYSREG_BIT(CONFIG0_R)) {
256 if (config0 & (1 << 5)) 258 features |= AVR32_FEATURE_RMW;
257 printk(" java"); 259 printk(" rmw");
258 if (config0 & (1 << 4)) 260 }
259 printk(" perfctr"); 261 if (config0 & SYSREG_BIT(CONFIG0_D)) {
260 if (config0 & (1 << 3)) 262 features |= AVR32_FEATURE_DSP;
263 printk(" dsp");
264 }
265 if (config0 & SYSREG_BIT(CONFIG0_S)) {
266 features |= AVR32_FEATURE_SIMD;
267 printk(" simd");
268 }
269 if (config0 & SYSREG_BIT(CONFIG0_O)) {
270 features |= AVR32_FEATURE_OCD;
261 printk(" ocd"); 271 printk(" ocd");
272 }
273 if (config0 & SYSREG_BIT(CONFIG0_P)) {
274 features |= AVR32_FEATURE_PCTR;
275 printk(" perfctr");
276 }
277 if (config0 & SYSREG_BIT(CONFIG0_J)) {
278 features |= AVR32_FEATURE_JAVA;
279 printk(" java");
280 }
281 if (config0 & SYSREG_BIT(CONFIG0_F)) {
282 features |= AVR32_FEATURE_FPU;
283 printk(" fpu");
284 }
262 printk("\n"); 285 printk("\n");
286 boot_cpu_data.features = features;
263} 287}
264 288
265#ifdef CONFIG_PROC_FS 289#ifdef CONFIG_PROC_FS
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
index eeb66792bc37..42657f1703b2 100644
--- a/arch/avr32/kernel/entry-avr32b.S
+++ b/arch/avr32/kernel/entry-avr32b.S
@@ -100,55 +100,49 @@ dtlb_miss_write:
100 100
101 .global tlb_miss_common 101 .global tlb_miss_common
102tlb_miss_common: 102tlb_miss_common:
103 mfsr r0, SYSREG_PTBR 103 mfsr r0, SYSREG_TLBEAR
104 mfsr r1, SYSREG_TLBEAR 104 mfsr r1, SYSREG_PTBR
105 105
106 /* Is it the vmalloc space? */ 106 /* Is it the vmalloc space? */
107 bld r1, 31 107 bld r0, 31
108 brcs handle_vmalloc_miss 108 brcs handle_vmalloc_miss
109 109
110 /* First level lookup */ 110 /* First level lookup */
111pgtbl_lookup: 111pgtbl_lookup:
112 lsr r2, r1, PGDIR_SHIFT 112 lsr r2, r0, PGDIR_SHIFT
113 ld.w r0, r0[r2 << 2] 113 ld.w r3, r1[r2 << 2]
114 bld r0, _PAGE_BIT_PRESENT 114 bfextu r1, r0, PAGE_SHIFT, PGDIR_SHIFT - PAGE_SHIFT
115 bld r3, _PAGE_BIT_PRESENT
115 brcc page_table_not_present 116 brcc page_table_not_present
116 117
117 /* TODO: Check access rights on page table if necessary */
118
119 /* Translate to virtual address in P1. */ 118 /* Translate to virtual address in P1. */
120 andl r0, 0xf000 119 andl r3, 0xf000
121 sbr r0, 31 120 sbr r3, 31
122 121
123 /* Second level lookup */ 122 /* Second level lookup */
124 lsl r1, (32 - PGDIR_SHIFT) 123 ld.w r2, r3[r1 << 2]
125 lsr r1, (32 - PGDIR_SHIFT) + PAGE_SHIFT 124 mfsr r0, SYSREG_TLBARLO
126 add r2, r0, r1 << 2 125 bld r2, _PAGE_BIT_PRESENT
127 ld.w r1, r2[0]
128 bld r1, _PAGE_BIT_PRESENT
129 brcc page_not_present 126 brcc page_not_present
130 127
131 /* Mark the page as accessed */ 128 /* Mark the page as accessed */
132 sbr r1, _PAGE_BIT_ACCESSED 129 sbr r2, _PAGE_BIT_ACCESSED
133 st.w r2[0], r1 130 st.w r3[r1 << 2], r2
134 131
135 /* Drop software flags */ 132 /* Drop software flags */
136 andl r1, _PAGE_FLAGS_HARDWARE_MASK & 0xffff 133 andl r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
137 mtsr SYSREG_TLBELO, r1 134 mtsr SYSREG_TLBELO, r2
138 135
139 /* Figure out which entry we want to replace */ 136 /* Figure out which entry we want to replace */
140 mfsr r0, SYSREG_TLBARLO 137 mfsr r1, SYSREG_MMUCR
141 clz r2, r0 138 clz r2, r0
142 brcc 1f 139 brcc 1f
143 mov r1, -1 /* All entries have been accessed, */ 140 mov r3, -1 /* All entries have been accessed, */
144 mtsr SYSREG_TLBARLO, r1 /* so reset TLBAR */ 141 mov r2, 0 /* so start at 0 */
145 mov r2, 0 /* and start at 0 */ 142 mtsr SYSREG_TLBARLO, r3 /* and reset TLBAR */
1461: mfsr r1, SYSREG_MMUCR
147 lsl r2, 14
148 andl r1, 0x3fff, COH
149 or r1, r2
150 mtsr SYSREG_MMUCR, r1
151 143
1441: bfins r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE
145 mtsr SYSREG_MMUCR, r1
152 tlbw 146 tlbw
153 147
154 tlbmiss_restore 148 tlbmiss_restore
@@ -156,8 +150,8 @@ pgtbl_lookup:
156 150
157handle_vmalloc_miss: 151handle_vmalloc_miss:
158 /* Simply do the lookup in init's page table */ 152 /* Simply do the lookup in init's page table */
159 mov r0, lo(swapper_pg_dir) 153 mov r1, lo(swapper_pg_dir)
160 orh r0, hi(swapper_pg_dir) 154 orh r1, hi(swapper_pg_dir)
161 rjmp pgtbl_lookup 155 rjmp pgtbl_lookup
162 156
163 157
@@ -340,12 +334,34 @@ do_bus_error_read:
340do_nmi_ll: 334do_nmi_ll:
341 sub sp, 4 335 sub sp, 4
342 stmts --sp, r0-lr 336 stmts --sp, r0-lr
343 /* FIXME: Make sure RAR_NMI and RSR_NMI are pushed instead of *_EX */ 337 mfsr r9, SYSREG_RSR_NMI
344 rcall save_full_context_ex 338 mfsr r8, SYSREG_RAR_NMI
339 bfextu r0, r9, MODE_SHIFT, 3
340 brne 2f
341
3421: pushm r8, r9 /* PC and SR */
345 mfsr r12, SYSREG_ECR 343 mfsr r12, SYSREG_ECR
346 mov r11, sp 344 mov r11, sp
347 rcall do_nmi 345 rcall do_nmi
348 rjmp bad_return 346 popm r8-r9
347 mtsr SYSREG_RAR_NMI, r8
348 tst r0, r0
349 mtsr SYSREG_RSR_NMI, r9
350 brne 3f
351
352 ldmts sp++, r0-lr
353 sub sp, -4 /* skip r12_orig */
354 rete
355
3562: sub r10, sp, -(FRAME_SIZE_FULL - REG_LR)
357 stdsp sp[4], r10 /* replace saved SP */
358 rjmp 1b
359
3603: popm lr
361 sub sp, -4 /* skip sp */
362 popm r0-r12
363 sub sp, -4 /* skip r12_orig */
364 rete
349 365
350handle_address_fault: 366handle_address_fault:
351 sub sp, 4 367 sub sp, 4
@@ -630,9 +646,12 @@ irq_level\level:
630 rcall do_IRQ 646 rcall do_IRQ
631 647
632 lddsp r4, sp[REG_SR] 648 lddsp r4, sp[REG_SR]
633 andh r4, (MODE_MASK >> 16), COH 649 bfextu r4, r4, SYSREG_M0_OFFSET, 3
650 cp.w r4, MODE_SUPERVISOR >> SYSREG_M0_OFFSET
651 breq 2f
652 cp.w r4, MODE_USER >> SYSREG_M0_OFFSET
634#ifdef CONFIG_PREEMPT 653#ifdef CONFIG_PREEMPT
635 brne 2f 654 brne 3f
636#else 655#else
637 brne 1f 656 brne 1f
638#endif 657#endif
@@ -649,9 +668,18 @@ irq_level\level:
649 sub sp, -4 /* ignore r12_orig */ 668 sub sp, -4 /* ignore r12_orig */
650 rete 669 rete
651 670
6712: get_thread_info r0
672 ld.w r1, r0[TI_flags]
673 bld r1, TIF_CPU_GOING_TO_SLEEP
652#ifdef CONFIG_PREEMPT 674#ifdef CONFIG_PREEMPT
6532: 675 brcc 3f
654 get_thread_info r0 676#else
677 brcc 1b
678#endif
679 sub r1, pc, . - cpu_idle_skip_sleep
680 stdsp sp[REG_PC], r1
681#ifdef CONFIG_PREEMPT
6823: get_thread_info r0
655 ld.w r2, r0[TI_preempt_count] 683 ld.w r2, r0[TI_preempt_count]
656 cp.w r2, 0 684 cp.w r2, 0
657 brne 1b 685 brne 1b
@@ -662,12 +690,32 @@ irq_level\level:
662 bld r4, SYSREG_GM_OFFSET 690 bld r4, SYSREG_GM_OFFSET
663 brcs 1b 691 brcs 1b
664 rcall preempt_schedule_irq 692 rcall preempt_schedule_irq
665 rjmp 1b
666#endif 693#endif
694 rjmp 1b
667 .endm 695 .endm
668 696
669 .section .irq.text,"ax",@progbits 697 .section .irq.text,"ax",@progbits
670 698
699.global cpu_idle_sleep
700cpu_idle_sleep:
701 mask_interrupts
702 get_thread_info r8
703 ld.w r9, r8[TI_flags]
704 bld r9, TIF_NEED_RESCHED
705 brcs cpu_idle_enable_int_and_exit
706 sbr r9, TIF_CPU_GOING_TO_SLEEP
707 st.w r8[TI_flags], r9
708 unmask_interrupts
709 sleep 0
710cpu_idle_skip_sleep:
711 mask_interrupts
712 ld.w r9, r8[TI_flags]
713 cbr r9, TIF_CPU_GOING_TO_SLEEP
714 st.w r8[TI_flags], r9
715cpu_idle_enable_int_and_exit:
716 unmask_interrupts
717 retal r12
718
671 .global irq_level0 719 .global irq_level0
672 .global irq_level1 720 .global irq_level1
673 .global irq_level2 721 .global irq_level2
diff --git a/arch/avr32/kernel/module.c b/arch/avr32/kernel/module.c
index b599eae64576..1167fe9cf6c4 100644
--- a/arch/avr32/kernel/module.c
+++ b/arch/avr32/kernel/module.c
@@ -12,10 +12,11 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14 14
15#include <linux/moduleloader.h> 15#include <linux/bug.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/elf.h> 16#include <linux/elf.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/moduleloader.h>
19#include <linux/vmalloc.h> 20#include <linux/vmalloc.h>
20 21
21void *module_alloc(unsigned long size) 22void *module_alloc(unsigned long size)
@@ -315,10 +316,10 @@ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
315 vfree(module->arch.syminfo); 316 vfree(module->arch.syminfo);
316 module->arch.syminfo = NULL; 317 module->arch.syminfo = NULL;
317 318
318 return 0; 319 return module_bug_finalize(hdr, sechdrs, module);
319} 320}
320 321
321void module_arch_cleanup(struct module *module) 322void module_arch_cleanup(struct module *module)
322{ 323{
323 324 module_bug_cleanup(module);
324} 325}
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index 0b4325946a41..4e4181ed1c6d 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -11,6 +11,7 @@
11#include <linux/fs.h> 11#include <linux/fs.h>
12#include <linux/ptrace.h> 12#include <linux/ptrace.h>
13#include <linux/reboot.h> 13#include <linux/reboot.h>
14#include <linux/uaccess.h>
14#include <linux/unistd.h> 15#include <linux/unistd.h>
15 16
16#include <asm/sysreg.h> 17#include <asm/sysreg.h>
@@ -19,6 +20,8 @@
19void (*pm_power_off)(void) = NULL; 20void (*pm_power_off)(void) = NULL;
20EXPORT_SYMBOL(pm_power_off); 21EXPORT_SYMBOL(pm_power_off);
21 22
23extern void cpu_idle_sleep(void);
24
22/* 25/*
23 * This file handles the architecture-dependent parts of process handling.. 26 * This file handles the architecture-dependent parts of process handling..
24 */ 27 */
@@ -27,9 +30,8 @@ void cpu_idle(void)
27{ 30{
28 /* endless idle loop with no priority at all */ 31 /* endless idle loop with no priority at all */
29 while (1) { 32 while (1) {
30 /* TODO: Enter sleep mode */
31 while (!need_resched()) 33 while (!need_resched())
32 cpu_relax(); 34 cpu_idle_sleep();
33 preempt_enable_no_resched(); 35 preempt_enable_no_resched();
34 schedule(); 36 schedule();
35 preempt_disable(); 37 preempt_disable();
@@ -114,39 +116,178 @@ void release_thread(struct task_struct *dead_task)
114 /* do nothing */ 116 /* do nothing */
115} 117}
116 118
119static void dump_mem(const char *str, const char *log_lvl,
120 unsigned long bottom, unsigned long top)
121{
122 unsigned long p;
123 int i;
124
125 printk("%s%s(0x%08lx to 0x%08lx)\n", log_lvl, str, bottom, top);
126
127 for (p = bottom & ~31; p < top; ) {
128 printk("%s%04lx: ", log_lvl, p & 0xffff);
129
130 for (i = 0; i < 8; i++, p += 4) {
131 unsigned int val;
132
133 if (p < bottom || p >= top)
134 printk(" ");
135 else {
136 if (__get_user(val, (unsigned int __user *)p)) {
137 printk("\n");
138 goto out;
139 }
140 printk("%08x ", val);
141 }
142 }
143 printk("\n");
144 }
145
146out:
147 return;
148}
149
150static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
151{
152 return (p > (unsigned long)tinfo)
153 && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
154}
155
156#ifdef CONFIG_FRAME_POINTER
157static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
158 struct pt_regs *regs, const char *log_lvl)
159{
160 unsigned long lr, fp;
161 struct thread_info *tinfo;
162
163 if (regs)
164 fp = regs->r7;
165 else if (tsk == current)
166 asm("mov %0, r7" : "=r"(fp));
167 else
168 fp = tsk->thread.cpu_context.r7;
169
170 /*
171 * Walk the stack as long as the frame pointer (a) is within
172 * the kernel stack of the task, and (b) it doesn't move
173 * downwards.
174 */
175 tinfo = task_thread_info(tsk);
176 printk("%sCall trace:\n", log_lvl);
177 while (valid_stack_ptr(tinfo, fp)) {
178 unsigned long new_fp;
179
180 lr = *(unsigned long *)fp;
181#ifdef CONFIG_KALLSYMS
182 printk("%s [<%08lx>] ", log_lvl, lr);
183#else
184 printk(" [<%08lx>] ", lr);
185#endif
186 print_symbol("%s\n", lr);
187
188 new_fp = *(unsigned long *)(fp + 4);
189 if (new_fp <= fp)
190 break;
191 fp = new_fp;
192 }
193 printk("\n");
194}
195#else
196static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
197 struct pt_regs *regs, const char *log_lvl)
198{
199 unsigned long addr;
200
201 printk("%sCall trace:\n", log_lvl);
202
203 while (!kstack_end(sp)) {
204 addr = *sp++;
205 if (kernel_text_address(addr)) {
206#ifdef CONFIG_KALLSYMS
207 printk("%s [<%08lx>] ", log_lvl, addr);
208#else
209 printk(" [<%08lx>] ", addr);
210#endif
211 print_symbol("%s\n", addr);
212 }
213 }
214 printk("\n");
215}
216#endif
217
218void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
219 struct pt_regs *regs, const char *log_lvl)
220{
221 struct thread_info *tinfo;
222
223 if (sp == 0) {
224 if (tsk)
225 sp = tsk->thread.cpu_context.ksp;
226 else
227 sp = (unsigned long)&tinfo;
228 }
229 if (!tsk)
230 tsk = current;
231
232 tinfo = task_thread_info(tsk);
233
234 if (valid_stack_ptr(tinfo, sp)) {
235 dump_mem("Stack: ", log_lvl, sp,
236 THREAD_SIZE + (unsigned long)tinfo);
237 show_trace_log_lvl(tsk, (unsigned long *)sp, regs, log_lvl);
238 }
239}
240
241void show_stack(struct task_struct *tsk, unsigned long *stack)
242{
243 show_stack_log_lvl(tsk, (unsigned long)stack, NULL, "");
244}
245
246void dump_stack(void)
247{
248 unsigned long stack;
249
250 show_trace_log_lvl(current, &stack, NULL, "");
251}
252EXPORT_SYMBOL(dump_stack);
253
117static const char *cpu_modes[] = { 254static const char *cpu_modes[] = {
118 "Application", "Supervisor", "Interrupt level 0", "Interrupt level 1", 255 "Application", "Supervisor", "Interrupt level 0", "Interrupt level 1",
119 "Interrupt level 2", "Interrupt level 3", "Exception", "NMI" 256 "Interrupt level 2", "Interrupt level 3", "Exception", "NMI"
120}; 257};
121 258
122void show_regs(struct pt_regs *regs) 259void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
123{ 260{
124 unsigned long sp = regs->sp; 261 unsigned long sp = regs->sp;
125 unsigned long lr = regs->lr; 262 unsigned long lr = regs->lr;
126 unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT; 263 unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT;
127 264
128 if (!user_mode(regs)) 265 if (!user_mode(regs)) {
129 sp = (unsigned long)regs + FRAME_SIZE_FULL; 266 sp = (unsigned long)regs + FRAME_SIZE_FULL;
130 267
131 print_symbol("PC is at %s\n", instruction_pointer(regs)); 268 printk("%s", log_lvl);
132 print_symbol("LR is at %s\n", lr); 269 print_symbol("PC is at %s\n", instruction_pointer(regs));
133 printk("pc : [<%08lx>] lr : [<%08lx>] %s\n" 270 printk("%s", log_lvl);
134 "sp : %08lx r12: %08lx r11: %08lx\n", 271 print_symbol("LR is at %s\n", lr);
135 instruction_pointer(regs), 272 }
136 lr, print_tainted(), sp, regs->r12, regs->r11); 273
137 printk("r10: %08lx r9 : %08lx r8 : %08lx\n", 274 printk("%spc : [<%08lx>] lr : [<%08lx>] %s\n"
138 regs->r10, regs->r9, regs->r8); 275 "%ssp : %08lx r12: %08lx r11: %08lx\n",
139 printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", 276 log_lvl, instruction_pointer(regs), lr, print_tainted(),
140 regs->r7, regs->r6, regs->r5, regs->r4); 277 log_lvl, sp, regs->r12, regs->r11);
141 printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", 278 printk("%sr10: %08lx r9 : %08lx r8 : %08lx\n",
142 regs->r3, regs->r2, regs->r1, regs->r0); 279 log_lvl, regs->r10, regs->r9, regs->r8);
143 printk("Flags: %c%c%c%c%c\n", 280 printk("%sr7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
281 log_lvl, regs->r7, regs->r6, regs->r5, regs->r4);
282 printk("%sr3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
283 log_lvl, regs->r3, regs->r2, regs->r1, regs->r0);
284 printk("%sFlags: %c%c%c%c%c\n", log_lvl,
144 regs->sr & SR_Q ? 'Q' : 'q', 285 regs->sr & SR_Q ? 'Q' : 'q',
145 regs->sr & SR_V ? 'V' : 'v', 286 regs->sr & SR_V ? 'V' : 'v',
146 regs->sr & SR_N ? 'N' : 'n', 287 regs->sr & SR_N ? 'N' : 'n',
147 regs->sr & SR_Z ? 'Z' : 'z', 288 regs->sr & SR_Z ? 'Z' : 'z',
148 regs->sr & SR_C ? 'C' : 'c'); 289 regs->sr & SR_C ? 'C' : 'c');
149 printk("Mode bits: %c%c%c%c%c%c%c%c%c\n", 290 printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
150 regs->sr & SR_H ? 'H' : 'h', 291 regs->sr & SR_H ? 'H' : 'h',
151 regs->sr & SR_R ? 'R' : 'r', 292 regs->sr & SR_R ? 'R' : 'r',
152 regs->sr & SR_J ? 'J' : 'j', 293 regs->sr & SR_J ? 'J' : 'j',
@@ -156,9 +297,21 @@ void show_regs(struct pt_regs *regs)
156 regs->sr & SR_I1M ? '1' : '.', 297 regs->sr & SR_I1M ? '1' : '.',
157 regs->sr & SR_I0M ? '0' : '.', 298 regs->sr & SR_I0M ? '0' : '.',
158 regs->sr & SR_GM ? 'G' : 'g'); 299 regs->sr & SR_GM ? 'G' : 'g');
159 printk("CPU Mode: %s\n", cpu_modes[mode]); 300 printk("%sCPU Mode: %s\n", log_lvl, cpu_modes[mode]);
301 printk("%sProcess: %s [%d] (task: %p thread: %p)\n",
302 log_lvl, current->comm, current->pid, current,
303 task_thread_info(current));
304}
305
306void show_regs(struct pt_regs *regs)
307{
308 unsigned long sp = regs->sp;
309
310 if (!user_mode(regs))
311 sp = (unsigned long)regs + FRAME_SIZE_FULL;
160 312
161 show_trace(NULL, (unsigned long *)sp, regs); 313 show_regs_log_lvl(regs, "");
314 show_trace_log_lvl(current, (unsigned long *)sp, regs, "");
162} 315}
163EXPORT_SYMBOL(show_regs); 316EXPORT_SYMBOL(show_regs);
164 317
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
index a1a7c3c3f522..b279d66acf5f 100644
--- a/arch/avr32/kernel/setup.c
+++ b/arch/avr32/kernel/setup.c
@@ -8,12 +8,14 @@
8 8
9#include <linux/clk.h> 9#include <linux/clk.h>
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/initrd.h>
11#include <linux/sched.h> 12#include <linux/sched.h>
12#include <linux/console.h> 13#include <linux/console.h>
13#include <linux/ioport.h> 14#include <linux/ioport.h>
14#include <linux/bootmem.h> 15#include <linux/bootmem.h>
15#include <linux/fs.h> 16#include <linux/fs.h>
16#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/pfn.h>
17#include <linux/root_dev.h> 19#include <linux/root_dev.h>
18#include <linux/cpu.h> 20#include <linux/cpu.h>
19#include <linux/kernel.h> 21#include <linux/kernel.h>
@@ -30,13 +32,6 @@
30extern int root_mountflags; 32extern int root_mountflags;
31 33
32/* 34/*
33 * Bootloader-provided information about physical memory
34 */
35struct tag_mem_range *mem_phys;
36struct tag_mem_range *mem_reserved;
37struct tag_mem_range *mem_ramdisk;
38
39/*
40 * Initialize loops_per_jiffy as 5000000 (500MIPS). 35 * Initialize loops_per_jiffy as 5000000 (500MIPS).
41 * Better make it too large than too small... 36 * Better make it too large than too small...
42 */ 37 */
@@ -48,48 +43,193 @@ EXPORT_SYMBOL(boot_cpu_data);
48static char __initdata command_line[COMMAND_LINE_SIZE]; 43static char __initdata command_line[COMMAND_LINE_SIZE];
49 44
50/* 45/*
51 * Should be more than enough, but if you have a _really_ complex 46 * Standard memory resources
52 * setup, you might need to increase the size of this...
53 */ 47 */
54static struct tag_mem_range __initdata mem_range_cache[32]; 48static struct resource __initdata kernel_data = {
55static unsigned mem_range_next_free; 49 .name = "Kernel data",
50 .start = 0,
51 .end = 0,
52 .flags = IORESOURCE_MEM,
53};
54static struct resource __initdata kernel_code = {
55 .name = "Kernel code",
56 .start = 0,
57 .end = 0,
58 .flags = IORESOURCE_MEM,
59 .sibling = &kernel_data,
60};
56 61
57/* 62/*
58 * Standard memory resources 63 * Available system RAM and reserved regions as singly linked
64 * lists. These lists are traversed using the sibling pointer in
65 * struct resource and are kept sorted at all times.
59 */ 66 */
60static struct resource mem_res[] = { 67static struct resource *__initdata system_ram;
61 { 68static struct resource *__initdata reserved = &kernel_code;
62 .name = "Kernel code", 69
63 .start = 0, 70/*
64 .end = 0, 71 * We need to allocate these before the bootmem allocator is up and
65 .flags = IORESOURCE_MEM 72 * running, so we need this "cache". 32 entries are probably enough
66 }, 73 * for all but the most insanely complex systems.
67 { 74 */
68 .name = "Kernel data", 75static struct resource __initdata res_cache[32];
69 .start = 0, 76static unsigned int __initdata res_cache_next_free;
70 .end = 0, 77
71 .flags = IORESOURCE_MEM, 78static void __init resource_init(void)
72 }, 79{
73}; 80 struct resource *mem, *res;
81 struct resource *new;
82
83 kernel_code.start = __pa(init_mm.start_code);
84
85 for (mem = system_ram; mem; mem = mem->sibling) {
86 new = alloc_bootmem_low(sizeof(struct resource));
87 memcpy(new, mem, sizeof(struct resource));
88
89 new->sibling = NULL;
90 if (request_resource(&iomem_resource, new))
91 printk(KERN_WARNING "Bad RAM resource %08x-%08x\n",
92 mem->start, mem->end);
93 }
94
95 for (res = reserved; res; res = res->sibling) {
96 new = alloc_bootmem_low(sizeof(struct resource));
97 memcpy(new, res, sizeof(struct resource));
98
99 new->sibling = NULL;
100 if (insert_resource(&iomem_resource, new))
101 printk(KERN_WARNING
102 "Bad reserved resource %s (%08x-%08x)\n",
103 res->name, res->start, res->end);
104 }
105}
106
107static void __init
108add_physical_memory(resource_size_t start, resource_size_t end)
109{
110 struct resource *new, *next, **pprev;
111
112 for (pprev = &system_ram, next = system_ram; next;
113 pprev = &next->sibling, next = next->sibling) {
114 if (end < next->start)
115 break;
116 if (start <= next->end) {
117 printk(KERN_WARNING
118 "Warning: Physical memory map is broken\n");
119 printk(KERN_WARNING
120 "Warning: %08x-%08x overlaps %08x-%08x\n",
121 start, end, next->start, next->end);
122 return;
123 }
124 }
125
126 if (res_cache_next_free >= ARRAY_SIZE(res_cache)) {
127 printk(KERN_WARNING
128 "Warning: Failed to add physical memory %08x-%08x\n",
129 start, end);
130 return;
131 }
132
133 new = &res_cache[res_cache_next_free++];
134 new->start = start;
135 new->end = end;
136 new->name = "System RAM";
137 new->flags = IORESOURCE_MEM;
138
139 *pprev = new;
140}
141
142static int __init
143add_reserved_region(resource_size_t start, resource_size_t end,
144 const char *name)
145{
146 struct resource *new, *next, **pprev;
147
148 if (end < start)
149 return -EINVAL;
150
151 if (res_cache_next_free >= ARRAY_SIZE(res_cache))
152 return -ENOMEM;
153
154 for (pprev = &reserved, next = reserved; next;
155 pprev = &next->sibling, next = next->sibling) {
156 if (end < next->start)
157 break;
158 if (start <= next->end)
159 return -EBUSY;
160 }
161
162 new = &res_cache[res_cache_next_free++];
163 new->start = start;
164 new->end = end;
165 new->name = name;
166 new->flags = IORESOURCE_MEM;
167
168 *pprev = new;
169
170 return 0;
171}
172
173static unsigned long __init
174find_free_region(const struct resource *mem, resource_size_t size,
175 resource_size_t align)
176{
177 struct resource *res;
178 unsigned long target;
179
180 target = ALIGN(mem->start, align);
181 for (res = reserved; res; res = res->sibling) {
182 if ((target + size) <= res->start)
183 break;
184 if (target <= res->end)
185 target = ALIGN(res->end + 1, align);
186 }
187
188 if ((target + size) > (mem->end + 1))
189 return mem->end + 1;
190
191 return target;
192}
193
194static int __init
195alloc_reserved_region(resource_size_t *start, resource_size_t size,
196 resource_size_t align, const char *name)
197{
198 struct resource *mem;
199 resource_size_t target;
200 int ret;
201
202 for (mem = system_ram; mem; mem = mem->sibling) {
203 target = find_free_region(mem, size, align);
204 if (target <= mem->end) {
205 ret = add_reserved_region(target, target + size - 1,
206 name);
207 if (!ret)
208 *start = target;
209 return ret;
210 }
211 }
74 212
75#define kernel_code mem_res[0] 213 return -ENOMEM;
76#define kernel_data mem_res[1] 214}
77 215
78/* 216/*
79 * Early framebuffer allocation. Works as follows: 217 * Early framebuffer allocation. Works as follows:
80 * - If fbmem_size is zero, nothing will be allocated or reserved. 218 * - If fbmem_size is zero, nothing will be allocated or reserved.
81 * - If fbmem_start is zero when setup_bootmem() is called, 219 * - If fbmem_start is zero when setup_bootmem() is called,
82 * fbmem_size bytes will be allocated from the bootmem allocator. 220 * a block of fbmem_size bytes will be reserved before bootmem
221 * initialization. It will be aligned to the largest page size
222 * that fbmem_size is a multiple of.
83 * - If fbmem_start is nonzero, an area of size fbmem_size will be 223 * - If fbmem_start is nonzero, an area of size fbmem_size will be
84 * reserved at the physical address fbmem_start if necessary. If 224 * reserved at the physical address fbmem_start if possible. If
85 * the area isn't in a memory region known to the kernel, it will 225 * it collides with other reserved memory, a different block of
86 * be left alone. 226 * same size will be allocated, just as if fbmem_start was zero.
87 * 227 *
88 * Board-specific code may use these variables to set up platform data 228 * Board-specific code may use these variables to set up platform data
89 * for the framebuffer driver if fbmem_size is nonzero. 229 * for the framebuffer driver if fbmem_size is nonzero.
90 */ 230 */
91static unsigned long __initdata fbmem_start; 231resource_size_t __initdata fbmem_start;
92static unsigned long __initdata fbmem_size; 232resource_size_t __initdata fbmem_size;
93 233
94/* 234/*
95 * "fbmem=xxx[kKmM]" allocates the specified amount of boot memory for 235 * "fbmem=xxx[kKmM]" allocates the specified amount of boot memory for
@@ -103,48 +243,42 @@ static unsigned long __initdata fbmem_size;
103 */ 243 */
104static int __init early_parse_fbmem(char *p) 244static int __init early_parse_fbmem(char *p)
105{ 245{
246 int ret;
247 unsigned long align;
248
106 fbmem_size = memparse(p, &p); 249 fbmem_size = memparse(p, &p);
107 if (*p == '@') 250 if (*p == '@') {
108 fbmem_start = memparse(p, &p); 251 fbmem_start = memparse(p, &p);
109 return 0; 252 ret = add_reserved_region(fbmem_start,
110} 253 fbmem_start + fbmem_size - 1,
111early_param("fbmem", early_parse_fbmem); 254 "Framebuffer");
112 255 if (ret) {
113static inline void __init resource_init(void) 256 printk(KERN_WARNING
114{ 257 "Failed to reserve framebuffer memory\n");
115 struct tag_mem_range *region; 258 fbmem_start = 0;
116 259 }
117 kernel_code.start = __pa(init_mm.start_code); 260 }
118 kernel_code.end = __pa(init_mm.end_code - 1);
119 kernel_data.start = __pa(init_mm.end_code);
120 kernel_data.end = __pa(init_mm.brk - 1);
121
122 for (region = mem_phys; region; region = region->next) {
123 struct resource *res;
124 unsigned long phys_start, phys_end;
125
126 if (region->size == 0)
127 continue;
128
129 phys_start = region->addr;
130 phys_end = phys_start + region->size - 1;
131
132 res = alloc_bootmem_low(sizeof(*res));
133 res->name = "System RAM";
134 res->start = phys_start;
135 res->end = phys_end;
136 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
137
138 request_resource (&iomem_resource, res);
139 261
140 if (kernel_code.start >= res->start && 262 if (!fbmem_start) {
141 kernel_code.end <= res->end) 263 if ((fbmem_size & 0x000fffffUL) == 0)
142 request_resource (res, &kernel_code); 264 align = 0x100000; /* 1 MiB */
143 if (kernel_data.start >= res->start && 265 else if ((fbmem_size & 0x0000ffffUL) == 0)
144 kernel_data.end <= res->end) 266 align = 0x10000; /* 64 KiB */
145 request_resource (res, &kernel_data); 267 else
268 align = 0x1000; /* 4 KiB */
269
270 ret = alloc_reserved_region(&fbmem_start, fbmem_size,
271 align, "Framebuffer");
272 if (ret) {
273 printk(KERN_WARNING
274 "Failed to allocate framebuffer memory\n");
275 fbmem_size = 0;
276 }
146 } 277 }
278
279 return 0;
147} 280}
281early_param("fbmem", early_parse_fbmem);
148 282
149static int __init parse_tag_core(struct tag *tag) 283static int __init parse_tag_core(struct tag *tag)
150{ 284{
@@ -157,11 +291,9 @@ static int __init parse_tag_core(struct tag *tag)
157} 291}
158__tagtable(ATAG_CORE, parse_tag_core); 292__tagtable(ATAG_CORE, parse_tag_core);
159 293
160static int __init parse_tag_mem_range(struct tag *tag, 294static int __init parse_tag_mem(struct tag *tag)
161 struct tag_mem_range **root)
162{ 295{
163 struct tag_mem_range *cur, **pprev; 296 unsigned long start, end;
164 struct tag_mem_range *new;
165 297
166 /* 298 /*
167 * Ignore zero-sized entries. If we're running standalone, the 299 * Ignore zero-sized entries. If we're running standalone, the
@@ -171,34 +303,53 @@ static int __init parse_tag_mem_range(struct tag *tag,
171 if (tag->u.mem_range.size == 0) 303 if (tag->u.mem_range.size == 0)
172 return 0; 304 return 0;
173 305
174 /* 306 start = tag->u.mem_range.addr;
175 * Copy the data so the bootmem init code doesn't need to care 307 end = tag->u.mem_range.addr + tag->u.mem_range.size - 1;
176 * about it. 308
177 */ 309 add_physical_memory(start, end);
178 if (mem_range_next_free >= ARRAY_SIZE(mem_range_cache)) 310 return 0;
179 panic("Physical memory map too complex!\n"); 311}
312__tagtable(ATAG_MEM, parse_tag_mem);
313
314static int __init parse_tag_rdimg(struct tag *tag)
315{
316#ifdef CONFIG_INITRD
317 struct tag_mem_range *mem = &tag->u.mem_range;
318 int ret;
180 319
181 new = &mem_range_cache[mem_range_next_free++]; 320 if (initrd_start) {
182 *new = tag->u.mem_range; 321 printk(KERN_WARNING
322 "Warning: Only the first initrd image will be used\n");
323 return 0;
324 }
183 325
184 pprev = root; 326 ret = add_reserved_region(mem->start, mem->start + mem->size - 1,
185 cur = *root; 327 "initrd");
186 while (cur) { 328 if (ret) {
187 pprev = &cur->next; 329 printk(KERN_WARNING
188 cur = cur->next; 330 "Warning: Failed to reserve initrd memory\n");
331 return ret;
189 } 332 }
190 333
191 *pprev = new; 334 initrd_start = (unsigned long)__va(mem->addr);
192 new->next = NULL; 335 initrd_end = initrd_start + mem->size;
336#else
337 printk(KERN_WARNING "RAM disk image present, but "
338 "no initrd support in kernel, ignoring\n");
339#endif
193 340
194 return 0; 341 return 0;
195} 342}
343__tagtable(ATAG_RDIMG, parse_tag_rdimg);
196 344
197static int __init parse_tag_mem(struct tag *tag) 345static int __init parse_tag_rsvd_mem(struct tag *tag)
198{ 346{
199 return parse_tag_mem_range(tag, &mem_phys); 347 struct tag_mem_range *mem = &tag->u.mem_range;
348
349 return add_reserved_region(mem->addr, mem->addr + mem->size - 1,
350 "Reserved");
200} 351}
201__tagtable(ATAG_MEM, parse_tag_mem); 352__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
202 353
203static int __init parse_tag_cmdline(struct tag *tag) 354static int __init parse_tag_cmdline(struct tag *tag)
204{ 355{
@@ -207,12 +358,6 @@ static int __init parse_tag_cmdline(struct tag *tag)
207} 358}
208__tagtable(ATAG_CMDLINE, parse_tag_cmdline); 359__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
209 360
210static int __init parse_tag_rdimg(struct tag *tag)
211{
212 return parse_tag_mem_range(tag, &mem_ramdisk);
213}
214__tagtable(ATAG_RDIMG, parse_tag_rdimg);
215
216static int __init parse_tag_clock(struct tag *tag) 361static int __init parse_tag_clock(struct tag *tag)
217{ 362{
218 /* 363 /*
@@ -223,12 +368,6 @@ static int __init parse_tag_clock(struct tag *tag)
223} 368}
224__tagtable(ATAG_CLOCK, parse_tag_clock); 369__tagtable(ATAG_CLOCK, parse_tag_clock);
225 370
226static int __init parse_tag_rsvd_mem(struct tag *tag)
227{
228 return parse_tag_mem_range(tag, &mem_reserved);
229}
230__tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem);
231
232/* 371/*
233 * Scan the tag table for this tag, and call its parse function. The 372 * Scan the tag table for this tag, and call its parse function. The
234 * tag table is built by the linker from all the __tagtable 373 * tag table is built by the linker from all the __tagtable
@@ -260,10 +399,137 @@ static void __init parse_tags(struct tag *t)
260 t->hdr.tag); 399 t->hdr.tag);
261} 400}
262 401
402/*
403 * Find a free memory region large enough for storing the
404 * bootmem bitmap.
405 */
406static unsigned long __init
407find_bootmap_pfn(const struct resource *mem)
408{
409 unsigned long bootmap_pages, bootmap_len;
410 unsigned long node_pages = PFN_UP(mem->end - mem->start + 1);
411 unsigned long bootmap_start;
412
413 bootmap_pages = bootmem_bootmap_pages(node_pages);
414 bootmap_len = bootmap_pages << PAGE_SHIFT;
415
416 /*
417 * Find a large enough region without reserved pages for
418 * storing the bootmem bitmap. We can take advantage of the
419 * fact that all lists have been sorted.
420 *
421 * We have to check that we don't collide with any reserved
422 * regions, which includes the kernel image and any RAMDISK
423 * images.
424 */
425 bootmap_start = find_free_region(mem, bootmap_len, PAGE_SIZE);
426
427 return bootmap_start >> PAGE_SHIFT;
428}
429
430#define MAX_LOWMEM HIGHMEM_START
431#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
432
433static void __init setup_bootmem(void)
434{
435 unsigned bootmap_size;
436 unsigned long first_pfn, bootmap_pfn, pages;
437 unsigned long max_pfn, max_low_pfn;
438 unsigned node = 0;
439 struct resource *res;
440
441 printk(KERN_INFO "Physical memory:\n");
442 for (res = system_ram; res; res = res->sibling)
443 printk(" %08x-%08x\n", res->start, res->end);
444 printk(KERN_INFO "Reserved memory:\n");
445 for (res = reserved; res; res = res->sibling)
446 printk(" %08x-%08x: %s\n",
447 res->start, res->end, res->name);
448
449 nodes_clear(node_online_map);
450
451 if (system_ram->sibling)
452 printk(KERN_WARNING "Only using first memory bank\n");
453
454 for (res = system_ram; res; res = NULL) {
455 first_pfn = PFN_UP(res->start);
456 max_low_pfn = max_pfn = PFN_DOWN(res->end + 1);
457 bootmap_pfn = find_bootmap_pfn(res);
458 if (bootmap_pfn > max_pfn)
459 panic("No space for bootmem bitmap!\n");
460
461 if (max_low_pfn > MAX_LOWMEM_PFN) {
462 max_low_pfn = MAX_LOWMEM_PFN;
463#ifndef CONFIG_HIGHMEM
464 /*
465 * Lowmem is memory that can be addressed
466 * directly through P1/P2
467 */
468 printk(KERN_WARNING
469 "Node %u: Only %ld MiB of memory will be used.\n",
470 node, MAX_LOWMEM >> 20);
471 printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
472#else
473#error HIGHMEM is not supported by AVR32 yet
474#endif
475 }
476
477 /* Initialize the boot-time allocator with low memory only. */
478 bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
479 first_pfn, max_low_pfn);
480
481 /*
482 * Register fully available RAM pages with the bootmem
483 * allocator.
484 */
485 pages = max_low_pfn - first_pfn;
486 free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
487 PFN_PHYS(pages));
488
489 /* Reserve space for the bootmem bitmap... */
490 reserve_bootmem_node(NODE_DATA(node),
491 PFN_PHYS(bootmap_pfn),
492 bootmap_size);
493
494 /* ...and any other reserved regions. */
495 for (res = reserved; res; res = res->sibling) {
496 if (res->start > PFN_PHYS(max_pfn))
497 break;
498
499 /*
500 * resource_init will complain about partial
501 * overlaps, so we'll just ignore such
502 * resources for now.
503 */
504 if (res->start >= PFN_PHYS(first_pfn)
505 && res->end < PFN_PHYS(max_pfn))
506 reserve_bootmem_node(
507 NODE_DATA(node), res->start,
508 res->end - res->start + 1);
509 }
510
511 node_set_online(node);
512 }
513}
514
263void __init setup_arch (char **cmdline_p) 515void __init setup_arch (char **cmdline_p)
264{ 516{
265 struct clk *cpu_clk; 517 struct clk *cpu_clk;
266 518
519 init_mm.start_code = (unsigned long)_text;
520 init_mm.end_code = (unsigned long)_etext;
521 init_mm.end_data = (unsigned long)_edata;
522 init_mm.brk = (unsigned long)_end;
523
524 /*
525 * Include .init section to make allocations easier. It will
526 * be removed before the resource is actually requested.
527 */
528 kernel_code.start = __pa(__init_begin);
529 kernel_code.end = __pa(init_mm.end_code - 1);
530 kernel_data.start = __pa(init_mm.end_code);
531 kernel_data.end = __pa(init_mm.brk - 1);
532
267 parse_tags(bootloader_tags); 533 parse_tags(bootloader_tags);
268 534
269 setup_processor(); 535 setup_processor();
@@ -289,24 +555,16 @@ void __init setup_arch (char **cmdline_p)
289 ((cpu_hz + 500) / 1000) % 1000); 555 ((cpu_hz + 500) / 1000) % 1000);
290 } 556 }
291 557
292 init_mm.start_code = (unsigned long) &_text;
293 init_mm.end_code = (unsigned long) &_etext;
294 init_mm.end_data = (unsigned long) &_edata;
295 init_mm.brk = (unsigned long) &_end;
296
297 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); 558 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
298 *cmdline_p = command_line; 559 *cmdline_p = command_line;
299 parse_early_param(); 560 parse_early_param();
300 561
301 setup_bootmem(); 562 setup_bootmem();
302 563
303 board_setup_fbmem(fbmem_start, fbmem_size);
304
305#ifdef CONFIG_VT 564#ifdef CONFIG_VT
306 conswitchp = &dummy_con; 565 conswitchp = &dummy_con;
307#endif 566#endif
308 567
309 paging_init(); 568 paging_init();
310
311 resource_init(); 569 resource_init();
312} 570}
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index c10833f2ee0c..7014a3571ec0 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2004-2006 Atmel Corporation 2 * Copyright (C) 2004-2007 Atmel Corporation
3 * 3 *
4 * Based on MIPS implementation arch/mips/kernel/time.c 4 * Based on MIPS implementation arch/mips/kernel/time.c
5 * Copyright 2001 MontaVista Software Inc. 5 * Copyright 2001 MontaVista Software Inc.
@@ -20,18 +20,25 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/profile.h> 21#include <linux/profile.h>
22#include <linux/sysdev.h> 22#include <linux/sysdev.h>
23#include <linux/err.h>
23 24
24#include <asm/div64.h> 25#include <asm/div64.h>
25#include <asm/sysreg.h> 26#include <asm/sysreg.h>
26#include <asm/io.h> 27#include <asm/io.h>
27#include <asm/sections.h> 28#include <asm/sections.h>
28 29
29static cycle_t read_cycle_count(void) 30/* how many counter cycles in a jiffy? */
31static u32 cycles_per_jiffy;
32
33/* the count value for the next timer interrupt */
34static u32 expirelo;
35
36cycle_t __weak read_cycle_count(void)
30{ 37{
31 return (cycle_t)sysreg_read(COUNT); 38 return (cycle_t)sysreg_read(COUNT);
32} 39}
33 40
34static struct clocksource clocksource_avr32 = { 41struct clocksource __weak clocksource_avr32 = {
35 .name = "avr32", 42 .name = "avr32",
36 .rating = 350, 43 .rating = 350,
37 .read = read_cycle_count, 44 .read = read_cycle_count,
@@ -40,12 +47,20 @@ static struct clocksource clocksource_avr32 = {
40 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 47 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
41}; 48};
42 49
50irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
51
52struct irqaction timer_irqaction = {
53 .handler = timer_interrupt,
54 .flags = IRQF_DISABLED,
55 .name = "timer",
56};
57
43/* 58/*
44 * By default we provide the null RTC ops 59 * By default we provide the null RTC ops
45 */ 60 */
46static unsigned long null_rtc_get_time(void) 61static unsigned long null_rtc_get_time(void)
47{ 62{
48 return mktime(2004, 1, 1, 0, 0, 0); 63 return mktime(2007, 1, 1, 0, 0, 0);
49} 64}
50 65
51static int null_rtc_set_time(unsigned long sec) 66static int null_rtc_set_time(unsigned long sec)
@@ -56,23 +71,14 @@ static int null_rtc_set_time(unsigned long sec)
56static unsigned long (*rtc_get_time)(void) = null_rtc_get_time; 71static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
57static int (*rtc_set_time)(unsigned long) = null_rtc_set_time; 72static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
58 73
59/* how many counter cycles in a jiffy? */
60static unsigned long cycles_per_jiffy;
61
62/* cycle counter value at the previous timer interrupt */
63static unsigned int timerhi, timerlo;
64
65/* the count value for the next timer interrupt */
66static unsigned int expirelo;
67
68static void avr32_timer_ack(void) 74static void avr32_timer_ack(void)
69{ 75{
70 unsigned int count; 76 u32 count;
71 77
72 /* Ack this timer interrupt and set the next one */ 78 /* Ack this timer interrupt and set the next one */
73 expirelo += cycles_per_jiffy; 79 expirelo += cycles_per_jiffy;
80 /* setting COMPARE to 0 stops the COUNT-COMPARE */
74 if (expirelo == 0) { 81 if (expirelo == 0) {
75 printk(KERN_DEBUG "expirelo == 0\n");
76 sysreg_write(COMPARE, expirelo + 1); 82 sysreg_write(COMPARE, expirelo + 1);
77 } else { 83 } else {
78 sysreg_write(COMPARE, expirelo); 84 sysreg_write(COMPARE, expirelo);
@@ -86,27 +92,56 @@ static void avr32_timer_ack(void)
86 } 92 }
87} 93}
88 94
89static unsigned int avr32_hpt_read(void) 95int __weak avr32_hpt_init(void)
90{ 96{
91 return sysreg_read(COUNT); 97 int ret;
98 unsigned long mult, shift, count_hz;
99
100 count_hz = clk_get_rate(boot_cpu_data.clk);
101 shift = clocksource_avr32.shift;
102 mult = clocksource_hz2mult(count_hz, shift);
103 clocksource_avr32.mult = mult;
104
105 {
106 u64 tmp;
107
108 tmp = TICK_NSEC;
109 tmp <<= shift;
110 tmp += mult / 2;
111 do_div(tmp, mult);
112
113 cycles_per_jiffy = tmp;
114 }
115
116 ret = setup_irq(0, &timer_irqaction);
117 if (ret) {
118 pr_debug("timer: could not request IRQ 0: %d\n", ret);
119 return -ENODEV;
120 }
121
122 printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
123 "%lu.%03lu MHz\n",
124 ((count_hz + 500) / 1000) / 1000,
125 ((count_hz + 500) / 1000) % 1000);
126
127 return 0;
92} 128}
93 129
94/* 130/*
95 * Taken from MIPS c0_hpt_timer_init(). 131 * Taken from MIPS c0_hpt_timer_init().
96 * 132 *
97 * Why is it so complicated, and what is "count"? My assumption is 133 * The reason COUNT is written twice is probably to make sure we don't get any
98 * that `count' specifies the "reference cycle", i.e. the cycle since 134 * timer interrupts while we are messing with the counter.
99 * reset that should mean "zero". The reason COUNT is written twice is
100 * probably to make sure we don't get any timer interrupts while we
101 * are messing with the counter.
102 */ 135 */
103static void avr32_hpt_init(unsigned int count) 136int __weak avr32_hpt_start(void)
104{ 137{
105 count = sysreg_read(COUNT) - count; 138 u32 count = sysreg_read(COUNT);
106 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy; 139 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
107 sysreg_write(COUNT, expirelo - cycles_per_jiffy); 140 sysreg_write(COUNT, expirelo - cycles_per_jiffy);
108 sysreg_write(COMPARE, expirelo); 141 sysreg_write(COMPARE, expirelo);
109 sysreg_write(COUNT, count); 142 sysreg_write(COUNT, count);
143
144 return 0;
110} 145}
111 146
112/* 147/*
@@ -115,26 +150,18 @@ static void avr32_hpt_init(unsigned int count)
115 * 150 *
116 * In UP mode, it is invoked from the (global) timer_interrupt. 151 * In UP mode, it is invoked from the (global) timer_interrupt.
117 */ 152 */
118static void local_timer_interrupt(int irq, void *dev_id) 153void local_timer_interrupt(int irq, void *dev_id)
119{ 154{
120 if (current->pid) 155 if (current->pid)
121 profile_tick(CPU_PROFILING); 156 profile_tick(CPU_PROFILING);
122 update_process_times(user_mode(get_irq_regs())); 157 update_process_times(user_mode(get_irq_regs()));
123} 158}
124 159
125static irqreturn_t 160irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
126timer_interrupt(int irq, void *dev_id)
127{ 161{
128 unsigned int count;
129
130 /* ack timer interrupt and try to set next interrupt */ 162 /* ack timer interrupt and try to set next interrupt */
131 count = avr32_hpt_read();
132 avr32_timer_ack(); 163 avr32_timer_ack();
133 164
134 /* Update timerhi/timerlo for intra-jiffy calibration */
135 timerhi += count < timerlo; /* Wrap around */
136 timerlo = count;
137
138 /* 165 /*
139 * Call the generic timer interrupt handler 166 * Call the generic timer interrupt handler
140 */ 167 */
@@ -153,60 +180,37 @@ timer_interrupt(int irq, void *dev_id)
153 return IRQ_HANDLED; 180 return IRQ_HANDLED;
154} 181}
155 182
156static struct irqaction timer_irqaction = {
157 .handler = timer_interrupt,
158 .flags = IRQF_DISABLED,
159 .name = "timer",
160};
161
162void __init time_init(void) 183void __init time_init(void)
163{ 184{
164 unsigned long mult, shift, count_hz;
165 int ret; 185 int ret;
166 186
187 /*
188 * Make sure we don't get any COMPARE interrupts before we can
189 * handle them.
190 */
191 sysreg_write(COMPARE, 0);
192
167 xtime.tv_sec = rtc_get_time(); 193 xtime.tv_sec = rtc_get_time();
168 xtime.tv_nsec = 0; 194 xtime.tv_nsec = 0;
169 195
170 set_normalized_timespec(&wall_to_monotonic, 196 set_normalized_timespec(&wall_to_monotonic,
171 -xtime.tv_sec, -xtime.tv_nsec); 197 -xtime.tv_sec, -xtime.tv_nsec);
172 198
173 printk("Before time_init: count=%08lx, compare=%08lx\n", 199 ret = avr32_hpt_init();
174 (unsigned long)sysreg_read(COUNT), 200 if (ret) {
175 (unsigned long)sysreg_read(COMPARE)); 201 pr_debug("timer: failed setup: %d\n", ret);
176 202 return;
177 count_hz = clk_get_rate(boot_cpu_data.clk);
178 shift = clocksource_avr32.shift;
179 mult = clocksource_hz2mult(count_hz, shift);
180 clocksource_avr32.mult = mult;
181
182 printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift);
183
184 {
185 u64 tmp;
186
187 tmp = TICK_NSEC;
188 tmp <<= shift;
189 tmp += mult / 2;
190 do_div(tmp, mult);
191
192 cycles_per_jiffy = tmp;
193 } 203 }
194 204
195 /* This sets up the high precision timer for the first interrupt. */
196 avr32_hpt_init(avr32_hpt_read());
197
198 printk("After time_init: count=%08lx, compare=%08lx\n",
199 (unsigned long)sysreg_read(COUNT),
200 (unsigned long)sysreg_read(COMPARE));
201
202 ret = clocksource_register(&clocksource_avr32); 205 ret = clocksource_register(&clocksource_avr32);
203 if (ret) 206 if (ret)
204 printk(KERN_ERR 207 pr_debug("timer: could not register clocksource: %d\n", ret);
205 "timer: could not register clocksource: %d\n", ret);
206 208
207 ret = setup_irq(0, &timer_irqaction); 209 ret = avr32_hpt_start();
208 if (ret) 210 if (ret) {
209 printk("timer: could not request IRQ 0: %d\n", ret); 211 pr_debug("timer: failed starting: %d\n", ret);
212 return;
213 }
210} 214}
211 215
212static struct sysdev_class timer_class = { 216static struct sysdev_class timer_class = {
diff --git a/arch/avr32/kernel/traps.c b/arch/avr32/kernel/traps.c
index adc01a12d154..4f0382d8483f 100644
--- a/arch/avr32/kernel/traps.c
+++ b/arch/avr32/kernel/traps.c
@@ -5,158 +5,25 @@
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8#undef DEBUG 8
9#include <linux/sched.h> 9#include <linux/bug.h>
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/kallsyms.h> 11#include <linux/kallsyms.h>
12#include <linux/module.h>
13#include <linux/notifier.h> 13#include <linux/notifier.h>
14#include <linux/sched.h>
15#include <linux/uaccess.h>
14 16
15#include <asm/traps.h>
16#include <asm/sysreg.h>
17#include <asm/addrspace.h> 17#include <asm/addrspace.h>
18#include <asm/ocd.h>
19#include <asm/mmu_context.h> 18#include <asm/mmu_context.h>
20#include <asm/uaccess.h> 19#include <asm/ocd.h>
21 20#include <asm/sysreg.h>
22static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 21#include <asm/traps.h>
23{
24 unsigned long p;
25 int i;
26
27 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
28
29 for (p = bottom & ~31; p < top; ) {
30 printk("%04lx: ", p & 0xffff);
31
32 for (i = 0; i < 8; i++, p += 4) {
33 unsigned int val;
34
35 if (p < bottom || p >= top)
36 printk(" ");
37 else {
38 if (__get_user(val, (unsigned int __user *)p)) {
39 printk("\n");
40 goto out;
41 }
42 printk("%08x ", val);
43 }
44 }
45 printk("\n");
46 }
47
48out:
49 return;
50}
51
52static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
53{
54 return (p > (unsigned long)tinfo)
55 && (p < (unsigned long)tinfo + THREAD_SIZE - 3);
56}
57
58#ifdef CONFIG_FRAME_POINTER
59static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
60 struct pt_regs *regs)
61{
62 unsigned long lr, fp;
63 struct thread_info *tinfo;
64
65 tinfo = (struct thread_info *)
66 ((unsigned long)sp & ~(THREAD_SIZE - 1));
67
68 if (regs)
69 fp = regs->r7;
70 else if (tsk == current)
71 asm("mov %0, r7" : "=r"(fp));
72 else
73 fp = tsk->thread.cpu_context.r7;
74
75 /*
76 * Walk the stack as long as the frame pointer (a) is within
77 * the kernel stack of the task, and (b) it doesn't move
78 * downwards.
79 */
80 while (valid_stack_ptr(tinfo, fp)) {
81 unsigned long new_fp;
82
83 lr = *(unsigned long *)fp;
84 printk(" [<%08lx>] ", lr);
85 print_symbol("%s\n", lr);
86
87 new_fp = *(unsigned long *)(fp + 4);
88 if (new_fp <= fp)
89 break;
90 fp = new_fp;
91 }
92 printk("\n");
93}
94#else
95static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
96 struct pt_regs *regs)
97{
98 unsigned long addr;
99
100 while (!kstack_end(sp)) {
101 addr = *sp++;
102 if (kernel_text_address(addr)) {
103 printk(" [<%08lx>] ", addr);
104 print_symbol("%s\n", addr);
105 }
106 }
107}
108#endif
109
110void show_trace(struct task_struct *tsk, unsigned long *sp,
111 struct pt_regs *regs)
112{
113 if (regs &&
114 (((regs->sr & MODE_MASK) == MODE_EXCEPTION) ||
115 ((regs->sr & MODE_MASK) == MODE_USER)))
116 return;
117
118 printk ("Call trace:");
119#ifdef CONFIG_KALLSYMS
120 printk("\n");
121#endif
122
123 __show_trace(tsk, sp, regs);
124 printk("\n");
125}
126
127void show_stack(struct task_struct *tsk, unsigned long *sp)
128{
129 unsigned long stack;
130
131 if (!tsk)
132 tsk = current;
133 if (sp == 0) {
134 if (tsk == current) {
135 register unsigned long *real_sp __asm__("sp");
136 sp = real_sp;
137 } else {
138 sp = (unsigned long *)tsk->thread.cpu_context.ksp;
139 }
140 }
141
142 stack = (unsigned long)sp;
143 dump_mem("Stack: ", stack,
144 THREAD_SIZE + (unsigned long)tsk->thread_info);
145 show_trace(tsk, sp, NULL);
146}
147
148void dump_stack(void)
149{
150 show_stack(NULL, NULL);
151}
152EXPORT_SYMBOL(dump_stack);
153 22
154ATOMIC_NOTIFIER_HEAD(avr32_die_chain); 23ATOMIC_NOTIFIER_HEAD(avr32_die_chain);
155 24
156int register_die_notifier(struct notifier_block *nb) 25int register_die_notifier(struct notifier_block *nb)
157{ 26{
158 pr_debug("register_die_notifier: %p\n", nb);
159
160 return atomic_notifier_chain_register(&avr32_die_chain, nb); 27 return atomic_notifier_chain_register(&avr32_die_chain, nb);
161} 28}
162EXPORT_SYMBOL(register_die_notifier); 29EXPORT_SYMBOL(register_die_notifier);
@@ -169,93 +36,103 @@ EXPORT_SYMBOL(unregister_die_notifier);
169 36
170static DEFINE_SPINLOCK(die_lock); 37static DEFINE_SPINLOCK(die_lock);
171 38
172void __die(const char *str, struct pt_regs *regs, unsigned long err, 39void NORET_TYPE die(const char *str, struct pt_regs *regs, long err)
173 const char *file, const char *func, unsigned long line)
174{ 40{
175 struct task_struct *tsk = current;
176 static int die_counter; 41 static int die_counter;
177 42
178 console_verbose(); 43 console_verbose();
179 spin_lock_irq(&die_lock); 44 spin_lock_irq(&die_lock);
180 bust_spinlocks(1); 45 bust_spinlocks(1);
181 46
182 printk(KERN_ALERT "%s", str); 47 printk(KERN_ALERT "Oops: %s, sig: %ld [#%d]\n" KERN_EMERG,
183 if (file && func) 48 str, err, ++die_counter);
184 printk(" in %s:%s, line %ld", file, func, line); 49#ifdef CONFIG_PREEMPT
185 printk("[#%d]:\n", ++die_counter); 50 printk("PREEMPT ");
186 print_modules(); 51#endif
187 show_regs(regs); 52#ifdef CONFIG_FRAME_POINTER
188 printk("Process %s (pid: %d, stack limit = 0x%p)\n", 53 printk("FRAME_POINTER ");
189 tsk->comm, tsk->pid, tsk->thread_info + 1); 54#endif
190 55 if (current_cpu_data.features & AVR32_FEATURE_OCD) {
191 if (!user_mode(regs) || in_interrupt()) { 56 unsigned long did = __mfdr(DBGREG_DID);
192 dump_mem("Stack: ", regs->sp, 57 printk("chip: 0x%03lx:0x%04lx rev %lu\n",
193 THREAD_SIZE + (unsigned long)tsk->thread_info); 58 (did >> 1) & 0x7ff,
59 (did >> 12) & 0x7fff,
60 (did >> 28) & 0xf);
61 } else {
62 printk("cpu: arch %u r%u / core %u r%u\n",
63 current_cpu_data.arch_type,
64 current_cpu_data.arch_revision,
65 current_cpu_data.cpu_type,
66 current_cpu_data.cpu_revision);
194 } 67 }
195 68
69 print_modules();
70 show_regs_log_lvl(regs, KERN_EMERG);
71 show_stack_log_lvl(current, regs->sp, regs, KERN_EMERG);
196 bust_spinlocks(0); 72 bust_spinlocks(0);
197 spin_unlock_irq(&die_lock); 73 spin_unlock_irq(&die_lock);
198 do_exit(SIGSEGV); 74
75 if (in_interrupt())
76 panic("Fatal exception in interrupt");
77
78 if (panic_on_oops)
79 panic("Fatal exception");
80
81 do_exit(err);
199} 82}
200 83
201void __die_if_kernel(const char *str, struct pt_regs *regs, unsigned long err, 84void _exception(long signr, struct pt_regs *regs, int code,
202 const char *file, const char *func, unsigned long line) 85 unsigned long addr)
203{ 86{
87 siginfo_t info;
88
204 if (!user_mode(regs)) 89 if (!user_mode(regs))
205 __die(str, regs, err, file, func, line); 90 die("Unhandled exception in kernel mode", regs, signr);
206} 91
92 memset(&info, 0, sizeof(info));
93 info.si_signo = signr;
94 info.si_code = code;
95 info.si_addr = (void __user *)addr;
96 force_sig_info(signr, &info, current);
207 97
208asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
209{
210#ifdef CONFIG_SUBARCH_AVR32B
211 /* 98 /*
212 * The exception entry always saves RSR_EX. For NMI, this is 99 * Init gets no signals that it doesn't have a handler for.
213 * wrong; it should be RSR_NMI 100 * That's all very well, but if it has caused a synchronous
101 * exception and we ignore the resulting signal, it will just
102 * generate the same exception over and over again and we get
103 * nowhere. Better to kill it and let the kernel panic.
214 */ 104 */
215 regs->sr = sysreg_read(RSR_NMI); 105 if (is_init(current)) {
216#endif 106 __sighandler_t handler;
107
108 spin_lock_irq(&current->sighand->siglock);
109 handler = current->sighand->action[signr-1].sa.sa_handler;
110 spin_unlock_irq(&current->sighand->siglock);
111 if (handler == SIG_DFL) {
112 /* init has generated a synchronous exception
113 and it doesn't have a handler for the signal */
114 printk(KERN_CRIT "init has generated signal %ld "
115 "but has no handler for it\n", signr);
116 do_exit(signr);
117 }
118 }
119}
217 120
218 printk("NMI taken!!!!\n"); 121asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
219 die("NMI", regs, ecr); 122{
220 BUG(); 123 printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
124 show_regs_log_lvl(regs, KERN_ALERT);
125 show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
221} 126}
222 127
223asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs) 128asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
224{ 129{
225 printk("Unable to handle critical exception %lu at pc = %08lx!\n", 130 die("Critical exception", regs, SIGKILL);
226 ecr, regs->pc);
227 die("Oops", regs, ecr);
228 BUG();
229} 131}
230 132
231asmlinkage void do_address_exception(unsigned long ecr, struct pt_regs *regs) 133asmlinkage void do_address_exception(unsigned long ecr, struct pt_regs *regs)
232{ 134{
233 siginfo_t info; 135 _exception(SIGBUS, regs, BUS_ADRALN, regs->pc);
234
235 die_if_kernel("Oops: Address exception in kernel mode", regs, ecr);
236
237#ifdef DEBUG
238 if (ecr == ECR_ADDR_ALIGN_X)
239 pr_debug("Instruction Address Exception at pc = %08lx\n",
240 regs->pc);
241 else if (ecr == ECR_ADDR_ALIGN_R)
242 pr_debug("Data Address Exception (Read) at pc = %08lx\n",
243 regs->pc);
244 else if (ecr == ECR_ADDR_ALIGN_W)
245 pr_debug("Data Address Exception (Write) at pc = %08lx\n",
246 regs->pc);
247 else
248 BUG();
249
250 show_regs(regs);
251#endif
252
253 info.si_signo = SIGBUS;
254 info.si_errno = 0;
255 info.si_code = BUS_ADRALN;
256 info.si_addr = (void __user *)regs->pc;
257
258 force_sig_info(SIGBUS, &info, current);
259} 136}
260 137
261/* This way of handling undefined instructions is stolen from ARM */ 138/* This way of handling undefined instructions is stolen from ARM */
@@ -280,7 +157,8 @@ static int do_cop_absent(u32 insn)
280{ 157{
281 int cop_nr; 158 int cop_nr;
282 u32 cpucr; 159 u32 cpucr;
283 if ( (insn & 0xfdf00000) == 0xf1900000 ) 160
161 if ((insn & 0xfdf00000) == 0xf1900000)
284 /* LDC0 */ 162 /* LDC0 */
285 cop_nr = 0; 163 cop_nr = 0;
286 else 164 else
@@ -292,136 +170,91 @@ static int do_cop_absent(u32 insn)
292 sysreg_write(CPUCR, cpucr); 170 sysreg_write(CPUCR, cpucr);
293 171
294 cpucr = sysreg_read(CPUCR); 172 cpucr = sysreg_read(CPUCR);
295 if ( !(cpucr & (1 << (24 + cop_nr))) ){ 173 if (!(cpucr & (1 << (24 + cop_nr))))
296 printk("Coprocessor #%i not found!\n", cop_nr); 174 return -ENODEV;
297 return -1;
298 }
299 175
300 return 0; 176 return 0;
301} 177}
302 178
303#ifdef CONFIG_BUG 179int is_valid_bugaddr(unsigned long pc)
304#ifdef CONFIG_DEBUG_BUGVERBOSE
305static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
306{
307 char *file;
308 u16 line;
309 char c;
310
311 if (__get_user(line, (u16 __user *)(regs->pc + 2)))
312 return;
313 if (__get_user(file, (char * __user *)(regs->pc + 4))
314 || (unsigned long)file < PAGE_OFFSET
315 || __get_user(c, file))
316 file = "<bad filename>";
317
318 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
319}
320#else
321static inline void do_bug_verbose(struct pt_regs *regs, u32 insn)
322{ 180{
181 unsigned short opcode;
182
183 if (pc < PAGE_OFFSET)
184 return 0;
185 if (probe_kernel_address((u16 *)pc, opcode))
186 return 0;
323 187
188 return opcode == AVR32_BUG_OPCODE;
324} 189}
325#endif
326#endif
327 190
328asmlinkage void do_illegal_opcode(unsigned long ecr, struct pt_regs *regs) 191asmlinkage void do_illegal_opcode(unsigned long ecr, struct pt_regs *regs)
329{ 192{
330 u32 insn; 193 u32 insn;
331 struct undef_hook *hook; 194 struct undef_hook *hook;
332 siginfo_t info;
333 void __user *pc; 195 void __user *pc;
196 long code;
334 197
335 if (!user_mode(regs)) 198 if (!user_mode(regs) && (ecr == ECR_ILLEGAL_OPCODE)) {
336 goto kernel_trap; 199 enum bug_trap_type type;
200
201 type = report_bug(regs->pc);
202 switch (type) {
203 case BUG_TRAP_TYPE_NONE:
204 break;
205 case BUG_TRAP_TYPE_WARN:
206 regs->pc += 2;
207 return;
208 case BUG_TRAP_TYPE_BUG:
209 die("Kernel BUG", regs, SIGKILL);
210 }
211 }
337 212
338 local_irq_enable(); 213 local_irq_enable();
339 214
340 pc = (void __user *)instruction_pointer(regs); 215 if (user_mode(regs)) {
341 if (__get_user(insn, (u32 __user *)pc)) 216 pc = (void __user *)instruction_pointer(regs);
342 goto invalid_area; 217 if (get_user(insn, (u32 __user *)pc))
218 goto invalid_area;
343 219
344 if (ecr == ECR_COPROC_ABSENT) { 220 if (ecr == ECR_COPROC_ABSENT && !do_cop_absent(insn))
345 if (do_cop_absent(insn) == 0)
346 return; 221 return;
347 }
348 222
349 spin_lock_irq(&undef_lock); 223 spin_lock_irq(&undef_lock);
350 list_for_each_entry(hook, &undef_hook, node) { 224 list_for_each_entry(hook, &undef_hook, node) {
351 if ((insn & hook->insn_mask) == hook->insn_val) { 225 if ((insn & hook->insn_mask) == hook->insn_val) {
352 if (hook->fn(regs, insn) == 0) { 226 if (hook->fn(regs, insn) == 0) {
353 spin_unlock_irq(&undef_lock); 227 spin_unlock_irq(&undef_lock);
354 return; 228 return;
229 }
355 } 230 }
356 } 231 }
232 spin_unlock_irq(&undef_lock);
357 } 233 }
358 spin_unlock_irq(&undef_lock);
359
360invalid_area:
361 234
362#ifdef DEBUG
363 printk("Illegal instruction at pc = %08lx\n", regs->pc);
364 if (regs->pc < TASK_SIZE) {
365 unsigned long ptbr, pgd, pte, *p;
366
367 ptbr = sysreg_read(PTBR);
368 p = (unsigned long *)ptbr;
369 pgd = p[regs->pc >> 22];
370 p = (unsigned long *)((pgd & 0x1ffff000) | 0x80000000);
371 pte = p[(regs->pc >> 12) & 0x3ff];
372 printk("page table: 0x%08lx -> 0x%08lx -> 0x%08lx\n", ptbr, pgd, pte);
373 }
374#endif
375
376 info.si_signo = SIGILL;
377 info.si_errno = 0;
378 info.si_addr = (void __user *)regs->pc;
379 switch (ecr) { 235 switch (ecr) {
380 case ECR_ILLEGAL_OPCODE:
381 case ECR_UNIMPL_INSTRUCTION:
382 info.si_code = ILL_ILLOPC;
383 break;
384 case ECR_PRIVILEGE_VIOLATION: 236 case ECR_PRIVILEGE_VIOLATION:
385 info.si_code = ILL_PRVOPC; 237 code = ILL_PRVOPC;
386 break; 238 break;
387 case ECR_COPROC_ABSENT: 239 case ECR_COPROC_ABSENT:
388 info.si_code = ILL_COPROC; 240 code = ILL_COPROC;
389 break; 241 break;
390 default: 242 default:
391 BUG(); 243 code = ILL_ILLOPC;
244 break;
392 } 245 }
393 246
394 force_sig_info(SIGILL, &info, current); 247 _exception(SIGILL, regs, code, regs->pc);
395 return; 248 return;
396 249
397kernel_trap: 250invalid_area:
398#ifdef CONFIG_BUG 251 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->pc);
399 if (__kernel_text_address(instruction_pointer(regs))) {
400 insn = *(u16 *)instruction_pointer(regs);
401 if (insn == AVR32_BUG_OPCODE) {
402 do_bug_verbose(regs, insn);
403 die("Kernel BUG", regs, 0);
404 return;
405 }
406 }
407#endif
408
409 die("Oops: Illegal instruction in kernel code", regs, ecr);
410} 252}
411 253
412asmlinkage void do_fpe(unsigned long ecr, struct pt_regs *regs) 254asmlinkage void do_fpe(unsigned long ecr, struct pt_regs *regs)
413{ 255{
414 siginfo_t info; 256 /* We have no FPU yet */
415 257 _exception(SIGILL, regs, ILL_COPROC, regs->pc);
416 printk("Floating-point exception at pc = %08lx\n", regs->pc);
417
418 /* We have no FPU... */
419 info.si_signo = SIGILL;
420 info.si_errno = 0;
421 info.si_addr = (void __user *)regs->pc;
422 info.si_code = ILL_COPROC;
423
424 force_sig_info(SIGILL, &info, current);
425} 258}
426 259
427 260
diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
index ef13b7c78935..7ad20cfb48a8 100644
--- a/arch/avr32/kernel/vmlinux.lds.c
+++ b/arch/avr32/kernel/vmlinux.lds.c
@@ -26,6 +26,12 @@ SECTIONS
26 _sinittext = .; 26 _sinittext = .;
27 *(.text.reset) 27 *(.text.reset)
28 *(.init.text) 28 *(.init.text)
29 /*
30 * .exit.text is discarded at runtime, not
31 * link time, to deal with references from
32 * __bug_table
33 */
34 *(.exit.text)
29 _einittext = .; 35 _einittext = .;
30 . = ALIGN(4); 36 . = ALIGN(4);
31 __tagtable_begin = .; 37 __tagtable_begin = .;
@@ -86,6 +92,8 @@ SECTIONS
86 __stop___ex_table = .; 92 __stop___ex_table = .;
87 } 93 }
88 94
95 BUG_TABLE
96
89 RODATA 97 RODATA
90 98
91 . = ALIGN(8192); 99 . = ALIGN(8192);
@@ -126,7 +134,6 @@ SECTIONS
126 * thrown away, as cleanup code is never called unless it's a module. 134 * thrown away, as cleanup code is never called unless it's a module.
127 */ 135 */
128 /DISCARD/ : { 136 /DISCARD/ : {
129 *(.exit.text)
130 *(.exit.data) 137 *(.exit.data)
131 *(.exitcall.exit) 138 *(.exitcall.exit)
132 } 139 }
diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
new file mode 100644
index 000000000000..eb307838457b
--- /dev/null
+++ b/arch/avr32/mach-at32ap/Kconfig
@@ -0,0 +1,31 @@
1if PLATFORM_AT32AP
2
3menu "Atmel AVR32 AP options"
4
5choice
6 prompt "AT32AP7000 static memory bus width"
7 depends on CPU_AT32AP7000
8 default AP7000_16_BIT_SMC
9 help
10 Define the width of the AP7000 external static memory interface.
11 This is used to determine how to mangle the address and/or data
12 when doing little-endian port access.
13
14 The current code can only support a single external memory bus
15 width for all chip selects, excluding the flash (which is using
16 raw access and is thus not affected by any of this.)
17
18config AP7000_32_BIT_SMC
19 bool "32 bit"
20
21config AP7000_16_BIT_SMC
22 bool "16 bit"
23
24config AP7000_8_BIT_SMC
25 bool "8 bit"
26
27endchoice
28
29endmenu
30
31endif # PLATFORM_AT32AP
diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
index b21bea9af8b1..f1d395724ac6 100644
--- a/arch/avr32/mach-at32ap/Makefile
+++ b/arch/avr32/mach-at32ap/Makefile
@@ -1,2 +1,3 @@
1obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o 1obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
2obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o 2obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
3obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 472703f90c22..56db45b99a0f 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -18,6 +18,7 @@
18#include <asm/arch/sm.h> 18#include <asm/arch/sm.h>
19 19
20#include "clock.h" 20#include "clock.h"
21#include "hmatrix.h"
21#include "pio.h" 22#include "pio.h"
22#include "sm.h" 23#include "sm.h"
23 24
@@ -416,7 +417,15 @@ struct platform_device at32_sm_device = {
416 .resource = sm_resource, 417 .resource = sm_resource,
417 .num_resources = ARRAY_SIZE(sm_resource), 418 .num_resources = ARRAY_SIZE(sm_resource),
418}; 419};
419DEV_CLK(pclk, at32_sm, pbb, 0); 420static struct clk at32_sm_pclk = {
421 .name = "pclk",
422 .dev = &at32_sm_device.dev,
423 .parent = &pbb_clk,
424 .mode = pbb_clk_mode,
425 .get_rate = pbb_clk_get_rate,
426 .users = 1,
427 .index = 0,
428};
420 429
421static struct resource intc0_resource[] = { 430static struct resource intc0_resource[] = {
422 PBMEM(0xfff00400), 431 PBMEM(0xfff00400),
@@ -442,6 +451,7 @@ static struct clk hramc_clk = {
442 .mode = hsb_clk_mode, 451 .mode = hsb_clk_mode,
443 .get_rate = hsb_clk_get_rate, 452 .get_rate = hsb_clk_get_rate,
444 .users = 1, 453 .users = 1,
454 .index = 3,
445}; 455};
446 456
447static struct resource smc0_resource[] = { 457static struct resource smc0_resource[] = {
@@ -467,6 +477,57 @@ static struct clk pico_clk = {
467}; 477};
468 478
469/* -------------------------------------------------------------------- 479/* --------------------------------------------------------------------
480 * HMATRIX
481 * -------------------------------------------------------------------- */
482
483static struct clk hmatrix_clk = {
484 .name = "hmatrix_clk",
485 .parent = &pbb_clk,
486 .mode = pbb_clk_mode,
487 .get_rate = pbb_clk_get_rate,
488 .index = 2,
489 .users = 1,
490};
491#define HMATRIX_BASE ((void __iomem *)0xfff00800)
492
493#define hmatrix_readl(reg) \
494 __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
495#define hmatrix_writel(reg,value) \
496 __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
497
498/*
499 * Set bits in the HMATRIX Special Function Register (SFR) used by the
500 * External Bus Interface (EBI). This can be used to enable special
501 * features like CompactFlash support, NAND Flash support, etc. on
502 * certain chipselects.
503 */
504static inline void set_ebi_sfr_bits(u32 mask)
505{
506 u32 sfr;
507
508 clk_enable(&hmatrix_clk);
509 sfr = hmatrix_readl(SFR4);
510 sfr |= mask;
511 hmatrix_writel(SFR4, sfr);
512 clk_disable(&hmatrix_clk);
513}
514
515/* --------------------------------------------------------------------
516 * System Timer/Counter (TC)
517 * -------------------------------------------------------------------- */
518static struct resource at32_systc0_resource[] = {
519 PBMEM(0xfff00c00),
520 IRQ(22),
521};
522struct platform_device at32_systc0_device = {
523 .name = "systc",
524 .id = 0,
525 .resource = at32_systc0_resource,
526 .num_resources = ARRAY_SIZE(at32_systc0_resource),
527};
528DEV_CLK(pclk, at32_systc0, pbb, 3);
529
530/* --------------------------------------------------------------------
470 * PIO 531 * PIO
471 * -------------------------------------------------------------------- */ 532 * -------------------------------------------------------------------- */
472 533
@@ -514,6 +575,8 @@ void __init at32_add_system_devices(void)
514 platform_device_register(&smc0_device); 575 platform_device_register(&smc0_device);
515 platform_device_register(&pdc_device); 576 platform_device_register(&pdc_device);
516 577
578 platform_device_register(&at32_systc0_device);
579
517 platform_device_register(&pio0_device); 580 platform_device_register(&pio0_device);
518 platform_device_register(&pio1_device); 581 platform_device_register(&pio1_device);
519 platform_device_register(&pio2_device); 582 platform_device_register(&pio2_device);
@@ -950,6 +1013,7 @@ struct clk *at32_clock_list[] = {
950 &pbb_clk, 1013 &pbb_clk,
951 &at32_sm_pclk, 1014 &at32_sm_pclk,
952 &at32_intc0_pclk, 1015 &at32_intc0_pclk,
1016 &hmatrix_clk,
953 &ebi_clk, 1017 &ebi_clk,
954 &hramc_clk, 1018 &hramc_clk,
955 &smc0_pclk, 1019 &smc0_pclk,
@@ -962,6 +1026,7 @@ struct clk *at32_clock_list[] = {
962 &pio2_mck, 1026 &pio2_mck,
963 &pio3_mck, 1027 &pio3_mck,
964 &pio4_mck, 1028 &pio4_mck,
1029 &at32_systc0_pclk,
965 &atmel_usart0_usart, 1030 &atmel_usart0_usart,
966 &atmel_usart1_usart, 1031 &atmel_usart1_usart,
967 &atmel_usart2_usart, 1032 &atmel_usart2_usart,
@@ -1024,6 +1089,9 @@ void __init at32_clock_init(void)
1024 for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { 1089 for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
1025 struct clk *clk = at32_clock_list[i]; 1090 struct clk *clk = at32_clock_list[i];
1026 1091
1092 if (clk->users == 0)
1093 continue;
1094
1027 if (clk->mode == &cpu_clk_mode) 1095 if (clk->mode == &cpu_clk_mode)
1028 cpu_mask |= 1 << clk->index; 1096 cpu_mask |= 1 << clk->index;
1029 else if (clk->mode == &hsb_clk_mode) 1097 else if (clk->mode == &hsb_clk_mode)
diff --git a/arch/avr32/mach-at32ap/hmatrix.h b/arch/avr32/mach-at32ap/hmatrix.h
new file mode 100644
index 000000000000..d10bfb60d68d
--- /dev/null
+++ b/arch/avr32/mach-at32ap/hmatrix.h
@@ -0,0 +1,182 @@
1/*
2 * Register definitions for High-Speed Bus Matrix
3 */
4#ifndef __HMATRIX_H
5#define __HMATRIX_H
6
7/* HMATRIX register offsets */
8#define HMATRIX_MCFG0 0x0000
9#define HMATRIX_MCFG1 0x0004
10#define HMATRIX_MCFG2 0x0008
11#define HMATRIX_MCFG3 0x000c
12#define HMATRIX_MCFG4 0x0010
13#define HMATRIX_MCFG5 0x0014
14#define HMATRIX_MCFG6 0x0018
15#define HMATRIX_MCFG7 0x001c
16#define HMATRIX_MCFG8 0x0020
17#define HMATRIX_MCFG9 0x0024
18#define HMATRIX_MCFG10 0x0028
19#define HMATRIX_MCFG11 0x002c
20#define HMATRIX_MCFG12 0x0030
21#define HMATRIX_MCFG13 0x0034
22#define HMATRIX_MCFG14 0x0038
23#define HMATRIX_MCFG15 0x003c
24#define HMATRIX_SCFG0 0x0040
25#define HMATRIX_SCFG1 0x0044
26#define HMATRIX_SCFG2 0x0048
27#define HMATRIX_SCFG3 0x004c
28#define HMATRIX_SCFG4 0x0050
29#define HMATRIX_SCFG5 0x0054
30#define HMATRIX_SCFG6 0x0058
31#define HMATRIX_SCFG7 0x005c
32#define HMATRIX_SCFG8 0x0060
33#define HMATRIX_SCFG9 0x0064
34#define HMATRIX_SCFG10 0x0068
35#define HMATRIX_SCFG11 0x006c
36#define HMATRIX_SCFG12 0x0070
37#define HMATRIX_SCFG13 0x0074
38#define HMATRIX_SCFG14 0x0078
39#define HMATRIX_SCFG15 0x007c
40#define HMATRIX_PRAS0 0x0080
41#define HMATRIX_PRBS0 0x0084
42#define HMATRIX_PRAS1 0x0088
43#define HMATRIX_PRBS1 0x008c
44#define HMATRIX_PRAS2 0x0090
45#define HMATRIX_PRBS2 0x0094
46#define HMATRIX_PRAS3 0x0098
47#define HMATRIX_PRBS3 0x009c
48#define HMATRIX_PRAS4 0x00a0
49#define HMATRIX_PRBS4 0x00a4
50#define HMATRIX_PRAS5 0x00a8
51#define HMATRIX_PRBS5 0x00ac
52#define HMATRIX_PRAS6 0x00b0
53#define HMATRIX_PRBS6 0x00b4
54#define HMATRIX_PRAS7 0x00b8
55#define HMATRIX_PRBS7 0x00bc
56#define HMATRIX_PRAS8 0x00c0
57#define HMATRIX_PRBS8 0x00c4
58#define HMATRIX_PRAS9 0x00c8
59#define HMATRIX_PRBS9 0x00cc
60#define HMATRIX_PRAS10 0x00d0
61#define HMATRIX_PRBS10 0x00d4
62#define HMATRIX_PRAS11 0x00d8
63#define HMATRIX_PRBS11 0x00dc
64#define HMATRIX_PRAS12 0x00e0
65#define HMATRIX_PRBS12 0x00e4
66#define HMATRIX_PRAS13 0x00e8
67#define HMATRIX_PRBS13 0x00ec
68#define HMATRIX_PRAS14 0x00f0
69#define HMATRIX_PRBS14 0x00f4
70#define HMATRIX_PRAS15 0x00f8
71#define HMATRIX_PRBS15 0x00fc
72#define HMATRIX_MRCR 0x0100
73#define HMATRIX_SFR0 0x0110
74#define HMATRIX_SFR1 0x0114
75#define HMATRIX_SFR2 0x0118
76#define HMATRIX_SFR3 0x011c
77#define HMATRIX_SFR4 0x0120
78#define HMATRIX_SFR5 0x0124
79#define HMATRIX_SFR6 0x0128
80#define HMATRIX_SFR7 0x012c
81#define HMATRIX_SFR8 0x0130
82#define HMATRIX_SFR9 0x0134
83#define HMATRIX_SFR10 0x0138
84#define HMATRIX_SFR11 0x013c
85#define HMATRIX_SFR12 0x0140
86#define HMATRIX_SFR13 0x0144
87#define HMATRIX_SFR14 0x0148
88#define HMATRIX_SFR15 0x014c
89
90/* Bitfields in MCFGx */
91#define HMATRIX_ULBT_OFFSET 0
92#define HMATRIX_ULBT_SIZE 3
93
94/* Bitfields in SCFGx */
95#define HMATRIX_SLOT_CYCLE_OFFSET 0
96#define HMATRIX_SLOT_CYCLE_SIZE 8
97#define HMATRIX_DEFMSTR_TYPE_OFFSET 16
98#define HMATRIX_DEFMSTR_TYPE_SIZE 2
99#define HMATRIX_FIXED_DEFMSTR_OFFSET 18
100#define HMATRIX_FIXED_DEFMSTR_SIZE 4
101#define HMATRIX_ARBT_OFFSET 24
102#define HMATRIX_ARBT_SIZE 2
103
104/* Bitfields in PRASx */
105#define HMATRIX_M0PR_OFFSET 0
106#define HMATRIX_M0PR_SIZE 4
107#define HMATRIX_M1PR_OFFSET 4
108#define HMATRIX_M1PR_SIZE 4
109#define HMATRIX_M2PR_OFFSET 8
110#define HMATRIX_M2PR_SIZE 4
111#define HMATRIX_M3PR_OFFSET 12
112#define HMATRIX_M3PR_SIZE 4
113#define HMATRIX_M4PR_OFFSET 16
114#define HMATRIX_M4PR_SIZE 4
115#define HMATRIX_M5PR_OFFSET 20
116#define HMATRIX_M5PR_SIZE 4
117#define HMATRIX_M6PR_OFFSET 24
118#define HMATRIX_M6PR_SIZE 4
119#define HMATRIX_M7PR_OFFSET 28
120#define HMATRIX_M7PR_SIZE 4
121
122/* Bitfields in PRBSx */
123#define HMATRIX_M8PR_OFFSET 0
124#define HMATRIX_M8PR_SIZE 4
125#define HMATRIX_M9PR_OFFSET 4
126#define HMATRIX_M9PR_SIZE 4
127#define HMATRIX_M10PR_OFFSET 8
128#define HMATRIX_M10PR_SIZE 4
129#define HMATRIX_M11PR_OFFSET 12
130#define HMATRIX_M11PR_SIZE 4
131#define HMATRIX_M12PR_OFFSET 16
132#define HMATRIX_M12PR_SIZE 4
133#define HMATRIX_M13PR_OFFSET 20
134#define HMATRIX_M13PR_SIZE 4
135#define HMATRIX_M14PR_OFFSET 24
136#define HMATRIX_M14PR_SIZE 4
137#define HMATRIX_M15PR_OFFSET 28
138#define HMATRIX_M15PR_SIZE 4
139
140/* Bitfields in SFR4 */
141#define HMATRIX_CS1A_OFFSET 1
142#define HMATRIX_CS1A_SIZE 1
143#define HMATRIX_CS3A_OFFSET 3
144#define HMATRIX_CS3A_SIZE 1
145#define HMATRIX_CS4A_OFFSET 4
146#define HMATRIX_CS4A_SIZE 1
147#define HMATRIX_CS5A_OFFSET 5
148#define HMATRIX_CS5A_SIZE 1
149#define HMATRIX_DBPUC_OFFSET 8
150#define HMATRIX_DBPUC_SIZE 1
151
152/* Constants for ULBT */
153#define HMATRIX_ULBT_INFINITE 0
154#define HMATRIX_ULBT_SINGLE 1
155#define HMATRIX_ULBT_FOUR_BEAT 2
156#define HMATRIX_ULBT_EIGHT_BEAT 3
157#define HMATRIX_ULBT_SIXTEEN_BEAT 4
158
159/* Constants for DEFMSTR_TYPE */
160#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0
161#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1
162#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2
163
164/* Constants for ARBT */
165#define HMATRIX_ARBT_ROUND_ROBIN 0
166#define HMATRIX_ARBT_FIXED_PRIORITY 1
167
168/* Bit manipulation macros */
169#define HMATRIX_BIT(name) \
170 (1 << HMATRIX_##name##_OFFSET)
171#define HMATRIX_BF(name,value) \
172 (((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \
173 << HMATRIX_##name##_OFFSET)
174#define HMATRIX_BFEXT(name,value) \
175 (((value) >> HMATRIX_##name##_OFFSET) \
176 & ((1 << HMATRIX_##name##_SIZE) - 1))
177#define HMATRIX_BFINS(name,value,old) \
178 (((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \
179 << HMATRIX_##name##_OFFSET)) \
180 | HMATRIX_BF(name,value))
181
182#endif /* __HMATRIX_H */
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 7691721928a7..5e22a750632b 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -75,12 +75,35 @@ int smc_set_configuration(int cs, const struct smc_config *config)
75 return -EINVAL; 75 return -EINVAL;
76 } 76 }
77 77
78 switch (config->nwait_mode) {
79 case 0:
80 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
81 break;
82 case 1:
83 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
84 break;
85 case 2:
86 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
87 break;
88 case 3:
89 mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
90 break;
91 default:
92 return -EINVAL;
93 }
94
95 if (config->tdf_cycles) {
96 mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
97 }
98
78 if (config->nrd_controlled) 99 if (config->nrd_controlled)
79 mode |= HSMC_BIT(READ_MODE); 100 mode |= HSMC_BIT(READ_MODE);
80 if (config->nwe_controlled) 101 if (config->nwe_controlled)
81 mode |= HSMC_BIT(WRITE_MODE); 102 mode |= HSMC_BIT(WRITE_MODE);
82 if (config->byte_write) 103 if (config->byte_write)
83 mode |= HSMC_BIT(BAT); 104 mode |= HSMC_BIT(BAT);
105 if (config->tdf_mode)
106 mode |= HSMC_BIT(TDF_MODE);
84 107
85 pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n", 108 pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
86 cs, setup, pulse, cycle, mode); 109 cs, setup, pulse, cycle, mode);
diff --git a/arch/avr32/mach-at32ap/time-tc.c b/arch/avr32/mach-at32ap/time-tc.c
new file mode 100644
index 000000000000..e3070bdd4bb9
--- /dev/null
+++ b/arch/avr32/mach-at32ap/time-tc.c
@@ -0,0 +1,218 @@
1/*
2 * Copyright (C) 2004-2007 Atmel Corporation
3 *
4 * Based on MIPS implementation arch/mips/kernel/time.c
5 * Copyright 2001 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/clk.h>
13#include <linux/clocksource.h>
14#include <linux/time.h>
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/kernel_stat.h>
19#include <linux/errno.h>
20#include <linux/init.h>
21#include <linux/profile.h>
22#include <linux/sysdev.h>
23#include <linux/err.h>
24
25#include <asm/div64.h>
26#include <asm/sysreg.h>
27#include <asm/io.h>
28#include <asm/sections.h>
29
30#include <asm/arch/time.h>
31
32/* how many counter cycles in a jiffy? */
33static u32 cycles_per_jiffy;
34
35/* the count value for the next timer interrupt */
36static u32 expirelo;
37
38/* the I/O registers of the TC module */
39static void __iomem *ioregs;
40
41cycle_t read_cycle_count(void)
42{
43 return (cycle_t)timer_read(ioregs, 0, CV);
44}
45
46struct clocksource clocksource_avr32 = {
47 .name = "avr32",
48 .rating = 342,
49 .read = read_cycle_count,
50 .mask = CLOCKSOURCE_MASK(16),
51 .shift = 16,
52 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
53};
54
55static void avr32_timer_ack(void)
56{
57 u16 count = expirelo;
58
59 /* Ack this timer interrupt and set the next one, use a u16
60 * variable so it will wrap around correctly */
61 count += cycles_per_jiffy;
62 expirelo = count;
63 timer_write(ioregs, 0, RC, expirelo);
64
65 /* Check to see if we have missed any timer interrupts */
66 count = timer_read(ioregs, 0, CV);
67 if ((count - expirelo) < 0x7fff) {
68 expirelo = count + cycles_per_jiffy;
69 timer_write(ioregs, 0, RC, expirelo);
70 }
71}
72
73u32 avr32_hpt_read(void)
74{
75 return timer_read(ioregs, 0, CV);
76}
77
78static int avr32_timer_calc_div_and_set_jiffies(struct clk *pclk)
79{
80 unsigned int cycles_max = (clocksource_avr32.mask + 1) / 2;
81 unsigned int divs[] = { 4, 8, 16, 32 };
82 int divs_size = sizeof(divs) / sizeof(*divs);
83 int i = 0;
84 unsigned long count_hz;
85 unsigned long shift;
86 unsigned long mult;
87 int clock_div = -1;
88 u64 tmp;
89
90 shift = clocksource_avr32.shift;
91
92 do {
93 count_hz = clk_get_rate(pclk) / divs[i];
94 mult = clocksource_hz2mult(count_hz, shift);
95 clocksource_avr32.mult = mult;
96
97 tmp = TICK_NSEC;
98 tmp <<= shift;
99 tmp += mult / 2;
100 do_div(tmp, mult);
101
102 cycles_per_jiffy = tmp;
103 } while (cycles_per_jiffy > cycles_max && ++i < divs_size);
104
105 clock_div = i + 1;
106
107 if (clock_div > divs_size) {
108 pr_debug("timer: could not calculate clock divider\n");
109 return -EFAULT;
110 }
111
112 /* Set the clock divider */
113 timer_write(ioregs, 0, CMR, TIMER_BF(CMR_TCCLKS, clock_div));
114
115 return 0;
116}
117
118int avr32_hpt_init(unsigned int count)
119{
120 struct resource *regs;
121 struct clk *pclk;
122 int irq = -1;
123 int ret = 0;
124
125 ret = -ENXIO;
126
127 irq = platform_get_irq(&at32_systc0_device, 0);
128 if (irq < 0) {
129 pr_debug("timer: could not get irq\n");
130 goto out_error;
131 }
132
133 pclk = clk_get(&at32_systc0_device.dev, "pclk");
134 if (IS_ERR(pclk)) {
135 pr_debug("timer: could not get clk: %ld\n", PTR_ERR(pclk));
136 goto out_error;
137 }
138 clk_enable(pclk);
139
140 regs = platform_get_resource(&at32_systc0_device, IORESOURCE_MEM, 0);
141 if (!regs) {
142 pr_debug("timer: could not get resource\n");
143 goto out_error_clk;
144 }
145
146 ioregs = ioremap(regs->start, regs->end - regs->start + 1);
147 if (!ioregs) {
148 pr_debug("timer: could not get ioregs\n");
149 goto out_error_clk;
150 }
151
152 ret = avr32_timer_calc_div_and_set_jiffies(pclk);
153 if (ret)
154 goto out_error_io;
155
156 ret = setup_irq(irq, &timer_irqaction);
157 if (ret) {
158 pr_debug("timer: could not request irq %d: %d\n",
159 irq, ret);
160 goto out_error_io;
161 }
162
163 expirelo = (timer_read(ioregs, 0, CV) / cycles_per_jiffy + 1)
164 * cycles_per_jiffy;
165
166 /* Enable clock and interrupts on RC compare */
167 timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_CLKEN));
168 timer_write(ioregs, 0, IER, TIMER_BIT(IER_CPCS));
169 /* Set cycles to first interrupt */
170 timer_write(ioregs, 0, RC, expirelo);
171
172 printk(KERN_INFO "timer: AT32AP system timer/counter at 0x%p irq %d\n",
173 ioregs, irq);
174
175 return 0;
176
177out_error_io:
178 iounmap(ioregs);
179out_error_clk:
180 clk_put(pclk);
181out_error:
182 return ret;
183}
184
185int avr32_hpt_start(void)
186{
187 timer_write(ioregs, 0, CCR, TIMER_BIT(CCR_SWTRG));
188 return 0;
189}
190
191irqreturn_t timer_interrupt(int irq, void *dev_id)
192{
193 unsigned int sr = timer_read(ioregs, 0, SR);
194
195 if (sr & TIMER_BIT(SR_CPCS)) {
196 /* ack timer interrupt and try to set next interrupt */
197 avr32_timer_ack();
198
199 /*
200 * Call the generic timer interrupt handler
201 */
202 write_seqlock(&xtime_lock);
203 do_timer(1);
204 write_sequnlock(&xtime_lock);
205
206 /*
207 * In UP mode, we call local_timer_interrupt() to do profiling
208 * and process accounting.
209 *
210 * SMP is not supported yet.
211 */
212 local_timer_interrupt(irq, dev_id);
213
214 return IRQ_HANDLED;
215 }
216
217 return IRQ_NONE;
218}
diff --git a/arch/avr32/mm/fault.c b/arch/avr32/mm/fault.c
index 678557260a35..146ebdbdc302 100644
--- a/arch/avr32/mm/fault.c
+++ b/arch/avr32/mm/fault.c
@@ -16,26 +16,8 @@
16#include <asm/kdebug.h> 16#include <asm/kdebug.h>
17#include <asm/mmu_context.h> 17#include <asm/mmu_context.h>
18#include <asm/sysreg.h> 18#include <asm/sysreg.h>
19#include <asm/uaccess.h>
20#include <asm/tlb.h> 19#include <asm/tlb.h>
21 20#include <asm/uaccess.h>
22#ifdef DEBUG
23static void dump_code(unsigned long pc)
24{
25 char *p = (char *)pc;
26 char val;
27 int i;
28
29
30 printk(KERN_DEBUG "Code:");
31 for (i = 0; i < 16; i++) {
32 if (__get_user(val, p + i))
33 break;
34 printk(" %02x", val);
35 }
36 printk("\n");
37}
38#endif
39 21
40#ifdef CONFIG_KPROBES 22#ifdef CONFIG_KPROBES
41ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain); 23ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain);
@@ -68,17 +50,19 @@ static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
68} 50}
69#endif 51#endif
70 52
53int exception_trace = 1;
54
71/* 55/*
72 * This routine handles page faults. It determines the address and the 56 * This routine handles page faults. It determines the address and the
73 * problem, and then passes it off to one of the appropriate routines. 57 * problem, and then passes it off to one of the appropriate routines.
74 * 58 *
75 * ecr is the Exception Cause Register. Possible values are: 59 * ecr is the Exception Cause Register. Possible values are:
76 * 5: Page not found (instruction access)
77 * 6: Protection fault (instruction access) 60 * 6: Protection fault (instruction access)
78 * 12: Page not found (read access) 61 * 15: Protection fault (read access)
79 * 13: Page not found (write access) 62 * 16: Protection fault (write access)
80 * 14: Protection fault (read access) 63 * 20: Page not found (instruction access)
81 * 15: Protection fault (write access) 64 * 24: Page not found (read access)
65 * 28: Page not found (write access)
82 */ 66 */
83asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs) 67asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
84{ 68{
@@ -88,7 +72,9 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
88 const struct exception_table_entry *fixup; 72 const struct exception_table_entry *fixup;
89 unsigned long address; 73 unsigned long address;
90 unsigned long page; 74 unsigned long page;
91 int writeaccess = 0; 75 int writeaccess;
76 long signr;
77 int code;
92 78
93 if (notify_page_fault(DIE_PAGE_FAULT, regs, 79 if (notify_page_fault(DIE_PAGE_FAULT, regs,
94 ecr, SIGSEGV) == NOTIFY_STOP) 80 ecr, SIGSEGV) == NOTIFY_STOP)
@@ -99,6 +85,9 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
99 tsk = current; 85 tsk = current;
100 mm = tsk->mm; 86 mm = tsk->mm;
101 87
88 signr = SIGSEGV;
89 code = SEGV_MAPERR;
90
102 /* 91 /*
103 * If we're in an interrupt or have no user context, we must 92 * If we're in an interrupt or have no user context, we must
104 * not take the fault... 93 * not take the fault...
@@ -125,7 +114,9 @@ asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs)
125 * can handle it... 114 * can handle it...
126 */ 115 */
127good_area: 116good_area:
128 //pr_debug("good area: vm_flags = 0x%lx\n", vma->vm_flags); 117 code = SEGV_ACCERR;
118 writeaccess = 0;
119
129 switch (ecr) { 120 switch (ecr) {
130 case ECR_PROTECTION_X: 121 case ECR_PROTECTION_X:
131 case ECR_TLB_MISS_X: 122 case ECR_TLB_MISS_X:
@@ -176,46 +167,24 @@ survive:
176 * map. Fix it, but check if it's kernel or user first... 167 * map. Fix it, but check if it's kernel or user first...
177 */ 168 */
178bad_area: 169bad_area:
179 pr_debug("Bad area [%s:%u]: addr %08lx, ecr %lu\n",
180 tsk->comm, tsk->pid, address, ecr);
181
182 up_read(&mm->mmap_sem); 170 up_read(&mm->mmap_sem);
183 171
184 if (user_mode(regs)) { 172 if (user_mode(regs)) {
185 /* Hmm...we have to pass address and ecr somehow... */ 173 if (exception_trace)
186 /* tsk->thread.address = address; 174 printk("%s%s[%d]: segfault at %08lx pc %08lx "
187 tsk->thread.error_code = ecr; */ 175 "sp %08lx ecr %lu\n",
188#ifdef DEBUG 176 is_init(tsk) ? KERN_EMERG : KERN_INFO,
189 show_regs(regs); 177 tsk->comm, tsk->pid, address, regs->pc,
190 dump_code(regs->pc); 178 regs->sp, ecr);
191 179 _exception(SIGSEGV, regs, code, address);
192 page = sysreg_read(PTBR);
193 printk("ptbr = %08lx", page);
194 if (page) {
195 page = ((unsigned long *)page)[address >> 22];
196 printk(" pgd = %08lx", page);
197 if (page & _PAGE_PRESENT) {
198 page &= PAGE_MASK;
199 address &= 0x003ff000;
200 page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
201 printk(" pte = %08lx\n", page);
202 }
203 }
204#endif
205 pr_debug("Sending SIGSEGV to PID %d...\n",
206 tsk->pid);
207 force_sig(SIGSEGV, tsk);
208 return; 180 return;
209 } 181 }
210 182
211no_context: 183no_context:
212 pr_debug("No context\n");
213
214 /* Are we prepared to handle this kernel fault? */ 184 /* Are we prepared to handle this kernel fault? */
215 fixup = search_exception_tables(regs->pc); 185 fixup = search_exception_tables(regs->pc);
216 if (fixup) { 186 if (fixup) {
217 regs->pc = fixup->fixup; 187 regs->pc = fixup->fixup;
218 pr_debug("Found fixup at %08lx\n", fixup->fixup);
219 return; 188 return;
220 } 189 }
221 190
@@ -230,7 +199,6 @@ no_context:
230 printk(KERN_ALERT 199 printk(KERN_ALERT
231 "Unable to handle kernel paging request"); 200 "Unable to handle kernel paging request");
232 printk(" at virtual address %08lx\n", address); 201 printk(" at virtual address %08lx\n", address);
233 printk(KERN_ALERT "pc = %08lx\n", regs->pc);
234 202
235 page = sysreg_read(PTBR); 203 page = sysreg_read(PTBR);
236 printk(KERN_ALERT "ptbr = %08lx", page); 204 printk(KERN_ALERT "ptbr = %08lx", page);
@@ -241,20 +209,20 @@ no_context:
241 page &= PAGE_MASK; 209 page &= PAGE_MASK;
242 address &= 0x003ff000; 210 address &= 0x003ff000;
243 page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT]; 211 page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT];
244 printk(" pte = %08lx\n", page); 212 printk(" pte = %08lx", page);
245 } 213 }
246 } 214 }
247 die("\nOops", regs, ecr); 215 printk("\n");
248 do_exit(SIGKILL); 216 die("Kernel access of bad area", regs, signr);
217 return;
249 218
250 /* 219 /*
251 * We ran out of memory, or some other thing happened to us 220 * We ran out of memory, or some other thing happened to us
252 * that made us unable to handle the page fault gracefully. 221 * that made us unable to handle the page fault gracefully.
253 */ 222 */
254out_of_memory: 223out_of_memory:
255 printk("Out of memory\n");
256 up_read(&mm->mmap_sem); 224 up_read(&mm->mmap_sem);
257 if (current->pid == 1) { 225 if (is_init(current)) {
258 yield(); 226 yield();
259 down_read(&mm->mmap_sem); 227 down_read(&mm->mmap_sem);
260 goto survive; 228 goto survive;
@@ -267,21 +235,20 @@ out_of_memory:
267do_sigbus: 235do_sigbus:
268 up_read(&mm->mmap_sem); 236 up_read(&mm->mmap_sem);
269 237
270 /*
271 * Send a sigbus, regardless of whether we were in kernel or
272 * user mode.
273 */
274 /* address, error_code, trap_no, ... */
275#ifdef DEBUG
276 show_regs(regs);
277 dump_code(regs->pc);
278#endif
279 pr_debug("Sending SIGBUS to PID %d...\n", tsk->pid);
280 force_sig(SIGBUS, tsk);
281
282 /* Kernel mode? Handle exceptions or die */ 238 /* Kernel mode? Handle exceptions or die */
239 signr = SIGBUS;
240 code = BUS_ADRERR;
283 if (!user_mode(regs)) 241 if (!user_mode(regs))
284 goto no_context; 242 goto no_context;
243
244 if (exception_trace)
245 printk("%s%s[%d]: bus error at %08lx pc %08lx "
246 "sp %08lx ecr %lu\n",
247 is_init(tsk) ? KERN_EMERG : KERN_INFO,
248 tsk->comm, tsk->pid, address, regs->pc,
249 regs->sp, ecr);
250
251 _exception(SIGBUS, regs, BUS_ADRERR, address);
285} 252}
286 253
287asmlinkage void do_bus_error(unsigned long addr, int write_access, 254asmlinkage void do_bus_error(unsigned long addr, int write_access,
@@ -292,8 +259,7 @@ asmlinkage void do_bus_error(unsigned long addr, int write_access,
292 addr, write_access ? "write" : "read"); 259 addr, write_access ? "write" : "read");
293 printk(KERN_INFO "DTLB dump:\n"); 260 printk(KERN_INFO "DTLB dump:\n");
294 dump_dtlb(); 261 dump_dtlb();
295 die("Bus Error", regs, write_access); 262 die("Bus Error", regs, SIGKILL);
296 do_exit(SIGKILL);
297} 263}
298 264
299/* 265/*
diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
index 70da6894acc1..82cf70854b90 100644
--- a/arch/avr32/mm/init.c
+++ b/arch/avr32/mm/init.c
@@ -10,11 +10,9 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/swap.h> 11#include <linux/swap.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/initrd.h>
14#include <linux/mmzone.h> 13#include <linux/mmzone.h>
15#include <linux/bootmem.h> 14#include <linux/bootmem.h>
16#include <linux/pagemap.h> 15#include <linux/pagemap.h>
17#include <linux/pfn.h>
18#include <linux/nodemask.h> 16#include <linux/nodemask.h>
19 17
20#include <asm/page.h> 18#include <asm/page.h>
@@ -78,242 +76,6 @@ void show_mem(void)
78 printk ("%d pages swap cached\n", cached); 76 printk ("%d pages swap cached\n", cached);
79} 77}
80 78
81static void __init print_memory_map(const char *what,
82 struct tag_mem_range *mem)
83{
84 printk ("%s:\n", what);
85 for (; mem; mem = mem->next) {
86 printk (" %08lx - %08lx\n",
87 (unsigned long)mem->addr,
88 (unsigned long)(mem->addr + mem->size));
89 }
90}
91
92#define MAX_LOWMEM HIGHMEM_START
93#define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM)
94
95/*
96 * Sort a list of memory regions in-place by ascending address.
97 *
98 * We're using bubble sort because we only have singly linked lists
99 * with few elements.
100 */
101static void __init sort_mem_list(struct tag_mem_range **pmem)
102{
103 int done;
104 struct tag_mem_range **a, **b;
105
106 if (!*pmem)
107 return;
108
109 do {
110 done = 1;
111 a = pmem, b = &(*pmem)->next;
112 while (*b) {
113 if ((*a)->addr > (*b)->addr) {
114 struct tag_mem_range *tmp;
115 tmp = (*b)->next;
116 (*b)->next = *a;
117 *a = *b;
118 *b = tmp;
119 done = 0;
120 }
121 a = &(*a)->next;
122 b = &(*a)->next;
123 }
124 } while (!done);
125}
126
127/*
128 * Find a free memory region large enough for storing the
129 * bootmem bitmap.
130 */
131static unsigned long __init
132find_bootmap_pfn(const struct tag_mem_range *mem)
133{
134 unsigned long bootmap_pages, bootmap_len;
135 unsigned long node_pages = PFN_UP(mem->size);
136 unsigned long bootmap_addr = mem->addr;
137 struct tag_mem_range *reserved = mem_reserved;
138 struct tag_mem_range *ramdisk = mem_ramdisk;
139 unsigned long kern_start = virt_to_phys(_stext);
140 unsigned long kern_end = virt_to_phys(_end);
141
142 bootmap_pages = bootmem_bootmap_pages(node_pages);
143 bootmap_len = bootmap_pages << PAGE_SHIFT;
144
145 /*
146 * Find a large enough region without reserved pages for
147 * storing the bootmem bitmap. We can take advantage of the
148 * fact that all lists have been sorted.
149 *
150 * We have to check explicitly reserved regions as well as the
151 * kernel image and any RAMDISK images...
152 *
153 * Oh, and we have to make sure we don't overwrite the taglist
154 * since we're going to use it until the bootmem allocator is
155 * fully up and running.
156 */
157 while (1) {
158 if ((bootmap_addr < kern_end) &&
159 ((bootmap_addr + bootmap_len) > kern_start))
160 bootmap_addr = kern_end;
161
162 while (reserved &&
163 (bootmap_addr >= (reserved->addr + reserved->size)))
164 reserved = reserved->next;
165
166 if (reserved &&
167 ((bootmap_addr + bootmap_len) >= reserved->addr)) {
168 bootmap_addr = reserved->addr + reserved->size;
169 continue;
170 }
171
172 while (ramdisk &&
173 (bootmap_addr >= (ramdisk->addr + ramdisk->size)))
174 ramdisk = ramdisk->next;
175
176 if (!ramdisk ||
177 ((bootmap_addr + bootmap_len) < ramdisk->addr))
178 break;
179
180 bootmap_addr = ramdisk->addr + ramdisk->size;
181 }
182
183 if ((PFN_UP(bootmap_addr) + bootmap_len) >= (mem->addr + mem->size))
184 return ~0UL;
185
186 return PFN_UP(bootmap_addr);
187}
188
189void __init setup_bootmem(void)
190{
191 unsigned bootmap_size;
192 unsigned long first_pfn, bootmap_pfn, pages;
193 unsigned long max_pfn, max_low_pfn;
194 unsigned long kern_start = virt_to_phys(_stext);
195 unsigned long kern_end = virt_to_phys(_end);
196 unsigned node = 0;
197 struct tag_mem_range *bank, *res;
198
199 sort_mem_list(&mem_phys);
200 sort_mem_list(&mem_reserved);
201
202 print_memory_map("Physical memory", mem_phys);
203 print_memory_map("Reserved memory", mem_reserved);
204
205 nodes_clear(node_online_map);
206
207 if (mem_ramdisk) {
208#ifdef CONFIG_BLK_DEV_INITRD
209 initrd_start = (unsigned long)__va(mem_ramdisk->addr);
210 initrd_end = initrd_start + mem_ramdisk->size;
211
212 print_memory_map("RAMDISK images", mem_ramdisk);
213 if (mem_ramdisk->next)
214 printk(KERN_WARNING
215 "Warning: Only the first RAMDISK image "
216 "will be used\n");
217 sort_mem_list(&mem_ramdisk);
218#else
219 printk(KERN_WARNING "RAM disk image present, but "
220 "no initrd support in kernel!\n");
221#endif
222 }
223
224 if (mem_phys->next)
225 printk(KERN_WARNING "Only using first memory bank\n");
226
227 for (bank = mem_phys; bank; bank = NULL) {
228 first_pfn = PFN_UP(bank->addr);
229 max_low_pfn = max_pfn = PFN_DOWN(bank->addr + bank->size);
230 bootmap_pfn = find_bootmap_pfn(bank);
231 if (bootmap_pfn > max_pfn)
232 panic("No space for bootmem bitmap!\n");
233
234 if (max_low_pfn > MAX_LOWMEM_PFN) {
235 max_low_pfn = MAX_LOWMEM_PFN;
236#ifndef CONFIG_HIGHMEM
237 /*
238 * Lowmem is memory that can be addressed
239 * directly through P1/P2
240 */
241 printk(KERN_WARNING
242 "Node %u: Only %ld MiB of memory will be used.\n",
243 node, MAX_LOWMEM >> 20);
244 printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
245#else
246#error HIGHMEM is not supported by AVR32 yet
247#endif
248 }
249
250 /* Initialize the boot-time allocator with low memory only. */
251 bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn,
252 first_pfn, max_low_pfn);
253
254 printk("Node %u: bdata = %p, bdata->node_bootmem_map = %p\n",
255 node, NODE_DATA(node)->bdata,
256 NODE_DATA(node)->bdata->node_bootmem_map);
257
258 /*
259 * Register fully available RAM pages with the bootmem
260 * allocator.
261 */
262 pages = max_low_pfn - first_pfn;
263 free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn),
264 PFN_PHYS(pages));
265
266 /*
267 * Reserve space for the kernel image (if present in
268 * this node)...
269 */
270 if ((kern_start >= PFN_PHYS(first_pfn)) &&
271 (kern_start < PFN_PHYS(max_pfn))) {
272 printk("Node %u: Kernel image %08lx - %08lx\n",
273 node, kern_start, kern_end);
274 reserve_bootmem_node(NODE_DATA(node), kern_start,
275 kern_end - kern_start);
276 }
277
278 /* ...the bootmem bitmap... */
279 reserve_bootmem_node(NODE_DATA(node),
280 PFN_PHYS(bootmap_pfn),
281 bootmap_size);
282
283 /* ...any RAMDISK images... */
284 for (res = mem_ramdisk; res; res = res->next) {
285 if (res->addr > PFN_PHYS(max_pfn))
286 break;
287
288 if (res->addr >= PFN_PHYS(first_pfn)) {
289 printk("Node %u: RAMDISK %08lx - %08lx\n",
290 node,
291 (unsigned long)res->addr,
292 (unsigned long)(res->addr + res->size));
293 reserve_bootmem_node(NODE_DATA(node),
294 res->addr, res->size);
295 }
296 }
297
298 /* ...and any other reserved regions. */
299 for (res = mem_reserved; res; res = res->next) {
300 if (res->addr > PFN_PHYS(max_pfn))
301 break;
302
303 if (res->addr >= PFN_PHYS(first_pfn)) {
304 printk("Node %u: Reserved %08lx - %08lx\n",
305 node,
306 (unsigned long)res->addr,
307 (unsigned long)(res->addr + res->size));
308 reserve_bootmem_node(NODE_DATA(node),
309 res->addr, res->size);
310 }
311 }
312
313 node_set_online(node);
314 }
315}
316
317/* 79/*
318 * paging_init() sets up the page tables 80 * paging_init() sets up the page tables
319 * 81 *
diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index 424e9257c9a0..f26077a773d5 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -427,7 +427,6 @@ make_new_skb(struct net_device *dev)
427 printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name); 427 printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name);
428 return NULL; 428 return NULL;
429 } 429 }
430 nskb->dev = dev;
431 430
432 skb_reserve(nskb, 2); /* Align IP on 16 byte boundaries */ 431 skb_reserve(nskb, 2); /* Align IP on 16 byte boundaries */
433 432
@@ -474,7 +473,7 @@ simeth_rx(struct net_device *dev)
474 * XXX Fix me 473 * XXX Fix me
475 * Should really do a csum+copy here 474 * Should really do a csum+copy here
476 */ 475 */
477 memcpy(skb->data, frame, len); 476 skb_copy_to_linear_data(skb, frame, len);
478#endif 477#endif
479 skb->protocol = eth_type_trans(skb, dev); 478 skb->protocol = eth_type_trans(skb, dev);
480 479
diff --git a/arch/ia64/sn/kernel/xpnet.c b/arch/ia64/sn/kernel/xpnet.c
index c8173db0d84f..5419acb89a8c 100644
--- a/arch/ia64/sn/kernel/xpnet.c
+++ b/arch/ia64/sn/kernel/xpnet.c
@@ -233,7 +233,7 @@ xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg)
233 "%lu)\n", skb->data, &msg->data, 233 "%lu)\n", skb->data, &msg->data,
234 (size_t) msg->embedded_bytes); 234 (size_t) msg->embedded_bytes);
235 235
236 memcpy(skb->data, &msg->data, (size_t) msg->embedded_bytes); 236 skb_copy_to_linear_data(skb, &msg->data, (size_t)msg->embedded_bytes);
237 } else { 237 } else {
238 dev_dbg(xpnet, "transferring buffer to the skb->data area;\n\t" 238 dev_dbg(xpnet, "transferring buffer to the skb->data area;\n\t"
239 "bte_copy(0x%p, 0x%p, %hu)\n", (void *)msg->buf_pa, 239 "bte_copy(0x%p, 0x%p, %hu)\n", (void *)msg->buf_pa,
@@ -264,17 +264,16 @@ xpnet_receive(partid_t partid, int channel, struct xpnet_message *msg)
264 264
265 dev_dbg(xpnet, "<skb->head=0x%p skb->data=0x%p skb->tail=0x%p " 265 dev_dbg(xpnet, "<skb->head=0x%p skb->data=0x%p skb->tail=0x%p "
266 "skb->end=0x%p skb->len=%d\n", (void *) skb->head, 266 "skb->end=0x%p skb->len=%d\n", (void *) skb->head,
267 (void *) skb->data, (void *) skb->tail, (void *) skb->end, 267 (void *)skb->data, skb_tail_pointer(skb), skb_end_pointer(skb),
268 skb->len); 268 skb->len);
269 269
270 skb->dev = xpnet_device;
271 skb->protocol = eth_type_trans(skb, xpnet_device); 270 skb->protocol = eth_type_trans(skb, xpnet_device);
272 skb->ip_summed = CHECKSUM_UNNECESSARY; 271 skb->ip_summed = CHECKSUM_UNNECESSARY;
273 272
274 dev_dbg(xpnet, "passing skb to network layer; \n\tskb->head=0x%p " 273 dev_dbg(xpnet, "passing skb to network layer; \n\tskb->head=0x%p "
275 "skb->data=0x%p skb->tail=0x%p skb->end=0x%p skb->len=%d\n", 274 "skb->data=0x%p skb->tail=0x%p skb->end=0x%p skb->len=%d\n",
276 (void *) skb->head, (void *) skb->data, (void *) skb->tail, 275 (void *)skb->head, (void *)skb->data, skb_tail_pointer(skb),
277 (void *) skb->end, skb->len); 276 skb_end_pointer(skb), skb->len);
278 277
279 278
280 xpnet_device->last_rx = jiffies; 279 xpnet_device->last_rx = jiffies;
@@ -476,7 +475,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
476 475
477 dev_dbg(xpnet, ">skb->head=0x%p skb->data=0x%p skb->tail=0x%p " 476 dev_dbg(xpnet, ">skb->head=0x%p skb->data=0x%p skb->tail=0x%p "
478 "skb->end=0x%p skb->len=%d\n", (void *) skb->head, 477 "skb->end=0x%p skb->len=%d\n", (void *) skb->head,
479 (void *) skb->data, (void *) skb->tail, (void *) skb->end, 478 (void *)skb->data, skb_tail_pointer(skb), skb_end_pointer(skb),
480 skb->len); 479 skb->len);
481 480
482 481
@@ -498,7 +497,7 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
498 497
499 /* get the beginning of the first cacheline and end of last */ 498 /* get the beginning of the first cacheline and end of last */
500 start_addr = ((u64) skb->data & ~(L1_CACHE_BYTES - 1)); 499 start_addr = ((u64) skb->data & ~(L1_CACHE_BYTES - 1));
501 end_addr = L1_CACHE_ALIGN((u64) skb->tail); 500 end_addr = L1_CACHE_ALIGN((u64)skb_tail_pointer(skb));
502 501
503 /* calculate how many bytes to embed in the XPC message */ 502 /* calculate how many bytes to embed in the XPC message */
504 embedded_bytes = 0; 503 embedded_bytes = 0;
@@ -567,14 +566,15 @@ xpnet_dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
567 msg->version = XPNET_VERSION_EMBED; 566 msg->version = XPNET_VERSION_EMBED;
568 dev_dbg(xpnet, "calling memcpy(0x%p, 0x%p, 0x%lx)\n", 567 dev_dbg(xpnet, "calling memcpy(0x%p, 0x%p, 0x%lx)\n",
569 &msg->data, skb->data, (size_t) embedded_bytes); 568 &msg->data, skb->data, (size_t) embedded_bytes);
570 memcpy(&msg->data, skb->data, (size_t) embedded_bytes); 569 skb_copy_from_linear_data(skb, &msg->data,
570 (size_t)embedded_bytes);
571 } else { 571 } else {
572 msg->version = XPNET_VERSION; 572 msg->version = XPNET_VERSION;
573 } 573 }
574 msg->magic = XPNET_MAGIC; 574 msg->magic = XPNET_MAGIC;
575 msg->size = end_addr - start_addr; 575 msg->size = end_addr - start_addr;
576 msg->leadin_ignore = (u64) skb->data - start_addr; 576 msg->leadin_ignore = (u64) skb->data - start_addr;
577 msg->tailout_ignore = end_addr - (u64) skb->tail; 577 msg->tailout_ignore = end_addr - (u64)skb_tail_pointer(skb);
578 msg->buf_pa = __pa(start_addr); 578 msg->buf_pa = __pa(start_addr);
579 579
580 dev_dbg(xpnet, "sending XPC message to %d:%d\nmsg->buf_pa=" 580 dev_dbg(xpnet, "sending XPC message to %d:%d\nmsg->buf_pa="
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c78b14380b3e..130d825e5438 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -10,7 +10,6 @@ menu "Machine selection"
10 10
11config ZONE_DMA 11config ZONE_DMA
12 bool 12 bool
13 default y
14 13
15choice 14choice
16 prompt "System type" 15 prompt "System type"
@@ -165,7 +164,7 @@ config MIPS_COBALT
165 select HW_HAS_PCI 164 select HW_HAS_PCI
166 select I8259 165 select I8259
167 select IRQ_CPU 166 select IRQ_CPU
168 select MIPS_GT64111 167 select PCI_GT64XXX_PCI0
169 select SYS_HAS_CPU_NEVADA 168 select SYS_HAS_CPU_NEVADA
170 select SYS_HAS_EARLY_PRINTK 169 select SYS_HAS_EARLY_PRINTK
171 select SYS_SUPPORTS_32BIT_KERNEL 170 select SYS_SUPPORTS_32BIT_KERNEL
@@ -207,7 +206,7 @@ config MIPS_EV64120
207 depends on EXPERIMENTAL 206 depends on EXPERIMENTAL
208 select DMA_NONCOHERENT 207 select DMA_NONCOHERENT
209 select HW_HAS_PCI 208 select HW_HAS_PCI
210 select MIPS_GT64120 209 select PCI_GT64XXX_PCI0
211 select SYS_HAS_CPU_R5000 210 select SYS_HAS_CPU_R5000
212 select SYS_SUPPORTS_32BIT_KERNEL 211 select SYS_SUPPORTS_32BIT_KERNEL
213 select SYS_SUPPORTS_64BIT_KERNEL 212 select SYS_SUPPORTS_64BIT_KERNEL
@@ -245,7 +244,7 @@ config LASAT
245 select DMA_NONCOHERENT 244 select DMA_NONCOHERENT
246 select SYS_HAS_EARLY_PRINTK 245 select SYS_HAS_EARLY_PRINTK
247 select HW_HAS_PCI 246 select HW_HAS_PCI
248 select MIPS_GT64120 247 select PCI_GT64XXX_PCI0
249 select MIPS_NILE4 248 select MIPS_NILE4
250 select R5000_CPU_SCACHE 249 select R5000_CPU_SCACHE
251 select SYS_HAS_CPU_R5000 250 select SYS_HAS_CPU_R5000
@@ -263,7 +262,7 @@ config MIPS_ATLAS
263 select HW_HAS_PCI 262 select HW_HAS_PCI
264 select MIPS_BOARDS_GEN 263 select MIPS_BOARDS_GEN
265 select MIPS_BONITO64 264 select MIPS_BONITO64
266 select MIPS_GT64120 265 select PCI_GT64XXX_PCI0
267 select MIPS_MSC 266 select MIPS_MSC
268 select RM7000_CPU_SCACHE 267 select RM7000_CPU_SCACHE
269 select SWAP_IO_SPACE 268 select SWAP_IO_SPACE
@@ -296,7 +295,7 @@ config MIPS_MALTA
296 select MIPS_BOARDS_GEN 295 select MIPS_BOARDS_GEN
297 select MIPS_BONITO64 296 select MIPS_BONITO64
298 select MIPS_CPU_SCACHE 297 select MIPS_CPU_SCACHE
299 select MIPS_GT64120 298 select PCI_GT64XXX_PCI0
300 select MIPS_MSC 299 select MIPS_MSC
301 select SWAP_IO_SPACE 300 select SWAP_IO_SPACE
302 select SYS_HAS_CPU_MIPS32_R1 301 select SYS_HAS_CPU_MIPS32_R1
@@ -340,7 +339,7 @@ config WR_PPMC
340 select BOOT_ELF32 339 select BOOT_ELF32
341 select DMA_NONCOHERENT 340 select DMA_NONCOHERENT
342 select HW_HAS_PCI 341 select HW_HAS_PCI
343 select MIPS_GT64120 342 select PCI_GT64XXX_PCI0
344 select SWAP_IO_SPACE 343 select SWAP_IO_SPACE
345 select SYS_HAS_CPU_MIPS32_R1 344 select SYS_HAS_CPU_MIPS32_R1
346 select SYS_HAS_CPU_MIPS32_R2 345 select SYS_HAS_CPU_MIPS32_R2
@@ -398,7 +397,7 @@ config MOMENCO_OCELOT
398 select HW_HAS_PCI 397 select HW_HAS_PCI
399 select IRQ_CPU 398 select IRQ_CPU
400 select IRQ_CPU_RM7K 399 select IRQ_CPU_RM7K
401 select MIPS_GT64120 400 select PCI_GT64XXX_PCI0
402 select RM7000_CPU_SCACHE 401 select RM7000_CPU_SCACHE
403 select SWAP_IO_SPACE 402 select SWAP_IO_SPACE
404 select SYS_HAS_CPU_RM7000 403 select SYS_HAS_CPU_RM7000
@@ -501,10 +500,8 @@ config DDB5477
501 ether port USB, AC97, PCI, etc. 500 ether port USB, AC97, PCI, etc.
502 501
503config MACH_VR41XX 502config MACH_VR41XX
504 bool "NEC VR41XX-based machines" 503 bool "NEC VR4100 series based machines"
505 select SYS_HAS_CPU_VR41XX 504 select SYS_HAS_CPU_VR41XX
506 select SYS_SUPPORTS_32BIT_KERNEL
507 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
508 select GENERIC_HARDIRQS_NO__DO_IRQ 505 select GENERIC_HARDIRQS_NO__DO_IRQ
509 506
510config PMC_YOSEMITE 507config PMC_YOSEMITE
@@ -779,6 +776,7 @@ config TOSHIBA_JMR3927
779 select SYS_SUPPORTS_LITTLE_ENDIAN 776 select SYS_SUPPORTS_LITTLE_ENDIAN
780 select SYS_SUPPORTS_BIG_ENDIAN 777 select SYS_SUPPORTS_BIG_ENDIAN
781 select TOSHIBA_BOARDS 778 select TOSHIBA_BOARDS
779 select GENERIC_HARDIRQS_NO__DO_IRQ
782 780
783config TOSHIBA_RBTX4927 781config TOSHIBA_RBTX4927
784 bool "Toshiba TBTX49[23]7 board" 782 bool "Toshiba TBTX49[23]7 board"
@@ -922,6 +920,7 @@ config SYS_HAS_EARLY_PRINTK
922 920
923config GENERIC_ISA_DMA 921config GENERIC_ISA_DMA
924 bool 922 bool
923 select ZONE_DMA
925 924
926config I8259 925config I8259
927 bool 926 bool
@@ -945,6 +944,7 @@ config MIPS_DISABLE_OBSOLETE_IDE
945 944
946config GENERIC_ISA_DMA_SUPPORT_BROKEN 945config GENERIC_ISA_DMA_SUPPORT_BROKEN
947 bool 946 bool
947 select ZONE_DMA
948 948
949# 949#
950# Endianess selection. Sufficiently obscure so many users don't know what to 950# Endianess selection. Sufficiently obscure so many users don't know what to
@@ -999,10 +999,7 @@ config DDB5XXX_COMMON
999config MIPS_BOARDS_GEN 999config MIPS_BOARDS_GEN
1000 bool 1000 bool
1001 1001
1002config MIPS_GT64111 1002config PCI_GT64XXX_PCI0
1003 bool
1004
1005config MIPS_GT64120
1006 bool 1003 bool
1007 1004
1008config MIPS_TX3927 1005config MIPS_TX3927
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 92bca6ad6ab1..f2f742df32c7 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -530,25 +530,29 @@ cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
530load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 530load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
531 531
532# 532#
533# Sibyte SB1250 SOC 533# Sibyte SB1250/BCM1480 SOC
534# 534#
535# This is a LIB so that it links at the end, and initcalls are later 535# This is a LIB so that it links at the end, and initcalls are later
536# the sequence; but it is built as an object so that modules don't get 536# the sequence; but it is built as an object so that modules don't get
537# removed (as happens, even if they have __initcall/module_init) 537# removed (as happens, even if they have __initcall/module_init)
538# 538#
539core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ 539core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
540core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
540cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \ 541cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
541 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL 542 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
542 543
543core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ 544core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
545core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
544cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \ 546cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
545 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL 547 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
546 548
547core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/ 549core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
550core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
548cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \ 551cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
549 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL 552 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
550 553
551core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/ 554core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
555core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
552cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \ 556cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
553 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL 557 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
554 558
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 42f0eda1d51f..2f0e4c08eb04 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -63,7 +63,7 @@ volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD);
63volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN); 63volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN);
64 64
65/* Protect access to shared GPI registers */ 65/* Protect access to shared GPI registers */
66spinlock_t titan_lock = SPIN_LOCK_UNLOCKED; 66DEFINE_SPINLOCK(titan_lock);
67int titan_irqflags; 67int titan_irqflags;
68 68
69 69
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index b36dd8f538f9..de017c11f9b7 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -4,5 +4,6 @@
4 4
5obj-y := irq.o reset.o setup.o 5obj-y := irq.o reset.o setup.o
6 6
7obj-$(CONFIG_PCI) += pci.o
7obj-$(CONFIG_EARLY_PRINTK) += console.o 8obj-$(CONFIG_EARLY_PRINTK) += console.o
8obj-$(CONFIG_MTD_PHYSMAP) += mtd.o 9obj-$(CONFIG_MTD_PHYSMAP) += mtd.o
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index ca56b415b8ac..0485d51f7216 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -1,13 +1,11 @@
1/* 1/*
2 * (C) P. Horton 2006 2 * (C) P. Horton 2006
3 */ 3 */
4
5#include <linux/init.h>
6#include <linux/kernel.h>
7#include <linux/console.h>
8#include <linux/serial_reg.h> 4#include <linux/serial_reg.h>
5
9#include <asm/addrspace.h> 6#include <asm/addrspace.h>
10#include <asm/mach-cobalt/cobalt.h> 7
8#include <cobalt.h>
11 9
12void prom_putchar(char c) 10void prom_putchar(char c)
13{ 11{
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index fe93b846923b..950ad1e8be44 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -17,7 +17,7 @@
17#include <asm/irq_cpu.h> 17#include <asm/irq_cpu.h>
18#include <asm/gt64120.h> 18#include <asm/gt64120.h>
19 19
20#include <asm/mach-cobalt/cobalt.h> 20#include <cobalt.h>
21 21
22/* 22/*
23 * We have two types of interrupts that we handle, ones that come in through 23 * We have two types of interrupts that we handle, ones that come in through
diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c
new file mode 100644
index 000000000000..d91027f43de6
--- /dev/null
+++ b/arch/mips/cobalt/pci.c
@@ -0,0 +1,47 @@
1/*
2 * Register PCI controller.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10 *
11 */
12#include <linux/init.h>
13#include <linux/pci.h>
14
15#include <asm/gt64120.h>
16
17extern struct pci_ops gt64xxx_pci0_ops;
18
19static struct resource cobalt_mem_resource = {
20 .start = GT_DEF_PCI0_MEM0_BASE,
21 .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
22 .name = "PCI memory",
23 .flags = IORESOURCE_MEM,
24};
25
26static struct resource cobalt_io_resource = {
27 .start = 0x1000,
28 .end = GT_DEF_PCI0_IO_SIZE - 1,
29 .name = "PCI I/O",
30 .flags = IORESOURCE_IO,
31};
32
33static struct pci_controller cobalt_pci_controller = {
34 .pci_ops = &gt64xxx_pci0_ops,
35 .mem_resource = &cobalt_mem_resource,
36 .io_resource = &cobalt_io_resource,
37 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
38};
39
40static int __init cobalt_pci_init(void)
41{
42 register_pci_controller(&cobalt_pci_controller);
43
44 return 0;
45}
46
47arch_initcall(cobalt_pci_init);
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 753dfccae6fa..43cca21fdbc0 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -8,15 +8,12 @@
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle 8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv) 9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 */ 10 */
11#include <linux/sched.h> 11#include <linux/jiffies.h>
12#include <linux/mm.h> 12
13#include <asm/cacheflush.h>
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/processor.h>
16#include <asm/reboot.h> 14#include <asm/reboot.h>
17#include <asm/system.h> 15
18#include <asm/mipsregs.h> 16#include <cobalt.h>
19#include <asm/mach-cobalt/cobalt.h>
20 17
21void cobalt_machine_halt(void) 18void cobalt_machine_halt(void)
22{ 19{
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 88d34f11385a..d0dd81790f74 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -19,12 +19,10 @@
19#include <asm/bootinfo.h> 19#include <asm/bootinfo.h>
20#include <asm/time.h> 20#include <asm/time.h>
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/processor.h>
24#include <asm/reboot.h> 22#include <asm/reboot.h>
25#include <asm/gt64120.h> 23#include <asm/gt64120.h>
26 24
27#include <asm/mach-cobalt/cobalt.h> 25#include <cobalt.h>
28 26
29extern void cobalt_machine_restart(char *command); 27extern void cobalt_machine_restart(char *command);
30extern void cobalt_machine_halt(void); 28extern void cobalt_machine_halt(void);
@@ -63,22 +61,6 @@ void __init plat_timer_setup(struct irqaction *irq)
63 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS)); 61 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
64} 62}
65 63
66extern struct pci_ops gt64111_pci_ops;
67
68static struct resource cobalt_mem_resource = {
69 .start = GT_DEF_PCI0_MEM0_BASE,
70 .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
71 .name = "PCI memory",
72 .flags = IORESOURCE_MEM
73};
74
75static struct resource cobalt_io_resource = {
76 .start = 0x1000,
77 .end = 0xffff,
78 .name = "PCI I/O",
79 .flags = IORESOURCE_IO
80};
81
82/* 64/*
83 * Cobalt doesn't have PS/2 keyboard/mouse interfaces, 65 * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
84 * keyboard conntroller is never used. 66 * keyboard conntroller is never used.
@@ -111,14 +93,6 @@ static struct resource cobalt_reserved_resources[] = {
111 }, 93 },
112}; 94};
113 95
114static struct pci_controller cobalt_pci_controller = {
115 .pci_ops = &gt64111_pci_ops,
116 .mem_resource = &cobalt_mem_resource,
117 .mem_offset = 0,
118 .io_resource = &cobalt_io_resource,
119 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
120};
121
122void __init plat_mem_setup(void) 96void __init plat_mem_setup(void)
123{ 97{
124 static struct uart_port uart; 98 static struct uart_port uart;
@@ -146,10 +120,6 @@ void __init plat_mem_setup(void)
146 120
147 printk("Cobalt board ID: %d\n", cobalt_board_id); 121 printk("Cobalt board ID: %d\n", cobalt_board_id);
148 122
149#ifdef CONFIG_PCI
150 register_pci_controller(&cobalt_pci_controller);
151#endif
152
153 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { 123 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
154#ifdef CONFIG_SERIAL_8250 124#ifdef CONFIG_SERIAL_8250
155 uart.line = 0; 125 uart.line = 0;
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 21a094752dab..068e48ec7093 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20 3# Linux kernel version: 2.6.21-rc3
4# Tue Feb 20 21:47:34 2007 4# Thu Mar 15 00:40:40 2007
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -70,7 +70,7 @@ CONFIG_GENERIC_HWEIGHT=y
70CONFIG_GENERIC_CALIBRATE_DELAY=y 70CONFIG_GENERIC_CALIBRATE_DELAY=y
71CONFIG_GENERIC_TIME=y 71CONFIG_GENERIC_TIME=y
72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
73# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 73CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
74CONFIG_DMA_NONCOHERENT=y 74CONFIG_DMA_NONCOHERENT=y
75CONFIG_DMA_NEED_PCI_MAP_STATE=y 75CONFIG_DMA_NEED_PCI_MAP_STATE=y
76CONFIG_CPU_BIG_ENDIAN=y 76CONFIG_CPU_BIG_ENDIAN=y
@@ -138,12 +138,12 @@ CONFIG_ZONE_DMA_FLAG=1
138# CONFIG_HZ_48 is not set 138# CONFIG_HZ_48 is not set
139# CONFIG_HZ_100 is not set 139# CONFIG_HZ_100 is not set
140# CONFIG_HZ_128 is not set 140# CONFIG_HZ_128 is not set
141# CONFIG_HZ_250 is not set 141CONFIG_HZ_250=y
142# CONFIG_HZ_256 is not set 142# CONFIG_HZ_256 is not set
143CONFIG_HZ_1000=y 143# CONFIG_HZ_1000 is not set
144# CONFIG_HZ_1024 is not set 144# CONFIG_HZ_1024 is not set
145CONFIG_SYS_SUPPORTS_ARBIT_HZ=y 145CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
146CONFIG_HZ=1000 146CONFIG_HZ=250
147CONFIG_PREEMPT_NONE=y 147CONFIG_PREEMPT_NONE=y
148# CONFIG_PREEMPT_VOLUNTARY is not set 148# CONFIG_PREEMPT_VOLUNTARY is not set
149# CONFIG_PREEMPT is not set 149# CONFIG_PREEMPT is not set
@@ -175,14 +175,15 @@ CONFIG_SYSVIPC_SYSCTL=y
175# CONFIG_AUDIT is not set 175# CONFIG_AUDIT is not set
176# CONFIG_IKCONFIG is not set 176# CONFIG_IKCONFIG is not set
177CONFIG_SYSFS_DEPRECATED=y 177CONFIG_SYSFS_DEPRECATED=y
178CONFIG_RELAY=y 178# CONFIG_RELAY is not set
179# CONFIG_BLK_DEV_INITRD is not set
179# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 180# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
180CONFIG_SYSCTL=y 181CONFIG_SYSCTL=y
181CONFIG_EMBEDDED=y 182CONFIG_EMBEDDED=y
182CONFIG_SYSCTL_SYSCALL=y 183CONFIG_SYSCTL_SYSCALL=y
183CONFIG_KALLSYMS=y 184CONFIG_KALLSYMS=y
184# CONFIG_KALLSYMS_EXTRA_PASS is not set 185# CONFIG_KALLSYMS_EXTRA_PASS is not set
185CONFIG_HOTPLUG=y 186# CONFIG_HOTPLUG is not set
186CONFIG_PRINTK=y 187CONFIG_PRINTK=y
187CONFIG_BUG=y 188CONFIG_BUG=y
188CONFIG_ELF_CORE=y 189CONFIG_ELF_CORE=y
@@ -217,11 +218,11 @@ CONFIG_IOSCHED_NOOP=y
217CONFIG_IOSCHED_AS=y 218CONFIG_IOSCHED_AS=y
218CONFIG_IOSCHED_DEADLINE=y 219CONFIG_IOSCHED_DEADLINE=y
219CONFIG_IOSCHED_CFQ=y 220CONFIG_IOSCHED_CFQ=y
220CONFIG_DEFAULT_AS=y 221# CONFIG_DEFAULT_AS is not set
221# CONFIG_DEFAULT_DEADLINE is not set 222# CONFIG_DEFAULT_DEADLINE is not set
222# CONFIG_DEFAULT_CFQ is not set 223CONFIG_DEFAULT_CFQ=y
223# CONFIG_DEFAULT_NOOP is not set 224# CONFIG_DEFAULT_NOOP is not set
224CONFIG_DEFAULT_IOSCHED="anticipatory" 225CONFIG_DEFAULT_IOSCHED="cfq"
225 226
226# 227#
227# Bus options (PCI, PCMCIA, EISA, ISA, TC) 228# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -233,12 +234,10 @@ CONFIG_MMU=y
233# 234#
234# PCCARD (PCMCIA/CardBus) support 235# PCCARD (PCMCIA/CardBus) support
235# 236#
236# CONFIG_PCCARD is not set
237 237
238# 238#
239# PCI Hotplug Support 239# PCI Hotplug Support
240# 240#
241# CONFIG_HOTPLUG_PCI is not set
242 241
243# 242#
244# Executable file formats 243# Executable file formats
@@ -250,10 +249,7 @@ CONFIG_TRAD_SIGNALS=y
250# 249#
251# Power management options 250# Power management options
252# 251#
253CONFIG_PM=y 252# CONFIG_PM is not set
254# CONFIG_PM_LEGACY is not set
255# CONFIG_PM_DEBUG is not set
256# CONFIG_PM_SYSFS_DEPRECATED is not set
257 253
258# 254#
259# Networking 255# Networking
@@ -267,12 +263,7 @@ CONFIG_NET=y
267CONFIG_PACKET=y 263CONFIG_PACKET=y
268# CONFIG_PACKET_MMAP is not set 264# CONFIG_PACKET_MMAP is not set
269CONFIG_UNIX=y 265CONFIG_UNIX=y
270CONFIG_XFRM=y 266# CONFIG_NET_KEY is not set
271CONFIG_XFRM_USER=y
272# CONFIG_XFRM_SUB_POLICY is not set
273CONFIG_XFRM_MIGRATE=y
274CONFIG_NET_KEY=y
275CONFIG_NET_KEY_MIGRATE=y
276CONFIG_INET=y 267CONFIG_INET=y
277# CONFIG_IP_MULTICAST is not set 268# CONFIG_IP_MULTICAST is not set
278# CONFIG_IP_ADVANCED_ROUTER is not set 269# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -290,19 +281,18 @@ CONFIG_IP_PNP_BOOTP=y
290# CONFIG_INET_IPCOMP is not set 281# CONFIG_INET_IPCOMP is not set
291# CONFIG_INET_XFRM_TUNNEL is not set 282# CONFIG_INET_XFRM_TUNNEL is not set
292# CONFIG_INET_TUNNEL is not set 283# CONFIG_INET_TUNNEL is not set
293CONFIG_INET_XFRM_MODE_TRANSPORT=y 284# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
294CONFIG_INET_XFRM_MODE_TUNNEL=y 285# CONFIG_INET_XFRM_MODE_TUNNEL is not set
295CONFIG_INET_XFRM_MODE_BEET=y 286# CONFIG_INET_XFRM_MODE_BEET is not set
296CONFIG_INET_DIAG=y 287# CONFIG_INET_DIAG is not set
297CONFIG_INET_TCP_DIAG=y
298# CONFIG_TCP_CONG_ADVANCED is not set 288# CONFIG_TCP_CONG_ADVANCED is not set
299CONFIG_TCP_CONG_CUBIC=y 289CONFIG_TCP_CONG_CUBIC=y
300CONFIG_DEFAULT_TCP_CONG="cubic" 290CONFIG_DEFAULT_TCP_CONG="cubic"
301CONFIG_TCP_MD5SIG=y 291# CONFIG_TCP_MD5SIG is not set
302# CONFIG_IPV6 is not set 292# CONFIG_IPV6 is not set
303# CONFIG_INET6_XFRM_TUNNEL is not set 293# CONFIG_INET6_XFRM_TUNNEL is not set
304# CONFIG_INET6_TUNNEL is not set 294# CONFIG_INET6_TUNNEL is not set
305CONFIG_NETWORK_SECMARK=y 295# CONFIG_NETWORK_SECMARK is not set
306# CONFIG_NETFILTER is not set 296# CONFIG_NETFILTER is not set
307 297
308# 298#
@@ -343,13 +333,7 @@ CONFIG_NETWORK_SECMARK=y
343# CONFIG_HAMRADIO is not set 333# CONFIG_HAMRADIO is not set
344# CONFIG_IRDA is not set 334# CONFIG_IRDA is not set
345# CONFIG_BT is not set 335# CONFIG_BT is not set
346CONFIG_IEEE80211=y 336# CONFIG_IEEE80211 is not set
347# CONFIG_IEEE80211_DEBUG is not set
348CONFIG_IEEE80211_CRYPT_WEP=y
349CONFIG_IEEE80211_CRYPT_CCMP=y
350CONFIG_IEEE80211_SOFTMAC=y
351# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
352CONFIG_WIRELESS_EXT=y
353 337
354# 338#
355# Device Drivers 339# Device Drivers
@@ -360,14 +344,12 @@ CONFIG_WIRELESS_EXT=y
360# 344#
361CONFIG_STANDALONE=y 345CONFIG_STANDALONE=y
362CONFIG_PREVENT_FIRMWARE_BUILD=y 346CONFIG_PREVENT_FIRMWARE_BUILD=y
363CONFIG_FW_LOADER=y
364# CONFIG_SYS_HYPERVISOR is not set 347# CONFIG_SYS_HYPERVISOR is not set
365 348
366# 349#
367# Connector - unified userspace <-> kernelspace linker 350# Connector - unified userspace <-> kernelspace linker
368# 351#
369CONFIG_CONNECTOR=y 352# CONFIG_CONNECTOR is not set
370CONFIG_PROC_EVENTS=y
371 353
372# 354#
373# Memory Technology Devices (MTD) 355# Memory Technology Devices (MTD)
@@ -396,16 +378,13 @@ CONFIG_PROC_EVENTS=y
396# CONFIG_BLK_DEV_NBD is not set 378# CONFIG_BLK_DEV_NBD is not set
397# CONFIG_BLK_DEV_SX8 is not set 379# CONFIG_BLK_DEV_SX8 is not set
398# CONFIG_BLK_DEV_RAM is not set 380# CONFIG_BLK_DEV_RAM is not set
399# CONFIG_BLK_DEV_INITRD is not set 381# CONFIG_CDROM_PKTCDVD is not set
400CONFIG_CDROM_PKTCDVD=y 382# CONFIG_ATA_OVER_ETH is not set
401CONFIG_CDROM_PKTCDVD_BUFFERS=8
402# CONFIG_CDROM_PKTCDVD_WCACHE is not set
403CONFIG_ATA_OVER_ETH=y
404 383
405# 384#
406# Misc devices 385# Misc devices
407# 386#
408CONFIG_SGI_IOC4=y 387# CONFIG_SGI_IOC4 is not set
409# CONFIG_TIFM_CORE is not set 388# CONFIG_TIFM_CORE is not set
410 389
411# 390#
@@ -416,7 +395,7 @@ CONFIG_SGI_IOC4=y
416# 395#
417# SCSI device support 396# SCSI device support
418# 397#
419CONFIG_RAID_ATTRS=y 398# CONFIG_RAID_ATTRS is not set
420# CONFIG_SCSI is not set 399# CONFIG_SCSI is not set
421# CONFIG_SCSI_NETLINK is not set 400# CONFIG_SCSI_NETLINK is not set
422 401
@@ -462,26 +441,13 @@ CONFIG_NETDEVICES=y
462# 441#
463# PHY device support 442# PHY device support
464# 443#
465CONFIG_PHYLIB=y 444# CONFIG_PHYLIB is not set
466
467#
468# MII PHY device drivers
469#
470CONFIG_MARVELL_PHY=y
471CONFIG_DAVICOM_PHY=y
472CONFIG_QSEMI_PHY=y
473CONFIG_LXT_PHY=y
474CONFIG_CICADA_PHY=y
475CONFIG_VITESSE_PHY=y
476CONFIG_SMSC_PHY=y
477# CONFIG_BROADCOM_PHY is not set
478# CONFIG_FIXED_PHY is not set
479 445
480# 446#
481# Ethernet (10 or 100Mbit) 447# Ethernet (10 or 100Mbit)
482# 448#
483CONFIG_NET_ETHERNET=y 449CONFIG_NET_ETHERNET=y
484# CONFIG_MII is not set 450CONFIG_MII=y
485# CONFIG_HAPPYMEAL is not set 451# CONFIG_HAPPYMEAL is not set
486# CONFIG_SUNGEM is not set 452# CONFIG_SUNGEM is not set
487# CONFIG_CASSINI is not set 453# CONFIG_CASSINI is not set
@@ -493,7 +459,27 @@ CONFIG_NET_ETHERNET=y
493# 459#
494# CONFIG_NET_TULIP is not set 460# CONFIG_NET_TULIP is not set
495# CONFIG_HP100 is not set 461# CONFIG_HP100 is not set
496# CONFIG_NET_PCI is not set 462CONFIG_NET_PCI=y
463# CONFIG_PCNET32 is not set
464# CONFIG_AMD8111_ETH is not set
465# CONFIG_ADAPTEC_STARFIRE is not set
466# CONFIG_B44 is not set
467# CONFIG_FORCEDETH is not set
468CONFIG_TC35815=y
469# CONFIG_DGRS is not set
470# CONFIG_EEPRO100 is not set
471# CONFIG_E100 is not set
472# CONFIG_FEALNX is not set
473# CONFIG_NATSEMI is not set
474# CONFIG_NE2K_PCI is not set
475# CONFIG_8139CP is not set
476# CONFIG_8139TOO is not set
477# CONFIG_SIS900 is not set
478# CONFIG_EPIC100 is not set
479# CONFIG_SUNDANCE is not set
480# CONFIG_TLAN is not set
481# CONFIG_VIA_RHINE is not set
482# CONFIG_SC92031 is not set
497 483
498# 484#
499# Ethernet (1000 Mbit) 485# Ethernet (1000 Mbit)
@@ -509,20 +495,21 @@ CONFIG_NET_ETHERNET=y
509# CONFIG_SKGE is not set 495# CONFIG_SKGE is not set
510# CONFIG_SKY2 is not set 496# CONFIG_SKY2 is not set
511# CONFIG_SK98LIN is not set 497# CONFIG_SK98LIN is not set
498# CONFIG_VIA_VELOCITY is not set
512# CONFIG_TIGON3 is not set 499# CONFIG_TIGON3 is not set
513# CONFIG_BNX2 is not set 500# CONFIG_BNX2 is not set
514CONFIG_QLA3XXX=y 501# CONFIG_QLA3XXX is not set
515# CONFIG_ATL1 is not set 502# CONFIG_ATL1 is not set
516 503
517# 504#
518# Ethernet (10000 Mbit) 505# Ethernet (10000 Mbit)
519# 506#
520# CONFIG_CHELSIO_T1 is not set 507# CONFIG_CHELSIO_T1 is not set
521CONFIG_CHELSIO_T3=y 508# CONFIG_CHELSIO_T3 is not set
522# CONFIG_IXGB is not set 509# CONFIG_IXGB is not set
523# CONFIG_S2IO is not set 510# CONFIG_S2IO is not set
524# CONFIG_MYRI10GE is not set 511# CONFIG_MYRI10GE is not set
525CONFIG_NETXEN_NIC=y 512# CONFIG_NETXEN_NIC is not set
526 513
527# 514#
528# Token Ring devices 515# Token Ring devices
@@ -566,10 +553,7 @@ CONFIG_INPUT=y
566# 553#
567# Userland interfaces 554# Userland interfaces
568# 555#
569CONFIG_INPUT_MOUSEDEV=y 556# CONFIG_INPUT_MOUSEDEV is not set
570CONFIG_INPUT_MOUSEDEV_PSAUX=y
571CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
572CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
573# CONFIG_INPUT_JOYDEV is not set 557# CONFIG_INPUT_JOYDEV is not set
574# CONFIG_INPUT_TSDEV is not set 558# CONFIG_INPUT_TSDEV is not set
575# CONFIG_INPUT_EVDEV is not set 559# CONFIG_INPUT_EVDEV is not set
@@ -587,21 +571,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
587# 571#
588# Hardware I/O ports 572# Hardware I/O ports
589# 573#
590CONFIG_SERIO=y 574# CONFIG_SERIO is not set
591# CONFIG_SERIO_I8042 is not set
592CONFIG_SERIO_SERPORT=y
593# CONFIG_SERIO_PCIPS2 is not set
594# CONFIG_SERIO_LIBPS2 is not set
595CONFIG_SERIO_RAW=y
596# CONFIG_GAMEPORT is not set 575# CONFIG_GAMEPORT is not set
597 576
598# 577#
599# Character devices 578# Character devices
600# 579#
601CONFIG_VT=y 580# CONFIG_VT is not set
602CONFIG_VT_CONSOLE=y
603CONFIG_HW_CONSOLE=y
604CONFIG_VT_HW_CONSOLE_BINDING=y
605CONFIG_SERIAL_NONSTANDARD=y 581CONFIG_SERIAL_NONSTANDARD=y
606# CONFIG_COMPUTONE is not set 582# CONFIG_COMPUTONE is not set
607# CONFIG_ROCKETPORT is not set 583# CONFIG_ROCKETPORT is not set
@@ -609,7 +585,7 @@ CONFIG_SERIAL_NONSTANDARD=y
609# CONFIG_DIGIEPCA is not set 585# CONFIG_DIGIEPCA is not set
610# CONFIG_MOXA_INTELLIO is not set 586# CONFIG_MOXA_INTELLIO is not set
611# CONFIG_MOXA_SMARTIO is not set 587# CONFIG_MOXA_SMARTIO is not set
612CONFIG_MOXA_SMARTIO_NEW=y 588# CONFIG_MOXA_SMARTIO_NEW is not set
613# CONFIG_ISI is not set 589# CONFIG_ISI is not set
614# CONFIG_SYNCLINKMP is not set 590# CONFIG_SYNCLINKMP is not set
615# CONFIG_SYNCLINK_GT is not set 591# CONFIG_SYNCLINK_GT is not set
@@ -629,11 +605,12 @@ CONFIG_MOXA_SMARTIO_NEW=y
629# Non-8250 serial port support 605# Non-8250 serial port support
630# 606#
631CONFIG_SERIAL_CORE=y 607CONFIG_SERIAL_CORE=y
608CONFIG_SERIAL_CORE_CONSOLE=y
632CONFIG_SERIAL_TXX9=y 609CONFIG_SERIAL_TXX9=y
633CONFIG_HAS_TXX9_SERIAL=y 610CONFIG_HAS_TXX9_SERIAL=y
634CONFIG_SERIAL_TXX9_NR_UARTS=6 611CONFIG_SERIAL_TXX9_NR_UARTS=6
635# CONFIG_SERIAL_TXX9_CONSOLE is not set 612CONFIG_SERIAL_TXX9_CONSOLE=y
636# CONFIG_SERIAL_TXX9_STDSERIAL is not set 613CONFIG_SERIAL_TXX9_STDSERIAL=y
637# CONFIG_SERIAL_JSM is not set 614# CONFIG_SERIAL_JSM is not set
638# CONFIG_UNIX98_PTYS is not set 615# CONFIG_UNIX98_PTYS is not set
639CONFIG_LEGACY_PTYS=y 616CONFIG_LEGACY_PTYS=y
@@ -685,6 +662,11 @@ CONFIG_LEGACY_PTY_COUNT=256
685# CONFIG_HWMON_VID is not set 662# CONFIG_HWMON_VID is not set
686 663
687# 664#
665# Multifunction device drivers
666#
667# CONFIG_MFD_SM501 is not set
668
669#
688# Multimedia devices 670# Multimedia devices
689# 671#
690# CONFIG_VIDEO_DEV is not set 672# CONFIG_VIDEO_DEV is not set
@@ -697,51 +679,8 @@ CONFIG_LEGACY_PTY_COUNT=256
697# 679#
698# Graphics support 680# Graphics support
699# 681#
700# CONFIG_FIRMWARE_EDID is not set
701CONFIG_FB=y
702# CONFIG_FB_CFB_FILLRECT is not set
703# CONFIG_FB_CFB_COPYAREA is not set
704# CONFIG_FB_CFB_IMAGEBLIT is not set
705# CONFIG_FB_SVGALIB is not set
706# CONFIG_FB_MACMODES is not set
707# CONFIG_FB_BACKLIGHT is not set
708# CONFIG_FB_MODE_HELPERS is not set
709# CONFIG_FB_TILEBLITTING is not set
710# CONFIG_FB_CIRRUS is not set
711# CONFIG_FB_PM2 is not set
712# CONFIG_FB_CYBER2000 is not set
713# CONFIG_FB_ASILIANT is not set
714# CONFIG_FB_IMSTT is not set
715# CONFIG_FB_S1D13XXX is not set
716# CONFIG_FB_NVIDIA is not set
717# CONFIG_FB_RIVA is not set
718# CONFIG_FB_MATROX is not set
719# CONFIG_FB_RADEON is not set
720# CONFIG_FB_ATY128 is not set
721# CONFIG_FB_ATY is not set
722# CONFIG_FB_S3 is not set
723# CONFIG_FB_SAVAGE is not set
724# CONFIG_FB_SIS is not set
725# CONFIG_FB_NEOMAGIC is not set
726# CONFIG_FB_KYRO is not set
727# CONFIG_FB_3DFX is not set
728# CONFIG_FB_VOODOO1 is not set
729# CONFIG_FB_SMIVGX is not set
730# CONFIG_FB_TRIDENT is not set
731# CONFIG_FB_VIRTUAL is not set
732
733#
734# Console display driver support
735#
736# CONFIG_VGA_CONSOLE is not set
737CONFIG_DUMMY_CONSOLE=y
738# CONFIG_FRAMEBUFFER_CONSOLE is not set
739
740#
741# Logo configuration
742#
743# CONFIG_LOGO is not set
744# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 682# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
683# CONFIG_FB is not set
745 684
746# 685#
747# Sound 686# Sound
@@ -864,7 +803,7 @@ CONFIG_INOTIFY_USER=y
864CONFIG_DNOTIFY=y 803CONFIG_DNOTIFY=y
865# CONFIG_AUTOFS_FS is not set 804# CONFIG_AUTOFS_FS is not set
866# CONFIG_AUTOFS4_FS is not set 805# CONFIG_AUTOFS4_FS is not set
867CONFIG_FUSE_FS=y 806# CONFIG_FUSE_FS is not set
868 807
869# 808#
870# CD-ROM/DVD Filesystems 809# CD-ROM/DVD Filesystems
@@ -889,14 +828,13 @@ CONFIG_SYSFS=y
889# CONFIG_TMPFS is not set 828# CONFIG_TMPFS is not set
890# CONFIG_HUGETLB_PAGE is not set 829# CONFIG_HUGETLB_PAGE is not set
891CONFIG_RAMFS=y 830CONFIG_RAMFS=y
892CONFIG_CONFIGFS_FS=y 831# CONFIG_CONFIGFS_FS is not set
893 832
894# 833#
895# Miscellaneous filesystems 834# Miscellaneous filesystems
896# 835#
897# CONFIG_ADFS_FS is not set 836# CONFIG_ADFS_FS is not set
898# CONFIG_AFFS_FS is not set 837# CONFIG_AFFS_FS is not set
899# CONFIG_ECRYPT_FS is not set
900# CONFIG_HFS_FS is not set 838# CONFIG_HFS_FS is not set
901# CONFIG_HFSPLUS_FS is not set 839# CONFIG_HFSPLUS_FS is not set
902# CONFIG_BEFS_FS is not set 840# CONFIG_BEFS_FS is not set
@@ -944,10 +882,7 @@ CONFIG_MSDOS_PARTITION=y
944# 882#
945# Distributed Lock Manager 883# Distributed Lock Manager
946# 884#
947CONFIG_DLM=y 885# CONFIG_DLM is not set
948CONFIG_DLM_TCP=y
949# CONFIG_DLM_SCTP is not set
950# CONFIG_DLM_DEBUG is not set
951 886
952# 887#
953# Profiling support 888# Profiling support
@@ -972,65 +907,22 @@ CONFIG_CMDLINE=""
972# 907#
973# Security options 908# Security options
974# 909#
975CONFIG_KEYS=y 910# CONFIG_KEYS is not set
976CONFIG_KEYS_DEBUG_PROC_KEYS=y
977# CONFIG_SECURITY is not set 911# CONFIG_SECURITY is not set
978 912
979# 913#
980# Cryptographic options 914# Cryptographic options
981# 915#
982CONFIG_CRYPTO=y 916# CONFIG_CRYPTO is not set
983CONFIG_CRYPTO_ALGAPI=y
984CONFIG_CRYPTO_BLKCIPHER=y
985CONFIG_CRYPTO_HASH=y
986CONFIG_CRYPTO_MANAGER=y
987CONFIG_CRYPTO_HMAC=y
988CONFIG_CRYPTO_XCBC=y
989CONFIG_CRYPTO_NULL=y
990CONFIG_CRYPTO_MD4=y
991CONFIG_CRYPTO_MD5=y
992CONFIG_CRYPTO_SHA1=y
993CONFIG_CRYPTO_SHA256=y
994CONFIG_CRYPTO_SHA512=y
995CONFIG_CRYPTO_WP512=y
996CONFIG_CRYPTO_TGR192=y
997CONFIG_CRYPTO_GF128MUL=y
998CONFIG_CRYPTO_ECB=y
999CONFIG_CRYPTO_CBC=y
1000CONFIG_CRYPTO_PCBC=y
1001CONFIG_CRYPTO_LRW=y
1002CONFIG_CRYPTO_DES=y
1003CONFIG_CRYPTO_FCRYPT=y
1004CONFIG_CRYPTO_BLOWFISH=y
1005CONFIG_CRYPTO_TWOFISH=y
1006CONFIG_CRYPTO_TWOFISH_COMMON=y
1007CONFIG_CRYPTO_SERPENT=y
1008CONFIG_CRYPTO_AES=y
1009CONFIG_CRYPTO_CAST5=y
1010CONFIG_CRYPTO_CAST6=y
1011CONFIG_CRYPTO_TEA=y
1012CONFIG_CRYPTO_ARC4=y
1013CONFIG_CRYPTO_KHAZAD=y
1014CONFIG_CRYPTO_ANUBIS=y
1015CONFIG_CRYPTO_DEFLATE=y
1016CONFIG_CRYPTO_MICHAEL_MIC=y
1017CONFIG_CRYPTO_CRC32C=y
1018CONFIG_CRYPTO_CAMELLIA=y
1019
1020#
1021# Hardware crypto devices
1022#
1023 917
1024# 918#
1025# Library routines 919# Library routines
1026# 920#
1027CONFIG_BITREVERSE=y 921CONFIG_BITREVERSE=y
1028# CONFIG_CRC_CCITT is not set 922# CONFIG_CRC_CCITT is not set
1029CONFIG_CRC16=y 923# CONFIG_CRC16 is not set
1030CONFIG_CRC32=y 924CONFIG_CRC32=y
1031CONFIG_LIBCRC32C=y 925# CONFIG_LIBCRC32C is not set
1032CONFIG_ZLIB_INFLATE=y
1033CONFIG_ZLIB_DEFLATE=y
1034CONFIG_PLIST=y 926CONFIG_PLIST=y
1035CONFIG_HAS_IOMEM=y 927CONFIG_HAS_IOMEM=y
1036CONFIG_HAS_IOPORT=y 928CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
deleted file mode 100644
index 3d6c2d743502..000000000000
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ /dev/null
@@ -1,1540 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20
4# Tue Feb 20 21:47:39 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_ZONE_DMA=y
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set
26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MIPS_EV64120 is not set
29# CONFIG_MACH_JAZZ is not set
30# CONFIG_LASAT is not set
31# CONFIG_MIPS_ATLAS is not set
32# CONFIG_MIPS_MALTA is not set
33# CONFIG_MIPS_SEAD is not set
34# CONFIG_WR_PPMC is not set
35# CONFIG_MIPS_SIM is not set
36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set
43# CONFIG_PNX8550_STB810 is not set
44# CONFIG_DDB5477 is not set
45# CONFIG_MACH_VR41XX is not set
46# CONFIG_PMC_YOSEMITE is not set
47# CONFIG_QEMU is not set
48# CONFIG_MARKEINS is not set
49# CONFIG_SGI_IP22 is not set
50# CONFIG_SGI_IP27 is not set
51# CONFIG_SGI_IP32 is not set
52# CONFIG_SIBYTE_BIGSUR is not set
53# CONFIG_SIBYTE_SWARM is not set
54# CONFIG_SIBYTE_SENTOSA is not set
55# CONFIG_SIBYTE_RHONE is not set
56# CONFIG_SIBYTE_CARMEL is not set
57# CONFIG_SIBYTE_PTSWARM is not set
58# CONFIG_SIBYTE_LITTLESUR is not set
59# CONFIG_SIBYTE_CRHINE is not set
60# CONFIG_SIBYTE_CRHONE is not set
61# CONFIG_SNI_RM is not set
62# CONFIG_TOSHIBA_JMR3927 is not set
63# CONFIG_TOSHIBA_RBTX4927 is not set
64# CONFIG_TOSHIBA_RBTX4938 is not set
65CONFIG_RWSEM_GENERIC_SPINLOCK=y
66# CONFIG_ARCH_HAS_ILOG2_U32 is not set
67# CONFIG_ARCH_HAS_ILOG2_U64 is not set
68CONFIG_GENERIC_FIND_NEXT_BIT=y
69CONFIG_GENERIC_HWEIGHT=y
70CONFIG_GENERIC_CALIBRATE_DELAY=y
71CONFIG_GENERIC_TIME=y
72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
73CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
74CONFIG_DMA_NONCOHERENT=y
75CONFIG_DMA_NEED_PCI_MAP_STATE=y
76# CONFIG_CPU_BIG_ENDIAN is not set
77CONFIG_CPU_LITTLE_ENDIAN=y
78CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
79CONFIG_PNX8550=y
80CONFIG_SOC_PNX8550=y
81CONFIG_MIPS_L1_CACHE_SHIFT=5
82
83#
84# CPU selection
85#
86CONFIG_CPU_MIPS32_R1=y
87# CONFIG_CPU_MIPS32_R2 is not set
88# CONFIG_CPU_MIPS64_R1 is not set
89# CONFIG_CPU_MIPS64_R2 is not set
90# CONFIG_CPU_R3000 is not set
91# CONFIG_CPU_TX39XX is not set
92# CONFIG_CPU_VR41XX is not set
93# CONFIG_CPU_R4300 is not set
94# CONFIG_CPU_R4X00 is not set
95# CONFIG_CPU_TX49XX is not set
96# CONFIG_CPU_R5000 is not set
97# CONFIG_CPU_R5432 is not set
98# CONFIG_CPU_R6000 is not set
99# CONFIG_CPU_NEVADA is not set
100# CONFIG_CPU_R8000 is not set
101# CONFIG_CPU_R10000 is not set
102# CONFIG_CPU_RM7000 is not set
103# CONFIG_CPU_RM9000 is not set
104# CONFIG_CPU_SB1 is not set
105CONFIG_SYS_HAS_CPU_MIPS32_R1=y
106CONFIG_CPU_MIPS32=y
107CONFIG_CPU_MIPSR1=y
108CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
110
111#
112# Kernel type
113#
114CONFIG_32BIT=y
115# CONFIG_64BIT is not set
116CONFIG_PAGE_SIZE_4KB=y
117# CONFIG_PAGE_SIZE_8KB is not set
118# CONFIG_PAGE_SIZE_16KB is not set
119# CONFIG_PAGE_SIZE_64KB is not set
120CONFIG_CPU_HAS_PREFETCH=y
121CONFIG_MIPS_MT_DISABLED=y
122# CONFIG_MIPS_MT_SMP is not set
123# CONFIG_MIPS_MT_SMTC is not set
124# CONFIG_MIPS_VPE_LOADER is not set
125# CONFIG_64BIT_PHYS_ADDR is not set
126CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_HAS_SYNC=y
128CONFIG_GENERIC_HARDIRQS=y
129CONFIG_GENERIC_IRQ_PROBE=y
130CONFIG_CPU_SUPPORTS_HIGHMEM=y
131CONFIG_ARCH_FLATMEM_ENABLE=y
132CONFIG_SELECT_MEMORY_MODEL=y
133CONFIG_FLATMEM_MANUAL=y
134# CONFIG_DISCONTIGMEM_MANUAL is not set
135# CONFIG_SPARSEMEM_MANUAL is not set
136CONFIG_FLATMEM=y
137CONFIG_FLAT_NODE_MEM_MAP=y
138# CONFIG_SPARSEMEM_STATIC is not set
139CONFIG_SPLIT_PTLOCK_CPUS=4
140# CONFIG_RESOURCES_64BIT is not set
141CONFIG_ZONE_DMA_FLAG=1
142# CONFIG_HZ_48 is not set
143# CONFIG_HZ_100 is not set
144# CONFIG_HZ_128 is not set
145CONFIG_HZ_250=y
146# CONFIG_HZ_256 is not set
147# CONFIG_HZ_1000 is not set
148# CONFIG_HZ_1024 is not set
149CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
150CONFIG_HZ=250
151CONFIG_PREEMPT_NONE=y
152# CONFIG_PREEMPT_VOLUNTARY is not set
153# CONFIG_PREEMPT is not set
154# CONFIG_KEXEC is not set
155CONFIG_LOCKDEP_SUPPORT=y
156CONFIG_STACKTRACE_SUPPORT=y
157CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
158
159#
160# Code maturity level options
161#
162CONFIG_EXPERIMENTAL=y
163CONFIG_BROKEN_ON_SMP=y
164CONFIG_INIT_ENV_ARG_LIMIT=32
165
166#
167# General setup
168#
169CONFIG_LOCALVERSION=""
170CONFIG_LOCALVERSION_AUTO=y
171CONFIG_SWAP=y
172CONFIG_SYSVIPC=y
173# CONFIG_IPC_NS is not set
174CONFIG_SYSVIPC_SYSCTL=y
175# CONFIG_POSIX_MQUEUE is not set
176# CONFIG_BSD_PROCESS_ACCT is not set
177# CONFIG_TASKSTATS is not set
178# CONFIG_UTS_NS is not set
179# CONFIG_AUDIT is not set
180CONFIG_IKCONFIG=y
181CONFIG_IKCONFIG_PROC=y
182CONFIG_SYSFS_DEPRECATED=y
183# CONFIG_RELAY is not set
184CONFIG_INITRAMFS_SOURCE=""
185# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
186CONFIG_SYSCTL=y
187CONFIG_EMBEDDED=y
188# CONFIG_SYSCTL_SYSCALL is not set
189CONFIG_KALLSYMS=y
190# CONFIG_KALLSYMS_EXTRA_PASS is not set
191CONFIG_HOTPLUG=y
192CONFIG_PRINTK=y
193CONFIG_BUG=y
194CONFIG_ELF_CORE=y
195CONFIG_BASE_FULL=y
196CONFIG_FUTEX=y
197CONFIG_EPOLL=y
198CONFIG_SHMEM=y
199CONFIG_SLAB=y
200CONFIG_VM_EVENT_COUNTERS=y
201CONFIG_RT_MUTEXES=y
202# CONFIG_TINY_SHMEM is not set
203CONFIG_BASE_SMALL=0
204# CONFIG_SLOB is not set
205
206#
207# Loadable module support
208#
209CONFIG_MODULES=y
210# CONFIG_MODULE_UNLOAD is not set
211# CONFIG_MODVERSIONS is not set
212# CONFIG_MODULE_SRCVERSION_ALL is not set
213CONFIG_KMOD=y
214
215#
216# Block layer
217#
218CONFIG_BLOCK=y
219# CONFIG_LBD is not set
220# CONFIG_BLK_DEV_IO_TRACE is not set
221# CONFIG_LSF is not set
222
223#
224# IO Schedulers
225#
226CONFIG_IOSCHED_NOOP=y
227CONFIG_IOSCHED_AS=y
228CONFIG_IOSCHED_DEADLINE=y
229CONFIG_IOSCHED_CFQ=y
230CONFIG_DEFAULT_AS=y
231# CONFIG_DEFAULT_DEADLINE is not set
232# CONFIG_DEFAULT_CFQ is not set
233# CONFIG_DEFAULT_NOOP is not set
234CONFIG_DEFAULT_IOSCHED="anticipatory"
235
236#
237# Bus options (PCI, PCMCIA, EISA, ISA, TC)
238#
239CONFIG_HW_HAS_PCI=y
240CONFIG_PCI=y
241CONFIG_MMU=y
242
243#
244# PCCARD (PCMCIA/CardBus) support
245#
246# CONFIG_PCCARD is not set
247
248#
249# PCI Hotplug Support
250#
251# CONFIG_HOTPLUG_PCI is not set
252
253#
254# Executable file formats
255#
256CONFIG_BINFMT_ELF=y
257# CONFIG_BINFMT_MISC is not set
258CONFIG_TRAD_SIGNALS=y
259
260#
261# Power management options
262#
263CONFIG_PM=y
264# CONFIG_PM_LEGACY is not set
265# CONFIG_PM_DEBUG is not set
266# CONFIG_PM_SYSFS_DEPRECATED is not set
267
268#
269# Networking
270#
271CONFIG_NET=y
272
273#
274# Networking options
275#
276# CONFIG_NETDEBUG is not set
277CONFIG_PACKET=y
278# CONFIG_PACKET_MMAP is not set
279CONFIG_UNIX=y
280CONFIG_XFRM=y
281# CONFIG_XFRM_USER is not set
282# CONFIG_XFRM_SUB_POLICY is not set
283CONFIG_XFRM_MIGRATE=y
284# CONFIG_NET_KEY is not set
285CONFIG_INET=y
286# CONFIG_IP_MULTICAST is not set
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289CONFIG_IP_PNP=y
290# CONFIG_IP_PNP_DHCP is not set
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_ARPD is not set
296# CONFIG_SYN_COOKIES is not set
297# CONFIG_INET_AH is not set
298# CONFIG_INET_ESP is not set
299# CONFIG_INET_IPCOMP is not set
300# CONFIG_INET_XFRM_TUNNEL is not set
301CONFIG_INET_TUNNEL=m
302CONFIG_INET_XFRM_MODE_TRANSPORT=y
303CONFIG_INET_XFRM_MODE_TUNNEL=y
304CONFIG_INET_XFRM_MODE_BEET=y
305CONFIG_INET_DIAG=y
306CONFIG_INET_TCP_DIAG=y
307# CONFIG_TCP_CONG_ADVANCED is not set
308CONFIG_TCP_CONG_CUBIC=y
309CONFIG_DEFAULT_TCP_CONG="cubic"
310CONFIG_TCP_MD5SIG=y
311
312#
313# IP: Virtual Server Configuration
314#
315# CONFIG_IP_VS is not set
316CONFIG_IPV6=m
317# CONFIG_IPV6_PRIVACY is not set
318CONFIG_IPV6_ROUTER_PREF=y
319CONFIG_IPV6_ROUTE_INFO=y
320# CONFIG_INET6_AH is not set
321# CONFIG_INET6_ESP is not set
322# CONFIG_INET6_IPCOMP is not set
323# CONFIG_IPV6_MIP6 is not set
324# CONFIG_INET6_XFRM_TUNNEL is not set
325# CONFIG_INET6_TUNNEL is not set
326CONFIG_INET6_XFRM_MODE_TRANSPORT=m
327CONFIG_INET6_XFRM_MODE_TUNNEL=m
328CONFIG_INET6_XFRM_MODE_BEET=m
329# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
330CONFIG_IPV6_SIT=m
331# CONFIG_IPV6_TUNNEL is not set
332# CONFIG_IPV6_MULTIPLE_TABLES is not set
333# CONFIG_NETWORK_SECMARK is not set
334CONFIG_NETFILTER=y
335# CONFIG_NETFILTER_DEBUG is not set
336
337#
338# Core Netfilter Configuration
339#
340# CONFIG_NETFILTER_NETLINK is not set
341CONFIG_NF_CONNTRACK_ENABLED=m
342CONFIG_NF_CONNTRACK_SUPPORT=y
343# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
344CONFIG_NF_CONNTRACK=m
345CONFIG_NF_CT_ACCT=y
346CONFIG_NF_CONNTRACK_MARK=y
347CONFIG_NF_CONNTRACK_EVENTS=y
348CONFIG_NF_CT_PROTO_GRE=m
349CONFIG_NF_CT_PROTO_SCTP=m
350CONFIG_NF_CONNTRACK_AMANDA=m
351CONFIG_NF_CONNTRACK_FTP=m
352CONFIG_NF_CONNTRACK_H323=m
353CONFIG_NF_CONNTRACK_IRC=m
354# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
355CONFIG_NF_CONNTRACK_PPTP=m
356CONFIG_NF_CONNTRACK_SANE=m
357CONFIG_NF_CONNTRACK_SIP=m
358CONFIG_NF_CONNTRACK_TFTP=m
359CONFIG_NETFILTER_XTABLES=m
360CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
361CONFIG_NETFILTER_XT_TARGET_MARK=m
362CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
363CONFIG_NETFILTER_XT_TARGET_NFLOG=m
364CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
365CONFIG_NETFILTER_XT_MATCH_COMMENT=m
366CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
367CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
368CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
369CONFIG_NETFILTER_XT_MATCH_DCCP=m
370# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
371CONFIG_NETFILTER_XT_MATCH_ESP=m
372CONFIG_NETFILTER_XT_MATCH_HELPER=m
373CONFIG_NETFILTER_XT_MATCH_LENGTH=m
374CONFIG_NETFILTER_XT_MATCH_LIMIT=m
375CONFIG_NETFILTER_XT_MATCH_MAC=m
376CONFIG_NETFILTER_XT_MATCH_MARK=m
377# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
378CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
379CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
380# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
381CONFIG_NETFILTER_XT_MATCH_REALM=m
382CONFIG_NETFILTER_XT_MATCH_SCTP=m
383CONFIG_NETFILTER_XT_MATCH_STATE=m
384# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
385CONFIG_NETFILTER_XT_MATCH_STRING=m
386CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
387CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
388
389#
390# IP: Netfilter Configuration
391#
392CONFIG_NF_CONNTRACK_IPV4=m
393CONFIG_NF_CONNTRACK_PROC_COMPAT=y
394# CONFIG_IP_NF_QUEUE is not set
395# CONFIG_IP_NF_IPTABLES is not set
396# CONFIG_IP_NF_ARPTABLES is not set
397
398#
399# IPv6: Netfilter Configuration (EXPERIMENTAL)
400#
401CONFIG_NF_CONNTRACK_IPV6=m
402# CONFIG_IP6_NF_QUEUE is not set
403# CONFIG_IP6_NF_IPTABLES is not set
404
405#
406# DCCP Configuration (EXPERIMENTAL)
407#
408# CONFIG_IP_DCCP is not set
409
410#
411# SCTP Configuration (EXPERIMENTAL)
412#
413# CONFIG_IP_SCTP is not set
414
415#
416# TIPC Configuration (EXPERIMENTAL)
417#
418# CONFIG_TIPC is not set
419# CONFIG_ATM is not set
420# CONFIG_BRIDGE is not set
421# CONFIG_VLAN_8021Q is not set
422# CONFIG_DECNET is not set
423# CONFIG_LLC2 is not set
424# CONFIG_IPX is not set
425# CONFIG_ATALK is not set
426# CONFIG_X25 is not set
427# CONFIG_LAPB is not set
428# CONFIG_ECONET is not set
429# CONFIG_WAN_ROUTER is not set
430
431#
432# QoS and/or fair queueing
433#
434# CONFIG_NET_SCHED is not set
435CONFIG_NET_CLS_ROUTE=y
436
437#
438# Network testing
439#
440# CONFIG_NET_PKTGEN is not set
441# CONFIG_HAMRADIO is not set
442# CONFIG_IRDA is not set
443# CONFIG_BT is not set
444# CONFIG_IEEE80211 is not set
445
446#
447# Device Drivers
448#
449
450#
451# Generic Driver Options
452#
453CONFIG_STANDALONE=y
454CONFIG_PREVENT_FIRMWARE_BUILD=y
455CONFIG_FW_LOADER=y
456# CONFIG_SYS_HYPERVISOR is not set
457
458#
459# Connector - unified userspace <-> kernelspace linker
460#
461# CONFIG_CONNECTOR is not set
462
463#
464# Memory Technology Devices (MTD)
465#
466# CONFIG_MTD is not set
467
468#
469# Parallel port support
470#
471# CONFIG_PARPORT is not set
472
473#
474# Plug and Play support
475#
476# CONFIG_PNPACPI is not set
477
478#
479# Block devices
480#
481# CONFIG_BLK_CPQ_DA is not set
482# CONFIG_BLK_CPQ_CISS_DA is not set
483# CONFIG_BLK_DEV_DAC960 is not set
484# CONFIG_BLK_DEV_UMEM is not set
485# CONFIG_BLK_DEV_COW_COMMON is not set
486CONFIG_BLK_DEV_LOOP=y
487# CONFIG_BLK_DEV_CRYPTOLOOP is not set
488# CONFIG_BLK_DEV_NBD is not set
489# CONFIG_BLK_DEV_SX8 is not set
490# CONFIG_BLK_DEV_UB is not set
491CONFIG_BLK_DEV_RAM=y
492CONFIG_BLK_DEV_RAM_COUNT=16
493CONFIG_BLK_DEV_RAM_SIZE=8192
494CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
495CONFIG_BLK_DEV_INITRD=y
496# CONFIG_CDROM_PKTCDVD is not set
497# CONFIG_ATA_OVER_ETH is not set
498
499#
500# Misc devices
501#
502CONFIG_SGI_IOC4=m
503# CONFIG_TIFM_CORE is not set
504
505#
506# ATA/ATAPI/MFM/RLL support
507#
508CONFIG_IDE=y
509CONFIG_IDE_MAX_HWIFS=4
510CONFIG_BLK_DEV_IDE=y
511
512#
513# Please see Documentation/ide.txt for help/info on IDE drives
514#
515# CONFIG_BLK_DEV_IDE_SATA is not set
516CONFIG_BLK_DEV_IDEDISK=y
517CONFIG_IDEDISK_MULTI_MODE=y
518# CONFIG_BLK_DEV_IDECD is not set
519# CONFIG_BLK_DEV_IDETAPE is not set
520# CONFIG_BLK_DEV_IDEFLOPPY is not set
521# CONFIG_BLK_DEV_IDESCSI is not set
522# CONFIG_IDE_TASK_IOCTL is not set
523
524#
525# IDE chipset support/bugfixes
526#
527CONFIG_IDE_GENERIC=y
528CONFIG_BLK_DEV_IDEPCI=y
529CONFIG_IDEPCI_SHARE_IRQ=y
530# CONFIG_BLK_DEV_OFFBOARD is not set
531# CONFIG_BLK_DEV_GENERIC is not set
532# CONFIG_BLK_DEV_OPTI621 is not set
533CONFIG_BLK_DEV_IDEDMA_PCI=y
534# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
535CONFIG_IDEDMA_PCI_AUTO=y
536# CONFIG_IDEDMA_ONLYDISK is not set
537# CONFIG_BLK_DEV_AEC62XX is not set
538# CONFIG_BLK_DEV_ALI15X3 is not set
539# CONFIG_BLK_DEV_AMD74XX is not set
540CONFIG_BLK_DEV_CMD64X=y
541# CONFIG_BLK_DEV_TRIFLEX is not set
542# CONFIG_BLK_DEV_CY82C693 is not set
543# CONFIG_BLK_DEV_CS5520 is not set
544# CONFIG_BLK_DEV_CS5530 is not set
545# CONFIG_BLK_DEV_HPT34X is not set
546# CONFIG_BLK_DEV_HPT366 is not set
547# CONFIG_BLK_DEV_JMICRON is not set
548# CONFIG_BLK_DEV_SC1200 is not set
549# CONFIG_BLK_DEV_PIIX is not set
550CONFIG_BLK_DEV_IT8213=m
551# CONFIG_BLK_DEV_IT821X is not set
552# CONFIG_BLK_DEV_NS87415 is not set
553# CONFIG_BLK_DEV_PDC202XX_OLD is not set
554# CONFIG_BLK_DEV_PDC202XX_NEW is not set
555# CONFIG_BLK_DEV_SVWKS is not set
556# CONFIG_BLK_DEV_SIIMAGE is not set
557# CONFIG_BLK_DEV_SLC90E66 is not set
558# CONFIG_BLK_DEV_TRM290 is not set
559# CONFIG_BLK_DEV_VIA82CXXX is not set
560CONFIG_BLK_DEV_TC86C001=m
561# CONFIG_IDE_ARM is not set
562CONFIG_BLK_DEV_IDEDMA=y
563# CONFIG_IDEDMA_IVB is not set
564CONFIG_IDEDMA_AUTO=y
565# CONFIG_BLK_DEV_HD is not set
566
567#
568# SCSI device support
569#
570# CONFIG_RAID_ATTRS is not set
571CONFIG_SCSI=y
572CONFIG_SCSI_TGT=m
573CONFIG_SCSI_NETLINK=y
574CONFIG_SCSI_PROC_FS=y
575
576#
577# SCSI support type (disk, tape, CD-ROM)
578#
579CONFIG_BLK_DEV_SD=y
580# CONFIG_CHR_DEV_ST is not set
581# CONFIG_CHR_DEV_OSST is not set
582# CONFIG_BLK_DEV_SR is not set
583# CONFIG_CHR_DEV_SG is not set
584# CONFIG_CHR_DEV_SCH is not set
585
586#
587# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
588#
589# CONFIG_SCSI_MULTI_LUN is not set
590# CONFIG_SCSI_CONSTANTS is not set
591# CONFIG_SCSI_LOGGING is not set
592CONFIG_SCSI_SCAN_ASYNC=y
593
594#
595# SCSI Transports
596#
597CONFIG_SCSI_SPI_ATTRS=m
598CONFIG_SCSI_FC_ATTRS=y
599CONFIG_SCSI_ISCSI_ATTRS=m
600# CONFIG_SCSI_SAS_ATTRS is not set
601# CONFIG_SCSI_SAS_LIBSAS is not set
602
603#
604# SCSI low-level drivers
605#
606CONFIG_ISCSI_TCP=m
607# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
608# CONFIG_SCSI_3W_9XXX is not set
609# CONFIG_SCSI_ACARD is not set
610# CONFIG_SCSI_AACRAID is not set
611CONFIG_SCSI_AIC7XXX=m
612CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
613CONFIG_AIC7XXX_RESET_DELAY_MS=15000
614# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
615CONFIG_AIC7XXX_DEBUG_MASK=0
616# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
617# CONFIG_SCSI_AIC7XXX_OLD is not set
618# CONFIG_SCSI_AIC79XX is not set
619# CONFIG_SCSI_AIC94XX is not set
620# CONFIG_SCSI_DPT_I2O is not set
621# CONFIG_SCSI_ARCMSR is not set
622# CONFIG_MEGARAID_NEWGEN is not set
623# CONFIG_MEGARAID_LEGACY is not set
624# CONFIG_MEGARAID_SAS is not set
625# CONFIG_SCSI_HPTIOP is not set
626# CONFIG_SCSI_DMX3191D is not set
627# CONFIG_SCSI_FUTURE_DOMAIN is not set
628# CONFIG_SCSI_IPS is not set
629# CONFIG_SCSI_INITIO is not set
630# CONFIG_SCSI_INIA100 is not set
631# CONFIG_SCSI_STEX is not set
632# CONFIG_SCSI_SYM53C8XX_2 is not set
633# CONFIG_SCSI_QLOGIC_1280 is not set
634# CONFIG_SCSI_QLA_FC is not set
635# CONFIG_SCSI_QLA_ISCSI is not set
636# CONFIG_SCSI_LPFC is not set
637# CONFIG_SCSI_DC395x is not set
638# CONFIG_SCSI_DC390T is not set
639# CONFIG_SCSI_NSP32 is not set
640# CONFIG_SCSI_DEBUG is not set
641# CONFIG_SCSI_SRP is not set
642
643#
644# Serial ATA (prod) and Parallel ATA (experimental) drivers
645#
646# CONFIG_ATA is not set
647
648#
649# Multi-device support (RAID and LVM)
650#
651# CONFIG_MD is not set
652
653#
654# Fusion MPT device support
655#
656# CONFIG_FUSION is not set
657# CONFIG_FUSION_SPI is not set
658# CONFIG_FUSION_FC is not set
659# CONFIG_FUSION_SAS is not set
660
661#
662# IEEE 1394 (FireWire) support
663#
664# CONFIG_IEEE1394 is not set
665
666#
667# I2O device support
668#
669# CONFIG_I2O is not set
670
671#
672# Network device support
673#
674CONFIG_NETDEVICES=y
675# CONFIG_DUMMY is not set
676# CONFIG_BONDING is not set
677# CONFIG_EQUALIZER is not set
678CONFIG_TUN=m
679
680#
681# ARCnet devices
682#
683# CONFIG_ARCNET is not set
684
685#
686# PHY device support
687#
688# CONFIG_PHYLIB is not set
689
690#
691# Ethernet (10 or 100Mbit)
692#
693CONFIG_NET_ETHERNET=y
694CONFIG_MII=y
695# CONFIG_HAPPYMEAL is not set
696# CONFIG_SUNGEM is not set
697# CONFIG_CASSINI is not set
698# CONFIG_NET_VENDOR_3COM is not set
699# CONFIG_DM9000 is not set
700
701#
702# Tulip family network device support
703#
704# CONFIG_NET_TULIP is not set
705# CONFIG_HP100 is not set
706CONFIG_NET_PCI=y
707# CONFIG_PCNET32 is not set
708# CONFIG_AMD8111_ETH is not set
709# CONFIG_ADAPTEC_STARFIRE is not set
710# CONFIG_B44 is not set
711# CONFIG_FORCEDETH is not set
712# CONFIG_DGRS is not set
713# CONFIG_EEPRO100 is not set
714# CONFIG_E100 is not set
715# CONFIG_FEALNX is not set
716CONFIG_NATSEMI=y
717# CONFIG_NE2K_PCI is not set
718# CONFIG_8139CP is not set
719CONFIG_8139TOO=y
720# CONFIG_8139TOO_PIO is not set
721# CONFIG_8139TOO_TUNE_TWISTER is not set
722# CONFIG_8139TOO_8129 is not set
723# CONFIG_8139_OLD_RX_RESET is not set
724# CONFIG_SIS900 is not set
725# CONFIG_EPIC100 is not set
726# CONFIG_SUNDANCE is not set
727# CONFIG_TLAN is not set
728# CONFIG_VIA_RHINE is not set
729# CONFIG_SC92031 is not set
730
731#
732# Ethernet (1000 Mbit)
733#
734# CONFIG_ACENIC is not set
735# CONFIG_DL2K is not set
736# CONFIG_E1000 is not set
737# CONFIG_NS83820 is not set
738# CONFIG_HAMACHI is not set
739# CONFIG_YELLOWFIN is not set
740# CONFIG_R8169 is not set
741# CONFIG_SIS190 is not set
742# CONFIG_SKGE is not set
743# CONFIG_SKY2 is not set
744# CONFIG_SK98LIN is not set
745# CONFIG_VIA_VELOCITY is not set
746# CONFIG_TIGON3 is not set
747# CONFIG_BNX2 is not set
748# CONFIG_QLA3XXX is not set
749# CONFIG_ATL1 is not set
750
751#
752# Ethernet (10000 Mbit)
753#
754# CONFIG_CHELSIO_T1 is not set
755CONFIG_CHELSIO_T3=m
756# CONFIG_IXGB is not set
757# CONFIG_S2IO is not set
758# CONFIG_MYRI10GE is not set
759CONFIG_NETXEN_NIC=m
760
761#
762# Token Ring devices
763#
764# CONFIG_TR is not set
765
766#
767# Wireless LAN (non-hamradio)
768#
769# CONFIG_NET_RADIO is not set
770
771#
772# Wan interfaces
773#
774# CONFIG_WAN is not set
775# CONFIG_FDDI is not set
776# CONFIG_HIPPI is not set
777CONFIG_PPP=m
778# CONFIG_PPP_MULTILINK is not set
779# CONFIG_PPP_FILTER is not set
780CONFIG_PPP_ASYNC=m
781CONFIG_PPP_SYNC_TTY=m
782CONFIG_PPP_DEFLATE=m
783# CONFIG_PPP_BSDCOMP is not set
784CONFIG_PPP_MPPE=m
785# CONFIG_PPPOE is not set
786# CONFIG_SLIP is not set
787CONFIG_SLHC=m
788# CONFIG_NET_FC is not set
789# CONFIG_SHAPER is not set
790# CONFIG_NETCONSOLE is not set
791# CONFIG_NETPOLL is not set
792# CONFIG_NET_POLL_CONTROLLER is not set
793
794#
795# ISDN subsystem
796#
797# CONFIG_ISDN is not set
798
799#
800# Telephony Support
801#
802# CONFIG_PHONE is not set
803
804#
805# Input device support
806#
807CONFIG_INPUT=y
808# CONFIG_INPUT_FF_MEMLESS is not set
809
810#
811# Userland interfaces
812#
813CONFIG_INPUT_MOUSEDEV=y
814CONFIG_INPUT_MOUSEDEV_PSAUX=y
815CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
816CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
817# CONFIG_INPUT_JOYDEV is not set
818# CONFIG_INPUT_TSDEV is not set
819CONFIG_INPUT_EVDEV=m
820# CONFIG_INPUT_EVBUG is not set
821
822#
823# Input Device Drivers
824#
825CONFIG_INPUT_KEYBOARD=y
826CONFIG_KEYBOARD_ATKBD=y
827# CONFIG_KEYBOARD_SUNKBD is not set
828# CONFIG_KEYBOARD_LKKBD is not set
829# CONFIG_KEYBOARD_XTKBD is not set
830# CONFIG_KEYBOARD_NEWTON is not set
831# CONFIG_KEYBOARD_STOWAWAY is not set
832CONFIG_INPUT_MOUSE=y
833CONFIG_MOUSE_PS2=y
834# CONFIG_MOUSE_SERIAL is not set
835# CONFIG_MOUSE_VSXXXAA is not set
836# CONFIG_INPUT_JOYSTICK is not set
837# CONFIG_INPUT_TOUCHSCREEN is not set
838# CONFIG_INPUT_MISC is not set
839
840#
841# Hardware I/O ports
842#
843CONFIG_SERIO=y
844CONFIG_SERIO_I8042=y
845CONFIG_SERIO_SERPORT=y
846# CONFIG_SERIO_PCIPS2 is not set
847CONFIG_SERIO_LIBPS2=y
848# CONFIG_SERIO_RAW is not set
849# CONFIG_GAMEPORT is not set
850
851#
852# Character devices
853#
854CONFIG_VT=y
855# CONFIG_VT_CONSOLE is not set
856CONFIG_HW_CONSOLE=y
857# CONFIG_VT_HW_CONSOLE_BINDING is not set
858CONFIG_SERIAL_NONSTANDARD=y
859# CONFIG_COMPUTONE is not set
860# CONFIG_ROCKETPORT is not set
861# CONFIG_CYCLADES is not set
862# CONFIG_DIGIEPCA is not set
863# CONFIG_MOXA_INTELLIO is not set
864# CONFIG_MOXA_SMARTIO is not set
865CONFIG_MOXA_SMARTIO_NEW=m
866# CONFIG_ISI is not set
867# CONFIG_SYNCLINKMP is not set
868# CONFIG_SYNCLINK_GT is not set
869# CONFIG_N_HDLC is not set
870# CONFIG_RISCOM8 is not set
871# CONFIG_SPECIALIX is not set
872# CONFIG_SX is not set
873# CONFIG_RIO is not set
874# CONFIG_STALDRV is not set
875
876#
877# Serial drivers
878#
879# CONFIG_SERIAL_8250 is not set
880
881#
882# Non-8250 serial port support
883#
884CONFIG_SERIAL_PNX8XXX=y
885CONFIG_SERIAL_PNX8XXX_CONSOLE=y
886CONFIG_SERIAL_CORE=y
887CONFIG_SERIAL_CORE_CONSOLE=y
888# CONFIG_SERIAL_JSM is not set
889CONFIG_UNIX98_PTYS=y
890CONFIG_LEGACY_PTYS=y
891CONFIG_LEGACY_PTY_COUNT=256
892
893#
894# IPMI
895#
896# CONFIG_IPMI_HANDLER is not set
897
898#
899# Watchdog Cards
900#
901# CONFIG_WATCHDOG is not set
902CONFIG_HW_RANDOM=y
903# CONFIG_RTC is not set
904# CONFIG_GEN_RTC is not set
905# CONFIG_DTLK is not set
906# CONFIG_R3964 is not set
907# CONFIG_APPLICOM is not set
908# CONFIG_DRM is not set
909# CONFIG_RAW_DRIVER is not set
910
911#
912# TPM devices
913#
914# CONFIG_TCG_TPM is not set
915
916#
917# I2C support
918#
919CONFIG_I2C=m
920CONFIG_I2C_CHARDEV=m
921
922#
923# I2C Algorithms
924#
925CONFIG_I2C_ALGOBIT=m
926# CONFIG_I2C_ALGOPCF is not set
927# CONFIG_I2C_ALGOPCA is not set
928
929#
930# I2C Hardware Bus support
931#
932# CONFIG_I2C_ALI1535 is not set
933# CONFIG_I2C_ALI1563 is not set
934# CONFIG_I2C_ALI15X3 is not set
935# CONFIG_I2C_AMD756 is not set
936# CONFIG_I2C_AMD8111 is not set
937# CONFIG_I2C_I801 is not set
938# CONFIG_I2C_I810 is not set
939# CONFIG_I2C_PIIX4 is not set
940# CONFIG_I2C_NFORCE2 is not set
941# CONFIG_I2C_OCORES is not set
942# CONFIG_I2C_PARPORT_LIGHT is not set
943# CONFIG_I2C_PASEMI is not set
944# CONFIG_I2C_PROSAVAGE is not set
945# CONFIG_I2C_SAVAGE4 is not set
946# CONFIG_I2C_SIS5595 is not set
947# CONFIG_I2C_SIS630 is not set
948# CONFIG_I2C_SIS96X is not set
949# CONFIG_I2C_STUB is not set
950# CONFIG_I2C_VIA is not set
951# CONFIG_I2C_VIAPRO is not set
952# CONFIG_I2C_VOODOO3 is not set
953# CONFIG_I2C_PCA_ISA is not set
954
955#
956# Miscellaneous I2C Chip support
957#
958# CONFIG_SENSORS_DS1337 is not set
959# CONFIG_SENSORS_DS1374 is not set
960# CONFIG_SENSORS_EEPROM is not set
961# CONFIG_SENSORS_PCF8574 is not set
962# CONFIG_SENSORS_PCA9539 is not set
963# CONFIG_SENSORS_PCF8591 is not set
964# CONFIG_SENSORS_MAX6875 is not set
965# CONFIG_I2C_DEBUG_CORE is not set
966# CONFIG_I2C_DEBUG_ALGO is not set
967# CONFIG_I2C_DEBUG_BUS is not set
968# CONFIG_I2C_DEBUG_CHIP is not set
969
970#
971# SPI support
972#
973# CONFIG_SPI is not set
974# CONFIG_SPI_MASTER is not set
975
976#
977# Dallas's 1-wire bus
978#
979# CONFIG_W1 is not set
980
981#
982# Hardware Monitoring support
983#
984CONFIG_HWMON=y
985# CONFIG_HWMON_VID is not set
986# CONFIG_SENSORS_ABITUGURU is not set
987# CONFIG_SENSORS_ADM1021 is not set
988# CONFIG_SENSORS_ADM1025 is not set
989# CONFIG_SENSORS_ADM1026 is not set
990# CONFIG_SENSORS_ADM1029 is not set
991# CONFIG_SENSORS_ADM1031 is not set
992# CONFIG_SENSORS_ADM9240 is not set
993# CONFIG_SENSORS_ASB100 is not set
994# CONFIG_SENSORS_ATXP1 is not set
995# CONFIG_SENSORS_DS1621 is not set
996# CONFIG_SENSORS_F71805F is not set
997# CONFIG_SENSORS_FSCHER is not set
998# CONFIG_SENSORS_FSCPOS is not set
999# CONFIG_SENSORS_GL518SM is not set
1000# CONFIG_SENSORS_GL520SM is not set
1001# CONFIG_SENSORS_IT87 is not set
1002# CONFIG_SENSORS_LM63 is not set
1003# CONFIG_SENSORS_LM75 is not set
1004# CONFIG_SENSORS_LM77 is not set
1005# CONFIG_SENSORS_LM78 is not set
1006# CONFIG_SENSORS_LM80 is not set
1007# CONFIG_SENSORS_LM83 is not set
1008# CONFIG_SENSORS_LM85 is not set
1009# CONFIG_SENSORS_LM87 is not set
1010# CONFIG_SENSORS_LM90 is not set
1011# CONFIG_SENSORS_LM92 is not set
1012# CONFIG_SENSORS_MAX1619 is not set
1013# CONFIG_SENSORS_PC87360 is not set
1014# CONFIG_SENSORS_PC87427 is not set
1015# CONFIG_SENSORS_SIS5595 is not set
1016# CONFIG_SENSORS_SMSC47M1 is not set
1017# CONFIG_SENSORS_SMSC47M192 is not set
1018# CONFIG_SENSORS_SMSC47B397 is not set
1019# CONFIG_SENSORS_VIA686A is not set
1020# CONFIG_SENSORS_VT1211 is not set
1021# CONFIG_SENSORS_VT8231 is not set
1022# CONFIG_SENSORS_W83781D is not set
1023# CONFIG_SENSORS_W83791D is not set
1024# CONFIG_SENSORS_W83792D is not set
1025# CONFIG_SENSORS_W83793 is not set
1026# CONFIG_SENSORS_W83L785TS is not set
1027# CONFIG_SENSORS_W83627HF is not set
1028# CONFIG_SENSORS_W83627EHF is not set
1029# CONFIG_HWMON_DEBUG_CHIP is not set
1030
1031#
1032# Multimedia devices
1033#
1034# CONFIG_VIDEO_DEV is not set
1035
1036#
1037# Digital Video Broadcasting Devices
1038#
1039# CONFIG_DVB is not set
1040# CONFIG_USB_DABUSB is not set
1041
1042#
1043# Graphics support
1044#
1045CONFIG_FIRMWARE_EDID=y
1046CONFIG_FB=y
1047# CONFIG_FB_DDC is not set
1048# CONFIG_FB_CFB_FILLRECT is not set
1049# CONFIG_FB_CFB_COPYAREA is not set
1050# CONFIG_FB_CFB_IMAGEBLIT is not set
1051# CONFIG_FB_SVGALIB is not set
1052# CONFIG_FB_MACMODES is not set
1053# CONFIG_FB_BACKLIGHT is not set
1054# CONFIG_FB_MODE_HELPERS is not set
1055# CONFIG_FB_TILEBLITTING is not set
1056# CONFIG_FB_CIRRUS is not set
1057# CONFIG_FB_PM2 is not set
1058# CONFIG_FB_CYBER2000 is not set
1059# CONFIG_FB_ASILIANT is not set
1060# CONFIG_FB_IMSTT is not set
1061# CONFIG_FB_S1D13XXX is not set
1062# CONFIG_FB_NVIDIA is not set
1063# CONFIG_FB_RIVA is not set
1064# CONFIG_FB_MATROX is not set
1065# CONFIG_FB_RADEON is not set
1066# CONFIG_FB_ATY128 is not set
1067# CONFIG_FB_ATY is not set
1068# CONFIG_FB_S3 is not set
1069# CONFIG_FB_SAVAGE is not set
1070# CONFIG_FB_SIS is not set
1071# CONFIG_FB_NEOMAGIC is not set
1072# CONFIG_FB_KYRO is not set
1073# CONFIG_FB_3DFX is not set
1074# CONFIG_FB_VOODOO1 is not set
1075# CONFIG_FB_SMIVGX is not set
1076# CONFIG_FB_TRIDENT is not set
1077# CONFIG_FB_VIRTUAL is not set
1078
1079#
1080# Console display driver support
1081#
1082# CONFIG_VGA_CONSOLE is not set
1083CONFIG_DUMMY_CONSOLE=y
1084# CONFIG_FRAMEBUFFER_CONSOLE is not set
1085
1086#
1087# Logo configuration
1088#
1089# CONFIG_LOGO is not set
1090# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1091
1092#
1093# Sound
1094#
1095# CONFIG_SOUND is not set
1096
1097#
1098# HID Devices
1099#
1100CONFIG_HID=y
1101# CONFIG_HID_DEBUG is not set
1102
1103#
1104# USB support
1105#
1106CONFIG_USB_ARCH_HAS_HCD=y
1107CONFIG_USB_ARCH_HAS_OHCI=y
1108CONFIG_USB_ARCH_HAS_EHCI=y
1109CONFIG_USB=y
1110# CONFIG_USB_DEBUG is not set
1111
1112#
1113# Miscellaneous USB options
1114#
1115CONFIG_USB_DEVICEFS=y
1116# CONFIG_USB_DYNAMIC_MINORS is not set
1117# CONFIG_USB_SUSPEND is not set
1118# CONFIG_USB_OTG is not set
1119
1120#
1121# USB Host Controller Drivers
1122#
1123# CONFIG_USB_EHCI_HCD is not set
1124# CONFIG_USB_ISP116X_HCD is not set
1125# CONFIG_USB_OHCI_HCD is not set
1126# CONFIG_USB_UHCI_HCD is not set
1127# CONFIG_USB_SL811_HCD is not set
1128
1129#
1130# USB Device Class drivers
1131#
1132# CONFIG_USB_ACM is not set
1133# CONFIG_USB_PRINTER is not set
1134
1135#
1136# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1137#
1138
1139#
1140# may also be needed; see USB_STORAGE Help for more information
1141#
1142CONFIG_USB_STORAGE=y
1143# CONFIG_USB_STORAGE_DEBUG is not set
1144# CONFIG_USB_STORAGE_DATAFAB is not set
1145# CONFIG_USB_STORAGE_FREECOM is not set
1146# CONFIG_USB_STORAGE_ISD200 is not set
1147# CONFIG_USB_STORAGE_DPCM is not set
1148# CONFIG_USB_STORAGE_USBAT is not set
1149# CONFIG_USB_STORAGE_SDDR09 is not set
1150# CONFIG_USB_STORAGE_SDDR55 is not set
1151# CONFIG_USB_STORAGE_JUMPSHOT is not set
1152# CONFIG_USB_STORAGE_ALAUDA is not set
1153# CONFIG_USB_STORAGE_KARMA is not set
1154# CONFIG_USB_LIBUSUAL is not set
1155
1156#
1157# USB Input Devices
1158#
1159CONFIG_USB_HID=y
1160# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1161# CONFIG_HID_FF is not set
1162CONFIG_USB_HIDDEV=y
1163# CONFIG_USB_AIPTEK is not set
1164# CONFIG_USB_WACOM is not set
1165# CONFIG_USB_ACECAD is not set
1166# CONFIG_USB_KBTAB is not set
1167# CONFIG_USB_POWERMATE is not set
1168# CONFIG_USB_TOUCHSCREEN is not set
1169# CONFIG_USB_YEALINK is not set
1170# CONFIG_USB_XPAD is not set
1171# CONFIG_USB_ATI_REMOTE is not set
1172# CONFIG_USB_ATI_REMOTE2 is not set
1173# CONFIG_USB_KEYSPAN_REMOTE is not set
1174# CONFIG_USB_APPLETOUCH is not set
1175# CONFIG_USB_GTCO is not set
1176
1177#
1178# USB Imaging devices
1179#
1180# CONFIG_USB_MDC800 is not set
1181# CONFIG_USB_MICROTEK is not set
1182
1183#
1184# USB Network Adapters
1185#
1186# CONFIG_USB_CATC is not set
1187# CONFIG_USB_KAWETH is not set
1188# CONFIG_USB_PEGASUS is not set
1189# CONFIG_USB_RTL8150 is not set
1190# CONFIG_USB_USBNET_MII is not set
1191# CONFIG_USB_USBNET is not set
1192CONFIG_USB_MON=y
1193
1194#
1195# USB port drivers
1196#
1197
1198#
1199# USB Serial Converter support
1200#
1201# CONFIG_USB_SERIAL is not set
1202
1203#
1204# USB Miscellaneous drivers
1205#
1206# CONFIG_USB_EMI62 is not set
1207# CONFIG_USB_EMI26 is not set
1208# CONFIG_USB_ADUTUX is not set
1209# CONFIG_USB_AUERSWALD is not set
1210# CONFIG_USB_RIO500 is not set
1211# CONFIG_USB_LEGOTOWER is not set
1212# CONFIG_USB_LCD is not set
1213# CONFIG_USB_BERRY_CHARGE is not set
1214# CONFIG_USB_LED is not set
1215# CONFIG_USB_CYPRESS_CY7C63 is not set
1216# CONFIG_USB_CYTHERM is not set
1217# CONFIG_USB_PHIDGET is not set
1218# CONFIG_USB_IDMOUSE is not set
1219# CONFIG_USB_FTDI_ELAN is not set
1220# CONFIG_USB_APPLEDISPLAY is not set
1221# CONFIG_USB_LD is not set
1222# CONFIG_USB_TRANCEVIBRATOR is not set
1223# CONFIG_USB_TEST is not set
1224
1225#
1226# USB DSL modem support
1227#
1228
1229#
1230# USB Gadget Support
1231#
1232# CONFIG_USB_GADGET is not set
1233
1234#
1235# MMC/SD Card support
1236#
1237# CONFIG_MMC is not set
1238
1239#
1240# LED devices
1241#
1242# CONFIG_NEW_LEDS is not set
1243
1244#
1245# LED drivers
1246#
1247
1248#
1249# LED Triggers
1250#
1251
1252#
1253# InfiniBand support
1254#
1255# CONFIG_INFINIBAND is not set
1256
1257#
1258# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1259#
1260
1261#
1262# Real Time Clock
1263#
1264# CONFIG_RTC_CLASS is not set
1265
1266#
1267# DMA Engine support
1268#
1269# CONFIG_DMA_ENGINE is not set
1270
1271#
1272# DMA Clients
1273#
1274
1275#
1276# DMA Devices
1277#
1278
1279#
1280# Auxiliary Display support
1281#
1282
1283#
1284# Virtualization
1285#
1286
1287#
1288# File systems
1289#
1290CONFIG_EXT2_FS=y
1291# CONFIG_EXT2_FS_XATTR is not set
1292# CONFIG_EXT2_FS_XIP is not set
1293CONFIG_EXT3_FS=y
1294CONFIG_EXT3_FS_XATTR=y
1295# CONFIG_EXT3_FS_POSIX_ACL is not set
1296# CONFIG_EXT3_FS_SECURITY is not set
1297# CONFIG_EXT4DEV_FS is not set
1298CONFIG_JBD=y
1299# CONFIG_JBD_DEBUG is not set
1300CONFIG_FS_MBCACHE=y
1301# CONFIG_REISERFS_FS is not set
1302# CONFIG_JFS_FS is not set
1303# CONFIG_FS_POSIX_ACL is not set
1304CONFIG_XFS_FS=m
1305# CONFIG_XFS_QUOTA is not set
1306# CONFIG_XFS_SECURITY is not set
1307# CONFIG_XFS_POSIX_ACL is not set
1308# CONFIG_XFS_RT is not set
1309# CONFIG_GFS2_FS is not set
1310# CONFIG_OCFS2_FS is not set
1311# CONFIG_MINIX_FS is not set
1312# CONFIG_ROMFS_FS is not set
1313CONFIG_INOTIFY=y
1314CONFIG_INOTIFY_USER=y
1315# CONFIG_QUOTA is not set
1316CONFIG_DNOTIFY=y
1317CONFIG_AUTOFS_FS=y
1318CONFIG_AUTOFS4_FS=y
1319# CONFIG_FUSE_FS is not set
1320
1321#
1322# CD-ROM/DVD Filesystems
1323#
1324# CONFIG_ISO9660_FS is not set
1325# CONFIG_UDF_FS is not set
1326
1327#
1328# DOS/FAT/NT Filesystems
1329#
1330CONFIG_FAT_FS=y
1331CONFIG_MSDOS_FS=y
1332CONFIG_VFAT_FS=y
1333CONFIG_FAT_DEFAULT_CODEPAGE=437
1334CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1335# CONFIG_NTFS_FS is not set
1336
1337#
1338# Pseudo filesystems
1339#
1340CONFIG_PROC_FS=y
1341# CONFIG_PROC_KCORE is not set
1342CONFIG_PROC_SYSCTL=y
1343CONFIG_SYSFS=y
1344CONFIG_TMPFS=y
1345# CONFIG_TMPFS_POSIX_ACL is not set
1346# CONFIG_HUGETLB_PAGE is not set
1347CONFIG_RAMFS=y
1348CONFIG_CONFIGFS_FS=m
1349
1350#
1351# Miscellaneous filesystems
1352#
1353# CONFIG_ADFS_FS is not set
1354# CONFIG_AFFS_FS is not set
1355# CONFIG_HFS_FS is not set
1356# CONFIG_HFSPLUS_FS is not set
1357# CONFIG_BEFS_FS is not set
1358# CONFIG_BFS_FS is not set
1359# CONFIG_EFS_FS is not set
1360CONFIG_CRAMFS=y
1361# CONFIG_VXFS_FS is not set
1362# CONFIG_HPFS_FS is not set
1363# CONFIG_QNX4FS_FS is not set
1364# CONFIG_SYSV_FS is not set
1365# CONFIG_UFS_FS is not set
1366
1367#
1368# Network File Systems
1369#
1370CONFIG_NFS_FS=y
1371CONFIG_NFS_V3=y
1372# CONFIG_NFS_V3_ACL is not set
1373# CONFIG_NFS_V4 is not set
1374# CONFIG_NFS_DIRECTIO is not set
1375CONFIG_NFSD=m
1376# CONFIG_NFSD_V3 is not set
1377# CONFIG_NFSD_TCP is not set
1378CONFIG_ROOT_NFS=y
1379CONFIG_LOCKD=y
1380CONFIG_LOCKD_V4=y
1381CONFIG_EXPORTFS=m
1382CONFIG_NFS_COMMON=y
1383CONFIG_SUNRPC=y
1384# CONFIG_RPCSEC_GSS_KRB5 is not set
1385# CONFIG_RPCSEC_GSS_SPKM3 is not set
1386CONFIG_SMB_FS=m
1387# CONFIG_SMB_NLS_DEFAULT is not set
1388# CONFIG_CIFS is not set
1389# CONFIG_NCP_FS is not set
1390# CONFIG_CODA_FS is not set
1391# CONFIG_AFS_FS is not set
1392# CONFIG_9P_FS is not set
1393
1394#
1395# Partition Types
1396#
1397# CONFIG_PARTITION_ADVANCED is not set
1398CONFIG_MSDOS_PARTITION=y
1399
1400#
1401# Native Language Support
1402#
1403CONFIG_NLS=y
1404CONFIG_NLS_DEFAULT="iso8859-1"
1405# CONFIG_NLS_CODEPAGE_437 is not set
1406# CONFIG_NLS_CODEPAGE_737 is not set
1407# CONFIG_NLS_CODEPAGE_775 is not set
1408# CONFIG_NLS_CODEPAGE_850 is not set
1409# CONFIG_NLS_CODEPAGE_852 is not set
1410# CONFIG_NLS_CODEPAGE_855 is not set
1411# CONFIG_NLS_CODEPAGE_857 is not set
1412# CONFIG_NLS_CODEPAGE_860 is not set
1413# CONFIG_NLS_CODEPAGE_861 is not set
1414# CONFIG_NLS_CODEPAGE_862 is not set
1415# CONFIG_NLS_CODEPAGE_863 is not set
1416# CONFIG_NLS_CODEPAGE_864 is not set
1417# CONFIG_NLS_CODEPAGE_865 is not set
1418# CONFIG_NLS_CODEPAGE_866 is not set
1419# CONFIG_NLS_CODEPAGE_869 is not set
1420# CONFIG_NLS_CODEPAGE_936 is not set
1421# CONFIG_NLS_CODEPAGE_950 is not set
1422# CONFIG_NLS_CODEPAGE_932 is not set
1423# CONFIG_NLS_CODEPAGE_949 is not set
1424# CONFIG_NLS_CODEPAGE_874 is not set
1425# CONFIG_NLS_ISO8859_8 is not set
1426# CONFIG_NLS_CODEPAGE_1250 is not set
1427# CONFIG_NLS_CODEPAGE_1251 is not set
1428# CONFIG_NLS_ASCII is not set
1429# CONFIG_NLS_ISO8859_1 is not set
1430# CONFIG_NLS_ISO8859_2 is not set
1431# CONFIG_NLS_ISO8859_3 is not set
1432# CONFIG_NLS_ISO8859_4 is not set
1433# CONFIG_NLS_ISO8859_5 is not set
1434# CONFIG_NLS_ISO8859_6 is not set
1435# CONFIG_NLS_ISO8859_7 is not set
1436# CONFIG_NLS_ISO8859_9 is not set
1437# CONFIG_NLS_ISO8859_13 is not set
1438# CONFIG_NLS_ISO8859_14 is not set
1439# CONFIG_NLS_ISO8859_15 is not set
1440# CONFIG_NLS_KOI8_R is not set
1441# CONFIG_NLS_KOI8_U is not set
1442# CONFIG_NLS_UTF8 is not set
1443
1444#
1445# Distributed Lock Manager
1446#
1447CONFIG_DLM=m
1448CONFIG_DLM_TCP=y
1449# CONFIG_DLM_SCTP is not set
1450# CONFIG_DLM_DEBUG is not set
1451
1452#
1453# Profiling support
1454#
1455# CONFIG_PROFILING is not set
1456
1457#
1458# Kernel hacking
1459#
1460CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1461# CONFIG_PRINTK_TIME is not set
1462CONFIG_ENABLE_MUST_CHECK=y
1463# CONFIG_MAGIC_SYSRQ is not set
1464# CONFIG_UNUSED_SYMBOLS is not set
1465# CONFIG_DEBUG_FS is not set
1466# CONFIG_HEADERS_CHECK is not set
1467# CONFIG_DEBUG_KERNEL is not set
1468CONFIG_LOG_BUF_SHIFT=14
1469CONFIG_CROSSCOMPILE=y
1470CONFIG_CMDLINE=""
1471CONFIG_SYS_SUPPORTS_KGDB=y
1472
1473#
1474# Security options
1475#
1476# CONFIG_KEYS is not set
1477# CONFIG_SECURITY is not set
1478
1479#
1480# Cryptographic options
1481#
1482CONFIG_CRYPTO=y
1483CONFIG_CRYPTO_ALGAPI=y
1484CONFIG_CRYPTO_BLKCIPHER=m
1485CONFIG_CRYPTO_HASH=m
1486CONFIG_CRYPTO_MANAGER=m
1487# CONFIG_CRYPTO_HMAC is not set
1488CONFIG_CRYPTO_XCBC=m
1489# CONFIG_CRYPTO_NULL is not set
1490# CONFIG_CRYPTO_MD4 is not set
1491CONFIG_CRYPTO_MD5=y
1492CONFIG_CRYPTO_SHA1=m
1493# CONFIG_CRYPTO_SHA256 is not set
1494# CONFIG_CRYPTO_SHA512 is not set
1495# CONFIG_CRYPTO_WP512 is not set
1496# CONFIG_CRYPTO_TGR192 is not set
1497CONFIG_CRYPTO_GF128MUL=m
1498CONFIG_CRYPTO_ECB=m
1499CONFIG_CRYPTO_CBC=m
1500CONFIG_CRYPTO_PCBC=m
1501CONFIG_CRYPTO_LRW=m
1502# CONFIG_CRYPTO_DES is not set
1503CONFIG_CRYPTO_FCRYPT=m
1504# CONFIG_CRYPTO_BLOWFISH is not set
1505# CONFIG_CRYPTO_TWOFISH is not set
1506# CONFIG_CRYPTO_SERPENT is not set
1507# CONFIG_CRYPTO_AES is not set
1508# CONFIG_CRYPTO_CAST5 is not set
1509# CONFIG_CRYPTO_CAST6 is not set
1510# CONFIG_CRYPTO_TEA is not set
1511CONFIG_CRYPTO_ARC4=m
1512# CONFIG_CRYPTO_KHAZAD is not set
1513# CONFIG_CRYPTO_ANUBIS is not set
1514# CONFIG_CRYPTO_DEFLATE is not set
1515# CONFIG_CRYPTO_MICHAEL_MIC is not set
1516CONFIG_CRYPTO_CRC32C=m
1517CONFIG_CRYPTO_CAMELLIA=m
1518# CONFIG_CRYPTO_TEST is not set
1519
1520#
1521# Hardware crypto devices
1522#
1523
1524#
1525# Library routines
1526#
1527CONFIG_BITREVERSE=y
1528CONFIG_CRC_CCITT=m
1529# CONFIG_CRC16 is not set
1530CONFIG_CRC32=y
1531CONFIG_LIBCRC32C=m
1532CONFIG_ZLIB_INFLATE=y
1533CONFIG_ZLIB_DEFLATE=m
1534CONFIG_TEXTSEARCH=y
1535CONFIG_TEXTSEARCH_KMP=m
1536CONFIG_TEXTSEARCH_BM=m
1537CONFIG_TEXTSEARCH_FSM=m
1538CONFIG_PLIST=y
1539CONFIG_HAS_IOMEM=y
1540CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/gt64120/wrppmc/pci.c b/arch/mips/gt64120/wrppmc/pci.c
index 2fbe93467f78..0d5289bc1804 100644
--- a/arch/mips/gt64120/wrppmc/pci.c
+++ b/arch/mips/gt64120/wrppmc/pci.c
@@ -13,7 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <asm/gt64120.h> 14#include <asm/gt64120.h>
15 15
16extern struct pci_ops gt64120_pci_ops; 16extern struct pci_ops gt64xxx_pci0_ops;
17 17
18static struct resource pci0_io_resource = { 18static struct resource pci0_io_resource = {
19 .name = "pci_0 io", 19 .name = "pci_0 io",
@@ -30,7 +30,7 @@ static struct resource pci0_mem_resource = {
30}; 30};
31 31
32static struct pci_controller hose_0 = { 32static struct pci_controller hose_0 = {
33 .pci_ops = &gt64120_pci_ops, 33 .pci_ops = &gt64xxx_pci0_ops,
34 .io_resource = &pci0_io_resource, 34 .io_resource = &pci0_io_resource,
35 .mem_resource = &pci0_mem_resource, 35 .mem_resource = &pci0_mem_resource,
36}; 36};
diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c
index aa481b774c42..5398813e50e6 100644
--- a/arch/mips/jmr3927/common/prom.c
+++ b/arch/mips/jmr3927/common/prom.c
@@ -41,16 +41,6 @@
41 41
42#include <asm/bootinfo.h> 42#include <asm/bootinfo.h>
43 43
44extern int prom_argc;
45extern char **prom_argv, **prom_envp;
46
47typedef struct
48{
49 char *name;
50/* char *val; */
51}t_env_var;
52
53
54char * __init prom_getcmdline(void) 44char * __init prom_getcmdline(void)
55{ 45{
56 return &(arcs_cmdline[0]); 46 return &(arcs_cmdline[0]);
@@ -60,6 +50,8 @@ void __init prom_init_cmdline(void)
60{ 50{
61 char *cp; 51 char *cp;
62 int actr; 52 int actr;
53 int prom_argc = fw_arg0;
54 char **prom_argv = (char **) fw_arg1;
63 55
64 actr = 1; /* Always ignore argv[0] */ 56 actr = 1; /* Always ignore argv[0] */
65 57
diff --git a/arch/mips/jmr3927/common/puts.c b/arch/mips/jmr3927/common/puts.c
index 1c1cad9cd078..c611ab497888 100644
--- a/arch/mips/jmr3927/common/puts.c
+++ b/arch/mips/jmr3927/common/puts.c
@@ -32,137 +32,29 @@
32 * 675 Mass Ave, Cambridge, MA 02139, USA. 32 * 675 Mass Ave, Cambridge, MA 02139, USA.
33 */ 33 */
34 34
35#include <linux/types.h>
36#include <asm/jmr3927/txx927.h>
37#include <asm/jmr3927/tx3927.h> 35#include <asm/jmr3927/tx3927.h>
38#include <asm/jmr3927/jmr3927.h>
39 36
40#define TIMEOUT 0xffffff 37#define TIMEOUT 0xffffff
41#define SLOW_DOWN
42
43static const char digits[16] = "0123456789abcdef";
44
45#ifdef SLOW_DOWN
46#define slow_down() { int k; for (k=0; k<10000; k++); }
47#else
48#define slow_down()
49#endif
50 38
51void 39void
52putch(const unsigned char c) 40prom_putchar(char c)
53{ 41{
54 int i = 0; 42 int i = 0;
55 43
56 do { 44 do {
57 slow_down();
58 i++; 45 i++;
59 if (i>TIMEOUT) { 46 if (i>TIMEOUT)
60 break; 47 break;
61 }
62 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); 48 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
63 tx3927_sioptr(1)->tfifo = c; 49 tx3927_sioptr(1)->tfifo = c;
64 return; 50 return;
65} 51}
66 52
67unsigned char getch(void)
68{
69 int i = 0;
70 int dicr;
71 char c;
72
73 /* diable RX int. */
74 dicr = tx3927_sioptr(1)->dicr;
75 tx3927_sioptr(1)->dicr = 0;
76
77 do {
78 slow_down();
79 i++;
80 if (i>TIMEOUT) {
81 break;
82 }
83 } while (tx3927_sioptr(1)->disr & TXx927_SIDISR_UVALID)
84 ;
85 c = tx3927_sioptr(1)->rfifo;
86
87 /* clear RX int. status */
88 tx3927_sioptr(1)->disr &= ~TXx927_SIDISR_RDIS;
89 /* enable RX int. */
90 tx3927_sioptr(1)->dicr = dicr;
91
92 return c;
93}
94void
95do_jmr3927_led_set(char n)
96{
97 /* and with current leds */
98 jmr3927_led_and_set(n);
99}
100
101void 53void
102puts(unsigned char *cp) 54puts(const char *cp)
103{ 55{
104 int i = 0; 56 while (*cp)
105 57 prom_putchar(*cp++);
106 while (*cp) { 58 prom_putchar('\r');
107 do { 59 prom_putchar('\n');
108 slow_down();
109 i++;
110 if (i>TIMEOUT) {
111 break;
112 }
113 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
114 tx3927_sioptr(1)->tfifo = *cp++;
115 }
116 putch('\r');
117 putch('\n');
118}
119
120void
121fputs(unsigned char *cp)
122{
123 int i = 0;
124
125 while (*cp) {
126 do {
127 slow_down();
128 i++;
129 if (i>TIMEOUT) {
130 break;
131 }
132 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
133 tx3927_sioptr(1)->tfifo = *cp++;
134 }
135}
136
137
138void
139put64(uint64_t ul)
140{
141 int cnt;
142 unsigned ch;
143
144 cnt = 16; /* 16 nibbles in a 64 bit long */
145 putch('0');
146 putch('x');
147 do {
148 cnt--;
149 ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
150 putch(digits[ch]);
151 } while (cnt > 0);
152}
153
154void
155put32(unsigned u)
156{
157 int cnt;
158 unsigned ch;
159
160 cnt = 8; /* 8 nibbles in a 32 bit long */
161 putch('0');
162 putch('x');
163 do {
164 cnt--;
165 ch = (unsigned char)(u >> cnt * 4) & 0x0F;
166 putch(digits[ch]);
167 } while (cnt > 0);
168} 60}
diff --git a/arch/mips/jmr3927/rbhma3100/Makefile b/arch/mips/jmr3927/rbhma3100/Makefile
index 18fe9a898cb7..8d00ba460cef 100644
--- a/arch/mips/jmr3927/rbhma3100/Makefile
+++ b/arch/mips/jmr3927/rbhma3100/Makefile
@@ -3,5 +3,4 @@
3# 3#
4 4
5obj-y += init.o irq.o setup.o 5obj-y += init.o irq.o setup.o
6obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
7obj-$(CONFIG_KGDB) += kgdb_io.o 6obj-$(CONFIG_KGDB) += kgdb_io.o
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
index a55cb4572ded..9169fab1773a 100644
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ b/arch/mips/jmr3927/rbhma3100/init.c
@@ -28,20 +28,10 @@
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/mm.h>
32#include <linux/sched.h>
33#include <linux/bootmem.h>
34
35#include <asm/addrspace.h>
36#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
37#include <asm/mipsregs.h>
38#include <asm/jmr3927/jmr3927.h> 32#include <asm/jmr3927/jmr3927.h>
39 33
40int prom_argc;
41char **prom_argv, **prom_envp;
42extern void __init prom_init_cmdline(void); 34extern void __init prom_init_cmdline(void);
43extern char *prom_getenv(char *envname);
44unsigned long mips_nofpu = 0;
45 35
46const char *get_system_type(void) 36const char *get_system_type(void)
47{ 37{
@@ -52,7 +42,7 @@ const char *get_system_type(void)
52 ; 42 ;
53} 43}
54 44
55extern void puts(unsigned char *cp); 45extern void puts(const char *cp);
56 46
57void __init prom_init(void) 47void __init prom_init(void)
58{ 48{
@@ -61,10 +51,6 @@ void __init prom_init(void)
61 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) 51 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
62 puts("Warning: TX3927 TLB off\n"); 52 puts("Warning: TX3927 TLB off\n");
63#endif 53#endif
64 prom_argc = fw_arg0;
65 prom_argv = (char **) fw_arg1;
66 prom_envp = (char **) fw_arg2;
67
68 mips_machgroup = MACH_GROUP_TOSHIBA; 54 mips_machgroup = MACH_GROUP_TOSHIBA;
69 55
70#ifdef CONFIG_TOSHIBA_JMR3927 56#ifdef CONFIG_TOSHIBA_JMR3927
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 7d2c203cb406..1187b44a3dd4 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -30,53 +30,21 @@
30 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */ 31 */
32#include <linux/init.h> 32#include <linux/init.h>
33
34#include <linux/errno.h>
35#include <linux/irq.h>
36#include <linux/kernel_stat.h>
37#include <linux/signal.h>
38#include <linux/sched.h> 33#include <linux/sched.h>
39#include <linux/types.h> 34#include <linux/types.h>
40#include <linux/interrupt.h> 35#include <linux/interrupt.h>
41#include <linux/ioport.h>
42#include <linux/timex.h>
43#include <linux/slab.h>
44#include <linux/random.h>
45#include <linux/smp.h>
46#include <linux/smp_lock.h>
47#include <linux/bitops.h>
48 36
49#include <asm/irq_regs.h>
50#include <asm/io.h> 37#include <asm/io.h>
51#include <asm/mipsregs.h> 38#include <asm/mipsregs.h>
52#include <asm/system.h> 39#include <asm/system.h>
53 40
54#include <asm/ptrace.h>
55#include <asm/processor.h> 41#include <asm/processor.h>
56#include <asm/jmr3927/irq.h>
57#include <asm/debug.h>
58#include <asm/jmr3927/jmr3927.h> 42#include <asm/jmr3927/jmr3927.h>
59 43
60#if JMR3927_IRQ_END > NR_IRQS 44#if JMR3927_IRQ_END > NR_IRQS
61#error JMR3927_IRQ_END > NR_IRQS 45#error JMR3927_IRQ_END > NR_IRQS
62#endif 46#endif
63 47
64struct tb_irq_space* tb_irq_spaces;
65
66static int jmr3927_irq_base = -1;
67
68#ifdef CONFIG_PCI
69static int jmr3927_gen_iack(void)
70{
71 /* generate ACK cycle */
72#ifdef __BIG_ENDIAN
73 return (tx3927_pcicptr->iiadp >> 24) & 0xff;
74#else
75 return tx3927_pcicptr->iiadp & 0xff;
76#endif
77}
78#endif
79
80#define irc_dlevel 0 48#define irc_dlevel 0
81#define irc_elevel 1 49#define irc_elevel 1
82 50
@@ -87,89 +55,24 @@ static unsigned char irc_level[TX3927_NUM_IR] = {
87 6, 6, 6 /* TMR */ 55 6, 6, 6 /* TMR */
88}; 56};
89 57
90static void jmr3927_irq_disable(unsigned int irq_nr);
91static void jmr3927_irq_enable(unsigned int irq_nr);
92
93static void jmr3927_irq_ack(unsigned int irq)
94{
95 if (irq == JMR3927_IRQ_IRC_TMR0)
96 jmr3927_tmrptr->tisr = 0; /* ack interrupt */
97
98 jmr3927_irq_disable(irq);
99}
100
101static void jmr3927_irq_end(unsigned int irq)
102{
103 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
104 jmr3927_irq_enable(irq);
105}
106
107static void jmr3927_irq_disable(unsigned int irq_nr)
108{
109 struct tb_irq_space* sp;
110
111 for (sp = tb_irq_spaces; sp; sp = sp->next) {
112 if (sp->start_irqno <= irq_nr &&
113 irq_nr < sp->start_irqno + sp->nr_irqs) {
114 if (sp->mask_func)
115 sp->mask_func(irq_nr - sp->start_irqno,
116 sp->space_id);
117 break;
118 }
119 }
120}
121
122static void jmr3927_irq_enable(unsigned int irq_nr)
123{
124 struct tb_irq_space* sp;
125
126 for (sp = tb_irq_spaces; sp; sp = sp->next) {
127 if (sp->start_irqno <= irq_nr &&
128 irq_nr < sp->start_irqno + sp->nr_irqs) {
129 if (sp->unmask_func)
130 sp->unmask_func(irq_nr - sp->start_irqno,
131 sp->space_id);
132 break;
133 }
134 }
135}
136
137/* 58/*
138 * CP0_STATUS is a thread's resource (saved/restored on context switch). 59 * CP0_STATUS is a thread's resource (saved/restored on context switch).
139 * So disable_irq/enable_irq MUST handle IOC/ISAC/IRC registers. 60 * So disable_irq/enable_irq MUST handle IOC/IRC registers.
140 */ 61 */
141static void mask_irq_isac(int irq_nr, int space_id) 62static void mask_irq_ioc(unsigned int irq)
142{
143 /* 0: mask */
144 unsigned char imask =
145 jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
146 unsigned int bit = 1 << irq_nr;
147 jmr3927_isac_reg_out(imask & ~bit, JMR3927_ISAC_INTM_ADDR);
148 /* flush write buffer */
149 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
150}
151static void unmask_irq_isac(int irq_nr, int space_id)
152{
153 /* 0: mask */
154 unsigned char imask = jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
155 unsigned int bit = 1 << irq_nr;
156 jmr3927_isac_reg_out(imask | bit, JMR3927_ISAC_INTM_ADDR);
157 /* flush write buffer */
158 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
159}
160
161static void mask_irq_ioc(int irq_nr, int space_id)
162{ 63{
163 /* 0: mask */ 64 /* 0: mask */
65 unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
164 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 66 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
165 unsigned int bit = 1 << irq_nr; 67 unsigned int bit = 1 << irq_nr;
166 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); 68 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
167 /* flush write buffer */ 69 /* flush write buffer */
168 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 70 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
169} 71}
170static void unmask_irq_ioc(int irq_nr, int space_id) 72static void unmask_irq_ioc(unsigned int irq)
171{ 73{
172 /* 0: mask */ 74 /* 0: mask */
75 unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
173 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 76 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
174 unsigned int bit = 1 << irq_nr; 77 unsigned int bit = 1 << irq_nr;
175 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); 78 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
@@ -177,8 +80,9 @@ static void unmask_irq_ioc(int irq_nr, int space_id)
177 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 80 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
178} 81}
179 82
180static void mask_irq_irc(int irq_nr, int space_id) 83static void mask_irq_irc(unsigned int irq)
181{ 84{
85 unsigned int irq_nr = irq - JMR3927_IRQ_IRC;
182 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; 86 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2];
183 if (irq_nr & 1) 87 if (irq_nr & 1)
184 *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8); 88 *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8);
@@ -191,8 +95,9 @@ static void mask_irq_irc(int irq_nr, int space_id)
191 (void)tx3927_ircptr->ssr; 95 (void)tx3927_ircptr->ssr;
192} 96}
193 97
194static void unmask_irq_irc(int irq_nr, int space_id) 98static void unmask_irq_irc(unsigned int irq)
195{ 99{
100 unsigned int irq_nr = irq - JMR3927_IRQ_IRC;
196 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; 101 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2];
197 if (irq_nr & 1) 102 if (irq_nr & 1)
198 *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8); 103 *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8);
@@ -203,98 +108,14 @@ static void unmask_irq_irc(int irq_nr, int space_id)
203 tx3927_ircptr->imr = irc_elevel; 108 tx3927_ircptr->imr = irc_elevel;
204} 109}
205 110
206struct tb_irq_space jmr3927_isac_irqspace = {
207 .next = NULL,
208 .start_irqno = JMR3927_IRQ_ISAC,
209 nr_irqs : JMR3927_NR_IRQ_ISAC,
210 .mask_func = mask_irq_isac,
211 .unmask_func = unmask_irq_isac,
212 .name = "ISAC",
213 .space_id = 0,
214 can_share : 0
215};
216struct tb_irq_space jmr3927_ioc_irqspace = {
217 .next = NULL,
218 .start_irqno = JMR3927_IRQ_IOC,
219 nr_irqs : JMR3927_NR_IRQ_IOC,
220 .mask_func = mask_irq_ioc,
221 .unmask_func = unmask_irq_ioc,
222 .name = "IOC",
223 .space_id = 0,
224 can_share : 1
225};
226
227struct tb_irq_space jmr3927_irc_irqspace = {
228 .next = NULL,
229 .start_irqno = JMR3927_IRQ_IRC,
230 .nr_irqs = JMR3927_NR_IRQ_IRC,
231 .mask_func = mask_irq_irc,
232 .unmask_func = unmask_irq_irc,
233 .name = "on-chip",
234 .space_id = 0,
235 .can_share = 0
236};
237
238
239#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
240static int tx_branch_likely_bug_count = 0;
241static int have_tx_branch_likely_bug = 0;
242
243static void tx_branch_likely_bug_fixup(void)
244{
245 struct pt_regs *regs = get_irq_regs();
246
247 /* TX39/49-BUG: Under this condition, the insn in delay slot
248 of the branch likely insn is executed (not nullified) even
249 the branch condition is false. */
250 if (!have_tx_branch_likely_bug)
251 return;
252 if ((regs->cp0_epc & 0xfff) == 0xffc &&
253 KSEGX(regs->cp0_epc) != KSEG0 &&
254 KSEGX(regs->cp0_epc) != KSEG1) {
255 unsigned int insn = *(unsigned int*)(regs->cp0_epc - 4);
256 /* beql,bnel,blezl,bgtzl */
257 /* bltzl,bgezl,blezall,bgezall */
258 /* bczfl, bcztl */
259 if ((insn & 0xf0000000) == 0x50000000 ||
260 (insn & 0xfc0e0000) == 0x04020000 ||
261 (insn & 0xf3fe0000) == 0x41020000) {
262 regs->cp0_epc -= 4;
263 tx_branch_likely_bug_count++;
264 printk(KERN_INFO
265 "fix branch-likery bug in %s (insn %08x)\n",
266 current->comm, insn);
267 }
268 }
269}
270#endif
271
272static void jmr3927_spurious(void)
273{
274 struct pt_regs * regs = get_irq_regs();
275
276#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
277 tx_branch_likely_bug_fixup();
278#endif
279 printk(KERN_WARNING "spurious interrupt (cause 0x%lx, pc 0x%lx, ra 0x%lx).\n",
280 regs->cp0_cause, regs->cp0_epc, regs->regs[31]);
281}
282
283asmlinkage void plat_irq_dispatch(void) 111asmlinkage void plat_irq_dispatch(void)
284{ 112{
285 struct pt_regs * regs = get_irq_regs(); 113 unsigned long cp0_cause = read_c0_cause();
286 int irq; 114 int irq;
287 115
288#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND 116 if ((cp0_cause & CAUSEF_IP7) == 0)
289 tx_branch_likely_bug_fixup();
290#endif
291 if ((regs->cp0_cause & CAUSEF_IP7) == 0) {
292#if 0
293 jmr3927_spurious();
294#endif
295 return; 117 return;
296 } 118 irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
297 irq = (regs->cp0_cause >> CAUSEB_IP2) & 0x0f;
298 119
299 do_IRQ(irq + JMR3927_IRQ_IRC); 120 do_IRQ(irq + JMR3927_IRQ_IRC);
300} 121}
@@ -317,35 +138,6 @@ static struct irqaction ioc_action = {
317 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, 138 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL,
318}; 139};
319 140
320static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id)
321{
322 unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR);
323 int i;
324
325 for (i = 0; i < JMR3927_NR_IRQ_ISAC; i++) {
326 if (istat & (1 << i)) {
327 irq = JMR3927_IRQ_ISAC + i;
328 do_IRQ(irq);
329 }
330 }
331 return IRQ_HANDLED;
332}
333
334static struct irqaction isac_action = {
335 jmr3927_isac_interrupt, 0, CPU_MASK_NONE, "ISAC", NULL, NULL,
336};
337
338
339static irqreturn_t jmr3927_isaerr_interrupt(int irq, void *dev_id)
340{
341 printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq);
342
343 return IRQ_HANDLED;
344}
345static struct irqaction isaerr_action = {
346 jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL,
347};
348
349static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) 141static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
350{ 142{
351 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); 143 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
@@ -358,54 +150,19 @@ static struct irqaction pcierr_action = {
358 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, 150 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL,
359}; 151};
360 152
361int jmr3927_ether1_irq = 0; 153static void __init jmr3927_irq_init(void);
362
363void jmr3927_irq_init(u32 irq_base);
364 154
365void __init arch_init_irq(void) 155void __init arch_init_irq(void)
366{ 156{
367 /* look for io board's presence */
368 int have_isac = jmr3927_have_isac();
369
370 /* Now, interrupt control disabled, */ 157 /* Now, interrupt control disabled, */
371 /* all IRC interrupts are masked, */ 158 /* all IRC interrupts are masked, */
372 /* all IRC interrupt mode are Low Active. */ 159 /* all IRC interrupt mode are Low Active. */
373 160
374 if (have_isac) {
375
376 /* ETHER1 (NE2000 compatible 10M-Ether) parameter setup */
377 /* temporary enable interrupt control */
378 tx3927_ircptr->cer = 1;
379 /* ETHER1 Int. Is High-Active. */
380 if (tx3927_ircptr->ssr & (1 << 0))
381 jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT0;
382#if 0 /* INT3 may be asserted by ether0 (even after reboot...) */
383 else if (tx3927_ircptr->ssr & (1 << 3))
384 jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT3;
385#endif
386 /* disable interrupt control */
387 tx3927_ircptr->cer = 0;
388
389 /* Ether1: High Active */
390 if (jmr3927_ether1_irq) {
391 int ether1_irc = jmr3927_ether1_irq - JMR3927_IRQ_IRC;
392 tx3927_ircptr->cr[ether1_irc / 8] |=
393 TX3927_IRCR_HIGH << ((ether1_irc % 8) * 2);
394 }
395 }
396
397 /* mask all IOC interrupts */ 161 /* mask all IOC interrupts */
398 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR); 162 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR);
399 /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */ 163 /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */
400 jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR); 164 jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR);
401 165
402 if (have_isac) {
403 /* mask all ISAC interrupts */
404 jmr3927_isac_reg_out(0, JMR3927_ISAC_INTM_ADDR);
405 /* setup ISAC interrupt mode (ISAIRQ3,ISAIRQ5:Low Active ???) */
406 jmr3927_isac_reg_out(JMR3927_ISAC_INTF_IRQ3|JMR3927_ISAC_INTF_IRQ5, JMR3927_ISAC_INTP_ADDR);
407 }
408
409 /* clear PCI Soft interrupts */ 166 /* clear PCI Soft interrupts */
410 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR); 167 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR);
411 /* clear PCI Reset interrupts */ 168 /* clear PCI Reset interrupts */
@@ -415,21 +172,11 @@ void __init arch_init_irq(void)
415 tx3927_ircptr->cer = TX3927_IRCER_ICE; 172 tx3927_ircptr->cer = TX3927_IRCER_ICE;
416 tx3927_ircptr->imr = irc_elevel; 173 tx3927_ircptr->imr = irc_elevel;
417 174
418 jmr3927_irq_init(NR_ISA_IRQS); 175 jmr3927_irq_init();
419
420 /* setup irq space */
421 add_tb_irq_space(&jmr3927_isac_irqspace);
422 add_tb_irq_space(&jmr3927_ioc_irqspace);
423 add_tb_irq_space(&jmr3927_irc_irqspace);
424 176
425 /* setup IOC interrupt 1 (PCI, MODEM) */ 177 /* setup IOC interrupt 1 (PCI, MODEM) */
426 setup_irq(JMR3927_IRQ_IOCINT, &ioc_action); 178 setup_irq(JMR3927_IRQ_IOCINT, &ioc_action);
427 179
428 if (have_isac) {
429 setup_irq(JMR3927_IRQ_ISACINT, &isac_action);
430 setup_irq(JMR3927_IRQ_ISAC_ISAER, &isaerr_action);
431 }
432
433#ifdef CONFIG_PCI 180#ifdef CONFIG_PCI
434 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); 181 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
435#endif 182#endif
@@ -438,21 +185,28 @@ void __init arch_init_irq(void)
438 set_c0_status(ST0_IM); /* IE bit is still 0. */ 185 set_c0_status(ST0_IM); /* IE bit is still 0. */
439} 186}
440 187
441static struct irq_chip jmr3927_irq_controller = { 188static struct irq_chip jmr3927_irq_ioc = {
442 .name = "jmr3927_irq", 189 .name = "jmr3927_ioc",
443 .ack = jmr3927_irq_ack, 190 .ack = mask_irq_ioc,
444 .mask = jmr3927_irq_disable, 191 .mask = mask_irq_ioc,
445 .mask_ack = jmr3927_irq_ack, 192 .mask_ack = mask_irq_ioc,
446 .unmask = jmr3927_irq_enable, 193 .unmask = unmask_irq_ioc,
447 .end = jmr3927_irq_end,
448}; 194};
449 195
450void jmr3927_irq_init(u32 irq_base) 196static struct irq_chip jmr3927_irq_irc = {
197 .name = "jmr3927_irc",
198 .ack = mask_irq_irc,
199 .mask = mask_irq_irc,
200 .mask_ack = mask_irq_irc,
201 .unmask = unmask_irq_irc,
202};
203
204static void __init jmr3927_irq_init(void)
451{ 205{
452 u32 i; 206 u32 i;
453 207
454 for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) 208 for (i = JMR3927_IRQ_IRC; i < JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC; i++)
455 set_irq_chip(i, &jmr3927_irq_controller); 209 set_irq_chip_and_handler(i, &jmr3927_irq_irc, handle_level_irq);
456 210 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
457 jmr3927_irq_base = irq_base; 211 set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
458} 212}
diff --git a/arch/mips/jmr3927/rbhma3100/kgdb_io.c b/arch/mips/jmr3927/rbhma3100/kgdb_io.c
index 269a42deae06..2604f2c9a96e 100644
--- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c
+++ b/arch/mips/jmr3927/rbhma3100/kgdb_io.c
@@ -31,23 +31,12 @@
31 * 675 Mass Ave, Cambridge, MA 02139, USA. 31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */ 32 */
33 33
34#include <linux/types.h>
35#include <asm/jmr3927/txx927.h>
36#include <asm/jmr3927/tx3927.h>
37#include <asm/jmr3927/jmr3927.h> 34#include <asm/jmr3927/jmr3927.h>
38 35
39#define TIMEOUT 0xffffff 36#define TIMEOUT 0xffffff
40#define SLOW_DOWN
41
42static const char digits[16] = "0123456789abcdef";
43
44#ifdef SLOW_DOWN
45#define slow_down() { int k; for (k=0; k<10000; k++); }
46#else
47#define slow_down()
48#endif
49 37
50static int remoteDebugInitialized = 0; 38static int remoteDebugInitialized = 0;
39static void debugInit(int baud)
51 40
52int putDebugChar(unsigned char c) 41int putDebugChar(unsigned char c)
53{ 42{
@@ -103,20 +92,8 @@ unsigned char getDebugChar(void)
103 return c; 92 return c;
104} 93}
105 94
106void debugInit(int baud) 95static void debugInit(int baud)
107{ 96{
108 /*
109 volatile unsigned long lcr;
110 volatile unsigned long dicr;
111 volatile unsigned long disr;
112 volatile unsigned long cisr;
113 volatile unsigned long fcr;
114 volatile unsigned long flcr;
115 volatile unsigned long bgr;
116 volatile unsigned long tfifo;
117 volatile unsigned long rfifo;
118 */
119
120 tx3927_sioptr(0)->lcr = 0x020; 97 tx3927_sioptr(0)->lcr = 0x020;
121 tx3927_sioptr(0)->dicr = 0; 98 tx3927_sioptr(0)->dicr = 0;
122 tx3927_sioptr(0)->disr = 0x4100; 99 tx3927_sioptr(0)->disr = 0x4100;
@@ -125,31 +102,4 @@ void debugInit(int baud)
125 tx3927_sioptr(0)->flcr = 0x02; 102 tx3927_sioptr(0)->flcr = 0x02;
126 tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) | 103 tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
127 TXx927_SIBGR_BCLK_T0; 104 TXx927_SIBGR_BCLK_T0;
128#if 0
129 /*
130 * Reset the UART.
131 */
132 tx3927_sioptr(0)->fcr = TXx927_SIFCR_SWRST;
133 while (tx3927_sioptr(0)->fcr & TXx927_SIFCR_SWRST)
134 ;
135
136 /*
137 * and set the speed of the serial port
138 * (currently hardwired to 9600 8N1
139 */
140
141 tx3927_sioptr(0)->lcr = TXx927_SILCR_UMODE_8BIT |
142 TXx927_SILCR_USBL_1BIT |
143 TXx927_SILCR_SCS_IMCLK_BG;
144 tx3927_sioptr(0)->bgr =
145 ((JMR3927_BASE_BAUD + baud / 2) / baud) |
146 TXx927_SIBGR_BCLK_T0;
147
148 /* HW RTS/CTS control */
149 if (ser->flags & ASYNC_HAVE_CTS_LINE)
150 tx3927_sioptr(0)->flcr = TXx927_SIFLCR_RCS | TXx927_SIFLCR_TES |
151 TXx927_SIFLCR_RTSTL_MAX /* 15 */;
152 /* Enable RX/TX */
153 tx3927_sioptr(0)->flcr &= ~(TXx927_SIFLCR_RSDE | TXx927_SIFLCR_TSDE);
154#endif
155} 105}
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index fc523bda068f..d1ef2895d564 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -54,87 +54,18 @@
54 54
55#include <asm/addrspace.h> 55#include <asm/addrspace.h>
56#include <asm/time.h> 56#include <asm/time.h>
57#include <asm/bcache.h>
58#include <asm/irq.h>
59#include <asm/reboot.h> 57#include <asm/reboot.h>
60#include <asm/gdb-stub.h>
61#include <asm/jmr3927/jmr3927.h> 58#include <asm/jmr3927/jmr3927.h>
62#include <asm/mipsregs.h> 59#include <asm/mipsregs.h>
63#include <asm/traps.h>
64 60
65extern void puts(unsigned char *cp); 61extern void puts(const char *cp);
66 62
67/* Tick Timer divider */ 63/* Tick Timer divider */
68#define JMR3927_TIMER_CCD 0 /* 1/2 */ 64#define JMR3927_TIMER_CCD 0 /* 1/2 */
69#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD)) 65#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD))
70 66
71unsigned char led_state = 0xf;
72
73struct {
74 struct resource ram0;
75 struct resource ram1;
76 struct resource pcimem;
77 struct resource iob;
78 struct resource ioc;
79 struct resource pciio;
80 struct resource jmy1394;
81 struct resource rom1;
82 struct resource rom0;
83 struct resource sio0;
84 struct resource sio1;
85} jmr3927_resources = {
86 {
87 .start = 0,
88 .end = 0x01FFFFFF,
89 .name = "RAM0",
90 .flags = IORESOURCE_MEM
91 }, {
92 .start = 0x02000000,
93 .end = 0x03FFFFFF,
94 .name = "RAM1",
95 .flags = IORESOURCE_MEM
96 }, {
97 .start = 0x08000000,
98 .end = 0x07FFFFFF,
99 .name = "PCIMEM",
100 .flags = IORESOURCE_MEM
101 }, {
102 .start = 0x10000000,
103 .end = 0x13FFFFFF,
104 .name = "IOB"
105 }, {
106 .start = 0x14000000,
107 .end = 0x14FFFFFF,
108 .name = "IOC"
109 }, {
110 .start = 0x15000000,
111 .end = 0x15FFFFFF,
112 .name = "PCIIO"
113 }, {
114 .start = 0x1D000000,
115 .end = 0x1D3FFFFF,
116 .name = "JMY1394"
117 }, {
118 .start = 0x1E000000,
119 .end = 0x1E3FFFFF,
120 .name = "ROM1"
121 }, {
122 .start = 0x1FC00000,
123 .end = 0x1FFFFFFF,
124 .name = "ROM0"
125 }, {
126 .start = 0xFFFEF300,
127 .end = 0xFFFEF3FF,
128 .name = "SIO0"
129 }, {
130 .start = 0xFFFEF400,
131 .end = 0xFFFEF4FF,
132 .name = "SIO1"
133 },
134};
135
136/* don't enable - see errata */ 67/* don't enable - see errata */
137int jmr3927_ccfg_toeon = 0; 68static int jmr3927_ccfg_toeon;
138 69
139static inline void do_reset(void) 70static inline void do_reset(void)
140{ 71{
@@ -173,9 +104,15 @@ static cycle_t jmr3927_hpt_read(void)
173 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; 104 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
174} 105}
175 106
107static void jmr3927_timer_ack(void)
108{
109 jmr3927_tmrptr->tisr = 0; /* ack interrupt */
110}
111
176static void __init jmr3927_time_init(void) 112static void __init jmr3927_time_init(void)
177{ 113{
178 clocksource_mips.read = jmr3927_hpt_read; 114 clocksource_mips.read = jmr3927_hpt_read;
115 mips_timer_ack = jmr3927_timer_ack;
179 mips_hpt_frequency = JMR3927_TIMER_CLK; 116 mips_hpt_frequency = JMR3927_TIMER_CLK;
180} 117}
181 118
@@ -190,9 +127,6 @@ void __init plat_timer_setup(struct irqaction *irq)
190 setup_irq(JMR3927_IRQ_TICK, irq); 127 setup_irq(JMR3927_IRQ_TICK, irq);
191} 128}
192 129
193#define USECS_PER_JIFFY (1000000/HZ)
194
195//#undef DO_WRITE_THROUGH
196#define DO_WRITE_THROUGH 130#define DO_WRITE_THROUGH
197#define DO_ENABLE_CACHE 131#define DO_ENABLE_CACHE
198 132
@@ -224,12 +158,6 @@ void __init plat_mem_setup(void)
224 /* Reboot on panic */ 158 /* Reboot on panic */
225 panic_timeout = 180; 159 panic_timeout = 180;
226 160
227 {
228 unsigned int conf;
229 conf = read_c0_conf();
230 }
231
232#if 1
233 /* cache setup */ 161 /* cache setup */
234 { 162 {
235 unsigned int conf; 163 unsigned int conf;
@@ -256,16 +184,14 @@ void __init plat_mem_setup(void)
256 write_c0_conf(conf); 184 write_c0_conf(conf);
257 write_c0_cache(0); 185 write_c0_cache(0);
258 } 186 }
259#endif
260 187
261 /* initialize board */ 188 /* initialize board */
262 jmr3927_board_init(); 189 jmr3927_board_init();
263 190
264 argptr = prom_getcmdline(); 191 argptr = prom_getcmdline();
265 192
266 if ((argptr = strstr(argptr, "toeon")) != NULL) { 193 if ((argptr = strstr(argptr, "toeon")) != NULL)
267 jmr3927_ccfg_toeon = 1; 194 jmr3927_ccfg_toeon = 1;
268 }
269 argptr = prom_getcmdline(); 195 argptr = prom_getcmdline();
270 if ((argptr = strstr(argptr, "ip=")) == NULL) { 196 if ((argptr = strstr(argptr, "ip=")) == NULL) {
271 argptr = prom_getcmdline(); 197 argptr = prom_getcmdline();
@@ -281,7 +207,7 @@ void __init plat_mem_setup(void)
281 memset(&req, 0, sizeof(req)); 207 memset(&req, 0, sizeof(req));
282 req.line = i; 208 req.line = i;
283 req.iotype = UPIO_MEM; 209 req.iotype = UPIO_MEM;
284 req.membase = (char *)TX3927_SIO_REG(i); 210 req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i);
285 req.mapbase = TX3927_SIO_REG(i); 211 req.mapbase = TX3927_SIO_REG(i);
286 req.irq = i == 0 ? 212 req.irq = i == 0 ?
287 JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; 213 JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
@@ -303,65 +229,33 @@ void __init plat_mem_setup(void)
303 229
304static void tx3927_setup(void); 230static void tx3927_setup(void);
305 231
306#ifdef CONFIG_PCI
307unsigned long mips_pci_io_base;
308unsigned long mips_pci_io_size;
309unsigned long mips_pci_mem_base;
310unsigned long mips_pci_mem_size;
311/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
312unsigned long mips_pci_io_pciaddr = 0;
313#endif
314
315static void __init jmr3927_board_init(void) 232static void __init jmr3927_board_init(void)
316{ 233{
317 char *argptr;
318
319#ifdef CONFIG_PCI
320 mips_pci_io_base = JMR3927_PCIIO;
321 mips_pci_io_size = JMR3927_PCIIO_SIZE;
322 mips_pci_mem_base = JMR3927_PCIMEM;
323 mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
324#endif
325
326 tx3927_setup(); 234 tx3927_setup();
327 235
328 if (jmr3927_have_isac()) {
329
330#ifdef CONFIG_FB_E1355
331 argptr = prom_getcmdline();
332 if ((argptr = strstr(argptr, "video=")) == NULL) {
333 argptr = prom_getcmdline();
334 strcat(argptr, " video=e1355fb:crt16h");
335 }
336#endif
337
338#ifdef CONFIG_BLK_DEV_IDE
339 /* overrides PCI-IDE */
340#endif
341 }
342
343 /* SIO0 DTR on */ 236 /* SIO0 DTR on */
344 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); 237 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
345 238
346 jmr3927_led_set(0); 239 jmr3927_led_set(0);
347 240
348
349 if (jmr3927_have_isac())
350 jmr3927_io_led_set(0);
351 printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", 241 printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
352 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, 242 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
353 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, 243 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
354 jmr3927_dipsw1(), jmr3927_dipsw2(), 244 jmr3927_dipsw1(), jmr3927_dipsw2(),
355 jmr3927_dipsw3(), jmr3927_dipsw4()); 245 jmr3927_dipsw3(), jmr3927_dipsw4());
356 if (jmr3927_have_isac())
357 printk("JMI-3927IO2 --- ISAC(Rev %d) DIPSW:%01x\n",
358 jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_REV_MASK,
359 jmr3927_io_dipsw());
360} 246}
361 247
362void __init tx3927_setup(void) 248static void __init tx3927_setup(void)
363{ 249{
364 int i; 250 int i;
251#ifdef CONFIG_PCI
252 unsigned long mips_pci_io_base = JMR3927_PCIIO;
253 unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
254 unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
255 unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
256 /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
257 unsigned long mips_pci_io_pciaddr = 0;
258#endif
365 259
366 /* SDRAMC are configured by PROM */ 260 /* SDRAMC are configured by PROM */
367 261
@@ -475,10 +369,8 @@ void __init tx3927_setup(void)
475 tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1); 369 tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
476 tx3927_pcicptr->mba = 0; 370 tx3927_pcicptr->mba = 0;
477 tx3927_pcicptr->tlbmma = 0; 371 tx3927_pcicptr->tlbmma = 0;
478#ifndef JMR3927_INIT_INDIRECT_PCI
479 /* Enable Direct mapping Address Space Decoder */ 372 /* Enable Direct mapping Address Space Decoder */
480 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE; 373 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
481#endif
482 374
483 /* Clear All Local Bus Status */ 375 /* Clear All Local Bus Status */
484 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL; 376 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
@@ -491,22 +383,15 @@ void __init tx3927_setup(void)
491 383
492 /* PCIC Int => IRC IRQ10 */ 384 /* PCIC Int => IRC IRQ10 */
493 tx3927_pcicptr->il = TX3927_IR_PCI; 385 tx3927_pcicptr->il = TX3927_IR_PCI;
494#if 1
495 /* Target Control (per errata) */ 386 /* Target Control (per errata) */
496 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E; 387 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
497#endif
498 388
499 /* Enable Bus Arbiter */ 389 /* Enable Bus Arbiter */
500#if 0
501 tx3927_pcicptr->req_trace = 0x73737373;
502#endif
503 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN; 390 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
504 391
505 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER | 392 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
506 PCI_COMMAND_MEMORY | 393 PCI_COMMAND_MEMORY |
507#if 1
508 PCI_COMMAND_IO | 394 PCI_COMMAND_IO |
509#endif
510 PCI_COMMAND_PARITY | PCI_COMMAND_SERR; 395 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
511 } 396 }
512#endif /* CONFIG_PCI */ 397#endif /* CONFIG_PCI */
@@ -555,8 +440,6 @@ static int __init jmr3927_rtc_init(void)
555 .flags = IORESOURCE_MEM, 440 .flags = IORESOURCE_MEM,
556 }; 441 };
557 struct platform_device *dev; 442 struct platform_device *dev;
558 if (!jmr3927_have_nvram())
559 return -ENODEV;
560 dev = platform_device_register_simple("ds1742", -1, &res, 1); 443 dev = platform_device_register_simple("ds1742", -1, &res, 1);
561 return IS_ERR(dev) ? PTR_ERR(dev) : 0; 444 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
562} 445}
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 222de465db73..761a779d5c4f 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -102,7 +102,6 @@ void output_thread_info_defines(void)
102 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit); 102 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
103 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block); 103 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
104 offset("#define TI_REGS ", struct thread_info, regs); 104 offset("#define TI_REGS ", struct thread_info, regs);
105 constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
106 constant("#define _THREAD_SIZE ", THREAD_SIZE); 105 constant("#define _THREAD_SIZE ", THREAD_SIZE);
107 constant("#define _THREAD_MASK ", THREAD_MASK); 106 constant("#define _THREAD_MASK ", THREAD_MASK);
108 linefeed; 107 linefeed;
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 9c79703979b2..2345160e63fc 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -328,8 +328,8 @@ void __init init_i8259_irqs (void)
328{ 328{
329 int i; 329 int i;
330 330
331 request_resource(&ioport_resource, &pic1_io_resource); 331 insert_resource(&ioport_resource, &pic1_io_resource);
332 request_resource(&ioport_resource, &pic2_io_resource); 332 insert_resource(&ioport_resource, &pic2_io_resource);
333 333
334 init_8259A(0); 334 init_8259A(0);
335 335
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index 29eadd404fa5..c6580018c94b 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -17,6 +17,7 @@
17 */ 17 */
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/sched.h>
20#include <linux/unistd.h> 21#include <linux/unistd.h>
21#include <linux/file.h> 22#include <linux/file.h>
22#include <linux/fs.h> 23#include <linux/fs.h>
@@ -198,7 +199,6 @@ void sp_work_handle_request(void)
198 int cmd; 199 int cmd;
199 200
200 char *vcwd; 201 char *vcwd;
201 mm_segment_t old_fs;
202 int size; 202 int size;
203 203
204 ret.retval = -1; 204 ret.retval = -1;
@@ -241,8 +241,6 @@ void sp_work_handle_request(void)
241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv, 241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
242 (int)&tz, 0,0)) == 0) 242 (int)&tz, 0,0)) == 0)
243 ret.retval = tv.tv_sec; 243 ret.retval = tv.tv_sec;
244
245 ret.errno = errno;
246 break; 244 break;
247 245
248 case MTSP_SYSCALL_EXIT: 246 case MTSP_SYSCALL_EXIT:
@@ -279,7 +277,6 @@ void sp_work_handle_request(void)
279 if (cmd >= 0) { 277 if (cmd >= 0) {
280 ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1, 278 ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1,
281 generic.arg2, generic.arg3); 279 generic.arg2, generic.arg3);
282 ret.errno = errno;
283 } else 280 } else
284 printk(KERN_WARNING 281 printk(KERN_WARNING
285 "KSPD: Unknown SP syscall number %d\n", sc.cmd); 282 "KSPD: Unknown SP syscall number %d\n", sc.cmd);
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index e6e3047151a6..bfc8ca168f83 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -289,7 +289,7 @@ unsigned int rtlx_write_poll(int index)
289 return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size); 289 return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size);
290} 290}
291 291
292ssize_t rtlx_read(int index, void __user *buff, size_t count, int user) 292ssize_t rtlx_read(int index, void __user *buff, size_t count)
293{ 293{
294 size_t lx_write, fl = 0L; 294 size_t lx_write, fl = 0L;
295 struct rtlx_channel *lx; 295 struct rtlx_channel *lx;
@@ -331,9 +331,10 @@ out:
331 return count; 331 return count;
332} 332}
333 333
334ssize_t rtlx_write(int index, const void __user *buffer, size_t count, int user) 334ssize_t rtlx_write(int index, const void __user *buffer, size_t count)
335{ 335{
336 struct rtlx_channel *rt; 336 struct rtlx_channel *rt;
337 unsigned long failed;
337 size_t rt_read; 338 size_t rt_read;
338 size_t fl; 339 size_t fl;
339 340
@@ -363,7 +364,7 @@ ssize_t rtlx_write(int index, const void __user *buffer, size_t count, int user)
363 } 364 }
364 365
365out: 366out:
366 count -= cailed; 367 count -= failed;
367 368
368 smp_wmb(); 369 smp_wmb();
369 rt->rt_write = (rt->rt_write + count) % rt->buffer_size; 370 rt->rt_write = (rt->rt_write + count) % rt->buffer_size;
diff --git a/arch/mips/mips-boards/generic/display.c b/arch/mips/mips-boards/generic/display.c
index f653946afc23..548dbe5ce7c8 100644
--- a/arch/mips/mips-boards/generic/display.c
+++ b/arch/mips/mips-boards/generic/display.c
@@ -24,16 +24,16 @@
24 24
25void mips_display_message(const char *str) 25void mips_display_message(const char *str)
26{ 26{
27 static volatile unsigned int *display = NULL; 27 static unsigned int __iomem *display = NULL;
28 int i; 28 int i;
29 29
30 if (unlikely(display == NULL)) 30 if (unlikely(display == NULL))
31 display = (volatile unsigned int *)ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); 31 display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
32 32
33 for (i = 0; i <= 14; i=i+2) { 33 for (i = 0; i <= 14; i=i+2) {
34 if (*str) 34 if (*str)
35 display[i] = *str++; 35 writel(*str++, display + i);
36 else 36 else
37 display[i] = ' '; 37 writel(' ', display + i);
38 } 38 }
39} 39}
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 3192a14698c8..f98d60f78658 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -65,7 +65,7 @@ static struct resource msc_io_resource = {
65}; 65};
66 66
67extern struct pci_ops bonito64_pci_ops; 67extern struct pci_ops bonito64_pci_ops;
68extern struct pci_ops gt64120_pci_ops; 68extern struct pci_ops gt64xxx_pci0_ops;
69extern struct pci_ops msc_pci_ops; 69extern struct pci_ops msc_pci_ops;
70 70
71static struct pci_controller bonito64_controller = { 71static struct pci_controller bonito64_controller = {
@@ -76,7 +76,7 @@ static struct pci_controller bonito64_controller = {
76}; 76};
77 77
78static struct pci_controller gt64120_controller = { 78static struct pci_controller gt64120_controller = {
79 .pci_ops = &gt64120_pci_ops, 79 .pci_ops = &gt64xxx_pci0_ops,
80 .io_resource = &gt64120_io_resource, 80 .io_resource = &gt64120_io_resource,
81 .mem_resource = &gt64120_mem_resource, 81 .mem_resource = &gt64120_mem_resource,
82}; 82};
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c
index 0996ba368b2a..7a1bb51f81ee 100644
--- a/arch/mips/mips-boards/generic/reset.c
+++ b/arch/mips/mips-boards/generic/reset.c
@@ -39,24 +39,24 @@ static void atlas_machine_power_off(void);
39 39
40static void mips_machine_restart(char *command) 40static void mips_machine_restart(char *command)
41{ 41{
42 volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int)); 42 unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int));
43 43
44 *softres_reg = GORESET; 44 writew(GORESET, softres_reg);
45} 45}
46 46
47static void mips_machine_halt(void) 47static void mips_machine_halt(void)
48{ 48{
49 volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int)); 49 unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int));
50 50
51 *softres_reg = GORESET; 51 writew(GORESET, softres_reg);
52} 52}
53 53
54#if defined(CONFIG_MIPS_ATLAS) 54#if defined(CONFIG_MIPS_ATLAS)
55static void atlas_machine_power_off(void) 55static void atlas_machine_power_off(void)
56{ 56{
57 volatile unsigned int *psustby_reg = (unsigned int *)ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int)); 57 unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
58 58
59 *psustby_reg = ATLAS_GOSTBY; 59 writew(ATLAS_GOSTBY, psustby_reg);
60} 60}
61#endif 61#endif
62 62
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index 3c206bb17160..83d76025d61d 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -42,8 +42,6 @@
42#include <asm/mips-boards/msc01_pci.h> 42#include <asm/mips-boards/msc01_pci.h>
43#include <asm/msc01_ic.h> 43#include <asm/msc01_ic.h>
44 44
45extern void mips_timer_interrupt(void);
46
47static DEFINE_SPINLOCK(mips_irq_lock); 45static DEFINE_SPINLOCK(mips_irq_lock);
48 46
49static inline int mips_pcibios_iack(void) 47static inline int mips_pcibios_iack(void)
@@ -85,7 +83,7 @@ static inline int mips_pcibios_iack(void)
85 dummy = BONITO_PCIMAP_CFG; 83 dummy = BONITO_PCIMAP_CFG;
86 iob(); /* sync */ 84 iob(); /* sync */
87 85
88 irq = *(volatile u32 *)(_pcictrl_bonito_pcicfg); 86 irq = readl((u32 *)_pcictrl_bonito_pcicfg);
89 iob(); /* sync */ 87 iob(); /* sync */
90 irq &= 0xff; 88 irq &= 0xff;
91 BONITO_PCIMAP_CFG = 0; 89 BONITO_PCIMAP_CFG = 0;
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index 56ea76679cd4..7873932532a1 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -145,7 +145,8 @@ void __init plat_mem_setup(void)
145#ifdef CONFIG_BLK_DEV_IDE 145#ifdef CONFIG_BLK_DEV_IDE
146 /* Check PCI clock */ 146 /* Check PCI clock */
147 { 147 {
148 int jmpr = (*((volatile unsigned int *)ioremap(MALTA_JMPRS_REG, sizeof(unsigned int))) >> 2) & 0x07; 148 unsigned int __iomem *jmpr_p = (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
149 int jmpr = (readw(jmpr_p) >> 2) & 0x07;
149 static const int pciclocks[] __initdata = { 150 static const int pciclocks[] __initdata = {
150 33, 20, 25, 30, 12, 16, 37, 10 151 33, 20, 25, 30, 12, 16, 37, 10
151 }; 152 };
@@ -179,7 +180,6 @@ void __init plat_mem_setup(void)
179 }; 180 };
180#endif 181#endif
181#endif 182#endif
182
183 mips_reboot_setup(); 183 mips_reboot_setup();
184 184
185 board_time_init = mips_time_init; 185 board_time_init = mips_time_init;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 4e8f1b683376..abf99b1eba13 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -96,7 +96,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
96 96
97 kaddr = kmap_coherent(page, vmaddr); 97 kaddr = kmap_coherent(page, vmaddr);
98 flush_data_cache_page((unsigned long)kaddr); 98 flush_data_cache_page((unsigned long)kaddr);
99 kunmap_coherent(kaddr); 99 kunmap_coherent();
100 } 100 }
101} 101}
102 102
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index e9951c0e689f..2d1c2c024822 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -177,7 +177,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
177 177
178#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) 178#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
179 179
180void kunmap_coherent(struct page *page) 180void kunmap_coherent(void)
181{ 181{
182#ifndef CONFIG_MIPS_MT_SMTC 182#ifndef CONFIG_MIPS_MT_SMTC
183 unsigned int wired; 183 unsigned int wired;
@@ -210,7 +210,7 @@ void copy_user_highpage(struct page *to, struct page *from,
210 if (cpu_has_dc_aliases) { 210 if (cpu_has_dc_aliases) {
211 vfrom = kmap_coherent(from, vaddr); 211 vfrom = kmap_coherent(from, vaddr);
212 copy_page(vto, vfrom); 212 copy_page(vto, vfrom);
213 kunmap_coherent(from); 213 kunmap_coherent();
214 } else { 214 } else {
215 vfrom = kmap_atomic(from, KM_USER0); 215 vfrom = kmap_atomic(from, KM_USER0);
216 copy_page(vto, vfrom); 216 copy_page(vto, vfrom);
@@ -233,7 +233,7 @@ void copy_to_user_page(struct vm_area_struct *vma,
233 if (cpu_has_dc_aliases) { 233 if (cpu_has_dc_aliases) {
234 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 234 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
235 memcpy(vto, src, len); 235 memcpy(vto, src, len);
236 kunmap_coherent(page); 236 kunmap_coherent();
237 } else 237 } else
238 memcpy(dst, src, len); 238 memcpy(dst, src, len);
239 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) 239 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
@@ -250,7 +250,7 @@ void copy_from_user_page(struct vm_area_struct *vma,
250 void *vfrom = 250 void *vfrom =
251 kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 251 kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
252 memcpy(dst, vfrom, len); 252 memcpy(dst, vfrom, len);
253 kunmap_coherent(page); 253 kunmap_coherent();
254 } else 254 } else
255 memcpy(dst, src, len); 255 memcpy(dst, src, len);
256} 256}
@@ -351,18 +351,15 @@ void __init paging_init(void)
351#endif 351#endif
352 kmap_coherent_init(); 352 kmap_coherent_init();
353 353
354#ifdef CONFIG_ISA 354#ifdef CONFIG_ZONE_DMA
355 if (max_low_pfn >= MAX_DMA_PFN) 355 if (min_low_pfn < MAX_DMA_PFN && MAX_DMA_PFN <= max_low_pfn) {
356 if (min_low_pfn >= MAX_DMA_PFN) { 356 zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
357 zones_size[ZONE_DMA] = 0; 357 zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
358 zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn; 358 } else if (max_low_pfn < MAX_DMA_PFN)
359 } else { 359 zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
360 zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
361 zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
362 }
363 else 360 else
364#endif 361#endif
365 zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn; 362 zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
366 363
367#ifdef CONFIG_HIGHMEM 364#ifdef CONFIG_HIGHMEM
368 zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn; 365 zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn;
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index bf85995ca042..df487c063b1d 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -8,8 +8,7 @@ obj-y += pci.o pci-dac.o
8# PCI bus host bridge specific code 8# PCI bus host bridge specific code
9# 9#
10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
11obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o 11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
12obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
13obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o 12obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
14obj-$(CONFIG_MIPS_MSC) += ops-msc.o 13obj-$(CONFIG_MIPS_MSC) += ops-msc.o
15obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o 14obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c
index 6e72d213f4cd..73d18503517c 100644
--- a/arch/mips/pci/fixup-jmr3927.c
+++ b/arch/mips/pci/fixup-jmr3927.c
@@ -29,7 +29,6 @@
29 */ 29 */
30#include <linux/types.h> 30#include <linux/types.h>
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/kernel.h>
33#include <linux/init.h> 32#include <linux/init.h>
34 33
35#include <asm/jmr3927/jmr3927.h> 34#include <asm/jmr3927/jmr3927.h>
@@ -81,14 +80,8 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
81 80
82 /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */ 81 /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
83 if (dev->bus->parent == NULL && 82 if (dev->bus->parent == NULL &&
84 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) { 83 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
85 extern int jmr3927_ether1_irq; 84 irq = JMR3927_IRQ_ETHER0;
86 /* check this irq line was reserved for ether1 */
87 if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0)
88 irq = JMR3927_IRQ_ETHER0;
89 else
90 irq = 0; /* disable */
91 }
92 return irq; 85 return irq;
93} 86}
94 87
diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
deleted file mode 100644
index ecd3991bd0e4..000000000000
--- a/arch/mips/pci/ops-gt64111.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 2002 by Ralf Baechle
7 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
8 */
9#include <linux/types.h>
10#include <linux/pci.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13
14#include <asm/pci.h>
15#include <asm/io.h>
16#include <asm/gt64120.h>
17
18#include <asm/mach-cobalt/cobalt.h>
19
20/*
21 * Device 31 on the GT64111 is used to generate PCI special
22 * cycles, so we shouldn't expected to find a device there ...
23 */
24static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
25{
26 if (bus->number == 0 && PCI_SLOT(devfn) < 31)
27 return 0;
28
29 return -1;
30}
31
32static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
33 int where, int size, u32 * val)
34{
35 if (pci_range_ck(bus, devfn))
36 return PCIBIOS_DEVICE_NOT_FOUND;
37
38 switch (size) {
39 case 4:
40 PCI_CFG_SET(devfn, where);
41 *val = GT_READ(GT_PCI0_CFGDATA_OFS);
42 return PCIBIOS_SUCCESSFUL;
43
44 case 2:
45 PCI_CFG_SET(devfn, (where & ~0x3));
46 *val = GT_READ(GT_PCI0_CFGDATA_OFS)
47 >> ((where & 3) * 8);
48 return PCIBIOS_SUCCESSFUL;
49
50 case 1:
51 PCI_CFG_SET(devfn, (where & ~0x3));
52 *val = GT_READ(GT_PCI0_CFGDATA_OFS)
53 >> ((where & 3) * 8);
54 return PCIBIOS_SUCCESSFUL;
55 }
56
57 return PCIBIOS_BAD_REGISTER_NUMBER;
58}
59
60static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn,
61 int where, int size, u32 val)
62{
63 u32 tmp;
64
65 if (pci_range_ck(bus, devfn))
66 return PCIBIOS_DEVICE_NOT_FOUND;
67
68 switch (size) {
69 case 4:
70 PCI_CFG_SET(devfn, where);
71 GT_WRITE(GT_PCI0_CFGDATA_OFS, val);
72
73 return PCIBIOS_SUCCESSFUL;
74
75 case 2:
76 PCI_CFG_SET(devfn, (where & ~0x3));
77 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
78 tmp &= ~(0xffff << ((where & 0x3) * 8));
79 tmp |= (val << ((where & 0x3) * 8));
80 GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
81
82 return PCIBIOS_SUCCESSFUL;
83
84 case 1:
85 PCI_CFG_SET(devfn, (where & ~0x3));
86 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
87 tmp &= ~(0xff << ((where & 0x3) * 8));
88 tmp |= (val << ((where & 0x3) * 8));
89 GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
90
91 return PCIBIOS_SUCCESSFUL;
92 }
93
94 return PCIBIOS_BAD_REGISTER_NUMBER;
95}
96
97struct pci_ops gt64111_pci_ops = {
98 .read = gt64111_pci_read_config,
99 .write = gt64111_pci_write_config,
100};
diff --git a/arch/mips/pci/ops-gt64120.c b/arch/mips/pci/ops-gt64xxx_pci0.c
index 6335844d607a..3d896c5f413f 100644
--- a/arch/mips/pci/ops-gt64120.c
+++ b/arch/mips/pci/ops-gt64xxx_pci0.c
@@ -39,8 +39,8 @@
39#define PCI_CFG_TYPE1_DEV_SHF 11 39#define PCI_CFG_TYPE1_DEV_SHF 11
40#define PCI_CFG_TYPE1_BUS_SHF 16 40#define PCI_CFG_TYPE1_BUS_SHF 16
41 41
42static int gt64120_pcibios_config_access(unsigned char access_type, 42static int gt64xxx_pci0_pcibios_config_access(unsigned char access_type,
43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
44{ 44{
45 unsigned char busnum = bus->number; 45 unsigned char busnum = bus->number;
46 u32 intr; 46 u32 intr;
@@ -100,13 +100,13 @@ static int gt64120_pcibios_config_access(unsigned char access_type,
100 * We can't address 8 and 16 bit words directly. Instead we have to 100 * We can't address 8 and 16 bit words directly. Instead we have to
101 * read/write a 32bit word and mask/modify the data we actually want. 101 * read/write a 32bit word and mask/modify the data we actually want.
102 */ 102 */
103static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn, 103static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn,
104 int where, int size, u32 * val) 104 int where, int size, u32 * val)
105{ 105{
106 u32 data = 0; 106 u32 data = 0;
107 107
108 if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 108 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
109 &data)) 109 where, &data))
110 return PCIBIOS_DEVICE_NOT_FOUND; 110 return PCIBIOS_DEVICE_NOT_FOUND;
111 111
112 if (size == 1) 112 if (size == 1)
@@ -119,16 +119,16 @@ static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
119 return PCIBIOS_SUCCESSFUL; 119 return PCIBIOS_SUCCESSFUL;
120} 120}
121 121
122static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn, 122static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn,
123 int where, int size, u32 val) 123 int where, int size, u32 val)
124{ 124{
125 u32 data = 0; 125 u32 data = 0;
126 126
127 if (size == 4) 127 if (size == 4)
128 data = val; 128 data = val;
129 else { 129 else {
130 if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, 130 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus,
131 where, &data)) 131 devfn, where, &data))
132 return PCIBIOS_DEVICE_NOT_FOUND; 132 return PCIBIOS_DEVICE_NOT_FOUND;
133 133
134 if (size == 1) 134 if (size == 1)
@@ -139,14 +139,14 @@ static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
139 (val << ((where & 3) << 3)); 139 (val << ((where & 3) << 3));
140 } 140 }
141 141
142 if (gt64120_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, 142 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn,
143 &data)) 143 where, &data))
144 return PCIBIOS_DEVICE_NOT_FOUND; 144 return PCIBIOS_DEVICE_NOT_FOUND;
145 145
146 return PCIBIOS_SUCCESSFUL; 146 return PCIBIOS_SUCCESSFUL;
147} 147}
148 148
149struct pci_ops gt64120_pci_ops = { 149struct pci_ops gt64xxx_pci0_ops = {
150 .read = gt64120_pcibios_read, 150 .read = gt64xxx_pci0_pcibios_read,
151 .write = gt64120_pcibios_write 151 .write = gt64xxx_pci0_pcibios_write
152}; 152};
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c
index 42530a0b84b3..aa698bd0d5e3 100644
--- a/arch/mips/pci/ops-tx3927.c
+++ b/arch/mips/pci/ops-tx3927.c
@@ -40,7 +40,6 @@
40 40
41#include <asm/addrspace.h> 41#include <asm/addrspace.h>
42#include <asm/jmr3927/jmr3927.h> 42#include <asm/jmr3927/jmr3927.h>
43#include <asm/debug.h>
44 43
45static inline int mkaddr(unsigned char bus, unsigned char dev_fn, 44static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
46 unsigned char where) 45 unsigned char where)
@@ -130,234 +129,3 @@ struct pci_ops jmr3927_pci_ops = {
130 jmr3927_pci_read_config, 129 jmr3927_pci_read_config,
131 jmr3927_pci_write_config, 130 jmr3927_pci_write_config,
132}; 131};
133
134
135#ifndef JMR3927_INIT_INDIRECT_PCI
136
137inline unsigned long tc_readl(volatile __u32 * addr)
138{
139 return readl(addr);
140}
141
142inline void tc_writel(unsigned long data, volatile __u32 * addr)
143{
144 writel(data, addr);
145}
146#else
147
148unsigned long tc_readl(volatile __u32 * addr)
149{
150 unsigned long val;
151
152 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
153 (unsigned long) CPHYSADDR(addr);
154 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
155 (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
156 PCI_IPCIBE_IBE_LONG;
157 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
158 val =
159 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
160 ipcidata);
161 /* clear by setting */
162 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
163 return val;
164}
165
166void tc_writel(unsigned long data, volatile __u32 * addr)
167{
168 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
169 cpu_to_le32(data);
170 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
171 (unsigned long) CPHYSADDR(addr);
172 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
173 (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
174 PCI_IPCIBE_IBE_LONG;
175 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
176 /* clear by setting */
177 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
178}
179
180unsigned char tx_ioinb(unsigned char *addr)
181{
182 unsigned long val;
183 __u32 ioaddr;
184 int offset;
185 int byte;
186
187 ioaddr = (unsigned long) addr;
188 offset = ioaddr & 0x3;
189 byte = 0xf & ~(8 >> offset);
190
191 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
192 (unsigned long) ioaddr;
193 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
194 (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
195 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
196 val =
197 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
198 ipcidata);
199 val = val & 0xff;
200 /* clear by setting */
201 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
202 return val;
203}
204
205void tx_iooutb(unsigned long data, unsigned char *addr)
206{
207 __u32 ioaddr;
208 int offset;
209 int byte;
210
211 data = data | (data << 8) | (data << 16) | (data << 24);
212 ioaddr = (unsigned long) addr;
213 offset = ioaddr & 0x3;
214 byte = 0xf & ~(8 >> offset);
215
216 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
217 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
218 (unsigned long) ioaddr;
219 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
220 (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
221 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
222 /* clear by setting */
223 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
224}
225
226unsigned short tx_ioinw(unsigned short *addr)
227{
228 unsigned long val;
229 __u32 ioaddr;
230 int offset;
231 int byte;
232
233 ioaddr = (unsigned long) addr;
234 offset = ioaddr & 0x2;
235 byte = 3 << offset;
236
237 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
238 (unsigned long) ioaddr;
239 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
240 (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
241 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
242 val =
243 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
244 ipcidata);
245 val = val & 0xffff;
246 /* clear by setting */
247 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
248 return val;
249
250}
251
252void tx_iooutw(unsigned long data, unsigned short *addr)
253{
254 __u32 ioaddr;
255 int offset;
256 int byte;
257
258 data = data | (data << 16);
259 ioaddr = (unsigned long) addr;
260 offset = ioaddr & 0x2;
261 byte = 3 << offset;
262
263 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
264 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
265 (unsigned long) ioaddr;
266 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
267 (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
268 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
269 /* clear by setting */
270 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
271}
272
273unsigned long tx_ioinl(unsigned int *addr)
274{
275 unsigned long val;
276 __u32 ioaddr;
277
278 ioaddr = (unsigned long) addr;
279 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
280 (unsigned long) ioaddr;
281 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
282 (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
283 PCI_IPCIBE_IBE_LONG;
284 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
285 val =
286 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
287 ipcidata);
288 /* clear by setting */
289 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
290 return val;
291}
292
293void tx_iooutl(unsigned long data, unsigned int *addr)
294{
295 __u32 ioaddr;
296
297 ioaddr = (unsigned long) addr;
298 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
299 cpu_to_le32(data);
300 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
301 (unsigned long) ioaddr;
302 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
303 (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
304 PCI_IPCIBE_IBE_LONG;
305 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
306 /* clear by setting */
307 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
308}
309
310void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count)
311{
312 unsigned char *ptr = (unsigned char *) buffer;
313
314 while (count--) {
315 *ptr++ = tx_ioinb(addr);
316 }
317}
318
319void tx_insword(unsigned short *addr, void *buffer, unsigned int count)
320{
321 unsigned short *ptr = (unsigned short *) buffer;
322
323 while (count--) {
324 *ptr++ = tx_ioinw(addr);
325 }
326}
327
328void tx_inslong(unsigned int *addr, void *buffer, unsigned int count)
329{
330 unsigned long *ptr = (unsigned long *) buffer;
331
332 while (count--) {
333 *ptr++ = tx_ioinl(addr);
334 }
335}
336
337void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count)
338{
339 unsigned char *ptr = (unsigned char *) buffer;
340
341 while (count--) {
342 tx_iooutb(*ptr++, addr);
343 }
344}
345
346void tx_outsword(unsigned short *addr, void *buffer, unsigned int count)
347{
348 unsigned short *ptr = (unsigned short *) buffer;
349
350 while (count--) {
351 tx_iooutw(*ptr++, addr);
352 }
353}
354
355void tx_outslong(unsigned int *addr, void *buffer, unsigned int count)
356{
357 unsigned long *ptr = (unsigned long *) buffer;
358
359 while (count--) {
360 tx_iooutl(*ptr++, addr);
361 }
362}
363#endif
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index 88fb191ad2eb..985784a3e6f8 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -12,7 +12,7 @@
12#include <asm/bootinfo.h> 12#include <asm/bootinfo.h>
13 13
14extern struct pci_ops nile4_pci_ops; 14extern struct pci_ops nile4_pci_ops;
15extern struct pci_ops gt64120_pci_ops; 15extern struct pci_ops gt64xxx_pci0_ops;
16static struct resource lasat_pci_mem_resource = { 16static struct resource lasat_pci_mem_resource = {
17 .name = "LASAT PCI MEM", 17 .name = "LASAT PCI MEM",
18 .start = 0x18000000, 18 .start = 0x18000000,
@@ -38,7 +38,7 @@ static int __init lasat_pci_setup(void)
38 38
39 switch (mips_machtype) { 39 switch (mips_machtype) {
40 case MACH_LASAT_100: 40 case MACH_LASAT_100:
41 lasat_pci_controller.pci_ops = &gt64120_pci_ops; 41 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
42 break; 42 break;
43 case MACH_LASAT_200: 43 case MACH_LASAT_200:
44 lasat_pci_controller.pci_ops = &nile4_pci_ops; 44 lasat_pci_controller.pci_ops = &nile4_pci_ops;
diff --git a/arch/mips/pci/pci-ocelot.c b/arch/mips/pci/pci-ocelot.c
index 2b9495dce6ba..7f94f26d35ae 100644
--- a/arch/mips/pci/pci-ocelot.c
+++ b/arch/mips/pci/pci-ocelot.c
@@ -81,7 +81,7 @@ static struct resource ocelot_io_resource = {
81}; 81};
82 82
83static struct pci_controller ocelot_pci_controller = { 83static struct pci_controller ocelot_pci_controller = {
84 .pci_ops = gt64120_pci_ops; 84 .pci_ops = gt64xxx_pci0_ops;
85 .mem_resource = &ocelot_mem_resource; 85 .mem_resource = &ocelot_mem_resource;
86 .io_resource = &ocelot_io_resource; 86 .io_resource = &ocelot_io_resource;
87}; 87};
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index de7cfc559ddb..8108231f2e20 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -77,6 +77,13 @@ pcibios_align_resource(void *data, struct resource *res,
77 77
78void __init register_pci_controller(struct pci_controller *hose) 78void __init register_pci_controller(struct pci_controller *hose)
79{ 79{
80 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
81 goto out;
82 if (request_resource(&ioport_resource, hose->io_resource) < 0) {
83 release_resource(hose->mem_resource);
84 goto out;
85 }
86
80 *hose_tail = hose; 87 *hose_tail = hose;
81 hose_tail = &hose->next; 88 hose_tail = &hose->next;
82 89
@@ -87,6 +94,11 @@ void __init register_pci_controller(struct pci_controller *hose)
87 printk(KERN_WARNING 94 printk(KERN_WARNING
88 "registering PCI controller with io_map_base unset\n"); 95 "registering PCI controller with io_map_base unset\n");
89 } 96 }
97 return;
98
99out:
100 printk(KERN_WARNING
101 "Skipping PCI bus scan due to resource conflict\n");
90} 102}
91 103
92/* Most MIPS systems have straight-forward swizzling needs. */ 104/* Most MIPS systems have straight-forward swizzling needs. */
@@ -121,11 +133,6 @@ static int __init pcibios_init(void)
121 /* Scan all of the recorded PCI controllers. */ 133 /* Scan all of the recorded PCI controllers. */
122 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 134 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
123 135
124 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
125 goto out;
126 if (request_resource(&ioport_resource, hose->io_resource) < 0)
127 goto out_free_mem_resource;
128
129 if (!hose->iommu) 136 if (!hose->iommu)
130 PCI_DMA_BUS_IS_PHYS = 1; 137 PCI_DMA_BUS_IS_PHYS = 1;
131 138
@@ -144,14 +151,6 @@ static int __init pcibios_init(void)
144 need_domain_info = 1; 151 need_domain_info = 1;
145 } 152 }
146 } 153 }
147 continue;
148
149out_free_mem_resource:
150 release_resource(hose->mem_resource);
151
152out:
153 printk(KERN_WARNING
154 "Skipping PCI bus scan due to resource conflict\n");
155 } 154 }
156 155
157 if (!pci_probe_only) 156 if (!pci_probe_only)
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index fd29fd407ae8..e19d60d5fcc1 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -52,8 +52,7 @@
52 * national semiconductor nv ram chip the op code is 3 bits and 52 * national semiconductor nv ram chip the op code is 3 bits and
53 * the address is 6/8 bits. 53 * the address is 6/8 bits.
54 */ 54 */
55static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, 55static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
56 unsigned reg)
57{ 56{
58 unsigned short ser_cmd; 57 unsigned short ser_cmd;
59 int i; 58 int i;
@@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
61 ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); 60 ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
62 for (i = 0; i < BITS_IN_COMMAND; i++) { 61 for (i = 0; i < BITS_IN_COMMAND; i++) {
63 if (ser_cmd & (1<<15)) /* if high order bit set */ 62 if (ser_cmd & (1<<15)) /* if high order bit set */
64 *ctrl |= EEPROM_DATO; 63 writel(readl(ctrl) | EEPROM_DATO, ctrl);
65 else 64 else
66 *ctrl &= ~EEPROM_DATO; 65 writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
67 *ctrl &= ~EEPROM_ECLK; 66 writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
68 *ctrl |= EEPROM_ECLK; 67 writel(readl(ctrl) | EEPROM_ECLK, ctrl);
69 ser_cmd <<= 1; 68 ser_cmd <<= 1;
70 } 69 }
71 *ctrl &= ~EEPROM_DATO; /* see data sheet timing diagram */ 70 /* see data sheet timing diagram */
71 writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
72} 72}
73 73
74unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg) 74unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
75{ 75{
76 unsigned short res = 0; 76 unsigned short res = 0;
77 int i; 77 int i;
78 78
79 *ctrl &= ~EEPROM_EPROT; 79 writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
80 eeprom_cs_on(ctrl); 80 eeprom_cs_on(ctrl);
81 eeprom_cmd(ctrl, EEPROM_READ, reg); 81 eeprom_cmd(ctrl, EEPROM_READ, reg);
82 82
83 /* clock the data ouf of serial mem */ 83 /* clock the data ouf of serial mem */
84 for (i = 0; i < 16; i++) { 84 for (i = 0; i < 16; i++) {
85 *ctrl &= ~EEPROM_ECLK; 85 writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
86 delay(); 86 delay();
87 *ctrl |= EEPROM_ECLK; 87 writel(readl(ctrl) | EEPROM_ECLK, ctrl);
88 delay(); 88 delay();
89 res <<= 1; 89 res <<= 1;
90 if (*ctrl & EEPROM_DATI) 90 if (readl(ctrl) & EEPROM_DATI)
91 res |= 1; 91 res |= 1;
92 } 92 }
93 93
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 205554734099..8e88a442b22a 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -94,7 +94,7 @@ static int indy_rtc_set_time(unsigned long tim)
94static unsigned long dosample(void) 94static unsigned long dosample(void)
95{ 95{
96 u32 ct0, ct1; 96 u32 ct0, ct1;
97 volatile u8 msb, lsb; 97 u8 msb, lsb;
98 98
99 /* Start the counter. */ 99 /* Start the counter. */
100 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | 100 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
@@ -107,21 +107,21 @@ static unsigned long dosample(void)
107 107
108 /* Latch and spin until top byte of counter2 is zero */ 108 /* Latch and spin until top byte of counter2 is zero */
109 do { 109 do {
110 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT; 110 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword);
111 lsb = sgint->tcnt2; 111 lsb = readb(&sgint->tcnt2);
112 msb = sgint->tcnt2; 112 msb = readb(&sgint->tcnt2);
113 ct1 = read_c0_count(); 113 ct1 = read_c0_count();
114 } while (msb); 114 } while (msb);
115 115
116 /* Stop the counter. */ 116 /* Stop the counter. */
117 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | 117 writeb(sgint->tcword, (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
118 SGINT_TCWORD_MSWST); 118 SGINT_TCWORD_MSWST));
119 /* 119 /*
120 * Return the difference, this is how far the r4k counter increments 120 * Return the difference, this is how far the r4k counter increments
121 * for every 1/HZ seconds. We round off the nearest 1 MHz of master 121 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
122 * clock (= 1000000 / HZ / 2). 122 * clock (= 1000000 / HZ / 2).
123 */ 123 */
124 /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/ 124
125 return (ct1 - ct0) / (500000/HZ) * (500000/HZ); 125 return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
126} 126}
127 127
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index bdf24a7b5494..e6b003ec6716 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -2,6 +2,7 @@ config SIBYTE_SB1250
2 bool 2 bool
3 select HW_HAS_PCI 3 select HW_HAS_PCI
4 select SIBYTE_ENABLE_LDT_IF_PCI 4 select SIBYTE_ENABLE_LDT_IF_PCI
5 select SIBYTE_HAS_ZBUS_PROFILING
5 select SIBYTE_SB1xxx_SOC 6 select SIBYTE_SB1xxx_SOC
6 select SYS_SUPPORTS_SMP 7 select SYS_SUPPORTS_SMP
7 8
@@ -34,6 +35,7 @@ config SIBYTE_BCM112X
34config SIBYTE_BCM1x80 35config SIBYTE_BCM1x80
35 bool 36 bool
36 select HW_HAS_PCI 37 select HW_HAS_PCI
38 select SIBYTE_HAS_ZBUS_PROFILING
37 select SIBYTE_SB1xxx_SOC 39 select SIBYTE_SB1xxx_SOC
38 select SYS_SUPPORTS_SMP 40 select SYS_SUPPORTS_SMP
39 41
diff --git a/arch/mips/sibyte/common/Makefile b/arch/mips/sibyte/common/Makefile
new file mode 100644
index 000000000000..8a06a4fb5212
--- /dev/null
+++ b/arch/mips/sibyte/common/Makefile
@@ -0,0 +1,5 @@
1obj-y :=
2
3obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o
4
5EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index ea0ca131a3cf..4fcdaa8ba514 100644
--- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -31,14 +31,29 @@
31#include <linux/vmalloc.h> 31#include <linux/vmalloc.h>
32#include <linux/fs.h> 32#include <linux/fs.h>
33#include <linux/errno.h> 33#include <linux/errno.h>
34#include <linux/types.h>
35#include <linux/wait.h> 34#include <linux/wait.h>
36
37#include <asm/io.h> 35#include <asm/io.h>
38#include <asm/sibyte/sb1250.h> 36#include <asm/sibyte/sb1250.h>
37
38#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
39#include <asm/sibyte/bcm1480_regs.h>
40#include <asm/sibyte/bcm1480_scd.h>
41#include <asm/sibyte/bcm1480_int.h>
42#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
39#include <asm/sibyte/sb1250_regs.h> 43#include <asm/sibyte/sb1250_regs.h>
40#include <asm/sibyte/sb1250_scd.h> 44#include <asm/sibyte/sb1250_scd.h>
41#include <asm/sibyte/sb1250_int.h> 45#include <asm/sibyte/sb1250_int.h>
46#else
47#error invalid SiByte UART configuation
48#endif
49
50#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
51#undef K_INT_TRACE_FREEZE
52#define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
53#undef K_INT_PERF_CNT
54#define K_INT_PERF_CNT K_BCM1480_INT_PERF_CNT
55#endif
56
42#include <asm/system.h> 57#include <asm/system.h>
43#include <asm/uaccess.h> 58#include <asm/uaccess.h>
44 59
@@ -118,7 +133,7 @@ static struct sbprof_tb sbp;
118 : /* inputs */ \ 133 : /* inputs */ \
119 : /* modifies */ "$8" ) 134 : /* modifies */ "$8" )
120 135
121#define DEVNAME "bcm1250_tbprof" 136#define DEVNAME "sb_tbprof"
122 137
123#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES) 138#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
124 139
@@ -132,6 +147,7 @@ static struct sbprof_tb sbp;
132 * overflow. 147 * overflow.
133 * 148 *
134 * We map the interrupt for trace_buffer_freeze to handle it on CPU 0. 149 * We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
150 *
135 */ 151 */
136 152
137static u64 tb_period; 153static u64 tb_period;
@@ -143,25 +159,36 @@ static void arm_tb(void)
143 u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL; 159 u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
144 160
145 /* 161 /*
146 * Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to trigger 162 * Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
147 *start of trace. XXX vary sampling period 163 * trigger start of trace. XXX vary sampling period
148 */ 164 */
149 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); 165 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
150 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); 166 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
151 167
152 /* 168 /*
153 * Unfortunately, in Pass 2 we must clear all counters to knock down a 169 * Unfortunately, in Pass 2 we must clear all counters to knock down
154 * previous interrupt request. This means that bus profiling requires 170 * a previous interrupt request. This means that bus profiling
155 * ALL of the SCD perf counters. 171 * requires ALL of the SCD perf counters.
156 */ 172 */
173#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
174 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
175 /* keep counters 0,2,3,4,5,6,7 as is */
176 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
177 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0));
178 __raw_writeq(
179 M_SPC_CFG_ENABLE | /* enable counting */
180 M_SPC_CFG_CLEAR | /* clear all counters */
181 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
182 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1));
183#else
157 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) | 184 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
158 /* keep counters 0,2,3 as is */ 185 /* keep counters 0,2,3 as is */
159 M_SPC_CFG_ENABLE | /* enable counting */ 186 M_SPC_CFG_ENABLE | /* enable counting */
160 M_SPC_CFG_CLEAR | /* clear all counters */ 187 M_SPC_CFG_CLEAR | /* clear all counters */
161 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */ 188 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
162 IOADDR(A_SCD_PERF_CNT_CFG)); 189 IOADDR(A_SCD_PERF_CNT_CFG));
190#endif
163 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1)); 191 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
164
165 /* Reset the trace buffer */ 192 /* Reset the trace buffer */
166 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 193 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
167#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT) 194#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
@@ -190,38 +217,37 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
190 /* Subscripts decrease to put bundle in the order */ 217 /* Subscripts decrease to put bundle in the order */
191 /* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */ 218 /* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */
192 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 219 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
193 /* read t2 hi */ 220 /* read t2 hi */
194 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 221 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
195 /* read t2 lo */ 222 /* read t2 lo */
196 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 223 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
197 /* read t1 hi */ 224 /* read t1 hi */
198 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 225 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
199 /* read t1 lo */ 226 /* read t1 lo */
200 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 227 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
201 /* read t0 hi */ 228 /* read t0 hi */
202 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 229 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
203 /* read t0 lo */ 230 /* read t0 lo */
204 } 231 }
205 if (!sbp.tb_enable) { 232 if (!sbp.tb_enable) {
206 pr_debug(DEVNAME ": tb_intr shutdown\n"); 233 pr_debug(DEVNAME ": tb_intr shutdown\n");
207 __raw_writeq(M_SCD_TRACE_CFG_RESET, 234 __raw_writeq(M_SCD_TRACE_CFG_RESET,
208 IOADDR(A_SCD_TRACE_CFG)); 235 IOADDR(A_SCD_TRACE_CFG));
209 sbp.tb_armed = 0; 236 sbp.tb_armed = 0;
210 wake_up(&sbp.tb_sync); 237 wake_up_interruptible(&sbp.tb_sync);
211 } else { 238 } else {
212 arm_tb(); /* knock down current interrupt and get another one later */ 239 /* knock down current interrupt and get another one later */
240 arm_tb();
213 } 241 }
214 } else { 242 } else {
215 /* No more trace buffer samples */ 243 /* No more trace buffer samples */
216 pr_debug(DEVNAME ": tb_intr full\n"); 244 pr_debug(DEVNAME ": tb_intr full\n");
217 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 245 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
218 sbp.tb_armed = 0; 246 sbp.tb_armed = 0;
219 if (!sbp.tb_enable) { 247 if (!sbp.tb_enable)
220 wake_up(&sbp.tb_sync); 248 wake_up_interruptible(&sbp.tb_sync);
221 } 249 wake_up_interruptible(&sbp.tb_read);
222 wake_up(&sbp.tb_read);
223 } 250 }
224
225 return IRQ_HANDLED; 251 return IRQ_HANDLED;
226} 252}
227 253
@@ -250,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
250 sbp.next_tb_sample = 0; 276 sbp.next_tb_sample = 0;
251 filp->f_pos = 0; 277 filp->f_pos = 0;
252 278
253 err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, 279 err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
254 DEVNAME " trace freeze", &sbp); 280 DEVNAME " trace freeze", &sbp);
255 if (err) 281 if (err)
256 return -EBUSY; 282 return -EBUSY;
257 283
@@ -263,23 +289,29 @@ static int sbprof_zbprof_start(struct file *filp)
263 IOADDR(A_SCD_PERF_CNT_CFG)); 289 IOADDR(A_SCD_PERF_CNT_CFG));
264 290
265 /* 291 /*
266 * We grab this interrupt to prevent others from trying to use it, even 292 * We grab this interrupt to prevent others from trying to use
267 * though we don't want to service the interrupts (they only feed into 293 * it, even though we don't want to service the interrupts
268 * the trace-on-interrupt mechanism) 294 * (they only feed into the trace-on-interrupt mechanism)
269 */ 295 */
270 err = request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, 296 if (request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
271 DEVNAME " scd perfcnt", &sbp); 297 free_irq(K_INT_TRACE_FREEZE, &sbp);
272 if (err) 298 return -EBUSY;
273 goto out_free_irq; 299 }
274 300
275 /* 301 /*
276 * I need the core to mask these, but the interrupt mapper to pass them 302 * I need the core to mask these, but the interrupt mapper to
277 * through. I am exploiting my knowledge that cp0_status masks out 303 * pass them through. I am exploiting my knowledge that
278 * IP[5]. krw 304 * cp0_status masks out IP[5]. krw
279 */ 305 */
306#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
307 __raw_writeq(K_BCM1480_INT_MAP_I3,
308 IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
309 ((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
310#else
280 __raw_writeq(K_INT_MAP_I3, 311 __raw_writeq(K_INT_MAP_I3,
281 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + 312 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
282 (K_INT_PERF_CNT << 3))); 313 (K_INT_PERF_CNT << 3)));
314#endif
283 315
284 /* Initialize address traps */ 316 /* Initialize address traps */
285 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0)); 317 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
@@ -298,7 +330,7 @@ static int sbprof_zbprof_start(struct file *filp)
298 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3)); 330 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
299 331
300 /* Initialize Trace Event 0-7 */ 332 /* Initialize Trace Event 0-7 */
301 /* when interrupt */ 333 /* when interrupt */
302 __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0)); 334 __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
303 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1)); 335 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
304 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2)); 336 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
@@ -324,24 +356,23 @@ static int sbprof_zbprof_start(struct file *filp)
324 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7)); 356 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
325 357
326 /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */ 358 /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
359#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
360 __raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
361 IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
362#else
327 __raw_writeq(1ULL << K_INT_PERF_CNT, 363 __raw_writeq(1ULL << K_INT_PERF_CNT,
328 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE))); 364 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
329 365#endif
330 arm_tb(); 366 arm_tb();
331 367
332 pr_debug(DEVNAME ": done starting\n"); 368 pr_debug(DEVNAME ": done starting\n");
333 369
334 return 0; 370 return 0;
335
336out_free_irq:
337 free_irq(K_INT_TRACE_FREEZE, &sbp);
338
339 return err;
340} 371}
341 372
342static int sbprof_zbprof_stop(void) 373static int sbprof_zbprof_stop(void)
343{ 374{
344 int err; 375 int err = 0;
345 376
346 pr_debug(DEVNAME ": stopping\n"); 377 pr_debug(DEVNAME ": stopping\n");
347 378
@@ -365,7 +396,7 @@ static int sbprof_zbprof_stop(void)
365 396
366 pr_debug(DEVNAME ": done stopping\n"); 397 pr_debug(DEVNAME ": done stopping\n");
367 398
368 return 0; 399 return err;
369} 400}
370 401
371static int sbprof_tb_open(struct inode *inode, struct file *filp) 402static int sbprof_tb_open(struct inode *inode, struct file *filp)
@@ -380,11 +411,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
380 return -EBUSY; 411 return -EBUSY;
381 412
382 memset(&sbp, 0, sizeof(struct sbprof_tb)); 413 memset(&sbp, 0, sizeof(struct sbprof_tb));
383
384 sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES); 414 sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
385 if (!sbp.sbprof_tbbuf) 415 if (!sbp.sbprof_tbbuf)
386 return -ENOMEM; 416 return -ENOMEM;
387
388 memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES); 417 memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
389 init_waitqueue_head(&sbp.tb_sync); 418 init_waitqueue_head(&sbp.tb_sync);
390 init_waitqueue_head(&sbp.tb_read); 419 init_waitqueue_head(&sbp.tb_read);
@@ -397,8 +426,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
397 426
398static int sbprof_tb_release(struct inode *inode, struct file *filp) 427static int sbprof_tb_release(struct inode *inode, struct file *filp)
399{ 428{
400 int minor = iminor(inode); 429 int minor;
401 430
431 minor = iminor(inode);
402 if (minor != 0 || !sbp.open) 432 if (minor != 0 || !sbp.open)
403 return -ENODEV; 433 return -ENODEV;
404 434
@@ -419,10 +449,10 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
419 size_t size, loff_t *offp) 449 size_t size, loff_t *offp)
420{ 450{
421 int cur_sample, sample_off, cur_count, sample_left; 451 int cur_sample, sample_off, cur_count, sample_left;
422 long cur_off = *offp;
423 char *dest = buf;
424 int count = 0;
425 char *src; 452 char *src;
453 int count = 0;
454 char *dest = buf;
455 long cur_off = *offp;
426 456
427 if (!access_ok(VERIFY_WRITE, buf, size)) 457 if (!access_ok(VERIFY_WRITE, buf, size))
428 return -EFAULT; 458 return -EFAULT;
@@ -445,7 +475,6 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
445 mutex_unlock(&sbp.lock); 475 mutex_unlock(&sbp.lock);
446 return err; 476 return err;
447 } 477 }
448
449 pr_debug(DEVNAME ": read from sample %d, %d bytes\n", 478 pr_debug(DEVNAME ": read from sample %d, %d bytes\n",
450 cur_sample, cur_count); 479 cur_sample, cur_count);
451 size -= cur_count; 480 size -= cur_count;
@@ -461,45 +490,46 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
461 dest += cur_count; 490 dest += cur_count;
462 count += cur_count; 491 count += cur_count;
463 } 492 }
464
465 *offp = cur_off; 493 *offp = cur_off;
466 mutex_unlock(&sbp.lock); 494 mutex_unlock(&sbp.lock);
467 495
468 return count; 496 return count;
469} 497}
470 498
471static long sbprof_tb_ioctl(struct file *filp, unsigned int command, 499static long sbprof_tb_ioctl(struct file *filp,
472 unsigned long arg) 500 unsigned int command,
501 unsigned long arg)
473{ 502{
474 int error = 0; 503 int err = 0;
475 504
476 switch (command) { 505 switch (command) {
477 case SBPROF_ZBSTART: 506 case SBPROF_ZBSTART:
478 mutex_lock(&sbp.lock); 507 mutex_lock(&sbp.lock);
479 error = sbprof_zbprof_start(filp); 508 err = sbprof_zbprof_start(filp);
480 mutex_unlock(&sbp.lock); 509 mutex_unlock(&sbp.lock);
481 break; 510 break;
482 511
483 case SBPROF_ZBSTOP: 512 case SBPROF_ZBSTOP:
484 mutex_lock(&sbp.lock); 513 mutex_lock(&sbp.lock);
485 error = sbprof_zbprof_stop(); 514 err = sbprof_zbprof_stop();
486 mutex_unlock(&sbp.lock); 515 mutex_unlock(&sbp.lock);
487 break; 516 break;
488 517
489 case SBPROF_ZBWAITFULL: 518 case SBPROF_ZBWAITFULL: {
490 error = wait_event_interruptible(sbp.tb_read, TB_FULL); 519 err = wait_event_interruptible(sbp.tb_read, TB_FULL);
491 if (error) 520 if (err)
492 break; 521 break;
493 522
494 error = put_user(TB_FULL, (int *) arg); 523 err = put_user(TB_FULL, (int *) arg);
495 break; 524 break;
525 }
496 526
497 default: 527 default:
498 error = -EINVAL; 528 err = -EINVAL;
499 break; 529 break;
500 } 530 }
501 531
502 return error; 532 return err;
503} 533}
504 534
505static const struct file_operations sbprof_tb_fops = { 535static const struct file_operations sbprof_tb_fops = {
@@ -544,8 +574,8 @@ static int __init sbprof_tb_init(void)
544 574
545 sbp.open = 0; 575 sbp.open = 0;
546 tb_period = zbbus_mhz * 10000LL; 576 tb_period = zbbus_mhz * 10000LL;
547 pr_info(DEVNAME ": initialized - tb_period = %lld\n", tb_period); 577 pr_info(DEVNAME ": initialized - tb_period = %lld\n",
548 578 (long long) tb_period);
549 return 0; 579 return 0;
550 580
551out_class: 581out_class:
diff --git a/arch/mips/sibyte/sb1250/Makefile b/arch/mips/sibyte/sb1250/Makefile
index 04c0f1a7f616..df662c61473a 100644
--- a/arch/mips/sibyte/sb1250/Makefile
+++ b/arch/mips/sibyte/sb1250/Makefile
@@ -1,6 +1,5 @@
1obj-y := setup.o irq.o time.o 1obj-y := setup.o irq.o time.o
2 2
3obj-$(CONFIG_SMP) += smp.o 3obj-$(CONFIG_SMP) += smp.o
4obj-$(CONFIG_SIBYTE_TBPROF) += bcm1250_tbprof.o
5obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o 4obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o
6obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o 5obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 8e8593b64f6a..9ee208daa8b1 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -91,7 +91,7 @@ static struct platform_device pcimt_serial8250_device = {
91}; 91};
92 92
93static struct resource sni_io_resource = { 93static struct resource sni_io_resource = {
94 .start = 0x00001000UL, 94 .start = 0x00000000UL,
95 .end = 0x03bfffffUL, 95 .end = 0x03bfffffUL,
96 .name = "PCIMT IO MEM", 96 .name = "PCIMT IO MEM",
97 .flags = IORESOURCE_IO, 97 .flags = IORESOURCE_IO,
@@ -132,107 +132,19 @@ static struct resource pcimt_io_resources[] = {
132}; 132};
133 133
134static struct resource sni_mem_resource = { 134static struct resource sni_mem_resource = {
135 .start = 0x10000000UL, 135 .start = 0x18000000UL,
136 .end = 0xffffffffUL, 136 .end = 0x1fbfffffUL,
137 .name = "PCIMT PCI MEM", 137 .name = "PCIMT PCI MEM",
138 .flags = IORESOURCE_MEM 138 .flags = IORESOURCE_MEM
139}; 139};
140 140
141/*
142 * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
143 * for other purposes. Be paranoid and allocate all of the before the PCI
144 * code gets a chance to to map anything else there ...
145 *
146 * This leaves the following areas available:
147 *
148 * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
149 * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
150 * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
151 * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
152 * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
153 */
154static struct resource pcimt_mem_resources[] = {
155 {
156 .start = 0x100a0000,
157 .end = 0x100bffff,
158 .name = "Video RAM area",
159 .flags = IORESOURCE_BUSY
160 }, {
161 .start = 0x100c0000,
162 .end = 0x100fffff,
163 .name = "ISA Reserved",
164 .flags = IORESOURCE_BUSY
165 }, {
166 .start = 0x14000000,
167 .end = 0x17bfffff,
168 .name = "PCI IO",
169 .flags = IORESOURCE_BUSY
170 }, {
171 .start = 0x17c00000,
172 .end = 0x17ffffff,
173 .name = "Cache Replacement Area",
174 .flags = IORESOURCE_BUSY
175 }, {
176 .start = 0x1a000000,
177 .end = 0x1a000003,
178 .name = "PCI INT Acknowledge",
179 .flags = IORESOURCE_BUSY
180 }, {
181 .start = 0x1fc00000,
182 .end = 0x1fc7ffff,
183 .name = "Boot PROM",
184 .flags = IORESOURCE_BUSY
185 }, {
186 .start = 0x1fc80000,
187 .end = 0x1fcfffff,
188 .name = "Diag PROM",
189 .flags = IORESOURCE_BUSY
190 }, {
191 .start = 0x1fd00000,
192 .end = 0x1fdfffff,
193 .name = "X-Bus",
194 .flags = IORESOURCE_BUSY
195 }, {
196 .start = 0x1fe00000,
197 .end = 0x1fefffff,
198 .name = "BIOS map",
199 .flags = IORESOURCE_BUSY
200 }, {
201 .start = 0x1ff00000,
202 .end = 0x1ff7ffff,
203 .name = "NVRAM / EEPROM",
204 .flags = IORESOURCE_BUSY
205 }, {
206 .start = 0x1fff0000,
207 .end = 0x1fffefff,
208 .name = "ASIC PCI",
209 .flags = IORESOURCE_BUSY
210 }, {
211 .start = 0x1ffff000,
212 .end = 0x1fffffff,
213 .name = "MP Agent",
214 .flags = IORESOURCE_BUSY
215 }, {
216 .start = 0x20000000,
217 .end = 0x9fffffff,
218 .name = "Main Memory",
219 .flags = IORESOURCE_BUSY
220 }
221};
222
223static void __init sni_pcimt_resource_init(void) 141static void __init sni_pcimt_resource_init(void)
224{ 142{
225 int i; 143 int i;
226 144
227 /* request I/O space for devices used on all i[345]86 PCs */ 145 /* request I/O space for devices used on all i[345]86 PCs */
228 for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++) 146 for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
229 request_resource(&ioport_resource, pcimt_io_resources + i); 147 request_resource(&sni_io_resource, pcimt_io_resources + i);
230
231 /* request mem space for pcimt-specific devices */
232 for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
233 request_resource(&sni_mem_resource, pcimt_mem_resources + i);
234
235 ioport_resource.end = sni_io_resource.end;
236} 148}
237 149
238extern struct pci_ops sni_pcimt_ops; 150extern struct pci_ops sni_pcimt_ops;
@@ -240,9 +152,10 @@ extern struct pci_ops sni_pcimt_ops;
240static struct pci_controller sni_controller = { 152static struct pci_controller sni_controller = {
241 .pci_ops = &sni_pcimt_ops, 153 .pci_ops = &sni_pcimt_ops,
242 .mem_resource = &sni_mem_resource, 154 .mem_resource = &sni_mem_resource,
243 .mem_offset = 0x10000000UL, 155 .mem_offset = 0x00000000UL,
244 .io_resource = &sni_io_resource, 156 .io_resource = &sni_io_resource,
245 .io_offset = 0x00000000UL 157 .io_offset = 0x00000000UL,
158 .io_map_base = SNI_PORT_BASE
246}; 159};
247 160
248static void enable_pcimt_irq(unsigned int irq) 161static void enable_pcimt_irq(unsigned int irq)
@@ -363,15 +276,17 @@ void __init sni_pcimt_irq_init(void)
363 276
364void sni_pcimt_init(void) 277void sni_pcimt_init(void)
365{ 278{
366 sni_pcimt_resource_init();
367 sni_pcimt_detect(); 279 sni_pcimt_detect();
368 sni_pcimt_sc_init(); 280 sni_pcimt_sc_init();
369 rtc_mips_get_time = mc146818_get_cmos_time; 281 rtc_mips_get_time = mc146818_get_cmos_time;
370 rtc_mips_set_time = mc146818_set_rtc_mmss; 282 rtc_mips_set_time = mc146818_set_rtc_mmss;
371 board_time_init = sni_cpu_time_init; 283 board_time_init = sni_cpu_time_init;
284 ioport_resource.end = sni_io_resource.end;
372#ifdef CONFIG_PCI 285#ifdef CONFIG_PCI
286 PCIBIOS_MIN_IO = 0x9000;
373 register_pci_controller(&sni_controller); 287 register_pci_controller(&sni_controller);
374#endif 288#endif
289 sni_pcimt_resource_init();
375} 290}
376 291
377static int __init snirm_pcimt_setup_devinit(void) 292static int __init snirm_pcimt_setup_devinit(void)
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 1dfc3f00bbd3..00d151f4d121 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -43,7 +43,7 @@ static struct platform_device pcit_serial8250_device = {
43}; 43};
44 44
45static struct plat_serial8250_port pcit_cplus_data[] = { 45static struct plat_serial8250_port pcit_cplus_data[] = {
46 PORT(0x3f8, 4), 46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3), 47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4), 48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3), 49 PORT(0x2e8, 3),
@@ -59,9 +59,9 @@ static struct platform_device pcit_cplus_serial8250_device = {
59}; 59};
60 60
61static struct resource sni_io_resource = { 61static struct resource sni_io_resource = {
62 .start = 0x00001000UL, 62 .start = 0x00000000UL,
63 .end = 0x03bfffffUL, 63 .end = 0x03bfffffUL,
64 .name = "PCIT IO MEM", 64 .name = "PCIT IO",
65 .flags = IORESOURCE_IO, 65 .flags = IORESOURCE_IO,
66}; 66};
67 67
@@ -92,6 +92,11 @@ static struct resource pcit_io_resources[] = {
92 .name = "dma2", 92 .name = "dma2",
93 .flags = IORESOURCE_BUSY 93 .flags = IORESOURCE_BUSY
94 }, { 94 }, {
95 .start = 0xcf8,
96 .end = 0xcfb,
97 .name = "PCI config addr",
98 .flags = IORESOURCE_BUSY
99 }, {
95 .start = 0xcfc, 100 .start = 0xcfc,
96 .end = 0xcff, 101 .end = 0xcff,
97 .name = "PCI config data", 102 .name = "PCI config data",
@@ -100,107 +105,19 @@ static struct resource pcit_io_resources[] = {
100}; 105};
101 106
102static struct resource sni_mem_resource = { 107static struct resource sni_mem_resource = {
103 .start = 0x10000000UL, 108 .start = 0x18000000UL,
104 .end = 0xffffffffUL, 109 .end = 0x1fbfffffUL,
105 .name = "PCIT PCI MEM", 110 .name = "PCIT PCI MEM",
106 .flags = IORESOURCE_MEM 111 .flags = IORESOURCE_MEM
107}; 112};
108 113
109/*
110 * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
111 * for other purposes. Be paranoid and allocate all of the before the PCI
112 * code gets a chance to to map anything else there ...
113 *
114 * This leaves the following areas available:
115 *
116 * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
117 * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
118 * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
119 * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
120 * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
121 */
122static struct resource pcit_mem_resources[] = {
123 {
124 .start = 0x14000000,
125 .end = 0x17bfffff,
126 .name = "PCI IO",
127 .flags = IORESOURCE_BUSY
128 }, {
129 .start = 0x17c00000,
130 .end = 0x17ffffff,
131 .name = "Cache Replacement Area",
132 .flags = IORESOURCE_BUSY
133 }, {
134 .start = 0x180a0000,
135 .end = 0x180bffff,
136 .name = "Video RAM area",
137 .flags = IORESOURCE_BUSY
138 }, {
139 .start = 0x180c0000,
140 .end = 0x180fffff,
141 .name = "ISA Reserved",
142 .flags = IORESOURCE_BUSY
143 }, {
144 .start = 0x19000000,
145 .end = 0x1fbfffff,
146 .name = "PCI MEM",
147 .flags = IORESOURCE_BUSY
148 }, {
149 .start = 0x1fc00000,
150 .end = 0x1fc7ffff,
151 .name = "Boot PROM",
152 .flags = IORESOURCE_BUSY
153 }, {
154 .start = 0x1fc80000,
155 .end = 0x1fcfffff,
156 .name = "Diag PROM",
157 .flags = IORESOURCE_BUSY
158 }, {
159 .start = 0x1fd00000,
160 .end = 0x1fdfffff,
161 .name = "X-Bus",
162 .flags = IORESOURCE_BUSY
163 }, {
164 .start = 0x1fe00000,
165 .end = 0x1fefffff,
166 .name = "BIOS map",
167 .flags = IORESOURCE_BUSY
168 }, {
169 .start = 0x1ff00000,
170 .end = 0x1ff7ffff,
171 .name = "NVRAM / EEPROM",
172 .flags = IORESOURCE_BUSY
173 }, {
174 .start = 0x1fff0000,
175 .end = 0x1fffefff,
176 .name = "MAUI ASIC",
177 .flags = IORESOURCE_BUSY
178 }, {
179 .start = 0x1ffff000,
180 .end = 0x1fffffff,
181 .name = "MP Agent",
182 .flags = IORESOURCE_BUSY
183 }, {
184 .start = 0x20000000,
185 .end = 0x9fffffff,
186 .name = "Main Memory",
187 .flags = IORESOURCE_BUSY
188 }
189};
190
191static void __init sni_pcit_resource_init(void) 114static void __init sni_pcit_resource_init(void)
192{ 115{
193 int i; 116 int i;
194 117
195 /* request I/O space for devices used on all i[345]86 PCs */ 118 /* request I/O space for devices used on all i[345]86 PCs */
196 for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++) 119 for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++)
197 request_resource(&ioport_resource, pcit_io_resources + i); 120 request_resource(&sni_io_resource, pcit_io_resources + i);
198
199 /* request mem space for pcimt-specific devices */
200 for (i = 0; i < ARRAY_SIZE(pcit_mem_resources); i++)
201 request_resource(&sni_mem_resource, pcit_mem_resources + i);
202
203 ioport_resource.end = sni_io_resource.end;
204} 121}
205 122
206 123
@@ -209,9 +126,10 @@ extern struct pci_ops sni_pcit_ops;
209static struct pci_controller sni_pcit_controller = { 126static struct pci_controller sni_pcit_controller = {
210 .pci_ops = &sni_pcit_ops, 127 .pci_ops = &sni_pcit_ops,
211 .mem_resource = &sni_mem_resource, 128 .mem_resource = &sni_mem_resource,
212 .mem_offset = 0x10000000UL, 129 .mem_offset = 0x00000000UL,
213 .io_resource = &sni_io_resource, 130 .io_resource = &sni_io_resource,
214 .io_offset = 0x00000000UL 131 .io_offset = 0x00000000UL,
132 .io_map_base = SNI_PORT_BASE
215}; 133};
216 134
217static void enable_pcit_irq(unsigned int irq) 135static void enable_pcit_irq(unsigned int irq)
@@ -262,7 +180,7 @@ static void pcit_hwint0(void)
262 int irq; 180 int irq;
263 181
264 clear_c0_status(IE_IRQ0); 182 clear_c0_status(IE_IRQ0);
265 irq = ffs((pending >> 16) & 0x7f); 183 irq = ffs((pending >> 16) & 0x3f);
266 184
267 if (likely(irq > 0)) 185 if (likely(irq > 0))
268 do_IRQ (irq + SNI_PCIT_INT_START - 1); 186 do_IRQ (irq + SNI_PCIT_INT_START - 1);
@@ -289,6 +207,8 @@ static void sni_pcit_hwint_cplus(void)
289 207
290 if (pending & C_IRQ0) 208 if (pending & C_IRQ0)
291 pcit_hwint0(); 209 pcit_hwint0();
210 else if (pending & C_IRQ1)
211 do_IRQ (MIPS_CPU_IRQ_BASE + 3);
292 else if (pending & C_IRQ2) 212 else if (pending & C_IRQ2)
293 do_IRQ (MIPS_CPU_IRQ_BASE + 4); 213 do_IRQ (MIPS_CPU_IRQ_BASE + 4);
294 else if (pending & C_IRQ3) 214 else if (pending & C_IRQ3)
@@ -317,21 +237,23 @@ void __init sni_pcit_cplus_irq_init(void)
317 mips_cpu_irq_init(); 237 mips_cpu_irq_init();
318 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) 238 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
319 set_irq_chip(i, &pcit_irq_type); 239 set_irq_chip(i, &pcit_irq_type);
320 *(volatile u32 *)SNI_PCIT_INT_REG = 0; 240 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
321 sni_hwint = sni_pcit_hwint_cplus; 241 sni_hwint = sni_pcit_hwint_cplus;
322 change_c0_status(ST0_IM, IE_IRQ0); 242 change_c0_status(ST0_IM, IE_IRQ0);
323 setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq); 243 setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
324} 244}
325 245
326void sni_pcit_init(void) 246void sni_pcit_init(void)
327{ 247{
328 sni_pcit_resource_init();
329 rtc_mips_get_time = mc146818_get_cmos_time; 248 rtc_mips_get_time = mc146818_get_cmos_time;
330 rtc_mips_set_time = mc146818_set_rtc_mmss; 249 rtc_mips_set_time = mc146818_set_rtc_mmss;
331 board_time_init = sni_cpu_time_init; 250 board_time_init = sni_cpu_time_init;
251 ioport_resource.end = sni_io_resource.end;
332#ifdef CONFIG_PCI 252#ifdef CONFIG_PCI
253 PCIBIOS_MIN_IO = 0x9000;
333 register_pci_controller(&sni_pcit_controller); 254 register_pci_controller(&sni_pcit_controller);
334#endif 255#endif
256 sni_pcit_resource_init();
335} 257}
336 258
337static int __init snirm_pcit_setup_devinit(void) 259static int __init snirm_pcit_setup_devinit(void)
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 92f41f6f934a..8f4d3e74c230 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -1,6 +1,10 @@
1config CASIO_E55 1choice
2 bool "Support for CASIO CASSIOPEIA E-10/15/55/65" 2 prompt "Machine type"
3 depends on MACH_VR41XX 3 depends on MACH_VR41XX
4 default TANBAC_TB022X
5
6config CASIO_E55
7 bool "CASIO CASSIOPEIA E-10/15/55/65"
4 select DMA_NONCOHERENT 8 select DMA_NONCOHERENT
5 select IRQ_CPU 9 select IRQ_CPU
6 select ISA 10 select ISA
@@ -8,8 +12,7 @@ config CASIO_E55
8 select SYS_SUPPORTS_LITTLE_ENDIAN 12 select SYS_SUPPORTS_LITTLE_ENDIAN
9 13
10config IBM_WORKPAD 14config IBM_WORKPAD
11 bool "Support for IBM WorkPad z50" 15 bool "IBM WorkPad z50"
12 depends on MACH_VR41XX
13 select DMA_NONCOHERENT 16 select DMA_NONCOHERENT
14 select IRQ_CPU 17 select IRQ_CPU
15 select ISA 18 select ISA
@@ -17,26 +20,18 @@ config IBM_WORKPAD
17 select SYS_SUPPORTS_LITTLE_ENDIAN 20 select SYS_SUPPORTS_LITTLE_ENDIAN
18 21
19config NEC_CMBVR4133 22config NEC_CMBVR4133
20 bool "Support for NEC CMB-VR4133" 23 bool "NEC CMB-VR4133"
21 depends on MACH_VR41XX
22 select DMA_NONCOHERENT 24 select DMA_NONCOHERENT
23 select IRQ_CPU 25 select IRQ_CPU
24 select HW_HAS_PCI 26 select HW_HAS_PCI
25 select SYS_SUPPORTS_32BIT_KERNEL 27 select SYS_SUPPORTS_32BIT_KERNEL
26 select SYS_SUPPORTS_LITTLE_ENDIAN 28 select SYS_SUPPORTS_LITTLE_ENDIAN
27 29
28config ROCKHOPPER
29 bool "Support for Rockhopper baseboard"
30 depends on NEC_CMBVR4133
31 select I8259
32 select HAVE_STD_PC_SERIAL_PORT
33
34config TANBAC_TB022X 30config TANBAC_TB022X
35 bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM" 31 bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
36 depends on MACH_VR41XX
37 select DMA_NONCOHERENT 32 select DMA_NONCOHERENT
38 select HW_HAS_PCI
39 select IRQ_CPU 33 select IRQ_CPU
34 select HW_HAS_PCI
40 select SYS_SUPPORTS_32BIT_KERNEL 35 select SYS_SUPPORTS_32BIT_KERNEL
41 select SYS_SUPPORTS_LITTLE_ENDIAN 36 select SYS_SUPPORTS_LITTLE_ENDIAN
42 help 37 help
@@ -46,40 +41,65 @@ config TANBAC_TB022X
46 Please refer to <http://www.tanbac.co.jp/> 41 Please refer to <http://www.tanbac.co.jp/>
47 about VR4131 multichip module and VR4131DIMM. 42 about VR4131 multichip module and VR4131DIMM.
48 43
49config TANBAC_TB0226 44config VICTOR_MPC30X
50 bool "Support for TANBAC Mbase(TB0226)" 45 bool "Victor MP-C303/304"
46 select DMA_NONCOHERENT
47 select IRQ_CPU
48 select HW_HAS_PCI
49 select PCI_VR41XX
50 select SYS_SUPPORTS_32BIT_KERNEL
51 select SYS_SUPPORTS_LITTLE_ENDIAN
52
53config ZAO_CAPCELLA
54 bool "ZAO Networks Capcella"
55 select DMA_NONCOHERENT
56 select IRQ_CPU
57 select HW_HAS_PCI
58 select PCI_VR41XX
59 select SYS_SUPPORTS_32BIT_KERNEL
60 select SYS_SUPPORTS_LITTLE_ENDIAN
61
62endchoice
63
64config ROCKHOPPER
65 bool "Support for Rockhopper base board"
66 depends on NEC_CMBVR4133
67 select PCI_VR41XX
68 select I8259
69 select HAVE_STD_PC_SERIAL_PORT
70
71choice
72 prompt "Base board type"
51 depends on TANBAC_TB022X 73 depends on TANBAC_TB022X
74 default TANBAC_TB0287
75
76config TANBAC_TB0219
77 bool "TANBAC DIMM Evaluation Kit(TB0219)"
52 select GPIO_VR41XX 78 select GPIO_VR41XX
79 select PCI_VR41XX
80 help
81 The TANBAC DIMM Evaluation Kit(TB0219) is a MIPS-based platform
82 manufactured by TANBAC.
83 Please refer to <http://www.tanbac.co.jp/> about DIMM Evaluation Kit.
84
85config TANBAC_TB0226
86 bool "TANBAC Mbase(TB0226)"
87 select GPIO_VR41XX
88 select PCI_VR41XX
53 help 89 help
54 The TANBAC Mbase(TB0226) is a MIPS-based platform 90 The TANBAC Mbase(TB0226) is a MIPS-based platform
55 manufactured by TANBAC. 91 manufactured by TANBAC.
56 Please refer to <http://www.tanbac.co.jp/> about Mbase. 92 Please refer to <http://www.tanbac.co.jp/> about Mbase.
57 93
58config TANBAC_TB0287 94config TANBAC_TB0287
59 bool "Support for TANBAC Mini-ITX DIMM base(TB0287)" 95 bool "TANBAC Mini-ITX DIMM base(TB0287)"
60 depends on TANBAC_TB022X 96 select PCI_VR41XX
61 help 97 help
62 The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform 98 The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform
63 manufactured by TANBAC. 99 manufactured by TANBAC.
64 Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base. 100 Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base.
65 101
66config VICTOR_MPC30X 102endchoice
67 bool "Support for Victor MP-C303/304"
68 depends on MACH_VR41XX
69 select DMA_NONCOHERENT
70 select HW_HAS_PCI
71 select IRQ_CPU
72 select SYS_SUPPORTS_32BIT_KERNEL
73 select SYS_SUPPORTS_LITTLE_ENDIAN
74
75config ZAO_CAPCELLA
76 bool "Support for ZAO Networks Capcella"
77 depends on MACH_VR41XX
78 select DMA_NONCOHERENT
79 select HW_HAS_PCI
80 select IRQ_CPU
81 select SYS_SUPPORTS_32BIT_KERNEL
82 select SYS_SUPPORTS_LITTLE_ENDIAN
83 103
84config PCI_VR41XX 104config PCI_VR41XX
85 bool "Add PCI control unit support of NEC VR4100 series" 105 bool "Add PCI control unit support of NEC VR4100 series"
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index ecee596d28f6..2f8e9c02c92a 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -84,8 +84,6 @@ EXPORT_SYMBOL(strncpy);
84EXPORT_SYMBOL(strcat); 84EXPORT_SYMBOL(strcat);
85EXPORT_SYMBOL(strlen); 85EXPORT_SYMBOL(strlen);
86EXPORT_SYMBOL(strcmp); 86EXPORT_SYMBOL(strcmp);
87EXPORT_SYMBOL(strcasecmp);
88EXPORT_SYMBOL(strncasecmp);
89 87
90EXPORT_SYMBOL(csum_partial); 88EXPORT_SYMBOL(csum_partial);
91EXPORT_SYMBOL(csum_partial_copy_generic); 89EXPORT_SYMBOL(csum_partial_copy_generic);
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4b1ba49fbd9e..450258de7ca1 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -7,13 +7,12 @@ EXTRA_CFLAGS += -mno-minimal-toc
7endif 7endif
8 8
9ifeq ($(CONFIG_PPC_MERGE),y) 9ifeq ($(CONFIG_PPC_MERGE),y)
10obj-y := string.o strcase.o 10obj-y := string.o
11obj-$(CONFIG_PPC32) += div64.o copy_32.o checksum_32.o 11obj-$(CONFIG_PPC32) += div64.o copy_32.o checksum_32.o
12endif 12endif
13 13
14obj-$(CONFIG_PPC64) += checksum_64.o copypage_64.o copyuser_64.o \ 14obj-$(CONFIG_PPC64) += checksum_64.o copypage_64.o copyuser_64.o \
15 memcpy_64.o usercopy_64.o mem_64.o string.o \ 15 memcpy_64.o usercopy_64.o mem_64.o string.o
16 strcase.o
17obj-$(CONFIG_QUICC_ENGINE) += rheap.o 16obj-$(CONFIG_QUICC_ENGINE) += rheap.o
18obj-$(CONFIG_XMON) += sstep.o 17obj-$(CONFIG_XMON) += sstep.o
19obj-$(CONFIG_KPROBES) += sstep.o 18obj-$(CONFIG_KPROBES) += sstep.o
diff --git a/arch/powerpc/lib/strcase.c b/arch/powerpc/lib/strcase.c
deleted file mode 100644
index f8ec1eba3fdd..000000000000
--- a/arch/powerpc/lib/strcase.c
+++ /dev/null
@@ -1,25 +0,0 @@
1#include <linux/types.h>
2#include <linux/ctype.h>
3#include <linux/string.h>
4
5int strcasecmp(const char *s1, const char *s2)
6{
7 int c1, c2;
8
9 do {
10 c1 = tolower(*s1++);
11 c2 = tolower(*s2++);
12 } while (c1 == c2 && c1 != 0);
13 return c1 - c2;
14}
15
16int strncasecmp(const char *s1, const char *s2, size_t n)
17{
18 int c1, c2;
19
20 do {
21 c1 = tolower(*s1++);
22 c2 = tolower(*s2++);
23 } while ((--n > 0) && c1 == c2 && c1 != 0);
24 return c1 - c2;
25}
diff --git a/arch/ppc/8260_io/enet.c b/arch/ppc/8260_io/enet.c
index a6056c29cf00..48ce84f5be93 100644
--- a/arch/ppc/8260_io/enet.c
+++ b/arch/ppc/8260_io/enet.c
@@ -477,7 +477,6 @@ for (;;) {
477 cep->stats.rx_dropped++; 477 cep->stats.rx_dropped++;
478 } 478 }
479 else { 479 else {
480 skb->dev = dev;
481 skb_put(skb,pkt_len-4); /* Make room */ 480 skb_put(skb,pkt_len-4); /* Make room */
482 eth_copy_and_sum(skb, 481 eth_copy_and_sum(skb,
483 (unsigned char *)__va(bdp->cbd_bufaddr), 482 (unsigned char *)__va(bdp->cbd_bufaddr),
diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c
index 06b84c372e58..9db825fe37f0 100644
--- a/arch/ppc/8260_io/fcc_enet.c
+++ b/arch/ppc/8260_io/fcc_enet.c
@@ -734,7 +734,6 @@ for (;;) {
734 cep->stats.rx_dropped++; 734 cep->stats.rx_dropped++;
735 } 735 }
736 else { 736 else {
737 skb->dev = dev;
738 skb_put(skb,pkt_len); /* Make room */ 737 skb_put(skb,pkt_len); /* Make room */
739 eth_copy_and_sum(skb, 738 eth_copy_and_sum(skb,
740 (unsigned char *)__va(bdp->cbd_bufaddr), 739 (unsigned char *)__va(bdp->cbd_bufaddr),
diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c
index b23c45bc151a..bfa3f52996d1 100644
--- a/arch/ppc/8xx_io/enet.c
+++ b/arch/ppc/8xx_io/enet.c
@@ -506,7 +506,6 @@ for (;;) {
506 cep->stats.rx_dropped++; 506 cep->stats.rx_dropped++;
507 } 507 }
508 else { 508 else {
509 skb->dev = dev;
510 skb_put(skb,pkt_len-4); /* Make room */ 509 skb_put(skb,pkt_len-4); /* Make room */
511 eth_copy_and_sum(skb, 510 eth_copy_and_sum(skb,
512 cep->rx_vaddr[bdp - cep->rx_bd_base], 511 cep->rx_vaddr[bdp - cep->rx_bd_base],
diff --git a/arch/ppc/8xx_io/fec.c b/arch/ppc/8xx_io/fec.c
index e6c28fb423b2..57a9a61e54b5 100644
--- a/arch/ppc/8xx_io/fec.c
+++ b/arch/ppc/8xx_io/fec.c
@@ -724,7 +724,6 @@ while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) {
724 printk("%s: Memory squeeze, dropping packet.\n", dev->name); 724 printk("%s: Memory squeeze, dropping packet.\n", dev->name);
725 fep->stats.rx_dropped++; 725 fep->stats.rx_dropped++;
726 } else { 726 } else {
727 skb->dev = dev;
728 skb_put(skb,pkt_len-4); /* Make room */ 727 skb_put(skb,pkt_len-4); /* Make room */
729 eth_copy_and_sum(skb, data, pkt_len-4, 0); 728 eth_copy_and_sum(skb, data, pkt_len-4, 0);
730 skb->protocol=eth_type_trans(skb,dev); 729 skb->protocol=eth_type_trans(skb,dev);
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 1318b6f4c3df..4ad499605d05 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -93,8 +93,6 @@ EXPORT_SYMBOL(strncpy);
93EXPORT_SYMBOL(strcat); 93EXPORT_SYMBOL(strcat);
94EXPORT_SYMBOL(strlen); 94EXPORT_SYMBOL(strlen);
95EXPORT_SYMBOL(strcmp); 95EXPORT_SYMBOL(strcmp);
96EXPORT_SYMBOL(strcasecmp);
97EXPORT_SYMBOL(strncasecmp);
98EXPORT_SYMBOL(__div64_32); 96EXPORT_SYMBOL(__div64_32);
99 97
100EXPORT_SYMBOL(csum_partial); 98EXPORT_SYMBOL(csum_partial);
diff --git a/arch/ppc/lib/Makefile b/arch/ppc/lib/Makefile
index 50358e4ea159..422bef9bae7b 100644
--- a/arch/ppc/lib/Makefile
+++ b/arch/ppc/lib/Makefile
@@ -2,7 +2,7 @@
2# Makefile for ppc-specific library files.. 2# Makefile for ppc-specific library files..
3# 3#
4 4
5obj-y := checksum.o string.o strcase.o div64.o 5obj-y := checksum.o string.o div64.o
6 6
7obj-$(CONFIG_8xx) += rheap.o 7obj-$(CONFIG_8xx) += rheap.o
8obj-$(CONFIG_CPM2) += rheap.o 8obj-$(CONFIG_CPM2) += rheap.o
diff --git a/arch/ppc/lib/strcase.c b/arch/ppc/lib/strcase.c
deleted file mode 100644
index 3b0094cc2b52..000000000000
--- a/arch/ppc/lib/strcase.c
+++ /dev/null
@@ -1,24 +0,0 @@
1#include <linux/ctype.h>
2#include <linux/types.h>
3
4int strcasecmp(const char *s1, const char *s2)
5{
6 int c1, c2;
7
8 do {
9 c1 = tolower(*s1++);
10 c2 = tolower(*s2++);
11 } while (c1 == c2 && c1 != 0);
12 return c1 - c2;
13}
14
15int strncasecmp(const char *s1, const char *s2, size_t n)
16{
17 int c1, c2;
18
19 do {
20 c1 = tolower(*s1++);
21 c2 = tolower(*s2++);
22 } while ((--n > 0) && c1 == c2 && c1 != 0);
23 return c1 - c2;
24}
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 0f293aa7b0fa..e6ec418093e5 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -41,6 +41,11 @@ config GENERIC_HWEIGHT
41config GENERIC_TIME 41config GENERIC_TIME
42 def_bool y 42 def_bool y
43 43
44config GENERIC_BUG
45 bool
46 depends on BUG
47 default y
48
44config NO_IOMEM 49config NO_IOMEM
45 def_bool y 50 def_bool y
46 51
@@ -514,6 +519,14 @@ config KEXEC
514 current kernel, and to start another kernel. It is like a reboot 519 current kernel, and to start another kernel. It is like a reboot
515 but is independent of hardware/microcode support. 520 but is independent of hardware/microcode support.
516 521
522config ZFCPDUMP
523 tristate "zfcpdump support"
524 select SMP
525 default n
526 help
527 Select this option if you want to build an zfcpdump enabled kernel.
528 Refer to "Documentation/s390/zfcpdump.txt" for more details on this.
529
517endmenu 530endmenu
518 531
519source "net/Kconfig" 532source "net/Kconfig"
diff --git a/arch/s390/Makefile b/arch/s390/Makefile
index b1e558496469..68441e0e74b6 100644
--- a/arch/s390/Makefile
+++ b/arch/s390/Makefile
@@ -67,8 +67,10 @@ endif
67 67
68ifeq ($(call cc-option-yn,-mstack-size=8192 -mstack-guard=128),y) 68ifeq ($(call cc-option-yn,-mstack-size=8192 -mstack-guard=128),y)
69cflags-$(CONFIG_CHECK_STACK) += -mstack-size=$(STACK_SIZE) 69cflags-$(CONFIG_CHECK_STACK) += -mstack-size=$(STACK_SIZE)
70ifneq ($(call cc-option-yn,-mstack-size=8192),y)
70cflags-$(CONFIG_CHECK_STACK) += -mstack-guard=$(CONFIG_STACK_GUARD) 71cflags-$(CONFIG_CHECK_STACK) += -mstack-guard=$(CONFIG_STACK_GUARD)
71endif 72endif
73endif
72 74
73ifeq ($(call cc-option-yn,-mwarn-dynamicstack),y) 75ifeq ($(call cc-option-yn,-mwarn-dynamicstack),y)
74cflags-$(CONFIG_WARN_STACK) += -mwarn-dynamicstack 76cflags-$(CONFIG_WARN_STACK) += -mwarn-dynamicstack
@@ -103,6 +105,9 @@ install: vmlinux
103image: vmlinux 105image: vmlinux
104 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 106 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
105 107
108zfcpdump:
109 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
110
106archclean: 111archclean:
107 $(Q)$(MAKE) $(clean)=$(boot) 112 $(Q)$(MAKE) $(clean)=$(boot)
108 113
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 0c3cf4b16ae4..ee89b33145d5 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -668,45 +668,7 @@ EXPORT_SYMBOL_GPL(appldata_register_ops);
668EXPORT_SYMBOL_GPL(appldata_unregister_ops); 668EXPORT_SYMBOL_GPL(appldata_unregister_ops);
669EXPORT_SYMBOL_GPL(appldata_diag); 669EXPORT_SYMBOL_GPL(appldata_diag);
670 670
671#ifdef MODULE
672/*
673 * Kernel symbols needed by appldata_mem and appldata_os modules.
674 * However, if this file is compiled as a module (for testing only), these
675 * symbols are not exported. In this case, we define them locally and export
676 * those.
677 */
678void si_swapinfo(struct sysinfo *val)
679{
680 val->freeswap = -1ul;
681 val->totalswap = -1ul;
682}
683
684unsigned long avenrun[3] = {-1 - FIXED_1/200, -1 - FIXED_1/200,
685 -1 - FIXED_1/200};
686int nr_threads = -1;
687
688void get_full_page_state(struct page_state *ps)
689{
690 memset(ps, -1, sizeof(struct page_state));
691}
692
693unsigned long nr_running(void)
694{
695 return -1;
696}
697
698unsigned long nr_iowait(void)
699{
700 return -1;
701}
702
703/*unsigned long nr_context_switches(void)
704{
705 return -1;
706}*/
707#endif /* MODULE */
708EXPORT_SYMBOL_GPL(si_swapinfo); 671EXPORT_SYMBOL_GPL(si_swapinfo);
709EXPORT_SYMBOL_GPL(nr_threads); 672EXPORT_SYMBOL_GPL(nr_threads);
710EXPORT_SYMBOL_GPL(nr_running); 673EXPORT_SYMBOL_GPL(nr_running);
711EXPORT_SYMBOL_GPL(nr_iowait); 674EXPORT_SYMBOL_GPL(nr_iowait);
712//EXPORT_SYMBOL_GPL(nr_context_switches);
diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c
index f64b8c867ae2..516b3ac9a9b5 100644
--- a/arch/s390/appldata/appldata_net_sum.c
+++ b/arch/s390/appldata/appldata_net_sum.c
@@ -108,10 +108,10 @@ static void appldata_get_net_sum_data(void *data)
108 collisions = 0; 108 collisions = 0;
109 read_lock(&dev_base_lock); 109 read_lock(&dev_base_lock);
110 for (dev = dev_base; dev != NULL; dev = dev->next) { 110 for (dev = dev_base; dev != NULL; dev = dev->next) {
111 if (dev->get_stats == NULL) { 111 stats = dev->get_stats(dev);
112 if (stats == NULL) {
112 continue; 113 continue;
113 } 114 }
114 stats = dev->get_stats(dev);
115 rx_packets += stats->rx_packets; 115 rx_packets += stats->rx_packets;
116 tx_packets += stats->tx_packets; 116 tx_packets += stats->tx_packets;
117 rx_bytes += stats->rx_bytes; 117 rx_bytes += stats->rx_bytes;
diff --git a/arch/s390/crypto/sha1_s390.c b/arch/s390/crypto/sha1_s390.c
index 969639f31977..af4460ec381f 100644
--- a/arch/s390/crypto/sha1_s390.c
+++ b/arch/s390/crypto/sha1_s390.c
@@ -25,99 +25,100 @@
25 */ 25 */
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/mm.h>
29#include <linux/crypto.h> 28#include <linux/crypto.h>
30#include <asm/scatterlist.h> 29
31#include <asm/byteorder.h>
32#include "crypt_s390.h" 30#include "crypt_s390.h"
33 31
34#define SHA1_DIGEST_SIZE 20 32#define SHA1_DIGEST_SIZE 20
35#define SHA1_BLOCK_SIZE 64 33#define SHA1_BLOCK_SIZE 64
36 34
37struct crypt_s390_sha1_ctx { 35struct s390_sha1_ctx {
38 u64 count; 36 u64 count; /* message length */
39 u32 state[5]; 37 u32 state[5];
40 u32 buf_len; 38 u8 buf[2 * SHA1_BLOCK_SIZE];
41 u8 buffer[2 * SHA1_BLOCK_SIZE];
42}; 39};
43 40
44static void sha1_init(struct crypto_tfm *tfm) 41static void sha1_init(struct crypto_tfm *tfm)
45{ 42{
46 struct crypt_s390_sha1_ctx *ctx = crypto_tfm_ctx(tfm); 43 struct s390_sha1_ctx *sctx = crypto_tfm_ctx(tfm);
47 44
48 ctx->state[0] = 0x67452301; 45 sctx->state[0] = 0x67452301;
49 ctx->state[1] = 0xEFCDAB89; 46 sctx->state[1] = 0xEFCDAB89;
50 ctx->state[2] = 0x98BADCFE; 47 sctx->state[2] = 0x98BADCFE;
51 ctx->state[3] = 0x10325476; 48 sctx->state[3] = 0x10325476;
52 ctx->state[4] = 0xC3D2E1F0; 49 sctx->state[4] = 0xC3D2E1F0;
53 50 sctx->count = 0;
54 ctx->count = 0;
55 ctx->buf_len = 0;
56} 51}
57 52
58static void sha1_update(struct crypto_tfm *tfm, const u8 *data, 53static void sha1_update(struct crypto_tfm *tfm, const u8 *data,
59 unsigned int len) 54 unsigned int len)
60{ 55{
61 struct crypt_s390_sha1_ctx *sctx; 56 struct s390_sha1_ctx *sctx = crypto_tfm_ctx(tfm);
62 long imd_len; 57 unsigned int index;
63 58 int ret;
64 sctx = crypto_tfm_ctx(tfm); 59
65 sctx->count += len * 8; /* message bit length */ 60 /* how much is already in the buffer? */
66 61 index = sctx->count & 0x3f;
67 /* anything in buffer yet? -> must be completed */ 62
68 if (sctx->buf_len && (sctx->buf_len + len) >= SHA1_BLOCK_SIZE) { 63 sctx->count += len;
69 /* complete full block and hash */ 64
70 memcpy(sctx->buffer + sctx->buf_len, data, 65 if (index + len < SHA1_BLOCK_SIZE)
71 SHA1_BLOCK_SIZE - sctx->buf_len); 66 goto store;
72 crypt_s390_kimd(KIMD_SHA_1, sctx->state, sctx->buffer, 67
73 SHA1_BLOCK_SIZE); 68 /* process one stored block */
74 data += SHA1_BLOCK_SIZE - sctx->buf_len; 69 if (index) {
75 len -= SHA1_BLOCK_SIZE - sctx->buf_len; 70 memcpy(sctx->buf + index, data, SHA1_BLOCK_SIZE - index);
76 sctx->buf_len = 0; 71 ret = crypt_s390_kimd(KIMD_SHA_1, sctx->state, sctx->buf,
72 SHA1_BLOCK_SIZE);
73 BUG_ON(ret != SHA1_BLOCK_SIZE);
74 data += SHA1_BLOCK_SIZE - index;
75 len -= SHA1_BLOCK_SIZE - index;
77 } 76 }
78 77
79 /* rest of data contains full blocks? */ 78 /* process as many blocks as possible */
80 imd_len = len & ~0x3ful; 79 if (len >= SHA1_BLOCK_SIZE) {
81 if (imd_len) { 80 ret = crypt_s390_kimd(KIMD_SHA_1, sctx->state, data,
82 crypt_s390_kimd(KIMD_SHA_1, sctx->state, data, imd_len); 81 len & ~(SHA1_BLOCK_SIZE - 1));
83 data += imd_len; 82 BUG_ON(ret != (len & ~(SHA1_BLOCK_SIZE - 1)));
84 len -= imd_len; 83 data += ret;
84 len -= ret;
85 } 85 }
86 /* anything left? store in buffer */
87 if (len) {
88 memcpy(sctx->buffer + sctx->buf_len , data, len);
89 sctx->buf_len += len;
90 }
91}
92 86
87store:
88 /* anything left? */
89 if (len)
90 memcpy(sctx->buf + index , data, len);
91}
93 92
94static void pad_message(struct crypt_s390_sha1_ctx* sctx) 93/* Add padding and return the message digest. */
94static void sha1_final(struct crypto_tfm *tfm, u8 *out)
95{ 95{
96 int index; 96 struct s390_sha1_ctx *sctx = crypto_tfm_ctx(tfm);
97 u64 bits;
98 unsigned int index, end;
99 int ret;
100
101 /* must perform manual padding */
102 index = sctx->count & 0x3f;
103 end = (index < 56) ? SHA1_BLOCK_SIZE : (2 * SHA1_BLOCK_SIZE);
97 104
98 index = sctx->buf_len;
99 sctx->buf_len = (sctx->buf_len < 56) ?
100 SHA1_BLOCK_SIZE:2 * SHA1_BLOCK_SIZE;
101 /* start pad with 1 */ 105 /* start pad with 1 */
102 sctx->buffer[index] = 0x80; 106 sctx->buf[index] = 0x80;
107
103 /* pad with zeros */ 108 /* pad with zeros */
104 index++; 109 index++;
105 memset(sctx->buffer + index, 0x00, sctx->buf_len - index); 110 memset(sctx->buf + index, 0x00, end - index - 8);
106 /* append length */
107 memcpy(sctx->buffer + sctx->buf_len - 8, &sctx->count,
108 sizeof sctx->count);
109}
110 111
111/* Add padding and return the message digest. */ 112 /* append message length */
112static void sha1_final(struct crypto_tfm *tfm, u8 *out) 113 bits = sctx->count * 8;
113{ 114 memcpy(sctx->buf + end - 8, &bits, sizeof(bits));
114 struct crypt_s390_sha1_ctx *sctx = crypto_tfm_ctx(tfm); 115
116 ret = crypt_s390_kimd(KIMD_SHA_1, sctx->state, sctx->buf, end);
117 BUG_ON(ret != end);
115 118
116 /* must perform manual padding */
117 pad_message(sctx);
118 crypt_s390_kimd(KIMD_SHA_1, sctx->state, sctx->buffer, sctx->buf_len);
119 /* copy digest to out */ 119 /* copy digest to out */
120 memcpy(out, sctx->state, SHA1_DIGEST_SIZE); 120 memcpy(out, sctx->state, SHA1_DIGEST_SIZE);
121
121 /* wipe context */ 122 /* wipe context */
122 memset(sctx, 0, sizeof *sctx); 123 memset(sctx, 0, sizeof *sctx);
123} 124}
@@ -128,7 +129,7 @@ static struct crypto_alg alg = {
128 .cra_priority = CRYPT_S390_PRIORITY, 129 .cra_priority = CRYPT_S390_PRIORITY,
129 .cra_flags = CRYPTO_ALG_TYPE_DIGEST, 130 .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
130 .cra_blocksize = SHA1_BLOCK_SIZE, 131 .cra_blocksize = SHA1_BLOCK_SIZE,
131 .cra_ctxsize = sizeof(struct crypt_s390_sha1_ctx), 132 .cra_ctxsize = sizeof(struct s390_sha1_ctx),
132 .cra_module = THIS_MODULE, 133 .cra_module = THIS_MODULE,
133 .cra_list = LIST_HEAD_INIT(alg.cra_list), 134 .cra_list = LIST_HEAD_INIT(alg.cra_list),
134 .cra_u = { .digest = { 135 .cra_u = { .digest = {
diff --git a/arch/s390/crypto/sha256_s390.c b/arch/s390/crypto/sha256_s390.c
index 78436c696d37..2ced3330bce0 100644
--- a/arch/s390/crypto/sha256_s390.c
+++ b/arch/s390/crypto/sha256_s390.c
@@ -26,7 +26,7 @@
26#define SHA256_BLOCK_SIZE 64 26#define SHA256_BLOCK_SIZE 64
27 27
28struct s390_sha256_ctx { 28struct s390_sha256_ctx {
29 u64 count; 29 u64 count; /* message length */
30 u32 state[8]; 30 u32 state[8];
31 u8 buf[2 * SHA256_BLOCK_SIZE]; 31 u8 buf[2 * SHA256_BLOCK_SIZE];
32}; 32};
@@ -54,10 +54,9 @@ static void sha256_update(struct crypto_tfm *tfm, const u8 *data,
54 int ret; 54 int ret;
55 55
56 /* how much is already in the buffer? */ 56 /* how much is already in the buffer? */
57 index = sctx->count / 8 & 0x3f; 57 index = sctx->count & 0x3f;
58 58
59 /* update message bit length */ 59 sctx->count += len;
60 sctx->count += len * 8;
61 60
62 if ((index + len) < SHA256_BLOCK_SIZE) 61 if ((index + len) < SHA256_BLOCK_SIZE)
63 goto store; 62 goto store;
@@ -87,12 +86,17 @@ store:
87 memcpy(sctx->buf + index , data, len); 86 memcpy(sctx->buf + index , data, len);
88} 87}
89 88
90static void pad_message(struct s390_sha256_ctx* sctx) 89/* Add padding and return the message digest */
90static void sha256_final(struct crypto_tfm *tfm, u8 *out)
91{ 91{
92 int index, end; 92 struct s390_sha256_ctx *sctx = crypto_tfm_ctx(tfm);
93 u64 bits;
94 unsigned int index, end;
95 int ret;
93 96
94 index = sctx->count / 8 & 0x3f; 97 /* must perform manual padding */
95 end = index < 56 ? SHA256_BLOCK_SIZE : 2 * SHA256_BLOCK_SIZE; 98 index = sctx->count & 0x3f;
99 end = (index < 56) ? SHA256_BLOCK_SIZE : (2 * SHA256_BLOCK_SIZE);
96 100
97 /* start pad with 1 */ 101 /* start pad with 1 */
98 sctx->buf[index] = 0x80; 102 sctx->buf[index] = 0x80;
@@ -102,21 +106,11 @@ static void pad_message(struct s390_sha256_ctx* sctx)
102 memset(sctx->buf + index, 0x00, end - index - 8); 106 memset(sctx->buf + index, 0x00, end - index - 8);
103 107
104 /* append message length */ 108 /* append message length */
105 memcpy(sctx->buf + end - 8, &sctx->count, sizeof sctx->count); 109 bits = sctx->count * 8;
106 110 memcpy(sctx->buf + end - 8, &bits, sizeof(bits));
107 sctx->count = end * 8;
108}
109
110/* Add padding and return the message digest */
111static void sha256_final(struct crypto_tfm *tfm, u8 *out)
112{
113 struct s390_sha256_ctx *sctx = crypto_tfm_ctx(tfm);
114
115 /* must perform manual padding */
116 pad_message(sctx);
117 111
118 crypt_s390_kimd(KIMD_SHA_256, sctx->state, sctx->buf, 112 ret = crypt_s390_kimd(KIMD_SHA_256, sctx->state, sctx->buf, end);
119 sctx->count / 8); 113 BUG_ON(ret != end);
120 114
121 /* copy digest to out */ 115 /* copy digest to out */
122 memcpy(out, sctx->state, SHA256_DIGEST_SIZE); 116 memcpy(out, sctx->state, SHA256_DIGEST_SIZE);
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index 741d2bbb2b37..0e4da8a7d826 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -12,6 +12,7 @@ CONFIG_RWSEM_XCHGADD_ALGORITHM=y
12# CONFIG_ARCH_HAS_ILOG2_U64 is not set 12# CONFIG_ARCH_HAS_ILOG2_U64 is not set
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_TIME=y 14CONFIG_GENERIC_TIME=y
15CONFIG_GENERIC_BUG=y
15CONFIG_NO_IOMEM=y 16CONFIG_NO_IOMEM=y
16CONFIG_S390=y 17CONFIG_S390=y
17CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -166,6 +167,7 @@ CONFIG_NO_IDLE_HZ=y
166CONFIG_NO_IDLE_HZ_INIT=y 167CONFIG_NO_IDLE_HZ_INIT=y
167CONFIG_S390_HYPFS_FS=y 168CONFIG_S390_HYPFS_FS=y
168CONFIG_KEXEC=y 169CONFIG_KEXEC=y
170# CONFIG_ZFCPDUMP is not set
169 171
170# 172#
171# Networking 173# Networking
@@ -705,6 +707,7 @@ CONFIG_DEBUG_MUTEXES=y
705CONFIG_DEBUG_SPINLOCK_SLEEP=y 707CONFIG_DEBUG_SPINLOCK_SLEEP=y
706# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 708# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
707# CONFIG_DEBUG_KOBJECT is not set 709# CONFIG_DEBUG_KOBJECT is not set
710CONFIG_DEBUG_BUGVERBOSE=y
708# CONFIG_DEBUG_INFO is not set 711# CONFIG_DEBUG_INFO is not set
709# CONFIG_DEBUG_VM is not set 712# CONFIG_DEBUG_VM is not set
710# CONFIG_DEBUG_LIST is not set 713# CONFIG_DEBUG_LIST is not set
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 5492d25d7d69..3195d375bd51 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -6,7 +6,7 @@ EXTRA_AFLAGS := -traditional
6 6
7obj-y := bitmap.o traps.o time.o process.o base.o early.o \ 7obj-y := bitmap.o traps.o time.o process.o base.o early.o \
8 setup.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \ 8 setup.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
9 semaphore.o s390_ext.o debug.o irq.o ipl.o 9 semaphore.o s390_ext.o debug.o irq.o ipl.o dis.o
10 10
11obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o) 11obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o)
12obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o) 12obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 664c669b1856..5236fdb17fcb 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -495,29 +495,34 @@ sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo)
495 * sys32_execve() executes a new program after the asm stub has set 495 * sys32_execve() executes a new program after the asm stub has set
496 * things up for us. This should basically do what I want it to. 496 * things up for us. This should basically do what I want it to.
497 */ 497 */
498asmlinkage long 498asmlinkage long sys32_execve(void)
499sys32_execve(struct pt_regs regs)
500{ 499{
501 int error; 500 struct pt_regs *regs = task_pt_regs(current);
502 char * filename; 501 char *filename;
502 unsigned long result;
503 int rc;
503 504
504 filename = getname(compat_ptr(regs.orig_gpr2)); 505 filename = getname(compat_ptr(regs->orig_gpr2));
505 error = PTR_ERR(filename); 506 if (IS_ERR(filename)) {
506 if (IS_ERR(filename)) 507 result = PTR_ERR(filename);
507 goto out; 508 goto out;
508 error = compat_do_execve(filename, compat_ptr(regs.gprs[3]),
509 compat_ptr(regs.gprs[4]), &regs);
510 if (error == 0)
511 {
512 task_lock(current);
513 current->ptrace &= ~PT_DTRACE;
514 task_unlock(current);
515 current->thread.fp_regs.fpc=0;
516 asm volatile("sfpc %0,0" : : "d" (0));
517 } 509 }
510 rc = compat_do_execve(filename, compat_ptr(regs->gprs[3]),
511 compat_ptr(regs->gprs[4]), regs);
512 if (rc) {
513 result = rc;
514 goto out_putname;
515 }
516 task_lock(current);
517 current->ptrace &= ~PT_DTRACE;
518 task_unlock(current);
519 current->thread.fp_regs.fpc=0;
520 asm volatile("sfpc %0,0" : : "d" (0));
521 result = regs->gprs[2];
522out_putname:
518 putname(filename); 523 putname(filename);
519out: 524out:
520 return error; 525 return result;
521} 526}
522 527
523 528
@@ -918,19 +923,20 @@ asmlinkage long sys32_write(unsigned int fd, char __user * buf, size_t count)
918 return sys_write(fd, buf, count); 923 return sys_write(fd, buf, count);
919} 924}
920 925
921asmlinkage long sys32_clone(struct pt_regs regs) 926asmlinkage long sys32_clone(void)
922{ 927{
923 unsigned long clone_flags; 928 struct pt_regs *regs = task_pt_regs(current);
924 unsigned long newsp; 929 unsigned long clone_flags;
930 unsigned long newsp;
925 int __user *parent_tidptr, *child_tidptr; 931 int __user *parent_tidptr, *child_tidptr;
926 932
927 clone_flags = regs.gprs[3] & 0xffffffffUL; 933 clone_flags = regs->gprs[3] & 0xffffffffUL;
928 newsp = regs.orig_gpr2 & 0x7fffffffUL; 934 newsp = regs->orig_gpr2 & 0x7fffffffUL;
929 parent_tidptr = compat_ptr(regs.gprs[4]); 935 parent_tidptr = compat_ptr(regs->gprs[4]);
930 child_tidptr = compat_ptr(regs.gprs[5]); 936 child_tidptr = compat_ptr(regs->gprs[5]);
931 if (!newsp) 937 if (!newsp)
932 newsp = regs.gprs[15]; 938 newsp = regs->gprs[15];
933 return do_fork(clone_flags, newsp, &regs, 0, 939 return do_fork(clone_flags, newsp, regs, 0,
934 parent_tidptr, child_tidptr); 940 parent_tidptr, child_tidptr);
935} 941}
936 942
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index 887a9881d0d0..80a54a0149ab 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -255,9 +255,9 @@ sys32_rt_sigaction(int sig, const struct sigaction32 __user *act,
255} 255}
256 256
257asmlinkage long 257asmlinkage long
258sys32_sigaltstack(const stack_t32 __user *uss, stack_t32 __user *uoss, 258sys32_sigaltstack(const stack_t32 __user *uss, stack_t32 __user *uoss)
259 struct pt_regs *regs)
260{ 259{
260 struct pt_regs *regs = task_pt_regs(current);
261 stack_t kss, koss; 261 stack_t kss, koss;
262 unsigned long ss_sp; 262 unsigned long ss_sp;
263 int ret, err = 0; 263 int ret, err = 0;
@@ -344,8 +344,9 @@ static int restore_sigregs32(struct pt_regs *regs,_sigregs32 __user *sregs)
344 return 0; 344 return 0;
345} 345}
346 346
347asmlinkage long sys32_sigreturn(struct pt_regs *regs) 347asmlinkage long sys32_sigreturn(void)
348{ 348{
349 struct pt_regs *regs = task_pt_regs(current);
349 sigframe32 __user *frame = (sigframe32 __user *)regs->gprs[15]; 350 sigframe32 __user *frame = (sigframe32 __user *)regs->gprs[15];
350 sigset_t set; 351 sigset_t set;
351 352
@@ -370,8 +371,9 @@ badframe:
370 return 0; 371 return 0;
371} 372}
372 373
373asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs) 374asmlinkage long sys32_rt_sigreturn(void)
374{ 375{
376 struct pt_regs *regs = task_pt_regs(current);
375 rt_sigframe32 __user *frame = (rt_sigframe32 __user *)regs->gprs[15]; 377 rt_sigframe32 __user *frame = (rt_sigframe32 __user *)regs->gprs[15];
376 sigset_t set; 378 sigset_t set;
377 stack_t st; 379 stack_t st;
@@ -407,8 +409,8 @@ asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs)
407 return regs->gprs[2]; 409 return regs->gprs[2];
408 410
409badframe: 411badframe:
410 force_sig(SIGSEGV, current); 412 force_sig(SIGSEGV, current);
411 return 0; 413 return 0;
412} 414}
413 415
414/* 416/*
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
new file mode 100644
index 000000000000..dabaf98943d0
--- /dev/null
+++ b/arch/s390/kernel/dis.c
@@ -0,0 +1,1278 @@
1/*
2 * arch/s390/kernel/dis.c
3 *
4 * Disassemble s390 instructions.
5 *
6 * Copyright IBM Corp. 2007
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 */
9
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/errno.h>
14#include <linux/ptrace.h>
15#include <linux/timer.h>
16#include <linux/mm.h>
17#include <linux/smp.h>
18#include <linux/smp_lock.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/delay.h>
22#include <linux/module.h>
23#include <linux/kallsyms.h>
24#include <linux/reboot.h>
25#include <linux/kprobes.h>
26
27#include <asm/system.h>
28#include <asm/uaccess.h>
29#include <asm/io.h>
30#include <asm/atomic.h>
31#include <asm/mathemu.h>
32#include <asm/cpcmd.h>
33#include <asm/s390_ext.h>
34#include <asm/lowcore.h>
35#include <asm/debug.h>
36#include <asm/kdebug.h>
37
38#ifndef CONFIG_64BIT
39#define ONELONG "%08lx: "
40#else /* CONFIG_64BIT */
41#define ONELONG "%016lx: "
42#endif /* CONFIG_64BIT */
43
44#define OPERAND_GPR 0x1 /* Operand printed as %rx */
45#define OPERAND_FPR 0x2 /* Operand printed as %fx */
46#define OPERAND_AR 0x4 /* Operand printed as %ax */
47#define OPERAND_CR 0x8 /* Operand printed as %cx */
48#define OPERAND_DISP 0x10 /* Operand printed as displacement */
49#define OPERAND_BASE 0x20 /* Operand printed as base register */
50#define OPERAND_INDEX 0x40 /* Operand printed as index register */
51#define OPERAND_PCREL 0x80 /* Operand printed as pc-relative symbol */
52#define OPERAND_SIGNED 0x100 /* Operand printed as signed value */
53#define OPERAND_LENGTH 0x200 /* Operand printed as length (+1) */
54
55enum {
56 UNUSED, /* Indicates the end of the operand list */
57 R_8, /* GPR starting at position 8 */
58 R_12, /* GPR starting at position 12 */
59 R_16, /* GPR starting at position 16 */
60 R_20, /* GPR starting at position 20 */
61 R_24, /* GPR starting at position 24 */
62 R_28, /* GPR starting at position 28 */
63 R_32, /* GPR starting at position 32 */
64 F_8, /* FPR starting at position 8 */
65 F_12, /* FPR starting at position 12 */
66 F_16, /* FPR starting at position 16 */
67 F_20, /* FPR starting at position 16 */
68 F_24, /* FPR starting at position 24 */
69 F_28, /* FPR starting at position 28 */
70 F_32, /* FPR starting at position 32 */
71 A_8, /* Access reg. starting at position 8 */
72 A_12, /* Access reg. starting at position 12 */
73 A_24, /* Access reg. starting at position 24 */
74 A_28, /* Access reg. starting at position 28 */
75 C_8, /* Control reg. starting at position 8 */
76 C_12, /* Control reg. starting at position 12 */
77 B_16, /* Base register starting at position 16 */
78 B_32, /* Base register starting at position 32 */
79 X_12, /* Index register starting at position 12 */
80 D_20, /* Displacement starting at position 20 */
81 D_36, /* Displacement starting at position 36 */
82 D20_20, /* 20 bit displacement starting at 20 */
83 L4_8, /* 4 bit length starting at position 8 */
84 L4_12, /* 4 bit length starting at position 12 */
85 L8_8, /* 8 bit length starting at position 8 */
86 U4_8, /* 4 bit unsigned value starting at 8 */
87 U4_12, /* 4 bit unsigned value starting at 12 */
88 U4_16, /* 4 bit unsigned value starting at 16 */
89 U4_20, /* 4 bit unsigned value starting at 20 */
90 U8_8, /* 8 bit unsigned value starting at 8 */
91 U8_16, /* 8 bit unsigned value starting at 16 */
92 I16_16, /* 16 bit signed value starting at 16 */
93 U16_16, /* 16 bit unsigned value starting at 16 */
94 J16_16, /* PC relative jump offset at 16 */
95 J32_16, /* PC relative long offset at 16 */
96 I32_16, /* 32 bit signed value starting at 16 */
97 U32_16, /* 32 bit unsigned value starting at 16 */
98 M_16, /* 4 bit optional mask starting at 16 */
99 RO_28, /* optional GPR starting at position 28 */
100};
101
102/*
103 * Enumeration of the different instruction formats.
104 * For details consult the principles of operation.
105 */
106enum {
107 INSTR_INVALID,
108 INSTR_E, INSTR_RIE_RRP, INSTR_RIL_RI, INSTR_RIL_RP, INSTR_RIL_RU,
109 INSTR_RIL_UP, INSTR_RI_RI, INSTR_RI_RP, INSTR_RI_RU, INSTR_RI_UP,
110 INSTR_RRE_00, INSTR_RRE_0R, INSTR_RRE_AA, INSTR_RRE_AR, INSTR_RRE_F0,
111 INSTR_RRE_FF, INSTR_RRE_R0, INSTR_RRE_RA, INSTR_RRE_RF, INSTR_RRE_RR,
112 INSTR_RRE_RR_OPT, INSTR_RRF_F0FF, INSTR_RRF_FUFF, INSTR_RRF_M0RR,
113 INSTR_RRF_R0RR, INSTR_RRF_RURR, INSTR_RRF_U0FF, INSTR_RRF_U0RF,
114 INSTR_RR_FF, INSTR_RR_R0, INSTR_RR_RR, INSTR_RR_U0, INSTR_RR_UR,
115 INSTR_RSE_CCRD, INSTR_RSE_RRRD, INSTR_RSE_RURD, INSTR_RSI_RRP,
116 INSTR_RSL_R0RD, INSTR_RSY_AARD, INSTR_RSY_CCRD, INSTR_RSY_RRRD,
117 INSTR_RSY_RURD, INSTR_RS_AARD, INSTR_RS_CCRD, INSTR_RS_R0RD,
118 INSTR_RS_RRRD, INSTR_RS_RURD, INSTR_RXE_FRRD, INSTR_RXE_RRRD,
119 INSTR_RXF_FRRDF, INSTR_RXY_FRRD, INSTR_RXY_RRRD, INSTR_RX_FRRD,
120 INSTR_RX_RRRD, INSTR_RX_URRD, INSTR_SIY_URD, INSTR_SI_URD,
121 INSTR_SSE_RDRD, INSTR_SSF_RRDRD, INSTR_SS_L0RDRD, INSTR_SS_LIRDRD,
122 INSTR_SS_LLRDRD, INSTR_SS_RRRDRD, INSTR_SS_RRRDRD2, INSTR_SS_RRRDRD3,
123 INSTR_S_00, INSTR_S_RD,
124};
125
126struct operand {
127 int bits; /* The number of bits in the operand. */
128 int shift; /* The number of bits to shift. */
129 int flags; /* One bit syntax flags. */
130};
131
132struct insn {
133 const char name[5];
134 unsigned char opfrag;
135 unsigned char format;
136};
137
138static const struct operand operands[] =
139{
140 [UNUSED] = { 0, 0, 0 },
141 [R_8] = { 4, 8, OPERAND_GPR },
142 [R_12] = { 4, 12, OPERAND_GPR },
143 [R_16] = { 4, 16, OPERAND_GPR },
144 [R_20] = { 4, 20, OPERAND_GPR },
145 [R_24] = { 4, 24, OPERAND_GPR },
146 [R_28] = { 4, 28, OPERAND_GPR },
147 [R_32] = { 4, 32, OPERAND_GPR },
148 [F_8] = { 4, 8, OPERAND_FPR },
149 [F_12] = { 4, 12, OPERAND_FPR },
150 [F_16] = { 4, 16, OPERAND_FPR },
151 [F_20] = { 4, 16, OPERAND_FPR },
152 [F_24] = { 4, 24, OPERAND_FPR },
153 [F_28] = { 4, 28, OPERAND_FPR },
154 [F_32] = { 4, 32, OPERAND_FPR },
155 [A_8] = { 4, 8, OPERAND_AR },
156 [A_12] = { 4, 12, OPERAND_AR },
157 [A_24] = { 4, 24, OPERAND_AR },
158 [A_28] = { 4, 28, OPERAND_AR },
159 [C_8] = { 4, 8, OPERAND_CR },
160 [C_12] = { 4, 12, OPERAND_CR },
161 [B_16] = { 4, 16, OPERAND_BASE | OPERAND_GPR },
162 [B_32] = { 4, 32, OPERAND_BASE | OPERAND_GPR },
163 [X_12] = { 4, 12, OPERAND_INDEX | OPERAND_GPR },
164 [D_20] = { 12, 20, OPERAND_DISP },
165 [D_36] = { 12, 36, OPERAND_DISP },
166 [D20_20] = { 20, 20, OPERAND_DISP | OPERAND_SIGNED },
167 [L4_8] = { 4, 8, OPERAND_LENGTH },
168 [L4_12] = { 4, 12, OPERAND_LENGTH },
169 [L8_8] = { 8, 8, OPERAND_LENGTH },
170 [U4_8] = { 4, 8, 0 },
171 [U4_12] = { 4, 12, 0 },
172 [U4_16] = { 4, 16, 0 },
173 [U4_20] = { 4, 20, 0 },
174 [U8_8] = { 8, 8, 0 },
175 [U8_16] = { 8, 16, 0 },
176 [I16_16] = { 16, 16, OPERAND_SIGNED },
177 [U16_16] = { 16, 16, 0 },
178 [J16_16] = { 16, 16, OPERAND_PCREL },
179 [J32_16] = { 32, 16, OPERAND_PCREL },
180 [I32_16] = { 32, 16, OPERAND_SIGNED },
181 [U32_16] = { 32, 16, 0 },
182 [M_16] = { 4, 16, 0 },
183 [RO_28] = { 4, 28, OPERAND_GPR }
184};
185
186static const unsigned char formats[][7] = {
187 [INSTR_E] = { 0xff, 0,0,0,0,0,0 }, /* e.g. pr */
188 [INSTR_RIE_RRP] = { 0xff, R_8,R_12,J16_16,0,0,0 }, /* e.g. brxhg */
189 [INSTR_RIL_RP] = { 0x0f, R_8,J32_16,0,0,0,0 }, /* e.g. brasl */
190 [INSTR_RIL_UP] = { 0x0f, U4_8,J32_16,0,0,0,0 }, /* e.g. brcl */
191 [INSTR_RIL_RI] = { 0x0f, R_8,I32_16,0,0,0,0 }, /* e.g. afi */
192 [INSTR_RIL_RU] = { 0x0f, R_8,U32_16,0,0,0,0 }, /* e.g. alfi */
193 [INSTR_RI_RI] = { 0x0f, R_8,I16_16,0,0,0,0 }, /* e.g. ahi */
194 [INSTR_RI_RP] = { 0x0f, R_8,J16_16,0,0,0,0 }, /* e.g. brct */
195 [INSTR_RI_RU] = { 0x0f, R_8,U16_16,0,0,0,0 }, /* e.g. tml */
196 [INSTR_RI_UP] = { 0x0f, U4_8,J16_16,0,0,0,0 }, /* e.g. brc */
197 [INSTR_RRE_00] = { 0xff, 0,0,0,0,0,0 }, /* e.g. palb */
198 [INSTR_RRE_0R] = { 0xff, R_28,0,0,0,0,0 }, /* e.g. tb */
199 [INSTR_RRE_AA] = { 0xff, A_24,A_28,0,0,0,0 }, /* e.g. cpya */
200 [INSTR_RRE_AR] = { 0xff, A_24,R_28,0,0,0,0 }, /* e.g. sar */
201 [INSTR_RRE_F0] = { 0xff, F_24,0,0,0,0,0 }, /* e.g. sqer */
202 [INSTR_RRE_FF] = { 0xff, F_24,F_28,0,0,0,0 }, /* e.g. debr */
203 [INSTR_RRE_R0] = { 0xff, R_24,0,0,0,0,0 }, /* e.g. ipm */
204 [INSTR_RRE_RA] = { 0xff, R_24,A_28,0,0,0,0 }, /* e.g. ear */
205 [INSTR_RRE_RF] = { 0xff, R_24,F_28,0,0,0,0 }, /* e.g. cefbr */
206 [INSTR_RRE_RR] = { 0xff, R_24,R_28,0,0,0,0 }, /* e.g. lura */
207 [INSTR_RRE_RR_OPT]= { 0xff, R_24,RO_28,0,0,0,0 }, /* efpc, sfpc */
208 [INSTR_RRF_F0FF] = { 0xff, F_16,F_24,F_28,0,0,0 }, /* e.g. madbr */
209 [INSTR_RRF_FUFF] = { 0xff, F_24,F_16,F_28,U4_20,0,0 },/* e.g. didbr */
210 [INSTR_RRF_RURR] = { 0xff, R_24,R_28,R_16,U4_20,0,0 },/* e.g. .insn */
211 [INSTR_RRF_R0RR] = { 0xff, R_24,R_28,R_16,0,0,0 }, /* e.g. idte */
212 [INSTR_RRF_U0FF] = { 0xff, F_24,U4_16,F_28,0,0,0 }, /* e.g. fixr */
213 [INSTR_RRF_U0RF] = { 0xff, R_24,U4_16,F_28,0,0,0 }, /* e.g. cfebr */
214 [INSTR_RRF_M0RR] = { 0xff, R_24,R_28,M_16,0,0,0 }, /* e.g. sske */
215 [INSTR_RR_FF] = { 0xff, F_8,F_12,0,0,0,0 }, /* e.g. adr */
216 [INSTR_RR_R0] = { 0xff, R_8, 0,0,0,0,0 }, /* e.g. spm */
217 [INSTR_RR_RR] = { 0xff, R_8,R_12,0,0,0,0 }, /* e.g. lr */
218 [INSTR_RR_U0] = { 0xff, U8_8, 0,0,0,0,0 }, /* e.g. svc */
219 [INSTR_RR_UR] = { 0xff, U4_8,R_12,0,0,0,0 }, /* e.g. bcr */
220 [INSTR_RSE_RRRD] = { 0xff, R_8,R_12,D_20,B_16,0,0 }, /* e.g. lmh */
221 [INSTR_RSE_CCRD] = { 0xff, C_8,C_12,D_20,B_16,0,0 }, /* e.g. lmh */
222 [INSTR_RSE_RURD] = { 0xff, R_8,U4_12,D_20,B_16,0,0 }, /* e.g. icmh */
223 [INSTR_RSL_R0RD] = { 0xff, R_8,D_20,B_16,0,0,0 }, /* e.g. tp */
224 [INSTR_RSI_RRP] = { 0xff, R_8,R_12,J16_16,0,0,0 }, /* e.g. brxh */
225 [INSTR_RSY_RRRD] = { 0xff, R_8,R_12,D20_20,B_16,0,0 },/* e.g. stmy */
226 [INSTR_RSY_RURD] = { 0xff, R_8,U4_12,D20_20,B_16,0,0 },
227 /* e.g. icmh */
228 [INSTR_RSY_AARD] = { 0xff, A_8,A_12,D20_20,B_16,0,0 },/* e.g. lamy */
229 [INSTR_RSY_CCRD] = { 0xff, C_8,C_12,D20_20,B_16,0,0 },/* e.g. lamy */
230 [INSTR_RS_AARD] = { 0xff, A_8,A_12,D_20,B_16,0,0 }, /* e.g. lam */
231 [INSTR_RS_CCRD] = { 0xff, C_8,C_12,D_20,B_16,0,0 }, /* e.g. lctl */
232 [INSTR_RS_R0RD] = { 0xff, R_8,D_20,B_16,0,0,0 }, /* e.g. sll */
233 [INSTR_RS_RRRD] = { 0xff, R_8,R_12,D_20,B_16,0,0 }, /* e.g. cs */
234 [INSTR_RS_RURD] = { 0xff, R_8,U4_12,D_20,B_16,0,0 }, /* e.g. icm */
235 [INSTR_RXE_FRRD] = { 0xff, F_8,D_20,X_12,B_16,0,0 }, /* e.g. axbr */
236 [INSTR_RXE_RRRD] = { 0xff, R_8,D_20,X_12,B_16,0,0 }, /* e.g. lg */
237 [INSTR_RXF_FRRDF] = { 0xff, F_32,F_8,D_20,X_12,B_16,0 },
238 /* e.g. madb */
239 [INSTR_RXY_RRRD] = { 0xff, R_8,D20_20,X_12,B_16,0,0 },/* e.g. ly */
240 [INSTR_RXY_FRRD] = { 0xff, F_8,D20_20,X_12,B_16,0,0 },/* e.g. ley */
241 [INSTR_RX_FRRD] = { 0xff, F_8,D_20,X_12,B_16,0,0 }, /* e.g. ae */
242 [INSTR_RX_RRRD] = { 0xff, R_8,D_20,X_12,B_16,0,0 }, /* e.g. l */
243 [INSTR_RX_URRD] = { 0x00, U4_8,D_20,X_12,B_16,0,0 }, /* e.g. bc */
244 [INSTR_SI_URD] = { 0x00, D_20,B_16,U8_8,0,0,0 }, /* e.g. cli */
245 [INSTR_SIY_URD] = { 0xff, D20_20,B_16,U8_8,0,0,0 }, /* e.g. tmy */
246 [INSTR_SSE_RDRD] = { 0xff, D_20,B_16,D_36,B_32,0,0 }, /* e.g. mvsdk */
247 [INSTR_SS_L0RDRD] = { 0xff, D_20,L8_8,B_16,D_36,B_32,0 },
248 /* e.g. mvc */
249 [INSTR_SS_LIRDRD] = { 0xff, D_20,L4_8,B_16,D_36,B_32,U4_12 },
250 /* e.g. srp */
251 [INSTR_SS_LLRDRD] = { 0xff, D_20,L4_8,B_16,D_36,L4_12,B_32 },
252 /* e.g. pack */
253 [INSTR_SS_RRRDRD] = { 0xff, D_20,R_8,B_16,D_36,B_32,R_12 },
254 /* e.g. mvck */
255 [INSTR_SS_RRRDRD2]= { 0xff, R_8,D_20,B_16,R_12,D_36,B_32 },
256 /* e.g. plo */
257 [INSTR_SS_RRRDRD3]= { 0xff, R_8,R_12,D_20,B_16,D_36,B_32 },
258 /* e.g. lmd */
259 [INSTR_S_00] = { 0xff, 0,0,0,0,0,0 }, /* e.g. hsch */
260 [INSTR_S_RD] = { 0xff, D_20,B_16,0,0,0,0 }, /* e.g. lpsw */
261 [INSTR_SSF_RRDRD] = { 0x00, D_20,B_16,D_36,B_32,R_8,0 },
262 /* e.g. mvcos */
263};
264
265static struct insn opcode[] = {
266#ifdef CONFIG_64BIT
267 { "lmd", 0xef, INSTR_SS_RRRDRD3 },
268#endif
269 { "spm", 0x04, INSTR_RR_R0 },
270 { "balr", 0x05, INSTR_RR_RR },
271 { "bctr", 0x06, INSTR_RR_RR },
272 { "bcr", 0x07, INSTR_RR_UR },
273 { "svc", 0x0a, INSTR_RR_U0 },
274 { "bsm", 0x0b, INSTR_RR_RR },
275 { "bassm", 0x0c, INSTR_RR_RR },
276 { "basr", 0x0d, INSTR_RR_RR },
277 { "mvcl", 0x0e, INSTR_RR_RR },
278 { "clcl", 0x0f, INSTR_RR_RR },
279 { "lpr", 0x10, INSTR_RR_RR },
280 { "lnr", 0x11, INSTR_RR_RR },
281 { "ltr", 0x12, INSTR_RR_RR },
282 { "lcr", 0x13, INSTR_RR_RR },
283 { "nr", 0x14, INSTR_RR_RR },
284 { "clr", 0x15, INSTR_RR_RR },
285 { "or", 0x16, INSTR_RR_RR },
286 { "xr", 0x17, INSTR_RR_RR },
287 { "lr", 0x18, INSTR_RR_RR },
288 { "cr", 0x19, INSTR_RR_RR },
289 { "ar", 0x1a, INSTR_RR_RR },
290 { "sr", 0x1b, INSTR_RR_RR },
291 { "mr", 0x1c, INSTR_RR_RR },
292 { "dr", 0x1d, INSTR_RR_RR },
293 { "alr", 0x1e, INSTR_RR_RR },
294 { "slr", 0x1f, INSTR_RR_RR },
295 { "lpdr", 0x20, INSTR_RR_FF },
296 { "lndr", 0x21, INSTR_RR_FF },
297 { "ltdr", 0x22, INSTR_RR_FF },
298 { "lcdr", 0x23, INSTR_RR_FF },
299 { "hdr", 0x24, INSTR_RR_FF },
300 { "ldxr", 0x25, INSTR_RR_FF },
301 { "lrdr", 0x25, INSTR_RR_FF },
302 { "mxr", 0x26, INSTR_RR_FF },
303 { "mxdr", 0x27, INSTR_RR_FF },
304 { "ldr", 0x28, INSTR_RR_FF },
305 { "cdr", 0x29, INSTR_RR_FF },
306 { "adr", 0x2a, INSTR_RR_FF },
307 { "sdr", 0x2b, INSTR_RR_FF },
308 { "mdr", 0x2c, INSTR_RR_FF },
309 { "ddr", 0x2d, INSTR_RR_FF },
310 { "awr", 0x2e, INSTR_RR_FF },
311 { "swr", 0x2f, INSTR_RR_FF },
312 { "lper", 0x30, INSTR_RR_FF },
313 { "lner", 0x31, INSTR_RR_FF },
314 { "lter", 0x32, INSTR_RR_FF },
315 { "lcer", 0x33, INSTR_RR_FF },
316 { "her", 0x34, INSTR_RR_FF },
317 { "ledr", 0x35, INSTR_RR_FF },
318 { "lrer", 0x35, INSTR_RR_FF },
319 { "axr", 0x36, INSTR_RR_FF },
320 { "sxr", 0x37, INSTR_RR_FF },
321 { "ler", 0x38, INSTR_RR_FF },
322 { "cer", 0x39, INSTR_RR_FF },
323 { "aer", 0x3a, INSTR_RR_FF },
324 { "ser", 0x3b, INSTR_RR_FF },
325 { "mder", 0x3c, INSTR_RR_FF },
326 { "mer", 0x3c, INSTR_RR_FF },
327 { "der", 0x3d, INSTR_RR_FF },
328 { "aur", 0x3e, INSTR_RR_FF },
329 { "sur", 0x3f, INSTR_RR_FF },
330 { "sth", 0x40, INSTR_RX_RRRD },
331 { "la", 0x41, INSTR_RX_RRRD },
332 { "stc", 0x42, INSTR_RX_RRRD },
333 { "ic", 0x43, INSTR_RX_RRRD },
334 { "ex", 0x44, INSTR_RX_RRRD },
335 { "bal", 0x45, INSTR_RX_RRRD },
336 { "bct", 0x46, INSTR_RX_RRRD },
337 { "bc", 0x47, INSTR_RX_URRD },
338 { "lh", 0x48, INSTR_RX_RRRD },
339 { "ch", 0x49, INSTR_RX_RRRD },
340 { "ah", 0x4a, INSTR_RX_RRRD },
341 { "sh", 0x4b, INSTR_RX_RRRD },
342 { "mh", 0x4c, INSTR_RX_RRRD },
343 { "bas", 0x4d, INSTR_RX_RRRD },
344 { "cvd", 0x4e, INSTR_RX_RRRD },
345 { "cvb", 0x4f, INSTR_RX_RRRD },
346 { "st", 0x50, INSTR_RX_RRRD },
347 { "lae", 0x51, INSTR_RX_RRRD },
348 { "n", 0x54, INSTR_RX_RRRD },
349 { "cl", 0x55, INSTR_RX_RRRD },
350 { "o", 0x56, INSTR_RX_RRRD },
351 { "x", 0x57, INSTR_RX_RRRD },
352 { "l", 0x58, INSTR_RX_RRRD },
353 { "c", 0x59, INSTR_RX_RRRD },
354 { "a", 0x5a, INSTR_RX_RRRD },
355 { "s", 0x5b, INSTR_RX_RRRD },
356 { "m", 0x5c, INSTR_RX_RRRD },
357 { "d", 0x5d, INSTR_RX_RRRD },
358 { "al", 0x5e, INSTR_RX_RRRD },
359 { "sl", 0x5f, INSTR_RX_RRRD },
360 { "std", 0x60, INSTR_RX_FRRD },
361 { "mxd", 0x67, INSTR_RX_FRRD },
362 { "ld", 0x68, INSTR_RX_FRRD },
363 { "cd", 0x69, INSTR_RX_FRRD },
364 { "ad", 0x6a, INSTR_RX_FRRD },
365 { "sd", 0x6b, INSTR_RX_FRRD },
366 { "md", 0x6c, INSTR_RX_FRRD },
367 { "dd", 0x6d, INSTR_RX_FRRD },
368 { "aw", 0x6e, INSTR_RX_FRRD },
369 { "sw", 0x6f, INSTR_RX_FRRD },
370 { "ste", 0x70, INSTR_RX_FRRD },
371 { "ms", 0x71, INSTR_RX_RRRD },
372 { "le", 0x78, INSTR_RX_FRRD },
373 { "ce", 0x79, INSTR_RX_FRRD },
374 { "ae", 0x7a, INSTR_RX_FRRD },
375 { "se", 0x7b, INSTR_RX_FRRD },
376 { "mde", 0x7c, INSTR_RX_FRRD },
377 { "me", 0x7c, INSTR_RX_FRRD },
378 { "de", 0x7d, INSTR_RX_FRRD },
379 { "au", 0x7e, INSTR_RX_FRRD },
380 { "su", 0x7f, INSTR_RX_FRRD },
381 { "ssm", 0x80, INSTR_S_RD },
382 { "lpsw", 0x82, INSTR_S_RD },
383 { "diag", 0x83, INSTR_RS_RRRD },
384 { "brxh", 0x84, INSTR_RSI_RRP },
385 { "brxle", 0x85, INSTR_RSI_RRP },
386 { "bxh", 0x86, INSTR_RS_RRRD },
387 { "bxle", 0x87, INSTR_RS_RRRD },
388 { "srl", 0x88, INSTR_RS_R0RD },
389 { "sll", 0x89, INSTR_RS_R0RD },
390 { "sra", 0x8a, INSTR_RS_R0RD },
391 { "sla", 0x8b, INSTR_RS_R0RD },
392 { "srdl", 0x8c, INSTR_RS_R0RD },
393 { "sldl", 0x8d, INSTR_RS_R0RD },
394 { "srda", 0x8e, INSTR_RS_R0RD },
395 { "slda", 0x8f, INSTR_RS_R0RD },
396 { "stm", 0x90, INSTR_RS_RRRD },
397 { "tm", 0x91, INSTR_SI_URD },
398 { "mvi", 0x92, INSTR_SI_URD },
399 { "ts", 0x93, INSTR_S_RD },
400 { "ni", 0x94, INSTR_SI_URD },
401 { "cli", 0x95, INSTR_SI_URD },
402 { "oi", 0x96, INSTR_SI_URD },
403 { "xi", 0x97, INSTR_SI_URD },
404 { "lm", 0x98, INSTR_RS_RRRD },
405 { "trace", 0x99, INSTR_RS_RRRD },
406 { "lam", 0x9a, INSTR_RS_AARD },
407 { "stam", 0x9b, INSTR_RS_AARD },
408 { "mvcle", 0xa8, INSTR_RS_RRRD },
409 { "clcle", 0xa9, INSTR_RS_RRRD },
410 { "stnsm", 0xac, INSTR_SI_URD },
411 { "stosm", 0xad, INSTR_SI_URD },
412 { "sigp", 0xae, INSTR_RS_RRRD },
413 { "mc", 0xaf, INSTR_SI_URD },
414 { "lra", 0xb1, INSTR_RX_RRRD },
415 { "stctl", 0xb6, INSTR_RS_CCRD },
416 { "lctl", 0xb7, INSTR_RS_CCRD },
417 { "cs", 0xba, INSTR_RS_RRRD },
418 { "cds", 0xbb, INSTR_RS_RRRD },
419 { "clm", 0xbd, INSTR_RS_RURD },
420 { "stcm", 0xbe, INSTR_RS_RURD },
421 { "icm", 0xbf, INSTR_RS_RURD },
422 { "mvn", 0xd1, INSTR_SS_L0RDRD },
423 { "mvc", 0xd2, INSTR_SS_L0RDRD },
424 { "mvz", 0xd3, INSTR_SS_L0RDRD },
425 { "nc", 0xd4, INSTR_SS_L0RDRD },
426 { "clc", 0xd5, INSTR_SS_L0RDRD },
427 { "oc", 0xd6, INSTR_SS_L0RDRD },
428 { "xc", 0xd7, INSTR_SS_L0RDRD },
429 { "mvck", 0xd9, INSTR_SS_RRRDRD },
430 { "mvcp", 0xda, INSTR_SS_RRRDRD },
431 { "mvcs", 0xdb, INSTR_SS_RRRDRD },
432 { "tr", 0xdc, INSTR_SS_L0RDRD },
433 { "trt", 0xdd, INSTR_SS_L0RDRD },
434 { "ed", 0xde, INSTR_SS_L0RDRD },
435 { "edmk", 0xdf, INSTR_SS_L0RDRD },
436 { "pku", 0xe1, INSTR_SS_L0RDRD },
437 { "unpku", 0xe2, INSTR_SS_L0RDRD },
438 { "mvcin", 0xe8, INSTR_SS_L0RDRD },
439 { "pka", 0xe9, INSTR_SS_L0RDRD },
440 { "unpka", 0xea, INSTR_SS_L0RDRD },
441 { "plo", 0xee, INSTR_SS_RRRDRD2 },
442 { "srp", 0xf0, INSTR_SS_LIRDRD },
443 { "mvo", 0xf1, INSTR_SS_LLRDRD },
444 { "pack", 0xf2, INSTR_SS_LLRDRD },
445 { "unpk", 0xf3, INSTR_SS_LLRDRD },
446 { "zap", 0xf8, INSTR_SS_LLRDRD },
447 { "cp", 0xf9, INSTR_SS_LLRDRD },
448 { "ap", 0xfa, INSTR_SS_LLRDRD },
449 { "sp", 0xfb, INSTR_SS_LLRDRD },
450 { "mp", 0xfc, INSTR_SS_LLRDRD },
451 { "dp", 0xfd, INSTR_SS_LLRDRD },
452 { "", 0, INSTR_INVALID }
453};
454
455static struct insn opcode_01[] = {
456#ifdef CONFIG_64BIT
457 { "sam64", 0x0e, INSTR_E },
458#endif
459 { "pr", 0x01, INSTR_E },
460 { "upt", 0x02, INSTR_E },
461 { "sckpf", 0x07, INSTR_E },
462 { "tam", 0x0b, INSTR_E },
463 { "sam24", 0x0c, INSTR_E },
464 { "sam31", 0x0d, INSTR_E },
465 { "trap2", 0xff, INSTR_E },
466 { "", 0, INSTR_INVALID }
467};
468
469static struct insn opcode_a5[] = {
470#ifdef CONFIG_64BIT
471 { "iihh", 0x00, INSTR_RI_RU },
472 { "iihl", 0x01, INSTR_RI_RU },
473 { "iilh", 0x02, INSTR_RI_RU },
474 { "iill", 0x03, INSTR_RI_RU },
475 { "nihh", 0x04, INSTR_RI_RU },
476 { "nihl", 0x05, INSTR_RI_RU },
477 { "nilh", 0x06, INSTR_RI_RU },
478 { "nill", 0x07, INSTR_RI_RU },
479 { "oihh", 0x08, INSTR_RI_RU },
480 { "oihl", 0x09, INSTR_RI_RU },
481 { "oilh", 0x0a, INSTR_RI_RU },
482 { "oill", 0x0b, INSTR_RI_RU },
483 { "llihh", 0x0c, INSTR_RI_RU },
484 { "llihl", 0x0d, INSTR_RI_RU },
485 { "llilh", 0x0e, INSTR_RI_RU },
486 { "llill", 0x0f, INSTR_RI_RU },
487#endif
488 { "", 0, INSTR_INVALID }
489};
490
491static struct insn opcode_a7[] = {
492#ifdef CONFIG_64BIT
493 { "tmhh", 0x02, INSTR_RI_RU },
494 { "tmhl", 0x03, INSTR_RI_RU },
495 { "brctg", 0x07, INSTR_RI_RP },
496 { "lghi", 0x09, INSTR_RI_RI },
497 { "aghi", 0x0b, INSTR_RI_RI },
498 { "mghi", 0x0d, INSTR_RI_RI },
499 { "cghi", 0x0f, INSTR_RI_RI },
500#endif
501 { "tmlh", 0x00, INSTR_RI_RU },
502 { "tmll", 0x01, INSTR_RI_RU },
503 { "brc", 0x04, INSTR_RI_UP },
504 { "bras", 0x05, INSTR_RI_RP },
505 { "brct", 0x06, INSTR_RI_RP },
506 { "lhi", 0x08, INSTR_RI_RI },
507 { "ahi", 0x0a, INSTR_RI_RI },
508 { "mhi", 0x0c, INSTR_RI_RI },
509 { "chi", 0x0e, INSTR_RI_RI },
510 { "", 0, INSTR_INVALID }
511};
512
513static struct insn opcode_b2[] = {
514#ifdef CONFIG_64BIT
515 { "sske", 0x2b, INSTR_RRF_M0RR },
516 { "stckf", 0x7c, INSTR_S_RD },
517 { "cu21", 0xa6, INSTR_RRF_M0RR },
518 { "cuutf", 0xa6, INSTR_RRF_M0RR },
519 { "cu12", 0xa7, INSTR_RRF_M0RR },
520 { "cutfu", 0xa7, INSTR_RRF_M0RR },
521 { "stfle", 0xb0, INSTR_S_RD },
522 { "lpswe", 0xb2, INSTR_S_RD },
523#endif
524 { "stidp", 0x02, INSTR_S_RD },
525 { "sck", 0x04, INSTR_S_RD },
526 { "stck", 0x05, INSTR_S_RD },
527 { "sckc", 0x06, INSTR_S_RD },
528 { "stckc", 0x07, INSTR_S_RD },
529 { "spt", 0x08, INSTR_S_RD },
530 { "stpt", 0x09, INSTR_S_RD },
531 { "spka", 0x0a, INSTR_S_RD },
532 { "ipk", 0x0b, INSTR_S_00 },
533 { "ptlb", 0x0d, INSTR_S_00 },
534 { "spx", 0x10, INSTR_S_RD },
535 { "stpx", 0x11, INSTR_S_RD },
536 { "stap", 0x12, INSTR_S_RD },
537 { "sie", 0x14, INSTR_S_RD },
538 { "pc", 0x18, INSTR_S_RD },
539 { "sac", 0x19, INSTR_S_RD },
540 { "cfc", 0x1a, INSTR_S_RD },
541 { "ipte", 0x21, INSTR_RRE_RR },
542 { "ipm", 0x22, INSTR_RRE_R0 },
543 { "ivsk", 0x23, INSTR_RRE_RR },
544 { "iac", 0x24, INSTR_RRE_R0 },
545 { "ssar", 0x25, INSTR_RRE_R0 },
546 { "epar", 0x26, INSTR_RRE_R0 },
547 { "esar", 0x27, INSTR_RRE_R0 },
548 { "pt", 0x28, INSTR_RRE_RR },
549 { "iske", 0x29, INSTR_RRE_RR },
550 { "rrbe", 0x2a, INSTR_RRE_RR },
551 { "sske", 0x2b, INSTR_RRE_RR },
552 { "tb", 0x2c, INSTR_RRE_0R },
553 { "dxr", 0x2d, INSTR_RRE_F0 },
554 { "pgin", 0x2e, INSTR_RRE_RR },
555 { "pgout", 0x2f, INSTR_RRE_RR },
556 { "csch", 0x30, INSTR_S_00 },
557 { "hsch", 0x31, INSTR_S_00 },
558 { "msch", 0x32, INSTR_S_RD },
559 { "ssch", 0x33, INSTR_S_RD },
560 { "stsch", 0x34, INSTR_S_RD },
561 { "tsch", 0x35, INSTR_S_RD },
562 { "tpi", 0x36, INSTR_S_RD },
563 { "sal", 0x37, INSTR_S_00 },
564 { "rsch", 0x38, INSTR_S_00 },
565 { "stcrw", 0x39, INSTR_S_RD },
566 { "stcps", 0x3a, INSTR_S_RD },
567 { "rchp", 0x3b, INSTR_S_00 },
568 { "schm", 0x3c, INSTR_S_00 },
569 { "bakr", 0x40, INSTR_RRE_RR },
570 { "cksm", 0x41, INSTR_RRE_RR },
571 { "sqdr", 0x44, INSTR_RRE_F0 },
572 { "sqer", 0x45, INSTR_RRE_F0 },
573 { "stura", 0x46, INSTR_RRE_RR },
574 { "msta", 0x47, INSTR_RRE_R0 },
575 { "palb", 0x48, INSTR_RRE_00 },
576 { "ereg", 0x49, INSTR_RRE_RR },
577 { "esta", 0x4a, INSTR_RRE_RR },
578 { "lura", 0x4b, INSTR_RRE_RR },
579 { "tar", 0x4c, INSTR_RRE_AR },
580 { "cpya", INSTR_RRE_AA },
581 { "sar", 0x4e, INSTR_RRE_AR },
582 { "ear", 0x4f, INSTR_RRE_RA },
583 { "csp", 0x50, INSTR_RRE_RR },
584 { "msr", 0x52, INSTR_RRE_RR },
585 { "mvpg", 0x54, INSTR_RRE_RR },
586 { "mvst", 0x55, INSTR_RRE_RR },
587 { "cuse", 0x57, INSTR_RRE_RR },
588 { "bsg", 0x58, INSTR_RRE_RR },
589 { "bsa", 0x5a, INSTR_RRE_RR },
590 { "clst", 0x5d, INSTR_RRE_RR },
591 { "srst", 0x5e, INSTR_RRE_RR },
592 { "cmpsc", 0x63, INSTR_RRE_RR },
593 { "cmpsc", 0x63, INSTR_RRE_RR },
594 { "siga", 0x74, INSTR_S_RD },
595 { "xsch", 0x76, INSTR_S_00 },
596 { "rp", 0x77, INSTR_S_RD },
597 { "stcke", 0x78, INSTR_S_RD },
598 { "sacf", 0x79, INSTR_S_RD },
599 { "stsi", 0x7d, INSTR_S_RD },
600 { "srnm", 0x99, INSTR_S_RD },
601 { "stfpc", 0x9c, INSTR_S_RD },
602 { "lfpc", 0x9d, INSTR_S_RD },
603 { "tre", 0xa5, INSTR_RRE_RR },
604 { "cuutf", 0xa6, INSTR_RRE_RR },
605 { "cutfu", 0xa7, INSTR_RRE_RR },
606 { "stfl", 0xb1, INSTR_S_RD },
607 { "trap4", 0xff, INSTR_S_RD },
608 { "", 0, INSTR_INVALID }
609};
610
611static struct insn opcode_b3[] = {
612#ifdef CONFIG_64BIT
613 { "maylr", 0x38, INSTR_RRF_F0FF },
614 { "mylr", 0x39, INSTR_RRF_F0FF },
615 { "mayr", 0x3a, INSTR_RRF_F0FF },
616 { "myr", 0x3b, INSTR_RRF_F0FF },
617 { "mayhr", 0x3c, INSTR_RRF_F0FF },
618 { "myhr", 0x3d, INSTR_RRF_F0FF },
619 { "cegbr", 0xa4, INSTR_RRE_RR },
620 { "cdgbr", 0xa5, INSTR_RRE_RR },
621 { "cxgbr", 0xa6, INSTR_RRE_RR },
622 { "cgebr", 0xa8, INSTR_RRF_U0RF },
623 { "cgdbr", 0xa9, INSTR_RRF_U0RF },
624 { "cgxbr", 0xaa, INSTR_RRF_U0RF },
625 { "cfer", 0xb8, INSTR_RRF_U0RF },
626 { "cfdr", 0xb9, INSTR_RRF_U0RF },
627 { "cfxr", 0xba, INSTR_RRF_U0RF },
628 { "cegr", 0xc4, INSTR_RRE_RR },
629 { "cdgr", 0xc5, INSTR_RRE_RR },
630 { "cxgr", 0xc6, INSTR_RRE_RR },
631 { "cger", 0xc8, INSTR_RRF_U0RF },
632 { "cgdr", 0xc9, INSTR_RRF_U0RF },
633 { "cgxr", 0xca, INSTR_RRF_U0RF },
634#endif
635 { "lpebr", 0x00, INSTR_RRE_FF },
636 { "lnebr", 0x01, INSTR_RRE_FF },
637 { "ltebr", 0x02, INSTR_RRE_FF },
638 { "lcebr", 0x03, INSTR_RRE_FF },
639 { "ldebr", 0x04, INSTR_RRE_FF },
640 { "lxdbr", 0x05, INSTR_RRE_FF },
641 { "lxebr", 0x06, INSTR_RRE_FF },
642 { "mxdbr", 0x07, INSTR_RRE_FF },
643 { "kebr", 0x08, INSTR_RRE_FF },
644 { "cebr", 0x09, INSTR_RRE_FF },
645 { "aebr", 0x0a, INSTR_RRE_FF },
646 { "sebr", 0x0b, INSTR_RRE_FF },
647 { "mdebr", 0x0c, INSTR_RRE_FF },
648 { "debr", 0x0d, INSTR_RRE_FF },
649 { "maebr", 0x0e, INSTR_RRF_F0FF },
650 { "msebr", 0x0f, INSTR_RRF_F0FF },
651 { "lpdbr", 0x10, INSTR_RRE_FF },
652 { "lndbr", 0x11, INSTR_RRE_FF },
653 { "ltdbr", 0x12, INSTR_RRE_FF },
654 { "lcdbr", 0x13, INSTR_RRE_FF },
655 { "sqebr", 0x14, INSTR_RRE_FF },
656 { "sqdbr", 0x15, INSTR_RRE_FF },
657 { "sqxbr", 0x16, INSTR_RRE_FF },
658 { "meebr", 0x17, INSTR_RRE_FF },
659 { "kdbr", 0x18, INSTR_RRE_FF },
660 { "cdbr", 0x19, INSTR_RRE_FF },
661 { "adbr", 0x1a, INSTR_RRE_FF },
662 { "sdbr", 0x1b, INSTR_RRE_FF },
663 { "mdbr", 0x1c, INSTR_RRE_FF },
664 { "ddbr", 0x1d, INSTR_RRE_FF },
665 { "madbr", 0x1e, INSTR_RRF_F0FF },
666 { "msdbr", 0x1f, INSTR_RRF_F0FF },
667 { "lder", 0x24, INSTR_RRE_FF },
668 { "lxdr", 0x25, INSTR_RRE_FF },
669 { "lxer", 0x26, INSTR_RRE_FF },
670 { "maer", 0x2e, INSTR_RRF_F0FF },
671 { "mser", 0x2f, INSTR_RRF_F0FF },
672 { "sqxr", 0x36, INSTR_RRE_FF },
673 { "meer", 0x37, INSTR_RRE_FF },
674 { "madr", 0x3e, INSTR_RRF_F0FF },
675 { "msdr", 0x3f, INSTR_RRF_F0FF },
676 { "lpxbr", 0x40, INSTR_RRE_FF },
677 { "lnxbr", 0x41, INSTR_RRE_FF },
678 { "ltxbr", 0x42, INSTR_RRE_FF },
679 { "lcxbr", 0x43, INSTR_RRE_FF },
680 { "ledbr", 0x44, INSTR_RRE_FF },
681 { "ldxbr", 0x45, INSTR_RRE_FF },
682 { "lexbr", 0x46, INSTR_RRE_FF },
683 { "fixbr", 0x47, INSTR_RRF_U0FF },
684 { "kxbr", 0x48, INSTR_RRE_FF },
685 { "cxbr", 0x49, INSTR_RRE_FF },
686 { "axbr", 0x4a, INSTR_RRE_FF },
687 { "sxbr", 0x4b, INSTR_RRE_FF },
688 { "mxbr", 0x4c, INSTR_RRE_FF },
689 { "dxbr", 0x4d, INSTR_RRE_FF },
690 { "tbedr", 0x50, INSTR_RRF_U0FF },
691 { "tbdr", 0x51, INSTR_RRF_U0FF },
692 { "diebr", 0x53, INSTR_RRF_FUFF },
693 { "fiebr", 0x57, INSTR_RRF_U0FF },
694 { "thder", 0x58, INSTR_RRE_RR },
695 { "thdr", 0x59, INSTR_RRE_RR },
696 { "didbr", 0x5b, INSTR_RRF_FUFF },
697 { "fidbr", 0x5f, INSTR_RRF_U0FF },
698 { "lpxr", 0x60, INSTR_RRE_FF },
699 { "lnxr", 0x61, INSTR_RRE_FF },
700 { "ltxr", 0x62, INSTR_RRE_FF },
701 { "lcxr", 0x63, INSTR_RRE_FF },
702 { "lxr", 0x65, INSTR_RRE_RR },
703 { "lexr", 0x66, INSTR_RRE_FF },
704 { "fixr", 0x67, INSTR_RRF_U0FF },
705 { "cxr", 0x69, INSTR_RRE_FF },
706 { "lzer", 0x74, INSTR_RRE_R0 },
707 { "lzdr", 0x75, INSTR_RRE_R0 },
708 { "lzxr", 0x76, INSTR_RRE_R0 },
709 { "fier", 0x77, INSTR_RRF_U0FF },
710 { "fidr", 0x7f, INSTR_RRF_U0FF },
711 { "sfpc", 0x84, INSTR_RRE_RR_OPT },
712 { "efpc", 0x8c, INSTR_RRE_RR_OPT },
713 { "cefbr", 0x94, INSTR_RRE_RF },
714 { "cdfbr", 0x95, INSTR_RRE_RF },
715 { "cxfbr", 0x96, INSTR_RRE_RF },
716 { "cfebr", 0x98, INSTR_RRF_U0RF },
717 { "cfdbr", 0x99, INSTR_RRF_U0RF },
718 { "cfxbr", 0x9a, INSTR_RRF_U0RF },
719 { "cefr", 0xb4, INSTR_RRE_RF },
720 { "cdfr", 0xb5, INSTR_RRE_RF },
721 { "cxfr", 0xb6, INSTR_RRE_RF },
722 { "", 0, INSTR_INVALID }
723};
724
725static struct insn opcode_b9[] = {
726#ifdef CONFIG_64BIT
727 { "lpgr", 0x00, INSTR_RRE_RR },
728 { "lngr", 0x01, INSTR_RRE_RR },
729 { "ltgr", 0x02, INSTR_RRE_RR },
730 { "lcgr", 0x03, INSTR_RRE_RR },
731 { "lgr", 0x04, INSTR_RRE_RR },
732 { "lurag", 0x05, INSTR_RRE_RR },
733 { "lgbr", 0x06, INSTR_RRE_RR },
734 { "lghr", 0x07, INSTR_RRE_RR },
735 { "agr", 0x08, INSTR_RRE_RR },
736 { "sgr", 0x09, INSTR_RRE_RR },
737 { "algr", 0x0a, INSTR_RRE_RR },
738 { "slgr", 0x0b, INSTR_RRE_RR },
739 { "msgr", 0x0c, INSTR_RRE_RR },
740 { "dsgr", 0x0d, INSTR_RRE_RR },
741 { "eregg", 0x0e, INSTR_RRE_RR },
742 { "lrvgr", 0x0f, INSTR_RRE_RR },
743 { "lpgfr", 0x10, INSTR_RRE_RR },
744 { "lngfr", 0x11, INSTR_RRE_RR },
745 { "ltgfr", 0x12, INSTR_RRE_RR },
746 { "lcgfr", 0x13, INSTR_RRE_RR },
747 { "lgfr", 0x14, INSTR_RRE_RR },
748 { "llgfr", 0x16, INSTR_RRE_RR },
749 { "llgtr", 0x17, INSTR_RRE_RR },
750 { "agfr", 0x18, INSTR_RRE_RR },
751 { "sgfr", 0x19, INSTR_RRE_RR },
752 { "algfr", 0x1a, INSTR_RRE_RR },
753 { "slgfr", 0x1b, INSTR_RRE_RR },
754 { "msgfr", 0x1c, INSTR_RRE_RR },
755 { "dsgfr", 0x1d, INSTR_RRE_RR },
756 { "cgr", 0x20, INSTR_RRE_RR },
757 { "clgr", 0x21, INSTR_RRE_RR },
758 { "sturg", 0x25, INSTR_RRE_RR },
759 { "lbr", 0x26, INSTR_RRE_RR },
760 { "lhr", 0x27, INSTR_RRE_RR },
761 { "cgfr", 0x30, INSTR_RRE_RR },
762 { "clgfr", 0x31, INSTR_RRE_RR },
763 { "bctgr", 0x46, INSTR_RRE_RR },
764 { "ngr", 0x80, INSTR_RRE_RR },
765 { "ogr", 0x81, INSTR_RRE_RR },
766 { "xgr", 0x82, INSTR_RRE_RR },
767 { "flogr", 0x83, INSTR_RRE_RR },
768 { "llgcr", 0x84, INSTR_RRE_RR },
769 { "llghr", 0x85, INSTR_RRE_RR },
770 { "mlgr", 0x86, INSTR_RRE_RR },
771 { "dlgr", 0x87, INSTR_RRE_RR },
772 { "alcgr", 0x88, INSTR_RRE_RR },
773 { "slbgr", 0x89, INSTR_RRE_RR },
774 { "cspg", 0x8a, INSTR_RRE_RR },
775 { "idte", 0x8e, INSTR_RRF_R0RR },
776 { "llcr", 0x94, INSTR_RRE_RR },
777 { "llhr", 0x95, INSTR_RRE_RR },
778 { "esea", 0x9d, INSTR_RRE_R0 },
779 { "lptea", 0xaa, INSTR_RRF_RURR },
780 { "cu14", 0xb0, INSTR_RRF_M0RR },
781 { "cu24", 0xb1, INSTR_RRF_M0RR },
782 { "cu41", 0xb2, INSTR_RRF_M0RR },
783 { "cu42", 0xb3, INSTR_RRF_M0RR },
784#endif
785 { "kmac", 0x1e, INSTR_RRE_RR },
786 { "lrvr", 0x1f, INSTR_RRE_RR },
787 { "km", 0x2e, INSTR_RRE_RR },
788 { "kmc", 0x2f, INSTR_RRE_RR },
789 { "kimd", 0x3e, INSTR_RRE_RR },
790 { "klmd", 0x3f, INSTR_RRE_RR },
791 { "epsw", 0x8d, INSTR_RRE_RR },
792 { "trtt", 0x90, INSTR_RRE_RR },
793 { "trtt", 0x90, INSTR_RRF_M0RR },
794 { "trto", 0x91, INSTR_RRE_RR },
795 { "trto", 0x91, INSTR_RRF_M0RR },
796 { "trot", 0x92, INSTR_RRE_RR },
797 { "trot", 0x92, INSTR_RRF_M0RR },
798 { "troo", 0x93, INSTR_RRE_RR },
799 { "troo", 0x93, INSTR_RRF_M0RR },
800 { "mlr", 0x96, INSTR_RRE_RR },
801 { "dlr", 0x97, INSTR_RRE_RR },
802 { "alcr", 0x98, INSTR_RRE_RR },
803 { "slbr", 0x99, INSTR_RRE_RR },
804 { "", 0, INSTR_INVALID }
805};
806
807static struct insn opcode_c0[] = {
808#ifdef CONFIG_64BIT
809 { "lgfi", 0x01, INSTR_RIL_RI },
810 { "xihf", 0x06, INSTR_RIL_RU },
811 { "xilf", 0x07, INSTR_RIL_RU },
812 { "iihf", 0x08, INSTR_RIL_RU },
813 { "iilf", 0x09, INSTR_RIL_RU },
814 { "nihf", 0x0a, INSTR_RIL_RU },
815 { "nilf", 0x0b, INSTR_RIL_RU },
816 { "oihf", 0x0c, INSTR_RIL_RU },
817 { "oilf", 0x0d, INSTR_RIL_RU },
818 { "llihf", 0x0e, INSTR_RIL_RU },
819 { "llilf", 0x0f, INSTR_RIL_RU },
820#endif
821 { "larl", 0x00, INSTR_RIL_RP },
822 { "brcl", 0x04, INSTR_RIL_UP },
823 { "brasl", 0x05, INSTR_RIL_RP },
824 { "", 0, INSTR_INVALID }
825};
826
827static struct insn opcode_c2[] = {
828#ifdef CONFIG_64BIT
829 { "slgfi", 0x04, INSTR_RIL_RU },
830 { "slfi", 0x05, INSTR_RIL_RU },
831 { "agfi", 0x08, INSTR_RIL_RI },
832 { "afi", 0x09, INSTR_RIL_RI },
833 { "algfi", 0x0a, INSTR_RIL_RU },
834 { "alfi", 0x0b, INSTR_RIL_RU },
835 { "cgfi", 0x0c, INSTR_RIL_RI },
836 { "cfi", 0x0d, INSTR_RIL_RI },
837 { "clgfi", 0x0e, INSTR_RIL_RU },
838 { "clfi", 0x0f, INSTR_RIL_RU },
839#endif
840 { "", 0, INSTR_INVALID }
841};
842
843static struct insn opcode_c8[] = {
844#ifdef CONFIG_64BIT
845 { "mvcos", 0x00, INSTR_SSF_RRDRD },
846#endif
847 { "", 0, INSTR_INVALID }
848};
849
850static struct insn opcode_e3[] = {
851#ifdef CONFIG_64BIT
852 { "ltg", 0x02, INSTR_RXY_RRRD },
853 { "lrag", 0x03, INSTR_RXY_RRRD },
854 { "lg", 0x04, INSTR_RXY_RRRD },
855 { "cvby", 0x06, INSTR_RXY_RRRD },
856 { "ag", 0x08, INSTR_RXY_RRRD },
857 { "sg", 0x09, INSTR_RXY_RRRD },
858 { "alg", 0x0a, INSTR_RXY_RRRD },
859 { "slg", 0x0b, INSTR_RXY_RRRD },
860 { "msg", 0x0c, INSTR_RXY_RRRD },
861 { "dsg", 0x0d, INSTR_RXY_RRRD },
862 { "cvbg", 0x0e, INSTR_RXY_RRRD },
863 { "lrvg", 0x0f, INSTR_RXY_RRRD },
864 { "lt", 0x12, INSTR_RXY_RRRD },
865 { "lray", 0x13, INSTR_RXY_RRRD },
866 { "lgf", 0x14, INSTR_RXY_RRRD },
867 { "lgh", 0x15, INSTR_RXY_RRRD },
868 { "llgf", 0x16, INSTR_RXY_RRRD },
869 { "llgt", 0x17, INSTR_RXY_RRRD },
870 { "agf", 0x18, INSTR_RXY_RRRD },
871 { "sgf", 0x19, INSTR_RXY_RRRD },
872 { "algf", 0x1a, INSTR_RXY_RRRD },
873 { "slgf", 0x1b, INSTR_RXY_RRRD },
874 { "msgf", 0x1c, INSTR_RXY_RRRD },
875 { "dsgf", 0x1d, INSTR_RXY_RRRD },
876 { "cg", 0x20, INSTR_RXY_RRRD },
877 { "clg", 0x21, INSTR_RXY_RRRD },
878 { "stg", 0x24, INSTR_RXY_RRRD },
879 { "cvdy", 0x26, INSTR_RXY_RRRD },
880 { "cvdg", 0x2e, INSTR_RXY_RRRD },
881 { "strvg", 0x2f, INSTR_RXY_RRRD },
882 { "cgf", 0x30, INSTR_RXY_RRRD },
883 { "clgf", 0x31, INSTR_RXY_RRRD },
884 { "strvh", 0x3f, INSTR_RXY_RRRD },
885 { "bctg", 0x46, INSTR_RXY_RRRD },
886 { "sty", 0x50, INSTR_RXY_RRRD },
887 { "msy", 0x51, INSTR_RXY_RRRD },
888 { "ny", 0x54, INSTR_RXY_RRRD },
889 { "cly", 0x55, INSTR_RXY_RRRD },
890 { "oy", 0x56, INSTR_RXY_RRRD },
891 { "xy", 0x57, INSTR_RXY_RRRD },
892 { "ly", 0x58, INSTR_RXY_RRRD },
893 { "cy", 0x59, INSTR_RXY_RRRD },
894 { "ay", 0x5a, INSTR_RXY_RRRD },
895 { "sy", 0x5b, INSTR_RXY_RRRD },
896 { "aly", 0x5e, INSTR_RXY_RRRD },
897 { "sly", 0x5f, INSTR_RXY_RRRD },
898 { "sthy", 0x70, INSTR_RXY_RRRD },
899 { "lay", 0x71, INSTR_RXY_RRRD },
900 { "stcy", 0x72, INSTR_RXY_RRRD },
901 { "icy", 0x73, INSTR_RXY_RRRD },
902 { "lb", 0x76, INSTR_RXY_RRRD },
903 { "lgb", 0x77, INSTR_RXY_RRRD },
904 { "lhy", 0x78, INSTR_RXY_RRRD },
905 { "chy", 0x79, INSTR_RXY_RRRD },
906 { "ahy", 0x7a, INSTR_RXY_RRRD },
907 { "shy", 0x7b, INSTR_RXY_RRRD },
908 { "ng", 0x80, INSTR_RXY_RRRD },
909 { "og", 0x81, INSTR_RXY_RRRD },
910 { "xg", 0x82, INSTR_RXY_RRRD },
911 { "mlg", 0x86, INSTR_RXY_RRRD },
912 { "dlg", 0x87, INSTR_RXY_RRRD },
913 { "alcg", 0x88, INSTR_RXY_RRRD },
914 { "slbg", 0x89, INSTR_RXY_RRRD },
915 { "stpq", 0x8e, INSTR_RXY_RRRD },
916 { "lpq", 0x8f, INSTR_RXY_RRRD },
917 { "llgc", 0x90, INSTR_RXY_RRRD },
918 { "llgh", 0x91, INSTR_RXY_RRRD },
919 { "llc", 0x94, INSTR_RXY_RRRD },
920 { "llh", 0x95, INSTR_RXY_RRRD },
921#endif
922 { "lrv", 0x1e, INSTR_RXY_RRRD },
923 { "lrvh", 0x1f, INSTR_RXY_RRRD },
924 { "strv", 0x3e, INSTR_RXY_RRRD },
925 { "ml", 0x96, INSTR_RXY_RRRD },
926 { "dl", 0x97, INSTR_RXY_RRRD },
927 { "alc", 0x98, INSTR_RXY_RRRD },
928 { "slb", 0x99, INSTR_RXY_RRRD },
929 { "", 0, INSTR_INVALID }
930};
931
932static struct insn opcode_e5[] = {
933#ifdef CONFIG_64BIT
934 { "strag", 0x02, INSTR_SSE_RDRD },
935#endif
936 { "lasp", 0x00, INSTR_SSE_RDRD },
937 { "tprot", 0x01, INSTR_SSE_RDRD },
938 { "mvcsk", 0x0e, INSTR_SSE_RDRD },
939 { "mvcdk", 0x0f, INSTR_SSE_RDRD },
940 { "", 0, INSTR_INVALID }
941};
942
943static struct insn opcode_eb[] = {
944#ifdef CONFIG_64BIT
945 { "lmg", 0x04, INSTR_RSY_RRRD },
946 { "srag", 0x0a, INSTR_RSY_RRRD },
947 { "slag", 0x0b, INSTR_RSY_RRRD },
948 { "srlg", 0x0c, INSTR_RSY_RRRD },
949 { "sllg", 0x0d, INSTR_RSY_RRRD },
950 { "tracg", 0x0f, INSTR_RSY_RRRD },
951 { "csy", 0x14, INSTR_RSY_RRRD },
952 { "rllg", 0x1c, INSTR_RSY_RRRD },
953 { "clmh", 0x20, INSTR_RSY_RURD },
954 { "clmy", 0x21, INSTR_RSY_RURD },
955 { "stmg", 0x24, INSTR_RSY_RRRD },
956 { "stctg", 0x25, INSTR_RSY_CCRD },
957 { "stmh", 0x26, INSTR_RSY_RRRD },
958 { "stcmh", 0x2c, INSTR_RSY_RURD },
959 { "stcmy", 0x2d, INSTR_RSY_RURD },
960 { "lctlg", 0x2f, INSTR_RSY_CCRD },
961 { "csg", 0x30, INSTR_RSY_RRRD },
962 { "cdsy", 0x31, INSTR_RSY_RRRD },
963 { "cdsg", 0x3e, INSTR_RSY_RRRD },
964 { "bxhg", 0x44, INSTR_RSY_RRRD },
965 { "bxleg", 0x45, INSTR_RSY_RRRD },
966 { "tmy", 0x51, INSTR_SIY_URD },
967 { "mviy", 0x52, INSTR_SIY_URD },
968 { "niy", 0x54, INSTR_SIY_URD },
969 { "cliy", 0x55, INSTR_SIY_URD },
970 { "oiy", 0x56, INSTR_SIY_URD },
971 { "xiy", 0x57, INSTR_SIY_URD },
972 { "icmh", 0x80, INSTR_RSE_RURD },
973 { "icmh", 0x80, INSTR_RSY_RURD },
974 { "icmy", 0x81, INSTR_RSY_RURD },
975 { "clclu", 0x8f, INSTR_RSY_RRRD },
976 { "stmy", 0x90, INSTR_RSY_RRRD },
977 { "lmh", 0x96, INSTR_RSY_RRRD },
978 { "lmy", 0x98, INSTR_RSY_RRRD },
979 { "lamy", 0x9a, INSTR_RSY_AARD },
980 { "stamy", 0x9b, INSTR_RSY_AARD },
981#endif
982 { "rll", 0x1d, INSTR_RSY_RRRD },
983 { "mvclu", 0x8e, INSTR_RSY_RRRD },
984 { "tp", 0xc0, INSTR_RSL_R0RD },
985 { "", 0, INSTR_INVALID }
986};
987
988static struct insn opcode_ec[] = {
989#ifdef CONFIG_64BIT
990 { "brxhg", 0x44, INSTR_RIE_RRP },
991 { "brxlg", 0x45, INSTR_RIE_RRP },
992#endif
993 { "", 0, INSTR_INVALID }
994};
995
996static struct insn opcode_ed[] = {
997#ifdef CONFIG_64BIT
998 { "mayl", 0x38, INSTR_RXF_FRRDF },
999 { "myl", 0x39, INSTR_RXF_FRRDF },
1000 { "may", 0x3a, INSTR_RXF_FRRDF },
1001 { "my", 0x3b, INSTR_RXF_FRRDF },
1002 { "mayh", 0x3c, INSTR_RXF_FRRDF },
1003 { "myh", 0x3d, INSTR_RXF_FRRDF },
1004 { "ley", 0x64, INSTR_RXY_FRRD },
1005 { "ldy", 0x65, INSTR_RXY_FRRD },
1006 { "stey", 0x66, INSTR_RXY_FRRD },
1007 { "stdy", 0x67, INSTR_RXY_FRRD },
1008#endif
1009 { "ldeb", 0x04, INSTR_RXE_FRRD },
1010 { "lxdb", 0x05, INSTR_RXE_FRRD },
1011 { "lxeb", 0x06, INSTR_RXE_FRRD },
1012 { "mxdb", 0x07, INSTR_RXE_FRRD },
1013 { "keb", 0x08, INSTR_RXE_FRRD },
1014 { "ceb", 0x09, INSTR_RXE_FRRD },
1015 { "aeb", 0x0a, INSTR_RXE_FRRD },
1016 { "seb", 0x0b, INSTR_RXE_FRRD },
1017 { "mdeb", 0x0c, INSTR_RXE_FRRD },
1018 { "deb", 0x0d, INSTR_RXE_FRRD },
1019 { "maeb", 0x0e, INSTR_RXF_FRRDF },
1020 { "mseb", 0x0f, INSTR_RXF_FRRDF },
1021 { "tceb", 0x10, INSTR_RXE_FRRD },
1022 { "tcdb", 0x11, INSTR_RXE_FRRD },
1023 { "tcxb", 0x12, INSTR_RXE_FRRD },
1024 { "sqeb", 0x14, INSTR_RXE_FRRD },
1025 { "sqdb", 0x15, INSTR_RXE_FRRD },
1026 { "meeb", 0x17, INSTR_RXE_FRRD },
1027 { "kdb", 0x18, INSTR_RXE_FRRD },
1028 { "cdb", 0x19, INSTR_RXE_FRRD },
1029 { "adb", 0x1a, INSTR_RXE_FRRD },
1030 { "sdb", 0x1b, INSTR_RXE_FRRD },
1031 { "mdb", 0x1c, INSTR_RXE_FRRD },
1032 { "ddb", 0x1d, INSTR_RXE_FRRD },
1033 { "madb", 0x1e, INSTR_RXF_FRRDF },
1034 { "msdb", 0x1f, INSTR_RXF_FRRDF },
1035 { "lde", 0x24, INSTR_RXE_FRRD },
1036 { "lxd", 0x25, INSTR_RXE_FRRD },
1037 { "lxe", 0x26, INSTR_RXE_FRRD },
1038 { "mae", 0x2e, INSTR_RXF_FRRDF },
1039 { "mse", 0x2f, INSTR_RXF_FRRDF },
1040 { "sqe", 0x34, INSTR_RXE_FRRD },
1041 { "mee", 0x37, INSTR_RXE_FRRD },
1042 { "mad", 0x3e, INSTR_RXF_FRRDF },
1043 { "msd", 0x3f, INSTR_RXF_FRRDF },
1044 { "", 0, INSTR_INVALID }
1045};
1046
1047/* Extracts an operand value from an instruction. */
1048static unsigned int extract_operand(unsigned char *code,
1049 const struct operand *operand)
1050{
1051 unsigned int val;
1052 int bits;
1053
1054 /* Extract fragments of the operand byte for byte. */
1055 code += operand->shift / 8;
1056 bits = (operand->shift & 7) + operand->bits;
1057 val = 0;
1058 do {
1059 val <<= 8;
1060 val |= (unsigned int) *code++;
1061 bits -= 8;
1062 } while (bits > 0);
1063 val >>= -bits;
1064 val &= ((1U << (operand->bits - 1)) << 1) - 1;
1065
1066 /* Check for special long displacement case. */
1067 if (operand->bits == 20 && operand->shift == 20)
1068 val = (val & 0xff) << 12 | (val & 0xfff00) >> 8;
1069
1070 /* Sign extend value if the operand is signed or pc relative. */
1071 if ((operand->flags & (OPERAND_SIGNED | OPERAND_PCREL)) &&
1072 (val & (1U << (operand->bits - 1))))
1073 val |= (-1U << (operand->bits - 1)) << 1;
1074
1075 /* Double value if the operand is pc relative. */
1076 if (operand->flags & OPERAND_PCREL)
1077 val <<= 1;
1078
1079 /* Length x in an instructions has real length x + 1. */
1080 if (operand->flags & OPERAND_LENGTH)
1081 val++;
1082 return val;
1083}
1084
1085static inline int insn_length(unsigned char code)
1086{
1087 return ((((int) code + 64) >> 7) + 1) << 1;
1088}
1089
1090static struct insn *find_insn(unsigned char *code)
1091{
1092 unsigned char opfrag = code[1];
1093 unsigned char opmask;
1094 struct insn *table;
1095
1096 switch (code[0]) {
1097 case 0x01:
1098 table = opcode_01;
1099 break;
1100 case 0xa5:
1101 table = opcode_a5;
1102 break;
1103 case 0xa7:
1104 table = opcode_a7;
1105 break;
1106 case 0xb2:
1107 table = opcode_b2;
1108 break;
1109 case 0xb3:
1110 table = opcode_b3;
1111 break;
1112 case 0xb9:
1113 table = opcode_b9;
1114 break;
1115 case 0xc0:
1116 table = opcode_c0;
1117 break;
1118 case 0xc2:
1119 table = opcode_c2;
1120 break;
1121 case 0xc8:
1122 table = opcode_c8;
1123 break;
1124 case 0xe3:
1125 table = opcode_e3;
1126 opfrag = code[5];
1127 break;
1128 case 0xe5:
1129 table = opcode_e5;
1130 break;
1131 case 0xeb:
1132 table = opcode_eb;
1133 opfrag = code[5];
1134 break;
1135 case 0xec:
1136 table = opcode_ec;
1137 opfrag = code[5];
1138 break;
1139 case 0xed:
1140 table = opcode_ed;
1141 opfrag = code[5];
1142 break;
1143 default:
1144 table = opcode;
1145 opfrag = code[0];
1146 break;
1147 }
1148 while (table->format != INSTR_INVALID) {
1149 opmask = formats[table->format][0];
1150 if (table->opfrag == (opfrag & opmask))
1151 return table;
1152 table++;
1153 }
1154 return NULL;
1155}
1156
1157static int print_insn(char *buffer, unsigned char *code, unsigned long addr)
1158{
1159 struct insn *insn;
1160 const unsigned char *ops;
1161 const struct operand *operand;
1162 unsigned int value;
1163 char separator;
1164 char *ptr;
1165
1166 ptr = buffer;
1167 insn = find_insn(code);
1168 if (insn) {
1169 ptr += sprintf(ptr, "%.5s\t", insn->name);
1170 /* Extract the operands. */
1171 separator = 0;
1172 for (ops = formats[insn->format] + 1; *ops != 0; ops++) {
1173 operand = operands + *ops;
1174 value = extract_operand(code, operand);
1175 if ((operand->flags & OPERAND_INDEX) && value == 0)
1176 continue;
1177 if ((operand->flags & OPERAND_BASE) &&
1178 value == 0 && separator == '(') {
1179 separator = ',';
1180 continue;
1181 }
1182 if (separator)
1183 ptr += sprintf(ptr, "%c", separator);
1184 if (operand->flags & OPERAND_GPR)
1185 ptr += sprintf(ptr, "%%r%i", value);
1186 else if (operand->flags & OPERAND_FPR)
1187 ptr += sprintf(ptr, "%%f%i", value);
1188 else if (operand->flags & OPERAND_AR)
1189 ptr += sprintf(ptr, "%%a%i", value);
1190 else if (operand->flags & OPERAND_CR)
1191 ptr += sprintf(ptr, "%%c%i", value);
1192 else if (operand->flags & OPERAND_PCREL)
1193 ptr += sprintf(ptr, "%lx", value + addr);
1194 else if (operand->flags & OPERAND_SIGNED)
1195 ptr += sprintf(ptr, "%i", value);
1196 else
1197 ptr += sprintf(ptr, "%u", value);
1198 if (operand->flags & OPERAND_DISP)
1199 separator = '(';
1200 else if (operand->flags & OPERAND_BASE) {
1201 ptr += sprintf(ptr, ")");
1202 separator = ',';
1203 } else
1204 separator = ',';
1205 }
1206 } else
1207 ptr += sprintf(ptr, "unknown");
1208 return (int) (ptr - buffer);
1209}
1210
1211void show_code(struct pt_regs *regs)
1212{
1213 char *mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
1214 unsigned char code[64];
1215 char buffer[64], *ptr;
1216 mm_segment_t old_fs;
1217 unsigned long addr;
1218 int start, end, opsize, hops, i;
1219
1220 /* Get a snapshot of the 64 bytes surrounding the fault address. */
1221 old_fs = get_fs();
1222 set_fs((regs->psw.mask & PSW_MASK_PSTATE) ? USER_DS : KERNEL_DS);
1223 for (start = 32; start && regs->psw.addr >= 34 - start; start -= 2) {
1224 addr = regs->psw.addr - 34 + start;
1225 if (__copy_from_user(code + start - 2,
1226 (char __user *) addr, 2))
1227 break;
1228 }
1229 for (end = 32; end < 64; end += 2) {
1230 addr = regs->psw.addr + end - 32;
1231 if (__copy_from_user(code + end,
1232 (char __user *) addr, 2))
1233 break;
1234 }
1235 set_fs(old_fs);
1236 /* Code snapshot useable ? */
1237 if ((regs->psw.addr & 1) || start >= end) {
1238 printk("%s Code: Bad PSW.\n", mode);
1239 return;
1240 }
1241 /* Find a starting point for the disassembly. */
1242 while (start < 32) {
1243 hops = 0;
1244 for (i = 0, hops = 0; start + i < 32 && hops < 3; hops++) {
1245 if (!find_insn(code + start + i))
1246 break;
1247 i += insn_length(code[start + i]);
1248 }
1249 if (start + i == 32)
1250 /* Looks good, sequence ends at PSW. */
1251 break;
1252 start += 2;
1253 }
1254 /* Decode the instructions. */
1255 ptr = buffer;
1256 ptr += sprintf(ptr, "%s Code:", mode);
1257 hops = 0;
1258 while (start < end && hops < 8) {
1259 *ptr++ = (start == 32) ? '>' : ' ';
1260 addr = regs->psw.addr + start - 32;
1261 ptr += sprintf(ptr, ONELONG, addr);
1262 opsize = insn_length(code[start]);
1263 if (start + opsize >= end)
1264 break;
1265 for (i = 0; i < opsize; i++)
1266 ptr += sprintf(ptr, "%02x", code[start + i]);
1267 *ptr++ = '\t';
1268 if (i < 6)
1269 *ptr++ = '\t';
1270 ptr += print_insn(ptr, code + start, addr);
1271 start += opsize;
1272 printk(buffer);
1273 ptr = buffer;
1274 ptr += sprintf(ptr, "\n ");
1275 hops++;
1276 }
1277 printk("\n");
1278}
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 5e47936573f2..50538e545618 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -253,11 +253,10 @@ static noinline __init void find_memory_chunks(unsigned long memsize)
253 break; 253 break;
254#endif 254#endif
255 /* 255 /*
256 * Finish memory detection at the first hole, unless 256 * Finish memory detection at the first hole
257 * - we reached the hsa -> skip it. 257 * if storage size is unknown.
258 * - we know there must be more.
259 */ 258 */
260 if (cc == -1UL && !memsize && old_addr != ADDR2G) 259 if (cc == -1UL && !memsize)
261 break; 260 break;
262 if (memsize && addr >= memsize) 261 if (memsize && addr >= memsize)
263 break; 262 break;
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index dddc3de30401..c8a2212014e0 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -249,8 +249,6 @@ sysc_do_restart:
249 bnz BASED(sysc_tracesys) 249 bnz BASED(sysc_tracesys)
250 basr %r14,%r8 # call sys_xxxx 250 basr %r14,%r8 # call sys_xxxx
251 st %r2,SP_R2(%r15) # store return value (change R2 on stack) 251 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
252 # ATTENTION: check sys_execve_glue before
253 # changing anything here !!
254 252
255sysc_return: 253sysc_return:
256 tm SP_PSW+1(%r15),0x01 # returning to user ? 254 tm SP_PSW+1(%r15),0x01 # returning to user ?
@@ -381,50 +379,37 @@ ret_from_fork:
381 b BASED(sysc_return) 379 b BASED(sysc_return)
382 380
383# 381#
384# clone, fork, vfork, exec and sigreturn need glue, 382# kernel_execve function needs to deal with pt_regs that is not
385# because they all expect pt_regs as parameter, 383# at the usual place
386# but are called with different parameter.
387# return-address is set up above
388# 384#
389sys_clone_glue: 385 .globl kernel_execve
390 la %r2,SP_PTREGS(%r15) # load pt_regs 386kernel_execve:
391 l %r1,BASED(.Lclone) 387 stm %r12,%r15,48(%r15)
392 br %r1 # branch to sys_clone 388 lr %r14,%r15
393 389 l %r13,__LC_SVC_NEW_PSW+4
394sys_fork_glue: 390 s %r15,BASED(.Lc_spsize)
395 la %r2,SP_PTREGS(%r15) # load pt_regs 391 st %r14,__SF_BACKCHAIN(%r15)
396 l %r1,BASED(.Lfork) 392 la %r12,SP_PTREGS(%r15)
397 br %r1 # branch to sys_fork 393 xc 0(__PT_SIZE,%r12),0(%r12)
398 394 l %r1,BASED(.Ldo_execve)
399sys_vfork_glue: 395 lr %r5,%r12
400 la %r2,SP_PTREGS(%r15) # load pt_regs 396 basr %r14,%r1
401 l %r1,BASED(.Lvfork) 397 ltr %r2,%r2
402 br %r1 # branch to sys_vfork 398 be BASED(0f)
403 399 a %r15,BASED(.Lc_spsize)
404sys_execve_glue: 400 lm %r12,%r15,48(%r15)
405 la %r2,SP_PTREGS(%r15) # load pt_regs 401 br %r14
406 l %r1,BASED(.Lexecve) 402 # execve succeeded.
407 lr %r12,%r14 # save return address 4030: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
408 basr %r14,%r1 # call sys_execve 404 l %r15,__LC_KERNEL_STACK # load ksp
409 ltr %r2,%r2 # check if execve failed 405 s %r15,BASED(.Lc_spsize) # make room for registers & psw
410 bnz 0(%r12) # it did fail -> store result in gpr2 406 l %r9,__LC_THREAD_INFO
411 b 4(%r12) # SKIP ST 2,SP_R2(15) after BASR 14,8 407 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
412 # in system_call/sysc_tracesys 408 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
413 409 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
414sys_sigreturn_glue: 410 l %r1,BASED(.Lexecve_tail)
415 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter 411 basr %r14,%r1
416 l %r1,BASED(.Lsigreturn) 412 b BASED(sysc_return)
417 br %r1 # branch to sys_sigreturn
418
419sys_rt_sigreturn_glue:
420 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
421 l %r1,BASED(.Lrt_sigreturn)
422 br %r1 # branch to sys_sigreturn
423
424sys_sigaltstack_glue:
425 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
426 l %r1,BASED(.Lsigaltstack)
427 br %r1 # branch to sys_sigreturn
428 413
429/* 414/*
430 * Program check handler routine 415 * Program check handler routine
@@ -1031,19 +1016,11 @@ cleanup_io_leave_insn:
1031.Ldo_extint: .long do_extint 1016.Ldo_extint: .long do_extint
1032.Ldo_signal: .long do_signal 1017.Ldo_signal: .long do_signal
1033.Lhandle_per: .long do_single_step 1018.Lhandle_per: .long do_single_step
1019.Ldo_execve: .long do_execve
1020.Lexecve_tail: .long execve_tail
1034.Ljump_table: .long pgm_check_table 1021.Ljump_table: .long pgm_check_table
1035.Lschedule: .long schedule 1022.Lschedule: .long schedule
1036.Lclone: .long sys_clone
1037.Lexecve: .long sys_execve
1038.Lfork: .long sys_fork
1039.Lrt_sigreturn: .long sys_rt_sigreturn
1040.Lrt_sigsuspend:
1041 .long sys_rt_sigsuspend
1042.Lsigreturn: .long sys_sigreturn
1043.Lsigsuspend: .long sys_sigsuspend
1044.Lsigaltstack: .long sys_sigaltstack
1045.Ltrace: .long syscall_trace 1023.Ltrace: .long syscall_trace
1046.Lvfork: .long sys_vfork
1047.Lschedtail: .long schedule_tail 1024.Lschedtail: .long schedule_tail
1048.Lsysc_table: .long sys_call_table 1025.Lsysc_table: .long sys_call_table
1049#ifdef CONFIG_TRACE_IRQFLAGS 1026#ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 0f758c329a5d..93745fd8f555 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -244,8 +244,6 @@ sysc_noemu:
244 jnz sysc_tracesys 244 jnz sysc_tracesys
245 basr %r14,%r8 # call sys_xxxx 245 basr %r14,%r8 # call sys_xxxx
246 stg %r2,SP_R2(%r15) # store return value (change R2 on stack) 246 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
247 # ATTENTION: check sys_execve_glue before
248 # changing anything here !!
249 247
250sysc_return: 248sysc_return:
251 tm SP_PSW+1(%r15),0x01 # returning to user ? 249 tm SP_PSW+1(%r15),0x01 # returning to user ?
@@ -371,77 +369,35 @@ ret_from_fork:
371 j sysc_return 369 j sysc_return
372 370
373# 371#
374# clone, fork, vfork, exec and sigreturn need glue, 372# kernel_execve function needs to deal with pt_regs that is not
375# because they all expect pt_regs as parameter, 373# at the usual place
376# but are called with different parameter.
377# return-address is set up above
378# 374#
379sys_clone_glue: 375 .globl kernel_execve
380 la %r2,SP_PTREGS(%r15) # load pt_regs 376kernel_execve:
381 jg sys_clone # branch to sys_clone 377 stmg %r12,%r15,96(%r15)
382 378 lgr %r14,%r15
383#ifdef CONFIG_COMPAT 379 aghi %r15,-SP_SIZE
384sys32_clone_glue: 380 stg %r14,__SF_BACKCHAIN(%r15)
385 la %r2,SP_PTREGS(%r15) # load pt_regs 381 la %r12,SP_PTREGS(%r15)
386 jg sys32_clone # branch to sys32_clone 382 xc 0(__PT_SIZE,%r12),0(%r12)
387#endif 383 lgr %r5,%r12
388 384 brasl %r14,do_execve
389sys_fork_glue: 385 ltgfr %r2,%r2
390 la %r2,SP_PTREGS(%r15) # load pt_regs 386 je 0f
391 jg sys_fork # branch to sys_fork 387 aghi %r15,SP_SIZE
392 388 lmg %r12,%r15,96(%r15)
393sys_vfork_glue: 389 br %r14
394 la %r2,SP_PTREGS(%r15) # load pt_regs 390 # execve succeeded.
395 jg sys_vfork # branch to sys_vfork 3910: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
396 392 lg %r15,__LC_KERNEL_STACK # load ksp
397sys_execve_glue: 393 aghi %r15,-SP_SIZE # make room for registers & psw
398 la %r2,SP_PTREGS(%r15) # load pt_regs 394 lg %r13,__LC_SVC_NEW_PSW+8
399 lgr %r12,%r14 # save return address 395 lg %r9,__LC_THREAD_INFO
400 brasl %r14,sys_execve # call sys_execve 396 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
401 ltgr %r2,%r2 # check if execve failed 397 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
402 bnz 0(%r12) # it did fail -> store result in gpr2 398 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
403 b 6(%r12) # SKIP STG 2,SP_R2(15) in 399 brasl %r14,execve_tail
404 # system_call/sysc_tracesys 400 j sysc_return
405#ifdef CONFIG_COMPAT
406sys32_execve_glue:
407 la %r2,SP_PTREGS(%r15) # load pt_regs
408 lgr %r12,%r14 # save return address
409 brasl %r14,sys32_execve # call sys32_execve
410 ltgr %r2,%r2 # check if execve failed
411 bnz 0(%r12) # it did fail -> store result in gpr2
412 b 6(%r12) # SKIP STG 2,SP_R2(15) in
413 # system_call/sysc_tracesys
414#endif
415
416sys_sigreturn_glue:
417 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
418 jg sys_sigreturn # branch to sys_sigreturn
419
420#ifdef CONFIG_COMPAT
421sys32_sigreturn_glue:
422 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
423 jg sys32_sigreturn # branch to sys32_sigreturn
424#endif
425
426sys_rt_sigreturn_glue:
427 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
428 jg sys_rt_sigreturn # branch to sys_sigreturn
429
430#ifdef CONFIG_COMPAT
431sys32_rt_sigreturn_glue:
432 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
433 jg sys32_rt_sigreturn # branch to sys32_sigreturn
434#endif
435
436sys_sigaltstack_glue:
437 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
438 jg sys_sigaltstack # branch to sys_sigreturn
439
440#ifdef CONFIG_COMPAT
441sys32_sigaltstack_glue:
442 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
443 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
444#endif
445 401
446/* 402/*
447 * Program check handler routine 403 * Program check handler routine
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 37010709fe68..a87b1976d409 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -39,7 +39,69 @@ startup_continue:
39 basr %r13,0 # get base 39 basr %r13,0 # get base
40.LPG1: sll %r13,1 # remove high order bit 40.LPG1: sll %r13,1 # remove high order bit
41 srl %r13,1 41 srl %r13,1
42 lhi %r1,1 # mode 1 = esame 42
43#ifdef CONFIG_ZFCPDUMP
44
45 # check if we have been ipled using zfcp dump:
46
47 tm 0xb9,0x01 # test if subchannel is enabled
48 jno .nodump # subchannel disabled
49 l %r1,0xb8
50 la %r5,.Lipl_schib-.LPG1(%r13)
51 stsch 0(%r5) # get schib of subchannel
52 jne .nodump # schib not available
53 tm 5(%r5),0x01 # devno valid?
54 jno .nodump
55 tm 4(%r5),0x80 # qdio capable device?
56 jno .nodump
57 l %r2,20(%r0) # address of ipl parameter block
58 lhi %r3,0
59 ic %r3,0x148(%r2) # get opt field
60 chi %r3,0x20 # load with dump?
61 jne .nodump
62
63 # store all prefix registers in case of load with dump:
64
65 la %r7,0 # base register for 0 page
66 la %r8,0 # first cpu
67 l %r11,.Lpref_arr_ptr-.LPG1(%r13) # address of prefix array
68 ahi %r11,4 # skip boot cpu
69 lr %r12,%r11
70 ahi %r12,(CONFIG_NR_CPUS*4) # end of prefix array
71 stap .Lcurrent_cpu+2-.LPG1(%r13) # store current cpu addr
721:
73 cl %r8,.Lcurrent_cpu-.LPG1(%r13) # is ipl cpu ?
74 je 4f # if yes get next cpu
752:
76 lr %r9,%r7
77 sigp %r9,%r8,0x9 # stop & store status of cpu
78 brc 8,3f # accepted
79 brc 4,4f # status stored: next cpu
80 brc 2,2b # busy: try again
81 brc 1,4f # not op: next cpu
823:
83 mvc 0(4,%r11),264(%r7) # copy prefix register to prefix array
84 ahi %r11,4 # next element in prefix array
85 clr %r11,%r12
86 je 5f # no more space in prefix array
874:
88 ahi %r8,1 # next cpu (r8 += 1)
89 cl %r8,.Llast_cpu-.LPG1(%r13) # is last possible cpu ?
90 jl 1b # jump if not last cpu
915:
92 lhi %r1,2 # mode 2 = esame (dump)
93 j 6f
94 .align 4
95.Lipl_schib:
96 .rept 13
97 .long 0
98 .endr
99.nodump:
100 lhi %r1,1 # mode 1 = esame (normal ipl)
1016:
102#else
103 lhi %r1,1 # mode 1 = esame (normal ipl)
104#endif /* CONFIG_ZFCPDUMP */
43 mvi __LC_AR_MODE_ID,1 # set esame flag 105 mvi __LC_AR_MODE_ID,1 # set esame flag
44 slr %r0,%r0 # set cpuid to zero 106 slr %r0,%r0 # set cpuid to zero
45 sigp %r1,%r0,0x12 # switch to esame mode 107 sigp %r1,%r0,0x12 # switch to esame mode
@@ -149,6 +211,14 @@ startup_continue:
149.L4malign:.quad 0xffffffffffc00000 211.L4malign:.quad 0xffffffffffc00000
150.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 212.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
151.Lnop: .long 0x07000700 213.Lnop: .long 0x07000700
214#ifdef CONFIG_ZFCPDUMP
215.Lcurrent_cpu:
216 .long 0x0
217.Llast_cpu:
218 .long 0x0000ffff
219.Lpref_arr_ptr:
220 .long zfcpdump_prefix_array
221#endif /* CONFIG_ZFCPDUMP */
152.Lparmaddr: 222.Lparmaddr:
153 .quad PARMAREA 223 .quad PARMAREA
154 .align 64 224 .align 64
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index f731185bf2bd..06833ac2b115 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -29,36 +29,21 @@
29#define SCCB_LOADPARM (&s390_readinfo_sccb.loadparm) 29#define SCCB_LOADPARM (&s390_readinfo_sccb.loadparm)
30#define SCCB_FLAG (s390_readinfo_sccb.flags) 30#define SCCB_FLAG (s390_readinfo_sccb.flags)
31 31
32enum ipl_type { 32#define IPL_UNKNOWN_STR "unknown"
33 IPL_TYPE_NONE = 1, 33#define IPL_CCW_STR "ccw"
34 IPL_TYPE_UNKNOWN = 2, 34#define IPL_FCP_STR "fcp"
35 IPL_TYPE_CCW = 4, 35#define IPL_FCP_DUMP_STR "fcp_dump"
36 IPL_TYPE_FCP = 8, 36#define IPL_NSS_STR "nss"
37 IPL_TYPE_NSS = 16,
38};
39
40#define IPL_NONE_STR "none"
41#define IPL_UNKNOWN_STR "unknown"
42#define IPL_CCW_STR "ccw"
43#define IPL_FCP_STR "fcp"
44#define IPL_NSS_STR "nss"
45
46/*
47 * Must be in data section since the bss section
48 * is not cleared when these are accessed.
49 */
50u16 ipl_devno __attribute__((__section__(".data"))) = 0;
51u32 ipl_flags __attribute__((__section__(".data"))) = 0;
52 37
53static char *ipl_type_str(enum ipl_type type) 38static char *ipl_type_str(enum ipl_type type)
54{ 39{
55 switch (type) { 40 switch (type) {
56 case IPL_TYPE_NONE:
57 return IPL_NONE_STR;
58 case IPL_TYPE_CCW: 41 case IPL_TYPE_CCW:
59 return IPL_CCW_STR; 42 return IPL_CCW_STR;
60 case IPL_TYPE_FCP: 43 case IPL_TYPE_FCP:
61 return IPL_FCP_STR; 44 return IPL_FCP_STR;
45 case IPL_TYPE_FCP_DUMP:
46 return IPL_FCP_DUMP_STR;
62 case IPL_TYPE_NSS: 47 case IPL_TYPE_NSS:
63 return IPL_NSS_STR; 48 return IPL_NSS_STR;
64 case IPL_TYPE_UNKNOWN: 49 case IPL_TYPE_UNKNOWN:
@@ -67,15 +52,55 @@ static char *ipl_type_str(enum ipl_type type)
67 } 52 }
68} 53}
69 54
55enum dump_type {
56 DUMP_TYPE_NONE = 1,
57 DUMP_TYPE_CCW = 2,
58 DUMP_TYPE_FCP = 4,
59};
60
61#define DUMP_NONE_STR "none"
62#define DUMP_CCW_STR "ccw"
63#define DUMP_FCP_STR "fcp"
64
65static char *dump_type_str(enum dump_type type)
66{
67 switch (type) {
68 case DUMP_TYPE_NONE:
69 return DUMP_NONE_STR;
70 case DUMP_TYPE_CCW:
71 return DUMP_CCW_STR;
72 case DUMP_TYPE_FCP:
73 return DUMP_FCP_STR;
74 default:
75 return NULL;
76 }
77}
78
79/*
80 * Must be in data section since the bss section
81 * is not cleared when these are accessed.
82 */
83static u16 ipl_devno __attribute__((__section__(".data"))) = 0;
84u32 ipl_flags __attribute__((__section__(".data"))) = 0;
85
70enum ipl_method { 86enum ipl_method {
71 IPL_METHOD_NONE, 87 REIPL_METHOD_CCW_CIO,
72 IPL_METHOD_CCW_CIO, 88 REIPL_METHOD_CCW_DIAG,
73 IPL_METHOD_CCW_DIAG, 89 REIPL_METHOD_CCW_VM,
74 IPL_METHOD_CCW_VM, 90 REIPL_METHOD_FCP_RO_DIAG,
75 IPL_METHOD_FCP_RO_DIAG, 91 REIPL_METHOD_FCP_RW_DIAG,
76 IPL_METHOD_FCP_RW_DIAG, 92 REIPL_METHOD_FCP_RO_VM,
77 IPL_METHOD_FCP_RO_VM, 93 REIPL_METHOD_FCP_DUMP,
78 IPL_METHOD_NSS, 94 REIPL_METHOD_NSS,
95 REIPL_METHOD_DEFAULT,
96};
97
98enum dump_method {
99 DUMP_METHOD_NONE,
100 DUMP_METHOD_CCW_CIO,
101 DUMP_METHOD_CCW_DIAG,
102 DUMP_METHOD_CCW_VM,
103 DUMP_METHOD_FCP_DIAG,
79}; 104};
80 105
81enum shutdown_action { 106enum shutdown_action {
@@ -107,15 +132,15 @@ static int diag308_set_works = 0;
107static int reipl_capabilities = IPL_TYPE_UNKNOWN; 132static int reipl_capabilities = IPL_TYPE_UNKNOWN;
108 133
109static enum ipl_type reipl_type = IPL_TYPE_UNKNOWN; 134static enum ipl_type reipl_type = IPL_TYPE_UNKNOWN;
110static enum ipl_method reipl_method = IPL_METHOD_NONE; 135static enum ipl_method reipl_method = REIPL_METHOD_DEFAULT;
111static struct ipl_parameter_block *reipl_block_fcp; 136static struct ipl_parameter_block *reipl_block_fcp;
112static struct ipl_parameter_block *reipl_block_ccw; 137static struct ipl_parameter_block *reipl_block_ccw;
113 138
114static char reipl_nss_name[NSS_NAME_SIZE + 1]; 139static char reipl_nss_name[NSS_NAME_SIZE + 1];
115 140
116static int dump_capabilities = IPL_TYPE_NONE; 141static int dump_capabilities = DUMP_TYPE_NONE;
117static enum ipl_type dump_type = IPL_TYPE_NONE; 142static enum dump_type dump_type = DUMP_TYPE_NONE;
118static enum ipl_method dump_method = IPL_METHOD_NONE; 143static enum dump_method dump_method = DUMP_METHOD_NONE;
119static struct ipl_parameter_block *dump_block_fcp; 144static struct ipl_parameter_block *dump_block_fcp;
120static struct ipl_parameter_block *dump_block_ccw; 145static struct ipl_parameter_block *dump_block_ccw;
121 146
@@ -134,6 +159,7 @@ int diag308(unsigned long subcode, void *addr)
134 : "d" (subcode) : "cc", "memory"); 159 : "d" (subcode) : "cc", "memory");
135 return _rc; 160 return _rc;
136} 161}
162EXPORT_SYMBOL_GPL(diag308);
137 163
138/* SYSFS */ 164/* SYSFS */
139 165
@@ -197,7 +223,7 @@ static void make_attrs_ro(struct attribute **attrs)
197 * ipl section 223 * ipl section
198 */ 224 */
199 225
200static enum ipl_type ipl_get_type(void) 226static __init enum ipl_type get_ipl_type(void)
201{ 227{
202 struct ipl_parameter_block *ipl = IPL_PARMBLOCK_START; 228 struct ipl_parameter_block *ipl = IPL_PARMBLOCK_START;
203 229
@@ -211,12 +237,44 @@ static enum ipl_type ipl_get_type(void)
211 return IPL_TYPE_UNKNOWN; 237 return IPL_TYPE_UNKNOWN;
212 if (ipl->hdr.pbt != DIAG308_IPL_TYPE_FCP) 238 if (ipl->hdr.pbt != DIAG308_IPL_TYPE_FCP)
213 return IPL_TYPE_UNKNOWN; 239 return IPL_TYPE_UNKNOWN;
240 if (ipl->ipl_info.fcp.opt == DIAG308_IPL_OPT_DUMP)
241 return IPL_TYPE_FCP_DUMP;
214 return IPL_TYPE_FCP; 242 return IPL_TYPE_FCP;
215} 243}
216 244
245void __init setup_ipl_info(void)
246{
247 ipl_info.type = get_ipl_type();
248 switch (ipl_info.type) {
249 case IPL_TYPE_CCW:
250 ipl_info.data.ccw.dev_id.devno = ipl_devno;
251 ipl_info.data.ccw.dev_id.ssid = 0;
252 break;
253 case IPL_TYPE_FCP:
254 case IPL_TYPE_FCP_DUMP:
255 ipl_info.data.fcp.dev_id.devno =
256 IPL_PARMBLOCK_START->ipl_info.fcp.devno;
257 ipl_info.data.fcp.dev_id.ssid = 0;
258 ipl_info.data.fcp.wwpn = IPL_PARMBLOCK_START->ipl_info.fcp.wwpn;
259 ipl_info.data.fcp.lun = IPL_PARMBLOCK_START->ipl_info.fcp.lun;
260 break;
261 case IPL_TYPE_NSS:
262 strncpy(ipl_info.data.nss.name, kernel_nss_name,
263 sizeof(ipl_info.data.nss.name));
264 break;
265 case IPL_TYPE_UNKNOWN:
266 default:
267 /* We have no info to copy */
268 break;
269 }
270}
271
272struct ipl_info ipl_info;
273EXPORT_SYMBOL_GPL(ipl_info);
274
217static ssize_t ipl_type_show(struct subsystem *subsys, char *page) 275static ssize_t ipl_type_show(struct subsystem *subsys, char *page)
218{ 276{
219 return sprintf(page, "%s\n", ipl_type_str(ipl_get_type())); 277 return sprintf(page, "%s\n", ipl_type_str(ipl_info.type));
220} 278}
221 279
222static struct subsys_attribute sys_ipl_type_attr = __ATTR_RO(ipl_type); 280static struct subsys_attribute sys_ipl_type_attr = __ATTR_RO(ipl_type);
@@ -225,10 +283,11 @@ static ssize_t sys_ipl_device_show(struct subsystem *subsys, char *page)
225{ 283{
226 struct ipl_parameter_block *ipl = IPL_PARMBLOCK_START; 284 struct ipl_parameter_block *ipl = IPL_PARMBLOCK_START;
227 285
228 switch (ipl_get_type()) { 286 switch (ipl_info.type) {
229 case IPL_TYPE_CCW: 287 case IPL_TYPE_CCW:
230 return sprintf(page, "0.0.%04x\n", ipl_devno); 288 return sprintf(page, "0.0.%04x\n", ipl_devno);
231 case IPL_TYPE_FCP: 289 case IPL_TYPE_FCP:
290 case IPL_TYPE_FCP_DUMP:
232 return sprintf(page, "0.0.%04x\n", ipl->ipl_info.fcp.devno); 291 return sprintf(page, "0.0.%04x\n", ipl->ipl_info.fcp.devno);
233 default: 292 default:
234 return 0; 293 return 0;
@@ -485,23 +544,29 @@ static int reipl_set_type(enum ipl_type type)
485 switch(type) { 544 switch(type) {
486 case IPL_TYPE_CCW: 545 case IPL_TYPE_CCW:
487 if (MACHINE_IS_VM) 546 if (MACHINE_IS_VM)
488 reipl_method = IPL_METHOD_CCW_VM; 547 reipl_method = REIPL_METHOD_CCW_VM;
489 else 548 else
490 reipl_method = IPL_METHOD_CCW_CIO; 549 reipl_method = REIPL_METHOD_CCW_CIO;
491 break; 550 break;
492 case IPL_TYPE_FCP: 551 case IPL_TYPE_FCP:
493 if (diag308_set_works) 552 if (diag308_set_works)
494 reipl_method = IPL_METHOD_FCP_RW_DIAG; 553 reipl_method = REIPL_METHOD_FCP_RW_DIAG;
495 else if (MACHINE_IS_VM) 554 else if (MACHINE_IS_VM)
496 reipl_method = IPL_METHOD_FCP_RO_VM; 555 reipl_method = REIPL_METHOD_FCP_RO_VM;
497 else 556 else
498 reipl_method = IPL_METHOD_FCP_RO_DIAG; 557 reipl_method = REIPL_METHOD_FCP_RO_DIAG;
558 break;
559 case IPL_TYPE_FCP_DUMP:
560 reipl_method = REIPL_METHOD_FCP_DUMP;
499 break; 561 break;
500 case IPL_TYPE_NSS: 562 case IPL_TYPE_NSS:
501 reipl_method = IPL_METHOD_NSS; 563 reipl_method = REIPL_METHOD_NSS;
564 break;
565 case IPL_TYPE_UNKNOWN:
566 reipl_method = REIPL_METHOD_DEFAULT;
502 break; 567 break;
503 default: 568 default:
504 reipl_method = IPL_METHOD_NONE; 569 BUG();
505 } 570 }
506 reipl_type = type; 571 reipl_type = type;
507 return 0; 572 return 0;
@@ -579,22 +644,22 @@ static struct attribute_group dump_ccw_attr_group = {
579 644
580/* dump type */ 645/* dump type */
581 646
582static int dump_set_type(enum ipl_type type) 647static int dump_set_type(enum dump_type type)
583{ 648{
584 if (!(dump_capabilities & type)) 649 if (!(dump_capabilities & type))
585 return -EINVAL; 650 return -EINVAL;
586 switch(type) { 651 switch(type) {
587 case IPL_TYPE_CCW: 652 case DUMP_TYPE_CCW:
588 if (MACHINE_IS_VM) 653 if (MACHINE_IS_VM)
589 dump_method = IPL_METHOD_CCW_VM; 654 dump_method = DUMP_METHOD_CCW_VM;
590 else 655 else
591 dump_method = IPL_METHOD_CCW_CIO; 656 dump_method = DUMP_METHOD_CCW_CIO;
592 break; 657 break;
593 case IPL_TYPE_FCP: 658 case DUMP_TYPE_FCP:
594 dump_method = IPL_METHOD_FCP_RW_DIAG; 659 dump_method = DUMP_METHOD_FCP_DIAG;
595 break; 660 break;
596 default: 661 default:
597 dump_method = IPL_METHOD_NONE; 662 dump_method = DUMP_METHOD_NONE;
598 } 663 }
599 dump_type = type; 664 dump_type = type;
600 return 0; 665 return 0;
@@ -602,7 +667,7 @@ static int dump_set_type(enum ipl_type type)
602 667
603static ssize_t dump_type_show(struct subsystem *subsys, char *page) 668static ssize_t dump_type_show(struct subsystem *subsys, char *page)
604{ 669{
605 return sprintf(page, "%s\n", ipl_type_str(dump_type)); 670 return sprintf(page, "%s\n", dump_type_str(dump_type));
606} 671}
607 672
608static ssize_t dump_type_store(struct subsystem *subsys, const char *buf, 673static ssize_t dump_type_store(struct subsystem *subsys, const char *buf,
@@ -610,12 +675,12 @@ static ssize_t dump_type_store(struct subsystem *subsys, const char *buf,
610{ 675{
611 int rc = -EINVAL; 676 int rc = -EINVAL;
612 677
613 if (strncmp(buf, IPL_NONE_STR, strlen(IPL_NONE_STR)) == 0) 678 if (strncmp(buf, DUMP_NONE_STR, strlen(DUMP_NONE_STR)) == 0)
614 rc = dump_set_type(IPL_TYPE_NONE); 679 rc = dump_set_type(DUMP_TYPE_NONE);
615 else if (strncmp(buf, IPL_CCW_STR, strlen(IPL_CCW_STR)) == 0) 680 else if (strncmp(buf, DUMP_CCW_STR, strlen(DUMP_CCW_STR)) == 0)
616 rc = dump_set_type(IPL_TYPE_CCW); 681 rc = dump_set_type(DUMP_TYPE_CCW);
617 else if (strncmp(buf, IPL_FCP_STR, strlen(IPL_FCP_STR)) == 0) 682 else if (strncmp(buf, DUMP_FCP_STR, strlen(DUMP_FCP_STR)) == 0)
618 rc = dump_set_type(IPL_TYPE_FCP); 683 rc = dump_set_type(DUMP_TYPE_FCP);
619 return (rc != 0) ? rc : len; 684 return (rc != 0) ? rc : len;
620} 685}
621 686
@@ -664,14 +729,14 @@ void do_reipl(void)
664 char loadparm[LOADPARM_LEN + 1]; 729 char loadparm[LOADPARM_LEN + 1];
665 730
666 switch (reipl_method) { 731 switch (reipl_method) {
667 case IPL_METHOD_CCW_CIO: 732 case REIPL_METHOD_CCW_CIO:
668 devid.devno = reipl_block_ccw->ipl_info.ccw.devno; 733 devid.devno = reipl_block_ccw->ipl_info.ccw.devno;
669 if (ipl_get_type() == IPL_TYPE_CCW && devid.devno == ipl_devno) 734 if (ipl_info.type == IPL_TYPE_CCW && devid.devno == ipl_devno)
670 diag308(DIAG308_IPL, NULL); 735 diag308(DIAG308_IPL, NULL);
671 devid.ssid = 0; 736 devid.ssid = 0;
672 reipl_ccw_dev(&devid); 737 reipl_ccw_dev(&devid);
673 break; 738 break;
674 case IPL_METHOD_CCW_VM: 739 case REIPL_METHOD_CCW_VM:
675 reipl_get_ascii_loadparm(loadparm); 740 reipl_get_ascii_loadparm(loadparm);
676 if (strlen(loadparm) == 0) 741 if (strlen(loadparm) == 0)
677 sprintf(buf, "IPL %X", 742 sprintf(buf, "IPL %X",
@@ -681,30 +746,32 @@ void do_reipl(void)
681 reipl_block_ccw->ipl_info.ccw.devno, loadparm); 746 reipl_block_ccw->ipl_info.ccw.devno, loadparm);
682 __cpcmd(buf, NULL, 0, NULL); 747 __cpcmd(buf, NULL, 0, NULL);
683 break; 748 break;
684 case IPL_METHOD_CCW_DIAG: 749 case REIPL_METHOD_CCW_DIAG:
685 diag308(DIAG308_SET, reipl_block_ccw); 750 diag308(DIAG308_SET, reipl_block_ccw);
686 diag308(DIAG308_IPL, NULL); 751 diag308(DIAG308_IPL, NULL);
687 break; 752 break;
688 case IPL_METHOD_FCP_RW_DIAG: 753 case REIPL_METHOD_FCP_RW_DIAG:
689 diag308(DIAG308_SET, reipl_block_fcp); 754 diag308(DIAG308_SET, reipl_block_fcp);
690 diag308(DIAG308_IPL, NULL); 755 diag308(DIAG308_IPL, NULL);
691 break; 756 break;
692 case IPL_METHOD_FCP_RO_DIAG: 757 case REIPL_METHOD_FCP_RO_DIAG:
693 diag308(DIAG308_IPL, NULL); 758 diag308(DIAG308_IPL, NULL);
694 break; 759 break;
695 case IPL_METHOD_FCP_RO_VM: 760 case REIPL_METHOD_FCP_RO_VM:
696 __cpcmd("IPL", NULL, 0, NULL); 761 __cpcmd("IPL", NULL, 0, NULL);
697 break; 762 break;
698 case IPL_METHOD_NSS: 763 case REIPL_METHOD_NSS:
699 sprintf(buf, "IPL %s", reipl_nss_name); 764 sprintf(buf, "IPL %s", reipl_nss_name);
700 __cpcmd(buf, NULL, 0, NULL); 765 __cpcmd(buf, NULL, 0, NULL);
701 break; 766 break;
702 case IPL_METHOD_NONE: 767 case REIPL_METHOD_DEFAULT:
703 default:
704 if (MACHINE_IS_VM) 768 if (MACHINE_IS_VM)
705 __cpcmd("IPL", NULL, 0, NULL); 769 __cpcmd("IPL", NULL, 0, NULL);
706 diag308(DIAG308_IPL, NULL); 770 diag308(DIAG308_IPL, NULL);
707 break; 771 break;
772 case REIPL_METHOD_FCP_DUMP:
773 default:
774 break;
708 } 775 }
709 signal_processor(smp_processor_id(), sigp_stop_and_store_status); 776 signal_processor(smp_processor_id(), sigp_stop_and_store_status);
710} 777}
@@ -715,28 +782,28 @@ static void do_dump(void)
715 static char buf[100]; 782 static char buf[100];
716 783
717 switch (dump_method) { 784 switch (dump_method) {
718 case IPL_METHOD_CCW_CIO: 785 case DUMP_METHOD_CCW_CIO:
719 smp_send_stop(); 786 smp_send_stop();
720 devid.devno = dump_block_ccw->ipl_info.ccw.devno; 787 devid.devno = dump_block_ccw->ipl_info.ccw.devno;
721 devid.ssid = 0; 788 devid.ssid = 0;
722 reipl_ccw_dev(&devid); 789 reipl_ccw_dev(&devid);
723 break; 790 break;
724 case IPL_METHOD_CCW_VM: 791 case DUMP_METHOD_CCW_VM:
725 smp_send_stop(); 792 smp_send_stop();
726 sprintf(buf, "STORE STATUS"); 793 sprintf(buf, "STORE STATUS");
727 __cpcmd(buf, NULL, 0, NULL); 794 __cpcmd(buf, NULL, 0, NULL);
728 sprintf(buf, "IPL %X", dump_block_ccw->ipl_info.ccw.devno); 795 sprintf(buf, "IPL %X", dump_block_ccw->ipl_info.ccw.devno);
729 __cpcmd(buf, NULL, 0, NULL); 796 __cpcmd(buf, NULL, 0, NULL);
730 break; 797 break;
731 case IPL_METHOD_CCW_DIAG: 798 case DUMP_METHOD_CCW_DIAG:
732 diag308(DIAG308_SET, dump_block_ccw); 799 diag308(DIAG308_SET, dump_block_ccw);
733 diag308(DIAG308_DUMP, NULL); 800 diag308(DIAG308_DUMP, NULL);
734 break; 801 break;
735 case IPL_METHOD_FCP_RW_DIAG: 802 case DUMP_METHOD_FCP_DIAG:
736 diag308(DIAG308_SET, dump_block_fcp); 803 diag308(DIAG308_SET, dump_block_fcp);
737 diag308(DIAG308_DUMP, NULL); 804 diag308(DIAG308_DUMP, NULL);
738 break; 805 break;
739 case IPL_METHOD_NONE: 806 case DUMP_METHOD_NONE:
740 default: 807 default:
741 return; 808 return;
742 } 809 }
@@ -777,12 +844,13 @@ static int __init ipl_init(void)
777 rc = firmware_register(&ipl_subsys); 844 rc = firmware_register(&ipl_subsys);
778 if (rc) 845 if (rc)
779 return rc; 846 return rc;
780 switch (ipl_get_type()) { 847 switch (ipl_info.type) {
781 case IPL_TYPE_CCW: 848 case IPL_TYPE_CCW:
782 rc = sysfs_create_group(&ipl_subsys.kset.kobj, 849 rc = sysfs_create_group(&ipl_subsys.kset.kobj,
783 &ipl_ccw_attr_group); 850 &ipl_ccw_attr_group);
784 break; 851 break;
785 case IPL_TYPE_FCP: 852 case IPL_TYPE_FCP:
853 case IPL_TYPE_FCP_DUMP:
786 rc = ipl_register_fcp_files(); 854 rc = ipl_register_fcp_files();
787 break; 855 break;
788 case IPL_TYPE_NSS: 856 case IPL_TYPE_NSS:
@@ -852,7 +920,7 @@ static int __init reipl_ccw_init(void)
852 /* FIXME: check for diag308_set_works when enabling diag ccw reipl */ 920 /* FIXME: check for diag308_set_works when enabling diag ccw reipl */
853 if (!MACHINE_IS_VM) 921 if (!MACHINE_IS_VM)
854 sys_reipl_ccw_loadparm_attr.attr.mode = S_IRUGO; 922 sys_reipl_ccw_loadparm_attr.attr.mode = S_IRUGO;
855 if (ipl_get_type() == IPL_TYPE_CCW) 923 if (ipl_info.type == IPL_TYPE_CCW)
856 reipl_block_ccw->ipl_info.ccw.devno = ipl_devno; 924 reipl_block_ccw->ipl_info.ccw.devno = ipl_devno;
857 reipl_capabilities |= IPL_TYPE_CCW; 925 reipl_capabilities |= IPL_TYPE_CCW;
858 return 0; 926 return 0;
@@ -862,9 +930,9 @@ static int __init reipl_fcp_init(void)
862{ 930{
863 int rc; 931 int rc;
864 932
865 if ((!diag308_set_works) && (ipl_get_type() != IPL_TYPE_FCP)) 933 if ((!diag308_set_works) && (ipl_info.type != IPL_TYPE_FCP))
866 return 0; 934 return 0;
867 if ((!diag308_set_works) && (ipl_get_type() == IPL_TYPE_FCP)) 935 if ((!diag308_set_works) && (ipl_info.type == IPL_TYPE_FCP))
868 make_attrs_ro(reipl_fcp_attrs); 936 make_attrs_ro(reipl_fcp_attrs);
869 937
870 reipl_block_fcp = (void *) get_zeroed_page(GFP_KERNEL); 938 reipl_block_fcp = (void *) get_zeroed_page(GFP_KERNEL);
@@ -875,7 +943,7 @@ static int __init reipl_fcp_init(void)
875 free_page((unsigned long)reipl_block_fcp); 943 free_page((unsigned long)reipl_block_fcp);
876 return rc; 944 return rc;
877 } 945 }
878 if (ipl_get_type() == IPL_TYPE_FCP) { 946 if (ipl_info.type == IPL_TYPE_FCP) {
879 memcpy(reipl_block_fcp, IPL_PARMBLOCK_START, PAGE_SIZE); 947 memcpy(reipl_block_fcp, IPL_PARMBLOCK_START, PAGE_SIZE);
880 } else { 948 } else {
881 reipl_block_fcp->hdr.len = IPL_PARM_BLK_FCP_LEN; 949 reipl_block_fcp->hdr.len = IPL_PARM_BLK_FCP_LEN;
@@ -909,7 +977,7 @@ static int __init reipl_init(void)
909 rc = reipl_nss_init(); 977 rc = reipl_nss_init();
910 if (rc) 978 if (rc)
911 return rc; 979 return rc;
912 rc = reipl_set_type(ipl_get_type()); 980 rc = reipl_set_type(ipl_info.type);
913 if (rc) 981 if (rc)
914 return rc; 982 return rc;
915 return 0; 983 return 0;
@@ -931,7 +999,7 @@ static int __init dump_ccw_init(void)
931 dump_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; 999 dump_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION;
932 dump_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN; 1000 dump_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN;
933 dump_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; 1001 dump_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW;
934 dump_capabilities |= IPL_TYPE_CCW; 1002 dump_capabilities |= DUMP_TYPE_CCW;
935 return 0; 1003 return 0;
936} 1004}
937 1005
@@ -956,7 +1024,7 @@ static int __init dump_fcp_init(void)
956 dump_block_fcp->hdr.blk0_len = IPL_PARM_BLK0_FCP_LEN; 1024 dump_block_fcp->hdr.blk0_len = IPL_PARM_BLK0_FCP_LEN;
957 dump_block_fcp->hdr.pbt = DIAG308_IPL_TYPE_FCP; 1025 dump_block_fcp->hdr.pbt = DIAG308_IPL_TYPE_FCP;
958 dump_block_fcp->ipl_info.fcp.opt = DIAG308_IPL_OPT_DUMP; 1026 dump_block_fcp->ipl_info.fcp.opt = DIAG308_IPL_OPT_DUMP;
959 dump_capabilities |= IPL_TYPE_FCP; 1027 dump_capabilities |= DUMP_TYPE_FCP;
960 return 0; 1028 return 0;
961} 1029}
962 1030
@@ -995,7 +1063,7 @@ static int __init dump_init(void)
995 rc = dump_fcp_init(); 1063 rc = dump_fcp_init();
996 if (rc) 1064 if (rc)
997 return rc; 1065 return rc;
998 dump_set_type(IPL_TYPE_NONE); 1066 dump_set_type(DUMP_TYPE_NONE);
999 return 0; 1067 return 0;
1000} 1068}
1001 1069
@@ -1038,6 +1106,27 @@ static int __init s390_ipl_init(void)
1038 1106
1039__initcall(s390_ipl_init); 1107__initcall(s390_ipl_init);
1040 1108
1109void __init ipl_save_parameters(void)
1110{
1111 struct cio_iplinfo iplinfo;
1112 unsigned int *ipl_ptr;
1113 void *src, *dst;
1114
1115 if (cio_get_iplinfo(&iplinfo))
1116 return;
1117
1118 ipl_devno = iplinfo.devno;
1119 ipl_flags |= IPL_DEVNO_VALID;
1120 if (!iplinfo.is_qdio)
1121 return;
1122 ipl_flags |= IPL_PARMBLOCK_VALID;
1123 ipl_ptr = (unsigned int *)__LC_IPL_PARMBLOCK_PTR;
1124 src = (void *)(unsigned long)*ipl_ptr;
1125 dst = (void *)IPL_PARMBLOCK_ORIGIN;
1126 memmove(dst, src, PAGE_SIZE);
1127 *ipl_ptr = IPL_PARMBLOCK_ORIGIN;
1128}
1129
1041static LIST_HEAD(rcall); 1130static LIST_HEAD(rcall);
1042static DEFINE_MUTEX(rcall_mutex); 1131static DEFINE_MUTEX(rcall_mutex);
1043 1132
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index 39d1dd752529..59b4e796680a 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -31,6 +31,7 @@
31#include <linux/string.h> 31#include <linux/string.h>
32#include <linux/kernel.h> 32#include <linux/kernel.h>
33#include <linux/moduleloader.h> 33#include <linux/moduleloader.h>
34#include <linux/bug.h>
34 35
35#if 0 36#if 0
36#define DEBUGP printk 37#define DEBUGP printk
@@ -398,9 +399,10 @@ int module_finalize(const Elf_Ehdr *hdr,
398 struct module *me) 399 struct module *me)
399{ 400{
400 vfree(me->arch.syminfo); 401 vfree(me->arch.syminfo);
401 return 0; 402 return module_bug_finalize(hdr, sechdrs, me);
402} 403}
403 404
404void module_arch_cleanup(struct module *mod) 405void module_arch_cleanup(struct module *mod)
405{ 406{
407 module_bug_cleanup(mod);
406} 408}
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 5acfac654f9d..11d9b0197626 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -280,24 +280,26 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long new_stackp,
280 return 0; 280 return 0;
281} 281}
282 282
283asmlinkage long sys_fork(struct pt_regs regs) 283asmlinkage long sys_fork(void)
284{ 284{
285 return do_fork(SIGCHLD, regs.gprs[15], &regs, 0, NULL, NULL); 285 struct pt_regs *regs = task_pt_regs(current);
286 return do_fork(SIGCHLD, regs->gprs[15], regs, 0, NULL, NULL);
286} 287}
287 288
288asmlinkage long sys_clone(struct pt_regs regs) 289asmlinkage long sys_clone(void)
289{ 290{
290 unsigned long clone_flags; 291 struct pt_regs *regs = task_pt_regs(current);
291 unsigned long newsp; 292 unsigned long clone_flags;
293 unsigned long newsp;
292 int __user *parent_tidptr, *child_tidptr; 294 int __user *parent_tidptr, *child_tidptr;
293 295
294 clone_flags = regs.gprs[3]; 296 clone_flags = regs->gprs[3];
295 newsp = regs.orig_gpr2; 297 newsp = regs->orig_gpr2;
296 parent_tidptr = (int __user *) regs.gprs[4]; 298 parent_tidptr = (int __user *) regs->gprs[4];
297 child_tidptr = (int __user *) regs.gprs[5]; 299 child_tidptr = (int __user *) regs->gprs[5];
298 if (!newsp) 300 if (!newsp)
299 newsp = regs.gprs[15]; 301 newsp = regs->gprs[15];
300 return do_fork(clone_flags, newsp, &regs, 0, 302 return do_fork(clone_flags, newsp, regs, 0,
301 parent_tidptr, child_tidptr); 303 parent_tidptr, child_tidptr);
302} 304}
303 305
@@ -311,40 +313,52 @@ asmlinkage long sys_clone(struct pt_regs regs)
311 * do not have enough call-clobbered registers to hold all 313 * do not have enough call-clobbered registers to hold all
312 * the information you need. 314 * the information you need.
313 */ 315 */
314asmlinkage long sys_vfork(struct pt_regs regs) 316asmlinkage long sys_vfork(void)
315{ 317{
318 struct pt_regs *regs = task_pt_regs(current);
316 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, 319 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD,
317 regs.gprs[15], &regs, 0, NULL, NULL); 320 regs->gprs[15], regs, 0, NULL, NULL);
321}
322
323asmlinkage void execve_tail(void)
324{
325 task_lock(current);
326 current->ptrace &= ~PT_DTRACE;
327 task_unlock(current);
328 current->thread.fp_regs.fpc = 0;
329 if (MACHINE_HAS_IEEE)
330 asm volatile("sfpc %0,%0" : : "d" (0));
318} 331}
319 332
320/* 333/*
321 * sys_execve() executes a new program. 334 * sys_execve() executes a new program.
322 */ 335 */
323asmlinkage long sys_execve(struct pt_regs regs) 336asmlinkage long sys_execve(void)
324{ 337{
325 int error; 338 struct pt_regs *regs = task_pt_regs(current);
326 char * filename; 339 char *filename;
327 340 unsigned long result;
328 filename = getname((char __user *) regs.orig_gpr2); 341 int rc;
329 error = PTR_ERR(filename); 342
330 if (IS_ERR(filename)) 343 filename = getname((char __user *) regs->orig_gpr2);
331 goto out; 344 if (IS_ERR(filename)) {
332 error = do_execve(filename, (char __user * __user *) regs.gprs[3], 345 result = PTR_ERR(filename);
333 (char __user * __user *) regs.gprs[4], &regs); 346 goto out;
334 if (error == 0) {
335 task_lock(current);
336 current->ptrace &= ~PT_DTRACE;
337 task_unlock(current);
338 current->thread.fp_regs.fpc = 0;
339 if (MACHINE_HAS_IEEE)
340 asm volatile("sfpc %0,%0" : : "d" (0));
341 } 347 }
342 putname(filename); 348 rc = do_execve(filename, (char __user * __user *) regs->gprs[3],
349 (char __user * __user *) regs->gprs[4], regs);
350 if (rc) {
351 result = rc;
352 goto out_putname;
353 }
354 execve_tail();
355 result = regs->gprs[2];
356out_putname:
357 putname(filename);
343out: 358out:
344 return error; 359 return result;
345} 360}
346 361
347
348/* 362/*
349 * fill in the FPU structure for a core dump. 363 * fill in the FPU structure for a core dump.
350 */ 364 */
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 863c8d08c026..3dfd0985861c 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -285,6 +285,26 @@ static void __init conmode_default(void)
285 } 285 }
286} 286}
287 287
288#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
289static void __init setup_zfcpdump(unsigned int console_devno)
290{
291 static char str[64];
292
293 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
294 return;
295 if (console_devno != -1)
296 sprintf(str, "cio_ignore=all,!0.0.%04x,!0.0.%04x",
297 ipl_info.data.fcp.dev_id.devno, console_devno);
298 else
299 sprintf(str, "cio_ignore=all,!0.0.%04x",
300 ipl_info.data.fcp.dev_id.devno);
301 strcat(COMMAND_LINE, str);
302 console_loglevel = 2;
303}
304#else
305static inline void setup_zfcpdump(unsigned int console_devno) {}
306#endif /* CONFIG_ZFCPDUMP */
307
288#ifdef CONFIG_SMP 308#ifdef CONFIG_SMP
289void (*_machine_restart)(char *command) = machine_restart_smp; 309void (*_machine_restart)(char *command) = machine_restart_smp;
290void (*_machine_halt)(void) = machine_halt_smp; 310void (*_machine_halt)(void) = machine_halt_smp;
@@ -586,13 +606,20 @@ setup_resources(void)
586 } 606 }
587} 607}
588 608
609unsigned long real_memory_size;
610EXPORT_SYMBOL_GPL(real_memory_size);
611
589static void __init setup_memory_end(void) 612static void __init setup_memory_end(void)
590{ 613{
591 unsigned long real_size, memory_size; 614 unsigned long memory_size;
592 unsigned long max_mem, max_phys; 615 unsigned long max_mem, max_phys;
593 int i; 616 int i;
594 617
595 memory_size = real_size = 0; 618#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
619 if (ipl_info.type == IPL_TYPE_FCP_DUMP)
620 memory_end = ZFCPDUMP_HSA_SIZE;
621#endif
622 memory_size = 0;
596 max_phys = VMALLOC_END_INIT - VMALLOC_MIN_SIZE; 623 max_phys = VMALLOC_END_INIT - VMALLOC_MIN_SIZE;
597 memory_end &= PAGE_MASK; 624 memory_end &= PAGE_MASK;
598 625
@@ -601,7 +628,8 @@ static void __init setup_memory_end(void)
601 for (i = 0; i < MEMORY_CHUNKS; i++) { 628 for (i = 0; i < MEMORY_CHUNKS; i++) {
602 struct mem_chunk *chunk = &memory_chunk[i]; 629 struct mem_chunk *chunk = &memory_chunk[i];
603 630
604 real_size = max(real_size, chunk->addr + chunk->size); 631 real_memory_size = max(real_memory_size,
632 chunk->addr + chunk->size);
605 if (chunk->addr >= max_mem) { 633 if (chunk->addr >= max_mem) {
606 memset(chunk, 0, sizeof(*chunk)); 634 memset(chunk, 0, sizeof(*chunk));
607 continue; 635 continue;
@@ -765,6 +793,7 @@ setup_arch(char **cmdline_p)
765 793
766 parse_early_param(); 794 parse_early_param();
767 795
796 setup_ipl_info();
768 setup_memory_end(); 797 setup_memory_end();
769 setup_addressing_mode(); 798 setup_addressing_mode();
770 setup_memory(); 799 setup_memory();
@@ -782,6 +811,9 @@ setup_arch(char **cmdline_p)
782 811
783 /* Setup default console */ 812 /* Setup default console */
784 conmode_default(); 813 conmode_default();
814
815 /* Setup zfcpdump support */
816 setup_zfcpdump(console_devno);
785} 817}
786 818
787void print_cpu_info(struct cpuinfo_S390 *cpuinfo) 819void print_cpu_info(struct cpuinfo_S390 *cpuinfo)
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 554f9cf7499c..3c41907799a1 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -102,9 +102,9 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
102} 102}
103 103
104asmlinkage long 104asmlinkage long
105sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, 105sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
106 struct pt_regs *regs)
107{ 106{
107 struct pt_regs *regs = task_pt_regs(current);
108 return do_sigaltstack(uss, uoss, regs->gprs[15]); 108 return do_sigaltstack(uss, uoss, regs->gprs[15]);
109} 109}
110 110
@@ -163,8 +163,9 @@ static int restore_sigregs(struct pt_regs *regs, _sigregs __user *sregs)
163 return 0; 163 return 0;
164} 164}
165 165
166asmlinkage long sys_sigreturn(struct pt_regs *regs) 166asmlinkage long sys_sigreturn(void)
167{ 167{
168 struct pt_regs *regs = task_pt_regs(current);
168 sigframe __user *frame = (sigframe __user *)regs->gprs[15]; 169 sigframe __user *frame = (sigframe __user *)regs->gprs[15];
169 sigset_t set; 170 sigset_t set;
170 171
@@ -189,8 +190,9 @@ badframe:
189 return 0; 190 return 0;
190} 191}
191 192
192asmlinkage long sys_rt_sigreturn(struct pt_regs *regs) 193asmlinkage long sys_rt_sigreturn(void)
193{ 194{
195 struct pt_regs *regs = task_pt_regs(current);
194 rt_sigframe __user *frame = (rt_sigframe __user *)regs->gprs[15]; 196 rt_sigframe __user *frame = (rt_sigframe __user *)regs->gprs[15];
195 sigset_t set; 197 sigset_t set;
196 198
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 97764f710bb7..3754e2031b39 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -1,12 +1,12 @@
1/* 1/*
2 * arch/s390/kernel/smp.c 2 * arch/s390/kernel/smp.c
3 * 3 *
4 * Copyright (C) IBM Corp. 1999,2006 4 * Copyright IBM Corp. 1999,2007
5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
6 * Martin Schwidefsky (schwidefsky@de.ibm.com) 6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com) 7 * Heiko Carstens (heiko.carstens@de.ibm.com)
8 * 8 *
9 * based on other smp stuff by 9 * based on other smp stuff by
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar 11 * (c) 1998 Ingo Molnar
12 * 12 *
@@ -31,6 +31,7 @@
31#include <linux/interrupt.h> 31#include <linux/interrupt.h>
32#include <linux/cpu.h> 32#include <linux/cpu.h>
33#include <linux/timex.h> 33#include <linux/timex.h>
34#include <linux/bootmem.h>
34#include <asm/ipl.h> 35#include <asm/ipl.h>
35#include <asm/setup.h> 36#include <asm/setup.h>
36#include <asm/sigp.h> 37#include <asm/sigp.h>
@@ -40,17 +41,19 @@
40#include <asm/cpcmd.h> 41#include <asm/cpcmd.h>
41#include <asm/tlbflush.h> 42#include <asm/tlbflush.h>
42#include <asm/timer.h> 43#include <asm/timer.h>
43 44#include <asm/lowcore.h>
44extern volatile int __cpu_logical_map[];
45 45
46/* 46/*
47 * An array with a pointer the lowcore of every CPU. 47 * An array with a pointer the lowcore of every CPU.
48 */ 48 */
49
50struct _lowcore *lowcore_ptr[NR_CPUS]; 49struct _lowcore *lowcore_ptr[NR_CPUS];
50EXPORT_SYMBOL(lowcore_ptr);
51 51
52cpumask_t cpu_online_map = CPU_MASK_NONE; 52cpumask_t cpu_online_map = CPU_MASK_NONE;
53EXPORT_SYMBOL(cpu_online_map);
54
53cpumask_t cpu_possible_map = CPU_MASK_NONE; 55cpumask_t cpu_possible_map = CPU_MASK_NONE;
56EXPORT_SYMBOL(cpu_possible_map);
54 57
55static struct task_struct *current_set[NR_CPUS]; 58static struct task_struct *current_set[NR_CPUS];
56 59
@@ -70,7 +73,7 @@ struct call_data_struct {
70 int wait; 73 int wait;
71}; 74};
72 75
73static struct call_data_struct * call_data; 76static struct call_data_struct *call_data;
74 77
75/* 78/*
76 * 'Call function' interrupt callback 79 * 'Call function' interrupt callback
@@ -150,8 +153,8 @@ out:
150 * 153 *
151 * Run a function on all other CPUs. 154 * Run a function on all other CPUs.
152 * 155 *
153 * You must not call this function with disabled interrupts or from a 156 * You must not call this function with disabled interrupts, from a
154 * hardware interrupt handler. You may call it from a bottom half. 157 * hardware interrupt handler or from a bottom half.
155 */ 158 */
156int smp_call_function(void (*func) (void *info), void *info, int nonatomic, 159int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
157 int wait) 160 int wait)
@@ -177,11 +180,11 @@ EXPORT_SYMBOL(smp_call_function);
177 * 180 *
178 * Run a function on one processor. 181 * Run a function on one processor.
179 * 182 *
180 * You must not call this function with disabled interrupts or from a 183 * You must not call this function with disabled interrupts, from a
181 * hardware interrupt handler. You may call it from a bottom half. 184 * hardware interrupt handler or from a bottom half.
182 */ 185 */
183int smp_call_function_on(void (*func) (void *info), void *info, int nonatomic, 186int smp_call_function_on(void (*func) (void *info), void *info, int nonatomic,
184 int wait, int cpu) 187 int wait, int cpu)
185{ 188{
186 cpumask_t map = CPU_MASK_NONE; 189 cpumask_t map = CPU_MASK_NONE;
187 190
@@ -195,9 +198,9 @@ EXPORT_SYMBOL(smp_call_function_on);
195 198
196static void do_send_stop(void) 199static void do_send_stop(void)
197{ 200{
198 int cpu, rc; 201 int cpu, rc;
199 202
200 /* stop all processors */ 203 /* stop all processors */
201 for_each_online_cpu(cpu) { 204 for_each_online_cpu(cpu) {
202 if (cpu == smp_processor_id()) 205 if (cpu == smp_processor_id())
203 continue; 206 continue;
@@ -209,9 +212,9 @@ static void do_send_stop(void)
209 212
210static void do_store_status(void) 213static void do_store_status(void)
211{ 214{
212 int cpu, rc; 215 int cpu, rc;
213 216
214 /* store status of all processors in their lowcores (real 0) */ 217 /* store status of all processors in their lowcores (real 0) */
215 for_each_online_cpu(cpu) { 218 for_each_online_cpu(cpu) {
216 if (cpu == smp_processor_id()) 219 if (cpu == smp_processor_id())
217 continue; 220 continue;
@@ -219,8 +222,8 @@ static void do_store_status(void)
219 rc = signal_processor_p( 222 rc = signal_processor_p(
220 (__u32)(unsigned long) lowcore_ptr[cpu], cpu, 223 (__u32)(unsigned long) lowcore_ptr[cpu], cpu,
221 sigp_store_status_at_address); 224 sigp_store_status_at_address);
222 } while(rc == sigp_busy); 225 } while (rc == sigp_busy);
223 } 226 }
224} 227}
225 228
226static void do_wait_for_stop(void) 229static void do_wait_for_stop(void)
@@ -231,7 +234,7 @@ static void do_wait_for_stop(void)
231 for_each_online_cpu(cpu) { 234 for_each_online_cpu(cpu) {
232 if (cpu == smp_processor_id()) 235 if (cpu == smp_processor_id())
233 continue; 236 continue;
234 while(!smp_cpu_not_running(cpu)) 237 while (!smp_cpu_not_running(cpu))
235 cpu_relax(); 238 cpu_relax();
236 } 239 }
237} 240}
@@ -245,7 +248,7 @@ void smp_send_stop(void)
245 /* Disable all interrupts/machine checks */ 248 /* Disable all interrupts/machine checks */
246 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); 249 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
247 250
248 /* write magic number to zero page (absolute 0) */ 251 /* write magic number to zero page (absolute 0) */
249 lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC; 252 lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC;
250 253
251 /* stop other processors. */ 254 /* stop other processors. */
@@ -261,8 +264,7 @@ void smp_send_stop(void)
261/* 264/*
262 * Reboot, halt and power_off routines for SMP. 265 * Reboot, halt and power_off routines for SMP.
263 */ 266 */
264 267void machine_restart_smp(char *__unused)
265void machine_restart_smp(char * __unused)
266{ 268{
267 smp_send_stop(); 269 smp_send_stop();
268 do_reipl(); 270 do_reipl();
@@ -293,17 +295,17 @@ void machine_power_off_smp(void)
293 295
294static void do_ext_call_interrupt(__u16 code) 296static void do_ext_call_interrupt(__u16 code)
295{ 297{
296 unsigned long bits; 298 unsigned long bits;
297 299
298 /* 300 /*
299 * handle bit signal external calls 301 * handle bit signal external calls
300 * 302 *
301 * For the ec_schedule signal we have to do nothing. All the work 303 * For the ec_schedule signal we have to do nothing. All the work
302 * is done automatically when we return from the interrupt. 304 * is done automatically when we return from the interrupt.
303 */ 305 */
304 bits = xchg(&S390_lowcore.ext_call_fast, 0); 306 bits = xchg(&S390_lowcore.ext_call_fast, 0);
305 307
306 if (test_bit(ec_call_function, &bits)) 308 if (test_bit(ec_call_function, &bits))
307 do_call_function(); 309 do_call_function();
308} 310}
309 311
@@ -313,11 +315,11 @@ static void do_ext_call_interrupt(__u16 code)
313 */ 315 */
314static void smp_ext_bitcall(int cpu, ec_bit_sig sig) 316static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
315{ 317{
316 /* 318 /*
317 * Set signaling bit in lowcore of target cpu and kick it 319 * Set signaling bit in lowcore of target cpu and kick it
318 */ 320 */
319 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); 321 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
320 while(signal_processor(cpu, sigp_emergency_signal) == sigp_busy) 322 while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
321 udelay(10); 323 udelay(10);
322} 324}
323 325
@@ -332,7 +334,7 @@ void smp_ptlb_callback(void *info)
332 334
333void smp_ptlb_all(void) 335void smp_ptlb_all(void)
334{ 336{
335 on_each_cpu(smp_ptlb_callback, NULL, 0, 1); 337 on_each_cpu(smp_ptlb_callback, NULL, 0, 1);
336} 338}
337EXPORT_SYMBOL(smp_ptlb_all); 339EXPORT_SYMBOL(smp_ptlb_all);
338#endif /* ! CONFIG_64BIT */ 340#endif /* ! CONFIG_64BIT */
@@ -344,7 +346,7 @@ EXPORT_SYMBOL(smp_ptlb_all);
344 */ 346 */
345void smp_send_reschedule(int cpu) 347void smp_send_reschedule(int cpu)
346{ 348{
347 smp_ext_bitcall(cpu, ec_schedule); 349 smp_ext_bitcall(cpu, ec_schedule);
348} 350}
349 351
350/* 352/*
@@ -358,11 +360,12 @@ struct ec_creg_mask_parms {
358/* 360/*
359 * callback for setting/clearing control bits 361 * callback for setting/clearing control bits
360 */ 362 */
361static void smp_ctl_bit_callback(void *info) { 363static void smp_ctl_bit_callback(void *info)
364{
362 struct ec_creg_mask_parms *pp = info; 365 struct ec_creg_mask_parms *pp = info;
363 unsigned long cregs[16]; 366 unsigned long cregs[16];
364 int i; 367 int i;
365 368
366 __ctl_store(cregs, 0, 15); 369 __ctl_store(cregs, 0, 15);
367 for (i = 0; i <= 15; i++) 370 for (i = 0; i <= 15; i++)
368 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; 371 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
@@ -381,6 +384,7 @@ void smp_ctl_set_bit(int cr, int bit)
381 parms.orvals[cr] = 1 << bit; 384 parms.orvals[cr] = 1 << bit;
382 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); 385 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1);
383} 386}
387EXPORT_SYMBOL(smp_ctl_set_bit);
384 388
385/* 389/*
386 * Clear a bit in a control register of all cpus 390 * Clear a bit in a control register of all cpus
@@ -394,13 +398,72 @@ void smp_ctl_clear_bit(int cr, int bit)
394 parms.andvals[cr] = ~(1L << bit); 398 parms.andvals[cr] = ~(1L << bit);
395 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); 399 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1);
396} 400}
401EXPORT_SYMBOL(smp_ctl_clear_bit);
402
403#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
404
405/*
406 * zfcpdump_prefix_array holds prefix registers for the following scenario:
407 * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to
408 * save its prefix registers, since they get lost, when switching from 31 bit
409 * to 64 bit.
410 */
411unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \
412 __attribute__((__section__(".data")));
413
414static void __init smp_get_save_areas(void)
415{
416 unsigned int cpu, cpu_num, rc;
417 __u16 boot_cpu_addr;
418
419 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
420 return;
421 boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
422 cpu_num = 1;
423 for (cpu = 0; cpu <= 65535; cpu++) {
424 if ((u16) cpu == boot_cpu_addr)
425 continue;
426 __cpu_logical_map[1] = (__u16) cpu;
427 if (signal_processor(1, sigp_sense) == sigp_not_operational)
428 continue;
429 if (cpu_num >= NR_CPUS) {
430 printk("WARNING: Registers for cpu %i are not "
431 "saved, since dump kernel was compiled with"
432 "NR_CPUS=%i!\n", cpu_num, NR_CPUS);
433 continue;
434 }
435 zfcpdump_save_areas[cpu_num] =
436 alloc_bootmem(sizeof(union save_area));
437 while (1) {
438 rc = signal_processor(1, sigp_stop_and_store_status);
439 if (rc != sigp_busy)
440 break;
441 cpu_relax();
442 }
443 memcpy(zfcpdump_save_areas[cpu_num],
444 (void *)(unsigned long) store_prefix() +
445 SAVE_AREA_BASE, SAVE_AREA_SIZE);
446#ifdef __s390x__
447 /* copy original prefix register */
448 zfcpdump_save_areas[cpu_num]->s390x.pref_reg =
449 zfcpdump_prefix_array[cpu_num];
450#endif
451 cpu_num++;
452 }
453}
454
455union save_area *zfcpdump_save_areas[NR_CPUS + 1];
456EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
457
458#else
459#define smp_get_save_areas() do { } while (0)
460#endif
397 461
398/* 462/*
399 * Lets check how many CPUs we have. 463 * Lets check how many CPUs we have.
400 */ 464 */
401 465
402static unsigned int 466static unsigned int __init smp_count_cpus(void)
403__init smp_count_cpus(void)
404{ 467{
405 unsigned int cpu, num_cpus; 468 unsigned int cpu, num_cpus;
406 __u16 boot_cpu_addr; 469 __u16 boot_cpu_addr;
@@ -416,31 +479,30 @@ __init smp_count_cpus(void)
416 if ((__u16) cpu == boot_cpu_addr) 479 if ((__u16) cpu == boot_cpu_addr)
417 continue; 480 continue;
418 __cpu_logical_map[1] = (__u16) cpu; 481 __cpu_logical_map[1] = (__u16) cpu;
419 if (signal_processor(1, sigp_sense) == 482 if (signal_processor(1, sigp_sense) == sigp_not_operational)
420 sigp_not_operational)
421 continue; 483 continue;
422 num_cpus++; 484 num_cpus++;
423 } 485 }
424 486
425 printk("Detected %d CPU's\n",(int) num_cpus); 487 printk("Detected %d CPU's\n", (int) num_cpus);
426 printk("Boot cpu address %2X\n", boot_cpu_addr); 488 printk("Boot cpu address %2X\n", boot_cpu_addr);
427 489
428 return num_cpus; 490 return num_cpus;
429} 491}
430 492
431/* 493/*
432 * Activate a secondary processor. 494 * Activate a secondary processor.
433 */ 495 */
434int __devinit start_secondary(void *cpuvoid) 496int __devinit start_secondary(void *cpuvoid)
435{ 497{
436 /* Setup the cpu */ 498 /* Setup the cpu */
437 cpu_init(); 499 cpu_init();
438 preempt_disable(); 500 preempt_disable();
439 /* Enable TOD clock interrupts on the secondary cpu. */ 501 /* Enable TOD clock interrupts on the secondary cpu. */
440 init_cpu_timer(); 502 init_cpu_timer();
441#ifdef CONFIG_VIRT_TIMER 503#ifdef CONFIG_VIRT_TIMER
442 /* Enable cpu timer interrupts on the secondary cpu. */ 504 /* Enable cpu timer interrupts on the secondary cpu. */
443 init_cpu_vtimer(); 505 init_cpu_vtimer();
444#endif 506#endif
445 /* Enable pfault pseudo page faults on this cpu. */ 507 /* Enable pfault pseudo page faults on this cpu. */
446 pfault_init(); 508 pfault_init();
@@ -449,11 +511,11 @@ int __devinit start_secondary(void *cpuvoid)
449 cpu_set(smp_processor_id(), cpu_online_map); 511 cpu_set(smp_processor_id(), cpu_online_map);
450 /* Switch on interrupts */ 512 /* Switch on interrupts */
451 local_irq_enable(); 513 local_irq_enable();
452 /* Print info about this processor */ 514 /* Print info about this processor */
453 print_cpu_info(&S390_lowcore.cpu_data); 515 print_cpu_info(&S390_lowcore.cpu_data);
454 /* cpu_idle will call schedule for us */ 516 /* cpu_idle will call schedule for us */
455 cpu_idle(); 517 cpu_idle();
456 return 0; 518 return 0;
457} 519}
458 520
459static void __init smp_create_idle(unsigned int cpu) 521static void __init smp_create_idle(unsigned int cpu)
@@ -470,56 +532,13 @@ static void __init smp_create_idle(unsigned int cpu)
470 current_set[cpu] = p; 532 current_set[cpu] = p;
471} 533}
472 534
473/* Reserving and releasing of CPUs */ 535static int cpu_stopped(int cpu)
474
475static DEFINE_SPINLOCK(smp_reserve_lock);
476static int smp_cpu_reserved[NR_CPUS];
477
478int
479smp_get_cpu(cpumask_t cpu_mask)
480{
481 unsigned long flags;
482 int cpu;
483
484 spin_lock_irqsave(&smp_reserve_lock, flags);
485 /* Try to find an already reserved cpu. */
486 for_each_cpu_mask(cpu, cpu_mask) {
487 if (smp_cpu_reserved[cpu] != 0) {
488 smp_cpu_reserved[cpu]++;
489 /* Found one. */
490 goto out;
491 }
492 }
493 /* Reserve a new cpu from cpu_mask. */
494 for_each_cpu_mask(cpu, cpu_mask) {
495 if (cpu_online(cpu)) {
496 smp_cpu_reserved[cpu]++;
497 goto out;
498 }
499 }
500 cpu = -ENODEV;
501out:
502 spin_unlock_irqrestore(&smp_reserve_lock, flags);
503 return cpu;
504}
505
506void
507smp_put_cpu(int cpu)
508{
509 unsigned long flags;
510
511 spin_lock_irqsave(&smp_reserve_lock, flags);
512 smp_cpu_reserved[cpu]--;
513 spin_unlock_irqrestore(&smp_reserve_lock, flags);
514}
515
516static int
517cpu_stopped(int cpu)
518{ 536{
519 __u32 status; 537 __u32 status;
520 538
521 /* Check for stopped state */ 539 /* Check for stopped state */
522 if (signal_processor_ps(&status, 0, cpu, sigp_sense) == sigp_status_stored) { 540 if (signal_processor_ps(&status, 0, cpu, sigp_sense) ==
541 sigp_status_stored) {
523 if (status & 0x40) 542 if (status & 0x40)
524 return 1; 543 return 1;
525 } 544 }
@@ -528,14 +547,13 @@ cpu_stopped(int cpu)
528 547
529/* Upping and downing of CPUs */ 548/* Upping and downing of CPUs */
530 549
531int 550int __cpu_up(unsigned int cpu)
532__cpu_up(unsigned int cpu)
533{ 551{
534 struct task_struct *idle; 552 struct task_struct *idle;
535 struct _lowcore *cpu_lowcore; 553 struct _lowcore *cpu_lowcore;
536 struct stack_frame *sf; 554 struct stack_frame *sf;
537 sigp_ccode ccode; 555 sigp_ccode ccode;
538 int curr_cpu; 556 int curr_cpu;
539 557
540 for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) { 558 for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) {
541 __cpu_logical_map[cpu] = (__u16) curr_cpu; 559 __cpu_logical_map[cpu] = (__u16) curr_cpu;
@@ -548,7 +566,7 @@ __cpu_up(unsigned int cpu)
548 566
549 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), 567 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
550 cpu, sigp_set_prefix); 568 cpu, sigp_set_prefix);
551 if (ccode){ 569 if (ccode) {
552 printk("sigp_set_prefix failed for cpu %d " 570 printk("sigp_set_prefix failed for cpu %d "
553 "with condition code %d\n", 571 "with condition code %d\n",
554 (int) cpu, (int) ccode); 572 (int) cpu, (int) ccode);
@@ -556,9 +574,9 @@ __cpu_up(unsigned int cpu)
556 } 574 }
557 575
558 idle = current_set[cpu]; 576 idle = current_set[cpu];
559 cpu_lowcore = lowcore_ptr[cpu]; 577 cpu_lowcore = lowcore_ptr[cpu];
560 cpu_lowcore->kernel_stack = (unsigned long) 578 cpu_lowcore->kernel_stack = (unsigned long)
561 task_stack_page(idle) + (THREAD_SIZE); 579 task_stack_page(idle) + THREAD_SIZE;
562 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack 580 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
563 - sizeof(struct pt_regs) 581 - sizeof(struct pt_regs)
564 - sizeof(struct stack_frame)); 582 - sizeof(struct stack_frame));
@@ -570,11 +588,11 @@ __cpu_up(unsigned int cpu)
570 " stam 0,15,0(%0)" 588 " stam 0,15,0(%0)"
571 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); 589 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
572 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; 590 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
573 cpu_lowcore->current_task = (unsigned long) idle; 591 cpu_lowcore->current_task = (unsigned long) idle;
574 cpu_lowcore->cpu_data.cpu_nr = cpu; 592 cpu_lowcore->cpu_data.cpu_nr = cpu;
575 eieio(); 593 eieio();
576 594
577 while (signal_processor(cpu,sigp_restart) == sigp_busy) 595 while (signal_processor(cpu, sigp_restart) == sigp_busy)
578 udelay(10); 596 udelay(10);
579 597
580 while (!cpu_online(cpu)) 598 while (!cpu_online(cpu))
@@ -589,6 +607,7 @@ void __init smp_setup_cpu_possible_map(void)
589{ 607{
590 unsigned int phy_cpus, pos_cpus, cpu; 608 unsigned int phy_cpus, pos_cpus, cpu;
591 609
610 smp_get_save_areas();
592 phy_cpus = smp_count_cpus(); 611 phy_cpus = smp_count_cpus();
593 pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS); 612 pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS);
594 613
@@ -620,18 +639,11 @@ static int __init setup_possible_cpus(char *s)
620} 639}
621early_param("possible_cpus", setup_possible_cpus); 640early_param("possible_cpus", setup_possible_cpus);
622 641
623int 642int __cpu_disable(void)
624__cpu_disable(void)
625{ 643{
626 unsigned long flags;
627 struct ec_creg_mask_parms cr_parms; 644 struct ec_creg_mask_parms cr_parms;
628 int cpu = smp_processor_id(); 645 int cpu = smp_processor_id();
629 646
630 spin_lock_irqsave(&smp_reserve_lock, flags);
631 if (smp_cpu_reserved[cpu] != 0) {
632 spin_unlock_irqrestore(&smp_reserve_lock, flags);
633 return -EBUSY;
634 }
635 cpu_clear(cpu, cpu_online_map); 647 cpu_clear(cpu, cpu_online_map);
636 648
637 /* Disable pfault pseudo page faults on this cpu. */ 649 /* Disable pfault pseudo page faults on this cpu. */
@@ -642,24 +654,23 @@ __cpu_disable(void)
642 654
643 /* disable all external interrupts */ 655 /* disable all external interrupts */
644 cr_parms.orvals[0] = 0; 656 cr_parms.orvals[0] = 0;
645 cr_parms.andvals[0] = ~(1<<15 | 1<<14 | 1<<13 | 1<<12 | 657 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
646 1<<11 | 1<<10 | 1<< 6 | 1<< 4); 658 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
647 /* disable all I/O interrupts */ 659 /* disable all I/O interrupts */
648 cr_parms.orvals[6] = 0; 660 cr_parms.orvals[6] = 0;
649 cr_parms.andvals[6] = ~(1<<31 | 1<<30 | 1<<29 | 1<<28 | 661 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
650 1<<27 | 1<<26 | 1<<25 | 1<<24); 662 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
651 /* disable most machine checks */ 663 /* disable most machine checks */
652 cr_parms.orvals[14] = 0; 664 cr_parms.orvals[14] = 0;
653 cr_parms.andvals[14] = ~(1<<28 | 1<<27 | 1<<26 | 1<<25 | 1<<24); 665 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
666 1 << 25 | 1 << 24);
654 667
655 smp_ctl_bit_callback(&cr_parms); 668 smp_ctl_bit_callback(&cr_parms);
656 669
657 spin_unlock_irqrestore(&smp_reserve_lock, flags);
658 return 0; 670 return 0;
659} 671}
660 672
661void 673void __cpu_die(unsigned int cpu)
662__cpu_die(unsigned int cpu)
663{ 674{
664 /* Wait until target cpu is down */ 675 /* Wait until target cpu is down */
665 while (!smp_cpu_not_running(cpu)) 676 while (!smp_cpu_not_running(cpu))
@@ -667,13 +678,12 @@ __cpu_die(unsigned int cpu)
667 printk("Processor %d spun down\n", cpu); 678 printk("Processor %d spun down\n", cpu);
668} 679}
669 680
670void 681void cpu_die(void)
671cpu_die(void)
672{ 682{
673 idle_task_exit(); 683 idle_task_exit();
674 signal_processor(smp_processor_id(), sigp_stop); 684 signal_processor(smp_processor_id(), sigp_stop);
675 BUG(); 685 BUG();
676 for(;;); 686 for (;;);
677} 687}
678 688
679#endif /* CONFIG_HOTPLUG_CPU */ 689#endif /* CONFIG_HOTPLUG_CPU */
@@ -686,36 +696,36 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
686{ 696{
687 unsigned long stack; 697 unsigned long stack;
688 unsigned int cpu; 698 unsigned int cpu;
689 int i; 699 int i;
690 700
691 /* request the 0x1201 emergency signal external interrupt */ 701 /* request the 0x1201 emergency signal external interrupt */
692 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) 702 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
693 panic("Couldn't request external interrupt 0x1201"); 703 panic("Couldn't request external interrupt 0x1201");
694 memset(lowcore_ptr,0,sizeof(lowcore_ptr)); 704 memset(lowcore_ptr, 0, sizeof(lowcore_ptr));
695 /* 705 /*
696 * Initialize prefix pages and stacks for all possible cpus 706 * Initialize prefix pages and stacks for all possible cpus
697 */ 707 */
698 print_cpu_info(&S390_lowcore.cpu_data); 708 print_cpu_info(&S390_lowcore.cpu_data);
699 709
700 for_each_possible_cpu(i) { 710 for_each_possible_cpu(i) {
701 lowcore_ptr[i] = (struct _lowcore *) 711 lowcore_ptr[i] = (struct _lowcore *)
702 __get_free_pages(GFP_KERNEL|GFP_DMA, 712 __get_free_pages(GFP_KERNEL | GFP_DMA,
703 sizeof(void*) == 8 ? 1 : 0); 713 sizeof(void*) == 8 ? 1 : 0);
704 stack = __get_free_pages(GFP_KERNEL,ASYNC_ORDER); 714 stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
705 if (lowcore_ptr[i] == NULL || stack == 0ULL) 715 if (!lowcore_ptr[i] || !stack)
706 panic("smp_boot_cpus failed to allocate memory\n"); 716 panic("smp_boot_cpus failed to allocate memory\n");
707 717
708 *(lowcore_ptr[i]) = S390_lowcore; 718 *(lowcore_ptr[i]) = S390_lowcore;
709 lowcore_ptr[i]->async_stack = stack + (ASYNC_SIZE); 719 lowcore_ptr[i]->async_stack = stack + ASYNC_SIZE;
710 stack = __get_free_pages(GFP_KERNEL,0); 720 stack = __get_free_pages(GFP_KERNEL, 0);
711 if (stack == 0ULL) 721 if (!stack)
712 panic("smp_boot_cpus failed to allocate memory\n"); 722 panic("smp_boot_cpus failed to allocate memory\n");
713 lowcore_ptr[i]->panic_stack = stack + (PAGE_SIZE); 723 lowcore_ptr[i]->panic_stack = stack + PAGE_SIZE;
714#ifndef CONFIG_64BIT 724#ifndef CONFIG_64BIT
715 if (MACHINE_HAS_IEEE) { 725 if (MACHINE_HAS_IEEE) {
716 lowcore_ptr[i]->extended_save_area_addr = 726 lowcore_ptr[i]->extended_save_area_addr =
717 (__u32) __get_free_pages(GFP_KERNEL,0); 727 (__u32) __get_free_pages(GFP_KERNEL, 0);
718 if (lowcore_ptr[i]->extended_save_area_addr == 0) 728 if (!lowcore_ptr[i]->extended_save_area_addr)
719 panic("smp_boot_cpus failed to " 729 panic("smp_boot_cpus failed to "
720 "allocate memory\n"); 730 "allocate memory\n");
721 } 731 }
@@ -754,34 +764,63 @@ void smp_cpus_done(unsigned int max_cpus)
754 */ 764 */
755int setup_profiling_timer(unsigned int multiplier) 765int setup_profiling_timer(unsigned int multiplier)
756{ 766{
757 return 0; 767 return 0;
758} 768}
759 769
760static DEFINE_PER_CPU(struct cpu, cpu_devices); 770static DEFINE_PER_CPU(struct cpu, cpu_devices);
761 771
772static ssize_t show_capability(struct sys_device *dev, char *buf)
773{
774 unsigned int capability;
775 int rc;
776
777 rc = get_cpu_capability(&capability);
778 if (rc)
779 return rc;
780 return sprintf(buf, "%u\n", capability);
781}
782static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
783
784static int __cpuinit smp_cpu_notify(struct notifier_block *self,
785 unsigned long action, void *hcpu)
786{
787 unsigned int cpu = (unsigned int)(long)hcpu;
788 struct cpu *c = &per_cpu(cpu_devices, cpu);
789 struct sys_device *s = &c->sysdev;
790
791 switch (action) {
792 case CPU_ONLINE:
793 if (sysdev_create_file(s, &attr_capability))
794 return NOTIFY_BAD;
795 break;
796 case CPU_DEAD:
797 sysdev_remove_file(s, &attr_capability);
798 break;
799 }
800 return NOTIFY_OK;
801}
802
803static struct notifier_block __cpuinitdata smp_cpu_nb = {
804 .notifier_call = smp_cpu_notify,
805};
806
762static int __init topology_init(void) 807static int __init topology_init(void)
763{ 808{
764 int cpu; 809 int cpu;
765 int ret; 810
811 register_cpu_notifier(&smp_cpu_nb);
766 812
767 for_each_possible_cpu(cpu) { 813 for_each_possible_cpu(cpu) {
768 struct cpu *c = &per_cpu(cpu_devices, cpu); 814 struct cpu *c = &per_cpu(cpu_devices, cpu);
815 struct sys_device *s = &c->sysdev;
769 816
770 c->hotpluggable = 1; 817 c->hotpluggable = 1;
771 ret = register_cpu(c, cpu); 818 register_cpu(c, cpu);
772 if (ret) 819 if (!cpu_online(cpu))
773 printk(KERN_WARNING "topology_init: register_cpu %d " 820 continue;
774 "failed (%d)\n", cpu, ret); 821 s = &c->sysdev;
822 sysdev_create_file(s, &attr_capability);
775 } 823 }
776 return 0; 824 return 0;
777} 825}
778
779subsys_initcall(topology_init); 826subsys_initcall(topology_init);
780
781EXPORT_SYMBOL(cpu_online_map);
782EXPORT_SYMBOL(cpu_possible_map);
783EXPORT_SYMBOL(lowcore_ptr);
784EXPORT_SYMBOL(smp_ctl_set_bit);
785EXPORT_SYMBOL(smp_ctl_clear_bit);
786EXPORT_SYMBOL(smp_get_cpu);
787EXPORT_SYMBOL(smp_put_cpu);
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 584ed95f3380..3a77c22cda78 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -266,23 +266,3 @@ s390_fadvise64_64(struct fadvise64_64_args __user *args)
266 return -EFAULT; 266 return -EFAULT;
267 return sys_fadvise64_64(a.fd, a.offset, a.len, a.advice); 267 return sys_fadvise64_64(a.fd, a.offset, a.len, a.advice);
268} 268}
269
270/*
271 * Do a system call from kernel instead of calling sys_execve so we
272 * end up with proper pt_regs.
273 */
274int kernel_execve(const char *filename, char *const argv[], char *const envp[])
275{
276 register const char *__arg1 asm("2") = filename;
277 register char *const*__arg2 asm("3") = argv;
278 register char *const*__arg3 asm("4") = envp;
279 register long __svcres asm("2");
280 asm volatile(
281 "svc %b1"
282 : "=d" (__svcres)
283 : "i" (__NR_execve),
284 "0" (__arg1),
285 "d" (__arg2),
286 "d" (__arg3) : "memory");
287 return __svcres;
288}
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index c774f1069e10..cd8d321cd0c2 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -10,7 +10,7 @@
10 10
11NI_SYSCALL /* 0 */ 11NI_SYSCALL /* 0 */
12SYSCALL(sys_exit,sys_exit,sys32_exit_wrapper) 12SYSCALL(sys_exit,sys_exit,sys32_exit_wrapper)
13SYSCALL(sys_fork_glue,sys_fork_glue,sys_fork_glue) 13SYSCALL(sys_fork,sys_fork,sys_fork)
14SYSCALL(sys_read,sys_read,sys32_read_wrapper) 14SYSCALL(sys_read,sys_read,sys32_read_wrapper)
15SYSCALL(sys_write,sys_write,sys32_write_wrapper) 15SYSCALL(sys_write,sys_write,sys32_write_wrapper)
16SYSCALL(sys_open,sys_open,sys32_open_wrapper) /* 5 */ 16SYSCALL(sys_open,sys_open,sys32_open_wrapper) /* 5 */
@@ -19,7 +19,7 @@ SYSCALL(sys_restart_syscall,sys_restart_syscall,sys_restart_syscall)
19SYSCALL(sys_creat,sys_creat,sys32_creat_wrapper) 19SYSCALL(sys_creat,sys_creat,sys32_creat_wrapper)
20SYSCALL(sys_link,sys_link,sys32_link_wrapper) 20SYSCALL(sys_link,sys_link,sys32_link_wrapper)
21SYSCALL(sys_unlink,sys_unlink,sys32_unlink_wrapper) /* 10 */ 21SYSCALL(sys_unlink,sys_unlink,sys32_unlink_wrapper) /* 10 */
22SYSCALL(sys_execve_glue,sys_execve_glue,sys32_execve_glue) 22SYSCALL(sys_execve,sys_execve,sys32_execve)
23SYSCALL(sys_chdir,sys_chdir,sys32_chdir_wrapper) 23SYSCALL(sys_chdir,sys_chdir,sys32_chdir_wrapper)
24SYSCALL(sys_time,sys_ni_syscall,sys32_time_wrapper) /* old time syscall */ 24SYSCALL(sys_time,sys_ni_syscall,sys32_time_wrapper) /* old time syscall */
25SYSCALL(sys_mknod,sys_mknod,sys32_mknod_wrapper) 25SYSCALL(sys_mknod,sys_mknod,sys32_mknod_wrapper)
@@ -127,8 +127,8 @@ SYSCALL(sys_swapoff,sys_swapoff,sys32_swapoff_wrapper) /* 115 */
127SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper) 127SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper)
128SYSCALL(sys_ipc,sys_ipc,sys32_ipc_wrapper) 128SYSCALL(sys_ipc,sys_ipc,sys32_ipc_wrapper)
129SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper) 129SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper)
130SYSCALL(sys_sigreturn_glue,sys_sigreturn_glue,sys32_sigreturn_glue) 130SYSCALL(sys_sigreturn,sys_sigreturn,sys32_sigreturn)
131SYSCALL(sys_clone_glue,sys_clone_glue,sys32_clone_glue) /* 120 */ 131SYSCALL(sys_clone,sys_clone,sys32_clone) /* 120 */
132SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper) 132SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper)
133SYSCALL(sys_newuname,s390x_newuname,sys32_newuname_wrapper) 133SYSCALL(sys_newuname,s390x_newuname,sys32_newuname_wrapper)
134NI_SYSCALL /* modify_ldt for i386 */ 134NI_SYSCALL /* modify_ldt for i386 */
@@ -181,7 +181,7 @@ SYSCALL(sys_nfsservctl,sys_nfsservctl,compat_sys_nfsservctl_wrapper)
181SYSCALL(sys_setresgid16,sys_ni_syscall,sys32_setresgid16_wrapper) /* 170 old setresgid16 syscall */ 181SYSCALL(sys_setresgid16,sys_ni_syscall,sys32_setresgid16_wrapper) /* 170 old setresgid16 syscall */
182SYSCALL(sys_getresgid16,sys_ni_syscall,sys32_getresgid16_wrapper) /* old getresgid16 syscall */ 182SYSCALL(sys_getresgid16,sys_ni_syscall,sys32_getresgid16_wrapper) /* old getresgid16 syscall */
183SYSCALL(sys_prctl,sys_prctl,sys32_prctl_wrapper) 183SYSCALL(sys_prctl,sys_prctl,sys32_prctl_wrapper)
184SYSCALL(sys_rt_sigreturn_glue,sys_rt_sigreturn_glue,sys32_rt_sigreturn_glue) 184SYSCALL(sys_rt_sigreturn,sys_rt_sigreturn,sys32_rt_sigreturn)
185SYSCALL(sys_rt_sigaction,sys_rt_sigaction,sys32_rt_sigaction_wrapper) 185SYSCALL(sys_rt_sigaction,sys_rt_sigaction,sys32_rt_sigaction_wrapper)
186SYSCALL(sys_rt_sigprocmask,sys_rt_sigprocmask,sys32_rt_sigprocmask_wrapper) /* 175 */ 186SYSCALL(sys_rt_sigprocmask,sys_rt_sigprocmask,sys32_rt_sigprocmask_wrapper) /* 175 */
187SYSCALL(sys_rt_sigpending,sys_rt_sigpending,sys32_rt_sigpending_wrapper) 187SYSCALL(sys_rt_sigpending,sys_rt_sigpending,sys32_rt_sigpending_wrapper)
@@ -194,11 +194,11 @@ SYSCALL(sys_chown16,sys_ni_syscall,sys32_chown16_wrapper) /* old chown16 syscall
194SYSCALL(sys_getcwd,sys_getcwd,sys32_getcwd_wrapper) 194SYSCALL(sys_getcwd,sys_getcwd,sys32_getcwd_wrapper)
195SYSCALL(sys_capget,sys_capget,sys32_capget_wrapper) 195SYSCALL(sys_capget,sys_capget,sys32_capget_wrapper)
196SYSCALL(sys_capset,sys_capset,sys32_capset_wrapper) /* 185 */ 196SYSCALL(sys_capset,sys_capset,sys32_capset_wrapper) /* 185 */
197SYSCALL(sys_sigaltstack_glue,sys_sigaltstack_glue,sys32_sigaltstack_glue) 197SYSCALL(sys_sigaltstack,sys_sigaltstack,sys32_sigaltstack)
198SYSCALL(sys_sendfile,sys_sendfile64,sys32_sendfile_wrapper) 198SYSCALL(sys_sendfile,sys_sendfile64,sys32_sendfile_wrapper)
199NI_SYSCALL /* streams1 */ 199NI_SYSCALL /* streams1 */
200NI_SYSCALL /* streams2 */ 200NI_SYSCALL /* streams2 */
201SYSCALL(sys_vfork_glue,sys_vfork_glue,sys_vfork_glue) /* 190 */ 201SYSCALL(sys_vfork,sys_vfork,sys_vfork) /* 190 */
202SYSCALL(sys_getrlimit,sys_getrlimit,compat_sys_getrlimit_wrapper) 202SYSCALL(sys_getrlimit,sys_getrlimit,compat_sys_getrlimit_wrapper)
203SYSCALL(sys_mmap2,sys_mmap2,sys32_mmap2_wrapper) 203SYSCALL(sys_mmap2,sys_mmap2,sys32_mmap2_wrapper)
204SYSCALL(sys_truncate64,sys_ni_syscall,sys32_truncate64_wrapper) 204SYSCALL(sys_truncate64,sys_ni_syscall,sys32_truncate64_wrapper)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index e1ad464b6f20..711dae8da7ad 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -280,7 +280,6 @@ static void clock_comparator_interrupt(__u16 code)
280} 280}
281 281
282static void etr_reset(void); 282static void etr_reset(void);
283static void etr_init(void);
284static void etr_ext_handler(__u16); 283static void etr_ext_handler(__u16);
285 284
286/* 285/*
@@ -355,7 +354,6 @@ void __init time_init(void)
355#ifdef CONFIG_VIRT_TIMER 354#ifdef CONFIG_VIRT_TIMER
356 vtime_init(); 355 vtime_init();
357#endif 356#endif
358 etr_init();
359} 357}
360 358
361/* 359/*
@@ -426,11 +424,11 @@ static struct etr_aib etr_port1;
426static int etr_port1_uptodate; 424static int etr_port1_uptodate;
427static unsigned long etr_events; 425static unsigned long etr_events;
428static struct timer_list etr_timer; 426static struct timer_list etr_timer;
429static struct tasklet_struct etr_tasklet;
430static DEFINE_PER_CPU(atomic_t, etr_sync_word); 427static DEFINE_PER_CPU(atomic_t, etr_sync_word);
431 428
432static void etr_timeout(unsigned long dummy); 429static void etr_timeout(unsigned long dummy);
433static void etr_tasklet_fn(unsigned long dummy); 430static void etr_work_fn(struct work_struct *work);
431static DECLARE_WORK(etr_work, etr_work_fn);
434 432
435/* 433/*
436 * The etr get_clock function. It will write the current clock value 434 * The etr get_clock function. It will write the current clock value
@@ -507,29 +505,31 @@ static void etr_reset(void)
507 } 505 }
508} 506}
509 507
510static void etr_init(void) 508static int __init etr_init(void)
511{ 509{
512 struct etr_aib aib; 510 struct etr_aib aib;
513 511
514 if (test_bit(ETR_FLAG_ENOSYS, &etr_flags)) 512 if (test_bit(ETR_FLAG_ENOSYS, &etr_flags))
515 return; 513 return 0;
516 /* Check if this machine has the steai instruction. */ 514 /* Check if this machine has the steai instruction. */
517 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 515 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
518 set_bit(ETR_FLAG_STEAI, &etr_flags); 516 set_bit(ETR_FLAG_STEAI, &etr_flags);
519 setup_timer(&etr_timer, etr_timeout, 0UL); 517 setup_timer(&etr_timer, etr_timeout, 0UL);
520 tasklet_init(&etr_tasklet, etr_tasklet_fn, 0);
521 if (!etr_port0_online && !etr_port1_online) 518 if (!etr_port0_online && !etr_port1_online)
522 set_bit(ETR_FLAG_EACCES, &etr_flags); 519 set_bit(ETR_FLAG_EACCES, &etr_flags);
523 if (etr_port0_online) { 520 if (etr_port0_online) {
524 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 521 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
525 tasklet_hi_schedule(&etr_tasklet); 522 schedule_work(&etr_work);
526 } 523 }
527 if (etr_port1_online) { 524 if (etr_port1_online) {
528 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 525 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
529 tasklet_hi_schedule(&etr_tasklet); 526 schedule_work(&etr_work);
530 } 527 }
528 return 0;
531} 529}
532 530
531arch_initcall(etr_init);
532
533/* 533/*
534 * Two sorts of ETR machine checks. The architecture reads: 534 * Two sorts of ETR machine checks. The architecture reads:
535 * "When a machine-check niterruption occurs and if a switch-to-local or 535 * "When a machine-check niterruption occurs and if a switch-to-local or
@@ -549,7 +549,7 @@ void etr_switch_to_local(void)
549 return; 549 return;
550 etr_disable_sync_clock(NULL); 550 etr_disable_sync_clock(NULL);
551 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 551 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
552 tasklet_hi_schedule(&etr_tasklet); 552 schedule_work(&etr_work);
553} 553}
554 554
555/* 555/*
@@ -564,7 +564,7 @@ void etr_sync_check(void)
564 return; 564 return;
565 etr_disable_sync_clock(NULL); 565 etr_disable_sync_clock(NULL);
566 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 566 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
567 tasklet_hi_schedule(&etr_tasklet); 567 schedule_work(&etr_work);
568} 568}
569 569
570/* 570/*
@@ -591,13 +591,13 @@ static void etr_ext_handler(__u16 code)
591 * Both ports are not up-to-date now. 591 * Both ports are not up-to-date now.
592 */ 592 */
593 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 593 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
594 tasklet_hi_schedule(&etr_tasklet); 594 schedule_work(&etr_work);
595} 595}
596 596
597static void etr_timeout(unsigned long dummy) 597static void etr_timeout(unsigned long dummy)
598{ 598{
599 set_bit(ETR_EVENT_UPDATE, &etr_events); 599 set_bit(ETR_EVENT_UPDATE, &etr_events);
600 tasklet_hi_schedule(&etr_tasklet); 600 schedule_work(&etr_work);
601} 601}
602 602
603/* 603/*
@@ -927,7 +927,7 @@ static struct etr_eacr etr_handle_update(struct etr_aib *aib,
927 if (!eacr.e0 && !eacr.e1) 927 if (!eacr.e0 && !eacr.e1)
928 return eacr; 928 return eacr;
929 929
930 /* Update port0 or port1 with aib stored in etr_tasklet_fn. */ 930 /* Update port0 or port1 with aib stored in etr_work_fn. */
931 if (aib->esw.q == 0) { 931 if (aib->esw.q == 0) {
932 /* Information for port 0 stored. */ 932 /* Information for port 0 stored. */
933 if (eacr.p0 && !etr_port0_uptodate) { 933 if (eacr.p0 && !etr_port0_uptodate) {
@@ -1007,7 +1007,7 @@ static void etr_update_eacr(struct etr_eacr eacr)
1007 * particular this is the only function that calls etr_update_eacr(), 1007 * particular this is the only function that calls etr_update_eacr(),
1008 * it "controls" the etr control register. 1008 * it "controls" the etr control register.
1009 */ 1009 */
1010static void etr_tasklet_fn(unsigned long dummy) 1010static void etr_work_fn(struct work_struct *work)
1011{ 1011{
1012 unsigned long long now; 1012 unsigned long long now;
1013 struct etr_eacr eacr; 1013 struct etr_eacr eacr;
@@ -1220,13 +1220,13 @@ static ssize_t etr_online_store(struct sys_device *dev,
1220 return count; /* Nothing to do. */ 1220 return count; /* Nothing to do. */
1221 etr_port0_online = value; 1221 etr_port0_online = value;
1222 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1222 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1223 tasklet_hi_schedule(&etr_tasklet); 1223 schedule_work(&etr_work);
1224 } else { 1224 } else {
1225 if (etr_port1_online == value) 1225 if (etr_port1_online == value)
1226 return count; /* Nothing to do. */ 1226 return count; /* Nothing to do. */
1227 etr_port1_online = value; 1227 etr_port1_online = value;
1228 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1228 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1229 tasklet_hi_schedule(&etr_tasklet); 1229 schedule_work(&etr_work);
1230 } 1230 }
1231 return count; 1231 return count;
1232} 1232}
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index f0e5a320e2ec..49dec830373a 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -30,7 +30,7 @@
30#include <linux/kallsyms.h> 30#include <linux/kallsyms.h>
31#include <linux/reboot.h> 31#include <linux/reboot.h>
32#include <linux/kprobes.h> 32#include <linux/kprobes.h>
33 33#include <linux/bug.h>
34#include <asm/system.h> 34#include <asm/system.h>
35#include <asm/uaccess.h> 35#include <asm/uaccess.h>
36#include <asm/io.h> 36#include <asm/io.h>
@@ -188,18 +188,31 @@ void dump_stack(void)
188 188
189EXPORT_SYMBOL(dump_stack); 189EXPORT_SYMBOL(dump_stack);
190 190
191static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
192{
193 return (regs->psw.mask & bits) / ((~bits + 1) & bits);
194}
195
191void show_registers(struct pt_regs *regs) 196void show_registers(struct pt_regs *regs)
192{ 197{
193 mm_segment_t old_fs;
194 char *mode; 198 char *mode;
195 int i;
196 199
197 mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl"; 200 mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
198 printk("%s PSW : %p %p", 201 printk("%s PSW : %p %p",
199 mode, (void *) regs->psw.mask, 202 mode, (void *) regs->psw.mask,
200 (void *) regs->psw.addr); 203 (void *) regs->psw.addr);
201 print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN); 204 print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
202 printk("%s GPRS: " FOURLONG, mode, 205 printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
206 "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
207 mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
208 mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
209 mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
210 mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
211 mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
212#ifdef CONFIG_64BIT
213 printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
214#endif
215 printk("\n%s GPRS: " FOURLONG, mode,
203 regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]); 216 regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
204 printk(" " FOURLONG, 217 printk(" " FOURLONG,
205 regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]); 218 regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
@@ -208,41 +221,7 @@ void show_registers(struct pt_regs *regs)
208 printk(" " FOURLONG, 221 printk(" " FOURLONG,
209 regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]); 222 regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
210 223
211#if 0 224 show_code(regs);
212 /* FIXME: this isn't needed any more but it changes the ksymoops
213 * input. To remove or not to remove ... */
214 save_access_regs(regs->acrs);
215 printk("%s ACRS: %08x %08x %08x %08x\n", mode,
216 regs->acrs[0], regs->acrs[1], regs->acrs[2], regs->acrs[3]);
217 printk(" %08x %08x %08x %08x\n",
218 regs->acrs[4], regs->acrs[5], regs->acrs[6], regs->acrs[7]);
219 printk(" %08x %08x %08x %08x\n",
220 regs->acrs[8], regs->acrs[9], regs->acrs[10], regs->acrs[11]);
221 printk(" %08x %08x %08x %08x\n",
222 regs->acrs[12], regs->acrs[13], regs->acrs[14], regs->acrs[15]);
223#endif
224
225 /*
226 * Print the first 20 byte of the instruction stream at the
227 * time of the fault.
228 */
229 old_fs = get_fs();
230 if (regs->psw.mask & PSW_MASK_PSTATE)
231 set_fs(USER_DS);
232 else
233 set_fs(KERNEL_DS);
234 printk("%s Code: ", mode);
235 for (i = 0; i < 20; i++) {
236 unsigned char c;
237 if (__get_user(c, (char __user *)(regs->psw.addr + i))) {
238 printk(" Bad PSW.");
239 break;
240 }
241 printk("%02x ", c);
242 }
243 set_fs(old_fs);
244
245 printk("\n");
246} 225}
247 226
248/* This is called from fs/proc/array.c */ 227/* This is called from fs/proc/array.c */
@@ -318,6 +297,11 @@ report_user_fault(long interruption_code, struct pt_regs *regs)
318#endif 297#endif
319} 298}
320 299
300int is_valid_bugaddr(unsigned long addr)
301{
302 return 1;
303}
304
321static void __kprobes inline do_trap(long interruption_code, int signr, 305static void __kprobes inline do_trap(long interruption_code, int signr,
322 char *str, struct pt_regs *regs, 306 char *str, struct pt_regs *regs,
323 siginfo_t *info) 307 siginfo_t *info)
@@ -344,8 +328,14 @@ static void __kprobes inline do_trap(long interruption_code, int signr,
344 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN); 328 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
345 if (fixup) 329 if (fixup)
346 regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE; 330 regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
347 else 331 else {
348 die(str, regs, interruption_code); 332 enum bug_trap_type btt;
333
334 btt = report_bug(regs->psw.addr & PSW_ADDR_INSN);
335 if (btt == BUG_TRAP_TYPE_WARN)
336 return;
337 die(str, regs, interruption_code);
338 }
349 } 339 }
350} 340}
351 341
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index c30716ae130c..418f6426a949 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -45,6 +45,8 @@ SECTIONS
45 __ex_table : { *(__ex_table) } 45 __ex_table : { *(__ex_table) }
46 __stop___ex_table = .; 46 __stop___ex_table = .;
47 47
48 BUG_TABLE
49
48 .data : { /* Data */ 50 .data : { /* Data */
49 *(.data) 51 *(.data)
50 CONSTRUCTORS 52 CONSTRUCTORS
@@ -77,6 +79,12 @@ SECTIONS
77 *(.init.text) 79 *(.init.text)
78 _einittext = .; 80 _einittext = .;
79 } 81 }
82 /*
83 * .exit.text is discarded at runtime, not link time,
84 * to deal with references from __bug_table
85 */
86 .exit.text : { *(.exit.text) }
87
80 .init.data : { *(.init.data) } 88 .init.data : { *(.init.data) }
81 . = ALIGN(256); 89 . = ALIGN(256);
82 __setup_start = .; 90 __setup_start = .;
@@ -116,7 +124,7 @@ SECTIONS
116 124
117 /* Sections to be discarded */ 125 /* Sections to be discarded */
118 /DISCARD/ : { 126 /DISCARD/ : {
119 *(.exit.text) *(.exit.data) *(.exitcall.exit) 127 *(.exit.data) *(.exitcall.exit)
120 } 128 }
121 129
122 /* Stabs debugging sections. */ 130 /* Stabs debugging sections. */
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 9d5b02801b46..1e1a6ee2cac1 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -128,7 +128,7 @@ static inline void set_vtimer(__u64 expires)
128 S390_lowcore.last_update_timer = expires; 128 S390_lowcore.last_update_timer = expires;
129 129
130 /* store expire time for this CPU timer */ 130 /* store expire time for this CPU timer */
131 per_cpu(virt_cpu_timer, smp_processor_id()).to_expire = expires; 131 __get_cpu_var(virt_cpu_timer).to_expire = expires;
132} 132}
133#else 133#else
134static inline void set_vtimer(__u64 expires) 134static inline void set_vtimer(__u64 expires)
@@ -137,7 +137,7 @@ static inline void set_vtimer(__u64 expires)
137 asm volatile ("SPT %0" : : "m" (S390_lowcore.last_update_timer)); 137 asm volatile ("SPT %0" : : "m" (S390_lowcore.last_update_timer));
138 138
139 /* store expire time for this CPU timer */ 139 /* store expire time for this CPU timer */
140 per_cpu(virt_cpu_timer, smp_processor_id()).to_expire = expires; 140 __get_cpu_var(virt_cpu_timer).to_expire = expires;
141} 141}
142#endif 142#endif
143 143
@@ -145,7 +145,7 @@ static void start_cpu_timer(void)
145{ 145{
146 struct vtimer_queue *vt_list; 146 struct vtimer_queue *vt_list;
147 147
148 vt_list = &per_cpu(virt_cpu_timer, smp_processor_id()); 148 vt_list = &__get_cpu_var(virt_cpu_timer);
149 149
150 /* CPU timer interrupt is pending, don't reprogramm it */ 150 /* CPU timer interrupt is pending, don't reprogramm it */
151 if (vt_list->idle & 1LL<<63) 151 if (vt_list->idle & 1LL<<63)
@@ -159,7 +159,7 @@ static void stop_cpu_timer(void)
159{ 159{
160 struct vtimer_queue *vt_list; 160 struct vtimer_queue *vt_list;
161 161
162 vt_list = &per_cpu(virt_cpu_timer, smp_processor_id()); 162 vt_list = &__get_cpu_var(virt_cpu_timer);
163 163
164 /* nothing to do */ 164 /* nothing to do */
165 if (list_empty(&vt_list->list)) { 165 if (list_empty(&vt_list->list)) {
@@ -219,7 +219,7 @@ static void do_callbacks(struct list_head *cb_list)
219 if (list_empty(cb_list)) 219 if (list_empty(cb_list))
220 return; 220 return;
221 221
222 vt_list = &per_cpu(virt_cpu_timer, smp_processor_id()); 222 vt_list = &__get_cpu_var(virt_cpu_timer);
223 223
224 list_for_each_entry_safe(event, tmp, cb_list, entry) { 224 list_for_each_entry_safe(event, tmp, cb_list, entry) {
225 fn = event->function; 225 fn = event->function;
@@ -244,7 +244,6 @@ static void do_callbacks(struct list_head *cb_list)
244 */ 244 */
245static void do_cpu_timer_interrupt(__u16 error_code) 245static void do_cpu_timer_interrupt(__u16 error_code)
246{ 246{
247 int cpu;
248 __u64 next, delta; 247 __u64 next, delta;
249 struct vtimer_queue *vt_list; 248 struct vtimer_queue *vt_list;
250 struct vtimer_list *event, *tmp; 249 struct vtimer_list *event, *tmp;
@@ -253,8 +252,7 @@ static void do_cpu_timer_interrupt(__u16 error_code)
253 struct list_head cb_list; 252 struct list_head cb_list;
254 253
255 INIT_LIST_HEAD(&cb_list); 254 INIT_LIST_HEAD(&cb_list);
256 cpu = smp_processor_id(); 255 vt_list = &__get_cpu_var(virt_cpu_timer);
257 vt_list = &per_cpu(virt_cpu_timer, cpu);
258 256
259 /* walk timer list, fire all expired events */ 257 /* walk timer list, fire all expired events */
260 spin_lock(&vt_list->lock); 258 spin_lock(&vt_list->lock);
@@ -534,7 +532,7 @@ void init_cpu_vtimer(void)
534 /* enable cpu timer interrupts */ 532 /* enable cpu timer interrupts */
535 __ctl_set_bit(0,10); 533 __ctl_set_bit(0,10);
536 534
537 vt_list = &per_cpu(virt_cpu_timer, smp_processor_id()); 535 vt_list = &__get_cpu_var(virt_cpu_timer);
538 INIT_LIST_HEAD(&vt_list->list); 536 INIT_LIST_HEAD(&vt_list->list);
539 spin_lock_init(&vt_list->lock); 537 spin_lock_init(&vt_list->lock);
540 vt_list->to_expire = 0; 538 vt_list->to_expire = 0;
diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile
index 7a44fed21b35..59aea65ce99f 100644
--- a/arch/s390/lib/Makefile
+++ b/arch/s390/lib/Makefile
@@ -5,6 +5,6 @@
5EXTRA_AFLAGS := -traditional 5EXTRA_AFLAGS := -traditional
6 6
7lib-y += delay.o string.o uaccess_std.o uaccess_pt.o qrnnd.o 7lib-y += delay.o string.o uaccess_std.o uaccess_pt.o qrnnd.o
8lib-$(CONFIG_32BIT) += div64.o 8obj-$(CONFIG_32BIT) += div64.o
9lib-$(CONFIG_64BIT) += uaccess_mvcos.o 9lib-$(CONFIG_64BIT) += uaccess_mvcos.o
10lib-$(CONFIG_SMP) += spinlock.o 10lib-$(CONFIG_SMP) += spinlock.o
diff --git a/arch/s390/lib/div64.c b/arch/s390/lib/div64.c
index 0481f3424a13..a5f8300bf3ee 100644
--- a/arch/s390/lib/div64.c
+++ b/arch/s390/lib/div64.c
@@ -147,5 +147,3 @@ uint32_t __div64_32(uint64_t *n, uint32_t base)
147} 147}
148 148
149#endif /* MARCH_G5 */ 149#endif /* MARCH_G5 */
150
151EXPORT_SYMBOL(__div64_32);
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 7462aebd3eb6..2b76a879a7b5 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -26,9 +26,9 @@
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/hardirq.h> 27#include <linux/hardirq.h>
28#include <linux/kprobes.h> 28#include <linux/kprobes.h>
29#include <linux/uaccess.h>
29 30
30#include <asm/system.h> 31#include <asm/system.h>
31#include <asm/uaccess.h>
32#include <asm/pgtable.h> 32#include <asm/pgtable.h>
33#include <asm/kdebug.h> 33#include <asm/kdebug.h>
34#include <asm/s390_ext.h> 34#include <asm/s390_ext.h>
@@ -63,21 +63,25 @@ int unregister_page_fault_notifier(struct notifier_block *nb)
63 return atomic_notifier_chain_unregister(&notify_page_fault_chain, nb); 63 return atomic_notifier_chain_unregister(&notify_page_fault_chain, nb);
64} 64}
65 65
66static inline int notify_page_fault(enum die_val val, const char *str, 66static int __kprobes __notify_page_fault(struct pt_regs *regs, long err)
67 struct pt_regs *regs, long err, int trap, int sig)
68{ 67{
69 struct die_args args = { 68 struct die_args args = { .str = "page fault",
70 .regs = regs, 69 .trapnr = 14,
71 .str = str, 70 .signr = SIGSEGV };
72 .err = err, 71 args.regs = regs;
73 .trapnr = trap, 72 args.err = err;
74 .signr = sig 73 return atomic_notifier_call_chain(&notify_page_fault_chain,
75 }; 74 DIE_PAGE_FAULT, &args);
76 return atomic_notifier_call_chain(&notify_page_fault_chain, val, &args); 75}
76
77static inline int notify_page_fault(struct pt_regs *regs, long err)
78{
79 if (unlikely(kprobe_running()))
80 return __notify_page_fault(regs, err);
81 return NOTIFY_DONE;
77} 82}
78#else 83#else
79static inline int notify_page_fault(enum die_val val, const char *str, 84static inline int notify_page_fault(struct pt_regs *regs, long err)
80 struct pt_regs *regs, long err, int trap, int sig)
81{ 85{
82 return NOTIFY_DONE; 86 return NOTIFY_DONE;
83} 87}
@@ -170,74 +174,127 @@ static void do_sigsegv(struct pt_regs *regs, unsigned long error_code,
170 force_sig_info(SIGSEGV, &si, current); 174 force_sig_info(SIGSEGV, &si, current);
171} 175}
172 176
177static void do_no_context(struct pt_regs *regs, unsigned long error_code,
178 unsigned long address)
179{
180 const struct exception_table_entry *fixup;
181
182 /* Are we prepared to handle this kernel fault? */
183 fixup = search_exception_tables(regs->psw.addr & __FIXUP_MASK);
184 if (fixup) {
185 regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
186 return;
187 }
188
189 /*
190 * Oops. The kernel tried to access some bad page. We'll have to
191 * terminate things with extreme prejudice.
192 */
193 if (check_space(current) == 0)
194 printk(KERN_ALERT "Unable to handle kernel pointer dereference"
195 " at virtual kernel address %p\n", (void *)address);
196 else
197 printk(KERN_ALERT "Unable to handle kernel paging request"
198 " at virtual user address %p\n", (void *)address);
199
200 die("Oops", regs, error_code);
201 do_exit(SIGKILL);
202}
203
204static void do_low_address(struct pt_regs *regs, unsigned long error_code)
205{
206 /* Low-address protection hit in kernel mode means
207 NULL pointer write access in kernel mode. */
208 if (regs->psw.mask & PSW_MASK_PSTATE) {
209 /* Low-address protection hit in user mode 'cannot happen'. */
210 die ("Low-address protection", regs, error_code);
211 do_exit(SIGKILL);
212 }
213
214 do_no_context(regs, error_code, 0);
215}
216
217/*
218 * We ran out of memory, or some other thing happened to us that made
219 * us unable to handle the page fault gracefully.
220 */
221static int do_out_of_memory(struct pt_regs *regs, unsigned long error_code,
222 unsigned long address)
223{
224 struct task_struct *tsk = current;
225 struct mm_struct *mm = tsk->mm;
226
227 up_read(&mm->mmap_sem);
228 if (is_init(tsk)) {
229 yield();
230 down_read(&mm->mmap_sem);
231 return 1;
232 }
233 printk("VM: killing process %s\n", tsk->comm);
234 if (regs->psw.mask & PSW_MASK_PSTATE)
235 do_exit(SIGKILL);
236 do_no_context(regs, error_code, address);
237 return 0;
238}
239
240static void do_sigbus(struct pt_regs *regs, unsigned long error_code,
241 unsigned long address)
242{
243 struct task_struct *tsk = current;
244 struct mm_struct *mm = tsk->mm;
245
246 up_read(&mm->mmap_sem);
247 /*
248 * Send a sigbus, regardless of whether we were in kernel
249 * or user mode.
250 */
251 tsk->thread.prot_addr = address;
252 tsk->thread.trap_no = error_code;
253 force_sig(SIGBUS, tsk);
254
255 /* Kernel mode? Handle exceptions or die */
256 if (!(regs->psw.mask & PSW_MASK_PSTATE))
257 do_no_context(regs, error_code, address);
258}
259
173#ifdef CONFIG_S390_EXEC_PROTECT 260#ifdef CONFIG_S390_EXEC_PROTECT
174extern long sys_sigreturn(struct pt_regs *regs); 261extern long sys_sigreturn(struct pt_regs *regs);
175extern long sys_rt_sigreturn(struct pt_regs *regs); 262extern long sys_rt_sigreturn(struct pt_regs *regs);
176extern long sys32_sigreturn(struct pt_regs *regs); 263extern long sys32_sigreturn(struct pt_regs *regs);
177extern long sys32_rt_sigreturn(struct pt_regs *regs); 264extern long sys32_rt_sigreturn(struct pt_regs *regs);
178 265
179static inline void do_sigreturn(struct mm_struct *mm, struct pt_regs *regs, 266static int signal_return(struct mm_struct *mm, struct pt_regs *regs,
180 int rt) 267 unsigned long address, unsigned long error_code)
181{ 268{
269 u16 instruction;
270 int rc, compat;
271
272 pagefault_disable();
273 rc = __get_user(instruction, (u16 __user *) regs->psw.addr);
274 pagefault_enable();
275 if (rc)
276 return -EFAULT;
277
182 up_read(&mm->mmap_sem); 278 up_read(&mm->mmap_sem);
183 clear_tsk_thread_flag(current, TIF_SINGLE_STEP); 279 clear_tsk_thread_flag(current, TIF_SINGLE_STEP);
184#ifdef CONFIG_COMPAT 280#ifdef CONFIG_COMPAT
185 if (test_tsk_thread_flag(current, TIF_31BIT)) { 281 compat = test_tsk_thread_flag(current, TIF_31BIT);
186 if (rt) 282 if (compat && instruction == 0x0a77)
187 sys32_rt_sigreturn(regs); 283 sys32_sigreturn(regs);
188 else 284 else if (compat && instruction == 0x0aad)
189 sys32_sigreturn(regs); 285 sys32_rt_sigreturn(regs);
190 return;
191 }
192#endif /* CONFIG_COMPAT */
193 if (rt)
194 sys_rt_sigreturn(regs);
195 else 286 else
287#endif
288 if (instruction == 0x0a77)
196 sys_sigreturn(regs); 289 sys_sigreturn(regs);
197 return; 290 else if (instruction == 0x0aad)
198} 291 sys_rt_sigreturn(regs);
199
200static int signal_return(struct mm_struct *mm, struct pt_regs *regs,
201 unsigned long address, unsigned long error_code)
202{
203 pgd_t *pgd;
204 pmd_t *pmd;
205 pte_t *pte;
206 u16 *instruction;
207 unsigned long pfn, uaddr = regs->psw.addr;
208
209 spin_lock(&mm->page_table_lock);
210 pgd = pgd_offset(mm, uaddr);
211 if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd)))
212 goto out_fault;
213 pmd = pmd_offset(pgd, uaddr);
214 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd)))
215 goto out_fault;
216 pte = pte_offset_map(pmd_offset(pgd_offset(mm, uaddr), uaddr), uaddr);
217 if (!pte || !pte_present(*pte))
218 goto out_fault;
219 pfn = pte_pfn(*pte);
220 if (!pfn_valid(pfn))
221 goto out_fault;
222 spin_unlock(&mm->page_table_lock);
223
224 instruction = (u16 *) ((pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE-1)));
225 if (*instruction == 0x0a77)
226 do_sigreturn(mm, regs, 0);
227 else if (*instruction == 0x0aad)
228 do_sigreturn(mm, regs, 1);
229 else { 292 else {
230 printk("- XXX - do_exception: task = %s, primary, NO EXEC "
231 "-> SIGSEGV\n", current->comm);
232 up_read(&mm->mmap_sem);
233 current->thread.prot_addr = address; 293 current->thread.prot_addr = address;
234 current->thread.trap_no = error_code; 294 current->thread.trap_no = error_code;
235 do_sigsegv(regs, error_code, SEGV_MAPERR, address); 295 do_sigsegv(regs, error_code, SEGV_MAPERR, address);
236 } 296 }
237 return 0; 297 return 0;
238out_fault:
239 spin_unlock(&mm->page_table_lock);
240 return -EFAULT;
241} 298}
242#endif /* CONFIG_S390_EXEC_PROTECT */ 299#endif /* CONFIG_S390_EXEC_PROTECT */
243 300
@@ -253,49 +310,23 @@ out_fault:
253 * 3b Region third trans. -> Not present (nullification) 310 * 3b Region third trans. -> Not present (nullification)
254 */ 311 */
255static inline void 312static inline void
256do_exception(struct pt_regs *regs, unsigned long error_code, int is_protection) 313do_exception(struct pt_regs *regs, unsigned long error_code, int write)
257{ 314{
258 struct task_struct *tsk; 315 struct task_struct *tsk;
259 struct mm_struct *mm; 316 struct mm_struct *mm;
260 struct vm_area_struct * vma; 317 struct vm_area_struct *vma;
261 unsigned long address; 318 unsigned long address;
262 const struct exception_table_entry *fixup;
263 int si_code;
264 int space; 319 int space;
320 int si_code;
265 321
266 tsk = current; 322 if (notify_page_fault(regs, error_code) == NOTIFY_STOP)
267 mm = tsk->mm;
268
269 if (notify_page_fault(DIE_PAGE_FAULT, "page fault", regs, error_code, 14,
270 SIGSEGV) == NOTIFY_STOP)
271 return; 323 return;
272 324
273 /* 325 tsk = current;
274 * Check for low-address protection. This needs to be treated 326 mm = tsk->mm;
275 * as a special case because the translation exception code
276 * field is not guaranteed to contain valid data in this case.
277 */
278 if (is_protection && !(S390_lowcore.trans_exc_code & 4)) {
279
280 /* Low-address protection hit in kernel mode means
281 NULL pointer write access in kernel mode. */
282 if (!(regs->psw.mask & PSW_MASK_PSTATE)) {
283 address = 0;
284 space = 0;
285 goto no_context;
286 }
287
288 /* Low-address protection hit in user mode 'cannot happen'. */
289 die ("Low-address protection", regs, error_code);
290 do_exit(SIGKILL);
291 }
292 327
293 /* 328 /* get the failing address and the affected space */
294 * get the failing address 329 address = S390_lowcore.trans_exc_code & __FAIL_ADDR_MASK;
295 * more specific the segment and page table portion of
296 * the address
297 */
298 address = S390_lowcore.trans_exc_code & __FAIL_ADDR_MASK;
299 space = check_space(tsk); 330 space = check_space(tsk);
300 331
301 /* 332 /*
@@ -313,7 +344,7 @@ do_exception(struct pt_regs *regs, unsigned long error_code, int is_protection)
313 */ 344 */
314 local_irq_enable(); 345 local_irq_enable();
315 346
316 down_read(&mm->mmap_sem); 347 down_read(&mm->mmap_sem);
317 348
318 si_code = SEGV_MAPERR; 349 si_code = SEGV_MAPERR;
319 vma = find_vma(mm, address); 350 vma = find_vma(mm, address);
@@ -330,19 +361,19 @@ do_exception(struct pt_regs *regs, unsigned long error_code, int is_protection)
330 return; 361 return;
331#endif 362#endif
332 363
333 if (vma->vm_start <= address) 364 if (vma->vm_start <= address)
334 goto good_area; 365 goto good_area;
335 if (!(vma->vm_flags & VM_GROWSDOWN)) 366 if (!(vma->vm_flags & VM_GROWSDOWN))
336 goto bad_area; 367 goto bad_area;
337 if (expand_stack(vma, address)) 368 if (expand_stack(vma, address))
338 goto bad_area; 369 goto bad_area;
339/* 370/*
340 * Ok, we have a good vm_area for this memory access, so 371 * Ok, we have a good vm_area for this memory access, so
341 * we can handle it.. 372 * we can handle it..
342 */ 373 */
343good_area: 374good_area:
344 si_code = SEGV_ACCERR; 375 si_code = SEGV_ACCERR;
345 if (!is_protection) { 376 if (!write) {
346 /* page not present, check vm flags */ 377 /* page not present, check vm flags */
347 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) 378 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
348 goto bad_area; 379 goto bad_area;
@@ -357,7 +388,7 @@ survive:
357 * make sure we exit gracefully rather than endlessly redo 388 * make sure we exit gracefully rather than endlessly redo
358 * the fault. 389 * the fault.
359 */ 390 */
360 switch (handle_mm_fault(mm, vma, address, is_protection)) { 391 switch (handle_mm_fault(mm, vma, address, write)) {
361 case VM_FAULT_MINOR: 392 case VM_FAULT_MINOR:
362 tsk->min_flt++; 393 tsk->min_flt++;
363 break; 394 break;
@@ -365,9 +396,12 @@ survive:
365 tsk->maj_flt++; 396 tsk->maj_flt++;
366 break; 397 break;
367 case VM_FAULT_SIGBUS: 398 case VM_FAULT_SIGBUS:
368 goto do_sigbus; 399 do_sigbus(regs, error_code, address);
400 return;
369 case VM_FAULT_OOM: 401 case VM_FAULT_OOM:
370 goto out_of_memory; 402 if (do_out_of_memory(regs, error_code, address))
403 goto survive;
404 return;
371 default: 405 default:
372 BUG(); 406 BUG();
373 } 407 }
@@ -385,75 +419,34 @@ survive:
385 * Fix it, but check if it's kernel or user first.. 419 * Fix it, but check if it's kernel or user first..
386 */ 420 */
387bad_area: 421bad_area:
388 up_read(&mm->mmap_sem); 422 up_read(&mm->mmap_sem);
389 423
390 /* User mode accesses just cause a SIGSEGV */ 424 /* User mode accesses just cause a SIGSEGV */
391 if (regs->psw.mask & PSW_MASK_PSTATE) { 425 if (regs->psw.mask & PSW_MASK_PSTATE) {
392 tsk->thread.prot_addr = address; 426 tsk->thread.prot_addr = address;
393 tsk->thread.trap_no = error_code; 427 tsk->thread.trap_no = error_code;
394 do_sigsegv(regs, error_code, si_code, address); 428 do_sigsegv(regs, error_code, si_code, address);
395 return; 429 return;
396 } 430 }
397 431
398no_context: 432no_context:
399 /* Are we prepared to handle this kernel fault? */ 433 do_no_context(regs, error_code, address);
400 fixup = search_exception_tables(regs->psw.addr & __FIXUP_MASK);
401 if (fixup) {
402 regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
403 return;
404 }
405
406/*
407 * Oops. The kernel tried to access some bad page. We'll have to
408 * terminate things with extreme prejudice.
409 */
410 if (space == 0)
411 printk(KERN_ALERT "Unable to handle kernel pointer dereference"
412 " at virtual kernel address %p\n", (void *)address);
413 else
414 printk(KERN_ALERT "Unable to handle kernel paging request"
415 " at virtual user address %p\n", (void *)address);
416
417 die("Oops", regs, error_code);
418 do_exit(SIGKILL);
419
420
421/*
422 * We ran out of memory, or some other thing happened to us that made
423 * us unable to handle the page fault gracefully.
424*/
425out_of_memory:
426 up_read(&mm->mmap_sem);
427 if (is_init(tsk)) {
428 yield();
429 down_read(&mm->mmap_sem);
430 goto survive;
431 }
432 printk("VM: killing process %s\n", tsk->comm);
433 if (regs->psw.mask & PSW_MASK_PSTATE)
434 do_exit(SIGKILL);
435 goto no_context;
436
437do_sigbus:
438 up_read(&mm->mmap_sem);
439
440 /*
441 * Send a sigbus, regardless of whether we were in kernel
442 * or user mode.
443 */
444 tsk->thread.prot_addr = address;
445 tsk->thread.trap_no = error_code;
446 force_sig(SIGBUS, tsk);
447
448 /* Kernel mode? Handle exceptions or die */
449 if (!(regs->psw.mask & PSW_MASK_PSTATE))
450 goto no_context;
451} 434}
452 435
453void __kprobes do_protection_exception(struct pt_regs *regs, 436void __kprobes do_protection_exception(struct pt_regs *regs,
454 unsigned long error_code) 437 unsigned long error_code)
455{ 438{
439 /* Protection exception is supressing, decrement psw address. */
456 regs->psw.addr -= (error_code >> 16); 440 regs->psw.addr -= (error_code >> 16);
441 /*
442 * Check for low-address protection. This needs to be treated
443 * as a special case because the translation exception code
444 * field is not guaranteed to contain valid data in this case.
445 */
446 if (unlikely(!(S390_lowcore.trans_exc_code & 4))) {
447 do_low_address(regs, error_code);
448 return;
449 }
457 do_exception(regs, 4, 1); 450 do_exception(regs, 4, 1);
458} 451}
459 452
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index b5681e3f9684..0b9cca5c7cb4 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5lib-y = delay.o memset.o memmove.o memchr.o \ 5lib-y = delay.o memset.o memmove.o memchr.o \
6 checksum.o strcasecmp.o strlen.o div64.o udivdi3.o \ 6 checksum.o strlen.o div64.o udivdi3.o \
7 div64-generic.o 7 div64-generic.o
8 8
9memcpy-y := memcpy.o 9memcpy-y := memcpy.o
diff --git a/arch/sh/lib/strcasecmp.c b/arch/sh/lib/strcasecmp.c
deleted file mode 100644
index 4e57a216feaf..000000000000
--- a/arch/sh/lib/strcasecmp.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/arch/alpha/lib/strcasecmp.c
3 */
4
5#include <linux/string.h>
6
7
8/* We handle nothing here except the C locale. Since this is used in
9 only one place, on strings known to contain only 7 bit ASCII, this
10 is ok. */
11
12int strcasecmp(const char *a, const char *b)
13{
14 int ca, cb;
15
16 do {
17 ca = *a++ & 0xff;
18 cb = *b++ & 0xff;
19 if (ca >= 'A' && ca <= 'Z')
20 ca += 'a' - 'A';
21 if (cb >= 'A' && cb <= 'Z')
22 cb += 'a' - 'A';
23 } while (ca == cb && ca != '\0');
24
25 return ca - cb;
26}
diff --git a/arch/sparc/kernel/ebus.c b/arch/sparc/kernel/ebus.c
index ba58c3a061fd..7bb86b9cdaa3 100644
--- a/arch/sparc/kernel/ebus.c
+++ b/arch/sparc/kernel/ebus.c
@@ -25,7 +25,7 @@
25struct linux_ebus *ebus_chain = NULL; 25struct linux_ebus *ebus_chain = NULL;
26 26
27/* We are together with pcic.c under CONFIG_PCI. */ 27/* We are together with pcic.c under CONFIG_PCI. */
28extern unsigned int pcic_pin_to_irq(unsigned int, char *name); 28extern unsigned int pcic_pin_to_irq(unsigned int, const char *name);
29 29
30/* 30/*
31 * IRQ Blacklist 31 * IRQ Blacklist
@@ -69,7 +69,7 @@ static inline unsigned long ebus_alloc(size_t size)
69 69
70/* 70/*
71 */ 71 */
72int __init ebus_blacklist_irq(char *name) 72int __init ebus_blacklist_irq(const char *name)
73{ 73{
74 struct ebus_device_irq *dp; 74 struct ebus_device_irq *dp;
75 75
@@ -86,8 +86,8 @@ int __init ebus_blacklist_irq(char *name)
86void __init fill_ebus_child(struct device_node *dp, 86void __init fill_ebus_child(struct device_node *dp,
87 struct linux_ebus_child *dev) 87 struct linux_ebus_child *dev)
88{ 88{
89 int *regs; 89 const int *regs;
90 int *irqs; 90 const int *irqs;
91 int i, len; 91 int i, len;
92 92
93 dev->prom_node = dp; 93 dev->prom_node = dp;
@@ -146,9 +146,9 @@ void __init fill_ebus_child(struct device_node *dp,
146 146
147void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev) 147void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev)
148{ 148{
149 struct linux_prom_registers *regs; 149 const struct linux_prom_registers *regs;
150 struct linux_ebus_child *child; 150 struct linux_ebus_child *child;
151 int *irqs; 151 const int *irqs;
152 int i, n, len; 152 int i, n, len;
153 unsigned long baseaddr; 153 unsigned long baseaddr;
154 154
@@ -269,7 +269,7 @@ void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *d
269 269
270void __init ebus_init(void) 270void __init ebus_init(void)
271{ 271{
272 struct linux_prom_pci_registers *regs; 272 const struct linux_prom_pci_registers *regs;
273 struct linux_pbm_info *pbm; 273 struct linux_pbm_info *pbm;
274 struct linux_ebus_device *dev; 274 struct linux_ebus_device *dev;
275 struct linux_ebus *ebus; 275 struct linux_ebus *ebus;
diff --git a/arch/sparc/kernel/of_device.c b/arch/sparc/kernel/of_device.c
index 48c24f7518c2..fd7f8cb668a3 100644
--- a/arch/sparc/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device.c
@@ -210,7 +210,7 @@ struct of_bus {
210 int *addrc, int *sizec); 210 int *addrc, int *sizec);
211 int (*map)(u32 *addr, const u32 *range, 211 int (*map)(u32 *addr, const u32 *range,
212 int na, int ns, int pna); 212 int na, int ns, int pna);
213 unsigned int (*get_flags)(u32 *addr); 213 unsigned int (*get_flags)(const u32 *addr);
214}; 214};
215 215
216/* 216/*
@@ -270,7 +270,7 @@ static int of_bus_default_map(u32 *addr, const u32 *range,
270 return 0; 270 return 0;
271} 271}
272 272
273static unsigned int of_bus_default_get_flags(u32 *addr) 273static unsigned int of_bus_default_get_flags(const u32 *addr)
274{ 274{
275 return IORESOURCE_MEM; 275 return IORESOURCE_MEM;
276} 276}
@@ -334,7 +334,7 @@ static int of_bus_pci_map(u32 *addr, const u32 *range,
334 return 0; 334 return 0;
335} 335}
336 336
337static unsigned int of_bus_pci_get_flags(u32 *addr) 337static unsigned int of_bus_pci_get_flags(const u32 *addr)
338{ 338{
339 unsigned int flags = 0; 339 unsigned int flags = 0;
340 u32 w = addr[0]; 340 u32 w = addr[0];
@@ -375,7 +375,7 @@ static int of_bus_sbus_map(u32 *addr, const u32 *range, int na, int ns, int pna)
375 return of_bus_default_map(addr, range, na, ns, pna); 375 return of_bus_default_map(addr, range, na, ns, pna);
376} 376}
377 377
378static unsigned int of_bus_sbus_get_flags(u32 *addr) 378static unsigned int of_bus_sbus_get_flags(const u32 *addr)
379{ 379{
380 return IORESOURCE_MEM; 380 return IORESOURCE_MEM;
381} 381}
@@ -432,7 +432,7 @@ static int __init build_one_resource(struct device_node *parent,
432 u32 *addr, 432 u32 *addr,
433 int na, int ns, int pna) 433 int na, int ns, int pna)
434{ 434{
435 u32 *ranges; 435 const u32 *ranges;
436 unsigned int rlen; 436 unsigned int rlen;
437 int rone; 437 int rone;
438 438
@@ -470,7 +470,7 @@ static void __init build_device_resources(struct of_device *op,
470 struct of_bus *bus; 470 struct of_bus *bus;
471 int na, ns; 471 int na, ns;
472 int index, num_reg; 472 int index, num_reg;
473 void *preg; 473 const void *preg;
474 474
475 if (!parent) 475 if (!parent)
476 return; 476 return;
@@ -492,7 +492,7 @@ static void __init build_device_resources(struct of_device *op,
492 for (index = 0; index < num_reg; index++) { 492 for (index = 0; index < num_reg; index++) {
493 struct resource *r = &op->resource[index]; 493 struct resource *r = &op->resource[index];
494 u32 addr[OF_MAX_ADDR_CELLS]; 494 u32 addr[OF_MAX_ADDR_CELLS];
495 u32 *reg = (preg + (index * ((na + ns) * 4))); 495 const u32 *reg = (preg + (index * ((na + ns) * 4)));
496 struct device_node *dp = op->node; 496 struct device_node *dp = op->node;
497 struct device_node *pp = p_op->node; 497 struct device_node *pp = p_op->node;
498 struct of_bus *pbus, *dbus; 498 struct of_bus *pbus, *dbus;
@@ -559,7 +559,7 @@ static struct of_device * __init scan_one_device(struct device_node *dp,
559 struct device *parent) 559 struct device *parent)
560{ 560{
561 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); 561 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
562 struct linux_prom_irqs *intr; 562 const struct linux_prom_irqs *intr;
563 int len, i; 563 int len, i;
564 564
565 if (!op) 565 if (!op)
@@ -579,7 +579,8 @@ static struct of_device * __init scan_one_device(struct device_node *dp,
579 for (i = 0; i < op->num_irqs; i++) 579 for (i = 0; i < op->num_irqs; i++)
580 op->irqs[i] = intr[i].pri; 580 op->irqs[i] = intr[i].pri;
581 } else { 581 } else {
582 unsigned int *irq = of_get_property(dp, "interrupts", &len); 582 const unsigned int *irq =
583 of_get_property(dp, "interrupts", &len);
583 584
584 if (irq) { 585 if (irq) {
585 op->num_irqs = len / sizeof(unsigned int); 586 op->num_irqs = len / sizeof(unsigned int);
@@ -594,7 +595,7 @@ static struct of_device * __init scan_one_device(struct device_node *dp,
594 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0, 595 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
595 }; 596 };
596 struct device_node *io_unit, *sbi = dp->parent; 597 struct device_node *io_unit, *sbi = dp->parent;
597 struct linux_prom_registers *regs; 598 const struct linux_prom_registers *regs;
598 int board, slot; 599 int board, slot;
599 600
600 while (sbi) { 601 while (sbi) {
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 1c927c538b8b..5ca7e8f42bd9 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -37,8 +37,6 @@
37#include <asm/irq_regs.h> 37#include <asm/irq_regs.h>
38 38
39 39
40unsigned int pcic_pin_to_irq(unsigned int pin, char *name);
41
42/* 40/*
43 * I studied different documents and many live PROMs both from 2.30 41 * I studied different documents and many live PROMs both from 2.30
44 * family and 3.xx versions. I came to the amazing conclusion: there is 42 * family and 3.xx versions. I came to the amazing conclusion: there is
@@ -681,7 +679,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
681 * pcic_pin_to_irq() is exported to ebus.c. 679 * pcic_pin_to_irq() is exported to ebus.c.
682 */ 680 */
683unsigned int 681unsigned int
684pcic_pin_to_irq(unsigned int pin, char *name) 682pcic_pin_to_irq(unsigned int pin, const char *name)
685{ 683{
686 struct linux_pcic *pcic = &pcic0; 684 struct linux_pcic *pcic = &pcic0;
687 unsigned int irq; 685 unsigned int irq;
diff --git a/arch/sparc/kernel/prom.c b/arch/sparc/kernel/prom.c
index 2cc302b6bec0..eed140b3c739 100644
--- a/arch/sparc/kernel/prom.c
+++ b/arch/sparc/kernel/prom.c
@@ -32,12 +32,13 @@ static struct device_node *allnodes;
32 */ 32 */
33static DEFINE_RWLOCK(devtree_lock); 33static DEFINE_RWLOCK(devtree_lock);
34 34
35int of_device_is_compatible(struct device_node *device, const char *compat) 35int of_device_is_compatible(const struct device_node *device,
36 const char *compat)
36{ 37{
37 const char* cp; 38 const char* cp;
38 int cplen, l; 39 int cplen, l;
39 40
40 cp = (char *) of_get_property(device, "compatible", &cplen); 41 cp = of_get_property(device, "compatible", &cplen);
41 if (cp == NULL) 42 if (cp == NULL)
42 return 0; 43 return 0;
43 while (cplen > 0) { 44 while (cplen > 0) {
@@ -150,13 +151,14 @@ struct device_node *of_find_compatible_node(struct device_node *from,
150} 151}
151EXPORT_SYMBOL(of_find_compatible_node); 152EXPORT_SYMBOL(of_find_compatible_node);
152 153
153struct property *of_find_property(struct device_node *np, const char *name, 154struct property *of_find_property(const struct device_node *np,
155 const char *name,
154 int *lenp) 156 int *lenp)
155{ 157{
156 struct property *pp; 158 struct property *pp;
157 159
158 for (pp = np->properties; pp != 0; pp = pp->next) { 160 for (pp = np->properties; pp != 0; pp = pp->next) {
159 if (strcmp(pp->name, name) == 0) { 161 if (strcasecmp(pp->name, name) == 0) {
160 if (lenp != 0) 162 if (lenp != 0)
161 *lenp = pp->length; 163 *lenp = pp->length;
162 break; 164 break;
@@ -170,7 +172,8 @@ EXPORT_SYMBOL(of_find_property);
170 * Find a property with a given name for a given node 172 * Find a property with a given name for a given node
171 * and return the value. 173 * and return the value.
172 */ 174 */
173void *of_get_property(struct device_node *np, const char *name, int *lenp) 175const void *of_get_property(const struct device_node *np, const char *name,
176 int *lenp)
174{ 177{
175 struct property *pp = of_find_property(np,name,lenp); 178 struct property *pp = of_find_property(np,name,lenp);
176 return pp ? pp->value : NULL; 179 return pp ? pp->value : NULL;
@@ -192,7 +195,7 @@ EXPORT_SYMBOL(of_getintprop_default);
192 195
193int of_n_addr_cells(struct device_node *np) 196int of_n_addr_cells(struct device_node *np)
194{ 197{
195 int* ip; 198 const int* ip;
196 do { 199 do {
197 if (np->parent) 200 if (np->parent)
198 np = np->parent; 201 np = np->parent;
@@ -207,7 +210,7 @@ EXPORT_SYMBOL(of_n_addr_cells);
207 210
208int of_n_size_cells(struct device_node *np) 211int of_n_size_cells(struct device_node *np)
209{ 212{
210 int* ip; 213 const int* ip;
211 do { 214 do {
212 if (np->parent) 215 if (np->parent)
213 np = np->parent; 216 np = np->parent;
@@ -239,7 +242,7 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
239 while (*prevp) { 242 while (*prevp) {
240 struct property *prop = *prevp; 243 struct property *prop = *prevp;
241 244
242 if (!strcmp(prop->name, name)) { 245 if (!strcasecmp(prop->name, name)) {
243 void *old_val = prop->value; 246 void *old_val = prop->value;
244 int ret; 247 int ret;
245 248
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 9bb1240aaf8a..f1401b57ccc7 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -301,7 +301,7 @@ static __inline__ void sun4_clock_probe(void)
301static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) 301static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
302{ 302{
303 struct device_node *dp = op->node; 303 struct device_node *dp = op->node;
304 char *model = of_get_property(dp, "model", NULL); 304 const char *model = of_get_property(dp, "model", NULL);
305 305
306 if (!model) 306 if (!model)
307 return -ENODEV; 307 return -ENODEV;
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 1a6348b565fb..590a41b864b9 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -19,6 +19,14 @@ config SPARC64
19 SPARC64 ports; its web page is available at 19 SPARC64 ports; its web page is available at
20 <http://www.ultralinux.org/>. 20 <http://www.ultralinux.org/>.
21 21
22config GENERIC_TIME
23 bool
24 default y
25
26config GENERIC_CLOCKEVENTS
27 bool
28 default y
29
22config 64BIT 30config 64BIT
23 def_bool y 31 def_bool y
24 32
@@ -34,10 +42,6 @@ config LOCKDEP_SUPPORT
34 bool 42 bool
35 default y 43 default y
36 44
37config TIME_INTERPOLATION
38 bool
39 default y
40
41config ARCH_MAY_HAVE_PC_FDC 45config ARCH_MAY_HAVE_PC_FDC
42 bool 46 bool
43 default y 47 default y
@@ -113,6 +117,8 @@ config GENERIC_HARDIRQS
113 117
114menu "General machine setup" 118menu "General machine setup"
115 119
120source "kernel/time/Kconfig"
121
116config SMP 122config SMP
117 bool "Symmetric multi-processing support" 123 bool "Symmetric multi-processing support"
118 ---help--- 124 ---help---
@@ -214,6 +220,7 @@ config ARCH_SPARSEMEM_ENABLE
214 220
215config ARCH_SPARSEMEM_DEFAULT 221config ARCH_SPARSEMEM_DEFAULT
216 def_bool y 222 def_bool y
223 select SPARSEMEM_STATIC
217 224
218config LARGE_ALLOCS 225config LARGE_ALLOCS
219 def_bool y 226 def_bool y
diff --git a/arch/sparc64/kernel/central.c b/arch/sparc64/kernel/central.c
index e724c54af029..c65b2f9c98d8 100644
--- a/arch/sparc64/kernel/central.c
+++ b/arch/sparc64/kernel/central.c
@@ -32,7 +32,7 @@ static void central_probe_failure(int line)
32static void central_ranges_init(struct linux_central *central) 32static void central_ranges_init(struct linux_central *central)
33{ 33{
34 struct device_node *dp = central->prom_node; 34 struct device_node *dp = central->prom_node;
35 void *pval; 35 const void *pval;
36 int len; 36 int len;
37 37
38 central->num_central_ranges = 0; 38 central->num_central_ranges = 0;
@@ -47,7 +47,7 @@ static void central_ranges_init(struct linux_central *central)
47static void fhc_ranges_init(struct linux_fhc *fhc) 47static void fhc_ranges_init(struct linux_fhc *fhc)
48{ 48{
49 struct device_node *dp = fhc->prom_node; 49 struct device_node *dp = fhc->prom_node;
50 void *pval; 50 const void *pval;
51 int len; 51 int len;
52 52
53 fhc->num_fhc_ranges = 0; 53 fhc->num_fhc_ranges = 0;
@@ -119,7 +119,7 @@ static unsigned long prom_reg_to_paddr(struct linux_prom_registers *r)
119static void probe_other_fhcs(void) 119static void probe_other_fhcs(void)
120{ 120{
121 struct device_node *dp; 121 struct device_node *dp;
122 struct linux_prom64_registers *fpregs; 122 const struct linux_prom64_registers *fpregs;
123 123
124 for_each_node_by_name(dp, "fhc") { 124 for_each_node_by_name(dp, "fhc") {
125 struct linux_fhc *fhc; 125 struct linux_fhc *fhc;
@@ -190,7 +190,8 @@ static void probe_clock_board(struct linux_central *central,
190 struct device_node *fp) 190 struct device_node *fp)
191{ 191{
192 struct device_node *dp; 192 struct device_node *dp;
193 struct linux_prom_registers cregs[3], *pr; 193 struct linux_prom_registers cregs[3];
194 const struct linux_prom_registers *pr;
194 int nslots, tmp, nregs; 195 int nslots, tmp, nregs;
195 196
196 dp = fp->child; 197 dp = fp->child;
@@ -299,7 +300,8 @@ static void init_all_fhc_hw(void)
299 300
300void central_probe(void) 301void central_probe(void)
301{ 302{
302 struct linux_prom_registers fpregs[6], *pr; 303 struct linux_prom_registers fpregs[6];
304 const struct linux_prom_registers *pr;
303 struct linux_fhc *fhc; 305 struct linux_fhc *fhc;
304 struct device_node *dp, *fp; 306 struct device_node *dp, *fp;
305 int err; 307 int err;
diff --git a/arch/sparc64/kernel/chmc.c b/arch/sparc64/kernel/chmc.c
index 9699abeb9907..777d34577045 100644
--- a/arch/sparc64/kernel/chmc.c
+++ b/arch/sparc64/kernel/chmc.c
@@ -343,8 +343,8 @@ static int init_one_mctrl(struct device_node *dp)
343{ 343{
344 struct mctrl_info *mp = kzalloc(sizeof(*mp), GFP_KERNEL); 344 struct mctrl_info *mp = kzalloc(sizeof(*mp), GFP_KERNEL);
345 int portid = of_getintprop_default(dp, "portid", -1); 345 int portid = of_getintprop_default(dp, "portid", -1);
346 struct linux_prom64_registers *regs; 346 const struct linux_prom64_registers *regs;
347 void *pval; 347 const void *pval;
348 int len; 348 int len;
349 349
350 if (!mp) 350 if (!mp)
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c
index 35bf895fdeee..0ace17bafba4 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc64/kernel/ebus.c
@@ -285,7 +285,7 @@ static void __init fill_ebus_child(struct device_node *dp,
285 int non_standard_regs) 285 int non_standard_regs)
286{ 286{
287 struct of_device *op; 287 struct of_device *op;
288 int *regs; 288 const int *regs;
289 int i, len; 289 int i, len;
290 290
291 dev->prom_node = dp; 291 dev->prom_node = dp;
@@ -438,11 +438,9 @@ static struct pci_dev *find_next_ebus(struct pci_dev *start, int *is_rio_p)
438 438
439void __init ebus_init(void) 439void __init ebus_init(void)
440{ 440{
441 struct pci_pbm_info *pbm;
442 struct linux_ebus_device *dev; 441 struct linux_ebus_device *dev;
443 struct linux_ebus *ebus; 442 struct linux_ebus *ebus;
444 struct pci_dev *pdev; 443 struct pci_dev *pdev;
445 struct pcidev_cookie *cookie;
446 struct device_node *dp; 444 struct device_node *dp;
447 int is_rio; 445 int is_rio;
448 int num_ebus = 0; 446 int num_ebus = 0;
@@ -453,8 +451,7 @@ void __init ebus_init(void)
453 return; 451 return;
454 } 452 }
455 453
456 cookie = pdev->sysdata; 454 dp = pci_device_to_OF_node(pdev);
457 dp = cookie->prom_node;
458 455
459 ebus_chain = ebus = ebus_alloc(sizeof(struct linux_ebus)); 456 ebus_chain = ebus = ebus_alloc(sizeof(struct linux_ebus));
460 ebus->next = NULL; 457 ebus->next = NULL;
@@ -480,8 +477,7 @@ void __init ebus_init(void)
480 break; 477 break;
481 } 478 }
482 ebus->is_rio = is_rio; 479 ebus->is_rio = is_rio;
483 cookie = pdev->sysdata; 480 dp = pci_device_to_OF_node(pdev);
484 dp = cookie->prom_node;
485 continue; 481 continue;
486 } 482 }
487 printk("ebus%d:", num_ebus); 483 printk("ebus%d:", num_ebus);
@@ -489,7 +485,6 @@ void __init ebus_init(void)
489 ebus->index = num_ebus; 485 ebus->index = num_ebus;
490 ebus->prom_node = dp; 486 ebus->prom_node = dp;
491 ebus->self = pdev; 487 ebus->self = pdev;
492 ebus->parent = pbm = cookie->pbm;
493 488
494 ebus->ofdev.node = dp; 489 ebus->ofdev.node = dp;
495 ebus->ofdev.dev.parent = &pdev->dev; 490 ebus->ofdev.dev.parent = &pdev->dev;
@@ -531,8 +526,7 @@ void __init ebus_init(void)
531 if (!pdev) 526 if (!pdev)
532 break; 527 break;
533 528
534 cookie = pdev->sysdata; 529 dp = pci_device_to_OF_node(pdev);
535 dp = cookie->prom_node;
536 530
537 ebus->next = ebus_alloc(sizeof(struct linux_ebus)); 531 ebus->next = ebus_alloc(sizeof(struct linux_ebus));
538 ebus = ebus->next; 532 ebus = ebus->next;
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index c443db184371..6241e3dbbd57 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -589,32 +589,6 @@ void ack_bad_irq(unsigned int virt_irq)
589 ino, virt_irq); 589 ino, virt_irq);
590} 590}
591 591
592#ifndef CONFIG_SMP
593extern irqreturn_t timer_interrupt(int, void *);
594
595void timer_irq(int irq, struct pt_regs *regs)
596{
597 unsigned long clr_mask = 1 << irq;
598 unsigned long tick_mask = tick_ops->softint_mask;
599 struct pt_regs *old_regs;
600
601 if (get_softint() & tick_mask) {
602 irq = 0;
603 clr_mask = tick_mask;
604 }
605 clear_softint(clr_mask);
606
607 old_regs = set_irq_regs(regs);
608 irq_enter();
609
610 kstat_this_cpu.irqs[0]++;
611 timer_interrupt(irq, NULL);
612
613 irq_exit();
614 set_irq_regs(old_regs);
615}
616#endif
617
618void handler_irq(int irq, struct pt_regs *regs) 592void handler_irq(int irq, struct pt_regs *regs)
619{ 593{
620 struct ino_bucket *bucket; 594 struct ino_bucket *bucket;
@@ -653,7 +627,7 @@ static u64 prom_limit0, prom_limit1;
653static void map_prom_timers(void) 627static void map_prom_timers(void)
654{ 628{
655 struct device_node *dp; 629 struct device_node *dp;
656 unsigned int *addr; 630 const unsigned int *addr;
657 631
658 /* PROM timer node hangs out in the top level of device siblings... */ 632 /* PROM timer node hangs out in the top level of device siblings... */
659 dp = of_find_node_by_path("/"); 633 dp = of_find_node_by_path("/");
diff --git a/arch/sparc64/kernel/isa.c b/arch/sparc64/kernel/isa.c
index 98721a8f8619..6a6882e57ff2 100644
--- a/arch/sparc64/kernel/isa.c
+++ b/arch/sparc64/kernel/isa.c
@@ -24,27 +24,9 @@ static void __init report_dev(struct sparc_isa_device *isa_dev, int child)
24 24
25static void __init isa_dev_get_resource(struct sparc_isa_device *isa_dev) 25static void __init isa_dev_get_resource(struct sparc_isa_device *isa_dev)
26{ 26{
27 struct linux_prom_registers *pregs; 27 struct of_device *op = of_find_device_by_node(isa_dev->prom_node);
28 unsigned long base, len;
29 int prop_len;
30
31 pregs = of_get_property(isa_dev->prom_node, "reg", &prop_len);
32 if (!pregs)
33 return;
34
35 /* Only the first one is interesting. */
36 len = pregs[0].reg_size;
37 base = (((unsigned long)pregs[0].which_io << 32) |
38 (unsigned long)pregs[0].phys_addr);
39 base += isa_dev->bus->parent->io_space.start;
40
41 isa_dev->resource.start = base;
42 isa_dev->resource.end = (base + len - 1UL);
43 isa_dev->resource.flags = IORESOURCE_IO;
44 isa_dev->resource.name = isa_dev->prom_node->name;
45 28
46 request_resource(&isa_dev->bus->parent->io_space, 29 memcpy(&isa_dev->resource, &op->resource[0], sizeof(struct resource));
47 &isa_dev->resource);
48} 30}
49 31
50static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev) 32static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev)
@@ -158,19 +140,10 @@ void __init isa_init(void)
158 140
159 pdev = NULL; 141 pdev = NULL;
160 while ((pdev = pci_get_device(vendor, device, pdev)) != NULL) { 142 while ((pdev = pci_get_device(vendor, device, pdev)) != NULL) {
161 struct pcidev_cookie *pdev_cookie;
162 struct pci_pbm_info *pbm;
163 struct sparc_isa_bridge *isa_br; 143 struct sparc_isa_bridge *isa_br;
164 struct device_node *dp; 144 struct device_node *dp;
165 145
166 pdev_cookie = pdev->sysdata; 146 dp = pci_device_to_OF_node(pdev);
167 if (!pdev_cookie) {
168 printk("ISA: Warning, ISA bridge ignored due to "
169 "lack of OBP data.\n");
170 continue;
171 }
172 pbm = pdev_cookie->pbm;
173 dp = pdev_cookie->prom_node;
174 147
175 isa_br = kzalloc(sizeof(*isa_br), GFP_KERNEL); 148 isa_br = kzalloc(sizeof(*isa_br), GFP_KERNEL);
176 if (!isa_br) { 149 if (!isa_br) {
@@ -195,10 +168,9 @@ void __init isa_init(void)
195 isa_br->next = isa_chain; 168 isa_br->next = isa_chain;
196 isa_chain = isa_br; 169 isa_chain = isa_br;
197 170
198 isa_br->parent = pbm;
199 isa_br->self = pdev; 171 isa_br->self = pdev;
200 isa_br->index = index++; 172 isa_br->index = index++;
201 isa_br->prom_node = pdev_cookie->prom_node; 173 isa_br->prom_node = dp;
202 174
203 printk("isa%d:", isa_br->index); 175 printk("isa%d:", isa_br->index);
204 176
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c
index fb9bf1e4d036..9ac9a307999a 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc64/kernel/of_device.c
@@ -245,7 +245,7 @@ struct of_bus {
245 int *addrc, int *sizec); 245 int *addrc, int *sizec);
246 int (*map)(u32 *addr, const u32 *range, 246 int (*map)(u32 *addr, const u32 *range,
247 int na, int ns, int pna); 247 int na, int ns, int pna);
248 unsigned int (*get_flags)(u32 *addr); 248 unsigned int (*get_flags)(const u32 *addr);
249}; 249};
250 250
251/* 251/*
@@ -305,7 +305,7 @@ static int of_bus_default_map(u32 *addr, const u32 *range,
305 return 0; 305 return 0;
306} 306}
307 307
308static unsigned int of_bus_default_get_flags(u32 *addr) 308static unsigned int of_bus_default_get_flags(const u32 *addr)
309{ 309{
310 return IORESOURCE_MEM; 310 return IORESOURCE_MEM;
311} 311}
@@ -317,6 +317,11 @@ static unsigned int of_bus_default_get_flags(u32 *addr)
317static int of_bus_pci_match(struct device_node *np) 317static int of_bus_pci_match(struct device_node *np)
318{ 318{
319 if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { 319 if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) {
320 const char *model = of_get_property(np, "model", NULL);
321
322 if (model && !strcmp(model, "SUNW,simba"))
323 return 0;
324
320 /* Do not do PCI specific frobbing if the 325 /* Do not do PCI specific frobbing if the
321 * PCI bridge lacks a ranges property. We 326 * PCI bridge lacks a ranges property. We
322 * want to pass it through up to the next 327 * want to pass it through up to the next
@@ -332,6 +337,21 @@ static int of_bus_pci_match(struct device_node *np)
332 return 0; 337 return 0;
333} 338}
334 339
340static int of_bus_simba_match(struct device_node *np)
341{
342 const char *model = of_get_property(np, "model", NULL);
343
344 if (model && !strcmp(model, "SUNW,simba"))
345 return 1;
346 return 0;
347}
348
349static int of_bus_simba_map(u32 *addr, const u32 *range,
350 int na, int ns, int pna)
351{
352 return 0;
353}
354
335static void of_bus_pci_count_cells(struct device_node *np, 355static void of_bus_pci_count_cells(struct device_node *np,
336 int *addrc, int *sizec) 356 int *addrc, int *sizec)
337{ 357{
@@ -369,7 +389,7 @@ static int of_bus_pci_map(u32 *addr, const u32 *range,
369 return 0; 389 return 0;
370} 390}
371 391
372static unsigned int of_bus_pci_get_flags(u32 *addr) 392static unsigned int of_bus_pci_get_flags(const u32 *addr)
373{ 393{
374 unsigned int flags = 0; 394 unsigned int flags = 0;
375 u32 w = addr[0]; 395 u32 w = addr[0];
@@ -436,6 +456,15 @@ static struct of_bus of_busses[] = {
436 .map = of_bus_pci_map, 456 .map = of_bus_pci_map,
437 .get_flags = of_bus_pci_get_flags, 457 .get_flags = of_bus_pci_get_flags,
438 }, 458 },
459 /* SIMBA */
460 {
461 .name = "simba",
462 .addr_prop_name = "assigned-addresses",
463 .match = of_bus_simba_match,
464 .count_cells = of_bus_pci_count_cells,
465 .map = of_bus_simba_map,
466 .get_flags = of_bus_pci_get_flags,
467 },
439 /* SBUS */ 468 /* SBUS */
440 { 469 {
441 .name = "sbus", 470 .name = "sbus",
@@ -482,7 +511,7 @@ static int __init build_one_resource(struct device_node *parent,
482 u32 *addr, 511 u32 *addr,
483 int na, int ns, int pna) 512 int na, int ns, int pna)
484{ 513{
485 u32 *ranges; 514 const u32 *ranges;
486 unsigned int rlen; 515 unsigned int rlen;
487 int rone; 516 int rone;
488 517
@@ -513,7 +542,7 @@ static int __init build_one_resource(struct device_node *parent,
513 542
514static int __init use_1to1_mapping(struct device_node *pp) 543static int __init use_1to1_mapping(struct device_node *pp)
515{ 544{
516 char *model; 545 const char *model;
517 546
518 /* If this is on the PMU bus, don't try to translate it even 547 /* If this is on the PMU bus, don't try to translate it even
519 * if a ranges property exists. 548 * if a ranges property exists.
@@ -548,7 +577,7 @@ static void __init build_device_resources(struct of_device *op,
548 struct of_bus *bus; 577 struct of_bus *bus;
549 int na, ns; 578 int na, ns;
550 int index, num_reg; 579 int index, num_reg;
551 void *preg; 580 const void *preg;
552 581
553 if (!parent) 582 if (!parent)
554 return; 583 return;
@@ -578,7 +607,7 @@ static void __init build_device_resources(struct of_device *op,
578 for (index = 0; index < num_reg; index++) { 607 for (index = 0; index < num_reg; index++) {
579 struct resource *r = &op->resource[index]; 608 struct resource *r = &op->resource[index];
580 u32 addr[OF_MAX_ADDR_CELLS]; 609 u32 addr[OF_MAX_ADDR_CELLS];
581 u32 *reg = (preg + (index * ((na + ns) * 4))); 610 const u32 *reg = (preg + (index * ((na + ns) * 4)));
582 struct device_node *dp = op->node; 611 struct device_node *dp = op->node;
583 struct device_node *pp = p_op->node; 612 struct device_node *pp = p_op->node;
584 struct of_bus *pbus, *dbus; 613 struct of_bus *pbus, *dbus;
@@ -643,14 +672,14 @@ static void __init build_device_resources(struct of_device *op,
643 672
644static struct device_node * __init 673static struct device_node * __init
645apply_interrupt_map(struct device_node *dp, struct device_node *pp, 674apply_interrupt_map(struct device_node *dp, struct device_node *pp,
646 u32 *imap, int imlen, u32 *imask, 675 const u32 *imap, int imlen, const u32 *imask,
647 unsigned int *irq_p) 676 unsigned int *irq_p)
648{ 677{
649 struct device_node *cp; 678 struct device_node *cp;
650 unsigned int irq = *irq_p; 679 unsigned int irq = *irq_p;
651 struct of_bus *bus; 680 struct of_bus *bus;
652 phandle handle; 681 phandle handle;
653 u32 *reg; 682 const u32 *reg;
654 int na, num_reg, i; 683 int na, num_reg, i;
655 684
656 bus = of_match_bus(pp); 685 bus = of_match_bus(pp);
@@ -705,7 +734,7 @@ static unsigned int __init pci_irq_swizzle(struct device_node *dp,
705 struct device_node *pp, 734 struct device_node *pp,
706 unsigned int irq) 735 unsigned int irq)
707{ 736{
708 struct linux_prom_pci_registers *regs; 737 const struct linux_prom_pci_registers *regs;
709 unsigned int bus, devfn, slot, ret; 738 unsigned int bus, devfn, slot, ret;
710 739
711 if (irq < 1 || irq > 4) 740 if (irq < 1 || irq > 4)
@@ -730,12 +759,6 @@ static unsigned int __init pci_irq_swizzle(struct device_node *dp,
730 * D: 2-bit slot number, derived from PCI device number as 759 * D: 2-bit slot number, derived from PCI device number as
731 * (dev - 1) for bus A, or (dev - 2) for bus B 760 * (dev - 1) for bus A, or (dev - 2) for bus B
732 * L: 2-bit line number 761 * L: 2-bit line number
733 *
734 * Actually, more "portable" way to calculate the funky
735 * slot number is to subtract pbm->pci_first_slot from the
736 * device number, and that's exactly what the pre-OF
737 * sparc64 code did, but we're building this stuff generically
738 * using the OBP tree, not in the PCI controller layer.
739 */ 762 */
740 if (bus & 0x80) { 763 if (bus & 0x80) {
741 /* PBM-A */ 764 /* PBM-A */
@@ -794,7 +817,7 @@ static unsigned int __init build_one_device_irq(struct of_device *op,
794 pp = dp->parent; 817 pp = dp->parent;
795 ip = NULL; 818 ip = NULL;
796 while (pp) { 819 while (pp) {
797 void *imap, *imsk; 820 const void *imap, *imsk;
798 int imlen; 821 int imlen;
799 822
800 imap = of_get_property(pp, "interrupt-map", &imlen); 823 imap = of_get_property(pp, "interrupt-map", &imlen);
@@ -859,7 +882,7 @@ static struct of_device * __init scan_one_device(struct device_node *dp,
859 struct device *parent) 882 struct device *parent)
860{ 883{
861 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); 884 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
862 unsigned int *irq; 885 const unsigned int *irq;
863 int len, i; 886 int len, i;
864 887
865 if (!op) 888 if (!op)
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 12109886bb1e..023af41ad68d 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -1,9 +1,11 @@
1/* $Id: pci.c,v 1.39 2002/01/05 01:13:43 davem Exp $ 1/* pci.c: UltraSparc PCI controller support.
2 * pci.c: UltraSparc PCI controller support.
3 * 2 *
4 * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com) 3 * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
5 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be) 4 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) 5 * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz)
6 *
7 * OF tree based PCI bus probing taken from the PowerPC port
8 * with minor modifications, see there for credits.
7 */ 9 */
8 10
9#include <linux/module.h> 11#include <linux/module.h>
@@ -24,6 +26,9 @@
24#include <asm/ebus.h> 26#include <asm/ebus.h>
25#include <asm/isa.h> 27#include <asm/isa.h>
26#include <asm/prom.h> 28#include <asm/prom.h>
29#include <asm/apb.h>
30
31#include "pci_impl.h"
27 32
28unsigned long pci_memspace_mask = 0xffffffffUL; 33unsigned long pci_memspace_mask = 0xffffffffUL;
29 34
@@ -277,10 +282,10 @@ int __init pcic_present(void)
277 return pci_controller_scan(pci_is_controller); 282 return pci_controller_scan(pci_is_controller);
278} 283}
279 284
280struct pci_iommu_ops *pci_iommu_ops; 285const struct pci_iommu_ops *pci_iommu_ops;
281EXPORT_SYMBOL(pci_iommu_ops); 286EXPORT_SYMBOL(pci_iommu_ops);
282 287
283extern struct pci_iommu_ops pci_sun4u_iommu_ops, 288extern const struct pci_iommu_ops pci_sun4u_iommu_ops,
284 pci_sun4v_iommu_ops; 289 pci_sun4v_iommu_ops;
285 290
286/* Find each controller in the system, attach and initialize 291/* Find each controller in the system, attach and initialize
@@ -300,6 +305,467 @@ static void __init pci_controller_probe(void)
300 pci_controller_scan(pci_controller_init); 305 pci_controller_scan(pci_controller_init);
301} 306}
302 307
308static unsigned long pci_parse_of_flags(u32 addr0)
309{
310 unsigned long flags = 0;
311
312 if (addr0 & 0x02000000) {
313 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
314 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
315 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
316 if (addr0 & 0x40000000)
317 flags |= IORESOURCE_PREFETCH
318 | PCI_BASE_ADDRESS_MEM_PREFETCH;
319 } else if (addr0 & 0x01000000)
320 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
321 return flags;
322}
323
324/* The of_device layer has translated all of the assigned-address properties
325 * into physical address resources, we only have to figure out the register
326 * mapping.
327 */
328static void pci_parse_of_addrs(struct of_device *op,
329 struct device_node *node,
330 struct pci_dev *dev)
331{
332 struct resource *op_res;
333 const u32 *addrs;
334 int proplen;
335
336 addrs = of_get_property(node, "assigned-addresses", &proplen);
337 if (!addrs)
338 return;
339 printk(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
340 op_res = &op->resource[0];
341 for (; proplen >= 20; proplen -= 20, addrs += 5, op_res++) {
342 struct resource *res;
343 unsigned long flags;
344 int i;
345
346 flags = pci_parse_of_flags(addrs[0]);
347 if (!flags)
348 continue;
349 i = addrs[0] & 0xff;
350 printk(" start: %lx, end: %lx, i: %x\n",
351 op_res->start, op_res->end, i);
352
353 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
354 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
355 } else if (i == dev->rom_base_reg) {
356 res = &dev->resource[PCI_ROM_RESOURCE];
357 flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
358 } else {
359 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
360 continue;
361 }
362 res->start = op_res->start;
363 res->end = op_res->end;
364 res->flags = flags;
365 res->name = pci_name(dev);
366 }
367}
368
369struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
370 struct device_node *node,
371 struct pci_bus *bus, int devfn,
372 int host_controller)
373{
374 struct dev_archdata *sd;
375 struct pci_dev *dev;
376 const char *type;
377 u32 class;
378
379 dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
380 if (!dev)
381 return NULL;
382
383 sd = &dev->dev.archdata;
384 sd->iommu = pbm->iommu;
385 sd->stc = &pbm->stc;
386 sd->host_controller = pbm;
387 sd->prom_node = node;
388 sd->op = of_find_device_by_node(node);
389 sd->msi_num = 0xffffffff;
390
391 type = of_get_property(node, "device_type", NULL);
392 if (type == NULL)
393 type = "";
394
395 printk(" create device, devfn: %x, type: %s hostcontroller(%d)\n",
396 devfn, type, host_controller);
397
398 dev->bus = bus;
399 dev->sysdata = node;
400 dev->dev.parent = bus->bridge;
401 dev->dev.bus = &pci_bus_type;
402 dev->devfn = devfn;
403 dev->multifunction = 0; /* maybe a lie? */
404
405 if (host_controller) {
406 dev->vendor = 0x108e;
407 dev->device = 0x8000;
408 dev->subsystem_vendor = 0x0000;
409 dev->subsystem_device = 0x0000;
410 dev->cfg_size = 256;
411 dev->class = PCI_CLASS_BRIDGE_HOST << 8;
412 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
413 0x00, PCI_SLOT(devfn), PCI_FUNC(devfn));
414 } else {
415 dev->vendor = of_getintprop_default(node, "vendor-id", 0xffff);
416 dev->device = of_getintprop_default(node, "device-id", 0xffff);
417 dev->subsystem_vendor =
418 of_getintprop_default(node, "subsystem-vendor-id", 0);
419 dev->subsystem_device =
420 of_getintprop_default(node, "subsystem-id", 0);
421
422 dev->cfg_size = pci_cfg_space_size(dev);
423
424 /* We can't actually use the firmware value, we have
425 * to read what is in the register right now. One
426 * reason is that in the case of IDE interfaces the
427 * firmware can sample the value before the the IDE
428 * interface is programmed into native mode.
429 */
430 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
431 dev->class = class >> 8;
432
433 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
434 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
435 }
436 printk(" class: 0x%x device name: %s\n",
437 dev->class, pci_name(dev));
438
439 dev->current_state = 4; /* unknown power state */
440 dev->error_state = pci_channel_io_normal;
441
442 if (host_controller) {
443 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
444 dev->rom_base_reg = PCI_ROM_ADDRESS1;
445 dev->irq = PCI_IRQ_NONE;
446 } else {
447 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
448 /* a PCI-PCI bridge */
449 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
450 dev->rom_base_reg = PCI_ROM_ADDRESS1;
451 } else if (!strcmp(type, "cardbus")) {
452 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
453 } else {
454 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
455 dev->rom_base_reg = PCI_ROM_ADDRESS;
456
457 dev->irq = sd->op->irqs[0];
458 if (dev->irq == 0xffffffff)
459 dev->irq = PCI_IRQ_NONE;
460 }
461 }
462 pci_parse_of_addrs(sd->op, node, dev);
463
464 printk(" adding to system ...\n");
465
466 pci_device_add(dev, bus);
467
468 return dev;
469}
470
471static void __init apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
472{
473 u32 idx, first, last;
474
475 first = 8;
476 last = 0;
477 for (idx = 0; idx < 8; idx++) {
478 if ((map & (1 << idx)) != 0) {
479 if (first > idx)
480 first = idx;
481 if (last < idx)
482 last = idx;
483 }
484 }
485
486 *first_p = first;
487 *last_p = last;
488}
489
490static void __init pci_resource_adjust(struct resource *res,
491 struct resource *root)
492{
493 res->start += root->start;
494 res->end += root->start;
495}
496
497/* Cook up fake bus resources for SUNW,simba PCI bridges which lack
498 * a proper 'ranges' property.
499 */
500static void __init apb_fake_ranges(struct pci_dev *dev,
501 struct pci_bus *bus,
502 struct pci_pbm_info *pbm)
503{
504 struct resource *res;
505 u32 first, last;
506 u8 map;
507
508 pci_read_config_byte(dev, APB_IO_ADDRESS_MAP, &map);
509 apb_calc_first_last(map, &first, &last);
510 res = bus->resource[0];
511 res->start = (first << 21);
512 res->end = (last << 21) + ((1 << 21) - 1);
513 res->flags = IORESOURCE_IO;
514 pci_resource_adjust(res, &pbm->io_space);
515
516 pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
517 apb_calc_first_last(map, &first, &last);
518 res = bus->resource[1];
519 res->start = (first << 21);
520 res->end = (last << 21) + ((1 << 21) - 1);
521 res->flags = IORESOURCE_MEM;
522 pci_resource_adjust(res, &pbm->mem_space);
523}
524
525static void __init pci_of_scan_bus(struct pci_pbm_info *pbm,
526 struct device_node *node,
527 struct pci_bus *bus);
528
529#define GET_64BIT(prop, i) ((((u64) (prop)[(i)]) << 32) | (prop)[(i)+1])
530
531void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
532 struct device_node *node,
533 struct pci_dev *dev)
534{
535 struct pci_bus *bus;
536 const u32 *busrange, *ranges;
537 int len, i, simba;
538 struct resource *res;
539 unsigned int flags;
540 u64 size;
541
542 printk("of_scan_pci_bridge(%s)\n", node->full_name);
543
544 /* parse bus-range property */
545 busrange = of_get_property(node, "bus-range", &len);
546 if (busrange == NULL || len != 8) {
547 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
548 node->full_name);
549 return;
550 }
551 ranges = of_get_property(node, "ranges", &len);
552 simba = 0;
553 if (ranges == NULL) {
554 const char *model = of_get_property(node, "model", NULL);
555 if (model && !strcmp(model, "SUNW,simba")) {
556 simba = 1;
557 } else {
558 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
559 node->full_name);
560 return;
561 }
562 }
563
564 bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
565 if (!bus) {
566 printk(KERN_ERR "Failed to create pci bus for %s\n",
567 node->full_name);
568 return;
569 }
570
571 bus->primary = dev->bus->number;
572 bus->subordinate = busrange[1];
573 bus->bridge_ctl = 0;
574
575 /* parse ranges property, or cook one up by hand for Simba */
576 /* PCI #address-cells == 3 and #size-cells == 2 always */
577 res = &dev->resource[PCI_BRIDGE_RESOURCES];
578 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
579 res->flags = 0;
580 bus->resource[i] = res;
581 ++res;
582 }
583 if (simba) {
584 apb_fake_ranges(dev, bus, pbm);
585 goto simba_cont;
586 }
587 i = 1;
588 for (; len >= 32; len -= 32, ranges += 8) {
589 struct resource *root;
590
591 flags = pci_parse_of_flags(ranges[0]);
592 size = GET_64BIT(ranges, 6);
593 if (flags == 0 || size == 0)
594 continue;
595 if (flags & IORESOURCE_IO) {
596 res = bus->resource[0];
597 if (res->flags) {
598 printk(KERN_ERR "PCI: ignoring extra I/O range"
599 " for bridge %s\n", node->full_name);
600 continue;
601 }
602 root = &pbm->io_space;
603 } else {
604 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
605 printk(KERN_ERR "PCI: too many memory ranges"
606 " for bridge %s\n", node->full_name);
607 continue;
608 }
609 res = bus->resource[i];
610 ++i;
611 root = &pbm->mem_space;
612 }
613
614 res->start = GET_64BIT(ranges, 1);
615 res->end = res->start + size - 1;
616 res->flags = flags;
617
618 /* Another way to implement this would be to add an of_device
619 * layer routine that can calculate a resource for a given
620 * range property value in a PCI device.
621 */
622 pci_resource_adjust(res, root);
623 }
624simba_cont:
625 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
626 bus->number);
627 printk(" bus name: %s\n", bus->name);
628
629 pci_of_scan_bus(pbm, node, bus);
630}
631
632static void __init pci_of_scan_bus(struct pci_pbm_info *pbm,
633 struct device_node *node,
634 struct pci_bus *bus)
635{
636 struct device_node *child;
637 const u32 *reg;
638 int reglen, devfn;
639 struct pci_dev *dev;
640
641 printk("PCI: scan_bus[%s] bus no %d\n",
642 node->full_name, bus->number);
643
644 child = NULL;
645 while ((child = of_get_next_child(node, child)) != NULL) {
646 printk(" * %s\n", child->full_name);
647 reg = of_get_property(child, "reg", &reglen);
648 if (reg == NULL || reglen < 20)
649 continue;
650 devfn = (reg[0] >> 8) & 0xff;
651
652 /* create a new pci_dev for this device */
653 dev = of_create_pci_dev(pbm, child, bus, devfn, 0);
654 if (!dev)
655 continue;
656 printk("PCI: dev header type: %x\n", dev->hdr_type);
657
658 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
659 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
660 of_scan_pci_bridge(pbm, child, dev);
661 }
662}
663
664static ssize_t
665show_pciobppath_attr(struct device * dev, struct device_attribute * attr, char * buf)
666{
667 struct pci_dev *pdev;
668 struct device_node *dp;
669
670 pdev = to_pci_dev(dev);
671 dp = pdev->dev.archdata.prom_node;
672
673 return snprintf (buf, PAGE_SIZE, "%s\n", dp->full_name);
674}
675
676static DEVICE_ATTR(obppath, S_IRUSR | S_IRGRP | S_IROTH, show_pciobppath_attr, NULL);
677
678static void __devinit pci_bus_register_of_sysfs(struct pci_bus *bus)
679{
680 struct pci_dev *dev;
681 struct pci_bus *child_bus;
682 int err;
683
684 list_for_each_entry(dev, &bus->devices, bus_list) {
685 /* we don't really care if we can create this file or
686 * not, but we need to assign the result of the call
687 * or the world will fall under alien invasion and
688 * everybody will be frozen on a spaceship ready to be
689 * eaten on alpha centauri by some green and jelly
690 * humanoid.
691 */
692 err = sysfs_create_file(&dev->dev.kobj, &dev_attr_obppath.attr);
693 }
694 list_for_each_entry(child_bus, &bus->children, node)
695 pci_bus_register_of_sysfs(child_bus);
696}
697
698int pci_host_bridge_read_pci_cfg(struct pci_bus *bus_dev,
699 unsigned int devfn,
700 int where, int size,
701 u32 *value)
702{
703 static u8 fake_pci_config[] = {
704 0x8e, 0x10, /* Vendor: 0x108e (Sun) */
705 0x00, 0x80, /* Device: 0x8000 (PBM) */
706 0x46, 0x01, /* Command: 0x0146 (SERR, PARITY, MASTER, MEM) */
707 0xa0, 0x22, /* Status: 0x02a0 (DEVSEL_MED, FB2B, 66MHZ) */
708 0x00, 0x00, 0x00, 0x06, /* Class: 0x06000000 host bridge */
709 0x00, /* Cacheline: 0x00 */
710 0x40, /* Latency: 0x40 */
711 0x00, /* Header-Type: 0x00 normal */
712 };
713
714 *value = 0;
715 if (where >= 0 && where < sizeof(fake_pci_config) &&
716 (where + size) >= 0 &&
717 (where + size) < sizeof(fake_pci_config) &&
718 size <= sizeof(u32)) {
719 while (size--) {
720 *value <<= 8;
721 *value |= fake_pci_config[where + size];
722 }
723 }
724
725 return PCIBIOS_SUCCESSFUL;
726}
727
728int pci_host_bridge_write_pci_cfg(struct pci_bus *bus_dev,
729 unsigned int devfn,
730 int where, int size,
731 u32 value)
732{
733 return PCIBIOS_SUCCESSFUL;
734}
735
736struct pci_bus * __init pci_scan_one_pbm(struct pci_pbm_info *pbm)
737{
738 struct pci_controller_info *p = pbm->parent;
739 struct device_node *node = pbm->prom_node;
740 struct pci_dev *host_pdev;
741 struct pci_bus *bus;
742
743 printk("PCI: Scanning PBM %s\n", node->full_name);
744
745 /* XXX parent device? XXX */
746 bus = pci_create_bus(NULL, pbm->pci_first_busno, p->pci_ops, pbm);
747 if (!bus) {
748 printk(KERN_ERR "Failed to create bus for %s\n",
749 node->full_name);
750 return NULL;
751 }
752 bus->secondary = pbm->pci_first_busno;
753 bus->subordinate = pbm->pci_last_busno;
754
755 bus->resource[0] = &pbm->io_space;
756 bus->resource[1] = &pbm->mem_space;
757
758 /* Create the dummy host bridge and link it in. */
759 host_pdev = of_create_pci_dev(pbm, node, bus, 0x00, 1);
760 bus->self = host_pdev;
761
762 pci_of_scan_bus(pbm, node, bus);
763 pci_bus_add_devices(bus);
764 pci_bus_register_of_sysfs(bus);
765
766 return bus;
767}
768
303static void __init pci_scan_each_controller_bus(void) 769static void __init pci_scan_each_controller_bus(void)
304{ 770{
305 struct pci_controller_info *p; 771 struct pci_controller_info *p;
@@ -360,8 +826,33 @@ void pcibios_align_resource(void *data, struct resource *res,
360{ 826{
361} 827}
362 828
363int pcibios_enable_device(struct pci_dev *pdev, int mask) 829int pcibios_enable_device(struct pci_dev *dev, int mask)
364{ 830{
831 u16 cmd, oldcmd;
832 int i;
833
834 pci_read_config_word(dev, PCI_COMMAND, &cmd);
835 oldcmd = cmd;
836
837 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
838 struct resource *res = &dev->resource[i];
839
840 /* Only set up the requested stuff */
841 if (!(mask & (1<<i)))
842 continue;
843
844 if (res->flags & IORESOURCE_IO)
845 cmd |= PCI_COMMAND_IO;
846 if (res->flags & IORESOURCE_MEM)
847 cmd |= PCI_COMMAND_MEMORY;
848 }
849
850 if (cmd != oldcmd) {
851 printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
852 pci_name(dev), cmd);
853 /* Enable the appropriate bits in the PCI command register. */
854 pci_write_config_word(dev, PCI_COMMAND, cmd);
855 }
365 return 0; 856 return 0;
366} 857}
367 858
@@ -380,7 +871,7 @@ void pcibios_resource_to_bus(struct pci_dev *pdev, struct pci_bus_region *region
380 else 871 else
381 root = &pbm->mem_space; 872 root = &pbm->mem_space;
382 873
383 pbm->parent->resource_adjust(pdev, &zero_res, root); 874 pci_resource_adjust(&zero_res, root);
384 875
385 region->start = res->start - zero_res.start; 876 region->start = res->start - zero_res.start;
386 region->end = res->end - zero_res.start; 877 region->end = res->end - zero_res.start;
@@ -401,7 +892,7 @@ void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res,
401 else 892 else
402 root = &pbm->mem_space; 893 root = &pbm->mem_space;
403 894
404 pbm->parent->resource_adjust(pdev, res, root); 895 pci_resource_adjust(res, root);
405} 896}
406EXPORT_SYMBOL(pcibios_bus_to_resource); 897EXPORT_SYMBOL(pcibios_bus_to_resource);
407 898
@@ -422,55 +913,17 @@ char * __devinit pcibios_setup(char *str)
422static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struct *vma, 913static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struct *vma,
423 enum pci_mmap_state mmap_state) 914 enum pci_mmap_state mmap_state)
424{ 915{
425 struct pcidev_cookie *pcp = pdev->sysdata; 916 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
426 struct pci_pbm_info *pbm;
427 struct pci_controller_info *p; 917 struct pci_controller_info *p;
428 unsigned long space_size, user_offset, user_size; 918 unsigned long space_size, user_offset, user_size;
429 919
430 if (!pcp)
431 return -ENXIO;
432 pbm = pcp->pbm;
433 if (!pbm)
434 return -ENXIO;
435
436 p = pbm->parent; 920 p = pbm->parent;
437 if (p->pbms_same_domain) { 921 if (mmap_state == pci_mmap_io) {
438 unsigned long lowest, highest; 922 space_size = (pbm->io_space.end -
439 923 pbm->io_space.start) + 1;
440 lowest = ~0UL; highest = 0UL;
441 if (mmap_state == pci_mmap_io) {
442 if (p->pbm_A.io_space.flags) {
443 lowest = p->pbm_A.io_space.start;
444 highest = p->pbm_A.io_space.end + 1;
445 }
446 if (p->pbm_B.io_space.flags) {
447 if (lowest > p->pbm_B.io_space.start)
448 lowest = p->pbm_B.io_space.start;
449 if (highest < p->pbm_B.io_space.end + 1)
450 highest = p->pbm_B.io_space.end + 1;
451 }
452 space_size = highest - lowest;
453 } else {
454 if (p->pbm_A.mem_space.flags) {
455 lowest = p->pbm_A.mem_space.start;
456 highest = p->pbm_A.mem_space.end + 1;
457 }
458 if (p->pbm_B.mem_space.flags) {
459 if (lowest > p->pbm_B.mem_space.start)
460 lowest = p->pbm_B.mem_space.start;
461 if (highest < p->pbm_B.mem_space.end + 1)
462 highest = p->pbm_B.mem_space.end + 1;
463 }
464 space_size = highest - lowest;
465 }
466 } else { 924 } else {
467 if (mmap_state == pci_mmap_io) { 925 space_size = (pbm->mem_space.end -
468 space_size = (pbm->io_space.end - 926 pbm->mem_space.start) + 1;
469 pbm->io_space.start) + 1;
470 } else {
471 space_size = (pbm->mem_space.end -
472 pbm->mem_space.start) + 1;
473 }
474 } 927 }
475 928
476 /* Make sure the request is in range. */ 929 /* Make sure the request is in range. */
@@ -481,31 +934,12 @@ static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struc
481 (user_offset + user_size) > space_size) 934 (user_offset + user_size) > space_size)
482 return -EINVAL; 935 return -EINVAL;
483 936
484 if (p->pbms_same_domain) { 937 if (mmap_state == pci_mmap_io) {
485 unsigned long lowest = ~0UL; 938 vma->vm_pgoff = (pbm->io_space.start +
486 939 user_offset) >> PAGE_SHIFT;
487 if (mmap_state == pci_mmap_io) {
488 if (p->pbm_A.io_space.flags)
489 lowest = p->pbm_A.io_space.start;
490 if (p->pbm_B.io_space.flags &&
491 lowest > p->pbm_B.io_space.start)
492 lowest = p->pbm_B.io_space.start;
493 } else {
494 if (p->pbm_A.mem_space.flags)
495 lowest = p->pbm_A.mem_space.start;
496 if (p->pbm_B.mem_space.flags &&
497 lowest > p->pbm_B.mem_space.start)
498 lowest = p->pbm_B.mem_space.start;
499 }
500 vma->vm_pgoff = (lowest + user_offset) >> PAGE_SHIFT;
501 } else { 940 } else {
502 if (mmap_state == pci_mmap_io) { 941 vma->vm_pgoff = (pbm->mem_space.start +
503 vma->vm_pgoff = (pbm->io_space.start + 942 user_offset) >> PAGE_SHIFT;
504 user_offset) >> PAGE_SHIFT;
505 } else {
506 vma->vm_pgoff = (pbm->mem_space.start +
507 user_offset) >> PAGE_SHIFT;
508 }
509 } 943 }
510 944
511 return 0; 945 return 0;
@@ -639,9 +1073,8 @@ int pci_domain_nr(struct pci_bus *pbus)
639 struct pci_controller_info *p = pbm->parent; 1073 struct pci_controller_info *p = pbm->parent;
640 1074
641 ret = p->index; 1075 ret = p->index;
642 if (p->pbms_same_domain == 0) 1076 ret = ((ret << 1) +
643 ret = ((ret << 1) + 1077 ((pbm == &pbm->parent->pbm_B) ? 1 : 0));
644 ((pbm == &pbm->parent->pbm_B) ? 1 : 0));
645 } 1078 }
646 1079
647 return ret; 1080 return ret;
@@ -651,8 +1084,7 @@ EXPORT_SYMBOL(pci_domain_nr);
651#ifdef CONFIG_PCI_MSI 1084#ifdef CONFIG_PCI_MSI
652int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) 1085int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
653{ 1086{
654 struct pcidev_cookie *pcp = pdev->sysdata; 1087 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
655 struct pci_pbm_info *pbm = pcp->pbm;
656 struct pci_controller_info *p = pbm->parent; 1088 struct pci_controller_info *p = pbm->parent;
657 int virt_irq, err; 1089 int virt_irq, err;
658 1090
@@ -670,8 +1102,7 @@ void arch_teardown_msi_irq(unsigned int virt_irq)
670{ 1102{
671 struct msi_desc *entry = get_irq_msi(virt_irq); 1103 struct msi_desc *entry = get_irq_msi(virt_irq);
672 struct pci_dev *pdev = entry->dev; 1104 struct pci_dev *pdev = entry->dev;
673 struct pcidev_cookie *pcp = pdev->sysdata; 1105 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
674 struct pci_pbm_info *pbm = pcp->pbm;
675 struct pci_controller_info *p = pbm->parent; 1106 struct pci_controller_info *p = pbm->parent;
676 1107
677 if (!pbm->msi_num || !p->setup_msi_irq) 1108 if (!pbm->msi_num || !p->setup_msi_irq)
@@ -683,9 +1114,7 @@ void arch_teardown_msi_irq(unsigned int virt_irq)
683 1114
684struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) 1115struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
685{ 1116{
686 struct pcidev_cookie *pc = pdev->sysdata; 1117 return pdev->dev.archdata.prom_node;
687
688 return pc->op->node;
689} 1118}
690EXPORT_SYMBOL(pci_device_to_OF_node); 1119EXPORT_SYMBOL(pci_device_to_OF_node);
691 1120
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc64/kernel/pci_common.c
index 5a92cb90ebe0..1e6aeedf43c4 100644
--- a/arch/sparc64/kernel/pci_common.c
+++ b/arch/sparc64/kernel/pci_common.c
@@ -1,7 +1,6 @@
1/* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $ 1/* pci_common.c: PCI controller common support.
2 * pci_common.c: PCI controller common support.
3 * 2 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5
7#include <linux/string.h> 6#include <linux/string.h>
@@ -16,748 +15,137 @@
16 15
17#include "pci_impl.h" 16#include "pci_impl.h"
18 17
19/* Fix self device of BUS and hook it into BUS->self. 18static void pci_register_legacy_regions(struct resource *io_res,
20 * The pci_scan_bus does not do this for the host bridge. 19 struct resource *mem_res)
21 */
22void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
23{
24 struct pci_dev *pdev;
25
26 list_for_each_entry(pdev, &pbus->devices, bus_list) {
27 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
28 pbus->self = pdev;
29 return;
30 }
31 }
32
33 prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
34 prom_halt();
35}
36
37/* Find the OBP PROM device tree node for a PCI device. */
38static struct device_node * __init
39find_device_prom_node(struct pci_pbm_info *pbm, struct pci_dev *pdev,
40 struct device_node *bus_node,
41 struct linux_prom_pci_registers **pregs,
42 int *nregs)
43{ 20{
44 struct device_node *dp; 21 struct resource *p;
45
46 *nregs = 0;
47
48 /*
49 * Return the PBM's PROM node in case we are it's PCI device,
50 * as the PBM's reg property is different to standard PCI reg
51 * properties. We would delete this device entry otherwise,
52 * which confuses XFree86's device probing...
53 */
54 if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
55 (pdev->vendor == PCI_VENDOR_ID_SUN) &&
56 (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
57 pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
58 pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
59 pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
60 pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD))
61 return bus_node;
62
63 dp = bus_node->child;
64 while (dp) {
65 struct linux_prom_pci_registers *regs;
66 struct property *prop;
67 int len;
68
69 prop = of_find_property(dp, "reg", &len);
70 if (!prop)
71 goto do_next_sibling;
72
73 regs = prop->value;
74 if (((regs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
75 *pregs = regs;
76 *nregs = len / sizeof(struct linux_prom_pci_registers);
77 return dp;
78 }
79
80 do_next_sibling:
81 dp = dp->sibling;
82 }
83
84 return NULL;
85}
86 22
87/* Older versions of OBP on PCI systems encode 64-bit MEM 23 /* VGA Video RAM. */
88 * space assignments incorrectly, this fixes them up. We also 24 p = kzalloc(sizeof(*p), GFP_KERNEL);
89 * take the opportunity here to hide other kinds of bogus 25 if (!p)
90 * assignments.
91 */
92static void __init fixup_obp_assignments(struct pci_dev *pdev,
93 struct pcidev_cookie *pcp)
94{
95 int i;
96
97 if (pdev->vendor == PCI_VENDOR_ID_AL &&
98 (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
99 pdev->device == PCI_DEVICE_ID_AL_M1533)) {
100 int i;
101
102 /* Zap all of the normal resources, they are
103 * meaningless and generate bogus resource collision
104 * messages. This is OpenBoot's ill-fated attempt to
105 * represent the implicit resources that these devices
106 * have.
107 */
108 pcp->num_prom_assignments = 0;
109 for (i = 0; i < 6; i++) {
110 pdev->resource[i].start =
111 pdev->resource[i].end =
112 pdev->resource[i].flags = 0;
113 }
114 pdev->resource[PCI_ROM_RESOURCE].start =
115 pdev->resource[PCI_ROM_RESOURCE].end =
116 pdev->resource[PCI_ROM_RESOURCE].flags = 0;
117 return; 26 return;
118 }
119
120 for (i = 0; i < pcp->num_prom_assignments; i++) {
121 struct linux_prom_pci_registers *ap;
122 int space;
123 27
124 ap = &pcp->prom_assignments[i]; 28 p->name = "Video RAM area";
125 space = ap->phys_hi >> 24; 29 p->start = mem_res->start + 0xa0000UL;
126 if ((space & 0x3) == 2 && 30 p->end = p->start + 0x1ffffUL;
127 (space & 0x4) != 0) { 31 p->flags = IORESOURCE_BUSY;
128 ap->phys_hi &= ~(0x7 << 24); 32 request_resource(mem_res, p);
129 ap->phys_hi |= 0x3 << 24;
130 }
131 }
132}
133
134static ssize_t
135show_pciobppath_attr(struct device * dev, struct device_attribute * attr, char * buf)
136{
137 struct pci_dev *pdev;
138 struct pcidev_cookie *sysdata;
139
140 pdev = to_pci_dev(dev);
141 sysdata = pdev->sysdata;
142
143 return snprintf (buf, PAGE_SIZE, "%s\n", sysdata->prom_node->full_name);
144}
145
146static DEVICE_ATTR(obppath, S_IRUSR | S_IRGRP | S_IROTH, show_pciobppath_attr, NULL);
147 33
148/* Fill in the PCI device cookie sysdata for the given 34 p = kzalloc(sizeof(*p), GFP_KERNEL);
149 * PCI device. This cookie is the means by which one 35 if (!p)
150 * can get to OBP and PCI controller specific information
151 * for a PCI device.
152 */
153static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
154 struct pci_dev *pdev,
155 struct device_node *bus_node)
156{
157 struct linux_prom_pci_registers *pregs = NULL;
158 struct pcidev_cookie *pcp;
159 struct device_node *dp;
160 struct property *prop;
161 int nregs, len, err;
162
163 dp = find_device_prom_node(pbm, pdev, bus_node,
164 &pregs, &nregs);
165 if (!dp) {
166 /* If it is not in the OBP device tree then
167 * there must be a damn good reason for it.
168 *
169 * So what we do is delete the device from the
170 * PCI device tree completely. This scenario
171 * is seen, for example, on CP1500 for the
172 * second EBUS/HappyMeal pair if the external
173 * connector for it is not present.
174 */
175 pci_remove_bus_device(pdev);
176 return; 36 return;
177 }
178
179 pcp = kzalloc(sizeof(*pcp), GFP_ATOMIC);
180 if (pcp == NULL) {
181 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
182 prom_halt();
183 }
184 pcp->pbm = pbm;
185 pcp->prom_node = dp;
186 pcp->op = of_find_device_by_node(dp);
187 memcpy(pcp->prom_regs, pregs,
188 nregs * sizeof(struct linux_prom_pci_registers));
189 pcp->num_prom_regs = nregs;
190
191 /* We can't have the pcidev_cookie assignments be just
192 * direct pointers into the property value, since they
193 * are potentially modified by the probing process.
194 */
195 prop = of_find_property(dp, "assigned-addresses", &len);
196 if (!prop) {
197 pcp->num_prom_assignments = 0;
198 } else {
199 memcpy(pcp->prom_assignments, prop->value, len);
200 pcp->num_prom_assignments =
201 (len / sizeof(pcp->prom_assignments[0]));
202 }
203
204 if (strcmp(dp->name, "ebus") == 0) {
205 struct linux_prom_ebus_ranges *erng;
206 int iter;
207
208 /* EBUS is special... */
209 prop = of_find_property(dp, "ranges", &len);
210 if (!prop) {
211 prom_printf("EBUS: Fatal error, no range property\n");
212 prom_halt();
213 }
214 erng = prop->value;
215 len = (len / sizeof(erng[0]));
216 for (iter = 0; iter < len; iter++) {
217 struct linux_prom_ebus_ranges *ep = &erng[iter];
218 struct linux_prom_pci_registers *ap;
219
220 ap = &pcp->prom_assignments[iter];
221
222 ap->phys_hi = ep->parent_phys_hi;
223 ap->phys_mid = ep->parent_phys_mid;
224 ap->phys_lo = ep->parent_phys_lo;
225 ap->size_hi = 0;
226 ap->size_lo = ep->size;
227 }
228 pcp->num_prom_assignments = len;
229 }
230
231 fixup_obp_assignments(pdev, pcp);
232
233 pdev->sysdata = pcp;
234
235 /* we don't really care if we can create this file or not,
236 * but we need to assign the result of the call or the world will fall
237 * under alien invasion and everybody will be frozen on a spaceship
238 * ready to be eaten on alpha centauri by some green and jelly humanoid.
239 */
240 err = sysfs_create_file(&pdev->dev.kobj, &dev_attr_obppath.attr);
241}
242
243void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
244 struct pci_pbm_info *pbm,
245 struct device_node *dp)
246{
247 struct pci_dev *pdev, *pdev_next;
248 struct pci_bus *this_pbus, *pbus_next;
249
250 /* This must be _safe because the cookie fillin
251 routine can delete devices from the tree. */
252 list_for_each_entry_safe(pdev, pdev_next, &pbus->devices, bus_list)
253 pdev_cookie_fillin(pbm, pdev, dp);
254
255 list_for_each_entry_safe(this_pbus, pbus_next, &pbus->children, node) {
256 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
257
258 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
259 }
260}
261 37
262static void __init bad_assignment(struct pci_dev *pdev, 38 p->name = "System ROM";
263 struct linux_prom_pci_registers *ap, 39 p->start = mem_res->start + 0xf0000UL;
264 struct resource *res, 40 p->end = p->start + 0xffffUL;
265 int do_prom_halt) 41 p->flags = IORESOURCE_BUSY;
266{ 42 request_resource(mem_res, p);
267 prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
268 pdev->bus->number, pdev->devfn);
269 if (ap)
270 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
271 ap->phys_hi, ap->phys_mid, ap->phys_lo,
272 ap->size_hi, ap->size_lo);
273 if (res)
274 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
275 res->start, res->end, res->flags);
276 if (do_prom_halt)
277 prom_halt();
278}
279
280static struct resource *
281__init get_root_resource(struct linux_prom_pci_registers *ap,
282 struct pci_pbm_info *pbm)
283{
284 int space = (ap->phys_hi >> 24) & 3;
285
286 switch (space) {
287 case 0:
288 /* Configuration space, silently ignore it. */
289 return NULL;
290
291 case 1:
292 /* 16-bit IO space */
293 return &pbm->io_space;
294
295 case 2:
296 /* 32-bit MEM space */
297 return &pbm->mem_space;
298
299 case 3:
300 /* 64-bit MEM space, these are allocated out of
301 * the 32-bit mem_space range for the PBM, ie.
302 * we just zero out the upper 32-bits.
303 */
304 return &pbm->mem_space;
305
306 default:
307 printk("PCI: What is resource space %x?\n", space);
308 return NULL;
309 };
310}
311
312static struct resource *
313__init get_device_resource(struct linux_prom_pci_registers *ap,
314 struct pci_dev *pdev)
315{
316 struct resource *res;
317 int breg = (ap->phys_hi & 0xff);
318
319 switch (breg) {
320 case PCI_ROM_ADDRESS:
321 /* Unfortunately I have seen several cases where
322 * buggy FCODE uses a space value of '1' (I/O space)
323 * in the register property for the ROM address
324 * so disable this sanity check for now.
325 */
326#if 0
327 {
328 int space = (ap->phys_hi >> 24) & 3;
329
330 /* It had better be MEM space. */
331 if (space != 2)
332 bad_assignment(pdev, ap, NULL, 0);
333 }
334#endif
335 res = &pdev->resource[PCI_ROM_RESOURCE];
336 break;
337
338 case PCI_BASE_ADDRESS_0:
339 case PCI_BASE_ADDRESS_1:
340 case PCI_BASE_ADDRESS_2:
341 case PCI_BASE_ADDRESS_3:
342 case PCI_BASE_ADDRESS_4:
343 case PCI_BASE_ADDRESS_5:
344 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
345 break;
346
347 default:
348 bad_assignment(pdev, ap, NULL, 0);
349 res = NULL;
350 break;
351 };
352
353 return res;
354}
355
356static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
357 struct pci_dev *pdev)
358{
359 struct pcidev_cookie *pcp = pdev->sysdata;
360 int i;
361
362 for (i = 0; i < pcp->num_prom_assignments; i++) {
363 struct linux_prom_pci_registers *ap;
364 struct resource *root, *res;
365
366 /* The format of this property is specified in
367 * the PCI Bus Binding to IEEE1275-1994.
368 */
369 ap = &pcp->prom_assignments[i];
370 root = get_root_resource(ap, pbm);
371 res = get_device_resource(ap, pdev);
372 if (root == NULL || res == NULL ||
373 res->flags == 0)
374 continue;
375
376 /* Ok we know which resource this PROM assignment is
377 * for, sanity check it.
378 */
379 if ((res->start & 0xffffffffUL) != ap->phys_lo)
380 bad_assignment(pdev, ap, res, 1);
381
382 /* If it is a 64-bit MEM space assignment, verify that
383 * the resource is too and that the upper 32-bits match.
384 */
385 if (((ap->phys_hi >> 24) & 3) == 3) {
386 if (((res->flags & IORESOURCE_MEM) == 0) ||
387 ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
388 != PCI_BASE_ADDRESS_MEM_TYPE_64))
389 bad_assignment(pdev, ap, res, 1);
390 if ((res->start >> 32) != ap->phys_mid)
391 bad_assignment(pdev, ap, res, 1);
392
393 /* PBM cannot generate cpu initiated PIOs
394 * to the full 64-bit space. Therefore the
395 * upper 32-bits better be zero. If it is
396 * not, just skip it and we will assign it
397 * properly ourselves.
398 */
399 if ((res->start >> 32) != 0UL) {
400 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
401 "%016lx for region %ld on device %s\n",
402 res->start, (res - &pdev->resource[0]), pci_name(pdev));
403 continue;
404 }
405 }
406
407 /* Adjust the resource into the physical address space
408 * of this PBM.
409 */
410 pbm->parent->resource_adjust(pdev, res, root);
411
412 if (request_resource(root, res) < 0) {
413 int rnum;
414
415 /* OK, there is some conflict. But this is fine
416 * since we'll reassign it in the fixup pass.
417 *
418 * Do not print the warning for ROM resources
419 * as such a conflict is quite common and
420 * harmless as the ROM bar is disabled.
421 */
422 rnum = (res - &pdev->resource[0]);
423 if (rnum != PCI_ROM_RESOURCE)
424 printk(KERN_ERR "PCI: Resource collision, "
425 "region %d "
426 "[%016lx:%016lx] of device %s\n",
427 rnum,
428 res->start, res->end,
429 pci_name(pdev));
430 }
431 }
432}
433
434void __init pci_record_assignments(struct pci_pbm_info *pbm,
435 struct pci_bus *pbus)
436{
437 struct pci_dev *dev;
438 struct pci_bus *bus;
439 43
440 list_for_each_entry(dev, &pbus->devices, bus_list) 44 p = kzalloc(sizeof(*p), GFP_KERNEL);
441 pdev_record_assignments(pbm, dev); 45 if (!p)
46 return;
442 47
443 list_for_each_entry(bus, &pbus->children, node) 48 p->name = "Video ROM";
444 pci_record_assignments(pbm, bus); 49 p->start = mem_res->start + 0xc0000UL;
50 p->end = p->start + 0x7fffUL;
51 p->flags = IORESOURCE_BUSY;
52 request_resource(mem_res, p);
445} 53}
446 54
447/* Return non-zero if PDEV has implicit I/O resources even 55static void pci_register_iommu_region(struct pci_pbm_info *pbm)
448 * though it may not have an I/O base address register
449 * active.
450 */
451static int __init has_implicit_io(struct pci_dev *pdev)
452{ 56{
453 int class = pdev->class >> 8; 57 const u32 *vdma = of_get_property(pbm->prom_node, "virtual-dma", NULL);
454 58
455 if (class == PCI_CLASS_NOT_DEFINED || 59 if (vdma) {
456 class == PCI_CLASS_NOT_DEFINED_VGA || 60 struct resource *rp = kmalloc(sizeof(*rp), GFP_KERNEL);
457 class == PCI_CLASS_STORAGE_IDE ||
458 (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
459 return 1;
460 61
461 return 0; 62 if (!rp) {
462} 63 prom_printf("Cannot allocate IOMMU resource.\n");
463
464static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
465 struct pci_dev *pdev)
466{
467 u32 reg;
468 u16 cmd;
469 int i, io_seen, mem_seen;
470
471 io_seen = mem_seen = 0;
472 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
473 struct resource *root, *res;
474 unsigned long size, min, max, align;
475
476 res = &pdev->resource[i];
477
478 if (res->flags & IORESOURCE_IO)
479 io_seen++;
480 else if (res->flags & IORESOURCE_MEM)
481 mem_seen++;
482
483 /* If it is already assigned or the resource does
484 * not exist, there is nothing to do.
485 */
486 if (res->parent != NULL || res->flags == 0UL)
487 continue;
488
489 /* Determine the root we allocate from. */
490 if (res->flags & IORESOURCE_IO) {
491 root = &pbm->io_space;
492 min = root->start + 0x400UL;
493 max = root->end;
494 } else {
495 root = &pbm->mem_space;
496 min = root->start;
497 max = min + 0x80000000UL;
498 }
499
500 size = res->end - res->start;
501 align = size + 1;
502 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
503 /* uh oh */
504 prom_printf("PCI: Failed to allocate resource %d for %s\n",
505 i, pci_name(pdev));
506 prom_halt(); 64 prom_halt();
507 } 65 }
508 66 rp->name = "IOMMU";
509 /* Update PCI config space. */ 67 rp->start = pbm->mem_space.start + (unsigned long) vdma[0];
510 pbm->parent->base_address_update(pdev, i); 68 rp->end = rp->start + (unsigned long) vdma[1] - 1UL;
511 } 69 rp->flags = IORESOURCE_BUSY;
512 70 request_resource(&pbm->mem_space, rp);
513 /* Special case, disable the ROM. Several devices
514 * act funny (ie. do not respond to memory space writes)
515 * when it is left enabled. A good example are Qlogic,ISP
516 * adapters.
517 */
518 pci_read_config_dword(pdev, PCI_ROM_ADDRESS, &reg);
519 reg &= ~PCI_ROM_ADDRESS_ENABLE;
520 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
521
522 /* If we saw I/O or MEM resources, enable appropriate
523 * bits in PCI command register.
524 */
525 if (io_seen || mem_seen) {
526 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
527 if (io_seen || has_implicit_io(pdev))
528 cmd |= PCI_COMMAND_IO;
529 if (mem_seen)
530 cmd |= PCI_COMMAND_MEMORY;
531 pci_write_config_word(pdev, PCI_COMMAND, cmd);
532 }
533
534 /* If this is a PCI bridge or an IDE controller,
535 * enable bus mastering. In the former case also
536 * set the cache line size correctly.
537 */
538 if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
539 (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
540 ((pdev->class & 0x80) != 0))) {
541 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
542 cmd |= PCI_COMMAND_MASTER;
543 pci_write_config_word(pdev, PCI_COMMAND, cmd);
544
545 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
546 pci_write_config_byte(pdev,
547 PCI_CACHE_LINE_SIZE,
548 (64 / sizeof(u32)));
549 } 71 }
550} 72}
551 73
552void __init pci_assign_unassigned(struct pci_pbm_info *pbm, 74void pci_determine_mem_io_space(struct pci_pbm_info *pbm)
553 struct pci_bus *pbus)
554{ 75{
555 struct pci_dev *dev; 76 const struct linux_prom_pci_ranges *pbm_ranges;
556 struct pci_bus *bus; 77 int i, saw_mem, saw_io;
557 78 int num_pbm_ranges;
558 list_for_each_entry(dev, &pbus->devices, bus_list)
559 pdev_assign_unassigned(pbm, dev);
560 79
561 list_for_each_entry(bus, &pbus->children, node) 80 saw_mem = saw_io = 0;
562 pci_assign_unassigned(pbm, bus); 81 pbm_ranges = of_get_property(pbm->prom_node, "ranges", &i);
563} 82 num_pbm_ranges = i / sizeof(*pbm_ranges);
564 83
565static void __init pdev_fixup_irq(struct pci_dev *pdev) 84 for (i = 0; i < num_pbm_ranges; i++) {
566{ 85 const struct linux_prom_pci_ranges *pr = &pbm_ranges[i];
567 struct pcidev_cookie *pcp = pdev->sysdata; 86 unsigned long a;
568 struct of_device *op = pcp->op; 87 u32 parent_phys_hi, parent_phys_lo;
88 int type;
569 89
570 if (op->irqs[0] == 0xffffffff) { 90 parent_phys_hi = pr->parent_phys_hi;
571 pdev->irq = PCI_IRQ_NONE; 91 parent_phys_lo = pr->parent_phys_lo;
572 return; 92 if (tlb_type == hypervisor)
573 } 93 parent_phys_hi &= 0x0fffffff;
574 94
575 pdev->irq = op->irqs[0]; 95 type = (pr->child_phys_hi >> 24) & 0x3;
96 a = (((unsigned long)parent_phys_hi << 32UL) |
97 ((unsigned long)parent_phys_lo << 0UL));
576 98
577 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 99 switch (type) {
578 pdev->irq & PCI_IRQ_INO); 100 case 0:
579} 101 /* PCI config space, 16MB */
580 102 pbm->config_space = a;
581void __init pci_fixup_irq(struct pci_pbm_info *pbm, 103 break;
582 struct pci_bus *pbus)
583{
584 struct pci_dev *dev;
585 struct pci_bus *bus;
586
587 list_for_each_entry(dev, &pbus->devices, bus_list)
588 pdev_fixup_irq(dev);
589
590 list_for_each_entry(bus, &pbus->children, node)
591 pci_fixup_irq(pbm, bus);
592}
593
594static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
595{
596 u16 cmd;
597 u8 hdr_type, min_gnt, ltimer;
598
599 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
600 cmd |= PCI_COMMAND_MASTER;
601 pci_write_config_word(pdev, PCI_COMMAND, cmd);
602
603 /* Read it back, if the mastering bit did not
604 * get set, the device does not support bus
605 * mastering so we have nothing to do here.
606 */
607 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
608 if ((cmd & PCI_COMMAND_MASTER) == 0)
609 return;
610
611 /* Set correct cache line size, 64-byte on all
612 * Sparc64 PCI systems. Note that the value is
613 * measured in 32-bit words.
614 */
615 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
616 64 / sizeof(u32));
617
618 pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
619 hdr_type &= ~0x80;
620 if (hdr_type != PCI_HEADER_TYPE_NORMAL)
621 return;
622
623 /* If the latency timer is already programmed with a non-zero
624 * value, assume whoever set it (OBP or whoever) knows what
625 * they are doing.
626 */
627 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ltimer);
628 if (ltimer != 0)
629 return;
630
631 /* XXX Since I'm tipping off the min grant value to
632 * XXX choose a suitable latency timer value, I also
633 * XXX considered making use of the max latency value
634 * XXX as well. Unfortunately I've seen too many bogusly
635 * XXX low settings for it to the point where it lacks
636 * XXX any usefulness. In one case, an ethernet card
637 * XXX claimed a min grant of 10 and a max latency of 5.
638 * XXX Now, if I had two such cards on the same bus I
639 * XXX could not set the desired burst period (calculated
640 * XXX from min grant) without violating the max latency
641 * XXX bound. Duh...
642 * XXX
643 * XXX I blame dumb PC bios implementors for stuff like
644 * XXX this, most of them don't even try to do something
645 * XXX sensible with latency timer values and just set some
646 * XXX default value (usually 32) into every device.
647 */
648
649 pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
650
651 if (min_gnt == 0) {
652 /* If no min_gnt setting then use a default
653 * value.
654 */
655 if (is_66mhz)
656 ltimer = 16;
657 else
658 ltimer = 32;
659 } else {
660 int shift_factor;
661
662 if (is_66mhz)
663 shift_factor = 2;
664 else
665 shift_factor = 3;
666
667 /* Use a default value when the min_gnt value
668 * is erroneously high.
669 */
670 if (((unsigned int) min_gnt << shift_factor) > 512 ||
671 ((min_gnt << shift_factor) & 0xff) == 0) {
672 ltimer = 8 << shift_factor;
673 } else {
674 ltimer = min_gnt << shift_factor;
675 }
676 }
677 104
678 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer); 105 case 1:
679} 106 /* 16-bit IO space, 16MB */
107 pbm->io_space.start = a;
108 pbm->io_space.end = a + ((16UL*1024UL*1024UL) - 1UL);
109 pbm->io_space.flags = IORESOURCE_IO;
110 saw_io = 1;
111 break;
680 112
681void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm, 113 case 2:
682 struct pci_bus *pbus) 114 /* 32-bit MEM space, 2GB */
683{ 115 pbm->mem_space.start = a;
684 struct pci_dev *pdev; 116 pbm->mem_space.end = a + (0x80000000UL - 1UL);
685 int all_are_66mhz; 117 pbm->mem_space.flags = IORESOURCE_MEM;
686 u16 status; 118 saw_mem = 1;
119 break;
687 120
688 if (pbm->is_66mhz_capable == 0) { 121 case 3:
689 all_are_66mhz = 0; 122 /* XXX 64-bit MEM handling XXX */
690 goto out;
691 }
692 123
693 all_are_66mhz = 1; 124 default:
694 list_for_each_entry(pdev, &pbus->devices, bus_list) {
695 pci_read_config_word(pdev, PCI_STATUS, &status);
696 if (!(status & PCI_STATUS_66MHZ)) {
697 all_are_66mhz = 0;
698 break; 125 break;
699 } 126 };
700 } 127 }
701out:
702 pbm->all_devs_66mhz = all_are_66mhz;
703
704 printk("PCI%d(PBM%c): Bus running at %dMHz\n",
705 pbm->parent->index,
706 (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
707 (all_are_66mhz ? 66 : 33));
708}
709
710void pci_setup_busmastering(struct pci_pbm_info *pbm,
711 struct pci_bus *pbus)
712{
713 struct pci_dev *dev;
714 struct pci_bus *bus;
715 int is_66mhz;
716
717 is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
718
719 list_for_each_entry(dev, &pbus->devices, bus_list)
720 pdev_setup_busmastering(dev, is_66mhz);
721
722 list_for_each_entry(bus, &pbus->children, node)
723 pci_setup_busmastering(pbm, bus);
724}
725
726void pci_register_legacy_regions(struct resource *io_res,
727 struct resource *mem_res)
728{
729 struct resource *p;
730
731 /* VGA Video RAM. */
732 p = kzalloc(sizeof(*p), GFP_KERNEL);
733 if (!p)
734 return;
735 128
736 p->name = "Video RAM area"; 129 if (!saw_io || !saw_mem) {
737 p->start = mem_res->start + 0xa0000UL; 130 prom_printf("%s: Fatal error, missing %s PBM range.\n",
738 p->end = p->start + 0x1ffffUL; 131 pbm->name,
739 p->flags = IORESOURCE_BUSY; 132 (!saw_io ? "IO" : "MEM"));
740 request_resource(mem_res, p); 133 prom_halt();
134 }
741 135
742 p = kzalloc(sizeof(*p), GFP_KERNEL); 136 printk("%s: PCI IO[%lx] MEM[%lx]\n",
743 if (!p) 137 pbm->name,
744 return; 138 pbm->io_space.start,
139 pbm->mem_space.start);
745 140
746 p->name = "System ROM"; 141 pbm->io_space.name = pbm->mem_space.name = pbm->name;
747 p->start = mem_res->start + 0xf0000UL;
748 p->end = p->start + 0xffffUL;
749 p->flags = IORESOURCE_BUSY;
750 request_resource(mem_res, p);
751 142
752 p = kzalloc(sizeof(*p), GFP_KERNEL); 143 request_resource(&ioport_resource, &pbm->io_space);
753 if (!p) 144 request_resource(&iomem_resource, &pbm->mem_space);
754 return;
755 145
756 p->name = "Video ROM"; 146 pci_register_legacy_regions(&pbm->io_space,
757 p->start = mem_res->start + 0xc0000UL; 147 &pbm->mem_space);
758 p->end = p->start + 0x7fffUL; 148 pci_register_iommu_region(pbm);
759 p->flags = IORESOURCE_BUSY;
760 request_resource(mem_res, p);
761} 149}
762 150
763/* Generic helper routines for PCI error reporting. */ 151/* Generic helper routines for PCI error reporting. */
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h
index 971e2bea30b4..1208583fcb83 100644
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc64/kernel/pci_impl.h
@@ -1,7 +1,6 @@
1/* $Id: pci_impl.h,v 1.9 2001/06/13 06:34:30 davem Exp $ 1/* pci_impl.h: Helper definitions for PCI controller support.
2 * pci_impl.h: Helper definitions for PCI controller support.
3 * 2 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5
7#ifndef PCI_IMPL_H 6#ifndef PCI_IMPL_H
@@ -13,26 +12,22 @@
13#include <asm/prom.h> 12#include <asm/prom.h>
14 13
15extern struct pci_controller_info *pci_controller_root; 14extern struct pci_controller_info *pci_controller_root;
15extern unsigned long pci_memspace_mask;
16 16
17extern int pci_num_controllers; 17extern int pci_num_controllers;
18 18
19/* PCI bus scanning and fixup support. */ 19/* PCI bus scanning and fixup support. */
20extern void pci_fixup_host_bridge_self(struct pci_bus *pbus); 20extern struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm);
21extern void pci_fill_in_pbm_cookies(struct pci_bus *pbus, 21extern void pci_determine_mem_io_space(struct pci_pbm_info *pbm);
22 struct pci_pbm_info *pbm, 22
23 struct device_node *prom_node); 23extern int pci_host_bridge_read_pci_cfg(struct pci_bus *bus_dev,
24extern void pci_record_assignments(struct pci_pbm_info *pbm, 24 unsigned int devfn,
25 struct pci_bus *pbus); 25 int where, int size,
26extern void pci_assign_unassigned(struct pci_pbm_info *pbm, 26 u32 *value);
27 struct pci_bus *pbus); 27extern int pci_host_bridge_write_pci_cfg(struct pci_bus *bus_dev,
28extern void pci_fixup_irq(struct pci_pbm_info *pbm, 28 unsigned int devfn,
29 struct pci_bus *pbus); 29 int where, int size,
30extern void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm, 30 u32 value);
31 struct pci_bus *pbus);
32extern void pci_setup_busmastering(struct pci_pbm_info *pbm,
33 struct pci_bus *pbus);
34extern void pci_register_legacy_regions(struct resource *io_res,
35 struct resource *mem_res);
36 31
37/* Error reporting support. */ 32/* Error reporting support. */
38extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *); 33extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
diff --git a/arch/sparc64/kernel/pci_iommu.c b/arch/sparc64/kernel/pci_iommu.c
index 7aca0f33f885..66712772f494 100644
--- a/arch/sparc64/kernel/pci_iommu.c
+++ b/arch/sparc64/kernel/pci_iommu.c
@@ -1,7 +1,6 @@
1/* $Id: pci_iommu.c,v 1.17 2001/12/17 07:05:09 davem Exp $ 1/* pci_iommu.c: UltraSparc PCI controller IOM/STC support.
2 * pci_iommu.c: UltraSparc PCI controller IOM/STC support.
3 * 2 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) 4 * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com)
6 */ 5 */
7 6
@@ -36,7 +35,7 @@
36 "i" (ASI_PHYS_BYPASS_EC_E)) 35 "i" (ASI_PHYS_BYPASS_EC_E))
37 36
38/* Must be invoked under the IOMMU lock. */ 37/* Must be invoked under the IOMMU lock. */
39static void __iommu_flushall(struct pci_iommu *iommu) 38static void __iommu_flushall(struct iommu *iommu)
40{ 39{
41 unsigned long tag; 40 unsigned long tag;
42 int entry; 41 int entry;
@@ -64,7 +63,7 @@ static void __iommu_flushall(struct pci_iommu *iommu)
64#define IOPTE_IS_DUMMY(iommu, iopte) \ 63#define IOPTE_IS_DUMMY(iommu, iopte) \
65 ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa) 64 ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa)
66 65
67static inline void iopte_make_dummy(struct pci_iommu *iommu, iopte_t *iopte) 66static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte)
68{ 67{
69 unsigned long val = iopte_val(*iopte); 68 unsigned long val = iopte_val(*iopte);
70 69
@@ -75,9 +74,9 @@ static inline void iopte_make_dummy(struct pci_iommu *iommu, iopte_t *iopte)
75} 74}
76 75
77/* Based largely upon the ppc64 iommu allocator. */ 76/* Based largely upon the ppc64 iommu allocator. */
78static long pci_arena_alloc(struct pci_iommu *iommu, unsigned long npages) 77static long pci_arena_alloc(struct iommu *iommu, unsigned long npages)
79{ 78{
80 struct pci_iommu_arena *arena = &iommu->arena; 79 struct iommu_arena *arena = &iommu->arena;
81 unsigned long n, i, start, end, limit; 80 unsigned long n, i, start, end, limit;
82 int pass; 81 int pass;
83 82
@@ -116,7 +115,7 @@ again:
116 return n; 115 return n;
117} 116}
118 117
119static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, unsigned long npages) 118static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
120{ 119{
121 unsigned long i; 120 unsigned long i;
122 121
@@ -124,7 +123,7 @@ static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, un
124 __clear_bit(i, arena->map); 123 __clear_bit(i, arena->map);
125} 124}
126 125
127void pci_iommu_table_init(struct pci_iommu *iommu, int tsbsize, u32 dma_offset, u32 dma_addr_mask) 126void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 dma_addr_mask)
128{ 127{
129 unsigned long i, tsbbase, order, sz, num_tsb_entries; 128 unsigned long i, tsbbase, order, sz, num_tsb_entries;
130 129
@@ -170,7 +169,7 @@ void pci_iommu_table_init(struct pci_iommu *iommu, int tsbsize, u32 dma_offset,
170 iopte_make_dummy(iommu, &iommu->page_table[i]); 169 iopte_make_dummy(iommu, &iommu->page_table[i]);
171} 170}
172 171
173static inline iopte_t *alloc_npages(struct pci_iommu *iommu, unsigned long npages) 172static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages)
174{ 173{
175 long entry; 174 long entry;
176 175
@@ -181,12 +180,12 @@ static inline iopte_t *alloc_npages(struct pci_iommu *iommu, unsigned long npage
181 return iommu->page_table + entry; 180 return iommu->page_table + entry;
182} 181}
183 182
184static inline void free_npages(struct pci_iommu *iommu, dma_addr_t base, unsigned long npages) 183static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages)
185{ 184{
186 pci_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); 185 pci_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages);
187} 186}
188 187
189static int iommu_alloc_ctx(struct pci_iommu *iommu) 188static int iommu_alloc_ctx(struct iommu *iommu)
190{ 189{
191 int lowest = iommu->ctx_lowest_free; 190 int lowest = iommu->ctx_lowest_free;
192 int sz = IOMMU_NUM_CTXS - lowest; 191 int sz = IOMMU_NUM_CTXS - lowest;
@@ -205,7 +204,7 @@ static int iommu_alloc_ctx(struct pci_iommu *iommu)
205 return n; 204 return n;
206} 205}
207 206
208static inline void iommu_free_ctx(struct pci_iommu *iommu, int ctx) 207static inline void iommu_free_ctx(struct iommu *iommu, int ctx)
209{ 208{
210 if (likely(ctx)) { 209 if (likely(ctx)) {
211 __clear_bit(ctx, iommu->ctx_bitmap); 210 __clear_bit(ctx, iommu->ctx_bitmap);
@@ -220,8 +219,7 @@ static inline void iommu_free_ctx(struct pci_iommu *iommu, int ctx)
220 */ 219 */
221static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp) 220static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp)
222{ 221{
223 struct pcidev_cookie *pcp; 222 struct iommu *iommu;
224 struct pci_iommu *iommu;
225 iopte_t *iopte; 223 iopte_t *iopte;
226 unsigned long flags, order, first_page; 224 unsigned long flags, order, first_page;
227 void *ret; 225 void *ret;
@@ -237,8 +235,7 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
237 return NULL; 235 return NULL;
238 memset((char *)first_page, 0, PAGE_SIZE << order); 236 memset((char *)first_page, 0, PAGE_SIZE << order);
239 237
240 pcp = pdev->sysdata; 238 iommu = pdev->dev.archdata.iommu;
241 iommu = pcp->pbm->iommu;
242 239
243 spin_lock_irqsave(&iommu->lock, flags); 240 spin_lock_irqsave(&iommu->lock, flags);
244 iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); 241 iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT);
@@ -268,14 +265,12 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
268/* Free and unmap a consistent DMA translation. */ 265/* Free and unmap a consistent DMA translation. */
269static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma) 266static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
270{ 267{
271 struct pcidev_cookie *pcp; 268 struct iommu *iommu;
272 struct pci_iommu *iommu;
273 iopte_t *iopte; 269 iopte_t *iopte;
274 unsigned long flags, order, npages; 270 unsigned long flags, order, npages;
275 271
276 npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; 272 npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
277 pcp = pdev->sysdata; 273 iommu = pdev->dev.archdata.iommu;
278 iommu = pcp->pbm->iommu;
279 iopte = iommu->page_table + 274 iopte = iommu->page_table +
280 ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); 275 ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
281 276
@@ -295,18 +290,16 @@ static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu,
295 */ 290 */
296static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction) 291static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
297{ 292{
298 struct pcidev_cookie *pcp; 293 struct iommu *iommu;
299 struct pci_iommu *iommu; 294 struct strbuf *strbuf;
300 struct pci_strbuf *strbuf;
301 iopte_t *base; 295 iopte_t *base;
302 unsigned long flags, npages, oaddr; 296 unsigned long flags, npages, oaddr;
303 unsigned long i, base_paddr, ctx; 297 unsigned long i, base_paddr, ctx;
304 u32 bus_addr, ret; 298 u32 bus_addr, ret;
305 unsigned long iopte_protection; 299 unsigned long iopte_protection;
306 300
307 pcp = pdev->sysdata; 301 iommu = pdev->dev.archdata.iommu;
308 iommu = pcp->pbm->iommu; 302 strbuf = pdev->dev.archdata.stc;
309 strbuf = &pcp->pbm->stc;
310 303
311 if (unlikely(direction == PCI_DMA_NONE)) 304 if (unlikely(direction == PCI_DMA_NONE))
312 goto bad_no_ctx; 305 goto bad_no_ctx;
@@ -349,7 +342,7 @@ bad_no_ctx:
349 return PCI_DMA_ERROR_CODE; 342 return PCI_DMA_ERROR_CODE;
350} 343}
351 344
352static void pci_strbuf_flush(struct pci_strbuf *strbuf, struct pci_iommu *iommu, u32 vaddr, unsigned long ctx, unsigned long npages, int direction) 345static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vaddr, unsigned long ctx, unsigned long npages, int direction)
353{ 346{
354 int limit; 347 int limit;
355 348
@@ -416,9 +409,8 @@ do_flush_sync:
416/* Unmap a single streaming mode DMA translation. */ 409/* Unmap a single streaming mode DMA translation. */
417static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) 410static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
418{ 411{
419 struct pcidev_cookie *pcp; 412 struct iommu *iommu;
420 struct pci_iommu *iommu; 413 struct strbuf *strbuf;
421 struct pci_strbuf *strbuf;
422 iopte_t *base; 414 iopte_t *base;
423 unsigned long flags, npages, ctx, i; 415 unsigned long flags, npages, ctx, i;
424 416
@@ -428,9 +420,8 @@ static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
428 return; 420 return;
429 } 421 }
430 422
431 pcp = pdev->sysdata; 423 iommu = pdev->dev.archdata.iommu;
432 iommu = pcp->pbm->iommu; 424 strbuf = pdev->dev.archdata.stc;
433 strbuf = &pcp->pbm->stc;
434 425
435 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); 426 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
436 npages >>= IO_PAGE_SHIFT; 427 npages >>= IO_PAGE_SHIFT;
@@ -549,9 +540,8 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
549 */ 540 */
550static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) 541static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
551{ 542{
552 struct pcidev_cookie *pcp; 543 struct iommu *iommu;
553 struct pci_iommu *iommu; 544 struct strbuf *strbuf;
554 struct pci_strbuf *strbuf;
555 unsigned long flags, ctx, npages, iopte_protection; 545 unsigned long flags, ctx, npages, iopte_protection;
556 iopte_t *base; 546 iopte_t *base;
557 u32 dma_base; 547 u32 dma_base;
@@ -570,9 +560,8 @@ static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
570 return 1; 560 return 1;
571 } 561 }
572 562
573 pcp = pdev->sysdata; 563 iommu = pdev->dev.archdata.iommu;
574 iommu = pcp->pbm->iommu; 564 strbuf = pdev->dev.archdata.stc;
575 strbuf = &pcp->pbm->stc;
576 565
577 if (unlikely(direction == PCI_DMA_NONE)) 566 if (unlikely(direction == PCI_DMA_NONE))
578 goto bad_no_ctx; 567 goto bad_no_ctx;
@@ -636,9 +625,8 @@ bad_no_ctx:
636/* Unmap a set of streaming mode DMA translations. */ 625/* Unmap a set of streaming mode DMA translations. */
637static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) 626static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
638{ 627{
639 struct pcidev_cookie *pcp; 628 struct iommu *iommu;
640 struct pci_iommu *iommu; 629 struct strbuf *strbuf;
641 struct pci_strbuf *strbuf;
642 iopte_t *base; 630 iopte_t *base;
643 unsigned long flags, ctx, i, npages; 631 unsigned long flags, ctx, i, npages;
644 u32 bus_addr; 632 u32 bus_addr;
@@ -648,9 +636,8 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
648 WARN_ON(1); 636 WARN_ON(1);
649 } 637 }
650 638
651 pcp = pdev->sysdata; 639 iommu = pdev->dev.archdata.iommu;
652 iommu = pcp->pbm->iommu; 640 strbuf = pdev->dev.archdata.stc;
653 strbuf = &pcp->pbm->stc;
654 641
655 bus_addr = sglist->dma_address & IO_PAGE_MASK; 642 bus_addr = sglist->dma_address & IO_PAGE_MASK;
656 643
@@ -696,14 +683,12 @@ static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
696 */ 683 */
697static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) 684static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
698{ 685{
699 struct pcidev_cookie *pcp; 686 struct iommu *iommu;
700 struct pci_iommu *iommu; 687 struct strbuf *strbuf;
701 struct pci_strbuf *strbuf;
702 unsigned long flags, ctx, npages; 688 unsigned long flags, ctx, npages;
703 689
704 pcp = pdev->sysdata; 690 iommu = pdev->dev.archdata.iommu;
705 iommu = pcp->pbm->iommu; 691 strbuf = pdev->dev.archdata.stc;
706 strbuf = &pcp->pbm->stc;
707 692
708 if (!strbuf->strbuf_enabled) 693 if (!strbuf->strbuf_enabled)
709 return; 694 return;
@@ -736,15 +721,13 @@ static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_
736 */ 721 */
737static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) 722static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
738{ 723{
739 struct pcidev_cookie *pcp; 724 struct iommu *iommu;
740 struct pci_iommu *iommu; 725 struct strbuf *strbuf;
741 struct pci_strbuf *strbuf;
742 unsigned long flags, ctx, npages, i; 726 unsigned long flags, ctx, npages, i;
743 u32 bus_addr; 727 u32 bus_addr;
744 728
745 pcp = pdev->sysdata; 729 iommu = pdev->dev.archdata.iommu;
746 iommu = pcp->pbm->iommu; 730 strbuf = pdev->dev.archdata.stc;
747 strbuf = &pcp->pbm->stc;
748 731
749 if (!strbuf->strbuf_enabled) 732 if (!strbuf->strbuf_enabled)
750 return; 733 return;
@@ -775,7 +758,7 @@ static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist
775 spin_unlock_irqrestore(&iommu->lock, flags); 758 spin_unlock_irqrestore(&iommu->lock, flags);
776} 759}
777 760
778struct pci_iommu_ops pci_sun4u_iommu_ops = { 761const struct pci_iommu_ops pci_sun4u_iommu_ops = {
779 .alloc_consistent = pci_4u_alloc_consistent, 762 .alloc_consistent = pci_4u_alloc_consistent,
780 .free_consistent = pci_4u_free_consistent, 763 .free_consistent = pci_4u_free_consistent,
781 .map_single = pci_4u_map_single, 764 .map_single = pci_4u_map_single,
@@ -809,13 +792,12 @@ static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
809 792
810int pci_dma_supported(struct pci_dev *pdev, u64 device_mask) 793int pci_dma_supported(struct pci_dev *pdev, u64 device_mask)
811{ 794{
812 struct pcidev_cookie *pcp = pdev->sysdata;
813 u64 dma_addr_mask; 795 u64 dma_addr_mask;
814 796
815 if (pdev == NULL) { 797 if (pdev == NULL) {
816 dma_addr_mask = 0xffffffff; 798 dma_addr_mask = 0xffffffff;
817 } else { 799 } else {
818 struct pci_iommu *iommu = pcp->pbm->iommu; 800 struct iommu *iommu = pdev->dev.archdata.iommu;
819 801
820 dma_addr_mask = iommu->dma_addr_mask; 802 dma_addr_mask = iommu->dma_addr_mask;
821 803
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index fda5db223d96..253d40ec2245 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -1,7 +1,6 @@
1/* $Id: pci_psycho.c,v 1.33 2002/02/01 00:58:33 davem Exp $ 1/* pci_psycho.c: PSYCHO/U2P specific PCI controller support.
2 * pci_psycho.c: PSYCHO/U2P specific PCI controller support.
3 * 2 *
4 * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@caipfs.rutgers.edu) 3 * Copyright (C) 1997, 1998, 1999, 2007 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be) 4 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com) 5 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
7 */ 6 */
@@ -119,6 +118,10 @@ static int psycho_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
119 u16 tmp16; 118 u16 tmp16;
120 u8 tmp8; 119 u8 tmp8;
121 120
121 if (bus_dev == pbm->pci_bus && devfn == 0x00)
122 return pci_host_bridge_read_pci_cfg(bus_dev, devfn, where,
123 size, value);
124
122 switch (size) { 125 switch (size) {
123 case 1: 126 case 1:
124 *value = 0xff; 127 *value = 0xff;
@@ -172,6 +175,9 @@ static int psycho_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
172 unsigned char bus = bus_dev->number; 175 unsigned char bus = bus_dev->number;
173 u32 *addr; 176 u32 *addr;
174 177
178 if (bus_dev == pbm->pci_bus && devfn == 0x00)
179 return pci_host_bridge_write_pci_cfg(bus_dev, devfn, where,
180 size, value);
175 addr = psycho_pci_config_mkaddr(pbm, bus, devfn, where); 181 addr = psycho_pci_config_mkaddr(pbm, bus, devfn, where);
176 if (!addr) 182 if (!addr)
177 return PCIBIOS_SUCCESSFUL; 183 return PCIBIOS_SUCCESSFUL;
@@ -263,7 +269,7 @@ static void __psycho_check_one_stc(struct pci_controller_info *p,
263 struct pci_pbm_info *pbm, 269 struct pci_pbm_info *pbm,
264 int is_pbm_a) 270 int is_pbm_a)
265{ 271{
266 struct pci_strbuf *strbuf = &pbm->stc; 272 struct strbuf *strbuf = &pbm->stc;
267 unsigned long regbase = p->pbm_A.controller_regs; 273 unsigned long regbase = p->pbm_A.controller_regs;
268 unsigned long err_base, tag_base, line_base; 274 unsigned long err_base, tag_base, line_base;
269 u64 control; 275 u64 control;
@@ -412,7 +418,7 @@ static void psycho_check_iommu_error(struct pci_controller_info *p,
412 unsigned long afar, 418 unsigned long afar,
413 enum psycho_error_type type) 419 enum psycho_error_type type)
414{ 420{
415 struct pci_iommu *iommu = p->pbm_A.iommu; 421 struct iommu *iommu = p->pbm_A.iommu;
416 unsigned long iommu_tag[16]; 422 unsigned long iommu_tag[16];
417 unsigned long iommu_data[16]; 423 unsigned long iommu_data[16];
418 unsigned long flags; 424 unsigned long flags;
@@ -895,59 +901,6 @@ static void psycho_register_error_handlers(struct pci_controller_info *p)
895} 901}
896 902
897/* PSYCHO boot time probing and initialization. */ 903/* PSYCHO boot time probing and initialization. */
898static void psycho_resource_adjust(struct pci_dev *pdev,
899 struct resource *res,
900 struct resource *root)
901{
902 res->start += root->start;
903 res->end += root->start;
904}
905
906static void psycho_base_address_update(struct pci_dev *pdev, int resource)
907{
908 struct pcidev_cookie *pcp = pdev->sysdata;
909 struct pci_pbm_info *pbm = pcp->pbm;
910 struct resource *res, *root;
911 u32 reg;
912 int where, size, is_64bit;
913
914 res = &pdev->resource[resource];
915 if (resource < 6) {
916 where = PCI_BASE_ADDRESS_0 + (resource * 4);
917 } else if (resource == PCI_ROM_RESOURCE) {
918 where = pdev->rom_base_reg;
919 } else {
920 /* Somebody might have asked allocation of a non-standard resource */
921 return;
922 }
923
924 is_64bit = 0;
925 if (res->flags & IORESOURCE_IO)
926 root = &pbm->io_space;
927 else {
928 root = &pbm->mem_space;
929 if ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
930 == PCI_BASE_ADDRESS_MEM_TYPE_64)
931 is_64bit = 1;
932 }
933
934 size = res->end - res->start;
935 pci_read_config_dword(pdev, where, &reg);
936 reg = ((reg & size) |
937 (((u32)(res->start - root->start)) & ~size));
938 if (resource == PCI_ROM_RESOURCE) {
939 reg |= PCI_ROM_ADDRESS_ENABLE;
940 res->flags |= IORESOURCE_ROM_ENABLE;
941 }
942 pci_write_config_dword(pdev, where, reg);
943
944 /* This knows that the upper 32-bits of the address
945 * must be zero. Our PCI common layer enforces this.
946 */
947 if (is_64bit)
948 pci_write_config_dword(pdev, where + 4, 0);
949}
950
951static void pbm_config_busmastering(struct pci_pbm_info *pbm) 904static void pbm_config_busmastering(struct pci_pbm_info *pbm)
952{ 905{
953 u8 *addr; 906 u8 *addr;
@@ -968,28 +921,7 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
968static void pbm_scan_bus(struct pci_controller_info *p, 921static void pbm_scan_bus(struct pci_controller_info *p,
969 struct pci_pbm_info *pbm) 922 struct pci_pbm_info *pbm)
970{ 923{
971 struct pcidev_cookie *cookie = kzalloc(sizeof(*cookie), GFP_KERNEL); 924 pbm->pci_bus = pci_scan_one_pbm(pbm);
972
973 if (!cookie) {
974 prom_printf("PSYCHO: Critical allocation failure.\n");
975 prom_halt();
976 }
977
978 /* All we care about is the PBM. */
979 cookie->pbm = pbm;
980
981 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno,
982 p->pci_ops,
983 pbm);
984 pci_fixup_host_bridge_self(pbm->pci_bus);
985 pbm->pci_bus->self->sysdata = cookie;
986
987 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
988 pci_record_assignments(pbm, pbm->pci_bus);
989 pci_assign_unassigned(pbm, pbm->pci_bus);
990 pci_fixup_irq(pbm, pbm->pci_bus);
991 pci_determine_66mhz_disposition(pbm, pbm->pci_bus);
992 pci_setup_busmastering(pbm, pbm->pci_bus);
993} 925}
994 926
995static void psycho_scan_bus(struct pci_controller_info *p) 927static void psycho_scan_bus(struct pci_controller_info *p)
@@ -1009,7 +941,7 @@ static void psycho_scan_bus(struct pci_controller_info *p)
1009 941
1010static void psycho_iommu_init(struct pci_controller_info *p) 942static void psycho_iommu_init(struct pci_controller_info *p)
1011{ 943{
1012 struct pci_iommu *iommu = p->pbm_A.iommu; 944 struct iommu *iommu = p->pbm_A.iommu;
1013 unsigned long i; 945 unsigned long i;
1014 u64 control; 946 u64 control;
1015 947
@@ -1094,19 +1026,6 @@ static void psycho_controller_hwinit(struct pci_controller_info *p)
1094 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp); 1026 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp);
1095} 1027}
1096 1028
1097static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1098 struct pci_pbm_info *pbm)
1099{
1100 char *name = pbm->name;
1101
1102 pbm->io_space.name = pbm->mem_space.name = name;
1103
1104 request_resource(&ioport_resource, &pbm->io_space);
1105 request_resource(&iomem_resource, &pbm->mem_space);
1106 pci_register_legacy_regions(&pbm->io_space,
1107 &pbm->mem_space);
1108}
1109
1110static void psycho_pbm_strbuf_init(struct pci_controller_info *p, 1029static void psycho_pbm_strbuf_init(struct pci_controller_info *p,
1111 struct pci_pbm_info *pbm, 1030 struct pci_pbm_info *pbm,
1112 int is_pbm_a) 1031 int is_pbm_a)
@@ -1172,19 +1091,11 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1172 unsigned int *busrange; 1091 unsigned int *busrange;
1173 struct property *prop; 1092 struct property *prop;
1174 struct pci_pbm_info *pbm; 1093 struct pci_pbm_info *pbm;
1175 int len;
1176 1094
1177 if (is_pbm_a) { 1095 if (is_pbm_a)
1178 pbm = &p->pbm_A; 1096 pbm = &p->pbm_A;
1179 pbm->pci_first_slot = 1; 1097 else
1180 pbm->io_space.start = pbm->controller_regs + PSYCHO_IOSPACE_A;
1181 pbm->mem_space.start = pbm->controller_regs + PSYCHO_MEMSPACE_A;
1182 } else {
1183 pbm = &p->pbm_B; 1098 pbm = &p->pbm_B;
1184 pbm->pci_first_slot = 2;
1185 pbm->io_space.start = pbm->controller_regs + PSYCHO_IOSPACE_B;
1186 pbm->mem_space.start = pbm->controller_regs + PSYCHO_MEMSPACE_B;
1187 }
1188 1099
1189 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO; 1100 pbm->chip_type = PBM_CHIP_TYPE_PSYCHO;
1190 pbm->chip_version = 0; 1101 pbm->chip_version = 0;
@@ -1196,41 +1107,15 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1196 if (prop) 1107 if (prop)
1197 pbm->chip_revision = *(int *) prop->value; 1108 pbm->chip_revision = *(int *) prop->value;
1198 1109
1199 pbm->io_space.end = pbm->io_space.start + PSYCHO_IOSPACE_SIZE;
1200 pbm->io_space.flags = IORESOURCE_IO;
1201 pbm->mem_space.end = pbm->mem_space.start + PSYCHO_MEMSPACE_SIZE;
1202 pbm->mem_space.flags = IORESOURCE_MEM;
1203
1204 pbm->parent = p; 1110 pbm->parent = p;
1205 pbm->prom_node = dp; 1111 pbm->prom_node = dp;
1206 pbm->name = dp->full_name; 1112 pbm->name = dp->full_name;
1207 1113
1208 pbm_register_toplevel_resources(p, pbm);
1209
1210 printk("%s: PSYCHO PCI Bus Module ver[%x:%x]\n", 1114 printk("%s: PSYCHO PCI Bus Module ver[%x:%x]\n",
1211 pbm->name, 1115 pbm->name,
1212 pbm->chip_version, pbm->chip_revision); 1116 pbm->chip_version, pbm->chip_revision);
1213 1117
1214 prop = of_find_property(dp, "ranges", &len); 1118 pci_determine_mem_io_space(pbm);
1215 if (prop) {
1216 pbm->pbm_ranges = prop->value;
1217 pbm->num_pbm_ranges =
1218 (len / sizeof(struct linux_prom_pci_ranges));
1219 } else {
1220 pbm->num_pbm_ranges = 0;
1221 }
1222
1223 prop = of_find_property(dp, "interrupt-map", &len);
1224 if (prop) {
1225 pbm->pbm_intmap = prop->value;
1226 pbm->num_pbm_intmap =
1227 (len / sizeof(struct linux_prom_pci_intmap));
1228
1229 prop = of_find_property(dp, "interrupt-map-mask", NULL);
1230 pbm->pbm_intmask = prop->value;
1231 } else {
1232 pbm->num_pbm_intmap = 0;
1233 }
1234 1119
1235 prop = of_find_property(dp, "bus-range", NULL); 1120 prop = of_find_property(dp, "bus-range", NULL);
1236 busrange = prop->value; 1121 busrange = prop->value;
@@ -1246,7 +1131,7 @@ void psycho_init(struct device_node *dp, char *model_name)
1246{ 1131{
1247 struct linux_prom64_registers *pr_regs; 1132 struct linux_prom64_registers *pr_regs;
1248 struct pci_controller_info *p; 1133 struct pci_controller_info *p;
1249 struct pci_iommu *iommu; 1134 struct iommu *iommu;
1250 struct property *prop; 1135 struct property *prop;
1251 u32 upa_portid; 1136 u32 upa_portid;
1252 int is_pbm_a; 1137 int is_pbm_a;
@@ -1269,7 +1154,7 @@ void psycho_init(struct device_node *dp, char *model_name)
1269 prom_printf("PSYCHO: Fatal memory allocation error.\n"); 1154 prom_printf("PSYCHO: Fatal memory allocation error.\n");
1270 prom_halt(); 1155 prom_halt();
1271 } 1156 }
1272 iommu = kzalloc(sizeof(struct pci_iommu), GFP_ATOMIC); 1157 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1273 if (!iommu) { 1158 if (!iommu) {
1274 prom_printf("PSYCHO: Fatal memory allocation error.\n"); 1159 prom_printf("PSYCHO: Fatal memory allocation error.\n");
1275 prom_halt(); 1160 prom_halt();
@@ -1282,10 +1167,7 @@ void psycho_init(struct device_node *dp, char *model_name)
1282 p->pbm_A.portid = upa_portid; 1167 p->pbm_A.portid = upa_portid;
1283 p->pbm_B.portid = upa_portid; 1168 p->pbm_B.portid = upa_portid;
1284 p->index = pci_num_controllers++; 1169 p->index = pci_num_controllers++;
1285 p->pbms_same_domain = 0;
1286 p->scan_bus = psycho_scan_bus; 1170 p->scan_bus = psycho_scan_bus;
1287 p->base_address_update = psycho_base_address_update;
1288 p->resource_adjust = psycho_resource_adjust;
1289 p->pci_ops = &psycho_ops; 1171 p->pci_ops = &psycho_ops;
1290 1172
1291 prop = of_find_property(dp, "reg", NULL); 1173 prop = of_find_property(dp, "reg", NULL);
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 94bb681f2323..397862fbd9e1 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -1,7 +1,6 @@
1/* $Id: pci_sabre.c,v 1.42 2002/01/23 11:27:32 davem Exp $ 1/* pci_sabre.c: Sabre specific PCI controller support.
2 * pci_sabre.c: Sabre specific PCI controller support.
3 * 2 *
4 * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@caipfs.rutgers.edu) 3 * Copyright (C) 1997, 1998, 1999, 2007 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be) 4 * Copyright (C) 1998, 1999 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com) 5 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
7 */ 6 */
@@ -254,9 +253,6 @@ static int __sabre_out_of_range(struct pci_pbm_info *pbm,
254 return 0; 253 return 0;
255 254
256 return ((pbm->parent == 0) || 255 return ((pbm->parent == 0) ||
257 ((pbm == &pbm->parent->pbm_B) &&
258 (bus == pbm->pci_first_busno) &&
259 PCI_SLOT(devfn) > 8) ||
260 ((pbm == &pbm->parent->pbm_A) && 256 ((pbm == &pbm->parent->pbm_A) &&
261 (bus == pbm->pci_first_busno) && 257 (bus == pbm->pci_first_busno) &&
262 PCI_SLOT(devfn) > 8)); 258 PCI_SLOT(devfn) > 8));
@@ -322,6 +318,12 @@ static int __sabre_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
322static int sabre_read_pci_cfg(struct pci_bus *bus, unsigned int devfn, 318static int sabre_read_pci_cfg(struct pci_bus *bus, unsigned int devfn,
323 int where, int size, u32 *value) 319 int where, int size, u32 *value)
324{ 320{
321 struct pci_pbm_info *pbm = bus->sysdata;
322
323 if (bus == pbm->pci_bus && devfn == 0x00)
324 return pci_host_bridge_read_pci_cfg(bus, devfn, where,
325 size, value);
326
325 if (!bus->number && sabre_out_of_range(devfn)) { 327 if (!bus->number && sabre_out_of_range(devfn)) {
326 switch (size) { 328 switch (size) {
327 case 1: 329 case 1:
@@ -438,6 +440,12 @@ static int __sabre_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
438static int sabre_write_pci_cfg(struct pci_bus *bus, unsigned int devfn, 440static int sabre_write_pci_cfg(struct pci_bus *bus, unsigned int devfn,
439 int where, int size, u32 value) 441 int where, int size, u32 value)
440{ 442{
443 struct pci_pbm_info *pbm = bus->sysdata;
444
445 if (bus == pbm->pci_bus && devfn == 0x00)
446 return pci_host_bridge_write_pci_cfg(bus, devfn, where,
447 size, value);
448
441 if (bus->number) 449 if (bus->number)
442 return __sabre_write_pci_cfg(bus, devfn, where, size, value); 450 return __sabre_write_pci_cfg(bus, devfn, where, size, value);
443 451
@@ -490,7 +498,7 @@ static void sabre_check_iommu_error(struct pci_controller_info *p,
490 unsigned long afsr, 498 unsigned long afsr,
491 unsigned long afar) 499 unsigned long afar)
492{ 500{
493 struct pci_iommu *iommu = p->pbm_A.iommu; 501 struct iommu *iommu = p->pbm_A.iommu;
494 unsigned long iommu_tag[16]; 502 unsigned long iommu_tag[16];
495 unsigned long iommu_data[16]; 503 unsigned long iommu_data[16];
496 unsigned long flags; 504 unsigned long flags;
@@ -710,8 +718,8 @@ static irqreturn_t sabre_pcierr_intr_other(struct pci_controller_info *p)
710 p->index); 718 p->index);
711 ret = IRQ_HANDLED; 719 ret = IRQ_HANDLED;
712 } 720 }
713 pci_read_config_word(sabre_root_bus->self, 721 pci_bus_read_config_word(sabre_root_bus, 0,
714 PCI_STATUS, &stat); 722 PCI_STATUS, &stat);
715 if (stat & (PCI_STATUS_PARITY | 723 if (stat & (PCI_STATUS_PARITY |
716 PCI_STATUS_SIG_TARGET_ABORT | 724 PCI_STATUS_SIG_TARGET_ABORT |
717 PCI_STATUS_REC_TARGET_ABORT | 725 PCI_STATUS_REC_TARGET_ABORT |
@@ -719,8 +727,8 @@ static irqreturn_t sabre_pcierr_intr_other(struct pci_controller_info *p)
719 PCI_STATUS_SIG_SYSTEM_ERROR)) { 727 PCI_STATUS_SIG_SYSTEM_ERROR)) {
720 printk("SABRE%d: PCI bus error, PCI_STATUS[%04x]\n", 728 printk("SABRE%d: PCI bus error, PCI_STATUS[%04x]\n",
721 p->index, stat); 729 p->index, stat);
722 pci_write_config_word(sabre_root_bus->self, 730 pci_bus_write_config_word(sabre_root_bus, 0,
723 PCI_STATUS, 0xffff); 731 PCI_STATUS, 0xffff);
724 ret = IRQ_HANDLED; 732 ret = IRQ_HANDLED;
725 } 733 }
726 return ret; 734 return ret;
@@ -800,12 +808,10 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id)
800 if (error_bits & (SABRE_PIOAFSR_PTA | SABRE_PIOAFSR_STA)) { 808 if (error_bits & (SABRE_PIOAFSR_PTA | SABRE_PIOAFSR_STA)) {
801 sabre_check_iommu_error(p, afsr, afar); 809 sabre_check_iommu_error(p, afsr, afar);
802 pci_scan_for_target_abort(p, &p->pbm_A, p->pbm_A.pci_bus); 810 pci_scan_for_target_abort(p, &p->pbm_A, p->pbm_A.pci_bus);
803 pci_scan_for_target_abort(p, &p->pbm_B, p->pbm_B.pci_bus);
804 } 811 }
805 if (error_bits & (SABRE_PIOAFSR_PMA | SABRE_PIOAFSR_SMA)) { 812 if (error_bits & (SABRE_PIOAFSR_PMA | SABRE_PIOAFSR_SMA))
806 pci_scan_for_master_abort(p, &p->pbm_A, p->pbm_A.pci_bus); 813 pci_scan_for_master_abort(p, &p->pbm_A, p->pbm_A.pci_bus);
807 pci_scan_for_master_abort(p, &p->pbm_B, p->pbm_B.pci_bus); 814
808 }
809 /* For excessive retries, SABRE/PBM will abort the device 815 /* For excessive retries, SABRE/PBM will abort the device
810 * and there is no way to specifically check for excessive 816 * and there is no way to specifically check for excessive
811 * retries in the config space status registers. So what 817 * retries in the config space status registers. So what
@@ -813,10 +819,8 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id)
813 * abort events. 819 * abort events.
814 */ 820 */
815 821
816 if (error_bits & (SABRE_PIOAFSR_PPERR | SABRE_PIOAFSR_SPERR)) { 822 if (error_bits & (SABRE_PIOAFSR_PPERR | SABRE_PIOAFSR_SPERR))
817 pci_scan_for_parity_error(p, &p->pbm_A, p->pbm_A.pci_bus); 823 pci_scan_for_parity_error(p, &p->pbm_A, p->pbm_A.pci_bus);
818 pci_scan_for_parity_error(p, &p->pbm_B, p->pbm_B.pci_bus);
819 }
820 824
821 return IRQ_HANDLED; 825 return IRQ_HANDLED;
822} 826}
@@ -869,144 +873,52 @@ static void sabre_register_error_handlers(struct pci_controller_info *p)
869 sabre_write(base + SABRE_PCICTRL, tmp); 873 sabre_write(base + SABRE_PCICTRL, tmp);
870} 874}
871 875
872static void sabre_resource_adjust(struct pci_dev *pdev,
873 struct resource *res,
874 struct resource *root)
875{
876 struct pci_pbm_info *pbm = pdev->bus->sysdata;
877 unsigned long base;
878
879 if (res->flags & IORESOURCE_IO)
880 base = pbm->controller_regs + SABRE_IOSPACE;
881 else
882 base = pbm->controller_regs + SABRE_MEMSPACE;
883
884 res->start += base;
885 res->end += base;
886}
887
888static void sabre_base_address_update(struct pci_dev *pdev, int resource)
889{
890 struct pcidev_cookie *pcp = pdev->sysdata;
891 struct pci_pbm_info *pbm = pcp->pbm;
892 struct resource *res;
893 unsigned long base;
894 u32 reg;
895 int where, size, is_64bit;
896
897 res = &pdev->resource[resource];
898 if (resource < 6) {
899 where = PCI_BASE_ADDRESS_0 + (resource * 4);
900 } else if (resource == PCI_ROM_RESOURCE) {
901 where = pdev->rom_base_reg;
902 } else {
903 /* Somebody might have asked allocation of a non-standard resource */
904 return;
905 }
906
907 is_64bit = 0;
908 if (res->flags & IORESOURCE_IO)
909 base = pbm->controller_regs + SABRE_IOSPACE;
910 else {
911 base = pbm->controller_regs + SABRE_MEMSPACE;
912 if ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
913 == PCI_BASE_ADDRESS_MEM_TYPE_64)
914 is_64bit = 1;
915 }
916
917 size = res->end - res->start;
918 pci_read_config_dword(pdev, where, &reg);
919 reg = ((reg & size) |
920 (((u32)(res->start - base)) & ~size));
921 if (resource == PCI_ROM_RESOURCE) {
922 reg |= PCI_ROM_ADDRESS_ENABLE;
923 res->flags |= IORESOURCE_ROM_ENABLE;
924 }
925 pci_write_config_dword(pdev, where, reg);
926
927 /* This knows that the upper 32-bits of the address
928 * must be zero. Our PCI common layer enforces this.
929 */
930 if (is_64bit)
931 pci_write_config_dword(pdev, where + 4, 0);
932}
933
934static void apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus) 876static void apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus)
935{ 877{
936 struct pci_dev *pdev; 878 struct pci_dev *pdev;
937 879
938 list_for_each_entry(pdev, &sabre_bus->devices, bus_list) { 880 list_for_each_entry(pdev, &sabre_bus->devices, bus_list) {
939
940 if (pdev->vendor == PCI_VENDOR_ID_SUN && 881 if (pdev->vendor == PCI_VENDOR_ID_SUN &&
941 pdev->device == PCI_DEVICE_ID_SUN_SIMBA) { 882 pdev->device == PCI_DEVICE_ID_SUN_SIMBA) {
942 u32 word32;
943 u16 word16; 883 u16 word16;
944 884
945 sabre_read_pci_cfg(pdev->bus, pdev->devfn, 885 pci_read_config_word(pdev, PCI_COMMAND, &word16);
946 PCI_COMMAND, 2, &word32);
947 word16 = (u16) word32;
948 word16 |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | 886 word16 |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
949 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | 887 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY |
950 PCI_COMMAND_IO; 888 PCI_COMMAND_IO;
951 word32 = (u32) word16; 889 pci_write_config_word(pdev, PCI_COMMAND, word16);
952 sabre_write_pci_cfg(pdev->bus, pdev->devfn,
953 PCI_COMMAND, 2, word32);
954 890
955 /* Status register bits are "write 1 to clear". */ 891 /* Status register bits are "write 1 to clear". */
956 sabre_write_pci_cfg(pdev->bus, pdev->devfn, 892 pci_write_config_word(pdev, PCI_STATUS, 0xffff);
957 PCI_STATUS, 2, 0xffff); 893 pci_write_config_word(pdev, PCI_SEC_STATUS, 0xffff);
958 sabre_write_pci_cfg(pdev->bus, pdev->devfn,
959 PCI_SEC_STATUS, 2, 0xffff);
960 894
961 /* Use a primary/seconday latency timer value 895 /* Use a primary/seconday latency timer value
962 * of 64. 896 * of 64.
963 */ 897 */
964 sabre_write_pci_cfg(pdev->bus, pdev->devfn, 898 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
965 PCI_LATENCY_TIMER, 1, 64); 899 pci_write_config_byte(pdev, PCI_SEC_LATENCY_TIMER, 64);
966 sabre_write_pci_cfg(pdev->bus, pdev->devfn,
967 PCI_SEC_LATENCY_TIMER, 1, 64);
968 900
969 /* Enable reporting/forwarding of master aborts, 901 /* Enable reporting/forwarding of master aborts,
970 * parity, and SERR. 902 * parity, and SERR.
971 */ 903 */
972 sabre_write_pci_cfg(pdev->bus, pdev->devfn, 904 pci_write_config_byte(pdev, PCI_BRIDGE_CONTROL,
973 PCI_BRIDGE_CONTROL, 1, 905 (PCI_BRIDGE_CTL_PARITY |
974 (PCI_BRIDGE_CTL_PARITY | 906 PCI_BRIDGE_CTL_SERR |
975 PCI_BRIDGE_CTL_SERR | 907 PCI_BRIDGE_CTL_MASTER_ABORT));
976 PCI_BRIDGE_CTL_MASTER_ABORT));
977 } 908 }
978 } 909 }
979} 910}
980 911
981static struct pcidev_cookie *alloc_bridge_cookie(struct pci_pbm_info *pbm)
982{
983 struct pcidev_cookie *cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
984
985 if (!cookie) {
986 prom_printf("SABRE: Critical allocation failure.\n");
987 prom_halt();
988 }
989
990 /* All we care about is the PBM. */
991 cookie->pbm = pbm;
992
993 return cookie;
994}
995
996static void sabre_scan_bus(struct pci_controller_info *p) 912static void sabre_scan_bus(struct pci_controller_info *p)
997{ 913{
998 static int once; 914 static int once;
999 struct pci_bus *sabre_bus, *pbus; 915 struct pci_bus *pbus;
1000 struct pci_pbm_info *pbm;
1001 struct pcidev_cookie *cookie;
1002 int sabres_scanned;
1003 916
1004 /* The APB bridge speaks to the Sabre host PCI bridge 917 /* The APB bridge speaks to the Sabre host PCI bridge
1005 * at 66Mhz, but the front side of APB runs at 33Mhz 918 * at 66Mhz, but the front side of APB runs at 33Mhz
1006 * for both segments. 919 * for both segments.
1007 */ 920 */
1008 p->pbm_A.is_66mhz_capable = 0; 921 p->pbm_A.is_66mhz_capable = 0;
1009 p->pbm_B.is_66mhz_capable = 0;
1010 922
1011 /* This driver has not been verified to handle 923 /* This driver has not been verified to handle
1012 * multiple SABREs yet, so trap this. 924 * multiple SABREs yet, so trap this.
@@ -1020,56 +932,13 @@ static void sabre_scan_bus(struct pci_controller_info *p)
1020 } 932 }
1021 once++; 933 once++;
1022 934
1023 cookie = alloc_bridge_cookie(&p->pbm_A); 935 pbus = pci_scan_one_pbm(&p->pbm_A);
1024 936 if (!pbus)
1025 sabre_bus = pci_scan_bus(p->pci_first_busno, 937 return;
1026 p->pci_ops,
1027 &p->pbm_A);
1028 pci_fixup_host_bridge_self(sabre_bus);
1029 sabre_bus->self->sysdata = cookie;
1030
1031 sabre_root_bus = sabre_bus;
1032
1033 apb_init(p, sabre_bus);
1034
1035 sabres_scanned = 0;
1036
1037 list_for_each_entry(pbus, &sabre_bus->children, node) {
1038
1039 if (pbus->number == p->pbm_A.pci_first_busno) {
1040 pbm = &p->pbm_A;
1041 } else if (pbus->number == p->pbm_B.pci_first_busno) {
1042 pbm = &p->pbm_B;
1043 } else
1044 continue;
1045
1046 cookie = alloc_bridge_cookie(pbm);
1047 pbus->self->sysdata = cookie;
1048
1049 sabres_scanned++;
1050 938
1051 pbus->sysdata = pbm; 939 sabre_root_bus = pbus;
1052 pbm->pci_bus = pbus;
1053 pci_fill_in_pbm_cookies(pbus, pbm, pbm->prom_node);
1054 pci_record_assignments(pbm, pbus);
1055 pci_assign_unassigned(pbm, pbus);
1056 pci_fixup_irq(pbm, pbus);
1057 pci_determine_66mhz_disposition(pbm, pbus);
1058 pci_setup_busmastering(pbm, pbus);
1059 }
1060 940
1061 if (!sabres_scanned) { 941 apb_init(p, pbus);
1062 /* Hummingbird, no APBs. */
1063 pbm = &p->pbm_A;
1064 sabre_bus->sysdata = pbm;
1065 pbm->pci_bus = sabre_bus;
1066 pci_fill_in_pbm_cookies(sabre_bus, pbm, pbm->prom_node);
1067 pci_record_assignments(pbm, sabre_bus);
1068 pci_assign_unassigned(pbm, sabre_bus);
1069 pci_fixup_irq(pbm, sabre_bus);
1070 pci_determine_66mhz_disposition(pbm, sabre_bus);
1071 pci_setup_busmastering(pbm, sabre_bus);
1072 }
1073 942
1074 sabre_register_error_handlers(p); 943 sabre_register_error_handlers(p);
1075} 944}
@@ -1078,7 +947,7 @@ static void sabre_iommu_init(struct pci_controller_info *p,
1078 int tsbsize, unsigned long dvma_offset, 947 int tsbsize, unsigned long dvma_offset,
1079 u32 dma_mask) 948 u32 dma_mask)
1080{ 949{
1081 struct pci_iommu *iommu = p->pbm_A.iommu; 950 struct iommu *iommu = p->pbm_A.iommu;
1082 unsigned long i; 951 unsigned long i;
1083 u64 control; 952 u64 control;
1084 953
@@ -1126,224 +995,31 @@ static void sabre_iommu_init(struct pci_controller_info *p,
1126 sabre_write(p->pbm_A.controller_regs + SABRE_IOMMU_CONTROL, control); 995 sabre_write(p->pbm_A.controller_regs + SABRE_IOMMU_CONTROL, control);
1127} 996}
1128 997
1129static void pbm_register_toplevel_resources(struct pci_controller_info *p, 998static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp)
1130 struct pci_pbm_info *pbm)
1131{
1132 char *name = pbm->name;
1133 unsigned long ibase = p->pbm_A.controller_regs + SABRE_IOSPACE;
1134 unsigned long mbase = p->pbm_A.controller_regs + SABRE_MEMSPACE;
1135 unsigned int devfn;
1136 unsigned long first, last, i;
1137 u8 *addr, map;
1138
1139 sprintf(name, "SABRE%d PBM%c",
1140 p->index,
1141 (pbm == &p->pbm_A ? 'A' : 'B'));
1142 pbm->io_space.name = pbm->mem_space.name = name;
1143
1144 devfn = PCI_DEVFN(1, (pbm == &p->pbm_A) ? 0 : 1);
1145 addr = sabre_pci_config_mkaddr(pbm, 0, devfn, APB_IO_ADDRESS_MAP);
1146 map = 0;
1147 pci_config_read8(addr, &map);
1148
1149 first = 8;
1150 last = 0;
1151 for (i = 0; i < 8; i++) {
1152 if ((map & (1 << i)) != 0) {
1153 if (first > i)
1154 first = i;
1155 if (last < i)
1156 last = i;
1157 }
1158 }
1159 pbm->io_space.start = ibase + (first << 21UL);
1160 pbm->io_space.end = ibase + (last << 21UL) + ((1 << 21UL) - 1);
1161 pbm->io_space.flags = IORESOURCE_IO;
1162
1163 addr = sabre_pci_config_mkaddr(pbm, 0, devfn, APB_MEM_ADDRESS_MAP);
1164 map = 0;
1165 pci_config_read8(addr, &map);
1166
1167 first = 8;
1168 last = 0;
1169 for (i = 0; i < 8; i++) {
1170 if ((map & (1 << i)) != 0) {
1171 if (first > i)
1172 first = i;
1173 if (last < i)
1174 last = i;
1175 }
1176 }
1177 pbm->mem_space.start = mbase + (first << 29UL);
1178 pbm->mem_space.end = mbase + (last << 29UL) + ((1 << 29UL) - 1);
1179 pbm->mem_space.flags = IORESOURCE_MEM;
1180
1181 if (request_resource(&ioport_resource, &pbm->io_space) < 0) {
1182 prom_printf("Cannot register PBM-%c's IO space.\n",
1183 (pbm == &p->pbm_A ? 'A' : 'B'));
1184 prom_halt();
1185 }
1186 if (request_resource(&iomem_resource, &pbm->mem_space) < 0) {
1187 prom_printf("Cannot register PBM-%c's MEM space.\n",
1188 (pbm == &p->pbm_A ? 'A' : 'B'));
1189 prom_halt();
1190 }
1191
1192 /* Register legacy regions if this PBM covers that area. */
1193 if (pbm->io_space.start == ibase &&
1194 pbm->mem_space.start == mbase)
1195 pci_register_legacy_regions(&pbm->io_space,
1196 &pbm->mem_space);
1197}
1198
1199static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp, u32 dma_start, u32 dma_end)
1200{ 999{
1201 struct pci_pbm_info *pbm; 1000 struct pci_pbm_info *pbm;
1202 struct device_node *node;
1203 struct property *prop;
1204 u32 *busrange;
1205 int len, simbas_found;
1206
1207 simbas_found = 0;
1208 node = dp->child;
1209 while (node != NULL) {
1210 if (strcmp(node->name, "pci"))
1211 goto next_pci;
1212
1213 prop = of_find_property(node, "model", NULL);
1214 if (!prop || strncmp(prop->value, "SUNW,simba", prop->length))
1215 goto next_pci;
1216
1217 simbas_found++;
1218
1219 prop = of_find_property(node, "bus-range", NULL);
1220 busrange = prop->value;
1221 if (busrange[0] == 1)
1222 pbm = &p->pbm_B;
1223 else
1224 pbm = &p->pbm_A;
1225
1226 pbm->name = node->full_name;
1227 printk("%s: SABRE PCI Bus Module\n", pbm->name);
1228
1229 pbm->chip_type = PBM_CHIP_TYPE_SABRE;
1230 pbm->parent = p;
1231 pbm->prom_node = node;
1232 pbm->pci_first_slot = 1;
1233 pbm->pci_first_busno = busrange[0];
1234 pbm->pci_last_busno = busrange[1];
1235
1236 prop = of_find_property(node, "ranges", &len);
1237 if (prop) {
1238 pbm->pbm_ranges = prop->value;
1239 pbm->num_pbm_ranges =
1240 (len / sizeof(struct linux_prom_pci_ranges));
1241 } else {
1242 pbm->num_pbm_ranges = 0;
1243 }
1244 1001
1245 prop = of_find_property(node, "interrupt-map", &len); 1002 pbm = &p->pbm_A;
1246 if (prop) { 1003 pbm->name = dp->full_name;
1247 pbm->pbm_intmap = prop->value; 1004 printk("%s: SABRE PCI Bus Module\n", pbm->name);
1248 pbm->num_pbm_intmap =
1249 (len / sizeof(struct linux_prom_pci_intmap));
1250
1251 prop = of_find_property(node, "interrupt-map-mask",
1252 NULL);
1253 pbm->pbm_intmask = prop->value;
1254 } else {
1255 pbm->num_pbm_intmap = 0;
1256 }
1257 1005
1258 pbm_register_toplevel_resources(p, pbm); 1006 pbm->chip_type = PBM_CHIP_TYPE_SABRE;
1259 1007 pbm->parent = p;
1260 next_pci: 1008 pbm->prom_node = dp;
1261 node = node->sibling; 1009 pbm->pci_first_busno = p->pci_first_busno;
1262 } 1010 pbm->pci_last_busno = p->pci_last_busno;
1263 if (simbas_found == 0) {
1264 struct resource *rp;
1265 1011
1266 /* No APBs underneath, probably this is a hummingbird 1012 pci_determine_mem_io_space(pbm);
1267 * system.
1268 */
1269 pbm = &p->pbm_A;
1270 pbm->parent = p;
1271 pbm->prom_node = dp;
1272 pbm->pci_first_busno = p->pci_first_busno;
1273 pbm->pci_last_busno = p->pci_last_busno;
1274
1275 prop = of_find_property(dp, "ranges", &len);
1276 if (prop) {
1277 pbm->pbm_ranges = prop->value;
1278 pbm->num_pbm_ranges =
1279 (len / sizeof(struct linux_prom_pci_ranges));
1280 } else {
1281 pbm->num_pbm_ranges = 0;
1282 }
1283
1284 prop = of_find_property(dp, "interrupt-map", &len);
1285 if (prop) {
1286 pbm->pbm_intmap = prop->value;
1287 pbm->num_pbm_intmap =
1288 (len / sizeof(struct linux_prom_pci_intmap));
1289
1290 prop = of_find_property(dp, "interrupt-map-mask",
1291 NULL);
1292 pbm->pbm_intmask = prop->value;
1293 } else {
1294 pbm->num_pbm_intmap = 0;
1295 }
1296
1297 pbm->name = dp->full_name;
1298 printk("%s: SABRE PCI Bus Module\n", pbm->name);
1299
1300 pbm->io_space.name = pbm->mem_space.name = pbm->name;
1301
1302 /* Hack up top-level resources. */
1303 pbm->io_space.start = p->pbm_A.controller_regs + SABRE_IOSPACE;
1304 pbm->io_space.end = pbm->io_space.start + (1UL << 24) - 1UL;
1305 pbm->io_space.flags = IORESOURCE_IO;
1306
1307 pbm->mem_space.start =
1308 (p->pbm_A.controller_regs + SABRE_MEMSPACE);
1309 pbm->mem_space.end =
1310 (pbm->mem_space.start + ((1UL << 32UL) - 1UL));
1311 pbm->mem_space.flags = IORESOURCE_MEM;
1312
1313 if (request_resource(&ioport_resource, &pbm->io_space) < 0) {
1314 prom_printf("Cannot register Hummingbird's IO space.\n");
1315 prom_halt();
1316 }
1317 if (request_resource(&iomem_resource, &pbm->mem_space) < 0) {
1318 prom_printf("Cannot register Hummingbird's MEM space.\n");
1319 prom_halt();
1320 }
1321
1322 rp = kmalloc(sizeof(*rp), GFP_KERNEL);
1323 if (!rp) {
1324 prom_printf("Cannot allocate IOMMU resource.\n");
1325 prom_halt();
1326 }
1327 rp->name = "IOMMU";
1328 rp->start = pbm->mem_space.start + (unsigned long) dma_start;
1329 rp->end = pbm->mem_space.start + (unsigned long) dma_end - 1UL;
1330 rp->flags = IORESOURCE_BUSY;
1331 request_resource(&pbm->mem_space, rp);
1332
1333 pci_register_legacy_regions(&pbm->io_space,
1334 &pbm->mem_space);
1335 }
1336} 1013}
1337 1014
1338void sabre_init(struct device_node *dp, char *model_name) 1015void sabre_init(struct device_node *dp, char *model_name)
1339{ 1016{
1340 struct linux_prom64_registers *pr_regs; 1017 const struct linux_prom64_registers *pr_regs;
1341 struct pci_controller_info *p; 1018 struct pci_controller_info *p;
1342 struct pci_iommu *iommu; 1019 struct iommu *iommu;
1343 struct property *prop;
1344 int tsbsize; 1020 int tsbsize;
1345 u32 *busrange; 1021 const u32 *busrange;
1346 u32 *vdma; 1022 const u32 *vdma;
1347 u32 upa_portid, dma_mask; 1023 u32 upa_portid, dma_mask;
1348 u64 clear_irq; 1024 u64 clear_irq;
1349 1025
@@ -1351,13 +1027,9 @@ void sabre_init(struct device_node *dp, char *model_name)
1351 if (!strcmp(model_name, "pci108e,a001")) 1027 if (!strcmp(model_name, "pci108e,a001"))
1352 hummingbird_p = 1; 1028 hummingbird_p = 1;
1353 else if (!strcmp(model_name, "SUNW,sabre")) { 1029 else if (!strcmp(model_name, "SUNW,sabre")) {
1354 prop = of_find_property(dp, "compatible", NULL); 1030 const char *compat = of_get_property(dp, "compatible", NULL);
1355 if (prop) { 1031 if (compat && !strcmp(compat, "pci108e,a001"))
1356 const char *compat = prop->value; 1032 hummingbird_p = 1;
1357
1358 if (!strcmp(compat, "pci108e,a001"))
1359 hummingbird_p = 1;
1360 }
1361 if (!hummingbird_p) { 1033 if (!hummingbird_p) {
1362 struct device_node *dp; 1034 struct device_node *dp;
1363 1035
@@ -1381,37 +1053,28 @@ void sabre_init(struct device_node *dp, char *model_name)
1381 prom_printf("SABRE: Error, kmalloc(pci_iommu) failed.\n"); 1053 prom_printf("SABRE: Error, kmalloc(pci_iommu) failed.\n");
1382 prom_halt(); 1054 prom_halt();
1383 } 1055 }
1384 p->pbm_A.iommu = p->pbm_B.iommu = iommu; 1056 p->pbm_A.iommu = iommu;
1385 1057
1386 upa_portid = 0xff; 1058 upa_portid = of_getintprop_default(dp, "upa-portid", 0xff);
1387 prop = of_find_property(dp, "upa-portid", NULL);
1388 if (prop)
1389 upa_portid = *(u32 *) prop->value;
1390 1059
1391 p->next = pci_controller_root; 1060 p->next = pci_controller_root;
1392 pci_controller_root = p; 1061 pci_controller_root = p;
1393 1062
1394 p->pbm_A.portid = upa_portid; 1063 p->pbm_A.portid = upa_portid;
1395 p->pbm_B.portid = upa_portid;
1396 p->index = pci_num_controllers++; 1064 p->index = pci_num_controllers++;
1397 p->pbms_same_domain = 1;
1398 p->scan_bus = sabre_scan_bus; 1065 p->scan_bus = sabre_scan_bus;
1399 p->base_address_update = sabre_base_address_update;
1400 p->resource_adjust = sabre_resource_adjust;
1401 p->pci_ops = &sabre_ops; 1066 p->pci_ops = &sabre_ops;
1402 1067
1403 /* 1068 /*
1404 * Map in SABRE register set and report the presence of this SABRE. 1069 * Map in SABRE register set and report the presence of this SABRE.
1405 */ 1070 */
1406 1071
1407 prop = of_find_property(dp, "reg", NULL); 1072 pr_regs = of_get_property(dp, "reg", NULL);
1408 pr_regs = prop->value;
1409 1073
1410 /* 1074 /*
1411 * First REG in property is base of entire SABRE register space. 1075 * First REG in property is base of entire SABRE register space.
1412 */ 1076 */
1413 p->pbm_A.controller_regs = pr_regs[0].phys_addr; 1077 p->pbm_A.controller_regs = pr_regs[0].phys_addr;
1414 p->pbm_B.controller_regs = pr_regs[0].phys_addr;
1415 1078
1416 /* Clear interrupts */ 1079 /* Clear interrupts */
1417 1080
@@ -1429,11 +1092,10 @@ void sabre_init(struct device_node *dp, char *model_name)
1429 SABRE_PCICTRL_ARBPARK | SABRE_PCICTRL_AEN)); 1092 SABRE_PCICTRL_ARBPARK | SABRE_PCICTRL_AEN));
1430 1093
1431 /* Now map in PCI config space for entire SABRE. */ 1094 /* Now map in PCI config space for entire SABRE. */
1432 p->pbm_A.config_space = p->pbm_B.config_space = 1095 p->pbm_A.config_space =
1433 (p->pbm_A.controller_regs + SABRE_CONFIGSPACE); 1096 (p->pbm_A.controller_regs + SABRE_CONFIGSPACE);
1434 1097
1435 prop = of_find_property(dp, "virtual-dma", NULL); 1098 vdma = of_get_property(dp, "virtual-dma", NULL);
1436 vdma = prop->value;
1437 1099
1438 dma_mask = vdma[0]; 1100 dma_mask = vdma[0];
1439 switch(vdma[1]) { 1101 switch(vdma[1]) {
@@ -1457,13 +1119,12 @@ void sabre_init(struct device_node *dp, char *model_name)
1457 1119
1458 sabre_iommu_init(p, tsbsize, vdma[0], dma_mask); 1120 sabre_iommu_init(p, tsbsize, vdma[0], dma_mask);
1459 1121
1460 prop = of_find_property(dp, "bus-range", NULL); 1122 busrange = of_get_property(dp, "bus-range", NULL);
1461 busrange = prop->value;
1462 p->pci_first_busno = busrange[0]; 1123 p->pci_first_busno = busrange[0];
1463 p->pci_last_busno = busrange[1]; 1124 p->pci_last_busno = busrange[1];
1464 1125
1465 /* 1126 /*
1466 * Look for APB underneath. 1127 * Look for APB underneath.
1467 */ 1128 */
1468 sabre_pbm_init(p, dp, vdma[0], vdma[0] + vdma[1]); 1129 sabre_pbm_init(p, dp);
1469} 1130}
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 66911b126aed..91a7385e5d32 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -1,7 +1,6 @@
1/* $Id: pci_schizo.c,v 1.24 2002/01/23 11:27:32 davem Exp $ 1/* pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
2 * pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
3 * 2 *
4 * Copyright (C) 2001, 2002, 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2001, 2002, 2003, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5
7#include <linux/kernel.h> 6#include <linux/kernel.h>
@@ -126,6 +125,9 @@ static int schizo_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
126 u16 tmp16; 125 u16 tmp16;
127 u8 tmp8; 126 u8 tmp8;
128 127
128 if (bus_dev == pbm->pci_bus && devfn == 0x00)
129 return pci_host_bridge_read_pci_cfg(bus_dev, devfn, where,
130 size, value);
129 switch (size) { 131 switch (size) {
130 case 1: 132 case 1:
131 *value = 0xff; 133 *value = 0xff;
@@ -179,6 +181,9 @@ static int schizo_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
179 unsigned char bus = bus_dev->number; 181 unsigned char bus = bus_dev->number;
180 u32 *addr; 182 u32 *addr;
181 183
184 if (bus_dev == pbm->pci_bus && devfn == 0x00)
185 return pci_host_bridge_write_pci_cfg(bus_dev, devfn, where,
186 size, value);
182 addr = schizo_pci_config_mkaddr(pbm, bus, devfn, where); 187 addr = schizo_pci_config_mkaddr(pbm, bus, devfn, where);
183 if (!addr) 188 if (!addr)
184 return PCIBIOS_SUCCESSFUL; 189 return PCIBIOS_SUCCESSFUL;
@@ -274,7 +279,7 @@ struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino)
274static void __schizo_check_stc_error_pbm(struct pci_pbm_info *pbm, 279static void __schizo_check_stc_error_pbm(struct pci_pbm_info *pbm,
275 enum schizo_error_type type) 280 enum schizo_error_type type)
276{ 281{
277 struct pci_strbuf *strbuf = &pbm->stc; 282 struct strbuf *strbuf = &pbm->stc;
278 unsigned long regbase = pbm->pbm_regs; 283 unsigned long regbase = pbm->pbm_regs;
279 unsigned long err_base, tag_base, line_base; 284 unsigned long err_base, tag_base, line_base;
280 u64 control; 285 u64 control;
@@ -382,7 +387,7 @@ static void __schizo_check_stc_error_pbm(struct pci_pbm_info *pbm,
382static void schizo_check_iommu_error_pbm(struct pci_pbm_info *pbm, 387static void schizo_check_iommu_error_pbm(struct pci_pbm_info *pbm,
383 enum schizo_error_type type) 388 enum schizo_error_type type)
384{ 389{
385 struct pci_iommu *iommu = pbm->iommu; 390 struct iommu *iommu = pbm->iommu;
386 unsigned long iommu_tag[16]; 391 unsigned long iommu_tag[16];
387 unsigned long iommu_data[16]; 392 unsigned long iommu_data[16];
388 unsigned long flags; 393 unsigned long flags;
@@ -1229,42 +1234,8 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
1229 pci_config_write8(addr, 64); 1234 pci_config_write8(addr, 64);
1230} 1235}
1231 1236
1232static void pbm_scan_bus(struct pci_controller_info *p, 1237static void schizo_scan_bus(struct pci_controller_info *p)
1233 struct pci_pbm_info *pbm)
1234{
1235 struct pcidev_cookie *cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
1236
1237 if (!cookie) {
1238 prom_printf("%s: Critical allocation failure.\n", pbm->name);
1239 prom_halt();
1240 }
1241
1242 /* All we care about is the PBM. */
1243 cookie->pbm = pbm;
1244
1245 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno,
1246 p->pci_ops,
1247 pbm);
1248 pci_fixup_host_bridge_self(pbm->pci_bus);
1249 pbm->pci_bus->self->sysdata = cookie;
1250
1251 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
1252 pci_record_assignments(pbm, pbm->pci_bus);
1253 pci_assign_unassigned(pbm, pbm->pci_bus);
1254 pci_fixup_irq(pbm, pbm->pci_bus);
1255 pci_determine_66mhz_disposition(pbm, pbm->pci_bus);
1256 pci_setup_busmastering(pbm, pbm->pci_bus);
1257}
1258
1259static void __schizo_scan_bus(struct pci_controller_info *p,
1260 int chip_type)
1261{ 1238{
1262 if (!p->pbm_B.prom_node || !p->pbm_A.prom_node) {
1263 printk("PCI: Only one PCI bus module of controller found.\n");
1264 printk("PCI: Ignoring entire controller.\n");
1265 return;
1266 }
1267
1268 pbm_config_busmastering(&p->pbm_B); 1239 pbm_config_busmastering(&p->pbm_B);
1269 p->pbm_B.is_66mhz_capable = 1240 p->pbm_B.is_66mhz_capable =
1270 (of_find_property(p->pbm_B.prom_node, "66mhz-capable", NULL) 1241 (of_find_property(p->pbm_B.prom_node, "66mhz-capable", NULL)
@@ -1273,154 +1244,19 @@ static void __schizo_scan_bus(struct pci_controller_info *p,
1273 p->pbm_A.is_66mhz_capable = 1244 p->pbm_A.is_66mhz_capable =
1274 (of_find_property(p->pbm_A.prom_node, "66mhz-capable", NULL) 1245 (of_find_property(p->pbm_A.prom_node, "66mhz-capable", NULL)
1275 != NULL); 1246 != NULL);
1276 pbm_scan_bus(p, &p->pbm_B); 1247
1277 pbm_scan_bus(p, &p->pbm_A); 1248 p->pbm_B.pci_bus = pci_scan_one_pbm(&p->pbm_B);
1249 p->pbm_A.pci_bus = pci_scan_one_pbm(&p->pbm_A);
1278 1250
1279 /* After the PCI bus scan is complete, we can register 1251 /* After the PCI bus scan is complete, we can register
1280 * the error interrupt handlers. 1252 * the error interrupt handlers.
1281 */ 1253 */
1282 if (chip_type == PBM_CHIP_TYPE_TOMATILLO) 1254 if (p->pbm_B.chip_type == PBM_CHIP_TYPE_TOMATILLO)
1283 tomatillo_register_error_handlers(p); 1255 tomatillo_register_error_handlers(p);
1284 else 1256 else
1285 schizo_register_error_handlers(p); 1257 schizo_register_error_handlers(p);
1286} 1258}
1287 1259
1288static void schizo_scan_bus(struct pci_controller_info *p)
1289{
1290 __schizo_scan_bus(p, PBM_CHIP_TYPE_SCHIZO);
1291}
1292
1293static void tomatillo_scan_bus(struct pci_controller_info *p)
1294{
1295 __schizo_scan_bus(p, PBM_CHIP_TYPE_TOMATILLO);
1296}
1297
1298static void schizo_base_address_update(struct pci_dev *pdev, int resource)
1299{
1300 struct pcidev_cookie *pcp = pdev->sysdata;
1301 struct pci_pbm_info *pbm = pcp->pbm;
1302 struct resource *res, *root;
1303 u32 reg;
1304 int where, size, is_64bit;
1305
1306 res = &pdev->resource[resource];
1307 if (resource < 6) {
1308 where = PCI_BASE_ADDRESS_0 + (resource * 4);
1309 } else if (resource == PCI_ROM_RESOURCE) {
1310 where = pdev->rom_base_reg;
1311 } else {
1312 /* Somebody might have asked allocation of a non-standard resource */
1313 return;
1314 }
1315
1316 is_64bit = 0;
1317 if (res->flags & IORESOURCE_IO)
1318 root = &pbm->io_space;
1319 else {
1320 root = &pbm->mem_space;
1321 if ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
1322 == PCI_BASE_ADDRESS_MEM_TYPE_64)
1323 is_64bit = 1;
1324 }
1325
1326 size = res->end - res->start;
1327 pci_read_config_dword(pdev, where, &reg);
1328 reg = ((reg & size) |
1329 (((u32)(res->start - root->start)) & ~size));
1330 if (resource == PCI_ROM_RESOURCE) {
1331 reg |= PCI_ROM_ADDRESS_ENABLE;
1332 res->flags |= IORESOURCE_ROM_ENABLE;
1333 }
1334 pci_write_config_dword(pdev, where, reg);
1335
1336 /* This knows that the upper 32-bits of the address
1337 * must be zero. Our PCI common layer enforces this.
1338 */
1339 if (is_64bit)
1340 pci_write_config_dword(pdev, where + 4, 0);
1341}
1342
1343static void schizo_resource_adjust(struct pci_dev *pdev,
1344 struct resource *res,
1345 struct resource *root)
1346{
1347 res->start += root->start;
1348 res->end += root->start;
1349}
1350
1351/* Use ranges property to determine where PCI MEM, I/O, and Config
1352 * space are for this PCI bus module.
1353 */
1354static void schizo_determine_mem_io_space(struct pci_pbm_info *pbm)
1355{
1356 int i, saw_cfg, saw_mem, saw_io;
1357
1358 saw_cfg = saw_mem = saw_io = 0;
1359 for (i = 0; i < pbm->num_pbm_ranges; i++) {
1360 struct linux_prom_pci_ranges *pr = &pbm->pbm_ranges[i];
1361 unsigned long a;
1362 int type;
1363
1364 type = (pr->child_phys_hi >> 24) & 0x3;
1365 a = (((unsigned long)pr->parent_phys_hi << 32UL) |
1366 ((unsigned long)pr->parent_phys_lo << 0UL));
1367
1368 switch (type) {
1369 case 0:
1370 /* PCI config space, 16MB */
1371 pbm->config_space = a;
1372 saw_cfg = 1;
1373 break;
1374
1375 case 1:
1376 /* 16-bit IO space, 16MB */
1377 pbm->io_space.start = a;
1378 pbm->io_space.end = a + ((16UL*1024UL*1024UL) - 1UL);
1379 pbm->io_space.flags = IORESOURCE_IO;
1380 saw_io = 1;
1381 break;
1382
1383 case 2:
1384 /* 32-bit MEM space, 2GB */
1385 pbm->mem_space.start = a;
1386 pbm->mem_space.end = a + (0x80000000UL - 1UL);
1387 pbm->mem_space.flags = IORESOURCE_MEM;
1388 saw_mem = 1;
1389 break;
1390
1391 default:
1392 break;
1393 };
1394 }
1395
1396 if (!saw_cfg || !saw_io || !saw_mem) {
1397 prom_printf("%s: Fatal error, missing %s PBM range.\n",
1398 pbm->name,
1399 ((!saw_cfg ?
1400 "CFG" :
1401 (!saw_io ?
1402 "IO" : "MEM"))));
1403 prom_halt();
1404 }
1405
1406 printk("%s: PCI CFG[%lx] IO[%lx] MEM[%lx]\n",
1407 pbm->name,
1408 pbm->config_space,
1409 pbm->io_space.start,
1410 pbm->mem_space.start);
1411}
1412
1413static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1414 struct pci_pbm_info *pbm)
1415{
1416 pbm->io_space.name = pbm->mem_space.name = pbm->name;
1417
1418 request_resource(&ioport_resource, &pbm->io_space);
1419 request_resource(&iomem_resource, &pbm->mem_space);
1420 pci_register_legacy_regions(&pbm->io_space,
1421 &pbm->mem_space);
1422}
1423
1424#define SCHIZO_STRBUF_CONTROL (0x02800UL) 1260#define SCHIZO_STRBUF_CONTROL (0x02800UL)
1425#define SCHIZO_STRBUF_FLUSH (0x02808UL) 1261#define SCHIZO_STRBUF_FLUSH (0x02808UL)
1426#define SCHIZO_STRBUF_FSYNC (0x02810UL) 1262#define SCHIZO_STRBUF_FSYNC (0x02810UL)
@@ -1472,7 +1308,7 @@ static void schizo_pbm_strbuf_init(struct pci_pbm_info *pbm)
1472 1308
1473static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm) 1309static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1474{ 1310{
1475 struct pci_iommu *iommu = pbm->iommu; 1311 struct iommu *iommu = pbm->iommu;
1476 unsigned long i, tagbase, database; 1312 unsigned long i, tagbase, database;
1477 struct property *prop; 1313 struct property *prop;
1478 u32 vdma[2], dma_mask; 1314 u32 vdma[2], dma_mask;
@@ -1654,14 +1490,12 @@ static void schizo_pbm_init(struct pci_controller_info *p,
1654 struct device_node *dp, u32 portid, 1490 struct device_node *dp, u32 portid,
1655 int chip_type) 1491 int chip_type)
1656{ 1492{
1657 struct linux_prom64_registers *regs; 1493 const struct linux_prom64_registers *regs;
1658 struct property *prop; 1494 const unsigned int *busrange;
1659 unsigned int *busrange;
1660 struct pci_pbm_info *pbm; 1495 struct pci_pbm_info *pbm;
1661 const char *chipset_name; 1496 const char *chipset_name;
1662 u32 *ino_bitmap; 1497 const u32 *ino_bitmap;
1663 int is_pbm_a; 1498 int is_pbm_a;
1664 int len;
1665 1499
1666 switch (chip_type) { 1500 switch (chip_type) {
1667 case PBM_CHIP_TYPE_TOMATILLO: 1501 case PBM_CHIP_TYPE_TOMATILLO:
@@ -1689,11 +1523,9 @@ static void schizo_pbm_init(struct pci_controller_info *p,
1689 * 3) PBM PCI config space 1523 * 3) PBM PCI config space
1690 * 4) Ichip regs 1524 * 4) Ichip regs
1691 */ 1525 */
1692 prop = of_find_property(dp, "reg", NULL); 1526 regs = of_get_property(dp, "reg", NULL);
1693 regs = prop->value;
1694 1527
1695 is_pbm_a = ((regs[0].phys_addr & 0x00700000) == 0x00600000); 1528 is_pbm_a = ((regs[0].phys_addr & 0x00700000) == 0x00600000);
1696
1697 if (is_pbm_a) 1529 if (is_pbm_a)
1698 pbm = &p->pbm_A; 1530 pbm = &p->pbm_A;
1699 else 1531 else
@@ -1702,17 +1534,10 @@ static void schizo_pbm_init(struct pci_controller_info *p,
1702 pbm->portid = portid; 1534 pbm->portid = portid;
1703 pbm->parent = p; 1535 pbm->parent = p;
1704 pbm->prom_node = dp; 1536 pbm->prom_node = dp;
1705 pbm->pci_first_slot = 1;
1706 1537
1707 pbm->chip_type = chip_type; 1538 pbm->chip_type = chip_type;
1708 pbm->chip_version = 0; 1539 pbm->chip_version = of_getintprop_default(dp, "version#", 0);
1709 prop = of_find_property(dp, "version#", NULL); 1540 pbm->chip_revision = of_getintprop_default(dp, "module-version#", 0);
1710 if (prop)
1711 pbm->chip_version = *(int *) prop->value;
1712 pbm->chip_revision = 0;
1713 prop = of_find_property(dp, "module-revision#", NULL);
1714 if (prop)
1715 pbm->chip_revision = *(int *) prop->value;
1716 1541
1717 pbm->pbm_regs = regs[0].phys_addr; 1542 pbm->pbm_regs = regs[0].phys_addr;
1718 pbm->controller_regs = regs[1].phys_addr - 0x10000UL; 1543 pbm->controller_regs = regs[1].phys_addr - 0x10000UL;
@@ -1723,40 +1548,18 @@ static void schizo_pbm_init(struct pci_controller_info *p,
1723 pbm->name = dp->full_name; 1548 pbm->name = dp->full_name;
1724 1549
1725 printk("%s: %s PCI Bus Module ver[%x:%x]\n", 1550 printk("%s: %s PCI Bus Module ver[%x:%x]\n",
1726 pbm->name, 1551 pbm->name, chipset_name,
1727 (chip_type == PBM_CHIP_TYPE_TOMATILLO ?
1728 "TOMATILLO" : "SCHIZO"),
1729 pbm->chip_version, pbm->chip_revision); 1552 pbm->chip_version, pbm->chip_revision);
1730 1553
1731 schizo_pbm_hw_init(pbm); 1554 schizo_pbm_hw_init(pbm);
1732 1555
1733 prop = of_find_property(dp, "ranges", &len); 1556 pci_determine_mem_io_space(pbm);
1734 pbm->pbm_ranges = prop->value;
1735 pbm->num_pbm_ranges =
1736 (len / sizeof(struct linux_prom_pci_ranges));
1737 1557
1738 schizo_determine_mem_io_space(pbm); 1558 ino_bitmap = of_get_property(dp, "ino-bitmap", NULL);
1739 pbm_register_toplevel_resources(p, pbm);
1740
1741 prop = of_find_property(dp, "interrupt-map", &len);
1742 if (prop) {
1743 pbm->pbm_intmap = prop->value;
1744 pbm->num_pbm_intmap =
1745 (len / sizeof(struct linux_prom_pci_intmap));
1746
1747 prop = of_find_property(dp, "interrupt-map-mask", NULL);
1748 pbm->pbm_intmask = prop->value;
1749 } else {
1750 pbm->num_pbm_intmap = 0;
1751 }
1752
1753 prop = of_find_property(dp, "ino-bitmap", NULL);
1754 ino_bitmap = prop->value;
1755 pbm->ino_bitmap = (((u64)ino_bitmap[1] << 32UL) | 1559 pbm->ino_bitmap = (((u64)ino_bitmap[1] << 32UL) |
1756 ((u64)ino_bitmap[0] << 0UL)); 1560 ((u64)ino_bitmap[0] << 0UL));
1757 1561
1758 prop = of_find_property(dp, "bus-range", NULL); 1562 busrange = of_get_property(dp, "bus-range", NULL);
1759 busrange = prop->value;
1760 pbm->pci_first_busno = busrange[0]; 1563 pbm->pci_first_busno = busrange[0];
1761 pbm->pci_last_busno = busrange[1]; 1564 pbm->pci_last_busno = busrange[1];
1762 1565
@@ -1777,15 +1580,10 @@ static inline int portid_compare(u32 x, u32 y, int chip_type)
1777static void __schizo_init(struct device_node *dp, char *model_name, int chip_type) 1580static void __schizo_init(struct device_node *dp, char *model_name, int chip_type)
1778{ 1581{
1779 struct pci_controller_info *p; 1582 struct pci_controller_info *p;
1780 struct pci_iommu *iommu; 1583 struct iommu *iommu;
1781 struct property *prop;
1782 int is_pbm_a;
1783 u32 portid; 1584 u32 portid;
1784 1585
1785 portid = 0xff; 1586 portid = of_getintprop_default(dp, "portid", 0xff);
1786 prop = of_find_property(dp, "portid", NULL);
1787 if (prop)
1788 portid = *(u32 *) prop->value;
1789 1587
1790 for (p = pci_controller_root; p; p = p->next) { 1588 for (p = pci_controller_root; p; p = p->next) {
1791 struct pci_pbm_info *pbm; 1589 struct pci_pbm_info *pbm;
@@ -1798,48 +1596,43 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
1798 &p->pbm_B); 1596 &p->pbm_B);
1799 1597
1800 if (portid_compare(pbm->portid, portid, chip_type)) { 1598 if (portid_compare(pbm->portid, portid, chip_type)) {
1801 is_pbm_a = (p->pbm_A.prom_node == NULL);
1802 schizo_pbm_init(p, dp, portid, chip_type); 1599 schizo_pbm_init(p, dp, portid, chip_type);
1803 return; 1600 return;
1804 } 1601 }
1805 } 1602 }
1806 1603
1807 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC); 1604 p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
1808 if (!p) { 1605 if (!p)
1809 prom_printf("SCHIZO: Fatal memory allocation error.\n"); 1606 goto memfail;
1810 prom_halt(); 1607
1811 } 1608 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1609 if (!iommu)
1610 goto memfail;
1812 1611
1813 iommu = kzalloc(sizeof(struct pci_iommu), GFP_ATOMIC);
1814 if (!iommu) {
1815 prom_printf("SCHIZO: Fatal memory allocation error.\n");
1816 prom_halt();
1817 }
1818 p->pbm_A.iommu = iommu; 1612 p->pbm_A.iommu = iommu;
1819 1613
1820 iommu = kzalloc(sizeof(struct pci_iommu), GFP_ATOMIC); 1614 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1821 if (!iommu) { 1615 if (!iommu)
1822 prom_printf("SCHIZO: Fatal memory allocation error.\n"); 1616 goto memfail;
1823 prom_halt(); 1617
1824 }
1825 p->pbm_B.iommu = iommu; 1618 p->pbm_B.iommu = iommu;
1826 1619
1827 p->next = pci_controller_root; 1620 p->next = pci_controller_root;
1828 pci_controller_root = p; 1621 pci_controller_root = p;
1829 1622
1830 p->index = pci_num_controllers++; 1623 p->index = pci_num_controllers++;
1831 p->pbms_same_domain = 0; 1624 p->scan_bus = schizo_scan_bus;
1832 p->scan_bus = (chip_type == PBM_CHIP_TYPE_TOMATILLO ?
1833 tomatillo_scan_bus :
1834 schizo_scan_bus);
1835 p->base_address_update = schizo_base_address_update;
1836 p->resource_adjust = schizo_resource_adjust;
1837 p->pci_ops = &schizo_ops; 1625 p->pci_ops = &schizo_ops;
1838 1626
1839 /* Like PSYCHO we have a 2GB aligned area for memory space. */ 1627 /* Like PSYCHO we have a 2GB aligned area for memory space. */
1840 pci_memspace_mask = 0x7fffffffUL; 1628 pci_memspace_mask = 0x7fffffffUL;
1841 1629
1842 schizo_pbm_init(p, dp, portid, chip_type); 1630 schizo_pbm_init(p, dp, portid, chip_type);
1631 return;
1632
1633memfail:
1634 prom_printf("SCHIZO: Fatal memory allocation error.\n");
1635 prom_halt();
1843} 1636}
1844 1637
1845void schizo_init(struct device_node *dp, char *model_name) 1638void schizo_init(struct device_node *dp, char *model_name)
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index ec22cd61ec8c..94295c219329 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -1,6 +1,6 @@
1/* pci_sun4v.c: SUN4V specific PCI controller support. 1/* pci_sun4v.c: SUN4V specific PCI controller support.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2006, 2007 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/kernel.h> 6#include <linux/kernel.h>
@@ -29,7 +29,7 @@
29 29
30#define PGLIST_NENTS (PAGE_SIZE / sizeof(u64)) 30#define PGLIST_NENTS (PAGE_SIZE / sizeof(u64))
31 31
32struct pci_iommu_batch { 32struct iommu_batch {
33 struct pci_dev *pdev; /* Device mapping is for. */ 33 struct pci_dev *pdev; /* Device mapping is for. */
34 unsigned long prot; /* IOMMU page protections */ 34 unsigned long prot; /* IOMMU page protections */
35 unsigned long entry; /* Index into IOTSB. */ 35 unsigned long entry; /* Index into IOTSB. */
@@ -37,12 +37,12 @@ struct pci_iommu_batch {
37 unsigned long npages; /* Number of pages in list. */ 37 unsigned long npages; /* Number of pages in list. */
38}; 38};
39 39
40static DEFINE_PER_CPU(struct pci_iommu_batch, pci_iommu_batch); 40static DEFINE_PER_CPU(struct iommu_batch, pci_iommu_batch);
41 41
42/* Interrupts must be disabled. */ 42/* Interrupts must be disabled. */
43static inline void pci_iommu_batch_start(struct pci_dev *pdev, unsigned long prot, unsigned long entry) 43static inline void pci_iommu_batch_start(struct pci_dev *pdev, unsigned long prot, unsigned long entry)
44{ 44{
45 struct pci_iommu_batch *p = &__get_cpu_var(pci_iommu_batch); 45 struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch);
46 46
47 p->pdev = pdev; 47 p->pdev = pdev;
48 p->prot = prot; 48 p->prot = prot;
@@ -51,10 +51,10 @@ static inline void pci_iommu_batch_start(struct pci_dev *pdev, unsigned long pro
51} 51}
52 52
53/* Interrupts must be disabled. */ 53/* Interrupts must be disabled. */
54static long pci_iommu_batch_flush(struct pci_iommu_batch *p) 54static long pci_iommu_batch_flush(struct iommu_batch *p)
55{ 55{
56 struct pcidev_cookie *pcp = p->pdev->sysdata; 56 struct pci_pbm_info *pbm = p->pdev->dev.archdata.host_controller;
57 unsigned long devhandle = pcp->pbm->devhandle; 57 unsigned long devhandle = pbm->devhandle;
58 unsigned long prot = p->prot; 58 unsigned long prot = p->prot;
59 unsigned long entry = p->entry; 59 unsigned long entry = p->entry;
60 u64 *pglist = p->pglist; 60 u64 *pglist = p->pglist;
@@ -89,7 +89,7 @@ static long pci_iommu_batch_flush(struct pci_iommu_batch *p)
89/* Interrupts must be disabled. */ 89/* Interrupts must be disabled. */
90static inline long pci_iommu_batch_add(u64 phys_page) 90static inline long pci_iommu_batch_add(u64 phys_page)
91{ 91{
92 struct pci_iommu_batch *p = &__get_cpu_var(pci_iommu_batch); 92 struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch);
93 93
94 BUG_ON(p->npages >= PGLIST_NENTS); 94 BUG_ON(p->npages >= PGLIST_NENTS);
95 95
@@ -103,14 +103,14 @@ static inline long pci_iommu_batch_add(u64 phys_page)
103/* Interrupts must be disabled. */ 103/* Interrupts must be disabled. */
104static inline long pci_iommu_batch_end(void) 104static inline long pci_iommu_batch_end(void)
105{ 105{
106 struct pci_iommu_batch *p = &__get_cpu_var(pci_iommu_batch); 106 struct iommu_batch *p = &__get_cpu_var(pci_iommu_batch);
107 107
108 BUG_ON(p->npages >= PGLIST_NENTS); 108 BUG_ON(p->npages >= PGLIST_NENTS);
109 109
110 return pci_iommu_batch_flush(p); 110 return pci_iommu_batch_flush(p);
111} 111}
112 112
113static long pci_arena_alloc(struct pci_iommu_arena *arena, unsigned long npages) 113static long pci_arena_alloc(struct iommu_arena *arena, unsigned long npages)
114{ 114{
115 unsigned long n, i, start, end, limit; 115 unsigned long n, i, start, end, limit;
116 int pass; 116 int pass;
@@ -149,7 +149,7 @@ again:
149 return n; 149 return n;
150} 150}
151 151
152static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, unsigned long npages) 152static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
153{ 153{
154 unsigned long i; 154 unsigned long i;
155 155
@@ -159,8 +159,7 @@ static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, un
159 159
160static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp) 160static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp)
161{ 161{
162 struct pcidev_cookie *pcp; 162 struct iommu *iommu;
163 struct pci_iommu *iommu;
164 unsigned long flags, order, first_page, npages, n; 163 unsigned long flags, order, first_page, npages, n;
165 void *ret; 164 void *ret;
166 long entry; 165 long entry;
@@ -178,8 +177,7 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
178 177
179 memset((char *)first_page, 0, PAGE_SIZE << order); 178 memset((char *)first_page, 0, PAGE_SIZE << order);
180 179
181 pcp = pdev->sysdata; 180 iommu = pdev->dev.archdata.iommu;
182 iommu = pcp->pbm->iommu;
183 181
184 spin_lock_irqsave(&iommu->lock, flags); 182 spin_lock_irqsave(&iommu->lock, flags);
185 entry = pci_arena_alloc(&iommu->arena, npages); 183 entry = pci_arena_alloc(&iommu->arena, npages);
@@ -226,15 +224,15 @@ arena_alloc_fail:
226 224
227static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma) 225static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
228{ 226{
229 struct pcidev_cookie *pcp; 227 struct pci_pbm_info *pbm;
230 struct pci_iommu *iommu; 228 struct iommu *iommu;
231 unsigned long flags, order, npages, entry; 229 unsigned long flags, order, npages, entry;
232 u32 devhandle; 230 u32 devhandle;
233 231
234 npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; 232 npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
235 pcp = pdev->sysdata; 233 iommu = pdev->dev.archdata.iommu;
236 iommu = pcp->pbm->iommu; 234 pbm = pdev->dev.archdata.host_controller;
237 devhandle = pcp->pbm->devhandle; 235 devhandle = pbm->devhandle;
238 entry = ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); 236 entry = ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
239 237
240 spin_lock_irqsave(&iommu->lock, flags); 238 spin_lock_irqsave(&iommu->lock, flags);
@@ -259,16 +257,14 @@ static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu,
259 257
260static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction) 258static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
261{ 259{
262 struct pcidev_cookie *pcp; 260 struct iommu *iommu;
263 struct pci_iommu *iommu;
264 unsigned long flags, npages, oaddr; 261 unsigned long flags, npages, oaddr;
265 unsigned long i, base_paddr; 262 unsigned long i, base_paddr;
266 u32 bus_addr, ret; 263 u32 bus_addr, ret;
267 unsigned long prot; 264 unsigned long prot;
268 long entry; 265 long entry;
269 266
270 pcp = pdev->sysdata; 267 iommu = pdev->dev.archdata.iommu;
271 iommu = pcp->pbm->iommu;
272 268
273 if (unlikely(direction == PCI_DMA_NONE)) 269 if (unlikely(direction == PCI_DMA_NONE))
274 goto bad; 270 goto bad;
@@ -324,8 +320,8 @@ iommu_map_fail:
324 320
325static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) 321static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
326{ 322{
327 struct pcidev_cookie *pcp; 323 struct pci_pbm_info *pbm;
328 struct pci_iommu *iommu; 324 struct iommu *iommu;
329 unsigned long flags, npages; 325 unsigned long flags, npages;
330 long entry; 326 long entry;
331 u32 devhandle; 327 u32 devhandle;
@@ -336,9 +332,9 @@ static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_
336 return; 332 return;
337 } 333 }
338 334
339 pcp = pdev->sysdata; 335 iommu = pdev->dev.archdata.iommu;
340 iommu = pcp->pbm->iommu; 336 pbm = pdev->dev.archdata.host_controller;
341 devhandle = pcp->pbm->devhandle; 337 devhandle = pbm->devhandle;
342 338
343 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); 339 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
344 npages >>= IO_PAGE_SHIFT; 340 npages >>= IO_PAGE_SHIFT;
@@ -460,8 +456,7 @@ iommu_map_failed:
460 456
461static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) 457static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
462{ 458{
463 struct pcidev_cookie *pcp; 459 struct iommu *iommu;
464 struct pci_iommu *iommu;
465 unsigned long flags, npages, prot; 460 unsigned long flags, npages, prot;
466 u32 dma_base; 461 u32 dma_base;
467 struct scatterlist *sgtmp; 462 struct scatterlist *sgtmp;
@@ -480,8 +475,7 @@ static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int n
480 return 1; 475 return 1;
481 } 476 }
482 477
483 pcp = pdev->sysdata; 478 iommu = pdev->dev.archdata.iommu;
484 iommu = pcp->pbm->iommu;
485 479
486 if (unlikely(direction == PCI_DMA_NONE)) 480 if (unlikely(direction == PCI_DMA_NONE))
487 goto bad; 481 goto bad;
@@ -537,8 +531,8 @@ iommu_map_failed:
537 531
538static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) 532static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
539{ 533{
540 struct pcidev_cookie *pcp; 534 struct pci_pbm_info *pbm;
541 struct pci_iommu *iommu; 535 struct iommu *iommu;
542 unsigned long flags, i, npages; 536 unsigned long flags, i, npages;
543 long entry; 537 long entry;
544 u32 devhandle, bus_addr; 538 u32 devhandle, bus_addr;
@@ -548,9 +542,9 @@ static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, in
548 WARN_ON(1); 542 WARN_ON(1);
549 } 543 }
550 544
551 pcp = pdev->sysdata; 545 iommu = pdev->dev.archdata.iommu;
552 iommu = pcp->pbm->iommu; 546 pbm = pdev->dev.archdata.host_controller;
553 devhandle = pcp->pbm->devhandle; 547 devhandle = pbm->devhandle;
554 548
555 bus_addr = sglist->dma_address & IO_PAGE_MASK; 549 bus_addr = sglist->dma_address & IO_PAGE_MASK;
556 550
@@ -589,7 +583,7 @@ static void pci_4v_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist
589 /* Nothing to do... */ 583 /* Nothing to do... */
590} 584}
591 585
592struct pci_iommu_ops pci_sun4v_iommu_ops = { 586const struct pci_iommu_ops pci_sun4v_iommu_ops = {
593 .alloc_consistent = pci_4v_alloc_consistent, 587 .alloc_consistent = pci_4v_alloc_consistent,
594 .free_consistent = pci_4v_free_consistent, 588 .free_consistent = pci_4v_free_consistent,
595 .map_single = pci_4v_map_single, 589 .map_single = pci_4v_map_single,
@@ -600,132 +594,12 @@ struct pci_iommu_ops pci_sun4v_iommu_ops = {
600 .dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu, 594 .dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu,
601}; 595};
602 596
603/* SUN4V PCI configuration space accessors. */
604
605struct pdev_entry {
606 struct pdev_entry *next;
607 u32 devhandle;
608 unsigned int bus;
609 unsigned int device;
610 unsigned int func;
611};
612
613#define PDEV_HTAB_SIZE 16
614#define PDEV_HTAB_MASK (PDEV_HTAB_SIZE - 1)
615static struct pdev_entry *pdev_htab[PDEV_HTAB_SIZE];
616
617static inline unsigned int pdev_hashfn(u32 devhandle, unsigned int bus, unsigned int device, unsigned int func)
618{
619 unsigned int val;
620
621 val = (devhandle ^ (devhandle >> 4));
622 val ^= bus;
623 val ^= device;
624 val ^= func;
625
626 return val & PDEV_HTAB_MASK;
627}
628
629static int pdev_htab_add(u32 devhandle, unsigned int bus, unsigned int device, unsigned int func)
630{
631 struct pdev_entry *p = kmalloc(sizeof(*p), GFP_KERNEL);
632 struct pdev_entry **slot;
633
634 if (!p)
635 return -ENOMEM;
636
637 slot = &pdev_htab[pdev_hashfn(devhandle, bus, device, func)];
638 p->next = *slot;
639 *slot = p;
640
641 p->devhandle = devhandle;
642 p->bus = bus;
643 p->device = device;
644 p->func = func;
645
646 return 0;
647}
648
649/* Recursively descend into the OBP device tree, rooted at toplevel_node,
650 * looking for a PCI device matching bus and devfn.
651 */
652static int obp_find(struct device_node *toplevel_node, unsigned int bus, unsigned int devfn)
653{
654 toplevel_node = toplevel_node->child;
655
656 while (toplevel_node != NULL) {
657 struct linux_prom_pci_registers *regs;
658 struct property *prop;
659 int ret;
660
661 ret = obp_find(toplevel_node, bus, devfn);
662 if (ret != 0)
663 return ret;
664
665 prop = of_find_property(toplevel_node, "reg", NULL);
666 if (!prop)
667 goto next_sibling;
668
669 regs = prop->value;
670 if (((regs->phys_hi >> 16) & 0xff) == bus &&
671 ((regs->phys_hi >> 8) & 0xff) == devfn)
672 break;
673
674 next_sibling:
675 toplevel_node = toplevel_node->sibling;
676 }
677
678 return toplevel_node != NULL;
679}
680
681static int pdev_htab_populate(struct pci_pbm_info *pbm)
682{
683 u32 devhandle = pbm->devhandle;
684 unsigned int bus;
685
686 for (bus = pbm->pci_first_busno; bus <= pbm->pci_last_busno; bus++) {
687 unsigned int devfn;
688
689 for (devfn = 0; devfn < 256; devfn++) {
690 unsigned int device = PCI_SLOT(devfn);
691 unsigned int func = PCI_FUNC(devfn);
692
693 if (obp_find(pbm->prom_node, bus, devfn)) {
694 int err = pdev_htab_add(devhandle, bus,
695 device, func);
696 if (err)
697 return err;
698 }
699 }
700 }
701
702 return 0;
703}
704
705static struct pdev_entry *pdev_find(u32 devhandle, unsigned int bus, unsigned int device, unsigned int func)
706{
707 struct pdev_entry *p;
708
709 p = pdev_htab[pdev_hashfn(devhandle, bus, device, func)];
710 while (p) {
711 if (p->devhandle == devhandle &&
712 p->bus == bus &&
713 p->device == device &&
714 p->func == func)
715 break;
716
717 p = p->next;
718 }
719
720 return p;
721}
722
723static inline int pci_sun4v_out_of_range(struct pci_pbm_info *pbm, unsigned int bus, unsigned int device, unsigned int func) 597static inline int pci_sun4v_out_of_range(struct pci_pbm_info *pbm, unsigned int bus, unsigned int device, unsigned int func)
724{ 598{
725 if (bus < pbm->pci_first_busno || 599 if (bus < pbm->pci_first_busno ||
726 bus > pbm->pci_last_busno) 600 bus > pbm->pci_last_busno)
727 return 1; 601 return 1;
728 return pdev_find(pbm->devhandle, bus, device, func) == NULL; 602 return 0;
729} 603}
730 604
731static int pci_sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, 605static int pci_sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -738,6 +612,9 @@ static int pci_sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
738 unsigned int func = PCI_FUNC(devfn); 612 unsigned int func = PCI_FUNC(devfn);
739 unsigned long ret; 613 unsigned long ret;
740 614
615 if (bus_dev == pbm->pci_bus && devfn == 0x00)
616 return pci_host_bridge_read_pci_cfg(bus_dev, devfn, where,
617 size, value);
741 if (pci_sun4v_out_of_range(pbm, bus, device, func)) { 618 if (pci_sun4v_out_of_range(pbm, bus, device, func)) {
742 ret = ~0UL; 619 ret = ~0UL;
743 } else { 620 } else {
@@ -776,6 +653,9 @@ static int pci_sun4v_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
776 unsigned int func = PCI_FUNC(devfn); 653 unsigned int func = PCI_FUNC(devfn);
777 unsigned long ret; 654 unsigned long ret;
778 655
656 if (bus_dev == pbm->pci_bus && devfn == 0x00)
657 return pci_host_bridge_write_pci_cfg(bus_dev, devfn, where,
658 size, value);
779 if (pci_sun4v_out_of_range(pbm, bus, device, func)) { 659 if (pci_sun4v_out_of_range(pbm, bus, device, func)) {
780 /* Do nothing. */ 660 /* Do nothing. */
781 } else { 661 } else {
@@ -800,27 +680,7 @@ static struct pci_ops pci_sun4v_ops = {
800static void pbm_scan_bus(struct pci_controller_info *p, 680static void pbm_scan_bus(struct pci_controller_info *p,
801 struct pci_pbm_info *pbm) 681 struct pci_pbm_info *pbm)
802{ 682{
803 struct pcidev_cookie *cookie = kzalloc(sizeof(*cookie), GFP_KERNEL); 683 pbm->pci_bus = pci_scan_one_pbm(pbm);
804
805 if (!cookie) {
806 prom_printf("%s: Critical allocation failure.\n", pbm->name);
807 prom_halt();
808 }
809
810 /* All we care about is the PBM. */
811 cookie->pbm = pbm;
812
813 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, p->pci_ops, pbm);
814#if 0
815 pci_fixup_host_bridge_self(pbm->pci_bus);
816 pbm->pci_bus->self->sysdata = cookie;
817#endif
818 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
819 pci_record_assignments(pbm, pbm->pci_bus);
820 pci_assign_unassigned(pbm, pbm->pci_bus);
821 pci_fixup_irq(pbm, pbm->pci_bus);
822 pci_determine_66mhz_disposition(pbm, pbm->pci_bus);
823 pci_setup_busmastering(pbm, pbm->pci_bus);
824} 684}
825 685
826static void pci_sun4v_scan_bus(struct pci_controller_info *p) 686static void pci_sun4v_scan_bus(struct pci_controller_info *p)
@@ -844,130 +704,10 @@ static void pci_sun4v_scan_bus(struct pci_controller_info *p)
844 /* XXX register error interrupt handlers XXX */ 704 /* XXX register error interrupt handlers XXX */
845} 705}
846 706
847static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource)
848{
849 struct pcidev_cookie *pcp = pdev->sysdata;
850 struct pci_pbm_info *pbm = pcp->pbm;
851 struct resource *res, *root;
852 u32 reg;
853 int where, size, is_64bit;
854
855 res = &pdev->resource[resource];
856 if (resource < 6) {
857 where = PCI_BASE_ADDRESS_0 + (resource * 4);
858 } else if (resource == PCI_ROM_RESOURCE) {
859 where = pdev->rom_base_reg;
860 } else {
861 /* Somebody might have asked allocation of a non-standard resource */
862 return;
863 }
864
865 /* XXX 64-bit MEM handling is not %100 correct... XXX */
866 is_64bit = 0;
867 if (res->flags & IORESOURCE_IO)
868 root = &pbm->io_space;
869 else {
870 root = &pbm->mem_space;
871 if ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
872 == PCI_BASE_ADDRESS_MEM_TYPE_64)
873 is_64bit = 1;
874 }
875
876 size = res->end - res->start;
877 pci_read_config_dword(pdev, where, &reg);
878 reg = ((reg & size) |
879 (((u32)(res->start - root->start)) & ~size));
880 if (resource == PCI_ROM_RESOURCE) {
881 reg |= PCI_ROM_ADDRESS_ENABLE;
882 res->flags |= IORESOURCE_ROM_ENABLE;
883 }
884 pci_write_config_dword(pdev, where, reg);
885
886 /* This knows that the upper 32-bits of the address
887 * must be zero. Our PCI common layer enforces this.
888 */
889 if (is_64bit)
890 pci_write_config_dword(pdev, where + 4, 0);
891}
892
893static void pci_sun4v_resource_adjust(struct pci_dev *pdev,
894 struct resource *res,
895 struct resource *root)
896{
897 res->start += root->start;
898 res->end += root->start;
899}
900
901/* Use ranges property to determine where PCI MEM, I/O, and Config
902 * space are for this PCI bus module.
903 */
904static void pci_sun4v_determine_mem_io_space(struct pci_pbm_info *pbm)
905{
906 int i, saw_mem, saw_io;
907
908 saw_mem = saw_io = 0;
909 for (i = 0; i < pbm->num_pbm_ranges; i++) {
910 struct linux_prom_pci_ranges *pr = &pbm->pbm_ranges[i];
911 unsigned long a;
912 int type;
913
914 type = (pr->child_phys_hi >> 24) & 0x3;
915 a = (((unsigned long)pr->parent_phys_hi << 32UL) |
916 ((unsigned long)pr->parent_phys_lo << 0UL));
917
918 switch (type) {
919 case 1:
920 /* 16-bit IO space, 16MB */
921 pbm->io_space.start = a;
922 pbm->io_space.end = a + ((16UL*1024UL*1024UL) - 1UL);
923 pbm->io_space.flags = IORESOURCE_IO;
924 saw_io = 1;
925 break;
926
927 case 2:
928 /* 32-bit MEM space, 2GB */
929 pbm->mem_space.start = a;
930 pbm->mem_space.end = a + (0x80000000UL - 1UL);
931 pbm->mem_space.flags = IORESOURCE_MEM;
932 saw_mem = 1;
933 break;
934
935 case 3:
936 /* XXX 64-bit MEM handling XXX */
937
938 default:
939 break;
940 };
941 }
942
943 if (!saw_io || !saw_mem) {
944 prom_printf("%s: Fatal error, missing %s PBM range.\n",
945 pbm->name,
946 (!saw_io ? "IO" : "MEM"));
947 prom_halt();
948 }
949
950 printk("%s: PCI IO[%lx] MEM[%lx]\n",
951 pbm->name,
952 pbm->io_space.start,
953 pbm->mem_space.start);
954}
955
956static void pbm_register_toplevel_resources(struct pci_controller_info *p,
957 struct pci_pbm_info *pbm)
958{
959 pbm->io_space.name = pbm->mem_space.name = pbm->name;
960
961 request_resource(&ioport_resource, &pbm->io_space);
962 request_resource(&iomem_resource, &pbm->mem_space);
963 pci_register_legacy_regions(&pbm->io_space,
964 &pbm->mem_space);
965}
966
967static unsigned long probe_existing_entries(struct pci_pbm_info *pbm, 707static unsigned long probe_existing_entries(struct pci_pbm_info *pbm,
968 struct pci_iommu *iommu) 708 struct iommu *iommu)
969{ 709{
970 struct pci_iommu_arena *arena = &iommu->arena; 710 struct iommu_arena *arena = &iommu->arena;
971 unsigned long i, cnt = 0; 711 unsigned long i, cnt = 0;
972 u32 devhandle; 712 u32 devhandle;
973 713
@@ -994,7 +734,7 @@ static unsigned long probe_existing_entries(struct pci_pbm_info *pbm,
994 734
995static void pci_sun4v_iommu_init(struct pci_pbm_info *pbm) 735static void pci_sun4v_iommu_init(struct pci_pbm_info *pbm)
996{ 736{
997 struct pci_iommu *iommu = pbm->iommu; 737 struct iommu *iommu = pbm->iommu;
998 struct property *prop; 738 struct property *prop;
999 unsigned long num_tsb_entries, sz; 739 unsigned long num_tsb_entries, sz;
1000 u32 vdma[2], dma_mask, dma_offset; 740 u32 vdma[2], dma_mask, dma_offset;
@@ -1281,7 +1021,7 @@ h_error:
1281 1021
1282static void pci_sun4v_msi_init(struct pci_pbm_info *pbm) 1022static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
1283{ 1023{
1284 u32 *val; 1024 const u32 *val;
1285 int len; 1025 int len;
1286 1026
1287 val = of_get_property(pbm->prom_node, "#msi-eqs", &len); 1027 val = of_get_property(pbm->prom_node, "#msi-eqs", &len);
@@ -1289,16 +1029,16 @@ static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
1289 goto no_msi; 1029 goto no_msi;
1290 pbm->msiq_num = *val; 1030 pbm->msiq_num = *val;
1291 if (pbm->msiq_num) { 1031 if (pbm->msiq_num) {
1292 struct msiq_prop { 1032 const struct msiq_prop {
1293 u32 first_msiq; 1033 u32 first_msiq;
1294 u32 num_msiq; 1034 u32 num_msiq;
1295 u32 first_devino; 1035 u32 first_devino;
1296 } *mqp; 1036 } *mqp;
1297 struct msi_range_prop { 1037 const struct msi_range_prop {
1298 u32 first_msi; 1038 u32 first_msi;
1299 u32 num_msi; 1039 u32 num_msi;
1300 } *mrng; 1040 } *mrng;
1301 struct addr_range_prop { 1041 const struct addr_range_prop {
1302 u32 msi32_high; 1042 u32 msi32_high;
1303 u32 msi32_low; 1043 u32 msi32_low;
1304 u32 msi32_len; 1044 u32 msi32_len;
@@ -1410,8 +1150,7 @@ static int pci_sun4v_setup_msi_irq(unsigned int *virt_irq_p,
1410 struct pci_dev *pdev, 1150 struct pci_dev *pdev,
1411 struct msi_desc *entry) 1151 struct msi_desc *entry)
1412{ 1152{
1413 struct pcidev_cookie *pcp = pdev->sysdata; 1153 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
1414 struct pci_pbm_info *pbm = pcp->pbm;
1415 unsigned long devino, msiqid; 1154 unsigned long devino, msiqid;
1416 struct msi_msg msg; 1155 struct msi_msg msg;
1417 int msi_num, err; 1156 int msi_num, err;
@@ -1455,7 +1194,7 @@ static int pci_sun4v_setup_msi_irq(unsigned int *virt_irq_p,
1455 if (pci_sun4v_msi_setvalid(pbm->devhandle, msi_num, HV_MSIVALID_VALID)) 1194 if (pci_sun4v_msi_setvalid(pbm->devhandle, msi_num, HV_MSIVALID_VALID))
1456 goto out_err; 1195 goto out_err;
1457 1196
1458 pcp->msi_num = msi_num; 1197 pdev->dev.archdata.msi_num = msi_num;
1459 1198
1460 if (entry->msi_attrib.is_64) { 1199 if (entry->msi_attrib.is_64) {
1461 msg.address_hi = pbm->msi64_start >> 32; 1200 msg.address_hi = pbm->msi64_start >> 32;
@@ -1484,12 +1223,11 @@ out_err:
1484static void pci_sun4v_teardown_msi_irq(unsigned int virt_irq, 1223static void pci_sun4v_teardown_msi_irq(unsigned int virt_irq,
1485 struct pci_dev *pdev) 1224 struct pci_dev *pdev)
1486{ 1225{
1487 struct pcidev_cookie *pcp = pdev->sysdata; 1226 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
1488 struct pci_pbm_info *pbm = pcp->pbm;
1489 unsigned long msiqid, err; 1227 unsigned long msiqid, err;
1490 unsigned int msi_num; 1228 unsigned int msi_num;
1491 1229
1492 msi_num = pcp->msi_num; 1230 msi_num = pdev->dev.archdata.msi_num;
1493 err = pci_sun4v_msi_getmsiq(pbm->devhandle, msi_num, &msiqid); 1231 err = pci_sun4v_msi_getmsiq(pbm->devhandle, msi_num, &msiqid);
1494 if (err) { 1232 if (err) {
1495 printk(KERN_ERR "%s: getmsiq gives error %lu\n", 1233 printk(KERN_ERR "%s: getmsiq gives error %lu\n",
@@ -1516,8 +1254,6 @@ static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
1516static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node *dp, u32 devhandle) 1254static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node *dp, u32 devhandle)
1517{ 1255{
1518 struct pci_pbm_info *pbm; 1256 struct pci_pbm_info *pbm;
1519 struct property *prop;
1520 int len, i;
1521 1257
1522 if (devhandle & 0x40) 1258 if (devhandle & 0x40)
1523 pbm = &p->pbm_B; 1259 pbm = &p->pbm_B;
@@ -1526,7 +1262,6 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node
1526 1262
1527 pbm->parent = p; 1263 pbm->parent = p;
1528 pbm->prom_node = dp; 1264 pbm->prom_node = dp;
1529 pbm->pci_first_slot = 1;
1530 1265
1531 pbm->devhandle = devhandle; 1266 pbm->devhandle = devhandle;
1532 1267
@@ -1534,39 +1269,17 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node
1534 1269
1535 printk("%s: SUN4V PCI Bus Module\n", pbm->name); 1270 printk("%s: SUN4V PCI Bus Module\n", pbm->name);
1536 1271
1537 prop = of_find_property(dp, "ranges", &len); 1272 pci_determine_mem_io_space(pbm);
1538 pbm->pbm_ranges = prop->value;
1539 pbm->num_pbm_ranges =
1540 (len / sizeof(struct linux_prom_pci_ranges));
1541
1542 /* Mask out the top 8 bits of the ranges, leaving the real
1543 * physical address.
1544 */
1545 for (i = 0; i < pbm->num_pbm_ranges; i++)
1546 pbm->pbm_ranges[i].parent_phys_hi &= 0x0fffffff;
1547
1548 pci_sun4v_determine_mem_io_space(pbm);
1549 pbm_register_toplevel_resources(p, pbm);
1550
1551 prop = of_find_property(dp, "interrupt-map", &len);
1552 pbm->pbm_intmap = prop->value;
1553 pbm->num_pbm_intmap =
1554 (len / sizeof(struct linux_prom_pci_intmap));
1555
1556 prop = of_find_property(dp, "interrupt-map-mask", NULL);
1557 pbm->pbm_intmask = prop->value;
1558 1273
1559 pci_sun4v_get_bus_range(pbm); 1274 pci_sun4v_get_bus_range(pbm);
1560 pci_sun4v_iommu_init(pbm); 1275 pci_sun4v_iommu_init(pbm);
1561 pci_sun4v_msi_init(pbm); 1276 pci_sun4v_msi_init(pbm);
1562
1563 pdev_htab_populate(pbm);
1564} 1277}
1565 1278
1566void sun4v_pci_init(struct device_node *dp, char *model_name) 1279void sun4v_pci_init(struct device_node *dp, char *model_name)
1567{ 1280{
1568 struct pci_controller_info *p; 1281 struct pci_controller_info *p;
1569 struct pci_iommu *iommu; 1282 struct iommu *iommu;
1570 struct property *prop; 1283 struct property *prop;
1571 struct linux_prom64_registers *regs; 1284 struct linux_prom64_registers *regs;
1572 u32 devhandle; 1285 u32 devhandle;
@@ -1606,13 +1319,13 @@ void sun4v_pci_init(struct device_node *dp, char *model_name)
1606 if (!p) 1319 if (!p)
1607 goto fatal_memory_error; 1320 goto fatal_memory_error;
1608 1321
1609 iommu = kzalloc(sizeof(struct pci_iommu), GFP_ATOMIC); 1322 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1610 if (!iommu) 1323 if (!iommu)
1611 goto fatal_memory_error; 1324 goto fatal_memory_error;
1612 1325
1613 p->pbm_A.iommu = iommu; 1326 p->pbm_A.iommu = iommu;
1614 1327
1615 iommu = kzalloc(sizeof(struct pci_iommu), GFP_ATOMIC); 1328 iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
1616 if (!iommu) 1329 if (!iommu)
1617 goto fatal_memory_error; 1330 goto fatal_memory_error;
1618 1331
@@ -1622,11 +1335,8 @@ void sun4v_pci_init(struct device_node *dp, char *model_name)
1622 pci_controller_root = p; 1335 pci_controller_root = p;
1623 1336
1624 p->index = pci_num_controllers++; 1337 p->index = pci_num_controllers++;
1625 p->pbms_same_domain = 0;
1626 1338
1627 p->scan_bus = pci_sun4v_scan_bus; 1339 p->scan_bus = pci_sun4v_scan_bus;
1628 p->base_address_update = pci_sun4v_base_address_update;
1629 p->resource_adjust = pci_sun4v_resource_adjust;
1630#ifdef CONFIG_PCI_MSI 1340#ifdef CONFIG_PCI_MSI
1631 p->setup_msi_irq = pci_sun4v_setup_msi_irq; 1341 p->setup_msi_irq = pci_sun4v_setup_msi_irq;
1632 p->teardown_msi_irq = pci_sun4v_teardown_msi_irq; 1342 p->teardown_msi_irq = pci_sun4v_teardown_msi_irq;
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index b291060c25a6..a114151f9fbe 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -28,6 +28,7 @@
28#include <linux/reboot.h> 28#include <linux/reboot.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/compat.h> 30#include <linux/compat.h>
31#include <linux/tick.h>
31#include <linux/init.h> 32#include <linux/init.h>
32 33
33#include <asm/oplib.h> 34#include <asm/oplib.h>
@@ -88,12 +89,14 @@ void cpu_idle(void)
88 set_thread_flag(TIF_POLLING_NRFLAG); 89 set_thread_flag(TIF_POLLING_NRFLAG);
89 90
90 while(1) { 91 while(1) {
91 if (need_resched()) { 92 tick_nohz_stop_sched_tick();
92 preempt_enable_no_resched(); 93 while (!need_resched())
93 schedule(); 94 sparc64_yield();
94 preempt_disable(); 95 tick_nohz_restart_sched_tick();
95 } 96
96 sparc64_yield(); 97 preempt_enable_no_resched();
98 schedule();
99 preempt_disable();
97 } 100 }
98} 101}
99 102
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc64/kernel/prom.c
index 0917c24c4f08..5e1fcd05160d 100644
--- a/arch/sparc64/kernel/prom.c
+++ b/arch/sparc64/kernel/prom.c
@@ -36,12 +36,13 @@ static struct device_node *allnodes;
36 */ 36 */
37static DEFINE_RWLOCK(devtree_lock); 37static DEFINE_RWLOCK(devtree_lock);
38 38
39int of_device_is_compatible(struct device_node *device, const char *compat) 39int of_device_is_compatible(const struct device_node *device,
40 const char *compat)
40{ 41{
41 const char* cp; 42 const char* cp;
42 int cplen, l; 43 int cplen, l;
43 44
44 cp = (char *) of_get_property(device, "compatible", &cplen); 45 cp = of_get_property(device, "compatible", &cplen);
45 if (cp == NULL) 46 if (cp == NULL)
46 return 0; 47 return 0;
47 while (cplen > 0) { 48 while (cplen > 0) {
@@ -154,13 +155,14 @@ struct device_node *of_find_compatible_node(struct device_node *from,
154} 155}
155EXPORT_SYMBOL(of_find_compatible_node); 156EXPORT_SYMBOL(of_find_compatible_node);
156 157
157struct property *of_find_property(struct device_node *np, const char *name, 158struct property *of_find_property(const struct device_node *np,
159 const char *name,
158 int *lenp) 160 int *lenp)
159{ 161{
160 struct property *pp; 162 struct property *pp;
161 163
162 for (pp = np->properties; pp != 0; pp = pp->next) { 164 for (pp = np->properties; pp != 0; pp = pp->next) {
163 if (strcmp(pp->name, name) == 0) { 165 if (strcasecmp(pp->name, name) == 0) {
164 if (lenp != 0) 166 if (lenp != 0)
165 *lenp = pp->length; 167 *lenp = pp->length;
166 break; 168 break;
@@ -174,7 +176,8 @@ EXPORT_SYMBOL(of_find_property);
174 * Find a property with a given name for a given node 176 * Find a property with a given name for a given node
175 * and return the value. 177 * and return the value.
176 */ 178 */
177void *of_get_property(struct device_node *np, const char *name, int *lenp) 179const void *of_get_property(const struct device_node *np, const char *name,
180 int *lenp)
178{ 181{
179 struct property *pp = of_find_property(np,name,lenp); 182 struct property *pp = of_find_property(np,name,lenp);
180 return pp ? pp->value : NULL; 183 return pp ? pp->value : NULL;
@@ -196,7 +199,7 @@ EXPORT_SYMBOL(of_getintprop_default);
196 199
197int of_n_addr_cells(struct device_node *np) 200int of_n_addr_cells(struct device_node *np)
198{ 201{
199 int* ip; 202 const int* ip;
200 do { 203 do {
201 if (np->parent) 204 if (np->parent)
202 np = np->parent; 205 np = np->parent;
@@ -211,7 +214,7 @@ EXPORT_SYMBOL(of_n_addr_cells);
211 214
212int of_n_size_cells(struct device_node *np) 215int of_n_size_cells(struct device_node *np)
213{ 216{
214 int* ip; 217 const int* ip;
215 do { 218 do {
216 if (np->parent) 219 if (np->parent)
217 np = np->parent; 220 np = np->parent;
@@ -243,7 +246,7 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
243 while (*prevp) { 246 while (*prevp) {
244 struct property *prop = *prevp; 247 struct property *prop = *prevp;
245 248
246 if (!strcmp(prop->name, name)) { 249 if (!strcasecmp(prop->name, name)) {
247 void *old_val = prop->value; 250 void *old_val = prop->value;
248 int ret; 251 int ret;
249 252
@@ -397,7 +400,7 @@ static unsigned int psycho_irq_build(struct device_node *dp,
397 400
398static void psycho_irq_trans_init(struct device_node *dp) 401static void psycho_irq_trans_init(struct device_node *dp)
399{ 402{
400 struct linux_prom64_registers *regs; 403 const struct linux_prom64_registers *regs;
401 404
402 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); 405 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
403 dp->irq_trans->irq_build = psycho_irq_build; 406 dp->irq_trans->irq_build = psycho_irq_build;
@@ -547,7 +550,7 @@ static unsigned long __sabre_onboard_imap_off[] = {
547static int sabre_device_needs_wsync(struct device_node *dp) 550static int sabre_device_needs_wsync(struct device_node *dp)
548{ 551{
549 struct device_node *parent = dp->parent; 552 struct device_node *parent = dp->parent;
550 char *parent_model, *parent_compat; 553 const char *parent_model, *parent_compat;
551 554
552 /* This traversal up towards the root is meant to 555 /* This traversal up towards the root is meant to
553 * handle two cases: 556 * handle two cases:
@@ -589,7 +592,7 @@ static unsigned int sabre_irq_build(struct device_node *dp,
589{ 592{
590 struct sabre_irq_data *irq_data = _data; 593 struct sabre_irq_data *irq_data = _data;
591 unsigned long controller_regs = irq_data->controller_regs; 594 unsigned long controller_regs = irq_data->controller_regs;
592 struct linux_prom_pci_registers *regs; 595 const struct linux_prom_pci_registers *regs;
593 unsigned long imap, iclr; 596 unsigned long imap, iclr;
594 unsigned long imap_off, iclr_off; 597 unsigned long imap_off, iclr_off;
595 int inofixup = 0; 598 int inofixup = 0;
@@ -639,9 +642,9 @@ static unsigned int sabre_irq_build(struct device_node *dp,
639 642
640static void sabre_irq_trans_init(struct device_node *dp) 643static void sabre_irq_trans_init(struct device_node *dp)
641{ 644{
642 struct linux_prom64_registers *regs; 645 const struct linux_prom64_registers *regs;
643 struct sabre_irq_data *irq_data; 646 struct sabre_irq_data *irq_data;
644 u32 *busrange; 647 const u32 *busrange;
645 648
646 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); 649 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
647 dp->irq_trans->irq_build = sabre_irq_build; 650 dp->irq_trans->irq_build = sabre_irq_build;
@@ -795,7 +798,7 @@ static unsigned int schizo_irq_build(struct device_node *dp,
795 798
796static void __schizo_irq_trans_init(struct device_node *dp, int is_tomatillo) 799static void __schizo_irq_trans_init(struct device_node *dp, int is_tomatillo)
797{ 800{
798 struct linux_prom64_registers *regs; 801 const struct linux_prom64_registers *regs;
799 struct schizo_irq_data *irq_data; 802 struct schizo_irq_data *irq_data;
800 803
801 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); 804 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
@@ -836,7 +839,7 @@ static unsigned int pci_sun4v_irq_build(struct device_node *dp,
836 839
837static void pci_sun4v_irq_trans_init(struct device_node *dp) 840static void pci_sun4v_irq_trans_init(struct device_node *dp)
838{ 841{
839 struct linux_prom64_registers *regs; 842 const struct linux_prom64_registers *regs;
840 843
841 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); 844 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
842 dp->irq_trans->irq_build = pci_sun4v_irq_build; 845 dp->irq_trans->irq_build = pci_sun4v_irq_build;
@@ -940,7 +943,7 @@ static unsigned int sbus_of_build_irq(struct device_node *dp,
940 void *_data) 943 void *_data)
941{ 944{
942 unsigned long reg_base = (unsigned long) _data; 945 unsigned long reg_base = (unsigned long) _data;
943 struct linux_prom_registers *regs; 946 const struct linux_prom_registers *regs;
944 unsigned long imap, iclr; 947 unsigned long imap, iclr;
945 int sbus_slot = 0; 948 int sbus_slot = 0;
946 int sbus_level = 0; 949 int sbus_level = 0;
@@ -994,7 +997,7 @@ static unsigned int sbus_of_build_irq(struct device_node *dp,
994 997
995static void sbus_irq_trans_init(struct device_node *dp) 998static void sbus_irq_trans_init(struct device_node *dp)
996{ 999{
997 struct linux_prom64_registers *regs; 1000 const struct linux_prom64_registers *regs;
998 1001
999 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); 1002 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1000 dp->irq_trans->irq_build = sbus_of_build_irq; 1003 dp->irq_trans->irq_build = sbus_of_build_irq;
@@ -1080,7 +1083,7 @@ static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1080 1083
1081static void sun4v_vdev_irq_trans_init(struct device_node *dp) 1084static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1082{ 1085{
1083 struct linux_prom64_registers *regs; 1086 const struct linux_prom64_registers *regs;
1084 1087
1085 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); 1088 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1086 dp->irq_trans->irq_build = sun4v_vdev_irq_build; 1089 dp->irq_trans->irq_build = sun4v_vdev_irq_build;
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index 14f78fb5e890..3b05428cc909 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -26,23 +26,9 @@
26 26
27#define MAP_BASE ((u32)0xc0000000) 27#define MAP_BASE ((u32)0xc0000000)
28 28
29struct sbus_iommu_arena { 29struct sbus_info {
30 unsigned long *map; 30 struct iommu iommu;
31 unsigned int hint; 31 struct strbuf strbuf;
32 unsigned int limit;
33};
34
35struct sbus_iommu {
36 spinlock_t lock;
37
38 struct sbus_iommu_arena arena;
39
40 iopte_t *page_table;
41 unsigned long strbuf_regs;
42 unsigned long iommu_regs;
43 unsigned long sbus_control_reg;
44
45 volatile unsigned long strbuf_flushflag;
46}; 32};
47 33
48/* Offsets from iommu_regs */ 34/* Offsets from iommu_regs */
@@ -58,16 +44,17 @@ struct sbus_iommu {
58 44
59#define IOMMU_DRAM_VALID (1UL << 30UL) 45#define IOMMU_DRAM_VALID (1UL << 30UL)
60 46
61static void __iommu_flushall(struct sbus_iommu *iommu) 47static void __iommu_flushall(struct iommu *iommu)
62{ 48{
63 unsigned long tag = iommu->iommu_regs + IOMMU_TAGDIAG; 49 unsigned long tag;
64 int entry; 50 int entry;
65 51
52 tag = iommu->iommu_control + (IOMMU_TAGDIAG - IOMMU_CONTROL);
66 for (entry = 0; entry < 16; entry++) { 53 for (entry = 0; entry < 16; entry++) {
67 upa_writeq(0, tag); 54 upa_writeq(0, tag);
68 tag += 8UL; 55 tag += 8UL;
69 } 56 }
70 upa_readq(iommu->sbus_control_reg); 57 upa_readq(iommu->write_complete_reg);
71} 58}
72 59
73/* Offsets from strbuf_regs */ 60/* Offsets from strbuf_regs */
@@ -82,15 +69,14 @@ static void __iommu_flushall(struct sbus_iommu *iommu)
82 69
83#define STRBUF_TAG_VALID 0x02UL 70#define STRBUF_TAG_VALID 0x02UL
84 71
85static void sbus_strbuf_flush(struct sbus_iommu *iommu, u32 base, unsigned long npages, int direction) 72static void sbus_strbuf_flush(struct iommu *iommu, struct strbuf *strbuf, u32 base, unsigned long npages, int direction)
86{ 73{
87 unsigned long n; 74 unsigned long n;
88 int limit; 75 int limit;
89 76
90 n = npages; 77 n = npages;
91 while (n--) 78 while (n--)
92 upa_writeq(base + (n << IO_PAGE_SHIFT), 79 upa_writeq(base + (n << IO_PAGE_SHIFT), strbuf->strbuf_pflush);
93 iommu->strbuf_regs + STRBUF_PFLUSH);
94 80
95 /* If the device could not have possibly put dirty data into 81 /* If the device could not have possibly put dirty data into
96 * the streaming cache, no flush-flag synchronization needs 82 * the streaming cache, no flush-flag synchronization needs
@@ -99,15 +85,14 @@ static void sbus_strbuf_flush(struct sbus_iommu *iommu, u32 base, unsigned long
99 if (direction == SBUS_DMA_TODEVICE) 85 if (direction == SBUS_DMA_TODEVICE)
100 return; 86 return;
101 87
102 iommu->strbuf_flushflag = 0UL; 88 *(strbuf->strbuf_flushflag) = 0UL;
103 89
104 /* Whoopee cushion! */ 90 /* Whoopee cushion! */
105 upa_writeq(__pa(&iommu->strbuf_flushflag), 91 upa_writeq(strbuf->strbuf_flushflag_pa, strbuf->strbuf_fsync);
106 iommu->strbuf_regs + STRBUF_FSYNC); 92 upa_readq(iommu->write_complete_reg);
107 upa_readq(iommu->sbus_control_reg);
108 93
109 limit = 100000; 94 limit = 100000;
110 while (iommu->strbuf_flushflag == 0UL) { 95 while (*(strbuf->strbuf_flushflag) == 0UL) {
111 limit--; 96 limit--;
112 if (!limit) 97 if (!limit)
113 break; 98 break;
@@ -121,9 +106,9 @@ static void sbus_strbuf_flush(struct sbus_iommu *iommu, u32 base, unsigned long
121} 106}
122 107
123/* Based largely upon the ppc64 iommu allocator. */ 108/* Based largely upon the ppc64 iommu allocator. */
124static long sbus_arena_alloc(struct sbus_iommu *iommu, unsigned long npages) 109static long sbus_arena_alloc(struct iommu *iommu, unsigned long npages)
125{ 110{
126 struct sbus_iommu_arena *arena = &iommu->arena; 111 struct iommu_arena *arena = &iommu->arena;
127 unsigned long n, i, start, end, limit; 112 unsigned long n, i, start, end, limit;
128 int pass; 113 int pass;
129 114
@@ -162,7 +147,7 @@ again:
162 return n; 147 return n;
163} 148}
164 149
165static void sbus_arena_free(struct sbus_iommu_arena *arena, unsigned long base, unsigned long npages) 150static void sbus_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
166{ 151{
167 unsigned long i; 152 unsigned long i;
168 153
@@ -170,7 +155,7 @@ static void sbus_arena_free(struct sbus_iommu_arena *arena, unsigned long base,
170 __clear_bit(i, arena->map); 155 __clear_bit(i, arena->map);
171} 156}
172 157
173static void sbus_iommu_table_init(struct sbus_iommu *iommu, unsigned int tsbsize) 158static void sbus_iommu_table_init(struct iommu *iommu, unsigned int tsbsize)
174{ 159{
175 unsigned long tsbbase, order, sz, num_tsb_entries; 160 unsigned long tsbbase, order, sz, num_tsb_entries;
176 161
@@ -178,13 +163,14 @@ static void sbus_iommu_table_init(struct sbus_iommu *iommu, unsigned int tsbsize
178 163
179 /* Setup initial software IOMMU state. */ 164 /* Setup initial software IOMMU state. */
180 spin_lock_init(&iommu->lock); 165 spin_lock_init(&iommu->lock);
166 iommu->page_table_map_base = MAP_BASE;
181 167
182 /* Allocate and initialize the free area map. */ 168 /* Allocate and initialize the free area map. */
183 sz = num_tsb_entries / 8; 169 sz = num_tsb_entries / 8;
184 sz = (sz + 7UL) & ~7UL; 170 sz = (sz + 7UL) & ~7UL;
185 iommu->arena.map = kzalloc(sz, GFP_KERNEL); 171 iommu->arena.map = kzalloc(sz, GFP_KERNEL);
186 if (!iommu->arena.map) { 172 if (!iommu->arena.map) {
187 prom_printf("PCI_IOMMU: Error, kmalloc(arena.map) failed.\n"); 173 prom_printf("SBUS_IOMMU: Error, kmalloc(arena.map) failed.\n");
188 prom_halt(); 174 prom_halt();
189 } 175 }
190 iommu->arena.limit = num_tsb_entries; 176 iommu->arena.limit = num_tsb_entries;
@@ -200,7 +186,7 @@ static void sbus_iommu_table_init(struct sbus_iommu *iommu, unsigned int tsbsize
200 memset(iommu->page_table, 0, tsbsize); 186 memset(iommu->page_table, 0, tsbsize);
201} 187}
202 188
203static inline iopte_t *alloc_npages(struct sbus_iommu *iommu, unsigned long npages) 189static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages)
204{ 190{
205 long entry; 191 long entry;
206 192
@@ -211,14 +197,15 @@ static inline iopte_t *alloc_npages(struct sbus_iommu *iommu, unsigned long npag
211 return iommu->page_table + entry; 197 return iommu->page_table + entry;
212} 198}
213 199
214static inline void free_npages(struct sbus_iommu *iommu, dma_addr_t base, unsigned long npages) 200static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages)
215{ 201{
216 sbus_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); 202 sbus_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages);
217} 203}
218 204
219void *sbus_alloc_consistent(struct sbus_dev *sdev, size_t size, dma_addr_t *dvma_addr) 205void *sbus_alloc_consistent(struct sbus_dev *sdev, size_t size, dma_addr_t *dvma_addr)
220{ 206{
221 struct sbus_iommu *iommu; 207 struct sbus_info *info;
208 struct iommu *iommu;
222 iopte_t *iopte; 209 iopte_t *iopte;
223 unsigned long flags, order, first_page; 210 unsigned long flags, order, first_page;
224 void *ret; 211 void *ret;
@@ -234,7 +221,8 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, size_t size, dma_addr_t *dvma
234 return NULL; 221 return NULL;
235 memset((char *)first_page, 0, PAGE_SIZE << order); 222 memset((char *)first_page, 0, PAGE_SIZE << order);
236 223
237 iommu = sdev->bus->iommu; 224 info = sdev->bus->iommu;
225 iommu = &info->iommu;
238 226
239 spin_lock_irqsave(&iommu->lock, flags); 227 spin_lock_irqsave(&iommu->lock, flags);
240 iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); 228 iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT);
@@ -245,7 +233,7 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, size_t size, dma_addr_t *dvma
245 return NULL; 233 return NULL;
246 } 234 }
247 235
248 *dvma_addr = (MAP_BASE + 236 *dvma_addr = (iommu->page_table_map_base +
249 ((iopte - iommu->page_table) << IO_PAGE_SHIFT)); 237 ((iopte - iommu->page_table) << IO_PAGE_SHIFT));
250 ret = (void *) first_page; 238 ret = (void *) first_page;
251 npages = size >> IO_PAGE_SHIFT; 239 npages = size >> IO_PAGE_SHIFT;
@@ -263,18 +251,20 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, size_t size, dma_addr_t *dvma
263 251
264void sbus_free_consistent(struct sbus_dev *sdev, size_t size, void *cpu, dma_addr_t dvma) 252void sbus_free_consistent(struct sbus_dev *sdev, size_t size, void *cpu, dma_addr_t dvma)
265{ 253{
266 struct sbus_iommu *iommu; 254 struct sbus_info *info;
255 struct iommu *iommu;
267 iopte_t *iopte; 256 iopte_t *iopte;
268 unsigned long flags, order, npages; 257 unsigned long flags, order, npages;
269 258
270 npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; 259 npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
271 iommu = sdev->bus->iommu; 260 info = sdev->bus->iommu;
261 iommu = &info->iommu;
272 iopte = iommu->page_table + 262 iopte = iommu->page_table +
273 ((dvma - MAP_BASE) >> IO_PAGE_SHIFT); 263 ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
274 264
275 spin_lock_irqsave(&iommu->lock, flags); 265 spin_lock_irqsave(&iommu->lock, flags);
276 266
277 free_npages(iommu, dvma - MAP_BASE, npages); 267 free_npages(iommu, dvma - iommu->page_table_map_base, npages);
278 268
279 spin_unlock_irqrestore(&iommu->lock, flags); 269 spin_unlock_irqrestore(&iommu->lock, flags);
280 270
@@ -285,14 +275,16 @@ void sbus_free_consistent(struct sbus_dev *sdev, size_t size, void *cpu, dma_add
285 275
286dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, size_t sz, int direction) 276dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, size_t sz, int direction)
287{ 277{
288 struct sbus_iommu *iommu; 278 struct sbus_info *info;
279 struct iommu *iommu;
289 iopte_t *base; 280 iopte_t *base;
290 unsigned long flags, npages, oaddr; 281 unsigned long flags, npages, oaddr;
291 unsigned long i, base_paddr; 282 unsigned long i, base_paddr;
292 u32 bus_addr, ret; 283 u32 bus_addr, ret;
293 unsigned long iopte_protection; 284 unsigned long iopte_protection;
294 285
295 iommu = sdev->bus->iommu; 286 info = sdev->bus->iommu;
287 iommu = &info->iommu;
296 288
297 if (unlikely(direction == SBUS_DMA_NONE)) 289 if (unlikely(direction == SBUS_DMA_NONE))
298 BUG(); 290 BUG();
@@ -308,7 +300,7 @@ dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, size_t sz, int dire
308 if (unlikely(!base)) 300 if (unlikely(!base))
309 BUG(); 301 BUG();
310 302
311 bus_addr = (MAP_BASE + 303 bus_addr = (iommu->page_table_map_base +
312 ((base - iommu->page_table) << IO_PAGE_SHIFT)); 304 ((base - iommu->page_table) << IO_PAGE_SHIFT));
313 ret = bus_addr | (oaddr & ~IO_PAGE_MASK); 305 ret = bus_addr | (oaddr & ~IO_PAGE_MASK);
314 base_paddr = __pa(oaddr & IO_PAGE_MASK); 306 base_paddr = __pa(oaddr & IO_PAGE_MASK);
@@ -325,7 +317,9 @@ dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, size_t sz, int dire
325 317
326void sbus_unmap_single(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, int direction) 318void sbus_unmap_single(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, int direction)
327{ 319{
328 struct sbus_iommu *iommu = sdev->bus->iommu; 320 struct sbus_info *info = sdev->bus->iommu;
321 struct iommu *iommu = &info->iommu;
322 struct strbuf *strbuf = &info->strbuf;
329 iopte_t *base; 323 iopte_t *base;
330 unsigned long flags, npages, i; 324 unsigned long flags, npages, i;
331 325
@@ -335,15 +329,15 @@ void sbus_unmap_single(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, in
335 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); 329 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
336 npages >>= IO_PAGE_SHIFT; 330 npages >>= IO_PAGE_SHIFT;
337 base = iommu->page_table + 331 base = iommu->page_table +
338 ((bus_addr - MAP_BASE) >> IO_PAGE_SHIFT); 332 ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
339 333
340 bus_addr &= IO_PAGE_MASK; 334 bus_addr &= IO_PAGE_MASK;
341 335
342 spin_lock_irqsave(&iommu->lock, flags); 336 spin_lock_irqsave(&iommu->lock, flags);
343 sbus_strbuf_flush(iommu, bus_addr, npages, direction); 337 sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction);
344 for (i = 0; i < npages; i++) 338 for (i = 0; i < npages; i++)
345 iopte_val(base[i]) = 0UL; 339 iopte_val(base[i]) = 0UL;
346 free_npages(iommu, bus_addr - MAP_BASE, npages); 340 free_npages(iommu, bus_addr - iommu->page_table_map_base, npages);
347 spin_unlock_irqrestore(&iommu->lock, flags); 341 spin_unlock_irqrestore(&iommu->lock, flags);
348} 342}
349 343
@@ -425,7 +419,8 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
425 419
426int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction) 420int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction)
427{ 421{
428 struct sbus_iommu *iommu; 422 struct sbus_info *info;
423 struct iommu *iommu;
429 unsigned long flags, npages, iopte_protection; 424 unsigned long flags, npages, iopte_protection;
430 iopte_t *base; 425 iopte_t *base;
431 u32 dma_base; 426 u32 dma_base;
@@ -442,7 +437,8 @@ int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, i
442 return 1; 437 return 1;
443 } 438 }
444 439
445 iommu = sdev->bus->iommu; 440 info = sdev->bus->iommu;
441 iommu = &info->iommu;
446 442
447 if (unlikely(direction == SBUS_DMA_NONE)) 443 if (unlikely(direction == SBUS_DMA_NONE))
448 BUG(); 444 BUG();
@@ -456,7 +452,7 @@ int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, i
456 if (unlikely(base == NULL)) 452 if (unlikely(base == NULL))
457 BUG(); 453 BUG();
458 454
459 dma_base = MAP_BASE + 455 dma_base = iommu->page_table_map_base +
460 ((base - iommu->page_table) << IO_PAGE_SHIFT); 456 ((base - iommu->page_table) << IO_PAGE_SHIFT);
461 457
462 /* Normalize DVMA addresses. */ 458 /* Normalize DVMA addresses. */
@@ -485,7 +481,9 @@ int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, i
485 481
486void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction) 482void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction)
487{ 483{
488 struct sbus_iommu *iommu; 484 struct sbus_info *info;
485 struct iommu *iommu;
486 struct strbuf *strbuf;
489 iopte_t *base; 487 iopte_t *base;
490 unsigned long flags, i, npages; 488 unsigned long flags, i, npages;
491 u32 bus_addr; 489 u32 bus_addr;
@@ -493,7 +491,9 @@ void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems
493 if (unlikely(direction == SBUS_DMA_NONE)) 491 if (unlikely(direction == SBUS_DMA_NONE))
494 BUG(); 492 BUG();
495 493
496 iommu = sdev->bus->iommu; 494 info = sdev->bus->iommu;
495 iommu = &info->iommu;
496 strbuf = &info->strbuf;
497 497
498 bus_addr = sglist->dma_address & IO_PAGE_MASK; 498 bus_addr = sglist->dma_address & IO_PAGE_MASK;
499 499
@@ -505,29 +505,33 @@ void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems
505 bus_addr) >> IO_PAGE_SHIFT; 505 bus_addr) >> IO_PAGE_SHIFT;
506 506
507 base = iommu->page_table + 507 base = iommu->page_table +
508 ((bus_addr - MAP_BASE) >> IO_PAGE_SHIFT); 508 ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
509 509
510 spin_lock_irqsave(&iommu->lock, flags); 510 spin_lock_irqsave(&iommu->lock, flags);
511 sbus_strbuf_flush(iommu, bus_addr, npages, direction); 511 sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction);
512 for (i = 0; i < npages; i++) 512 for (i = 0; i < npages; i++)
513 iopte_val(base[i]) = 0UL; 513 iopte_val(base[i]) = 0UL;
514 free_npages(iommu, bus_addr - MAP_BASE, npages); 514 free_npages(iommu, bus_addr - iommu->page_table_map_base, npages);
515 spin_unlock_irqrestore(&iommu->lock, flags); 515 spin_unlock_irqrestore(&iommu->lock, flags);
516} 516}
517 517
518void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, int direction) 518void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, dma_addr_t bus_addr, size_t sz, int direction)
519{ 519{
520 struct sbus_iommu *iommu; 520 struct sbus_info *info;
521 struct iommu *iommu;
522 struct strbuf *strbuf;
521 unsigned long flags, npages; 523 unsigned long flags, npages;
522 524
523 iommu = sdev->bus->iommu; 525 info = sdev->bus->iommu;
526 iommu = &info->iommu;
527 strbuf = &info->strbuf;
524 528
525 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); 529 npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
526 npages >>= IO_PAGE_SHIFT; 530 npages >>= IO_PAGE_SHIFT;
527 bus_addr &= IO_PAGE_MASK; 531 bus_addr &= IO_PAGE_MASK;
528 532
529 spin_lock_irqsave(&iommu->lock, flags); 533 spin_lock_irqsave(&iommu->lock, flags);
530 sbus_strbuf_flush(iommu, bus_addr, npages, direction); 534 sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction);
531 spin_unlock_irqrestore(&iommu->lock, flags); 535 spin_unlock_irqrestore(&iommu->lock, flags);
532} 536}
533 537
@@ -537,11 +541,15 @@ void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, dma_addr_t base, siz
537 541
538void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction) 542void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, struct scatterlist *sglist, int nelems, int direction)
539{ 543{
540 struct sbus_iommu *iommu; 544 struct sbus_info *info;
545 struct iommu *iommu;
546 struct strbuf *strbuf;
541 unsigned long flags, npages, i; 547 unsigned long flags, npages, i;
542 u32 bus_addr; 548 u32 bus_addr;
543 549
544 iommu = sdev->bus->iommu; 550 info = sdev->bus->iommu;
551 iommu = &info->iommu;
552 strbuf = &info->strbuf;
545 553
546 bus_addr = sglist[0].dma_address & IO_PAGE_MASK; 554 bus_addr = sglist[0].dma_address & IO_PAGE_MASK;
547 for (i = 0; i < nelems; i++) { 555 for (i = 0; i < nelems; i++) {
@@ -553,7 +561,7 @@ void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, struct scatterlist *sglist,
553 - bus_addr) >> IO_PAGE_SHIFT; 561 - bus_addr) >> IO_PAGE_SHIFT;
554 562
555 spin_lock_irqsave(&iommu->lock, flags); 563 spin_lock_irqsave(&iommu->lock, flags);
556 sbus_strbuf_flush(iommu, bus_addr, npages, direction); 564 sbus_strbuf_flush(iommu, strbuf, bus_addr, npages, direction);
557 spin_unlock_irqrestore(&iommu->lock, flags); 565 spin_unlock_irqrestore(&iommu->lock, flags);
558} 566}
559 567
@@ -564,12 +572,13 @@ void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, struct scatterlist *sg,
564/* Enable 64-bit DVMA mode for the given device. */ 572/* Enable 64-bit DVMA mode for the given device. */
565void sbus_set_sbus64(struct sbus_dev *sdev, int bursts) 573void sbus_set_sbus64(struct sbus_dev *sdev, int bursts)
566{ 574{
567 struct sbus_iommu *iommu = sdev->bus->iommu; 575 struct sbus_info *info = sdev->bus->iommu;
576 struct iommu *iommu = &info->iommu;
568 int slot = sdev->slot; 577 int slot = sdev->slot;
569 unsigned long cfg_reg; 578 unsigned long cfg_reg;
570 u64 val; 579 u64 val;
571 580
572 cfg_reg = iommu->sbus_control_reg; 581 cfg_reg = iommu->write_complete_reg;
573 switch (slot) { 582 switch (slot) {
574 case 0: 583 case 0:
575 cfg_reg += 0x20UL; 584 cfg_reg += 0x20UL;
@@ -704,8 +713,9 @@ static unsigned long sysio_imap_to_iclr(unsigned long imap)
704unsigned int sbus_build_irq(void *buscookie, unsigned int ino) 713unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
705{ 714{
706 struct sbus_bus *sbus = (struct sbus_bus *)buscookie; 715 struct sbus_bus *sbus = (struct sbus_bus *)buscookie;
707 struct sbus_iommu *iommu = sbus->iommu; 716 struct sbus_info *info = sbus->iommu;
708 unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL; 717 struct iommu *iommu = &info->iommu;
718 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
709 unsigned long imap, iclr; 719 unsigned long imap, iclr;
710 int sbus_level = 0; 720 int sbus_level = 0;
711 721
@@ -766,8 +776,9 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
766static irqreturn_t sysio_ue_handler(int irq, void *dev_id) 776static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
767{ 777{
768 struct sbus_bus *sbus = dev_id; 778 struct sbus_bus *sbus = dev_id;
769 struct sbus_iommu *iommu = sbus->iommu; 779 struct sbus_info *info = sbus->iommu;
770 unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL; 780 struct iommu *iommu = &info->iommu;
781 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
771 unsigned long afsr_reg, afar_reg; 782 unsigned long afsr_reg, afar_reg;
772 unsigned long afsr, afar, error_bits; 783 unsigned long afsr, afar, error_bits;
773 int reported; 784 int reported;
@@ -838,8 +849,9 @@ static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
838static irqreturn_t sysio_ce_handler(int irq, void *dev_id) 849static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
839{ 850{
840 struct sbus_bus *sbus = dev_id; 851 struct sbus_bus *sbus = dev_id;
841 struct sbus_iommu *iommu = sbus->iommu; 852 struct sbus_info *info = sbus->iommu;
842 unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL; 853 struct iommu *iommu = &info->iommu;
854 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
843 unsigned long afsr_reg, afar_reg; 855 unsigned long afsr_reg, afar_reg;
844 unsigned long afsr, afar, error_bits; 856 unsigned long afsr, afar, error_bits;
845 int reported; 857 int reported;
@@ -915,12 +927,13 @@ static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
915static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id) 927static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
916{ 928{
917 struct sbus_bus *sbus = dev_id; 929 struct sbus_bus *sbus = dev_id;
918 struct sbus_iommu *iommu = sbus->iommu; 930 struct sbus_info *info = sbus->iommu;
931 struct iommu *iommu = &info->iommu;
919 unsigned long afsr_reg, afar_reg, reg_base; 932 unsigned long afsr_reg, afar_reg, reg_base;
920 unsigned long afsr, afar, error_bits; 933 unsigned long afsr, afar, error_bits;
921 int reported; 934 int reported;
922 935
923 reg_base = iommu->sbus_control_reg - 0x2000UL; 936 reg_base = iommu->write_complete_reg - 0x2000UL;
924 afsr_reg = reg_base + SYSIO_SBUS_AFSR; 937 afsr_reg = reg_base + SYSIO_SBUS_AFSR;
925 afar_reg = reg_base + SYSIO_SBUS_AFAR; 938 afar_reg = reg_base + SYSIO_SBUS_AFAR;
926 939
@@ -982,8 +995,9 @@ static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
982 995
983static void __init sysio_register_error_handlers(struct sbus_bus *sbus) 996static void __init sysio_register_error_handlers(struct sbus_bus *sbus)
984{ 997{
985 struct sbus_iommu *iommu = sbus->iommu; 998 struct sbus_info *info = sbus->iommu;
986 unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL; 999 struct iommu *iommu = &info->iommu;
1000 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
987 unsigned int irq; 1001 unsigned int irq;
988 u64 control; 1002 u64 control;
989 1003
@@ -1017,18 +1031,20 @@ static void __init sysio_register_error_handlers(struct sbus_bus *sbus)
1017 SYSIO_ECNTRL_CEEN), 1031 SYSIO_ECNTRL_CEEN),
1018 reg_base + ECC_CONTROL); 1032 reg_base + ECC_CONTROL);
1019 1033
1020 control = upa_readq(iommu->sbus_control_reg); 1034 control = upa_readq(iommu->write_complete_reg);
1021 control |= 0x100UL; /* SBUS Error Interrupt Enable */ 1035 control |= 0x100UL; /* SBUS Error Interrupt Enable */
1022 upa_writeq(control, iommu->sbus_control_reg); 1036 upa_writeq(control, iommu->write_complete_reg);
1023} 1037}
1024 1038
1025/* Boot time initialization. */ 1039/* Boot time initialization. */
1026static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus) 1040static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1027{ 1041{
1028 struct linux_prom64_registers *pr; 1042 const struct linux_prom64_registers *pr;
1029 struct device_node *dp; 1043 struct device_node *dp;
1030 struct sbus_iommu *iommu; 1044 struct sbus_info *info;
1031 unsigned long regs; 1045 struct iommu *iommu;
1046 struct strbuf *strbuf;
1047 unsigned long regs, reg_base;
1032 u64 control; 1048 u64 control;
1033 int i; 1049 int i;
1034 1050
@@ -1043,33 +1059,42 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1043 } 1059 }
1044 regs = pr->phys_addr; 1060 regs = pr->phys_addr;
1045 1061
1046 iommu = kmalloc(sizeof(*iommu) + SMP_CACHE_BYTES, GFP_ATOMIC); 1062 info = kzalloc(sizeof(*info), GFP_ATOMIC);
1047 if (iommu == NULL) { 1063 if (info == NULL) {
1048 prom_printf("sbus_iommu_init: Fatal error, kmalloc(iommu) failed\n"); 1064 prom_printf("sbus_iommu_init: Fatal error, "
1065 "kmalloc(info) failed\n");
1049 prom_halt(); 1066 prom_halt();
1050 } 1067 }
1051 1068
1052 /* Align on E$ line boundary. */ 1069 iommu = &info->iommu;
1053 iommu = (struct sbus_iommu *) 1070 strbuf = &info->strbuf;
1054 (((unsigned long)iommu + (SMP_CACHE_BYTES - 1UL)) &
1055 ~(SMP_CACHE_BYTES - 1UL));
1056 1071
1057 memset(iommu, 0, sizeof(*iommu)); 1072 reg_base = regs + SYSIO_IOMMUREG_BASE;
1073 iommu->iommu_control = reg_base + IOMMU_CONTROL;
1074 iommu->iommu_tsbbase = reg_base + IOMMU_TSBBASE;
1075 iommu->iommu_flush = reg_base + IOMMU_FLUSH;
1058 1076
1059 /* Setup spinlock. */ 1077 reg_base = regs + SYSIO_STRBUFREG_BASE;
1060 spin_lock_init(&iommu->lock); 1078 strbuf->strbuf_control = reg_base + STRBUF_CONTROL;
1079 strbuf->strbuf_pflush = reg_base + STRBUF_PFLUSH;
1080 strbuf->strbuf_fsync = reg_base + STRBUF_FSYNC;
1061 1081
1062 /* Init register offsets. */ 1082 strbuf->strbuf_enabled = 1;
1063 iommu->iommu_regs = regs + SYSIO_IOMMUREG_BASE; 1083
1064 iommu->strbuf_regs = regs + SYSIO_STRBUFREG_BASE; 1084 strbuf->strbuf_flushflag = (volatile unsigned long *)
1085 ((((unsigned long)&strbuf->__flushflag_buf[0])
1086 + 63UL)
1087 & ~63UL);
1088 strbuf->strbuf_flushflag_pa = (unsigned long)
1089 __pa(strbuf->strbuf_flushflag);
1065 1090
1066 /* The SYSIO SBUS control register is used for dummy reads 1091 /* The SYSIO SBUS control register is used for dummy reads
1067 * in order to ensure write completion. 1092 * in order to ensure write completion.
1068 */ 1093 */
1069 iommu->sbus_control_reg = regs + 0x2000UL; 1094 iommu->write_complete_reg = regs + 0x2000UL;
1070 1095
1071 /* Link into SYSIO software state. */ 1096 /* Link into SYSIO software state. */
1072 sbus->iommu = iommu; 1097 sbus->iommu = info;
1073 1098
1074 printk("SYSIO: UPA portID %x, at %016lx\n", 1099 printk("SYSIO: UPA portID %x, at %016lx\n",
1075 sbus->portid, regs); 1100 sbus->portid, regs);
@@ -1077,40 +1102,44 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1077 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */ 1102 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */
1078 sbus_iommu_table_init(iommu, IO_TSB_SIZE); 1103 sbus_iommu_table_init(iommu, IO_TSB_SIZE);
1079 1104
1080 control = upa_readq(iommu->iommu_regs + IOMMU_CONTROL); 1105 control = upa_readq(iommu->iommu_control);
1081 control = ((7UL << 16UL) | 1106 control = ((7UL << 16UL) |
1082 (0UL << 2UL) | 1107 (0UL << 2UL) |
1083 (1UL << 1UL) | 1108 (1UL << 1UL) |
1084 (1UL << 0UL)); 1109 (1UL << 0UL));
1085 upa_writeq(control, iommu->iommu_regs + IOMMU_CONTROL); 1110 upa_writeq(control, iommu->iommu_control);
1086 1111
1087 /* Clean out any cruft in the IOMMU using 1112 /* Clean out any cruft in the IOMMU using
1088 * diagnostic accesses. 1113 * diagnostic accesses.
1089 */ 1114 */
1090 for (i = 0; i < 16; i++) { 1115 for (i = 0; i < 16; i++) {
1091 unsigned long dram = iommu->iommu_regs + IOMMU_DRAMDIAG; 1116 unsigned long dram, tag;
1092 unsigned long tag = iommu->iommu_regs + IOMMU_TAGDIAG; 1117
1118 dram = iommu->iommu_control + (IOMMU_DRAMDIAG - IOMMU_CONTROL);
1119 tag = iommu->iommu_control + (IOMMU_TAGDIAG - IOMMU_CONTROL);
1093 1120
1094 dram += (unsigned long)i * 8UL; 1121 dram += (unsigned long)i * 8UL;
1095 tag += (unsigned long)i * 8UL; 1122 tag += (unsigned long)i * 8UL;
1096 upa_writeq(0, dram); 1123 upa_writeq(0, dram);
1097 upa_writeq(0, tag); 1124 upa_writeq(0, tag);
1098 } 1125 }
1099 upa_readq(iommu->sbus_control_reg); 1126 upa_readq(iommu->write_complete_reg);
1100 1127
1101 /* Give the TSB to SYSIO. */ 1128 /* Give the TSB to SYSIO. */
1102 upa_writeq(__pa(iommu->page_table), iommu->iommu_regs + IOMMU_TSBBASE); 1129 upa_writeq(__pa(iommu->page_table), iommu->iommu_tsbbase);
1103 1130
1104 /* Setup streaming buffer, DE=1 SB_EN=1 */ 1131 /* Setup streaming buffer, DE=1 SB_EN=1 */
1105 control = (1UL << 1UL) | (1UL << 0UL); 1132 control = (1UL << 1UL) | (1UL << 0UL);
1106 upa_writeq(control, iommu->strbuf_regs + STRBUF_CONTROL); 1133 upa_writeq(control, strbuf->strbuf_control);
1107 1134
1108 /* Clear out the tags using diagnostics. */ 1135 /* Clear out the tags using diagnostics. */
1109 for (i = 0; i < 16; i++) { 1136 for (i = 0; i < 16; i++) {
1110 unsigned long ptag, ltag; 1137 unsigned long ptag, ltag;
1111 1138
1112 ptag = iommu->strbuf_regs + STRBUF_PTAGDIAG; 1139 ptag = strbuf->strbuf_control +
1113 ltag = iommu->strbuf_regs + STRBUF_LTAGDIAG; 1140 (STRBUF_PTAGDIAG - STRBUF_CONTROL);
1141 ltag = strbuf->strbuf_control +
1142 (STRBUF_LTAGDIAG - STRBUF_CONTROL);
1114 ptag += (unsigned long)i * 8UL; 1143 ptag += (unsigned long)i * 8UL;
1115 ltag += (unsigned long)i * 8UL; 1144 ltag += (unsigned long)i * 8UL;
1116 1145
@@ -1119,9 +1148,9 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1119 } 1148 }
1120 1149
1121 /* Enable DVMA arbitration for all devices/slots. */ 1150 /* Enable DVMA arbitration for all devices/slots. */
1122 control = upa_readq(iommu->sbus_control_reg); 1151 control = upa_readq(iommu->write_complete_reg);
1123 control |= 0x3fUL; 1152 control |= 0x3fUL;
1124 upa_writeq(control, iommu->sbus_control_reg); 1153 upa_writeq(control, iommu->write_complete_reg);
1125 1154
1126 /* Now some Xfire specific grot... */ 1155 /* Now some Xfire specific grot... */
1127 if (this_is_starfire) 1156 if (this_is_starfire)
@@ -1133,7 +1162,7 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1133void sbus_fill_device_irq(struct sbus_dev *sdev) 1162void sbus_fill_device_irq(struct sbus_dev *sdev)
1134{ 1163{
1135 struct device_node *dp = of_find_node_by_phandle(sdev->prom_node); 1164 struct device_node *dp = of_find_node_by_phandle(sdev->prom_node);
1136 struct linux_prom_irqs *irqs; 1165 const struct linux_prom_irqs *irqs;
1137 1166
1138 irqs = of_get_property(dp, "interrupts", NULL); 1167 irqs = of_get_property(dp, "interrupts", NULL);
1139 if (!irqs) { 1168 if (!irqs) {
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index fc99f7b8012f..d4f0a70f4845 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -45,7 +45,7 @@
45extern void calibrate_delay(void); 45extern void calibrate_delay(void);
46 46
47/* Please don't make this stuff initdata!!! --DaveM */ 47/* Please don't make this stuff initdata!!! --DaveM */
48static unsigned char boot_cpu_id; 48unsigned char boot_cpu_id;
49 49
50cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; 50cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE;
51cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE; 51cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE;
@@ -81,8 +81,6 @@ void __init smp_store_cpu_info(int id)
81 struct device_node *dp; 81 struct device_node *dp;
82 int def; 82 int def;
83 83
84 /* multiplier and counter set by
85 smp_setup_percpu_timer() */
86 cpu_data(id).udelay_val = loops_per_jiffy; 84 cpu_data(id).udelay_val = loops_per_jiffy;
87 85
88 cpu_find_by_mid(id, &dp); 86 cpu_find_by_mid(id, &dp);
@@ -125,7 +123,7 @@ void __init smp_store_cpu_info(int id)
125 cpu_data(id).ecache_size, cpu_data(id).ecache_line_size); 123 cpu_data(id).ecache_size, cpu_data(id).ecache_line_size);
126} 124}
127 125
128static void smp_setup_percpu_timer(void); 126extern void setup_sparc64_timer(void);
129 127
130static volatile unsigned long callin_flag = 0; 128static volatile unsigned long callin_flag = 0;
131 129
@@ -140,7 +138,7 @@ void __init smp_callin(void)
140 138
141 __flush_tlb_all(); 139 __flush_tlb_all();
142 140
143 smp_setup_percpu_timer(); 141 setup_sparc64_timer();
144 142
145 if (cheetah_pcache_forced_on) 143 if (cheetah_pcache_forced_on)
146 cheetah_enable_pcache(); 144 cheetah_enable_pcache();
@@ -177,8 +175,6 @@ void cpu_panic(void)
177 panic("SMP bolixed\n"); 175 panic("SMP bolixed\n");
178} 176}
179 177
180static unsigned long current_tick_offset __read_mostly;
181
182/* This tick register synchronization scheme is taken entirely from 178/* This tick register synchronization scheme is taken entirely from
183 * the ia64 port, see arch/ia64/kernel/smpboot.c for details and credit. 179 * the ia64 port, see arch/ia64/kernel/smpboot.c for details and credit.
184 * 180 *
@@ -261,7 +257,7 @@ void smp_synchronize_tick_client(void)
261 } else 257 } else
262 adj = -delta; 258 adj = -delta;
263 259
264 tick_ops->add_tick(adj, current_tick_offset); 260 tick_ops->add_tick(adj);
265 } 261 }
266#if DEBUG_TICK_SYNC 262#if DEBUG_TICK_SYNC
267 t[i].rt = rt; 263 t[i].rt = rt;
@@ -1180,117 +1176,15 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs)
1180 preempt_enable(); 1176 preempt_enable();
1181} 1177}
1182 1178
1183#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
1184#define prof_counter(__cpu) cpu_data(__cpu).counter
1185
1186void smp_percpu_timer_interrupt(struct pt_regs *regs)
1187{
1188 unsigned long compare, tick, pstate;
1189 int cpu = smp_processor_id();
1190 int user = user_mode(regs);
1191 struct pt_regs *old_regs;
1192
1193 /*
1194 * Check for level 14 softint.
1195 */
1196 {
1197 unsigned long tick_mask = tick_ops->softint_mask;
1198
1199 if (!(get_softint() & tick_mask)) {
1200 extern void handler_irq(int, struct pt_regs *);
1201
1202 handler_irq(14, regs);
1203 return;
1204 }
1205 clear_softint(tick_mask);
1206 }
1207
1208 old_regs = set_irq_regs(regs);
1209 do {
1210 profile_tick(CPU_PROFILING);
1211 if (!--prof_counter(cpu)) {
1212 irq_enter();
1213
1214 if (cpu == boot_cpu_id) {
1215 kstat_this_cpu.irqs[0]++;
1216 timer_tick_interrupt(regs);
1217 }
1218
1219 update_process_times(user);
1220
1221 irq_exit();
1222
1223 prof_counter(cpu) = prof_multiplier(cpu);
1224 }
1225
1226 /* Guarantee that the following sequences execute
1227 * uninterrupted.
1228 */
1229 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
1230 "wrpr %0, %1, %%pstate"
1231 : "=r" (pstate)
1232 : "i" (PSTATE_IE));
1233
1234 compare = tick_ops->add_compare(current_tick_offset);
1235 tick = tick_ops->get_tick();
1236
1237 /* Restore PSTATE_IE. */
1238 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
1239 : /* no outputs */
1240 : "r" (pstate));
1241 } while (time_after_eq(tick, compare));
1242 set_irq_regs(old_regs);
1243}
1244
1245static void __init smp_setup_percpu_timer(void)
1246{
1247 int cpu = smp_processor_id();
1248 unsigned long pstate;
1249
1250 prof_counter(cpu) = prof_multiplier(cpu) = 1;
1251
1252 /* Guarantee that the following sequences execute
1253 * uninterrupted.
1254 */
1255 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
1256 "wrpr %0, %1, %%pstate"
1257 : "=r" (pstate)
1258 : "i" (PSTATE_IE));
1259
1260 tick_ops->init_tick(current_tick_offset);
1261
1262 /* Restore PSTATE_IE. */
1263 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
1264 : /* no outputs */
1265 : "r" (pstate));
1266}
1267
1268void __init smp_tick_init(void) 1179void __init smp_tick_init(void)
1269{ 1180{
1270 boot_cpu_id = hard_smp_processor_id(); 1181 boot_cpu_id = hard_smp_processor_id();
1271 current_tick_offset = timer_tick_offset;
1272
1273 prof_counter(boot_cpu_id) = prof_multiplier(boot_cpu_id) = 1;
1274} 1182}
1275 1183
1276/* /proc/profile writes can call this, don't __init it please. */ 1184/* /proc/profile writes can call this, don't __init it please. */
1277static DEFINE_SPINLOCK(prof_setup_lock);
1278
1279int setup_profiling_timer(unsigned int multiplier) 1185int setup_profiling_timer(unsigned int multiplier)
1280{ 1186{
1281 unsigned long flags; 1187 return -EINVAL;
1282 int i;
1283
1284 if ((!multiplier) || (timer_tick_offset / multiplier) < 1000)
1285 return -EINVAL;
1286
1287 spin_lock_irqsave(&prof_setup_lock, flags);
1288 for_each_possible_cpu(i)
1289 prof_multiplier(i) = multiplier;
1290 current_tick_offset = (timer_tick_offset / multiplier);
1291 spin_unlock_irqrestore(&prof_setup_lock, flags);
1292
1293 return 0;
1294} 1188}
1295 1189
1296static void __init smp_tune_scheduling(void) 1190static void __init smp_tune_scheduling(void)
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index beffc82a1e85..d00f51a5683f 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -212,7 +212,6 @@ EXPORT_SYMBOL(insl);
212#ifdef CONFIG_PCI 212#ifdef CONFIG_PCI
213EXPORT_SYMBOL(ebus_chain); 213EXPORT_SYMBOL(ebus_chain);
214EXPORT_SYMBOL(isa_chain); 214EXPORT_SYMBOL(isa_chain);
215EXPORT_SYMBOL(pci_memspace_mask);
216EXPORT_SYMBOL(pci_alloc_consistent); 215EXPORT_SYMBOL(pci_alloc_consistent);
217EXPORT_SYMBOL(pci_free_consistent); 216EXPORT_SYMBOL(pci_free_consistent);
218EXPORT_SYMBOL(pci_map_single); 217EXPORT_SYMBOL(pci_map_single);
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index f84da4f1b706..259063f41f95 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -31,6 +31,9 @@
31#include <linux/profile.h> 31#include <linux/profile.h>
32#include <linux/miscdevice.h> 32#include <linux/miscdevice.h>
33#include <linux/rtc.h> 33#include <linux/rtc.h>
34#include <linux/kernel_stat.h>
35#include <linux/clockchips.h>
36#include <linux/clocksource.h>
34 37
35#include <asm/oplib.h> 38#include <asm/oplib.h>
36#include <asm/mostek.h> 39#include <asm/mostek.h>
@@ -60,6 +63,7 @@ static void __iomem *mstk48t59_regs;
60static int set_rtc_mmss(unsigned long); 63static int set_rtc_mmss(unsigned long);
61 64
62#define TICK_PRIV_BIT (1UL << 63) 65#define TICK_PRIV_BIT (1UL << 63)
66#define TICKCMP_IRQ_BIT (1UL << 63)
63 67
64#ifdef CONFIG_SMP 68#ifdef CONFIG_SMP
65unsigned long profile_pc(struct pt_regs *regs) 69unsigned long profile_pc(struct pt_regs *regs)
@@ -93,21 +97,22 @@ static void tick_disable_protection(void)
93 : "g2"); 97 : "g2");
94} 98}
95 99
96static void tick_init_tick(unsigned long offset) 100static void tick_disable_irq(void)
97{ 101{
98 tick_disable_protection();
99
100 __asm__ __volatile__( 102 __asm__ __volatile__(
101 " rd %%tick, %%g1\n"
102 " andn %%g1, %1, %%g1\n"
103 " ba,pt %%xcc, 1f\n" 103 " ba,pt %%xcc, 1f\n"
104 " add %%g1, %0, %%g1\n" 104 " nop\n"
105 " .align 64\n" 105 " .align 64\n"
106 "1: wr %%g1, 0x0, %%tick_cmpr\n" 106 "1: wr %0, 0x0, %%tick_cmpr\n"
107 " rd %%tick_cmpr, %%g0" 107 " rd %%tick_cmpr, %%g0"
108 : /* no outputs */ 108 : /* no outputs */
109 : "r" (offset), "r" (TICK_PRIV_BIT) 109 : "r" (TICKCMP_IRQ_BIT));
110 : "g1"); 110}
111
112static void tick_init_tick(void)
113{
114 tick_disable_protection();
115 tick_disable_irq();
111} 116}
112 117
113static unsigned long tick_get_tick(void) 118static unsigned long tick_get_tick(void)
@@ -121,20 +126,14 @@ static unsigned long tick_get_tick(void)
121 return ret & ~TICK_PRIV_BIT; 126 return ret & ~TICK_PRIV_BIT;
122} 127}
123 128
124static unsigned long tick_get_compare(void) 129static int tick_add_compare(unsigned long adj)
125{ 130{
126 unsigned long ret; 131 unsigned long orig_tick, new_tick, new_compare;
127 132
128 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t" 133 __asm__ __volatile__("rd %%tick, %0"
129 "mov %0, %0" 134 : "=r" (orig_tick));
130 : "=r" (ret));
131 135
132 return ret; 136 orig_tick &= ~TICKCMP_IRQ_BIT;
133}
134
135static unsigned long tick_add_compare(unsigned long adj)
136{
137 unsigned long new_compare;
138 137
139 /* Workaround for Spitfire Errata (#54 I think??), I discovered 138 /* Workaround for Spitfire Errata (#54 I think??), I discovered
140 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch 139 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
@@ -145,44 +144,41 @@ static unsigned long tick_add_compare(unsigned long adj)
145 * at the start of an I-cache line, and perform a dummy 144 * at the start of an I-cache line, and perform a dummy
146 * read back from %tick_cmpr right after writing to it. -DaveM 145 * read back from %tick_cmpr right after writing to it. -DaveM
147 */ 146 */
148 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t" 147 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
149 "ba,pt %%xcc, 1f\n\t" 148 " add %1, %2, %0\n\t"
150 " add %0, %1, %0\n\t"
151 ".align 64\n" 149 ".align 64\n"
152 "1:\n\t" 150 "1:\n\t"
153 "wr %0, 0, %%tick_cmpr\n\t" 151 "wr %0, 0, %%tick_cmpr\n\t"
154 "rd %%tick_cmpr, %%g0" 152 "rd %%tick_cmpr, %%g0\n\t"
155 : "=&r" (new_compare) 153 : "=r" (new_compare)
156 : "r" (adj)); 154 : "r" (orig_tick), "r" (adj));
157 155
158 return new_compare; 156 __asm__ __volatile__("rd %%tick, %0"
157 : "=r" (new_tick));
158 new_tick &= ~TICKCMP_IRQ_BIT;
159
160 return ((long)(new_tick - (orig_tick+adj))) > 0L;
159} 161}
160 162
161static unsigned long tick_add_tick(unsigned long adj, unsigned long offset) 163static unsigned long tick_add_tick(unsigned long adj)
162{ 164{
163 unsigned long new_tick, tmp; 165 unsigned long new_tick;
164 166
165 /* Also need to handle Blackbird bug here too. */ 167 /* Also need to handle Blackbird bug here too. */
166 __asm__ __volatile__("rd %%tick, %0\n\t" 168 __asm__ __volatile__("rd %%tick, %0\n\t"
167 "add %0, %2, %0\n\t" 169 "add %0, %1, %0\n\t"
168 "wrpr %0, 0, %%tick\n\t" 170 "wrpr %0, 0, %%tick\n\t"
169 "andn %0, %4, %1\n\t" 171 : "=&r" (new_tick)
170 "ba,pt %%xcc, 1f\n\t" 172 : "r" (adj));
171 " add %1, %3, %1\n\t"
172 ".align 64\n"
173 "1:\n\t"
174 "wr %1, 0, %%tick_cmpr\n\t"
175 "rd %%tick_cmpr, %%g0"
176 : "=&r" (new_tick), "=&r" (tmp)
177 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
178 173
179 return new_tick; 174 return new_tick;
180} 175}
181 176
182static struct sparc64_tick_ops tick_operations __read_mostly = { 177static struct sparc64_tick_ops tick_operations __read_mostly = {
178 .name = "tick",
183 .init_tick = tick_init_tick, 179 .init_tick = tick_init_tick,
180 .disable_irq = tick_disable_irq,
184 .get_tick = tick_get_tick, 181 .get_tick = tick_get_tick,
185 .get_compare = tick_get_compare,
186 .add_tick = tick_add_tick, 182 .add_tick = tick_add_tick,
187 .add_compare = tick_add_compare, 183 .add_compare = tick_add_compare,
188 .softint_mask = 1UL << 0, 184 .softint_mask = 1UL << 0,
@@ -190,7 +186,15 @@ static struct sparc64_tick_ops tick_operations __read_mostly = {
190 186
191struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations; 187struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
192 188
193static void stick_init_tick(unsigned long offset) 189static void stick_disable_irq(void)
190{
191 __asm__ __volatile__(
192 "wr %0, 0x0, %%asr25"
193 : /* no outputs */
194 : "r" (TICKCMP_IRQ_BIT));
195}
196
197static void stick_init_tick(void)
194{ 198{
195 /* Writes to the %tick and %stick register are not 199 /* Writes to the %tick and %stick register are not
196 * allowed on sun4v. The Hypervisor controls that 200 * allowed on sun4v. The Hypervisor controls that
@@ -198,6 +202,7 @@ static void stick_init_tick(unsigned long offset)
198 */ 202 */
199 if (tlb_type != hypervisor) { 203 if (tlb_type != hypervisor) {
200 tick_disable_protection(); 204 tick_disable_protection();
205 tick_disable_irq();
201 206
202 /* Let the user get at STICK too. */ 207 /* Let the user get at STICK too. */
203 __asm__ __volatile__( 208 __asm__ __volatile__(
@@ -209,14 +214,7 @@ static void stick_init_tick(unsigned long offset)
209 : "g1", "g2"); 214 : "g1", "g2");
210 } 215 }
211 216
212 __asm__ __volatile__( 217 stick_disable_irq();
213 " rd %%asr24, %%g1\n"
214 " andn %%g1, %1, %%g1\n"
215 " add %%g1, %0, %%g1\n"
216 " wr %%g1, 0x0, %%asr25"
217 : /* no outputs */
218 : "r" (offset), "r" (TICK_PRIV_BIT)
219 : "g1");
220} 218}
221 219
222static unsigned long stick_get_tick(void) 220static unsigned long stick_get_tick(void)
@@ -229,49 +227,43 @@ static unsigned long stick_get_tick(void)
229 return ret & ~TICK_PRIV_BIT; 227 return ret & ~TICK_PRIV_BIT;
230} 228}
231 229
232static unsigned long stick_get_compare(void) 230static unsigned long stick_add_tick(unsigned long adj)
233{ 231{
234 unsigned long ret; 232 unsigned long new_tick;
235
236 __asm__ __volatile__("rd %%asr25, %0"
237 : "=r" (ret));
238
239 return ret;
240}
241
242static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
243{
244 unsigned long new_tick, tmp;
245 233
246 __asm__ __volatile__("rd %%asr24, %0\n\t" 234 __asm__ __volatile__("rd %%asr24, %0\n\t"
247 "add %0, %2, %0\n\t" 235 "add %0, %1, %0\n\t"
248 "wr %0, 0, %%asr24\n\t" 236 "wr %0, 0, %%asr24\n\t"
249 "andn %0, %4, %1\n\t" 237 : "=&r" (new_tick)
250 "add %1, %3, %1\n\t" 238 : "r" (adj));
251 "wr %1, 0, %%asr25"
252 : "=&r" (new_tick), "=&r" (tmp)
253 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
254 239
255 return new_tick; 240 return new_tick;
256} 241}
257 242
258static unsigned long stick_add_compare(unsigned long adj) 243static int stick_add_compare(unsigned long adj)
259{ 244{
260 unsigned long new_compare; 245 unsigned long orig_tick, new_tick;
261 246
262 __asm__ __volatile__("rd %%asr25, %0\n\t" 247 __asm__ __volatile__("rd %%asr24, %0"
263 "add %0, %1, %0\n\t" 248 : "=r" (orig_tick));
264 "wr %0, 0, %%asr25" 249 orig_tick &= ~TICKCMP_IRQ_BIT;
265 : "=&r" (new_compare) 250
266 : "r" (adj)); 251 __asm__ __volatile__("wr %0, 0, %%asr25"
252 : /* no outputs */
253 : "r" (orig_tick + adj));
254
255 __asm__ __volatile__("rd %%asr24, %0"
256 : "=r" (new_tick));
257 new_tick &= ~TICKCMP_IRQ_BIT;
267 258
268 return new_compare; 259 return ((long)(new_tick - (orig_tick+adj))) > 0L;
269} 260}
270 261
271static struct sparc64_tick_ops stick_operations __read_mostly = { 262static struct sparc64_tick_ops stick_operations __read_mostly = {
263 .name = "stick",
272 .init_tick = stick_init_tick, 264 .init_tick = stick_init_tick,
265 .disable_irq = stick_disable_irq,
273 .get_tick = stick_get_tick, 266 .get_tick = stick_get_tick,
274 .get_compare = stick_get_compare,
275 .add_tick = stick_add_tick, 267 .add_tick = stick_add_tick,
276 .add_compare = stick_add_compare, 268 .add_compare = stick_add_compare,
277 .softint_mask = 1UL << 16, 269 .softint_mask = 1UL << 16,
@@ -320,20 +312,6 @@ static unsigned long __hbird_read_stick(void)
320 return ret; 312 return ret;
321} 313}
322 314
323static unsigned long __hbird_read_compare(void)
324{
325 unsigned long low, high;
326 unsigned long addr = HBIRD_STICKCMP_ADDR;
327
328 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
329 "add %2, 0x8, %2\n\t"
330 "ldxa [%2] %3, %1"
331 : "=&r" (low), "=&r" (high), "=&r" (addr)
332 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
333
334 return (high << 32UL) | low;
335}
336
337static void __hbird_write_stick(unsigned long val) 315static void __hbird_write_stick(unsigned long val)
338{ 316{
339 unsigned long low = (val & 0xffffffffUL); 317 unsigned long low = (val & 0xffffffffUL);
@@ -364,10 +342,13 @@ static void __hbird_write_compare(unsigned long val)
364 "i" (ASI_PHYS_BYPASS_EC_E)); 342 "i" (ASI_PHYS_BYPASS_EC_E));
365} 343}
366 344
367static void hbtick_init_tick(unsigned long offset) 345static void hbtick_disable_irq(void)
368{ 346{
369 unsigned long val; 347 __hbird_write_compare(TICKCMP_IRQ_BIT);
348}
370 349
350static void hbtick_init_tick(void)
351{
371 tick_disable_protection(); 352 tick_disable_protection();
372 353
373 /* XXX This seems to be necessary to 'jumpstart' Hummingbird 354 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
@@ -377,8 +358,7 @@ static void hbtick_init_tick(unsigned long offset)
377 */ 358 */
378 __hbird_write_stick(__hbird_read_stick()); 359 __hbird_write_stick(__hbird_read_stick());
379 360
380 val = __hbird_read_stick() & ~TICK_PRIV_BIT; 361 hbtick_disable_irq();
381 __hbird_write_compare(val + offset);
382} 362}
383 363
384static unsigned long hbtick_get_tick(void) 364static unsigned long hbtick_get_tick(void)
@@ -386,122 +366,95 @@ static unsigned long hbtick_get_tick(void)
386 return __hbird_read_stick() & ~TICK_PRIV_BIT; 366 return __hbird_read_stick() & ~TICK_PRIV_BIT;
387} 367}
388 368
389static unsigned long hbtick_get_compare(void) 369static unsigned long hbtick_add_tick(unsigned long adj)
390{
391 return __hbird_read_compare();
392}
393
394static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
395{ 370{
396 unsigned long val; 371 unsigned long val;
397 372
398 val = __hbird_read_stick() + adj; 373 val = __hbird_read_stick() + adj;
399 __hbird_write_stick(val); 374 __hbird_write_stick(val);
400 375
401 val &= ~TICK_PRIV_BIT;
402 __hbird_write_compare(val + offset);
403
404 return val; 376 return val;
405} 377}
406 378
407static unsigned long hbtick_add_compare(unsigned long adj) 379static int hbtick_add_compare(unsigned long adj)
408{ 380{
409 unsigned long val = __hbird_read_compare() + adj; 381 unsigned long val = __hbird_read_stick();
382 unsigned long val2;
410 383
411 val &= ~TICK_PRIV_BIT; 384 val &= ~TICKCMP_IRQ_BIT;
385 val += adj;
412 __hbird_write_compare(val); 386 __hbird_write_compare(val);
413 387
414 return val; 388 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
389
390 return ((long)(val2 - val)) > 0L;
415} 391}
416 392
417static struct sparc64_tick_ops hbtick_operations __read_mostly = { 393static struct sparc64_tick_ops hbtick_operations __read_mostly = {
394 .name = "hbtick",
418 .init_tick = hbtick_init_tick, 395 .init_tick = hbtick_init_tick,
396 .disable_irq = hbtick_disable_irq,
419 .get_tick = hbtick_get_tick, 397 .get_tick = hbtick_get_tick,
420 .get_compare = hbtick_get_compare,
421 .add_tick = hbtick_add_tick, 398 .add_tick = hbtick_add_tick,
422 .add_compare = hbtick_add_compare, 399 .add_compare = hbtick_add_compare,
423 .softint_mask = 1UL << 0, 400 .softint_mask = 1UL << 0,
424}; 401};
425 402
426/* timer_interrupt() needs to keep up the real-time clock,
427 * as well as call the "do_timer()" routine every clocktick
428 *
429 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
430 * interrupts, one at level14 and one with softint bit 0.
431 */
432unsigned long timer_tick_offset __read_mostly;
433
434static unsigned long timer_ticks_per_nsec_quotient __read_mostly; 403static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
435 404
436#define TICK_SIZE (tick_nsec / 1000) 405#define TICK_SIZE (tick_nsec / 1000)
437 406
438static inline void timer_check_rtc(void) 407#define USEC_AFTER 500000
439{ 408#define USEC_BEFORE 500000
440 /* last time the cmos clock got updated */
441 static long last_rtc_update;
442
443 /* Determine when to update the Mostek clock. */
444 if (ntp_synced() &&
445 xtime.tv_sec > last_rtc_update + 660 &&
446 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
447 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
448 if (set_rtc_mmss(xtime.tv_sec) == 0)
449 last_rtc_update = xtime.tv_sec;
450 else
451 last_rtc_update = xtime.tv_sec - 600;
452 /* do it again in 60 s */
453 }
454}
455 409
456irqreturn_t timer_interrupt(int irq, void *dev_id) 410static void sync_cmos_clock(unsigned long dummy);
457{
458 unsigned long ticks, compare, pstate;
459 411
460 write_seqlock(&xtime_lock); 412static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);
461 413
462 do { 414static void sync_cmos_clock(unsigned long dummy)
463#ifndef CONFIG_SMP 415{
464 profile_tick(CPU_PROFILING); 416 struct timeval now, next;
465 update_process_times(user_mode(get_irq_regs())); 417 int fail = 1;
466#endif
467 do_timer(1);
468 418
469 /* Guarantee that the following sequences execute 419 /*
470 * uninterrupted. 420 * If we have an externally synchronized Linux clock, then update
421 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
422 * called as close as possible to 500 ms before the new second starts.
423 * This code is run on a timer. If the clock is set, that timer
424 * may not expire at the correct time. Thus, we adjust...
425 */
426 if (!ntp_synced())
427 /*
428 * Not synced, exit, do not restart a timer (if one is
429 * running, let it run out).
471 */ 430 */
472 __asm__ __volatile__("rdpr %%pstate, %0\n\t" 431 return;
473 "wrpr %0, %1, %%pstate"
474 : "=r" (pstate)
475 : "i" (PSTATE_IE));
476 432
477 compare = tick_ops->add_compare(timer_tick_offset); 433 do_gettimeofday(&now);
478 ticks = tick_ops->get_tick(); 434 if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
435 now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
436 fail = set_rtc_mmss(now.tv_sec);
479 437
480 /* Restore PSTATE_IE. */ 438 next.tv_usec = USEC_AFTER - now.tv_usec;
481 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" 439 if (next.tv_usec <= 0)
482 : /* no outputs */ 440 next.tv_usec += USEC_PER_SEC;
483 : "r" (pstate));
484 } while (time_after_eq(ticks, compare));
485 441
486 timer_check_rtc(); 442 if (!fail)
443 next.tv_sec = 659;
444 else
445 next.tv_sec = 0;
487 446
488 write_sequnlock(&xtime_lock); 447 if (next.tv_usec >= USEC_PER_SEC) {
489 448 next.tv_sec++;
490 return IRQ_HANDLED; 449 next.tv_usec -= USEC_PER_SEC;
450 }
451 mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
491} 452}
492 453
493#ifdef CONFIG_SMP 454void notify_arch_cmos_timer(void)
494void timer_tick_interrupt(struct pt_regs *regs)
495{ 455{
496 write_seqlock(&xtime_lock); 456 mod_timer(&sync_cmos_timer, jiffies + 1);
497
498 do_timer(1);
499
500 timer_check_rtc();
501
502 write_sequnlock(&xtime_lock);
503} 457}
504#endif
505 458
506/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */ 459/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
507static void __init kick_start_clock(void) 460static void __init kick_start_clock(void)
@@ -751,7 +704,7 @@ retry:
751 return -EOPNOTSUPP; 704 return -EOPNOTSUPP;
752} 705}
753 706
754static int __init clock_model_matches(char *model) 707static int __init clock_model_matches(const char *model)
755{ 708{
756 if (strcmp(model, "mk48t02") && 709 if (strcmp(model, "mk48t02") &&
757 strcmp(model, "mk48t08") && 710 strcmp(model, "mk48t08") &&
@@ -768,7 +721,7 @@ static int __init clock_model_matches(char *model)
768static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) 721static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
769{ 722{
770 struct device_node *dp = op->node; 723 struct device_node *dp = op->node;
771 char *model = of_get_property(dp, "model", NULL); 724 const char *model = of_get_property(dp, "model", NULL);
772 unsigned long size, flags; 725 unsigned long size, flags;
773 void __iomem *regs; 726 void __iomem *regs;
774 727
@@ -900,7 +853,6 @@ static unsigned long sparc64_init_timers(void)
900 prop = of_find_property(dp, "stick-frequency", NULL); 853 prop = of_find_property(dp, "stick-frequency", NULL);
901 } 854 }
902 clock = *(unsigned int *) prop->value; 855 clock = *(unsigned int *) prop->value;
903 timer_tick_offset = clock / HZ;
904 856
905#ifdef CONFIG_SMP 857#ifdef CONFIG_SMP
906 smp_tick_init(); 858 smp_tick_init();
@@ -909,26 +861,6 @@ static unsigned long sparc64_init_timers(void)
909 return clock; 861 return clock;
910} 862}
911 863
912static void sparc64_start_timers(void)
913{
914 unsigned long pstate;
915
916 /* Guarantee that the following sequences execute
917 * uninterrupted.
918 */
919 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
920 "wrpr %0, %1, %%pstate"
921 : "=r" (pstate)
922 : "i" (PSTATE_IE));
923
924 tick_ops->init_tick(timer_tick_offset);
925
926 /* Restore PSTATE_IE. */
927 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
928 : /* no outputs */
929 : "r" (pstate));
930}
931
932struct freq_table { 864struct freq_table {
933 unsigned long clock_tick_ref; 865 unsigned long clock_tick_ref;
934 unsigned int ref_freq; 866 unsigned int ref_freq;
@@ -975,29 +907,148 @@ static struct notifier_block sparc64_cpufreq_notifier_block = {
975 907
976#endif /* CONFIG_CPU_FREQ */ 908#endif /* CONFIG_CPU_FREQ */
977 909
978static struct time_interpolator sparc64_cpu_interpolator = { 910static int sparc64_next_event(unsigned long delta,
979 .source = TIME_SOURCE_CPU, 911 struct clock_event_device *evt)
980 .shift = 16, 912{
981 .mask = 0xffffffffffffffffLL 913 return tick_ops->add_compare(delta) ? -ETIME : 0;
914}
915
916static void sparc64_timer_setup(enum clock_event_mode mode,
917 struct clock_event_device *evt)
918{
919 switch (mode) {
920 case CLOCK_EVT_MODE_ONESHOT:
921 break;
922
923 case CLOCK_EVT_MODE_SHUTDOWN:
924 tick_ops->disable_irq();
925 break;
926
927 case CLOCK_EVT_MODE_PERIODIC:
928 case CLOCK_EVT_MODE_UNUSED:
929 WARN_ON(1);
930 break;
931 };
932}
933
934static struct clock_event_device sparc64_clockevent = {
935 .features = CLOCK_EVT_FEAT_ONESHOT,
936 .set_mode = sparc64_timer_setup,
937 .set_next_event = sparc64_next_event,
938 .rating = 100,
939 .shift = 30,
940 .irq = -1,
982}; 941};
942static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
983 943
984/* The quotient formula is taken from the IA64 port. */ 944void timer_interrupt(int irq, struct pt_regs *regs)
985#define SPARC64_NSEC_PER_CYC_SHIFT 10UL
986void __init time_init(void)
987{ 945{
988 unsigned long clock = sparc64_init_timers(); 946 struct pt_regs *old_regs = set_irq_regs(regs);
947 unsigned long tick_mask = tick_ops->softint_mask;
948 int cpu = smp_processor_id();
949 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
950
951 clear_softint(tick_mask);
952
953 irq_enter();
989 954
990 sparc64_cpu_interpolator.frequency = clock; 955 kstat_this_cpu.irqs[0]++;
991 register_time_interpolator(&sparc64_cpu_interpolator);
992 956
993 /* Now that the interpolator is registered, it is 957 if (unlikely(!evt->event_handler)) {
994 * safe to start the timer ticking. 958 printk(KERN_WARNING
959 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
960 } else
961 evt->event_handler(evt);
962
963 irq_exit();
964
965 set_irq_regs(old_regs);
966}
967
968void __devinit setup_sparc64_timer(void)
969{
970 struct clock_event_device *sevt;
971 unsigned long pstate;
972
973 /* Guarantee that the following sequences execute
974 * uninterrupted.
995 */ 975 */
996 sparc64_start_timers(); 976 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
977 "wrpr %0, %1, %%pstate"
978 : "=r" (pstate)
979 : "i" (PSTATE_IE));
980
981 tick_ops->init_tick();
982
983 /* Restore PSTATE_IE. */
984 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
985 : /* no outputs */
986 : "r" (pstate));
987
988 sevt = &__get_cpu_var(sparc64_events);
989
990 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
991 sevt->cpumask = cpumask_of_cpu(smp_processor_id());
992
993 clockevents_register_device(sevt);
994}
995
996#define SPARC64_NSEC_PER_CYC_SHIFT 32UL
997
998static struct clocksource clocksource_tick = {
999 .rating = 100,
1000 .mask = CLOCKSOURCE_MASK(64),
1001 .shift = 16,
1002 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
1003};
1004
1005static void __init setup_clockevent_multiplier(unsigned long hz)
1006{
1007 unsigned long mult, shift = 32;
1008
1009 while (1) {
1010 mult = div_sc(hz, NSEC_PER_SEC, shift);
1011 if (mult && (mult >> 32UL) == 0UL)
1012 break;
1013
1014 shift--;
1015 }
1016
1017 sparc64_clockevent.shift = shift;
1018 sparc64_clockevent.mult = mult;
1019}
1020
1021void __init time_init(void)
1022{
1023 unsigned long clock = sparc64_init_timers();
997 1024
998 timer_ticks_per_nsec_quotient = 1025 timer_ticks_per_nsec_quotient =
999 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) + 1026 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
1000 (clock / 2)) / clock); 1027
1028 clocksource_tick.name = tick_ops->name;
1029 clocksource_tick.mult =
1030 clocksource_hz2mult(clock,
1031 clocksource_tick.shift);
1032 clocksource_tick.read = tick_ops->get_tick;
1033
1034 printk("clocksource: mult[%x] shift[%d]\n",
1035 clocksource_tick.mult, clocksource_tick.shift);
1036
1037 clocksource_register(&clocksource_tick);
1038
1039 sparc64_clockevent.name = tick_ops->name;
1040
1041 setup_clockevent_multiplier(clock);
1042
1043 sparc64_clockevent.max_delta_ns =
1044 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent);
1045 sparc64_clockevent.min_delta_ns =
1046 clockevent_delta2ns(0xF, &sparc64_clockevent);
1047
1048 printk("clockevent: mult[%lx] shift[%d]\n",
1049 sparc64_clockevent.mult, sparc64_clockevent.shift);
1050
1051 setup_sparc64_timer();
1001 1052
1002#ifdef CONFIG_CPU_FREQ 1053#ifdef CONFIG_CPU_FREQ
1003 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, 1054 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
@@ -1126,10 +1177,6 @@ static int set_rtc_mmss(unsigned long nowtime)
1126#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */ 1177#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1127static unsigned char mini_rtc_status; /* bitmapped status byte. */ 1178static unsigned char mini_rtc_status; /* bitmapped status byte. */
1128 1179
1129/* months start at 0 now */
1130static unsigned char days_in_mo[] =
1131{31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1132
1133#define FEBRUARY 2 1180#define FEBRUARY 2
1134#define STARTOFTIME 1970 1181#define STARTOFTIME 1970
1135#define SECDAY 86400L 1182#define SECDAY 86400L
@@ -1278,8 +1325,7 @@ static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1278 1325
1279 case RTC_SET_TIME: /* Set the RTC */ 1326 case RTC_SET_TIME: /* Set the RTC */
1280 { 1327 {
1281 int year; 1328 int year, days;
1282 unsigned char leap_yr;
1283 1329
1284 if (!capable(CAP_SYS_TIME)) 1330 if (!capable(CAP_SYS_TIME))
1285 return -EACCES; 1331 return -EACCES;
@@ -1288,14 +1334,14 @@ static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1288 return -EFAULT; 1334 return -EFAULT;
1289 1335
1290 year = wtime.tm_year + 1900; 1336 year = wtime.tm_year + 1900;
1291 leap_yr = ((!(year % 4) && (year % 100)) || 1337 days = month_days[wtime.tm_mon] +
1292 !(year % 400)); 1338 ((wtime.tm_mon == 1) && leapyear(year));
1293 1339
1294 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1)) 1340 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1341 (wtime.tm_mday < 1))
1295 return -EINVAL; 1342 return -EINVAL;
1296 1343
1297 if (wtime.tm_mday < 0 || wtime.tm_mday > 1344 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1298 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1299 return -EINVAL; 1345 return -EINVAL;
1300 1346
1301 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 || 1347 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc64/kernel/ttable.S
index d7d2a8bdc66e..7575aa371da8 100644
--- a/arch/sparc64/kernel/ttable.S
+++ b/arch/sparc64/kernel/ttable.S
@@ -60,11 +60,7 @@ tl0_irq4: BTRAP(0x44)
60tl0_irq5: TRAP_IRQ(handler_irq, 5) 60tl0_irq5: TRAP_IRQ(handler_irq, 5)
61tl0_irq6: BTRAP(0x46) BTRAP(0x47) BTRAP(0x48) BTRAP(0x49) 61tl0_irq6: BTRAP(0x46) BTRAP(0x47) BTRAP(0x48) BTRAP(0x49)
62tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d) 62tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
63#ifndef CONFIG_SMP 63tl0_irq14: TRAP_IRQ(timer_interrupt, 14)
64tl0_irq14: TRAP_IRQ(timer_irq, 14)
65#else
66tl0_irq14: TICK_SMP_IRQ
67#endif
68tl0_irq15: TRAP_IRQ(handler_irq, 15) 64tl0_irq15: TRAP_IRQ(handler_irq, 15)
69tl0_resv050: BTRAP(0x50) BTRAP(0x51) BTRAP(0x52) BTRAP(0x53) BTRAP(0x54) BTRAP(0x55) 65tl0_resv050: BTRAP(0x50) BTRAP(0x51) BTRAP(0x52) BTRAP(0x53) BTRAP(0x54) BTRAP(0x55)
70tl0_resv056: BTRAP(0x56) BTRAP(0x57) BTRAP(0x58) BTRAP(0x59) BTRAP(0x5a) BTRAP(0x5b) 66tl0_resv056: BTRAP(0x56) BTRAP(0x57) BTRAP(0x58) BTRAP(0x59) BTRAP(0x5a) BTRAP(0x5b)
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index f146071a4b2a..cafadcbcdf38 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -122,24 +122,19 @@ static void __init read_obp_memory(const char *property,
122 size = 0UL; 122 size = 0UL;
123 base = new_base; 123 base = new_base;
124 } 124 }
125 regs[i].phys_addr = base; 125 if (size == 0UL) {
126 regs[i].reg_size = size; 126 /* If it is empty, simply get rid of it.
127 } 127 * This simplifies the logic of the other
128 128 * functions that process these arrays.
129 for (i = 0; i < ents; i++) { 129 */
130 if (regs[i].reg_size == 0UL) { 130 memmove(&regs[i], &regs[i + 1],
131 int j; 131 (ents - i - 1) * sizeof(regs[0]));
132
133 for (j = i; j < ents - 1; j++) {
134 regs[j].phys_addr =
135 regs[j+1].phys_addr;
136 regs[j].reg_size =
137 regs[j+1].reg_size;
138 }
139
140 ents--;
141 i--; 132 i--;
133 ents--;
134 continue;
142 } 135 }
136 regs[i].phys_addr = base;
137 regs[i].reg_size = size;
143 } 138 }
144 139
145 *num_ents = ents; 140 *num_ents = ents;
@@ -154,15 +149,6 @@ unsigned long *sparc64_valid_addr_bitmap __read_mostly;
154unsigned long kern_base __read_mostly; 149unsigned long kern_base __read_mostly;
155unsigned long kern_size __read_mostly; 150unsigned long kern_size __read_mostly;
156 151
157/* get_new_mmu_context() uses "cache + 1". */
158DEFINE_SPINLOCK(ctx_alloc_lock);
159unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
160#define CTX_BMAP_SLOTS (1UL << (CTX_NR_BITS - 6))
161unsigned long mmu_context_bmap[CTX_BMAP_SLOTS];
162
163/* References to special section boundaries */
164extern char _start[], _end[];
165
166/* Initial ramdisk setup */ 152/* Initial ramdisk setup */
167extern unsigned long sparc_ramdisk_image64; 153extern unsigned long sparc_ramdisk_image64;
168extern unsigned int sparc_ramdisk_image; 154extern unsigned int sparc_ramdisk_image;
@@ -406,19 +392,70 @@ void __kprobes flush_icache_range(unsigned long start, unsigned long end)
406 if (tlb_type == spitfire) { 392 if (tlb_type == spitfire) {
407 unsigned long kaddr; 393 unsigned long kaddr;
408 394
409 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE) 395 /* This code only runs on Spitfire cpus so this is
410 __flush_icache_page(__get_phys(kaddr)); 396 * why we can assume _PAGE_PADDR_4U.
397 */
398 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE) {
399 unsigned long paddr, mask = _PAGE_PADDR_4U;
400
401 if (kaddr >= PAGE_OFFSET)
402 paddr = kaddr & mask;
403 else {
404 pgd_t *pgdp = pgd_offset_k(kaddr);
405 pud_t *pudp = pud_offset(pgdp, kaddr);
406 pmd_t *pmdp = pmd_offset(pudp, kaddr);
407 pte_t *ptep = pte_offset_kernel(pmdp, kaddr);
408
409 paddr = pte_val(*ptep) & mask;
410 }
411 __flush_icache_page(paddr);
412 }
411 } 413 }
412} 414}
413 415
414void show_mem(void) 416void show_mem(void)
415{ 417{
416 printk("Mem-info:\n"); 418 unsigned long total = 0, reserved = 0;
419 unsigned long shared = 0, cached = 0;
420 pg_data_t *pgdat;
421
422 printk(KERN_INFO "Mem-info:\n");
417 show_free_areas(); 423 show_free_areas();
418 printk("Free swap: %6ldkB\n", 424 printk(KERN_INFO "Free swap: %6ldkB\n",
419 nr_swap_pages << (PAGE_SHIFT-10)); 425 nr_swap_pages << (PAGE_SHIFT-10));
420 printk("%ld pages of RAM\n", num_physpages); 426 for_each_online_pgdat(pgdat) {
421 printk("%lu free pages\n", nr_free_pages()); 427 unsigned long i, flags;
428
429 pgdat_resize_lock(pgdat, &flags);
430 for (i = 0; i < pgdat->node_spanned_pages; i++) {
431 struct page *page = pgdat_page_nr(pgdat, i);
432 total++;
433 if (PageReserved(page))
434 reserved++;
435 else if (PageSwapCache(page))
436 cached++;
437 else if (page_count(page))
438 shared += page_count(page) - 1;
439 }
440 pgdat_resize_unlock(pgdat, &flags);
441 }
442
443 printk(KERN_INFO "%lu pages of RAM\n", total);
444 printk(KERN_INFO "%lu reserved pages\n", reserved);
445 printk(KERN_INFO "%lu pages shared\n", shared);
446 printk(KERN_INFO "%lu pages swap cached\n", cached);
447
448 printk(KERN_INFO "%lu pages dirty\n",
449 global_page_state(NR_FILE_DIRTY));
450 printk(KERN_INFO "%lu pages writeback\n",
451 global_page_state(NR_WRITEBACK));
452 printk(KERN_INFO "%lu pages mapped\n",
453 global_page_state(NR_FILE_MAPPED));
454 printk(KERN_INFO "%lu pages slab\n",
455 global_page_state(NR_SLAB_RECLAIMABLE) +
456 global_page_state(NR_SLAB_UNRECLAIMABLE));
457 printk(KERN_INFO "%lu pages pagetables\n",
458 global_page_state(NR_PAGETABLE));
422} 459}
423 460
424void mmu_info(struct seq_file *m) 461void mmu_info(struct seq_file *m)
@@ -658,6 +695,13 @@ void __flush_dcache_range(unsigned long start, unsigned long end)
658} 695}
659#endif /* DCACHE_ALIASING_POSSIBLE */ 696#endif /* DCACHE_ALIASING_POSSIBLE */
660 697
698/* get_new_mmu_context() uses "cache + 1". */
699DEFINE_SPINLOCK(ctx_alloc_lock);
700unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
701#define MAX_CTX_NR (1UL << CTX_NR_BITS)
702#define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR)
703DECLARE_BITMAP(mmu_context_bmap, MAX_CTX_NR);
704
661/* Caller does TLB context flushing on local CPU if necessary. 705/* Caller does TLB context flushing on local CPU if necessary.
662 * The caller also ensures that CTX_VALID(mm->context) is false. 706 * The caller also ensures that CTX_VALID(mm->context) is false.
663 * 707 *
@@ -717,95 +761,6 @@ out:
717 smp_new_mmu_context_version(); 761 smp_new_mmu_context_version();
718} 762}
719 763
720void sparc_ultra_dump_itlb(void)
721{
722 int slot;
723
724 if (tlb_type == spitfire) {
725 printk ("Contents of itlb: ");
726 for (slot = 0; slot < 14; slot++) printk (" ");
727 printk ("%2x:%016lx,%016lx\n",
728 0,
729 spitfire_get_itlb_tag(0), spitfire_get_itlb_data(0));
730 for (slot = 1; slot < 64; slot+=3) {
731 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx %2x:%016lx,%016lx\n",
732 slot,
733 spitfire_get_itlb_tag(slot), spitfire_get_itlb_data(slot),
734 slot+1,
735 spitfire_get_itlb_tag(slot+1), spitfire_get_itlb_data(slot+1),
736 slot+2,
737 spitfire_get_itlb_tag(slot+2), spitfire_get_itlb_data(slot+2));
738 }
739 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
740 printk ("Contents of itlb0:\n");
741 for (slot = 0; slot < 16; slot+=2) {
742 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
743 slot,
744 cheetah_get_litlb_tag(slot), cheetah_get_litlb_data(slot),
745 slot+1,
746 cheetah_get_litlb_tag(slot+1), cheetah_get_litlb_data(slot+1));
747 }
748 printk ("Contents of itlb2:\n");
749 for (slot = 0; slot < 128; slot+=2) {
750 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
751 slot,
752 cheetah_get_itlb_tag(slot), cheetah_get_itlb_data(slot),
753 slot+1,
754 cheetah_get_itlb_tag(slot+1), cheetah_get_itlb_data(slot+1));
755 }
756 }
757}
758
759void sparc_ultra_dump_dtlb(void)
760{
761 int slot;
762
763 if (tlb_type == spitfire) {
764 printk ("Contents of dtlb: ");
765 for (slot = 0; slot < 14; slot++) printk (" ");
766 printk ("%2x:%016lx,%016lx\n", 0,
767 spitfire_get_dtlb_tag(0), spitfire_get_dtlb_data(0));
768 for (slot = 1; slot < 64; slot+=3) {
769 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx %2x:%016lx,%016lx\n",
770 slot,
771 spitfire_get_dtlb_tag(slot), spitfire_get_dtlb_data(slot),
772 slot+1,
773 spitfire_get_dtlb_tag(slot+1), spitfire_get_dtlb_data(slot+1),
774 slot+2,
775 spitfire_get_dtlb_tag(slot+2), spitfire_get_dtlb_data(slot+2));
776 }
777 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
778 printk ("Contents of dtlb0:\n");
779 for (slot = 0; slot < 16; slot+=2) {
780 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
781 slot,
782 cheetah_get_ldtlb_tag(slot), cheetah_get_ldtlb_data(slot),
783 slot+1,
784 cheetah_get_ldtlb_tag(slot+1), cheetah_get_ldtlb_data(slot+1));
785 }
786 printk ("Contents of dtlb2:\n");
787 for (slot = 0; slot < 512; slot+=2) {
788 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
789 slot,
790 cheetah_get_dtlb_tag(slot, 2), cheetah_get_dtlb_data(slot, 2),
791 slot+1,
792 cheetah_get_dtlb_tag(slot+1, 2), cheetah_get_dtlb_data(slot+1, 2));
793 }
794 if (tlb_type == cheetah_plus) {
795 printk ("Contents of dtlb3:\n");
796 for (slot = 0; slot < 512; slot+=2) {
797 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
798 slot,
799 cheetah_get_dtlb_tag(slot, 3), cheetah_get_dtlb_data(slot, 3),
800 slot+1,
801 cheetah_get_dtlb_tag(slot+1, 3), cheetah_get_dtlb_data(slot+1, 3));
802 }
803 }
804 }
805}
806
807extern unsigned long cmdline_memory_size;
808
809/* Find a free area for the bootmem map, avoiding the kernel image 764/* Find a free area for the bootmem map, avoiding the kernel image
810 * and the initial ramdisk. 765 * and the initial ramdisk.
811 */ 766 */
@@ -815,8 +770,8 @@ static unsigned long __init choose_bootmap_pfn(unsigned long start_pfn,
815 unsigned long avoid_start, avoid_end, bootmap_size; 770 unsigned long avoid_start, avoid_end, bootmap_size;
816 int i; 771 int i;
817 772
818 bootmap_size = ((end_pfn - start_pfn) + 7) / 8; 773 bootmap_size = bootmem_bootmap_pages(end_pfn - start_pfn);
819 bootmap_size = ALIGN(bootmap_size, sizeof(long)); 774 bootmap_size <<= PAGE_SHIFT;
820 775
821 avoid_start = avoid_end = 0; 776 avoid_start = avoid_end = 0;
822#ifdef CONFIG_BLK_DEV_INITRD 777#ifdef CONFIG_BLK_DEV_INITRD
@@ -983,6 +938,20 @@ static void __init trim_pavail(unsigned long *cur_size_p,
983 } 938 }
984} 939}
985 940
941/* About pages_avail, this is the value we will use to calculate
942 * the zholes_size[] argument given to free_area_init_node(). The
943 * page allocator uses this to calculate nr_kernel_pages,
944 * nr_all_pages and zone->present_pages. On NUMA it is used
945 * to calculate zone->min_unmapped_pages and zone->min_slab_pages.
946 *
947 * So this number should really be set to what the page allocator
948 * actually ends up with. This means:
949 * 1) It should include bootmem map pages, we'll release those.
950 * 2) It should not include the kernel image, except for the
951 * __init sections which we will also release.
952 * 3) It should include the initrd image, since we'll release
953 * that too.
954 */
986static unsigned long __init bootmem_init(unsigned long *pages_avail, 955static unsigned long __init bootmem_init(unsigned long *pages_avail,
987 unsigned long phys_base) 956 unsigned long phys_base)
988{ 957{
@@ -1069,7 +1038,6 @@ static unsigned long __init bootmem_init(unsigned long *pages_avail,
1069 initrd_start, initrd_end); 1038 initrd_start, initrd_end);
1070#endif 1039#endif
1071 reserve_bootmem(initrd_start, size); 1040 reserve_bootmem(initrd_start, size);
1072 *pages_avail -= PAGE_ALIGN(size) >> PAGE_SHIFT;
1073 1041
1074 initrd_start += PAGE_OFFSET; 1042 initrd_start += PAGE_OFFSET;
1075 initrd_end += PAGE_OFFSET; 1043 initrd_end += PAGE_OFFSET;
@@ -1082,6 +1050,11 @@ static unsigned long __init bootmem_init(unsigned long *pages_avail,
1082 reserve_bootmem(kern_base, kern_size); 1050 reserve_bootmem(kern_base, kern_size);
1083 *pages_avail -= PAGE_ALIGN(kern_size) >> PAGE_SHIFT; 1051 *pages_avail -= PAGE_ALIGN(kern_size) >> PAGE_SHIFT;
1084 1052
1053 /* Add back in the initmem pages. */
1054 size = ((unsigned long)(__init_end) & PAGE_MASK) -
1055 PAGE_ALIGN((unsigned long)__init_begin);
1056 *pages_avail += size >> PAGE_SHIFT;
1057
1085 /* Reserve the bootmem map. We do not account for it 1058 /* Reserve the bootmem map. We do not account for it
1086 * in pages_avail because we will release that memory 1059 * in pages_avail because we will release that memory
1087 * in free_all_bootmem. 1060 * in free_all_bootmem.
@@ -1092,7 +1065,6 @@ static unsigned long __init bootmem_init(unsigned long *pages_avail,
1092 (bootmap_pfn << PAGE_SHIFT), size); 1065 (bootmap_pfn << PAGE_SHIFT), size);
1093#endif 1066#endif
1094 reserve_bootmem((bootmap_pfn << PAGE_SHIFT), size); 1067 reserve_bootmem((bootmap_pfn << PAGE_SHIFT), size);
1095 *pages_avail -= PAGE_ALIGN(size) >> PAGE_SHIFT;
1096 1068
1097 for (i = 0; i < pavail_ents; i++) { 1069 for (i = 0; i < pavail_ents; i++) {
1098 unsigned long start_pfn, end_pfn; 1070 unsigned long start_pfn, end_pfn;
@@ -1584,6 +1556,10 @@ void __init mem_init(void)
1584#ifdef CONFIG_DEBUG_BOOTMEM 1556#ifdef CONFIG_DEBUG_BOOTMEM
1585 prom_printf("mem_init: Calling free_all_bootmem().\n"); 1557 prom_printf("mem_init: Calling free_all_bootmem().\n");
1586#endif 1558#endif
1559
1560 /* We subtract one to account for the mem_map_zero page
1561 * allocated below.
1562 */
1587 totalram_pages = num_physpages = free_all_bootmem() - 1; 1563 totalram_pages = num_physpages = free_all_bootmem() - 1;
1588 1564
1589 /* 1565 /*
@@ -1883,62 +1859,6 @@ static unsigned long kern_large_tte(unsigned long paddr)
1883 return val | paddr; 1859 return val | paddr;
1884} 1860}
1885 1861
1886/*
1887 * Translate PROM's mapping we capture at boot time into physical address.
1888 * The second parameter is only set from prom_callback() invocations.
1889 */
1890unsigned long prom_virt_to_phys(unsigned long promva, int *error)
1891{
1892 unsigned long mask;
1893 int i;
1894
1895 mask = _PAGE_PADDR_4U;
1896 if (tlb_type == hypervisor)
1897 mask = _PAGE_PADDR_4V;
1898
1899 for (i = 0; i < prom_trans_ents; i++) {
1900 struct linux_prom_translation *p = &prom_trans[i];
1901
1902 if (promva >= p->virt &&
1903 promva < (p->virt + p->size)) {
1904 unsigned long base = p->data & mask;
1905
1906 if (error)
1907 *error = 0;
1908 return base + (promva & (8192 - 1));
1909 }
1910 }
1911 if (error)
1912 *error = 1;
1913 return 0UL;
1914}
1915
1916/* XXX We should kill off this ugly thing at so me point. XXX */
1917unsigned long sun4u_get_pte(unsigned long addr)
1918{
1919 pgd_t *pgdp;
1920 pud_t *pudp;
1921 pmd_t *pmdp;
1922 pte_t *ptep;
1923 unsigned long mask = _PAGE_PADDR_4U;
1924
1925 if (tlb_type == hypervisor)
1926 mask = _PAGE_PADDR_4V;
1927
1928 if (addr >= PAGE_OFFSET)
1929 return addr & mask;
1930
1931 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
1932 return prom_virt_to_phys(addr, NULL);
1933
1934 pgdp = pgd_offset_k(addr);
1935 pudp = pud_offset(pgdp, addr);
1936 pmdp = pmd_offset(pudp, addr);
1937 ptep = pte_offset_kernel(pmdp, addr);
1938
1939 return pte_val(*ptep) & mask;
1940}
1941
1942/* If not locked, zap it. */ 1862/* If not locked, zap it. */
1943void __flush_tlb_all(void) 1863void __flush_tlb_all(void)
1944{ 1864{
diff --git a/arch/sparc64/solaris/misc.c b/arch/sparc64/solaris/misc.c
index 9fcaad6dd11f..542c808ec2c8 100644
--- a/arch/sparc64/solaris/misc.c
+++ b/arch/sparc64/solaris/misc.c
@@ -224,7 +224,8 @@ static char *serial(char *buffer, int sz)
224 224
225 *buffer = 0; 225 *buffer = 0;
226 if (dp) { 226 if (dp) {
227 char *val = of_get_property(dp, "system-board-serial#", &len); 227 const char *val =
228 of_get_property(dp, "system-board-serial#", &len);
228 229
229 if (val && len > 0) { 230 if (val && len > 0) {
230 if (len > sz) 231 if (len > sz)
diff --git a/arch/um/drivers/daemon_kern.c b/arch/um/drivers/daemon_kern.c
index 9c2e7a758f21..adeece11e596 100644
--- a/arch/um/drivers/daemon_kern.c
+++ b/arch/um/drivers/daemon_kern.c
@@ -46,7 +46,7 @@ static int daemon_read(int fd, struct sk_buff **skb,
46{ 46{
47 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER); 47 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER);
48 if(*skb == NULL) return(-ENOMEM); 48 if(*skb == NULL) return(-ENOMEM);
49 return(net_recvfrom(fd, (*skb)->mac.raw, 49 return(net_recvfrom(fd, skb_mac_header(*skb),
50 (*skb)->dev->mtu + ETH_HEADER_OTHER)); 50 (*skb)->dev->mtu + ETH_HEADER_OTHER));
51} 51}
52 52
diff --git a/arch/um/drivers/mcast_kern.c b/arch/um/drivers/mcast_kern.c
index 52ccb7b53cd2..e6b8e0dd72a8 100644
--- a/arch/um/drivers/mcast_kern.c
+++ b/arch/um/drivers/mcast_kern.c
@@ -50,7 +50,7 @@ static int mcast_read(int fd, struct sk_buff **skb, struct uml_net_private *lp)
50{ 50{
51 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER); 51 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER);
52 if(*skb == NULL) return(-ENOMEM); 52 if(*skb == NULL) return(-ENOMEM);
53 return(net_recvfrom(fd, (*skb)->mac.raw, 53 return(net_recvfrom(fd, skb_mac_header(*skb),
54 (*skb)->dev->mtu + ETH_HEADER_OTHER)); 54 (*skb)->dev->mtu + ETH_HEADER_OTHER));
55} 55}
56 56
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index 04e31f86c10a..859303730b2f 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -55,7 +55,7 @@ static int uml_net_rx(struct net_device *dev)
55 55
56 skb->dev = dev; 56 skb->dev = dev;
57 skb_put(skb, dev->mtu); 57 skb_put(skb, dev->mtu);
58 skb->mac.raw = skb->data; 58 skb_reset_mac_header(skb);
59 pkt_len = (*lp->read)(lp->fd, &skb, lp); 59 pkt_len = (*lp->read)(lp->fd, &skb, lp);
60 60
61 if (pkt_len > 0) { 61 if (pkt_len > 0) {
diff --git a/arch/um/drivers/pcap_kern.c b/arch/um/drivers/pcap_kern.c
index e67362acf0e7..948849343ca4 100644
--- a/arch/um/drivers/pcap_kern.c
+++ b/arch/um/drivers/pcap_kern.c
@@ -36,7 +36,7 @@ static int pcap_read(int fd, struct sk_buff **skb,
36{ 36{
37 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER); 37 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER);
38 if(*skb == NULL) return(-ENOMEM); 38 if(*skb == NULL) return(-ENOMEM);
39 return(pcap_user_read(fd, (*skb)->mac.raw, 39 return(pcap_user_read(fd, skb_mac_header(*skb),
40 (*skb)->dev->mtu + ETH_HEADER_OTHER, 40 (*skb)->dev->mtu + ETH_HEADER_OTHER,
41 (struct pcap_data *) &lp->user)); 41 (struct pcap_data *) &lp->user));
42} 42}
diff --git a/arch/um/drivers/slip_kern.c b/arch/um/drivers/slip_kern.c
index 25634bd1f585..125c44f77638 100644
--- a/arch/um/drivers/slip_kern.c
+++ b/arch/um/drivers/slip_kern.c
@@ -49,7 +49,7 @@ static unsigned short slip_protocol(struct sk_buff *skbuff)
49static int slip_read(int fd, struct sk_buff **skb, 49static int slip_read(int fd, struct sk_buff **skb,
50 struct uml_net_private *lp) 50 struct uml_net_private *lp)
51{ 51{
52 return(slip_user_read(fd, (*skb)->mac.raw, (*skb)->dev->mtu, 52 return(slip_user_read(fd, skb_mac_header(*skb), (*skb)->dev->mtu,
53 (struct slip_data *) &lp->user)); 53 (struct slip_data *) &lp->user));
54} 54}
55 55
diff --git a/arch/um/drivers/slirp_kern.c b/arch/um/drivers/slirp_kern.c
index b3ed8fb874ab..0a0324a6d290 100644
--- a/arch/um/drivers/slirp_kern.c
+++ b/arch/um/drivers/slirp_kern.c
@@ -53,7 +53,7 @@ static unsigned short slirp_protocol(struct sk_buff *skbuff)
53static int slirp_read(int fd, struct sk_buff **skb, 53static int slirp_read(int fd, struct sk_buff **skb,
54 struct uml_net_private *lp) 54 struct uml_net_private *lp)
55{ 55{
56 return(slirp_user_read(fd, (*skb)->mac.raw, (*skb)->dev->mtu, 56 return(slirp_user_read(fd, skb_mac_header(*skb), (*skb)->dev->mtu,
57 (struct slirp_data *) &lp->user)); 57 (struct slirp_data *) &lp->user));
58} 58}
59 59
diff --git a/arch/um/os-Linux/drivers/ethertap_kern.c b/arch/um/os-Linux/drivers/ethertap_kern.c
index 70541821775f..12689141414d 100644
--- a/arch/um/os-Linux/drivers/ethertap_kern.c
+++ b/arch/um/os-Linux/drivers/ethertap_kern.c
@@ -43,7 +43,7 @@ static int etap_read(int fd, struct sk_buff **skb, struct uml_net_private *lp)
43 43
44 *skb = ether_adjust_skb(*skb, ETH_HEADER_ETHERTAP); 44 *skb = ether_adjust_skb(*skb, ETH_HEADER_ETHERTAP);
45 if(*skb == NULL) return(-ENOMEM); 45 if(*skb == NULL) return(-ENOMEM);
46 len = net_recvfrom(fd, (*skb)->mac.raw, 46 len = net_recvfrom(fd, skb_mac_header(*skb),
47 (*skb)->dev->mtu + 2 * ETH_HEADER_ETHERTAP); 47 (*skb)->dev->mtu + 2 * ETH_HEADER_ETHERTAP);
48 if(len <= 0) return(len); 48 if(len <= 0) return(len);
49 skb_pull(*skb, 2); 49 skb_pull(*skb, 2);
diff --git a/arch/um/os-Linux/drivers/tuntap_kern.c b/arch/um/os-Linux/drivers/tuntap_kern.c
index 76570a2c25c3..f1714e7fb1d0 100644
--- a/arch/um/os-Linux/drivers/tuntap_kern.c
+++ b/arch/um/os-Linux/drivers/tuntap_kern.c
@@ -43,7 +43,7 @@ static int tuntap_read(int fd, struct sk_buff **skb,
43{ 43{
44 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER); 44 *skb = ether_adjust_skb(*skb, ETH_HEADER_OTHER);
45 if(*skb == NULL) return(-ENOMEM); 45 if(*skb == NULL) return(-ENOMEM);
46 return(net_read(fd, (*skb)->mac.raw, 46 return(net_read(fd, skb_mac_header(*skb),
47 (*skb)->dev->mtu + ETH_HEADER_OTHER)); 47 (*skb)->dev->mtu + ETH_HEADER_OTHER));
48} 48}
49 49
diff --git a/arch/xtensa/lib/Makefile b/arch/xtensa/lib/Makefile
index ed935b58e8a4..6c4fdd86acd8 100644
--- a/arch/xtensa/lib/Makefile
+++ b/arch/xtensa/lib/Makefile
@@ -2,6 +2,6 @@
2# Makefile for Xtensa-specific library files. 2# Makefile for Xtensa-specific library files.
3# 3#
4 4
5lib-y += memcopy.o memset.o checksum.o strcasecmp.o \ 5lib-y += memcopy.o memset.o checksum.o \
6 usercopy.o strncpy_user.o strnlen_user.o 6 usercopy.o strncpy_user.o strnlen_user.o
7lib-$(CONFIG_PCI) += pci-auto.o 7lib-$(CONFIG_PCI) += pci-auto.o
diff --git a/arch/xtensa/lib/strcasecmp.c b/arch/xtensa/lib/strcasecmp.c
deleted file mode 100644
index 165b2d6effa5..000000000000
--- a/arch/xtensa/lib/strcasecmp.c
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * linux/arch/xtensa/lib/strcasecmp.c
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2002 Tensilica Inc.
9 */
10
11#include <linux/string.h>
12
13
14/* We handle nothing here except the C locale. Since this is used in
15 only one place, on strings known to contain only 7 bit ASCII, this
16 is ok. */
17
18int strcasecmp(const char *a, const char *b)
19{
20 int ca, cb;
21
22 do {
23 ca = *a++ & 0xff;
24 cb = *b++ & 0xff;
25 if (ca >= 'A' && ca <= 'Z')
26 ca += 'a' - 'A';
27 if (cb >= 'A' && cb <= 'Z')
28 cb += 'a' - 'A';
29 } while (ca == cb && ca != '\0');
30
31 return ca - cb;
32}
diff --git a/arch/xtensa/platform-iss/network.c b/arch/xtensa/platform-iss/network.c
index 8ebfc8761229..ab05bff40104 100644
--- a/arch/xtensa/platform-iss/network.c
+++ b/arch/xtensa/platform-iss/network.c
@@ -386,7 +386,7 @@ static int iss_net_rx(struct net_device *dev)
386 /* Setup skb */ 386 /* Setup skb */
387 387
388 skb->dev = dev; 388 skb->dev = dev;
389 skb->mac.raw = skb->data; 389 skb_reset_mac_header(skb);
390 pkt_len = lp->tp.read(lp, &skb); 390 pkt_len = lp->tp.read(lp, &skb);
391 skb_put(skb, pkt_len); 391 skb_put(skb, pkt_len);
392 392
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-01 03:55:14 -0500