diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2008-05-10 15:42:14 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-05-12 15:27:54 -0400 |
commit | 7c4728f4a865067d96fb84f1d9c65e0ccd1f355d (patch) | |
tree | f6d30934b37337238d24a953bfbcaacd3b8f3e81 /arch | |
parent | e8aa4667baf74dfd85fbaab86861465acb811085 (diff) |
x86: print info about available HPET quirk
We have a lot of HPET quirks available which might force enable HPET
even when the BIOS does not enable it. Some of those quirks depend on
the command line option "hpet=force".
Andrew pointed out that hoping that the user will find out about this
boot option is not really helpful.
Emit a kernel info which informs the user about the "hpet=force" boot
option when we enter a quirk which depends on this option and the user
did not provide it.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/quirks.c | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index 5fe6bd5cc4c7..ddbf34d16a01 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c | |||
@@ -175,6 +175,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7, | |||
175 | 175 | ||
176 | static struct pci_dev *cached_dev; | 176 | static struct pci_dev *cached_dev; |
177 | 177 | ||
178 | static void hpet_print_force_info(void) | ||
179 | { | ||
180 | printk(KERN_INFO "HPET not enabled in BIOS. " | ||
181 | "You might try hpet=force boot option\n"); | ||
182 | } | ||
183 | |||
178 | static void old_ich_force_hpet_resume(void) | 184 | static void old_ich_force_hpet_resume(void) |
179 | { | 185 | { |
180 | u32 val; | 186 | u32 val; |
@@ -254,6 +260,8 @@ static void old_ich_force_enable_hpet_user(struct pci_dev *dev) | |||
254 | { | 260 | { |
255 | if (hpet_force_user) | 261 | if (hpet_force_user) |
256 | old_ich_force_enable_hpet(dev); | 262 | old_ich_force_enable_hpet(dev); |
263 | else | ||
264 | hpet_print_force_info(); | ||
257 | } | 265 | } |
258 | 266 | ||
259 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, | 267 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, |
@@ -291,8 +299,13 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev) | |||
291 | { | 299 | { |
292 | u32 uninitialized_var(val); | 300 | u32 uninitialized_var(val); |
293 | 301 | ||
294 | if (!hpet_force_user || hpet_address || force_hpet_address) | 302 | if (hpet_address || force_hpet_address) |
303 | return; | ||
304 | |||
305 | if (!hpet_force_user) { | ||
306 | hpet_print_force_info(); | ||
295 | return; | 307 | return; |
308 | } | ||
296 | 309 | ||
297 | pci_read_config_dword(dev, 0x68, &val); | 310 | pci_read_config_dword(dev, 0x68, &val); |
298 | /* | 311 | /* |
@@ -341,8 +354,13 @@ static void ati_force_enable_hpet(struct pci_dev *dev) | |||
341 | { | 354 | { |
342 | u32 uninitialized_var(val); | 355 | u32 uninitialized_var(val); |
343 | 356 | ||
344 | if (!hpet_force_user || hpet_address || force_hpet_address) | 357 | if (hpet_address || force_hpet_address) |
358 | return; | ||
359 | |||
360 | if (!hpet_force_user) { | ||
361 | hpet_print_force_info(); | ||
345 | return; | 362 | return; |
363 | } | ||
346 | 364 | ||
347 | pci_write_config_dword(dev, 0x14, 0xfed00000); | 365 | pci_write_config_dword(dev, 0x14, 0xfed00000); |
348 | pci_read_config_dword(dev, 0x14, &val); | 366 | pci_read_config_dword(dev, 0x14, &val); |
@@ -369,8 +387,13 @@ static void nvidia_force_enable_hpet(struct pci_dev *dev) | |||
369 | { | 387 | { |
370 | u32 uninitialized_var(val); | 388 | u32 uninitialized_var(val); |
371 | 389 | ||
372 | if (!hpet_force_user || hpet_address || force_hpet_address) | 390 | if (hpet_address || force_hpet_address) |
391 | return; | ||
392 | |||
393 | if (!hpet_force_user) { | ||
394 | hpet_print_force_info(); | ||
373 | return; | 395 | return; |
396 | } | ||
374 | 397 | ||
375 | pci_write_config_dword(dev, 0x44, 0xfed00001); | 398 | pci_write_config_dword(dev, 0x44, 0xfed00001); |
376 | pci_read_config_dword(dev, 0x44, &val); | 399 | pci_read_config_dword(dev, 0x44, &val); |