diff options
author | Steve Glendinning <steve.glendinning@smsc.com> | 2008-11-23 09:27:21 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-12-22 04:42:54 -0500 |
commit | 8085ac753164f45fd23603e7cad85a4c985cbf75 (patch) | |
tree | f150a3649ab9424549796346caf9eb7f032449bd /arch | |
parent | 0d5bbe0bc2583c4dc06ea00adccf07c3acd1481d (diff) |
sh: Add platform-specific constants for SH7709
I'm using these constants in support of an in-house development board,
and thought they may be useful to other users of SH7709.
Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/gpio.h | 14 | ||||
-rw-r--r-- | arch/sh/include/mach-se/mach/se.h | 18 |
2 files changed, 32 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh3/cpu/gpio.h b/arch/sh/include/cpu-sh3/cpu/gpio.h index 4e53eb314b8f..9a22b882f3dc 100644 --- a/arch/sh/include/cpu-sh3/cpu/gpio.h +++ b/arch/sh/include/cpu-sh3/cpu/gpio.h | |||
@@ -62,6 +62,20 @@ | |||
62 | #define PORT_PSELC 0xA4050128UL | 62 | #define PORT_PSELC 0xA4050128UL |
63 | #define PORT_PSELD 0xA405012AUL | 63 | #define PORT_PSELD 0xA405012AUL |
64 | 64 | ||
65 | #elif defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
66 | |||
67 | /* Control registers */ | ||
68 | #define PORT_PACR 0xa4000100UL | ||
69 | #define PORT_PBCR 0xa4000102UL | ||
70 | #define PORT_PCCR 0xa4000104UL | ||
71 | #define PORT_PFCR 0xa400010aUL | ||
72 | |||
73 | /* Data registers */ | ||
74 | #define PORT_PADR 0xa4000120UL | ||
75 | #define PORT_PBDR 0xa4000122UL | ||
76 | #define PORT_PCDR 0xa4000124UL | ||
77 | #define PORT_PFDR 0xa400012aUL | ||
78 | |||
65 | #endif | 79 | #endif |
66 | 80 | ||
67 | #endif | 81 | #endif |
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h index eb23000e1bbe..14be91c5a2f0 100644 --- a/arch/sh/include/mach-se/mach/se.h +++ b/arch/sh/include/mach-se/mach/se.h | |||
@@ -68,6 +68,24 @@ | |||
68 | #define BCR_ILCRF (PA_BCR + 10) | 68 | #define BCR_ILCRF (PA_BCR + 10) |
69 | #define BCR_ILCRG (PA_BCR + 12) | 69 | #define BCR_ILCRG (PA_BCR + 12) |
70 | 70 | ||
71 | #if defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
72 | #define INTC_IRR0 0xa4000004UL | ||
73 | #define INTC_IRR1 0xa4000006UL | ||
74 | #define INTC_IRR2 0xa4000008UL | ||
75 | |||
76 | #define INTC_ICR0 0xfffffee0UL | ||
77 | #define INTC_ICR1 0xa4000010UL | ||
78 | #define INTC_ICR2 0xa4000012UL | ||
79 | #define INTC_INTER 0xa4000014UL | ||
80 | |||
81 | #define INTC_IPRC 0xa4000016UL | ||
82 | #define INTC_IPRD 0xa4000018UL | ||
83 | #define INTC_IPRE 0xa400001aUL | ||
84 | |||
85 | #define IRQ0_IRQ 32 | ||
86 | #define IRQ1_IRQ 33 | ||
87 | #endif | ||
88 | |||
71 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | 89 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) |
72 | #define IRQ_STNIC 12 | 90 | #define IRQ_STNIC 12 |
73 | #define IRQ_CFCARD 14 | 91 | #define IRQ_CFCARD 14 |