diff options
author | Andreas Herrmann <andreas.herrmann3@amd.com> | 2008-01-30 07:32:41 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:32:41 -0500 |
commit | 9566e91d494ed0668edf88f852de7f251fe8fe9a (patch) | |
tree | 9dd4f7ab840e688a3927560349450f941a45ba0b /arch | |
parent | ddb25f9ac1c4b4f9ba0bdacd7850a921a0c6886c (diff) |
x86: fix detection of CONSTANT_TSC bit for AMD CPUs
Commits
- c52f61fcbdb2aa84f0e4d831ef07f375e6b99b2c
(x86: allow TSC clock source on AMD Fam10h and some cleanup)
- e30436f05d456efaff77611e4494f607b14c2782
(x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detection)
are supposed to fix the detection of contant TSC for AMD CPUs.
Unfortunately on x86_64 it does still not work with current x86/mm.
For a Phenom I still get:
...
TSC calibrated against PM_TIMER
Marking TSC unstable due to TSCs unsynchronized
time.c: Detected 2288.366 MHz processor.
...
We have to set c->x86_power in early_identify_cpu to properly detect
the CONSTANT_TSC bit in early_init_amd.
Attached patch fixes this issue. Following the relevant boot
messages when the fix is used:
...
TSC calibrated against PM_TIMER
time.c: Detected 2288.279 MHz processor.
...
Initializing CPU#1
...
checking TSC synchronization [CPU#0 -> CPU#1]: passed.
...
Initializing CPU#2
...
checking TSC synchronization [CPU#0 -> CPU#2]: passed.
...
Booting processor 3/4 APIC 0x3
...
checking TSC synchronization [CPU#0 -> CPU#3]: passed.
Brought up 4 CPUs
...
Patch is against x86/mm (v2.6.24-rc8-672-ga9f7faa).
Please apply.
Set c->x86_power in early_identify_cpu. This ensures that
X86_FEATURE_CONSTANT_TSC can properly be set in early_init_amd.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/setup_64.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c index 3cae326093cb..1caf7458dc48 100644 --- a/arch/x86/kernel/setup_64.c +++ b/arch/x86/kernel/setup_64.c | |||
@@ -996,6 +996,10 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) | |||
996 | c->x86_capability[2] = cpuid_edx(0x80860001); | 996 | c->x86_capability[2] = cpuid_edx(0x80860001); |
997 | } | 997 | } |
998 | 998 | ||
999 | c->extended_cpuid_level = cpuid_eax(0x80000000); | ||
1000 | if (c->extended_cpuid_level >= 0x80000007) | ||
1001 | c->x86_power = cpuid_edx(0x80000007); | ||
1002 | |||
999 | switch (c->x86_vendor) { | 1003 | switch (c->x86_vendor) { |
1000 | case X86_VENDOR_AMD: | 1004 | case X86_VENDOR_AMD: |
1001 | early_init_amd(c); | 1005 | early_init_amd(c); |
@@ -1066,11 +1070,6 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
1066 | numa_add_cpu(smp_processor_id()); | 1070 | numa_add_cpu(smp_processor_id()); |
1067 | #endif | 1071 | #endif |
1068 | 1072 | ||
1069 | c->extended_cpuid_level = cpuid_eax(0x80000000); | ||
1070 | |||
1071 | if (c->extended_cpuid_level >= 0x80000007) | ||
1072 | c->x86_power = cpuid_edx(0x80000007); | ||
1073 | |||
1074 | switch (c->x86_vendor) { | 1073 | switch (c->x86_vendor) { |
1075 | case X86_VENDOR_AMD: | 1074 | case X86_VENDOR_AMD: |
1076 | early_init_amd(c); | 1075 | early_init_amd(c); |