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authorRusty Russell <rusty@rustcorp.com.au>2008-12-29 16:32:35 -0500
committerRusty Russell <rusty@rustcorp.com.au>2008-12-29 16:32:35 -0500
commit33edcf133ba93ecba2e4b6472e97b689895d805c (patch)
tree327d7a20acef64005e7c5ccbfa1265be28aeb6ac /arch
parentbe4d638c1597580ed2294d899d9f1a2cd10e462c (diff)
parent3c92ec8ae91ecf59d88c798301833d7cf83f2179 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/kernel/asm-offsets.c11
-rw-r--r--arch/alpha/kernel/entry.S10
-rw-r--r--arch/arm/common/sa1111.c2
-rw-r--r--arch/arm/kernel/armksyms.c4
-rw-r--r--arch/arm/kernel/traps.c1
-rw-r--r--arch/arm/mach-ixp4xx/fsg-setup.c9
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/qmgr.h35
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c44
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c5
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c5
-rw-r--r--arch/arm/mach-pxa/include/mach/palmasoc.h13
-rw-r--r--arch/arm/mach-pxa/include/mach/reset.h5
-rw-r--r--arch/arm/mm/fault.c1
-rw-r--r--arch/avr32/boards/favr-32/flash.c2
-rw-r--r--arch/avr32/boards/favr-32/setup.c8
-rw-r--r--arch/avr32/boot/images/Makefile2
-rw-r--r--arch/avr32/configs/atstk1006_defconfig134
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c8
-rw-r--r--arch/blackfin/boot/Makefile2
-rw-r--r--arch/ia64/Kconfig2
-rw-r--r--arch/ia64/hp/sim/Kconfig1
-rw-r--r--arch/ia64/hp/sim/simeth.c25
-rw-r--r--arch/ia64/ia32/sys_ia32.c7
-rw-r--r--arch/ia64/kernel/mca_drv.c2
-rw-r--r--arch/ia64/kernel/perfmon.c43
-rw-r--r--arch/ia64/kernel/signal.c4
-rw-r--r--arch/m32r/Kconfig2
-rw-r--r--arch/m68k/fpsp040/setox.S4
-rw-r--r--arch/m68k/mac/baboon.c42
-rw-r--r--arch/m68k/mac/config.c3
-rw-r--r--arch/m68k/mac/debug.c1
-rw-r--r--arch/m68k/mac/macints.c9
-rw-r--r--arch/m68k/mac/misc.c16
-rw-r--r--arch/m68k/mac/oss.c1
-rw-r--r--arch/m68k/mac/via.c80
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/Kconfig.debug2
-rw-r--r--arch/mips/configs/ip32_defconfig1060
-rw-r--r--arch/mips/include/asm/asmmacro.h10
-rw-r--r--arch/mips/include/asm/byteorder.h5
-rw-r--r--arch/mips/include/asm/elf.h2
-rw-r--r--arch/mips/kernel/kspd.c4
-rw-r--r--arch/mips/kernel/mips-mt-fpaff.c5
-rw-r--r--arch/mips/kernel/vpe.c4
-rw-r--r--arch/mips/mm/dma-default.c3
-rw-r--r--arch/parisc/include/asm/tlbflush.h5
-rw-r--r--arch/parisc/kernel/signal.c2
-rw-r--r--arch/powerpc/Kconfig66
-rw-r--r--arch/powerpc/Kconfig.debug9
-rw-r--r--arch/powerpc/Makefile1
-rw-r--r--arch/powerpc/boot/Makefile2
-rw-r--r--arch/powerpc/boot/devtree.c2
-rw-r--r--arch/powerpc/boot/dts/asp834x-redboot.dts20
-rw-r--r--arch/powerpc/boot/dts/bamboo.dts3
-rw-r--r--arch/powerpc/boot/dts/canyonlands.dts14
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts11
-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts20
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts1
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts1
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts1
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts1
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts1
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts20
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts20
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts20
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts31
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts20
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts44
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts18
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts158
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts483
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts234
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts45
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts2
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts18
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts18
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts18
-rw-r--r--arch/powerpc/boot/dts/sbc8641d.dts44
-rw-r--r--arch/powerpc/boot/dts/stx_gp3_8560.dts18
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts1
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts28
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts18
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts44
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts44
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts18
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts18
-rw-r--r--arch/powerpc/boot/libfdt-wrapper.c2
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc610_defconfig8
-rw-r--r--arch/powerpc/configs/ppc44x_defconfig12
-rw-r--r--arch/powerpc/include/asm/atomic.h18
-rw-r--r--arch/powerpc/include/asm/bug.h11
-rw-r--r--arch/powerpc/include/asm/byteorder.h38
-rw-r--r--arch/powerpc/include/asm/cputable.h113
-rw-r--r--arch/powerpc/include/asm/dcr-native.h63
-rw-r--r--arch/powerpc/include/asm/dcr.h4
-rw-r--r--arch/powerpc/include/asm/device.h12
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h156
-rw-r--r--arch/powerpc/include/asm/eeh.h8
-rw-r--r--arch/powerpc/include/asm/elf.h2
-rw-r--r--arch/powerpc/include/asm/feature-fixups.h30
-rw-r--r--arch/powerpc/include/asm/ftrace.h14
-rw-r--r--arch/powerpc/include/asm/highmem.h23
-rw-r--r--arch/powerpc/include/asm/io.h7
-rw-r--r--arch/powerpc/include/asm/kdump.h13
-rw-r--r--arch/powerpc/include/asm/kexec.h15
-rw-r--r--arch/powerpc/include/asm/local.h4
-rw-r--r--arch/powerpc/include/asm/lppaca.h3
-rw-r--r--arch/powerpc/include/asm/mmu-40x.h5
-rw-r--r--arch/powerpc/include/asm/mmu-44x.h22
-rw-r--r--arch/powerpc/include/asm/mmu-8xx.h3
-rw-r--r--arch/powerpc/include/asm/mmu-fsl-booke.h7
-rw-r--r--arch/powerpc/include/asm/mmu.h57
-rw-r--r--arch/powerpc/include/asm/mmu_context.h257
-rw-r--r--arch/powerpc/include/asm/module.h16
-rw-r--r--arch/powerpc/include/asm/mpc52xx.h19
-rw-r--r--arch/powerpc/include/asm/mpc52xx_psc.h11
-rw-r--r--arch/powerpc/include/asm/mutex.h135
-rw-r--r--arch/powerpc/include/asm/page.h13
-rw-r--r--arch/powerpc/include/asm/page_32.h7
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h30
-rw-r--r--arch/powerpc/include/asm/pci.h15
-rw-r--r--arch/powerpc/include/asm/pgalloc-32.h11
-rw-r--r--arch/powerpc/include/asm/pgalloc-64.h34
-rw-r--r--arch/powerpc/include/asm/pgalloc.h41
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h42
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h15
-rw-r--r--arch/powerpc/include/asm/pgtable.h26
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h4
-rw-r--r--arch/powerpc/include/asm/processor.h8
-rw-r--r--arch/powerpc/include/asm/prom.h3
-rw-r--r--arch/powerpc/include/asm/ps3.h56
-rw-r--r--arch/powerpc/include/asm/ps3av.h4
-rw-r--r--arch/powerpc/include/asm/reg.h4
-rw-r--r--arch/powerpc/include/asm/rtas.h1
-rw-r--r--arch/powerpc/include/asm/sfp-machine.h58
-rw-r--r--arch/powerpc/include/asm/smp.h7
-rw-r--r--arch/powerpc/include/asm/spinlock.h2
-rw-r--r--arch/powerpc/include/asm/synch.h4
-rw-r--r--arch/powerpc/include/asm/system.h24
-rw-r--r--arch/powerpc/include/asm/time.h20
-rw-r--r--arch/powerpc/include/asm/tlbflush.h87
-rw-r--r--arch/powerpc/include/asm/vdso_datapage.h3
-rw-r--r--arch/powerpc/kernel/Makefile5
-rw-r--r--arch/powerpc/kernel/asm-offsets.c6
-rw-r--r--arch/powerpc/kernel/cputable.c117
-rw-r--r--arch/powerpc/kernel/dma.c26
-rw-r--r--arch/powerpc/kernel/entry_32.S40
-rw-r--r--arch/powerpc/kernel/entry_64.S12
-rw-r--r--arch/powerpc/kernel/ftrace.c461
-rw-r--r--arch/powerpc/kernel/head_32.S31
-rw-r--r--arch/powerpc/kernel/head_44x.S34
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S107
-rw-r--r--arch/powerpc/kernel/ibmebus.c3
-rw-r--r--arch/powerpc/kernel/idle.c5
-rw-r--r--arch/powerpc/kernel/machine_kexec.c91
-rw-r--r--arch/powerpc/kernel/machine_kexec_64.c78
-rw-r--r--arch/powerpc/kernel/misc_32.S235
-rw-r--r--arch/powerpc/kernel/module.c6
-rw-r--r--arch/powerpc/kernel/module_32.c10
-rw-r--r--arch/powerpc/kernel/module_64.c13
-rw-r--r--arch/powerpc/kernel/of_device.c18
-rw-r--r--arch/powerpc/kernel/paca.c1
-rw-r--r--arch/powerpc/kernel/pci-common.c300
-rw-r--r--arch/powerpc/kernel/pci_32.c108
-rw-r--r--arch/powerpc/kernel/pci_64.c134
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c9
-rw-r--r--arch/powerpc/kernel/ppc_save_regs.S (renamed from arch/powerpc/xmon/setjmp.S)2
-rw-r--r--arch/powerpc/kernel/process.c4
-rw-r--r--arch/powerpc/kernel/prom.c47
-rw-r--r--arch/powerpc/kernel/prom_parse.c5
-rw-r--r--arch/powerpc/kernel/rtas.c26
-rw-r--r--arch/powerpc/kernel/rtas_pci.c48
-rw-r--r--arch/powerpc/kernel/setup_32.c15
-rw-r--r--arch/powerpc/kernel/setup_64.c5
-rw-r--r--arch/powerpc/kernel/smp-tbsync.c12
-rw-r--r--arch/powerpc/kernel/smp.c71
-rw-r--r--arch/powerpc/kernel/swsusp.c2
-rw-r--r--arch/powerpc/kernel/swsusp_32.S6
-rw-r--r--arch/powerpc/kernel/sysfs.c7
-rw-r--r--arch/powerpc/kernel/time.c36
-rw-r--r--arch/powerpc/kernel/traps.c62
-rw-r--r--arch/powerpc/kernel/vdso.c13
-rw-r--r--arch/powerpc/kernel/vdso32/gettimeofday.S208
-rw-r--r--arch/powerpc/kernel/vdso32/vdso32.lds.S3
-rw-r--r--arch/powerpc/kernel/vdso64/gettimeofday.S141
-rw-r--r--arch/powerpc/kernel/vdso64/vdso64.lds.S3
-rw-r--r--arch/powerpc/kernel/vio.c12
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S6
-rw-r--r--arch/powerpc/kvm/powerpc.c3
-rw-r--r--arch/powerpc/lib/Makefile3
-rw-r--r--arch/powerpc/lib/copyuser_64.S17
-rw-r--r--arch/powerpc/lib/dma-noncoherent.c25
-rw-r--r--arch/powerpc/lib/memcpy_64.S16
-rw-r--r--arch/powerpc/lib/rheap.c1
-rw-r--r--arch/powerpc/math-emu/Makefile2
-rw-r--r--arch/powerpc/math-emu/fadd.c1
-rw-r--r--arch/powerpc/math-emu/fcmpo.c5
-rw-r--r--arch/powerpc/math-emu/fdiv.c9
-rw-r--r--arch/powerpc/math-emu/fdivs.c9
-rw-r--r--arch/powerpc/math-emu/fmadd.c5
-rw-r--r--arch/powerpc/math-emu/fmadds.c5
-rw-r--r--arch/powerpc/math-emu/fmsub.c5
-rw-r--r--arch/powerpc/math-emu/fmsubs.c5
-rw-r--r--arch/powerpc/math-emu/fmul.c3
-rw-r--r--arch/powerpc/math-emu/fmuls.c3
-rw-r--r--arch/powerpc/math-emu/fnmadd.c5
-rw-r--r--arch/powerpc/math-emu/fnmadds.c5
-rw-r--r--arch/powerpc/math-emu/fnmsub.c5
-rw-r--r--arch/powerpc/math-emu/fnmsubs.c5
-rw-r--r--arch/powerpc/math-emu/fsqrt.c5
-rw-r--r--arch/powerpc/math-emu/fsqrts.c5
-rw-r--r--arch/powerpc/math-emu/fsub.c3
-rw-r--r--arch/powerpc/math-emu/fsubs.c3
-rw-r--r--arch/powerpc/math-emu/math_efp.c720
-rw-r--r--arch/powerpc/mm/Makefile10
-rw-r--r--arch/powerpc/mm/fault.c16
-rw-r--r--arch/powerpc/mm/hash_low_32.S111
-rw-r--r--arch/powerpc/mm/hugetlbpage.c25
-rw-r--r--arch/powerpc/mm/init_32.c6
-rw-r--r--arch/powerpc/mm/mem.c6
-rw-r--r--arch/powerpc/mm/mmu_context_32.c84
-rw-r--r--arch/powerpc/mm/mmu_context_hash32.c103
-rw-r--r--arch/powerpc/mm/mmu_context_hash64.c (renamed from arch/powerpc/mm/mmu_context_64.c)8
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c397
-rw-r--r--arch/powerpc/mm/mmu_decl.h65
-rw-r--r--arch/powerpc/mm/numa.c16
-rw-r--r--arch/powerpc/mm/pgtable.c117
-rw-r--r--arch/powerpc/mm/pgtable_32.c56
-rw-r--r--arch/powerpc/mm/ppc_mmu_32.c10
-rw-r--r--arch/powerpc/mm/tlb_hash32.c (renamed from arch/powerpc/mm/tlb_32.c)4
-rw-r--r--arch/powerpc/mm/tlb_hash64.c (renamed from arch/powerpc/mm/tlb_64.c)86
-rw-r--r--arch/powerpc/mm/tlb_nohash.c209
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S166
-rw-r--r--arch/powerpc/platforms/40x/ep405.c2
-rw-r--r--arch/powerpc/platforms/40x/kilauea.c2
-rw-r--r--arch/powerpc/platforms/40x/ppc40x_simple.c2
-rw-r--r--arch/powerpc/platforms/44x/ebony.c2
-rw-r--r--arch/powerpc/platforms/44x/ppc44x_simple.c2
-rw-r--r--arch/powerpc/platforms/44x/sam440ep.c2
-rw-r--r--arch/powerpc/platforms/52xx/lite5200_pm.c1
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c2
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c237
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.h53
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pm.c3
-rw-r--r--arch/powerpc/platforms/82xx/pq2.c2
-rw-r--r--arch/powerpc/platforms/85xx/Makefile2
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ds.c11
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c8
-rw-r--r--arch/powerpc/platforms/85xx/smp.c104
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/86xx/Makefile3
-rw-r--r--arch/powerpc/platforms/86xx/gef_gpio.c143
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype12
-rw-r--r--arch/powerpc/platforms/cell/Kconfig23
-rw-r--r--arch/powerpc/platforms/cell/Makefile17
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c3
-rw-r--r--arch/powerpc/platforms/cell/celleb_setup.c9
-rw-r--r--arch/powerpc/platforms/cell/iommu.c5
-rw-r--r--arch/powerpc/platforms/cell/qpace_setup.c152
-rw-r--r--arch/powerpc/platforms/cell/setup.c6
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c27
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c8
-rw-r--r--arch/powerpc/platforms/chrp/pci.c3
-rw-r--r--arch/powerpc/platforms/embedded6xx/c2k.c6
-rw-r--r--arch/powerpc/platforms/embedded6xx/prpmc2800.c6
-rw-r--r--arch/powerpc/platforms/iseries/Kconfig1
-rw-r--r--arch/powerpc/platforms/maple/setup.c6
-rw-r--r--arch/powerpc/platforms/powermac/cpufreq_32.c2
-rw-r--r--arch/powerpc/platforms/powermac/pci.c6
-rw-r--r--arch/powerpc/platforms/powermac/setup.c10
-rw-r--r--arch/powerpc/platforms/powermac/sleep.S5
-rw-r--r--arch/powerpc/platforms/powermac/smp.c2
-rw-r--r--arch/powerpc/platforms/ps3/device-init.c33
-rw-r--r--arch/powerpc/platforms/ps3/mm.c2
-rw-r--r--arch/powerpc/platforms/ps3/setup.c8
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c38
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig2
-rw-r--r--arch/powerpc/platforms/pseries/cmm.c29
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c44
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c2
-rw-r--r--arch/powerpc/platforms/pseries/pci_dlpar.c163
-rw-r--r--arch/powerpc/platforms/pseries/phyp_dump.c5
-rw-r--r--arch/powerpc/platforms/pseries/xics.c43
-rw-r--r--arch/powerpc/sysdev/bestcomm/ata.c3
-rw-r--r--arch/powerpc/sysdev/bestcomm/ata.h19
-rw-r--r--arch/powerpc/sysdev/bestcomm/bestcomm.c7
-rw-r--r--arch/powerpc/sysdev/bestcomm/bestcomm.h61
-rw-r--r--arch/powerpc/sysdev/bestcomm/bestcomm_priv.h20
-rw-r--r--arch/powerpc/sysdev/dcr-low.S8
-rw-r--r--arch/powerpc/sysdev/dcr.c5
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c4
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c241
-rw-r--r--arch/powerpc/sysdev/grackle.c2
-rw-r--r--arch/powerpc/sysdev/mpic.c32
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c306
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c3
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc.c4
-rw-r--r--arch/powerpc/xmon/Makefile2
-rw-r--r--arch/powerpc/xmon/xmon.c5
-rw-r--r--arch/s390/Kconfig41
-rw-r--r--arch/s390/Makefile1
-rw-r--r--arch/s390/appldata/appldata.h4
-rw-r--r--arch/s390/appldata/appldata_base.c12
-rw-r--r--arch/s390/appldata/appldata_net_sum.c4
-rw-r--r--arch/s390/appldata/appldata_os.c21
-rw-r--r--arch/s390/crypto/aes_s390.c14
-rw-r--r--arch/s390/hypfs/hypfs_diag.c10
-rw-r--r--arch/s390/hypfs/inode.c18
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-rw-r--r--arch/x86/kernel/head64.c3
-rw-r--r--arch/x86/kernel/hpet.c4
-rw-r--r--arch/x86/kernel/init_task.c1
-rw-r--r--arch/x86/kernel/io_apic.c3
-rw-r--r--arch/x86/kernel/irq_64.c27
-rw-r--r--arch/x86/kernel/irqinit_32.c2
-rw-r--r--arch/x86/kernel/irqinit_64.c66
-rw-r--r--arch/x86/kernel/machine_kexec_32.c104
-rw-r--r--arch/x86/kernel/microcode_amd.c232
-rw-r--r--arch/x86/kernel/microcode_core.c25
-rw-r--r--arch/x86/kernel/microcode_intel.c8
-rw-r--r--arch/x86/kernel/mpparse.c25
-rw-r--r--arch/x86/kernel/nmi.c58
-rw-r--r--arch/x86/kernel/numaq_32.c10
-rw-r--r--arch/x86/kernel/pci-dma.c11
-rw-r--r--arch/x86/kernel/pci-gart_64.c4
-rw-r--r--arch/x86/kernel/process.c35
-rw-r--r--arch/x86/kernel/process_32.c67
-rw-r--r--arch/x86/kernel/process_64.c58
-rw-r--r--arch/x86/kernel/ptrace.c432
-rw-r--r--arch/x86/kernel/reboot.c126
-rw-r--r--arch/x86/kernel/relocate_kernel_32.S115
-rw-r--r--arch/x86/kernel/setup.c181
-rw-r--r--arch/x86/kernel/sigframe.h42
-rw-r--r--arch/x86/kernel/signal.c (renamed from arch/x86/kernel/signal_32.c)567
-rw-r--r--arch/x86/kernel/signal_64.c516
-rw-r--r--arch/x86/kernel/smp.c31
-rw-r--r--arch/x86/kernel/smpboot.c27
-rw-r--r--arch/x86/kernel/stacktrace.c64
-rw-r--r--arch/x86/kernel/time_32.c2
-rw-r--r--arch/x86/kernel/time_64.c6
-rw-r--r--arch/x86/kernel/tlb_32.c13
-rw-r--r--arch/x86/kernel/tlb_64.c2
-rw-r--r--arch/x86/kernel/tlb_uv.c4
-rw-r--r--arch/x86/kernel/trampoline.c19
-rw-r--r--arch/x86/kernel/traps.c38
-rw-r--r--arch/x86/kernel/tsc.c42
-rw-r--r--arch/x86/kernel/tsc_sync.c8
-rw-r--r--arch/x86/kernel/vmi_32.c135
-rw-r--r--arch/x86/kernel/vmlinux_32.lds.S1
-rw-r--r--arch/x86/kernel/vmlinux_64.lds.S1
-rw-r--r--arch/x86/kernel/vsyscall_64.c12
-rw-r--r--arch/x86/lguest/boot.c3
-rw-r--r--arch/x86/mach-generic/bigsmp.c1
-rw-r--r--arch/x86/mach-generic/default.c1
-rw-r--r--arch/x86/mach-generic/es7000.c14
-rw-r--r--arch/x86/mach-generic/probe.c16
-rw-r--r--arch/x86/mach-generic/summit.c1
-rw-r--r--arch/x86/mm/Makefile3
-rw-r--r--arch/x86/mm/fault.c15
-rw-r--r--arch/x86/mm/init_32.c32
-rw-r--r--arch/x86/mm/init_64.c2
-rw-r--r--arch/x86/mm/ioremap.c3
-rw-r--r--arch/x86/mm/pat.c236
-rw-r--r--arch/x86/pci/common.c17
-rw-r--r--arch/x86/pci/direct.c4
-rw-r--r--arch/x86/pci/pci.h1
-rw-r--r--arch/x86/scripts/strip-symbols1
-rw-r--r--arch/x86/vdso/vclock_gettime.c3
-rw-r--r--arch/x86/vdso/vdso32-setup.c2
-rw-r--r--arch/x86/vdso/vma.c2
-rw-r--r--arch/x86/xen/enlighten.c17
-rw-r--r--arch/x86/xen/mmu.c17
-rw-r--r--arch/x86/xen/multicalls.c2
-rw-r--r--arch/x86/xen/setup.c9
-rw-r--r--arch/xtensa/platforms/iss/network.c21
731 files changed, 25381 insertions, 14398 deletions
diff --git a/arch/alpha/kernel/asm-offsets.c b/arch/alpha/kernel/asm-offsets.c
index 4b18cd94d59d..6ff8886e7e22 100644
--- a/arch/alpha/kernel/asm-offsets.c
+++ b/arch/alpha/kernel/asm-offsets.c
@@ -19,15 +19,18 @@ void foo(void)
19 BLANK(); 19 BLANK();
20 20
21 DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked)); 21 DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
22 DEFINE(TASK_UID, offsetof(struct task_struct, uid)); 22 DEFINE(TASK_CRED, offsetof(struct task_struct, cred));
23 DEFINE(TASK_EUID, offsetof(struct task_struct, euid));
24 DEFINE(TASK_GID, offsetof(struct task_struct, gid));
25 DEFINE(TASK_EGID, offsetof(struct task_struct, egid));
26 DEFINE(TASK_REAL_PARENT, offsetof(struct task_struct, real_parent)); 23 DEFINE(TASK_REAL_PARENT, offsetof(struct task_struct, real_parent));
27 DEFINE(TASK_GROUP_LEADER, offsetof(struct task_struct, group_leader)); 24 DEFINE(TASK_GROUP_LEADER, offsetof(struct task_struct, group_leader));
28 DEFINE(TASK_TGID, offsetof(struct task_struct, tgid)); 25 DEFINE(TASK_TGID, offsetof(struct task_struct, tgid));
29 BLANK(); 26 BLANK();
30 27
28 DEFINE(CRED_UID, offsetof(struct cred, uid));
29 DEFINE(CRED_EUID, offsetof(struct cred, euid));
30 DEFINE(CRED_GID, offsetof(struct cred, gid));
31 DEFINE(CRED_EGID, offsetof(struct cred, egid));
32 BLANK();
33
31 DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs)); 34 DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs));
32 DEFINE(PT_PTRACED, PT_PTRACED); 35 DEFINE(PT_PTRACED, PT_PTRACED);
33 DEFINE(CLONE_VM, CLONE_VM); 36 DEFINE(CLONE_VM, CLONE_VM);
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index 5fc61e281ac7..f77345bc66a9 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -850,8 +850,9 @@ osf_getpriority:
850sys_getxuid: 850sys_getxuid:
851 .prologue 0 851 .prologue 0
852 ldq $2, TI_TASK($8) 852 ldq $2, TI_TASK($8)
853 ldl $0, TASK_UID($2) 853 ldq $3, TASK_CRED($2)
854 ldl $1, TASK_EUID($2) 854 ldl $0, CRED_UID($3)
855 ldl $1, CRED_EUID($3)
855 stq $1, 80($sp) 856 stq $1, 80($sp)
856 ret 857 ret
857.end sys_getxuid 858.end sys_getxuid
@@ -862,8 +863,9 @@ sys_getxuid:
862sys_getxgid: 863sys_getxgid:
863 .prologue 0 864 .prologue 0
864 ldq $2, TI_TASK($8) 865 ldq $2, TI_TASK($8)
865 ldl $0, TASK_GID($2) 866 ldq $3, TASK_CRED($2)
866 ldl $1, TASK_EGID($2) 867 ldl $0, CRED_GID($3)
868 ldl $1, CRED_EGID($3)
867 stq $1, 80($sp) 869 stq $1, 80($sp)
868 ret 870 ret
869.end sys_getxgid 871.end sys_getxgid
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 47ccec95f3e8..ef12794c3c68 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -630,7 +630,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
630 return -ENOMEM; 630 return -ENOMEM;
631 631
632 sachip->clk = clk_get(me, "SA1111_CLK"); 632 sachip->clk = clk_get(me, "SA1111_CLK");
633 if (!sachip->clk) { 633 if (IS_ERR(sachip->clk)) {
634 ret = PTR_ERR(sachip->clk); 634 ret = PTR_ERR(sachip->clk);
635 goto err_free; 635 goto err_free;
636 } 636 }
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c74f766ffc12..23af3c972c9a 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -115,6 +115,8 @@ EXPORT_SYMBOL(__strnlen_user);
115EXPORT_SYMBOL(__strncpy_from_user); 115EXPORT_SYMBOL(__strncpy_from_user);
116 116
117#ifdef CONFIG_MMU 117#ifdef CONFIG_MMU
118EXPORT_SYMBOL(copy_page);
119
118EXPORT_SYMBOL(__copy_from_user); 120EXPORT_SYMBOL(__copy_from_user);
119EXPORT_SYMBOL(__copy_to_user); 121EXPORT_SYMBOL(__copy_to_user);
120EXPORT_SYMBOL(__clear_user); 122EXPORT_SYMBOL(__clear_user);
@@ -181,8 +183,6 @@ EXPORT_SYMBOL(_find_first_bit_be);
181EXPORT_SYMBOL(_find_next_bit_be); 183EXPORT_SYMBOL(_find_next_bit_be);
182#endif 184#endif
183 185
184EXPORT_SYMBOL(copy_page);
185
186#ifdef CONFIG_FUNCTION_TRACER 186#ifdef CONFIG_FUNCTION_TRACER
187EXPORT_SYMBOL(mcount); 187EXPORT_SYMBOL(mcount);
188#endif 188#endif
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 57e6874d0b80..79abc4ddc0cf 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -18,6 +18,7 @@
18#include <linux/personality.h> 18#include <linux/personality.h>
19#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/hardirq.h>
21#include <linux/init.h> 22#include <linux/init.h>
22#include <linux/uaccess.h> 23#include <linux/uaccess.h>
23 24
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index e7c6386782ed..5add22fc9899 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -177,7 +177,6 @@ static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
177 177
178static void __init fsg_init(void) 178static void __init fsg_init(void)
179{ 179{
180 DECLARE_MAC_BUF(mac_buf);
181 uint8_t __iomem *f; 180 uint8_t __iomem *f;
182 181
183 ixp4xx_sys_init(); 182 ixp4xx_sys_init();
@@ -256,10 +255,10 @@ static void __init fsg_init(void)
256#endif 255#endif
257 iounmap(f); 256 iounmap(f);
258 } 257 }
259 printk(KERN_INFO "FSG: Using MAC address %s for port 0\n", 258 printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
260 print_mac(mac_buf, fsg_plat_eth[0].hwaddr)); 259 fsg_plat_eth[0].hwaddr);
261 printk(KERN_INFO "FSG: Using MAC address %s for port 1\n", 260 printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
262 print_mac(mac_buf, fsg_plat_eth[1].hwaddr)); 261 fsg_plat_eth[1].hwaddr);
263 262
264} 263}
265 264
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 1e52b95cede5..0cbe6ceb67c5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -12,6 +12,8 @@
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14 14
15#define DEBUG_QMGR 0
16
15#define HALF_QUEUES 32 17#define HALF_QUEUES 32
16#define QUEUES 64 /* only 32 lower queues currently supported */ 18#define QUEUES 64 /* only 32 lower queues currently supported */
17#define MAX_QUEUE_LENGTH 4 /* in dwords */ 19#define MAX_QUEUE_LENGTH 4 /* in dwords */
@@ -61,22 +63,51 @@ void qmgr_enable_irq(unsigned int queue);
61void qmgr_disable_irq(unsigned int queue); 63void qmgr_disable_irq(unsigned int queue);
62 64
63/* request_ and release_queue() must be called from non-IRQ context */ 65/* request_ and release_queue() must be called from non-IRQ context */
66
67#if DEBUG_QMGR
68extern char qmgr_queue_descs[QUEUES][32];
69
64int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, 70int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
65 unsigned int nearly_empty_watermark, 71 unsigned int nearly_empty_watermark,
66 unsigned int nearly_full_watermark); 72 unsigned int nearly_full_watermark,
73 const char *desc_format, const char* name);
74#else
75int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
76 unsigned int nearly_empty_watermark,
77 unsigned int nearly_full_watermark);
78#define qmgr_request_queue(queue, len, nearly_empty_watermark, \
79 nearly_full_watermark, desc_format, name) \
80 __qmgr_request_queue(queue, len, nearly_empty_watermark, \
81 nearly_full_watermark)
82#endif
83
67void qmgr_release_queue(unsigned int queue); 84void qmgr_release_queue(unsigned int queue);
68 85
69 86
70static inline void qmgr_put_entry(unsigned int queue, u32 val) 87static inline void qmgr_put_entry(unsigned int queue, u32 val)
71{ 88{
72 extern struct qmgr_regs __iomem *qmgr_regs; 89 extern struct qmgr_regs __iomem *qmgr_regs;
90#if DEBUG_QMGR
91 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
92
93 printk(KERN_DEBUG "Queue %s(%i) put %X\n",
94 qmgr_queue_descs[queue], queue, val);
95#endif
73 __raw_writel(val, &qmgr_regs->acc[queue][0]); 96 __raw_writel(val, &qmgr_regs->acc[queue][0]);
74} 97}
75 98
76static inline u32 qmgr_get_entry(unsigned int queue) 99static inline u32 qmgr_get_entry(unsigned int queue)
77{ 100{
101 u32 val;
78 extern struct qmgr_regs __iomem *qmgr_regs; 102 extern struct qmgr_regs __iomem *qmgr_regs;
79 return __raw_readl(&qmgr_regs->acc[queue][0]); 103 val = __raw_readl(&qmgr_regs->acc[queue][0]);
104#if DEBUG_QMGR
105 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
106
107 printk(KERN_DEBUG "Queue %s(%i) get %X\n",
108 qmgr_queue_descs[queue], queue, val);
109#endif
110 return val;
80} 111}
81 112
82static inline int qmgr_get_stat1(unsigned int queue) 113static inline int qmgr_get_stat1(unsigned int queue)
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index c6cb069a5a83..bfddc73d0a20 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,8 +14,6 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <mach/qmgr.h> 15#include <mach/qmgr.h>
16 16
17#define DEBUG 0
18
19struct qmgr_regs __iomem *qmgr_regs; 17struct qmgr_regs __iomem *qmgr_regs;
20static struct resource *mem_res; 18static struct resource *mem_res;
21static spinlock_t qmgr_lock; 19static spinlock_t qmgr_lock;
@@ -23,6 +21,10 @@ static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
23static void (*irq_handlers[HALF_QUEUES])(void *pdev); 21static void (*irq_handlers[HALF_QUEUES])(void *pdev);
24static void *irq_pdevs[HALF_QUEUES]; 22static void *irq_pdevs[HALF_QUEUES];
25 23
24#if DEBUG_QMGR
25char qmgr_queue_descs[QUEUES][32];
26#endif
27
26void qmgr_set_irq(unsigned int queue, int src, 28void qmgr_set_irq(unsigned int queue, int src,
27 void (*handler)(void *pdev), void *pdev) 29 void (*handler)(void *pdev), void *pdev)
28{ 30{
@@ -70,6 +72,7 @@ void qmgr_disable_irq(unsigned int queue)
70 spin_lock_irqsave(&qmgr_lock, flags); 72 spin_lock_irqsave(&qmgr_lock, flags);
71 __raw_writel(__raw_readl(&qmgr_regs->irqen[0]) & ~(1 << queue), 73 __raw_writel(__raw_readl(&qmgr_regs->irqen[0]) & ~(1 << queue),
72 &qmgr_regs->irqen[0]); 74 &qmgr_regs->irqen[0]);
75 __raw_writel(1 << queue, &qmgr_regs->irqstat[0]); /* clear */
73 spin_unlock_irqrestore(&qmgr_lock, flags); 76 spin_unlock_irqrestore(&qmgr_lock, flags);
74} 77}
75 78
@@ -81,9 +84,16 @@ static inline void shift_mask(u32 *mask)
81 mask[0] <<= 1; 84 mask[0] <<= 1;
82} 85}
83 86
87#if DEBUG_QMGR
84int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, 88int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
85 unsigned int nearly_empty_watermark, 89 unsigned int nearly_empty_watermark,
86 unsigned int nearly_full_watermark) 90 unsigned int nearly_full_watermark,
91 const char *desc_format, const char* name)
92#else
93int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
94 unsigned int nearly_empty_watermark,
95 unsigned int nearly_full_watermark)
96#endif
87{ 97{
88 u32 cfg, addr = 0, mask[4]; /* in 16-dwords */ 98 u32 cfg, addr = 0, mask[4]; /* in 16-dwords */
89 int err; 99 int err;
@@ -151,12 +161,13 @@ int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
151 used_sram_bitmap[2] |= mask[2]; 161 used_sram_bitmap[2] |= mask[2];
152 used_sram_bitmap[3] |= mask[3]; 162 used_sram_bitmap[3] |= mask[3];
153 __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]); 163 __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]);
154 spin_unlock_irq(&qmgr_lock); 164#if DEBUG_QMGR
155 165 snprintf(qmgr_queue_descs[queue], sizeof(qmgr_queue_descs[0]),
156#if DEBUG 166 desc_format, name);
157 printk(KERN_DEBUG "qmgr: requested queue %i, addr = 0x%02X\n", 167 printk(KERN_DEBUG "qmgr: requested queue %s(%i) addr = 0x%02X\n",
158 queue, addr); 168 qmgr_queue_descs[queue], queue, addr);
159#endif 169#endif
170 spin_unlock_irq(&qmgr_lock);
160 return 0; 171 return 0;
161 172
162err: 173err:
@@ -189,6 +200,11 @@ void qmgr_release_queue(unsigned int queue)
189 while (addr--) 200 while (addr--)
190 shift_mask(mask); 201 shift_mask(mask);
191 202
203#if DEBUG_QMGR
204 printk(KERN_DEBUG "qmgr: releasing queue %s(%i)\n",
205 qmgr_queue_descs[queue], queue);
206 qmgr_queue_descs[queue][0] = '\x0';
207#endif
192 __raw_writel(0, &qmgr_regs->sram[queue]); 208 __raw_writel(0, &qmgr_regs->sram[queue]);
193 209
194 used_sram_bitmap[0] &= ~mask[0]; 210 used_sram_bitmap[0] &= ~mask[0];
@@ -199,9 +215,10 @@ void qmgr_release_queue(unsigned int queue)
199 spin_unlock_irq(&qmgr_lock); 215 spin_unlock_irq(&qmgr_lock);
200 216
201 module_put(THIS_MODULE); 217 module_put(THIS_MODULE);
202#if DEBUG 218
203 printk(KERN_DEBUG "qmgr: released queue %i\n", queue); 219 while ((addr = qmgr_get_entry(queue)))
204#endif 220 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
221 queue, addr);
205} 222}
206 223
207static int qmgr_init(void) 224static int qmgr_init(void)
@@ -272,5 +289,10 @@ EXPORT_SYMBOL(qmgr_regs);
272EXPORT_SYMBOL(qmgr_set_irq); 289EXPORT_SYMBOL(qmgr_set_irq);
273EXPORT_SYMBOL(qmgr_enable_irq); 290EXPORT_SYMBOL(qmgr_enable_irq);
274EXPORT_SYMBOL(qmgr_disable_irq); 291EXPORT_SYMBOL(qmgr_disable_irq);
292#if DEBUG_QMGR
293EXPORT_SYMBOL(qmgr_queue_descs);
275EXPORT_SYMBOL(qmgr_request_queue); 294EXPORT_SYMBOL(qmgr_request_queue);
295#else
296EXPORT_SYMBOL(__qmgr_request_queue);
297#endif
276EXPORT_SYMBOL(qmgr_release_queue); 298EXPORT_SYMBOL(qmgr_release_queue);
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 0acd95ecf27e..921c947b5b6b 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -231,7 +231,6 @@ static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
231 231
232static void __init nas100d_init(void) 232static void __init nas100d_init(void)
233{ 233{
234 DECLARE_MAC_BUF(mac_buf);
235 uint8_t __iomem *f; 234 uint8_t __iomem *f;
236 int i; 235 int i;
237 236
@@ -294,8 +293,8 @@ static void __init nas100d_init(void)
294#endif 293#endif
295 iounmap(f); 294 iounmap(f);
296 } 295 }
297 printk(KERN_INFO "NAS100D: Using MAC address %s for port 0\n", 296 printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
298 print_mac(mac_buf, nas100d_plat_eth[0].hwaddr)); 297 nas100d_plat_eth[0].hwaddr);
299 298
300} 299}
301 300
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index bc9d920ae54f..ff6a08d02cc4 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -220,7 +220,6 @@ static struct sys_timer nslu2_timer = {
220 220
221static void __init nslu2_init(void) 221static void __init nslu2_init(void)
222{ 222{
223 DECLARE_MAC_BUF(mac_buf);
224 uint8_t __iomem *f; 223 uint8_t __iomem *f;
225 int i; 224 int i;
226 225
@@ -275,8 +274,8 @@ static void __init nslu2_init(void)
275#endif 274#endif
276 iounmap(f); 275 iounmap(f);
277 } 276 }
278 printk(KERN_INFO "NSLU2: Using MAC address %s for port 0\n", 277 printk(KERN_INFO "NSLU2: Using MAC address %pM for port 0\n",
279 print_mac(mac_buf, nslu2_plat_eth[0].hwaddr)); 278 nslu2_plat_eth[0].hwaddr);
280 279
281} 280}
282 281
diff --git a/arch/arm/mach-pxa/include/mach/palmasoc.h b/arch/arm/mach-pxa/include/mach/palmasoc.h
new file mode 100644
index 000000000000..6c4b1f7de20a
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmasoc.h
@@ -0,0 +1,13 @@
1#ifndef _INCLUDE_PALMASOC_H_
2#define _INCLUDE_PALMASOC_H_
3struct palm27x_asoc_info {
4 int jack_gpio;
5};
6
7#ifdef CONFIG_SND_PXA2XX_SOC_PALM27X
8void __init palm27x_asoc_set_pdata(struct palm27x_asoc_info *data);
9#else
10static inline void palm27x_asoc_set_pdata(struct palm27x_asoc_info *data) {}
11#endif
12
13#endif
diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h
index 7b8842cfa5fc..31e6a7b6ad80 100644
--- a/arch/arm/mach-pxa/include/mach/reset.h
+++ b/arch/arm/mach-pxa/include/mach/reset.h
@@ -12,9 +12,8 @@ extern void clear_reset_status(unsigned int mask);
12 12
13/** 13/**
14 * init_gpio_reset() - register GPIO as reset generator 14 * init_gpio_reset() - register GPIO as reset generator
15 * 15 * @gpio: gpio nr
16 * @gpio - gpio nr 16 * @output: set gpio as out/low instead of input during normal work
17 * @output - set gpio as out/low instead of input during normal work
18 */ 17 */
19extern int init_gpio_reset(int gpio, int output); 18extern int init_gpio_reset(int gpio, int output);
20 19
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 2df8d9facf57..22c9530e91e2 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -11,6 +11,7 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/signal.h> 12#include <linux/signal.h>
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/hardirq.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/kprobes.h> 16#include <linux/kprobes.h>
16#include <linux/uaccess.h> 17#include <linux/uaccess.h>
diff --git a/arch/avr32/boards/favr-32/flash.c b/arch/avr32/boards/favr-32/flash.c
index 5f139b7cb5f7..604bbd5e41d9 100644
--- a/arch/avr32/boards/favr-32/flash.c
+++ b/arch/avr32/boards/favr-32/flash.c
@@ -13,7 +13,7 @@
13#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
15 15
16#include <asm/arch/smc.h> 16#include <mach/smc.h>
17 17
18static struct smc_timing flash_timing __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index 7538f3d2b9e0..1ee4faf0742d 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -25,10 +25,10 @@
25 25
26#include <asm/setup.h> 26#include <asm/setup.h>
27 27
28#include <asm/arch/at32ap700x.h> 28#include <mach/at32ap700x.h>
29#include <asm/arch/init.h> 29#include <mach/init.h>
30#include <asm/arch/board.h> 30#include <mach/board.h>
31#include <asm/arch/portmux.h> 31#include <mach/portmux.h>
32 32
33/* Oscillator frequencies. These are board-specific */ 33/* Oscillator frequencies. These are board-specific */
34unsigned long at32_board_osc_rates[3] = { 34unsigned long at32_board_osc_rates[3] = {
diff --git a/arch/avr32/boot/images/Makefile b/arch/avr32/boot/images/Makefile
index 219720a47bf9..1848bf0d7f62 100644
--- a/arch/avr32/boot/images/Makefile
+++ b/arch/avr32/boot/images/Makefile
@@ -10,7 +10,7 @@ MKIMAGE := $(srctree)/scripts/mkuboot.sh
10 10
11extra-y := vmlinux.bin vmlinux.gz 11extra-y := vmlinux.bin vmlinux.gz
12 12
13OBJCOPYFLAGS_vmlinux.bin := -O binary 13OBJCOPYFLAGS_vmlinux.bin := -O binary -R .note.gnu.build-id
14$(obj)/vmlinux.bin: vmlinux FORCE 14$(obj)/vmlinux.bin: vmlinux FORCE
15 $(call if_changed,objcopy) 15 $(call if_changed,objcopy)
16 16
diff --git a/arch/avr32/configs/atstk1006_defconfig b/arch/avr32/configs/atstk1006_defconfig
index 8b6e54c9946a..6c45a3b77aa3 100644
--- a/arch/avr32/configs/atstk1006_defconfig
+++ b/arch/avr32/configs/atstk1006_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc1 3# Linux kernel version: 2.6.28-rc8
4# Tue Aug 5 15:40:26 2008 4# Thu Dec 18 11:22:23 2008
5# 5#
6CONFIG_AVR32=y 6CONFIG_AVR32=y
7CONFIG_GENERIC_GPIO=y 7CONFIG_GENERIC_GPIO=y
@@ -67,6 +67,7 @@ CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y 67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y 68CONFIG_EVENTFD=y
69CONFIG_SHMEM=y 69CONFIG_SHMEM=y
70CONFIG_AIO=y
70CONFIG_VM_EVENT_COUNTERS=y 71CONFIG_VM_EVENT_COUNTERS=y
71CONFIG_SLUB_DEBUG=y 72CONFIG_SLUB_DEBUG=y
72# CONFIG_SLAB is not set 73# CONFIG_SLAB is not set
@@ -77,15 +78,8 @@ CONFIG_PROFILING=y
77CONFIG_OPROFILE=m 78CONFIG_OPROFILE=m
78CONFIG_HAVE_OPROFILE=y 79CONFIG_HAVE_OPROFILE=y
79CONFIG_KPROBES=y 80CONFIG_KPROBES=y
80# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
81# CONFIG_HAVE_IOREMAP_PROT is not set
82CONFIG_HAVE_KPROBES=y 81CONFIG_HAVE_KPROBES=y
83# CONFIG_HAVE_KRETPROBES is not set
84# CONFIG_HAVE_ARCH_TRACEHOOK is not set
85# CONFIG_HAVE_DMA_ATTRS is not set
86# CONFIG_USE_GENERIC_SMP_HELPERS is not set
87CONFIG_HAVE_CLK=y 82CONFIG_HAVE_CLK=y
88CONFIG_PROC_PAGE_MONITOR=y
89# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 83# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
90CONFIG_SLABINFO=y 84CONFIG_SLABINFO=y
91CONFIG_RT_MUTEXES=y 85CONFIG_RT_MUTEXES=y
@@ -118,6 +112,7 @@ CONFIG_DEFAULT_CFQ=y
118# CONFIG_DEFAULT_NOOP is not set 112# CONFIG_DEFAULT_NOOP is not set
119CONFIG_DEFAULT_IOSCHED="cfq" 113CONFIG_DEFAULT_IOSCHED="cfq"
120CONFIG_CLASSIC_RCU=y 114CONFIG_CLASSIC_RCU=y
115CONFIG_FREEZER=y
121 116
122# 117#
123# System Type and features 118# System Type and features
@@ -134,6 +129,8 @@ CONFIG_CPU_AT32AP700X=y
134CONFIG_CPU_AT32AP7000=y 129CONFIG_CPU_AT32AP7000=y
135CONFIG_BOARD_ATSTK1000=y 130CONFIG_BOARD_ATSTK1000=y
136# CONFIG_BOARD_ATNGW100 is not set 131# CONFIG_BOARD_ATNGW100 is not set
132# CONFIG_BOARD_FAVR_32 is not set
133# CONFIG_BOARD_MIMC200 is not set
137# CONFIG_BOARD_ATSTK1002 is not set 134# CONFIG_BOARD_ATSTK1002 is not set
138# CONFIG_BOARD_ATSTK1003 is not set 135# CONFIG_BOARD_ATSTK1003 is not set
139# CONFIG_BOARD_ATSTK1004 is not set 136# CONFIG_BOARD_ATSTK1004 is not set
@@ -171,14 +168,14 @@ CONFIG_FLATMEM_MANUAL=y
171# CONFIG_SPARSEMEM_MANUAL is not set 168# CONFIG_SPARSEMEM_MANUAL is not set
172CONFIG_FLATMEM=y 169CONFIG_FLATMEM=y
173CONFIG_FLAT_NODE_MEM_MAP=y 170CONFIG_FLAT_NODE_MEM_MAP=y
174# CONFIG_SPARSEMEM_STATIC is not set
175# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
176CONFIG_PAGEFLAGS_EXTENDED=y 171CONFIG_PAGEFLAGS_EXTENDED=y
177CONFIG_SPLIT_PTLOCK_CPUS=4 172CONFIG_SPLIT_PTLOCK_CPUS=4
178# CONFIG_RESOURCES_64BIT is not set 173# CONFIG_RESOURCES_64BIT is not set
174# CONFIG_PHYS_ADDR_T_64BIT is not set
179CONFIG_ZONE_DMA_FLAG=0 175CONFIG_ZONE_DMA_FLAG=0
180CONFIG_NR_QUICK=2 176CONFIG_NR_QUICK=2
181CONFIG_VIRT_TO_BUS=y 177CONFIG_VIRT_TO_BUS=y
178CONFIG_UNEVICTABLE_LRU=y
182# CONFIG_OWNERSHIP_TRACE is not set 179# CONFIG_OWNERSHIP_TRACE is not set
183CONFIG_NMI_DEBUGGING=y 180CONFIG_NMI_DEBUGGING=y
184# CONFIG_HZ_100 is not set 181# CONFIG_HZ_100 is not set
@@ -186,7 +183,7 @@ CONFIG_HZ_250=y
186# CONFIG_HZ_300 is not set 183# CONFIG_HZ_300 is not set
187# CONFIG_HZ_1000 is not set 184# CONFIG_HZ_1000 is not set
188CONFIG_HZ=250 185CONFIG_HZ=250
189# CONFIG_SCHED_HRTICK is not set 186CONFIG_SCHED_HRTICK=y
190CONFIG_CMDLINE="" 187CONFIG_CMDLINE=""
191 188
192# 189#
@@ -228,6 +225,8 @@ CONFIG_CPU_FREQ_AT32AP=y
228# Executable file formats 225# Executable file formats
229# 226#
230CONFIG_BINFMT_ELF=y 227CONFIG_BINFMT_ELF=y
228CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
229# CONFIG_HAVE_AOUT is not set
231# CONFIG_BINFMT_MISC is not set 230# CONFIG_BINFMT_MISC is not set
232CONFIG_NET=y 231CONFIG_NET=y
233 232
@@ -299,6 +298,7 @@ CONFIG_IPV6_TUNNEL=m
299# CONFIG_ATM is not set 298# CONFIG_ATM is not set
300CONFIG_STP=m 299CONFIG_STP=m
301CONFIG_BRIDGE=m 300CONFIG_BRIDGE=m
301# CONFIG_NET_DSA is not set
302# CONFIG_VLAN_8021Q is not set 302# CONFIG_VLAN_8021Q is not set
303# CONFIG_DECNET is not set 303# CONFIG_DECNET is not set
304CONFIG_LLC=m 304CONFIG_LLC=m
@@ -321,14 +321,8 @@ CONFIG_LLC=m
321# CONFIG_IRDA is not set 321# CONFIG_IRDA is not set
322# CONFIG_BT is not set 322# CONFIG_BT is not set
323# CONFIG_AF_RXRPC is not set 323# CONFIG_AF_RXRPC is not set
324 324# CONFIG_PHONET is not set
325# 325# CONFIG_WIRELESS is not set
326# Wireless
327#
328# CONFIG_CFG80211 is not set
329# CONFIG_WIRELESS_EXT is not set
330# CONFIG_MAC80211 is not set
331# CONFIG_IEEE80211 is not set
332# CONFIG_RFKILL is not set 326# CONFIG_RFKILL is not set
333# CONFIG_NET_9P is not set 327# CONFIG_NET_9P is not set
334 328
@@ -359,6 +353,7 @@ CONFIG_MTD_CMDLINE_PARTS=y
359# User Modules And Translation Layers 353# User Modules And Translation Layers
360# 354#
361CONFIG_MTD_CHAR=y 355CONFIG_MTD_CHAR=y
356CONFIG_HAVE_MTD_OTP=y
362CONFIG_MTD_BLKDEVS=y 357CONFIG_MTD_BLKDEVS=y
363CONFIG_MTD_BLOCK=y 358CONFIG_MTD_BLOCK=y
364# CONFIG_FTL is not set 359# CONFIG_FTL is not set
@@ -407,6 +402,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
407# Self-contained MTD device drivers 402# Self-contained MTD device drivers
408# 403#
409CONFIG_MTD_DATAFLASH=m 404CONFIG_MTD_DATAFLASH=m
405# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
406CONFIG_MTD_DATAFLASH_OTP=y
410CONFIG_MTD_M25P80=m 407CONFIG_MTD_M25P80=m
411CONFIG_M25PXX_USE_FAST_READ=y 408CONFIG_M25PXX_USE_FAST_READ=y
412# CONFIG_MTD_SLRAM is not set 409# CONFIG_MTD_SLRAM is not set
@@ -464,9 +461,10 @@ CONFIG_ATMEL_TCLIB=y
464CONFIG_ATMEL_TCB_CLKSRC=y 461CONFIG_ATMEL_TCB_CLKSRC=y
465CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0 462CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
466# CONFIG_EEPROM_93CX6 is not set 463# CONFIG_EEPROM_93CX6 is not set
464# CONFIG_ICS932S401 is not set
467CONFIG_ATMEL_SSC=m 465CONFIG_ATMEL_SSC=m
468# CONFIG_ENCLOSURE_SERVICES is not set 466# CONFIG_ENCLOSURE_SERVICES is not set
469# CONFIG_HAVE_IDE is not set 467# CONFIG_C2PORT is not set
470 468
471# 469#
472# SCSI device support 470# SCSI device support
@@ -548,6 +546,9 @@ CONFIG_MACB=y
548# CONFIG_IBM_NEW_EMAC_RGMII is not set 546# CONFIG_IBM_NEW_EMAC_RGMII is not set
549# CONFIG_IBM_NEW_EMAC_TAH is not set 547# CONFIG_IBM_NEW_EMAC_TAH is not set
550# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 548# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
549# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
550# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
551# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
551# CONFIG_B44 is not set 552# CONFIG_B44 is not set
552# CONFIG_NETDEV_1000 is not set 553# CONFIG_NETDEV_1000 is not set
553# CONFIG_NETDEV_10000 is not set 554# CONFIG_NETDEV_10000 is not set
@@ -653,6 +654,7 @@ CONFIG_UNIX98_PTYS=y
653CONFIG_I2C=m 654CONFIG_I2C=m
654CONFIG_I2C_BOARDINFO=y 655CONFIG_I2C_BOARDINFO=y
655CONFIG_I2C_CHARDEV=m 656CONFIG_I2C_CHARDEV=m
657CONFIG_I2C_HELPER_AUTO=y
656CONFIG_I2C_ALGOBIT=m 658CONFIG_I2C_ALGOBIT=m
657 659
658# 660#
@@ -717,6 +719,10 @@ CONFIG_GPIOLIB=y
717CONFIG_GPIO_SYSFS=y 719CONFIG_GPIO_SYSFS=y
718 720
719# 721#
722# Memory mapped GPIO expanders:
723#
724
725#
720# I2C GPIO expanders: 726# I2C GPIO expanders:
721# 727#
722# CONFIG_GPIO_MAX732X is not set 728# CONFIG_GPIO_MAX732X is not set
@@ -745,11 +751,11 @@ CONFIG_WATCHDOG=y
745# 751#
746# CONFIG_SOFT_WATCHDOG is not set 752# CONFIG_SOFT_WATCHDOG is not set
747CONFIG_AT32AP700X_WDT=y 753CONFIG_AT32AP700X_WDT=y
754CONFIG_SSB_POSSIBLE=y
748 755
749# 756#
750# Sonics Silicon Backplane 757# Sonics Silicon Backplane
751# 758#
752CONFIG_SSB_POSSIBLE=y
753# CONFIG_SSB is not set 759# CONFIG_SSB is not set
754 760
755# 761#
@@ -758,6 +764,10 @@ CONFIG_SSB_POSSIBLE=y
758# CONFIG_MFD_CORE is not set 764# CONFIG_MFD_CORE is not set
759# CONFIG_MFD_SM501 is not set 765# CONFIG_MFD_SM501 is not set
760# CONFIG_HTC_PASIC3 is not set 766# CONFIG_HTC_PASIC3 is not set
767# CONFIG_MFD_TMIO is not set
768# CONFIG_MFD_WM8400 is not set
769# CONFIG_MFD_WM8350_I2C is not set
770# CONFIG_REGULATOR is not set
761 771
762# 772#
763# Multimedia devices 773# Multimedia devices
@@ -783,6 +793,7 @@ CONFIG_SSB_POSSIBLE=y
783CONFIG_FB=y 793CONFIG_FB=y
784# CONFIG_FIRMWARE_EDID is not set 794# CONFIG_FIRMWARE_EDID is not set
785# CONFIG_FB_DDC is not set 795# CONFIG_FB_DDC is not set
796# CONFIG_FB_BOOT_VESA_SUPPORT is not set
786CONFIG_FB_CFB_FILLRECT=y 797CONFIG_FB_CFB_FILLRECT=y
787CONFIG_FB_CFB_COPYAREA=y 798CONFIG_FB_CFB_COPYAREA=y
788CONFIG_FB_CFB_IMAGEBLIT=y 799CONFIG_FB_CFB_IMAGEBLIT=y
@@ -804,10 +815,13 @@ CONFIG_FB_CFB_IMAGEBLIT=y
804# CONFIG_FB_S1D13XXX is not set 815# CONFIG_FB_S1D13XXX is not set
805CONFIG_FB_ATMEL=y 816CONFIG_FB_ATMEL=y
806# CONFIG_FB_VIRTUAL is not set 817# CONFIG_FB_VIRTUAL is not set
818# CONFIG_FB_METRONOME is not set
819# CONFIG_FB_MB862XX is not set
807CONFIG_BACKLIGHT_LCD_SUPPORT=y 820CONFIG_BACKLIGHT_LCD_SUPPORT=y
808CONFIG_LCD_CLASS_DEVICE=y 821CONFIG_LCD_CLASS_DEVICE=y
809CONFIG_LCD_LTV350QV=y 822CONFIG_LCD_LTV350QV=y
810# CONFIG_LCD_ILI9320 is not set 823# CONFIG_LCD_ILI9320 is not set
824# CONFIG_LCD_TDO24M is not set
811# CONFIG_LCD_VGG2432A4 is not set 825# CONFIG_LCD_VGG2432A4 is not set
812# CONFIG_LCD_PLATFORM is not set 826# CONFIG_LCD_PLATFORM is not set
813# CONFIG_BACKLIGHT_CLASS_DEVICE is not set 827# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
@@ -818,6 +832,7 @@ CONFIG_LCD_LTV350QV=y
818# CONFIG_DISPLAY_SUPPORT is not set 832# CONFIG_DISPLAY_SUPPORT is not set
819# CONFIG_LOGO is not set 833# CONFIG_LOGO is not set
820CONFIG_SOUND=m 834CONFIG_SOUND=m
835CONFIG_SOUND_OSS_CORE=y
821CONFIG_SND=m 836CONFIG_SND=m
822CONFIG_SND_TIMER=m 837CONFIG_SND_TIMER=m
823CONFIG_SND_PCM=m 838CONFIG_SND_PCM=m
@@ -848,28 +863,32 @@ CONFIG_USB_SUPPORT=y
848# CONFIG_USB_ARCH_HAS_EHCI is not set 863# CONFIG_USB_ARCH_HAS_EHCI is not set
849# CONFIG_USB_OTG_WHITELIST is not set 864# CONFIG_USB_OTG_WHITELIST is not set
850# CONFIG_USB_OTG_BLACKLIST_HUB is not set 865# CONFIG_USB_OTG_BLACKLIST_HUB is not set
866# CONFIG_USB_MUSB_HDRC is not set
867# CONFIG_USB_GADGET_MUSB_HDRC is not set
851 868
852# 869#
853# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 870# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
854# 871#
855CONFIG_USB_GADGET=y 872CONFIG_USB_GADGET=y
856# CONFIG_USB_GADGET_DEBUG is not set 873# CONFIG_USB_GADGET_DEBUG is not set
857# CONFIG_USB_GADGET_DEBUG_FILES is not set 874# CONFIG_USB_GADGET_DEBUG_FILES is not set
858# CONFIG_USB_GADGET_DEBUG_FS is not set 875# CONFIG_USB_GADGET_DEBUG_FS is not set
876CONFIG_USB_GADGET_VBUS_DRAW=2
859CONFIG_USB_GADGET_SELECTED=y 877CONFIG_USB_GADGET_SELECTED=y
860# CONFIG_USB_GADGET_AMD5536UDC is not set 878# CONFIG_USB_GADGET_AT91 is not set
861CONFIG_USB_GADGET_ATMEL_USBA=y 879CONFIG_USB_GADGET_ATMEL_USBA=y
862CONFIG_USB_ATMEL_USBA=y 880CONFIG_USB_ATMEL_USBA=y
863# CONFIG_USB_GADGET_FSL_USB2 is not set 881# CONFIG_USB_GADGET_FSL_USB2 is not set
864# CONFIG_USB_GADGET_NET2280 is not set
865# CONFIG_USB_GADGET_PXA25X is not set
866# CONFIG_USB_GADGET_M66592 is not set
867# CONFIG_USB_GADGET_PXA27X is not set
868# CONFIG_USB_GADGET_GOKU is not set
869# CONFIG_USB_GADGET_LH7A40X is not set 882# CONFIG_USB_GADGET_LH7A40X is not set
870# CONFIG_USB_GADGET_OMAP is not set 883# CONFIG_USB_GADGET_OMAP is not set
884# CONFIG_USB_GADGET_PXA25X is not set
885# CONFIG_USB_GADGET_PXA27X is not set
871# CONFIG_USB_GADGET_S3C2410 is not set 886# CONFIG_USB_GADGET_S3C2410 is not set
872# CONFIG_USB_GADGET_AT91 is not set 887# CONFIG_USB_GADGET_M66592 is not set
888# CONFIG_USB_GADGET_AMD5536UDC is not set
889# CONFIG_USB_GADGET_FSL_QE is not set
890# CONFIG_USB_GADGET_NET2280 is not set
891# CONFIG_USB_GADGET_GOKU is not set
873# CONFIG_USB_GADGET_DUMMY_HCD is not set 892# CONFIG_USB_GADGET_DUMMY_HCD is not set
874CONFIG_USB_GADGET_DUALSPEED=y 893CONFIG_USB_GADGET_DUALSPEED=y
875CONFIG_USB_ZERO=m 894CONFIG_USB_ZERO=m
@@ -887,7 +906,7 @@ CONFIG_MMC=y
887# CONFIG_MMC_UNSAFE_RESUME is not set 906# CONFIG_MMC_UNSAFE_RESUME is not set
888 907
889# 908#
890# MMC/SD Card Drivers 909# MMC/SD/SDIO Card Drivers
891# 910#
892CONFIG_MMC_BLOCK=y 911CONFIG_MMC_BLOCK=y
893CONFIG_MMC_BLOCK_BOUNCE=y 912CONFIG_MMC_BLOCK_BOUNCE=y
@@ -895,10 +914,11 @@ CONFIG_MMC_BLOCK_BOUNCE=y
895# CONFIG_MMC_TEST is not set 914# CONFIG_MMC_TEST is not set
896 915
897# 916#
898# MMC/SD Host Controller Drivers 917# MMC/SD/SDIO Host Controller Drivers
899# 918#
900# CONFIG_MMC_SDHCI is not set 919# CONFIG_MMC_SDHCI is not set
901CONFIG_MMC_ATMELMCI=y 920CONFIG_MMC_ATMELMCI=y
921# CONFIG_MMC_ATMELMCI_DMA is not set
902CONFIG_MMC_SPI=m 922CONFIG_MMC_SPI=m
903# CONFIG_MEMSTICK is not set 923# CONFIG_MEMSTICK is not set
904CONFIG_NEW_LEDS=y 924CONFIG_NEW_LEDS=y
@@ -918,6 +938,7 @@ CONFIG_LEDS_GPIO=m
918CONFIG_LEDS_TRIGGERS=y 938CONFIG_LEDS_TRIGGERS=y
919CONFIG_LEDS_TRIGGER_TIMER=m 939CONFIG_LEDS_TRIGGER_TIMER=m
920CONFIG_LEDS_TRIGGER_HEARTBEAT=m 940CONFIG_LEDS_TRIGGER_HEARTBEAT=m
941# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
921CONFIG_LEDS_TRIGGER_DEFAULT_ON=m 942CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
922# CONFIG_ACCESSIBILITY is not set 943# CONFIG_ACCESSIBILITY is not set
923CONFIG_RTC_LIB=y 944CONFIG_RTC_LIB=y
@@ -950,25 +971,31 @@ CONFIG_RTC_INTF_DEV=y
950# CONFIG_RTC_DRV_M41T80 is not set 971# CONFIG_RTC_DRV_M41T80 is not set
951# CONFIG_RTC_DRV_S35390A is not set 972# CONFIG_RTC_DRV_S35390A is not set
952# CONFIG_RTC_DRV_FM3130 is not set 973# CONFIG_RTC_DRV_FM3130 is not set
974# CONFIG_RTC_DRV_RX8581 is not set
953 975
954# 976#
955# SPI RTC drivers 977# SPI RTC drivers
956# 978#
957# CONFIG_RTC_DRV_M41T94 is not set 979# CONFIG_RTC_DRV_M41T94 is not set
958# CONFIG_RTC_DRV_DS1305 is not set 980# CONFIG_RTC_DRV_DS1305 is not set
981# CONFIG_RTC_DRV_DS1390 is not set
959# CONFIG_RTC_DRV_MAX6902 is not set 982# CONFIG_RTC_DRV_MAX6902 is not set
960# CONFIG_RTC_DRV_R9701 is not set 983# CONFIG_RTC_DRV_R9701 is not set
961# CONFIG_RTC_DRV_RS5C348 is not set 984# CONFIG_RTC_DRV_RS5C348 is not set
985# CONFIG_RTC_DRV_DS3234 is not set
962 986
963# 987#
964# Platform RTC drivers 988# Platform RTC drivers
965# 989#
990# CONFIG_RTC_DRV_DS1286 is not set
966# CONFIG_RTC_DRV_DS1511 is not set 991# CONFIG_RTC_DRV_DS1511 is not set
967# CONFIG_RTC_DRV_DS1553 is not set 992# CONFIG_RTC_DRV_DS1553 is not set
968# CONFIG_RTC_DRV_DS1742 is not set 993# CONFIG_RTC_DRV_DS1742 is not set
969# CONFIG_RTC_DRV_STK17TA8 is not set 994# CONFIG_RTC_DRV_STK17TA8 is not set
970# CONFIG_RTC_DRV_M48T86 is not set 995# CONFIG_RTC_DRV_M48T86 is not set
996# CONFIG_RTC_DRV_M48T35 is not set
971# CONFIG_RTC_DRV_M48T59 is not set 997# CONFIG_RTC_DRV_M48T59 is not set
998# CONFIG_RTC_DRV_BQ4802 is not set
972# CONFIG_RTC_DRV_V3020 is not set 999# CONFIG_RTC_DRV_V3020 is not set
973 1000
974# 1001#
@@ -989,6 +1016,8 @@ CONFIG_DMA_ENGINE=y
989# CONFIG_NET_DMA is not set 1016# CONFIG_NET_DMA is not set
990CONFIG_DMATEST=m 1017CONFIG_DMATEST=m
991# CONFIG_UIO is not set 1018# CONFIG_UIO is not set
1019# CONFIG_STAGING is not set
1020CONFIG_STAGING_EXCLUDE_BUILD=y
992 1021
993# 1022#
994# File systems 1023# File systems
@@ -998,12 +1027,17 @@ CONFIG_EXT2_FS=m
998# CONFIG_EXT2_FS_XIP is not set 1027# CONFIG_EXT2_FS_XIP is not set
999CONFIG_EXT3_FS=m 1028CONFIG_EXT3_FS=m
1000# CONFIG_EXT3_FS_XATTR is not set 1029# CONFIG_EXT3_FS_XATTR is not set
1001# CONFIG_EXT4DEV_FS is not set 1030CONFIG_EXT4_FS=m
1031CONFIG_EXT4DEV_COMPAT=y
1032# CONFIG_EXT4_FS_XATTR is not set
1002CONFIG_JBD=m 1033CONFIG_JBD=m
1003# CONFIG_JBD_DEBUG is not set 1034# CONFIG_JBD_DEBUG is not set
1035CONFIG_JBD2=m
1036# CONFIG_JBD2_DEBUG is not set
1004# CONFIG_REISERFS_FS is not set 1037# CONFIG_REISERFS_FS is not set
1005# CONFIG_JFS_FS is not set 1038# CONFIG_JFS_FS is not set
1006# CONFIG_FS_POSIX_ACL is not set 1039# CONFIG_FS_POSIX_ACL is not set
1040CONFIG_FILE_LOCKING=y
1007# CONFIG_XFS_FS is not set 1041# CONFIG_XFS_FS is not set
1008# CONFIG_OCFS2_FS is not set 1042# CONFIG_OCFS2_FS is not set
1009# CONFIG_DNOTIFY is not set 1043# CONFIG_DNOTIFY is not set
@@ -1036,6 +1070,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1036CONFIG_PROC_FS=y 1070CONFIG_PROC_FS=y
1037CONFIG_PROC_KCORE=y 1071CONFIG_PROC_KCORE=y
1038CONFIG_PROC_SYSCTL=y 1072CONFIG_PROC_SYSCTL=y
1073CONFIG_PROC_PAGE_MONITOR=y
1039CONFIG_SYSFS=y 1074CONFIG_SYSFS=y
1040CONFIG_TMPFS=y 1075CONFIG_TMPFS=y
1041# CONFIG_TMPFS_POSIX_ACL is not set 1076# CONFIG_TMPFS_POSIX_ACL is not set
@@ -1054,7 +1089,8 @@ CONFIG_TMPFS=y
1054# CONFIG_EFS_FS is not set 1089# CONFIG_EFS_FS is not set
1055CONFIG_JFFS2_FS=y 1090CONFIG_JFFS2_FS=y
1056CONFIG_JFFS2_FS_DEBUG=0 1091CONFIG_JFFS2_FS_DEBUG=0
1057# CONFIG_JFFS2_FS_WRITEBUFFER is not set 1092CONFIG_JFFS2_FS_WRITEBUFFER=y
1093# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1058# CONFIG_JFFS2_SUMMARY is not set 1094# CONFIG_JFFS2_SUMMARY is not set
1059# CONFIG_JFFS2_FS_XATTR is not set 1095# CONFIG_JFFS2_FS_XATTR is not set
1060# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set 1096# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
@@ -1088,6 +1124,7 @@ CONFIG_LOCKD=y
1088CONFIG_LOCKD_V4=y 1124CONFIG_LOCKD_V4=y
1089CONFIG_NFS_COMMON=y 1125CONFIG_NFS_COMMON=y
1090CONFIG_SUNRPC=y 1126CONFIG_SUNRPC=y
1127# CONFIG_SUNRPC_REGISTER_V4 is not set
1091# CONFIG_RPCSEC_GSS_KRB5 is not set 1128# CONFIG_RPCSEC_GSS_KRB5 is not set
1092# CONFIG_RPCSEC_GSS_SPKM3 is not set 1129# CONFIG_RPCSEC_GSS_SPKM3 is not set
1093# CONFIG_SMB_FS is not set 1130# CONFIG_SMB_FS is not set
@@ -1185,10 +1222,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
1185CONFIG_FRAME_POINTER=y 1222CONFIG_FRAME_POINTER=y
1186# CONFIG_BOOT_PRINTK_DELAY is not set 1223# CONFIG_BOOT_PRINTK_DELAY is not set
1187# CONFIG_RCU_TORTURE_TEST is not set 1224# CONFIG_RCU_TORTURE_TEST is not set
1225# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1188# CONFIG_KPROBES_SANITY_TEST is not set 1226# CONFIG_KPROBES_SANITY_TEST is not set
1189# CONFIG_BACKTRACE_SELF_TEST is not set 1227# CONFIG_BACKTRACE_SELF_TEST is not set
1228# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1190# CONFIG_LKDTM is not set 1229# CONFIG_LKDTM is not set
1191# CONFIG_FAULT_INJECTION is not set 1230# CONFIG_FAULT_INJECTION is not set
1231
1232#
1233# Tracers
1234#
1235# CONFIG_IRQSOFF_TRACER is not set
1236# CONFIG_SCHED_TRACER is not set
1237# CONFIG_CONTEXT_SWITCH_TRACER is not set
1238# CONFIG_BOOT_TRACER is not set
1239# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1192# CONFIG_SAMPLES is not set 1240# CONFIG_SAMPLES is not set
1193 1241
1194# 1242#
@@ -1196,17 +1244,26 @@ CONFIG_FRAME_POINTER=y
1196# 1244#
1197# CONFIG_KEYS is not set 1245# CONFIG_KEYS is not set
1198# CONFIG_SECURITY is not set 1246# CONFIG_SECURITY is not set
1247# CONFIG_SECURITYFS is not set
1199# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1248# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1200CONFIG_CRYPTO=y 1249CONFIG_CRYPTO=y
1201 1250
1202# 1251#
1203# Crypto core or helper 1252# Crypto core or helper
1204# 1253#
1254CONFIG_CRYPTO_FIPS=y
1205CONFIG_CRYPTO_ALGAPI=y 1255CONFIG_CRYPTO_ALGAPI=y
1256CONFIG_CRYPTO_ALGAPI2=y
1206CONFIG_CRYPTO_AEAD=m 1257CONFIG_CRYPTO_AEAD=m
1258CONFIG_CRYPTO_AEAD2=y
1207CONFIG_CRYPTO_BLKCIPHER=m 1259CONFIG_CRYPTO_BLKCIPHER=m
1260CONFIG_CRYPTO_BLKCIPHER2=y
1208CONFIG_CRYPTO_HASH=m 1261CONFIG_CRYPTO_HASH=m
1262CONFIG_CRYPTO_HASH2=y
1263CONFIG_CRYPTO_RNG=m
1264CONFIG_CRYPTO_RNG2=y
1209CONFIG_CRYPTO_MANAGER=m 1265CONFIG_CRYPTO_MANAGER=m
1266CONFIG_CRYPTO_MANAGER2=y
1210# CONFIG_CRYPTO_GF128MUL is not set 1267# CONFIG_CRYPTO_GF128MUL is not set
1211# CONFIG_CRYPTO_NULL is not set 1268# CONFIG_CRYPTO_NULL is not set
1212# CONFIG_CRYPTO_CRYPTD is not set 1269# CONFIG_CRYPTO_CRYPTD is not set
@@ -1257,7 +1314,7 @@ CONFIG_CRYPTO_SHA1=m
1257# 1314#
1258# Ciphers 1315# Ciphers
1259# 1316#
1260# CONFIG_CRYPTO_AES is not set 1317CONFIG_CRYPTO_AES=m
1261# CONFIG_CRYPTO_ANUBIS is not set 1318# CONFIG_CRYPTO_ANUBIS is not set
1262# CONFIG_CRYPTO_ARC4 is not set 1319# CONFIG_CRYPTO_ARC4 is not set
1263# CONFIG_CRYPTO_BLOWFISH is not set 1320# CONFIG_CRYPTO_BLOWFISH is not set
@@ -1278,14 +1335,17 @@ CONFIG_CRYPTO_DES=m
1278# 1335#
1279CONFIG_CRYPTO_DEFLATE=y 1336CONFIG_CRYPTO_DEFLATE=y
1280CONFIG_CRYPTO_LZO=y 1337CONFIG_CRYPTO_LZO=y
1338
1339#
1340# Random Number Generation
1341#
1342CONFIG_CRYPTO_ANSI_CPRNG=m
1281# CONFIG_CRYPTO_HW is not set 1343# CONFIG_CRYPTO_HW is not set
1282 1344
1283# 1345#
1284# Library routines 1346# Library routines
1285# 1347#
1286CONFIG_BITREVERSE=y 1348CONFIG_BITREVERSE=y
1287# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1288# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1289CONFIG_CRC_CCITT=m 1349CONFIG_CRC_CCITT=m
1290CONFIG_CRC16=y 1350CONFIG_CRC16=y
1291CONFIG_CRC_T10DIF=m 1351CONFIG_CRC_T10DIF=m
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 0c6e02f80a31..066252eebf61 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -967,28 +967,28 @@ static inline void configure_usart0_pins(void)
967{ 967{
968 u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */ 968 u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */
969 969
970 select_peripheral(PIOA, pin_mask, PERIPH_B, 0); 970 select_peripheral(PIOA, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
971} 971}
972 972
973static inline void configure_usart1_pins(void) 973static inline void configure_usart1_pins(void)
974{ 974{
975 u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */ 975 u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */
976 976
977 select_peripheral(PIOA, pin_mask, PERIPH_A, 0); 977 select_peripheral(PIOA, pin_mask, PERIPH_A, AT32_GPIOF_PULLUP);
978} 978}
979 979
980static inline void configure_usart2_pins(void) 980static inline void configure_usart2_pins(void)
981{ 981{
982 u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */ 982 u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */
983 983
984 select_peripheral(PIOB, pin_mask, PERIPH_B, 0); 984 select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
985} 985}
986 986
987static inline void configure_usart3_pins(void) 987static inline void configure_usart3_pins(void)
988{ 988{
989 u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */ 989 u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */
990 990
991 select_peripheral(PIOB, pin_mask, PERIPH_B, 0); 991 select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
992} 992}
993 993
994static struct platform_device *__initdata at32_usarts[4]; 994static struct platform_device *__initdata at32_usarts[4];
diff --git a/arch/blackfin/boot/Makefile b/arch/blackfin/boot/Makefile
index 522f3c124060..e028d13481a9 100644
--- a/arch/blackfin/boot/Makefile
+++ b/arch/blackfin/boot/Makefile
@@ -25,7 +25,7 @@ $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
25 25
26$(obj)/vmImage: $(obj)/vmlinux.gz 26$(obj)/vmImage: $(obj)/vmlinux.gz
27 $(call if_changed,uimage) 27 $(call if_changed,uimage)
28 @echo 'Kernel: $@ is ready' 28 @$(kecho) 'Kernel: $@ is ready'
29 29
30install: 30install:
31 sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)" 31 sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 6bd91ed7cd03..7fa8f615ba6e 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -99,7 +99,7 @@ config GENERIC_IOMAP
99 bool 99 bool
100 default y 100 default y
101 101
102config SCHED_NO_NO_OMIT_FRAME_POINTER 102config SCHED_OMIT_FRAME_POINTER
103 bool 103 bool
104 default y 104 default y
105 105
diff --git a/arch/ia64/hp/sim/Kconfig b/arch/ia64/hp/sim/Kconfig
index f92306bbedb8..8d513a8c5266 100644
--- a/arch/ia64/hp/sim/Kconfig
+++ b/arch/ia64/hp/sim/Kconfig
@@ -4,6 +4,7 @@ menu "HP Simulator drivers"
4 4
5config HP_SIMETH 5config HP_SIMETH
6 bool "Simulated Ethernet " 6 bool "Simulated Ethernet "
7 depends on NET
7 8
8config HP_SIMSERIAL 9config HP_SIMSERIAL
9 bool "Simulated serial driver support" 10 bool "Simulated serial driver support"
diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index 3d47839a0c48..e4d8fde68103 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -167,6 +167,15 @@ netdev_read(int fd, unsigned char *buf, unsigned int len)
167 return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_RECV); 167 return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_RECV);
168} 168}
169 169
170static const struct net_device_ops simeth_netdev_ops = {
171 .ndo_open = simeth_open,
172 .ndo_stop = simeth_close,
173 .ndo_start_xmit = simeth_tx,
174 .ndo_get_stats = simeth_get_stats,
175 .ndo_set_multicast_list = set_multicast_list, /* not yet used */
176
177};
178
170/* 179/*
171 * Function shared with module code, so cannot be in init section 180 * Function shared with module code, so cannot be in init section
172 * 181 *
@@ -206,14 +215,10 @@ simeth_probe1(void)
206 215
207 memcpy(dev->dev_addr, mac_addr, sizeof(mac_addr)); 216 memcpy(dev->dev_addr, mac_addr, sizeof(mac_addr));
208 217
209 local = dev->priv; 218 local = netdev_priv(dev);
210 local->simfd = fd; /* keep track of underlying file descriptor */ 219 local->simfd = fd; /* keep track of underlying file descriptor */
211 220
212 dev->open = simeth_open; 221 dev->netdev_ops = &simeth_netdev_ops;
213 dev->stop = simeth_close;
214 dev->hard_start_xmit = simeth_tx;
215 dev->get_stats = simeth_get_stats;
216 dev->set_multicast_list = set_multicast_list; /* no yet used */
217 222
218 err = register_netdev(dev); 223 err = register_netdev(dev);
219 if (err) { 224 if (err) {
@@ -325,7 +330,7 @@ simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr)
325 * we get DOWN then UP. 330 * we get DOWN then UP.
326 */ 331 */
327 332
328 local = dev->priv; 333 local = netdev_priv(dev);
329 /* now do it for real */ 334 /* now do it for real */
330 r = event == NETDEV_UP ? 335 r = event == NETDEV_UP ?
331 netdev_attach(local->simfd, dev->irq, ntohl(ifa->ifa_local)): 336 netdev_attach(local->simfd, dev->irq, ntohl(ifa->ifa_local)):
@@ -380,7 +385,7 @@ frame_print(unsigned char *from, unsigned char *frame, int len)
380static int 385static int
381simeth_tx(struct sk_buff *skb, struct net_device *dev) 386simeth_tx(struct sk_buff *skb, struct net_device *dev)
382{ 387{
383 struct simeth_local *local = dev->priv; 388 struct simeth_local *local = netdev_priv(dev);
384 389
385#if 0 390#if 0
386 /* ensure we have at least ETH_ZLEN bytes (min frame size) */ 391 /* ensure we have at least ETH_ZLEN bytes (min frame size) */
@@ -443,7 +448,7 @@ simeth_rx(struct net_device *dev)
443 int len; 448 int len;
444 int rcv_count = SIMETH_RECV_MAX; 449 int rcv_count = SIMETH_RECV_MAX;
445 450
446 local = dev->priv; 451 local = netdev_priv(dev);
447 /* 452 /*
448 * the loop concept has been borrowed from other drivers 453 * the loop concept has been borrowed from other drivers
449 * looks to me like it's a throttling thing to avoid pushing to many 454 * looks to me like it's a throttling thing to avoid pushing to many
@@ -507,7 +512,7 @@ simeth_interrupt(int irq, void *dev_id)
507static struct net_device_stats * 512static struct net_device_stats *
508simeth_get_stats(struct net_device *dev) 513simeth_get_stats(struct net_device *dev)
509{ 514{
510 struct simeth_local *local = dev->priv; 515 struct simeth_local *local = netdev_priv(dev);
511 516
512 return &local->stats; 517 return &local->stats;
513} 518}
diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
index 5e92ae00bdbb..16ef61a91d95 100644
--- a/arch/ia64/ia32/sys_ia32.c
+++ b/arch/ia64/ia32/sys_ia32.c
@@ -1767,25 +1767,24 @@ groups16_from_user(struct group_info *group_info, short __user *grouplist)
1767asmlinkage long 1767asmlinkage long
1768sys32_getgroups16 (int gidsetsize, short __user *grouplist) 1768sys32_getgroups16 (int gidsetsize, short __user *grouplist)
1769{ 1769{
1770 const struct cred *cred = current_cred();
1770 int i; 1771 int i;
1771 1772
1772 if (gidsetsize < 0) 1773 if (gidsetsize < 0)
1773 return -EINVAL; 1774 return -EINVAL;
1774 1775
1775 get_group_info(current->group_info); 1776 i = cred->group_info->ngroups;
1776 i = current->group_info->ngroups;
1777 if (gidsetsize) { 1777 if (gidsetsize) {
1778 if (i > gidsetsize) { 1778 if (i > gidsetsize) {
1779 i = -EINVAL; 1779 i = -EINVAL;
1780 goto out; 1780 goto out;
1781 } 1781 }
1782 if (groups16_to_user(grouplist, current->group_info)) { 1782 if (groups16_to_user(grouplist, cred->group_info)) {
1783 i = -EFAULT; 1783 i = -EFAULT;
1784 goto out; 1784 goto out;
1785 } 1785 }
1786 } 1786 }
1787out: 1787out:
1788 put_group_info(current->group_info);
1789 return i; 1788 return i;
1790} 1789}
1791 1790
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
index fab1d21a4f2c..f94aaa86933f 100644
--- a/arch/ia64/kernel/mca_drv.c
+++ b/arch/ia64/kernel/mca_drv.c
@@ -158,7 +158,7 @@ mca_handler_bh(unsigned long paddr, void *iip, unsigned long ipsr)
158 ia64_mlogbuf_dump(); 158 ia64_mlogbuf_dump();
159 printk(KERN_ERR "OS_MCA: process [cpu %d, pid: %d, uid: %d, " 159 printk(KERN_ERR "OS_MCA: process [cpu %d, pid: %d, uid: %d, "
160 "iip: %p, psr: 0x%lx,paddr: 0x%lx](%s) encounters MCA.\n", 160 "iip: %p, psr: 0x%lx,paddr: 0x%lx](%s) encounters MCA.\n",
161 raw_smp_processor_id(), current->pid, current->uid, 161 raw_smp_processor_id(), current->pid, current_uid(),
162 iip, ipsr, paddr, current->comm); 162 iip, ipsr, paddr, current->comm);
163 163
164 spin_lock(&mca_bh_lock); 164 spin_lock(&mca_bh_lock);
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 6543a5547c84..0e499757309b 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2220,8 +2220,8 @@ pfm_alloc_file(pfm_context_t *ctx)
2220 DPRINT(("new inode ino=%ld @%p\n", inode->i_ino, inode)); 2220 DPRINT(("new inode ino=%ld @%p\n", inode->i_ino, inode));
2221 2221
2222 inode->i_mode = S_IFCHR|S_IRUGO; 2222 inode->i_mode = S_IFCHR|S_IRUGO;
2223 inode->i_uid = current->fsuid; 2223 inode->i_uid = current_fsuid();
2224 inode->i_gid = current->fsgid; 2224 inode->i_gid = current_fsgid();
2225 2225
2226 sprintf(name, "[%lu]", inode->i_ino); 2226 sprintf(name, "[%lu]", inode->i_ino);
2227 this.name = name; 2227 this.name = name;
@@ -2399,22 +2399,33 @@ error_kmem:
2399static int 2399static int
2400pfm_bad_permissions(struct task_struct *task) 2400pfm_bad_permissions(struct task_struct *task)
2401{ 2401{
2402 const struct cred *tcred;
2403 uid_t uid = current_uid();
2404 gid_t gid = current_gid();
2405 int ret;
2406
2407 rcu_read_lock();
2408 tcred = __task_cred(task);
2409
2402 /* inspired by ptrace_attach() */ 2410 /* inspired by ptrace_attach() */
2403 DPRINT(("cur: uid=%d gid=%d task: euid=%d suid=%d uid=%d egid=%d sgid=%d\n", 2411 DPRINT(("cur: uid=%d gid=%d task: euid=%d suid=%d uid=%d egid=%d sgid=%d\n",
2404 current->uid, 2412 uid,
2405 current->gid, 2413 gid,
2406 task->euid, 2414 tcred->euid,
2407 task->suid, 2415 tcred->suid,
2408 task->uid, 2416 tcred->uid,
2409 task->egid, 2417 tcred->egid,
2410 task->sgid)); 2418 tcred->sgid));
2411 2419
2412 return ((current->uid != task->euid) 2420 ret = ((uid != tcred->euid)
2413 || (current->uid != task->suid) 2421 || (uid != tcred->suid)
2414 || (current->uid != task->uid) 2422 || (uid != tcred->uid)
2415 || (current->gid != task->egid) 2423 || (gid != tcred->egid)
2416 || (current->gid != task->sgid) 2424 || (gid != tcred->sgid)
2417 || (current->gid != task->gid)) && !capable(CAP_SYS_PTRACE); 2425 || (gid != tcred->gid)) && !capable(CAP_SYS_PTRACE);
2426
2427 rcu_read_unlock();
2428 return ret;
2418} 2429}
2419 2430
2420static int 2431static int
diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c
index e12500a9c443..e1821ca4c7df 100644
--- a/arch/ia64/kernel/signal.c
+++ b/arch/ia64/kernel/signal.c
@@ -229,7 +229,7 @@ ia64_rt_sigreturn (struct sigscratch *scr)
229 si.si_errno = 0; 229 si.si_errno = 0;
230 si.si_code = SI_KERNEL; 230 si.si_code = SI_KERNEL;
231 si.si_pid = task_pid_vnr(current); 231 si.si_pid = task_pid_vnr(current);
232 si.si_uid = current->uid; 232 si.si_uid = current_uid();
233 si.si_addr = sc; 233 si.si_addr = sc;
234 force_sig_info(SIGSEGV, &si, current); 234 force_sig_info(SIGSEGV, &si, current);
235 return retval; 235 return retval;
@@ -326,7 +326,7 @@ force_sigsegv_info (int sig, void __user *addr)
326 si.si_errno = 0; 326 si.si_errno = 0;
327 si.si_code = SI_KERNEL; 327 si.si_code = SI_KERNEL;
328 si.si_pid = task_pid_vnr(current); 328 si.si_pid = task_pid_vnr(current);
329 si.si_uid = current->uid; 329 si.si_uid = current_uid();
330 si.si_addr = addr; 330 si.si_addr = addr;
331 force_sig_info(SIGSEGV, &si, current); 331 force_sig_info(SIGSEGV, &si, current);
332 return 0; 332 return 0;
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index 17a6dab09319..cabba332cc48 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -274,7 +274,7 @@ config GENERIC_CALIBRATE_DELAY
274 bool 274 bool
275 default y 275 default y
276 276
277config SCHED_NO_NO_OMIT_FRAME_POINTER 277config SCHED_OMIT_FRAME_POINTER
278 bool 278 bool
279 default y 279 default y
280 280
diff --git a/arch/m68k/fpsp040/setox.S b/arch/m68k/fpsp040/setox.S
index 145af5447581..f1acf7e36d6b 100644
--- a/arch/m68k/fpsp040/setox.S
+++ b/arch/m68k/fpsp040/setox.S
@@ -36,9 +36,9 @@
36| depending on their values, the program may run faster or slower -- 36| depending on their values, the program may run faster or slower --
37| but no worse than 10% slower even in the extreme cases. 37| but no worse than 10% slower even in the extreme cases.
38| 38|
39| The program setoxm1 takes approximately ???/??? cycles for input 39| The program setoxm1 takes approximately ??? / ??? cycles for input
40| argument X, 0.25 <= |X| < 70log2. For |X| < 0.25, it takes 40| argument X, 0.25 <= |X| < 70log2. For |X| < 0.25, it takes
41| approximately ???/??? cycles. For the less common arguments, 41| approximately ??? / ??? cycles. For the less common arguments,
42| depending on their values, the program may run faster or slower -- 42| depending on their values, the program may run faster or slower --
43| but no worse than 10% slower even in the extreme cases. 43| but no worse than 10% slower even in the extreme cases.
44| 44|
diff --git a/arch/m68k/mac/baboon.c b/arch/m68k/mac/baboon.c
index c7b25b0aacff..245d16d078ad 100644
--- a/arch/m68k/mac/baboon.c
+++ b/arch/m68k/mac/baboon.c
@@ -18,11 +18,14 @@
18#include <asm/macints.h> 18#include <asm/macints.h>
19#include <asm/mac_baboon.h> 19#include <asm/mac_baboon.h>
20 20
21/* #define DEBUG_BABOON */
22/* #define DEBUG_IRQS */ 21/* #define DEBUG_IRQS */
23 22
23extern void mac_enable_irq(unsigned int);
24extern void mac_disable_irq(unsigned int);
25
24int baboon_present; 26int baboon_present;
25static volatile struct baboon *baboon; 27static volatile struct baboon *baboon;
28static unsigned char baboon_disabled;
26 29
27#if 0 30#if 0
28extern int macide_ack_intr(struct ata_channel *); 31extern int macide_ack_intr(struct ata_channel *);
@@ -88,34 +91,51 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
88 91
89void __init baboon_register_interrupts(void) 92void __init baboon_register_interrupts(void)
90{ 93{
91 request_irq(IRQ_NUBUS_C, baboon_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST, 94 baboon_disabled = 0;
92 "baboon", (void *) baboon); 95 request_irq(IRQ_NUBUS_C, baboon_irq, 0, "baboon", (void *)baboon);
93} 96}
94 97
95void baboon_irq_enable(int irq) { 98/*
99 * The means for masking individual baboon interrupts remains a mystery, so
100 * enable the umbrella interrupt only when no baboon interrupt is disabled.
101 */
102
103void baboon_irq_enable(int irq)
104{
105 int irq_idx = IRQ_IDX(irq);
106
96#ifdef DEBUG_IRQUSE 107#ifdef DEBUG_IRQUSE
97 printk("baboon_irq_enable(%d)\n", irq); 108 printk("baboon_irq_enable(%d)\n", irq);
98#endif 109#endif
99 /* FIXME: figure out how to mask and unmask baboon interrupt sources */ 110
100 enable_irq(IRQ_NUBUS_C); 111 baboon_disabled &= ~(1 << irq_idx);
112 if (!baboon_disabled)
113 mac_enable_irq(IRQ_NUBUS_C);
101} 114}
102 115
103void baboon_irq_disable(int irq) { 116void baboon_irq_disable(int irq)
117{
118 int irq_idx = IRQ_IDX(irq);
119
104#ifdef DEBUG_IRQUSE 120#ifdef DEBUG_IRQUSE
105 printk("baboon_irq_disable(%d)\n", irq); 121 printk("baboon_irq_disable(%d)\n", irq);
106#endif 122#endif
107 disable_irq(IRQ_NUBUS_C); 123
124 baboon_disabled |= 1 << irq_idx;
125 if (baboon_disabled)
126 mac_disable_irq(IRQ_NUBUS_C);
108} 127}
109 128
110void baboon_irq_clear(int irq) { 129void baboon_irq_clear(int irq)
111 int irq_idx = IRQ_IDX(irq); 130{
131 int irq_idx = IRQ_IDX(irq);
112 132
113 baboon->mb_ifr &= ~(1 << irq_idx); 133 baboon->mb_ifr &= ~(1 << irq_idx);
114} 134}
115 135
116int baboon_irq_pending(int irq) 136int baboon_irq_pending(int irq)
117{ 137{
118 int irq_idx = IRQ_IDX(irq); 138 int irq_idx = IRQ_IDX(irq);
119 139
120 return baboon->mb_ifr & (1 << irq_idx); 140 return baboon->mb_ifr & (1 << irq_idx);
121} 141}
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index c45e18449f32..8819b97be324 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -162,10 +162,7 @@ void __init config_mac(void)
162 mach_init_IRQ = mac_init_IRQ; 162 mach_init_IRQ = mac_init_IRQ;
163 mach_get_model = mac_get_model; 163 mach_get_model = mac_get_model;
164 mach_gettimeoffset = mac_gettimeoffset; 164 mach_gettimeoffset = mac_gettimeoffset;
165#warning move to adb/via init
166#if 0
167 mach_hwclk = mac_hwclk; 165 mach_hwclk = mac_hwclk;
168#endif
169 mach_set_clock_mmss = mac_set_clock_mmss; 166 mach_set_clock_mmss = mac_set_clock_mmss;
170 mach_reset = mac_reset; 167 mach_reset = mac_reset;
171 mach_halt = mac_poweroff; 168 mach_halt = mac_poweroff;
diff --git a/arch/m68k/mac/debug.c b/arch/m68k/mac/debug.c
index 2165740786a5..65dd77a742a3 100644
--- a/arch/m68k/mac/debug.c
+++ b/arch/m68k/mac/debug.c
@@ -24,7 +24,6 @@
24#define BOOTINFO_COMPAT_1_0 24#define BOOTINFO_COMPAT_1_0
25#include <asm/setup.h> 25#include <asm/setup.h>
26#include <asm/bootinfo.h> 26#include <asm/bootinfo.h>
27#include <asm/machw.h>
28#include <asm/macints.h> 27#include <asm/macints.h>
29 28
30extern unsigned long mac_videobase; 29extern unsigned long mac_videobase;
diff --git a/arch/m68k/mac/macints.c b/arch/m68k/mac/macints.c
index ecddac4a02b9..82e560c076ce 100644
--- a/arch/m68k/mac/macints.c
+++ b/arch/m68k/mac/macints.c
@@ -127,7 +127,6 @@
127#include <asm/irq.h> 127#include <asm/irq.h>
128#include <asm/traps.h> 128#include <asm/traps.h>
129#include <asm/bootinfo.h> 129#include <asm/bootinfo.h>
130#include <asm/machw.h>
131#include <asm/macintosh.h> 130#include <asm/macintosh.h>
132#include <asm/mac_via.h> 131#include <asm/mac_via.h>
133#include <asm/mac_psc.h> 132#include <asm/mac_psc.h>
@@ -215,8 +214,8 @@ irqreturn_t mac_debug_handler(int, void *);
215 214
216/* #define DEBUG_MACINTS */ 215/* #define DEBUG_MACINTS */
217 216
218static void mac_enable_irq(unsigned int irq); 217void mac_enable_irq(unsigned int irq);
219static void mac_disable_irq(unsigned int irq); 218void mac_disable_irq(unsigned int irq);
220 219
221static struct irq_controller mac_irq_controller = { 220static struct irq_controller mac_irq_controller = {
222 .name = "mac", 221 .name = "mac",
@@ -275,7 +274,7 @@ void __init mac_init_IRQ(void)
275 * These routines are just dispatchers to the VIA/OSS/PSC routines. 274 * These routines are just dispatchers to the VIA/OSS/PSC routines.
276 */ 275 */
277 276
278static void mac_enable_irq(unsigned int irq) 277void mac_enable_irq(unsigned int irq)
279{ 278{
280 int irq_src = IRQ_SRC(irq); 279 int irq_src = IRQ_SRC(irq);
281 280
@@ -308,7 +307,7 @@ static void mac_enable_irq(unsigned int irq)
308 } 307 }
309} 308}
310 309
311static void mac_disable_irq(unsigned int irq) 310void mac_disable_irq(unsigned int irq)
312{ 311{
313 int irq_src = IRQ_SRC(irq); 312 int irq_src = IRQ_SRC(irq);
314 313
diff --git a/arch/m68k/mac/misc.c b/arch/m68k/mac/misc.c
index 56d1f5676ade..a44c7086ab39 100644
--- a/arch/m68k/mac/misc.c
+++ b/arch/m68k/mac/misc.c
@@ -93,7 +93,7 @@ static void cuda_write_pram(int offset, __u8 data)
93#define cuda_write_pram NULL 93#define cuda_write_pram NULL
94#endif 94#endif
95 95
96#ifdef CONFIG_ADB_PMU68K 96#if 0 /* def CONFIG_ADB_PMU68K */
97static long pmu_read_time(void) 97static long pmu_read_time(void)
98{ 98{
99 struct adb_request req; 99 struct adb_request req;
@@ -148,7 +148,7 @@ static void pmu_write_pram(int offset, __u8 data)
148#define pmu_write_pram NULL 148#define pmu_write_pram NULL
149#endif 149#endif
150 150
151#ifdef CONFIG_ADB_MACIISI 151#if 0 /* def CONFIG_ADB_MACIISI */
152extern int maciisi_request(struct adb_request *req, 152extern int maciisi_request(struct adb_request *req,
153 void (*done)(struct adb_request *), int nbytes, ...); 153 void (*done)(struct adb_request *), int nbytes, ...);
154 154
@@ -717,13 +717,18 @@ int mac_hwclk(int op, struct rtc_time *t)
717 unmktime(now, 0, 717 unmktime(now, 0,
718 &t->tm_year, &t->tm_mon, &t->tm_mday, 718 &t->tm_year, &t->tm_mon, &t->tm_mday,
719 &t->tm_hour, &t->tm_min, &t->tm_sec); 719 &t->tm_hour, &t->tm_min, &t->tm_sec);
720#if 0
720 printk("mac_hwclk: read %04d-%02d-%-2d %02d:%02d:%02d\n", 721 printk("mac_hwclk: read %04d-%02d-%-2d %02d:%02d:%02d\n",
721 t->tm_year + 1900, t->tm_mon + 1, t->tm_mday, t->tm_hour, t->tm_min, t->tm_sec); 722 t->tm_year + 1900, t->tm_mon + 1, t->tm_mday,
723 t->tm_hour, t->tm_min, t->tm_sec);
724#endif
722 } else { /* write */ 725 } else { /* write */
726#if 0
723 printk("mac_hwclk: tried to write %04d-%02d-%-2d %02d:%02d:%02d\n", 727 printk("mac_hwclk: tried to write %04d-%02d-%-2d %02d:%02d:%02d\n",
724 t->tm_year + 1900, t->tm_mon + 1, t->tm_mday, t->tm_hour, t->tm_min, t->tm_sec); 728 t->tm_year + 1900, t->tm_mon + 1, t->tm_mday,
729 t->tm_hour, t->tm_min, t->tm_sec);
730#endif
725 731
726#if 0 /* it trashes my rtc */
727 now = mktime(t->tm_year + 1900, t->tm_mon + 1, t->tm_mday, 732 now = mktime(t->tm_year + 1900, t->tm_mon + 1, t->tm_mday,
728 t->tm_hour, t->tm_min, t->tm_sec); 733 t->tm_hour, t->tm_min, t->tm_sec);
729 734
@@ -742,7 +747,6 @@ int mac_hwclk(int op, struct rtc_time *t)
742 case MAC_ADB_IISI: 747 case MAC_ADB_IISI:
743 maciisi_write_time(now); 748 maciisi_write_time(now);
744 } 749 }
745#endif
746 } 750 }
747 return 0; 751 return 0;
748} 752}
diff --git a/arch/m68k/mac/oss.c b/arch/m68k/mac/oss.c
index 43d83e054b8e..8426501119ca 100644
--- a/arch/m68k/mac/oss.c
+++ b/arch/m68k/mac/oss.c
@@ -21,7 +21,6 @@
21#include <linux/init.h> 21#include <linux/init.h>
22 22
23#include <asm/bootinfo.h> 23#include <asm/bootinfo.h>
24#include <asm/machw.h>
25#include <asm/macintosh.h> 24#include <asm/macintosh.h>
26#include <asm/macints.h> 25#include <asm/macints.h>
27#include <asm/mac_via.h> 26#include <asm/mac_via.h>
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index 1bdb03c73c0f..f01d418e64fe 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -32,15 +32,10 @@
32#include <asm/bootinfo.h> 32#include <asm/bootinfo.h>
33#include <asm/macintosh.h> 33#include <asm/macintosh.h>
34#include <asm/macints.h> 34#include <asm/macints.h>
35#include <asm/machw.h>
36#include <asm/mac_via.h> 35#include <asm/mac_via.h>
37#include <asm/mac_psc.h> 36#include <asm/mac_psc.h>
38 37
39volatile __u8 *via1, *via2; 38volatile __u8 *via1, *via2;
40#if 0
41/* See note in mac_via.h about how this is possibly not useful */
42volatile long *via_memory_bogon=(long *)&via_memory_bogon;
43#endif
44int rbv_present; 39int rbv_present;
45int via_alt_mapping; 40int via_alt_mapping;
46EXPORT_SYMBOL(via_alt_mapping); 41EXPORT_SYMBOL(via_alt_mapping);
@@ -66,7 +61,7 @@ static int gIER,gIFR,gBufA,gBufB;
66#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF) 61#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF)
67#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8) 62#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8)
68 63
69/* To disable a NuBus slot on Quadras we make the slot IRQ lines outputs, set 64/* To disable a NuBus slot on Quadras we make that slot IRQ line an output set
70 * high. On RBV we just use the slot interrupt enable register. On Macs with 65 * high. On RBV we just use the slot interrupt enable register. On Macs with
71 * genuine VIA chips we must use nubus_disabled to keep track of disabled slot 66 * genuine VIA chips we must use nubus_disabled to keep track of disabled slot
72 * interrupts. When any slot IRQ is disabled we mask the (edge triggered) CA1 67 * interrupts. When any slot IRQ is disabled we mask the (edge triggered) CA1
@@ -180,7 +175,7 @@ void __init via_init(void)
180 via1[vT1CH] = 0; 175 via1[vT1CH] = 0;
181 via1[vT2CL] = 0; 176 via1[vT2CL] = 0;
182 via1[vT2CH] = 0; 177 via1[vT2CH] = 0;
183 via1[vACR] &= 0x3F; 178 via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
184 via1[vACR] &= ~0x03; /* disable port A & B latches */ 179 via1[vACR] &= ~0x03; /* disable port A & B latches */
185 180
186 /* 181 /*
@@ -203,40 +198,41 @@ void __init via_init(void)
203 198
204 /* Everything below this point is VIA2/RBV only... */ 199 /* Everything below this point is VIA2/RBV only... */
205 200
206 if (oss_present) return; 201 if (oss_present)
202 return;
207 203
208#if 1
209 /* Some machines support an alternate IRQ mapping that spreads */ 204 /* Some machines support an alternate IRQ mapping that spreads */
210 /* Ethernet and Sound out to their own autolevel IRQs and moves */ 205 /* Ethernet and Sound out to their own autolevel IRQs and moves */
211 /* VIA1 to level 6. A/UX uses this mapping and we do too. Note */ 206 /* VIA1 to level 6. A/UX uses this mapping and we do too. Note */
212 /* that the IIfx emulates this alternate mapping using the OSS. */ 207 /* that the IIfx emulates this alternate mapping using the OSS. */
213 208
214 switch(macintosh_config->ident) { 209 via_alt_mapping = 0;
215 case MAC_MODEL_P475: 210 if (macintosh_config->via_type == MAC_VIA_QUADRA)
216 case MAC_MODEL_P475F: 211 switch (macintosh_config->ident) {
217 case MAC_MODEL_P575: 212 case MAC_MODEL_C660:
218 case MAC_MODEL_Q605: 213 case MAC_MODEL_Q840:
219 case MAC_MODEL_Q605_ACC: 214 /* not applicable */
220 case MAC_MODEL_C610: 215 break;
221 case MAC_MODEL_Q610: 216 case MAC_MODEL_P588:
222 case MAC_MODEL_Q630: 217 case MAC_MODEL_TV:
223 case MAC_MODEL_C650: 218 case MAC_MODEL_PB140:
224 case MAC_MODEL_Q650: 219 case MAC_MODEL_PB145:
225 case MAC_MODEL_Q700: 220 case MAC_MODEL_PB160:
226 case MAC_MODEL_Q800: 221 case MAC_MODEL_PB165:
227 case MAC_MODEL_Q900: 222 case MAC_MODEL_PB165C:
228 case MAC_MODEL_Q950: 223 case MAC_MODEL_PB170:
224 case MAC_MODEL_PB180:
225 case MAC_MODEL_PB180C:
226 case MAC_MODEL_PB190:
227 case MAC_MODEL_PB520:
228 /* not yet tested */
229 break;
230 default:
229 via_alt_mapping = 1; 231 via_alt_mapping = 1;
230 via1[vDirB] |= 0x40; 232 via1[vDirB] |= 0x40;
231 via1[vBufB] &= ~0x40; 233 via1[vBufB] &= ~0x40;
232 break; 234 break;
233 default: 235 }
234 via_alt_mapping = 0;
235 break;
236 }
237#else
238 via_alt_mapping = 0;
239#endif
240 236
241 /* 237 /*
242 * Now initialize VIA2. For RBV we just kill all interrupts; 238 * Now initialize VIA2. For RBV we just kill all interrupts;
@@ -252,14 +248,17 @@ void __init via_init(void)
252 via2[vT1CH] = 0; 248 via2[vT1CH] = 0;
253 via2[vT2CL] = 0; 249 via2[vT2CL] = 0;
254 via2[vT2CH] = 0; 250 via2[vT2CH] = 0;
255 via2[vACR] &= 0x3F; 251 via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
256 via2[vACR] &= ~0x03; /* disable port A & B latches */ 252 via2[vACR] &= ~0x03; /* disable port A & B latches */
257 } 253 }
258 254
259 /* 255 /*
260 * Set vPCR for SCSI interrupts (but not on RBV) 256 * Set vPCR for control line interrupts (but not on RBV)
261 */ 257 */
262 if (!rbv_present) { 258 if (!rbv_present) {
259 /* For all VIA types, CA1 (SLOTS IRQ) and CB1 (ASC IRQ)
260 * are made negative edge triggered here.
261 */
263 if (macintosh_config->scsi_type == MAC_SCSI_OLD) { 262 if (macintosh_config->scsi_type == MAC_SCSI_OLD) {
264 /* CB2 (IRQ) indep. input, positive edge */ 263 /* CB2 (IRQ) indep. input, positive edge */
265 /* CA2 (DRQ) indep. input, positive edge */ 264 /* CA2 (DRQ) indep. input, positive edge */
@@ -466,21 +465,6 @@ irqreturn_t via1_irq(int irq, void *dev_id)
466 ++irq_num; 465 ++irq_num;
467 irq_bit <<= 1; 466 irq_bit <<= 1;
468 } while (events >= irq_bit); 467 } while (events >= irq_bit);
469
470#if 0 /* freakin' pmu is doing weird stuff */
471 if (!oss_present) {
472 /* This (still) seems to be necessary to get IDE
473 working. However, if you enable VBL interrupts,
474 you're screwed... */
475 /* FIXME: should we check the SLOTIRQ bit before
476 pulling this stunt? */
477 /* No, it won't be set. that's why we're doing this. */
478 via_irq_disable(IRQ_MAC_NUBUS);
479 via_irq_clear(IRQ_MAC_NUBUS);
480 m68k_handle_int(IRQ_MAC_NUBUS);
481 via_irq_enable(IRQ_MAC_NUBUS);
482 }
483#endif
484 return IRQ_HANDLED; 468 return IRQ_HANDLED;
485} 469}
486 470
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f4af967a6b30..a5255e7c79e0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -653,7 +653,7 @@ config GENERIC_CMOS_UPDATE
653 bool 653 bool
654 default y 654 default y
655 655
656config SCHED_NO_NO_OMIT_FRAME_POINTER 656config SCHED_OMIT_FRAME_POINTER
657 bool 657 bool
658 default y 658 default y
659 659
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index 765c8e287d2b..364ca8938807 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -48,7 +48,7 @@ config RUNTIME_DEBUG
48 help 48 help
49 If you say Y here, some debugging macros will do run-time checking. 49 If you say Y here, some debugging macros will do run-time checking.
50 If you say N here, those macros will mostly turn to no-ops. See 50 If you say N here, those macros will mostly turn to no-ops. See
51 include/asm-mips/debug.h for debuging macros. 51 arch/mips/include/asm/debug.h for debugging macros.
52 If unsure, say N. 52 If unsure, say N.
53 53
54endmenu 54endmenu
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index fe4699df9626..de4c7a0a96dd 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -1,71 +1,71 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20 3# Linux kernel version: 2.6.28-rc7
4# Tue Feb 20 21:47:33 2007 4# Wed Dec 10 14:39:08 2008
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
8# 8#
9# Machine selection 9# Machine selection
10# 10#
11CONFIG_ZONE_DMA=y 11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set 12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_BCM47XX is not set
26# CONFIG_MIPS_COBALT is not set 14# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set
29# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
30# CONFIG_WR_PPMC is not set
31# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
32# CONFIG_MOMENCO_JAGUAR_ATX is not set 21# CONFIG_MACH_EMMA is not set
33# CONFIG_MIPS_XXS1500 is not set 22# CONFIG_MACH_VR41XX is not set
23# CONFIG_NXP_STB220 is not set
24# CONFIG_NXP_STB225 is not set
34# CONFIG_PNX8550_JBS is not set 25# CONFIG_PNX8550_JBS is not set
35# CONFIG_PNX8550_STB810 is not set 26# CONFIG_PNX8550_STB810 is not set
36# CONFIG_MACH_VR41XX is not set 27# CONFIG_PMC_MSP is not set
37# CONFIG_PMC_YOSEMITE is not set 28# CONFIG_PMC_YOSEMITE is not set
38# CONFIG_MARKEINS is not set
39# CONFIG_SGI_IP22 is not set 29# CONFIG_SGI_IP22 is not set
40# CONFIG_SGI_IP27 is not set 30# CONFIG_SGI_IP27 is not set
31# CONFIG_SGI_IP28 is not set
41CONFIG_SGI_IP32=y 32CONFIG_SGI_IP32=y
42# CONFIG_SIBYTE_BIGSUR is not set
43# CONFIG_SIBYTE_SWARM is not set
44# CONFIG_SIBYTE_SENTOSA is not set
45# CONFIG_SIBYTE_RHONE is not set
46# CONFIG_SIBYTE_CARMEL is not set
47# CONFIG_SIBYTE_LITTLESUR is not set
48# CONFIG_SIBYTE_CRHINE is not set 33# CONFIG_SIBYTE_CRHINE is not set
34# CONFIG_SIBYTE_CARMEL is not set
49# CONFIG_SIBYTE_CRHONE is not set 35# CONFIG_SIBYTE_CRHONE is not set
36# CONFIG_SIBYTE_RHONE is not set
37# CONFIG_SIBYTE_SWARM is not set
38# CONFIG_SIBYTE_LITTLESUR is not set
39# CONFIG_SIBYTE_SENTOSA is not set
40# CONFIG_SIBYTE_BIGSUR is not set
50# CONFIG_SNI_RM is not set 41# CONFIG_SNI_RM is not set
51# CONFIG_TOSHIBA_JMR3927 is not set 42# CONFIG_MACH_TX39XX is not set
52# CONFIG_TOSHIBA_RBTX4927 is not set 43# CONFIG_MACH_TX49XX is not set
53# CONFIG_TOSHIBA_RBTX4938 is not set 44# CONFIG_MIKROTIK_RB532 is not set
45# CONFIG_WR_PPMC is not set
54CONFIG_RWSEM_GENERIC_SPINLOCK=y 46CONFIG_RWSEM_GENERIC_SPINLOCK=y
55# CONFIG_ARCH_HAS_ILOG2_U32 is not set 47# CONFIG_ARCH_HAS_ILOG2_U32 is not set
56# CONFIG_ARCH_HAS_ILOG2_U64 is not set 48# CONFIG_ARCH_HAS_ILOG2_U64 is not set
49CONFIG_ARCH_SUPPORTS_OPROFILE=y
57CONFIG_GENERIC_FIND_NEXT_BIT=y 50CONFIG_GENERIC_FIND_NEXT_BIT=y
58CONFIG_GENERIC_HWEIGHT=y 51CONFIG_GENERIC_HWEIGHT=y
59CONFIG_GENERIC_CALIBRATE_DELAY=y 52CONFIG_GENERIC_CALIBRATE_DELAY=y
53CONFIG_GENERIC_CLOCKEVENTS=y
60CONFIG_GENERIC_TIME=y 54CONFIG_GENERIC_TIME=y
55CONFIG_GENERIC_CMOS_UPDATE=y
61CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 56CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
62# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 57# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
63CONFIG_ARC=y 58CONFIG_ARC=y
59CONFIG_CEVT_R4K=y
60CONFIG_CSRC_R4K=y
64CONFIG_DMA_NONCOHERENT=y 61CONFIG_DMA_NONCOHERENT=y
65CONFIG_DMA_NEED_PCI_MAP_STATE=y 62CONFIG_DMA_NEED_PCI_MAP_STATE=y
63# CONFIG_HOTPLUG_CPU is not set
64# CONFIG_NO_IOPORT is not set
66CONFIG_CPU_BIG_ENDIAN=y 65CONFIG_CPU_BIG_ENDIAN=y
67# CONFIG_CPU_LITTLE_ENDIAN is not set 66# CONFIG_CPU_LITTLE_ENDIAN is not set
68CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 67CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
68CONFIG_IRQ_CPU=y
69CONFIG_ARC32=y 69CONFIG_ARC32=y
70CONFIG_BOOT_ELF32=y 70CONFIG_BOOT_ELF32=y
71CONFIG_MIPS_L1_CACHE_SHIFT=5 71CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -75,6 +75,7 @@ CONFIG_ARC_PROMLIB=y
75# 75#
76# CPU selection 76# CPU selection
77# 77#
78# CONFIG_CPU_LOONGSON2 is not set
78# CONFIG_CPU_MIPS32_R1 is not set 79# CONFIG_CPU_MIPS32_R1 is not set
79# CONFIG_CPU_MIPS32_R2 is not set 80# CONFIG_CPU_MIPS32_R2 is not set
80# CONFIG_CPU_MIPS64_R1 is not set 81# CONFIG_CPU_MIPS64_R1 is not set
@@ -87,6 +88,7 @@ CONFIG_ARC_PROMLIB=y
87# CONFIG_CPU_TX49XX is not set 88# CONFIG_CPU_TX49XX is not set
88CONFIG_CPU_R5000=y 89CONFIG_CPU_R5000=y
89# CONFIG_CPU_R5432 is not set 90# CONFIG_CPU_R5432 is not set
91# CONFIG_CPU_R5500 is not set
90# CONFIG_CPU_R6000 is not set 92# CONFIG_CPU_R6000 is not set
91# CONFIG_CPU_NEVADA is not set 93# CONFIG_CPU_NEVADA is not set
92# CONFIG_CPU_R8000 is not set 94# CONFIG_CPU_R8000 is not set
@@ -116,65 +118,73 @@ CONFIG_RM7000_CPU_SCACHE=y
116CONFIG_MIPS_MT_DISABLED=y 118CONFIG_MIPS_MT_DISABLED=y
117# CONFIG_MIPS_MT_SMP is not set 119# CONFIG_MIPS_MT_SMP is not set
118# CONFIG_MIPS_MT_SMTC is not set 120# CONFIG_MIPS_MT_SMTC is not set
119# CONFIG_MIPS_VPE_LOADER is not set
120CONFIG_CPU_HAS_LLSC=y 121CONFIG_CPU_HAS_LLSC=y
121CONFIG_CPU_HAS_SYNC=y 122CONFIG_CPU_HAS_SYNC=y
122CONFIG_GENERIC_HARDIRQS=y 123CONFIG_GENERIC_HARDIRQS=y
123CONFIG_GENERIC_IRQ_PROBE=y 124CONFIG_GENERIC_IRQ_PROBE=y
124CONFIG_ARCH_FLATMEM_ENABLE=y 125CONFIG_ARCH_FLATMEM_ENABLE=y
126CONFIG_ARCH_POPULATES_NODE_MAP=y
125CONFIG_SELECT_MEMORY_MODEL=y 127CONFIG_SELECT_MEMORY_MODEL=y
126CONFIG_FLATMEM_MANUAL=y 128CONFIG_FLATMEM_MANUAL=y
127# CONFIG_DISCONTIGMEM_MANUAL is not set 129# CONFIG_DISCONTIGMEM_MANUAL is not set
128# CONFIG_SPARSEMEM_MANUAL is not set 130# CONFIG_SPARSEMEM_MANUAL is not set
129CONFIG_FLATMEM=y 131CONFIG_FLATMEM=y
130CONFIG_FLAT_NODE_MEM_MAP=y 132CONFIG_FLAT_NODE_MEM_MAP=y
131# CONFIG_SPARSEMEM_STATIC is not set 133CONFIG_PAGEFLAGS_EXTENDED=y
132CONFIG_SPLIT_PTLOCK_CPUS=4 134CONFIG_SPLIT_PTLOCK_CPUS=4
133CONFIG_RESOURCES_64BIT=y 135CONFIG_RESOURCES_64BIT=y
134CONFIG_ZONE_DMA_FLAG=1 136CONFIG_PHYS_ADDR_T_64BIT=y
137CONFIG_ZONE_DMA_FLAG=0
138CONFIG_VIRT_TO_BUS=y
139CONFIG_UNEVICTABLE_LRU=y
140# CONFIG_NO_HZ is not set
141# CONFIG_HIGH_RES_TIMERS is not set
142CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
135# CONFIG_HZ_48 is not set 143# CONFIG_HZ_48 is not set
136# CONFIG_HZ_100 is not set 144# CONFIG_HZ_100 is not set
137# CONFIG_HZ_128 is not set 145# CONFIG_HZ_128 is not set
138# CONFIG_HZ_250 is not set 146CONFIG_HZ_250=y
139# CONFIG_HZ_256 is not set 147# CONFIG_HZ_256 is not set
140CONFIG_HZ_1000=y 148# CONFIG_HZ_1000 is not set
141# CONFIG_HZ_1024 is not set 149# CONFIG_HZ_1024 is not set
142CONFIG_SYS_SUPPORTS_ARBIT_HZ=y 150CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
143CONFIG_HZ=1000 151CONFIG_HZ=250
144# CONFIG_PREEMPT_NONE is not set 152CONFIG_PREEMPT_NONE=y
145CONFIG_PREEMPT_VOLUNTARY=y 153# CONFIG_PREEMPT_VOLUNTARY is not set
146# CONFIG_PREEMPT is not set 154# CONFIG_PREEMPT is not set
147# CONFIG_KEXEC is not set 155# CONFIG_KEXEC is not set
156# CONFIG_SECCOMP is not set
148CONFIG_LOCKDEP_SUPPORT=y 157CONFIG_LOCKDEP_SUPPORT=y
149CONFIG_STACKTRACE_SUPPORT=y 158CONFIG_STACKTRACE_SUPPORT=y
150CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 159CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
151 160
152# 161#
153# Code maturity level options 162# General setup
154# 163#
155CONFIG_EXPERIMENTAL=y 164CONFIG_EXPERIMENTAL=y
156CONFIG_BROKEN_ON_SMP=y 165CONFIG_BROKEN_ON_SMP=y
157CONFIG_INIT_ENV_ARG_LIMIT=32 166CONFIG_INIT_ENV_ARG_LIMIT=32
158
159#
160# General setup
161#
162CONFIG_LOCALVERSION="" 167CONFIG_LOCALVERSION=""
163CONFIG_LOCALVERSION_AUTO=y 168CONFIG_LOCALVERSION_AUTO=y
164CONFIG_SWAP=y 169CONFIG_SWAP=y
165CONFIG_SYSVIPC=y 170CONFIG_SYSVIPC=y
166# CONFIG_IPC_NS is not set
167CONFIG_SYSVIPC_SYSCTL=y 171CONFIG_SYSVIPC_SYSCTL=y
168# CONFIG_POSIX_MQUEUE is not set 172CONFIG_POSIX_MQUEUE=y
169CONFIG_BSD_PROCESS_ACCT=y 173CONFIG_BSD_PROCESS_ACCT=y
170# CONFIG_BSD_PROCESS_ACCT_V3 is not set 174# CONFIG_BSD_PROCESS_ACCT_V3 is not set
171# CONFIG_TASKSTATS is not set 175# CONFIG_TASKSTATS is not set
172# CONFIG_UTS_NS is not set 176CONFIG_AUDIT=y
173# CONFIG_AUDIT is not set 177CONFIG_IKCONFIG=y
174# CONFIG_IKCONFIG is not set 178CONFIG_IKCONFIG_PROC=y
179CONFIG_LOG_BUF_SHIFT=14
180# CONFIG_CGROUPS is not set
181# CONFIG_GROUP_SCHED is not set
175CONFIG_SYSFS_DEPRECATED=y 182CONFIG_SYSFS_DEPRECATED=y
183CONFIG_SYSFS_DEPRECATED_V2=y
176CONFIG_RELAY=y 184CONFIG_RELAY=y
177# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 185# CONFIG_NAMESPACES is not set
186# CONFIG_BLK_DEV_INITRD is not set
187CONFIG_CC_OPTIMIZE_FOR_SIZE=y
178CONFIG_SYSCTL=y 188CONFIG_SYSCTL=y
179CONFIG_EMBEDDED=y 189CONFIG_EMBEDDED=y
180CONFIG_SYSCTL_SYSCALL=y 190CONFIG_SYSCTL_SYSCALL=y
@@ -184,27 +194,43 @@ CONFIG_HOTPLUG=y
184CONFIG_PRINTK=y 194CONFIG_PRINTK=y
185CONFIG_BUG=y 195CONFIG_BUG=y
186CONFIG_ELF_CORE=y 196CONFIG_ELF_CORE=y
197CONFIG_PCSPKR_PLATFORM=y
198CONFIG_COMPAT_BRK=y
187CONFIG_BASE_FULL=y 199CONFIG_BASE_FULL=y
188CONFIG_FUTEX=y 200CONFIG_FUTEX=y
201CONFIG_ANON_INODES=y
189CONFIG_EPOLL=y 202CONFIG_EPOLL=y
203CONFIG_SIGNALFD=y
204CONFIG_TIMERFD=y
205CONFIG_EVENTFD=y
190CONFIG_SHMEM=y 206CONFIG_SHMEM=y
191CONFIG_SLAB=y 207CONFIG_AIO=y
192CONFIG_VM_EVENT_COUNTERS=y 208CONFIG_VM_EVENT_COUNTERS=y
209CONFIG_PCI_QUIRKS=y
210CONFIG_SLAB=y
211# CONFIG_SLUB is not set
212# CONFIG_SLOB is not set
213CONFIG_PROFILING=y
214# CONFIG_MARKERS is not set
215CONFIG_OPROFILE=m
216CONFIG_HAVE_OPROFILE=y
217# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
218CONFIG_SLABINFO=y
193CONFIG_RT_MUTEXES=y 219CONFIG_RT_MUTEXES=y
194# CONFIG_TINY_SHMEM is not set 220# CONFIG_TINY_SHMEM is not set
195CONFIG_BASE_SMALL=0 221CONFIG_BASE_SMALL=0
196# CONFIG_SLOB is not set 222CONFIG_MODULES=y
197 223# CONFIG_MODULE_FORCE_LOAD is not set
198# 224CONFIG_MODULE_UNLOAD=y
199# Loadable module support 225# CONFIG_MODULE_FORCE_UNLOAD is not set
200# 226# CONFIG_MODVERSIONS is not set
201# CONFIG_MODULES is not set 227# CONFIG_MODULE_SRCVERSION_ALL is not set
202 228CONFIG_KMOD=y
203#
204# Block layer
205#
206CONFIG_BLOCK=y 229CONFIG_BLOCK=y
207# CONFIG_BLK_DEV_IO_TRACE is not set 230# CONFIG_BLK_DEV_IO_TRACE is not set
231# CONFIG_BLK_DEV_BSG is not set
232# CONFIG_BLK_DEV_INTEGRITY is not set
233CONFIG_BLOCK_COMPAT=y
208 234
209# 235#
210# IO Schedulers 236# IO Schedulers
@@ -213,59 +239,50 @@ CONFIG_IOSCHED_NOOP=y
213CONFIG_IOSCHED_AS=y 239CONFIG_IOSCHED_AS=y
214CONFIG_IOSCHED_DEADLINE=y 240CONFIG_IOSCHED_DEADLINE=y
215CONFIG_IOSCHED_CFQ=y 241CONFIG_IOSCHED_CFQ=y
216CONFIG_DEFAULT_AS=y 242# CONFIG_DEFAULT_AS is not set
217# CONFIG_DEFAULT_DEADLINE is not set 243# CONFIG_DEFAULT_DEADLINE is not set
218# CONFIG_DEFAULT_CFQ is not set 244CONFIG_DEFAULT_CFQ=y
219# CONFIG_DEFAULT_NOOP is not set 245# CONFIG_DEFAULT_NOOP is not set
220CONFIG_DEFAULT_IOSCHED="anticipatory" 246CONFIG_DEFAULT_IOSCHED="cfq"
247CONFIG_CLASSIC_RCU=y
248# CONFIG_FREEZER is not set
221 249
222# 250#
223# Bus options (PCI, PCMCIA, EISA, ISA, TC) 251# Bus options (PCI, PCMCIA, EISA, ISA, TC)
224# 252#
225CONFIG_HW_HAS_PCI=y 253CONFIG_HW_HAS_PCI=y
226CONFIG_PCI=y 254CONFIG_PCI=y
255CONFIG_PCI_DOMAINS=y
256# CONFIG_ARCH_SUPPORTS_MSI is not set
257# CONFIG_PCI_LEGACY is not set
227CONFIG_MMU=y 258CONFIG_MMU=y
228
229#
230# PCCARD (PCMCIA/CardBus) support
231#
232# CONFIG_PCCARD is not set 259# CONFIG_PCCARD is not set
233
234#
235# PCI Hotplug Support
236#
237# CONFIG_HOTPLUG_PCI is not set 260# CONFIG_HOTPLUG_PCI is not set
238 261
239# 262#
240# Executable file formats 263# Executable file formats
241# 264#
242CONFIG_BINFMT_ELF=y 265CONFIG_BINFMT_ELF=y
266# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
267# CONFIG_HAVE_AOUT is not set
243CONFIG_BINFMT_MISC=y 268CONFIG_BINFMT_MISC=y
244# CONFIG_BUILD_ELF64 is not set
245CONFIG_MIPS32_COMPAT=y 269CONFIG_MIPS32_COMPAT=y
246CONFIG_COMPAT=y 270CONFIG_COMPAT=y
247CONFIG_SYSVIPC_COMPAT=y 271CONFIG_SYSVIPC_COMPAT=y
248CONFIG_MIPS32_O32=y 272CONFIG_MIPS32_O32=y
249# CONFIG_MIPS32_N32 is not set 273CONFIG_MIPS32_N32=y
250CONFIG_BINFMT_ELF32=y 274CONFIG_BINFMT_ELF32=y
251 275
252# 276#
253# Power management options 277# Power management options
254# 278#
255CONFIG_PM=y 279CONFIG_ARCH_SUSPEND_POSSIBLE=y
256# CONFIG_PM_LEGACY is not set 280# CONFIG_PM is not set
257# CONFIG_PM_DEBUG is not set
258# CONFIG_PM_SYSFS_DEPRECATED is not set
259
260#
261# Networking
262#
263CONFIG_NET=y 281CONFIG_NET=y
264 282
265# 283#
266# Networking options 284# Networking options
267# 285#
268# CONFIG_NETDEBUG is not set
269CONFIG_PACKET=y 286CONFIG_PACKET=y
270CONFIG_PACKET_MMAP=y 287CONFIG_PACKET_MMAP=y
271CONFIG_UNIX=y 288CONFIG_UNIX=y
@@ -273,56 +290,83 @@ CONFIG_XFRM=y
273CONFIG_XFRM_USER=y 290CONFIG_XFRM_USER=y
274# CONFIG_XFRM_SUB_POLICY is not set 291# CONFIG_XFRM_SUB_POLICY is not set
275CONFIG_XFRM_MIGRATE=y 292CONFIG_XFRM_MIGRATE=y
293# CONFIG_XFRM_STATISTICS is not set
294CONFIG_XFRM_IPCOMP=m
276CONFIG_NET_KEY=y 295CONFIG_NET_KEY=y
277CONFIG_NET_KEY_MIGRATE=y 296CONFIG_NET_KEY_MIGRATE=y
278CONFIG_INET=y 297CONFIG_INET=y
279# CONFIG_IP_MULTICAST is not set 298CONFIG_IP_MULTICAST=y
280# CONFIG_IP_ADVANCED_ROUTER is not set 299# CONFIG_IP_ADVANCED_ROUTER is not set
281CONFIG_IP_FIB_HASH=y 300CONFIG_IP_FIB_HASH=y
282CONFIG_IP_PNP=y 301CONFIG_IP_PNP=y
283# CONFIG_IP_PNP_DHCP is not set 302CONFIG_IP_PNP_DHCP=y
284CONFIG_IP_PNP_BOOTP=y 303CONFIG_IP_PNP_BOOTP=y
285# CONFIG_IP_PNP_RARP is not set 304# CONFIG_IP_PNP_RARP is not set
286# CONFIG_NET_IPIP is not set 305CONFIG_NET_IPIP=m
287# CONFIG_NET_IPGRE is not set 306CONFIG_NET_IPGRE=m
307# CONFIG_NET_IPGRE_BROADCAST is not set
308# CONFIG_IP_MROUTE is not set
288# CONFIG_ARPD is not set 309# CONFIG_ARPD is not set
289# CONFIG_SYN_COOKIES is not set 310# CONFIG_SYN_COOKIES is not set
290# CONFIG_INET_AH is not set 311CONFIG_INET_AH=m
291# CONFIG_INET_ESP is not set 312CONFIG_INET_ESP=m
292# CONFIG_INET_IPCOMP is not set 313CONFIG_INET_IPCOMP=m
293# CONFIG_INET_XFRM_TUNNEL is not set 314CONFIG_INET_XFRM_TUNNEL=m
294# CONFIG_INET_TUNNEL is not set 315CONFIG_INET_TUNNEL=m
295CONFIG_INET_XFRM_MODE_TRANSPORT=y 316CONFIG_INET_XFRM_MODE_TRANSPORT=y
296CONFIG_INET_XFRM_MODE_TUNNEL=y 317CONFIG_INET_XFRM_MODE_TUNNEL=y
297CONFIG_INET_XFRM_MODE_BEET=y 318CONFIG_INET_XFRM_MODE_BEET=y
319# CONFIG_INET_LRO is not set
298CONFIG_INET_DIAG=y 320CONFIG_INET_DIAG=y
299CONFIG_INET_TCP_DIAG=y 321CONFIG_INET_TCP_DIAG=y
300# CONFIG_TCP_CONG_ADVANCED is not set 322CONFIG_TCP_CONG_ADVANCED=y
323CONFIG_TCP_CONG_BIC=m
301CONFIG_TCP_CONG_CUBIC=y 324CONFIG_TCP_CONG_CUBIC=y
325CONFIG_TCP_CONG_WESTWOOD=m
326CONFIG_TCP_CONG_HTCP=m
327# CONFIG_TCP_CONG_HSTCP is not set
328# CONFIG_TCP_CONG_HYBLA is not set
329# CONFIG_TCP_CONG_VEGAS is not set
330# CONFIG_TCP_CONG_SCALABLE is not set
331# CONFIG_TCP_CONG_LP is not set
332# CONFIG_TCP_CONG_VENO is not set
333# CONFIG_TCP_CONG_YEAH is not set
334# CONFIG_TCP_CONG_ILLINOIS is not set
335# CONFIG_DEFAULT_BIC is not set
336CONFIG_DEFAULT_CUBIC=y
337# CONFIG_DEFAULT_HTCP is not set
338# CONFIG_DEFAULT_VEGAS is not set
339# CONFIG_DEFAULT_WESTWOOD is not set
340# CONFIG_DEFAULT_RENO is not set
302CONFIG_DEFAULT_TCP_CONG="cubic" 341CONFIG_DEFAULT_TCP_CONG="cubic"
303CONFIG_TCP_MD5SIG=y 342CONFIG_TCP_MD5SIG=y
304# CONFIG_IPV6 is not set 343CONFIG_IPV6=m
305# CONFIG_INET6_XFRM_TUNNEL is not set 344# CONFIG_IPV6_PRIVACY is not set
306# CONFIG_INET6_TUNNEL is not set 345# CONFIG_IPV6_ROUTER_PREF is not set
346# CONFIG_IPV6_OPTIMISTIC_DAD is not set
347CONFIG_INET6_AH=m
348CONFIG_INET6_ESP=m
349CONFIG_INET6_IPCOMP=m
350# CONFIG_IPV6_MIP6 is not set
351CONFIG_INET6_XFRM_TUNNEL=m
352CONFIG_INET6_TUNNEL=m
353CONFIG_INET6_XFRM_MODE_TRANSPORT=m
354CONFIG_INET6_XFRM_MODE_TUNNEL=m
355CONFIG_INET6_XFRM_MODE_BEET=m
356# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
357CONFIG_IPV6_SIT=m
358CONFIG_IPV6_NDISC_NODETYPE=y
359CONFIG_IPV6_TUNNEL=m
360# CONFIG_IPV6_MULTIPLE_TABLES is not set
361# CONFIG_IPV6_MROUTE is not set
307CONFIG_NETWORK_SECMARK=y 362CONFIG_NETWORK_SECMARK=y
308# CONFIG_NETFILTER is not set 363# CONFIG_NETFILTER is not set
309
310#
311# DCCP Configuration (EXPERIMENTAL)
312#
313# CONFIG_IP_DCCP is not set 364# CONFIG_IP_DCCP is not set
314
315#
316# SCTP Configuration (EXPERIMENTAL)
317#
318# CONFIG_IP_SCTP is not set 365# CONFIG_IP_SCTP is not set
319
320#
321# TIPC Configuration (EXPERIMENTAL)
322#
323# CONFIG_TIPC is not set 366# CONFIG_TIPC is not set
324# CONFIG_ATM is not set 367# CONFIG_ATM is not set
325# CONFIG_BRIDGE is not set 368# CONFIG_BRIDGE is not set
369# CONFIG_NET_DSA is not set
326# CONFIG_VLAN_8021Q is not set 370# CONFIG_VLAN_8021Q is not set
327# CONFIG_DECNET is not set 371# CONFIG_DECNET is not set
328# CONFIG_LLC2 is not set 372# CONFIG_LLC2 is not set
@@ -332,10 +376,6 @@ CONFIG_NETWORK_SECMARK=y
332# CONFIG_LAPB is not set 376# CONFIG_LAPB is not set
333# CONFIG_ECONET is not set 377# CONFIG_ECONET is not set
334# CONFIG_WAN_ROUTER is not set 378# CONFIG_WAN_ROUTER is not set
335
336#
337# QoS and/or fair queueing
338#
339# CONFIG_NET_SCHED is not set 379# CONFIG_NET_SCHED is not set
340 380
341# 381#
@@ -343,15 +383,14 @@ CONFIG_NETWORK_SECMARK=y
343# 383#
344# CONFIG_NET_PKTGEN is not set 384# CONFIG_NET_PKTGEN is not set
345# CONFIG_HAMRADIO is not set 385# CONFIG_HAMRADIO is not set
386# CONFIG_CAN is not set
346# CONFIG_IRDA is not set 387# CONFIG_IRDA is not set
347# CONFIG_BT is not set 388# CONFIG_BT is not set
348CONFIG_IEEE80211=y 389# CONFIG_AF_RXRPC is not set
349# CONFIG_IEEE80211_DEBUG is not set 390# CONFIG_PHONET is not set
350CONFIG_IEEE80211_CRYPT_WEP=y 391# CONFIG_WIRELESS is not set
351CONFIG_IEEE80211_CRYPT_CCMP=y 392# CONFIG_RFKILL is not set
352CONFIG_IEEE80211_SOFTMAC=y 393# CONFIG_NET_9P is not set
353# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
354CONFIG_WIRELESS_EXT=y
355 394
356# 395#
357# Device Drivers 396# Device Drivers
@@ -360,60 +399,40 @@ CONFIG_WIRELESS_EXT=y
360# 399#
361# Generic Driver Options 400# Generic Driver Options
362# 401#
402CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
363CONFIG_STANDALONE=y 403CONFIG_STANDALONE=y
364CONFIG_PREVENT_FIRMWARE_BUILD=y 404CONFIG_PREVENT_FIRMWARE_BUILD=y
365CONFIG_FW_LOADER=y 405CONFIG_FW_LOADER=y
406CONFIG_FIRMWARE_IN_KERNEL=y
407CONFIG_EXTRA_FIRMWARE=""
366# CONFIG_SYS_HYPERVISOR is not set 408# CONFIG_SYS_HYPERVISOR is not set
367
368#
369# Connector - unified userspace <-> kernelspace linker
370#
371CONFIG_CONNECTOR=y 409CONFIG_CONNECTOR=y
372CONFIG_PROC_EVENTS=y 410CONFIG_PROC_EVENTS=y
373
374#
375# Memory Technology Devices (MTD)
376#
377# CONFIG_MTD is not set 411# CONFIG_MTD is not set
378
379#
380# Parallel port support
381#
382# CONFIG_PARPORT is not set 412# CONFIG_PARPORT is not set
383 413CONFIG_BLK_DEV=y
384#
385# Plug and Play support
386#
387# CONFIG_PNPACPI is not set
388
389#
390# Block devices
391#
392# CONFIG_BLK_CPQ_DA is not set 414# CONFIG_BLK_CPQ_DA is not set
393# CONFIG_BLK_CPQ_CISS_DA is not set 415# CONFIG_BLK_CPQ_CISS_DA is not set
394# CONFIG_BLK_DEV_DAC960 is not set 416# CONFIG_BLK_DEV_DAC960 is not set
395# CONFIG_BLK_DEV_UMEM is not set 417# CONFIG_BLK_DEV_UMEM is not set
396# CONFIG_BLK_DEV_COW_COMMON is not set 418# CONFIG_BLK_DEV_COW_COMMON is not set
397CONFIG_BLK_DEV_LOOP=y 419CONFIG_BLK_DEV_LOOP=m
398# CONFIG_BLK_DEV_CRYPTOLOOP is not set 420CONFIG_BLK_DEV_CRYPTOLOOP=m
399# CONFIG_BLK_DEV_NBD is not set 421CONFIG_BLK_DEV_NBD=m
400# CONFIG_BLK_DEV_SX8 is not set 422# CONFIG_BLK_DEV_SX8 is not set
401# CONFIG_BLK_DEV_RAM is not set 423# CONFIG_BLK_DEV_RAM is not set
402# CONFIG_BLK_DEV_INITRD is not set 424# CONFIG_CDROM_PKTCDVD is not set
403CONFIG_CDROM_PKTCDVD=y 425# CONFIG_ATA_OVER_ETH is not set
404CONFIG_CDROM_PKTCDVD_BUFFERS=8 426# CONFIG_BLK_DEV_HD is not set
405# CONFIG_CDROM_PKTCDVD_WCACHE is not set 427CONFIG_MISC_DEVICES=y
406CONFIG_ATA_OVER_ETH=y 428# CONFIG_PHANTOM is not set
407 429# CONFIG_EEPROM_93CX6 is not set
408#
409# Misc devices
410#
411CONFIG_SGI_IOC4=y 430CONFIG_SGI_IOC4=y
412# CONFIG_TIFM_CORE is not set 431# CONFIG_TIFM_CORE is not set
413 432# CONFIG_ENCLOSURE_SERVICES is not set
414# 433# CONFIG_HP_ILO is not set
415# ATA/ATAPI/MFM/RLL support 434# CONFIG_C2PORT is not set
416# 435CONFIG_HAVE_IDE=y
417# CONFIG_IDE is not set 436# CONFIG_IDE is not set
418 437
419# 438#
@@ -421,19 +440,20 @@ CONFIG_SGI_IOC4=y
421# 440#
422CONFIG_RAID_ATTRS=y 441CONFIG_RAID_ATTRS=y
423CONFIG_SCSI=y 442CONFIG_SCSI=y
443CONFIG_SCSI_DMA=y
424CONFIG_SCSI_TGT=y 444CONFIG_SCSI_TGT=y
425CONFIG_SCSI_NETLINK=y 445# CONFIG_SCSI_NETLINK is not set
426CONFIG_SCSI_PROC_FS=y 446CONFIG_SCSI_PROC_FS=y
427 447
428# 448#
429# SCSI support type (disk, tape, CD-ROM) 449# SCSI support type (disk, tape, CD-ROM)
430# 450#
431CONFIG_BLK_DEV_SD=y 451CONFIG_BLK_DEV_SD=y
432CONFIG_CHR_DEV_ST=y 452# CONFIG_CHR_DEV_ST is not set
433CONFIG_CHR_DEV_OSST=y 453# CONFIG_CHR_DEV_OSST is not set
434CONFIG_BLK_DEV_SR=y 454CONFIG_BLK_DEV_SR=y
435CONFIG_BLK_DEV_SR_VENDOR=y 455CONFIG_BLK_DEV_SR_VENDOR=y
436CONFIG_CHR_DEV_SG=y 456CONFIG_CHR_DEV_SG=m
437# CONFIG_CHR_DEV_SCH is not set 457# CONFIG_CHR_DEV_SCH is not set
438 458
439# 459#
@@ -443,35 +463,36 @@ CONFIG_SCSI_MULTI_LUN=y
443CONFIG_SCSI_CONSTANTS=y 463CONFIG_SCSI_CONSTANTS=y
444CONFIG_SCSI_LOGGING=y 464CONFIG_SCSI_LOGGING=y
445CONFIG_SCSI_SCAN_ASYNC=y 465CONFIG_SCSI_SCAN_ASYNC=y
466CONFIG_SCSI_WAIT_SCAN=m
446 467
447# 468#
448# SCSI Transports 469# SCSI Transports
449# 470#
450CONFIG_SCSI_SPI_ATTRS=y 471CONFIG_SCSI_SPI_ATTRS=y
451CONFIG_SCSI_FC_ATTRS=y 472# CONFIG_SCSI_FC_ATTRS is not set
452# CONFIG_SCSI_ISCSI_ATTRS is not set 473# CONFIG_SCSI_ISCSI_ATTRS is not set
453CONFIG_SCSI_SAS_ATTRS=y 474CONFIG_SCSI_SAS_ATTRS=y
454CONFIG_SCSI_SAS_LIBSAS=y 475CONFIG_SCSI_SAS_LIBSAS=y
476CONFIG_SCSI_SAS_HOST_SMP=y
455# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set 477# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
456 478# CONFIG_SCSI_SRP_ATTRS is not set
457# 479CONFIG_SCSI_LOWLEVEL=y
458# SCSI low-level drivers
459#
460# CONFIG_ISCSI_TCP is not set 480# CONFIG_ISCSI_TCP is not set
461# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 481# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
462# CONFIG_SCSI_3W_9XXX is not set 482# CONFIG_SCSI_3W_9XXX is not set
463# CONFIG_SCSI_ACARD is not set 483# CONFIG_SCSI_ACARD is not set
464# CONFIG_SCSI_AACRAID is not set 484# CONFIG_SCSI_AACRAID is not set
465CONFIG_SCSI_AIC7XXX=y 485CONFIG_SCSI_AIC7XXX=y
466CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 486CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
467CONFIG_AIC7XXX_RESET_DELAY_MS=15000 487CONFIG_AIC7XXX_RESET_DELAY_MS=15000
468CONFIG_AIC7XXX_DEBUG_ENABLE=y 488CONFIG_AIC7XXX_DEBUG_ENABLE=y
469CONFIG_AIC7XXX_DEBUG_MASK=0 489CONFIG_AIC7XXX_DEBUG_MASK=0
470CONFIG_AIC7XXX_REG_PRETTY_PRINT=y 490CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
471# CONFIG_SCSI_AIC7XXX_OLD is not set 491# CONFIG_SCSI_AIC7XXX_OLD is not set
472# CONFIG_SCSI_AIC79XX is not set 492# CONFIG_SCSI_AIC79XX is not set
473CONFIG_SCSI_AIC94XX=y 493# CONFIG_SCSI_AIC94XX is not set
474# CONFIG_AIC94XX_DEBUG is not set 494# CONFIG_SCSI_DPT_I2O is not set
495# CONFIG_SCSI_ADVANSYS is not set
475# CONFIG_SCSI_ARCMSR is not set 496# CONFIG_SCSI_ARCMSR is not set
476# CONFIG_MEGARAID_NEWGEN is not set 497# CONFIG_MEGARAID_NEWGEN is not set
477# CONFIG_MEGARAID_LEGACY is not set 498# CONFIG_MEGARAID_LEGACY is not set
@@ -482,6 +503,7 @@ CONFIG_SCSI_AIC94XX=y
482# CONFIG_SCSI_IPS is not set 503# CONFIG_SCSI_IPS is not set
483# CONFIG_SCSI_INITIO is not set 504# CONFIG_SCSI_INITIO is not set
484# CONFIG_SCSI_INIA100 is not set 505# CONFIG_SCSI_INIA100 is not set
506# CONFIG_SCSI_MVSAS is not set
485# CONFIG_SCSI_STEX is not set 507# CONFIG_SCSI_STEX is not set
486# CONFIG_SCSI_SYM53C8XX_2 is not set 508# CONFIG_SCSI_SYM53C8XX_2 is not set
487# CONFIG_SCSI_QLOGIC_1280 is not set 509# CONFIG_SCSI_QLOGIC_1280 is not set
@@ -492,147 +514,81 @@ CONFIG_SCSI_AIC94XX=y
492# CONFIG_SCSI_DC390T is not set 514# CONFIG_SCSI_DC390T is not set
493# CONFIG_SCSI_DEBUG is not set 515# CONFIG_SCSI_DEBUG is not set
494# CONFIG_SCSI_SRP is not set 516# CONFIG_SCSI_SRP is not set
495 517# CONFIG_SCSI_DH is not set
496#
497# Serial ATA (prod) and Parallel ATA (experimental) drivers
498#
499# CONFIG_ATA is not set 518# CONFIG_ATA is not set
500
501#
502# Multi-device support (RAID and LVM)
503#
504# CONFIG_MD is not set 519# CONFIG_MD is not set
505
506#
507# Fusion MPT device support
508#
509# CONFIG_FUSION is not set 520# CONFIG_FUSION is not set
510# CONFIG_FUSION_SPI is not set
511# CONFIG_FUSION_FC is not set
512# CONFIG_FUSION_SAS is not set
513 521
514# 522#
515# IEEE 1394 (FireWire) support 523# IEEE 1394 (FireWire) support
516# 524#
517# CONFIG_IEEE1394 is not set
518 525
519# 526#
520# I2O device support 527# Enable only one of the two stacks, unless you know what you are doing
521# 528#
529# CONFIG_FIREWIRE is not set
530# CONFIG_IEEE1394 is not set
522# CONFIG_I2O is not set 531# CONFIG_I2O is not set
523
524#
525# Network device support
526#
527CONFIG_NETDEVICES=y 532CONFIG_NETDEVICES=y
528# CONFIG_DUMMY is not set 533CONFIG_DUMMY=m
529# CONFIG_BONDING is not set 534CONFIG_BONDING=m
535# CONFIG_MACVLAN is not set
530# CONFIG_EQUALIZER is not set 536# CONFIG_EQUALIZER is not set
531# CONFIG_TUN is not set 537# CONFIG_TUN is not set
532 538# CONFIG_VETH is not set
533#
534# ARCnet devices
535#
536# CONFIG_ARCNET is not set 539# CONFIG_ARCNET is not set
537 540# CONFIG_PHYLIB is not set
538#
539# PHY device support
540#
541CONFIG_PHYLIB=y
542
543#
544# MII PHY device drivers
545#
546CONFIG_MARVELL_PHY=y
547CONFIG_DAVICOM_PHY=y
548CONFIG_QSEMI_PHY=y
549CONFIG_LXT_PHY=y
550CONFIG_CICADA_PHY=y
551CONFIG_VITESSE_PHY=y
552CONFIG_SMSC_PHY=y
553# CONFIG_BROADCOM_PHY is not set
554# CONFIG_FIXED_PHY is not set
555
556#
557# Ethernet (10 or 100Mbit)
558#
559CONFIG_NET_ETHERNET=y 541CONFIG_NET_ETHERNET=y
560# CONFIG_MII is not set 542CONFIG_MII=y
543# CONFIG_AX88796 is not set
561CONFIG_SGI_O2MACE_ETH=y 544CONFIG_SGI_O2MACE_ETH=y
562# CONFIG_HAPPYMEAL is not set 545# CONFIG_HAPPYMEAL is not set
563# CONFIG_SUNGEM is not set 546# CONFIG_SUNGEM is not set
564# CONFIG_CASSINI is not set 547# CONFIG_CASSINI is not set
565# CONFIG_NET_VENDOR_3COM is not set 548# CONFIG_NET_VENDOR_3COM is not set
549# CONFIG_SMC91X is not set
566# CONFIG_DM9000 is not set 550# CONFIG_DM9000 is not set
567 551CONFIG_NET_TULIP=y
568# 552CONFIG_DE2104X=m
569# Tulip family network device support 553CONFIG_TULIP=m
570# 554# CONFIG_TULIP_MWI is not set
571# CONFIG_NET_TULIP is not set 555CONFIG_TULIP_MMIO=y
556# CONFIG_TULIP_NAPI is not set
557# CONFIG_DE4X5 is not set
558# CONFIG_WINBOND_840 is not set
559# CONFIG_DM9102 is not set
560# CONFIG_ULI526X is not set
572# CONFIG_HP100 is not set 561# CONFIG_HP100 is not set
562# CONFIG_IBM_NEW_EMAC_ZMII is not set
563# CONFIG_IBM_NEW_EMAC_RGMII is not set
564# CONFIG_IBM_NEW_EMAC_TAH is not set
565# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
566# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
567# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
568# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
573# CONFIG_NET_PCI is not set 569# CONFIG_NET_PCI is not set
574 570# CONFIG_B44 is not set
575# 571# CONFIG_ATL2 is not set
576# Ethernet (1000 Mbit) 572# CONFIG_NETDEV_1000 is not set
577# 573# CONFIG_NETDEV_10000 is not set
578# CONFIG_ACENIC is not set
579# CONFIG_DL2K is not set
580# CONFIG_E1000 is not set
581# CONFIG_NS83820 is not set
582# CONFIG_HAMACHI is not set
583# CONFIG_YELLOWFIN is not set
584# CONFIG_R8169 is not set
585# CONFIG_SIS190 is not set
586# CONFIG_SKGE is not set
587# CONFIG_SKY2 is not set
588# CONFIG_SK98LIN is not set
589# CONFIG_TIGON3 is not set
590# CONFIG_BNX2 is not set
591CONFIG_QLA3XXX=y
592# CONFIG_ATL1 is not set
593
594#
595# Ethernet (10000 Mbit)
596#
597# CONFIG_CHELSIO_T1 is not set
598CONFIG_CHELSIO_T3=y
599# CONFIG_IXGB is not set
600# CONFIG_S2IO is not set
601# CONFIG_MYRI10GE is not set
602CONFIG_NETXEN_NIC=y
603
604#
605# Token Ring devices
606#
607# CONFIG_TR is not set 574# CONFIG_TR is not set
608 575
609# 576#
610# Wireless LAN (non-hamradio) 577# Wireless LAN
611#
612# CONFIG_NET_RADIO is not set
613
614#
615# Wan interfaces
616# 578#
579# CONFIG_WLAN_PRE80211 is not set
580# CONFIG_WLAN_80211 is not set
581# CONFIG_IWLWIFI_LEDS is not set
617# CONFIG_WAN is not set 582# CONFIG_WAN is not set
618# CONFIG_FDDI is not set 583# CONFIG_FDDI is not set
619# CONFIG_HIPPI is not set 584# CONFIG_HIPPI is not set
620# CONFIG_PPP is not set 585# CONFIG_PPP is not set
621# CONFIG_SLIP is not set 586# CONFIG_SLIP is not set
622# CONFIG_NET_FC is not set 587# CONFIG_NET_FC is not set
623# CONFIG_SHAPER is not set
624# CONFIG_NETCONSOLE is not set 588# CONFIG_NETCONSOLE is not set
625# CONFIG_NETPOLL is not set 589# CONFIG_NETPOLL is not set
626# CONFIG_NET_POLL_CONTROLLER is not set 590# CONFIG_NET_POLL_CONTROLLER is not set
627
628#
629# ISDN subsystem
630#
631# CONFIG_ISDN is not set 591# CONFIG_ISDN is not set
632
633#
634# Telephony Support
635#
636# CONFIG_PHONE is not set 592# CONFIG_PHONE is not set
637 593
638# 594#
@@ -640,6 +596,7 @@ CONFIG_NETXEN_NIC=y
640# 596#
641CONFIG_INPUT=y 597CONFIG_INPUT=y
642# CONFIG_INPUT_FF_MEMLESS is not set 598# CONFIG_INPUT_FF_MEMLESS is not set
599# CONFIG_INPUT_POLLDEV is not set
643 600
644# 601#
645# Userland interfaces 602# Userland interfaces
@@ -649,16 +606,32 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
649CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 606CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
650CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 607CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
651# CONFIG_INPUT_JOYDEV is not set 608# CONFIG_INPUT_JOYDEV is not set
652# CONFIG_INPUT_TSDEV is not set 609CONFIG_INPUT_EVDEV=m
653# CONFIG_INPUT_EVDEV is not set
654# CONFIG_INPUT_EVBUG is not set 610# CONFIG_INPUT_EVBUG is not set
655 611
656# 612#
657# Input Device Drivers 613# Input Device Drivers
658# 614#
659# CONFIG_INPUT_KEYBOARD is not set 615CONFIG_INPUT_KEYBOARD=y
660# CONFIG_INPUT_MOUSE is not set 616CONFIG_KEYBOARD_ATKBD=y
617# CONFIG_KEYBOARD_SUNKBD is not set
618# CONFIG_KEYBOARD_LKKBD is not set
619# CONFIG_KEYBOARD_XTKBD is not set
620# CONFIG_KEYBOARD_NEWTON is not set
621# CONFIG_KEYBOARD_STOWAWAY is not set
622CONFIG_INPUT_MOUSE=y
623CONFIG_MOUSE_PS2=y
624CONFIG_MOUSE_PS2_ALPS=y
625CONFIG_MOUSE_PS2_LOGIPS2PP=y
626CONFIG_MOUSE_PS2_SYNAPTICS=y
627CONFIG_MOUSE_PS2_LIFEBOOK=y
628CONFIG_MOUSE_PS2_TRACKPOINT=y
629# CONFIG_MOUSE_PS2_ELANTECH is not set
630# CONFIG_MOUSE_PS2_TOUCHKIT is not set
631# CONFIG_MOUSE_SERIAL is not set
632# CONFIG_MOUSE_VSXXXAA is not set
661# CONFIG_INPUT_JOYSTICK is not set 633# CONFIG_INPUT_JOYSTICK is not set
634# CONFIG_INPUT_TABLET is not set
662# CONFIG_INPUT_TOUCHSCREEN is not set 635# CONFIG_INPUT_TOUCHSCREEN is not set
663# CONFIG_INPUT_MISC is not set 636# CONFIG_INPUT_MISC is not set
664 637
@@ -669,8 +642,8 @@ CONFIG_SERIO=y
669# CONFIG_SERIO_I8042 is not set 642# CONFIG_SERIO_I8042 is not set
670CONFIG_SERIO_SERPORT=y 643CONFIG_SERIO_SERPORT=y
671# CONFIG_SERIO_PCIPS2 is not set 644# CONFIG_SERIO_PCIPS2 is not set
672# CONFIG_SERIO_MACEPS2 is not set 645CONFIG_SERIO_MACEPS2=y
673# CONFIG_SERIO_LIBPS2 is not set 646CONFIG_SERIO_LIBPS2=y
674CONFIG_SERIO_RAW=y 647CONFIG_SERIO_RAW=y
675# CONFIG_GAMEPORT is not set 648# CONFIG_GAMEPORT is not set
676 649
@@ -678,10 +651,13 @@ CONFIG_SERIO_RAW=y
678# Character devices 651# Character devices
679# 652#
680CONFIG_VT=y 653CONFIG_VT=y
654# CONFIG_CONSOLE_TRANSLATIONS is not set
681CONFIG_VT_CONSOLE=y 655CONFIG_VT_CONSOLE=y
682CONFIG_HW_CONSOLE=y 656CONFIG_HW_CONSOLE=y
683CONFIG_VT_HW_CONSOLE_BINDING=y 657# CONFIG_VT_HW_CONSOLE_BINDING is not set
658CONFIG_DEVKMEM=y
684# CONFIG_SERIAL_NONSTANDARD is not set 659# CONFIG_SERIAL_NONSTANDARD is not set
660# CONFIG_NOZOMI is not set
685 661
686# 662#
687# Serial drivers 663# Serial drivers
@@ -702,192 +678,304 @@ CONFIG_SERIAL_CORE_CONSOLE=y
702CONFIG_UNIX98_PTYS=y 678CONFIG_UNIX98_PTYS=y
703CONFIG_LEGACY_PTYS=y 679CONFIG_LEGACY_PTYS=y
704CONFIG_LEGACY_PTY_COUNT=256 680CONFIG_LEGACY_PTY_COUNT=256
705
706#
707# IPMI
708#
709# CONFIG_IPMI_HANDLER is not set 681# CONFIG_IPMI_HANDLER is not set
710 682CONFIG_HW_RANDOM=y
711#
712# Watchdog Cards
713#
714# CONFIG_WATCHDOG is not set
715# CONFIG_HW_RANDOM is not set
716# CONFIG_RTC is not set
717# CONFIG_GEN_RTC is not set
718# CONFIG_DTLK is not set
719# CONFIG_R3964 is not set 683# CONFIG_R3964 is not set
720# CONFIG_APPLICOM is not set 684# CONFIG_APPLICOM is not set
721# CONFIG_DRM is not set
722# CONFIG_RAW_DRIVER is not set 685# CONFIG_RAW_DRIVER is not set
723
724#
725# TPM devices
726#
727# CONFIG_TCG_TPM is not set 686# CONFIG_TCG_TPM is not set
687CONFIG_DEVPORT=y
688# CONFIG_I2C is not set
689# CONFIG_SPI is not set
690# CONFIG_W1 is not set
691# CONFIG_POWER_SUPPLY is not set
692CONFIG_HWMON=y
693# CONFIG_HWMON_VID is not set
694# CONFIG_SENSORS_I5K_AMB is not set
695# CONFIG_SENSORS_F71805F is not set
696# CONFIG_SENSORS_F71882FG is not set
697# CONFIG_SENSORS_IT87 is not set
698# CONFIG_SENSORS_PC87360 is not set
699# CONFIG_SENSORS_PC87427 is not set
700# CONFIG_SENSORS_SIS5595 is not set
701# CONFIG_SENSORS_SMSC47M1 is not set
702# CONFIG_SENSORS_SMSC47B397 is not set
703# CONFIG_SENSORS_VIA686A is not set
704# CONFIG_SENSORS_VT1211 is not set
705# CONFIG_SENSORS_VT8231 is not set
706# CONFIG_SENSORS_W83627HF is not set
707# CONFIG_SENSORS_W83627EHF is not set
708# CONFIG_HWMON_DEBUG_CHIP is not set
709# CONFIG_THERMAL is not set
710# CONFIG_THERMAL_HWMON is not set
711CONFIG_WATCHDOG=y
712# CONFIG_WATCHDOG_NOWAYOUT is not set
728 713
729# 714#
730# I2C support 715# Watchdog Device Drivers
731# 716#
732# CONFIG_I2C is not set 717# CONFIG_SOFT_WATCHDOG is not set
718# CONFIG_ALIM7101_WDT is not set
733 719
734# 720#
735# SPI support 721# PCI-based Watchdog Cards
736# 722#
737# CONFIG_SPI is not set 723# CONFIG_PCIPCWATCHDOG is not set
738# CONFIG_SPI_MASTER is not set 724# CONFIG_WDTPCI is not set
725CONFIG_SSB_POSSIBLE=y
739 726
740# 727#
741# Dallas's 1-wire bus 728# Sonics Silicon Backplane
742# 729#
743# CONFIG_W1 is not set 730# CONFIG_SSB is not set
744 731
745# 732#
746# Hardware Monitoring support 733# Multifunction device drivers
747# 734#
748# CONFIG_HWMON is not set 735# CONFIG_MFD_CORE is not set
749# CONFIG_HWMON_VID is not set 736# CONFIG_MFD_SM501 is not set
737# CONFIG_HTC_PASIC3 is not set
738# CONFIG_MFD_TMIO is not set
739# CONFIG_REGULATOR is not set
750 740
751# 741#
752# Multimedia devices 742# Multimedia devices
753# 743#
754# CONFIG_VIDEO_DEV is not set
755 744
756# 745#
757# Digital Video Broadcasting Devices 746# Multimedia core support
758# 747#
759# CONFIG_DVB is not set 748CONFIG_VIDEO_DEV=m
749CONFIG_VIDEO_V4L2_COMMON=m
750CONFIG_VIDEO_ALLOW_V4L1=y
751CONFIG_VIDEO_V4L1_COMPAT=y
752# CONFIG_DVB_CORE is not set
753CONFIG_VIDEO_MEDIA=m
760 754
761# 755#
762# Graphics support 756# Multimedia drivers
763# 757#
764# CONFIG_FIRMWARE_EDID is not set 758# CONFIG_MEDIA_ATTACH is not set
765# CONFIG_FB is not set 759CONFIG_VIDEO_V4L2=m
760CONFIG_VIDEO_V4L1=m
761CONFIG_VIDEOBUF_GEN=m
762CONFIG_VIDEOBUF_VMALLOC=m
763CONFIG_VIDEO_CAPTURE_DRIVERS=y
764# CONFIG_VIDEO_ADV_DEBUG is not set
765# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
766CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
767CONFIG_VIDEO_VIVI=m
768# CONFIG_VIDEO_CPIA is not set
769# CONFIG_VIDEO_STRADIS is not set
770# CONFIG_SOC_CAMERA is not set
771CONFIG_RADIO_ADAPTERS=y
772# CONFIG_RADIO_GEMTEK_PCI is not set
773# CONFIG_RADIO_MAXIRADIO is not set
774# CONFIG_RADIO_MAESTRO is not set
775CONFIG_DAB=y
766 776
767# 777#
768# Console display driver support 778# Graphics support
769# 779#
770# CONFIG_VGA_CONSOLE is not set 780# CONFIG_DRM is not set
771CONFIG_DUMMY_CONSOLE=y 781# CONFIG_VGASTATE is not set
782CONFIG_VIDEO_OUTPUT_CONTROL=y
783CONFIG_FB=y
784CONFIG_FIRMWARE_EDID=y
785# CONFIG_FB_DDC is not set
786# CONFIG_FB_BOOT_VESA_SUPPORT is not set
787CONFIG_FB_CFB_FILLRECT=y
788CONFIG_FB_CFB_COPYAREA=y
789CONFIG_FB_CFB_IMAGEBLIT=y
790# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
791# CONFIG_FB_SYS_FILLRECT is not set
792# CONFIG_FB_SYS_COPYAREA is not set
793# CONFIG_FB_SYS_IMAGEBLIT is not set
794# CONFIG_FB_FOREIGN_ENDIAN is not set
795# CONFIG_FB_SYS_FOPS is not set
796# CONFIG_FB_SVGALIB is not set
797# CONFIG_FB_MACMODES is not set
798# CONFIG_FB_BACKLIGHT is not set
799# CONFIG_FB_MODE_HELPERS is not set
800# CONFIG_FB_TILEBLITTING is not set
801
802#
803# Frame buffer hardware drivers
804#
805# CONFIG_FB_CIRRUS is not set
806# CONFIG_FB_PM2 is not set
807# CONFIG_FB_CYBER2000 is not set
808# CONFIG_FB_ASILIANT is not set
809# CONFIG_FB_IMSTT is not set
810# CONFIG_FB_UVESA is not set
811CONFIG_FB_GBE=y
812CONFIG_FB_GBE_MEM=4
813# CONFIG_FB_S1D13XXX is not set
814# CONFIG_FB_NVIDIA is not set
815# CONFIG_FB_RIVA is not set
816# CONFIG_FB_MATROX is not set
817# CONFIG_FB_RADEON is not set
818# CONFIG_FB_ATY128 is not set
819# CONFIG_FB_ATY is not set
820# CONFIG_FB_S3 is not set
821# CONFIG_FB_SAVAGE is not set
822# CONFIG_FB_SIS is not set
823# CONFIG_FB_VIA is not set
824# CONFIG_FB_NEOMAGIC is not set
825# CONFIG_FB_KYRO is not set
826# CONFIG_FB_3DFX is not set
827# CONFIG_FB_VOODOO1 is not set
828# CONFIG_FB_VT8623 is not set
829# CONFIG_FB_TRIDENT is not set
830# CONFIG_FB_ARK is not set
831# CONFIG_FB_PM3 is not set
832# CONFIG_FB_CARMINE is not set
833# CONFIG_FB_VIRTUAL is not set
834# CONFIG_FB_METRONOME is not set
835# CONFIG_FB_MB862XX is not set
772# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 836# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
773 837
774# 838#
775# Sound 839# Display device support
776# 840#
777# CONFIG_SOUND is not set 841# CONFIG_DISPLAY_SUPPORT is not set
778 842
779# 843#
780# HID Devices 844# Console display driver support
781# 845#
846# CONFIG_VGA_CONSOLE is not set
847CONFIG_DUMMY_CONSOLE=y
848CONFIG_FRAMEBUFFER_CONSOLE=y
849# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
850# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
851CONFIG_FONTS=y
852CONFIG_FONT_8x8=y
853CONFIG_FONT_8x16=y
854# CONFIG_FONT_6x11 is not set
855# CONFIG_FONT_7x14 is not set
856# CONFIG_FONT_PEARL_8x8 is not set
857# CONFIG_FONT_ACORN_8x8 is not set
858# CONFIG_FONT_MINI_4x6 is not set
859# CONFIG_FONT_SUN8x16 is not set
860# CONFIG_FONT_SUN12x22 is not set
861# CONFIG_FONT_10x18 is not set
862CONFIG_LOGO=y
863# CONFIG_LOGO_LINUX_MONO is not set
864# CONFIG_LOGO_LINUX_VGA16 is not set
865# CONFIG_LOGO_LINUX_CLUT224 is not set
866CONFIG_LOGO_SGI_CLUT224=y
867# CONFIG_SOUND is not set
868CONFIG_HID_SUPPORT=y
782CONFIG_HID=y 869CONFIG_HID=y
783# CONFIG_HID_DEBUG is not set 870# CONFIG_HID_DEBUG is not set
871# CONFIG_HIDRAW is not set
872# CONFIG_HID_PID is not set
784 873
785# 874#
786# USB support 875# Special HID drivers
787#
788CONFIG_USB_ARCH_HAS_HCD=y
789CONFIG_USB_ARCH_HAS_OHCI=y
790CONFIG_USB_ARCH_HAS_EHCI=y
791# CONFIG_USB is not set
792
793#
794# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
795#
796
797#
798# USB Gadget Support
799#
800# CONFIG_USB_GADGET is not set
801
802#
803# MMC/SD Card support
804# 876#
877CONFIG_HID_COMPAT=y
878# CONFIG_USB_SUPPORT is not set
879# CONFIG_UWB is not set
805# CONFIG_MMC is not set 880# CONFIG_MMC is not set
806 881# CONFIG_MEMSTICK is not set
807#
808# LED devices
809#
810# CONFIG_NEW_LEDS is not set 882# CONFIG_NEW_LEDS is not set
811 883# CONFIG_ACCESSIBILITY is not set
812#
813# LED drivers
814#
815
816#
817# LED Triggers
818#
819
820#
821# InfiniBand support
822#
823# CONFIG_INFINIBAND is not set 884# CONFIG_INFINIBAND is not set
885CONFIG_RTC_LIB=y
886CONFIG_RTC_CLASS=y
887# CONFIG_RTC_HCTOSYS is not set
888# CONFIG_RTC_DEBUG is not set
824 889
825# 890#
826# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 891# RTC interfaces
827# 892#
893# CONFIG_RTC_INTF_SYSFS is not set
894# CONFIG_RTC_INTF_PROC is not set
895CONFIG_RTC_INTF_DEV=y
896# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
897# CONFIG_RTC_DRV_TEST is not set
828 898
829# 899#
830# Real Time Clock 900# SPI RTC drivers
831# 901#
832# CONFIG_RTC_CLASS is not set
833 902
834# 903#
835# DMA Engine support 904# Platform RTC drivers
836# 905#
837# CONFIG_DMA_ENGINE is not set 906CONFIG_RTC_DRV_CMOS=y
907# CONFIG_RTC_DRV_DS1286 is not set
908# CONFIG_RTC_DRV_DS1511 is not set
909# CONFIG_RTC_DRV_DS1553 is not set
910# CONFIG_RTC_DRV_DS1742 is not set
911# CONFIG_RTC_DRV_STK17TA8 is not set
912# CONFIG_RTC_DRV_M48T86 is not set
913# CONFIG_RTC_DRV_M48T35 is not set
914# CONFIG_RTC_DRV_M48T59 is not set
915# CONFIG_RTC_DRV_BQ4802 is not set
916# CONFIG_RTC_DRV_V3020 is not set
838 917
839# 918#
840# DMA Clients 919# on-CPU RTC drivers
841#
842
843#
844# DMA Devices
845#
846
847#
848# Auxiliary Display support
849#
850
851#
852# Virtualization
853# 920#
921# CONFIG_DMADEVICES is not set
922# CONFIG_UIO is not set
923# CONFIG_STAGING is not set
924CONFIG_STAGING_EXCLUDE_BUILD=y
854 925
855# 926#
856# File systems 927# File systems
857# 928#
858CONFIG_EXT2_FS=y 929CONFIG_EXT2_FS=y
859# CONFIG_EXT2_FS_XATTR is not set 930CONFIG_EXT2_FS_XATTR=y
931CONFIG_EXT2_FS_POSIX_ACL=y
932CONFIG_EXT2_FS_SECURITY=y
860# CONFIG_EXT2_FS_XIP is not set 933# CONFIG_EXT2_FS_XIP is not set
861# CONFIG_EXT3_FS is not set 934CONFIG_EXT3_FS=y
862# CONFIG_EXT4DEV_FS is not set 935CONFIG_EXT3_FS_XATTR=y
936CONFIG_EXT3_FS_POSIX_ACL=y
937CONFIG_EXT3_FS_SECURITY=y
938# CONFIG_EXT4_FS is not set
939CONFIG_JBD=y
940CONFIG_FS_MBCACHE=y
863# CONFIG_REISERFS_FS is not set 941# CONFIG_REISERFS_FS is not set
864# CONFIG_JFS_FS is not set 942# CONFIG_JFS_FS is not set
865CONFIG_FS_POSIX_ACL=y 943CONFIG_FS_POSIX_ACL=y
944CONFIG_FILE_LOCKING=y
866# CONFIG_XFS_FS is not set 945# CONFIG_XFS_FS is not set
867# CONFIG_GFS2_FS is not set 946# CONFIG_GFS2_FS is not set
868# CONFIG_OCFS2_FS is not set 947# CONFIG_OCFS2_FS is not set
869# CONFIG_MINIX_FS is not set 948CONFIG_DNOTIFY=y
870# CONFIG_ROMFS_FS is not set
871CONFIG_INOTIFY=y 949CONFIG_INOTIFY=y
872CONFIG_INOTIFY_USER=y 950CONFIG_INOTIFY_USER=y
873# CONFIG_QUOTA is not set 951CONFIG_QUOTA=y
874CONFIG_DNOTIFY=y 952# CONFIG_QUOTA_NETLINK_INTERFACE is not set
875# CONFIG_AUTOFS_FS is not set 953CONFIG_PRINT_QUOTA_WARNING=y
876# CONFIG_AUTOFS4_FS is not set 954CONFIG_QFMT_V1=m
877CONFIG_FUSE_FS=y 955CONFIG_QFMT_V2=m
956CONFIG_QUOTACTL=y
957CONFIG_AUTOFS_FS=m
958CONFIG_AUTOFS4_FS=m
959CONFIG_FUSE_FS=m
878CONFIG_GENERIC_ACL=y 960CONFIG_GENERIC_ACL=y
879 961
880# 962#
881# CD-ROM/DVD Filesystems 963# CD-ROM/DVD Filesystems
882# 964#
883# CONFIG_ISO9660_FS is not set 965CONFIG_ISO9660_FS=m
884# CONFIG_UDF_FS is not set 966CONFIG_JOLIET=y
967CONFIG_ZISOFS=y
968CONFIG_UDF_FS=m
969CONFIG_UDF_NLS=y
885 970
886# 971#
887# DOS/FAT/NT Filesystems 972# DOS/FAT/NT Filesystems
888# 973#
889# CONFIG_MSDOS_FS is not set 974CONFIG_FAT_FS=m
890# CONFIG_VFAT_FS is not set 975CONFIG_MSDOS_FS=m
976CONFIG_VFAT_FS=m
977CONFIG_FAT_DEFAULT_CODEPAGE=437
978CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
891# CONFIG_NTFS_FS is not set 979# CONFIG_NTFS_FS is not set
892 980
893# 981#
@@ -896,11 +984,11 @@ CONFIG_GENERIC_ACL=y
896CONFIG_PROC_FS=y 984CONFIG_PROC_FS=y
897CONFIG_PROC_KCORE=y 985CONFIG_PROC_KCORE=y
898CONFIG_PROC_SYSCTL=y 986CONFIG_PROC_SYSCTL=y
987CONFIG_PROC_PAGE_MONITOR=y
899CONFIG_SYSFS=y 988CONFIG_SYSFS=y
900CONFIG_TMPFS=y 989CONFIG_TMPFS=y
901CONFIG_TMPFS_POSIX_ACL=y 990CONFIG_TMPFS_POSIX_ACL=y
902# CONFIG_HUGETLB_PAGE is not set 991# CONFIG_HUGETLB_PAGE is not set
903CONFIG_RAMFS=y
904CONFIG_CONFIGFS_FS=y 992CONFIG_CONFIGFS_FS=y
905 993
906# 994#
@@ -916,33 +1004,42 @@ CONFIG_CONFIGFS_FS=y
916# CONFIG_EFS_FS is not set 1004# CONFIG_EFS_FS is not set
917# CONFIG_CRAMFS is not set 1005# CONFIG_CRAMFS is not set
918# CONFIG_VXFS_FS is not set 1006# CONFIG_VXFS_FS is not set
1007# CONFIG_MINIX_FS is not set
1008# CONFIG_OMFS_FS is not set
919# CONFIG_HPFS_FS is not set 1009# CONFIG_HPFS_FS is not set
920# CONFIG_QNX4FS_FS is not set 1010# CONFIG_QNX4FS_FS is not set
1011# CONFIG_ROMFS_FS is not set
921# CONFIG_SYSV_FS is not set 1012# CONFIG_SYSV_FS is not set
922# CONFIG_UFS_FS is not set 1013# CONFIG_UFS_FS is not set
923 1014CONFIG_NETWORK_FILESYSTEMS=y
924#
925# Network File Systems
926#
927CONFIG_NFS_FS=y 1015CONFIG_NFS_FS=y
928CONFIG_NFS_V3=y 1016CONFIG_NFS_V3=y
929# CONFIG_NFS_V3_ACL is not set 1017# CONFIG_NFS_V3_ACL is not set
930# CONFIG_NFS_V4 is not set 1018# CONFIG_NFS_V4 is not set
931# CONFIG_NFS_DIRECTIO is not set
932# CONFIG_NFSD is not set
933CONFIG_ROOT_NFS=y 1019CONFIG_ROOT_NFS=y
1020CONFIG_NFSD=m
1021CONFIG_NFSD_V3=y
1022# CONFIG_NFSD_V3_ACL is not set
1023# CONFIG_NFSD_V4 is not set
934CONFIG_LOCKD=y 1024CONFIG_LOCKD=y
935CONFIG_LOCKD_V4=y 1025CONFIG_LOCKD_V4=y
1026CONFIG_EXPORTFS=m
936CONFIG_NFS_COMMON=y 1027CONFIG_NFS_COMMON=y
937CONFIG_SUNRPC=y 1028CONFIG_SUNRPC=y
1029# CONFIG_SUNRPC_REGISTER_V4 is not set
938# CONFIG_RPCSEC_GSS_KRB5 is not set 1030# CONFIG_RPCSEC_GSS_KRB5 is not set
939# CONFIG_RPCSEC_GSS_SPKM3 is not set 1031# CONFIG_RPCSEC_GSS_SPKM3 is not set
940# CONFIG_SMB_FS is not set 1032# CONFIG_SMB_FS is not set
941# CONFIG_CIFS is not set 1033CONFIG_CIFS=m
1034# CONFIG_CIFS_STATS is not set
1035# CONFIG_CIFS_WEAK_PW_HASH is not set
1036# CONFIG_CIFS_UPCALL is not set
1037# CONFIG_CIFS_XATTR is not set
1038# CONFIG_CIFS_DEBUG2 is not set
1039# CONFIG_CIFS_EXPERIMENTAL is not set
942# CONFIG_NCP_FS is not set 1040# CONFIG_NCP_FS is not set
943# CONFIG_CODA_FS is not set 1041# CONFIG_CODA_FS is not set
944# CONFIG_AFS_FS is not set 1042# CONFIG_AFS_FS is not set
945# CONFIG_9P_FS is not set
946 1043
947# 1044#
948# Partition Types 1045# Partition Types
@@ -953,45 +1050,83 @@ CONFIG_PARTITION_ADVANCED=y
953# CONFIG_AMIGA_PARTITION is not set 1050# CONFIG_AMIGA_PARTITION is not set
954# CONFIG_ATARI_PARTITION is not set 1051# CONFIG_ATARI_PARTITION is not set
955# CONFIG_MAC_PARTITION is not set 1052# CONFIG_MAC_PARTITION is not set
956# CONFIG_MSDOS_PARTITION is not set 1053CONFIG_MSDOS_PARTITION=y
1054# CONFIG_BSD_DISKLABEL is not set
1055# CONFIG_MINIX_SUBPARTITION is not set
1056# CONFIG_SOLARIS_X86_PARTITION is not set
1057# CONFIG_UNIXWARE_DISKLABEL is not set
957# CONFIG_LDM_PARTITION is not set 1058# CONFIG_LDM_PARTITION is not set
958CONFIG_SGI_PARTITION=y 1059CONFIG_SGI_PARTITION=y
959# CONFIG_ULTRIX_PARTITION is not set 1060# CONFIG_ULTRIX_PARTITION is not set
960# CONFIG_SUN_PARTITION is not set 1061# CONFIG_SUN_PARTITION is not set
961# CONFIG_KARMA_PARTITION is not set 1062# CONFIG_KARMA_PARTITION is not set
962# CONFIG_EFI_PARTITION is not set 1063# CONFIG_EFI_PARTITION is not set
963 1064# CONFIG_SYSV68_PARTITION is not set
964# 1065CONFIG_NLS=y
965# Native Language Support 1066CONFIG_NLS_DEFAULT="iso8859-1"
966# 1067CONFIG_NLS_CODEPAGE_437=m
967# CONFIG_NLS is not set 1068CONFIG_NLS_CODEPAGE_737=m
968 1069CONFIG_NLS_CODEPAGE_775=m
969# 1070CONFIG_NLS_CODEPAGE_850=m
970# Distributed Lock Manager 1071CONFIG_NLS_CODEPAGE_852=m
971# 1072CONFIG_NLS_CODEPAGE_855=m
972CONFIG_DLM=y 1073CONFIG_NLS_CODEPAGE_857=m
973CONFIG_DLM_TCP=y 1074CONFIG_NLS_CODEPAGE_860=m
974# CONFIG_DLM_SCTP is not set 1075CONFIG_NLS_CODEPAGE_861=m
975# CONFIG_DLM_DEBUG is not set 1076CONFIG_NLS_CODEPAGE_862=m
976 1077CONFIG_NLS_CODEPAGE_863=m
977# 1078CONFIG_NLS_CODEPAGE_864=m
978# Profiling support 1079CONFIG_NLS_CODEPAGE_865=m
979# 1080CONFIG_NLS_CODEPAGE_866=m
980# CONFIG_PROFILING is not set 1081CONFIG_NLS_CODEPAGE_869=m
1082CONFIG_NLS_CODEPAGE_936=m
1083CONFIG_NLS_CODEPAGE_950=m
1084CONFIG_NLS_CODEPAGE_932=m
1085CONFIG_NLS_CODEPAGE_949=m
1086CONFIG_NLS_CODEPAGE_874=m
1087CONFIG_NLS_ISO8859_8=m
1088CONFIG_NLS_CODEPAGE_1250=m
1089CONFIG_NLS_CODEPAGE_1251=m
1090CONFIG_NLS_ASCII=m
1091CONFIG_NLS_ISO8859_1=m
1092CONFIG_NLS_ISO8859_2=m
1093CONFIG_NLS_ISO8859_3=m
1094CONFIG_NLS_ISO8859_4=m
1095CONFIG_NLS_ISO8859_5=m
1096CONFIG_NLS_ISO8859_6=m
1097CONFIG_NLS_ISO8859_7=m
1098CONFIG_NLS_ISO8859_9=m
1099CONFIG_NLS_ISO8859_13=m
1100CONFIG_NLS_ISO8859_14=m
1101CONFIG_NLS_ISO8859_15=m
1102CONFIG_NLS_KOI8_R=m
1103CONFIG_NLS_KOI8_U=m
1104CONFIG_NLS_UTF8=m
1105# CONFIG_DLM is not set
981 1106
982# 1107#
983# Kernel hacking 1108# Kernel hacking
984# 1109#
985CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1110CONFIG_TRACE_IRQFLAGS_SUPPORT=y
986# CONFIG_PRINTK_TIME is not set 1111# CONFIG_PRINTK_TIME is not set
1112CONFIG_ENABLE_WARN_DEPRECATED=y
987CONFIG_ENABLE_MUST_CHECK=y 1113CONFIG_ENABLE_MUST_CHECK=y
988# CONFIG_MAGIC_SYSRQ is not set 1114CONFIG_FRAME_WARN=2048
1115CONFIG_MAGIC_SYSRQ=y
989# CONFIG_UNUSED_SYMBOLS is not set 1116# CONFIG_UNUSED_SYMBOLS is not set
990# CONFIG_DEBUG_FS is not set 1117# CONFIG_DEBUG_FS is not set
991# CONFIG_HEADERS_CHECK is not set 1118# CONFIG_HEADERS_CHECK is not set
992# CONFIG_DEBUG_KERNEL is not set 1119# CONFIG_DEBUG_KERNEL is not set
993CONFIG_LOG_BUF_SHIFT=14 1120# CONFIG_DEBUG_MEMORY_INIT is not set
994CONFIG_CROSSCOMPILE=y 1121# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1122CONFIG_SYSCTL_SYSCALL_CHECK=y
1123
1124#
1125# Tracers
1126#
1127# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1128# CONFIG_SAMPLES is not set
1129CONFIG_HAVE_ARCH_KGDB=y
995CONFIG_CMDLINE="" 1130CONFIG_CMDLINE=""
996 1131
997# 1132#
@@ -1000,51 +1135,99 @@ CONFIG_CMDLINE=""
1000CONFIG_KEYS=y 1135CONFIG_KEYS=y
1001CONFIG_KEYS_DEBUG_PROC_KEYS=y 1136CONFIG_KEYS_DEBUG_PROC_KEYS=y
1002# CONFIG_SECURITY is not set 1137# CONFIG_SECURITY is not set
1138# CONFIG_SECURITYFS is not set
1139# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1140CONFIG_CRYPTO=y
1003 1141
1004# 1142#
1005# Cryptographic options 1143# Crypto core or helper
1006# 1144#
1007CONFIG_CRYPTO=y 1145# CONFIG_CRYPTO_FIPS is not set
1008CONFIG_CRYPTO_ALGAPI=y 1146CONFIG_CRYPTO_ALGAPI=y
1147CONFIG_CRYPTO_AEAD=y
1009CONFIG_CRYPTO_BLKCIPHER=y 1148CONFIG_CRYPTO_BLKCIPHER=y
1010CONFIG_CRYPTO_HASH=y 1149CONFIG_CRYPTO_HASH=y
1150CONFIG_CRYPTO_RNG=y
1011CONFIG_CRYPTO_MANAGER=y 1151CONFIG_CRYPTO_MANAGER=y
1152CONFIG_CRYPTO_GF128MUL=y
1153CONFIG_CRYPTO_NULL=y
1154# CONFIG_CRYPTO_CRYPTD is not set
1155CONFIG_CRYPTO_AUTHENC=m
1156# CONFIG_CRYPTO_TEST is not set
1157
1158#
1159# Authenticated Encryption with Associated Data
1160#
1161# CONFIG_CRYPTO_CCM is not set
1162# CONFIG_CRYPTO_GCM is not set
1163# CONFIG_CRYPTO_SEQIV is not set
1164
1165#
1166# Block modes
1167#
1168CONFIG_CRYPTO_CBC=y
1169# CONFIG_CRYPTO_CTR is not set
1170# CONFIG_CRYPTO_CTS is not set
1171CONFIG_CRYPTO_ECB=y
1172CONFIG_CRYPTO_LRW=y
1173CONFIG_CRYPTO_PCBC=y
1174# CONFIG_CRYPTO_XTS is not set
1175
1176#
1177# Hash modes
1178#
1012CONFIG_CRYPTO_HMAC=y 1179CONFIG_CRYPTO_HMAC=y
1013CONFIG_CRYPTO_XCBC=y 1180CONFIG_CRYPTO_XCBC=y
1014CONFIG_CRYPTO_NULL=y 1181
1182#
1183# Digest
1184#
1185CONFIG_CRYPTO_CRC32C=y
1015CONFIG_CRYPTO_MD4=y 1186CONFIG_CRYPTO_MD4=y
1016CONFIG_CRYPTO_MD5=y 1187CONFIG_CRYPTO_MD5=y
1188CONFIG_CRYPTO_MICHAEL_MIC=y
1189# CONFIG_CRYPTO_RMD128 is not set
1190# CONFIG_CRYPTO_RMD160 is not set
1191# CONFIG_CRYPTO_RMD256 is not set
1192# CONFIG_CRYPTO_RMD320 is not set
1017CONFIG_CRYPTO_SHA1=y 1193CONFIG_CRYPTO_SHA1=y
1018CONFIG_CRYPTO_SHA256=y 1194CONFIG_CRYPTO_SHA256=y
1019CONFIG_CRYPTO_SHA512=y 1195CONFIG_CRYPTO_SHA512=y
1020CONFIG_CRYPTO_WP512=y
1021CONFIG_CRYPTO_TGR192=y 1196CONFIG_CRYPTO_TGR192=y
1022CONFIG_CRYPTO_GF128MUL=y 1197CONFIG_CRYPTO_WP512=y
1023CONFIG_CRYPTO_ECB=y 1198
1024CONFIG_CRYPTO_CBC=y 1199#
1025CONFIG_CRYPTO_PCBC=y 1200# Ciphers
1026CONFIG_CRYPTO_LRW=y 1201#
1027CONFIG_CRYPTO_DES=y
1028CONFIG_CRYPTO_FCRYPT=y
1029CONFIG_CRYPTO_BLOWFISH=y
1030CONFIG_CRYPTO_TWOFISH=y
1031CONFIG_CRYPTO_TWOFISH_COMMON=y
1032CONFIG_CRYPTO_SERPENT=y
1033CONFIG_CRYPTO_AES=y 1202CONFIG_CRYPTO_AES=y
1203CONFIG_CRYPTO_ANUBIS=y
1204CONFIG_CRYPTO_ARC4=y
1205CONFIG_CRYPTO_BLOWFISH=y
1206CONFIG_CRYPTO_CAMELLIA=y
1034CONFIG_CRYPTO_CAST5=y 1207CONFIG_CRYPTO_CAST5=y
1035CONFIG_CRYPTO_CAST6=y 1208CONFIG_CRYPTO_CAST6=y
1036CONFIG_CRYPTO_TEA=y 1209CONFIG_CRYPTO_DES=y
1037CONFIG_CRYPTO_ARC4=y 1210CONFIG_CRYPTO_FCRYPT=y
1038CONFIG_CRYPTO_KHAZAD=y 1211CONFIG_CRYPTO_KHAZAD=y
1039CONFIG_CRYPTO_ANUBIS=y 1212# CONFIG_CRYPTO_SALSA20 is not set
1213# CONFIG_CRYPTO_SEED is not set
1214CONFIG_CRYPTO_SERPENT=y
1215CONFIG_CRYPTO_TEA=y
1216CONFIG_CRYPTO_TWOFISH=y
1217CONFIG_CRYPTO_TWOFISH_COMMON=y
1218
1219#
1220# Compression
1221#
1040CONFIG_CRYPTO_DEFLATE=y 1222CONFIG_CRYPTO_DEFLATE=y
1041CONFIG_CRYPTO_MICHAEL_MIC=y 1223# CONFIG_CRYPTO_LZO is not set
1042CONFIG_CRYPTO_CRC32C=y
1043CONFIG_CRYPTO_CAMELLIA=y
1044 1224
1045# 1225#
1046# Hardware crypto devices 1226# Random Number Generation
1047# 1227#
1228# CONFIG_CRYPTO_ANSI_CPRNG is not set
1229CONFIG_CRYPTO_HW=y
1230# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1048 1231
1049# 1232#
1050# Library routines 1233# Library routines
@@ -1052,10 +1235,15 @@ CONFIG_CRYPTO_CAMELLIA=y
1052CONFIG_BITREVERSE=y 1235CONFIG_BITREVERSE=y
1053# CONFIG_CRC_CCITT is not set 1236# CONFIG_CRC_CCITT is not set
1054CONFIG_CRC16=y 1237CONFIG_CRC16=y
1238CONFIG_CRC_T10DIF=y
1239CONFIG_CRC_ITU_T=m
1055CONFIG_CRC32=y 1240CONFIG_CRC32=y
1241# CONFIG_CRC7 is not set
1056CONFIG_LIBCRC32C=y 1242CONFIG_LIBCRC32C=y
1243CONFIG_AUDIT_GENERIC=y
1057CONFIG_ZLIB_INFLATE=y 1244CONFIG_ZLIB_INFLATE=y
1058CONFIG_ZLIB_DEFLATE=y 1245CONFIG_ZLIB_DEFLATE=y
1059CONFIG_PLIST=y 1246CONFIG_PLIST=y
1060CONFIG_HAS_IOMEM=y 1247CONFIG_HAS_IOMEM=y
1061CONFIG_HAS_IOPORT=y 1248CONFIG_HAS_IOPORT=y
1249CONFIG_HAS_DMA=y
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 7a881755800f..6c8342ae74db 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -35,6 +35,16 @@
35 mtc0 \reg, CP0_TCSTATUS 35 mtc0 \reg, CP0_TCSTATUS
36 _ehb 36 _ehb
37 .endm 37 .endm
38#elif defined(CONFIG_CPU_MIPSR2)
39 .macro local_irq_enable reg=t0
40 ei
41 irq_enable_hazard
42 .endm
43
44 .macro local_irq_disable reg=t0
45 di
46 irq_disable_hazard
47 .endm
38#else 48#else
39 .macro local_irq_enable reg=t0 49 .macro local_irq_enable reg=t0
40 mfc0 \reg, CP0_STATUS 50 mfc0 \reg, CP0_STATUS
diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h
index 2988d29a0867..33790b9e0cc0 100644
--- a/arch/mips/include/asm/byteorder.h
+++ b/arch/mips/include/asm/byteorder.h
@@ -50,9 +50,8 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
50static inline __attribute_const__ __u64 __arch_swab64(__u64 x) 50static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
51{ 51{
52 __asm__( 52 __asm__(
53 " dsbh %0, %1 \n" 53 " dsbh %0, %1\n"
54 " dshd %0, %0 \n" 54 " dshd %0, %0"
55 " drotr %0, %0, 32 \n"
56 : "=r" (x) 55 : "=r" (x)
57 : "r" (x)); 56 : "r" (x));
58 57
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index a8eac1697b3d..d58f128aa747 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -232,7 +232,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
232 */ 232 */
233#ifdef __MIPSEB__ 233#ifdef __MIPSEB__
234#define ELF_DATA ELFDATA2MSB 234#define ELF_DATA ELFDATA2MSB
235#elif __MIPSEL__ 235#elif defined(__MIPSEL__)
236#define ELF_DATA ELFDATA2LSB 236#define ELF_DATA ELFDATA2LSB
237#endif 237#endif
238#define ELF_ARCH EM_MIPS 238#define ELF_ARCH EM_MIPS
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index b0591ae0ce56..fd6e51224034 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -174,8 +174,8 @@ static unsigned int translate_open_flags(int flags)
174 174
175static void sp_setfsuidgid( uid_t uid, gid_t gid) 175static void sp_setfsuidgid( uid_t uid, gid_t gid)
176{ 176{
177 current->fsuid = uid; 177 current->cred->fsuid = uid;
178 current->fsgid = gid; 178 current->cred->fsgid = gid;
179 179
180 key_fsuid_changed(current); 180 key_fsuid_changed(current);
181 key_fsgid_changed(current); 181 key_fsgid_changed(current);
diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c
index dc9eb72ed9de..5e77a3a21f98 100644
--- a/arch/mips/kernel/mips-mt-fpaff.c
+++ b/arch/mips/kernel/mips-mt-fpaff.c
@@ -51,6 +51,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
51 int retval; 51 int retval;
52 struct task_struct *p; 52 struct task_struct *p;
53 struct thread_info *ti; 53 struct thread_info *ti;
54 uid_t euid;
54 55
55 if (len < sizeof(new_mask)) 56 if (len < sizeof(new_mask))
56 return -EINVAL; 57 return -EINVAL;
@@ -76,9 +77,9 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
76 */ 77 */
77 get_task_struct(p); 78 get_task_struct(p);
78 79
80 euid = current_euid();
79 retval = -EPERM; 81 retval = -EPERM;
80 if ((current->euid != p->euid) && (current->euid != p->uid) && 82 if (euid != p->euid && euid != p->uid && !capable(CAP_SYS_NICE)) {
81 !capable(CAP_SYS_NICE)) {
82 read_unlock(&tasklist_lock); 83 read_unlock(&tasklist_lock);
83 goto out_unlock; 84 goto out_unlock;
84 } 85 }
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index a1b3da6bad5c..010b27e01f7b 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -1085,8 +1085,8 @@ static int vpe_open(struct inode *inode, struct file *filp)
1085 v->load_addr = NULL; 1085 v->load_addr = NULL;
1086 v->len = 0; 1086 v->len = 0;
1087 1087
1088 v->uid = filp->f_uid; 1088 v->uid = filp->f_cred->fsuid;
1089 v->gid = filp->f_gid; 1089 v->gid = filp->f_cred->fsgid;
1090 1090
1091#ifdef CONFIG_MIPS_APSP_KSPD 1091#ifdef CONFIG_MIPS_APSP_KSPD
1092 /* get kspd to tell us when a syscall_exit happens */ 1092 /* get kspd to tell us when a syscall_exit happens */
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 5b98d0e731c2..e6708b3ad343 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -111,6 +111,7 @@ EXPORT_SYMBOL(dma_alloc_coherent);
111void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, 111void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
112 dma_addr_t dma_handle) 112 dma_addr_t dma_handle)
113{ 113{
114 plat_unmap_dma_mem(dma_handle);
114 free_pages((unsigned long) vaddr, get_order(size)); 115 free_pages((unsigned long) vaddr, get_order(size));
115} 116}
116 117
@@ -121,6 +122,8 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
121{ 122{
122 unsigned long addr = (unsigned long) vaddr; 123 unsigned long addr = (unsigned long) vaddr;
123 124
125 plat_unmap_dma_mem(dma_handle);
126
124 if (!plat_device_is_coherent(dev)) 127 if (!plat_device_is_coherent(dev))
125 addr = CAC_ADDR(addr); 128 addr = CAC_ADDR(addr);
126 129
diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h
index b72ec66db699..1f6fd4fc05b9 100644
--- a/arch/parisc/include/asm/tlbflush.h
+++ b/arch/parisc/include/asm/tlbflush.h
@@ -44,9 +44,12 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
44{ 44{
45 BUG_ON(mm == &init_mm); /* Should never happen */ 45 BUG_ON(mm == &init_mm); /* Should never happen */
46 46
47#ifdef CONFIG_SMP 47#if 1 || defined(CONFIG_SMP)
48 flush_tlb_all(); 48 flush_tlb_all();
49#else 49#else
50 /* FIXME: currently broken, causing space id and protection ids
51 * to go out of sync, resulting in faults on userspace accesses.
52 */
50 if (mm) { 53 if (mm) {
51 if (mm->context != 0) 54 if (mm->context != 0)
52 free_sid(mm->context); 55 free_sid(mm->context);
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 06213d1d6d95..f82544225e8e 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -182,7 +182,7 @@ give_sigsegv:
182 si.si_errno = 0; 182 si.si_errno = 0;
183 si.si_code = SI_KERNEL; 183 si.si_code = SI_KERNEL;
184 si.si_pid = task_pid_vnr(current); 184 si.si_pid = task_pid_vnr(current);
185 si.si_uid = current->uid; 185 si.si_uid = current_uid();
186 si.si_addr = &frame->uc; 186 si.si_addr = &frame->uc;
187 force_sig_info(SIGSEGV, &si, current); 187 force_sig_info(SIGSEGV, &si, current);
188 return; 188 return;
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 525c13a4de93..79f25cef32df 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -141,7 +141,7 @@ config GENERIC_NVRAM
141 bool 141 bool
142 default y if PPC32 142 default y if PPC32
143 143
144config SCHED_NO_NO_OMIT_FRAME_POINTER 144config SCHED_OMIT_FRAME_POINTER
145 bool 145 bool
146 default y 146 default y
147 147
@@ -285,6 +285,10 @@ config IOMMU_VMERGE
285config IOMMU_HELPER 285config IOMMU_HELPER
286 def_bool PPC64 286 def_bool PPC64
287 287
288config PPC_NEED_DMA_SYNC_OPS
289 def_bool y
290 depends on NOT_COHERENT_CACHE
291
288config HOTPLUG_CPU 292config HOTPLUG_CPU
289 bool "Support for enabling/disabling CPUs" 293 bool "Support for enabling/disabling CPUs"
290 depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC) 294 depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC)
@@ -322,7 +326,7 @@ config KEXEC
322 326
323config CRASH_DUMP 327config CRASH_DUMP
324 bool "Build a kdump crash kernel" 328 bool "Build a kdump crash kernel"
325 depends on PPC_MULTIPLATFORM && PPC64 && RELOCATABLE 329 depends on (PPC64 && RELOCATABLE) || 6xx
326 help 330 help
327 Build a kernel suitable for use as a kdump capture kernel. 331 Build a kernel suitable for use as a kdump capture kernel.
328 The same kernel binary can be used as production kernel and dump 332 The same kernel binary can be used as production kernel and dump
@@ -401,23 +405,53 @@ config PPC_HAS_HASH_64K
401 depends on PPC64 405 depends on PPC64
402 default n 406 default n
403 407
404config PPC_64K_PAGES 408choice
405 bool "64k page size" 409 prompt "Page size"
406 depends on PPC64 410 default PPC_4K_PAGES
407 select PPC_HAS_HASH_64K
408 help 411 help
409 This option changes the kernel logical page size to 64k. On machines 412 Select the kernel logical page size. Increasing the page size
410 without processor support for 64k pages, the kernel will simulate 413 will reduce software overhead at each page boundary, allow
411 them by loading each individual 4k page on demand transparently, 414 hardware prefetch mechanisms to be more effective, and allow
412 while on hardware with such support, it will be used to map 415 larger dma transfers increasing IO efficiency and reducing
413 normal application pages. 416 overhead. However the utilization of memory will increase.
417 For example, each cached file will using a multiple of the
418 page size to hold its contents and the difference between the
419 end of file and the end of page is wasted.
420
421 Some dedicated systems, such as software raid serving with
422 accelerated calculations, have shown significant increases.
423
424 If you configure a 64 bit kernel for 64k pages but the
425 processor does not support them, then the kernel will simulate
426 them with 4k pages, loading them on demand, but with the
427 reduced software overhead and larger internal fragmentation.
428 For the 32 bit kernel, a large page option will not be offered
429 unless it is supported by the configured processor.
430
431 If unsure, choose 4K_PAGES.
432
433config PPC_4K_PAGES
434 bool "4k page size"
435
436config PPC_16K_PAGES
437 bool "16k page size" if 44x
438
439config PPC_64K_PAGES
440 bool "64k page size" if 44x || PPC_STD_MMU_64
441 select PPC_HAS_HASH_64K if PPC_STD_MMU_64
442
443endchoice
414 444
415config FORCE_MAX_ZONEORDER 445config FORCE_MAX_ZONEORDER
416 int "Maximum zone order" 446 int "Maximum zone order"
417 range 9 64 if PPC_64K_PAGES 447 range 9 64 if PPC_STD_MMU_64 && PPC_64K_PAGES
418 default "9" if PPC_64K_PAGES 448 default "9" if PPC_STD_MMU_64 && PPC_64K_PAGES
419 range 13 64 if PPC64 && !PPC_64K_PAGES 449 range 13 64 if PPC_STD_MMU_64 && !PPC_64K_PAGES
420 default "13" if PPC64 && !PPC_64K_PAGES 450 default "13" if PPC_STD_MMU_64 && !PPC_64K_PAGES
451 range 9 64 if PPC_STD_MMU_32 && PPC_16K_PAGES
452 default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
453 range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
454 default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
421 range 11 64 455 range 11 64
422 default "11" 456 default "11"
423 help 457 help
@@ -437,7 +471,7 @@ config FORCE_MAX_ZONEORDER
437 471
438config PPC_SUBPAGE_PROT 472config PPC_SUBPAGE_PROT
439 bool "Support setting protections for 4k subpages" 473 bool "Support setting protections for 4k subpages"
440 depends on PPC_64K_PAGES 474 depends on PPC_STD_MMU_64 && PPC_64K_PAGES
441 help 475 help
442 This option adds support for a system call to allow user programs 476 This option adds support for a system call to allow user programs
443 to set access permissions (read/write, readonly, or no access) 477 to set access permissions (read/write, readonly, or no access)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 15eb27861fc7..08f7cc0a1953 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -2,6 +2,15 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5config PRINT_STACK_DEPTH
6 int "Stack depth to print" if DEBUG_KERNEL
7 default 64
8 help
9 This option allows you to set the stack depth that the kernel
10 prints in stack traces. This can be useful if your display is
11 too small and stack traces cause important information to
12 scroll off the screen.
13
5config DEBUG_STACKOVERFLOW 14config DEBUG_STACKOVERFLOW
6 bool "Check for stack overflows" 15 bool "Check for stack overflows"
7 depends on DEBUG_KERNEL 16 depends on DEBUG_KERNEL
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 1f0667069940..72d17f50e54f 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -107,7 +107,6 @@ KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
107# (We use all available options to help semi-broken compilers) 107# (We use all available options to help semi-broken compilers)
108KBUILD_CFLAGS += $(call cc-option,-mno-spe) 108KBUILD_CFLAGS += $(call cc-option,-mno-spe)
109KBUILD_CFLAGS += $(call cc-option,-mspe=no) 109KBUILD_CFLAGS += $(call cc-option,-mspe=no)
110KBUILD_CFLAGS += $(call cc-option,-mabi=no-spe)
111 110
112# Enable unit-at-a-time mode when possible. It shrinks the 111# Enable unit-at-a-time mode when possible. It shrinks the
113# kernel considerably. 112# kernel considerably.
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 8fc6d72849ae..f32829937aad 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -41,6 +41,7 @@ $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
41$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 41$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
42$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 42$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
43$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 43$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
44$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
44$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 45$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
45$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 46$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
46 47
@@ -193,6 +194,7 @@ image-$(CONFIG_PPC_MAPLE) += zImage.pseries
193image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries 194image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries
194image-$(CONFIG_PPC_PS3) += dtbImage.ps3 195image-$(CONFIG_PPC_PS3) += dtbImage.ps3
195image-$(CONFIG_PPC_CELLEB) += zImage.pseries 196image-$(CONFIG_PPC_CELLEB) += zImage.pseries
197image-$(CONFIG_PPC_CELL_QPACE) += zImage.pseries
196image-$(CONFIG_PPC_CHRP) += zImage.chrp 198image-$(CONFIG_PPC_CHRP) += zImage.chrp
197image-$(CONFIG_PPC_EFIKA) += zImage.chrp 199image-$(CONFIG_PPC_EFIKA) += zImage.chrp
198image-$(CONFIG_PPC_PMAC) += zImage.pmac 200image-$(CONFIG_PPC_PMAC) += zImage.pmac
diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index 5d12336dc360..a7e21a35c03a 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -213,7 +213,7 @@ static int find_range(u32 *reg, u32 *ranges, int nregaddr,
213 u32 range_addr[MAX_ADDR_CELLS]; 213 u32 range_addr[MAX_ADDR_CELLS];
214 u32 range_size[MAX_ADDR_CELLS]; 214 u32 range_size[MAX_ADDR_CELLS];
215 215
216 copy_val(range_addr, ranges + i, naddr); 216 copy_val(range_addr, ranges + i, nregaddr);
217 copy_val(range_size, ranges + i + nregaddr + naddr, nsize); 217 copy_val(range_size, ranges + i + nregaddr + naddr, nsize);
218 218
219 if (compare_reg(reg, range_addr, range_size)) 219 if (compare_reg(reg, range_addr, range_size))
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 6235fca445de..524af7ef9f26 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -199,8 +199,26 @@
199 reg = <0x2>; 199 reg = <0x2>;
200 device_type = "ethernet-phy"; 200 device_type = "ethernet-phy";
201 }; 201 };
202
203 tbi0: tbi-phy@11 {
204 reg = <0x11>;
205 device_type = "tbi-phy";
206 };
202 }; 207 };
203 208
209 mdio@25520 {
210 #address-cells = <1>;
211 #size-cells = <0>;
212 compatible = "fsl,gianfar-tbi";
213 reg = <0x25520 0x20>;
214
215 tbi1: tbi-phy@11 {
216 reg = <0x11>;
217 device_type = "tbi-phy";
218 };
219 };
220
221
204 enet0: ethernet@24000 { 222 enet0: ethernet@24000 {
205 cell-index = <0>; 223 cell-index = <0>;
206 device_type = "network"; 224 device_type = "network";
@@ -210,6 +228,7 @@
210 local-mac-address = [ 00 08 e5 11 32 33 ]; 228 local-mac-address = [ 00 08 e5 11 32 33 ];
211 interrupts = <32 0x8 33 0x8 34 0x8>; 229 interrupts = <32 0x8 33 0x8 34 0x8>;
212 interrupt-parent = <&ipic>; 230 interrupt-parent = <&ipic>;
231 tbi-handle = <&tbi0>;
213 phy-handle = <&phy0>; 232 phy-handle = <&phy0>;
214 linux,network-index = <0>; 233 linux,network-index = <0>;
215 }; 234 };
@@ -223,6 +242,7 @@
223 local-mac-address = [ 00 08 e5 11 32 34 ]; 242 local-mac-address = [ 00 08 e5 11 32 34 ];
224 interrupts = <35 0x8 36 0x8 37 0x8>; 243 interrupts = <35 0x8 36 0x8 37 0x8>;
225 interrupt-parent = <&ipic>; 244 interrupt-parent = <&ipic>;
245 tbi-handle = <&tbi1>;
226 phy-handle = <&phy1>; 246 phy-handle = <&phy1>;
227 linux,network-index = <1>; 247 linux,network-index = <1>;
228 }; 248 };
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index 6ce0cc2c0208..aa68911f6560 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -269,7 +269,8 @@
269 * later cannot be changed. Chip supports a second 269 * later cannot be changed. Chip supports a second
270 * IO range but we don't use it for now 270 * IO range but we don't use it for now
271 */ 271 */
272 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 272 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000
273 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
273 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; 274 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
274 275
275 /* Inbound 2GB range starting at 0 */ 276 /* Inbound 2GB range starting at 0 */
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 79fe412c11c9..8b5ba8261a36 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -40,6 +40,7 @@
40 d-cache-size = <32768>; 40 d-cache-size = <32768>;
41 dcr-controller; 41 dcr-controller;
42 dcr-access-method = "native"; 42 dcr-access-method = "native";
43 next-level-cache = <&L2C0>;
43 }; 44 };
44 }; 45 };
45 46
@@ -104,6 +105,16 @@
104 dcr-reg = <0x00c 0x002>; 105 dcr-reg = <0x00c 0x002>;
105 }; 106 };
106 107
108 L2C0: l2c {
109 compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
110 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
111 0x030 0x008>; /* L2 cache DCR's */
112 cache-line-size = <32>; /* 32 bytes */
113 cache-size = <262144>; /* L2, 256K */
114 interrupt-parent = <&UIC1>;
115 interrupts = <11 1>;
116 };
117
107 plb { 118 plb {
108 compatible = "ibm,plb-460ex", "ibm,plb4"; 119 compatible = "ibm,plb-460ex", "ibm,plb4";
109 #address-cells = <2>; 120 #address-cells = <2>;
@@ -343,6 +354,7 @@
343 * later cannot be changed 354 * later cannot be changed
344 */ 355 */
345 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 356 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
357 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
346 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; 358 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
347 359
348 /* Inbound 2GB range starting at 0 */ 360 /* Inbound 2GB range starting at 0 */
@@ -373,6 +385,7 @@
373 * later cannot be changed 385 * later cannot be changed
374 */ 386 */
375 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 387 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
388 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
376 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 389 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
377 390
378 /* Inbound 2GB range starting at 0 */ 391 /* Inbound 2GB range starting at 0 */
@@ -414,6 +427,7 @@
414 * later cannot be changed 427 * later cannot be changed
415 */ 428 */
416 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 429 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
430 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
417 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; 431 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
418 432
419 /* Inbound 2GB range starting at 0 */ 433 /* Inbound 2GB range starting at 0 */
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index e48cfa740c8a..9708b3423bbd 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -98,6 +98,12 @@
98 interrupt-parent = <&mpic>; 98 interrupt-parent = <&mpic>;
99 99
100 }; 100 };
101 gef_gpio: gpio@7,14000 {
102 #gpio-cells = <2>;
103 compatible = "gef,sbc610-gpio";
104 reg = <0x7 0x14000 0x24>;
105 gpio-controller;
106 };
101 }; 107 };
102 108
103 soc@fef00000 { 109 soc@fef00000 {
@@ -119,6 +125,11 @@
119 interrupt-parent = <&mpic>; 125 interrupt-parent = <&mpic>;
120 dfsrr; 126 dfsrr;
121 127
128 rtc@51 {
129 compatible = "epson,rx8581";
130 reg = <0x00000051>;
131 };
132
122 eti@6b { 133 eti@6b {
123 compatible = "dallas,ds1682"; 134 compatible = "dallas,ds1682";
124 reg = <0x6b>; 135 reg = <0x6b>;
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 49737589ffc8..3bfff47418db 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -141,8 +141,26 @@
141 reg = <0x2>; 141 reg = <0x2>;
142 device_type = "ethernet-phy"; 142 device_type = "ethernet-phy";
143 }; 143 };
144
145 tbi0: tbi-phy@11 {
146 reg = <0x11>;
147 device_type = "tbi-phy";
148 };
144 }; 149 };
145 150
151 mdio@25520 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,gianfar-tbi";
155 reg = <0x25520 0x20>;
156
157 tbi1: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163
146 enet0: ethernet@24000 { 164 enet0: ethernet@24000 {
147 device_type = "network"; 165 device_type = "network";
148 model = "TSEC"; 166 model = "TSEC";
@@ -152,6 +170,7 @@
152 local-mac-address = [ 00 00 00 00 00 00 ]; 170 local-mac-address = [ 00 00 00 00 00 00 ];
153 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 171 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
154 interrupt-parent = <&mpic>; 172 interrupt-parent = <&mpic>;
173 tbi-handle = <&tbi0>;
155 phy-handle = <&PHY1>; 174 phy-handle = <&PHY1>;
156 }; 175 };
157 176
@@ -164,6 +183,7 @@
164 local-mac-address = [ 00 00 00 00 00 00 ]; 183 local-mac-address = [ 00 00 00 00 00 00 ];
165 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 184 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
166 interrupt-parent = <&mpic>; 185 interrupt-parent = <&mpic>;
186 tbi-handle = <&tbi1>;
167 phy-handle = <&PHY2>; 187 phy-handle = <&PHY2>;
168 }; 188 };
169 189
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 2e5a1a1812b6..8d725d10882f 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -76,7 +76,6 @@ XXXX add flash parts, rtc, ??
76 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
77 77
78 rtc@32 { 78 rtc@32 {
79 device_type = "rtc";
80 compatible = "ricoh,rs5c372a"; 79 compatible = "ricoh,rs5c372a";
81 reg = <0x32>; 80 reg = <0x32>;
82 }; 81 };
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index e4916e69ad31..b13a11eb81b0 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -76,7 +76,6 @@ XXXX add flash parts, rtc, ??
76 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
77 77
78 rtc@32 { 78 rtc@32 {
79 device_type = "rtc";
80 compatible = "ricoh,rs5c372a"; 79 compatible = "ricoh,rs5c372a";
81 reg = <0x32>; 80 reg = <0x32>;
82 }; 81 };
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 2cf9a8768f44..3f7a5dce8de0 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -130,7 +130,6 @@
130 130
131 rtc@800 { // Real time clock 131 rtc@800 { // Real time clock
132 compatible = "fsl,mpc5200-rtc"; 132 compatible = "fsl,mpc5200-rtc";
133 device_type = "rtc";
134 reg = <0x800 0x100>; 133 reg = <0x800 0x100>;
135 interrupts = <1 5 0 1 6 0>; 134 interrupts = <1 5 0 1 6 0>;
136 interrupt-parent = <&mpc5200_pic>; 135 interrupt-parent = <&mpc5200_pic>;
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 7bd5b9c399b8..63e3bb48e843 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -130,7 +130,6 @@
130 130
131 rtc@800 { // Real time clock 131 rtc@800 { // Real time clock
132 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 132 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
133 device_type = "rtc";
134 reg = <0x800 0x100>; 133 reg = <0x800 0x100>;
135 interrupts = <1 5 0 1 6 0>; 134 interrupts = <1 5 0 1 6 0>;
136 interrupt-parent = <&mpc5200_pic>; 135 interrupt-parent = <&mpc5200_pic>;
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 9e3c921be164..52ba6f98b273 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -248,7 +248,6 @@
248 fsl5200-clocking; 248 fsl5200-clocking;
249 249
250 rtc@68 { 250 rtc@68 {
251 device_type = "rtc";
252 compatible = "dallas,ds1339"; 251 compatible = "dallas,ds1339";
253 reg = <0x68>; 252 reg = <0x68>;
254 }; 253 };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 503031766825..d4df8b6857a4 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -190,6 +190,7 @@
190 local-mac-address = [ 00 00 00 00 00 00 ]; 190 local-mac-address = [ 00 00 00 00 00 00 ];
191 interrupts = <37 0x8 36 0x8 35 0x8>; 191 interrupts = <37 0x8 36 0x8 35 0x8>;
192 interrupt-parent = <&ipic>; 192 interrupt-parent = <&ipic>;
193 tbi-handle = < &tbi0 >;
193 phy-handle = < &phy1 >; 194 phy-handle = < &phy1 >;
194 fsl,magic-packet; 195 fsl,magic-packet;
195 196
@@ -210,6 +211,10 @@
210 reg = <0x4>; 211 reg = <0x4>;
211 device_type = "ethernet-phy"; 212 device_type = "ethernet-phy";
212 }; 213 };
214 tbi0: tbi-phy@11 {
215 reg = <0x11>;
216 device_type = "tbi-phy";
217 };
213 }; 218 };
214 }; 219 };
215 220
@@ -222,9 +227,24 @@
222 local-mac-address = [ 00 00 00 00 00 00 ]; 227 local-mac-address = [ 00 00 00 00 00 00 ];
223 interrupts = <34 0x8 33 0x8 32 0x8>; 228 interrupts = <34 0x8 33 0x8 32 0x8>;
224 interrupt-parent = <&ipic>; 229 interrupt-parent = <&ipic>;
230 tbi-handle = < &tbi1 >;
225 phy-handle = < &phy4 >; 231 phy-handle = < &phy4 >;
226 sleep = <&pmc 0x10000000>; 232 sleep = <&pmc 0x10000000>;
227 fsl,magic-packet; 233 fsl,magic-packet;
234
235 mdio@25520 {
236 #address-cells = <1>;
237 #size-cells = <0>;
238 compatible = "fsl,gianfar-tbi";
239 reg = <0x25520 0x20>;
240
241 tbi1: tbi-phy@11 {
242 reg = <0x11>;
243 device_type = "tbi-phy";
244 };
245 };
246
247
228 }; 248 };
229 249
230 serial0: serial@4500 { 250 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 6b850670de1d..072c9b0f8c8e 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -117,7 +117,6 @@
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 dfsrr; 118 dfsrr;
119 rtc@68 { 119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339"; 120 compatible = "dallas,ds1339";
122 reg = <0x68>; 121 reg = <0x68>;
123 }; 122 };
@@ -206,8 +205,25 @@
206 reg = <0x1>; 205 reg = <0x1>;
207 device_type = "ethernet-phy"; 206 device_type = "ethernet-phy";
208 }; 207 };
208 tbi0: tbi-phy@11 {
209 reg = <0x11>;
210 device_type = "tbi-phy";
211 };
212 };
213
214 mdio@25520 {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "fsl,gianfar-tbi";
218 reg = <0x25520 0x20>;
219
220 tbi1: tbi-phy@11 {
221 reg = <0x11>;
222 device_type = "tbi-phy";
223 };
209 }; 224 };
210 225
226
211 enet0: ethernet@24000 { 227 enet0: ethernet@24000 {
212 cell-index = <0>; 228 cell-index = <0>;
213 device_type = "network"; 229 device_type = "network";
@@ -217,6 +233,7 @@
217 local-mac-address = [ 00 00 00 00 00 00 ]; 233 local-mac-address = [ 00 00 00 00 00 00 ];
218 interrupts = <32 0x8 33 0x8 34 0x8>; 234 interrupts = <32 0x8 33 0x8 34 0x8>;
219 interrupt-parent = <&ipic>; 235 interrupt-parent = <&ipic>;
236 tbi-handle = <&tbi0>;
220 phy-handle = < &phy0 >; 237 phy-handle = < &phy0 >;
221 }; 238 };
222 239
@@ -229,6 +246,7 @@
229 local-mac-address = [ 00 00 00 00 00 00 ]; 246 local-mac-address = [ 00 00 00 00 00 00 ];
230 interrupts = <35 0x8 36 0x8 37 0x8>; 247 interrupts = <35 0x8 36 0x8 37 0x8>;
231 interrupt-parent = <&ipic>; 248 interrupt-parent = <&ipic>;
249 tbi-handle = <&tbi1>;
232 phy-handle = < &phy1 >; 250 phy-handle = < &phy1 >;
233 }; 251 };
234 252
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 4bdbaf4993a1..b5eda94a8e2a 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -85,7 +85,6 @@
85 dfsrr; 85 dfsrr;
86 86
87 rtc@68 { 87 rtc@68 {
88 device_type = "rtc";
89 compatible = "dallas,ds1339"; 88 compatible = "dallas,ds1339";
90 reg = <0x68>; 89 reg = <0x68>;
91 interrupts = <18 0x8>; 90 interrupts = <18 0x8>;
@@ -184,6 +183,22 @@
184 reg = <0x1c>; 183 reg = <0x1c>;
185 device_type = "ethernet-phy"; 184 device_type = "ethernet-phy";
186 }; 185 };
186 tbi0: tbi-phy@11 {
187 reg = <0x11>;
188 device_type = "tbi-phy";
189 };
190 };
191
192 mdio@25520 {
193 #address-cells = <1>;
194 #size-cells = <0>;
195 compatible = "fsl,gianfar-tbi";
196 reg = <0x25520 0x20>;
197
198 tbi1: tbi-phy@11 {
199 reg = <0x11>;
200 device_type = "tbi-phy";
201 };
187 }; 202 };
188 203
189 enet0: ethernet@24000 { 204 enet0: ethernet@24000 {
@@ -195,6 +210,7 @@
195 local-mac-address = [ 00 00 00 00 00 00 ]; 210 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <32 0x8 33 0x8 34 0x8>; 211 interrupts = <32 0x8 33 0x8 34 0x8>;
197 interrupt-parent = <&ipic>; 212 interrupt-parent = <&ipic>;
213 tbi-handle = <&tbi0>;
198 phy-handle = <&phy1c>; 214 phy-handle = <&phy1c>;
199 linux,network-index = <0>; 215 linux,network-index = <0>;
200 }; 216 };
@@ -211,6 +227,7 @@
211 /* Vitesse 7385 isn't on the MDIO bus */ 227 /* Vitesse 7385 isn't on the MDIO bus */
212 fixed-link = <1 1 1000 0 0>; 228 fixed-link = <1 1 1000 0 0>;
213 linux,network-index = <1>; 229 linux,network-index = <1>;
230 tbi-handle = <&tbi1>;
214 }; 231 };
215 232
216 serial0: serial@4500 { 233 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index fa40647ee62e..c87a6015e165 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -83,7 +83,6 @@
83 dfsrr; 83 dfsrr;
84 84
85 rtc@68 { 85 rtc@68 {
86 device_type = "rtc";
87 compatible = "dallas,ds1339"; 86 compatible = "dallas,ds1339";
88 reg = <0x68>; 87 reg = <0x68>;
89 interrupts = <18 0x8>; 88 interrupts = <18 0x8>;
@@ -163,6 +162,10 @@
163 reg = <0x1c>; 162 reg = <0x1c>;
164 device_type = "ethernet-phy"; 163 device_type = "ethernet-phy";
165 }; 164 };
165 tbi0: tbi-phy@11 {
166 reg = <0x11>;
167 device_type = "tbi-phy";
168 };
166 }; 169 };
167 170
168 enet0: ethernet@24000 { 171 enet0: ethernet@24000 {
@@ -174,6 +177,7 @@
174 local-mac-address = [ 00 00 00 00 00 00 ]; 177 local-mac-address = [ 00 00 00 00 00 00 ];
175 interrupts = <32 0x8 33 0x8 34 0x8>; 178 interrupts = <32 0x8 33 0x8 34 0x8>;
176 interrupt-parent = <&ipic>; 179 interrupt-parent = <&ipic>;
180 tbi-handle = <&tbi0>;
177 phy-handle = <&phy1c>; 181 phy-handle = <&phy1c>;
178 linux,network-index = <0>; 182 linux,network-index = <0>;
179 }; 183 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index c986c541e9bb..d9adba01c09c 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -185,8 +185,25 @@
185 reg = <0x1>; 185 reg = <0x1>;
186 device_type = "ethernet-phy"; 186 device_type = "ethernet-phy";
187 }; 187 };
188 tbi0: tbi-phy@11 {
189 reg = <0x11>;
190 device_type = "tbi-phy";
191 };
192 };
193
194 mdio@25520 {
195 #address-cells = <1>;
196 #size-cells = <0>;
197 compatible = "fsl,gianfar-tbi";
198 reg = <0x25520 0x20>;
199
200 tbi1: tbi-phy@11 {
201 reg = <0x11>;
202 device_type = "tbi-phy";
203 };
188 }; 204 };
189 205
206
190 enet0: ethernet@24000 { 207 enet0: ethernet@24000 {
191 cell-index = <0>; 208 cell-index = <0>;
192 device_type = "network"; 209 device_type = "network";
@@ -196,6 +213,7 @@
196 local-mac-address = [ 00 00 00 00 00 00 ]; 213 local-mac-address = [ 00 00 00 00 00 00 ];
197 interrupts = <32 0x8 33 0x8 34 0x8>; 214 interrupts = <32 0x8 33 0x8 34 0x8>;
198 interrupt-parent = <&ipic>; 215 interrupt-parent = <&ipic>;
216 tbi-handle = <&tbi0>;
199 phy-handle = <&phy0>; 217 phy-handle = <&phy0>;
200 linux,network-index = <0>; 218 linux,network-index = <0>;
201 }; 219 };
@@ -209,6 +227,7 @@
209 local-mac-address = [ 00 00 00 00 00 00 ]; 227 local-mac-address = [ 00 00 00 00 00 00 ];
210 interrupts = <35 0x8 36 0x8 37 0x8>; 228 interrupts = <35 0x8 36 0x8 37 0x8>;
211 interrupt-parent = <&ipic>; 229 interrupt-parent = <&ipic>;
230 tbi-handle = <&tbi1>;
212 phy-handle = <&phy1>; 231 phy-handle = <&phy1>;
213 linux,network-index = <1>; 232 linux,network-index = <1>;
214 }; 233 };
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 0484561bd2c0..1d14d7052e6d 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -193,8 +193,25 @@
193 reg = <0x3>; 193 reg = <0x3>;
194 device_type = "ethernet-phy"; 194 device_type = "ethernet-phy";
195 }; 195 };
196 tbi0: tbi-phy@11 {
197 reg = <0x11>;
198 device_type = "tbi-phy";
199 };
200 };
201
202 mdio@25520 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,gianfar-tbi";
206 reg = <0x25520 0x20>;
207
208 tbi1: tbi-phy@11 {
209 reg = <0x11>;
210 device_type = "tbi-phy";
211 };
196 }; 212 };
197 213
214
198 enet0: ethernet@24000 { 215 enet0: ethernet@24000 {
199 cell-index = <0>; 216 cell-index = <0>;
200 device_type = "network"; 217 device_type = "network";
@@ -205,6 +222,7 @@
205 interrupts = <32 0x8 33 0x8 34 0x8>; 222 interrupts = <32 0x8 33 0x8 34 0x8>;
206 phy-connection-type = "mii"; 223 phy-connection-type = "mii";
207 interrupt-parent = <&ipic>; 224 interrupt-parent = <&ipic>;
225 tbi-handle = <&tbi0>;
208 phy-handle = <&phy2>; 226 phy-handle = <&phy2>;
209 }; 227 };
210 228
@@ -218,6 +236,7 @@
218 interrupts = <35 0x8 36 0x8 37 0x8>; 236 interrupts = <35 0x8 36 0x8 37 0x8>;
219 phy-connection-type = "mii"; 237 phy-connection-type = "mii";
220 interrupt-parent = <&ipic>; 238 interrupt-parent = <&ipic>;
239 tbi-handle = <&tbi1>;
221 phy-handle = <&phy3>; 240 phy-handle = <&phy3>;
222 }; 241 };
223 242
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 435ef3dd022d..9413af3b9925 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -117,7 +117,6 @@
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 dfsrr; 118 dfsrr;
119 rtc@68 { 119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339"; 120 compatible = "dallas,ds1339";
122 reg = <0x68>; 121 reg = <0x68>;
123 }; 122 };
@@ -211,8 +210,25 @@
211 reg = <0x2>; 210 reg = <0x2>;
212 device_type = "ethernet-phy"; 211 device_type = "ethernet-phy";
213 }; 212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
214 }; 229 };
215 230
231
216 enet0: ethernet@24000 { 232 enet0: ethernet@24000 {
217 cell-index = <0>; 233 cell-index = <0>;
218 device_type = "network"; 234 device_type = "network";
@@ -223,6 +239,7 @@
223 interrupts = <32 0x8 33 0x8 34 0x8>; 239 interrupts = <32 0x8 33 0x8 34 0x8>;
224 phy-connection-type = "mii"; 240 phy-connection-type = "mii";
225 interrupt-parent = <&ipic>; 241 interrupt-parent = <&ipic>;
242 tbi-handle = <&tbi0>;
226 phy-handle = <&phy2>; 243 phy-handle = <&phy2>;
227 }; 244 };
228 245
@@ -237,6 +254,7 @@
237 phy-connection-type = "mii"; 254 phy-connection-type = "mii";
238 interrupt-parent = <&ipic>; 255 interrupt-parent = <&ipic>;
239 fixed-link = <1 1 1000 0 0>; 256 fixed-link = <1 1 1000 0 0>;
257 tbi-handle = <&tbi1>;
240 }; 258 };
241 259
242 serial0: serial@4500 { 260 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 67a08d2e2ff2..b85fc02682d2 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -232,8 +232,25 @@
232 reg = <0x3>; 232 reg = <0x3>;
233 device_type = "ethernet-phy"; 233 device_type = "ethernet-phy";
234 }; 234 };
235 tbi0: tbi-phy@11 {
236 reg = <0x11>;
237 device_type = "tbi-phy";
238 };
239 };
240
241 mdio@25520 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,gianfar-tbi";
245 reg = <0x25520 0x20>;
246
247 tbi1: tbi-phy@11 {
248 reg = <0x11>;
249 device_type = "tbi-phy";
250 };
235 }; 251 };
236 252
253
237 enet0: ethernet@24000 { 254 enet0: ethernet@24000 {
238 cell-index = <0>; 255 cell-index = <0>;
239 device_type = "network"; 256 device_type = "network";
@@ -244,6 +261,7 @@
244 interrupts = <32 0x8 33 0x8 34 0x8>; 261 interrupts = <32 0x8 33 0x8 34 0x8>;
245 phy-connection-type = "mii"; 262 phy-connection-type = "mii";
246 interrupt-parent = <&ipic>; 263 interrupt-parent = <&ipic>;
264 tbi-handle = <&tbi0>;
247 phy-handle = <&phy2>; 265 phy-handle = <&phy2>;
248 }; 266 };
249 267
@@ -257,6 +275,7 @@
257 interrupts = <35 0x8 36 0x8 37 0x8>; 275 interrupts = <35 0x8 36 0x8 37 0x8>;
258 phy-connection-type = "mii"; 276 phy-connection-type = "mii";
259 interrupt-parent = <&ipic>; 277 interrupt-parent = <&ipic>;
278 tbi-handle = <&tbi1>;
260 phy-handle = <&phy3>; 279 phy-handle = <&phy3>;
261 }; 280 };
262 281
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index b11e68f56a06..23c10ce22c2c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -117,7 +117,6 @@
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 dfsrr; 118 dfsrr;
119 rtc@68 { 119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339"; 120 compatible = "dallas,ds1339";
122 reg = <0x68>; 121 reg = <0x68>;
123 }; 122 };
@@ -211,8 +210,25 @@
211 reg = <0x2>; 210 reg = <0x2>;
212 device_type = "ethernet-phy"; 211 device_type = "ethernet-phy";
213 }; 212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
214 }; 229 };
215 230
231
216 enet0: ethernet@24000 { 232 enet0: ethernet@24000 {
217 cell-index = <0>; 233 cell-index = <0>;
218 device_type = "network"; 234 device_type = "network";
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 323370a2b5ff..acf06c438dbf 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -232,6 +232,22 @@
232 reg = <0x3>; 232 reg = <0x3>;
233 device_type = "ethernet-phy"; 233 device_type = "ethernet-phy";
234 }; 234 };
235 tbi0: tbi-phy@11 {
236 reg = <0x11>;
237 device_type = "tbi-phy";
238 };
239 };
240
241 mdio@25520 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,gianfar-tbi";
245 reg = <0x25520 0x20>;
246
247 tbi1: tbi-phy@11 {
248 reg = <0x11>;
249 device_type = "tbi-phy";
250 };
235 }; 251 };
236 252
237 enet0: ethernet@24000 { 253 enet0: ethernet@24000 {
@@ -244,6 +260,7 @@
244 interrupts = <32 0x8 33 0x8 34 0x8>; 260 interrupts = <32 0x8 33 0x8 34 0x8>;
245 phy-connection-type = "mii"; 261 phy-connection-type = "mii";
246 interrupt-parent = <&ipic>; 262 interrupt-parent = <&ipic>;
263 tbi-handle = <&tbi0>;
247 phy-handle = <&phy2>; 264 phy-handle = <&phy2>;
248 }; 265 };
249 266
@@ -257,6 +274,7 @@
257 interrupts = <35 0x8 36 0x8 37 0x8>; 274 interrupts = <35 0x8 36 0x8 37 0x8>;
258 phy-connection-type = "mii"; 275 phy-connection-type = "mii";
259 interrupt-parent = <&ipic>; 276 interrupt-parent = <&ipic>;
277 tbi-handle = <&tbi1>;
260 phy-handle = <&phy3>; 278 phy-handle = <&phy3>;
261 }; 279 };
262 280
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 337af6ea26d3..72cdc3c4c7e3 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -117,7 +117,6 @@
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 dfsrr; 118 dfsrr;
119 rtc@68 { 119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339"; 120 compatible = "dallas,ds1339";
122 reg = <0x68>; 121 reg = <0x68>;
123 }; 122 };
@@ -211,6 +210,22 @@
211 reg = <0x2>; 210 reg = <0x2>;
212 device_type = "ethernet-phy"; 211 device_type = "ethernet-phy";
213 }; 212 };
213 tbi0: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 mdio@25520 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "fsl,gianfar-tbi";
223 reg = <0x25520 0x20>;
224
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
214 }; 229 };
215 230
216 enet0: ethernet@24000 { 231 enet0: ethernet@24000 {
@@ -223,6 +238,7 @@
223 interrupts = <32 0x8 33 0x8 34 0x8>; 238 interrupts = <32 0x8 33 0x8 34 0x8>;
224 phy-connection-type = "mii"; 239 phy-connection-type = "mii";
225 interrupt-parent = <&ipic>; 240 interrupt-parent = <&ipic>;
241 tbi-handle = <&tbi0>;
226 phy-handle = <&phy2>; 242 phy-handle = <&phy2>;
227 }; 243 };
228 244
@@ -237,6 +253,7 @@
237 phy-connection-type = "mii"; 253 phy-connection-type = "mii";
238 interrupt-parent = <&ipic>; 254 interrupt-parent = <&ipic>;
239 fixed-link = <1 1 1000 0 0>; 255 fixed-link = <1 1 1000 0 0>;
256 tbi-handle = <&tbi1>;
240 }; 257 };
241 258
242 serial0: serial@4500 { 259 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 35db1e5440c7..3c905df1812c 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -155,6 +155,22 @@
155 reg = <1>; 155 reg = <1>;
156 device_type = "ethernet-phy"; 156 device_type = "ethernet-phy";
157 }; 157 };
158 tbi0: tbi-phy@11 {
159 reg = <0x11>;
160 device_type = "tbi-phy";
161 };
162 };
163
164 mdio@26520 {
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "fsl,gianfar-tbi";
168 reg = <0x26520 0x20>;
169
170 tbi1: tbi-phy@11 {
171 reg = <0x11>;
172 device_type = "tbi-phy";
173 };
158 }; 174 };
159 175
160 usb@22000 { 176 usb@22000 {
@@ -186,6 +202,7 @@
186 local-mac-address = [ 00 00 00 00 00 00 ]; 202 local-mac-address = [ 00 00 00 00 00 00 ];
187 interrupts = <29 2 30 2 34 2>; 203 interrupts = <29 2 30 2 34 2>;
188 interrupt-parent = <&mpic>; 204 interrupt-parent = <&mpic>;
205 tbi-handle = <&tbi0>;
189 phy-handle = <&phy1>; 206 phy-handle = <&phy1>;
190 phy-connection-type = "rgmii-id"; 207 phy-connection-type = "rgmii-id";
191 }; 208 };
@@ -199,6 +216,7 @@
199 local-mac-address = [ 00 00 00 00 00 00 ]; 216 local-mac-address = [ 00 00 00 00 00 00 ];
200 interrupts = <31 2 32 2 33 2>; 217 interrupts = <31 2 32 2 33 2>;
201 interrupt-parent = <&mpic>; 218 interrupt-parent = <&mpic>;
219 tbi-handle = <&tbi1>;
202 phy-handle = <&phy0>; 220 phy-handle = <&phy0>;
203 phy-connection-type = "rgmii-id"; 221 phy-connection-type = "rgmii-id";
204 }; 222 };
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 9568bfaff8f7..79570ffe41b9 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -150,6 +150,34 @@
150 reg = <0x3>; 150 reg = <0x3>;
151 device_type = "ethernet-phy"; 151 device_type = "ethernet-phy";
152 }; 152 };
153 tbi0: tbi-phy@11 {
154 reg = <0x11>;
155 device_type = "tbi-phy";
156 };
157 };
158
159 mdio@25520 {
160 #address-cells = <1>;
161 #size-cells = <0>;
162 compatible = "fsl,gianfar-tbi";
163 reg = <0x25520 0x20>;
164
165 tbi1: tbi-phy@11 {
166 reg = <0x11>;
167 device_type = "tbi-phy";
168 };
169 };
170
171 mdio@26520 {
172 #address-cells = <1>;
173 #size-cells = <0>;
174 compatible = "fsl,gianfar-tbi";
175 reg = <0x26520 0x20>;
176
177 tbi2: tbi-phy@11 {
178 reg = <0x11>;
179 device_type = "tbi-phy";
180 };
153 }; 181 };
154 182
155 enet0: ethernet@24000 { 183 enet0: ethernet@24000 {
@@ -161,6 +189,7 @@
161 local-mac-address = [ 00 00 00 00 00 00 ]; 189 local-mac-address = [ 00 00 00 00 00 00 ];
162 interrupts = <29 2 30 2 34 2>; 190 interrupts = <29 2 30 2 34 2>;
163 interrupt-parent = <&mpic>; 191 interrupt-parent = <&mpic>;
192 tbi-handle = <&tbi0>;
164 phy-handle = <&phy0>; 193 phy-handle = <&phy0>;
165 }; 194 };
166 195
@@ -173,6 +202,7 @@
173 local-mac-address = [ 00 00 00 00 00 00 ]; 202 local-mac-address = [ 00 00 00 00 00 00 ];
174 interrupts = <35 2 36 2 40 2>; 203 interrupts = <35 2 36 2 40 2>;
175 interrupt-parent = <&mpic>; 204 interrupt-parent = <&mpic>;
205 tbi-handle = <&tbi1>;
176 phy-handle = <&phy1>; 206 phy-handle = <&phy1>;
177 }; 207 };
178 208
@@ -185,6 +215,7 @@
185 local-mac-address = [ 00 00 00 00 00 00 ]; 215 local-mac-address = [ 00 00 00 00 00 00 ];
186 interrupts = <41 2>; 216 interrupts = <41 2>;
187 interrupt-parent = <&mpic>; 217 interrupt-parent = <&mpic>;
218 tbi-handle = <&tbi2>;
188 phy-handle = <&phy3>; 219 phy-handle = <&phy3>;
189 }; 220 };
190 221
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 6480f4fd96e0..221036a8ce23 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -144,6 +144,22 @@
144 reg = <0x1>; 144 reg = <0x1>;
145 device_type = "ethernet-phy"; 145 device_type = "ethernet-phy";
146 }; 146 };
147 tbi0: tbi-phy@11 {
148 reg = <0x11>;
149 device_type = "tbi-phy";
150 };
151 };
152
153 mdio@25520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-tbi";
157 reg = <0x25520 0x20>;
158
159 tbi1: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
147 }; 163 };
148 164
149 enet0: ethernet@24000 { 165 enet0: ethernet@24000 {
@@ -155,6 +171,7 @@
155 local-mac-address = [ 00 00 00 00 00 00 ]; 171 local-mac-address = [ 00 00 00 00 00 00 ];
156 interrupts = <29 2 30 2 34 2>; 172 interrupts = <29 2 30 2 34 2>;
157 interrupt-parent = <&mpic>; 173 interrupt-parent = <&mpic>;
174 tbi-handle = <&tbi0>;
158 phy-handle = <&phy0>; 175 phy-handle = <&phy0>;
159 }; 176 };
160 177
@@ -167,6 +184,7 @@
167 local-mac-address = [ 00 00 00 00 00 00 ]; 184 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <35 2 36 2 40 2>; 185 interrupts = <35 2 36 2 40 2>;
169 interrupt-parent = <&mpic>; 186 interrupt-parent = <&mpic>;
187 tbi-handle = <&tbi1>;
170 phy-handle = <&phy1>; 188 phy-handle = <&phy1>;
171 }; 189 };
172 190
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index f1fb20737e3e..b9da42105066 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -116,8 +116,26 @@
116 reg = <0x1>; 116 reg = <0x1>;
117 device_type = "ethernet-phy"; 117 device_type = "ethernet-phy";
118 }; 118 };
119
120 tbi0: tbi-phy@11 {
121 reg = <0x11>;
122 device_type = "tbi-phy";
123 };
119 }; 124 };
120 125
126 mdio@26520 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 compatible = "fsl,gianfar-tbi";
130 reg = <0x26520 0x20>;
131
132 tbi1: tbi-phy@11 {
133 reg = <0x11>;
134 device_type = "tbi-phy";
135 };
136 };
137
138
121 dma@21300 { 139 dma@21300 {
122 #address-cells = <1>; 140 #address-cells = <1>;
123 #size-cells = <1>; 141 #size-cells = <1>;
@@ -169,6 +187,7 @@
169 interrupts = <29 2 30 2 34 2>; 187 interrupts = <29 2 30 2 34 2>;
170 interrupt-parent = <&mpic>; 188 interrupt-parent = <&mpic>;
171 phy-handle = <&phy0>; 189 phy-handle = <&phy0>;
190 tbi-handle = <&tbi0>;
172 phy-connection-type = "rgmii-id"; 191 phy-connection-type = "rgmii-id";
173 }; 192 };
174 193
@@ -182,6 +201,7 @@
182 interrupts = <31 2 32 2 33 2>; 201 interrupts = <31 2 32 2 33 2>;
183 interrupt-parent = <&mpic>; 202 interrupt-parent = <&mpic>;
184 phy-handle = <&phy1>; 203 phy-handle = <&phy1>;
204 tbi-handle = <&tbi1>;
185 phy-connection-type = "rgmii-id"; 205 phy-connection-type = "rgmii-id";
186 }; 206 };
187 207
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 431b496270dc..df774a7088ff 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -172,6 +172,46 @@
172 reg = <0x3>; 172 reg = <0x3>;
173 device_type = "ethernet-phy"; 173 device_type = "ethernet-phy";
174 }; 174 };
175 tbi0: tbi-phy@11 {
176 reg = <0x11>;
177 device_type = "tbi-phy";
178 };
179 };
180
181 mdio@25520 {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 compatible = "fsl,gianfar-tbi";
185 reg = <0x25520 0x20>;
186
187 tbi1: tbi-phy@11 {
188 reg = <0x11>;
189 device_type = "tbi-phy";
190 };
191 };
192
193 mdio@26520 {
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "fsl,gianfar-tbi";
197 reg = <0x26520 0x20>;
198
199 tbi2: tbi-phy@11 {
200 reg = <0x11>;
201 device_type = "tbi-phy";
202 };
203 };
204
205 mdio@27520 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "fsl,gianfar-tbi";
209 reg = <0x27520 0x20>;
210
211 tbi3: tbi-phy@11 {
212 reg = <0x11>;
213 device_type = "tbi-phy";
214 };
175 }; 215 };
176 216
177 enet0: ethernet@24000 { 217 enet0: ethernet@24000 {
@@ -183,6 +223,7 @@
183 local-mac-address = [ 00 00 00 00 00 00 ]; 223 local-mac-address = [ 00 00 00 00 00 00 ];
184 interrupts = <29 2 30 2 34 2>; 224 interrupts = <29 2 30 2 34 2>;
185 interrupt-parent = <&mpic>; 225 interrupt-parent = <&mpic>;
226 tbi-handle = <&tbi0>;
186 phy-handle = <&phy0>; 227 phy-handle = <&phy0>;
187 }; 228 };
188 229
@@ -195,6 +236,7 @@
195 local-mac-address = [ 00 00 00 00 00 00 ]; 236 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <35 2 36 2 40 2>; 237 interrupts = <35 2 36 2 40 2>;
197 interrupt-parent = <&mpic>; 238 interrupt-parent = <&mpic>;
239 tbi-handle = <&tbi1>;
198 phy-handle = <&phy1>; 240 phy-handle = <&phy1>;
199 }; 241 };
200 242
@@ -208,6 +250,7 @@
208 local-mac-address = [ 00 00 00 00 00 00 ]; 250 local-mac-address = [ 00 00 00 00 00 00 ];
209 interrupts = <31 2 32 2 33 2>; 251 interrupts = <31 2 32 2 33 2>;
210 interrupt-parent = <&mpic>; 252 interrupt-parent = <&mpic>;
253 tbi-handle = <&tbi2>;
211 phy-handle = <&phy2>; 254 phy-handle = <&phy2>;
212 }; 255 };
213 256
@@ -220,6 +263,7 @@
220 local-mac-address = [ 00 00 00 00 00 00 ]; 263 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupts = <37 2 38 2 39 2>; 264 interrupts = <37 2 38 2 39 2>;
222 interrupt-parent = <&mpic>; 265 interrupt-parent = <&mpic>;
266 tbi-handle = <&tbi3>;
223 phy-handle = <&phy3>; 267 phy-handle = <&phy3>;
224 }; 268 };
225 */ 269 */
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index d833a5c4f476..053b01e1c93b 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -144,6 +144,22 @@
144 reg = <0x1>; 144 reg = <0x1>;
145 device_type = "ethernet-phy"; 145 device_type = "ethernet-phy";
146 }; 146 };
147 tbi0: tbi-phy@11 {
148 reg = <0x11>;
149 device_type = "tbi-phy";
150 };
151 };
152
153 mdio@25520 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "fsl,gianfar-tbi";
157 reg = <0x25520 0x20>;
158
159 tbi1: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
147 }; 163 };
148 164
149 enet0: ethernet@24000 { 165 enet0: ethernet@24000 {
@@ -155,6 +171,7 @@
155 local-mac-address = [ 00 00 00 00 00 00 ]; 171 local-mac-address = [ 00 00 00 00 00 00 ];
156 interrupts = <29 2 30 2 34 2>; 172 interrupts = <29 2 30 2 34 2>;
157 interrupt-parent = <&mpic>; 173 interrupt-parent = <&mpic>;
174 tbi-handle = <&tbi0>;
158 phy-handle = <&phy0>; 175 phy-handle = <&phy0>;
159 }; 176 };
160 177
@@ -167,6 +184,7 @@
167 local-mac-address = [ 00 00 00 00 00 00 ]; 184 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <35 2 36 2 40 2>; 185 interrupts = <35 2 36 2 40 2>;
169 interrupt-parent = <&mpic>; 186 interrupt-parent = <&mpic>;
187 tbi-handle = <&tbi1>;
170 phy-handle = <&phy1>; 188 phy-handle = <&phy1>;
171 }; 189 };
172 190
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 4d1f2f284094..11b1bcbe14ce 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -145,6 +145,22 @@
145 reg = <0x3>; 145 reg = <0x3>;
146 device_type = "ethernet-phy"; 146 device_type = "ethernet-phy";
147 }; 147 };
148 tbi0: tbi-phy@11 {
149 reg = <0x11>;
150 device_type = "tbi-phy";
151 };
152 };
153
154 mdio@25520 {
155 #address-cells = <1>;
156 #size-cells = <0>;
157 compatible = "fsl,gianfar-tbi";
158 reg = <0x25520 0x20>;
159
160 tbi1: tbi-phy@11 {
161 reg = <0x11>;
162 device_type = "tbi-phy";
163 };
148 }; 164 };
149 165
150 enet0: ethernet@24000 { 166 enet0: ethernet@24000 {
@@ -156,6 +172,7 @@
156 local-mac-address = [ 00 00 00 00 00 00 ]; 172 local-mac-address = [ 00 00 00 00 00 00 ];
157 interrupts = <29 2 30 2 34 2>; 173 interrupts = <29 2 30 2 34 2>;
158 interrupt-parent = <&mpic>; 174 interrupt-parent = <&mpic>;
175 tbi-handle = <&tbi0>;
159 phy-handle = <&phy0>; 176 phy-handle = <&phy0>;
160 }; 177 };
161 178
@@ -168,6 +185,7 @@
168 local-mac-address = [ 00 00 00 00 00 00 ]; 185 local-mac-address = [ 00 00 00 00 00 00 ];
169 interrupts = <35 2 36 2 40 2>; 186 interrupts = <35 2 36 2 40 2>;
170 interrupt-parent = <&mpic>; 187 interrupt-parent = <&mpic>;
188 tbi-handle = <&tbi1>;
171 phy-handle = <&phy1>; 189 phy-handle = <&phy1>;
172 }; 190 };
173 191
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index c80158f7741d..1955bd9e113d 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -179,6 +179,22 @@
179 reg = <0x3>; 179 reg = <0x3>;
180 device_type = "ethernet-phy"; 180 device_type = "ethernet-phy";
181 }; 181 };
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 mdio@25520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-tbi";
192 reg = <0x25520 0x20>;
193
194 tbi1: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
182 }; 198 };
183 199
184 enet0: ethernet@24000 { 200 enet0: ethernet@24000 {
@@ -190,6 +206,7 @@
190 local-mac-address = [ 00 00 00 00 00 00 ]; 206 local-mac-address = [ 00 00 00 00 00 00 ];
191 interrupts = <29 2 30 2 34 2>; 207 interrupts = <29 2 30 2 34 2>;
192 interrupt-parent = <&mpic>; 208 interrupt-parent = <&mpic>;
209 tbi-handle = <&tbi0>;
193 phy-handle = <&phy2>; 210 phy-handle = <&phy2>;
194 }; 211 };
195 212
@@ -202,6 +219,7 @@
202 local-mac-address = [ 00 00 00 00 00 00 ]; 219 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <35 2 36 2 40 2>; 220 interrupts = <35 2 36 2 40 2>;
204 interrupt-parent = <&mpic>; 221 interrupt-parent = <&mpic>;
222 tbi-handle = <&tbi1>;
205 phy-handle = <&phy3>; 223 phy-handle = <&phy3>;
206 }; 224 };
207 225
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 5c69b2fafd32..21459e161d02 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -63,6 +63,119 @@
63 device_type = "memory"; 63 device_type = "memory";
64 }; 64 };
65 65
66 localbus@ffe05000 {
67 #address-cells = <2>;
68 #size-cells = <1>;
69 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
70 reg = <0 0xffe05000 0 0x1000>;
71 interrupts = <19 2>;
72 interrupt-parent = <&mpic>;
73
74 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
75 0x1 0x0 0x0 0xe0000000 0x08000000
76 0x2 0x0 0x0 0xffa00000 0x00040000
77 0x3 0x0 0x0 0xffdf0000 0x00008000
78 0x4 0x0 0x0 0xffa40000 0x00040000
79 0x5 0x0 0x0 0xffa80000 0x00040000
80 0x6 0x0 0x0 0xffac0000 0x00040000>;
81
82 nor@0,0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "cfi-flash";
86 reg = <0x0 0x0 0x8000000>;
87 bank-width = <2>;
88 device-width = <1>;
89
90 ramdisk@0 {
91 reg = <0x0 0x03000000>;
92 readl-only;
93 };
94
95 diagnostic@3000000 {
96 reg = <0x03000000 0x00e00000>;
97 read-only;
98 };
99
100 dink@3e00000 {
101 reg = <0x03e00000 0x00200000>;
102 read-only;
103 };
104
105 kernel@4000000 {
106 reg = <0x04000000 0x00400000>;
107 read-only;
108 };
109
110 jffs2@4400000 {
111 reg = <0x04400000 0x03b00000>;
112 };
113
114 dtb@7f00000 {
115 reg = <0x07f00000 0x00080000>;
116 read-only;
117 };
118
119 u-boot@7f80000 {
120 reg = <0x07f80000 0x00080000>;
121 read-only;
122 };
123 };
124
125 nand@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,mpc8572-fcm-nand",
129 "fsl,elbc-fcm-nand";
130 reg = <0x2 0x0 0x40000>;
131
132 u-boot@0 {
133 reg = <0x0 0x02000000>;
134 read-only;
135 };
136
137 jffs2@2000000 {
138 reg = <0x02000000 0x10000000>;
139 };
140
141 ramdisk@12000000 {
142 reg = <0x12000000 0x08000000>;
143 read-only;
144 };
145
146 kernel@1a000000 {
147 reg = <0x1a000000 0x04000000>;
148 };
149
150 dtb@1e000000 {
151 reg = <0x1e000000 0x01000000>;
152 read-only;
153 };
154
155 empty@1f000000 {
156 reg = <0x1f000000 0x21000000>;
157 };
158 };
159
160 nand@4,0 {
161 compatible = "fsl,mpc8572-fcm-nand",
162 "fsl,elbc-fcm-nand";
163 reg = <0x4 0x0 0x40000>;
164 };
165
166 nand@5,0 {
167 compatible = "fsl,mpc8572-fcm-nand",
168 "fsl,elbc-fcm-nand";
169 reg = <0x5 0x0 0x40000>;
170 };
171
172 nand@6,0 {
173 compatible = "fsl,mpc8572-fcm-nand",
174 "fsl,elbc-fcm-nand";
175 reg = <0x6 0x0 0x40000>;
176 };
177 };
178
66 soc8572@ffe00000 { 179 soc8572@ffe00000 {
67 #address-cells = <1>; 180 #address-cells = <1>;
68 #size-cells = <1>; 181 #size-cells = <1>;
@@ -225,6 +338,47 @@
225 interrupts = <10 1>; 338 interrupts = <10 1>;
226 reg = <0x3>; 339 reg = <0x3>;
227 }; 340 };
341
342 tbi0: tbi-phy@11 {
343 reg = <0x11>;
344 device_type = "tbi-phy";
345 };
346 };
347
348 mdio@25520 {
349 #address-cells = <1>;
350 #size-cells = <0>;
351 compatible = "fsl,gianfar-tbi";
352 reg = <0x25520 0x20>;
353
354 tbi1: tbi-phy@11 {
355 reg = <0x11>;
356 device_type = "tbi-phy";
357 };
358 };
359
360 mdio@26520 {
361 #address-cells = <1>;
362 #size-cells = <0>;
363 compatible = "fsl,gianfar-tbi";
364 reg = <0x26520 0x20>;
365
366 tbi2: tbi-phy@11 {
367 reg = <0x11>;
368 device_type = "tbi-phy";
369 };
370 };
371
372 mdio@27520 {
373 #address-cells = <1>;
374 #size-cells = <0>;
375 compatible = "fsl,gianfar-tbi";
376 reg = <0x27520 0x20>;
377
378 tbi3: tbi-phy@11 {
379 reg = <0x11>;
380 device_type = "tbi-phy";
381 };
228 }; 382 };
229 383
230 enet0: ethernet@24000 { 384 enet0: ethernet@24000 {
@@ -236,6 +390,7 @@
236 local-mac-address = [ 00 00 00 00 00 00 ]; 390 local-mac-address = [ 00 00 00 00 00 00 ];
237 interrupts = <29 2 30 2 34 2>; 391 interrupts = <29 2 30 2 34 2>;
238 interrupt-parent = <&mpic>; 392 interrupt-parent = <&mpic>;
393 tbi-handle = <&tbi0>;
239 phy-handle = <&phy0>; 394 phy-handle = <&phy0>;
240 phy-connection-type = "rgmii-id"; 395 phy-connection-type = "rgmii-id";
241 }; 396 };
@@ -249,6 +404,7 @@
249 local-mac-address = [ 00 00 00 00 00 00 ]; 404 local-mac-address = [ 00 00 00 00 00 00 ];
250 interrupts = <35 2 36 2 40 2>; 405 interrupts = <35 2 36 2 40 2>;
251 interrupt-parent = <&mpic>; 406 interrupt-parent = <&mpic>;
407 tbi-handle = <&tbi1>;
252 phy-handle = <&phy1>; 408 phy-handle = <&phy1>;
253 phy-connection-type = "rgmii-id"; 409 phy-connection-type = "rgmii-id";
254 }; 410 };
@@ -262,6 +418,7 @@
262 local-mac-address = [ 00 00 00 00 00 00 ]; 418 local-mac-address = [ 00 00 00 00 00 00 ];
263 interrupts = <31 2 32 2 33 2>; 419 interrupts = <31 2 32 2 33 2>;
264 interrupt-parent = <&mpic>; 420 interrupt-parent = <&mpic>;
421 tbi-handle = <&tbi2>;
265 phy-handle = <&phy2>; 422 phy-handle = <&phy2>;
266 phy-connection-type = "rgmii-id"; 423 phy-connection-type = "rgmii-id";
267 }; 424 };
@@ -275,6 +432,7 @@
275 local-mac-address = [ 00 00 00 00 00 00 ]; 432 local-mac-address = [ 00 00 00 00 00 00 ];
276 interrupts = <37 2 38 2 39 2>; 433 interrupts = <37 2 38 2 39 2>;
277 interrupt-parent = <&mpic>; 434 interrupt-parent = <&mpic>;
435 tbi-handle = <&tbi3>;
278 phy-handle = <&phy3>; 436 phy-handle = <&phy3>;
279 phy-connection-type = "rgmii-id"; 437 phy-connection-type = "rgmii-id";
280 }; 438 };
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
new file mode 100644
index 000000000000..c114c4ee9931
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -0,0 +1,483 @@
1/*
2 * MPC8572 DS Core0 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
7 * eth1, crypto, pci0, pci1.
8 *
9 * Copyright 2007, 2008 Freescale Semiconductor Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17/dts-v1/;
18/ {
19 model = "fsl,MPC8572DS";
20 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 aliases {
25 ethernet0 = &enet0;
26 ethernet1 = &enet1;
27 serial0 = &serial0;
28 pci0 = &pci0;
29 pci1 = &pci1;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8572@0 {
37 device_type = "cpu";
38 reg = <0x0>;
39 d-cache-line-size = <32>; // 32 bytes
40 i-cache-line-size = <32>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>;
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
47 };
48
49 };
50
51 memory {
52 device_type = "memory";
53 reg = <0x0 0x0>; // Filled by U-Boot
54 };
55
56 soc8572@ffe00000 {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 device_type = "soc";
60 compatible = "simple-bus";
61 ranges = <0x0 0xffe00000 0x100000>;
62 reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
63 bus-frequency = <0>; // Filled out by uboot.
64
65 memory-controller@2000 {
66 compatible = "fsl,mpc8572-memory-controller";
67 reg = <0x2000 0x1000>;
68 interrupt-parent = <&mpic>;
69 interrupts = <18 2>;
70 };
71
72 memory-controller@6000 {
73 compatible = "fsl,mpc8572-memory-controller";
74 reg = <0x6000 0x1000>;
75 interrupt-parent = <&mpic>;
76 interrupts = <18 2>;
77 };
78
79 L2: l2-cache-controller@20000 {
80 compatible = "fsl,mpc8572-l2-cache-controller";
81 reg = <0x20000 0x1000>;
82 cache-line-size = <32>; // 32 bytes
83 cache-size = <0x80000>; // L2, 512K
84 interrupt-parent = <&mpic>;
85 interrupts = <16 2>;
86 };
87
88 i2c@3000 {
89 #address-cells = <1>;
90 #size-cells = <0>;
91 cell-index = <0>;
92 compatible = "fsl-i2c";
93 reg = <0x3000 0x100>;
94 interrupts = <43 2>;
95 interrupt-parent = <&mpic>;
96 dfsrr;
97 };
98
99 i2c@3100 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 cell-index = <1>;
103 compatible = "fsl-i2c";
104 reg = <0x3100 0x100>;
105 interrupts = <43 2>;
106 interrupt-parent = <&mpic>;
107 dfsrr;
108 };
109
110 dma@21300 {
111 #address-cells = <1>;
112 #size-cells = <1>;
113 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
114 reg = <0x21300 0x4>;
115 ranges = <0x0 0x21100 0x200>;
116 cell-index = <0>;
117 dma-channel@0 {
118 compatible = "fsl,mpc8572-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x0 0x80>;
121 cell-index = <0>;
122 interrupt-parent = <&mpic>;
123 interrupts = <20 2>;
124 };
125 dma-channel@80 {
126 compatible = "fsl,mpc8572-dma-channel",
127 "fsl,eloplus-dma-channel";
128 reg = <0x80 0x80>;
129 cell-index = <1>;
130 interrupt-parent = <&mpic>;
131 interrupts = <21 2>;
132 };
133 dma-channel@100 {
134 compatible = "fsl,mpc8572-dma-channel",
135 "fsl,eloplus-dma-channel";
136 reg = <0x100 0x80>;
137 cell-index = <2>;
138 interrupt-parent = <&mpic>;
139 interrupts = <22 2>;
140 };
141 dma-channel@180 {
142 compatible = "fsl,mpc8572-dma-channel",
143 "fsl,eloplus-dma-channel";
144 reg = <0x180 0x80>;
145 cell-index = <3>;
146 interrupt-parent = <&mpic>;
147 interrupts = <23 2>;
148 };
149 };
150
151 mdio@24520 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,gianfar-mdio";
155 reg = <0x24520 0x20>;
156
157 phy0: ethernet-phy@0 {
158 interrupt-parent = <&mpic>;
159 interrupts = <10 1>;
160 reg = <0x0>;
161 };
162 phy1: ethernet-phy@1 {
163 interrupt-parent = <&mpic>;
164 interrupts = <10 1>;
165 reg = <0x1>;
166 };
167 };
168
169 enet0: ethernet@24000 {
170 cell-index = <0>;
171 device_type = "network";
172 model = "eTSEC";
173 compatible = "gianfar";
174 reg = <0x24000 0x1000>;
175 local-mac-address = [ 00 00 00 00 00 00 ];
176 interrupts = <29 2 30 2 34 2>;
177 interrupt-parent = <&mpic>;
178 phy-handle = <&phy0>;
179 phy-connection-type = "rgmii-id";
180 };
181
182 enet1: ethernet@25000 {
183 cell-index = <1>;
184 device_type = "network";
185 model = "eTSEC";
186 compatible = "gianfar";
187 reg = <0x25000 0x1000>;
188 local-mac-address = [ 00 00 00 00 00 00 ];
189 interrupts = <35 2 36 2 40 2>;
190 interrupt-parent = <&mpic>;
191 phy-handle = <&phy1>;
192 phy-connection-type = "rgmii-id";
193 };
194
195 serial0: serial@4500 {
196 cell-index = <0>;
197 device_type = "serial";
198 compatible = "ns16550";
199 reg = <0x4500 0x100>;
200 clock-frequency = <0>;
201 };
202
203 global-utilities@e0000 { //global utilities block
204 compatible = "fsl,mpc8572-guts";
205 reg = <0xe0000 0x1000>;
206 fsl,has-rstcr;
207 };
208
209 crypto@30000 {
210 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
211 "fsl,sec2.1", "fsl,sec2.0";
212 reg = <0x30000 0x10000>;
213 interrupts = <45 2 58 2>;
214 interrupt-parent = <&mpic>;
215 fsl,num-channels = <4>;
216 fsl,channel-fifo-len = <24>;
217 fsl,exec-units-mask = <0x9fe>;
218 fsl,descriptor-types-mask = <0x3ab0ebf>;
219 };
220
221 mpic: pic@40000 {
222 interrupt-controller;
223 #address-cells = <0>;
224 #interrupt-cells = <2>;
225 reg = <0x40000 0x40000>;
226 compatible = "chrp,open-pic";
227 device_type = "open-pic";
228 protected-sources = <
229 31 32 33 37 38 39 /* enet2 enet3 */
230 76 77 78 79 27 42 /* dma2 pci2 serial*/
231 0xe0 0xe1 0xe2 0xe3 /* msi */
232 0xe4 0xe5 0xe6 0xe7
233 >;
234 };
235 };
236
237 pci0: pcie@ffe08000 {
238 cell-index = <0>;
239 compatible = "fsl,mpc8548-pcie";
240 device_type = "pci";
241 #interrupt-cells = <1>;
242 #size-cells = <2>;
243 #address-cells = <3>;
244 reg = <0xffe08000 0x1000>;
245 bus-range = <0 255>;
246 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
247 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>;
248 clock-frequency = <33333333>;
249 interrupt-parent = <&mpic>;
250 interrupts = <24 2>;
251 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
252 interrupt-map = <
253 /* IDSEL 0x11 func 0 - PCI slot 1 */
254 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
255 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
256 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
257 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
258
259 /* IDSEL 0x11 func 1 - PCI slot 1 */
260 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
261 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
262 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
263 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
264
265 /* IDSEL 0x11 func 2 - PCI slot 1 */
266 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
267 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
268 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
269 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
270
271 /* IDSEL 0x11 func 3 - PCI slot 1 */
272 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
273 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
274 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
275 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
276
277 /* IDSEL 0x11 func 4 - PCI slot 1 */
278 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
279 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
280 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
281 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
282
283 /* IDSEL 0x11 func 5 - PCI slot 1 */
284 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
285 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
286 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
287 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
288
289 /* IDSEL 0x11 func 6 - PCI slot 1 */
290 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
291 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
292 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
293 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
294
295 /* IDSEL 0x11 func 7 - PCI slot 1 */
296 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
297 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
298 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
299 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
300
301 /* IDSEL 0x12 func 0 - PCI slot 2 */
302 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
303 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
304 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
305 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
306
307 /* IDSEL 0x12 func 1 - PCI slot 2 */
308 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
309 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
310 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
311 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
312
313 /* IDSEL 0x12 func 2 - PCI slot 2 */
314 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
315 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
316 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
317 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
318
319 /* IDSEL 0x12 func 3 - PCI slot 2 */
320 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
321 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
322 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
323 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
324
325 /* IDSEL 0x12 func 4 - PCI slot 2 */
326 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
327 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
328 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
329 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
330
331 /* IDSEL 0x12 func 5 - PCI slot 2 */
332 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
333 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
334 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
335 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
336
337 /* IDSEL 0x12 func 6 - PCI slot 2 */
338 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
339 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
340 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
341 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
342
343 /* IDSEL 0x12 func 7 - PCI slot 2 */
344 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
345 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
346 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
347 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
348
349 // IDSEL 0x1c USB
350 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
351 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
352 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
353 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
354
355 // IDSEL 0x1d Audio
356 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
357
358 // IDSEL 0x1e Legacy
359 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
360 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
361
362 // IDSEL 0x1f IDE/SATA
363 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
364 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
365
366 >;
367
368 pcie@0 {
369 reg = <0x0 0x0 0x0 0x0 0x0>;
370 #size-cells = <2>;
371 #address-cells = <3>;
372 device_type = "pci";
373 ranges = <0x2000000 0x0 0x80000000
374 0x2000000 0x0 0x80000000
375 0x0 0x20000000
376
377 0x1000000 0x0 0x0
378 0x1000000 0x0 0x0
379 0x0 0x100000>;
380 uli1575@0 {
381 reg = <0x0 0x0 0x0 0x0 0x0>;
382 #size-cells = <2>;
383 #address-cells = <3>;
384 ranges = <0x2000000 0x0 0x80000000
385 0x2000000 0x0 0x80000000
386 0x0 0x20000000
387
388 0x1000000 0x0 0x0
389 0x1000000 0x0 0x0
390 0x0 0x100000>;
391 isa@1e {
392 device_type = "isa";
393 #interrupt-cells = <2>;
394 #size-cells = <1>;
395 #address-cells = <2>;
396 reg = <0xf000 0x0 0x0 0x0 0x0>;
397 ranges = <0x1 0x0 0x1000000 0x0 0x0
398 0x1000>;
399 interrupt-parent = <&i8259>;
400
401 i8259: interrupt-controller@20 {
402 reg = <0x1 0x20 0x2
403 0x1 0xa0 0x2
404 0x1 0x4d0 0x2>;
405 interrupt-controller;
406 device_type = "interrupt-controller";
407 #address-cells = <0>;
408 #interrupt-cells = <2>;
409 compatible = "chrp,iic";
410 interrupts = <9 2>;
411 interrupt-parent = <&mpic>;
412 };
413
414 i8042@60 {
415 #size-cells = <0>;
416 #address-cells = <1>;
417 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
418 interrupts = <1 3 12 3>;
419 interrupt-parent =
420 <&i8259>;
421
422 keyboard@0 {
423 reg = <0x0>;
424 compatible = "pnpPNP,303";
425 };
426
427 mouse@1 {
428 reg = <0x1>;
429 compatible = "pnpPNP,f03";
430 };
431 };
432
433 rtc@70 {
434 compatible = "pnpPNP,b00";
435 reg = <0x1 0x70 0x2>;
436 };
437
438 gpio@400 {
439 reg = <0x1 0x400 0x80>;
440 };
441 };
442 };
443 };
444
445 };
446
447 pci1: pcie@ffe09000 {
448 cell-index = <1>;
449 compatible = "fsl,mpc8548-pcie";
450 device_type = "pci";
451 #interrupt-cells = <1>;
452 #size-cells = <2>;
453 #address-cells = <3>;
454 reg = <0xffe09000 0x1000>;
455 bus-range = <0 255>;
456 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
457 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
458 clock-frequency = <33333333>;
459 interrupt-parent = <&mpic>;
460 interrupts = <26 2>;
461 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
462 interrupt-map = <
463 /* IDSEL 0x0 */
464 0000 0x0 0x0 0x1 &mpic 0x4 0x1
465 0000 0x0 0x0 0x2 &mpic 0x5 0x1
466 0000 0x0 0x0 0x3 &mpic 0x6 0x1
467 0000 0x0 0x0 0x4 &mpic 0x7 0x1
468 >;
469 pcie@0 {
470 reg = <0x0 0x0 0x0 0x0 0x0>;
471 #size-cells = <2>;
472 #address-cells = <3>;
473 device_type = "pci";
474 ranges = <0x2000000 0x0 0xa0000000
475 0x2000000 0x0 0xa0000000
476 0x0 0x20000000
477
478 0x1000000 0x0 0x0
479 0x1000000 0x0 0x0
480 0x0 0x100000>;
481 };
482 };
483};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
new file mode 100644
index 000000000000..04ecda18d206
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -0,0 +1,234 @@
1/*
2 * MPC8572 DS Core1 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi.
7 *
8 * Please note to add "-b 1" for core1's dts compiling.
9 *
10 * Copyright 2007, 2008 Freescale Semiconductor Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17
18/dts-v1/;
19/ {
20 model = "fsl,MPC8572DS";
21 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 aliases {
26 ethernet2 = &enet2;
27 ethernet3 = &enet3;
28 serial0 = &serial0;
29 pci2 = &pci2;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8572@1 {
37 device_type = "cpu";
38 reg = <0x1>;
39 d-cache-line-size = <32>; // 32 bytes
40 i-cache-line-size = <32>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>;
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x0 0x0>; // Filled by U-Boot
53 };
54
55 soc8572@ffe00000 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 device_type = "soc";
59 compatible = "simple-bus";
60 ranges = <0x0 0xffe00000 0x100000>;
61 reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
62 bus-frequency = <0>; // Filled out by uboot.
63
64 L2: l2-cache-controller@20000 {
65 compatible = "fsl,mpc8572-l2-cache-controller";
66 reg = <0x20000 0x1000>;
67 cache-line-size = <32>; // 32 bytes
68 cache-size = <0x80000>; // L2, 512K
69 interrupt-parent = <&mpic>;
70 };
71
72 dma@c300 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
76 reg = <0xc300 0x4>;
77 ranges = <0x0 0xc100 0x200>;
78 cell-index = <0>;
79 dma-channel@0 {
80 compatible = "fsl,mpc8572-dma-channel",
81 "fsl,eloplus-dma-channel";
82 reg = <0x0 0x80>;
83 cell-index = <0>;
84 interrupt-parent = <&mpic>;
85 interrupts = <76 2>;
86 };
87 dma-channel@80 {
88 compatible = "fsl,mpc8572-dma-channel",
89 "fsl,eloplus-dma-channel";
90 reg = <0x80 0x80>;
91 cell-index = <1>;
92 interrupt-parent = <&mpic>;
93 interrupts = <77 2>;
94 };
95 dma-channel@100 {
96 compatible = "fsl,mpc8572-dma-channel",
97 "fsl,eloplus-dma-channel";
98 reg = <0x100 0x80>;
99 cell-index = <2>;
100 interrupt-parent = <&mpic>;
101 interrupts = <78 2>;
102 };
103 dma-channel@180 {
104 compatible = "fsl,mpc8572-dma-channel",
105 "fsl,eloplus-dma-channel";
106 reg = <0x180 0x80>;
107 cell-index = <3>;
108 interrupt-parent = <&mpic>;
109 interrupts = <79 2>;
110 };
111 };
112
113 mdio@24520 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "fsl,gianfar-mdio";
117 reg = <0x24520 0x20>;
118
119 phy2: ethernet-phy@2 {
120 interrupt-parent = <&mpic>;
121 reg = <0x2>;
122 };
123 phy3: ethernet-phy@3 {
124 interrupt-parent = <&mpic>;
125 reg = <0x3>;
126 };
127 };
128
129 enet2: ethernet@26000 {
130 cell-index = <2>;
131 device_type = "network";
132 model = "eTSEC";
133 compatible = "gianfar";
134 reg = <0x26000 0x1000>;
135 local-mac-address = [ 00 00 00 00 00 00 ];
136 interrupts = <31 2 32 2 33 2>;
137 interrupt-parent = <&mpic>;
138 phy-handle = <&phy2>;
139 phy-connection-type = "rgmii-id";
140 };
141
142 enet3: ethernet@27000 {
143 cell-index = <3>;
144 device_type = "network";
145 model = "eTSEC";
146 compatible = "gianfar";
147 reg = <0x27000 0x1000>;
148 local-mac-address = [ 00 00 00 00 00 00 ];
149 interrupts = <37 2 38 2 39 2>;
150 interrupt-parent = <&mpic>;
151 phy-handle = <&phy3>;
152 phy-connection-type = "rgmii-id";
153 };
154
155 msi@41600 {
156 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
157 reg = <0x41600 0x80>;
158 msi-available-ranges = <0 0x100>;
159 interrupts = <
160 0xe0 0
161 0xe1 0
162 0xe2 0
163 0xe3 0
164 0xe4 0
165 0xe5 0
166 0xe6 0
167 0xe7 0>;
168 interrupt-parent = <&mpic>;
169 };
170
171 serial0: serial@4600 {
172 cell-index = <1>;
173 device_type = "serial";
174 compatible = "ns16550";
175 reg = <0x4600 0x100>;
176 clock-frequency = <0>;
177 };
178
179 mpic: pic@40000 {
180 interrupt-controller;
181 #address-cells = <0>;
182 #interrupt-cells = <2>;
183 reg = <0x40000 0x40000>;
184 compatible = "chrp,open-pic";
185 device_type = "open-pic";
186 protected-sources = <
187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
188 29 30 34 35 36 40 /* enet0 enet1 */
189 24 26 20 21 22 23 /* pcie0 pcie1 dma1 */
190 43 /* i2c */
191 0x1 0x2 0x3 0x4 /* pci slot */
192 0x9 0xa 0xb 0xc /* usb */
193 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */
194 >;
195 };
196 };
197
198 pci2: pcie@ffe0a000 {
199 cell-index = <2>;
200 compatible = "fsl,mpc8548-pcie";
201 device_type = "pci";
202 #interrupt-cells = <1>;
203 #size-cells = <2>;
204 #address-cells = <3>;
205 reg = <0xffe0a000 0x1000>;
206 bus-range = <0 255>;
207 ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
208 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
209 clock-frequency = <33333333>;
210 interrupt-parent = <&mpic>;
211 interrupts = <27 2>;
212 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
213 interrupt-map = <
214 /* IDSEL 0x0 */
215 0000 0x0 0x0 0x1 &mpic 0x0 0x1
216 0000 0x0 0x0 0x2 &mpic 0x1 0x1
217 0000 0x0 0x0 0x3 &mpic 0x2 0x1
218 0000 0x0 0x0 0x4 &mpic 0x3 0x1
219 >;
220 pcie@0 {
221 reg = <0x0 0x0 0x0 0x0 0x0>;
222 #size-cells = <2>;
223 #address-cells = <3>;
224 device_type = "pci";
225 ranges = <0x2000000 0x0 0xc0000000
226 0x2000000 0x0 0xc0000000
227 0x0 0x20000000
228
229 0x1000000 0x0 0x0
230 0x1000000 0x0 0x0
231 0x0 0x100000>;
232 };
233 };
234};
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index d665e767822a..35d5e248ccd7 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -205,8 +205,49 @@
205 reg = <3>; 205 reg = <3>;
206 device_type = "ethernet-phy"; 206 device_type = "ethernet-phy";
207 }; 207 };
208 tbi0: tbi-phy@11 {
209 reg = <0x11>;
210 device_type = "tbi-phy";
211 };
212 };
213
214 mdio@25520 {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "fsl,gianfar-tbi";
218 reg = <0x25520 0x20>;
219
220 tbi1: tbi-phy@11 {
221 reg = <0x11>;
222 device_type = "tbi-phy";
223 };
224 };
225
226 mdio@26520 {
227 #address-cells = <1>;
228 #size-cells = <0>;
229 compatible = "fsl,gianfar-tbi";
230 reg = <0x26520 0x20>;
231
232 tbi2: tbi-phy@11 {
233 reg = <0x11>;
234 device_type = "tbi-phy";
235 };
236 };
237
238 mdio@27520 {
239 #address-cells = <1>;
240 #size-cells = <0>;
241 compatible = "fsl,gianfar-tbi";
242 reg = <0x27520 0x20>;
243
244 tbi3: tbi-phy@11 {
245 reg = <0x11>;
246 device_type = "tbi-phy";
247 };
208 }; 248 };
209 249
250
210 enet0: ethernet@24000 { 251 enet0: ethernet@24000 {
211 cell-index = <0>; 252 cell-index = <0>;
212 device_type = "network"; 253 device_type = "network";
@@ -216,6 +257,7 @@
216 local-mac-address = [ 00 00 00 00 00 00 ]; 257 local-mac-address = [ 00 00 00 00 00 00 ];
217 interrupts = <29 2 30 2 34 2>; 258 interrupts = <29 2 30 2 34 2>;
218 interrupt-parent = <&mpic>; 259 interrupt-parent = <&mpic>;
260 tbi-handle = <&tbi0>;
219 phy-handle = <&phy0>; 261 phy-handle = <&phy0>;
220 phy-connection-type = "rgmii-id"; 262 phy-connection-type = "rgmii-id";
221 }; 263 };
@@ -229,6 +271,7 @@
229 local-mac-address = [ 00 00 00 00 00 00 ]; 271 local-mac-address = [ 00 00 00 00 00 00 ];
230 interrupts = <35 2 36 2 40 2>; 272 interrupts = <35 2 36 2 40 2>;
231 interrupt-parent = <&mpic>; 273 interrupt-parent = <&mpic>;
274 tbi-handle = <&tbi1>;
232 phy-handle = <&phy1>; 275 phy-handle = <&phy1>;
233 phy-connection-type = "rgmii-id"; 276 phy-connection-type = "rgmii-id";
234 }; 277 };
@@ -242,6 +285,7 @@
242 local-mac-address = [ 00 00 00 00 00 00 ]; 285 local-mac-address = [ 00 00 00 00 00 00 ];
243 interrupts = <31 2 32 2 33 2>; 286 interrupts = <31 2 32 2 33 2>;
244 interrupt-parent = <&mpic>; 287 interrupt-parent = <&mpic>;
288 tbi-handle = <&tbi2>;
245 phy-handle = <&phy2>; 289 phy-handle = <&phy2>;
246 phy-connection-type = "rgmii-id"; 290 phy-connection-type = "rgmii-id";
247 }; 291 };
@@ -255,6 +299,7 @@
255 local-mac-address = [ 00 00 00 00 00 00 ]; 299 local-mac-address = [ 00 00 00 00 00 00 ];
256 interrupts = <37 2 38 2 39 2>; 300 interrupts = <37 2 38 2 39 2>;
257 interrupt-parent = <&mpic>; 301 interrupt-parent = <&mpic>;
302 tbi-handle = <&tbi3>;
258 phy-handle = <&phy3>; 303 phy-handle = <&phy3>;
259 phy-connection-type = "rgmii-id"; 304 phy-connection-type = "rgmii-id";
260 }; 305 };
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 7c1bb952360c..be2c11ca0594 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -143,7 +143,6 @@
143 143
144 rtc@800 { // Real time clock 144 rtc@800 { // Real time clock
145 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 145 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
146 device_type = "rtc";
147 reg = <0x800 0x100>; 146 reg = <0x800 0x100>;
148 interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>; 147 interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>;
149 interrupt-parent = <&mpc5200_pic>; 148 interrupt-parent = <&mpc5200_pic>;
@@ -301,7 +300,6 @@
301 interrupt-parent = <&mpc5200_pic>; 300 interrupt-parent = <&mpc5200_pic>;
302 fsl5200-clocking; 301 fsl5200-clocking;
303 rtc@51 { 302 rtc@51 {
304 device_type = "rtc";
305 compatible = "nxp,pcf8563"; 303 compatible = "nxp,pcf8563";
306 reg = <0x51>; 304 reg = <0x51>;
307 }; 305 };
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 0f941f310e44..8d365a57ebc1 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -177,6 +177,22 @@
177 reg = <0x1a>; 177 reg = <0x1a>;
178 device_type = "ethernet-phy"; 178 device_type = "ethernet-phy";
179 }; 179 };
180 tbi0: tbi-phy@11 {
181 reg = <0x11>;
182 device_type = "tbi-phy";
183 };
184 };
185
186 mdio@25520 {
187 #address-cells = <1>;
188 #size-cells = <0>;
189 compatible = "fsl,gianfar-tbi";
190 reg = <0x25520 0x20>;
191
192 tbi1: tbi-phy@11 {
193 reg = <0x11>;
194 device_type = "tbi-phy";
195 };
180 }; 196 };
181 197
182 enet0: ethernet@24000 { 198 enet0: ethernet@24000 {
@@ -188,6 +204,7 @@
188 local-mac-address = [ 00 00 00 00 00 00 ]; 204 local-mac-address = [ 00 00 00 00 00 00 ];
189 interrupts = <32 0x8 33 0x8 34 0x8>; 205 interrupts = <32 0x8 33 0x8 34 0x8>;
190 interrupt-parent = <&ipic>; 206 interrupt-parent = <&ipic>;
207 tbi-handle = <&tbi0>;
191 phy-handle = <&phy0>; 208 phy-handle = <&phy0>;
192 linux,network-index = <0>; 209 linux,network-index = <0>;
193 }; 210 };
@@ -201,6 +218,7 @@
201 local-mac-address = [ 00 00 00 00 00 00 ]; 218 local-mac-address = [ 00 00 00 00 00 00 ];
202 interrupts = <35 0x8 36 0x8 37 0x8>; 219 interrupts = <35 0x8 36 0x8 37 0x8>;
203 interrupt-parent = <&ipic>; 220 interrupt-parent = <&ipic>;
221 tbi-handle = <&tbi1>;
204 phy-handle = <&phy1>; 222 phy-handle = <&phy1>;
205 linux,network-index = <1>; 223 linux,network-index = <1>;
206 }; 224 };
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 333552b4e90d..2baf4a51f224 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -252,6 +252,22 @@
252 reg = <0x1a>; 252 reg = <0x1a>;
253 device_type = "ethernet-phy"; 253 device_type = "ethernet-phy";
254 }; 254 };
255 tbi0: tbi-phy@11 {
256 reg = <0x11>;
257 device_type = "tbi-phy";
258 };
259 };
260
261 mdio@25520 {
262 #address-cells = <1>;
263 #size-cells = <0>;
264 compatible = "fsl,gianfar-tbi";
265 reg = <0x25520 0x20>;
266
267 tbi1: tbi-phy@11 {
268 reg = <0x11>;
269 device_type = "tbi-phy";
270 };
255 }; 271 };
256 272
257 enet0: ethernet@24000 { 273 enet0: ethernet@24000 {
@@ -263,6 +279,7 @@
263 local-mac-address = [ 00 00 00 00 00 00 ]; 279 local-mac-address = [ 00 00 00 00 00 00 ];
264 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 280 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
265 interrupt-parent = <&mpic>; 281 interrupt-parent = <&mpic>;
282 tbi-handle = <&tbi0>;
266 phy-handle = <&phy0>; 283 phy-handle = <&phy0>;
267 }; 284 };
268 285
@@ -275,6 +292,7 @@
275 local-mac-address = [ 00 00 00 00 00 00 ]; 292 local-mac-address = [ 00 00 00 00 00 00 ];
276 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 293 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
277 interrupt-parent = <&mpic>; 294 interrupt-parent = <&mpic>;
295 tbi-handle = <&tbi1>;
278 phy-handle = <&phy1>; 296 phy-handle = <&phy1>;
279 }; 297 };
280 298
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index db3632ef9888..01542f7062ab 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -168,6 +168,22 @@
168 reg = <0x1c>; 168 reg = <0x1c>;
169 device_type = "ethernet-phy"; 169 device_type = "ethernet-phy";
170 }; 170 };
171 tbi0: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176
177 mdio@25520 {
178 #address-cells = <1>;
179 #size-cells = <0>;
180 compatible = "fsl,gianfar-tbi";
181 reg = <0x25520 0x20>;
182
183 tbi1: tbi-phy@11 {
184 reg = <0x11>;
185 device_type = "tbi-phy";
186 };
171 }; 187 };
172 188
173 enet0: ethernet@24000 { 189 enet0: ethernet@24000 {
@@ -179,6 +195,7 @@
179 local-mac-address = [ 00 00 00 00 00 00 ]; 195 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 196 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
181 interrupt-parent = <&mpic>; 197 interrupt-parent = <&mpic>;
198 tbi-handle = <&tbi0>;
182 phy-handle = <&phy0>; 199 phy-handle = <&phy0>;
183 }; 200 };
184 201
@@ -191,6 +208,7 @@
191 local-mac-address = [ 00 00 00 00 00 00 ]; 208 local-mac-address = [ 00 00 00 00 00 00 ];
192 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 209 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
193 interrupt-parent = <&mpic>; 210 interrupt-parent = <&mpic>;
211 tbi-handle = <&tbi1>;
194 phy-handle = <&phy1>; 212 phy-handle = <&phy1>;
195 }; 213 };
196 214
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 9652456158fb..36db981548e4 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -222,6 +222,46 @@
222 reg = <2>; 222 reg = <2>;
223 device_type = "ethernet-phy"; 223 device_type = "ethernet-phy";
224 }; 224 };
225 tbi0: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231 mdio@25520 {
232 #address-cells = <1>;
233 #size-cells = <0>;
234 compatible = "fsl,gianfar-tbi";
235 reg = <0x25520 0x20>;
236
237 tbi1: tbi-phy@11 {
238 reg = <0x11>;
239 device_type = "tbi-phy";
240 };
241 };
242
243 mdio@26520 {
244 #address-cells = <1>;
245 #size-cells = <0>;
246 compatible = "fsl,gianfar-tbi";
247 reg = <0x26520 0x20>;
248
249 tbi2: tbi-phy@11 {
250 reg = <0x11>;
251 device_type = "tbi-phy";
252 };
253 };
254
255 mdio@27520 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "fsl,gianfar-tbi";
259 reg = <0x27520 0x20>;
260
261 tbi3: tbi-phy@11 {
262 reg = <0x11>;
263 device_type = "tbi-phy";
264 };
225 }; 265 };
226 266
227 enet0: ethernet@24000 { 267 enet0: ethernet@24000 {
@@ -233,6 +273,7 @@
233 local-mac-address = [ 00 00 00 00 00 00 ]; 273 local-mac-address = [ 00 00 00 00 00 00 ];
234 interrupts = <29 2 30 2 34 2>; 274 interrupts = <29 2 30 2 34 2>;
235 interrupt-parent = <&mpic>; 275 interrupt-parent = <&mpic>;
276 tbi-handle = <&tbi0>;
236 phy-handle = <&phy0>; 277 phy-handle = <&phy0>;
237 phy-connection-type = "rgmii-id"; 278 phy-connection-type = "rgmii-id";
238 }; 279 };
@@ -246,6 +287,7 @@
246 local-mac-address = [ 00 00 00 00 00 00 ]; 287 local-mac-address = [ 00 00 00 00 00 00 ];
247 interrupts = <35 2 36 2 40 2>; 288 interrupts = <35 2 36 2 40 2>;
248 interrupt-parent = <&mpic>; 289 interrupt-parent = <&mpic>;
290 tbi-handle = <&tbi1>;
249 phy-handle = <&phy1>; 291 phy-handle = <&phy1>;
250 phy-connection-type = "rgmii-id"; 292 phy-connection-type = "rgmii-id";
251 }; 293 };
@@ -259,6 +301,7 @@
259 local-mac-address = [ 00 00 00 00 00 00 ]; 301 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <31 2 32 2 33 2>; 302 interrupts = <31 2 32 2 33 2>;
261 interrupt-parent = <&mpic>; 303 interrupt-parent = <&mpic>;
304 tbi-handle = <&tbi2>;
262 phy-handle = <&phy2>; 305 phy-handle = <&phy2>;
263 phy-connection-type = "rgmii-id"; 306 phy-connection-type = "rgmii-id";
264 }; 307 };
@@ -272,6 +315,7 @@
272 local-mac-address = [ 00 00 00 00 00 00 ]; 315 local-mac-address = [ 00 00 00 00 00 00 ];
273 interrupts = <37 2 38 2 39 2>; 316 interrupts = <37 2 38 2 39 2>;
274 interrupt-parent = <&mpic>; 317 interrupt-parent = <&mpic>;
318 tbi-handle = <&tbi3>;
275 phy-handle = <&phy3>; 319 phy-handle = <&phy3>;
276 phy-connection-type = "rgmii-id"; 320 phy-connection-type = "rgmii-id";
277 }; 321 };
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index fcd1db6ca0a8..fff33fe6efc6 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -142,6 +142,22 @@
142 reg = <4>; 142 reg = <4>;
143 device_type = "ethernet-phy"; 143 device_type = "ethernet-phy";
144 }; 144 };
145 tbi0: tbi-phy@11 {
146 reg = <0x11>;
147 device_type = "tbi-phy";
148 };
149 };
150
151 mdio@25520 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,gianfar-tbi";
155 reg = <0x25520 0x20>;
156
157 tbi1: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
145 }; 161 };
146 162
147 enet0: ethernet@24000 { 163 enet0: ethernet@24000 {
@@ -153,6 +169,7 @@
153 local-mac-address = [ 00 00 00 00 00 00 ]; 169 local-mac-address = [ 00 00 00 00 00 00 ];
154 interrupts = <29 2 30 2 34 2>; 170 interrupts = <29 2 30 2 34 2>;
155 interrupt-parent = <&mpic>; 171 interrupt-parent = <&mpic>;
172 tbi-handle = <&tbi0>;
156 phy-handle = <&phy2>; 173 phy-handle = <&phy2>;
157 }; 174 };
158 175
@@ -165,6 +182,7 @@
165 local-mac-address = [ 00 00 00 00 00 00 ]; 182 local-mac-address = [ 00 00 00 00 00 00 ];
166 interrupts = <35 2 36 2 40 2>; 183 interrupts = <35 2 36 2 40 2>;
167 interrupt-parent = <&mpic>; 184 interrupt-parent = <&mpic>;
185 tbi-handle = <&tbi1>;
168 phy-handle = <&phy4>; 186 phy-handle = <&phy4>;
169 }; 187 };
170 188
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 3008bf8830c1..906302e26a62 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -181,7 +181,6 @@
181 fsl5200-clocking; 181 fsl5200-clocking;
182 182
183 rtc@68 { 183 rtc@68 {
184 device_type = "rtc";
185 compatible = "dallas,ds1307"; 184 compatible = "dallas,ds1307";
186 reg = <0x68>; 185 reg = <0x68>;
187 }; 186 };
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index e1d260b9085e..a693f01c21aa 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -155,6 +155,34 @@
155 reg = <3>; 155 reg = <3>;
156 device_type = "ethernet-phy"; 156 device_type = "ethernet-phy";
157 }; 157 };
158 tbi0: tbi-phy@11 {
159 reg = <0x11>;
160 device_type = "tbi-phy";
161 };
162 };
163
164 mdio@25520 {
165 #address-cells = <1>;
166 #size-cells = <0>;
167 compatible = "fsl,gianfar-tbi";
168 reg = <0x25520 0x20>;
169
170 tbi1: tbi-phy@11 {
171 reg = <0x11>;
172 device_type = "tbi-phy";
173 };
174 };
175
176 mdio@26520 {
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "fsl,gianfar-tbi";
180 reg = <0x26520 0x20>;
181
182 tbi2: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
158 }; 186 };
159 187
160 enet0: ethernet@24000 { 188 enet0: ethernet@24000 {
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index d76441ec5dc7..9e3f5f0dde20 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -154,6 +154,22 @@
154 reg = <3>; 154 reg = <3>;
155 device_type = "ethernet-phy"; 155 device_type = "ethernet-phy";
156 }; 156 };
157 tbi0: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163 mdio@25520 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "fsl,gianfar-tbi";
167 reg = <0x25520 0x20>;
168
169 tbi1: tbi-phy@11 {
170 reg = <0x11>;
171 device_type = "tbi-phy";
172 };
157 }; 173 };
158 174
159 enet0: ethernet@24000 { 175 enet0: ethernet@24000 {
@@ -165,6 +181,7 @@
165 local-mac-address = [ 00 00 00 00 00 00 ]; 181 local-mac-address = [ 00 00 00 00 00 00 ];
166 interrupts = <29 2 30 2 34 2>; 182 interrupts = <29 2 30 2 34 2>;
167 interrupt-parent = <&mpic>; 183 interrupt-parent = <&mpic>;
184 tbi-handle = <&tbi0>;
168 phy-handle = <&phy2>; 185 phy-handle = <&phy2>;
169 }; 186 };
170 187
@@ -177,6 +194,7 @@
177 local-mac-address = [ 00 00 00 00 00 00 ]; 194 local-mac-address = [ 00 00 00 00 00 00 ];
178 interrupts = <35 2 36 2 40 2>; 195 interrupts = <35 2 36 2 40 2>;
179 interrupt-parent = <&mpic>; 196 interrupt-parent = <&mpic>;
197 tbi-handle = <&tbi1>;
180 phy-handle = <&phy1>; 198 phy-handle = <&phy1>;
181 }; 199 };
182 200
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 4199e89b4e50..15086eb65c50 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -179,6 +179,46 @@
179 reg = <5>; 179 reg = <5>;
180 device_type = "ethernet-phy"; 180 device_type = "ethernet-phy";
181 }; 181 };
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 mdio@25520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-tbi";
192 reg = <0x25520 0x20>;
193
194 tbi1: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
199
200 mdio@26520 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,gianfar-tbi";
204 reg = <0x26520 0x20>;
205
206 tbi2: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211
212 mdio@27520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-tbi";
216 reg = <0x27520 0x20>;
217
218 tbi3: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
182 }; 222 };
183 223
184 enet0: ethernet@24000 { 224 enet0: ethernet@24000 {
@@ -190,6 +230,7 @@
190 local-mac-address = [ 00 00 00 00 00 00 ]; 230 local-mac-address = [ 00 00 00 00 00 00 ];
191 interrupts = <29 2 30 2 34 2>; 231 interrupts = <29 2 30 2 34 2>;
192 interrupt-parent = <&mpic>; 232 interrupt-parent = <&mpic>;
233 tbi-handle = <&tbi0>;
193 phy-handle = <&phy2>; 234 phy-handle = <&phy2>;
194 }; 235 };
195 236
@@ -202,6 +243,7 @@
202 local-mac-address = [ 00 00 00 00 00 00 ]; 243 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <35 2 36 2 40 2>; 244 interrupts = <35 2 36 2 40 2>;
204 interrupt-parent = <&mpic>; 245 interrupt-parent = <&mpic>;
246 tbi-handle = <&tbi1>;
205 phy-handle = <&phy1>; 247 phy-handle = <&phy1>;
206 }; 248 };
207 249
@@ -214,6 +256,7 @@
214 local-mac-address = [ 00 00 00 00 00 00 ]; 256 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <31 2 32 2 33 2>; 257 interrupts = <31 2 32 2 33 2>;
216 interrupt-parent = <&mpic>; 258 interrupt-parent = <&mpic>;
259 tbi-handle = <&tbi2>;
217 phy-handle = <&phy3>; 260 phy-handle = <&phy3>;
218 }; 261 };
219 262
@@ -226,6 +269,7 @@
226 local-mac-address = [ 00 00 00 00 00 00 ]; 269 local-mac-address = [ 00 00 00 00 00 00 ];
227 interrupts = <37 2 38 2 39 2>; 270 interrupts = <37 2 38 2 39 2>;
228 interrupt-parent = <&mpic>; 271 interrupt-parent = <&mpic>;
272 tbi-handle = <&tbi3>;
229 phy-handle = <&phy4>; 273 phy-handle = <&phy4>;
230 }; 274 };
231 275
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 58ee4185454b..b7b65f5e79b6 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -179,6 +179,46 @@
179 reg = <5>; 179 reg = <5>;
180 device_type = "ethernet-phy"; 180 device_type = "ethernet-phy";
181 }; 181 };
182 tbi0: tbi-phy@11 {
183 reg = <0x11>;
184 device_type = "tbi-phy";
185 };
186 };
187
188 mdio@25520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-tbi";
192 reg = <0x25520 0x20>;
193
194 tbi1: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
199
200 mdio@26520 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,gianfar-tbi";
204 reg = <0x26520 0x20>;
205
206 tbi2: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211
212 mdio@27520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-tbi";
216 reg = <0x27520 0x20>;
217
218 tbi3: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
182 }; 222 };
183 223
184 enet0: ethernet@24000 { 224 enet0: ethernet@24000 {
@@ -190,6 +230,7 @@
190 local-mac-address = [ 00 00 00 00 00 00 ]; 230 local-mac-address = [ 00 00 00 00 00 00 ];
191 interrupts = <29 2 30 2 34 2>; 231 interrupts = <29 2 30 2 34 2>;
192 interrupt-parent = <&mpic>; 232 interrupt-parent = <&mpic>;
233 tbi-handle = <&tbi0>;
193 phy-handle = <&phy2>; 234 phy-handle = <&phy2>;
194 }; 235 };
195 236
@@ -202,6 +243,7 @@
202 local-mac-address = [ 00 00 00 00 00 00 ]; 243 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <35 2 36 2 40 2>; 244 interrupts = <35 2 36 2 40 2>;
204 interrupt-parent = <&mpic>; 245 interrupt-parent = <&mpic>;
246 tbi-handle = <&tbi1>;
205 phy-handle = <&phy1>; 247 phy-handle = <&phy1>;
206 }; 248 };
207 249
@@ -214,6 +256,7 @@
214 local-mac-address = [ 00 00 00 00 00 00 ]; 256 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <31 2 32 2 33 2>; 257 interrupts = <31 2 32 2 33 2>;
216 interrupt-parent = <&mpic>; 258 interrupt-parent = <&mpic>;
259 tbi-handle = <&tbi2>;
217 phy-handle = <&phy3>; 260 phy-handle = <&phy3>;
218 }; 261 };
219 262
@@ -226,6 +269,7 @@
226 local-mac-address = [ 00 00 00 00 00 00 ]; 269 local-mac-address = [ 00 00 00 00 00 00 ];
227 interrupts = <37 2 38 2 39 2>; 270 interrupts = <37 2 38 2 39 2>;
228 interrupt-parent = <&mpic>; 271 interrupt-parent = <&mpic>;
272 tbi-handle = <&tbi3>;
229 phy-handle = <&phy4>; 273 phy-handle = <&phy4>;
230 }; 274 };
231 275
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 6f7ea59c4846..cf92b4e7945e 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -154,6 +154,22 @@
154 reg = <3>; 154 reg = <3>;
155 device_type = "ethernet-phy"; 155 device_type = "ethernet-phy";
156 }; 156 };
157 tbi0: tbi-phy@11 {
158 reg = <0x11>;
159 device_type = "tbi-phy";
160 };
161 };
162
163 mdio@25520 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "fsl,gianfar-tbi";
167 reg = <0x25520 0x20>;
168
169 tbi1: tbi-phy@11 {
170 reg = <0x11>;
171 device_type = "tbi-phy";
172 };
157 }; 173 };
158 174
159 enet0: ethernet@24000 { 175 enet0: ethernet@24000 {
@@ -165,6 +181,7 @@
165 local-mac-address = [ 00 00 00 00 00 00 ]; 181 local-mac-address = [ 00 00 00 00 00 00 ];
166 interrupts = <29 2 30 2 34 2>; 182 interrupts = <29 2 30 2 34 2>;
167 interrupt-parent = <&mpic>; 183 interrupt-parent = <&mpic>;
184 tbi-handle = <&tbi0>;
168 phy-handle = <&phy2>; 185 phy-handle = <&phy2>;
169 }; 186 };
170 187
@@ -177,6 +194,7 @@
177 local-mac-address = [ 00 00 00 00 00 00 ]; 194 local-mac-address = [ 00 00 00 00 00 00 ];
178 interrupts = <35 2 36 2 40 2>; 195 interrupts = <35 2 36 2 40 2>;
179 interrupt-parent = <&mpic>; 196 interrupt-parent = <&mpic>;
197 tbi-handle = <&tbi1>;
180 phy-handle = <&phy1>; 198 phy-handle = <&phy1>;
181 }; 199 };
182 200
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 3fe35208907b..9e1ab2d2f669 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -156,6 +156,22 @@
156 reg = <3>; 156 reg = <3>;
157 device_type = "ethernet-phy"; 157 device_type = "ethernet-phy";
158 }; 158 };
159 tbi0: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
163 };
164
165 mdio@25520 {
166 #address-cells = <1>;
167 #size-cells = <0>;
168 compatible = "fsl,gianfar-tbi";
169 reg = <0x25520 0x20>;
170
171 tbi1: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
159 }; 175 };
160 176
161 enet0: ethernet@24000 { 177 enet0: ethernet@24000 {
@@ -167,6 +183,7 @@
167 local-mac-address = [ 00 00 00 00 00 00 ]; 183 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <29 2 30 2 34 2>; 184 interrupts = <29 2 30 2 34 2>;
169 interrupt-parent = <&mpic>; 185 interrupt-parent = <&mpic>;
186 tbi-handle = <&tbi0>;
170 phy-handle = <&phy2>; 187 phy-handle = <&phy2>;
171 }; 188 };
172 189
@@ -179,6 +196,7 @@
179 local-mac-address = [ 00 00 00 00 00 00 ]; 196 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <35 2 36 2 40 2>; 197 interrupts = <35 2 36 2 40 2>;
181 interrupt-parent = <&mpic>; 198 interrupt-parent = <&mpic>;
199 tbi-handle = <&tbi1>;
182 phy-handle = <&phy1>; 200 phy-handle = <&phy1>;
183 }; 201 };
184 202
diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c
index 9276327bc2bb..bb8b9b3505ee 100644
--- a/arch/powerpc/boot/libfdt-wrapper.c
+++ b/arch/powerpc/boot/libfdt-wrapper.c
@@ -185,7 +185,7 @@ void fdt_init(void *blob)
185 185
186 /* Make sure the dt blob is the right version and so forth */ 186 /* Make sure the dt blob is the right version and so forth */
187 fdt = blob; 187 fdt = blob;
188 bufsize = fdt_totalsize(fdt) + 4; 188 bufsize = fdt_totalsize(fdt) + EXPAND_GRANULARITY;
189 buf = malloc(bufsize); 189 buf = malloc(bufsize);
190 if(!buf) 190 if(!buf)
191 fatal("malloc failed. can't relocate the device tree\n\r"); 191 fatal("malloc failed. can't relocate the device tree\n\r");
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 07ccaf89f379..cd1ffa449327 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -1397,8 +1397,11 @@ CONFIG_USB_STORAGE=y
1397# CONFIG_ACCESSIBILITY is not set 1397# CONFIG_ACCESSIBILITY is not set
1398# CONFIG_INFINIBAND is not set 1398# CONFIG_INFINIBAND is not set
1399# CONFIG_EDAC is not set 1399# CONFIG_EDAC is not set
1400CONFIG_RTC_LIB=m 1400CONFIG_RTC_LIB=y
1401CONFIG_RTC_CLASS=m 1401CONFIG_RTC_CLASS=y
1402CONFIG_RTC_HCTOSYS=y
1403CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1404# CONFIG_RTC_DEBUG is not set
1402 1405
1403# 1406#
1404# RTC interfaces 1407# RTC interfaces
@@ -1424,6 +1427,7 @@ CONFIG_RTC_INTF_DEV=y
1424# CONFIG_RTC_DRV_M41T80 is not set 1427# CONFIG_RTC_DRV_M41T80 is not set
1425# CONFIG_RTC_DRV_S35390A is not set 1428# CONFIG_RTC_DRV_S35390A is not set
1426# CONFIG_RTC_DRV_FM3130 is not set 1429# CONFIG_RTC_DRV_FM3130 is not set
1430CONFIG_RTC_DRV_RX8581=y
1427 1431
1428# 1432#
1429# SPI RTC drivers 1433# SPI RTC drivers
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index cfc94cfcf4cb..034a1fbdc887 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -267,7 +267,7 @@ CONFIG_PCI_SYSCALL=y
267# CONFIG_PCIEPORTBUS is not set 267# CONFIG_PCIEPORTBUS is not set
268CONFIG_ARCH_SUPPORTS_MSI=y 268CONFIG_ARCH_SUPPORTS_MSI=y
269# CONFIG_PCI_MSI is not set 269# CONFIG_PCI_MSI is not set
270CONFIG_PCI_LEGACY=y 270# CONFIG_PCI_LEGACY is not set
271# CONFIG_PCI_DEBUG is not set 271# CONFIG_PCI_DEBUG is not set
272# CONFIG_PCCARD is not set 272# CONFIG_PCCARD is not set
273# CONFIG_HOTPLUG_PCI is not set 273# CONFIG_HOTPLUG_PCI is not set
@@ -354,7 +354,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
354# CONFIG_IP_SCTP is not set 354# CONFIG_IP_SCTP is not set
355# CONFIG_TIPC is not set 355# CONFIG_TIPC is not set
356# CONFIG_ATM is not set 356# CONFIG_ATM is not set
357# CONFIG_BRIDGE is not set 357CONFIG_BRIDGE=m
358# CONFIG_NET_DSA is not set 358# CONFIG_NET_DSA is not set
359# CONFIG_VLAN_8021Q is not set 359# CONFIG_VLAN_8021Q is not set
360# CONFIG_DECNET is not set 360# CONFIG_DECNET is not set
@@ -579,7 +579,7 @@ CONFIG_NETDEVICES=y
579# CONFIG_BONDING is not set 579# CONFIG_BONDING is not set
580# CONFIG_MACVLAN is not set 580# CONFIG_MACVLAN is not set
581# CONFIG_EQUALIZER is not set 581# CONFIG_EQUALIZER is not set
582# CONFIG_TUN is not set 582CONFIG_TUN=m
583# CONFIG_VETH is not set 583# CONFIG_VETH is not set
584# CONFIG_ARCNET is not set 584# CONFIG_ARCNET is not set
585# CONFIG_PHYLIB is not set 585# CONFIG_PHYLIB is not set
@@ -1001,11 +1001,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1001# CONFIG_USB_TMC is not set 1001# CONFIG_USB_TMC is not set
1002 1002
1003# 1003#
1004# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1004# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1005# 1005#
1006 1006
1007# 1007#
1008# may also be needed; see USB_STORAGE Help for more information 1008# see USB_STORAGE Help for more information
1009# 1009#
1010CONFIG_USB_STORAGE=m 1010CONFIG_USB_STORAGE=m
1011# CONFIG_USB_STORAGE_DEBUG is not set 1011# CONFIG_USB_STORAGE_DEBUG is not set
@@ -1418,6 +1418,6 @@ CONFIG_CRYPTO_LZO=m
1418# CONFIG_PPC_CLOCK is not set 1418# CONFIG_PPC_CLOCK is not set
1419CONFIG_VIRTUALIZATION=y 1419CONFIG_VIRTUALIZATION=y
1420CONFIG_KVM=y 1420CONFIG_KVM=y
1421CONFIG_KVM_BOOKE_HOST=y 1421CONFIG_KVM_440=y
1422# CONFIG_VIRTIO_PCI is not set 1422# CONFIG_VIRTIO_PCI is not set
1423# CONFIG_VIRTIO_BALLOON is not set 1423# CONFIG_VIRTIO_BALLOON is not set
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index f3fc733758f5..499be5bdd6fa 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -111,7 +111,7 @@ static __inline__ void atomic_inc(atomic_t *v)
111 bne- 1b" 111 bne- 1b"
112 : "=&r" (t), "+m" (v->counter) 112 : "=&r" (t), "+m" (v->counter)
113 : "r" (&v->counter) 113 : "r" (&v->counter)
114 : "cc"); 114 : "cc", "xer");
115} 115}
116 116
117static __inline__ int atomic_inc_return(atomic_t *v) 117static __inline__ int atomic_inc_return(atomic_t *v)
@@ -128,7 +128,7 @@ static __inline__ int atomic_inc_return(atomic_t *v)
128 ISYNC_ON_SMP 128 ISYNC_ON_SMP
129 : "=&r" (t) 129 : "=&r" (t)
130 : "r" (&v->counter) 130 : "r" (&v->counter)
131 : "cc", "memory"); 131 : "cc", "xer", "memory");
132 132
133 return t; 133 return t;
134} 134}
@@ -155,7 +155,7 @@ static __inline__ void atomic_dec(atomic_t *v)
155 bne- 1b" 155 bne- 1b"
156 : "=&r" (t), "+m" (v->counter) 156 : "=&r" (t), "+m" (v->counter)
157 : "r" (&v->counter) 157 : "r" (&v->counter)
158 : "cc"); 158 : "cc", "xer");
159} 159}
160 160
161static __inline__ int atomic_dec_return(atomic_t *v) 161static __inline__ int atomic_dec_return(atomic_t *v)
@@ -172,7 +172,7 @@ static __inline__ int atomic_dec_return(atomic_t *v)
172 ISYNC_ON_SMP 172 ISYNC_ON_SMP
173 : "=&r" (t) 173 : "=&r" (t)
174 : "r" (&v->counter) 174 : "r" (&v->counter)
175 : "cc", "memory"); 175 : "cc", "xer", "memory");
176 176
177 return t; 177 return t;
178} 178}
@@ -346,7 +346,7 @@ static __inline__ void atomic64_inc(atomic64_t *v)
346 bne- 1b" 346 bne- 1b"
347 : "=&r" (t), "+m" (v->counter) 347 : "=&r" (t), "+m" (v->counter)
348 : "r" (&v->counter) 348 : "r" (&v->counter)
349 : "cc"); 349 : "cc", "xer");
350} 350}
351 351
352static __inline__ long atomic64_inc_return(atomic64_t *v) 352static __inline__ long atomic64_inc_return(atomic64_t *v)
@@ -362,7 +362,7 @@ static __inline__ long atomic64_inc_return(atomic64_t *v)
362 ISYNC_ON_SMP 362 ISYNC_ON_SMP
363 : "=&r" (t) 363 : "=&r" (t)
364 : "r" (&v->counter) 364 : "r" (&v->counter)
365 : "cc", "memory"); 365 : "cc", "xer", "memory");
366 366
367 return t; 367 return t;
368} 368}
@@ -388,7 +388,7 @@ static __inline__ void atomic64_dec(atomic64_t *v)
388 bne- 1b" 388 bne- 1b"
389 : "=&r" (t), "+m" (v->counter) 389 : "=&r" (t), "+m" (v->counter)
390 : "r" (&v->counter) 390 : "r" (&v->counter)
391 : "cc"); 391 : "cc", "xer");
392} 392}
393 393
394static __inline__ long atomic64_dec_return(atomic64_t *v) 394static __inline__ long atomic64_dec_return(atomic64_t *v)
@@ -404,7 +404,7 @@ static __inline__ long atomic64_dec_return(atomic64_t *v)
404 ISYNC_ON_SMP 404 ISYNC_ON_SMP
405 : "=&r" (t) 405 : "=&r" (t)
406 : "r" (&v->counter) 406 : "r" (&v->counter)
407 : "cc", "memory"); 407 : "cc", "xer", "memory");
408 408
409 return t; 409 return t;
410} 410}
@@ -431,7 +431,7 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
431 "\n\ 431 "\n\
4322:" : "=&r" (t) 4322:" : "=&r" (t)
433 : "r" (&v->counter) 433 : "r" (&v->counter)
434 : "cc", "memory"); 434 : "cc", "xer", "memory");
435 435
436 return t; 436 return t;
437} 437}
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index e55d1f66b86f..64e1fdca233e 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -3,6 +3,7 @@
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#include <asm/asm-compat.h> 5#include <asm/asm-compat.h>
6
6/* 7/*
7 * Define an illegal instr to trap on the bug. 8 * Define an illegal instr to trap on the bug.
8 * We don't use 0 because that marks the end of a function 9 * We don't use 0 because that marks the end of a function
@@ -14,6 +15,7 @@
14#ifdef CONFIG_BUG 15#ifdef CONFIG_BUG
15 16
16#ifdef __ASSEMBLY__ 17#ifdef __ASSEMBLY__
18#include <asm/asm-offsets.h>
17#ifdef CONFIG_DEBUG_BUGVERBOSE 19#ifdef CONFIG_DEBUG_BUGVERBOSE
18.macro EMIT_BUG_ENTRY addr,file,line,flags 20.macro EMIT_BUG_ENTRY addr,file,line,flags
19 .section __bug_table,"a" 21 .section __bug_table,"a"
@@ -26,7 +28,7 @@
26 .previous 28 .previous
27.endm 29.endm
28#else 30#else
29 .macro EMIT_BUG_ENTRY addr,file,line,flags 31.macro EMIT_BUG_ENTRY addr,file,line,flags
30 .section __bug_table,"a" 32 .section __bug_table,"a"
315001: PPC_LONG \addr 335001: PPC_LONG \addr
32 .short \flags 34 .short \flags
@@ -113,6 +115,13 @@
113#define HAVE_ARCH_BUG_ON 115#define HAVE_ARCH_BUG_ON
114#define HAVE_ARCH_WARN_ON 116#define HAVE_ARCH_WARN_ON
115#endif /* __ASSEMBLY __ */ 117#endif /* __ASSEMBLY __ */
118#else
119#ifdef __ASSEMBLY__
120.macro EMIT_BUG_ENTRY addr,file,line,flags
121.endm
122#else /* !__ASSEMBLY__ */
123#define _EMIT_BUG_ENTRY
124#endif
116#endif /* CONFIG_BUG */ 125#endif /* CONFIG_BUG */
117 126
118#include <asm-generic/bug.h> 127#include <asm-generic/bug.h>
diff --git a/arch/powerpc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h
index b37752214a16..d5de325472e9 100644
--- a/arch/powerpc/include/asm/byteorder.h
+++ b/arch/powerpc/include/asm/byteorder.h
@@ -11,6 +11,8 @@
11#include <asm/types.h> 11#include <asm/types.h>
12#include <linux/compiler.h> 12#include <linux/compiler.h>
13 13
14#define __BIG_ENDIAN
15
14#ifdef __GNUC__ 16#ifdef __GNUC__
15#ifdef __KERNEL__ 17#ifdef __KERNEL__
16 18
@@ -21,12 +23,19 @@ static __inline__ __u16 ld_le16(const volatile __u16 *addr)
21 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); 23 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
22 return val; 24 return val;
23} 25}
26#define __arch_swab16p ld_le16
24 27
25static __inline__ void st_le16(volatile __u16 *addr, const __u16 val) 28static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
26{ 29{
27 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); 30 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
28} 31}
29 32
33static inline void __arch_swab16s(__u16 *addr)
34{
35 st_le16(addr, *addr);
36}
37#define __arch_swab16s __arch_swab16s
38
30static __inline__ __u32 ld_le32(const volatile __u32 *addr) 39static __inline__ __u32 ld_le32(const volatile __u32 *addr)
31{ 40{
32 __u32 val; 41 __u32 val;
@@ -34,13 +43,20 @@ static __inline__ __u32 ld_le32(const volatile __u32 *addr)
34 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); 43 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
35 return val; 44 return val;
36} 45}
46#define __arch_swab32p ld_le32
37 47
38static __inline__ void st_le32(volatile __u32 *addr, const __u32 val) 48static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
39{ 49{
40 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); 50 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
41} 51}
42 52
43static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value) 53static inline void __arch_swab32s(__u32 *addr)
54{
55 st_le32(addr, *addr);
56}
57#define __arch_swab32s __arch_swab32s
58
59static inline __attribute_const__ __u16 __arch_swab16(__u16 value)
44{ 60{
45 __u16 result; 61 __u16 result;
46 62
@@ -49,8 +65,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value)
49 : "r" (value), "0" (value >> 8)); 65 : "r" (value), "0" (value >> 8));
50 return result; 66 return result;
51} 67}
68#define __arch_swab16 __arch_swab16
52 69
53static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value) 70static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
54{ 71{
55 __u32 result; 72 __u32 result;
56 73
@@ -61,29 +78,16 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
61 : "r" (value), "0" (value >> 24)); 78 : "r" (value), "0" (value >> 24));
62 return result; 79 return result;
63} 80}
64 81#define __arch_swab32 __arch_swab32
65#define __arch__swab16(x) ___arch__swab16(x)
66#define __arch__swab32(x) ___arch__swab32(x)
67
68/* The same, but returns converted value from the location pointer by addr. */
69#define __arch__swab16p(addr) ld_le16(addr)
70#define __arch__swab32p(addr) ld_le32(addr)
71
72/* The same, but do the conversion in situ, ie. put the value back to addr. */
73#define __arch__swab16s(addr) st_le16(addr,*addr)
74#define __arch__swab32s(addr) st_le32(addr,*addr)
75 82
76#endif /* __KERNEL__ */ 83#endif /* __KERNEL__ */
77 84
78#ifndef __STRICT_ANSI__
79#define __BYTEORDER_HAS_U64__
80#ifndef __powerpc64__ 85#ifndef __powerpc64__
81#define __SWAB_64_THRU_32__ 86#define __SWAB_64_THRU_32__
82#endif /* __powerpc64__ */ 87#endif /* __powerpc64__ */
83#endif /* __STRICT_ANSI__ */
84 88
85#endif /* __GNUC__ */ 89#endif /* __GNUC__ */
86 90
87#include <linux/byteorder/big_endian.h> 91#include <linux/byteorder.h>
88 92
89#endif /* _ASM_POWERPC_BYTEORDER_H */ 93#endif /* _ASM_POWERPC_BYTEORDER_H */
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 1e94b07a020e..4911104791c3 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -82,6 +82,7 @@ struct cpu_spec {
82 char *cpu_name; 82 char *cpu_name;
83 unsigned long cpu_features; /* Kernel features */ 83 unsigned long cpu_features; /* Kernel features */
84 unsigned int cpu_user_features; /* Userland features */ 84 unsigned int cpu_user_features; /* Userland features */
85 unsigned int mmu_features; /* MMU features */
85 86
86 /* cache line sizes */ 87 /* cache line sizes */
87 unsigned int icache_bsize; 88 unsigned int icache_bsize;
@@ -144,17 +145,14 @@ extern const char *powerpc_base_platform;
144#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) 145#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040)
145#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080) 146#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080)
146#define CPU_FTR_601 ASM_CONST(0x0000000000000100) 147#define CPU_FTR_601 ASM_CONST(0x0000000000000100)
147#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200)
148#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) 148#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400)
149#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) 149#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800)
150#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) 150#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000)
151#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) 151#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000)
152#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) 152#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000)
153#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) 153#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000)
154#define CPU_FTR_HAS_HIGH_BATS ASM_CONST(0x0000000000010000)
155#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) 154#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
156#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) 155#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
157#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000)
158#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) 156#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000)
159#define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) 157#define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000)
160#define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) 158#define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000)
@@ -163,6 +161,8 @@ extern const char *powerpc_base_platform;
163#define CPU_FTR_SPE ASM_CONST(0x0000000002000000) 161#define CPU_FTR_SPE ASM_CONST(0x0000000002000000)
164#define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x0000000004000000) 162#define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x0000000004000000)
165#define CPU_FTR_LWSYNC ASM_CONST(0x0000000008000000) 163#define CPU_FTR_LWSYNC ASM_CONST(0x0000000008000000)
164#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000010000000)
165#define CPU_FTR_INDEXED_DCR ASM_CONST(0x0000000020000000)
166 166
167/* 167/*
168 * Add the 64-bit processor unique features in the top half of the word; 168 * Add the 64-bit processor unique features in the top half of the word;
@@ -177,7 +177,6 @@ extern const char *powerpc_base_platform;
177#define CPU_FTR_SLB LONG_ASM_CONST(0x0000000100000000) 177#define CPU_FTR_SLB LONG_ASM_CONST(0x0000000100000000)
178#define CPU_FTR_16M_PAGE LONG_ASM_CONST(0x0000000200000000) 178#define CPU_FTR_16M_PAGE LONG_ASM_CONST(0x0000000200000000)
179#define CPU_FTR_TLBIEL LONG_ASM_CONST(0x0000000400000000) 179#define CPU_FTR_TLBIEL LONG_ASM_CONST(0x0000000400000000)
180#define CPU_FTR_NOEXECUTE LONG_ASM_CONST(0x0000000800000000)
181#define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000) 180#define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000)
182#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000) 181#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000)
183#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000) 182#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000)
@@ -194,6 +193,7 @@ extern const char *powerpc_base_platform;
194#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) 193#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000)
195#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) 194#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
196#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000) 195#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
196#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000)
197 197
198#ifndef __ASSEMBLY__ 198#ifndef __ASSEMBLY__
199 199
@@ -264,164 +264,159 @@ extern const char *powerpc_base_platform;
264 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ 264 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
265 !defined(CONFIG_BOOKE)) 265 !defined(CONFIG_BOOKE))
266 266
267#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE | \ 267#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | \
268 CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE) 268 CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE)
269#define CPU_FTRS_603 (CPU_FTR_COMMON | \ 269#define CPU_FTRS_603 (CPU_FTR_COMMON | \
270 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 270 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
271 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) 271 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
272#define CPU_FTRS_604 (CPU_FTR_COMMON | \ 272#define CPU_FTRS_604 (CPU_FTR_COMMON | \
273 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_PPC_LE) 273 CPU_FTR_USE_TB | CPU_FTR_PPC_LE)
274#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \ 274#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \
275 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 275 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
276 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) 276 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
277#define CPU_FTRS_740 (CPU_FTR_COMMON | \ 277#define CPU_FTRS_740 (CPU_FTR_COMMON | \
278 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 278 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
279 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ 279 CPU_FTR_TAU | CPU_FTR_MAYBE_CAN_NAP | \
280 CPU_FTR_PPC_LE) 280 CPU_FTR_PPC_LE)
281#define CPU_FTRS_750 (CPU_FTR_COMMON | \ 281#define CPU_FTRS_750 (CPU_FTR_COMMON | \
282 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 282 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
283 CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ 283 CPU_FTR_TAU | CPU_FTR_MAYBE_CAN_NAP | \
284 CPU_FTR_PPC_LE) 284 CPU_FTR_PPC_LE)
285#define CPU_FTRS_750CL (CPU_FTRS_750 | CPU_FTR_HAS_HIGH_BATS) 285#define CPU_FTRS_750CL (CPU_FTRS_750)
286#define CPU_FTRS_750FX1 (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM) 286#define CPU_FTRS_750FX1 (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM)
287#define CPU_FTRS_750FX2 (CPU_FTRS_750 | CPU_FTR_NO_DPM) 287#define CPU_FTRS_750FX2 (CPU_FTRS_750 | CPU_FTR_NO_DPM)
288#define CPU_FTRS_750FX (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | \ 288#define CPU_FTRS_750FX (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX)
289 CPU_FTR_HAS_HIGH_BATS)
290#define CPU_FTRS_750GX (CPU_FTRS_750FX) 289#define CPU_FTRS_750GX (CPU_FTRS_750FX)
291#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \ 290#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \
292 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 291 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
293 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ 292 CPU_FTR_ALTIVEC_COMP | \
294 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) 293 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
295#define CPU_FTRS_7400 (CPU_FTR_COMMON | \ 294#define CPU_FTRS_7400 (CPU_FTR_COMMON | \
296 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ 295 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
297 CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ 296 CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | \
298 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) 297 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
299#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | \ 298#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | \
300 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 299 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
301 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 300 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
302 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 301 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
303#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | \ 302#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | \
304 CPU_FTR_USE_TB | \ 303 CPU_FTR_USE_TB | \
305 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 304 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
306 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 305 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
307 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \ 306 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \
308 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 307 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
309#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | \ 308#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | \
310 CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \ 309 CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \
311 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 310 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
312 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 311 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
313 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) 312 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
314#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | \ 313#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | \
315 CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \ 314 CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \
316 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | \ 315 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | \
317 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS | \ 316 CPU_FTR_SPEC7450 | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
318 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
319#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | \ 317#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | \
320 CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \ 318 CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \
321 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 319 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
322 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 320 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | \
323 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \ 321 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \
324 CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) 322 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE)
325#define CPU_FTRS_7455 (CPU_FTR_COMMON | \ 323#define CPU_FTRS_7455 (CPU_FTR_COMMON | \
326 CPU_FTR_USE_TB | \ 324 CPU_FTR_USE_TB | \
327 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 325 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
328 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 326 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
329 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
330 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 327 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
331#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | \ 328#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | \
332 CPU_FTR_USE_TB | \ 329 CPU_FTR_USE_TB | \
333 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 330 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
334 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 331 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
335 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
336 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC | CPU_FTR_PPC_LE | \ 332 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC | CPU_FTR_PPC_LE | \
337 CPU_FTR_NEED_PAIRED_STWCX) 333 CPU_FTR_NEED_PAIRED_STWCX)
338#define CPU_FTRS_7447 (CPU_FTR_COMMON | \ 334#define CPU_FTRS_7447 (CPU_FTR_COMMON | \
339 CPU_FTR_USE_TB | \ 335 CPU_FTR_USE_TB | \
340 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 336 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
341 CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 337 CPU_FTR_L3CR | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
342 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
343 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 338 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
344#define CPU_FTRS_7447A (CPU_FTR_COMMON | \ 339#define CPU_FTRS_7447A (CPU_FTR_COMMON | \
345 CPU_FTR_USE_TB | \ 340 CPU_FTR_USE_TB | \
346 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 341 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
347 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 342 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
348 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
349 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 343 CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
350#define CPU_FTRS_7448 (CPU_FTR_COMMON | \ 344#define CPU_FTRS_7448 (CPU_FTR_COMMON | \
351 CPU_FTR_USE_TB | \ 345 CPU_FTR_USE_TB | \
352 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ 346 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \
353 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ 347 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | \
354 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \
355 CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) 348 CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX)
356#define CPU_FTRS_82XX (CPU_FTR_COMMON | \ 349#define CPU_FTRS_82XX (CPU_FTR_COMMON | \
357 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB) 350 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB)
358#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ 351#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
359 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS) 352 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP)
360#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \ 353#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \
361 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ 354 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \
362 CPU_FTR_COMMON) 355 CPU_FTR_COMMON)
363#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \ 356#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \
364 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ 357 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | \
365 CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) 358 CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE)
366#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | \ 359#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_USE_TB)
367 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE)
368#define CPU_FTRS_8XX (CPU_FTR_USE_TB) 360#define CPU_FTRS_8XX (CPU_FTR_USE_TB)
369#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) 361#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
370#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) 362#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
363#define CPU_FTRS_440x6 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \
364 CPU_FTR_INDEXED_DCR)
371#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ 365#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
372 CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ 366 CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
373 CPU_FTR_UNIFIED_ID_CACHE) 367 CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE)
374#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 368#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
375 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN) 369 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
370 CPU_FTR_NOEXECUTE)
376#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 371#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
377 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | \ 372 CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
378 CPU_FTR_NODSISRALIGN) 373 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
379#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 374#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
380 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN | \ 375 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
381 CPU_FTR_L2CSR | CPU_FTR_LWSYNC) 376 CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE)
382#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) 377#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
383 378
384/* 64-bit CPUs */ 379/* 64-bit CPUs */
385#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 380#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
386 CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE) 381 CPU_FTR_IABR | CPU_FTR_PPC_LE)
387#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 382#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
388 CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \ 383 CPU_FTR_IABR | \
389 CPU_FTR_MMCRA | CPU_FTR_CTRL) 384 CPU_FTR_MMCRA | CPU_FTR_CTRL)
390#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 385#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
391 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 386 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
392 CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ) 387 CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ)
393#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 388#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
394 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 389 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
395 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \ 390 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
396 CPU_FTR_CP_USE_DCBTZ) 391 CPU_FTR_CP_USE_DCBTZ)
397#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 392#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
398 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 393 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
399 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 394 CPU_FTR_MMCRA | CPU_FTR_SMT | \
400 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ 395 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
401 CPU_FTR_PURR) 396 CPU_FTR_PURR)
402#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 397#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
403 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 398 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
404 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 399 CPU_FTR_MMCRA | CPU_FTR_SMT | \
405 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ 400 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
406 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 401 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
407 CPU_FTR_DSCR) 402 CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD)
408#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 403#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
409 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 404 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
410 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 405 CPU_FTR_MMCRA | CPU_FTR_SMT | \
411 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ 406 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
412 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 407 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
413 CPU_FTR_DSCR | CPU_FTR_SAO) 408 CPU_FTR_DSCR | CPU_FTR_SAO)
414#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 409#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
415 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 410 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
416 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 411 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
417 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \ 412 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \
418 CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ) 413 CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \
414 CPU_FTR_UNALIGNED_LD_STD)
419#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 415#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
420 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ 416 CPU_FTR_PPCAS_ARCH_V2 | \
421 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ 417 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
422 CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B) 418 CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B)
423#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | \ 419#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2)
424 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
425 420
426#ifdef __powerpc64__ 421#ifdef __powerpc64__
427#define CPU_FTRS_POSSIBLE \ 422#define CPU_FTRS_POSSIBLE \
@@ -452,7 +447,7 @@ enum {
452 CPU_FTRS_40X | 447 CPU_FTRS_40X |
453#endif 448#endif
454#ifdef CONFIG_44x 449#ifdef CONFIG_44x
455 CPU_FTRS_44X | 450 CPU_FTRS_44X | CPU_FTRS_440x6 |
456#endif 451#endif
457#ifdef CONFIG_E200 452#ifdef CONFIG_E200
458 CPU_FTRS_E200 | 453 CPU_FTRS_E200 |
@@ -492,7 +487,7 @@ enum {
492 CPU_FTRS_40X & 487 CPU_FTRS_40X &
493#endif 488#endif
494#ifdef CONFIG_44x 489#ifdef CONFIG_44x
495 CPU_FTRS_44X & 490 CPU_FTRS_44X & CPU_FTRS_440x6 &
496#endif 491#endif
497#ifdef CONFIG_E200 492#ifdef CONFIG_E200
498 CPU_FTRS_E200 & 493 CPU_FTRS_E200 &
diff --git a/arch/powerpc/include/asm/dcr-native.h b/arch/powerpc/include/asm/dcr-native.h
index 72d2b72c7390..7d2e6235726d 100644
--- a/arch/powerpc/include/asm/dcr-native.h
+++ b/arch/powerpc/include/asm/dcr-native.h
@@ -23,6 +23,7 @@
23#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
24 24
25#include <linux/spinlock.h> 25#include <linux/spinlock.h>
26#include <asm/cputable.h>
26 27
27typedef struct { 28typedef struct {
28 unsigned int base; 29 unsigned int base;
@@ -39,23 +40,45 @@ static inline bool dcr_map_ok_native(dcr_host_native_t host)
39#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base) 40#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
40#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value) 41#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
41 42
42/* Device Control Registers */ 43/* Table based DCR accessors */
43void __mtdcr(int reg, unsigned int val); 44extern void __mtdcr(unsigned int reg, unsigned int val);
44unsigned int __mfdcr(int reg); 45extern unsigned int __mfdcr(unsigned int reg);
46
47/* mfdcrx/mtdcrx instruction based accessors. We hand code
48 * the opcodes in order not to depend on newer binutils
49 */
50static inline unsigned int mfdcrx(unsigned int reg)
51{
52 unsigned int ret;
53 asm volatile(".long 0x7c000206 | (%0 << 21) | (%1 << 16)"
54 : "=r" (ret) : "r" (reg));
55 return ret;
56}
57
58static inline void mtdcrx(unsigned int reg, unsigned int val)
59{
60 asm volatile(".long 0x7c000306 | (%0 << 21) | (%1 << 16)"
61 : : "r" (val), "r" (reg));
62}
63
45#define mfdcr(rn) \ 64#define mfdcr(rn) \
46 ({unsigned int rval; \ 65 ({unsigned int rval; \
47 if (__builtin_constant_p(rn)) \ 66 if (__builtin_constant_p(rn) && rn < 1024) \
48 asm volatile("mfdcr %0," __stringify(rn) \ 67 asm volatile("mfdcr %0," __stringify(rn) \
49 : "=r" (rval)); \ 68 : "=r" (rval)); \
69 else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR))) \
70 rval = mfdcrx(rn); \
50 else \ 71 else \
51 rval = __mfdcr(rn); \ 72 rval = __mfdcr(rn); \
52 rval;}) 73 rval;})
53 74
54#define mtdcr(rn, v) \ 75#define mtdcr(rn, v) \
55do { \ 76do { \
56 if (__builtin_constant_p(rn)) \ 77 if (__builtin_constant_p(rn) && rn < 1024) \
57 asm volatile("mtdcr " __stringify(rn) ",%0" \ 78 asm volatile("mtdcr " __stringify(rn) ",%0" \
58 : : "r" (v)); \ 79 : : "r" (v)); \
80 else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR))) \
81 mtdcrx(rn, v); \
59 else \ 82 else \
60 __mtdcr(rn, v); \ 83 __mtdcr(rn, v); \
61} while (0) 84} while (0)
@@ -69,8 +92,13 @@ static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
69 unsigned int val; 92 unsigned int val;
70 93
71 spin_lock_irqsave(&dcr_ind_lock, flags); 94 spin_lock_irqsave(&dcr_ind_lock, flags);
72 __mtdcr(base_addr, reg); 95 if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
73 val = __mfdcr(base_data); 96 mtdcrx(base_addr, reg);
97 val = mfdcrx(base_data);
98 } else {
99 __mtdcr(base_addr, reg);
100 val = __mfdcr(base_data);
101 }
74 spin_unlock_irqrestore(&dcr_ind_lock, flags); 102 spin_unlock_irqrestore(&dcr_ind_lock, flags);
75 return val; 103 return val;
76} 104}
@@ -81,8 +109,13 @@ static inline void __mtdcri(int base_addr, int base_data, int reg,
81 unsigned long flags; 109 unsigned long flags;
82 110
83 spin_lock_irqsave(&dcr_ind_lock, flags); 111 spin_lock_irqsave(&dcr_ind_lock, flags);
84 __mtdcr(base_addr, reg); 112 if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
85 __mtdcr(base_data, val); 113 mtdcrx(base_addr, reg);
114 mtdcrx(base_data, val);
115 } else {
116 __mtdcr(base_addr, reg);
117 __mtdcr(base_data, val);
118 }
86 spin_unlock_irqrestore(&dcr_ind_lock, flags); 119 spin_unlock_irqrestore(&dcr_ind_lock, flags);
87} 120}
88 121
@@ -93,9 +126,15 @@ static inline void __dcri_clrset(int base_addr, int base_data, int reg,
93 unsigned int val; 126 unsigned int val;
94 127
95 spin_lock_irqsave(&dcr_ind_lock, flags); 128 spin_lock_irqsave(&dcr_ind_lock, flags);
96 __mtdcr(base_addr, reg); 129 if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) {
97 val = (__mfdcr(base_data) & ~clr) | set; 130 mtdcrx(base_addr, reg);
98 __mtdcr(base_data, val); 131 val = (mfdcrx(base_data) & ~clr) | set;
132 mtdcrx(base_data, val);
133 } else {
134 __mtdcr(base_addr, reg);
135 val = (__mfdcr(base_data) & ~clr) | set;
136 __mtdcr(base_data, val);
137 }
99 spin_unlock_irqrestore(&dcr_ind_lock, flags); 138 spin_unlock_irqrestore(&dcr_ind_lock, flags);
100} 139}
101 140
diff --git a/arch/powerpc/include/asm/dcr.h b/arch/powerpc/include/asm/dcr.h
index d13fb68bb5c0..9d6851cfb841 100644
--- a/arch/powerpc/include/asm/dcr.h
+++ b/arch/powerpc/include/asm/dcr.h
@@ -68,9 +68,9 @@ typedef dcr_host_mmio_t dcr_host_t;
68 * additional helpers to read the DCR * base from the device-tree 68 * additional helpers to read the DCR * base from the device-tree
69 */ 69 */
70struct device_node; 70struct device_node;
71extern unsigned int dcr_resource_start(struct device_node *np, 71extern unsigned int dcr_resource_start(const struct device_node *np,
72 unsigned int index); 72 unsigned int index);
73extern unsigned int dcr_resource_len(struct device_node *np, 73extern unsigned int dcr_resource_len(const struct device_node *np,
74 unsigned int index); 74 unsigned int index);
75#endif /* CONFIG_PPC_DCR */ 75#endif /* CONFIG_PPC_DCR */
76#endif /* __ASSEMBLY__ */ 76#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index dfd504caccc1..7d2277cef09a 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -18,4 +18,16 @@ struct dev_archdata {
18 void *dma_data; 18 void *dma_data;
19}; 19};
20 20
21static inline void dev_archdata_set_node(struct dev_archdata *ad,
22 struct device_node *np)
23{
24 ad->of_node = np;
25}
26
27static inline struct device_node *
28dev_archdata_get_node(const struct dev_archdata *ad)
29{
30 return ad->of_node;
31}
32
21#endif /* _ASM_POWERPC_DEVICE_H */ 33#endif /* _ASM_POWERPC_DEVICE_H */
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index fddb229bd74f..86cef7ddc8d5 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -60,12 +60,6 @@ struct dma_mapping_ops {
60 dma_addr_t *dma_handle, gfp_t flag); 60 dma_addr_t *dma_handle, gfp_t flag);
61 void (*free_coherent)(struct device *dev, size_t size, 61 void (*free_coherent)(struct device *dev, size_t size,
62 void *vaddr, dma_addr_t dma_handle); 62 void *vaddr, dma_addr_t dma_handle);
63 dma_addr_t (*map_single)(struct device *dev, void *ptr,
64 size_t size, enum dma_data_direction direction,
65 struct dma_attrs *attrs);
66 void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
67 size_t size, enum dma_data_direction direction,
68 struct dma_attrs *attrs);
69 int (*map_sg)(struct device *dev, struct scatterlist *sg, 63 int (*map_sg)(struct device *dev, struct scatterlist *sg,
70 int nents, enum dma_data_direction direction, 64 int nents, enum dma_data_direction direction,
71 struct dma_attrs *attrs); 65 struct dma_attrs *attrs);
@@ -82,6 +76,22 @@ struct dma_mapping_ops {
82 dma_addr_t dma_address, size_t size, 76 dma_addr_t dma_address, size_t size,
83 enum dma_data_direction direction, 77 enum dma_data_direction direction,
84 struct dma_attrs *attrs); 78 struct dma_attrs *attrs);
79#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
80 void (*sync_single_range_for_cpu)(struct device *hwdev,
81 dma_addr_t dma_handle, unsigned long offset,
82 size_t size,
83 enum dma_data_direction direction);
84 void (*sync_single_range_for_device)(struct device *hwdev,
85 dma_addr_t dma_handle, unsigned long offset,
86 size_t size,
87 enum dma_data_direction direction);
88 void (*sync_sg_for_cpu)(struct device *hwdev,
89 struct scatterlist *sg, int nelems,
90 enum dma_data_direction direction);
91 void (*sync_sg_for_device)(struct device *hwdev,
92 struct scatterlist *sg, int nelems,
93 enum dma_data_direction direction);
94#endif
85}; 95};
86 96
87/* 97/*
@@ -149,10 +159,9 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
149} 159}
150 160
151/* 161/*
152 * TODO: map_/unmap_single will ideally go away, to be completely 162 * map_/unmap_single actually call through to map/unmap_page now that all the
153 * replaced by map/unmap_page. Until then, we allow dma_ops to have 163 * dma_mapping_ops have been converted over. We just have to get the page and
154 * one or the other, or both by checking to see if the specific 164 * offset to pass through to map_page
155 * function requested exists; and if not, falling back on the other set.
156 */ 165 */
157static inline dma_addr_t dma_map_single_attrs(struct device *dev, 166static inline dma_addr_t dma_map_single_attrs(struct device *dev,
158 void *cpu_addr, 167 void *cpu_addr,
@@ -164,10 +173,6 @@ static inline dma_addr_t dma_map_single_attrs(struct device *dev,
164 173
165 BUG_ON(!dma_ops); 174 BUG_ON(!dma_ops);
166 175
167 if (dma_ops->map_single)
168 return dma_ops->map_single(dev, cpu_addr, size, direction,
169 attrs);
170
171 return dma_ops->map_page(dev, virt_to_page(cpu_addr), 176 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
172 (unsigned long)cpu_addr % PAGE_SIZE, size, 177 (unsigned long)cpu_addr % PAGE_SIZE, size,
173 direction, attrs); 178 direction, attrs);
@@ -183,11 +188,6 @@ static inline void dma_unmap_single_attrs(struct device *dev,
183 188
184 BUG_ON(!dma_ops); 189 BUG_ON(!dma_ops);
185 190
186 if (dma_ops->unmap_single) {
187 dma_ops->unmap_single(dev, dma_addr, size, direction, attrs);
188 return;
189 }
190
191 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs); 191 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
192} 192}
193 193
@@ -201,12 +201,7 @@ static inline dma_addr_t dma_map_page_attrs(struct device *dev,
201 201
202 BUG_ON(!dma_ops); 202 BUG_ON(!dma_ops);
203 203
204 if (dma_ops->map_page) 204 return dma_ops->map_page(dev, page, offset, size, direction, attrs);
205 return dma_ops->map_page(dev, page, offset, size, direction,
206 attrs);
207
208 return dma_ops->map_single(dev, page_address(page) + offset, size,
209 direction, attrs);
210} 205}
211 206
212static inline void dma_unmap_page_attrs(struct device *dev, 207static inline void dma_unmap_page_attrs(struct device *dev,
@@ -219,12 +214,7 @@ static inline void dma_unmap_page_attrs(struct device *dev,
219 214
220 BUG_ON(!dma_ops); 215 BUG_ON(!dma_ops);
221 216
222 if (dma_ops->unmap_page) { 217 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
223 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
224 return;
225 }
226
227 dma_ops->unmap_single(dev, dma_address, size, direction, attrs);
228} 218}
229 219
230static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 220static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
@@ -308,47 +298,107 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
308 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL); 298 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
309} 299}
310 300
301#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
311static inline void dma_sync_single_for_cpu(struct device *dev, 302static inline void dma_sync_single_for_cpu(struct device *dev,
312 dma_addr_t dma_handle, size_t size, 303 dma_addr_t dma_handle, size_t size,
313 enum dma_data_direction direction) 304 enum dma_data_direction direction)
314{ 305{
315 BUG_ON(direction == DMA_NONE); 306 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
316 __dma_sync(bus_to_virt(dma_handle), size, direction); 307
308 BUG_ON(!dma_ops);
309 dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
310 size, direction);
317} 311}
318 312
319static inline void dma_sync_single_for_device(struct device *dev, 313static inline void dma_sync_single_for_device(struct device *dev,
320 dma_addr_t dma_handle, size_t size, 314 dma_addr_t dma_handle, size_t size,
321 enum dma_data_direction direction) 315 enum dma_data_direction direction)
322{ 316{
323 BUG_ON(direction == DMA_NONE); 317 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
324 __dma_sync(bus_to_virt(dma_handle), size, direction); 318
319 BUG_ON(!dma_ops);
320 dma_ops->sync_single_range_for_device(dev, dma_handle,
321 0, size, direction);
325} 322}
326 323
327static inline void dma_sync_sg_for_cpu(struct device *dev, 324static inline void dma_sync_sg_for_cpu(struct device *dev,
328 struct scatterlist *sgl, int nents, 325 struct scatterlist *sgl, int nents,
329 enum dma_data_direction direction) 326 enum dma_data_direction direction)
330{ 327{
331 struct scatterlist *sg; 328 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
332 int i;
333 329
334 BUG_ON(direction == DMA_NONE); 330 BUG_ON(!dma_ops);
331 dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
332}
333
334static inline void dma_sync_sg_for_device(struct device *dev,
335 struct scatterlist *sgl, int nents,
336 enum dma_data_direction direction)
337{
338 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
339
340 BUG_ON(!dma_ops);
341 dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
342}
343
344static inline void dma_sync_single_range_for_cpu(struct device *dev,
345 dma_addr_t dma_handle, unsigned long offset, size_t size,
346 enum dma_data_direction direction)
347{
348 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
335 349
336 for_each_sg(sgl, sg, nents, i) 350 BUG_ON(!dma_ops);
337 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); 351 dma_ops->sync_single_range_for_cpu(dev, dma_handle,
352 offset, size, direction);
353}
354
355static inline void dma_sync_single_range_for_device(struct device *dev,
356 dma_addr_t dma_handle, unsigned long offset, size_t size,
357 enum dma_data_direction direction)
358{
359 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
360
361 BUG_ON(!dma_ops);
362 dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
363 size, direction);
364}
365#else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
366static inline void dma_sync_single_for_cpu(struct device *dev,
367 dma_addr_t dma_handle, size_t size,
368 enum dma_data_direction direction)
369{
370}
371
372static inline void dma_sync_single_for_device(struct device *dev,
373 dma_addr_t dma_handle, size_t size,
374 enum dma_data_direction direction)
375{
376}
377
378static inline void dma_sync_sg_for_cpu(struct device *dev,
379 struct scatterlist *sgl, int nents,
380 enum dma_data_direction direction)
381{
338} 382}
339 383
340static inline void dma_sync_sg_for_device(struct device *dev, 384static inline void dma_sync_sg_for_device(struct device *dev,
341 struct scatterlist *sgl, int nents, 385 struct scatterlist *sgl, int nents,
342 enum dma_data_direction direction) 386 enum dma_data_direction direction)
343{ 387{
344 struct scatterlist *sg; 388}
345 int i;
346 389
347 BUG_ON(direction == DMA_NONE); 390static inline void dma_sync_single_range_for_cpu(struct device *dev,
391 dma_addr_t dma_handle, unsigned long offset, size_t size,
392 enum dma_data_direction direction)
393{
394}
348 395
349 for_each_sg(sgl, sg, nents, i) 396static inline void dma_sync_single_range_for_device(struct device *dev,
350 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); 397 dma_addr_t dma_handle, unsigned long offset, size_t size,
398 enum dma_data_direction direction)
399{
351} 400}
401#endif
352 402
353static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 403static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
354{ 404{
@@ -382,22 +432,6 @@ static inline int dma_get_cache_alignment(void)
382#endif 432#endif
383} 433}
384 434
385static inline void dma_sync_single_range_for_cpu(struct device *dev,
386 dma_addr_t dma_handle, unsigned long offset, size_t size,
387 enum dma_data_direction direction)
388{
389 /* just sync everything for now */
390 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
391}
392
393static inline void dma_sync_single_range_for_device(struct device *dev,
394 dma_addr_t dma_handle, unsigned long offset, size_t size,
395 enum dma_data_direction direction)
396{
397 /* just sync everything for now */
398 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
399}
400
401static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 435static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
402 enum dma_data_direction direction) 436 enum dma_data_direction direction)
403{ 437{
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index b886bec67016..66ea9b8b95c5 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -17,8 +17,8 @@
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20#ifndef _PPC64_EEH_H 20#ifndef _POWERPC_EEH_H
21#define _PPC64_EEH_H 21#define _POWERPC_EEH_H
22#ifdef __KERNEL__ 22#ifdef __KERNEL__
23 23
24#include <linux/init.h> 24#include <linux/init.h>
@@ -110,6 +110,7 @@ static inline void eeh_remove_bus_device(struct pci_dev *dev) { }
110#define EEH_IO_ERROR_VALUE(size) (-1UL) 110#define EEH_IO_ERROR_VALUE(size) (-1UL)
111#endif /* CONFIG_EEH */ 111#endif /* CONFIG_EEH */
112 112
113#ifdef CONFIG_PPC64
113/* 114/*
114 * MMIO read/write operations with EEH support. 115 * MMIO read/write operations with EEH support.
115 */ 116 */
@@ -207,5 +208,6 @@ static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
207 eeh_check_failure(addr, *(u32*)buf); 208 eeh_check_failure(addr, *(u32*)buf);
208} 209}
209 210
211#endif /* CONFIG_PPC64 */
210#endif /* __KERNEL__ */ 212#endif /* __KERNEL__ */
211#endif /* _PPC64_EEH_H */ 213#endif /* _POWERPC_EEH_H */
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index d812929390e4..cd46f023ec6d 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -267,7 +267,7 @@ extern int ucache_bsize;
267#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 267#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
268struct linux_binprm; 268struct linux_binprm;
269extern int arch_setup_additional_pages(struct linux_binprm *bprm, 269extern int arch_setup_additional_pages(struct linux_binprm *bprm,
270 int executable_stack); 270 int uses_interp);
271#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); 271#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
272 272
273#endif /* __KERNEL__ */ 273#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index a1029967620b..e4094a5cb05b 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -81,6 +81,36 @@ label##5: \
81#define ALT_FTR_SECTION_END_IFCLR(msk) \ 81#define ALT_FTR_SECTION_END_IFCLR(msk) \
82 ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97) 82 ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
83 83
84/* MMU feature dependent sections */
85#define BEGIN_MMU_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
86#define BEGIN_MMU_FTR_SECTION START_FTR_SECTION(97)
87
88#define END_MMU_FTR_SECTION_NESTED(msk, val, label) \
89 FTR_SECTION_ELSE_NESTED(label) \
90 MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
91
92#define END_MMU_FTR_SECTION(msk, val) \
93 END_MMU_FTR_SECTION_NESTED(msk, val, 97)
94
95#define END_MMU_FTR_SECTION_IFSET(msk) END_MMU_FTR_SECTION((msk), (msk))
96#define END_MMU_FTR_SECTION_IFCLR(msk) END_MMU_FTR_SECTION((msk), 0)
97
98/* MMU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
99#define MMU_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label)
100#define MMU_FTR_SECTION_ELSE MMU_FTR_SECTION_ELSE_NESTED(97)
101#define ALT_MMU_FTR_SECTION_END_NESTED(msk, val, label) \
102 MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
103#define ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, label) \
104 ALT_MMU_FTR_SECTION_END_NESTED(msk, msk, label)
105#define ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
106 ALT_MMU_FTR_SECTION_END_NESTED(msk, 0, label)
107#define ALT_MMU_FTR_SECTION_END(msk, val) \
108 ALT_MMU_FTR_SECTION_END_NESTED(msk, val, 97)
109#define ALT_MMU_FTR_SECTION_END_IFSET(msk) \
110 ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, 97)
111#define ALT_MMU_FTR_SECTION_END_IFCLR(msk) \
112 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
113
84/* Firmware feature dependent sections */ 114/* Firmware feature dependent sections */
85#define BEGIN_FW_FTR_SECTION_NESTED(label) START_FTR_SECTION(label) 115#define BEGIN_FW_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
86#define BEGIN_FW_FTR_SECTION START_FTR_SECTION(97) 116#define BEGIN_FW_FTR_SECTION START_FTR_SECTION(97)
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h
index b298f7a631e6..e5f2ae8362f7 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arch/powerpc/include/asm/ftrace.h
@@ -7,7 +7,19 @@
7 7
8#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
9extern void _mcount(void); 9extern void _mcount(void);
10#endif 10
11#ifdef CONFIG_DYNAMIC_FTRACE
12static inline unsigned long ftrace_call_adjust(unsigned long addr)
13{
14 /* reloction of mcount call site is the same as the address */
15 return addr;
16}
17
18struct dyn_arch_ftrace {
19 struct module *mod;
20};
21#endif /* CONFIG_DYNAMIC_FTRACE */
22#endif /* __ASSEMBLY__ */
11 23
12#endif 24#endif
13 25
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 91c589520c0a..04e4a620952e 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -38,9 +38,24 @@ extern pte_t *pkmap_page_table;
38 * easily, subsequent pte tables have to be allocated in one physical 38 * easily, subsequent pte tables have to be allocated in one physical
39 * chunk of RAM. 39 * chunk of RAM.
40 */ 40 */
41#define LAST_PKMAP (1 << PTE_SHIFT) 41/*
42#define LAST_PKMAP_MASK (LAST_PKMAP-1) 42 * We use one full pte table with 4K pages. And with 16K/64K pages pte
43 * table covers enough memory (32MB and 512MB resp.) that both FIXMAP
44 * and PKMAP can be placed in single pte table. We use 1024 pages for
45 * PKMAP in case of 16K/64K pages.
46 */
47#ifdef CONFIG_PPC_4K_PAGES
48#define PKMAP_ORDER PTE_SHIFT
49#else
50#define PKMAP_ORDER 10
51#endif
52#define LAST_PKMAP (1 << PKMAP_ORDER)
53#ifndef CONFIG_PPC_4K_PAGES
54#define PKMAP_BASE (FIXADDR_START - PAGE_SIZE*(LAST_PKMAP + 1))
55#else
43#define PKMAP_BASE ((FIXADDR_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK) 56#define PKMAP_BASE ((FIXADDR_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK)
57#endif
58#define LAST_PKMAP_MASK (LAST_PKMAP-1)
44#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) 59#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
45#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) 60#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
46 61
@@ -85,7 +100,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro
85 BUG_ON(!pte_none(*(kmap_pte-idx))); 100 BUG_ON(!pte_none(*(kmap_pte-idx)));
86#endif 101#endif
87 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); 102 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));
88 flush_tlb_page(NULL, vaddr); 103 local_flush_tlb_page(NULL, vaddr);
89 104
90 return (void*) vaddr; 105 return (void*) vaddr;
91} 106}
@@ -113,7 +128,7 @@ static inline void kunmap_atomic(void *kvaddr, enum km_type type)
113 * this pte without first remap it 128 * this pte without first remap it
114 */ 129 */
115 pte_clear(&init_mm, vaddr, kmap_pte-idx); 130 pte_clear(&init_mm, vaddr, kmap_pte-idx);
116 flush_tlb_page(NULL, vaddr); 131 local_flush_tlb_page(NULL, vaddr);
117#endif 132#endif
118 pagefault_enable(); 133 pagefault_enable();
119} 134}
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 08266d2728b3..494cd8b0a278 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -713,13 +713,6 @@ static inline void * phys_to_virt(unsigned long address)
713 */ 713 */
714#define page_to_phys(page) ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT) 714#define page_to_phys(page) ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT)
715 715
716/* We do NOT want virtual merging, it would put too much pressure on
717 * our iommu allocator. Instead, we want drivers to be smart enough
718 * to coalesce sglists that happen to have been mapped in a contiguous
719 * way by the iommu
720 */
721#define BIO_VMERGE_BOUNDARY 0
722
723/* 716/*
724 * 32 bits still uses virt_to_bus() for it's implementation of DMA 717 * 32 bits still uses virt_to_bus() for it's implementation of DMA
725 * mappings se we have to keep it defined here. We also have some old 718 * mappings se we have to keep it defined here. We also have some old
diff --git a/arch/powerpc/include/asm/kdump.h b/arch/powerpc/include/asm/kdump.h
index b07ebb9784d3..5ebfe5d3c61f 100644
--- a/arch/powerpc/include/asm/kdump.h
+++ b/arch/powerpc/include/asm/kdump.h
@@ -1,6 +1,8 @@
1#ifndef _PPC64_KDUMP_H 1#ifndef _PPC64_KDUMP_H
2#define _PPC64_KDUMP_H 2#define _PPC64_KDUMP_H
3 3
4#include <asm/page.h>
5
4/* Kdump kernel runs at 32 MB, change at your peril. */ 6/* Kdump kernel runs at 32 MB, change at your peril. */
5#define KDUMP_KERNELBASE 0x2000000 7#define KDUMP_KERNELBASE 0x2000000
6 8
@@ -11,8 +13,19 @@
11 13
12#ifdef CONFIG_CRASH_DUMP 14#ifdef CONFIG_CRASH_DUMP
13 15
16/*
17 * On PPC64 translation is disabled during trampoline setup, so we use
18 * physical addresses. Though on PPC32 translation is already enabled,
19 * so we can't do the same. Luckily create_trampoline() creates relative
20 * branches, so we can just add the PAGE_OFFSET and don't worry about it.
21 */
22#ifdef __powerpc64__
14#define KDUMP_TRAMPOLINE_START 0x0100 23#define KDUMP_TRAMPOLINE_START 0x0100
15#define KDUMP_TRAMPOLINE_END 0x3000 24#define KDUMP_TRAMPOLINE_END 0x3000
25#else
26#define KDUMP_TRAMPOLINE_START (0x0100 + PAGE_OFFSET)
27#define KDUMP_TRAMPOLINE_END (0x3000 + PAGE_OFFSET)
28#endif /* __powerpc64__ */
16 29
17#define KDUMP_MIN_TCE_ENTRIES 2048 30#define KDUMP_MIN_TCE_ENTRIES 2048
18 31
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 3736d9b33289..6dbffc981702 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -33,12 +33,12 @@
33 33
34#ifndef __ASSEMBLY__ 34#ifndef __ASSEMBLY__
35#include <linux/cpumask.h> 35#include <linux/cpumask.h>
36#include <asm/reg.h>
36 37
37typedef void (*crash_shutdown_t)(void); 38typedef void (*crash_shutdown_t)(void);
38 39
39#ifdef CONFIG_KEXEC 40#ifdef CONFIG_KEXEC
40 41
41#ifdef __powerpc64__
42/* 42/*
43 * This function is responsible for capturing register states if coming 43 * This function is responsible for capturing register states if coming
44 * via panic or invoking dump using sysrq-trigger. 44 * via panic or invoking dump using sysrq-trigger.
@@ -48,6 +48,7 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
48{ 48{
49 if (oldregs) 49 if (oldregs)
50 memcpy(newregs, oldregs, sizeof(*newregs)); 50 memcpy(newregs, oldregs, sizeof(*newregs));
51#ifdef __powerpc64__
51 else { 52 else {
52 /* FIXME Merge this with xmon_save_regs ?? */ 53 /* FIXME Merge this with xmon_save_regs ?? */
53 unsigned long tmp1, tmp2; 54 unsigned long tmp1, tmp2;
@@ -100,15 +101,11 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
100 : "b" (newregs) 101 : "b" (newregs)
101 : "memory"); 102 : "memory");
102 } 103 }
103}
104#else 104#else
105/* 105 else
106 * Provide a dummy definition to avoid build failures. Will remain 106 ppc_save_regs(newregs);
107 * empty till crash dump support is enabled. 107#endif /* __powerpc64__ */
108 */ 108}
109static inline void crash_setup_regs(struct pt_regs *newregs,
110 struct pt_regs *oldregs) { }
111#endif /* !__powerpc64 __ */
112 109
113extern void kexec_smp_wait(void); /* get and clear naca physid, wait for 110extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
114 master to copy new code to 0 */ 111 master to copy new code to 0 */
diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h
index 612d83276653..84b457a3c1bc 100644
--- a/arch/powerpc/include/asm/local.h
+++ b/arch/powerpc/include/asm/local.h
@@ -67,7 +67,7 @@ static __inline__ long local_inc_return(local_t *l)
67 bne- 1b" 67 bne- 1b"
68 : "=&r" (t) 68 : "=&r" (t)
69 : "r" (&(l->a.counter)) 69 : "r" (&(l->a.counter))
70 : "cc", "memory"); 70 : "cc", "xer", "memory");
71 71
72 return t; 72 return t;
73} 73}
@@ -94,7 +94,7 @@ static __inline__ long local_dec_return(local_t *l)
94 bne- 1b" 94 bne- 1b"
95 : "=&r" (t) 95 : "=&r" (t)
96 : "r" (&(l->a.counter)) 96 : "r" (&(l->a.counter))
97 : "cc", "memory"); 97 : "cc", "xer", "memory");
98 98
99 return t; 99 return t;
100} 100}
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 2fe268b10333..25aaa97facd8 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -133,7 +133,8 @@ struct lppaca {
133//============================================================================= 133//=============================================================================
134// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data 134// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
135//============================================================================= 135//=============================================================================
136 u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF 136 u32 page_ins; // CMO Hint - # page ins by OS x00-x04
137 u8 pmc_save_area[252]; // PMC interrupt Area x04-xFF
137} __attribute__((__aligned__(0x400))); 138} __attribute__((__aligned__(0x400)));
138 139
139extern struct lppaca lppaca[]; 140extern struct lppaca lppaca[];
diff --git a/arch/powerpc/include/asm/mmu-40x.h b/arch/powerpc/include/asm/mmu-40x.h
index 3d108676584c..776f415a36aa 100644
--- a/arch/powerpc/include/asm/mmu-40x.h
+++ b/arch/powerpc/include/asm/mmu-40x.h
@@ -54,8 +54,9 @@
54#ifndef __ASSEMBLY__ 54#ifndef __ASSEMBLY__
55 55
56typedef struct { 56typedef struct {
57 unsigned long id; 57 unsigned int id;
58 unsigned long vdso_base; 58 unsigned int active;
59 unsigned long vdso_base;
59} mm_context_t; 60} mm_context_t;
60 61
61#endif /* !__ASSEMBLY__ */ 62#endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/mmu-44x.h
index a825524c981a..8a97cfb08b7e 100644
--- a/arch/powerpc/include/asm/mmu-44x.h
+++ b/arch/powerpc/include/asm/mmu-44x.h
@@ -4,6 +4,8 @@
4 * PPC440 support 4 * PPC440 support
5 */ 5 */
6 6
7#include <asm/page.h>
8
7#define PPC44x_MMUCR_TID 0x000000ff 9#define PPC44x_MMUCR_TID 0x000000ff
8#define PPC44x_MMUCR_STS 0x00010000 10#define PPC44x_MMUCR_STS 0x00010000
9 11
@@ -56,8 +58,9 @@
56extern unsigned int tlb_44x_hwater; 58extern unsigned int tlb_44x_hwater;
57 59
58typedef struct { 60typedef struct {
59 unsigned long id; 61 unsigned int id;
60 unsigned long vdso_base; 62 unsigned int active;
63 unsigned long vdso_base;
61} mm_context_t; 64} mm_context_t;
62 65
63#endif /* !__ASSEMBLY__ */ 66#endif /* !__ASSEMBLY__ */
@@ -73,4 +76,19 @@ typedef struct {
73/* Size of the TLBs used for pinning in lowmem */ 76/* Size of the TLBs used for pinning in lowmem */
74#define PPC_PIN_SIZE (1 << 28) /* 256M */ 77#define PPC_PIN_SIZE (1 << 28) /* 256M */
75 78
79#if (PAGE_SHIFT == 12)
80#define PPC44x_TLBE_SIZE PPC44x_TLB_4K
81#elif (PAGE_SHIFT == 14)
82#define PPC44x_TLBE_SIZE PPC44x_TLB_16K
83#elif (PAGE_SHIFT == 16)
84#define PPC44x_TLBE_SIZE PPC44x_TLB_64K
85#else
86#error "Unsupported PAGE_SIZE"
87#endif
88
89#define PPC44x_PGD_OFF_SHIFT (32 - PGDIR_SHIFT + PGD_T_LOG2)
90#define PPC44x_PGD_OFF_MASK_BIT (PGDIR_SHIFT - PGD_T_LOG2)
91#define PPC44x_PTE_ADD_SHIFT (32 - PGDIR_SHIFT + PTE_SHIFT + PTE_T_LOG2)
92#define PPC44x_PTE_ADD_MASK_BIT (32 - PTE_T_LOG2 - PTE_SHIFT)
93
76#endif /* _ASM_POWERPC_MMU_44X_H_ */ 94#endif /* _ASM_POWERPC_MMU_44X_H_ */
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h
index 9db877eb88db..07865a357848 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/mmu-8xx.h
@@ -137,7 +137,8 @@
137 137
138#ifndef __ASSEMBLY__ 138#ifndef __ASSEMBLY__
139typedef struct { 139typedef struct {
140 unsigned long id; 140 unsigned int id;
141 unsigned int active;
141 unsigned long vdso_base; 142 unsigned long vdso_base;
142} mm_context_t; 143} mm_context_t;
143#endif /* !__ASSEMBLY__ */ 144#endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-fsl-booke.h
index 925d93cf64d8..3f941c0f7e8e 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-fsl-booke.h
@@ -40,6 +40,8 @@
40#define MAS2_M 0x00000004 40#define MAS2_M 0x00000004
41#define MAS2_G 0x00000002 41#define MAS2_G 0x00000002
42#define MAS2_E 0x00000001 42#define MAS2_E 0x00000001
43#define MAS2_EPN_MASK(size) (~0 << (2*(size) + 10))
44#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags))
43 45
44#define MAS3_RPN 0xFFFFF000 46#define MAS3_RPN 0xFFFFF000
45#define MAS3_U0 0x00000200 47#define MAS3_U0 0x00000200
@@ -74,8 +76,9 @@
74#ifndef __ASSEMBLY__ 76#ifndef __ASSEMBLY__
75 77
76typedef struct { 78typedef struct {
77 unsigned long id; 79 unsigned int id;
78 unsigned long vdso_base; 80 unsigned int active;
81 unsigned long vdso_base;
79} mm_context_t; 82} mm_context_t;
80#endif /* !__ASSEMBLY__ */ 83#endif /* !__ASSEMBLY__ */
81 84
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 4c0e1b4f975c..6e7639911318 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -2,6 +2,63 @@
2#define _ASM_POWERPC_MMU_H_ 2#define _ASM_POWERPC_MMU_H_
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#include <asm/asm-compat.h>
6#include <asm/feature-fixups.h>
7
8/*
9 * MMU features bit definitions
10 */
11
12/*
13 * First half is MMU families
14 */
15#define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
16#define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
17#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
18#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
19#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
20
21/*
22 * This is individual features
23 */
24
25/* Enable use of high BAT registers */
26#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
27
28/* Enable >32-bit physical addresses on 32-bit processor, only used
29 * by CONFIG_6xx currently as BookE supports that from day 1
30 */
31#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
32
33/* Enable use of broadcast TLB invalidations. We don't always set it
34 * on processors that support it due to other constraints with the
35 * use of such invalidations
36 */
37#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
38
39/* Enable use of tlbilx invalidate-by-PID variant.
40 */
41#define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000)
42
43/* This indicates that the processor cannot handle multiple outstanding
44 * broadcast tlbivax or tlbsync. This makes the code use a spinlock
45 * around such invalidate forms.
46 */
47#define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
48
49#ifndef __ASSEMBLY__
50#include <asm/cputable.h>
51
52static inline int mmu_has_feature(unsigned long feature)
53{
54 return (cur_cpu_spec->mmu_features & feature);
55}
56
57extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
58
59#endif /* !__ASSEMBLY__ */
60
61
5#ifdef CONFIG_PPC64 62#ifdef CONFIG_PPC64
6/* 64-bit classic hash table MMU */ 63/* 64-bit classic hash table MMU */
7# include <asm/mmu-hash64.h> 64# include <asm/mmu-hash64.h>
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index 6b993ef452ff..ab4f19263c42 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -2,237 +2,26 @@
2#define __ASM_POWERPC_MMU_CONTEXT_H 2#define __ASM_POWERPC_MMU_CONTEXT_H
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#include <linux/kernel.h>
6#include <linux/mm.h>
7#include <linux/sched.h>
8#include <linux/spinlock.h>
5#include <asm/mmu.h> 9#include <asm/mmu.h>
6#include <asm/cputable.h> 10#include <asm/cputable.h>
7#include <asm-generic/mm_hooks.h> 11#include <asm-generic/mm_hooks.h>
8 12#include <asm/cputhreads.h>
9#ifndef CONFIG_PPC64
10#include <asm/atomic.h>
11#include <linux/bitops.h>
12
13/*
14 * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
15 * (virtual segment identifiers) for each context. Although the
16 * hardware supports 24-bit VSIDs, and thus >1 million contexts,
17 * we only use 32,768 of them. That is ample, since there can be
18 * at most around 30,000 tasks in the system anyway, and it means
19 * that we can use a bitmap to indicate which contexts are in use.
20 * Using a bitmap means that we entirely avoid all of the problems
21 * that we used to have when the context number overflowed,
22 * particularly on SMP systems.
23 * -- paulus.
24 */
25
26/*
27 * This function defines the mapping from contexts to VSIDs (virtual
28 * segment IDs). We use a skew on both the context and the high 4 bits
29 * of the 32-bit virtual address (the "effective segment ID") in order
30 * to spread out the entries in the MMU hash table. Note, if this
31 * function is changed then arch/ppc/mm/hashtable.S will have to be
32 * changed to correspond.
33 */
34#define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
35 & 0xffffff)
36
37/*
38 The MPC8xx has only 16 contexts. We rotate through them on each
39 task switch. A better way would be to keep track of tasks that
40 own contexts, and implement an LRU usage. That way very active
41 tasks don't always have to pay the TLB reload overhead. The
42 kernel pages are mapped shared, so the kernel can run on behalf
43 of any task that makes a kernel entry. Shared does not mean they
44 are not protected, just that the ASID comparison is not performed.
45 -- Dan
46
47 The IBM4xx has 256 contexts, so we can just rotate through these
48 as a way of "switching" contexts. If the TID of the TLB is zero,
49 the PID/TID comparison is disabled, so we can use a TID of zero
50 to represent all kernel pages as shared among all contexts.
51 -- Dan
52 */
53
54static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
55{
56}
57
58#ifdef CONFIG_8xx
59#define NO_CONTEXT 16
60#define LAST_CONTEXT 15
61#define FIRST_CONTEXT 0
62
63#elif defined(CONFIG_4xx)
64#define NO_CONTEXT 256
65#define LAST_CONTEXT 255
66#define FIRST_CONTEXT 1
67
68#elif defined(CONFIG_E200) || defined(CONFIG_E500)
69#define NO_CONTEXT 256
70#define LAST_CONTEXT 255
71#define FIRST_CONTEXT 1
72
73#else
74
75/* PPC 6xx, 7xx CPUs */
76#define NO_CONTEXT ((unsigned long) -1)
77#define LAST_CONTEXT 32767
78#define FIRST_CONTEXT 1
79#endif
80
81/*
82 * Set the current MMU context.
83 * On 32-bit PowerPCs (other than the 8xx embedded chips), this is done by
84 * loading up the segment registers for the user part of the address space.
85 *
86 * Since the PGD is immediately available, it is much faster to simply
87 * pass this along as a second parameter, which is required for 8xx and
88 * can be used for debugging on all processors (if you happen to have
89 * an Abatron).
90 */
91extern void set_context(unsigned long contextid, pgd_t *pgd);
92
93/*
94 * Bitmap of contexts in use.
95 * The size of this bitmap is LAST_CONTEXT + 1 bits.
96 */
97extern unsigned long context_map[];
98
99/*
100 * This caches the next context number that we expect to be free.
101 * Its use is an optimization only, we can't rely on this context
102 * number to be free, but it usually will be.
103 */
104extern unsigned long next_mmu_context;
105
106/*
107 * If we don't have sufficient contexts to give one to every task
108 * that could be in the system, we need to be able to steal contexts.
109 * These variables support that.
110 */
111#if LAST_CONTEXT < 30000
112#define FEW_CONTEXTS 1
113extern atomic_t nr_free_contexts;
114extern struct mm_struct *context_mm[LAST_CONTEXT+1];
115extern void steal_context(void);
116#endif
117
118/*
119 * Get a new mmu context for the address space described by `mm'.
120 */
121static inline void get_mmu_context(struct mm_struct *mm)
122{
123 unsigned long ctx;
124
125 if (mm->context.id != NO_CONTEXT)
126 return;
127#ifdef FEW_CONTEXTS
128 while (atomic_dec_if_positive(&nr_free_contexts) < 0)
129 steal_context();
130#endif
131 ctx = next_mmu_context;
132 while (test_and_set_bit(ctx, context_map)) {
133 ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
134 if (ctx > LAST_CONTEXT)
135 ctx = 0;
136 }
137 next_mmu_context = (ctx + 1) & LAST_CONTEXT;
138 mm->context.id = ctx;
139#ifdef FEW_CONTEXTS
140 context_mm[ctx] = mm;
141#endif
142}
143
144/*
145 * Set up the context for a new address space.
146 */
147static inline int init_new_context(struct task_struct *t, struct mm_struct *mm)
148{
149 mm->context.id = NO_CONTEXT;
150 return 0;
151}
152
153/*
154 * We're finished using the context for an address space.
155 */
156static inline void destroy_context(struct mm_struct *mm)
157{
158 preempt_disable();
159 if (mm->context.id != NO_CONTEXT) {
160 clear_bit(mm->context.id, context_map);
161 mm->context.id = NO_CONTEXT;
162#ifdef FEW_CONTEXTS
163 atomic_inc(&nr_free_contexts);
164#endif
165 }
166 preempt_enable();
167}
168
169static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
170 struct task_struct *tsk)
171{
172#ifdef CONFIG_ALTIVEC
173 if (cpu_has_feature(CPU_FTR_ALTIVEC))
174 asm volatile ("dssall;\n"
175#ifndef CONFIG_POWER4
176 "sync;\n" /* G4 needs a sync here, G5 apparently not */
177#endif
178 : : );
179#endif /* CONFIG_ALTIVEC */
180
181 tsk->thread.pgdir = next->pgd;
182
183 /* No need to flush userspace segments if the mm doesnt change */
184 if (prev == next)
185 return;
186
187 /* Setup new userspace context */
188 get_mmu_context(next);
189 set_context(next->context.id, next->pgd);
190}
191
192#define deactivate_mm(tsk,mm) do { } while (0)
193 13
194/* 14/*
195 * After we have set current->mm to a new value, this activates 15 * Most if the context management is out of line
196 * the context for the new mm so we see the new mappings.
197 */ 16 */
198#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, current)
199
200extern void mmu_context_init(void); 17extern void mmu_context_init(void);
201
202
203#else
204
205#include <linux/kernel.h>
206#include <linux/mm.h>
207#include <linux/sched.h>
208
209/*
210 * Copyright (C) 2001 PPC 64 Team, IBM Corp
211 *
212 * This program is free software; you can redistribute it and/or
213 * modify it under the terms of the GNU General Public License
214 * as published by the Free Software Foundation; either version
215 * 2 of the License, or (at your option) any later version.
216 */
217
218static inline void enter_lazy_tlb(struct mm_struct *mm,
219 struct task_struct *tsk)
220{
221}
222
223/*
224 * The proto-VSID space has 2^35 - 1 segments available for user mappings.
225 * Each segment contains 2^28 bytes. Each context maps 2^44 bytes,
226 * so we can support 2^19-1 contexts (19 == 35 + 28 - 44).
227 */
228#define NO_CONTEXT 0
229#define MAX_CONTEXT ((1UL << 19) - 1)
230
231extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); 18extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
232extern void destroy_context(struct mm_struct *mm); 19extern void destroy_context(struct mm_struct *mm);
233 20
21extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
234extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm); 22extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
235extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm); 23extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
24extern void set_context(unsigned long id, pgd_t *pgd);
236 25
237/* 26/*
238 * switch_mm is the entry point called from the architecture independent 27 * switch_mm is the entry point called from the architecture independent
@@ -241,22 +30,39 @@ extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
241static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 30static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
242 struct task_struct *tsk) 31 struct task_struct *tsk)
243{ 32{
244 if (!cpu_isset(smp_processor_id(), next->cpu_vm_mask)) 33 /* Mark this context has been used on the new CPU */
245 cpu_set(smp_processor_id(), next->cpu_vm_mask); 34 cpu_set(smp_processor_id(), next->cpu_vm_mask);
35
36 /* 32-bit keeps track of the current PGDIR in the thread struct */
37#ifdef CONFIG_PPC32
38 tsk->thread.pgdir = next->pgd;
39#endif /* CONFIG_PPC32 */
246 40
247 /* No need to flush userspace segments if the mm doesnt change */ 41 /* Nothing else to do if we aren't actually switching */
248 if (prev == next) 42 if (prev == next)
249 return; 43 return;
250 44
45 /* We must stop all altivec streams before changing the HW
46 * context
47 */
251#ifdef CONFIG_ALTIVEC 48#ifdef CONFIG_ALTIVEC
252 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 49 if (cpu_has_feature(CPU_FTR_ALTIVEC))
253 asm volatile ("dssall"); 50 asm volatile ("dssall");
254#endif /* CONFIG_ALTIVEC */ 51#endif /* CONFIG_ALTIVEC */
255 52
53 /* The actual HW switching method differs between the various
54 * sub architectures.
55 */
56#ifdef CONFIG_PPC_STD_MMU_64
256 if (cpu_has_feature(CPU_FTR_SLB)) 57 if (cpu_has_feature(CPU_FTR_SLB))
257 switch_slb(tsk, next); 58 switch_slb(tsk, next);
258 else 59 else
259 switch_stab(tsk, next); 60 switch_stab(tsk, next);
61#else
62 /* Out of line for now */
63 switch_mmu_context(prev, next);
64#endif
65
260} 66}
261 67
262#define deactivate_mm(tsk,mm) do { } while (0) 68#define deactivate_mm(tsk,mm) do { } while (0)
@@ -274,6 +80,11 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
274 local_irq_restore(flags); 80 local_irq_restore(flags);
275} 81}
276 82
277#endif /* CONFIG_PPC64 */ 83/* We don't currently use enter_lazy_tlb() for anything */
84static inline void enter_lazy_tlb(struct mm_struct *mm,
85 struct task_struct *tsk)
86{
87}
88
278#endif /* __KERNEL__ */ 89#endif /* __KERNEL__ */
279#endif /* __ASM_POWERPC_MMU_CONTEXT_H */ 90#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h
index e5f14b13ccf0..08454880a2c0 100644
--- a/arch/powerpc/include/asm/module.h
+++ b/arch/powerpc/include/asm/module.h
@@ -34,11 +34,19 @@ struct mod_arch_specific {
34#ifdef __powerpc64__ 34#ifdef __powerpc64__
35 unsigned int stubs_section; /* Index of stubs section in module */ 35 unsigned int stubs_section; /* Index of stubs section in module */
36 unsigned int toc_section; /* What section is the TOC? */ 36 unsigned int toc_section; /* What section is the TOC? */
37#else 37#ifdef CONFIG_DYNAMIC_FTRACE
38 unsigned long toc;
39 unsigned long tramp;
40#endif
41
42#else /* powerpc64 */
38 /* Indices of PLT sections within module. */ 43 /* Indices of PLT sections within module. */
39 unsigned int core_plt_section; 44 unsigned int core_plt_section;
40 unsigned int init_plt_section; 45 unsigned int init_plt_section;
46#ifdef CONFIG_DYNAMIC_FTRACE
47 unsigned long tramp;
41#endif 48#endif
49#endif /* powerpc64 */
42 50
43 /* List of BUG addresses, source line numbers and filenames */ 51 /* List of BUG addresses, source line numbers and filenames */
44 struct list_head bug_list; 52 struct list_head bug_list;
@@ -68,6 +76,12 @@ struct mod_arch_specific {
68# endif /* MODULE */ 76# endif /* MODULE */
69#endif 77#endif
70 78
79#ifdef CONFIG_DYNAMIC_FTRACE
80# ifdef MODULE
81 asm(".section .ftrace.tramp,\"ax\",@nobits; .align 3; .previous");
82# endif /* MODULE */
83#endif
84
71 85
72struct exception_table_entry; 86struct exception_table_entry;
73void sort_ex_table(struct exception_table_entry *start, 87void sort_ex_table(struct exception_table_entry *start,
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h
index 81ef10b6b672..81a23932a160 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -239,6 +239,25 @@ struct mpc52xx_cdm {
239 u16 mclken_div_psc6; /* CDM + 0x36 reg13 byte2,3 */ 239 u16 mclken_div_psc6; /* CDM + 0x36 reg13 byte2,3 */
240}; 240};
241 241
242/* Interrupt controller Register set */
243struct mpc52xx_intr {
244 u32 per_mask; /* INTR + 0x00 */
245 u32 per_pri1; /* INTR + 0x04 */
246 u32 per_pri2; /* INTR + 0x08 */
247 u32 per_pri3; /* INTR + 0x0c */
248 u32 ctrl; /* INTR + 0x10 */
249 u32 main_mask; /* INTR + 0x14 */
250 u32 main_pri1; /* INTR + 0x18 */
251 u32 main_pri2; /* INTR + 0x1c */
252 u32 reserved1; /* INTR + 0x20 */
253 u32 enc_status; /* INTR + 0x24 */
254 u32 crit_status; /* INTR + 0x28 */
255 u32 main_status; /* INTR + 0x2c */
256 u32 per_status; /* INTR + 0x30 */
257 u32 reserved2; /* INTR + 0x34 */
258 u32 per_error; /* INTR + 0x38 */
259};
260
242#endif /* __ASSEMBLY__ */ 261#endif /* __ASSEMBLY__ */
243 262
244 263
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h
index 8917ed630565..a218da6bec7c 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -68,12 +68,20 @@
68#define MPC52xx_PSC_IMR_ORERR 0x1000 68#define MPC52xx_PSC_IMR_ORERR 0x1000
69#define MPC52xx_PSC_IMR_IPC 0x8000 69#define MPC52xx_PSC_IMR_IPC 0x8000
70 70
71/* PSC input port change bit */ 71/* PSC input port change bits */
72#define MPC52xx_PSC_CTS 0x01 72#define MPC52xx_PSC_CTS 0x01
73#define MPC52xx_PSC_DCD 0x02 73#define MPC52xx_PSC_DCD 0x02
74#define MPC52xx_PSC_D_CTS 0x10 74#define MPC52xx_PSC_D_CTS 0x10
75#define MPC52xx_PSC_D_DCD 0x20 75#define MPC52xx_PSC_D_DCD 0x20
76 76
77/* PSC acr bits */
78#define MPC52xx_PSC_IEC_CTS 0x01
79#define MPC52xx_PSC_IEC_DCD 0x02
80
81/* PSC output port bits */
82#define MPC52xx_PSC_OP_RTS 0x01
83#define MPC52xx_PSC_OP_RES 0x02
84
77/* PSC mode fields */ 85/* PSC mode fields */
78#define MPC52xx_PSC_MODE_5_BITS 0x00 86#define MPC52xx_PSC_MODE_5_BITS 0x00
79#define MPC52xx_PSC_MODE_6_BITS 0x01 87#define MPC52xx_PSC_MODE_6_BITS 0x01
@@ -91,6 +99,7 @@
91#define MPC52xx_PSC_MODE_ONE_STOP_5_BITS 0x00 99#define MPC52xx_PSC_MODE_ONE_STOP_5_BITS 0x00
92#define MPC52xx_PSC_MODE_ONE_STOP 0x07 100#define MPC52xx_PSC_MODE_ONE_STOP 0x07
93#define MPC52xx_PSC_MODE_TWO_STOP 0x0f 101#define MPC52xx_PSC_MODE_TWO_STOP 0x0f
102#define MPC52xx_PSC_MODE_TXCTS 0x10
94 103
95#define MPC52xx_PSC_RFNUM_MASK 0x01ff 104#define MPC52xx_PSC_RFNUM_MASK 0x01ff
96 105
diff --git a/arch/powerpc/include/asm/mutex.h b/arch/powerpc/include/asm/mutex.h
index 458c1f7fbc18..dabc01c727b8 100644
--- a/arch/powerpc/include/asm/mutex.h
+++ b/arch/powerpc/include/asm/mutex.h
@@ -1,9 +1,134 @@
1/* 1/*
2 * Pull in the generic implementation for the mutex fastpath. 2 * Optimised mutex implementation of include/asm-generic/mutex-dec.h algorithm
3 */
4#ifndef _ASM_POWERPC_MUTEX_H
5#define _ASM_POWERPC_MUTEX_H
6
7static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new)
8{
9 int t;
10
11 __asm__ __volatile__ (
12"1: lwarx %0,0,%1 # mutex trylock\n\
13 cmpw 0,%0,%2\n\
14 bne- 2f\n"
15 PPC405_ERR77(0,%1)
16" stwcx. %3,0,%1\n\
17 bne- 1b"
18 ISYNC_ON_SMP
19 "\n\
202:"
21 : "=&r" (t)
22 : "r" (&v->counter), "r" (old), "r" (new)
23 : "cc", "memory");
24
25 return t;
26}
27
28static inline int __mutex_dec_return_lock(atomic_t *v)
29{
30 int t;
31
32 __asm__ __volatile__(
33"1: lwarx %0,0,%1 # mutex lock\n\
34 addic %0,%0,-1\n"
35 PPC405_ERR77(0,%1)
36" stwcx. %0,0,%1\n\
37 bne- 1b"
38 ISYNC_ON_SMP
39 : "=&r" (t)
40 : "r" (&v->counter)
41 : "cc", "memory");
42
43 return t;
44}
45
46static inline int __mutex_inc_return_unlock(atomic_t *v)
47{
48 int t;
49
50 __asm__ __volatile__(
51 LWSYNC_ON_SMP
52"1: lwarx %0,0,%1 # mutex unlock\n\
53 addic %0,%0,1\n"
54 PPC405_ERR77(0,%1)
55" stwcx. %0,0,%1 \n\
56 bne- 1b"
57 : "=&r" (t)
58 : "r" (&v->counter)
59 : "cc", "memory");
60
61 return t;
62}
63
64/**
65 * __mutex_fastpath_lock - try to take the lock by moving the count
66 * from 1 to a 0 value
67 * @count: pointer of type atomic_t
68 * @fail_fn: function to call if the original value was not 1
69 *
70 * Change the count from 1 to a value lower than 1, and call <fail_fn> if
71 * it wasn't 1 originally. This function MUST leave the value lower than
72 * 1 even when the "1" assertion wasn't true.
73 */
74static inline void
75__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
76{
77 if (unlikely(__mutex_dec_return_lock(count) < 0))
78 fail_fn(count);
79}
80
81/**
82 * __mutex_fastpath_lock_retval - try to take the lock by moving the count
83 * from 1 to a 0 value
84 * @count: pointer of type atomic_t
85 * @fail_fn: function to call if the original value was not 1
86 *
87 * Change the count from 1 to a value lower than 1, and call <fail_fn> if
88 * it wasn't 1 originally. This function returns 0 if the fastpath succeeds,
89 * or anything the slow path function returns.
90 */
91static inline int
92__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
93{
94 if (unlikely(__mutex_dec_return_lock(count) < 0))
95 return fail_fn(count);
96 return 0;
97}
98
99/**
100 * __mutex_fastpath_unlock - try to promote the count from 0 to 1
101 * @count: pointer of type atomic_t
102 * @fail_fn: function to call if the original value was not 0
103 *
104 * Try to promote the count from 0 to 1. If it wasn't 0, call <fail_fn>.
105 * In the failure case, this function is allowed to either set the value to
106 * 1, or to set it to a value lower than 1.
107 */
108static inline void
109__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
110{
111 if (unlikely(__mutex_inc_return_unlock(count) <= 0))
112 fail_fn(count);
113}
114
115#define __mutex_slowpath_needs_to_unlock() 1
116
117/**
118 * __mutex_fastpath_trylock - try to acquire the mutex, without waiting
119 *
120 * @count: pointer of type atomic_t
121 * @fail_fn: fallback function
3 * 122 *
4 * TODO: implement optimized primitives instead, or leave the generic 123 * Change the count from 1 to 0, and return 1 (success), or if the count
5 * implementation in place, or pick the atomic_xchg() based generic 124 * was not 1, then return 0 (failure).
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */ 125 */
126static inline int
127__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
128{
129 if (likely(__mutex_cmpxchg_lock(count, 1, 0) == 1))
130 return 1;
131 return 0;
132}
8 133
9#include <asm-generic/mutex-dec.h> 134#endif
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index c0b8d4a29a91..197d569f5bd3 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -19,12 +19,15 @@
19#include <asm/kdump.h> 19#include <asm/kdump.h>
20 20
21/* 21/*
22 * On PPC32 page size is 4K. For PPC64 we support either 4K or 64K software 22 * On regular PPC32 page size is 4K (but we support 4K/16K/64K pages
23 * on PPC44x). For PPC64 we support either 4K or 64K software
23 * page size. When using 64K pages however, whether we are really supporting 24 * page size. When using 64K pages however, whether we are really supporting
24 * 64K pages in HW or not is irrelevant to those definitions. 25 * 64K pages in HW or not is irrelevant to those definitions.
25 */ 26 */
26#ifdef CONFIG_PPC_64K_PAGES 27#if defined(CONFIG_PPC_64K_PAGES)
27#define PAGE_SHIFT 16 28#define PAGE_SHIFT 16
29#elif defined(CONFIG_PPC_16K_PAGES)
30#define PAGE_SHIFT 14
28#else 31#else
29#define PAGE_SHIFT 12 32#define PAGE_SHIFT 12
30#endif 33#endif
@@ -151,7 +154,7 @@ typedef struct { pte_basic_t pte; } pte_t;
151/* 64k pages additionally define a bigger "real PTE" type that gathers 154/* 64k pages additionally define a bigger "real PTE" type that gathers
152 * the "second half" part of the PTE for pseudo 64k pages 155 * the "second half" part of the PTE for pseudo 64k pages
153 */ 156 */
154#ifdef CONFIG_PPC_64K_PAGES 157#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
155typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; 158typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
156#else 159#else
157typedef struct { pte_t pte; } real_pte_t; 160typedef struct { pte_t pte; } real_pte_t;
@@ -191,10 +194,10 @@ typedef pte_basic_t pte_t;
191#define pte_val(x) (x) 194#define pte_val(x) (x)
192#define __pte(x) (x) 195#define __pte(x) (x)
193 196
194#ifdef CONFIG_PPC_64K_PAGES 197#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
195typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; 198typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
196#else 199#else
197typedef unsigned long real_pte_t; 200typedef pte_t real_pte_t;
198#endif 201#endif
199 202
200 203
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index d77072a32cc6..1458d9500381 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -19,6 +19,8 @@
19#define PTE_FLAGS_OFFSET 0 19#define PTE_FLAGS_OFFSET 0
20#endif 20#endif
21 21
22#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */
23
22#ifndef __ASSEMBLY__ 24#ifndef __ASSEMBLY__
23/* 25/*
24 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit 26 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
@@ -26,10 +28,8 @@
26 */ 28 */
27#ifdef CONFIG_PTE_64BIT 29#ifdef CONFIG_PTE_64BIT
28typedef unsigned long long pte_basic_t; 30typedef unsigned long long pte_basic_t;
29#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */
30#else 31#else
31typedef unsigned long pte_basic_t; 32typedef unsigned long pte_basic_t;
32#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
33#endif 33#endif
34 34
35struct page; 35struct page;
@@ -39,6 +39,9 @@ extern void copy_page(void *to, void *from);
39 39
40#include <asm-generic/page.h> 40#include <asm-generic/page.h>
41 41
42#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
43#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
44
42#endif /* __ASSEMBLY__ */ 45#endif /* __ASSEMBLY__ */
43 46
44#endif /* _ASM_POWERPC_PAGE_32_H */ 47#endif /* _ASM_POWERPC_PAGE_32_H */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 9047af7baa69..84007afabdb5 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -13,7 +13,6 @@
13 13
14struct device_node; 14struct device_node;
15 15
16extern unsigned int ppc_pci_flags;
17enum { 16enum {
18 /* Force re-assigning all resources (ignore firmware 17 /* Force re-assigning all resources (ignore firmware
19 * setup completely) 18 * setup completely)
@@ -36,6 +35,31 @@ enum {
36 /* ... except for domain 0 */ 35 /* ... except for domain 0 */
37 PPC_PCI_COMPAT_DOMAIN_0 = 0x00000020, 36 PPC_PCI_COMPAT_DOMAIN_0 = 0x00000020,
38}; 37};
38#ifdef CONFIG_PCI
39extern unsigned int ppc_pci_flags;
40
41static inline void ppc_pci_set_flags(int flags)
42{
43 ppc_pci_flags = flags;
44}
45
46static inline void ppc_pci_add_flags(int flags)
47{
48 ppc_pci_flags |= flags;
49}
50
51static inline int ppc_pci_has_flag(int flag)
52{
53 return (ppc_pci_flags & flag);
54}
55#else
56static inline void ppc_pci_set_flags(int flags) { }
57static inline void ppc_pci_add_flags(int flags) { }
58static inline int ppc_pci_has_flag(int flag)
59{
60 return 0;
61}
62#endif
39 63
40 64
41/* 65/*
@@ -241,9 +265,6 @@ extern void pcibios_remove_pci_devices(struct pci_bus *bus);
241 265
242/** Discover new pci devices under this bus, and add them */ 266/** Discover new pci devices under this bus, and add them */
243extern void pcibios_add_pci_devices(struct pci_bus *bus); 267extern void pcibios_add_pci_devices(struct pci_bus *bus);
244extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus);
245
246extern int pcibios_remove_root_bus(struct pci_controller *phb);
247 268
248static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) 269static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
249{ 270{
@@ -290,6 +311,7 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
290/* Allocate & free a PCI host bridge structure */ 311/* Allocate & free a PCI host bridge structure */
291extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev); 312extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
292extern void pcibios_free_controller(struct pci_controller *phb); 313extern void pcibios_free_controller(struct pci_controller *phb);
314extern void pcibios_setup_phb_resources(struct pci_controller *hose);
293 315
294#ifdef CONFIG_PCI 316#ifdef CONFIG_PCI
295extern unsigned long pci_address_to_pio(phys_addr_t address); 317extern unsigned long pci_address_to_pio(phys_addr_t address);
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 57a2a494886b..3548159a1beb 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -38,8 +38,8 @@ struct pci_dev;
38 * Set this to 1 if you want the kernel to re-assign all PCI 38 * Set this to 1 if you want the kernel to re-assign all PCI
39 * bus numbers (don't do that on ppc64 yet !) 39 * bus numbers (don't do that on ppc64 yet !)
40 */ 40 */
41#define pcibios_assign_all_busses() (ppc_pci_flags & \ 41#define pcibios_assign_all_busses() \
42 PPC_PCI_REASSIGN_ALL_BUS) 42 (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
43#define pcibios_scan_all_fns(a, b) 0 43#define pcibios_scan_all_fns(a, b) 0
44 44
45static inline void pcibios_set_master(struct pci_dev *dev) 45static inline void pcibios_set_master(struct pci_dev *dev)
@@ -204,15 +204,14 @@ static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
204 return root; 204 return root;
205} 205}
206 206
207extern void pcibios_setup_new_device(struct pci_dev *dev);
208
209extern void pcibios_claim_one_bus(struct pci_bus *b); 207extern void pcibios_claim_one_bus(struct pci_bus *b);
210 208
211extern void pcibios_allocate_bus_resources(struct pci_bus *bus); 209extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
212 210
213extern void pcibios_resource_survey(void); 211extern void pcibios_resource_survey(void);
214 212
215extern struct pci_controller *init_phb_dynamic(struct device_node *dn); 213extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
214extern int remove_phb_dynamic(struct pci_controller *phb);
216 215
217extern struct pci_dev *of_create_pci_dev(struct device_node *node, 216extern struct pci_dev *of_create_pci_dev(struct device_node *node,
218 struct pci_bus *bus, int devfn); 217 struct pci_bus *bus, int devfn);
@@ -221,6 +220,7 @@ extern void of_scan_pci_bridge(struct device_node *node,
221 struct pci_dev *dev); 220 struct pci_dev *dev);
222 221
223extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); 222extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
223extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
224 224
225extern int pci_read_irq_line(struct pci_dev *dev); 225extern int pci_read_irq_line(struct pci_dev *dev);
226 226
@@ -235,9 +235,8 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
235 const struct resource *rsrc, 235 const struct resource *rsrc,
236 resource_size_t *start, resource_size_t *end); 236 resource_size_t *start, resource_size_t *end);
237 237
238extern void pcibios_do_bus_setup(struct pci_bus *bus); 238extern void pcibios_setup_bus_devices(struct pci_bus *bus);
239extern void pcibios_fixup_of_probed_bus(struct pci_bus *bus); 239extern void pcibios_setup_bus_self(struct pci_bus *bus);
240
241 240
242#endif /* __KERNEL__ */ 241#endif /* __KERNEL__ */
243#endif /* __ASM_POWERPC_PCI_H */ 242#endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/include/asm/pgalloc-32.h b/arch/powerpc/include/asm/pgalloc-32.h
index 58c07147b3ea..0815eb40acae 100644
--- a/arch/powerpc/include/asm/pgalloc-32.h
+++ b/arch/powerpc/include/asm/pgalloc-32.h
@@ -3,6 +3,8 @@
3 3
4#include <linux/threads.h> 4#include <linux/threads.h>
5 5
6#define PTE_NONCACHE_NUM 0 /* dummy for now to share code w/ppc64 */
7
6extern void __bad_pte(pmd_t *pmd); 8extern void __bad_pte(pmd_t *pmd);
7 9
8extern pgd_t *pgd_alloc(struct mm_struct *mm); 10extern pgd_t *pgd_alloc(struct mm_struct *mm);
@@ -33,10 +35,13 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
33 35
34extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); 36extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
35extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr); 37extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
36extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
37extern void pte_free(struct mm_struct *mm, pgtable_t pte);
38 38
39#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte)) 39static inline void pgtable_free(pgtable_free_t pgf)
40{
41 void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
42
43 free_page((unsigned long)p);
44}
40 45
41#define check_pgt_cache() do { } while (0) 46#define check_pgt_cache() do { } while (0)
42 47
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h
index 812a1d8f35cb..afda2bdd860f 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -7,7 +7,6 @@
7 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
8 */ 8 */
9 9
10#include <linux/mm.h>
11#include <linux/slab.h> 10#include <linux/slab.h>
12#include <linux/cpumask.h> 11#include <linux/cpumask.h>
13#include <linux/percpu.h> 12#include <linux/percpu.h>
@@ -108,31 +107,6 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
108 return page; 107 return page;
109} 108}
110 109
111static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
112{
113 free_page((unsigned long)pte);
114}
115
116static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
117{
118 pgtable_page_dtor(ptepage);
119 __free_page(ptepage);
120}
121
122#define PGF_CACHENUM_MASK 0x7
123
124typedef struct pgtable_free {
125 unsigned long val;
126} pgtable_free_t;
127
128static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
129 unsigned long mask)
130{
131 BUG_ON(cachenum > PGF_CACHENUM_MASK);
132
133 return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
134}
135
136static inline void pgtable_free(pgtable_free_t pgf) 110static inline void pgtable_free(pgtable_free_t pgf)
137{ 111{
138 void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK); 112 void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK);
@@ -144,14 +118,6 @@ static inline void pgtable_free(pgtable_free_t pgf)
144 kmem_cache_free(pgtable_cache[cachenum], p); 118 kmem_cache_free(pgtable_cache[cachenum], p);
145} 119}
146 120
147extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
148
149#define __pte_free_tlb(tlb,ptepage) \
150do { \
151 pgtable_page_dtor(ptepage); \
152 pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
153 PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
154} while (0)
155#define __pmd_free_tlb(tlb, pmd) \ 121#define __pmd_free_tlb(tlb, pmd) \
156 pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \ 122 pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \
157 PMD_CACHE_NUM, PMD_TABLE_SIZE-1)) 123 PMD_CACHE_NUM, PMD_TABLE_SIZE-1))
diff --git a/arch/powerpc/include/asm/pgalloc.h b/arch/powerpc/include/asm/pgalloc.h
index b4505ed0f0f2..5d8480265a77 100644
--- a/arch/powerpc/include/asm/pgalloc.h
+++ b/arch/powerpc/include/asm/pgalloc.h
@@ -2,11 +2,52 @@
2#define _ASM_POWERPC_PGALLOC_H 2#define _ASM_POWERPC_PGALLOC_H
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#include <linux/mm.h>
6
7static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
8{
9 free_page((unsigned long)pte);
10}
11
12static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
13{
14 pgtable_page_dtor(ptepage);
15 __free_page(ptepage);
16}
17
18typedef struct pgtable_free {
19 unsigned long val;
20} pgtable_free_t;
21
22#define PGF_CACHENUM_MASK 0x7
23
24static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum,
25 unsigned long mask)
26{
27 BUG_ON(cachenum > PGF_CACHENUM_MASK);
28
29 return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum};
30}
31
5#ifdef CONFIG_PPC64 32#ifdef CONFIG_PPC64
6#include <asm/pgalloc-64.h> 33#include <asm/pgalloc-64.h>
7#else 34#else
8#include <asm/pgalloc-32.h> 35#include <asm/pgalloc-32.h>
9#endif 36#endif
10 37
38extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
39
40#ifdef CONFIG_SMP
41#define __pte_free_tlb(tlb,ptepage) \
42do { \
43 pgtable_page_dtor(ptepage); \
44 pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
45 PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
46} while (0)
47#else
48#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
49#endif
50
51
11#endif /* __KERNEL__ */ 52#endif /* __KERNEL__ */
12#endif /* _ASM_POWERPC_PGALLOC_H */ 53#endif /* _ASM_POWERPC_PGALLOC_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 6ab7c67cb5ab..f69a4d977729 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -228,9 +228,10 @@ extern int icache_44x_need_flush;
228 * - FILE *must* be in the bottom three bits because swap cache 228 * - FILE *must* be in the bottom three bits because swap cache
229 * entries use the top 29 bits for TLB2. 229 * entries use the top 29 bits for TLB2.
230 * 230 *
231 * - CACHE COHERENT bit (M) has no effect on PPC440 core, because it 231 * - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
232 * doesn't support SMP. So we can use this as software bit, like 232 * because it doesn't support SMP. However, some later 460 variants
233 * DIRTY. 233 * have -some- form of SMP support and so I keep the bit there for
234 * future use
234 * 235 *
235 * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used 236 * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
236 * for memory protection related functions (see PTE structure in 237 * for memory protection related functions (see PTE structure in
@@ -436,20 +437,23 @@ extern int icache_44x_need_flush;
436 _PAGE_USER | _PAGE_ACCESSED | \ 437 _PAGE_USER | _PAGE_ACCESSED | \
437 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \ 438 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
438 _PAGE_EXEC | _PAGE_HWEXEC) 439 _PAGE_EXEC | _PAGE_HWEXEC)
440
439/* 441/*
440 * Note: the _PAGE_COHERENT bit automatically gets set in the hardware 442 * We define 2 sets of base prot bits, one for basic pages (ie,
441 * PTE if CONFIG_SMP is defined (hash_page does this); there is no need 443 * cacheable kernel and user pages) and one for non cacheable
442 * to have it in the Linux PTE, and in fact the bit could be reused for 444 * pages. We always set _PAGE_COHERENT when SMP is enabled or
443 * another purpose. -- paulus. 445 * the processor might need it for DMA coherency.
444 */ 446 */
445 447#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
446#ifdef CONFIG_44x 448#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
447#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_GUARDED)
448#else 449#else
449#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED) 450#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
450#endif 451#endif
452#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_NO_CACHE)
453
451#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE) 454#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE)
452#define _PAGE_KERNEL (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE) 455#define _PAGE_KERNEL (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE)
456#define _PAGE_KERNEL_NC (_PAGE_BASE_NC | _PAGE_SHARED | _PAGE_WRENABLE)
453 457
454#ifdef CONFIG_PPC_STD_MMU 458#ifdef CONFIG_PPC_STD_MMU
455/* On standard PPC MMU, no user access implies kernel read/write access, 459/* On standard PPC MMU, no user access implies kernel read/write access,
@@ -459,7 +463,7 @@ extern int icache_44x_need_flush;
459#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED) 463#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED)
460#endif 464#endif
461 465
462#define _PAGE_IO (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED) 466#define _PAGE_IO (_PAGE_KERNEL_NC | _PAGE_GUARDED)
463#define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC) 467#define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC)
464 468
465#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ 469#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
@@ -552,9 +556,6 @@ static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;
552static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 556static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
553static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } 557static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
554 558
555static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
556static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
557
558static inline pte_t pte_wrprotect(pte_t pte) { 559static inline pte_t pte_wrprotect(pte_t pte) {
559 pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; } 560 pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
560static inline pte_t pte_mkclean(pte_t pte) { 561static inline pte_t pte_mkclean(pte_t pte) {
@@ -693,10 +694,11 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
693#endif 694#endif
694} 695}
695 696
697
696static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 698static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
697 pte_t *ptep, pte_t pte) 699 pte_t *ptep, pte_t pte)
698{ 700{
699#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) 701#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) && defined(CONFIG_DEBUG_VM)
700 WARN_ON(pte_present(*ptep)); 702 WARN_ON(pte_present(*ptep));
701#endif 703#endif
702 __set_pte_at(mm, addr, ptep, pte); 704 __set_pte_at(mm, addr, ptep, pte);
@@ -760,16 +762,6 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
760 __changed; \ 762 __changed; \
761}) 763})
762 764
763/*
764 * Macro to mark a page protection value as "uncacheable".
765 */
766#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
767
768struct file;
769extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
770 unsigned long size, pgprot_t vma_prot);
771#define __HAVE_PHYS_MEM_ACCESS_PROT
772
773#define __HAVE_ARCH_PTE_SAME 765#define __HAVE_ARCH_PTE_SAME
774#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0) 766#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
775 767
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 4c0a8c62859d..b0f18be81d9f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -100,7 +100,7 @@
100 100
101#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY) 101#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
102 102
103/* __pgprot defined in arch/powerpc/incliude/asm/page.h */ 103/* __pgprot defined in arch/powerpc/include/asm/page.h */
104#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) 104#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
105 105
106#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER) 106#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
@@ -245,9 +245,6 @@ static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
245static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;} 245static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
246static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } 246static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
247 247
248static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
249static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
250
251static inline pte_t pte_wrprotect(pte_t pte) { 248static inline pte_t pte_wrprotect(pte_t pte) {
252 pte_val(pte) &= ~(_PAGE_RW); return pte; } 249 pte_val(pte) &= ~(_PAGE_RW); return pte; }
253static inline pte_t pte_mkclean(pte_t pte) { 250static inline pte_t pte_mkclean(pte_t pte) {
@@ -405,16 +402,6 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
405 __changed; \ 402 __changed; \
406}) 403})
407 404
408/*
409 * Macro to mark a page protection value as "uncacheable".
410 */
411#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
412
413struct file;
414extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
415 unsigned long size, pgprot_t vma_prot);
416#define __HAVE_PHYS_MEM_ACCESS_PROT
417
418#define __HAVE_ARCH_PTE_SAME 405#define __HAVE_ARCH_PTE_SAME
419#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 406#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
420 407
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index dbb8ca172e44..07f55e601696 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -16,6 +16,32 @@ struct mm_struct;
16#endif 16#endif
17 17
18#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
19
20/*
21 * Macro to mark a page protection value as "uncacheable".
22 */
23
24#define _PAGE_CACHE_CTL (_PAGE_COHERENT | _PAGE_GUARDED | _PAGE_NO_CACHE | \
25 _PAGE_WRITETHRU)
26
27#define pgprot_noncached(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
28 _PAGE_NO_CACHE | _PAGE_GUARDED))
29
30#define pgprot_noncached_wc(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
31 _PAGE_NO_CACHE))
32
33#define pgprot_cached(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
34 _PAGE_COHERENT))
35
36#define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
37 _PAGE_COHERENT | _PAGE_WRITETHRU))
38
39
40struct file;
41extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
42 unsigned long size, pgprot_t vma_prot);
43#define __HAVE_PHYS_MEM_ACCESS_PROT
44
19/* 45/*
20 * ZERO_PAGE is a global shared page that is always zero: used 46 * ZERO_PAGE is a global shared page that is always zero: used
21 * for zero-mapped memory areas etc.. 47 * for zero-mapped memory areas etc..
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index c4a029ccb4d3..1a0d628eb114 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -425,14 +425,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
425#define fromreal(rd) tovirt(rd,rd) 425#define fromreal(rd) tovirt(rd,rd)
426 426
427#define tophys(rd,rs) \ 427#define tophys(rd,rs) \
4280: addis rd,rs,-KERNELBASE@h; \ 4280: addis rd,rs,-PAGE_OFFSET@h; \
429 .section ".vtop_fixup","aw"; \ 429 .section ".vtop_fixup","aw"; \
430 .align 1; \ 430 .align 1; \
431 .long 0b; \ 431 .long 0b; \
432 .previous 432 .previous
433 433
434#define tovirt(rd,rs) \ 434#define tovirt(rd,rs) \
4350: addis rd,rs,KERNELBASE@h; \ 4350: addis rd,rs,PAGE_OFFSET@h; \
436 .section ".ptov_fixup","aw"; \ 436 .section ".ptov_fixup","aw"; \
437 .align 1; \ 437 .align 1; \
438 .long 0b; \ 438 .long 0b; \
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 101ed87f7d84..d3466490104a 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -69,8 +69,6 @@ extern int _prep_type;
69 69
70#ifdef __KERNEL__ 70#ifdef __KERNEL__
71 71
72extern int have_of;
73
74struct task_struct; 72struct task_struct;
75void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp); 73void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
76void release_thread(struct task_struct *); 74void release_thread(struct task_struct *);
@@ -207,6 +205,11 @@ struct thread_struct {
207#define INIT_SP_LIMIT \ 205#define INIT_SP_LIMIT \
208 (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack) 206 (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
209 207
208#ifdef CONFIG_SPE
209#define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
210#else
211#define SPEFSCR_INIT
212#endif
210 213
211#ifdef CONFIG_PPC32 214#ifdef CONFIG_PPC32
212#define INIT_THREAD { \ 215#define INIT_THREAD { \
@@ -215,6 +218,7 @@ struct thread_struct {
215 .fs = KERNEL_DS, \ 218 .fs = KERNEL_DS, \
216 .pgdir = swapper_pg_dir, \ 219 .pgdir = swapper_pg_dir, \
217 .fpexc_mode = MSR_FE0 | MSR_FE1, \ 220 .fpexc_mode = MSR_FE0 | MSR_FE1, \
221 SPEFSCR_INIT \
218} 222}
219#else 223#else
220#define INIT_THREAD { \ 224#define INIT_THREAD { \
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index eb3bd2e1c7f6..6ff04185d2aa 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -253,6 +253,9 @@ extern void kdump_move_device_tree(void);
253/* CPU OF node matching */ 253/* CPU OF node matching */
254struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); 254struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
255 255
256/* cache lookup */
257struct device_node *of_find_next_cache_node(struct device_node *np);
258
256/* Get the MAC address */ 259/* Get the MAC address */
257extern const void *of_get_mac_address(struct device_node *np); 260extern const void *of_get_mac_address(struct device_node *np);
258 261
diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h
index f9e34c493cbb..cff30c0ef1ff 100644
--- a/arch/powerpc/include/asm/ps3.h
+++ b/arch/powerpc/include/asm/ps3.h
@@ -305,30 +305,34 @@ static inline const char* ps3_result(int result)
305/* system bus routines */ 305/* system bus routines */
306 306
307enum ps3_match_id { 307enum ps3_match_id {
308 PS3_MATCH_ID_EHCI = 1, 308 PS3_MATCH_ID_EHCI = 1,
309 PS3_MATCH_ID_OHCI = 2, 309 PS3_MATCH_ID_OHCI = 2,
310 PS3_MATCH_ID_GELIC = 3, 310 PS3_MATCH_ID_GELIC = 3,
311 PS3_MATCH_ID_AV_SETTINGS = 4, 311 PS3_MATCH_ID_AV_SETTINGS = 4,
312 PS3_MATCH_ID_SYSTEM_MANAGER = 5, 312 PS3_MATCH_ID_SYSTEM_MANAGER = 5,
313 PS3_MATCH_ID_STOR_DISK = 6, 313 PS3_MATCH_ID_STOR_DISK = 6,
314 PS3_MATCH_ID_STOR_ROM = 7, 314 PS3_MATCH_ID_STOR_ROM = 7,
315 PS3_MATCH_ID_STOR_FLASH = 8, 315 PS3_MATCH_ID_STOR_FLASH = 8,
316 PS3_MATCH_ID_SOUND = 9, 316 PS3_MATCH_ID_SOUND = 9,
317 PS3_MATCH_ID_GRAPHICS = 10, 317 PS3_MATCH_ID_GPU = 10,
318 PS3_MATCH_ID_LPM = 11, 318 PS3_MATCH_ID_LPM = 11,
319}; 319};
320 320
321#define PS3_MODULE_ALIAS_EHCI "ps3:1" 321enum ps3_match_sub_id {
322#define PS3_MODULE_ALIAS_OHCI "ps3:2" 322 PS3_MATCH_SUB_ID_GPU_FB = 1,
323#define PS3_MODULE_ALIAS_GELIC "ps3:3" 323};
324#define PS3_MODULE_ALIAS_AV_SETTINGS "ps3:4" 324
325#define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5" 325#define PS3_MODULE_ALIAS_EHCI "ps3:1:0"
326#define PS3_MODULE_ALIAS_STOR_DISK "ps3:6" 326#define PS3_MODULE_ALIAS_OHCI "ps3:2:0"
327#define PS3_MODULE_ALIAS_STOR_ROM "ps3:7" 327#define PS3_MODULE_ALIAS_GELIC "ps3:3:0"
328#define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8" 328#define PS3_MODULE_ALIAS_AV_SETTINGS "ps3:4:0"
329#define PS3_MODULE_ALIAS_SOUND "ps3:9" 329#define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5:0"
330#define PS3_MODULE_ALIAS_GRAPHICS "ps3:10" 330#define PS3_MODULE_ALIAS_STOR_DISK "ps3:6:0"
331#define PS3_MODULE_ALIAS_LPM "ps3:11" 331#define PS3_MODULE_ALIAS_STOR_ROM "ps3:7:0"
332#define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8:0"
333#define PS3_MODULE_ALIAS_SOUND "ps3:9:0"
334#define PS3_MODULE_ALIAS_GPU_FB "ps3:10:1"
335#define PS3_MODULE_ALIAS_LPM "ps3:11:0"
332 336
333enum ps3_system_bus_device_type { 337enum ps3_system_bus_device_type {
334 PS3_DEVICE_TYPE_IOC0 = 1, 338 PS3_DEVICE_TYPE_IOC0 = 1,
@@ -337,11 +341,6 @@ enum ps3_system_bus_device_type {
337 PS3_DEVICE_TYPE_LPM, 341 PS3_DEVICE_TYPE_LPM,
338}; 342};
339 343
340enum ps3_match_sub_id {
341 /* for PS3_MATCH_ID_GRAPHICS */
342 PS3_MATCH_SUB_ID_FB = 1,
343};
344
345/** 344/**
346 * struct ps3_system_bus_device - a device on the system bus 345 * struct ps3_system_bus_device - a device on the system bus
347 */ 346 */
@@ -516,4 +515,7 @@ void ps3_sync_irq(int node);
516u32 ps3_get_hw_thread_id(int cpu); 515u32 ps3_get_hw_thread_id(int cpu);
517u64 ps3_get_spe_id(void *arg); 516u64 ps3_get_spe_id(void *arg);
518 517
518/* mutex synchronizing GPU accesses and video mode changes */
519extern struct mutex ps3_gpu_mutex;
520
519#endif 521#endif
diff --git a/arch/powerpc/include/asm/ps3av.h b/arch/powerpc/include/asm/ps3av.h
index 5aa22cffdbd6..cd24ac16660a 100644
--- a/arch/powerpc/include/asm/ps3av.h
+++ b/arch/powerpc/include/asm/ps3av.h
@@ -740,8 +740,4 @@ extern int ps3av_audio_mute(int);
740extern int ps3av_audio_mute_analog(int); 740extern int ps3av_audio_mute_analog(int);
741extern int ps3av_dev_open(void); 741extern int ps3av_dev_open(void);
742extern int ps3av_dev_close(void); 742extern int ps3av_dev_close(void);
743extern void ps3av_register_flip_ctl(void (*flip_ctl)(int on, void *data),
744 void *flip_data);
745extern void ps3av_flip_ctl(int on);
746
747#endif /* _ASM_POWERPC_PS3AV_H_ */ 743#endif /* _ASM_POWERPC_PS3AV_H_ */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c6d1ab650778..f484a343efba 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -783,6 +783,10 @@ extern void scom970_write(unsigned int address, unsigned long value);
783#define __get_SP() ({unsigned long sp; \ 783#define __get_SP() ({unsigned long sp; \
784 asm volatile("mr %0,1": "=r" (sp)); sp;}) 784 asm volatile("mr %0,1": "=r" (sp)); sp;})
785 785
786struct pt_regs;
787
788extern void ppc_save_regs(struct pt_regs *regs);
789
786#endif /* __ASSEMBLY__ */ 790#endif /* __ASSEMBLY__ */
787#endif /* __KERNEL__ */ 791#endif /* __KERNEL__ */
788#endif /* _ASM_POWERPC_REG_H */ 792#endif /* _ASM_POWERPC_REG_H */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 8eaa7b28d9d0..e0175beb4462 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -168,6 +168,7 @@ extern void rtas_os_term(char *str);
168extern int rtas_get_sensor(int sensor, int index, int *state); 168extern int rtas_get_sensor(int sensor, int index, int *state);
169extern int rtas_get_power_level(int powerdomain, int *level); 169extern int rtas_get_power_level(int powerdomain, int *level);
170extern int rtas_set_power_level(int powerdomain, int level, int *setlevel); 170extern int rtas_set_power_level(int powerdomain, int level, int *setlevel);
171extern bool rtas_indicator_present(int token, int *maxindex);
171extern int rtas_set_indicator(int indicator, int index, int new_value); 172extern int rtas_set_indicator(int indicator, int index, int new_value);
172extern int rtas_set_indicator_fast(int indicator, int index, int new_value); 173extern int rtas_set_indicator_fast(int indicator, int index, int new_value);
173extern void rtas_progress(char *s, unsigned short hex); 174extern void rtas_progress(char *s, unsigned short hex);
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index ced34f1dc8f8..3d9f831c3c55 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -82,7 +82,7 @@
82#define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) 82#define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
83#define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) 83#define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
84 84
85#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) 85#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
86#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) 86#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
87 87
88/* These macros define what NaN looks like. They're supposed to expand to 88/* These macros define what NaN looks like. They're supposed to expand to
@@ -97,6 +97,20 @@
97 97
98#define _FP_KEEPNANFRACP 1 98#define _FP_KEEPNANFRACP 1
99 99
100#ifdef FP_EX_BOOKE_E500_SPE
101#define FP_EX_INEXACT (1 << 21)
102#define FP_EX_INVALID (1 << 20)
103#define FP_EX_DIVZERO (1 << 19)
104#define FP_EX_UNDERFLOW (1 << 18)
105#define FP_EX_OVERFLOW (1 << 17)
106#define FP_INHIBIT_RESULTS 0
107
108#define __FPU_FPSCR (current->thread.spefscr)
109#define __FPU_ENABLED_EXC \
110({ \
111 (__FPU_FPSCR >> 2) & 0x1f; \
112})
113#else
100/* Exception flags. We use the bit positions of the appropriate bits 114/* Exception flags. We use the bit positions of the appropriate bits
101 in the FPSCR, which also correspond to the FE_* bits. This makes 115 in the FPSCR, which also correspond to the FE_* bits. This makes
102 everything easier ;-). */ 116 everything easier ;-). */
@@ -111,22 +125,6 @@
111#define FP_EX_DIVZERO (1 << (31 - 5)) 125#define FP_EX_DIVZERO (1 << (31 - 5))
112#define FP_EX_INEXACT (1 << (31 - 6)) 126#define FP_EX_INEXACT (1 << (31 - 6))
113 127
114/* This macro appears to be called when both X and Y are NaNs, and
115 * has to choose one and copy it to R. i386 goes for the larger of the
116 * two, sparc64 just picks Y. I don't understand this at all so I'll
117 * go with sparc64 because it's shorter :-> -- PMM
118 */
119#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
120 do { \
121 R##_s = Y##_s; \
122 _FP_FRAC_COPY_##wc(R,Y); \
123 R##_c = FP_CLS_NAN; \
124 } while (0)
125
126
127#include <linux/kernel.h>
128#include <linux/sched.h>
129
130#define __FPU_FPSCR (current->thread.fpscr.val) 128#define __FPU_FPSCR (current->thread.fpscr.val)
131 129
132/* We only actually write to the destination register 130/* We only actually write to the destination register
@@ -137,6 +135,32 @@
137 (__FPU_FPSCR >> 3) & 0x1f; \ 135 (__FPU_FPSCR >> 3) & 0x1f; \
138}) 136})
139 137
138#endif
139
140/*
141 * If one NaN is signaling and the other is not,
142 * we choose that one, otherwise we choose X.
143 */
144#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
145 do { \
146 if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \
147 && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \
148 { \
149 R##_s = X##_s; \
150 _FP_FRAC_COPY_##wc(R,X); \
151 } \
152 else \
153 { \
154 R##_s = Y##_s; \
155 _FP_FRAC_COPY_##wc(R,Y); \
156 } \
157 R##_c = FP_CLS_NAN; \
158 } while (0)
159
160
161#include <linux/kernel.h>
162#include <linux/sched.h>
163
140#define __FPU_TRAP_P(bits) \ 164#define __FPU_TRAP_P(bits) \
141 ((__FPU_ENABLED_EXC & (bits)) != 0) 165 ((__FPU_ENABLED_EXC & (bits)) != 0)
142 166
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 1866cec4f967..c25f73d1d842 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -81,6 +81,13 @@ extern int cpu_to_core_id(int cpu);
81#define PPC_MSG_CALL_FUNC_SINGLE 2 81#define PPC_MSG_CALL_FUNC_SINGLE 2
82#define PPC_MSG_DEBUGGER_BREAK 3 82#define PPC_MSG_DEBUGGER_BREAK 3
83 83
84/*
85 * irq controllers that have dedicated ipis per message and don't
86 * need additional code in the action handler may use this
87 */
88extern int smp_request_message_ipi(int virq, int message);
89extern const char *smp_ipi_name[];
90
84void smp_init_iSeries(void); 91void smp_init_iSeries(void);
85void smp_init_pSeries(void); 92void smp_init_pSeries(void);
86void smp_init_cell(void); 93void smp_init_cell(void);
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index f56a843f4705..36864364e601 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -277,7 +277,7 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
277 bne- 1b" 277 bne- 1b"
278 : "=&r"(tmp) 278 : "=&r"(tmp)
279 : "r"(&rw->lock) 279 : "r"(&rw->lock)
280 : "cr0", "memory"); 280 : "cr0", "xer", "memory");
281} 281}
282 282
283static inline void __raw_write_unlock(raw_rwlock_t *rw) 283static inline void __raw_write_unlock(raw_rwlock_t *rw)
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index 45963e80f557..28f6ddbff4cf 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -5,6 +5,10 @@
5#include <linux/stringify.h> 5#include <linux/stringify.h>
6#include <asm/feature-fixups.h> 6#include <asm/feature-fixups.h>
7 7
8#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
9#define __SUBARCH_HAS_LWSYNC
10#endif
11
8#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
9extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; 13extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
10extern void do_lwsync_fixups(unsigned long value, void *fixup_start, 14extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index d6648c143322..2a4be19a92c4 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -23,15 +23,17 @@
23 * read_barrier_depends() prevents data-dependent loads being reordered 23 * read_barrier_depends() prevents data-dependent loads being reordered
24 * across this point (nop on PPC). 24 * across this point (nop on PPC).
25 * 25 *
26 * We have to use the sync instructions for mb(), since lwsync doesn't 26 * *mb() variants without smp_ prefix must order all types of memory
27 * order loads with respect to previous stores. Lwsync is fine for 27 * operations with one another. sync is the only instruction sufficient
28 * rmb(), though. Note that rmb() actually uses a sync on 32-bit 28 * to do this.
29 * architectures.
30 * 29 *
31 * For wmb(), we use sync since wmb is used in drivers to order 30 * For the smp_ barriers, ordering is for cacheable memory operations
32 * stores to system memory with respect to writes to the device. 31 * only. We have to use the sync instruction for smp_mb(), since lwsync
33 * However, smp_wmb() can be a lighter-weight lwsync or eieio barrier 32 * doesn't order loads with respect to previous stores. Lwsync can be
34 * on SMP since it is only used to order updates to system memory. 33 * used for smp_rmb() and smp_wmb().
34 *
35 * However, on CPUs that don't support lwsync, lwsync actually maps to a
36 * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
35 */ 37 */
36#define mb() __asm__ __volatile__ ("sync" : : : "memory") 38#define mb() __asm__ __volatile__ ("sync" : : : "memory")
37#define rmb() __asm__ __volatile__ ("sync" : : : "memory") 39#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
@@ -45,14 +47,14 @@
45#ifdef CONFIG_SMP 47#ifdef CONFIG_SMP
46 48
47#ifdef __SUBARCH_HAS_LWSYNC 49#ifdef __SUBARCH_HAS_LWSYNC
48# define SMPWMB lwsync 50# define SMPWMB LWSYNC
49#else 51#else
50# define SMPWMB eieio 52# define SMPWMB eieio
51#endif 53#endif
52 54
53#define smp_mb() mb() 55#define smp_mb() mb()
54#define smp_rmb() rmb() 56#define smp_rmb() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
55#define smp_wmb() __asm__ __volatile__ (__stringify(SMPWMB) : : :"memory") 57#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
56#define smp_read_barrier_depends() read_barrier_depends() 58#define smp_read_barrier_depends() read_barrier_depends()
57#else 59#else
58#define smp_mb() barrier() 60#define smp_mb() barrier()
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index febd581ec9b0..27ccb764fdab 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -48,26 +48,6 @@ extern unsigned long ppc_proc_freq;
48extern unsigned long ppc_tb_freq; 48extern unsigned long ppc_tb_freq;
49#define DEFAULT_TB_FREQ 125000000UL 49#define DEFAULT_TB_FREQ 125000000UL
50 50
51/*
52 * By putting all of this stuff into a single struct we
53 * reduce the number of cache lines touched by do_gettimeofday.
54 * Both by collecting all of the data in one cache line and
55 * by touching only one TOC entry on ppc64.
56 */
57struct gettimeofday_vars {
58 u64 tb_to_xs;
59 u64 stamp_xsec;
60 u64 tb_orig_stamp;
61};
62
63struct gettimeofday_struct {
64 unsigned long tb_ticks_per_sec;
65 struct gettimeofday_vars vars[2];
66 struct gettimeofday_vars * volatile varp;
67 unsigned var_idx;
68 unsigned tb_to_us;
69};
70
71struct div_result { 51struct div_result {
72 u64 result_high; 52 u64 result_high;
73 u64 result_low; 53 u64 result_low;
diff --git a/arch/powerpc/include/asm/tlbflush.h b/arch/powerpc/include/asm/tlbflush.h
index a2c6bfd85fb7..abbe3419d1dd 100644
--- a/arch/powerpc/include/asm/tlbflush.h
+++ b/arch/powerpc/include/asm/tlbflush.h
@@ -6,6 +6,9 @@
6 * 6 *
7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's 7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
8 * - flush_tlb_page(vma, vmaddr) flushes one page 8 * - flush_tlb_page(vma, vmaddr) flushes one page
9 * - local_flush_tlb_mm(mm) flushes the specified mm context on
10 * the local processor
11 * - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
9 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB 12 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
10 * - flush_tlb_range(vma, start, end) flushes a range of pages 13 * - flush_tlb_range(vma, start, end) flushes a range of pages
11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages 14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
@@ -17,7 +20,7 @@
17 */ 20 */
18#ifdef __KERNEL__ 21#ifdef __KERNEL__
19 22
20#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE) 23#ifdef CONFIG_PPC_MMU_NOHASH
21/* 24/*
22 * TLB flushing for software loaded TLB chips 25 * TLB flushing for software loaded TLB chips
23 * 26 *
@@ -28,63 +31,49 @@
28 31
29#include <linux/mm.h> 32#include <linux/mm.h>
30 33
31extern void _tlbie(unsigned long address, unsigned int pid); 34#define MMU_NO_CONTEXT ((unsigned int)-1)
32extern void _tlbil_all(void);
33extern void _tlbil_pid(unsigned int pid);
34extern void _tlbil_va(unsigned long address, unsigned int pid);
35 35
36#if defined(CONFIG_40x) || defined(CONFIG_8xx) 36extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
37#define _tlbia() asm volatile ("tlbia; sync" : : : "memory") 37 unsigned long end);
38#else /* CONFIG_44x || CONFIG_FSL_BOOKE */ 38extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
39extern void _tlbia(void);
40#endif
41
42static inline void flush_tlb_mm(struct mm_struct *mm)
43{
44 _tlbil_pid(mm->context.id);
45}
46
47static inline void flush_tlb_page(struct vm_area_struct *vma,
48 unsigned long vmaddr)
49{
50 _tlbil_va(vmaddr, vma ? vma->vm_mm->context.id : 0);
51}
52 39
53static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, 40extern void local_flush_tlb_mm(struct mm_struct *mm);
54 unsigned long vmaddr) 41extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
55{
56 flush_tlb_page(vma, vmaddr);
57}
58 42
59static inline void flush_tlb_range(struct vm_area_struct *vma, 43#ifdef CONFIG_SMP
60 unsigned long start, unsigned long end) 44extern void flush_tlb_mm(struct mm_struct *mm);
61{ 45extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
62 _tlbil_pid(vma->vm_mm->context.id); 46#else
63} 47#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
48#define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
49#endif
50#define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
64 51
65static inline void flush_tlb_kernel_range(unsigned long start, 52#elif defined(CONFIG_PPC_STD_MMU_32)
66 unsigned long end)
67{
68 _tlbil_pid(0);
69}
70 53
71#elif defined(CONFIG_PPC32)
72/* 54/*
73 * TLB flushing for "classic" hash-MMMU 32-bit CPUs, 6xx, 7xx, 7xxx 55 * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
74 */ 56 */
75extern void _tlbie(unsigned long address);
76extern void _tlbia(void);
77
78extern void flush_tlb_mm(struct mm_struct *mm); 57extern void flush_tlb_mm(struct mm_struct *mm);
79extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); 58extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
80extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr); 59extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
81extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 60extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
82 unsigned long end); 61 unsigned long end);
83extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 62extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
63static inline void local_flush_tlb_page(struct vm_area_struct *vma,
64 unsigned long vmaddr)
65{
66 flush_tlb_page(vma, vmaddr);
67}
68static inline void local_flush_tlb_mm(struct mm_struct *mm)
69{
70 flush_tlb_mm(mm);
71}
72
73#elif defined(CONFIG_PPC_STD_MMU_64)
84 74
85#else
86/* 75/*
87 * TLB flushing for 64-bit has-MMU CPUs 76 * TLB flushing for 64-bit hash-MMU CPUs
88 */ 77 */
89 78
90#include <linux/percpu.h> 79#include <linux/percpu.h>
@@ -134,10 +123,19 @@ extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
134extern void flush_hash_range(unsigned long number, int local); 123extern void flush_hash_range(unsigned long number, int local);
135 124
136 125
126static inline void local_flush_tlb_mm(struct mm_struct *mm)
127{
128}
129
137static inline void flush_tlb_mm(struct mm_struct *mm) 130static inline void flush_tlb_mm(struct mm_struct *mm)
138{ 131{
139} 132}
140 133
134static inline void local_flush_tlb_page(struct vm_area_struct *vma,
135 unsigned long vmaddr)
136{
137}
138
141static inline void flush_tlb_page(struct vm_area_struct *vma, 139static inline void flush_tlb_page(struct vm_area_struct *vma,
142 unsigned long vmaddr) 140 unsigned long vmaddr)
143{ 141{
@@ -162,7 +160,8 @@ static inline void flush_tlb_kernel_range(unsigned long start,
162extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start, 160extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
163 unsigned long end); 161 unsigned long end);
164 162
165 163#else
164#error Unsupported MMU type
166#endif 165#endif
167 166
168#endif /*__KERNEL__ */ 167#endif /*__KERNEL__ */
diff --git a/arch/powerpc/include/asm/vdso_datapage.h b/arch/powerpc/include/asm/vdso_datapage.h
index f01393224b52..13c2c283e178 100644
--- a/arch/powerpc/include/asm/vdso_datapage.h
+++ b/arch/powerpc/include/asm/vdso_datapage.h
@@ -39,6 +39,7 @@
39#ifndef __ASSEMBLY__ 39#ifndef __ASSEMBLY__
40 40
41#include <linux/unistd.h> 41#include <linux/unistd.h>
42#include <linux/time.h>
42 43
43#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32) 44#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32)
44 45
@@ -83,6 +84,7 @@ struct vdso_data {
83 __u32 icache_log_block_size; /* L1 i-cache log block size */ 84 __u32 icache_log_block_size; /* L1 i-cache log block size */
84 __s32 wtom_clock_sec; /* Wall to monotonic clock */ 85 __s32 wtom_clock_sec; /* Wall to monotonic clock */
85 __s32 wtom_clock_nsec; 86 __s32 wtom_clock_nsec;
87 struct timespec stamp_xtime; /* xtime as at tb_orig_stamp */
86 __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */ 88 __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */
87 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ 89 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
88}; 90};
@@ -102,6 +104,7 @@ struct vdso_data {
102 __u32 tz_dsttime; /* Type of dst correction 0x5C */ 104 __u32 tz_dsttime; /* Type of dst correction 0x5C */
103 __s32 wtom_clock_sec; /* Wall to monotonic clock */ 105 __s32 wtom_clock_sec; /* Wall to monotonic clock */
104 __s32 wtom_clock_nsec; 106 __s32 wtom_clock_nsec;
107 struct timespec stamp_xtime; /* xtime as at tb_orig_stamp */
105 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ 108 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
106 __u32 dcache_block_size; /* L1 d-cache block size */ 109 __u32 dcache_block_size; /* L1 d-cache block size */
107 __u32 icache_block_size; /* L1 i-cache block size */ 110 __u32 icache_block_size; /* L1 i-cache block size */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 92673b43858d..1308a86e9070 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -17,6 +17,7 @@ ifdef CONFIG_FUNCTION_TRACER
17CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog 17CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog
18CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog 18CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog
19CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog 19CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog
20CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog
20 21
21ifdef CONFIG_DYNAMIC_FTRACE 22ifdef CONFIG_DYNAMIC_FTRACE
22# dynamic ftrace setup. 23# dynamic ftrace setup.
@@ -102,6 +103,10 @@ endif
102 103
103obj-$(CONFIG_PPC64) += $(obj64-y) 104obj-$(CONFIG_PPC64) += $(obj64-y)
104 105
106ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC),)
107obj-y += ppc_save_regs.o
108endif
109
105extra-$(CONFIG_PPC_FPU) += fpu.o 110extra-$(CONFIG_PPC_FPU) += fpu.o
106extra-$(CONFIG_PPC64) += entry_64.o 111extra-$(CONFIG_PPC64) += entry_64.o
107 112
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 75c5dd0138fd..661d07d2146b 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -60,6 +60,7 @@ int main(void)
60{ 60{
61 DEFINE(THREAD, offsetof(struct task_struct, thread)); 61 DEFINE(THREAD, offsetof(struct task_struct, thread));
62 DEFINE(MM, offsetof(struct task_struct, mm)); 62 DEFINE(MM, offsetof(struct task_struct, mm));
63 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
63#ifdef CONFIG_PPC64 64#ifdef CONFIG_PPC64
64 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context)); 65 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
65#else 66#else
@@ -306,6 +307,7 @@ int main(void)
306 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32)); 307 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
307 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec)); 308 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
308 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec)); 309 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
310 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
309 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size)); 311 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
310 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size)); 312 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
311 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size)); 313 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
@@ -378,6 +380,10 @@ int main(void)
378 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear)); 380 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
379 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr)); 381 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
380#endif 382#endif
383#ifdef CONFIG_44x
384 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
385 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
386#endif
381 387
382 return 0; 388 return 0;
383} 389}
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 7e8719504f39..923f87aff20a 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -19,6 +19,7 @@
19#include <asm/oprofile_impl.h> 19#include <asm/oprofile_impl.h>
20#include <asm/cputable.h> 20#include <asm/cputable.h>
21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22#include <asm/mmu.h>
22 23
23struct cpu_spec* cur_cpu_spec = NULL; 24struct cpu_spec* cur_cpu_spec = NULL;
24EXPORT_SYMBOL(cur_cpu_spec); 25EXPORT_SYMBOL(cur_cpu_spec);
@@ -94,6 +95,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
94 .cpu_name = "POWER3 (630)", 95 .cpu_name = "POWER3 (630)",
95 .cpu_features = CPU_FTRS_POWER3, 96 .cpu_features = CPU_FTRS_POWER3,
96 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 97 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
98 .mmu_features = MMU_FTR_HPTE_TABLE,
97 .icache_bsize = 128, 99 .icache_bsize = 128,
98 .dcache_bsize = 128, 100 .dcache_bsize = 128,
99 .num_pmcs = 8, 101 .num_pmcs = 8,
@@ -109,6 +111,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
109 .cpu_name = "POWER3 (630+)", 111 .cpu_name = "POWER3 (630+)",
110 .cpu_features = CPU_FTRS_POWER3, 112 .cpu_features = CPU_FTRS_POWER3,
111 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 113 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
114 .mmu_features = MMU_FTR_HPTE_TABLE,
112 .icache_bsize = 128, 115 .icache_bsize = 128,
113 .dcache_bsize = 128, 116 .dcache_bsize = 128,
114 .num_pmcs = 8, 117 .num_pmcs = 8,
@@ -124,6 +127,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
124 .cpu_name = "RS64-II (northstar)", 127 .cpu_name = "RS64-II (northstar)",
125 .cpu_features = CPU_FTRS_RS64, 128 .cpu_features = CPU_FTRS_RS64,
126 .cpu_user_features = COMMON_USER_PPC64, 129 .cpu_user_features = COMMON_USER_PPC64,
130 .mmu_features = MMU_FTR_HPTE_TABLE,
127 .icache_bsize = 128, 131 .icache_bsize = 128,
128 .dcache_bsize = 128, 132 .dcache_bsize = 128,
129 .num_pmcs = 8, 133 .num_pmcs = 8,
@@ -139,6 +143,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
139 .cpu_name = "RS64-III (pulsar)", 143 .cpu_name = "RS64-III (pulsar)",
140 .cpu_features = CPU_FTRS_RS64, 144 .cpu_features = CPU_FTRS_RS64,
141 .cpu_user_features = COMMON_USER_PPC64, 145 .cpu_user_features = COMMON_USER_PPC64,
146 .mmu_features = MMU_FTR_HPTE_TABLE,
142 .icache_bsize = 128, 147 .icache_bsize = 128,
143 .dcache_bsize = 128, 148 .dcache_bsize = 128,
144 .num_pmcs = 8, 149 .num_pmcs = 8,
@@ -154,6 +159,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
154 .cpu_name = "RS64-III (icestar)", 159 .cpu_name = "RS64-III (icestar)",
155 .cpu_features = CPU_FTRS_RS64, 160 .cpu_features = CPU_FTRS_RS64,
156 .cpu_user_features = COMMON_USER_PPC64, 161 .cpu_user_features = COMMON_USER_PPC64,
162 .mmu_features = MMU_FTR_HPTE_TABLE,
157 .icache_bsize = 128, 163 .icache_bsize = 128,
158 .dcache_bsize = 128, 164 .dcache_bsize = 128,
159 .num_pmcs = 8, 165 .num_pmcs = 8,
@@ -169,6 +175,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
169 .cpu_name = "RS64-IV (sstar)", 175 .cpu_name = "RS64-IV (sstar)",
170 .cpu_features = CPU_FTRS_RS64, 176 .cpu_features = CPU_FTRS_RS64,
171 .cpu_user_features = COMMON_USER_PPC64, 177 .cpu_user_features = COMMON_USER_PPC64,
178 .mmu_features = MMU_FTR_HPTE_TABLE,
172 .icache_bsize = 128, 179 .icache_bsize = 128,
173 .dcache_bsize = 128, 180 .dcache_bsize = 128,
174 .num_pmcs = 8, 181 .num_pmcs = 8,
@@ -184,6 +191,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
184 .cpu_name = "POWER4 (gp)", 191 .cpu_name = "POWER4 (gp)",
185 .cpu_features = CPU_FTRS_POWER4, 192 .cpu_features = CPU_FTRS_POWER4,
186 .cpu_user_features = COMMON_USER_POWER4, 193 .cpu_user_features = COMMON_USER_POWER4,
194 .mmu_features = MMU_FTR_HPTE_TABLE,
187 .icache_bsize = 128, 195 .icache_bsize = 128,
188 .dcache_bsize = 128, 196 .dcache_bsize = 128,
189 .num_pmcs = 8, 197 .num_pmcs = 8,
@@ -199,6 +207,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
199 .cpu_name = "POWER4+ (gq)", 207 .cpu_name = "POWER4+ (gq)",
200 .cpu_features = CPU_FTRS_POWER4, 208 .cpu_features = CPU_FTRS_POWER4,
201 .cpu_user_features = COMMON_USER_POWER4, 209 .cpu_user_features = COMMON_USER_POWER4,
210 .mmu_features = MMU_FTR_HPTE_TABLE,
202 .icache_bsize = 128, 211 .icache_bsize = 128,
203 .dcache_bsize = 128, 212 .dcache_bsize = 128,
204 .num_pmcs = 8, 213 .num_pmcs = 8,
@@ -215,6 +224,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
215 .cpu_features = CPU_FTRS_PPC970, 224 .cpu_features = CPU_FTRS_PPC970,
216 .cpu_user_features = COMMON_USER_POWER4 | 225 .cpu_user_features = COMMON_USER_POWER4 |
217 PPC_FEATURE_HAS_ALTIVEC_COMP, 226 PPC_FEATURE_HAS_ALTIVEC_COMP,
227 .mmu_features = MMU_FTR_HPTE_TABLE,
218 .icache_bsize = 128, 228 .icache_bsize = 128,
219 .dcache_bsize = 128, 229 .dcache_bsize = 128,
220 .num_pmcs = 8, 230 .num_pmcs = 8,
@@ -233,6 +243,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
233 .cpu_features = CPU_FTRS_PPC970, 243 .cpu_features = CPU_FTRS_PPC970,
234 .cpu_user_features = COMMON_USER_POWER4 | 244 .cpu_user_features = COMMON_USER_POWER4 |
235 PPC_FEATURE_HAS_ALTIVEC_COMP, 245 PPC_FEATURE_HAS_ALTIVEC_COMP,
246 .mmu_features = MMU_FTR_HPTE_TABLE,
236 .icache_bsize = 128, 247 .icache_bsize = 128,
237 .dcache_bsize = 128, 248 .dcache_bsize = 128,
238 .num_pmcs = 8, 249 .num_pmcs = 8,
@@ -251,6 +262,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
251 .cpu_features = CPU_FTRS_PPC970, 262 .cpu_features = CPU_FTRS_PPC970,
252 .cpu_user_features = COMMON_USER_POWER4 | 263 .cpu_user_features = COMMON_USER_POWER4 |
253 PPC_FEATURE_HAS_ALTIVEC_COMP, 264 PPC_FEATURE_HAS_ALTIVEC_COMP,
265 .mmu_features = MMU_FTR_HPTE_TABLE,
254 .icache_bsize = 128, 266 .icache_bsize = 128,
255 .dcache_bsize = 128, 267 .dcache_bsize = 128,
256 .num_pmcs = 8, 268 .num_pmcs = 8,
@@ -269,6 +281,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
269 .cpu_features = CPU_FTRS_PPC970, 281 .cpu_features = CPU_FTRS_PPC970,
270 .cpu_user_features = COMMON_USER_POWER4 | 282 .cpu_user_features = COMMON_USER_POWER4 |
271 PPC_FEATURE_HAS_ALTIVEC_COMP, 283 PPC_FEATURE_HAS_ALTIVEC_COMP,
284 .mmu_features = MMU_FTR_HPTE_TABLE,
272 .icache_bsize = 128, 285 .icache_bsize = 128,
273 .dcache_bsize = 128, 286 .dcache_bsize = 128,
274 .num_pmcs = 8, 287 .num_pmcs = 8,
@@ -287,6 +300,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
287 .cpu_features = CPU_FTRS_PPC970, 300 .cpu_features = CPU_FTRS_PPC970,
288 .cpu_user_features = COMMON_USER_POWER4 | 301 .cpu_user_features = COMMON_USER_POWER4 |
289 PPC_FEATURE_HAS_ALTIVEC_COMP, 302 PPC_FEATURE_HAS_ALTIVEC_COMP,
303 .mmu_features = MMU_FTR_HPTE_TABLE,
290 .icache_bsize = 128, 304 .icache_bsize = 128,
291 .dcache_bsize = 128, 305 .dcache_bsize = 128,
292 .num_pmcs = 8, 306 .num_pmcs = 8,
@@ -303,6 +317,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
303 .cpu_name = "POWER5 (gr)", 317 .cpu_name = "POWER5 (gr)",
304 .cpu_features = CPU_FTRS_POWER5, 318 .cpu_features = CPU_FTRS_POWER5,
305 .cpu_user_features = COMMON_USER_POWER5, 319 .cpu_user_features = COMMON_USER_POWER5,
320 .mmu_features = MMU_FTR_HPTE_TABLE,
306 .icache_bsize = 128, 321 .icache_bsize = 128,
307 .dcache_bsize = 128, 322 .dcache_bsize = 128,
308 .num_pmcs = 6, 323 .num_pmcs = 6,
@@ -323,6 +338,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
323 .cpu_name = "POWER5+ (gs)", 338 .cpu_name = "POWER5+ (gs)",
324 .cpu_features = CPU_FTRS_POWER5, 339 .cpu_features = CPU_FTRS_POWER5,
325 .cpu_user_features = COMMON_USER_POWER5_PLUS, 340 .cpu_user_features = COMMON_USER_POWER5_PLUS,
341 .mmu_features = MMU_FTR_HPTE_TABLE,
326 .icache_bsize = 128, 342 .icache_bsize = 128,
327 .dcache_bsize = 128, 343 .dcache_bsize = 128,
328 .num_pmcs = 6, 344 .num_pmcs = 6,
@@ -339,6 +355,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
339 .cpu_name = "POWER5+ (gs)", 355 .cpu_name = "POWER5+ (gs)",
340 .cpu_features = CPU_FTRS_POWER5, 356 .cpu_features = CPU_FTRS_POWER5,
341 .cpu_user_features = COMMON_USER_POWER5_PLUS, 357 .cpu_user_features = COMMON_USER_POWER5_PLUS,
358 .mmu_features = MMU_FTR_HPTE_TABLE,
342 .icache_bsize = 128, 359 .icache_bsize = 128,
343 .dcache_bsize = 128, 360 .dcache_bsize = 128,
344 .num_pmcs = 6, 361 .num_pmcs = 6,
@@ -356,6 +373,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
356 .cpu_name = "POWER5+", 373 .cpu_name = "POWER5+",
357 .cpu_features = CPU_FTRS_POWER5, 374 .cpu_features = CPU_FTRS_POWER5,
358 .cpu_user_features = COMMON_USER_POWER5_PLUS, 375 .cpu_user_features = COMMON_USER_POWER5_PLUS,
376 .mmu_features = MMU_FTR_HPTE_TABLE,
359 .icache_bsize = 128, 377 .icache_bsize = 128,
360 .dcache_bsize = 128, 378 .dcache_bsize = 128,
361 .machine_check = machine_check_generic, 379 .machine_check = machine_check_generic,
@@ -369,6 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
369 .cpu_features = CPU_FTRS_POWER6, 387 .cpu_features = CPU_FTRS_POWER6,
370 .cpu_user_features = COMMON_USER_POWER6 | 388 .cpu_user_features = COMMON_USER_POWER6 |
371 PPC_FEATURE_POWER6_EXT, 389 PPC_FEATURE_POWER6_EXT,
390 .mmu_features = MMU_FTR_HPTE_TABLE,
372 .icache_bsize = 128, 391 .icache_bsize = 128,
373 .dcache_bsize = 128, 392 .dcache_bsize = 128,
374 .num_pmcs = 6, 393 .num_pmcs = 6,
@@ -388,6 +407,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
388 .cpu_name = "POWER6 (architected)", 407 .cpu_name = "POWER6 (architected)",
389 .cpu_features = CPU_FTRS_POWER6, 408 .cpu_features = CPU_FTRS_POWER6,
390 .cpu_user_features = COMMON_USER_POWER6, 409 .cpu_user_features = COMMON_USER_POWER6,
410 .mmu_features = MMU_FTR_HPTE_TABLE,
391 .icache_bsize = 128, 411 .icache_bsize = 128,
392 .dcache_bsize = 128, 412 .dcache_bsize = 128,
393 .machine_check = machine_check_generic, 413 .machine_check = machine_check_generic,
@@ -400,6 +420,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
400 .cpu_name = "POWER7 (architected)", 420 .cpu_name = "POWER7 (architected)",
401 .cpu_features = CPU_FTRS_POWER7, 421 .cpu_features = CPU_FTRS_POWER7,
402 .cpu_user_features = COMMON_USER_POWER7, 422 .cpu_user_features = COMMON_USER_POWER7,
423 .mmu_features = MMU_FTR_HPTE_TABLE,
403 .icache_bsize = 128, 424 .icache_bsize = 128,
404 .dcache_bsize = 128, 425 .dcache_bsize = 128,
405 .machine_check = machine_check_generic, 426 .machine_check = machine_check_generic,
@@ -412,6 +433,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
412 .cpu_name = "POWER7 (raw)", 433 .cpu_name = "POWER7 (raw)",
413 .cpu_features = CPU_FTRS_POWER7, 434 .cpu_features = CPU_FTRS_POWER7,
414 .cpu_user_features = COMMON_USER_POWER7, 435 .cpu_user_features = COMMON_USER_POWER7,
436 .mmu_features = MMU_FTR_HPTE_TABLE,
415 .icache_bsize = 128, 437 .icache_bsize = 128,
416 .dcache_bsize = 128, 438 .dcache_bsize = 128,
417 .num_pmcs = 6, 439 .num_pmcs = 6,
@@ -434,6 +456,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
434 .cpu_user_features = COMMON_USER_PPC64 | 456 .cpu_user_features = COMMON_USER_PPC64 |
435 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 457 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
436 PPC_FEATURE_SMT, 458 PPC_FEATURE_SMT,
459 .mmu_features = MMU_FTR_HPTE_TABLE,
437 .icache_bsize = 128, 460 .icache_bsize = 128,
438 .dcache_bsize = 128, 461 .dcache_bsize = 128,
439 .num_pmcs = 4, 462 .num_pmcs = 4,
@@ -449,6 +472,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
449 .cpu_name = "PA6T", 472 .cpu_name = "PA6T",
450 .cpu_features = CPU_FTRS_PA6T, 473 .cpu_features = CPU_FTRS_PA6T,
451 .cpu_user_features = COMMON_USER_PA6T, 474 .cpu_user_features = COMMON_USER_PA6T,
475 .mmu_features = MMU_FTR_HPTE_TABLE,
452 .icache_bsize = 64, 476 .icache_bsize = 64,
453 .dcache_bsize = 64, 477 .dcache_bsize = 64,
454 .num_pmcs = 6, 478 .num_pmcs = 6,
@@ -466,6 +490,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
466 .cpu_name = "POWER4 (compatible)", 490 .cpu_name = "POWER4 (compatible)",
467 .cpu_features = CPU_FTRS_COMPATIBLE, 491 .cpu_features = CPU_FTRS_COMPATIBLE,
468 .cpu_user_features = COMMON_USER_PPC64, 492 .cpu_user_features = COMMON_USER_PPC64,
493 .mmu_features = MMU_FTR_HPTE_TABLE,
469 .icache_bsize = 128, 494 .icache_bsize = 128,
470 .dcache_bsize = 128, 495 .dcache_bsize = 128,
471 .num_pmcs = 6, 496 .num_pmcs = 6,
@@ -483,6 +508,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
483 .cpu_features = CPU_FTRS_PPC601, 508 .cpu_features = CPU_FTRS_PPC601,
484 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 509 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
485 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 510 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
511 .mmu_features = MMU_FTR_HPTE_TABLE,
486 .icache_bsize = 32, 512 .icache_bsize = 32,
487 .dcache_bsize = 32, 513 .dcache_bsize = 32,
488 .machine_check = machine_check_generic, 514 .machine_check = machine_check_generic,
@@ -494,6 +520,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
494 .cpu_name = "603", 520 .cpu_name = "603",
495 .cpu_features = CPU_FTRS_603, 521 .cpu_features = CPU_FTRS_603,
496 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 522 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
523 .mmu_features = 0,
497 .icache_bsize = 32, 524 .icache_bsize = 32,
498 .dcache_bsize = 32, 525 .dcache_bsize = 32,
499 .cpu_setup = __setup_cpu_603, 526 .cpu_setup = __setup_cpu_603,
@@ -506,6 +533,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
506 .cpu_name = "603e", 533 .cpu_name = "603e",
507 .cpu_features = CPU_FTRS_603, 534 .cpu_features = CPU_FTRS_603,
508 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 535 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
536 .mmu_features = 0,
509 .icache_bsize = 32, 537 .icache_bsize = 32,
510 .dcache_bsize = 32, 538 .dcache_bsize = 32,
511 .cpu_setup = __setup_cpu_603, 539 .cpu_setup = __setup_cpu_603,
@@ -518,6 +546,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
518 .cpu_name = "603ev", 546 .cpu_name = "603ev",
519 .cpu_features = CPU_FTRS_603, 547 .cpu_features = CPU_FTRS_603,
520 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 548 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
549 .mmu_features = 0,
521 .icache_bsize = 32, 550 .icache_bsize = 32,
522 .dcache_bsize = 32, 551 .dcache_bsize = 32,
523 .cpu_setup = __setup_cpu_603, 552 .cpu_setup = __setup_cpu_603,
@@ -530,6 +559,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
530 .cpu_name = "604", 559 .cpu_name = "604",
531 .cpu_features = CPU_FTRS_604, 560 .cpu_features = CPU_FTRS_604,
532 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 561 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
562 .mmu_features = MMU_FTR_HPTE_TABLE,
533 .icache_bsize = 32, 563 .icache_bsize = 32,
534 .dcache_bsize = 32, 564 .dcache_bsize = 32,
535 .num_pmcs = 2, 565 .num_pmcs = 2,
@@ -543,6 +573,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
543 .cpu_name = "604e", 573 .cpu_name = "604e",
544 .cpu_features = CPU_FTRS_604, 574 .cpu_features = CPU_FTRS_604,
545 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 575 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
576 .mmu_features = MMU_FTR_HPTE_TABLE,
546 .icache_bsize = 32, 577 .icache_bsize = 32,
547 .dcache_bsize = 32, 578 .dcache_bsize = 32,
548 .num_pmcs = 4, 579 .num_pmcs = 4,
@@ -556,6 +587,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
556 .cpu_name = "604r", 587 .cpu_name = "604r",
557 .cpu_features = CPU_FTRS_604, 588 .cpu_features = CPU_FTRS_604,
558 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 589 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
590 .mmu_features = MMU_FTR_HPTE_TABLE,
559 .icache_bsize = 32, 591 .icache_bsize = 32,
560 .dcache_bsize = 32, 592 .dcache_bsize = 32,
561 .num_pmcs = 4, 593 .num_pmcs = 4,
@@ -569,6 +601,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
569 .cpu_name = "604ev", 601 .cpu_name = "604ev",
570 .cpu_features = CPU_FTRS_604, 602 .cpu_features = CPU_FTRS_604,
571 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 603 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
604 .mmu_features = MMU_FTR_HPTE_TABLE,
572 .icache_bsize = 32, 605 .icache_bsize = 32,
573 .dcache_bsize = 32, 606 .dcache_bsize = 32,
574 .num_pmcs = 4, 607 .num_pmcs = 4,
@@ -582,6 +615,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
582 .cpu_name = "740/750", 615 .cpu_name = "740/750",
583 .cpu_features = CPU_FTRS_740_NOTAU, 616 .cpu_features = CPU_FTRS_740_NOTAU,
584 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 617 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
618 .mmu_features = MMU_FTR_HPTE_TABLE,
585 .icache_bsize = 32, 619 .icache_bsize = 32,
586 .dcache_bsize = 32, 620 .dcache_bsize = 32,
587 .num_pmcs = 4, 621 .num_pmcs = 4,
@@ -595,6 +629,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
595 .cpu_name = "750CX", 629 .cpu_name = "750CX",
596 .cpu_features = CPU_FTRS_750, 630 .cpu_features = CPU_FTRS_750,
597 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 631 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
632 .mmu_features = MMU_FTR_HPTE_TABLE,
598 .icache_bsize = 32, 633 .icache_bsize = 32,
599 .dcache_bsize = 32, 634 .dcache_bsize = 32,
600 .num_pmcs = 4, 635 .num_pmcs = 4,
@@ -608,6 +643,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
608 .cpu_name = "750CX", 643 .cpu_name = "750CX",
609 .cpu_features = CPU_FTRS_750, 644 .cpu_features = CPU_FTRS_750,
610 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 645 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
646 .mmu_features = MMU_FTR_HPTE_TABLE,
611 .icache_bsize = 32, 647 .icache_bsize = 32,
612 .dcache_bsize = 32, 648 .dcache_bsize = 32,
613 .num_pmcs = 4, 649 .num_pmcs = 4,
@@ -622,6 +658,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
622 .cpu_name = "750CXe", 658 .cpu_name = "750CXe",
623 .cpu_features = CPU_FTRS_750, 659 .cpu_features = CPU_FTRS_750,
624 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 660 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
661 .mmu_features = MMU_FTR_HPTE_TABLE,
625 .icache_bsize = 32, 662 .icache_bsize = 32,
626 .dcache_bsize = 32, 663 .dcache_bsize = 32,
627 .num_pmcs = 4, 664 .num_pmcs = 4,
@@ -636,6 +673,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
636 .cpu_name = "750CXe", 673 .cpu_name = "750CXe",
637 .cpu_features = CPU_FTRS_750, 674 .cpu_features = CPU_FTRS_750,
638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 675 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
676 .mmu_features = MMU_FTR_HPTE_TABLE,
639 .icache_bsize = 32, 677 .icache_bsize = 32,
640 .dcache_bsize = 32, 678 .dcache_bsize = 32,
641 .num_pmcs = 4, 679 .num_pmcs = 4,
@@ -650,6 +688,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
650 .cpu_name = "750CL", 688 .cpu_name = "750CL",
651 .cpu_features = CPU_FTRS_750CL, 689 .cpu_features = CPU_FTRS_750CL,
652 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
691 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
653 .icache_bsize = 32, 692 .icache_bsize = 32,
654 .dcache_bsize = 32, 693 .dcache_bsize = 32,
655 .num_pmcs = 4, 694 .num_pmcs = 4,
@@ -664,6 +703,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
664 .cpu_name = "745/755", 703 .cpu_name = "745/755",
665 .cpu_features = CPU_FTRS_750, 704 .cpu_features = CPU_FTRS_750,
666 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 705 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
706 .mmu_features = MMU_FTR_HPTE_TABLE,
667 .icache_bsize = 32, 707 .icache_bsize = 32,
668 .dcache_bsize = 32, 708 .dcache_bsize = 32,
669 .num_pmcs = 4, 709 .num_pmcs = 4,
@@ -678,6 +718,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
678 .cpu_name = "750FX", 718 .cpu_name = "750FX",
679 .cpu_features = CPU_FTRS_750FX1, 719 .cpu_features = CPU_FTRS_750FX1,
680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
721 .mmu_features = MMU_FTR_HPTE_TABLE,
681 .icache_bsize = 32, 722 .icache_bsize = 32,
682 .dcache_bsize = 32, 723 .dcache_bsize = 32,
683 .num_pmcs = 4, 724 .num_pmcs = 4,
@@ -692,6 +733,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
692 .cpu_name = "750FX", 733 .cpu_name = "750FX",
693 .cpu_features = CPU_FTRS_750FX2, 734 .cpu_features = CPU_FTRS_750FX2,
694 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 735 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
736 .mmu_features = MMU_FTR_HPTE_TABLE,
695 .icache_bsize = 32, 737 .icache_bsize = 32,
696 .dcache_bsize = 32, 738 .dcache_bsize = 32,
697 .num_pmcs = 4, 739 .num_pmcs = 4,
@@ -706,6 +748,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
706 .cpu_name = "750FX", 748 .cpu_name = "750FX",
707 .cpu_features = CPU_FTRS_750FX, 749 .cpu_features = CPU_FTRS_750FX,
708 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 750 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
751 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
709 .icache_bsize = 32, 752 .icache_bsize = 32,
710 .dcache_bsize = 32, 753 .dcache_bsize = 32,
711 .num_pmcs = 4, 754 .num_pmcs = 4,
@@ -720,6 +763,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
720 .cpu_name = "750GX", 763 .cpu_name = "750GX",
721 .cpu_features = CPU_FTRS_750GX, 764 .cpu_features = CPU_FTRS_750GX,
722 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 765 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
766 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
723 .icache_bsize = 32, 767 .icache_bsize = 32,
724 .dcache_bsize = 32, 768 .dcache_bsize = 32,
725 .num_pmcs = 4, 769 .num_pmcs = 4,
@@ -734,6 +778,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
734 .cpu_name = "740/750", 778 .cpu_name = "740/750",
735 .cpu_features = CPU_FTRS_740, 779 .cpu_features = CPU_FTRS_740,
736 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 780 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
781 .mmu_features = MMU_FTR_HPTE_TABLE,
737 .icache_bsize = 32, 782 .icache_bsize = 32,
738 .dcache_bsize = 32, 783 .dcache_bsize = 32,
739 .num_pmcs = 4, 784 .num_pmcs = 4,
@@ -749,6 +794,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
749 .cpu_features = CPU_FTRS_7400_NOTAU, 794 .cpu_features = CPU_FTRS_7400_NOTAU,
750 .cpu_user_features = COMMON_USER | 795 .cpu_user_features = COMMON_USER |
751 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 796 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
797 .mmu_features = MMU_FTR_HPTE_TABLE,
752 .icache_bsize = 32, 798 .icache_bsize = 32,
753 .dcache_bsize = 32, 799 .dcache_bsize = 32,
754 .num_pmcs = 4, 800 .num_pmcs = 4,
@@ -764,6 +810,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
764 .cpu_features = CPU_FTRS_7400, 810 .cpu_features = CPU_FTRS_7400,
765 .cpu_user_features = COMMON_USER | 811 .cpu_user_features = COMMON_USER |
766 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 812 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
813 .mmu_features = MMU_FTR_HPTE_TABLE,
767 .icache_bsize = 32, 814 .icache_bsize = 32,
768 .dcache_bsize = 32, 815 .dcache_bsize = 32,
769 .num_pmcs = 4, 816 .num_pmcs = 4,
@@ -779,6 +826,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
779 .cpu_features = CPU_FTRS_7400, 826 .cpu_features = CPU_FTRS_7400,
780 .cpu_user_features = COMMON_USER | 827 .cpu_user_features = COMMON_USER |
781 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 828 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
829 .mmu_features = MMU_FTR_HPTE_TABLE,
782 .icache_bsize = 32, 830 .icache_bsize = 32,
783 .dcache_bsize = 32, 831 .dcache_bsize = 32,
784 .num_pmcs = 4, 832 .num_pmcs = 4,
@@ -794,6 +842,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
794 .cpu_features = CPU_FTRS_7450_20, 842 .cpu_features = CPU_FTRS_7450_20,
795 .cpu_user_features = COMMON_USER | 843 .cpu_user_features = COMMON_USER |
796 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 844 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
845 .mmu_features = MMU_FTR_HPTE_TABLE,
797 .icache_bsize = 32, 846 .icache_bsize = 32,
798 .dcache_bsize = 32, 847 .dcache_bsize = 32,
799 .num_pmcs = 6, 848 .num_pmcs = 6,
@@ -811,6 +860,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
811 .cpu_features = CPU_FTRS_7450_21, 860 .cpu_features = CPU_FTRS_7450_21,
812 .cpu_user_features = COMMON_USER | 861 .cpu_user_features = COMMON_USER |
813 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 862 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
863 .mmu_features = MMU_FTR_HPTE_TABLE,
814 .icache_bsize = 32, 864 .icache_bsize = 32,
815 .dcache_bsize = 32, 865 .dcache_bsize = 32,
816 .num_pmcs = 6, 866 .num_pmcs = 6,
@@ -828,6 +878,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
828 .cpu_features = CPU_FTRS_7450_23, 878 .cpu_features = CPU_FTRS_7450_23,
829 .cpu_user_features = COMMON_USER | 879 .cpu_user_features = COMMON_USER |
830 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 880 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
881 .mmu_features = MMU_FTR_HPTE_TABLE,
831 .icache_bsize = 32, 882 .icache_bsize = 32,
832 .dcache_bsize = 32, 883 .dcache_bsize = 32,
833 .num_pmcs = 6, 884 .num_pmcs = 6,
@@ -845,6 +896,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
845 .cpu_features = CPU_FTRS_7455_1, 896 .cpu_features = CPU_FTRS_7455_1,
846 .cpu_user_features = COMMON_USER | 897 .cpu_user_features = COMMON_USER |
847 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 898 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
899 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
848 .icache_bsize = 32, 900 .icache_bsize = 32,
849 .dcache_bsize = 32, 901 .dcache_bsize = 32,
850 .num_pmcs = 6, 902 .num_pmcs = 6,
@@ -862,6 +914,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
862 .cpu_features = CPU_FTRS_7455_20, 914 .cpu_features = CPU_FTRS_7455_20,
863 .cpu_user_features = COMMON_USER | 915 .cpu_user_features = COMMON_USER |
864 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
917 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
865 .icache_bsize = 32, 918 .icache_bsize = 32,
866 .dcache_bsize = 32, 919 .dcache_bsize = 32,
867 .num_pmcs = 6, 920 .num_pmcs = 6,
@@ -879,6 +932,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
879 .cpu_features = CPU_FTRS_7455, 932 .cpu_features = CPU_FTRS_7455,
880 .cpu_user_features = COMMON_USER | 933 .cpu_user_features = COMMON_USER |
881 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
935 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
882 .icache_bsize = 32, 936 .icache_bsize = 32,
883 .dcache_bsize = 32, 937 .dcache_bsize = 32,
884 .num_pmcs = 6, 938 .num_pmcs = 6,
@@ -896,6 +950,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
896 .cpu_features = CPU_FTRS_7447_10, 950 .cpu_features = CPU_FTRS_7447_10,
897 .cpu_user_features = COMMON_USER | 951 .cpu_user_features = COMMON_USER |
898 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 952 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
953 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
899 .icache_bsize = 32, 954 .icache_bsize = 32,
900 .dcache_bsize = 32, 955 .dcache_bsize = 32,
901 .num_pmcs = 6, 956 .num_pmcs = 6,
@@ -913,6 +968,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
913 .cpu_features = CPU_FTRS_7447_10, 968 .cpu_features = CPU_FTRS_7447_10,
914 .cpu_user_features = COMMON_USER | 969 .cpu_user_features = COMMON_USER |
915 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 970 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
971 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
916 .icache_bsize = 32, 972 .icache_bsize = 32,
917 .dcache_bsize = 32, 973 .dcache_bsize = 32,
918 .num_pmcs = 6, 974 .num_pmcs = 6,
@@ -929,6 +985,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
929 .cpu_name = "7447/7457", 985 .cpu_name = "7447/7457",
930 .cpu_features = CPU_FTRS_7447, 986 .cpu_features = CPU_FTRS_7447,
931 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 987 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
988 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
932 .icache_bsize = 32, 989 .icache_bsize = 32,
933 .dcache_bsize = 32, 990 .dcache_bsize = 32,
934 .num_pmcs = 6, 991 .num_pmcs = 6,
@@ -946,6 +1003,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
946 .cpu_features = CPU_FTRS_7447A, 1003 .cpu_features = CPU_FTRS_7447A,
947 .cpu_user_features = COMMON_USER | 1004 .cpu_user_features = COMMON_USER |
948 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1005 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1006 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
949 .icache_bsize = 32, 1007 .icache_bsize = 32,
950 .dcache_bsize = 32, 1008 .dcache_bsize = 32,
951 .num_pmcs = 6, 1009 .num_pmcs = 6,
@@ -963,6 +1021,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
963 .cpu_features = CPU_FTRS_7448, 1021 .cpu_features = CPU_FTRS_7448,
964 .cpu_user_features = COMMON_USER | 1022 .cpu_user_features = COMMON_USER |
965 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1023 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1024 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
966 .icache_bsize = 32, 1025 .icache_bsize = 32,
967 .dcache_bsize = 32, 1026 .dcache_bsize = 32,
968 .num_pmcs = 6, 1027 .num_pmcs = 6,
@@ -979,6 +1038,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
979 .cpu_name = "82xx", 1038 .cpu_name = "82xx",
980 .cpu_features = CPU_FTRS_82XX, 1039 .cpu_features = CPU_FTRS_82XX,
981 .cpu_user_features = COMMON_USER, 1040 .cpu_user_features = COMMON_USER,
1041 .mmu_features = 0,
982 .icache_bsize = 32, 1042 .icache_bsize = 32,
983 .dcache_bsize = 32, 1043 .dcache_bsize = 32,
984 .cpu_setup = __setup_cpu_603, 1044 .cpu_setup = __setup_cpu_603,
@@ -991,6 +1051,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
991 .cpu_name = "G2_LE", 1051 .cpu_name = "G2_LE",
992 .cpu_features = CPU_FTRS_G2_LE, 1052 .cpu_features = CPU_FTRS_G2_LE,
993 .cpu_user_features = COMMON_USER, 1053 .cpu_user_features = COMMON_USER,
1054 .mmu_features = MMU_FTR_USE_HIGH_BATS,
994 .icache_bsize = 32, 1055 .icache_bsize = 32,
995 .dcache_bsize = 32, 1056 .dcache_bsize = 32,
996 .cpu_setup = __setup_cpu_603, 1057 .cpu_setup = __setup_cpu_603,
@@ -1003,6 +1064,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1003 .cpu_name = "e300c1", 1064 .cpu_name = "e300c1",
1004 .cpu_features = CPU_FTRS_E300, 1065 .cpu_features = CPU_FTRS_E300,
1005 .cpu_user_features = COMMON_USER, 1066 .cpu_user_features = COMMON_USER,
1067 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1006 .icache_bsize = 32, 1068 .icache_bsize = 32,
1007 .dcache_bsize = 32, 1069 .dcache_bsize = 32,
1008 .cpu_setup = __setup_cpu_603, 1070 .cpu_setup = __setup_cpu_603,
@@ -1015,6 +1077,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1015 .cpu_name = "e300c2", 1077 .cpu_name = "e300c2",
1016 .cpu_features = CPU_FTRS_E300C2, 1078 .cpu_features = CPU_FTRS_E300C2,
1017 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1079 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1080 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1018 .icache_bsize = 32, 1081 .icache_bsize = 32,
1019 .dcache_bsize = 32, 1082 .dcache_bsize = 32,
1020 .cpu_setup = __setup_cpu_603, 1083 .cpu_setup = __setup_cpu_603,
@@ -1027,6 +1090,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1027 .cpu_name = "e300c3", 1090 .cpu_name = "e300c3",
1028 .cpu_features = CPU_FTRS_E300, 1091 .cpu_features = CPU_FTRS_E300,
1029 .cpu_user_features = COMMON_USER, 1092 .cpu_user_features = COMMON_USER,
1093 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1030 .icache_bsize = 32, 1094 .icache_bsize = 32,
1031 .dcache_bsize = 32, 1095 .dcache_bsize = 32,
1032 .cpu_setup = __setup_cpu_603, 1096 .cpu_setup = __setup_cpu_603,
@@ -1041,6 +1105,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1041 .cpu_name = "e300c4", 1105 .cpu_name = "e300c4",
1042 .cpu_features = CPU_FTRS_E300, 1106 .cpu_features = CPU_FTRS_E300,
1043 .cpu_user_features = COMMON_USER, 1107 .cpu_user_features = COMMON_USER,
1108 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1044 .icache_bsize = 32, 1109 .icache_bsize = 32,
1045 .dcache_bsize = 32, 1110 .dcache_bsize = 32,
1046 .cpu_setup = __setup_cpu_603, 1111 .cpu_setup = __setup_cpu_603,
@@ -1056,6 +1121,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1056 .cpu_name = "(generic PPC)", 1121 .cpu_name = "(generic PPC)",
1057 .cpu_features = CPU_FTRS_CLASSIC32, 1122 .cpu_features = CPU_FTRS_CLASSIC32,
1058 .cpu_user_features = COMMON_USER, 1123 .cpu_user_features = COMMON_USER,
1124 .mmu_features = MMU_FTR_HPTE_TABLE,
1059 .icache_bsize = 32, 1125 .icache_bsize = 32,
1060 .dcache_bsize = 32, 1126 .dcache_bsize = 32,
1061 .machine_check = machine_check_generic, 1127 .machine_check = machine_check_generic,
@@ -1071,6 +1137,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1071 * if the 8xx code is there.... */ 1137 * if the 8xx code is there.... */
1072 .cpu_features = CPU_FTRS_8XX, 1138 .cpu_features = CPU_FTRS_8XX,
1073 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1139 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1140 .mmu_features = MMU_FTR_TYPE_8xx,
1074 .icache_bsize = 16, 1141 .icache_bsize = 16,
1075 .dcache_bsize = 16, 1142 .dcache_bsize = 16,
1076 .platform = "ppc823", 1143 .platform = "ppc823",
@@ -1083,6 +1150,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1083 .cpu_name = "403GC", 1150 .cpu_name = "403GC",
1084 .cpu_features = CPU_FTRS_40X, 1151 .cpu_features = CPU_FTRS_40X,
1085 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1152 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1153 .mmu_features = MMU_FTR_TYPE_40x,
1086 .icache_bsize = 16, 1154 .icache_bsize = 16,
1087 .dcache_bsize = 16, 1155 .dcache_bsize = 16,
1088 .machine_check = machine_check_4xx, 1156 .machine_check = machine_check_4xx,
@@ -1095,6 +1163,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1095 .cpu_features = CPU_FTRS_40X, 1163 .cpu_features = CPU_FTRS_40X,
1096 .cpu_user_features = PPC_FEATURE_32 | 1164 .cpu_user_features = PPC_FEATURE_32 |
1097 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1165 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1166 .mmu_features = MMU_FTR_TYPE_40x,
1098 .icache_bsize = 16, 1167 .icache_bsize = 16,
1099 .dcache_bsize = 16, 1168 .dcache_bsize = 16,
1100 .machine_check = machine_check_4xx, 1169 .machine_check = machine_check_4xx,
@@ -1106,6 +1175,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1106 .cpu_name = "403G ??", 1175 .cpu_name = "403G ??",
1107 .cpu_features = CPU_FTRS_40X, 1176 .cpu_features = CPU_FTRS_40X,
1108 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1177 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1178 .mmu_features = MMU_FTR_TYPE_40x,
1109 .icache_bsize = 16, 1179 .icache_bsize = 16,
1110 .dcache_bsize = 16, 1180 .dcache_bsize = 16,
1111 .machine_check = machine_check_4xx, 1181 .machine_check = machine_check_4xx,
@@ -1118,6 +1188,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1118 .cpu_features = CPU_FTRS_40X, 1188 .cpu_features = CPU_FTRS_40X,
1119 .cpu_user_features = PPC_FEATURE_32 | 1189 .cpu_user_features = PPC_FEATURE_32 |
1120 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1190 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1191 .mmu_features = MMU_FTR_TYPE_40x,
1121 .icache_bsize = 32, 1192 .icache_bsize = 32,
1122 .dcache_bsize = 32, 1193 .dcache_bsize = 32,
1123 .machine_check = machine_check_4xx, 1194 .machine_check = machine_check_4xx,
@@ -1130,6 +1201,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1130 .cpu_features = CPU_FTRS_40X, 1201 .cpu_features = CPU_FTRS_40X,
1131 .cpu_user_features = PPC_FEATURE_32 | 1202 .cpu_user_features = PPC_FEATURE_32 |
1132 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1203 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1204 .mmu_features = MMU_FTR_TYPE_40x,
1133 .icache_bsize = 32, 1205 .icache_bsize = 32,
1134 .dcache_bsize = 32, 1206 .dcache_bsize = 32,
1135 .machine_check = machine_check_4xx, 1207 .machine_check = machine_check_4xx,
@@ -1142,6 +1214,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1142 .cpu_features = CPU_FTRS_40X, 1214 .cpu_features = CPU_FTRS_40X,
1143 .cpu_user_features = PPC_FEATURE_32 | 1215 .cpu_user_features = PPC_FEATURE_32 |
1144 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1216 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1217 .mmu_features = MMU_FTR_TYPE_40x,
1145 .icache_bsize = 32, 1218 .icache_bsize = 32,
1146 .dcache_bsize = 32, 1219 .dcache_bsize = 32,
1147 .machine_check = machine_check_4xx, 1220 .machine_check = machine_check_4xx,
@@ -1154,6 +1227,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1154 .cpu_features = CPU_FTRS_40X, 1227 .cpu_features = CPU_FTRS_40X,
1155 .cpu_user_features = PPC_FEATURE_32 | 1228 .cpu_user_features = PPC_FEATURE_32 |
1156 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1229 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1230 .mmu_features = MMU_FTR_TYPE_40x,
1157 .icache_bsize = 32, 1231 .icache_bsize = 32,
1158 .dcache_bsize = 32, 1232 .dcache_bsize = 32,
1159 .machine_check = machine_check_4xx, 1233 .machine_check = machine_check_4xx,
@@ -1166,6 +1240,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1166 .cpu_features = CPU_FTRS_40X, 1240 .cpu_features = CPU_FTRS_40X,
1167 .cpu_user_features = PPC_FEATURE_32 | 1241 .cpu_user_features = PPC_FEATURE_32 |
1168 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1242 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1243 .mmu_features = MMU_FTR_TYPE_40x,
1169 .icache_bsize = 32, 1244 .icache_bsize = 32,
1170 .dcache_bsize = 32, 1245 .dcache_bsize = 32,
1171 .machine_check = machine_check_4xx, 1246 .machine_check = machine_check_4xx,
@@ -1178,6 +1253,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1178 .cpu_features = CPU_FTRS_40X, 1253 .cpu_features = CPU_FTRS_40X,
1179 .cpu_user_features = PPC_FEATURE_32 | 1254 .cpu_user_features = PPC_FEATURE_32 |
1180 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1256 .mmu_features = MMU_FTR_TYPE_40x,
1181 .icache_bsize = 32, 1257 .icache_bsize = 32,
1182 .dcache_bsize = 32, 1258 .dcache_bsize = 32,
1183 .machine_check = machine_check_4xx, 1259 .machine_check = machine_check_4xx,
@@ -1190,6 +1266,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1190 .cpu_features = CPU_FTRS_40X, 1266 .cpu_features = CPU_FTRS_40X,
1191 .cpu_user_features = PPC_FEATURE_32 | 1267 .cpu_user_features = PPC_FEATURE_32 |
1192 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1268 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1269 .mmu_features = MMU_FTR_TYPE_40x,
1193 .icache_bsize = 32, 1270 .icache_bsize = 32,
1194 .dcache_bsize = 32, 1271 .dcache_bsize = 32,
1195 .machine_check = machine_check_4xx, 1272 .machine_check = machine_check_4xx,
@@ -1202,6 +1279,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1202 .cpu_features = CPU_FTRS_40X, 1279 .cpu_features = CPU_FTRS_40X,
1203 .cpu_user_features = PPC_FEATURE_32 | 1280 .cpu_user_features = PPC_FEATURE_32 |
1204 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1281 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1282 .mmu_features = MMU_FTR_TYPE_40x,
1205 .icache_bsize = 32, 1283 .icache_bsize = 32,
1206 .dcache_bsize = 32, 1284 .dcache_bsize = 32,
1207 .machine_check = machine_check_4xx, 1285 .machine_check = machine_check_4xx,
@@ -1213,6 +1291,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1213 .cpu_name = "405LP", 1291 .cpu_name = "405LP",
1214 .cpu_features = CPU_FTRS_40X, 1292 .cpu_features = CPU_FTRS_40X,
1215 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1293 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1294 .mmu_features = MMU_FTR_TYPE_40x,
1216 .icache_bsize = 32, 1295 .icache_bsize = 32,
1217 .dcache_bsize = 32, 1296 .dcache_bsize = 32,
1218 .machine_check = machine_check_4xx, 1297 .machine_check = machine_check_4xx,
@@ -1225,6 +1304,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1225 .cpu_features = CPU_FTRS_40X, 1304 .cpu_features = CPU_FTRS_40X,
1226 .cpu_user_features = PPC_FEATURE_32 | 1305 .cpu_user_features = PPC_FEATURE_32 |
1227 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1307 .mmu_features = MMU_FTR_TYPE_40x,
1228 .icache_bsize = 32, 1308 .icache_bsize = 32,
1229 .dcache_bsize = 32, 1309 .dcache_bsize = 32,
1230 .machine_check = machine_check_4xx, 1310 .machine_check = machine_check_4xx,
@@ -1237,6 +1317,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1237 .cpu_features = CPU_FTRS_40X, 1317 .cpu_features = CPU_FTRS_40X,
1238 .cpu_user_features = PPC_FEATURE_32 | 1318 .cpu_user_features = PPC_FEATURE_32 |
1239 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1320 .mmu_features = MMU_FTR_TYPE_40x,
1240 .icache_bsize = 32, 1321 .icache_bsize = 32,
1241 .dcache_bsize = 32, 1322 .dcache_bsize = 32,
1242 .machine_check = machine_check_4xx, 1323 .machine_check = machine_check_4xx,
@@ -1249,6 +1330,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1249 .cpu_features = CPU_FTRS_40X, 1330 .cpu_features = CPU_FTRS_40X,
1250 .cpu_user_features = PPC_FEATURE_32 | 1331 .cpu_user_features = PPC_FEATURE_32 |
1251 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1333 .mmu_features = MMU_FTR_TYPE_40x,
1252 .icache_bsize = 32, 1334 .icache_bsize = 32,
1253 .dcache_bsize = 32, 1335 .dcache_bsize = 32,
1254 .machine_check = machine_check_4xx, 1336 .machine_check = machine_check_4xx,
@@ -1261,6 +1343,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1261 .cpu_features = CPU_FTRS_40X, 1343 .cpu_features = CPU_FTRS_40X,
1262 .cpu_user_features = PPC_FEATURE_32 | 1344 .cpu_user_features = PPC_FEATURE_32 |
1263 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1346 .mmu_features = MMU_FTR_TYPE_40x,
1264 .icache_bsize = 32, 1347 .icache_bsize = 32,
1265 .dcache_bsize = 32, 1348 .dcache_bsize = 32,
1266 .machine_check = machine_check_4xx, 1349 .machine_check = machine_check_4xx,
@@ -1273,6 +1356,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1273 .cpu_features = CPU_FTRS_40X, 1356 .cpu_features = CPU_FTRS_40X,
1274 .cpu_user_features = PPC_FEATURE_32 | 1357 .cpu_user_features = PPC_FEATURE_32 |
1275 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1359 .mmu_features = MMU_FTR_TYPE_40x,
1276 .icache_bsize = 32, 1360 .icache_bsize = 32,
1277 .dcache_bsize = 32, 1361 .dcache_bsize = 32,
1278 .machine_check = machine_check_4xx, 1362 .machine_check = machine_check_4xx,
@@ -1286,6 +1370,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1286 .cpu_features = CPU_FTRS_40X, 1370 .cpu_features = CPU_FTRS_40X,
1287 .cpu_user_features = PPC_FEATURE_32 | 1371 .cpu_user_features = PPC_FEATURE_32 |
1288 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1372 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1373 .mmu_features = MMU_FTR_TYPE_40x,
1289 .icache_bsize = 32, 1374 .icache_bsize = 32,
1290 .dcache_bsize = 32, 1375 .dcache_bsize = 32,
1291 .machine_check = machine_check_4xx, 1376 .machine_check = machine_check_4xx,
@@ -1298,6 +1383,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1298 .cpu_features = CPU_FTRS_40X, 1383 .cpu_features = CPU_FTRS_40X,
1299 .cpu_user_features = PPC_FEATURE_32 | 1384 .cpu_user_features = PPC_FEATURE_32 |
1300 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1385 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1386 .mmu_features = MMU_FTR_TYPE_40x,
1301 .icache_bsize = 32, 1387 .icache_bsize = 32,
1302 .dcache_bsize = 32, 1388 .dcache_bsize = 32,
1303 .machine_check = machine_check_4xx, 1389 .machine_check = machine_check_4xx,
@@ -1312,6 +1398,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1312 .cpu_name = "440GR Rev. A", 1398 .cpu_name = "440GR Rev. A",
1313 .cpu_features = CPU_FTRS_44X, 1399 .cpu_features = CPU_FTRS_44X,
1314 .cpu_user_features = COMMON_USER_BOOKE, 1400 .cpu_user_features = COMMON_USER_BOOKE,
1401 .mmu_features = MMU_FTR_TYPE_44x,
1315 .icache_bsize = 32, 1402 .icache_bsize = 32,
1316 .dcache_bsize = 32, 1403 .dcache_bsize = 32,
1317 .machine_check = machine_check_4xx, 1404 .machine_check = machine_check_4xx,
@@ -1323,6 +1410,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1323 .cpu_name = "440EP Rev. A", 1410 .cpu_name = "440EP Rev. A",
1324 .cpu_features = CPU_FTRS_44X, 1411 .cpu_features = CPU_FTRS_44X,
1325 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1412 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1413 .mmu_features = MMU_FTR_TYPE_44x,
1326 .icache_bsize = 32, 1414 .icache_bsize = 32,
1327 .dcache_bsize = 32, 1415 .dcache_bsize = 32,
1328 .cpu_setup = __setup_cpu_440ep, 1416 .cpu_setup = __setup_cpu_440ep,
@@ -1335,6 +1423,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1335 .cpu_name = "440GR Rev. B", 1423 .cpu_name = "440GR Rev. B",
1336 .cpu_features = CPU_FTRS_44X, 1424 .cpu_features = CPU_FTRS_44X,
1337 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1425 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1426 .mmu_features = MMU_FTR_TYPE_44x,
1338 .icache_bsize = 32, 1427 .icache_bsize = 32,
1339 .dcache_bsize = 32, 1428 .dcache_bsize = 32,
1340 .machine_check = machine_check_4xx, 1429 .machine_check = machine_check_4xx,
@@ -1346,6 +1435,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1346 .cpu_name = "440EP Rev. C", 1435 .cpu_name = "440EP Rev. C",
1347 .cpu_features = CPU_FTRS_44X, 1436 .cpu_features = CPU_FTRS_44X,
1348 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1437 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1438 .mmu_features = MMU_FTR_TYPE_44x,
1349 .icache_bsize = 32, 1439 .icache_bsize = 32,
1350 .dcache_bsize = 32, 1440 .dcache_bsize = 32,
1351 .cpu_setup = __setup_cpu_440ep, 1441 .cpu_setup = __setup_cpu_440ep,
@@ -1358,6 +1448,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1358 .cpu_name = "440EP Rev. B", 1448 .cpu_name = "440EP Rev. B",
1359 .cpu_features = CPU_FTRS_44X, 1449 .cpu_features = CPU_FTRS_44X,
1360 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1450 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1451 .mmu_features = MMU_FTR_TYPE_44x,
1361 .icache_bsize = 32, 1452 .icache_bsize = 32,
1362 .dcache_bsize = 32, 1453 .dcache_bsize = 32,
1363 .cpu_setup = __setup_cpu_440ep, 1454 .cpu_setup = __setup_cpu_440ep,
@@ -1370,6 +1461,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1370 .cpu_name = "440GRX", 1461 .cpu_name = "440GRX",
1371 .cpu_features = CPU_FTRS_44X, 1462 .cpu_features = CPU_FTRS_44X,
1372 .cpu_user_features = COMMON_USER_BOOKE, 1463 .cpu_user_features = COMMON_USER_BOOKE,
1464 .mmu_features = MMU_FTR_TYPE_44x,
1373 .icache_bsize = 32, 1465 .icache_bsize = 32,
1374 .dcache_bsize = 32, 1466 .dcache_bsize = 32,
1375 .cpu_setup = __setup_cpu_440grx, 1467 .cpu_setup = __setup_cpu_440grx,
@@ -1382,6 +1474,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1382 .cpu_name = "440EPX", 1474 .cpu_name = "440EPX",
1383 .cpu_features = CPU_FTRS_44X, 1475 .cpu_features = CPU_FTRS_44X,
1384 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1476 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1477 .mmu_features = MMU_FTR_TYPE_44x,
1385 .icache_bsize = 32, 1478 .icache_bsize = 32,
1386 .dcache_bsize = 32, 1479 .dcache_bsize = 32,
1387 .cpu_setup = __setup_cpu_440epx, 1480 .cpu_setup = __setup_cpu_440epx,
@@ -1394,6 +1487,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1394 .cpu_name = "440GP Rev. B", 1487 .cpu_name = "440GP Rev. B",
1395 .cpu_features = CPU_FTRS_44X, 1488 .cpu_features = CPU_FTRS_44X,
1396 .cpu_user_features = COMMON_USER_BOOKE, 1489 .cpu_user_features = COMMON_USER_BOOKE,
1490 .mmu_features = MMU_FTR_TYPE_44x,
1397 .icache_bsize = 32, 1491 .icache_bsize = 32,
1398 .dcache_bsize = 32, 1492 .dcache_bsize = 32,
1399 .machine_check = machine_check_4xx, 1493 .machine_check = machine_check_4xx,
@@ -1405,6 +1499,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1405 .cpu_name = "440GP Rev. C", 1499 .cpu_name = "440GP Rev. C",
1406 .cpu_features = CPU_FTRS_44X, 1500 .cpu_features = CPU_FTRS_44X,
1407 .cpu_user_features = COMMON_USER_BOOKE, 1501 .cpu_user_features = COMMON_USER_BOOKE,
1502 .mmu_features = MMU_FTR_TYPE_44x,
1408 .icache_bsize = 32, 1503 .icache_bsize = 32,
1409 .dcache_bsize = 32, 1504 .dcache_bsize = 32,
1410 .machine_check = machine_check_4xx, 1505 .machine_check = machine_check_4xx,
@@ -1416,6 +1511,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1416 .cpu_name = "440GX Rev. A", 1511 .cpu_name = "440GX Rev. A",
1417 .cpu_features = CPU_FTRS_44X, 1512 .cpu_features = CPU_FTRS_44X,
1418 .cpu_user_features = COMMON_USER_BOOKE, 1513 .cpu_user_features = COMMON_USER_BOOKE,
1514 .mmu_features = MMU_FTR_TYPE_44x,
1419 .icache_bsize = 32, 1515 .icache_bsize = 32,
1420 .dcache_bsize = 32, 1516 .dcache_bsize = 32,
1421 .cpu_setup = __setup_cpu_440gx, 1517 .cpu_setup = __setup_cpu_440gx,
@@ -1428,6 +1524,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1428 .cpu_name = "440GX Rev. B", 1524 .cpu_name = "440GX Rev. B",
1429 .cpu_features = CPU_FTRS_44X, 1525 .cpu_features = CPU_FTRS_44X,
1430 .cpu_user_features = COMMON_USER_BOOKE, 1526 .cpu_user_features = COMMON_USER_BOOKE,
1527 .mmu_features = MMU_FTR_TYPE_44x,
1431 .icache_bsize = 32, 1528 .icache_bsize = 32,
1432 .dcache_bsize = 32, 1529 .dcache_bsize = 32,
1433 .cpu_setup = __setup_cpu_440gx, 1530 .cpu_setup = __setup_cpu_440gx,
@@ -1440,6 +1537,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1440 .cpu_name = "440GX Rev. C", 1537 .cpu_name = "440GX Rev. C",
1441 .cpu_features = CPU_FTRS_44X, 1538 .cpu_features = CPU_FTRS_44X,
1442 .cpu_user_features = COMMON_USER_BOOKE, 1539 .cpu_user_features = COMMON_USER_BOOKE,
1540 .mmu_features = MMU_FTR_TYPE_44x,
1443 .icache_bsize = 32, 1541 .icache_bsize = 32,
1444 .dcache_bsize = 32, 1542 .dcache_bsize = 32,
1445 .cpu_setup = __setup_cpu_440gx, 1543 .cpu_setup = __setup_cpu_440gx,
@@ -1452,6 +1550,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1452 .cpu_name = "440GX Rev. F", 1550 .cpu_name = "440GX Rev. F",
1453 .cpu_features = CPU_FTRS_44X, 1551 .cpu_features = CPU_FTRS_44X,
1454 .cpu_user_features = COMMON_USER_BOOKE, 1552 .cpu_user_features = COMMON_USER_BOOKE,
1553 .mmu_features = MMU_FTR_TYPE_44x,
1455 .icache_bsize = 32, 1554 .icache_bsize = 32,
1456 .dcache_bsize = 32, 1555 .dcache_bsize = 32,
1457 .cpu_setup = __setup_cpu_440gx, 1556 .cpu_setup = __setup_cpu_440gx,
@@ -1464,6 +1563,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1464 .cpu_name = "440SP Rev. A", 1563 .cpu_name = "440SP Rev. A",
1465 .cpu_features = CPU_FTRS_44X, 1564 .cpu_features = CPU_FTRS_44X,
1466 .cpu_user_features = COMMON_USER_BOOKE, 1565 .cpu_user_features = COMMON_USER_BOOKE,
1566 .mmu_features = MMU_FTR_TYPE_44x,
1467 .icache_bsize = 32, 1567 .icache_bsize = 32,
1468 .dcache_bsize = 32, 1568 .dcache_bsize = 32,
1469 .machine_check = machine_check_4xx, 1569 .machine_check = machine_check_4xx,
@@ -1475,6 +1575,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1475 .cpu_name = "440SPe Rev. A", 1575 .cpu_name = "440SPe Rev. A",
1476 .cpu_features = CPU_FTRS_44X, 1576 .cpu_features = CPU_FTRS_44X,
1477 .cpu_user_features = COMMON_USER_BOOKE, 1577 .cpu_user_features = COMMON_USER_BOOKE,
1578 .mmu_features = MMU_FTR_TYPE_44x,
1478 .icache_bsize = 32, 1579 .icache_bsize = 32,
1479 .dcache_bsize = 32, 1580 .dcache_bsize = 32,
1480 .cpu_setup = __setup_cpu_440spe, 1581 .cpu_setup = __setup_cpu_440spe,
@@ -1487,6 +1588,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1487 .cpu_name = "440SPe Rev. B", 1588 .cpu_name = "440SPe Rev. B",
1488 .cpu_features = CPU_FTRS_44X, 1589 .cpu_features = CPU_FTRS_44X,
1489 .cpu_user_features = COMMON_USER_BOOKE, 1590 .cpu_user_features = COMMON_USER_BOOKE,
1591 .mmu_features = MMU_FTR_TYPE_44x,
1490 .icache_bsize = 32, 1592 .icache_bsize = 32,
1491 .dcache_bsize = 32, 1593 .dcache_bsize = 32,
1492 .cpu_setup = __setup_cpu_440spe, 1594 .cpu_setup = __setup_cpu_440spe,
@@ -1499,6 +1601,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1499 .cpu_name = "440 in Virtex-5 FXT", 1601 .cpu_name = "440 in Virtex-5 FXT",
1500 .cpu_features = CPU_FTRS_44X, 1602 .cpu_features = CPU_FTRS_44X,
1501 .cpu_user_features = COMMON_USER_BOOKE, 1603 .cpu_user_features = COMMON_USER_BOOKE,
1604 .mmu_features = MMU_FTR_TYPE_44x,
1502 .icache_bsize = 32, 1605 .icache_bsize = 32,
1503 .dcache_bsize = 32, 1606 .dcache_bsize = 32,
1504 .cpu_setup = __setup_cpu_440x5, 1607 .cpu_setup = __setup_cpu_440x5,
@@ -1509,8 +1612,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
1509 .pvr_mask = 0xffff0002, 1612 .pvr_mask = 0xffff0002,
1510 .pvr_value = 0x13020002, 1613 .pvr_value = 0x13020002,
1511 .cpu_name = "460EX", 1614 .cpu_name = "460EX",
1512 .cpu_features = CPU_FTRS_44X, 1615 .cpu_features = CPU_FTRS_440x6,
1513 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1616 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1617 .mmu_features = MMU_FTR_TYPE_44x,
1514 .icache_bsize = 32, 1618 .icache_bsize = 32,
1515 .dcache_bsize = 32, 1619 .dcache_bsize = 32,
1516 .cpu_setup = __setup_cpu_460ex, 1620 .cpu_setup = __setup_cpu_460ex,
@@ -1521,8 +1625,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
1521 .pvr_mask = 0xffff0002, 1625 .pvr_mask = 0xffff0002,
1522 .pvr_value = 0x13020000, 1626 .pvr_value = 0x13020000,
1523 .cpu_name = "460GT", 1627 .cpu_name = "460GT",
1524 .cpu_features = CPU_FTRS_44X, 1628 .cpu_features = CPU_FTRS_440x6,
1525 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1629 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1630 .mmu_features = MMU_FTR_TYPE_44x,
1526 .icache_bsize = 32, 1631 .icache_bsize = 32,
1527 .dcache_bsize = 32, 1632 .dcache_bsize = 32,
1528 .cpu_setup = __setup_cpu_460gt, 1633 .cpu_setup = __setup_cpu_460gt,
@@ -1535,6 +1640,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1535 .cpu_name = "(generic 44x PPC)", 1640 .cpu_name = "(generic 44x PPC)",
1536 .cpu_features = CPU_FTRS_44X, 1641 .cpu_features = CPU_FTRS_44X,
1537 .cpu_user_features = COMMON_USER_BOOKE, 1642 .cpu_user_features = COMMON_USER_BOOKE,
1643 .mmu_features = MMU_FTR_TYPE_44x,
1538 .icache_bsize = 32, 1644 .icache_bsize = 32,
1539 .dcache_bsize = 32, 1645 .dcache_bsize = 32,
1540 .machine_check = machine_check_4xx, 1646 .machine_check = machine_check_4xx,
@@ -1551,6 +1657,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1551 .cpu_user_features = COMMON_USER_BOOKE | 1657 .cpu_user_features = COMMON_USER_BOOKE |
1552 PPC_FEATURE_HAS_EFP_SINGLE | 1658 PPC_FEATURE_HAS_EFP_SINGLE |
1553 PPC_FEATURE_UNIFIED_CACHE, 1659 PPC_FEATURE_UNIFIED_CACHE,
1660 .mmu_features = MMU_FTR_TYPE_FSL_E,
1554 .dcache_bsize = 32, 1661 .dcache_bsize = 32,
1555 .machine_check = machine_check_e200, 1662 .machine_check = machine_check_e200,
1556 .platform = "ppc5554", 1663 .platform = "ppc5554",
@@ -1565,6 +1672,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1565 PPC_FEATURE_HAS_SPE_COMP | 1672 PPC_FEATURE_HAS_SPE_COMP |
1566 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1673 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1567 PPC_FEATURE_UNIFIED_CACHE, 1674 PPC_FEATURE_UNIFIED_CACHE,
1675 .mmu_features = MMU_FTR_TYPE_FSL_E,
1568 .dcache_bsize = 32, 1676 .dcache_bsize = 32,
1569 .machine_check = machine_check_e200, 1677 .machine_check = machine_check_e200,
1570 .platform = "ppc5554", 1678 .platform = "ppc5554",
@@ -1577,6 +1685,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1577 .cpu_user_features = COMMON_USER_BOOKE | 1685 .cpu_user_features = COMMON_USER_BOOKE |
1578 PPC_FEATURE_HAS_EFP_SINGLE | 1686 PPC_FEATURE_HAS_EFP_SINGLE |
1579 PPC_FEATURE_UNIFIED_CACHE, 1687 PPC_FEATURE_UNIFIED_CACHE,
1688 .mmu_features = MMU_FTR_TYPE_FSL_E,
1580 .dcache_bsize = 32, 1689 .dcache_bsize = 32,
1581 .machine_check = machine_check_e200, 1690 .machine_check = machine_check_e200,
1582 .platform = "ppc5554", 1691 .platform = "ppc5554",
@@ -1591,6 +1700,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1591 .cpu_user_features = COMMON_USER_BOOKE | 1700 .cpu_user_features = COMMON_USER_BOOKE |
1592 PPC_FEATURE_HAS_SPE_COMP | 1701 PPC_FEATURE_HAS_SPE_COMP |
1593 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1702 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1703 .mmu_features = MMU_FTR_TYPE_FSL_E,
1594 .icache_bsize = 32, 1704 .icache_bsize = 32,
1595 .dcache_bsize = 32, 1705 .dcache_bsize = 32,
1596 .num_pmcs = 4, 1706 .num_pmcs = 4,
@@ -1608,6 +1718,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1608 PPC_FEATURE_HAS_SPE_COMP | 1718 PPC_FEATURE_HAS_SPE_COMP |
1609 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1719 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1610 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1720 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1721 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1611 .icache_bsize = 32, 1722 .icache_bsize = 32,
1612 .dcache_bsize = 32, 1723 .dcache_bsize = 32,
1613 .num_pmcs = 4, 1724 .num_pmcs = 4,
@@ -1622,6 +1733,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1622 .cpu_name = "e500mc", 1733 .cpu_name = "e500mc",
1623 .cpu_features = CPU_FTRS_E500MC, 1734 .cpu_features = CPU_FTRS_E500MC,
1624 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1735 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1736 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1625 .icache_bsize = 64, 1737 .icache_bsize = 64,
1626 .dcache_bsize = 64, 1738 .dcache_bsize = 64,
1627 .num_pmcs = 4, 1739 .num_pmcs = 4,
@@ -1638,6 +1750,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1638 .cpu_user_features = COMMON_USER_BOOKE | 1750 .cpu_user_features = COMMON_USER_BOOKE |
1639 PPC_FEATURE_HAS_SPE_COMP | 1751 PPC_FEATURE_HAS_SPE_COMP |
1640 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1752 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1753 .mmu_features = MMU_FTR_TYPE_FSL_E,
1641 .icache_bsize = 32, 1754 .icache_bsize = 32,
1642 .dcache_bsize = 32, 1755 .dcache_bsize = 32,
1643 .machine_check = machine_check_e500, 1756 .machine_check = machine_check_e500,
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 3a6eaa876ee1..1c5c8a6fc129 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -120,6 +120,26 @@ static inline void dma_direct_unmap_page(struct device *dev,
120{ 120{
121} 121}
122 122
123#ifdef CONFIG_NOT_COHERENT_CACHE
124static inline void dma_direct_sync_sg(struct device *dev,
125 struct scatterlist *sgl, int nents,
126 enum dma_data_direction direction)
127{
128 struct scatterlist *sg;
129 int i;
130
131 for_each_sg(sgl, sg, nents, i)
132 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
133}
134
135static inline void dma_direct_sync_single_range(struct device *dev,
136 dma_addr_t dma_handle, unsigned long offset, size_t size,
137 enum dma_data_direction direction)
138{
139 __dma_sync(bus_to_virt(dma_handle+offset), size, direction);
140}
141#endif
142
123struct dma_mapping_ops dma_direct_ops = { 143struct dma_mapping_ops dma_direct_ops = {
124 .alloc_coherent = dma_direct_alloc_coherent, 144 .alloc_coherent = dma_direct_alloc_coherent,
125 .free_coherent = dma_direct_free_coherent, 145 .free_coherent = dma_direct_free_coherent,
@@ -128,5 +148,11 @@ struct dma_mapping_ops dma_direct_ops = {
128 .dma_supported = dma_direct_dma_supported, 148 .dma_supported = dma_direct_dma_supported,
129 .map_page = dma_direct_map_page, 149 .map_page = dma_direct_map_page,
130 .unmap_page = dma_direct_unmap_page, 150 .unmap_page = dma_direct_unmap_page,
151#ifdef CONFIG_NOT_COHERENT_CACHE
152 .sync_single_range_for_cpu = dma_direct_sync_single_range,
153 .sync_single_range_for_device = dma_direct_sync_single_range,
154 .sync_sg_for_cpu = dma_direct_sync_sg,
155 .sync_sg_for_device = dma_direct_sync_sg,
156#endif
131}; 157};
132EXPORT_SYMBOL(dma_direct_ops); 158EXPORT_SYMBOL(dma_direct_ops);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 7ecc0d1855c3..6f7eb7e00c79 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -1162,39 +1162,17 @@ machine_check_in_rtas:
1162#ifdef CONFIG_DYNAMIC_FTRACE 1162#ifdef CONFIG_DYNAMIC_FTRACE
1163_GLOBAL(mcount) 1163_GLOBAL(mcount)
1164_GLOBAL(_mcount) 1164_GLOBAL(_mcount)
1165 stwu r1,-48(r1) 1165 /*
1166 stw r3, 12(r1) 1166 * It is required that _mcount on PPC32 must preserve the
1167 stw r4, 16(r1) 1167 * link register. But we have r0 to play with. We use r0
1168 stw r5, 20(r1) 1168 * to push the return address back to the caller of mcount
1169 stw r6, 24(r1) 1169 * into the ctr register, restore the link register and
1170 mflr r3 1170 * then jump back using the ctr register.
1171 stw r7, 28(r1) 1171 */
1172 mfcr r5 1172 mflr r0
1173 stw r8, 32(r1)
1174 stw r9, 36(r1)
1175 stw r10,40(r1)
1176 stw r3, 44(r1)
1177 stw r5, 8(r1)
1178 subi r3, r3, MCOUNT_INSN_SIZE
1179 .globl mcount_call
1180mcount_call:
1181 bl ftrace_stub
1182 nop
1183 lwz r6, 8(r1)
1184 lwz r0, 44(r1)
1185 lwz r3, 12(r1)
1186 mtctr r0 1173 mtctr r0
1187 lwz r4, 16(r1) 1174 lwz r0, 4(r1)
1188 mtcr r6
1189 lwz r5, 20(r1)
1190 lwz r6, 24(r1)
1191 lwz r0, 52(r1)
1192 lwz r7, 28(r1)
1193 lwz r8, 32(r1)
1194 mtlr r0 1175 mtlr r0
1195 lwz r9, 36(r1)
1196 lwz r10,40(r1)
1197 addi r1, r1, 48
1198 bctr 1176 bctr
1199 1177
1200_GLOBAL(ftrace_caller) 1178_GLOBAL(ftrace_caller)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index e0bcf9354286..383ed6eb0085 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -894,18 +894,6 @@ _GLOBAL(enter_prom)
894#ifdef CONFIG_DYNAMIC_FTRACE 894#ifdef CONFIG_DYNAMIC_FTRACE
895_GLOBAL(mcount) 895_GLOBAL(mcount)
896_GLOBAL(_mcount) 896_GLOBAL(_mcount)
897 /* Taken from output of objdump from lib64/glibc */
898 mflr r3
899 stdu r1, -112(r1)
900 std r3, 128(r1)
901 subi r3, r3, MCOUNT_INSN_SIZE
902 .globl mcount_call
903mcount_call:
904 bl ftrace_stub
905 nop
906 ld r0, 128(r1)
907 mtlr r0
908 addi r1, r1, 112
909 blr 897 blr
910 898
911_GLOBAL(ftrace_caller) 899_GLOBAL(ftrace_caller)
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index f4b006ed0ab1..5355244c99ff 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -9,22 +9,30 @@
9 9
10#include <linux/spinlock.h> 10#include <linux/spinlock.h>
11#include <linux/hardirq.h> 11#include <linux/hardirq.h>
12#include <linux/uaccess.h>
13#include <linux/module.h>
12#include <linux/ftrace.h> 14#include <linux/ftrace.h>
13#include <linux/percpu.h> 15#include <linux/percpu.h>
14#include <linux/init.h> 16#include <linux/init.h>
15#include <linux/list.h> 17#include <linux/list.h>
16 18
17#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
20#include <asm/code-patching.h>
18#include <asm/ftrace.h> 21#include <asm/ftrace.h>
19 22
23#if 0
24#define DEBUGP printk
25#else
26#define DEBUGP(fmt , ...) do { } while (0)
27#endif
20 28
21static unsigned int ftrace_nop = 0x60000000; 29static unsigned int ftrace_nop = PPC_NOP_INSTR;
22 30
23#ifdef CONFIG_PPC32 31#ifdef CONFIG_PPC32
24# define GET_ADDR(addr) addr 32# define GET_ADDR(addr) addr
25#else 33#else
26/* PowerPC64's functions are data that points to the functions */ 34/* PowerPC64's functions are data that points to the functions */
27# define GET_ADDR(addr) *(unsigned long *)addr 35# define GET_ADDR(addr) (*(unsigned long *)addr)
28#endif 36#endif
29 37
30 38
@@ -33,12 +41,12 @@ static unsigned int ftrace_calc_offset(long ip, long addr)
33 return (int)(addr - ip); 41 return (int)(addr - ip);
34} 42}
35 43
36unsigned char *ftrace_nop_replace(void) 44static unsigned char *ftrace_nop_replace(void)
37{ 45{
38 return (char *)&ftrace_nop; 46 return (char *)&ftrace_nop;
39} 47}
40 48
41unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) 49static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
42{ 50{
43 static unsigned int op; 51 static unsigned int op;
44 52
@@ -68,49 +76,422 @@ unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
68# define _ASM_PTR " .long " 76# define _ASM_PTR " .long "
69#endif 77#endif
70 78
71int 79static int
72ftrace_modify_code(unsigned long ip, unsigned char *old_code, 80ftrace_modify_code(unsigned long ip, unsigned char *old_code,
73 unsigned char *new_code) 81 unsigned char *new_code)
74{ 82{
75 unsigned replaced; 83 unsigned char replaced[MCOUNT_INSN_SIZE];
76 unsigned old = *(unsigned *)old_code;
77 unsigned new = *(unsigned *)new_code;
78 int faulted = 0;
79 84
80 /* 85 /*
81 * Note: Due to modules and __init, code can 86 * Note: Due to modules and __init, code can
82 * disappear and change, we need to protect against faulting 87 * disappear and change, we need to protect against faulting
83 * as well as code changing. 88 * as well as code changing. We do this by using the
89 * probe_kernel_* functions.
84 * 90 *
85 * No real locking needed, this code is run through 91 * No real locking needed, this code is run through
86 * kstop_machine. 92 * kstop_machine, or before SMP starts.
87 */ 93 */
88 asm volatile ( 94
89 "1: lwz %1, 0(%2)\n" 95 /* read the text we want to modify */
90 " cmpw %1, %5\n" 96 if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
91 " bne 2f\n" 97 return -EFAULT;
92 " stwu %3, 0(%2)\n" 98
93 "2:\n" 99 /* Make sure it is what we expect it to be */
94 ".section .fixup, \"ax\"\n" 100 if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0)
95 "3: li %0, 1\n" 101 return -EINVAL;
96 " b 2b\n" 102
97 ".previous\n" 103 /* replace the text with the new text */
98 ".section __ex_table,\"a\"\n" 104 if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
99 _ASM_ALIGN "\n" 105 return -EPERM;
100 _ASM_PTR "1b, 3b\n" 106
101 ".previous" 107 flush_icache_range(ip, ip + 8);
102 : "=r"(faulted), "=r"(replaced) 108
103 : "r"(ip), "r"(new), 109 return 0;
104 "0"(faulted), "r"(old) 110}
105 : "memory"); 111
106 112/*
107 if (replaced != old && replaced != new) 113 * Helper functions that are the same for both PPC64 and PPC32.
108 faulted = 2; 114 */
109 115static int test_24bit_addr(unsigned long ip, unsigned long addr)
110 if (!faulted) 116{
111 flush_icache_range(ip, ip + 8); 117
112 118 /* use the create_branch to verify that this offset can be branched */
113 return faulted; 119 return create_branch((unsigned int *)ip, addr, 0);
120}
121
122static int is_bl_op(unsigned int op)
123{
124 return (op & 0xfc000003) == 0x48000001;
125}
126
127static unsigned long find_bl_target(unsigned long ip, unsigned int op)
128{
129 static int offset;
130
131 offset = (op & 0x03fffffc);
132 /* make it signed */
133 if (offset & 0x02000000)
134 offset |= 0xfe000000;
135
136 return ip + (long)offset;
137}
138
139#ifdef CONFIG_PPC64
140static int
141__ftrace_make_nop(struct module *mod,
142 struct dyn_ftrace *rec, unsigned long addr)
143{
144 unsigned int op;
145 unsigned int jmp[5];
146 unsigned long ptr;
147 unsigned long ip = rec->ip;
148 unsigned long tramp;
149 int offset;
150
151 /* read where this goes */
152 if (probe_kernel_read(&op, (void *)ip, sizeof(int)))
153 return -EFAULT;
154
155 /* Make sure that that this is still a 24bit jump */
156 if (!is_bl_op(op)) {
157 printk(KERN_ERR "Not expected bl: opcode is %x\n", op);
158 return -EINVAL;
159 }
160
161 /* lets find where the pointer goes */
162 tramp = find_bl_target(ip, op);
163
164 /*
165 * On PPC64 the trampoline looks like:
166 * 0x3d, 0x82, 0x00, 0x00, addis r12,r2, <high>
167 * 0x39, 0x8c, 0x00, 0x00, addi r12,r12, <low>
168 * Where the bytes 2,3,6 and 7 make up the 32bit offset
169 * to the TOC that holds the pointer.
170 * to jump to.
171 * 0xf8, 0x41, 0x00, 0x28, std r2,40(r1)
172 * 0xe9, 0x6c, 0x00, 0x20, ld r11,32(r12)
173 * The actually address is 32 bytes from the offset
174 * into the TOC.
175 * 0xe8, 0x4c, 0x00, 0x28, ld r2,40(r12)
176 */
177
178 DEBUGP("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc);
179
180 /* Find where the trampoline jumps to */
181 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
182 printk(KERN_ERR "Failed to read %lx\n", tramp);
183 return -EFAULT;
184 }
185
186 DEBUGP(" %08x %08x", jmp[0], jmp[1]);
187
188 /* verify that this is what we expect it to be */
189 if (((jmp[0] & 0xffff0000) != 0x3d820000) ||
190 ((jmp[1] & 0xffff0000) != 0x398c0000) ||
191 (jmp[2] != 0xf8410028) ||
192 (jmp[3] != 0xe96c0020) ||
193 (jmp[4] != 0xe84c0028)) {
194 printk(KERN_ERR "Not a trampoline\n");
195 return -EINVAL;
196 }
197
198 offset = (unsigned)((unsigned short)jmp[0]) << 16 |
199 (unsigned)((unsigned short)jmp[1]);
200
201 DEBUGP(" %x ", offset);
202
203 /* get the address this jumps too */
204 tramp = mod->arch.toc + offset + 32;
205 DEBUGP("toc: %lx", tramp);
206
207 if (probe_kernel_read(jmp, (void *)tramp, 8)) {
208 printk(KERN_ERR "Failed to read %lx\n", tramp);
209 return -EFAULT;
210 }
211
212 DEBUGP(" %08x %08x\n", jmp[0], jmp[1]);
213
214 ptr = ((unsigned long)jmp[0] << 32) + jmp[1];
215
216 /* This should match what was called */
217 if (ptr != GET_ADDR(addr)) {
218 printk(KERN_ERR "addr does not match %lx\n", ptr);
219 return -EINVAL;
220 }
221
222 /*
223 * We want to nop the line, but the next line is
224 * 0xe8, 0x41, 0x00, 0x28 ld r2,40(r1)
225 * This needs to be turned to a nop too.
226 */
227 if (probe_kernel_read(&op, (void *)(ip+4), MCOUNT_INSN_SIZE))
228 return -EFAULT;
229
230 if (op != 0xe8410028) {
231 printk(KERN_ERR "Next line is not ld! (%08x)\n", op);
232 return -EINVAL;
233 }
234
235 /*
236 * Milton Miller pointed out that we can not blindly do nops.
237 * If a task was preempted when calling a trace function,
238 * the nops will remove the way to restore the TOC in r2
239 * and the r2 TOC will get corrupted.
240 */
241
242 /*
243 * Replace:
244 * bl <tramp> <==== will be replaced with "b 1f"
245 * ld r2,40(r1)
246 * 1:
247 */
248 op = 0x48000008; /* b +8 */
249
250 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
251 return -EPERM;
252
253
254 flush_icache_range(ip, ip + 8);
255
256 return 0;
257}
258
259#else /* !PPC64 */
260static int
261__ftrace_make_nop(struct module *mod,
262 struct dyn_ftrace *rec, unsigned long addr)
263{
264 unsigned int op;
265 unsigned int jmp[4];
266 unsigned long ip = rec->ip;
267 unsigned long tramp;
268
269 if (probe_kernel_read(&op, (void *)ip, MCOUNT_INSN_SIZE))
270 return -EFAULT;
271
272 /* Make sure that that this is still a 24bit jump */
273 if (!is_bl_op(op)) {
274 printk(KERN_ERR "Not expected bl: opcode is %x\n", op);
275 return -EINVAL;
276 }
277
278 /* lets find where the pointer goes */
279 tramp = find_bl_target(ip, op);
280
281 /*
282 * On PPC32 the trampoline looks like:
283 * 0x3d, 0x60, 0x00, 0x00 lis r11,sym@ha
284 * 0x39, 0x6b, 0x00, 0x00 addi r11,r11,sym@l
285 * 0x7d, 0x69, 0x03, 0xa6 mtctr r11
286 * 0x4e, 0x80, 0x04, 0x20 bctr
287 */
288
289 DEBUGP("ip:%lx jumps to %lx", ip, tramp);
290
291 /* Find where the trampoline jumps to */
292 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
293 printk(KERN_ERR "Failed to read %lx\n", tramp);
294 return -EFAULT;
295 }
296
297 DEBUGP(" %08x %08x ", jmp[0], jmp[1]);
298
299 /* verify that this is what we expect it to be */
300 if (((jmp[0] & 0xffff0000) != 0x3d600000) ||
301 ((jmp[1] & 0xffff0000) != 0x396b0000) ||
302 (jmp[2] != 0x7d6903a6) ||
303 (jmp[3] != 0x4e800420)) {
304 printk(KERN_ERR "Not a trampoline\n");
305 return -EINVAL;
306 }
307
308 tramp = (jmp[1] & 0xffff) |
309 ((jmp[0] & 0xffff) << 16);
310 if (tramp & 0x8000)
311 tramp -= 0x10000;
312
313 DEBUGP(" %x ", tramp);
314
315 if (tramp != addr) {
316 printk(KERN_ERR
317 "Trampoline location %08lx does not match addr\n",
318 tramp);
319 return -EINVAL;
320 }
321
322 op = PPC_NOP_INSTR;
323
324 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
325 return -EPERM;
326
327 flush_icache_range(ip, ip + 8);
328
329 return 0;
330}
331#endif /* PPC64 */
332
333int ftrace_make_nop(struct module *mod,
334 struct dyn_ftrace *rec, unsigned long addr)
335{
336 unsigned char *old, *new;
337 unsigned long ip = rec->ip;
338
339 /*
340 * If the calling address is more that 24 bits away,
341 * then we had to use a trampoline to make the call.
342 * Otherwise just update the call site.
343 */
344 if (test_24bit_addr(ip, addr)) {
345 /* within range */
346 old = ftrace_call_replace(ip, addr);
347 new = ftrace_nop_replace();
348 return ftrace_modify_code(ip, old, new);
349 }
350
351 /*
352 * Out of range jumps are called from modules.
353 * We should either already have a pointer to the module
354 * or it has been passed in.
355 */
356 if (!rec->arch.mod) {
357 if (!mod) {
358 printk(KERN_ERR "No module loaded addr=%lx\n",
359 addr);
360 return -EFAULT;
361 }
362 rec->arch.mod = mod;
363 } else if (mod) {
364 if (mod != rec->arch.mod) {
365 printk(KERN_ERR
366 "Record mod %p not equal to passed in mod %p\n",
367 rec->arch.mod, mod);
368 return -EINVAL;
369 }
370 /* nothing to do if mod == rec->arch.mod */
371 } else
372 mod = rec->arch.mod;
373
374 return __ftrace_make_nop(mod, rec, addr);
375
376}
377
378#ifdef CONFIG_PPC64
379static int
380__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
381{
382 unsigned int op[2];
383 unsigned long ip = rec->ip;
384
385 /* read where this goes */
386 if (probe_kernel_read(op, (void *)ip, MCOUNT_INSN_SIZE * 2))
387 return -EFAULT;
388
389 /*
390 * It should be pointing to two nops or
391 * b +8; ld r2,40(r1)
392 */
393 if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) &&
394 ((op[0] != PPC_NOP_INSTR) || (op[1] != PPC_NOP_INSTR))) {
395 printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]);
396 return -EINVAL;
397 }
398
399 /* If we never set up a trampoline to ftrace_caller, then bail */
400 if (!rec->arch.mod->arch.tramp) {
401 printk(KERN_ERR "No ftrace trampoline\n");
402 return -EINVAL;
403 }
404
405 /* create the branch to the trampoline */
406 op[0] = create_branch((unsigned int *)ip,
407 rec->arch.mod->arch.tramp, BRANCH_SET_LINK);
408 if (!op[0]) {
409 printk(KERN_ERR "REL24 out of range!\n");
410 return -EINVAL;
411 }
412
413 /* ld r2,40(r1) */
414 op[1] = 0xe8410028;
415
416 DEBUGP("write to %lx\n", rec->ip);
417
418 if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2))
419 return -EPERM;
420
421 flush_icache_range(ip, ip + 8);
422
423 return 0;
424}
425#else
426static int
427__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
428{
429 unsigned int op;
430 unsigned long ip = rec->ip;
431
432 /* read where this goes */
433 if (probe_kernel_read(&op, (void *)ip, MCOUNT_INSN_SIZE))
434 return -EFAULT;
435
436 /* It should be pointing to a nop */
437 if (op != PPC_NOP_INSTR) {
438 printk(KERN_ERR "Expected NOP but have %x\n", op);
439 return -EINVAL;
440 }
441
442 /* If we never set up a trampoline to ftrace_caller, then bail */
443 if (!rec->arch.mod->arch.tramp) {
444 printk(KERN_ERR "No ftrace trampoline\n");
445 return -EINVAL;
446 }
447
448 /* create the branch to the trampoline */
449 op = create_branch((unsigned int *)ip,
450 rec->arch.mod->arch.tramp, BRANCH_SET_LINK);
451 if (!op) {
452 printk(KERN_ERR "REL24 out of range!\n");
453 return -EINVAL;
454 }
455
456 DEBUGP("write to %lx\n", rec->ip);
457
458 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
459 return -EPERM;
460
461 flush_icache_range(ip, ip + 8);
462
463 return 0;
464}
465#endif /* CONFIG_PPC64 */
466
467int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
468{
469 unsigned char *old, *new;
470 unsigned long ip = rec->ip;
471
472 /*
473 * If the calling address is more that 24 bits away,
474 * then we had to use a trampoline to make the call.
475 * Otherwise just update the call site.
476 */
477 if (test_24bit_addr(ip, addr)) {
478 /* within range */
479 old = ftrace_nop_replace();
480 new = ftrace_call_replace(ip, addr);
481 return ftrace_modify_code(ip, old, new);
482 }
483
484 /*
485 * Out of range jumps are called from modules.
486 * Being that we are converting from nop, it had better
487 * already have a module defined.
488 */
489 if (!rec->arch.mod) {
490 printk(KERN_ERR "No module loaded\n");
491 return -EINVAL;
492 }
493
494 return __ftrace_make_call(rec, addr);
114} 495}
115 496
116int ftrace_update_ftrace_func(ftrace_func_t func) 497int ftrace_update_ftrace_func(ftrace_func_t func)
@@ -128,10 +509,10 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
128 509
129int __init ftrace_dyn_arch_init(void *data) 510int __init ftrace_dyn_arch_init(void *data)
130{ 511{
131 /* This is running in kstop_machine */ 512 /* caller expects data to be zero */
513 unsigned long *p = data;
132 514
133 ftrace_mcount_set(data); 515 *p = 0;
134 516
135 return 0; 517 return 0;
136} 518}
137
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 0c326823c6d4..a1c4cfd25ded 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -31,6 +31,7 @@
31#include <asm/ppc_asm.h> 31#include <asm/ppc_asm.h>
32#include <asm/asm-offsets.h> 32#include <asm/asm-offsets.h>
33#include <asm/ptrace.h> 33#include <asm/ptrace.h>
34#include <asm/bug.h>
34 35
35/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ 36/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
36#define LOAD_BAT(n, reg, RA, RB) \ 37#define LOAD_BAT(n, reg, RA, RB) \
@@ -182,7 +183,8 @@ __after_mmu_off:
182 bl reloc_offset 183 bl reloc_offset
183 mr r26,r3 184 mr r26,r3
184 addis r4,r3,KERNELBASE@h /* current address of _start */ 185 addis r4,r3,KERNELBASE@h /* current address of _start */
185 cmpwi 0,r4,0 /* are we already running at 0? */ 186 lis r5,PHYSICAL_START@h
187 cmplw 0,r4,r5 /* already running at PHYSICAL_START? */
186 bne relocate_kernel 188 bne relocate_kernel
187/* 189/*
188 * we now have the 1st 16M of ram mapped with the bats. 190 * we now have the 1st 16M of ram mapped with the bats.
@@ -810,13 +812,13 @@ giveup_altivec:
810 812
811/* 813/*
812 * This code is jumped to from the startup code to copy 814 * This code is jumped to from the startup code to copy
813 * the kernel image to physical address 0. 815 * the kernel image to physical address PHYSICAL_START.
814 */ 816 */
815relocate_kernel: 817relocate_kernel:
816 addis r9,r26,klimit@ha /* fetch klimit */ 818 addis r9,r26,klimit@ha /* fetch klimit */
817 lwz r25,klimit@l(r9) 819 lwz r25,klimit@l(r9)
818 addis r25,r25,-KERNELBASE@h 820 addis r25,r25,-KERNELBASE@h
819 li r3,0 /* Destination base address */ 821 lis r3,PHYSICAL_START@h /* Destination base address */
820 li r6,0 /* Destination offset */ 822 li r6,0 /* Destination offset */
821 li r5,0x4000 /* # bytes of memory to copy */ 823 li r5,0x4000 /* # bytes of memory to copy */
822 bl copy_and_flush /* copy the first 0x4000 bytes */ 824 bl copy_and_flush /* copy the first 0x4000 bytes */
@@ -989,12 +991,12 @@ load_up_mmu:
989 LOAD_BAT(1,r3,r4,r5) 991 LOAD_BAT(1,r3,r4,r5)
990 LOAD_BAT(2,r3,r4,r5) 992 LOAD_BAT(2,r3,r4,r5)
991 LOAD_BAT(3,r3,r4,r5) 993 LOAD_BAT(3,r3,r4,r5)
992BEGIN_FTR_SECTION 994BEGIN_MMU_FTR_SECTION
993 LOAD_BAT(4,r3,r4,r5) 995 LOAD_BAT(4,r3,r4,r5)
994 LOAD_BAT(5,r3,r4,r5) 996 LOAD_BAT(5,r3,r4,r5)
995 LOAD_BAT(6,r3,r4,r5) 997 LOAD_BAT(6,r3,r4,r5)
996 LOAD_BAT(7,r3,r4,r5) 998 LOAD_BAT(7,r3,r4,r5)
997END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS) 999END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
998 blr 1000 blr
999 1001
1000/* 1002/*
@@ -1070,9 +1072,14 @@ start_here:
1070 RFI 1072 RFI
1071 1073
1072/* 1074/*
1075 * void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
1076 *
1073 * Set up the segment registers for a new context. 1077 * Set up the segment registers for a new context.
1074 */ 1078 */
1075_ENTRY(set_context) 1079_ENTRY(switch_mmu_context)
1080 lwz r3,MMCONTEXTID(r4)
1081 cmpwi cr0,r3,0
1082 blt- 4f
1076 mulli r3,r3,897 /* multiply context by skew factor */ 1083 mulli r3,r3,897 /* multiply context by skew factor */
1077 rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */ 1084 rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */
1078 addis r3,r3,0x6000 /* Set Ks, Ku bits */ 1085 addis r3,r3,0x6000 /* Set Ks, Ku bits */
@@ -1083,6 +1090,7 @@ _ENTRY(set_context)
1083 /* Context switch the PTE pointer for the Abatron BDI2000. 1090 /* Context switch the PTE pointer for the Abatron BDI2000.
1084 * The PGDIR is passed as second argument. 1091 * The PGDIR is passed as second argument.
1085 */ 1092 */
1093 lwz r4,MM_PGD(r4)
1086 lis r5, KERNELBASE@h 1094 lis r5, KERNELBASE@h
1087 lwz r5, 0xf0(r5) 1095 lwz r5, 0xf0(r5)
1088 stw r4, 0x4(r5) 1096 stw r4, 0x4(r5)
@@ -1098,6 +1106,9 @@ _ENTRY(set_context)
1098 sync 1106 sync
1099 isync 1107 isync
1100 blr 1108 blr
11094: trap
1110 EMIT_BUG_ENTRY 4b,__FILE__,__LINE__,0
1111 blr
1101 1112
1102/* 1113/*
1103 * An undocumented "feature" of 604e requires that the v bit 1114 * An undocumented "feature" of 604e requires that the v bit
@@ -1131,7 +1142,7 @@ clear_bats:
1131 mtspr SPRN_IBAT2L,r10 1142 mtspr SPRN_IBAT2L,r10
1132 mtspr SPRN_IBAT3U,r10 1143 mtspr SPRN_IBAT3U,r10
1133 mtspr SPRN_IBAT3L,r10 1144 mtspr SPRN_IBAT3L,r10
1134BEGIN_FTR_SECTION 1145BEGIN_MMU_FTR_SECTION
1135 /* Here's a tweak: at this point, CPU setup have 1146 /* Here's a tweak: at this point, CPU setup have
1136 * not been called yet, so HIGH_BAT_EN may not be 1147 * not been called yet, so HIGH_BAT_EN may not be
1137 * set in HID0 for the 745x processors. However, it 1148 * set in HID0 for the 745x processors. However, it
@@ -1154,7 +1165,7 @@ BEGIN_FTR_SECTION
1154 mtspr SPRN_IBAT6L,r10 1165 mtspr SPRN_IBAT6L,r10
1155 mtspr SPRN_IBAT7U,r10 1166 mtspr SPRN_IBAT7U,r10
1156 mtspr SPRN_IBAT7L,r10 1167 mtspr SPRN_IBAT7L,r10
1157END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS) 1168END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
1158 blr 1169 blr
1159 1170
1160flush_tlbs: 1171flush_tlbs:
@@ -1178,11 +1189,11 @@ mmu_off:
1178 1189
1179/* 1190/*
1180 * Use the first pair of BAT registers to map the 1st 16MB 1191 * Use the first pair of BAT registers to map the 1st 16MB
1181 * of RAM to KERNELBASE. From this point on we can't safely 1192 * of RAM to PAGE_OFFSET. From this point on we can't safely
1182 * call OF any more. 1193 * call OF any more.
1183 */ 1194 */
1184initial_bats: 1195initial_bats:
1185 lis r11,KERNELBASE@h 1196 lis r11,PAGE_OFFSET@h
1186 mfspr r9,SPRN_PVR 1197 mfspr r9,SPRN_PVR
1187 rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ 1198 rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
1188 cmpwi 0,r9,1 1199 cmpwi 0,r9,1
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index f3a1ea9d7fe4..b56fecc93a16 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -69,6 +69,17 @@ _ENTRY(_start);
69 li r24,0 /* CPU number */ 69 li r24,0 /* CPU number */
70 70
71/* 71/*
72 * In case the firmware didn't do it, we apply some workarounds
73 * that are good for all 440 core variants here
74 */
75 mfspr r3,SPRN_CCR0
76 rlwinm r3,r3,0,0,27 /* disable icache prefetch */
77 isync
78 mtspr SPRN_CCR0,r3
79 isync
80 sync
81
82/*
72 * Set up the initial MMU state 83 * Set up the initial MMU state
73 * 84 *
74 * We are still executing code at the virtual address 85 * We are still executing code at the virtual address
@@ -391,12 +402,14 @@ interrupt_base:
391 rlwimi r13,r12,10,30,30 402 rlwimi r13,r12,10,30,30
392 403
393 /* Load the PTE */ 404 /* Load the PTE */
394 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ 405 /* Compute pgdir/pmd offset */
406 rlwinm r12, r10, PPC44x_PGD_OFF_SHIFT, PPC44x_PGD_OFF_MASK_BIT, 29
395 lwzx r11, r12, r11 /* Get pgd/pmd entry */ 407 lwzx r11, r12, r11 /* Get pgd/pmd entry */
396 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ 408 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
397 beq 2f /* Bail if no table */ 409 beq 2f /* Bail if no table */
398 410
399 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ 411 /* Compute pte address */
412 rlwimi r12, r10, PPC44x_PTE_ADD_SHIFT, PPC44x_PTE_ADD_MASK_BIT, 28
400 lwz r11, 0(r12) /* Get high word of pte entry */ 413 lwz r11, 0(r12) /* Get high word of pte entry */
401 lwz r12, 4(r12) /* Get low word of pte entry */ 414 lwz r12, 4(r12) /* Get low word of pte entry */
402 415
@@ -485,12 +498,14 @@ tlb_44x_patch_hwater_D:
485 /* Make up the required permissions */ 498 /* Make up the required permissions */
486 li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC 499 li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC
487 500
488 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ 501 /* Compute pgdir/pmd offset */
502 rlwinm r12, r10, PPC44x_PGD_OFF_SHIFT, PPC44x_PGD_OFF_MASK_BIT, 29
489 lwzx r11, r12, r11 /* Get pgd/pmd entry */ 503 lwzx r11, r12, r11 /* Get pgd/pmd entry */
490 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ 504 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
491 beq 2f /* Bail if no table */ 505 beq 2f /* Bail if no table */
492 506
493 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ 507 /* Compute pte address */
508 rlwimi r12, r10, PPC44x_PTE_ADD_SHIFT, PPC44x_PTE_ADD_MASK_BIT, 28
494 lwz r11, 0(r12) /* Get high word of pte entry */ 509 lwz r11, 0(r12) /* Get high word of pte entry */
495 lwz r12, 4(r12) /* Get low word of pte entry */ 510 lwz r12, 4(r12) /* Get low word of pte entry */
496 511
@@ -554,15 +569,16 @@ tlb_44x_patch_hwater_I:
554 */ 569 */
555finish_tlb_load: 570finish_tlb_load:
556 /* Combine RPN & ERPN an write WS 0 */ 571 /* Combine RPN & ERPN an write WS 0 */
557 rlwimi r11,r12,0,0,19 572 rlwimi r11,r12,0,0,31-PAGE_SHIFT
558 tlbwe r11,r13,PPC44x_TLB_XLAT 573 tlbwe r11,r13,PPC44x_TLB_XLAT
559 574
560 /* 575 /*
561 * Create WS1. This is the faulting address (EPN), 576 * Create WS1. This is the faulting address (EPN),
562 * page size, and valid flag. 577 * page size, and valid flag.
563 */ 578 */
564 li r11,PPC44x_TLB_VALID | PPC44x_TLB_4K 579 li r11,PPC44x_TLB_VALID | PPC44x_TLBE_SIZE
565 rlwimi r10,r11,0,20,31 /* Insert valid and page size*/ 580 /* Insert valid and page size */
581 rlwimi r10,r11,0,PPC44x_PTE_ADD_MASK_BIT,31
566 tlbwe r10,r13,PPC44x_TLB_PAGEID /* Write PAGEID */ 582 tlbwe r10,r13,PPC44x_TLB_PAGEID /* Write PAGEID */
567 583
568 /* And WS 2 */ 584 /* And WS 2 */
@@ -634,12 +650,12 @@ _GLOBAL(set_context)
634 * goes at the beginning of the data segment, which is page-aligned. 650 * goes at the beginning of the data segment, which is page-aligned.
635 */ 651 */
636 .data 652 .data
637 .align 12 653 .align PAGE_SHIFT
638 .globl sdata 654 .globl sdata
639sdata: 655sdata:
640 .globl empty_zero_page 656 .globl empty_zero_page
641empty_zero_page: 657empty_zero_page:
642 .space 4096 658 .space PAGE_SIZE
643 659
644/* 660/*
645 * To support >32-bit physical addresses, we use an 8KB pgdir. 661 * To support >32-bit physical addresses, we use an 8KB pgdir.
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 590304c24dad..11b549acc034 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -92,6 +92,7 @@ _ENTRY(_start);
92 * if needed 92 * if needed
93 */ 93 */
94 94
95_ENTRY(__early_start)
95/* 1. Find the index of the entry we're executing in */ 96/* 1. Find the index of the entry we're executing in */
96 bl invstr /* Find our address */ 97 bl invstr /* Find our address */
97invstr: mflr r6 /* Make it accessible */ 98invstr: mflr r6 /* Make it accessible */
@@ -235,36 +236,40 @@ skpinv: addi r6,r6,1 /* Increment */
235 tlbivax 0,r9 236 tlbivax 0,r9
236 TLBSYNC 237 TLBSYNC
237 238
239/* The mapping only needs to be cache-coherent on SMP */
240#ifdef CONFIG_SMP
241#define M_IF_SMP MAS2_M
242#else
243#define M_IF_SMP 0
244#endif
245
238/* 6. Setup KERNELBASE mapping in TLB1[0] */ 246/* 6. Setup KERNELBASE mapping in TLB1[0] */
239 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ 247 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
240 mtspr SPRN_MAS0,r6 248 mtspr SPRN_MAS0,r6
241 lis r6,(MAS1_VALID|MAS1_IPROT)@h 249 lis r6,(MAS1_VALID|MAS1_IPROT)@h
242 ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l 250 ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
243 mtspr SPRN_MAS1,r6 251 mtspr SPRN_MAS1,r6
244 li r7,0 252 lis r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@h
245 lis r6,PAGE_OFFSET@h 253 ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@l
246 ori r6,r6,PAGE_OFFSET@l
247 rlwimi r6,r7,0,20,31
248 mtspr SPRN_MAS2,r6 254 mtspr SPRN_MAS2,r6
249 mtspr SPRN_MAS3,r8 255 mtspr SPRN_MAS3,r8
250 tlbwe 256 tlbwe
251 257
252/* 7. Jump to KERNELBASE mapping */ 258/* 7. Jump to KERNELBASE mapping */
253 lis r6,KERNELBASE@h 259 lis r6,(KERNELBASE & ~0xfff)@h
254 ori r6,r6,KERNELBASE@l 260 ori r6,r6,(KERNELBASE & ~0xfff)@l
255 rlwimi r6,r7,0,20,31
256 lis r7,MSR_KERNEL@h 261 lis r7,MSR_KERNEL@h
257 ori r7,r7,MSR_KERNEL@l 262 ori r7,r7,MSR_KERNEL@l
258 bl 1f /* Find our address */ 263 bl 1f /* Find our address */
2591: mflr r9 2641: mflr r9
260 rlwimi r6,r9,0,20,31 265 rlwimi r6,r9,0,20,31
261 addi r6,r6,24 266 addi r6,r6,(2f - 1b)
262 mtspr SPRN_SRR0,r6 267 mtspr SPRN_SRR0,r6
263 mtspr SPRN_SRR1,r7 268 mtspr SPRN_SRR1,r7
264 rfi /* start execution out of TLB1[0] entry */ 269 rfi /* start execution out of TLB1[0] entry */
265 270
266/* 8. Clear out the temp mapping */ 271/* 8. Clear out the temp mapping */
267 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ 2722: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
268 rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ 273 rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
269 mtspr SPRN_MAS0,r7 274 mtspr SPRN_MAS0,r7
270 tlbre 275 tlbre
@@ -344,6 +349,15 @@ skpinv: addi r6,r6,1 /* Increment */
344 mtspr SPRN_DBSR,r2 349 mtspr SPRN_DBSR,r2
345#endif 350#endif
346 351
352#ifdef CONFIG_SMP
353 /* Check to see if we're the second processor, and jump
354 * to the secondary_start code if so
355 */
356 mfspr r24,SPRN_PIR
357 cmpwi r24,0
358 bne __secondary_start
359#endif
360
347 /* 361 /*
348 * This is where the main kernel code starts. 362 * This is where the main kernel code starts.
349 */ 363 */
@@ -685,12 +699,13 @@ interrupt_base:
685 /* SPE Floating Point Data */ 699 /* SPE Floating Point Data */
686#ifdef CONFIG_SPE 700#ifdef CONFIG_SPE
687 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE); 701 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
688#else
689 EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
690#endif /* CONFIG_SPE */
691 702
692 /* SPE Floating Point Round */ 703 /* SPE Floating Point Round */
704 EXCEPTION(0x2050, SPEFloatingPointRound, SPEFloatingPointRoundException, EXC_XFER_EE)
705#else
706 EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
693 EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE) 707 EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
708#endif /* CONFIG_SPE */
694 709
695 /* Performance Monitor */ 710 /* Performance Monitor */
696 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) 711 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
@@ -735,6 +750,9 @@ finish_tlb_load:
735#else 750#else
736 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */ 751 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
737#endif 752#endif
753#ifdef CONFIG_SMP
754 ori r12, r12, MAS2_M
755#endif
738 mtspr SPRN_MAS2, r12 756 mtspr SPRN_MAS2, r12
739 757
740 li r10, (_PAGE_HWEXEC | _PAGE_PRESENT) 758 li r10, (_PAGE_HWEXEC | _PAGE_PRESENT)
@@ -746,15 +764,15 @@ finish_tlb_load:
746 iseleq r12, r12, r10 764 iseleq r12, r12, r10
747 765
748#ifdef CONFIG_PTE_64BIT 766#ifdef CONFIG_PTE_64BIT
7492: rlwimi r12, r13, 24, 0, 7 /* grab RPN[32:39] */ 767 rlwimi r12, r13, 24, 0, 7 /* grab RPN[32:39] */
750 rlwimi r12, r11, 24, 8, 19 /* grab RPN[40:51] */ 768 rlwimi r12, r11, 24, 8, 19 /* grab RPN[40:51] */
751 mtspr SPRN_MAS3, r12 769 mtspr SPRN_MAS3, r12
752BEGIN_FTR_SECTION 770BEGIN_MMU_FTR_SECTION
753 srwi r10, r13, 8 /* grab RPN[8:31] */ 771 srwi r10, r13, 8 /* grab RPN[8:31] */
754 mtspr SPRN_MAS7, r10 772 mtspr SPRN_MAS7, r10
755END_FTR_SECTION_IFSET(CPU_FTR_BIG_PHYS) 773END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
756#else 774#else
7572: rlwimi r11, r12, 0, 20, 31 /* Extract RPN from PTE and merge with perms */ 775 rlwimi r11, r12, 0, 20, 31 /* Extract RPN from PTE and merge with perms */
758 mtspr SPRN_MAS3, r11 776 mtspr SPRN_MAS3, r11
759#endif 777#endif
760#ifdef CONFIG_E200 778#ifdef CONFIG_E200
@@ -1037,6 +1055,63 @@ _GLOBAL(flush_dcache_L1)
1037 1055
1038 blr 1056 blr
1039 1057
1058#ifdef CONFIG_SMP
1059/* When we get here, r24 needs to hold the CPU # */
1060 .globl __secondary_start
1061__secondary_start:
1062 lis r3,__secondary_hold_acknowledge@h
1063 ori r3,r3,__secondary_hold_acknowledge@l
1064 stw r24,0(r3)
1065
1066 li r3,0
1067 mr r4,r24 /* Why? */
1068 bl call_setup_cpu
1069
1070 lis r3,tlbcam_index@ha
1071 lwz r3,tlbcam_index@l(r3)
1072 mtctr r3
1073 li r26,0 /* r26 safe? */
1074
1075 /* Load each CAM entry */
10761: mr r3,r26
1077 bl loadcam_entry
1078 addi r26,r26,1
1079 bdnz 1b
1080
1081 /* get current_thread_info and current */
1082 lis r1,secondary_ti@ha
1083 lwz r1,secondary_ti@l(r1)
1084 lwz r2,TI_TASK(r1)
1085
1086 /* stack */
1087 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
1088 li r0,0
1089 stw r0,0(r1)
1090
1091 /* ptr to current thread */
1092 addi r4,r2,THREAD /* address of our thread_struct */
1093 mtspr SPRN_SPRG3,r4
1094
1095 /* Setup the defaults for TLB entries */
1096 li r4,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
1097 mtspr SPRN_MAS4,r4
1098
1099 /* Jump to start_secondary */
1100 lis r4,MSR_KERNEL@h
1101 ori r4,r4,MSR_KERNEL@l
1102 lis r3,start_secondary@h
1103 ori r3,r3,start_secondary@l
1104 mtspr SPRN_SRR0,r3
1105 mtspr SPRN_SRR1,r4
1106 sync
1107 rfi
1108 sync
1109
1110 .globl __secondary_hold_acknowledge
1111__secondary_hold_acknowledge:
1112 .long -1
1113#endif
1114
1040/* 1115/*
1041 * We put a few things here that have to be page-aligned. This stuff 1116 * We put a few things here that have to be page-aligned. This stuff
1042 * goes at the beginning of the data segment, which is page-aligned. 1117 * goes at the beginning of the data segment, which is page-aligned.
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 64299d28f364..6e3f62493659 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -47,7 +47,7 @@
47#include <asm/abs_addr.h> 47#include <asm/abs_addr.h>
48 48
49static struct device ibmebus_bus_device = { /* fake "parent" device */ 49static struct device ibmebus_bus_device = { /* fake "parent" device */
50 .bus_id = "ibmebus", 50 .init_name = "ibmebus",
51}; 51};
52 52
53struct bus_type ibmebus_bus_type; 53struct bus_type ibmebus_bus_type;
@@ -231,6 +231,7 @@ void ibmebus_free_irq(u32 ist, void *dev_id)
231 unsigned int irq = irq_find_mapping(NULL, ist); 231 unsigned int irq = irq_find_mapping(NULL, ist);
232 232
233 free_irq(irq, dev_id); 233 free_irq(irq, dev_id);
234 irq_dispose_mapping(irq);
234} 235}
235EXPORT_SYMBOL(ibmebus_free_irq); 236EXPORT_SYMBOL(ibmebus_free_irq);
236 237
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 31982d05d81a..88d9c1d5e5fb 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -69,10 +69,15 @@ void cpu_idle(void)
69 smp_mb(); 69 smp_mb();
70 local_irq_disable(); 70 local_irq_disable();
71 71
72 /* Don't trace irqs off for idle */
73 stop_critical_timings();
74
72 /* check again after disabling irqs */ 75 /* check again after disabling irqs */
73 if (!need_resched() && !cpu_should_die()) 76 if (!need_resched() && !cpu_should_die())
74 ppc_md.power_save(); 77 ppc_md.power_save();
75 78
79 start_critical_timings();
80
76 local_irq_enable(); 81 local_irq_enable();
77 set_thread_flag(TIF_POLLING_NRFLAG); 82 set_thread_flag(TIF_POLLING_NRFLAG);
78 83
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index ac2a21f45c75..b3abebb7ee64 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -13,13 +13,17 @@
13#include <linux/reboot.h> 13#include <linux/reboot.h>
14#include <linux/threads.h> 14#include <linux/threads.h>
15#include <linux/lmb.h> 15#include <linux/lmb.h>
16#include <linux/of.h>
16#include <asm/machdep.h> 17#include <asm/machdep.h>
17#include <asm/prom.h> 18#include <asm/prom.h>
19#include <asm/sections.h>
18 20
19void machine_crash_shutdown(struct pt_regs *regs) 21void machine_crash_shutdown(struct pt_regs *regs)
20{ 22{
21 if (ppc_md.machine_crash_shutdown) 23 if (ppc_md.machine_crash_shutdown)
22 ppc_md.machine_crash_shutdown(regs); 24 ppc_md.machine_crash_shutdown(regs);
25 else
26 default_machine_crash_shutdown(regs);
23} 27}
24 28
25/* 29/*
@@ -31,11 +35,8 @@ int machine_kexec_prepare(struct kimage *image)
31{ 35{
32 if (ppc_md.machine_kexec_prepare) 36 if (ppc_md.machine_kexec_prepare)
33 return ppc_md.machine_kexec_prepare(image); 37 return ppc_md.machine_kexec_prepare(image);
34 /* 38 else
35 * Fail if platform doesn't provide its own machine_kexec_prepare 39 return default_machine_kexec_prepare(image);
36 * implementation.
37 */
38 return -ENOSYS;
39} 40}
40 41
41void machine_kexec_cleanup(struct kimage *image) 42void machine_kexec_cleanup(struct kimage *image)
@@ -52,13 +53,11 @@ void machine_kexec(struct kimage *image)
52{ 53{
53 if (ppc_md.machine_kexec) 54 if (ppc_md.machine_kexec)
54 ppc_md.machine_kexec(image); 55 ppc_md.machine_kexec(image);
55 else { 56 else
56 /* 57 default_machine_kexec(image);
57 * Fall back to normal restart if platform doesn't provide 58
58 * its own kexec function, and user insist to kexec... 59 /* Fall back to normal restart if we're still alive. */
59 */ 60 machine_restart(NULL);
60 machine_restart(NULL);
61 }
62 for(;;); 61 for(;;);
63} 62}
64 63
@@ -118,3 +117,71 @@ int overlaps_crashkernel(unsigned long start, unsigned long size)
118{ 117{
119 return (start + size) > crashk_res.start && start <= crashk_res.end; 118 return (start + size) > crashk_res.start && start <= crashk_res.end;
120} 119}
120
121/* Values we need to export to the second kernel via the device tree. */
122static unsigned long kernel_end;
123static unsigned long crashk_size;
124
125static struct property kernel_end_prop = {
126 .name = "linux,kernel-end",
127 .length = sizeof(unsigned long),
128 .value = &kernel_end,
129};
130
131static struct property crashk_base_prop = {
132 .name = "linux,crashkernel-base",
133 .length = sizeof(unsigned long),
134 .value = &crashk_res.start,
135};
136
137static struct property crashk_size_prop = {
138 .name = "linux,crashkernel-size",
139 .length = sizeof(unsigned long),
140 .value = &crashk_size,
141};
142
143static void __init export_crashk_values(struct device_node *node)
144{
145 struct property *prop;
146
147 /* There might be existing crash kernel properties, but we can't
148 * be sure what's in them, so remove them. */
149 prop = of_find_property(node, "linux,crashkernel-base", NULL);
150 if (prop)
151 prom_remove_property(node, prop);
152
153 prop = of_find_property(node, "linux,crashkernel-size", NULL);
154 if (prop)
155 prom_remove_property(node, prop);
156
157 if (crashk_res.start != 0) {
158 prom_add_property(node, &crashk_base_prop);
159 crashk_size = crashk_res.end - crashk_res.start + 1;
160 prom_add_property(node, &crashk_size_prop);
161 }
162}
163
164static int __init kexec_setup(void)
165{
166 struct device_node *node;
167 struct property *prop;
168
169 node = of_find_node_by_path("/chosen");
170 if (!node)
171 return -ENOENT;
172
173 /* remove any stale properties so ours can be found */
174 prop = of_find_property(node, kernel_end_prop.name, NULL);
175 if (prop)
176 prom_remove_property(node, prop);
177
178 /* information needed by userspace when using default_machine_kexec */
179 kernel_end = __pa(_end);
180 prom_add_property(node, &kernel_end_prop);
181
182 export_crashk_values(node);
183
184 of_node_put(node);
185 return 0;
186}
187late_initcall(kexec_setup);
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 3c4ca046e854..49e705fcee6d 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -289,7 +289,7 @@ void default_machine_kexec(struct kimage *image)
289} 289}
290 290
291/* Values we need to export to the second kernel via the device tree. */ 291/* Values we need to export to the second kernel via the device tree. */
292static unsigned long htab_base, kernel_end; 292static unsigned long htab_base;
293 293
294static struct property htab_base_prop = { 294static struct property htab_base_prop = {
295 .name = "linux,htab-base", 295 .name = "linux,htab-base",
@@ -303,25 +303,20 @@ static struct property htab_size_prop = {
303 .value = &htab_size_bytes, 303 .value = &htab_size_bytes,
304}; 304};
305 305
306static struct property kernel_end_prop = { 306static int __init export_htab_values(void)
307 .name = "linux,kernel-end",
308 .length = sizeof(unsigned long),
309 .value = &kernel_end,
310};
311
312static void __init export_htab_values(void)
313{ 307{
314 struct device_node *node; 308 struct device_node *node;
315 struct property *prop; 309 struct property *prop;
316 310
311 /* On machines with no htab htab_address is NULL */
312 if (!htab_address)
313 return -ENODEV;
314
317 node = of_find_node_by_path("/chosen"); 315 node = of_find_node_by_path("/chosen");
318 if (!node) 316 if (!node)
319 return; 317 return -ENODEV;
320 318
321 /* remove any stale propertys so ours can be found */ 319 /* remove any stale propertys so ours can be found */
322 prop = of_find_property(node, kernel_end_prop.name, NULL);
323 if (prop)
324 prom_remove_property(node, prop);
325 prop = of_find_property(node, htab_base_prop.name, NULL); 320 prop = of_find_property(node, htab_base_prop.name, NULL);
326 if (prop) 321 if (prop)
327 prom_remove_property(node, prop); 322 prom_remove_property(node, prop);
@@ -329,68 +324,11 @@ static void __init export_htab_values(void)
329 if (prop) 324 if (prop)
330 prom_remove_property(node, prop); 325 prom_remove_property(node, prop);
331 326
332 /* information needed by userspace when using default_machine_kexec */
333 kernel_end = __pa(_end);
334 prom_add_property(node, &kernel_end_prop);
335
336 /* On machines with no htab htab_address is NULL */
337 if (NULL == htab_address)
338 goto out;
339
340 htab_base = __pa(htab_address); 327 htab_base = __pa(htab_address);
341 prom_add_property(node, &htab_base_prop); 328 prom_add_property(node, &htab_base_prop);
342 prom_add_property(node, &htab_size_prop); 329 prom_add_property(node, &htab_size_prop);
343 330
344 out:
345 of_node_put(node);
346}
347
348static struct property crashk_base_prop = {
349 .name = "linux,crashkernel-base",
350 .length = sizeof(unsigned long),
351 .value = &crashk_res.start,
352};
353
354static unsigned long crashk_size;
355
356static struct property crashk_size_prop = {
357 .name = "linux,crashkernel-size",
358 .length = sizeof(unsigned long),
359 .value = &crashk_size,
360};
361
362static void __init export_crashk_values(void)
363{
364 struct device_node *node;
365 struct property *prop;
366
367 node = of_find_node_by_path("/chosen");
368 if (!node)
369 return;
370
371 /* There might be existing crash kernel properties, but we can't
372 * be sure what's in them, so remove them. */
373 prop = of_find_property(node, "linux,crashkernel-base", NULL);
374 if (prop)
375 prom_remove_property(node, prop);
376
377 prop = of_find_property(node, "linux,crashkernel-size", NULL);
378 if (prop)
379 prom_remove_property(node, prop);
380
381 if (crashk_res.start != 0) {
382 prom_add_property(node, &crashk_base_prop);
383 crashk_size = crashk_res.end - crashk_res.start + 1;
384 prom_add_property(node, &crashk_size_prop);
385 }
386
387 of_node_put(node); 331 of_node_put(node);
388}
389
390static int __init kexec_setup(void)
391{
392 export_htab_values();
393 export_crashk_values();
394 return 0; 332 return 0;
395} 333}
396__initcall(kexec_setup); 334late_initcall(export_htab_values);
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index bdc8b0e860e5..15f28e0de78d 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -29,6 +29,7 @@
29#include <asm/asm-offsets.h> 29#include <asm/asm-offsets.h>
30#include <asm/processor.h> 30#include <asm/processor.h>
31#include <asm/kexec.h> 31#include <asm/kexec.h>
32#include <asm/bug.h>
32 33
33 .text 34 .text
34 35
@@ -271,228 +272,6 @@ _GLOBAL(real_writeb)
271 272
272#endif /* CONFIG_40x */ 273#endif /* CONFIG_40x */
273 274
274/*
275 * Flush MMU TLB
276 */
277#ifndef CONFIG_FSL_BOOKE
278_GLOBAL(_tlbil_all)
279_GLOBAL(_tlbil_pid)
280#endif
281_GLOBAL(_tlbia)
282#if defined(CONFIG_40x)
283 sync /* Flush to memory before changing mapping */
284 tlbia
285 isync /* Flush shadow TLB */
286#elif defined(CONFIG_44x)
287 li r3,0
288 sync
289
290 /* Load high watermark */
291 lis r4,tlb_44x_hwater@ha
292 lwz r5,tlb_44x_hwater@l(r4)
293
2941: tlbwe r3,r3,PPC44x_TLB_PAGEID
295 addi r3,r3,1
296 cmpw 0,r3,r5
297 ble 1b
298
299 isync
300#elif defined(CONFIG_FSL_BOOKE)
301 /* Invalidate all entries in TLB0 */
302 li r3, 0x04
303 tlbivax 0,3
304 /* Invalidate all entries in TLB1 */
305 li r3, 0x0c
306 tlbivax 0,3
307 msync
308#ifdef CONFIG_SMP
309 tlbsync
310#endif /* CONFIG_SMP */
311#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
312#if defined(CONFIG_SMP)
313 rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
314 lwz r8,TI_CPU(r8)
315 oris r8,r8,10
316 mfmsr r10
317 SYNC
318 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
319 rlwinm r0,r0,0,28,26 /* clear DR */
320 mtmsr r0
321 SYNC_601
322 isync
323 lis r9,mmu_hash_lock@h
324 ori r9,r9,mmu_hash_lock@l
325 tophys(r9,r9)
32610: lwarx r7,0,r9
327 cmpwi 0,r7,0
328 bne- 10b
329 stwcx. r8,0,r9
330 bne- 10b
331 sync
332 tlbia
333 sync
334 TLBSYNC
335 li r0,0
336 stw r0,0(r9) /* clear mmu_hash_lock */
337 mtmsr r10
338 SYNC_601
339 isync
340#else /* CONFIG_SMP */
341 sync
342 tlbia
343 sync
344#endif /* CONFIG_SMP */
345#endif /* ! defined(CONFIG_40x) */
346 blr
347
348/*
349 * Flush MMU TLB for a particular address
350 */
351#ifndef CONFIG_FSL_BOOKE
352_GLOBAL(_tlbil_va)
353#endif
354_GLOBAL(_tlbie)
355#if defined(CONFIG_40x)
356 /* We run the search with interrupts disabled because we have to change
357 * the PID and I don't want to preempt when that happens.
358 */
359 mfmsr r5
360 mfspr r6,SPRN_PID
361 wrteei 0
362 mtspr SPRN_PID,r4
363 tlbsx. r3, 0, r3
364 mtspr SPRN_PID,r6
365 wrtee r5
366 bne 10f
367 sync
368 /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
369 * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate
370 * the TLB entry. */
371 tlbwe r3, r3, TLB_TAG
372 isync
37310:
374
375#elif defined(CONFIG_44x)
376 mfspr r5,SPRN_MMUCR
377 rlwimi r5,r4,0,24,31 /* Set TID */
378
379 /* We have to run the search with interrupts disabled, even critical
380 * and debug interrupts (in fact the only critical exceptions we have
381 * are debug and machine check). Otherwise an interrupt which causes
382 * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
383 mfmsr r4
384 lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
385 addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
386 andc r6,r4,r6
387 mtmsr r6
388 mtspr SPRN_MMUCR,r5
389 tlbsx. r3, 0, r3
390 mtmsr r4
391 bne 10f
392 sync
393 /* There are only 64 TLB entries, so r3 < 64,
394 * which means bit 22, is clear. Since 22 is
395 * the V bit in the TLB_PAGEID, loading this
396 * value will invalidate the TLB entry.
397 */
398 tlbwe r3, r3, PPC44x_TLB_PAGEID
399 isync
40010:
401#elif defined(CONFIG_FSL_BOOKE)
402 rlwinm r4, r3, 0, 0, 19
403 ori r5, r4, 0x08 /* TLBSEL = 1 */
404 tlbivax 0, r4
405 tlbivax 0, r5
406 msync
407#if defined(CONFIG_SMP)
408 tlbsync
409#endif /* CONFIG_SMP */
410#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
411#if defined(CONFIG_SMP)
412 rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
413 lwz r8,TI_CPU(r8)
414 oris r8,r8,11
415 mfmsr r10
416 SYNC
417 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
418 rlwinm r0,r0,0,28,26 /* clear DR */
419 mtmsr r0
420 SYNC_601
421 isync
422 lis r9,mmu_hash_lock@h
423 ori r9,r9,mmu_hash_lock@l
424 tophys(r9,r9)
42510: lwarx r7,0,r9
426 cmpwi 0,r7,0
427 bne- 10b
428 stwcx. r8,0,r9
429 bne- 10b
430 eieio
431 tlbie r3
432 sync
433 TLBSYNC
434 li r0,0
435 stw r0,0(r9) /* clear mmu_hash_lock */
436 mtmsr r10
437 SYNC_601
438 isync
439#else /* CONFIG_SMP */
440 tlbie r3
441 sync
442#endif /* CONFIG_SMP */
443#endif /* ! CONFIG_40x */
444 blr
445
446#if defined(CONFIG_FSL_BOOKE)
447/*
448 * Flush MMU TLB, but only on the local processor (no broadcast)
449 */
450_GLOBAL(_tlbil_all)
451#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
452 MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
453 li r3,(MMUCSR0_TLBFI)@l
454 mtspr SPRN_MMUCSR0, r3
4551:
456 mfspr r3,SPRN_MMUCSR0
457 andi. r3,r3,MMUCSR0_TLBFI@l
458 bne 1b
459 blr
460
461/*
462 * Flush MMU TLB for a particular process id, but only on the local processor
463 * (no broadcast)
464 */
465_GLOBAL(_tlbil_pid)
466/* we currently do an invalidate all since we don't have per pid invalidate */
467 li r3,(MMUCSR0_TLBFI)@l
468 mtspr SPRN_MMUCSR0, r3
4691:
470 mfspr r3,SPRN_MMUCSR0
471 andi. r3,r3,MMUCSR0_TLBFI@l
472 bne 1b
473 msync
474 isync
475 blr
476
477/*
478 * Flush MMU TLB for a particular address, but only on the local processor
479 * (no broadcast)
480 */
481_GLOBAL(_tlbil_va)
482 slwi r4,r4,16
483 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
484 tlbsx 0,r3
485 mfspr r4,SPRN_MAS1 /* check valid */
486 andis. r3,r4,MAS1_VALID@h
487 beqlr
488 rlwinm r4,r4,0,1,31
489 mtspr SPRN_MAS1,r4
490 tlbwe
491 msync
492 isync
493 blr
494#endif /* CONFIG_FSL_BOOKE */
495
496 275
497/* 276/*
498 * Flush instruction cache. 277 * Flush instruction cache.
@@ -647,8 +426,8 @@ _GLOBAL(__flush_dcache_icache)
647BEGIN_FTR_SECTION 426BEGIN_FTR_SECTION
648 blr 427 blr
649END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) 428END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
650 rlwinm r3,r3,0,0,19 /* Get page base address */ 429 rlwinm r3,r3,0,0,31-PAGE_SHIFT /* Get page base address */
651 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ 430 li r4,PAGE_SIZE/L1_CACHE_BYTES /* Number of lines in a page */
652 mtctr r4 431 mtctr r4
653 mr r6,r3 432 mr r6,r3
6540: dcbst 0,r3 /* Write line to ram */ 4330: dcbst 0,r3 /* Write line to ram */
@@ -688,8 +467,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
688 rlwinm r0,r10,0,28,26 /* clear DR */ 467 rlwinm r0,r10,0,28,26 /* clear DR */
689 mtmsr r0 468 mtmsr r0
690 isync 469 isync
691 rlwinm r3,r3,0,0,19 /* Get page base address */ 470 rlwinm r3,r3,0,0,31-PAGE_SHIFT /* Get page base address */
692 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ 471 li r4,PAGE_SIZE/L1_CACHE_BYTES /* Number of lines in a page */
693 mtctr r4 472 mtctr r4
694 mr r6,r3 473 mr r6,r3
6950: dcbst 0,r3 /* Write line to ram */ 4740: dcbst 0,r3 /* Write line to ram */
@@ -713,7 +492,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
713 * void clear_pages(void *page, int order) ; 492 * void clear_pages(void *page, int order) ;
714 */ 493 */
715_GLOBAL(clear_pages) 494_GLOBAL(clear_pages)
716 li r0,4096/L1_CACHE_BYTES 495 li r0,PAGE_SIZE/L1_CACHE_BYTES
717 slw r0,r0,r4 496 slw r0,r0,r4
718 mtctr r0 497 mtctr r0
719#ifdef CONFIG_8xx 498#ifdef CONFIG_8xx
@@ -771,7 +550,7 @@ _GLOBAL(copy_page)
771 dcbt r5,r4 550 dcbt r5,r4
772 li r11,L1_CACHE_BYTES+4 551 li r11,L1_CACHE_BYTES+4
773#endif /* MAX_COPY_PREFETCH */ 552#endif /* MAX_COPY_PREFETCH */
774 li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH 553 li r0,PAGE_SIZE/L1_CACHE_BYTES - MAX_COPY_PREFETCH
775 crclr 4*cr0+eq 554 crclr 4*cr0+eq
7762: 5552:
777 mtctr r0 556 mtctr r0
diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c
index 7ff292475269..43e7e3a7f130 100644
--- a/arch/powerpc/kernel/module.c
+++ b/arch/powerpc/kernel/module.c
@@ -78,6 +78,12 @@ int module_finalize(const Elf_Ehdr *hdr,
78 (void *)sect->sh_addr, 78 (void *)sect->sh_addr,
79 (void *)sect->sh_addr + sect->sh_size); 79 (void *)sect->sh_addr + sect->sh_size);
80 80
81 sect = find_section(hdr, sechdrs, "__mmu_ftr_fixup");
82 if (sect != NULL)
83 do_feature_fixups(cur_cpu_spec->mmu_features,
84 (void *)sect->sh_addr,
85 (void *)sect->sh_addr + sect->sh_size);
86
81#ifdef CONFIG_PPC64 87#ifdef CONFIG_PPC64
82 sect = find_section(hdr, sechdrs, "__fw_ftr_fixup"); 88 sect = find_section(hdr, sechdrs, "__fw_ftr_fixup");
83 if (sect != NULL) 89 if (sect != NULL)
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index 2df91a03462a..f832773fc28e 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -22,6 +22,7 @@
22#include <linux/fs.h> 22#include <linux/fs.h>
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/ftrace.h>
25#include <linux/cache.h> 26#include <linux/cache.h>
26#include <linux/bug.h> 27#include <linux/bug.h>
27#include <linux/sort.h> 28#include <linux/sort.h>
@@ -53,6 +54,9 @@ static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num)
53 r_addend = rela[i].r_addend; 54 r_addend = rela[i].r_addend;
54 } 55 }
55 56
57#ifdef CONFIG_DYNAMIC_FTRACE
58 _count_relocs++; /* add one for ftrace_caller */
59#endif
56 return _count_relocs; 60 return _count_relocs;
57} 61}
58 62
@@ -306,5 +310,11 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
306 return -ENOEXEC; 310 return -ENOEXEC;
307 } 311 }
308 } 312 }
313#ifdef CONFIG_DYNAMIC_FTRACE
314 module->arch.tramp =
315 do_plt_call(module->module_core,
316 (unsigned long)ftrace_caller,
317 sechdrs, module);
318#endif
309 return 0; 319 return 0;
310} 320}
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 1af2377e4992..8992b031a7b6 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -20,6 +20,7 @@
20#include <linux/moduleloader.h> 20#include <linux/moduleloader.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/vmalloc.h> 22#include <linux/vmalloc.h>
23#include <linux/ftrace.h>
23#include <linux/bug.h> 24#include <linux/bug.h>
24#include <asm/module.h> 25#include <asm/module.h>
25#include <asm/firmware.h> 26#include <asm/firmware.h>
@@ -163,6 +164,11 @@ static unsigned long get_stubs_size(const Elf64_Ehdr *hdr,
163 } 164 }
164 } 165 }
165 166
167#ifdef CONFIG_DYNAMIC_FTRACE
168 /* make the trampoline to the ftrace_caller */
169 relocs++;
170#endif
171
166 DEBUGP("Looks like a total of %lu stubs, max\n", relocs); 172 DEBUGP("Looks like a total of %lu stubs, max\n", relocs);
167 return relocs * sizeof(struct ppc64_stub_entry); 173 return relocs * sizeof(struct ppc64_stub_entry);
168} 174}
@@ -441,5 +447,12 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
441 } 447 }
442 } 448 }
443 449
450#ifdef CONFIG_DYNAMIC_FTRACE
451 me->arch.toc = my_r2(sechdrs, me);
452 me->arch.tramp = stub_for_addr(sechdrs,
453 (unsigned long)ftrace_caller,
454 me);
455#endif
456
444 return 0; 457 return 0;
445} 458}
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index f3c9cae01dd5..fa983a59c4ce 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -14,7 +14,6 @@ static void of_device_make_bus_id(struct of_device *dev)
14{ 14{
15 static atomic_t bus_no_reg_magic; 15 static atomic_t bus_no_reg_magic;
16 struct device_node *node = dev->node; 16 struct device_node *node = dev->node;
17 char *name = dev->dev.bus_id;
18 const u32 *reg; 17 const u32 *reg;
19 u64 addr; 18 u64 addr;
20 int magic; 19 int magic;
@@ -27,14 +26,12 @@ static void of_device_make_bus_id(struct of_device *dev)
27 reg = of_get_property(node, "dcr-reg", NULL); 26 reg = of_get_property(node, "dcr-reg", NULL);
28 if (reg) { 27 if (reg) {
29#ifdef CONFIG_PPC_DCR_NATIVE 28#ifdef CONFIG_PPC_DCR_NATIVE
30 snprintf(name, BUS_ID_SIZE, "d%x.%s", 29 dev_set_name(&dev->dev, "d%x.%s", *reg, node->name);
31 *reg, node->name);
32#else /* CONFIG_PPC_DCR_NATIVE */ 30#else /* CONFIG_PPC_DCR_NATIVE */
33 addr = of_translate_dcr_address(node, *reg, NULL); 31 addr = of_translate_dcr_address(node, *reg, NULL);
34 if (addr != OF_BAD_ADDR) { 32 if (addr != OF_BAD_ADDR) {
35 snprintf(name, BUS_ID_SIZE, 33 dev_set_name(&dev->dev, "D%llx.%s",
36 "D%llx.%s", (unsigned long long)addr, 34 (unsigned long long)addr, node->name);
37 node->name);
38 return; 35 return;
39 } 36 }
40#endif /* !CONFIG_PPC_DCR_NATIVE */ 37#endif /* !CONFIG_PPC_DCR_NATIVE */
@@ -48,9 +45,8 @@ static void of_device_make_bus_id(struct of_device *dev)
48 if (reg) { 45 if (reg) {
49 addr = of_translate_address(node, reg); 46 addr = of_translate_address(node, reg);
50 if (addr != OF_BAD_ADDR) { 47 if (addr != OF_BAD_ADDR) {
51 snprintf(name, BUS_ID_SIZE, 48 dev_set_name(&dev->dev, "%llx.%s",
52 "%llx.%s", (unsigned long long)addr, 49 (unsigned long long)addr, node->name);
53 node->name);
54 return; 50 return;
55 } 51 }
56 } 52 }
@@ -60,7 +56,7 @@ static void of_device_make_bus_id(struct of_device *dev)
60 * counter (and pray...) 56 * counter (and pray...)
61 */ 57 */
62 magic = atomic_add_return(1, &bus_no_reg_magic); 58 magic = atomic_add_return(1, &bus_no_reg_magic);
63 snprintf(name, BUS_ID_SIZE, "%s.%d", node->name, magic - 1); 59 dev_set_name(&dev->dev, "%s.%d", node->name, magic - 1);
64} 60}
65 61
66struct of_device *of_device_alloc(struct device_node *np, 62struct of_device *of_device_alloc(struct device_node *np,
@@ -80,7 +76,7 @@ struct of_device *of_device_alloc(struct device_node *np,
80 dev->dev.archdata.of_node = np; 76 dev->dev.archdata.of_node = np;
81 77
82 if (bus_id) 78 if (bus_id)
83 strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE); 79 dev_set_name(&dev->dev, bus_id);
84 else 80 else
85 of_device_make_bus_id(dev); 81 of_device_make_bus_id(dev);
86 82
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 48a347133f41..c744b327bcab 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -37,6 +37,7 @@ struct lppaca lppaca[] = {
37 .end_of_quantum = 0xfffffffffffffffful, 37 .end_of_quantum = 0xfffffffffffffffful,
38 .slb_count = 64, 38 .slb_count = 64,
39 .vmxregs_in_use = 0, 39 .vmxregs_in_use = 0,
40 .page_ins = 0,
40 }, 41 },
41}; 42};
42 43
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index f36936d9fda3..2538030954d8 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -37,13 +37,7 @@
37#include <asm/machdep.h> 37#include <asm/machdep.h>
38#include <asm/ppc-pci.h> 38#include <asm/ppc-pci.h>
39#include <asm/firmware.h> 39#include <asm/firmware.h>
40 40#include <asm/eeh.h>
41#ifdef DEBUG
42#include <asm/udbg.h>
43#define DBG(fmt...) printk(fmt)
44#else
45#define DBG(fmt...)
46#endif
47 41
48static DEFINE_SPINLOCK(hose_spinlock); 42static DEFINE_SPINLOCK(hose_spinlock);
49 43
@@ -53,8 +47,9 @@ static int global_phb_number; /* Global phb counter */
53/* ISA Memory physical address */ 47/* ISA Memory physical address */
54resource_size_t isa_mem_base; 48resource_size_t isa_mem_base;
55 49
56/* Default PCI flags is 0 */ 50/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
57unsigned int ppc_pci_flags; 51unsigned int ppc_pci_flags = 0;
52
58 53
59static struct dma_mapping_ops *pci_dma_ops; 54static struct dma_mapping_ops *pci_dma_ops;
60 55
@@ -165,8 +160,6 @@ EXPORT_SYMBOL(pci_domain_nr);
165 */ 160 */
166struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node) 161struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
167{ 162{
168 if (!have_of)
169 return NULL;
170 while(node) { 163 while(node) {
171 struct pci_controller *hose, *tmp; 164 struct pci_controller *hose, *tmp;
172 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) 165 list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
@@ -208,26 +201,6 @@ char __devinit *pcibios_setup(char *str)
208 return str; 201 return str;
209} 202}
210 203
211void __devinit pcibios_setup_new_device(struct pci_dev *dev)
212{
213 struct dev_archdata *sd = &dev->dev.archdata;
214
215 sd->of_node = pci_device_to_OF_node(dev);
216
217 DBG("PCI: device %s OF node: %s\n", pci_name(dev),
218 sd->of_node ? sd->of_node->full_name : "<none>");
219
220 sd->dma_ops = pci_dma_ops;
221#ifdef CONFIG_PPC32
222 sd->dma_data = (void *)PCI_DRAM_OFFSET;
223#endif
224 set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
225
226 if (ppc_md.pci_dma_dev_setup)
227 ppc_md.pci_dma_dev_setup(dev);
228}
229EXPORT_SYMBOL(pcibios_setup_new_device);
230
231/* 204/*
232 * Reads the interrupt pin to determine if interrupt is use by card. 205 * Reads the interrupt pin to determine if interrupt is use by card.
233 * If the interrupt is used, then gets the interrupt line from the 206 * If the interrupt is used, then gets the interrupt line from the
@@ -252,7 +225,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
252 return -1; 225 return -1;
253#endif 226#endif
254 227
255 DBG("Try to map irq for %s...\n", pci_name(pci_dev)); 228 pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev));
256 229
257#ifdef DEBUG 230#ifdef DEBUG
258 memset(&oirq, 0xff, sizeof(oirq)); 231 memset(&oirq, 0xff, sizeof(oirq));
@@ -276,26 +249,26 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
276 line == 0xff || line == 0) { 249 line == 0xff || line == 0) {
277 return -1; 250 return -1;
278 } 251 }
279 DBG(" -> no map ! Using line %d (pin %d) from PCI config\n", 252 pr_debug(" No map ! Using line %d (pin %d) from PCI config\n",
280 line, pin); 253 line, pin);
281 254
282 virq = irq_create_mapping(NULL, line); 255 virq = irq_create_mapping(NULL, line);
283 if (virq != NO_IRQ) 256 if (virq != NO_IRQ)
284 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); 257 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
285 } else { 258 } else {
286 DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n", 259 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
287 oirq.size, oirq.specifier[0], oirq.specifier[1], 260 oirq.size, oirq.specifier[0], oirq.specifier[1],
288 oirq.controller->full_name); 261 oirq.controller->full_name);
289 262
290 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, 263 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
291 oirq.size); 264 oirq.size);
292 } 265 }
293 if(virq == NO_IRQ) { 266 if(virq == NO_IRQ) {
294 DBG(" -> failed to map !\n"); 267 pr_debug(" Failed to map !\n");
295 return -1; 268 return -1;
296 } 269 }
297 270
298 DBG(" -> mapped to linux irq %d\n", virq); 271 pr_debug(" Mapped to linux irq %d\n", virq);
299 272
300 pci_dev->irq = virq; 273 pci_dev->irq = virq;
301 274
@@ -397,13 +370,10 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
397 } 370 }
398 371
399 /* XXX would be nice to have a way to ask for write-through */ 372 /* XXX would be nice to have a way to ask for write-through */
400 prot |= _PAGE_NO_CACHE;
401 if (write_combine) 373 if (write_combine)
402 prot &= ~_PAGE_GUARDED; 374 return pgprot_noncached_wc(prot);
403 else 375 else
404 prot |= _PAGE_GUARDED; 376 return pgprot_noncached(prot);
405
406 return __pgprot(prot);
407} 377}
408 378
409/* 379/*
@@ -414,19 +384,17 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
414pgprot_t pci_phys_mem_access_prot(struct file *file, 384pgprot_t pci_phys_mem_access_prot(struct file *file,
415 unsigned long pfn, 385 unsigned long pfn,
416 unsigned long size, 386 unsigned long size,
417 pgprot_t protection) 387 pgprot_t prot)
418{ 388{
419 struct pci_dev *pdev = NULL; 389 struct pci_dev *pdev = NULL;
420 struct resource *found = NULL; 390 struct resource *found = NULL;
421 unsigned long prot = pgprot_val(protection);
422 resource_size_t offset = ((resource_size_t)pfn) << PAGE_SHIFT; 391 resource_size_t offset = ((resource_size_t)pfn) << PAGE_SHIFT;
423 int i; 392 int i;
424 393
425 if (page_is_ram(pfn)) 394 if (page_is_ram(pfn))
426 return __pgprot(prot); 395 return prot;
427
428 prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
429 396
397 prot = pgprot_noncached(prot);
430 for_each_pci_dev(pdev) { 398 for_each_pci_dev(pdev) {
431 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 399 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
432 struct resource *rp = &pdev->resource[i]; 400 struct resource *rp = &pdev->resource[i];
@@ -447,14 +415,14 @@ pgprot_t pci_phys_mem_access_prot(struct file *file,
447 } 415 }
448 if (found) { 416 if (found) {
449 if (found->flags & IORESOURCE_PREFETCH) 417 if (found->flags & IORESOURCE_PREFETCH)
450 prot &= ~_PAGE_GUARDED; 418 prot = pgprot_noncached_wc(prot);
451 pci_dev_put(pdev); 419 pci_dev_put(pdev);
452 } 420 }
453 421
454 DBG("non-PCI map for %llx, prot: %lx\n", 422 pr_debug("PCI: Non-PCI map for %llx, prot: %lx\n",
455 (unsigned long long)offset, prot); 423 (unsigned long long)offset, pgprot_val(prot));
456 424
457 return __pgprot(prot); 425 return prot;
458} 426}
459 427
460 428
@@ -610,8 +578,7 @@ int pci_mmap_legacy_page_range(struct pci_bus *bus,
610 pr_debug(" -> mapping phys %llx\n", (unsigned long long)offset); 578 pr_debug(" -> mapping phys %llx\n", (unsigned long long)offset);
611 579
612 vma->vm_pgoff = offset >> PAGE_SHIFT; 580 vma->vm_pgoff = offset >> PAGE_SHIFT;
613 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 581 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
614 | _PAGE_NO_CACHE | _PAGE_GUARDED);
615 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 582 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
616 vma->vm_end - vma->vm_start, 583 vma->vm_end - vma->vm_start,
617 vma->vm_page_prot); 584 vma->vm_page_prot);
@@ -853,15 +820,12 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
853int pci_proc_domain(struct pci_bus *bus) 820int pci_proc_domain(struct pci_bus *bus)
854{ 821{
855 struct pci_controller *hose = pci_bus_to_host(bus); 822 struct pci_controller *hose = pci_bus_to_host(bus);
856#ifdef CONFIG_PPC64 823
857 return hose->buid != 0;
858#else
859 if (!(ppc_pci_flags & PPC_PCI_ENABLE_PROC_DOMAINS)) 824 if (!(ppc_pci_flags & PPC_PCI_ENABLE_PROC_DOMAINS))
860 return 0; 825 return 0;
861 if (ppc_pci_flags & PPC_PCI_COMPAT_DOMAIN_0) 826 if (ppc_pci_flags & PPC_PCI_COMPAT_DOMAIN_0)
862 return hose->global_number != 0; 827 return hose->global_number != 0;
863 return 1; 828 return 1;
864#endif
865} 829}
866 830
867void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 831void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
@@ -1083,27 +1047,50 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
1083 } 1047 }
1084} 1048}
1085 1049
1086static void __devinit __pcibios_fixup_bus(struct pci_bus *bus) 1050void __devinit pcibios_setup_bus_self(struct pci_bus *bus)
1087{ 1051{
1088 struct pci_dev *dev = bus->self; 1052 /* Fix up the bus resources for P2P bridges */
1089 1053 if (bus->self != NULL)
1090 pr_debug("PCI: Fixup bus %d (%s)\n", bus->number, dev ? pci_name(dev) : "PHB");
1091
1092 /* Fixup PCI<->PCI bridges. Host bridges are handled separately, for
1093 * now differently between 32 and 64 bits.
1094 */
1095 if (dev != NULL)
1096 pcibios_fixup_bridge(bus); 1054 pcibios_fixup_bridge(bus);
1097 1055
1098 /* Additional setup that is different between 32 and 64 bits for now */ 1056 /* Platform specific bus fixups. This is currently only used
1099 pcibios_do_bus_setup(bus); 1057 * by fsl_pci and I'm hoping to get rid of it at some point
1100 1058 */
1101 /* Platform specific bus fixups */
1102 if (ppc_md.pcibios_fixup_bus) 1059 if (ppc_md.pcibios_fixup_bus)
1103 ppc_md.pcibios_fixup_bus(bus); 1060 ppc_md.pcibios_fixup_bus(bus);
1104 1061
1105 /* Read default IRQs and fixup if necessary */ 1062 /* Setup bus DMA mappings */
1063 if (ppc_md.pci_dma_bus_setup)
1064 ppc_md.pci_dma_bus_setup(bus);
1065}
1066
1067void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
1068{
1069 struct pci_dev *dev;
1070
1071 pr_debug("PCI: Fixup bus devices %d (%s)\n",
1072 bus->number, bus->self ? pci_name(bus->self) : "PHB");
1073
1106 list_for_each_entry(dev, &bus->devices, bus_list) { 1074 list_for_each_entry(dev, &bus->devices, bus_list) {
1075 struct dev_archdata *sd = &dev->dev.archdata;
1076
1077 /* Setup OF node pointer in archdata */
1078 sd->of_node = pci_device_to_OF_node(dev);
1079
1080 /* Fixup NUMA node as it may not be setup yet by the generic
1081 * code and is needed by the DMA init
1082 */
1083 set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
1084
1085 /* Hook up default DMA ops */
1086 sd->dma_ops = pci_dma_ops;
1087 sd->dma_data = (void *)PCI_DRAM_OFFSET;
1088
1089 /* Additional platform DMA/iommu setup */
1090 if (ppc_md.pci_dma_dev_setup)
1091 ppc_md.pci_dma_dev_setup(dev);
1092
1093 /* Read default IRQs and fixup if necessary */
1107 pci_read_irq_line(dev); 1094 pci_read_irq_line(dev);
1108 if (ppc_md.pci_irq_fixup) 1095 if (ppc_md.pci_irq_fixup)
1109 ppc_md.pci_irq_fixup(dev); 1096 ppc_md.pci_irq_fixup(dev);
@@ -1113,22 +1100,19 @@ static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
1113void __devinit pcibios_fixup_bus(struct pci_bus *bus) 1100void __devinit pcibios_fixup_bus(struct pci_bus *bus)
1114{ 1101{
1115 /* When called from the generic PCI probe, read PCI<->PCI bridge 1102 /* When called from the generic PCI probe, read PCI<->PCI bridge
1116 * bases before proceeding 1103 * bases. This is -not- called when generating the PCI tree from
1104 * the OF device-tree.
1117 */ 1105 */
1118 if (bus->self != NULL) 1106 if (bus->self != NULL)
1119 pci_read_bridge_bases(bus); 1107 pci_read_bridge_bases(bus);
1120 __pcibios_fixup_bus(bus);
1121}
1122EXPORT_SYMBOL(pcibios_fixup_bus);
1123 1108
1124/* When building a bus from the OF tree rather than probing, we need a 1109 /* Now fixup the bus bus */
1125 * slightly different version of the fixup which doesn't read the 1110 pcibios_setup_bus_self(bus);
1126 * bridge bases using config space accesses 1111
1127 */ 1112 /* Now fixup devices on that bus */
1128void __devinit pcibios_fixup_of_probed_bus(struct pci_bus *bus) 1113 pcibios_setup_bus_devices(bus);
1129{
1130 __pcibios_fixup_bus(bus);
1131} 1114}
1115EXPORT_SYMBOL(pcibios_fixup_bus);
1132 1116
1133static int skip_isa_ioresource_align(struct pci_dev *dev) 1117static int skip_isa_ioresource_align(struct pci_dev *dev)
1134{ 1118{
@@ -1198,10 +1182,10 @@ static int __init reparent_resources(struct resource *parent,
1198 *pp = NULL; 1182 *pp = NULL;
1199 for (p = res->child; p != NULL; p = p->sibling) { 1183 for (p = res->child; p != NULL; p = p->sibling) {
1200 p->parent = res; 1184 p->parent = res;
1201 DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n", 1185 pr_debug("PCI: Reparented %s [%llx..%llx] under %s\n",
1202 p->name, 1186 p->name,
1203 (unsigned long long)p->start, 1187 (unsigned long long)p->start,
1204 (unsigned long long)p->end, res->name); 1188 (unsigned long long)p->end, res->name);
1205 } 1189 }
1206 return 0; 1190 return 0;
1207} 1191}
@@ -1245,9 +1229,12 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
1245 int i; 1229 int i;
1246 struct resource *res, *pr; 1230 struct resource *res, *pr;
1247 1231
1232 pr_debug("PCI: Allocating bus resources for %04x:%02x...\n",
1233 pci_domain_nr(bus), bus->number);
1234
1248 for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) { 1235 for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
1249 if ((res = bus->resource[i]) == NULL || !res->flags 1236 if ((res = bus->resource[i]) == NULL || !res->flags
1250 || res->start > res->end) 1237 || res->start > res->end || res->parent)
1251 continue; 1238 continue;
1252 if (bus->parent == NULL) 1239 if (bus->parent == NULL)
1253 pr = (res->flags & IORESOURCE_IO) ? 1240 pr = (res->flags & IORESOURCE_IO) ?
@@ -1271,14 +1258,14 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
1271 } 1258 }
1272 } 1259 }
1273 1260
1274 DBG("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx " 1261 pr_debug("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
1275 "[0x%x], parent %p (%s)\n", 1262 "[0x%x], parent %p (%s)\n",
1276 bus->self ? pci_name(bus->self) : "PHB", 1263 bus->self ? pci_name(bus->self) : "PHB",
1277 bus->number, i, 1264 bus->number, i,
1278 (unsigned long long)res->start, 1265 (unsigned long long)res->start,
1279 (unsigned long long)res->end, 1266 (unsigned long long)res->end,
1280 (unsigned int)res->flags, 1267 (unsigned int)res->flags,
1281 pr, (pr && pr->name) ? pr->name : "nil"); 1268 pr, (pr && pr->name) ? pr->name : "nil");
1282 1269
1283 if (pr && !(pr->flags & IORESOURCE_UNSET)) { 1270 if (pr && !(pr->flags & IORESOURCE_UNSET)) {
1284 if (request_resource(pr, res) == 0) 1271 if (request_resource(pr, res) == 0)
@@ -1305,11 +1292,11 @@ static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
1305{ 1292{
1306 struct resource *pr, *r = &dev->resource[idx]; 1293 struct resource *pr, *r = &dev->resource[idx];
1307 1294
1308 DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n", 1295 pr_debug("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
1309 pci_name(dev), idx, 1296 pci_name(dev), idx,
1310 (unsigned long long)r->start, 1297 (unsigned long long)r->start,
1311 (unsigned long long)r->end, 1298 (unsigned long long)r->end,
1312 (unsigned int)r->flags); 1299 (unsigned int)r->flags);
1313 1300
1314 pr = pci_find_parent_resource(dev, r); 1301 pr = pci_find_parent_resource(dev, r);
1315 if (!pr || (pr->flags & IORESOURCE_UNSET) || 1302 if (!pr || (pr->flags & IORESOURCE_UNSET) ||
@@ -1317,10 +1304,11 @@ static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
1317 printk(KERN_WARNING "PCI: Cannot allocate resource region %d" 1304 printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
1318 " of device %s, will remap\n", idx, pci_name(dev)); 1305 " of device %s, will remap\n", idx, pci_name(dev));
1319 if (pr) 1306 if (pr)
1320 DBG("PCI: parent is %p: %016llx-%016llx [%x]\n", pr, 1307 pr_debug("PCI: parent is %p: %016llx-%016llx [%x]\n",
1321 (unsigned long long)pr->start, 1308 pr,
1322 (unsigned long long)pr->end, 1309 (unsigned long long)pr->start,
1323 (unsigned int)pr->flags); 1310 (unsigned long long)pr->end,
1311 (unsigned int)pr->flags);
1324 /* We'll assign a new address later */ 1312 /* We'll assign a new address later */
1325 r->flags |= IORESOURCE_UNSET; 1313 r->flags |= IORESOURCE_UNSET;
1326 r->end -= r->start; 1314 r->end -= r->start;
@@ -1358,7 +1346,8 @@ static void __init pcibios_allocate_resources(int pass)
1358 * but keep it unregistered. 1346 * but keep it unregistered.
1359 */ 1347 */
1360 u32 reg; 1348 u32 reg;
1361 DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); 1349 pr_debug("PCI: Switching off ROM of %s\n",
1350 pci_name(dev));
1362 r->flags &= ~IORESOURCE_ROM_ENABLE; 1351 r->flags &= ~IORESOURCE_ROM_ENABLE;
1363 pci_read_config_dword(dev, dev->rom_base_reg, &reg); 1352 pci_read_config_dword(dev, dev->rom_base_reg, &reg);
1364 pci_write_config_dword(dev, dev->rom_base_reg, 1353 pci_write_config_dword(dev, dev->rom_base_reg,
@@ -1383,7 +1372,7 @@ void __init pcibios_resource_survey(void)
1383 } 1372 }
1384 1373
1385 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) { 1374 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
1386 DBG("PCI: Assigning unassigned resouces...\n"); 1375 pr_debug("PCI: Assigning unassigned resouces...\n");
1387 pci_assign_unassigned_resources(); 1376 pci_assign_unassigned_resources();
1388 } 1377 }
1389 1378
@@ -1393,9 +1382,11 @@ void __init pcibios_resource_survey(void)
1393} 1382}
1394 1383
1395#ifdef CONFIG_HOTPLUG 1384#ifdef CONFIG_HOTPLUG
1396/* This is used by the pSeries hotplug driver to allocate resource 1385
1386/* This is used by the PCI hotplug driver to allocate resource
1397 * of newly plugged busses. We can try to consolidate with the 1387 * of newly plugged busses. We can try to consolidate with the
1398 * rest of the code later, for now, keep it as-is 1388 * rest of the code later, for now, keep it as-is as our main
1389 * resource allocation function doesn't deal with sub-trees yet.
1399 */ 1390 */
1400void __devinit pcibios_claim_one_bus(struct pci_bus *bus) 1391void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
1401{ 1392{
@@ -1410,6 +1401,14 @@ void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
1410 1401
1411 if (r->parent || !r->start || !r->flags) 1402 if (r->parent || !r->start || !r->flags)
1412 continue; 1403 continue;
1404
1405 pr_debug("PCI: Claiming %s: "
1406 "Resource %d: %016llx..%016llx [%x]\n",
1407 pci_name(dev), i,
1408 (unsigned long long)r->start,
1409 (unsigned long long)r->end,
1410 (unsigned int)r->flags);
1411
1413 pci_claim_resource(dev, i); 1412 pci_claim_resource(dev, i);
1414 } 1413 }
1415 } 1414 }
@@ -1418,6 +1417,31 @@ void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
1418 pcibios_claim_one_bus(child_bus); 1417 pcibios_claim_one_bus(child_bus);
1419} 1418}
1420EXPORT_SYMBOL_GPL(pcibios_claim_one_bus); 1419EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);
1420
1421
1422/* pcibios_finish_adding_to_bus
1423 *
1424 * This is to be called by the hotplug code after devices have been
1425 * added to a bus, this include calling it for a PHB that is just
1426 * being added
1427 */
1428void pcibios_finish_adding_to_bus(struct pci_bus *bus)
1429{
1430 pr_debug("PCI: Finishing adding to hotplug bus %04x:%02x\n",
1431 pci_domain_nr(bus), bus->number);
1432
1433 /* Allocate bus and devices resources */
1434 pcibios_allocate_bus_resources(bus);
1435 pcibios_claim_one_bus(bus);
1436
1437 /* Add new devices to global lists. Register in proc, sysfs. */
1438 pci_bus_add_devices(bus);
1439
1440 /* Fixup EEH */
1441 eeh_add_device_tree_late(bus);
1442}
1443EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
1444
1421#endif /* CONFIG_HOTPLUG */ 1445#endif /* CONFIG_HOTPLUG */
1422 1446
1423int pcibios_enable_device(struct pci_dev *dev, int mask) 1447int pcibios_enable_device(struct pci_dev *dev, int mask)
@@ -1428,3 +1452,61 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
1428 1452
1429 return pci_enable_resources(dev, mask); 1453 return pci_enable_resources(dev, mask);
1430} 1454}
1455
1456void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
1457{
1458 struct pci_bus *bus = hose->bus;
1459 struct resource *res;
1460 int i;
1461
1462 /* Hookup PHB IO resource */
1463 bus->resource[0] = res = &hose->io_resource;
1464
1465 if (!res->flags) {
1466 printk(KERN_WARNING "PCI: I/O resource not set for host"
1467 " bridge %s (domain %d)\n",
1468 hose->dn->full_name, hose->global_number);
1469#ifdef CONFIG_PPC32
1470 /* Workaround for lack of IO resource only on 32-bit */
1471 res->start = (unsigned long)hose->io_base_virt - isa_io_base;
1472 res->end = res->start + IO_SPACE_LIMIT;
1473 res->flags = IORESOURCE_IO;
1474#endif /* CONFIG_PPC32 */
1475 }
1476
1477 pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n",
1478 (unsigned long long)res->start,
1479 (unsigned long long)res->end,
1480 (unsigned long)res->flags);
1481
1482 /* Hookup PHB Memory resources */
1483 for (i = 0; i < 3; ++i) {
1484 res = &hose->mem_resources[i];
1485 if (!res->flags) {
1486 if (i > 0)
1487 continue;
1488 printk(KERN_ERR "PCI: Memory resource 0 not set for "
1489 "host bridge %s (domain %d)\n",
1490 hose->dn->full_name, hose->global_number);
1491#ifdef CONFIG_PPC32
1492 /* Workaround for lack of MEM resource only on 32-bit */
1493 res->start = hose->pci_mem_offset;
1494 res->end = (resource_size_t)-1LL;
1495 res->flags = IORESOURCE_MEM;
1496#endif /* CONFIG_PPC32 */
1497 }
1498 bus->resource[i+1] = res;
1499
1500 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i,
1501 (unsigned long long)res->start,
1502 (unsigned long long)res->end,
1503 (unsigned long)res->flags);
1504 }
1505
1506 pr_debug("PCI: PHB MEM offset = %016llx\n",
1507 (unsigned long long)hose->pci_mem_offset);
1508 pr_debug("PCI: PHB IO offset = %08lx\n",
1509 (unsigned long)hose->io_base_virt - _IO_BASE);
1510
1511}
1512
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 131b1dfa68c6..132cd80afa21 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -26,12 +26,6 @@
26 26
27#undef DEBUG 27#undef DEBUG
28 28
29#ifdef DEBUG
30#define DBG(x...) printk(x)
31#else
32#define DBG(x...)
33#endif
34
35unsigned long isa_io_base = 0; 29unsigned long isa_io_base = 0;
36unsigned long pci_dram_offset = 0; 30unsigned long pci_dram_offset = 0;
37int pcibios_assign_bus_offset = 1; 31int pcibios_assign_bus_offset = 1;
@@ -272,17 +266,14 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
272{ 266{
273 struct device_node *parent, *np; 267 struct device_node *parent, *np;
274 268
275 if (!have_of) 269 pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
276 return NULL;
277
278 DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
279 parent = scan_OF_for_pci_bus(bus); 270 parent = scan_OF_for_pci_bus(bus);
280 if (parent == NULL) 271 if (parent == NULL)
281 return NULL; 272 return NULL;
282 DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>"); 273 pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
283 np = scan_OF_for_pci_dev(parent, devfn); 274 np = scan_OF_for_pci_dev(parent, devfn);
284 of_node_put(parent); 275 of_node_put(parent);
285 DBG(" result is %s\n", np ? np->full_name : "<NULL>"); 276 pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");
286 277
287 /* XXX most callers don't release the returned node 278 /* XXX most callers don't release the returned node
288 * mostly because ppc64 doesn't increase the refcount, 279 * mostly because ppc64 doesn't increase the refcount,
@@ -315,8 +306,6 @@ pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
315 struct pci_controller* hose; 306 struct pci_controller* hose;
316 struct pci_dev* dev = NULL; 307 struct pci_dev* dev = NULL;
317 308
318 if (!have_of)
319 return -ENODEV;
320 /* Make sure it's really a PCI device */ 309 /* Make sure it's really a PCI device */
321 hose = pci_find_hose_for_OF_device(node); 310 hose = pci_find_hose_for_OF_device(node);
322 if (!hose || !hose->dn) 311 if (!hose || !hose->dn)
@@ -379,10 +368,41 @@ void pcibios_make_OF_bus_map(void)
379} 368}
380#endif /* CONFIG_PPC_OF */ 369#endif /* CONFIG_PPC_OF */
381 370
371static void __devinit pcibios_scan_phb(struct pci_controller *hose)
372{
373 struct pci_bus *bus;
374 struct device_node *node = hose->dn;
375 unsigned long io_offset;
376 struct resource *res = &hose->io_resource;
377
378 pr_debug("PCI: Scanning PHB %s\n",
379 node ? node->full_name : "<NO NAME>");
380
381 /* Create an empty bus for the toplevel */
382 bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
383 if (bus == NULL) {
384 printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
385 hose->global_number);
386 return;
387 }
388 bus->secondary = hose->first_busno;
389 hose->bus = bus;
390
391 /* Fixup IO space offset */
392 io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
393 res->start = (res->start + io_offset) & 0xffffffffu;
394 res->end = (res->end + io_offset) & 0xffffffffu;
395
396 /* Wire up PHB bus resources */
397 pcibios_setup_phb_resources(hose);
398
399 /* Scan children */
400 hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
401}
402
382static int __init pcibios_init(void) 403static int __init pcibios_init(void)
383{ 404{
384 struct pci_controller *hose, *tmp; 405 struct pci_controller *hose, *tmp;
385 struct pci_bus *bus;
386 int next_busno = 0; 406 int next_busno = 0;
387 407
388 printk(KERN_INFO "PCI: Probing PCI hardware\n"); 408 printk(KERN_INFO "PCI: Probing PCI hardware\n");
@@ -395,12 +415,8 @@ static int __init pcibios_init(void)
395 if (pci_assign_all_buses) 415 if (pci_assign_all_buses)
396 hose->first_busno = next_busno; 416 hose->first_busno = next_busno;
397 hose->last_busno = 0xff; 417 hose->last_busno = 0xff;
398 bus = pci_scan_bus_parented(hose->parent, hose->first_busno, 418 pcibios_scan_phb(hose);
399 hose->ops, hose); 419 pci_bus_add_devices(hose->bus);
400 if (bus) {
401 pci_bus_add_devices(bus);
402 hose->last_busno = bus->subordinate;
403 }
404 if (pci_assign_all_buses || next_busno <= hose->last_busno) 420 if (pci_assign_all_buses || next_busno <= hose->last_busno)
405 next_busno = hose->last_busno + pcibios_assign_bus_offset; 421 next_busno = hose->last_busno + pcibios_assign_bus_offset;
406 } 422 }
@@ -410,7 +426,7 @@ static int __init pcibios_init(void)
410 * numbers vs. kernel bus numbers since we may have to 426 * numbers vs. kernel bus numbers since we may have to
411 * remap them. 427 * remap them.
412 */ 428 */
413 if (pci_assign_all_buses && have_of) 429 if (pci_assign_all_buses)
414 pcibios_make_OF_bus_map(); 430 pcibios_make_OF_bus_map();
415 431
416 /* Call common code to handle resource allocation */ 432 /* Call common code to handle resource allocation */
@@ -425,54 +441,6 @@ static int __init pcibios_init(void)
425 441
426subsys_initcall(pcibios_init); 442subsys_initcall(pcibios_init);
427 443
428void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
429{
430 struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
431 unsigned long io_offset;
432 struct resource *res;
433 int i;
434 struct pci_dev *dev;
435
436 /* Hookup PHB resources */
437 io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
438 if (bus->parent == NULL) {
439 /* This is a host bridge - fill in its resources */
440 hose->bus = bus;
441
442 bus->resource[0] = res = &hose->io_resource;
443 if (!res->flags) {
444 if (io_offset)
445 printk(KERN_ERR "I/O resource not set for host"
446 " bridge %d\n", hose->global_number);
447 res->start = 0;
448 res->end = IO_SPACE_LIMIT;
449 res->flags = IORESOURCE_IO;
450 }
451 res->start = (res->start + io_offset) & 0xffffffffu;
452 res->end = (res->end + io_offset) & 0xffffffffu;
453
454 for (i = 0; i < 3; ++i) {
455 res = &hose->mem_resources[i];
456 if (!res->flags) {
457 if (i > 0)
458 continue;
459 printk(KERN_ERR "Memory resource not set for "
460 "host bridge %d\n", hose->global_number);
461 res->start = hose->pci_mem_offset;
462 res->end = ~0U;
463 res->flags = IORESOURCE_MEM;
464 }
465 bus->resource[i+1] = res;
466 }
467 }
468
469 if (ppc_md.pci_dma_bus_setup)
470 ppc_md.pci_dma_bus_setup(bus);
471
472 list_for_each_entry(dev, &bus->devices, bus_list)
473 pcibios_setup_new_device(dev);
474}
475
476/* the next one is stolen from the alpha port... */ 444/* the next one is stolen from the alpha port... */
477void __init 445void __init
478pcibios_update_irq(struct pci_dev *dev, int irq) 446pcibios_update_irq(struct pci_dev *dev, int irq)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 3502b9101e6b..39fadc6e1492 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -32,13 +32,6 @@
32#include <asm/machdep.h> 32#include <asm/machdep.h>
33#include <asm/ppc-pci.h> 33#include <asm/ppc-pci.h>
34 34
35#ifdef DEBUG
36#include <asm/udbg.h>
37#define DBG(fmt...) printk(fmt)
38#else
39#define DBG(fmt...)
40#endif
41
42unsigned long pci_probe_only = 1; 35unsigned long pci_probe_only = 1;
43 36
44/* pci_io_base -- the base address from which io bars are offsets. 37/* pci_io_base -- the base address from which io bars are offsets.
@@ -102,7 +95,7 @@ static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev)
102 addrs = of_get_property(node, "assigned-addresses", &proplen); 95 addrs = of_get_property(node, "assigned-addresses", &proplen);
103 if (!addrs) 96 if (!addrs)
104 return; 97 return;
105 DBG(" parse addresses (%d bytes) @ %p\n", proplen, addrs); 98 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
106 for (; proplen >= 20; proplen -= 20, addrs += 5) { 99 for (; proplen >= 20; proplen -= 20, addrs += 5) {
107 flags = pci_parse_of_flags(addrs[0]); 100 flags = pci_parse_of_flags(addrs[0]);
108 if (!flags) 101 if (!flags)
@@ -112,8 +105,9 @@ static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev)
112 if (!size) 105 if (!size)
113 continue; 106 continue;
114 i = addrs[0] & 0xff; 107 i = addrs[0] & 0xff;
115 DBG(" base: %llx, size: %llx, i: %x\n", 108 pr_debug(" base: %llx, size: %llx, i: %x\n",
116 (unsigned long long)base, (unsigned long long)size, i); 109 (unsigned long long)base,
110 (unsigned long long)size, i);
117 111
118 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) { 112 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
119 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2]; 113 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
@@ -144,7 +138,7 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
144 if (type == NULL) 138 if (type == NULL)
145 type = ""; 139 type = "";
146 140
147 DBG(" create device, devfn: %x, type: %s\n", devfn, type); 141 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
148 142
149 dev->bus = bus; 143 dev->bus = bus;
150 dev->sysdata = node; 144 dev->sysdata = node;
@@ -165,8 +159,8 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
165 dev->class = get_int_prop(node, "class-code", 0); 159 dev->class = get_int_prop(node, "class-code", 0);
166 dev->revision = get_int_prop(node, "revision-id", 0); 160 dev->revision = get_int_prop(node, "revision-id", 0);
167 161
168 DBG(" class: 0x%x\n", dev->class); 162 pr_debug(" class: 0x%x\n", dev->class);
169 DBG(" revision: 0x%x\n", dev->revision); 163 pr_debug(" revision: 0x%x\n", dev->revision);
170 164
171 dev->current_state = 4; /* unknown power state */ 165 dev->current_state = 4; /* unknown power state */
172 dev->error_state = pci_channel_io_normal; 166 dev->error_state = pci_channel_io_normal;
@@ -187,7 +181,7 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
187 181
188 pci_parse_of_addrs(node, dev); 182 pci_parse_of_addrs(node, dev);
189 183
190 DBG(" adding to system ...\n"); 184 pr_debug(" adding to system ...\n");
191 185
192 pci_device_add(dev, bus); 186 pci_device_add(dev, bus);
193 187
@@ -195,19 +189,20 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
195} 189}
196EXPORT_SYMBOL(of_create_pci_dev); 190EXPORT_SYMBOL(of_create_pci_dev);
197 191
198void __devinit of_scan_bus(struct device_node *node, 192static void __devinit __of_scan_bus(struct device_node *node,
199 struct pci_bus *bus) 193 struct pci_bus *bus, int rescan_existing)
200{ 194{
201 struct device_node *child; 195 struct device_node *child;
202 const u32 *reg; 196 const u32 *reg;
203 int reglen, devfn; 197 int reglen, devfn;
204 struct pci_dev *dev; 198 struct pci_dev *dev;
205 199
206 DBG("of_scan_bus(%s) bus no %d... \n", node->full_name, bus->number); 200 pr_debug("of_scan_bus(%s) bus no %d... \n",
201 node->full_name, bus->number);
207 202
208 /* Scan direct children */ 203 /* Scan direct children */
209 for_each_child_of_node(node, child) { 204 for_each_child_of_node(node, child) {
210 DBG(" * %s\n", child->full_name); 205 pr_debug(" * %s\n", child->full_name);
211 reg = of_get_property(child, "reg", &reglen); 206 reg = of_get_property(child, "reg", &reglen);
212 if (reg == NULL || reglen < 20) 207 if (reg == NULL || reglen < 20)
213 continue; 208 continue;
@@ -217,11 +212,15 @@ void __devinit of_scan_bus(struct device_node *node,
217 dev = of_create_pci_dev(child, bus, devfn); 212 dev = of_create_pci_dev(child, bus, devfn);
218 if (!dev) 213 if (!dev)
219 continue; 214 continue;
220 DBG(" dev header type: %x\n", dev->hdr_type); 215 pr_debug(" dev header type: %x\n", dev->hdr_type);
221 } 216 }
222 217
223 /* Ally all fixups */ 218 /* Apply all fixups necessary. We don't fixup the bus "self"
224 pcibios_fixup_of_probed_bus(bus); 219 * for an existing bridge that is being rescanned
220 */
221 if (!rescan_existing)
222 pcibios_setup_bus_self(bus);
223 pcibios_setup_bus_devices(bus);
225 224
226 /* Now scan child busses */ 225 /* Now scan child busses */
227 list_for_each_entry(dev, &bus->devices, bus_list) { 226 list_for_each_entry(dev, &bus->devices, bus_list) {
@@ -233,7 +232,20 @@ void __devinit of_scan_bus(struct device_node *node,
233 } 232 }
234 } 233 }
235} 234}
236EXPORT_SYMBOL(of_scan_bus); 235
236void __devinit of_scan_bus(struct device_node *node,
237 struct pci_bus *bus)
238{
239 __of_scan_bus(node, bus, 0);
240}
241EXPORT_SYMBOL_GPL(of_scan_bus);
242
243void __devinit of_rescan_bus(struct device_node *node,
244 struct pci_bus *bus)
245{
246 __of_scan_bus(node, bus, 1);
247}
248EXPORT_SYMBOL_GPL(of_rescan_bus);
237 249
238void __devinit of_scan_pci_bridge(struct device_node *node, 250void __devinit of_scan_pci_bridge(struct device_node *node,
239 struct pci_dev *dev) 251 struct pci_dev *dev)
@@ -245,7 +257,7 @@ void __devinit of_scan_pci_bridge(struct device_node *node,
245 unsigned int flags; 257 unsigned int flags;
246 u64 size; 258 u64 size;
247 259
248 DBG("of_scan_pci_bridge(%s)\n", node->full_name); 260 pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
249 261
250 /* parse bus-range property */ 262 /* parse bus-range property */
251 busrange = of_get_property(node, "bus-range", &len); 263 busrange = of_get_property(node, "bus-range", &len);
@@ -309,12 +321,12 @@ void __devinit of_scan_pci_bridge(struct device_node *node,
309 } 321 }
310 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus), 322 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
311 bus->number); 323 bus->number);
312 DBG(" bus name: %s\n", bus->name); 324 pr_debug(" bus name: %s\n", bus->name);
313 325
314 mode = PCI_PROBE_NORMAL; 326 mode = PCI_PROBE_NORMAL;
315 if (ppc_md.pci_probe_mode) 327 if (ppc_md.pci_probe_mode)
316 mode = ppc_md.pci_probe_mode(bus); 328 mode = ppc_md.pci_probe_mode(bus);
317 DBG(" probe mode: %d\n", mode); 329 pr_debug(" probe mode: %d\n", mode);
318 330
319 if (mode == PCI_PROBE_DEVTREE) 331 if (mode == PCI_PROBE_DEVTREE)
320 of_scan_bus(node, bus); 332 of_scan_bus(node, bus);
@@ -327,9 +339,10 @@ void __devinit scan_phb(struct pci_controller *hose)
327{ 339{
328 struct pci_bus *bus; 340 struct pci_bus *bus;
329 struct device_node *node = hose->dn; 341 struct device_node *node = hose->dn;
330 int i, mode; 342 int mode;
331 343
332 DBG("PCI: Scanning PHB %s\n", node ? node->full_name : "<NO NAME>"); 344 pr_debug("PCI: Scanning PHB %s\n",
345 node ? node->full_name : "<NO NAME>");
333 346
334 /* Create an empty bus for the toplevel */ 347 /* Create an empty bus for the toplevel */
335 bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, node); 348 bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, node);
@@ -345,26 +358,13 @@ void __devinit scan_phb(struct pci_controller *hose)
345 pcibios_map_io_space(bus); 358 pcibios_map_io_space(bus);
346 359
347 /* Wire up PHB bus resources */ 360 /* Wire up PHB bus resources */
348 DBG("PCI: PHB IO resource = %016lx-%016lx [%lx]\n", 361 pcibios_setup_phb_resources(hose);
349 hose->io_resource.start, hose->io_resource.end,
350 hose->io_resource.flags);
351 bus->resource[0] = &hose->io_resource;
352 for (i = 0; i < 3; ++i) {
353 DBG("PCI: PHB MEM resource %d = %016lx-%016lx [%lx]\n", i,
354 hose->mem_resources[i].start,
355 hose->mem_resources[i].end,
356 hose->mem_resources[i].flags);
357 bus->resource[i+1] = &hose->mem_resources[i];
358 }
359 DBG("PCI: PHB MEM offset = %016lx\n", hose->pci_mem_offset);
360 DBG("PCI: PHB IO offset = %08lx\n",
361 (unsigned long)hose->io_base_virt - _IO_BASE);
362 362
363 /* Get probe mode and perform scan */ 363 /* Get probe mode and perform scan */
364 mode = PCI_PROBE_NORMAL; 364 mode = PCI_PROBE_NORMAL;
365 if (node && ppc_md.pci_probe_mode) 365 if (node && ppc_md.pci_probe_mode)
366 mode = ppc_md.pci_probe_mode(bus); 366 mode = ppc_md.pci_probe_mode(bus);
367 DBG(" probe mode: %d\n", mode); 367 pr_debug(" probe mode: %d\n", mode);
368 if (mode == PCI_PROBE_DEVTREE) { 368 if (mode == PCI_PROBE_DEVTREE) {
369 bus->subordinate = hose->last_busno; 369 bus->subordinate = hose->last_busno;
370 of_scan_bus(node, bus); 370 of_scan_bus(node, bus);
@@ -380,7 +380,7 @@ static int __init pcibios_init(void)
380 380
381 printk(KERN_INFO "PCI: Probing PCI hardware\n"); 381 printk(KERN_INFO "PCI: Probing PCI hardware\n");
382 382
383 /* For now, override phys_mem_access_prot. If we need it, 383 /* For now, override phys_mem_access_prot. If we need it,g
384 * later, we may move that initialization to each ppc_md 384 * later, we may move that initialization to each ppc_md
385 */ 385 */
386 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot; 386 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
@@ -388,6 +388,11 @@ static int __init pcibios_init(void)
388 if (pci_probe_only) 388 if (pci_probe_only)
389 ppc_pci_flags |= PPC_PCI_PROBE_ONLY; 389 ppc_pci_flags |= PPC_PCI_PROBE_ONLY;
390 390
391 /* On ppc64, we always enable PCI domains and we keep domain 0
392 * backward compatible in /proc for video cards
393 */
394 ppc_pci_flags |= PPC_PCI_ENABLE_PROC_DOMAINS | PPC_PCI_COMPAT_DOMAIN_0;
395
391 /* Scan all of the recorded PCI controllers. */ 396 /* Scan all of the recorded PCI controllers. */
392 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 397 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
393 scan_phb(hose); 398 scan_phb(hose);
@@ -422,8 +427,8 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
422 if (bus->self) { 427 if (bus->self) {
423 struct resource *res = bus->resource[0]; 428 struct resource *res = bus->resource[0];
424 429
425 DBG("IO unmapping for PCI-PCI bridge %s\n", 430 pr_debug("IO unmapping for PCI-PCI bridge %s\n",
426 pci_name(bus->self)); 431 pci_name(bus->self));
427 432
428 __flush_hash_table_range(&init_mm, res->start + _IO_BASE, 433 __flush_hash_table_range(&init_mm, res->start + _IO_BASE,
429 res->end + _IO_BASE + 1); 434 res->end + _IO_BASE + 1);
@@ -437,8 +442,8 @@ int pcibios_unmap_io_space(struct pci_bus *bus)
437 if (hose->io_base_alloc == 0) 442 if (hose->io_base_alloc == 0)
438 return 0; 443 return 0;
439 444
440 DBG("IO unmapping for PHB %s\n", hose->dn->full_name); 445 pr_debug("IO unmapping for PHB %s\n", hose->dn->full_name);
441 DBG(" alloc=0x%p\n", hose->io_base_alloc); 446 pr_debug(" alloc=0x%p\n", hose->io_base_alloc);
442 447
443 /* This is a PHB, we fully unmap the IO area */ 448 /* This is a PHB, we fully unmap the IO area */
444 vunmap(hose->io_base_alloc); 449 vunmap(hose->io_base_alloc);
@@ -463,11 +468,11 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
463 * thus HPTEs will be faulted in when needed 468 * thus HPTEs will be faulted in when needed
464 */ 469 */
465 if (bus->self) { 470 if (bus->self) {
466 DBG("IO mapping for PCI-PCI bridge %s\n", 471 pr_debug("IO mapping for PCI-PCI bridge %s\n",
467 pci_name(bus->self)); 472 pci_name(bus->self));
468 DBG(" virt=0x%016lx...0x%016lx\n", 473 pr_debug(" virt=0x%016lx...0x%016lx\n",
469 bus->resource[0]->start + _IO_BASE, 474 bus->resource[0]->start + _IO_BASE,
470 bus->resource[0]->end + _IO_BASE); 475 bus->resource[0]->end + _IO_BASE);
471 return 0; 476 return 0;
472 } 477 }
473 478
@@ -496,11 +501,11 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
496 hose->io_base_virt = (void __iomem *)(area->addr + 501 hose->io_base_virt = (void __iomem *)(area->addr +
497 hose->io_base_phys - phys_page); 502 hose->io_base_phys - phys_page);
498 503
499 DBG("IO mapping for PHB %s\n", hose->dn->full_name); 504 pr_debug("IO mapping for PHB %s\n", hose->dn->full_name);
500 DBG(" phys=0x%016lx, virt=0x%p (alloc=0x%p)\n", 505 pr_debug(" phys=0x%016lx, virt=0x%p (alloc=0x%p)\n",
501 hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc); 506 hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc);
502 DBG(" size=0x%016lx (alloc=0x%016lx)\n", 507 pr_debug(" size=0x%016lx (alloc=0x%016lx)\n",
503 hose->pci_io_size, size_page); 508 hose->pci_io_size, size_page);
504 509
505 /* Establish the mapping */ 510 /* Establish the mapping */
506 if (__ioremap_at(phys_page, area->addr, size_page, 511 if (__ioremap_at(phys_page, area->addr, size_page,
@@ -512,24 +517,13 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
512 hose->io_resource.start += io_virt_offset; 517 hose->io_resource.start += io_virt_offset;
513 hose->io_resource.end += io_virt_offset; 518 hose->io_resource.end += io_virt_offset;
514 519
515 DBG(" hose->io_resource=0x%016lx...0x%016lx\n", 520 pr_debug(" hose->io_resource=0x%016lx...0x%016lx\n",
516 hose->io_resource.start, hose->io_resource.end); 521 hose->io_resource.start, hose->io_resource.end);
517 522
518 return 0; 523 return 0;
519} 524}
520EXPORT_SYMBOL_GPL(pcibios_map_io_space); 525EXPORT_SYMBOL_GPL(pcibios_map_io_space);
521 526
522void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
523{
524 struct pci_dev *dev;
525
526 if (ppc_md.pci_dma_bus_setup)
527 ppc_md.pci_dma_bus_setup(bus);
528
529 list_for_each_entry(dev, &bus->devices, bus_list)
530 pcibios_setup_new_device(dev);
531}
532
533unsigned long pci_address_to_pio(phys_addr_t address) 527unsigned long pci_address_to_pio(phys_addr_t address)
534{ 528{
535 struct pci_controller *hose, *tmp; 529 struct pci_controller *hose, *tmp;
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 260089dccfb0..dcec1325d340 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -116,12 +116,6 @@ EXPORT_SYMBOL(giveup_spe);
116 116
117#ifndef CONFIG_PPC64 117#ifndef CONFIG_PPC64
118EXPORT_SYMBOL(flush_instruction_cache); 118EXPORT_SYMBOL(flush_instruction_cache);
119EXPORT_SYMBOL(flush_tlb_kernel_range);
120EXPORT_SYMBOL(flush_tlb_page);
121EXPORT_SYMBOL(_tlbie);
122#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
123EXPORT_SYMBOL(_tlbil_va);
124#endif
125#endif 119#endif
126EXPORT_SYMBOL(__flush_icache_range); 120EXPORT_SYMBOL(__flush_icache_range);
127EXPORT_SYMBOL(flush_dcache_range); 121EXPORT_SYMBOL(flush_dcache_range);
@@ -174,8 +168,7 @@ EXPORT_SYMBOL(cacheable_memcpy);
174#endif 168#endif
175 169
176#ifdef CONFIG_PPC32 170#ifdef CONFIG_PPC32
177EXPORT_SYMBOL(next_mmu_context); 171EXPORT_SYMBOL(switch_mmu_context);
178EXPORT_SYMBOL(set_context);
179#endif 172#endif
180 173
181#ifdef CONFIG_PPC_STD_MMU_32 174#ifdef CONFIG_PPC_STD_MMU_32
diff --git a/arch/powerpc/xmon/setjmp.S b/arch/powerpc/kernel/ppc_save_regs.S
index 04c0b305ad4a..5113bd2285e1 100644
--- a/arch/powerpc/xmon/setjmp.S
+++ b/arch/powerpc/kernel/ppc_save_regs.S
@@ -22,7 +22,7 @@
22 * that will be different for 32-bit and 64-bit, because of the 22 * that will be different for 32-bit and 64-bit, because of the
23 * different ABIs, though). 23 * different ABIs, though).
24 */ 24 */
25_GLOBAL(xmon_save_regs) 25_GLOBAL(ppc_save_regs)
26 PPC_STL r0,0*SZL(r3) 26 PPC_STL r0,0*SZL(r3)
27 PPC_STL r2,2*SZL(r3) 27 PPC_STL r2,2*SZL(r3)
28 PPC_STL r3,3*SZL(r3) 28 PPC_STL r3,3*SZL(r3)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 957bded0020d..51b201ddf9a1 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -467,6 +467,8 @@ static struct regbit {
467 {MSR_VEC, "VEC"}, 467 {MSR_VEC, "VEC"},
468 {MSR_VSX, "VSX"}, 468 {MSR_VSX, "VSX"},
469 {MSR_ME, "ME"}, 469 {MSR_ME, "ME"},
470 {MSR_CE, "CE"},
471 {MSR_DE, "DE"},
470 {MSR_IR, "IR"}, 472 {MSR_IR, "IR"},
471 {MSR_DR, "DR"}, 473 {MSR_DR, "DR"},
472 {0, NULL} 474 {0, NULL}
@@ -998,7 +1000,7 @@ unsigned long get_wchan(struct task_struct *p)
998 return 0; 1000 return 0;
999} 1001}
1000 1002
1001static int kstack_depth_to_print = 64; 1003static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
1002 1004
1003void show_stack(struct task_struct *tsk, unsigned long *stack) 1005void show_stack(struct task_struct *tsk, unsigned long *stack)
1004{ 1006{
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 3a2dc7e6586a..6f73c739f1e2 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -1160,6 +1160,8 @@ static inline void __init phyp_dump_reserve_mem(void) {}
1160 1160
1161void __init early_init_devtree(void *params) 1161void __init early_init_devtree(void *params)
1162{ 1162{
1163 unsigned long limit;
1164
1163 DBG(" -> early_init_devtree(%p)\n", params); 1165 DBG(" -> early_init_devtree(%p)\n", params);
1164 1166
1165 /* Setup flat device-tree pointer */ 1167 /* Setup flat device-tree pointer */
@@ -1200,7 +1202,19 @@ void __init early_init_devtree(void *params)
1200 early_reserve_mem(); 1202 early_reserve_mem();
1201 phyp_dump_reserve_mem(); 1203 phyp_dump_reserve_mem();
1202 1204
1203 lmb_enforce_memory_limit(memory_limit); 1205 limit = memory_limit;
1206 if (! limit) {
1207 unsigned long memsize;
1208
1209 /* Ensure that total memory size is page-aligned, because
1210 * otherwise mark_bootmem() gets upset. */
1211 lmb_analyze();
1212 memsize = lmb_phys_mem_size();
1213 if ((memsize & PAGE_MASK) != memsize)
1214 limit = memsize & PAGE_MASK;
1215 }
1216 lmb_enforce_memory_limit(limit);
1217
1204 lmb_analyze(); 1218 lmb_analyze();
1205 1219
1206 DBG("Phys. mem: %lx\n", lmb_phys_mem_size()); 1220 DBG("Phys. mem: %lx\n", lmb_phys_mem_size());
@@ -1271,6 +1285,37 @@ struct device_node *of_find_node_by_phandle(phandle handle)
1271EXPORT_SYMBOL(of_find_node_by_phandle); 1285EXPORT_SYMBOL(of_find_node_by_phandle);
1272 1286
1273/** 1287/**
1288 * of_find_next_cache_node - Find a node's subsidiary cache
1289 * @np: node of type "cpu" or "cache"
1290 *
1291 * Returns a node pointer with refcount incremented, use
1292 * of_node_put() on it when done. Caller should hold a reference
1293 * to np.
1294 */
1295struct device_node *of_find_next_cache_node(struct device_node *np)
1296{
1297 struct device_node *child;
1298 const phandle *handle;
1299
1300 handle = of_get_property(np, "l2-cache", NULL);
1301 if (!handle)
1302 handle = of_get_property(np, "next-level-cache", NULL);
1303
1304 if (handle)
1305 return of_find_node_by_phandle(*handle);
1306
1307 /* OF on pmac has nodes instead of properties named "l2-cache"
1308 * beneath CPU nodes.
1309 */
1310 if (!strcmp(np->type, "cpu"))
1311 for_each_child_of_node(np, child)
1312 if (!strcmp(child->type, "cache"))
1313 return child;
1314
1315 return NULL;
1316}
1317
1318/**
1274 * of_find_all_nodes - Get next node in global list 1319 * of_find_all_nodes - Get next node in global list
1275 * @prev: Previous node or NULL to start iteration 1320 * @prev: Previous node or NULL to start iteration
1276 * of_node_put() will be called on it 1321 * of_node_put() will be called on it
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index a11d68976dc8..8c1335566089 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -734,10 +734,7 @@ void of_irq_map_init(unsigned int flags)
734 if (flags & OF_IMAP_NO_PHANDLE) { 734 if (flags & OF_IMAP_NO_PHANDLE) {
735 struct device_node *np; 735 struct device_node *np;
736 736
737 for(np = NULL; (np = of_find_all_nodes(np)) != NULL;) { 737 for_each_node_with_property(np, "interrupt-controller") {
738 if (of_get_property(np, "interrupt-controller", NULL)
739 == NULL)
740 continue;
741 /* Skip /chosen/interrupt-controller */ 738 /* Skip /chosen/interrupt-controller */
742 if (strcmp(np->name, "chosen") == 0) 739 if (strcmp(np->name, "chosen") == 0)
743 continue; 740 continue;
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 1f8505c23548..fdfe14c4bdef 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -566,6 +566,32 @@ int rtas_get_sensor(int sensor, int index, int *state)
566} 566}
567EXPORT_SYMBOL(rtas_get_sensor); 567EXPORT_SYMBOL(rtas_get_sensor);
568 568
569bool rtas_indicator_present(int token, int *maxindex)
570{
571 int proplen, count, i;
572 const struct indicator_elem {
573 u32 token;
574 u32 maxindex;
575 } *indicators;
576
577 indicators = of_get_property(rtas.dev, "rtas-indicators", &proplen);
578 if (!indicators)
579 return false;
580
581 count = proplen / sizeof(struct indicator_elem);
582
583 for (i = 0; i < count; i++) {
584 if (indicators[i].token != token)
585 continue;
586 if (maxindex)
587 *maxindex = indicators[i].maxindex;
588 return true;
589 }
590
591 return false;
592}
593EXPORT_SYMBOL(rtas_indicator_present);
594
569int rtas_set_indicator(int indicator, int index, int new_value) 595int rtas_set_indicator(int indicator, int index, int new_value)
570{ 596{
571 int token = rtas_token("set-indicator"); 597 int token = rtas_token("set-indicator");
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 589a2797eac2..8869001ab5d7 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -301,51 +301,3 @@ void __init find_and_init_phbs(void)
301#endif /* CONFIG_PPC32 */ 301#endif /* CONFIG_PPC32 */
302 } 302 }
303} 303}
304
305/* RPA-specific bits for removing PHBs */
306int pcibios_remove_root_bus(struct pci_controller *phb)
307{
308 struct pci_bus *b = phb->bus;
309 struct resource *res;
310 int rc, i;
311
312 res = b->resource[0];
313 if (!res->flags) {
314 printk(KERN_ERR "%s: no IO resource for PHB %s\n", __func__,
315 b->name);
316 return 1;
317 }
318
319 rc = pcibios_unmap_io_space(b);
320 if (rc) {
321 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
322 __func__, b->name);
323 return 1;
324 }
325
326 if (release_resource(res)) {
327 printk(KERN_ERR "%s: failed to release IO on bus %s\n",
328 __func__, b->name);
329 return 1;
330 }
331
332 for (i = 1; i < 3; ++i) {
333 res = b->resource[i];
334 if (!res->flags && i == 0) {
335 printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
336 __func__, b->name);
337 return 1;
338 }
339 if (res->flags && release_resource(res)) {
340 printk(KERN_ERR
341 "%s: failed to release IO %d on bus %s\n",
342 __func__, i, b->name);
343 return 1;
344 }
345 }
346
347 pcibios_free_controller(phb);
348
349 return 0;
350}
351EXPORT_SYMBOL(pcibios_remove_root_bus);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index c1a27626a940..9e1ca745d8f0 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -38,6 +38,7 @@
38#include <asm/time.h> 38#include <asm/time.h>
39#include <asm/serial.h> 39#include <asm/serial.h>
40#include <asm/udbg.h> 40#include <asm/udbg.h>
41#include <asm/mmu_context.h>
41 42
42#include "setup.h" 43#include "setup.h"
43 44
@@ -49,12 +50,12 @@ int boot_cpuid;
49EXPORT_SYMBOL_GPL(boot_cpuid); 50EXPORT_SYMBOL_GPL(boot_cpuid);
50int boot_cpuid_phys; 51int boot_cpuid_phys;
51 52
53int smp_hw_index[NR_CPUS];
54
52unsigned long ISA_DMA_THRESHOLD; 55unsigned long ISA_DMA_THRESHOLD;
53unsigned int DMA_MODE_READ; 56unsigned int DMA_MODE_READ;
54unsigned int DMA_MODE_WRITE; 57unsigned int DMA_MODE_WRITE;
55 58
56int have_of = 1;
57
58#ifdef CONFIG_VGA_CONSOLE 59#ifdef CONFIG_VGA_CONSOLE
59unsigned long vgacon_remap_base; 60unsigned long vgacon_remap_base;
60EXPORT_SYMBOL(vgacon_remap_base); 61EXPORT_SYMBOL(vgacon_remap_base);
@@ -97,6 +98,10 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
97 PTRRELOC(&__start___ftr_fixup), 98 PTRRELOC(&__start___ftr_fixup),
98 PTRRELOC(&__stop___ftr_fixup)); 99 PTRRELOC(&__stop___ftr_fixup));
99 100
101 do_feature_fixups(spec->mmu_features,
102 PTRRELOC(&__start___mmu_ftr_fixup),
103 PTRRELOC(&__stop___mmu_ftr_fixup));
104
100 do_lwsync_fixups(spec->cpu_features, 105 do_lwsync_fixups(spec->cpu_features,
101 PTRRELOC(&__start___lwsync_fixup), 106 PTRRELOC(&__start___lwsync_fixup),
102 PTRRELOC(&__stop___lwsync_fixup)); 107 PTRRELOC(&__stop___lwsync_fixup));
@@ -121,6 +126,8 @@ notrace void __init machine_init(unsigned long dt_ptr)
121 126
122 probe_machine(); 127 probe_machine();
123 128
129 setup_kdump_trampoline();
130
124#ifdef CONFIG_6xx 131#ifdef CONFIG_6xx
125 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 132 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
126 cpu_has_feature(CPU_FTR_CAN_NAP)) 133 cpu_has_feature(CPU_FTR_CAN_NAP))
@@ -326,4 +333,8 @@ void __init setup_arch(char **cmdline_p)
326 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 333 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
327 334
328 paging_init(); 335 paging_init();
336
337 /* Initialize the MMU context management stuff */
338 mmu_context_init();
339
329} 340}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 169d74cef157..d8bd2161e738 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -70,7 +70,6 @@
70#define DBG(fmt...) 70#define DBG(fmt...)
71#endif 71#endif
72 72
73int have_of = 1;
74int boot_cpuid = 0; 73int boot_cpuid = 0;
75u64 ppc64_pft_size; 74u64 ppc64_pft_size;
76 75
@@ -362,6 +361,8 @@ void __init setup_system(void)
362 */ 361 */
363 do_feature_fixups(cur_cpu_spec->cpu_features, 362 do_feature_fixups(cur_cpu_spec->cpu_features,
364 &__start___ftr_fixup, &__stop___ftr_fixup); 363 &__start___ftr_fixup, &__stop___ftr_fixup);
364 do_feature_fixups(cur_cpu_spec->mmu_features,
365 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
365 do_feature_fixups(powerpc_firmware_features, 366 do_feature_fixups(powerpc_firmware_features,
366 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 367 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
367 do_lwsync_fixups(cur_cpu_spec->cpu_features, 368 do_lwsync_fixups(cur_cpu_spec->cpu_features,
@@ -606,8 +607,6 @@ void __init setup_per_cpu_areas(void)
606 607
607 for_each_possible_cpu(i) { 608 for_each_possible_cpu(i) {
608 ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size); 609 ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
609 if (!ptr)
610 panic("Cannot allocate cpu data for CPU %d\n", i);
611 610
612 paca[i].data_offset = ptr - __per_cpu_start; 611 paca[i].data_offset = ptr - __per_cpu_start;
613 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); 612 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
diff --git a/arch/powerpc/kernel/smp-tbsync.c b/arch/powerpc/kernel/smp-tbsync.c
index bc892e69b4f7..a5e54526403d 100644
--- a/arch/powerpc/kernel/smp-tbsync.c
+++ b/arch/powerpc/kernel/smp-tbsync.c
@@ -113,7 +113,7 @@ void __devinit smp_generic_give_timebase(void)
113{ 113{
114 int i, score, score2, old, min=0, max=5000, offset=1000; 114 int i, score, score2, old, min=0, max=5000, offset=1000;
115 115
116 printk("Synchronizing timebase\n"); 116 pr_debug("Software timebase sync\n");
117 117
118 /* if this fails then this kernel won't work anyway... */ 118 /* if this fails then this kernel won't work anyway... */
119 tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL ); 119 tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL );
@@ -123,13 +123,13 @@ void __devinit smp_generic_give_timebase(void)
123 while (!tbsync->ack) 123 while (!tbsync->ack)
124 barrier(); 124 barrier();
125 125
126 printk("Got ack\n"); 126 pr_debug("Got ack\n");
127 127
128 /* binary search */ 128 /* binary search */
129 for (old = -1; old != offset ; offset = (min+max) / 2) { 129 for (old = -1; old != offset ; offset = (min+max) / 2) {
130 score = start_contest(kSetAndTest, offset, NUM_ITER); 130 score = start_contest(kSetAndTest, offset, NUM_ITER);
131 131
132 printk("score %d, offset %d\n", score, offset ); 132 pr_debug("score %d, offset %d\n", score, offset );
133 133
134 if( score > 0 ) 134 if( score > 0 )
135 max = offset; 135 max = offset;
@@ -140,8 +140,8 @@ void __devinit smp_generic_give_timebase(void)
140 score = start_contest(kSetAndTest, min, NUM_ITER); 140 score = start_contest(kSetAndTest, min, NUM_ITER);
141 score2 = start_contest(kSetAndTest, max, NUM_ITER); 141 score2 = start_contest(kSetAndTest, max, NUM_ITER);
142 142
143 printk("Min %d (score %d), Max %d (score %d)\n", 143 pr_debug("Min %d (score %d), Max %d (score %d)\n",
144 min, score, max, score2); 144 min, score, max, score2);
145 score = abs(score); 145 score = abs(score);
146 score2 = abs(score2); 146 score2 = abs(score2);
147 offset = (score < score2) ? min : max; 147 offset = (score < score2) ? min : max;
@@ -155,7 +155,7 @@ void __devinit smp_generic_give_timebase(void)
155 if (score2 <= score || score2 < 20) 155 if (score2 <= score || score2 < 20)
156 break; 156 break;
157 } 157 }
158 printk("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER ); 158 pr_debug("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER );
159 159
160 /* exiting */ 160 /* exiting */
161 tbsync->cmd = kExit; 161 tbsync->cmd = kExit;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index d1165566f064..65484b2200b3 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -57,7 +57,6 @@
57#define DBG(fmt...) 57#define DBG(fmt...)
58#endif 58#endif
59 59
60int smp_hw_index[NR_CPUS];
61struct thread_info *secondary_ti; 60struct thread_info *secondary_ti;
62 61
63DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE; 62DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE;
@@ -119,6 +118,65 @@ void smp_message_recv(int msg)
119 } 118 }
120} 119}
121 120
121static irqreturn_t call_function_action(int irq, void *data)
122{
123 generic_smp_call_function_interrupt();
124 return IRQ_HANDLED;
125}
126
127static irqreturn_t reschedule_action(int irq, void *data)
128{
129 /* we just need the return path side effect of checking need_resched */
130 return IRQ_HANDLED;
131}
132
133static irqreturn_t call_function_single_action(int irq, void *data)
134{
135 generic_smp_call_function_single_interrupt();
136 return IRQ_HANDLED;
137}
138
139static irqreturn_t debug_ipi_action(int irq, void *data)
140{
141 smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
142 return IRQ_HANDLED;
143}
144
145static irq_handler_t smp_ipi_action[] = {
146 [PPC_MSG_CALL_FUNCTION] = call_function_action,
147 [PPC_MSG_RESCHEDULE] = reschedule_action,
148 [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action,
149 [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action,
150};
151
152const char *smp_ipi_name[] = {
153 [PPC_MSG_CALL_FUNCTION] = "ipi call function",
154 [PPC_MSG_RESCHEDULE] = "ipi reschedule",
155 [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single",
156 [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger",
157};
158
159/* optional function to request ipi, for controllers with >= 4 ipis */
160int smp_request_message_ipi(int virq, int msg)
161{
162 int err;
163
164 if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) {
165 return -EINVAL;
166 }
167#if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC)
168 if (msg == PPC_MSG_DEBUGGER_BREAK) {
169 return 1;
170 }
171#endif
172 err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU,
173 smp_ipi_name[msg], 0);
174 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
175 virq, smp_ipi_name[msg], err);
176
177 return err;
178}
179
122void smp_send_reschedule(int cpu) 180void smp_send_reschedule(int cpu)
123{ 181{
124 if (likely(smp_ops)) 182 if (likely(smp_ops))
@@ -404,8 +462,7 @@ out:
404static struct device_node *cpu_to_l2cache(int cpu) 462static struct device_node *cpu_to_l2cache(int cpu)
405{ 463{
406 struct device_node *np; 464 struct device_node *np;
407 const phandle *php; 465 struct device_node *cache;
408 phandle ph;
409 466
410 if (!cpu_present(cpu)) 467 if (!cpu_present(cpu))
411 return NULL; 468 return NULL;
@@ -414,13 +471,11 @@ static struct device_node *cpu_to_l2cache(int cpu)
414 if (np == NULL) 471 if (np == NULL)
415 return NULL; 472 return NULL;
416 473
417 php = of_get_property(np, "l2-cache", NULL); 474 cache = of_find_next_cache_node(np);
418 if (php == NULL) 475
419 return NULL;
420 ph = *php;
421 of_node_put(np); 476 of_node_put(np);
422 477
423 return of_find_node_by_phandle(ph); 478 return cache;
424} 479}
425 480
426/* Activate a secondary processor. */ 481/* Activate a secondary processor. */
diff --git a/arch/powerpc/kernel/swsusp.c b/arch/powerpc/kernel/swsusp.c
index 77b7b34b5955..560c96119501 100644
--- a/arch/powerpc/kernel/swsusp.c
+++ b/arch/powerpc/kernel/swsusp.c
@@ -34,6 +34,6 @@ void save_processor_state(void)
34void restore_processor_state(void) 34void restore_processor_state(void)
35{ 35{
36#ifdef CONFIG_PPC32 36#ifdef CONFIG_PPC32
37 set_context(current->active_mm->context.id, current->active_mm->pgd); 37 switch_mmu_context(NULL, current->active_mm);
38#endif 38#endif
39} 39}
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S
index 77fc76607ab2..b47d8ceffb52 100644
--- a/arch/powerpc/kernel/swsusp_32.S
+++ b/arch/powerpc/kernel/swsusp_32.S
@@ -5,7 +5,7 @@
5#include <asm/thread_info.h> 5#include <asm/thread_info.h>
6#include <asm/ppc_asm.h> 6#include <asm/ppc_asm.h>
7#include <asm/asm-offsets.h> 7#include <asm/asm-offsets.h>
8 8#include <asm/mmu.h>
9 9
10/* 10/*
11 * Structure for storing CPU registers on the save area. 11 * Structure for storing CPU registers on the save area.
@@ -279,7 +279,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
279 mtibatl 3,r4 279 mtibatl 3,r4
280#endif 280#endif
281 281
282BEGIN_FTR_SECTION 282BEGIN_MMU_FTR_SECTION
283 li r4,0 283 li r4,0
284 mtspr SPRN_DBAT4U,r4 284 mtspr SPRN_DBAT4U,r4
285 mtspr SPRN_DBAT4L,r4 285 mtspr SPRN_DBAT4L,r4
@@ -297,7 +297,7 @@ BEGIN_FTR_SECTION
297 mtspr SPRN_IBAT6L,r4 297 mtspr SPRN_IBAT6L,r4
298 mtspr SPRN_IBAT7U,r4 298 mtspr SPRN_IBAT7U,r4
299 mtspr SPRN_IBAT7L,r4 299 mtspr SPRN_IBAT7L,r4
300END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS) 300END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
301 301
302 /* Flush all TLBs */ 302 /* Flush all TLBs */
303 lis r4,0x1000 303 lis r4,0x1000
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 20885a38237a..0c64f10087b9 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -566,7 +566,6 @@ static bool cache_is_unified(struct device_node *np)
566 566
567static struct cache_desc * __cpuinit create_cache_index_info(struct device_node *np, struct kobject *parent, int index, int level) 567static struct cache_desc * __cpuinit create_cache_index_info(struct device_node *np, struct kobject *parent, int index, int level)
568{ 568{
569 const phandle *next_cache_phandle;
570 struct device_node *next_cache; 569 struct device_node *next_cache;
571 struct cache_desc *new, **end; 570 struct cache_desc *new, **end;
572 571
@@ -591,11 +590,7 @@ static struct cache_desc * __cpuinit create_cache_index_info(struct device_node
591 while (*end) 590 while (*end)
592 end = &(*end)->next; 591 end = &(*end)->next;
593 592
594 next_cache_phandle = of_get_property(np, "l2-cache", NULL); 593 next_cache = of_find_next_cache_node(np);
595 if (!next_cache_phandle)
596 goto out;
597
598 next_cache = of_find_node_by_phandle(*next_cache_phandle);
599 if (!next_cache) 594 if (!next_cache)
600 goto out; 595 goto out;
601 596
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 6f39d35d6f55..99f1ddd68582 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -164,8 +164,6 @@ static u64 tb_to_ns_scale __read_mostly;
164static unsigned tb_to_ns_shift __read_mostly; 164static unsigned tb_to_ns_shift __read_mostly;
165static unsigned long boot_tb __read_mostly; 165static unsigned long boot_tb __read_mostly;
166 166
167static struct gettimeofday_struct do_gtod;
168
169extern struct timezone sys_tz; 167extern struct timezone sys_tz;
170static long timezone_offset; 168static long timezone_offset;
171 169
@@ -415,31 +413,9 @@ void udelay(unsigned long usecs)
415} 413}
416EXPORT_SYMBOL(udelay); 414EXPORT_SYMBOL(udelay);
417 415
418
419/*
420 * There are two copies of tb_to_xs and stamp_xsec so that no
421 * lock is needed to access and use these values in
422 * do_gettimeofday. We alternate the copies and as long as a
423 * reasonable time elapses between changes, there will never
424 * be inconsistent values. ntpd has a minimum of one minute
425 * between updates.
426 */
427static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec, 416static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
428 u64 new_tb_to_xs) 417 u64 new_tb_to_xs)
429{ 418{
430 unsigned temp_idx;
431 struct gettimeofday_vars *temp_varp;
432
433 temp_idx = (do_gtod.var_idx == 0);
434 temp_varp = &do_gtod.vars[temp_idx];
435
436 temp_varp->tb_to_xs = new_tb_to_xs;
437 temp_varp->tb_orig_stamp = new_tb_stamp;
438 temp_varp->stamp_xsec = new_stamp_xsec;
439 smp_mb();
440 do_gtod.varp = temp_varp;
441 do_gtod.var_idx = temp_idx;
442
443 /* 419 /*
444 * tb_update_count is used to allow the userspace gettimeofday code 420 * tb_update_count is used to allow the userspace gettimeofday code
445 * to assure itself that it sees a consistent view of the tb_to_xs and 421 * to assure itself that it sees a consistent view of the tb_to_xs and
@@ -456,6 +432,7 @@ static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
456 vdso_data->tb_to_xs = new_tb_to_xs; 432 vdso_data->tb_to_xs = new_tb_to_xs;
457 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 433 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
458 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 434 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
435 vdso_data->stamp_xtime = xtime;
459 smp_wmb(); 436 smp_wmb();
460 ++(vdso_data->tb_update_count); 437 ++(vdso_data->tb_update_count);
461} 438}
@@ -514,9 +491,7 @@ static int __init iSeries_tb_recal(void)
514 tb_ticks_per_sec = new_tb_ticks_per_sec; 491 tb_ticks_per_sec = new_tb_ticks_per_sec;
515 calc_cputime_factors(); 492 calc_cputime_factors();
516 div128_by_32( XSEC_PER_SEC, 0, tb_ticks_per_sec, &divres ); 493 div128_by_32( XSEC_PER_SEC, 0, tb_ticks_per_sec, &divres );
517 do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
518 tb_to_xs = divres.result_low; 494 tb_to_xs = divres.result_low;
519 do_gtod.varp->tb_to_xs = tb_to_xs;
520 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec; 495 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
521 vdso_data->tb_to_xs = tb_to_xs; 496 vdso_data->tb_to_xs = tb_to_xs;
522 } 497 }
@@ -988,15 +963,6 @@ void __init time_init(void)
988 sys_tz.tz_dsttime = 0; 963 sys_tz.tz_dsttime = 0;
989 } 964 }
990 965
991 do_gtod.varp = &do_gtod.vars[0];
992 do_gtod.var_idx = 0;
993 do_gtod.varp->tb_orig_stamp = tb_last_jiffy;
994 __get_cpu_var(last_jiffy) = tb_last_jiffy;
995 do_gtod.varp->stamp_xsec = (u64) xtime.tv_sec * XSEC_PER_SEC;
996 do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
997 do_gtod.varp->tb_to_xs = tb_to_xs;
998 do_gtod.tb_to_us = tb_to_us;
999
1000 vdso_data->tb_orig_stamp = tb_last_jiffy; 966 vdso_data->tb_orig_stamp = tb_last_jiffy;
1001 vdso_data->tb_update_count = 0; 967 vdso_data->tb_update_count = 0;
1002 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec; 968 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index f5def6cf5cd6..5457e9575685 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1160,37 +1160,85 @@ void CacheLockingException(struct pt_regs *regs, unsigned long address,
1160#ifdef CONFIG_SPE 1160#ifdef CONFIG_SPE
1161void SPEFloatingPointException(struct pt_regs *regs) 1161void SPEFloatingPointException(struct pt_regs *regs)
1162{ 1162{
1163 extern int do_spe_mathemu(struct pt_regs *regs);
1163 unsigned long spefscr; 1164 unsigned long spefscr;
1164 int fpexc_mode; 1165 int fpexc_mode;
1165 int code = 0; 1166 int code = 0;
1167 int err;
1168
1169 preempt_disable();
1170 if (regs->msr & MSR_SPE)
1171 giveup_spe(current);
1172 preempt_enable();
1166 1173
1167 spefscr = current->thread.spefscr; 1174 spefscr = current->thread.spefscr;
1168 fpexc_mode = current->thread.fpexc_mode; 1175 fpexc_mode = current->thread.fpexc_mode;
1169 1176
1170 /* Hardware does not neccessarily set sticky
1171 * underflow/overflow/invalid flags */
1172 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1177 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1173 code = FPE_FLTOVF; 1178 code = FPE_FLTOVF;
1174 spefscr |= SPEFSCR_FOVFS;
1175 } 1179 }
1176 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1180 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1177 code = FPE_FLTUND; 1181 code = FPE_FLTUND;
1178 spefscr |= SPEFSCR_FUNFS;
1179 } 1182 }
1180 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1183 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1181 code = FPE_FLTDIV; 1184 code = FPE_FLTDIV;
1182 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1185 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1183 code = FPE_FLTINV; 1186 code = FPE_FLTINV;
1184 spefscr |= SPEFSCR_FINVS;
1185 } 1187 }
1186 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1188 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1187 code = FPE_FLTRES; 1189 code = FPE_FLTRES;
1188 1190
1189 current->thread.spefscr = spefscr; 1191 err = do_spe_mathemu(regs);
1192 if (err == 0) {
1193 regs->nip += 4; /* skip emulated instruction */
1194 emulate_single_step(regs);
1195 return;
1196 }
1197
1198 if (err == -EFAULT) {
1199 /* got an error reading the instruction */
1200 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1201 } else if (err == -EINVAL) {
1202 /* didn't recognize the instruction */
1203 printk(KERN_ERR "unrecognized spe instruction "
1204 "in %s at %lx\n", current->comm, regs->nip);
1205 } else {
1206 _exception(SIGFPE, regs, code, regs->nip);
1207 }
1190 1208
1191 _exception(SIGFPE, regs, code, regs->nip);
1192 return; 1209 return;
1193} 1210}
1211
1212void SPEFloatingPointRoundException(struct pt_regs *regs)
1213{
1214 extern int speround_handler(struct pt_regs *regs);
1215 int err;
1216
1217 preempt_disable();
1218 if (regs->msr & MSR_SPE)
1219 giveup_spe(current);
1220 preempt_enable();
1221
1222 regs->nip -= 4;
1223 err = speround_handler(regs);
1224 if (err == 0) {
1225 regs->nip += 4; /* skip emulated instruction */
1226 emulate_single_step(regs);
1227 return;
1228 }
1229
1230 if (err == -EFAULT) {
1231 /* got an error reading the instruction */
1232 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1233 } else if (err == -EINVAL) {
1234 /* didn't recognize the instruction */
1235 printk(KERN_ERR "unrecognized spe instruction "
1236 "in %s at %lx\n", current->comm, regs->nip);
1237 } else {
1238 _exception(SIGFPE, regs, 0, regs->nip);
1239 return;
1240 }
1241}
1194#endif 1242#endif
1195 1243
1196/* 1244/*
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 65639a43e644..ad06d5c75b15 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -184,8 +184,7 @@ static void dump_vdso_pages(struct vm_area_struct * vma)
184 * This is called from binfmt_elf, we create the special vma for the 184 * This is called from binfmt_elf, we create the special vma for the
185 * vDSO and insert it into the mm struct tree 185 * vDSO and insert it into the mm struct tree
186 */ 186 */
187int arch_setup_additional_pages(struct linux_binprm *bprm, 187int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
188 int executable_stack)
189{ 188{
190 struct mm_struct *mm = current->mm; 189 struct mm_struct *mm = current->mm;
191 struct page **vdso_pagelist; 190 struct page **vdso_pagelist;
@@ -567,6 +566,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32,
567 do_feature_fixups(cur_cpu_spec->cpu_features, 566 do_feature_fixups(cur_cpu_spec->cpu_features,
568 start64, start64 + size64); 567 start64, start64 + size64);
569 568
569 start64 = find_section64(v64->hdr, "__mmu_ftr_fixup", &size64);
570 if (start64)
571 do_feature_fixups(cur_cpu_spec->mmu_features,
572 start64, start64 + size64);
573
570 start64 = find_section64(v64->hdr, "__fw_ftr_fixup", &size64); 574 start64 = find_section64(v64->hdr, "__fw_ftr_fixup", &size64);
571 if (start64) 575 if (start64)
572 do_feature_fixups(powerpc_firmware_features, 576 do_feature_fixups(powerpc_firmware_features,
@@ -583,6 +587,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32,
583 do_feature_fixups(cur_cpu_spec->cpu_features, 587 do_feature_fixups(cur_cpu_spec->cpu_features,
584 start32, start32 + size32); 588 start32, start32 + size32);
585 589
590 start32 = find_section32(v32->hdr, "__mmu_ftr_fixup", &size32);
591 if (start32)
592 do_feature_fixups(cur_cpu_spec->mmu_features,
593 start32, start32 + size32);
594
586#ifdef CONFIG_PPC64 595#ifdef CONFIG_PPC64
587 start32 = find_section32(v32->hdr, "__fw_ftr_fixup", &size32); 596 start32 = find_section32(v32->hdr, "__fw_ftr_fixup", &size32);
588 if (start32) 597 if (start32)
diff --git a/arch/powerpc/kernel/vdso32/gettimeofday.S b/arch/powerpc/kernel/vdso32/gettimeofday.S
index 72ca26df457e..ee038d4bf252 100644
--- a/arch/powerpc/kernel/vdso32/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso32/gettimeofday.S
@@ -16,6 +16,13 @@
16#include <asm/asm-offsets.h> 16#include <asm/asm-offsets.h>
17#include <asm/unistd.h> 17#include <asm/unistd.h>
18 18
19/* Offset for the low 32-bit part of a field of long type */
20#ifdef CONFIG_PPC64
21#define LOPART 4
22#else
23#define LOPART 0
24#endif
25
19 .text 26 .text
20/* 27/*
21 * Exact prototype of gettimeofday 28 * Exact prototype of gettimeofday
@@ -90,101 +97,53 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
90 97
91 mflr r12 /* r12 saves lr */ 98 mflr r12 /* r12 saves lr */
92 .cfi_register lr,r12 99 .cfi_register lr,r12
93 mr r10,r3 /* r10 saves id */
94 mr r11,r4 /* r11 saves tp */ 100 mr r11,r4 /* r11 saves tp */
95 bl __get_datapage@local /* get data page */ 101 bl __get_datapage@local /* get data page */
96 mr r9,r3 /* datapage ptr in r9 */ 102 mr r9,r3 /* datapage ptr in r9 */
97 beq cr1,50f /* if monotonic -> jump there */
98
99 /*
100 * CLOCK_REALTIME
101 */
102
103 bl __do_get_xsec@local /* get xsec from tb & kernel */
104 bne- 98f /* out of line -> do syscall */
105
106 /* seconds are xsec >> 20 */
107 rlwinm r5,r4,12,20,31
108 rlwimi r5,r3,12,0,19
109 stw r5,TSPC32_TV_SEC(r11)
110 103
111 /* get remaining xsec and convert to nsec. we scale 10450: bl __do_get_tspec@local /* get sec/nsec from tb & kernel */
112 * up remaining xsec by 12 bits and get the top 32 bits 105 bne cr1,80f /* not monotonic -> all done */
113 * of the multiplication, then we multiply by 1000
114 */
115 rlwinm r5,r4,12,0,19
116 lis r6,1000000@h
117 ori r6,r6,1000000@l
118 mulhwu r5,r5,r6
119 mulli r5,r5,1000
120 stw r5,TSPC32_TV_NSEC(r11)
121 mtlr r12
122 crclr cr0*4+so
123 li r3,0
124 blr
125 106
126 /* 107 /*
127 * CLOCK_MONOTONIC 108 * CLOCK_MONOTONIC
128 */ 109 */
129 110
13050: bl __do_get_xsec@local /* get xsec from tb & kernel */
131 bne- 98f /* out of line -> do syscall */
132
133 /* seconds are xsec >> 20 */
134 rlwinm r6,r4,12,20,31
135 rlwimi r6,r3,12,0,19
136
137 /* get remaining xsec and convert to nsec. we scale
138 * up remaining xsec by 12 bits and get the top 32 bits
139 * of the multiplication, then we multiply by 1000
140 */
141 rlwinm r7,r4,12,0,19
142 lis r5,1000000@h
143 ori r5,r5,1000000@l
144 mulhwu r7,r7,r5
145 mulli r7,r7,1000
146
147 /* now we must fixup using wall to monotonic. We need to snapshot 111 /* now we must fixup using wall to monotonic. We need to snapshot
148 * that value and do the counter trick again. Fortunately, we still 112 * that value and do the counter trick again. Fortunately, we still
149 * have the counter value in r8 that was returned by __do_get_xsec. 113 * have the counter value in r8 that was returned by __do_get_xsec.
150 * At this point, r6,r7 contain our sec/nsec values, r3,r4 and r5 114 * At this point, r3,r4 contain our sec/nsec values, r5 and r6
151 * can be used 115 * can be used, r7 contains NSEC_PER_SEC.
152 */ 116 */
153 117
154 lwz r3,WTOM_CLOCK_SEC(r9) 118 lwz r5,WTOM_CLOCK_SEC(r9)
155 lwz r4,WTOM_CLOCK_NSEC(r9) 119 lwz r6,WTOM_CLOCK_NSEC(r9)
156 120
157 /* We now have our result in r3,r4. We create a fake dependency 121 /* We now have our offset in r5,r6. We create a fake dependency
158 * on that result and re-check the counter 122 * on that value and re-check the counter
159 */ 123 */
160 or r5,r4,r3 124 or r0,r6,r5
161 xor r0,r5,r5 125 xor r0,r0,r0
162 add r9,r9,r0 126 add r9,r9,r0
163#ifdef CONFIG_PPC64 127 lwz r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
164 lwz r0,(CFG_TB_UPDATE_COUNT+4)(r9)
165#else
166 lwz r0,(CFG_TB_UPDATE_COUNT)(r9)
167#endif
168 cmpl cr0,r8,r0 /* check if updated */ 128 cmpl cr0,r8,r0 /* check if updated */
169 bne- 50b 129 bne- 50b
170 130
171 /* Calculate and store result. Note that this mimmics the C code, 131 /* Calculate and store result. Note that this mimics the C code,
172 * which may cause funny results if nsec goes negative... is that 132 * which may cause funny results if nsec goes negative... is that
173 * possible at all ? 133 * possible at all ?
174 */ 134 */
175 add r3,r3,r6 135 add r3,r3,r5
176 add r4,r4,r7 136 add r4,r4,r6
177 lis r5,NSEC_PER_SEC@h 137 cmpw cr0,r4,r7
178 ori r5,r5,NSEC_PER_SEC@l 138 cmpwi cr1,r4,0
179 cmpl cr0,r4,r5
180 cmpli cr1,r4,0
181 blt 1f 139 blt 1f
182 subf r4,r5,r4 140 subf r4,r7,r4
183 addi r3,r3,1 141 addi r3,r3,1
1841: bge cr1,1f 1421: bge cr1,80f
185 addi r3,r3,-1 143 addi r3,r3,-1
186 add r4,r4,r5 144 add r4,r4,r7
1871: stw r3,TSPC32_TV_SEC(r11) 145
14680: stw r3,TSPC32_TV_SEC(r11)
188 stw r4,TSPC32_TV_NSEC(r11) 147 stw r4,TSPC32_TV_NSEC(r11)
189 148
190 mtlr r12 149 mtlr r12
@@ -195,10 +154,6 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
195 /* 154 /*
196 * syscall fallback 155 * syscall fallback
197 */ 156 */
19898:
199 mtlr r12
200 mr r3,r10
201 mr r4,r11
20299: 15799:
203 li r0,__NR_clock_gettime 158 li r0,__NR_clock_gettime
204 sc 159 sc
@@ -254,11 +209,7 @@ __do_get_xsec:
254 /* Check for update count & load values. We use the low 209 /* Check for update count & load values. We use the low
255 * order 32 bits of the update count 210 * order 32 bits of the update count
256 */ 211 */
257#ifdef CONFIG_PPC64 2121: lwz r8,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
2581: lwz r8,(CFG_TB_UPDATE_COUNT+4)(r9)
259#else
2601: lwz r8,(CFG_TB_UPDATE_COUNT)(r9)
261#endif
262 andi. r0,r8,1 /* pending update ? loop */ 213 andi. r0,r8,1 /* pending update ? loop */
263 bne- 1b 214 bne- 1b
264 xor r0,r8,r8 /* create dependency */ 215 xor r0,r8,r8 /* create dependency */
@@ -305,11 +256,7 @@ __do_get_xsec:
305 or r6,r4,r3 256 or r6,r4,r3
306 xor r0,r6,r6 257 xor r0,r6,r6
307 add r9,r9,r0 258 add r9,r9,r0
308#ifdef CONFIG_PPC64 259 lwz r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
309 lwz r0,(CFG_TB_UPDATE_COUNT+4)(r9)
310#else
311 lwz r0,(CFG_TB_UPDATE_COUNT)(r9)
312#endif
313 cmpl cr0,r8,r0 /* check if updated */ 260 cmpl cr0,r8,r0 /* check if updated */
314 bne- 1b 261 bne- 1b
315 262
@@ -322,3 +269,98 @@ __do_get_xsec:
322 */ 269 */
3233: blr 2703: blr
324 .cfi_endproc 271 .cfi_endproc
272
273/*
274 * This is the core of clock_gettime(), it returns the current
275 * time in seconds and nanoseconds in r3 and r4.
276 * It expects the datapage ptr in r9 and doesn't clobber it.
277 * It clobbers r0, r5, r6, r10 and returns NSEC_PER_SEC in r7.
278 * On return, r8 contains the counter value that can be reused.
279 * This clobbers cr0 but not any other cr field.
280 */
281__do_get_tspec:
282 .cfi_startproc
283 /* Check for update count & load values. We use the low
284 * order 32 bits of the update count
285 */
2861: lwz r8,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
287 andi. r0,r8,1 /* pending update ? loop */
288 bne- 1b
289 xor r0,r8,r8 /* create dependency */
290 add r9,r9,r0
291
292 /* Load orig stamp (offset to TB) */
293 lwz r5,CFG_TB_ORIG_STAMP(r9)
294 lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
295
296 /* Get a stable TB value */
2972: mftbu r3
298 mftbl r4
299 mftbu r0
300 cmpl cr0,r3,r0
301 bne- 2b
302
303 /* Subtract tb orig stamp and shift left 12 bits.
304 */
305 subfc r7,r6,r4
306 subfe r0,r5,r3
307 slwi r0,r0,12
308 rlwimi. r0,r7,12,20,31
309 slwi r7,r7,12
310
311 /* Load scale factor & do multiplication */
312 lwz r5,CFG_TB_TO_XS(r9) /* load values */
313 lwz r6,(CFG_TB_TO_XS+4)(r9)
314 mulhwu r3,r7,r6
315 mullw r10,r7,r5
316 mulhwu r4,r7,r5
317 addc r10,r3,r10
318 li r3,0
319
320 beq+ 4f /* skip high part computation if 0 */
321 mulhwu r3,r0,r5
322 mullw r7,r0,r5
323 mulhwu r5,r0,r6
324 mullw r6,r0,r6
325 adde r4,r4,r7
326 addze r3,r3
327 addc r4,r4,r5
328 addze r3,r3
329 addc r10,r10,r6
330
3314: addze r4,r4 /* add in carry */
332 lis r7,NSEC_PER_SEC@h
333 ori r7,r7,NSEC_PER_SEC@l
334 mulhwu r4,r4,r7 /* convert to nanoseconds */
335
336 /* At this point, we have seconds & nanoseconds since the xtime
337 * stamp in r3+CA and r4. Load & add the xtime stamp.
338 */
339#ifdef CONFIG_PPC64
340 lwz r5,STAMP_XTIME+TSPC64_TV_SEC+LOPART(r9)
341 lwz r6,STAMP_XTIME+TSPC64_TV_NSEC+LOPART(r9)
342#else
343 lwz r5,STAMP_XTIME+TSPC32_TV_SEC(r9)
344 lwz r6,STAMP_XTIME+TSPC32_TV_NSEC(r9)
345#endif
346 add r4,r4,r6
347 adde r3,r3,r5
348
349 /* We now have our result in r3,r4. We create a fake dependency
350 * on that result and re-check the counter
351 */
352 or r6,r4,r3
353 xor r0,r6,r6
354 add r9,r9,r0
355 lwz r0,(CFG_TB_UPDATE_COUNT+LOPART)(r9)
356 cmpl cr0,r8,r0 /* check if updated */
357 bne- 1b
358
359 /* check for nanosecond overflow and adjust if necessary */
360 cmpw r4,r7
361 bltlr /* all done if no overflow */
362 subf r4,r7,r4 /* adjust if overflow */
363 addi r3,r3,1
364
365 blr
366 .cfi_endproc
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index be3b6a41dc09..904ef1360dd7 100644
--- a/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -34,6 +34,9 @@ SECTIONS
34 __ftr_fixup : { *(__ftr_fixup) } 34 __ftr_fixup : { *(__ftr_fixup) }
35 35
36 . = ALIGN(8); 36 . = ALIGN(8);
37 __mmu_ftr_fixup : { *(__mmu_ftr_fixup) }
38
39 . = ALIGN(8);
37 __lwsync_fixup : { *(__lwsync_fixup) } 40 __lwsync_fixup : { *(__lwsync_fixup) }
38 41
39#ifdef CONFIG_PPC64 42#ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/vdso64/gettimeofday.S b/arch/powerpc/kernel/vdso64/gettimeofday.S
index c6401f9e37f1..262cd5857a56 100644
--- a/arch/powerpc/kernel/vdso64/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso64/gettimeofday.S
@@ -75,90 +75,49 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
75 75
76 mflr r12 /* r12 saves lr */ 76 mflr r12 /* r12 saves lr */
77 .cfi_register lr,r12 77 .cfi_register lr,r12
78 mr r10,r3 /* r10 saves id */
79 mr r11,r4 /* r11 saves tp */ 78 mr r11,r4 /* r11 saves tp */
80 bl V_LOCAL_FUNC(__get_datapage) /* get data page */ 79 bl V_LOCAL_FUNC(__get_datapage) /* get data page */
81 beq cr1,50f /* if monotonic -> jump there */ 8050: bl V_LOCAL_FUNC(__do_get_tspec) /* get time from tb & kernel */
82 81 bne cr1,80f /* if not monotonic, all done */
83 /*
84 * CLOCK_REALTIME
85 */
86
87 bl V_LOCAL_FUNC(__do_get_xsec) /* get xsec from tb & kernel */
88
89 lis r7,15 /* r7 = 1000000 = USEC_PER_SEC */
90 ori r7,r7,16960
91 rldicl r5,r4,44,20 /* r5 = sec = xsec / XSEC_PER_SEC */
92 rldicr r6,r5,20,43 /* r6 = sec * XSEC_PER_SEC */
93 std r5,TSPC64_TV_SEC(r11) /* store sec in tv */
94 subf r0,r6,r4 /* r0 = xsec = (xsec - r6) */
95 mulld r0,r0,r7 /* usec = (xsec * USEC_PER_SEC) /
96 * XSEC_PER_SEC
97 */
98 rldicl r0,r0,44,20
99 mulli r0,r0,1000 /* nsec = usec * 1000 */
100 std r0,TSPC64_TV_NSEC(r11) /* store nsec in tp */
101
102 mtlr r12
103 crclr cr0*4+so
104 li r3,0
105 blr
106 82
107 /* 83 /*
108 * CLOCK_MONOTONIC 84 * CLOCK_MONOTONIC
109 */ 85 */
110 86
11150: bl V_LOCAL_FUNC(__do_get_xsec) /* get xsec from tb & kernel */
112
113 lis r7,15 /* r7 = 1000000 = USEC_PER_SEC */
114 ori r7,r7,16960
115 rldicl r5,r4,44,20 /* r5 = sec = xsec / XSEC_PER_SEC */
116 rldicr r6,r5,20,43 /* r6 = sec * XSEC_PER_SEC */
117 subf r0,r6,r4 /* r0 = xsec = (xsec - r6) */
118 mulld r0,r0,r7 /* usec = (xsec * USEC_PER_SEC) /
119 * XSEC_PER_SEC
120 */
121 rldicl r6,r0,44,20
122 mulli r6,r6,1000 /* nsec = usec * 1000 */
123
124 /* now we must fixup using wall to monotonic. We need to snapshot 87 /* now we must fixup using wall to monotonic. We need to snapshot
125 * that value and do the counter trick again. Fortunately, we still 88 * that value and do the counter trick again. Fortunately, we still
126 * have the counter value in r8 that was returned by __do_get_xsec. 89 * have the counter value in r8 that was returned by __do_get_tspec.
127 * At this point, r5,r6 contain our sec/nsec values. 90 * At this point, r4,r5 contain our sec/nsec values.
128 * can be used
129 */ 91 */
130 92
131 lwa r4,WTOM_CLOCK_SEC(r3) 93 lwa r6,WTOM_CLOCK_SEC(r3)
132 lwa r7,WTOM_CLOCK_NSEC(r3) 94 lwa r9,WTOM_CLOCK_NSEC(r3)
133 95
134 /* We now have our result in r4,r7. We create a fake dependency 96 /* We now have our result in r6,r9. We create a fake dependency
135 * on that result and re-check the counter 97 * on that result and re-check the counter
136 */ 98 */
137 or r9,r4,r7 99 or r0,r6,r9
138 xor r0,r9,r9 100 xor r0,r0,r0
139 add r3,r3,r0 101 add r3,r3,r0
140 ld r0,CFG_TB_UPDATE_COUNT(r3) 102 ld r0,CFG_TB_UPDATE_COUNT(r3)
141 cmpld cr0,r0,r8 /* check if updated */ 103 cmpld cr0,r0,r8 /* check if updated */
142 bne- 50b 104 bne- 50b
143 105
144 /* Calculate and store result. Note that this mimmics the C code, 106 /* Add wall->monotonic offset and check for overflow or underflow.
145 * which may cause funny results if nsec goes negative... is that
146 * possible at all ?
147 */ 107 */
148 add r4,r4,r5 108 add r4,r4,r6
149 add r7,r7,r6 109 add r5,r5,r9
150 lis r9,NSEC_PER_SEC@h 110 cmpd cr0,r5,r7
151 ori r9,r9,NSEC_PER_SEC@l 111 cmpdi cr1,r5,0
152 cmpl cr0,r7,r9
153 cmpli cr1,r7,0
154 blt 1f 112 blt 1f
155 subf r7,r9,r7 113 subf r5,r7,r5
156 addi r4,r4,1 114 addi r4,r4,1
1571: bge cr1,1f 1151: bge cr1,80f
158 addi r4,r4,-1 116 addi r4,r4,-1
159 add r7,r7,r9 117 add r5,r5,r7
1601: std r4,TSPC64_TV_SEC(r11) 118
161 std r7,TSPC64_TV_NSEC(r11) 11980: std r4,TSPC64_TV_SEC(r11)
120 std r5,TSPC64_TV_NSEC(r11)
162 121
163 mtlr r12 122 mtlr r12
164 crclr cr0*4+so 123 crclr cr0*4+so
@@ -168,10 +127,6 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
168 /* 127 /*
169 * syscall fallback 128 * syscall fallback
170 */ 129 */
17198:
172 mtlr r12
173 mr r3,r10
174 mr r4,r11
17599: 13099:
176 li r0,__NR_clock_gettime 131 li r0,__NR_clock_gettime
177 sc 132 sc
@@ -253,3 +208,59 @@ V_FUNCTION_BEGIN(__do_get_xsec)
253 blr 208 blr
254 .cfi_endproc 209 .cfi_endproc
255V_FUNCTION_END(__do_get_xsec) 210V_FUNCTION_END(__do_get_xsec)
211
212/*
213 * This is the core of clock_gettime(), it returns the current
214 * time in seconds and nanoseconds in r4 and r5.
215 * It expects the datapage ptr in r3 and doesn't clobber it.
216 * It clobbers r0 and r6 and returns NSEC_PER_SEC in r7.
217 * On return, r8 contains the counter value that can be reused.
218 * This clobbers cr0 but not any other cr field.
219 */
220V_FUNCTION_BEGIN(__do_get_tspec)
221 .cfi_startproc
222 /* check for update count & load values */
2231: ld r8,CFG_TB_UPDATE_COUNT(r3)
224 andi. r0,r8,1 /* pending update ? loop */
225 bne- 1b
226 xor r0,r8,r8 /* create dependency */
227 add r3,r3,r0
228
229 /* Get TB & offset it. We use the MFTB macro which will generate
230 * workaround code for Cell.
231 */
232 MFTB(r7)
233 ld r9,CFG_TB_ORIG_STAMP(r3)
234 subf r7,r9,r7
235
236 /* Scale result */
237 ld r5,CFG_TB_TO_XS(r3)
238 sldi r7,r7,12 /* compute time since stamp_xtime */
239 mulhdu r6,r7,r5 /* in units of 2^-32 seconds */
240
241 /* Add stamp since epoch */
242 ld r4,STAMP_XTIME+TSPC64_TV_SEC(r3)
243 ld r5,STAMP_XTIME+TSPC64_TV_NSEC(r3)
244 or r0,r4,r5
245 or r0,r0,r6
246 xor r0,r0,r0
247 add r3,r3,r0
248 ld r0,CFG_TB_UPDATE_COUNT(r3)
249 cmpld r0,r8 /* check if updated */
250 bne- 1b /* reload if so */
251
252 /* convert to seconds & nanoseconds and add to stamp */
253 lis r7,NSEC_PER_SEC@h
254 ori r7,r7,NSEC_PER_SEC@l
255 mulhwu r0,r6,r7 /* compute nanoseconds and */
256 srdi r6,r6,32 /* seconds since stamp_xtime */
257 clrldi r0,r0,32
258 add r5,r5,r0 /* add nanoseconds together */
259 cmpd r5,r7 /* overflow? */
260 add r4,r4,r6
261 bltlr /* all done if no overflow */
262 subf r5,r7,r5 /* if overflow, adjust */
263 addi r4,r4,1
264 blr
265 .cfi_endproc
266V_FUNCTION_END(__do_get_tspec)
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index d0b2526dd38d..0e615404e247 100644
--- a/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -35,6 +35,9 @@ SECTIONS
35 __ftr_fixup : { *(__ftr_fixup) } 35 __ftr_fixup : { *(__ftr_fixup) }
36 36
37 . = ALIGN(8); 37 . = ALIGN(8);
38 __mmu_ftr_fixup : { *(__mmu_ftr_fixup) }
39
40 . = ALIGN(8);
38 __lwsync_fixup : { *(__lwsync_fixup) } 41 __lwsync_fixup : { *(__lwsync_fixup) }
39 42
40 . = ALIGN(8); 43 . = ALIGN(8);
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index a11e6bc59b30..94aa7b011b27 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -41,9 +41,9 @@
41static struct bus_type vio_bus_type; 41static struct bus_type vio_bus_type;
42 42
43static struct vio_dev vio_bus_device = { /* fake "parent" device */ 43static struct vio_dev vio_bus_device = { /* fake "parent" device */
44 .name = vio_bus_device.dev.bus_id, 44 .name = "vio",
45 .type = "", 45 .type = "",
46 .dev.bus_id = "vio", 46 .dev.init_name = "vio",
47 .dev.bus = &vio_bus_type, 47 .dev.bus = &vio_bus_type,
48}; 48};
49 49
@@ -1216,7 +1216,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
1216 1216
1217 viodev->irq = irq_of_parse_and_map(of_node, 0); 1217 viodev->irq = irq_of_parse_and_map(of_node, 0);
1218 1218
1219 snprintf(viodev->dev.bus_id, BUS_ID_SIZE, "%x", *unit_address); 1219 dev_set_name(&viodev->dev, "%x", *unit_address);
1220 viodev->name = of_node->name; 1220 viodev->name = of_node->name;
1221 viodev->type = of_node->type; 1221 viodev->type = of_node->type;
1222 viodev->unit_address = *unit_address; 1222 viodev->unit_address = *unit_address;
@@ -1243,7 +1243,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
1243 /* register with generic device framework */ 1243 /* register with generic device framework */
1244 if (device_register(&viodev->dev)) { 1244 if (device_register(&viodev->dev)) {
1245 printk(KERN_ERR "%s: failed to register device %s\n", 1245 printk(KERN_ERR "%s: failed to register device %s\n",
1246 __func__, viodev->dev.bus_id); 1246 __func__, dev_name(&viodev->dev));
1247 /* XXX free TCE table */ 1247 /* XXX free TCE table */
1248 kfree(viodev); 1248 kfree(viodev);
1249 return NULL; 1249 return NULL;
@@ -1400,13 +1400,13 @@ static struct vio_dev *vio_find_name(const char *name)
1400struct vio_dev *vio_find_node(struct device_node *vnode) 1400struct vio_dev *vio_find_node(struct device_node *vnode)
1401{ 1401{
1402 const uint32_t *unit_address; 1402 const uint32_t *unit_address;
1403 char kobj_name[BUS_ID_SIZE]; 1403 char kobj_name[20];
1404 1404
1405 /* construct the kobject name from the device node */ 1405 /* construct the kobject name from the device node */
1406 unit_address = of_get_property(vnode, "reg", NULL); 1406 unit_address = of_get_property(vnode, "reg", NULL);
1407 if (!unit_address) 1407 if (!unit_address)
1408 return NULL; 1408 return NULL;
1409 snprintf(kobj_name, BUS_ID_SIZE, "%x", *unit_address); 1409 snprintf(kobj_name, sizeof(kobj_name), "%x", *unit_address);
1410 1410
1411 return vio_find_name(kobj_name); 1411 return vio_find_name(kobj_name);
1412} 1412}
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 2412c056baa4..47bf15cd2c9e 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -152,6 +152,12 @@ SECTIONS
152 __stop___ftr_fixup = .; 152 __stop___ftr_fixup = .;
153 } 153 }
154 . = ALIGN(8); 154 . = ALIGN(8);
155 __mmu_ftr_fixup : AT(ADDR(__mmu_ftr_fixup) - LOAD_OFFSET) {
156 __start___mmu_ftr_fixup = .;
157 *(__mmu_ftr_fixup)
158 __stop___mmu_ftr_fixup = .;
159 }
160 . = ALIGN(8);
155 __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) { 161 __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
156 __start___lwsync_fixup = .; 162 __start___lwsync_fixup = .;
157 *(__lwsync_fixup) 163 *(__lwsync_fixup)
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index fda9baada132..8bef0efcdfe1 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -28,6 +28,7 @@
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <asm/kvm_ppc.h> 29#include <asm/kvm_ppc.h>
30#include <asm/tlbflush.h> 30#include <asm/tlbflush.h>
31#include "../mm/mmu_decl.h"
31 32
32 33
33gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) 34gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
@@ -330,7 +331,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
330 /* XXX It would be nice to differentiate between heavyweight exit and 331 /* XXX It would be nice to differentiate between heavyweight exit and
331 * sched_out here, since we could avoid the TLB flush for heavyweight 332 * sched_out here, since we could avoid the TLB flush for heavyweight
332 * exits. */ 333 * exits. */
333 _tlbia(); 334 _tlbil_all();
334} 335}
335 336
336int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, 337int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index d69912c07ce7..8db35278a4b4 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -6,6 +6,9 @@ ifeq ($(CONFIG_PPC64),y)
6EXTRA_CFLAGS += -mno-minimal-toc 6EXTRA_CFLAGS += -mno-minimal-toc
7endif 7endif
8 8
9CFLAGS_REMOVE_code-patching.o = -pg
10CFLAGS_REMOVE_feature-fixups.o = -pg
11
9obj-y := string.o alloc.o \ 12obj-y := string.o alloc.o \
10 checksum_$(CONFIG_WORD_SIZE).o 13 checksum_$(CONFIG_WORD_SIZE).o
11obj-$(CONFIG_PPC32) += div64.o copy_32.o crtsavres.o 14obj-$(CONFIG_PPC32) += div64.o copy_32.o crtsavres.o
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 25ec5378afa4..70693a5c12a1 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -26,11 +26,24 @@ _GLOBAL(__copy_tofrom_user)
26 andi. r6,r6,7 26 andi. r6,r6,7
27 PPC_MTOCRF 0x01,r5 27 PPC_MTOCRF 0x01,r5
28 blt cr1,.Lshort_copy 28 blt cr1,.Lshort_copy
29/* Below we want to nop out the bne if we're on a CPU that has the
30 * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
31 * cleared.
32 * At the time of writing the only CPU that has this combination of bits
33 * set is Power6.
34 */
35BEGIN_FTR_SECTION
36 nop
37FTR_SECTION_ELSE
29 bne .Ldst_unaligned 38 bne .Ldst_unaligned
39ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
40 CPU_FTR_UNALIGNED_LD_STD)
30.Ldst_aligned: 41.Ldst_aligned:
31 andi. r0,r4,7
32 addi r3,r3,-16 42 addi r3,r3,-16
43BEGIN_FTR_SECTION
44 andi. r0,r4,7
33 bne .Lsrc_unaligned 45 bne .Lsrc_unaligned
46END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
34 srdi r7,r5,4 47 srdi r7,r5,4
3520: ld r9,0(r4) 4820: ld r9,0(r4)
36 addi r4,r4,-8 49 addi r4,r4,-8
@@ -138,7 +151,7 @@ _GLOBAL(__copy_tofrom_user)
138 PPC_MTOCRF 0x01,r6 /* put #bytes to 8B bdry into cr7 */ 151 PPC_MTOCRF 0x01,r6 /* put #bytes to 8B bdry into cr7 */
139 subf r5,r6,r5 152 subf r5,r6,r5
140 li r7,0 153 li r7,0
141 cmpldi r1,r5,16 154 cmpldi cr1,r5,16
142 bf cr7*4+3,1f 155 bf cr7*4+3,1f
14335: lbz r0,0(r4) 15635: lbz r0,0(r4)
14481: stb r0,0(r3) 15781: stb r0,0(r3)
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 31734c0969cd..b7dc4c19f582 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -77,26 +77,26 @@ static DEFINE_SPINLOCK(consistent_lock);
77 * the amount of RAM found at boot time.) I would imagine that get_vm_area() 77 * the amount of RAM found at boot time.) I would imagine that get_vm_area()
78 * would have to initialise this each time prior to calling vm_region_alloc(). 78 * would have to initialise this each time prior to calling vm_region_alloc().
79 */ 79 */
80struct vm_region { 80struct ppc_vm_region {
81 struct list_head vm_list; 81 struct list_head vm_list;
82 unsigned long vm_start; 82 unsigned long vm_start;
83 unsigned long vm_end; 83 unsigned long vm_end;
84}; 84};
85 85
86static struct vm_region consistent_head = { 86static struct ppc_vm_region consistent_head = {
87 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), 87 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
88 .vm_start = CONSISTENT_BASE, 88 .vm_start = CONSISTENT_BASE,
89 .vm_end = CONSISTENT_END, 89 .vm_end = CONSISTENT_END,
90}; 90};
91 91
92static struct vm_region * 92static struct ppc_vm_region *
93vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp) 93ppc_vm_region_alloc(struct ppc_vm_region *head, size_t size, gfp_t gfp)
94{ 94{
95 unsigned long addr = head->vm_start, end = head->vm_end - size; 95 unsigned long addr = head->vm_start, end = head->vm_end - size;
96 unsigned long flags; 96 unsigned long flags;
97 struct vm_region *c, *new; 97 struct ppc_vm_region *c, *new;
98 98
99 new = kmalloc(sizeof(struct vm_region), gfp); 99 new = kmalloc(sizeof(struct ppc_vm_region), gfp);
100 if (!new) 100 if (!new)
101 goto out; 101 goto out;
102 102
@@ -130,9 +130,9 @@ vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
130 return NULL; 130 return NULL;
131} 131}
132 132
133static struct vm_region *vm_region_find(struct vm_region *head, unsigned long addr) 133static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsigned long addr)
134{ 134{
135 struct vm_region *c; 135 struct ppc_vm_region *c;
136 136
137 list_for_each_entry(c, &head->vm_list, vm_list) { 137 list_for_each_entry(c, &head->vm_list, vm_list) {
138 if (c->vm_start == addr) 138 if (c->vm_start == addr)
@@ -151,7 +151,7 @@ void *
151__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) 151__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
152{ 152{
153 struct page *page; 153 struct page *page;
154 struct vm_region *c; 154 struct ppc_vm_region *c;
155 unsigned long order; 155 unsigned long order;
156 u64 mask = 0x00ffffff, limit; /* ISA default */ 156 u64 mask = 0x00ffffff, limit; /* ISA default */
157 157
@@ -191,7 +191,7 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
191 /* 191 /*
192 * Allocate a virtual address in the consistent mapping region. 192 * Allocate a virtual address in the consistent mapping region.
193 */ 193 */
194 c = vm_region_alloc(&consistent_head, size, 194 c = ppc_vm_region_alloc(&consistent_head, size,
195 gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); 195 gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
196 if (c) { 196 if (c) {
197 unsigned long vaddr = c->vm_start; 197 unsigned long vaddr = c->vm_start;
@@ -239,7 +239,7 @@ EXPORT_SYMBOL(__dma_alloc_coherent);
239 */ 239 */
240void __dma_free_coherent(size_t size, void *vaddr) 240void __dma_free_coherent(size_t size, void *vaddr)
241{ 241{
242 struct vm_region *c; 242 struct ppc_vm_region *c;
243 unsigned long flags, addr; 243 unsigned long flags, addr;
244 pte_t *ptep; 244 pte_t *ptep;
245 245
@@ -247,7 +247,7 @@ void __dma_free_coherent(size_t size, void *vaddr)
247 247
248 spin_lock_irqsave(&consistent_lock, flags); 248 spin_lock_irqsave(&consistent_lock, flags);
249 249
250 c = vm_region_find(&consistent_head, (unsigned long)vaddr); 250 c = ppc_vm_region_find(&consistent_head, (unsigned long)vaddr);
251 if (!c) 251 if (!c)
252 goto no_area; 252 goto no_area;
253 253
@@ -320,7 +320,6 @@ static int __init dma_alloc_init(void)
320 ret = -ENOMEM; 320 ret = -ENOMEM;
321 break; 321 break;
322 } 322 }
323 WARN_ON(!pmd_none(*pmd));
324 323
325 pte = pte_alloc_kernel(pmd, CONSISTENT_BASE); 324 pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
326 if (!pte) { 325 if (!pte) {
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index 3f131129d1c1..fe2d34e5332d 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -18,11 +18,23 @@ _GLOBAL(memcpy)
18 andi. r6,r6,7 18 andi. r6,r6,7
19 dcbt 0,r4 19 dcbt 0,r4
20 blt cr1,.Lshort_copy 20 blt cr1,.Lshort_copy
21/* Below we want to nop out the bne if we're on a CPU that has the
22 CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
23 cleared.
24 At the time of writing the only CPU that has this combination of bits
25 set is Power6. */
26BEGIN_FTR_SECTION
27 nop
28FTR_SECTION_ELSE
21 bne .Ldst_unaligned 29 bne .Ldst_unaligned
30ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
31 CPU_FTR_UNALIGNED_LD_STD)
22.Ldst_aligned: 32.Ldst_aligned:
23 andi. r0,r4,7
24 addi r3,r3,-16 33 addi r3,r3,-16
34BEGIN_FTR_SECTION
35 andi. r0,r4,7
25 bne .Lsrc_unaligned 36 bne .Lsrc_unaligned
37END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
26 srdi r7,r5,4 38 srdi r7,r5,4
27 ld r9,0(r4) 39 ld r9,0(r4)
28 addi r4,r4,-8 40 addi r4,r4,-8
@@ -131,7 +143,7 @@ _GLOBAL(memcpy)
131 PPC_MTOCRF 0x01,r6 # put #bytes to 8B bdry into cr7 143 PPC_MTOCRF 0x01,r6 # put #bytes to 8B bdry into cr7
132 subf r5,r6,r5 144 subf r5,r6,r5
133 li r7,0 145 li r7,0
134 cmpldi r1,r5,16 146 cmpldi cr1,r5,16
135 bf cr7*4+3,1f 147 bf cr7*4+3,1f
136 lbz r0,0(r4) 148 lbz r0,0(r4)
137 stb r0,0(r3) 149 stb r0,0(r3)
diff --git a/arch/powerpc/lib/rheap.c b/arch/powerpc/lib/rheap.c
index 29b2941cada0..45907c1dae66 100644
--- a/arch/powerpc/lib/rheap.c
+++ b/arch/powerpc/lib/rheap.c
@@ -556,6 +556,7 @@ unsigned long rh_alloc_fixed(rh_info_t * info, unsigned long start, int size, co
556 be = blk->start + blk->size; 556 be = blk->start + blk->size;
557 if (s >= bs && e <= be) 557 if (s >= bs && e <= be)
558 break; 558 break;
559 blk = NULL;
559 } 560 }
560 561
561 if (blk == NULL) 562 if (blk == NULL)
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 03aa98dd9f0a..f9e506a735ae 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -11,6 +11,8 @@ obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ 11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
12 mtfsf.o mtfsfi.o stfiwx.o stfs.o 12 mtfsf.o mtfsfi.o stfiwx.o stfs.o
13 13
14obj-$(CONFIG_SPE) += math_efp.o
15
14CFLAGS_fabs.o = -fno-builtin-fabs 16CFLAGS_fabs.o = -fno-builtin-fabs
15CFLAGS_math.o = -fno-builtin-fabs 17CFLAGS_math.o = -fno-builtin-fabs
16 18
diff --git a/arch/powerpc/math-emu/fadd.c b/arch/powerpc/math-emu/fadd.c
index 04d3b4aa32ce..0158a16e2b82 100644
--- a/arch/powerpc/math-emu/fadd.c
+++ b/arch/powerpc/math-emu/fadd.c
@@ -13,7 +13,6 @@ fadd(void *frD, void *frA, void *frB)
13 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX; 15 FP_DECL_EX;
16 int ret = 0;
17 16
18#ifdef DEBUG 17#ifdef DEBUG
19 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
diff --git a/arch/powerpc/math-emu/fcmpo.c b/arch/powerpc/math-emu/fcmpo.c
index b5dc4498cd71..5bce011c2aec 100644
--- a/arch/powerpc/math-emu/fcmpo.c
+++ b/arch/powerpc/math-emu/fcmpo.c
@@ -14,7 +14,6 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
14 FP_DECL_EX; 14 FP_DECL_EX;
15 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) }; 15 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
16 long cmp; 16 long cmp;
17 int ret = 0;
18 17
19#ifdef DEBUG 18#ifdef DEBUG
20 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB); 19 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
@@ -29,7 +28,7 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
29#endif 28#endif
30 29
31 if (A_c == FP_CLS_NAN || B_c == FP_CLS_NAN) 30 if (A_c == FP_CLS_NAN || B_c == FP_CLS_NAN)
32 ret |= EFLAG_VXVC; 31 FP_SET_EXCEPTION(EFLAG_VXVC);
33 32
34 FP_CMP_D(cmp, A, B, 2); 33 FP_CMP_D(cmp, A, B, 2);
35 cmp = code[(cmp + 1) & 3]; 34 cmp = code[(cmp + 1) & 3];
@@ -44,5 +43,5 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
44 printk("CR: %08x\n", *ccr); 43 printk("CR: %08x\n", *ccr);
45#endif 44#endif
46 45
47 return ret; 46 return FP_CUR_EXCEPTIONS;
48} 47}
diff --git a/arch/powerpc/math-emu/fdiv.c b/arch/powerpc/math-emu/fdiv.c
index 2db15097d98e..a29239c05e3e 100644
--- a/arch/powerpc/math-emu/fdiv.c
+++ b/arch/powerpc/math-emu/fdiv.c
@@ -13,7 +13,6 @@ fdiv(void *frD, void *frA, void *frB)
13 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX; 15 FP_DECL_EX;
16 int ret = 0;
17 16
18#ifdef DEBUG 17#ifdef DEBUG
19 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -28,22 +27,22 @@ fdiv(void *frD, void *frA, void *frB)
28#endif 27#endif
29 28
30 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) { 29 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
31 ret |= EFLAG_VXZDZ; 30 FP_SET_EXCEPTION(EFLAG_VXZDZ);
32#ifdef DEBUG 31#ifdef DEBUG
33 printk("%s: FPSCR_VXZDZ raised\n", __func__); 32 printk("%s: FPSCR_VXZDZ raised\n", __func__);
34#endif 33#endif
35 } 34 }
36 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) { 35 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
37 ret |= EFLAG_VXIDI; 36 FP_SET_EXCEPTION(EFLAG_VXIDI);
38#ifdef DEBUG 37#ifdef DEBUG
39 printk("%s: FPSCR_VXIDI raised\n", __func__); 38 printk("%s: FPSCR_VXIDI raised\n", __func__);
40#endif 39#endif
41 } 40 }
42 41
43 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) { 42 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
44 ret |= EFLAG_DIVZERO; 43 FP_SET_EXCEPTION(EFLAG_DIVZERO);
45 if (__FPU_TRAP_P(EFLAG_DIVZERO)) 44 if (__FPU_TRAP_P(EFLAG_DIVZERO))
46 return ret; 45 return FP_CUR_EXCEPTIONS;
47 } 46 }
48 FP_DIV_D(R, A, B); 47 FP_DIV_D(R, A, B);
49 48
diff --git a/arch/powerpc/math-emu/fdivs.c b/arch/powerpc/math-emu/fdivs.c
index 797f6a9a20b5..526bc261275f 100644
--- a/arch/powerpc/math-emu/fdivs.c
+++ b/arch/powerpc/math-emu/fdivs.c
@@ -14,7 +14,6 @@ fdivs(void *frD, void *frA, void *frB)
14 FP_DECL_D(B); 14 FP_DECL_D(B);
15 FP_DECL_D(R); 15 FP_DECL_D(R);
16 FP_DECL_EX; 16 FP_DECL_EX;
17 int ret = 0;
18 17
19#ifdef DEBUG 18#ifdef DEBUG
20 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -29,22 +28,22 @@ fdivs(void *frD, void *frA, void *frB)
29#endif 28#endif
30 29
31 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) { 30 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
32 ret |= EFLAG_VXZDZ; 31 FP_SET_EXCEPTION(EFLAG_VXZDZ);
33#ifdef DEBUG 32#ifdef DEBUG
34 printk("%s: FPSCR_VXZDZ raised\n", __func__); 33 printk("%s: FPSCR_VXZDZ raised\n", __func__);
35#endif 34#endif
36 } 35 }
37 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) { 36 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
38 ret |= EFLAG_VXIDI; 37 FP_SET_EXCEPTION(EFLAG_VXIDI);
39#ifdef DEBUG 38#ifdef DEBUG
40 printk("%s: FPSCR_VXIDI raised\n", __func__); 39 printk("%s: FPSCR_VXIDI raised\n", __func__);
41#endif 40#endif
42 } 41 }
43 42
44 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) { 43 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
45 ret |= EFLAG_DIVZERO; 44 FP_SET_EXCEPTION(EFLAG_DIVZERO);
46 if (__FPU_TRAP_P(EFLAG_DIVZERO)) 45 if (__FPU_TRAP_P(EFLAG_DIVZERO))
47 return ret; 46 return FP_CUR_EXCEPTIONS;
48 } 47 }
49 48
50 FP_DIV_D(R, A, B); 49 FP_DIV_D(R, A, B);
diff --git a/arch/powerpc/math-emu/fmadd.c b/arch/powerpc/math-emu/fmadd.c
index 925313aa6f82..8c3f20aa5a95 100644
--- a/arch/powerpc/math-emu/fmadd.c
+++ b/arch/powerpc/math-emu/fmadd.c
@@ -15,7 +15,6 @@ fmadd(void *frD, void *frA, void *frB, void *frC)
15 FP_DECL_D(C); 15 FP_DECL_D(C);
16 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX; 17 FP_DECL_EX;
18 int ret = 0;
19 18
20#ifdef DEBUG 19#ifdef DEBUG
21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,12 +32,12 @@ fmadd(void *frD, void *frA, void *frB, void *frC)
33 32
34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36 ret |= EFLAG_VXIMZ; 35 FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36
38 FP_MUL_D(T, A, C); 37 FP_MUL_D(T, A, C);
39 38
40 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 39 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
41 ret |= EFLAG_VXISI; 40 FP_SET_EXCEPTION(EFLAG_VXISI);
42 41
43 FP_ADD_D(R, T, B); 42 FP_ADD_D(R, T, B);
44 43
diff --git a/arch/powerpc/math-emu/fmadds.c b/arch/powerpc/math-emu/fmadds.c
index aea80ef79399..794fb31e59d1 100644
--- a/arch/powerpc/math-emu/fmadds.c
+++ b/arch/powerpc/math-emu/fmadds.c
@@ -16,7 +16,6 @@ fmadds(void *frD, void *frA, void *frB, void *frC)
16 FP_DECL_D(C); 16 FP_DECL_D(C);
17 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX; 18 FP_DECL_EX;
19 int ret = 0;
20 19
21#ifdef DEBUG 20#ifdef DEBUG
22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,12 +33,12 @@ fmadds(void *frD, void *frA, void *frB, void *frC)
34 33
35 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37 ret |= EFLAG_VXIMZ; 36 FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37
39 FP_MUL_D(T, A, C); 38 FP_MUL_D(T, A, C);
40 39
41 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 40 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
42 ret |= EFLAG_VXISI; 41 FP_SET_EXCEPTION(EFLAG_VXISI);
43 42
44 FP_ADD_D(R, T, B); 43 FP_ADD_D(R, T, B);
45 44
diff --git a/arch/powerpc/math-emu/fmsub.c b/arch/powerpc/math-emu/fmsub.c
index a644d525fca6..626f6fed84ac 100644
--- a/arch/powerpc/math-emu/fmsub.c
+++ b/arch/powerpc/math-emu/fmsub.c
@@ -15,7 +15,6 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
15 FP_DECL_D(C); 15 FP_DECL_D(C);
16 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX; 17 FP_DECL_EX;
18 int ret = 0;
19 18
20#ifdef DEBUG 19#ifdef DEBUG
21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,7 +32,7 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
33 32
34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36 ret |= EFLAG_VXIMZ; 35 FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36
38 FP_MUL_D(T, A, C); 37 FP_MUL_D(T, A, C);
39 38
@@ -41,7 +40,7 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
41 B_s ^= 1; 40 B_s ^= 1;
42 41
43 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 42 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
44 ret |= EFLAG_VXISI; 43 FP_SET_EXCEPTION(EFLAG_VXISI);
45 44
46 FP_ADD_D(R, T, B); 45 FP_ADD_D(R, T, B);
47 46
diff --git a/arch/powerpc/math-emu/fmsubs.c b/arch/powerpc/math-emu/fmsubs.c
index 2fdeeb9bb569..3425bc899760 100644
--- a/arch/powerpc/math-emu/fmsubs.c
+++ b/arch/powerpc/math-emu/fmsubs.c
@@ -16,7 +16,6 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
16 FP_DECL_D(C); 16 FP_DECL_D(C);
17 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX; 18 FP_DECL_EX;
19 int ret = 0;
20 19
21#ifdef DEBUG 20#ifdef DEBUG
22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,7 +33,7 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
34 33
35 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37 ret |= EFLAG_VXIMZ; 36 FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37
39 FP_MUL_D(T, A, C); 38 FP_MUL_D(T, A, C);
40 39
@@ -42,7 +41,7 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
42 B_s ^= 1; 41 B_s ^= 1;
43 42
44 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 43 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
45 ret |= EFLAG_VXISI; 44 FP_SET_EXCEPTION(EFLAG_VXISI);
46 45
47 FP_ADD_D(R, T, B); 46 FP_ADD_D(R, T, B);
48 47
diff --git a/arch/powerpc/math-emu/fmul.c b/arch/powerpc/math-emu/fmul.c
index 391fd17d3440..2c1929779892 100644
--- a/arch/powerpc/math-emu/fmul.c
+++ b/arch/powerpc/math-emu/fmul.c
@@ -13,7 +13,6 @@ fmul(void *frD, void *frA, void *frB)
13 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX; 15 FP_DECL_EX;
16 int ret = 0;
17 16
18#ifdef DEBUG 17#ifdef DEBUG
19 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -31,7 +30,7 @@ fmul(void *frD, void *frA, void *frB)
31 30
32 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) || 31 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
33 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF)) 32 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
34 ret |= EFLAG_VXIMZ; 33 FP_SET_EXCEPTION(EFLAG_VXIMZ);
35 34
36 FP_MUL_D(R, A, B); 35 FP_MUL_D(R, A, B);
37 36
diff --git a/arch/powerpc/math-emu/fmuls.c b/arch/powerpc/math-emu/fmuls.c
index 2d3ec5f7da20..f5ad5c9c77d0 100644
--- a/arch/powerpc/math-emu/fmuls.c
+++ b/arch/powerpc/math-emu/fmuls.c
@@ -14,7 +14,6 @@ fmuls(void *frD, void *frA, void *frB)
14 FP_DECL_D(B); 14 FP_DECL_D(B);
15 FP_DECL_D(R); 15 FP_DECL_D(R);
16 FP_DECL_EX; 16 FP_DECL_EX;
17 int ret = 0;
18 17
19#ifdef DEBUG 18#ifdef DEBUG
20 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -32,7 +31,7 @@ fmuls(void *frD, void *frA, void *frB)
32 31
33 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) || 32 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
34 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF)) 33 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
35 ret |= EFLAG_VXIMZ; 34 FP_SET_EXCEPTION(EFLAG_VXIMZ);
36 35
37 FP_MUL_D(R, A, B); 36 FP_MUL_D(R, A, B);
38 37
diff --git a/arch/powerpc/math-emu/fnmadd.c b/arch/powerpc/math-emu/fnmadd.c
index 2497b86494e5..e817bc5453ef 100644
--- a/arch/powerpc/math-emu/fnmadd.c
+++ b/arch/powerpc/math-emu/fnmadd.c
@@ -15,7 +15,6 @@ fnmadd(void *frD, void *frA, void *frB, void *frC)
15 FP_DECL_D(C); 15 FP_DECL_D(C);
16 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX; 17 FP_DECL_EX;
18 int ret = 0;
19 18
20#ifdef DEBUG 19#ifdef DEBUG
21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,12 +32,12 @@ fnmadd(void *frD, void *frA, void *frB, void *frC)
33 32
34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36 ret |= EFLAG_VXIMZ; 35 FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36
38 FP_MUL_D(T, A, C); 37 FP_MUL_D(T, A, C);
39 38
40 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 39 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
41 ret |= EFLAG_VXISI; 40 FP_SET_EXCEPTION(EFLAG_VXISI);
42 41
43 FP_ADD_D(R, T, B); 42 FP_ADD_D(R, T, B);
44 43
diff --git a/arch/powerpc/math-emu/fnmadds.c b/arch/powerpc/math-emu/fnmadds.c
index ee9d71e0b376..4db4b7d9ba8d 100644
--- a/arch/powerpc/math-emu/fnmadds.c
+++ b/arch/powerpc/math-emu/fnmadds.c
@@ -16,7 +16,6 @@ fnmadds(void *frD, void *frA, void *frB, void *frC)
16 FP_DECL_D(C); 16 FP_DECL_D(C);
17 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX; 18 FP_DECL_EX;
19 int ret = 0;
20 19
21#ifdef DEBUG 20#ifdef DEBUG
22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,12 +33,12 @@ fnmadds(void *frD, void *frA, void *frB, void *frC)
34 33
35 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37 ret |= EFLAG_VXIMZ; 36 FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37
39 FP_MUL_D(T, A, C); 38 FP_MUL_D(T, A, C);
40 39
41 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 40 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
42 ret |= EFLAG_VXISI; 41 FP_SET_EXCEPTION(EFLAG_VXISI);
43 42
44 FP_ADD_D(R, T, B); 43 FP_ADD_D(R, T, B);
45 44
diff --git a/arch/powerpc/math-emu/fnmsub.c b/arch/powerpc/math-emu/fnmsub.c
index 3885a77acc93..f65979fa770e 100644
--- a/arch/powerpc/math-emu/fnmsub.c
+++ b/arch/powerpc/math-emu/fnmsub.c
@@ -15,7 +15,6 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
15 FP_DECL_D(C); 15 FP_DECL_D(C);
16 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX; 17 FP_DECL_EX;
18 int ret = 0;
19 18
20#ifdef DEBUG 19#ifdef DEBUG
21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -33,7 +32,7 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
33 32
34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
36 ret |= EFLAG_VXIMZ; 35 FP_SET_EXCEPTION(EFLAG_VXIMZ);
37 36
38 FP_MUL_D(T, A, C); 37 FP_MUL_D(T, A, C);
39 38
@@ -41,7 +40,7 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
41 B_s ^= 1; 40 B_s ^= 1;
42 41
43 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 42 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
44 ret |= EFLAG_VXISI; 43 FP_SET_EXCEPTION(EFLAG_VXISI);
45 44
46 FP_ADD_D(R, T, B); 45 FP_ADD_D(R, T, B);
47 46
diff --git a/arch/powerpc/math-emu/fnmsubs.c b/arch/powerpc/math-emu/fnmsubs.c
index f835dfeb0fd1..9021dacc03b8 100644
--- a/arch/powerpc/math-emu/fnmsubs.c
+++ b/arch/powerpc/math-emu/fnmsubs.c
@@ -16,7 +16,6 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
16 FP_DECL_D(C); 16 FP_DECL_D(C);
17 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX; 18 FP_DECL_EX;
19 int ret = 0;
20 19
21#ifdef DEBUG 20#ifdef DEBUG
22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
@@ -34,7 +33,7 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
34 33
35 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) || 34 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
36 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF)) 35 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
37 ret |= EFLAG_VXIMZ; 36 FP_SET_EXCEPTION(EFLAG_VXIMZ);
38 37
39 FP_MUL_D(T, A, C); 38 FP_MUL_D(T, A, C);
40 39
@@ -42,7 +41,7 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
42 B_s ^= 1; 41 B_s ^= 1;
43 42
44 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF) 43 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
45 ret |= EFLAG_VXISI; 44 FP_SET_EXCEPTION(EFLAG_VXISI);
46 45
47 FP_ADD_D(R, T, B); 46 FP_ADD_D(R, T, B);
48 47
diff --git a/arch/powerpc/math-emu/fsqrt.c b/arch/powerpc/math-emu/fsqrt.c
index 3e90072693a0..a55fc7d49983 100644
--- a/arch/powerpc/math-emu/fsqrt.c
+++ b/arch/powerpc/math-emu/fsqrt.c
@@ -12,7 +12,6 @@ fsqrt(void *frD, void *frB)
12 FP_DECL_D(B); 12 FP_DECL_D(B);
13 FP_DECL_D(R); 13 FP_DECL_D(R);
14 FP_DECL_EX; 14 FP_DECL_EX;
15 int ret = 0;
16 15
17#ifdef DEBUG 16#ifdef DEBUG
18 printk("%s: %p %p %p %p\n", __func__, frD, frB); 17 printk("%s: %p %p %p %p\n", __func__, frD, frB);
@@ -25,9 +24,9 @@ fsqrt(void *frD, void *frB)
25#endif 24#endif
26 25
27 if (B_s && B_c != FP_CLS_ZERO) 26 if (B_s && B_c != FP_CLS_ZERO)
28 ret |= EFLAG_VXSQRT; 27 FP_SET_EXCEPTION(EFLAG_VXSQRT);
29 if (B_c == FP_CLS_NAN) 28 if (B_c == FP_CLS_NAN)
30 ret |= EFLAG_VXSNAN; 29 FP_SET_EXCEPTION(EFLAG_VXSNAN);
31 30
32 FP_SQRT_D(R, B); 31 FP_SQRT_D(R, B);
33 32
diff --git a/arch/powerpc/math-emu/fsqrts.c b/arch/powerpc/math-emu/fsqrts.c
index 2843be986e2e..31dccbfc39ff 100644
--- a/arch/powerpc/math-emu/fsqrts.c
+++ b/arch/powerpc/math-emu/fsqrts.c
@@ -13,7 +13,6 @@ fsqrts(void *frD, void *frB)
13 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX; 15 FP_DECL_EX;
16 int ret = 0;
17 16
18#ifdef DEBUG 17#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __func__, frD, frB); 18 printk("%s: %p %p %p %p\n", __func__, frD, frB);
@@ -26,9 +25,9 @@ fsqrts(void *frD, void *frB)
26#endif 25#endif
27 26
28 if (B_s && B_c != FP_CLS_ZERO) 27 if (B_s && B_c != FP_CLS_ZERO)
29 ret |= EFLAG_VXSQRT; 28 FP_SET_EXCEPTION(EFLAG_VXSQRT);
30 if (B_c == FP_CLS_NAN) 29 if (B_c == FP_CLS_NAN)
31 ret |= EFLAG_VXSNAN; 30 FP_SET_EXCEPTION(EFLAG_VXSNAN);
32 31
33 FP_SQRT_D(R, B); 32 FP_SQRT_D(R, B);
34 33
diff --git a/arch/powerpc/math-emu/fsub.c b/arch/powerpc/math-emu/fsub.c
index 78b09446a0e1..02c5dff458ba 100644
--- a/arch/powerpc/math-emu/fsub.c
+++ b/arch/powerpc/math-emu/fsub.c
@@ -13,7 +13,6 @@ fsub(void *frD, void *frA, void *frB)
13 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX; 15 FP_DECL_EX;
16 int ret = 0;
17 16
18#ifdef DEBUG 17#ifdef DEBUG
19 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 18 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -31,7 +30,7 @@ fsub(void *frD, void *frA, void *frB)
31 B_s ^= 1; 30 B_s ^= 1;
32 31
33 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF) 32 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
34 ret |= EFLAG_VXISI; 33 FP_SET_EXCEPTION(EFLAG_VXISI);
35 34
36 FP_ADD_D(R, A, B); 35 FP_ADD_D(R, A, B);
37 36
diff --git a/arch/powerpc/math-emu/fsubs.c b/arch/powerpc/math-emu/fsubs.c
index d3bf90863cf2..5d9b18c35e07 100644
--- a/arch/powerpc/math-emu/fsubs.c
+++ b/arch/powerpc/math-emu/fsubs.c
@@ -14,7 +14,6 @@ fsubs(void *frD, void *frA, void *frB)
14 FP_DECL_D(B); 14 FP_DECL_D(B);
15 FP_DECL_D(R); 15 FP_DECL_D(R);
16 FP_DECL_EX; 16 FP_DECL_EX;
17 int ret = 0;
18 17
19#ifdef DEBUG 18#ifdef DEBUG
20 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
@@ -32,7 +31,7 @@ fsubs(void *frD, void *frA, void *frB)
32 B_s ^= 1; 31 B_s ^= 1;
33 32
34 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF) 33 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
35 ret |= EFLAG_VXISI; 34 FP_SET_EXCEPTION(EFLAG_VXISI);
36 35
37 FP_ADD_D(R, A, B); 36 FP_ADD_D(R, A, B);
38 37
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c
new file mode 100644
index 000000000000..41f4ef30e480
--- /dev/null
+++ b/arch/powerpc/math-emu/math_efp.c
@@ -0,0 +1,720 @@
1/*
2 * arch/powerpc/math-emu/math_efp.c
3 *
4 * Copyright (C) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Author: Ebony Zhu, <ebony.zhu@freescale.com>
7 * Yu Liu, <yu.liu@freescale.com>
8 *
9 * Derived from arch/alpha/math-emu/math.c
10 * arch/powerpc/math-emu/math.c
11 *
12 * Description:
13 * This file is the exception handler to make E500 SPE instructions
14 * fully comply with IEEE-754 floating point standard.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version
19 * 2 of the License, or (at your option) any later version.
20 */
21
22#include <linux/types.h>
23
24#include <asm/uaccess.h>
25#include <asm/reg.h>
26
27#define FP_EX_BOOKE_E500_SPE
28#include <asm/sfp-machine.h>
29
30#include <math-emu/soft-fp.h>
31#include <math-emu/single.h>
32#include <math-emu/double.h>
33
34#define EFAPU 0x4
35
36#define VCT 0x4
37#define SPFP 0x6
38#define DPFP 0x7
39
40#define EFSADD 0x2c0
41#define EFSSUB 0x2c1
42#define EFSABS 0x2c4
43#define EFSNABS 0x2c5
44#define EFSNEG 0x2c6
45#define EFSMUL 0x2c8
46#define EFSDIV 0x2c9
47#define EFSCMPGT 0x2cc
48#define EFSCMPLT 0x2cd
49#define EFSCMPEQ 0x2ce
50#define EFSCFD 0x2cf
51#define EFSCFSI 0x2d1
52#define EFSCTUI 0x2d4
53#define EFSCTSI 0x2d5
54#define EFSCTUF 0x2d6
55#define EFSCTSF 0x2d7
56#define EFSCTUIZ 0x2d8
57#define EFSCTSIZ 0x2da
58
59#define EVFSADD 0x280
60#define EVFSSUB 0x281
61#define EVFSABS 0x284
62#define EVFSNABS 0x285
63#define EVFSNEG 0x286
64#define EVFSMUL 0x288
65#define EVFSDIV 0x289
66#define EVFSCMPGT 0x28c
67#define EVFSCMPLT 0x28d
68#define EVFSCMPEQ 0x28e
69#define EVFSCTUI 0x294
70#define EVFSCTSI 0x295
71#define EVFSCTUF 0x296
72#define EVFSCTSF 0x297
73#define EVFSCTUIZ 0x298
74#define EVFSCTSIZ 0x29a
75
76#define EFDADD 0x2e0
77#define EFDSUB 0x2e1
78#define EFDABS 0x2e4
79#define EFDNABS 0x2e5
80#define EFDNEG 0x2e6
81#define EFDMUL 0x2e8
82#define EFDDIV 0x2e9
83#define EFDCTUIDZ 0x2ea
84#define EFDCTSIDZ 0x2eb
85#define EFDCMPGT 0x2ec
86#define EFDCMPLT 0x2ed
87#define EFDCMPEQ 0x2ee
88#define EFDCFS 0x2ef
89#define EFDCTUI 0x2f4
90#define EFDCTSI 0x2f5
91#define EFDCTUF 0x2f6
92#define EFDCTSF 0x2f7
93#define EFDCTUIZ 0x2f8
94#define EFDCTSIZ 0x2fa
95
96#define AB 2
97#define XA 3
98#define XB 4
99#define XCR 5
100#define NOTYPE 0
101
102#define SIGN_BIT_S (1UL << 31)
103#define SIGN_BIT_D (1ULL << 63)
104#define FP_EX_MASK (FP_EX_INEXACT | FP_EX_INVALID | FP_EX_DIVZERO | \
105 FP_EX_UNDERFLOW | FP_EX_OVERFLOW)
106
107union dw_union {
108 u64 dp[1];
109 u32 wp[2];
110};
111
112static unsigned long insn_type(unsigned long speinsn)
113{
114 unsigned long ret = NOTYPE;
115
116 switch (speinsn & 0x7ff) {
117 case EFSABS: ret = XA; break;
118 case EFSADD: ret = AB; break;
119 case EFSCFD: ret = XB; break;
120 case EFSCMPEQ: ret = XCR; break;
121 case EFSCMPGT: ret = XCR; break;
122 case EFSCMPLT: ret = XCR; break;
123 case EFSCTSF: ret = XB; break;
124 case EFSCTSI: ret = XB; break;
125 case EFSCTSIZ: ret = XB; break;
126 case EFSCTUF: ret = XB; break;
127 case EFSCTUI: ret = XB; break;
128 case EFSCTUIZ: ret = XB; break;
129 case EFSDIV: ret = AB; break;
130 case EFSMUL: ret = AB; break;
131 case EFSNABS: ret = XA; break;
132 case EFSNEG: ret = XA; break;
133 case EFSSUB: ret = AB; break;
134 case EFSCFSI: ret = XB; break;
135
136 case EVFSABS: ret = XA; break;
137 case EVFSADD: ret = AB; break;
138 case EVFSCMPEQ: ret = XCR; break;
139 case EVFSCMPGT: ret = XCR; break;
140 case EVFSCMPLT: ret = XCR; break;
141 case EVFSCTSF: ret = XB; break;
142 case EVFSCTSI: ret = XB; break;
143 case EVFSCTSIZ: ret = XB; break;
144 case EVFSCTUF: ret = XB; break;
145 case EVFSCTUI: ret = XB; break;
146 case EVFSCTUIZ: ret = XB; break;
147 case EVFSDIV: ret = AB; break;
148 case EVFSMUL: ret = AB; break;
149 case EVFSNABS: ret = XA; break;
150 case EVFSNEG: ret = XA; break;
151 case EVFSSUB: ret = AB; break;
152
153 case EFDABS: ret = XA; break;
154 case EFDADD: ret = AB; break;
155 case EFDCFS: ret = XB; break;
156 case EFDCMPEQ: ret = XCR; break;
157 case EFDCMPGT: ret = XCR; break;
158 case EFDCMPLT: ret = XCR; break;
159 case EFDCTSF: ret = XB; break;
160 case EFDCTSI: ret = XB; break;
161 case EFDCTSIDZ: ret = XB; break;
162 case EFDCTSIZ: ret = XB; break;
163 case EFDCTUF: ret = XB; break;
164 case EFDCTUI: ret = XB; break;
165 case EFDCTUIDZ: ret = XB; break;
166 case EFDCTUIZ: ret = XB; break;
167 case EFDDIV: ret = AB; break;
168 case EFDMUL: ret = AB; break;
169 case EFDNABS: ret = XA; break;
170 case EFDNEG: ret = XA; break;
171 case EFDSUB: ret = AB; break;
172
173 default:
174 printk(KERN_ERR "\nOoops! SPE instruction no type found.");
175 printk(KERN_ERR "\ninst code: %08lx\n", speinsn);
176 }
177
178 return ret;
179}
180
181int do_spe_mathemu(struct pt_regs *regs)
182{
183 FP_DECL_EX;
184 int IR, cmp;
185
186 unsigned long type, func, fc, fa, fb, src, speinsn;
187 union dw_union vc, va, vb;
188
189 if (get_user(speinsn, (unsigned int __user *) regs->nip))
190 return -EFAULT;
191 if ((speinsn >> 26) != EFAPU)
192 return -EINVAL; /* not an spe instruction */
193
194 type = insn_type(speinsn);
195 if (type == NOTYPE)
196 return -ENOSYS;
197
198 func = speinsn & 0x7ff;
199 fc = (speinsn >> 21) & 0x1f;
200 fa = (speinsn >> 16) & 0x1f;
201 fb = (speinsn >> 11) & 0x1f;
202 src = (speinsn >> 5) & 0x7;
203
204 vc.wp[0] = current->thread.evr[fc];
205 vc.wp[1] = regs->gpr[fc];
206 va.wp[0] = current->thread.evr[fa];
207 va.wp[1] = regs->gpr[fa];
208 vb.wp[0] = current->thread.evr[fb];
209 vb.wp[1] = regs->gpr[fb];
210
211 __FPU_FPSCR = mfspr(SPRN_SPEFSCR);
212
213#ifdef DEBUG
214 printk("speinsn:%08lx spefscr:%08lx\n", speinsn, __FPU_FPSCR);
215 printk("vc: %08x %08x\n", vc.wp[0], vc.wp[1]);
216 printk("va: %08x %08x\n", va.wp[0], va.wp[1]);
217 printk("vb: %08x %08x\n", vb.wp[0], vb.wp[1]);
218#endif
219
220 switch (src) {
221 case SPFP: {
222 FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
223
224 switch (type) {
225 case AB:
226 case XCR:
227 FP_UNPACK_SP(SA, va.wp + 1);
228 case XB:
229 FP_UNPACK_SP(SB, vb.wp + 1);
230 break;
231 case XA:
232 FP_UNPACK_SP(SA, va.wp + 1);
233 break;
234 }
235
236#ifdef DEBUG
237 printk("SA: %ld %08lx %ld (%ld)\n", SA_s, SA_f, SA_e, SA_c);
238 printk("SB: %ld %08lx %ld (%ld)\n", SB_s, SB_f, SB_e, SB_c);
239#endif
240
241 switch (func) {
242 case EFSABS:
243 vc.wp[1] = va.wp[1] & ~SIGN_BIT_S;
244 goto update_regs;
245
246 case EFSNABS:
247 vc.wp[1] = va.wp[1] | SIGN_BIT_S;
248 goto update_regs;
249
250 case EFSNEG:
251 vc.wp[1] = va.wp[1] ^ SIGN_BIT_S;
252 goto update_regs;
253
254 case EFSADD:
255 FP_ADD_S(SR, SA, SB);
256 goto pack_s;
257
258 case EFSSUB:
259 FP_SUB_S(SR, SA, SB);
260 goto pack_s;
261
262 case EFSMUL:
263 FP_MUL_S(SR, SA, SB);
264 goto pack_s;
265
266 case EFSDIV:
267 FP_DIV_S(SR, SA, SB);
268 goto pack_s;
269
270 case EFSCMPEQ:
271 cmp = 0;
272 goto cmp_s;
273
274 case EFSCMPGT:
275 cmp = 1;
276 goto cmp_s;
277
278 case EFSCMPLT:
279 cmp = -1;
280 goto cmp_s;
281
282 case EFSCTSF:
283 case EFSCTUF:
284 if (!((vb.wp[1] >> 23) == 0xff && ((vb.wp[1] & 0x7fffff) > 0))) {
285 /* NaN */
286 if (((vb.wp[1] >> 23) & 0xff) == 0) {
287 /* denorm */
288 vc.wp[1] = 0x0;
289 } else if ((vb.wp[1] >> 31) == 0) {
290 /* positive normal */
291 vc.wp[1] = (func == EFSCTSF) ?
292 0x7fffffff : 0xffffffff;
293 } else { /* negative normal */
294 vc.wp[1] = (func == EFSCTSF) ?
295 0x80000000 : 0x0;
296 }
297 } else { /* rB is NaN */
298 vc.wp[1] = 0x0;
299 }
300 goto update_regs;
301
302 case EFSCFD: {
303 FP_DECL_D(DB);
304 FP_CLEAR_EXCEPTIONS;
305 FP_UNPACK_DP(DB, vb.dp);
306#ifdef DEBUG
307 printk("DB: %ld %08lx %08lx %ld (%ld)\n",
308 DB_s, DB_f1, DB_f0, DB_e, DB_c);
309#endif
310 FP_CONV(S, D, 1, 2, SR, DB);
311 goto pack_s;
312 }
313
314 case EFSCTSI:
315 case EFSCTSIZ:
316 case EFSCTUI:
317 case EFSCTUIZ:
318 if (func & 0x4) {
319 _FP_ROUND(1, SB);
320 } else {
321 _FP_ROUND_ZERO(1, SB);
322 }
323 FP_TO_INT_S(vc.wp[1], SB, 32, ((func & 0x3) != 0));
324 goto update_regs;
325
326 default:
327 goto illegal;
328 }
329 break;
330
331pack_s:
332#ifdef DEBUG
333 printk("SR: %ld %08lx %ld (%ld)\n", SR_s, SR_f, SR_e, SR_c);
334#endif
335 FP_PACK_SP(vc.wp + 1, SR);
336 goto update_regs;
337
338cmp_s:
339 FP_CMP_S(IR, SA, SB, 3);
340 if (IR == 3 && (FP_ISSIGNAN_S(SA) || FP_ISSIGNAN_S(SB)))
341 FP_SET_EXCEPTION(FP_EX_INVALID);
342 if (IR == cmp) {
343 IR = 0x4;
344 } else {
345 IR = 0;
346 }
347 goto update_ccr;
348 }
349
350 case DPFP: {
351 FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
352
353 switch (type) {
354 case AB:
355 case XCR:
356 FP_UNPACK_DP(DA, va.dp);
357 case XB:
358 FP_UNPACK_DP(DB, vb.dp);
359 break;
360 case XA:
361 FP_UNPACK_DP(DA, va.dp);
362 break;
363 }
364
365#ifdef DEBUG
366 printk("DA: %ld %08lx %08lx %ld (%ld)\n",
367 DA_s, DA_f1, DA_f0, DA_e, DA_c);
368 printk("DB: %ld %08lx %08lx %ld (%ld)\n",
369 DB_s, DB_f1, DB_f0, DB_e, DB_c);
370#endif
371
372 switch (func) {
373 case EFDABS:
374 vc.dp[0] = va.dp[0] & ~SIGN_BIT_D;
375 goto update_regs;
376
377 case EFDNABS:
378 vc.dp[0] = va.dp[0] | SIGN_BIT_D;
379 goto update_regs;
380
381 case EFDNEG:
382 vc.dp[0] = va.dp[0] ^ SIGN_BIT_D;
383 goto update_regs;
384
385 case EFDADD:
386 FP_ADD_D(DR, DA, DB);
387 goto pack_d;
388
389 case EFDSUB:
390 FP_SUB_D(DR, DA, DB);
391 goto pack_d;
392
393 case EFDMUL:
394 FP_MUL_D(DR, DA, DB);
395 goto pack_d;
396
397 case EFDDIV:
398 FP_DIV_D(DR, DA, DB);
399 goto pack_d;
400
401 case EFDCMPEQ:
402 cmp = 0;
403 goto cmp_d;
404
405 case EFDCMPGT:
406 cmp = 1;
407 goto cmp_d;
408
409 case EFDCMPLT:
410 cmp = -1;
411 goto cmp_d;
412
413 case EFDCTSF:
414 case EFDCTUF:
415 if (!((vb.wp[0] >> 20) == 0x7ff &&
416 ((vb.wp[0] & 0xfffff) > 0 || (vb.wp[1] > 0)))) {
417 /* not a NaN */
418 if (((vb.wp[0] >> 20) & 0x7ff) == 0) {
419 /* denorm */
420 vc.wp[1] = 0x0;
421 } else if ((vb.wp[0] >> 31) == 0) {
422 /* positive normal */
423 vc.wp[1] = (func == EFDCTSF) ?
424 0x7fffffff : 0xffffffff;
425 } else { /* negative normal */
426 vc.wp[1] = (func == EFDCTSF) ?
427 0x80000000 : 0x0;
428 }
429 } else { /* NaN */
430 vc.wp[1] = 0x0;
431 }
432 goto update_regs;
433
434 case EFDCFS: {
435 FP_DECL_S(SB);
436 FP_CLEAR_EXCEPTIONS;
437 FP_UNPACK_SP(SB, vb.wp + 1);
438#ifdef DEBUG
439 printk("SB: %ld %08lx %ld (%ld)\n",
440 SB_s, SB_f, SB_e, SB_c);
441#endif
442 FP_CONV(D, S, 2, 1, DR, SB);
443 goto pack_d;
444 }
445
446 case EFDCTUIDZ:
447 case EFDCTSIDZ:
448 _FP_ROUND_ZERO(2, DB);
449 FP_TO_INT_D(vc.dp[0], DB, 64, ((func & 0x1) == 0));
450 goto update_regs;
451
452 case EFDCTUI:
453 case EFDCTSI:
454 case EFDCTUIZ:
455 case EFDCTSIZ:
456 if (func & 0x4) {
457 _FP_ROUND(2, DB);
458 } else {
459 _FP_ROUND_ZERO(2, DB);
460 }
461 FP_TO_INT_D(vc.wp[1], DB, 32, ((func & 0x3) != 0));
462 goto update_regs;
463
464 default:
465 goto illegal;
466 }
467 break;
468
469pack_d:
470#ifdef DEBUG
471 printk("DR: %ld %08lx %08lx %ld (%ld)\n",
472 DR_s, DR_f1, DR_f0, DR_e, DR_c);
473#endif
474 FP_PACK_DP(vc.dp, DR);
475 goto update_regs;
476
477cmp_d:
478 FP_CMP_D(IR, DA, DB, 3);
479 if (IR == 3 && (FP_ISSIGNAN_D(DA) || FP_ISSIGNAN_D(DB)))
480 FP_SET_EXCEPTION(FP_EX_INVALID);
481 if (IR == cmp) {
482 IR = 0x4;
483 } else {
484 IR = 0;
485 }
486 goto update_ccr;
487
488 }
489
490 case VCT: {
491 FP_DECL_S(SA0); FP_DECL_S(SB0); FP_DECL_S(SR0);
492 FP_DECL_S(SA1); FP_DECL_S(SB1); FP_DECL_S(SR1);
493 int IR0, IR1;
494
495 switch (type) {
496 case AB:
497 case XCR:
498 FP_UNPACK_SP(SA0, va.wp);
499 FP_UNPACK_SP(SA1, va.wp + 1);
500 case XB:
501 FP_UNPACK_SP(SB0, vb.wp);
502 FP_UNPACK_SP(SB1, vb.wp + 1);
503 break;
504 case XA:
505 FP_UNPACK_SP(SA0, va.wp);
506 FP_UNPACK_SP(SA1, va.wp + 1);
507 break;
508 }
509
510#ifdef DEBUG
511 printk("SA0: %ld %08lx %ld (%ld)\n", SA0_s, SA0_f, SA0_e, SA0_c);
512 printk("SA1: %ld %08lx %ld (%ld)\n", SA1_s, SA1_f, SA1_e, SA1_c);
513 printk("SB0: %ld %08lx %ld (%ld)\n", SB0_s, SB0_f, SB0_e, SB0_c);
514 printk("SB1: %ld %08lx %ld (%ld)\n", SB1_s, SB1_f, SB1_e, SB1_c);
515#endif
516
517 switch (func) {
518 case EVFSABS:
519 vc.wp[0] = va.wp[0] & ~SIGN_BIT_S;
520 vc.wp[1] = va.wp[1] & ~SIGN_BIT_S;
521 goto update_regs;
522
523 case EVFSNABS:
524 vc.wp[0] = va.wp[0] | SIGN_BIT_S;
525 vc.wp[1] = va.wp[1] | SIGN_BIT_S;
526 goto update_regs;
527
528 case EVFSNEG:
529 vc.wp[0] = va.wp[0] ^ SIGN_BIT_S;
530 vc.wp[1] = va.wp[1] ^ SIGN_BIT_S;
531 goto update_regs;
532
533 case EVFSADD:
534 FP_ADD_S(SR0, SA0, SB0);
535 FP_ADD_S(SR1, SA1, SB1);
536 goto pack_vs;
537
538 case EVFSSUB:
539 FP_SUB_S(SR0, SA0, SB0);
540 FP_SUB_S(SR1, SA1, SB1);
541 goto pack_vs;
542
543 case EVFSMUL:
544 FP_MUL_S(SR0, SA0, SB0);
545 FP_MUL_S(SR1, SA1, SB1);
546 goto pack_vs;
547
548 case EVFSDIV:
549 FP_DIV_S(SR0, SA0, SB0);
550 FP_DIV_S(SR1, SA1, SB1);
551 goto pack_vs;
552
553 case EVFSCMPEQ:
554 cmp = 0;
555 goto cmp_vs;
556
557 case EVFSCMPGT:
558 cmp = 1;
559 goto cmp_vs;
560
561 case EVFSCMPLT:
562 cmp = -1;
563 goto cmp_vs;
564
565 case EVFSCTSF:
566 __asm__ __volatile__ ("mtspr 512, %4\n"
567 "efsctsf %0, %2\n"
568 "efsctsf %1, %3\n"
569 : "=r" (vc.wp[0]), "=r" (vc.wp[1])
570 : "r" (vb.wp[0]), "r" (vb.wp[1]), "r" (0));
571 goto update_regs;
572
573 case EVFSCTUF:
574 __asm__ __volatile__ ("mtspr 512, %4\n"
575 "efsctuf %0, %2\n"
576 "efsctuf %1, %3\n"
577 : "=r" (vc.wp[0]), "=r" (vc.wp[1])
578 : "r" (vb.wp[0]), "r" (vb.wp[1]), "r" (0));
579 goto update_regs;
580
581 case EVFSCTUI:
582 case EVFSCTSI:
583 case EVFSCTUIZ:
584 case EVFSCTSIZ:
585 if (func & 0x4) {
586 _FP_ROUND(1, SB0);
587 _FP_ROUND(1, SB1);
588 } else {
589 _FP_ROUND_ZERO(1, SB0);
590 _FP_ROUND_ZERO(1, SB1);
591 }
592 FP_TO_INT_S(vc.wp[0], SB0, 32, ((func & 0x3) != 0));
593 FP_TO_INT_S(vc.wp[1], SB1, 32, ((func & 0x3) != 0));
594 goto update_regs;
595
596 default:
597 goto illegal;
598 }
599 break;
600
601pack_vs:
602#ifdef DEBUG
603 printk("SR0: %ld %08lx %ld (%ld)\n", SR0_s, SR0_f, SR0_e, SR0_c);
604 printk("SR1: %ld %08lx %ld (%ld)\n", SR1_s, SR1_f, SR1_e, SR1_c);
605#endif
606 FP_PACK_SP(vc.wp, SR0);
607 FP_PACK_SP(vc.wp + 1, SR1);
608 goto update_regs;
609
610cmp_vs:
611 {
612 int ch, cl;
613
614 FP_CMP_S(IR0, SA0, SB0, 3);
615 FP_CMP_S(IR1, SA1, SB1, 3);
616 if (IR0 == 3 && (FP_ISSIGNAN_S(SA0) || FP_ISSIGNAN_S(SB0)))
617 FP_SET_EXCEPTION(FP_EX_INVALID);
618 if (IR1 == 3 && (FP_ISSIGNAN_S(SA1) || FP_ISSIGNAN_S(SB1)))
619 FP_SET_EXCEPTION(FP_EX_INVALID);
620 ch = (IR0 == cmp) ? 1 : 0;
621 cl = (IR1 == cmp) ? 1 : 0;
622 IR = (ch << 3) | (cl << 2) | ((ch | cl) << 1) |
623 ((ch & cl) << 0);
624 goto update_ccr;
625 }
626 }
627 default:
628 return -EINVAL;
629 }
630
631update_ccr:
632 regs->ccr &= ~(15 << ((7 - ((speinsn >> 23) & 0x7)) << 2));
633 regs->ccr |= (IR << ((7 - ((speinsn >> 23) & 0x7)) << 2));
634
635update_regs:
636 __FPU_FPSCR &= ~FP_EX_MASK;
637 __FPU_FPSCR |= (FP_CUR_EXCEPTIONS & FP_EX_MASK);
638 mtspr(SPRN_SPEFSCR, __FPU_FPSCR);
639
640 current->thread.evr[fc] = vc.wp[0];
641 regs->gpr[fc] = vc.wp[1];
642
643#ifdef DEBUG
644 printk("ccr = %08lx\n", regs->ccr);
645 printk("cur exceptions = %08x spefscr = %08lx\n",
646 FP_CUR_EXCEPTIONS, __FPU_FPSCR);
647 printk("vc: %08x %08x\n", vc.wp[0], vc.wp[1]);
648 printk("va: %08x %08x\n", va.wp[0], va.wp[1]);
649 printk("vb: %08x %08x\n", vb.wp[0], vb.wp[1]);
650#endif
651
652 return 0;
653
654illegal:
655 printk(KERN_ERR "\nOoops! IEEE-754 compliance handler encountered un-supported instruction.\ninst code: %08lx\n", speinsn);
656 return -ENOSYS;
657}
658
659int speround_handler(struct pt_regs *regs)
660{
661 union dw_union fgpr;
662 int s_lo, s_hi;
663 unsigned long speinsn, type, fc;
664
665 if (get_user(speinsn, (unsigned int __user *) regs->nip))
666 return -EFAULT;
667 if ((speinsn >> 26) != 4)
668 return -EINVAL; /* not an spe instruction */
669
670 type = insn_type(speinsn & 0x7ff);
671 if (type == XCR) return -ENOSYS;
672
673 fc = (speinsn >> 21) & 0x1f;
674 s_lo = regs->gpr[fc] & SIGN_BIT_S;
675 s_hi = current->thread.evr[fc] & SIGN_BIT_S;
676 fgpr.wp[0] = current->thread.evr[fc];
677 fgpr.wp[1] = regs->gpr[fc];
678
679 __FPU_FPSCR = mfspr(SPRN_SPEFSCR);
680
681 switch ((speinsn >> 5) & 0x7) {
682 /* Since SPE instructions on E500 core can handle round to nearest
683 * and round toward zero with IEEE-754 complied, we just need
684 * to handle round toward +Inf and round toward -Inf by software.
685 */
686 case SPFP:
687 if ((FP_ROUNDMODE) == FP_RND_PINF) {
688 if (!s_lo) fgpr.wp[1]++; /* Z > 0, choose Z1 */
689 } else { /* round to -Inf */
690 if (s_lo) fgpr.wp[1]++; /* Z < 0, choose Z2 */
691 }
692 break;
693
694 case DPFP:
695 if (FP_ROUNDMODE == FP_RND_PINF) {
696 if (!s_hi) fgpr.dp[0]++; /* Z > 0, choose Z1 */
697 } else { /* round to -Inf */
698 if (s_hi) fgpr.dp[0]++; /* Z < 0, choose Z2 */
699 }
700 break;
701
702 case VCT:
703 if (FP_ROUNDMODE == FP_RND_PINF) {
704 if (!s_lo) fgpr.wp[1]++; /* Z_low > 0, choose Z1 */
705 if (!s_hi) fgpr.wp[0]++; /* Z_high word > 0, choose Z1 */
706 } else { /* round to -Inf */
707 if (s_lo) fgpr.wp[1]++; /* Z_low < 0, choose Z2 */
708 if (s_hi) fgpr.wp[0]++; /* Z_high < 0, choose Z2 */
709 }
710 break;
711
712 default:
713 return -EINVAL;
714 }
715
716 current->thread.evr[fc] = fgpr.wp[0];
717 regs->gpr[fc] = fgpr.wp[1];
718
719 return 0;
720}
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index e7392b45a5ef..953cc4a1cde5 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,17 +6,19 @@ ifeq ($(CONFIG_PPC64),y)
6EXTRA_CFLAGS += -mno-minimal-toc 6EXTRA_CFLAGS += -mno-minimal-toc
7endif 7endif
8 8
9obj-y := fault.o mem.o \ 9obj-y := fault.o mem.o pgtable.o \
10 init_$(CONFIG_WORD_SIZE).o \ 10 init_$(CONFIG_WORD_SIZE).o \
11 pgtable_$(CONFIG_WORD_SIZE).o \ 11 pgtable_$(CONFIG_WORD_SIZE).o
12 mmu_context_$(CONFIG_WORD_SIZE).o 12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
13 tlb_nohash_low.o
13hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o 14hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o
14obj-$(CONFIG_PPC64) += hash_utils_64.o \ 15obj-$(CONFIG_PPC64) += hash_utils_64.o \
15 slb_low.o slb.o stab.o \ 16 slb_low.o slb.o stab.o \
16 gup.o mmap.o $(hash-y) 17 gup.o mmap.o $(hash-y)
17obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o 18obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o
18obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ 19obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \
19 tlb_$(CONFIG_WORD_SIZE).o 20 tlb_hash$(CONFIG_WORD_SIZE).o \
21 mmu_context_hash$(CONFIG_WORD_SIZE).o
20obj-$(CONFIG_40x) += 40x_mmu.o 22obj-$(CONFIG_40x) += 40x_mmu.o
21obj-$(CONFIG_44x) += 44x_mmu.o 23obj-$(CONFIG_44x) += 44x_mmu.o
22obj-$(CONFIG_FSL_BOOKE) += fsl_booke_mmu.o 24obj-$(CONFIG_FSL_BOOKE) += fsl_booke_mmu.o
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 565b7a237c84..91c7b8636b8a 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -30,6 +30,7 @@
30#include <linux/kprobes.h> 30#include <linux/kprobes.h>
31#include <linux/kdebug.h> 31#include <linux/kdebug.h>
32 32
33#include <asm/firmware.h>
33#include <asm/page.h> 34#include <asm/page.h>
34#include <asm/pgtable.h> 35#include <asm/pgtable.h>
35#include <asm/mmu.h> 36#include <asm/mmu.h>
@@ -283,7 +284,7 @@ good_area:
283 } 284 }
284 pte_update(ptep, 0, _PAGE_HWEXEC | 285 pte_update(ptep, 0, _PAGE_HWEXEC |
285 _PAGE_ACCESSED); 286 _PAGE_ACCESSED);
286 _tlbie(address, mm->context.id); 287 local_flush_tlb_page(vma, address);
287 pte_unmap_unlock(ptep, ptl); 288 pte_unmap_unlock(ptep, ptl);
288 up_read(&mm->mmap_sem); 289 up_read(&mm->mmap_sem);
289 return 0; 290 return 0;
@@ -318,9 +319,16 @@ good_area:
318 goto do_sigbus; 319 goto do_sigbus;
319 BUG(); 320 BUG();
320 } 321 }
321 if (ret & VM_FAULT_MAJOR) 322 if (ret & VM_FAULT_MAJOR) {
322 current->maj_flt++; 323 current->maj_flt++;
323 else 324#ifdef CONFIG_PPC_SMLPAR
325 if (firmware_has_feature(FW_FEATURE_CMO)) {
326 preempt_disable();
327 get_lppaca()->page_ins += (1 << PAGE_FACTOR);
328 preempt_enable();
329 }
330#endif
331 } else
324 current->min_flt++; 332 current->min_flt++;
325 up_read(&mm->mmap_sem); 333 up_read(&mm->mmap_sem);
326 return 0; 334 return 0;
@@ -339,7 +347,7 @@ bad_area_nosemaphore:
339 && printk_ratelimit()) 347 && printk_ratelimit())
340 printk(KERN_CRIT "kernel tried to execute NX-protected" 348 printk(KERN_CRIT "kernel tried to execute NX-protected"
341 " page (%lx) - exploit attempt? (uid: %d)\n", 349 " page (%lx) - exploit attempt? (uid: %d)\n",
342 address, current->uid); 350 address, current_uid());
343 351
344 return SIGSEGV; 352 return SIGSEGV;
345 353
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index 7bffb70b9fe2..67850ec9feb3 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -36,36 +36,6 @@ mmu_hash_lock:
36#endif /* CONFIG_SMP */ 36#endif /* CONFIG_SMP */
37 37
38/* 38/*
39 * Sync CPUs with hash_page taking & releasing the hash
40 * table lock
41 */
42#ifdef CONFIG_SMP
43 .text
44_GLOBAL(hash_page_sync)
45 mfmsr r10
46 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
47 mtmsr r0
48 lis r8,mmu_hash_lock@h
49 ori r8,r8,mmu_hash_lock@l
50 lis r0,0x0fff
51 b 10f
5211: lwz r6,0(r8)
53 cmpwi 0,r6,0
54 bne 11b
5510: lwarx r6,0,r8
56 cmpwi 0,r6,0
57 bne- 11b
58 stwcx. r0,0,r8
59 bne- 10b
60 isync
61 eieio
62 li r0,0
63 stw r0,0(r8)
64 mtmsr r10
65 blr
66#endif /* CONFIG_SMP */
67
68/*
69 * Load a PTE into the hash table, if possible. 39 * Load a PTE into the hash table, if possible.
70 * The address is in r4, and r3 contains an access flag: 40 * The address is in r4, and r3 contains an access flag:
71 * _PAGE_RW (0x400) if a write. 41 * _PAGE_RW (0x400) if a write.
@@ -353,8 +323,8 @@ _GLOBAL(create_hpte)
353 ori r8,r8,0xe14 /* clear out reserved bits and M */ 323 ori r8,r8,0xe14 /* clear out reserved bits and M */
354 andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */ 324 andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */
355BEGIN_FTR_SECTION 325BEGIN_FTR_SECTION
356 ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */ 326 rlwinm r8,r8,0,~_PAGE_COHERENT /* clear M (coherence not required) */
357END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT) 327END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
358#ifdef CONFIG_PTE_64BIT 328#ifdef CONFIG_PTE_64BIT
359 /* Put the XPN bits into the PTE */ 329 /* Put the XPN bits into the PTE */
360 rlwimi r8,r10,8,20,22 330 rlwimi r8,r10,8,20,22
@@ -663,3 +633,80 @@ _GLOBAL(flush_hash_patch_B)
663 SYNC_601 633 SYNC_601
664 isync 634 isync
665 blr 635 blr
636
637/*
638 * Flush an entry from the TLB
639 */
640_GLOBAL(_tlbie)
641#ifdef CONFIG_SMP
642 rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
643 lwz r8,TI_CPU(r8)
644 oris r8,r8,11
645 mfmsr r10
646 SYNC
647 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
648 rlwinm r0,r0,0,28,26 /* clear DR */
649 mtmsr r0
650 SYNC_601
651 isync
652 lis r9,mmu_hash_lock@h
653 ori r9,r9,mmu_hash_lock@l
654 tophys(r9,r9)
65510: lwarx r7,0,r9
656 cmpwi 0,r7,0
657 bne- 10b
658 stwcx. r8,0,r9
659 bne- 10b
660 eieio
661 tlbie r3
662 sync
663 TLBSYNC
664 li r0,0
665 stw r0,0(r9) /* clear mmu_hash_lock */
666 mtmsr r10
667 SYNC_601
668 isync
669#else /* CONFIG_SMP */
670 tlbie r3
671 sync
672#endif /* CONFIG_SMP */
673 blr
674
675/*
676 * Flush the entire TLB. 603/603e only
677 */
678_GLOBAL(_tlbia)
679#if defined(CONFIG_SMP)
680 rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
681 lwz r8,TI_CPU(r8)
682 oris r8,r8,10
683 mfmsr r10
684 SYNC
685 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
686 rlwinm r0,r0,0,28,26 /* clear DR */
687 mtmsr r0
688 SYNC_601
689 isync
690 lis r9,mmu_hash_lock@h
691 ori r9,r9,mmu_hash_lock@l
692 tophys(r9,r9)
69310: lwarx r7,0,r9
694 cmpwi 0,r7,0
695 bne- 10b
696 stwcx. r8,0,r9
697 bne- 10b
698 sync
699 tlbia
700 sync
701 TLBSYNC
702 li r0,0
703 stw r0,0(r9) /* clear mmu_hash_lock */
704 mtmsr r10
705 SYNC_601
706 isync
707#else /* CONFIG_SMP */
708 sync
709 tlbia
710 sync
711#endif /* CONFIG_SMP */
712 blr
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 7bbf4e4ed430..201c7a5486cb 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -53,8 +53,7 @@ unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */
53 53
54/* Subtract one from array size because we don't need a cache for 4K since 54/* Subtract one from array size because we don't need a cache for 4K since
55 * is not a huge page size */ 55 * is not a huge page size */
56#define huge_pgtable_cache(psize) (pgtable_cache[HUGEPTE_CACHE_NUM \ 56#define HUGE_PGTABLE_INDEX(psize) (HUGEPTE_CACHE_NUM + psize - 1)
57 + psize-1])
58#define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize]) 57#define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize])
59 58
60static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = { 59static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = {
@@ -113,7 +112,7 @@ static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
113static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp, 112static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
114 unsigned long address, unsigned int psize) 113 unsigned long address, unsigned int psize)
115{ 114{
116 pte_t *new = kmem_cache_zalloc(huge_pgtable_cache(psize), 115 pte_t *new = kmem_cache_zalloc(pgtable_cache[HUGE_PGTABLE_INDEX(psize)],
117 GFP_KERNEL|__GFP_REPEAT); 116 GFP_KERNEL|__GFP_REPEAT);
118 117
119 if (! new) 118 if (! new)
@@ -121,7 +120,7 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
121 120
122 spin_lock(&mm->page_table_lock); 121 spin_lock(&mm->page_table_lock);
123 if (!hugepd_none(*hpdp)) 122 if (!hugepd_none(*hpdp))
124 kmem_cache_free(huge_pgtable_cache(psize), new); 123 kmem_cache_free(pgtable_cache[HUGE_PGTABLE_INDEX(psize)], new);
125 else 124 else
126 hpdp->pd = (unsigned long)new | HUGEPD_OK; 125 hpdp->pd = (unsigned long)new | HUGEPD_OK;
127 spin_unlock(&mm->page_table_lock); 126 spin_unlock(&mm->page_table_lock);
@@ -507,6 +506,9 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
507{ 506{
508 struct hstate *hstate = hstate_file(file); 507 struct hstate *hstate = hstate_file(file);
509 int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate)); 508 int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
509
510 if (!mmu_huge_psizes[mmu_psize])
511 return -EINVAL;
510 return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0); 512 return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
511} 513}
512 514
@@ -760,13 +762,14 @@ static int __init hugetlbpage_init(void)
760 762
761 for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { 763 for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
762 if (mmu_huge_psizes[psize]) { 764 if (mmu_huge_psizes[psize]) {
763 huge_pgtable_cache(psize) = kmem_cache_create( 765 pgtable_cache[HUGE_PGTABLE_INDEX(psize)] =
764 HUGEPTE_CACHE_NAME(psize), 766 kmem_cache_create(
765 HUGEPTE_TABLE_SIZE(psize), 767 HUGEPTE_CACHE_NAME(psize),
766 HUGEPTE_TABLE_SIZE(psize), 768 HUGEPTE_TABLE_SIZE(psize),
767 0, 769 HUGEPTE_TABLE_SIZE(psize),
768 NULL); 770 0,
769 if (!huge_pgtable_cache(psize)) 771 NULL);
772 if (!pgtable_cache[HUGE_PGTABLE_INDEX(psize)])
770 panic("hugetlbpage_init(): could not create %s"\ 773 panic("hugetlbpage_init(): could not create %s"\
771 "\n", HUGEPTE_CACHE_NAME(psize)); 774 "\n", HUGEPTE_CACHE_NAME(psize));
772 } 775 }
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 388ceda632f3..666a5e8a5be1 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -35,7 +35,6 @@
35#include <asm/pgalloc.h> 35#include <asm/pgalloc.h>
36#include <asm/prom.h> 36#include <asm/prom.h>
37#include <asm/io.h> 37#include <asm/io.h>
38#include <asm/mmu_context.h>
39#include <asm/pgtable.h> 38#include <asm/pgtable.h>
40#include <asm/mmu.h> 39#include <asm/mmu.h>
41#include <asm/smp.h> 40#include <asm/smp.h>
@@ -49,7 +48,7 @@
49 48
50#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL) 49#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
51/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */ 50/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */
52#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - KERNELBASE)) 51#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET))
53#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL" 52#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
54#endif 53#endif
55#endif 54#endif
@@ -180,9 +179,6 @@ void __init MMU_init(void)
180 if (ppc_md.progress) 179 if (ppc_md.progress)
181 ppc_md.progress("MMU:setio", 0x302); 180 ppc_md.progress("MMU:setio", 0x302);
182 181
183 /* Initialize the context management stuff */
184 mmu_context_init();
185
186 if (ppc_md.progress) 182 if (ppc_md.progress)
187 ppc_md.progress("MMU:exit", 0x211); 183 ppc_md.progress("MMU:exit", 0x211);
188 184
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index b9e1a1da6e52..53b06ebb3f2f 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -102,8 +102,8 @@ pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
102 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot); 102 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
103 103
104 if (!page_is_ram(pfn)) 104 if (!page_is_ram(pfn))
105 vma_prot = __pgprot(pgprot_val(vma_prot) 105 vma_prot = pgprot_noncached(vma_prot);
106 | _PAGE_GUARDED | _PAGE_NO_CACHE); 106
107 return vma_prot; 107 return vma_prot;
108} 108}
109EXPORT_SYMBOL(phys_mem_access_prot); 109EXPORT_SYMBOL(phys_mem_access_prot);
@@ -488,7 +488,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
488 * we invalidate the TLB here, thus avoiding dcbst 488 * we invalidate the TLB here, thus avoiding dcbst
489 * misbehaviour. 489 * misbehaviour.
490 */ 490 */
491 _tlbie(address, 0 /* 8xx doesn't care about PID */); 491 _tlbil_va(address, 0 /* 8xx doesn't care about PID */);
492#endif 492#endif
493 /* The _PAGE_USER test should really be _PAGE_EXEC, but 493 /* The _PAGE_USER test should really be _PAGE_EXEC, but
494 * older glibc versions execute some code from no-exec 494 * older glibc versions execute some code from no-exec
diff --git a/arch/powerpc/mm/mmu_context_32.c b/arch/powerpc/mm/mmu_context_32.c
deleted file mode 100644
index cc32ba41d900..000000000000
--- a/arch/powerpc/mm/mmu_context_32.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU substantially follows the
4 * architecture specification. This includes the 6xx, 7xx, 7xxx,
5 * 8260, and POWER3 implementations but excludes the 8xx and 4xx.
6 * -- paulus
7 *
8 * Derived from arch/ppc/mm/init.c:
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
12 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
13 * Copyright (C) 1996 Paul Mackerras
14 *
15 * Derived from "arch/i386/mm/init.c"
16 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
22 *
23 */
24
25#include <linux/mm.h>
26#include <linux/init.h>
27
28#include <asm/mmu_context.h>
29#include <asm/tlbflush.h>
30
31unsigned long next_mmu_context;
32unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
33#ifdef FEW_CONTEXTS
34atomic_t nr_free_contexts;
35struct mm_struct *context_mm[LAST_CONTEXT+1];
36void steal_context(void);
37#endif /* FEW_CONTEXTS */
38
39/*
40 * Initialize the context management stuff.
41 */
42void __init
43mmu_context_init(void)
44{
45 /*
46 * Some processors have too few contexts to reserve one for
47 * init_mm, and require using context 0 for a normal task.
48 * Other processors reserve the use of context zero for the kernel.
49 * This code assumes FIRST_CONTEXT < 32.
50 */
51 context_map[0] = (1 << FIRST_CONTEXT) - 1;
52 next_mmu_context = FIRST_CONTEXT;
53#ifdef FEW_CONTEXTS
54 atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
55#endif /* FEW_CONTEXTS */
56}
57
58#ifdef FEW_CONTEXTS
59/*
60 * Steal a context from a task that has one at the moment.
61 * This is only used on 8xx and 4xx and we presently assume that
62 * they don't do SMP. If they do then this will have to check
63 * whether the MM we steal is in use.
64 * We also assume that this is only used on systems that don't
65 * use an MMU hash table - this is true for 8xx and 4xx.
66 * This isn't an LRU system, it just frees up each context in
67 * turn (sort-of pseudo-random replacement :). This would be the
68 * place to implement an LRU scheme if anyone was motivated to do it.
69 * -- paulus
70 */
71void
72steal_context(void)
73{
74 struct mm_struct *mm;
75
76 /* free up context `next_mmu_context' */
77 /* if we shouldn't free context 0, don't... */
78 if (next_mmu_context < FIRST_CONTEXT)
79 next_mmu_context = FIRST_CONTEXT;
80 mm = context_mm[next_mmu_context];
81 flush_tlb_mm(mm);
82 destroy_context(mm);
83}
84#endif /* FEW_CONTEXTS */
diff --git a/arch/powerpc/mm/mmu_context_hash32.c b/arch/powerpc/mm/mmu_context_hash32.c
new file mode 100644
index 000000000000..0dfba2bf7f31
--- /dev/null
+++ b/arch/powerpc/mm/mmu_context_hash32.c
@@ -0,0 +1,103 @@
1/*
2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU substantially follows the
4 * architecture specification. This includes the 6xx, 7xx, 7xxx,
5 * 8260, and POWER3 implementations but excludes the 8xx and 4xx.
6 * -- paulus
7 *
8 * Derived from arch/ppc/mm/init.c:
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
12 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
13 * Copyright (C) 1996 Paul Mackerras
14 *
15 * Derived from "arch/i386/mm/init.c"
16 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
22 *
23 */
24
25#include <linux/mm.h>
26#include <linux/init.h>
27
28#include <asm/mmu_context.h>
29#include <asm/tlbflush.h>
30
31/*
32 * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
33 * (virtual segment identifiers) for each context. Although the
34 * hardware supports 24-bit VSIDs, and thus >1 million contexts,
35 * we only use 32,768 of them. That is ample, since there can be
36 * at most around 30,000 tasks in the system anyway, and it means
37 * that we can use a bitmap to indicate which contexts are in use.
38 * Using a bitmap means that we entirely avoid all of the problems
39 * that we used to have when the context number overflowed,
40 * particularly on SMP systems.
41 * -- paulus.
42 */
43#define NO_CONTEXT ((unsigned long) -1)
44#define LAST_CONTEXT 32767
45#define FIRST_CONTEXT 1
46
47/*
48 * This function defines the mapping from contexts to VSIDs (virtual
49 * segment IDs). We use a skew on both the context and the high 4 bits
50 * of the 32-bit virtual address (the "effective segment ID") in order
51 * to spread out the entries in the MMU hash table. Note, if this
52 * function is changed then arch/ppc/mm/hashtable.S will have to be
53 * changed to correspond.
54 *
55 *
56 * CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
57 * & 0xffffff)
58 */
59
60static unsigned long next_mmu_context;
61static unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
62
63
64/*
65 * Set up the context for a new address space.
66 */
67int init_new_context(struct task_struct *t, struct mm_struct *mm)
68{
69 unsigned long ctx = next_mmu_context;
70
71 while (test_and_set_bit(ctx, context_map)) {
72 ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
73 if (ctx > LAST_CONTEXT)
74 ctx = 0;
75 }
76 next_mmu_context = (ctx + 1) & LAST_CONTEXT;
77 mm->context.id = ctx;
78
79 return 0;
80}
81
82/*
83 * We're finished using the context for an address space.
84 */
85void destroy_context(struct mm_struct *mm)
86{
87 preempt_disable();
88 if (mm->context.id != NO_CONTEXT) {
89 clear_bit(mm->context.id, context_map);
90 mm->context.id = NO_CONTEXT;
91 }
92 preempt_enable();
93}
94
95/*
96 * Initialize the context management stuff.
97 */
98void __init mmu_context_init(void)
99{
100 /* Reserve context 0 for kernel use */
101 context_map[0] = (1 << FIRST_CONTEXT) - 1;
102 next_mmu_context = FIRST_CONTEXT;
103}
diff --git a/arch/powerpc/mm/mmu_context_64.c b/arch/powerpc/mm/mmu_context_hash64.c
index 1db38ba1f544..dbeb86ac90cd 100644
--- a/arch/powerpc/mm/mmu_context_64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -24,6 +24,14 @@
24static DEFINE_SPINLOCK(mmu_context_lock); 24static DEFINE_SPINLOCK(mmu_context_lock);
25static DEFINE_IDR(mmu_context_idr); 25static DEFINE_IDR(mmu_context_idr);
26 26
27/*
28 * The proto-VSID space has 2^35 - 1 segments available for user mappings.
29 * Each segment contains 2^28 bytes. Each context maps 2^44 bytes,
30 * so we can support 2^19-1 contexts (19 == 35 + 28 - 44).
31 */
32#define NO_CONTEXT 0
33#define MAX_CONTEXT ((1UL << 19) - 1)
34
27int init_new_context(struct task_struct *tsk, struct mm_struct *mm) 35int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
28{ 36{
29 int index; 37 int index;
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
new file mode 100644
index 000000000000..52a0cfc38b64
--- /dev/null
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -0,0 +1,397 @@
1/*
2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU is not using the hash
4 * table, such as 8xx, 4xx, BookE's etc...
5 *
6 * Copyright 2008 Ben Herrenschmidt <benh@kernel.crashing.org>
7 * IBM Corp.
8 *
9 * Derived from previous arch/powerpc/mm/mmu_context.c
10 * and arch/powerpc/include/asm/mmu_context.h
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 *
17 * TODO:
18 *
19 * - The global context lock will not scale very well
20 * - The maps should be dynamically allocated to allow for processors
21 * that support more PID bits at runtime
22 * - Implement flush_tlb_mm() by making the context stale and picking
23 * a new one
24 * - More aggressively clear stale map bits and maybe find some way to
25 * also clear mm->cpu_vm_mask bits when processes are migrated
26 */
27
28#undef DEBUG
29#define DEBUG_STEAL_ONLY
30#undef DEBUG_MAP_CONSISTENCY
31/*#define DEBUG_CLAMP_LAST_CONTEXT 15 */
32
33#include <linux/kernel.h>
34#include <linux/mm.h>
35#include <linux/init.h>
36#include <linux/spinlock.h>
37#include <linux/bootmem.h>
38#include <linux/notifier.h>
39#include <linux/cpu.h>
40
41#include <asm/mmu_context.h>
42#include <asm/tlbflush.h>
43
44static unsigned int first_context, last_context;
45static unsigned int next_context, nr_free_contexts;
46static unsigned long *context_map;
47static unsigned long *stale_map[NR_CPUS];
48static struct mm_struct **context_mm;
49static spinlock_t context_lock = SPIN_LOCK_UNLOCKED;
50
51#define CTX_MAP_SIZE \
52 (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1))
53
54
55/* Steal a context from a task that has one at the moment.
56 *
57 * This is used when we are running out of available PID numbers
58 * on the processors.
59 *
60 * This isn't an LRU system, it just frees up each context in
61 * turn (sort-of pseudo-random replacement :). This would be the
62 * place to implement an LRU scheme if anyone was motivated to do it.
63 * -- paulus
64 *
65 * For context stealing, we use a slightly different approach for
66 * SMP and UP. Basically, the UP one is simpler and doesn't use
67 * the stale map as we can just flush the local CPU
68 * -- benh
69 */
70#ifdef CONFIG_SMP
71static unsigned int steal_context_smp(unsigned int id)
72{
73 struct mm_struct *mm;
74 unsigned int cpu, max;
75
76 again:
77 max = last_context - first_context;
78
79 /* Attempt to free next_context first and then loop until we manage */
80 while (max--) {
81 /* Pick up the victim mm */
82 mm = context_mm[id];
83
84 /* We have a candidate victim, check if it's active, on SMP
85 * we cannot steal active contexts
86 */
87 if (mm->context.active) {
88 id++;
89 if (id > last_context)
90 id = first_context;
91 continue;
92 }
93 pr_debug("[%d] steal context %d from mm @%p\n",
94 smp_processor_id(), id, mm);
95
96 /* Mark this mm has having no context anymore */
97 mm->context.id = MMU_NO_CONTEXT;
98
99 /* Mark it stale on all CPUs that used this mm */
100 for_each_cpu_mask_nr(cpu, mm->cpu_vm_mask)
101 __set_bit(id, stale_map[cpu]);
102 return id;
103 }
104
105 /* This will happen if you have more CPUs than available contexts,
106 * all we can do here is wait a bit and try again
107 */
108 spin_unlock(&context_lock);
109 cpu_relax();
110 spin_lock(&context_lock);
111 goto again;
112}
113#endif /* CONFIG_SMP */
114
115/* Note that this will also be called on SMP if all other CPUs are
116 * offlined, which means that it may be called for cpu != 0. For
117 * this to work, we somewhat assume that CPUs that are onlined
118 * come up with a fully clean TLB (or are cleaned when offlined)
119 */
120static unsigned int steal_context_up(unsigned int id)
121{
122 struct mm_struct *mm;
123 int cpu = smp_processor_id();
124
125 /* Pick up the victim mm */
126 mm = context_mm[id];
127
128 pr_debug("[%d] steal context %d from mm @%p\n", cpu, id, mm);
129
130 /* Mark this mm has having no context anymore */
131 mm->context.id = MMU_NO_CONTEXT;
132
133 /* Flush the TLB for that context */
134 local_flush_tlb_mm(mm);
135
136 /* XXX This clear should ultimately be part of local_flush_tlb_mm */
137 __clear_bit(id, stale_map[cpu]);
138
139 return id;
140}
141
142#ifdef DEBUG_MAP_CONSISTENCY
143static void context_check_map(void)
144{
145 unsigned int id, nrf, nact;
146
147 nrf = nact = 0;
148 for (id = first_context; id <= last_context; id++) {
149 int used = test_bit(id, context_map);
150 if (!used)
151 nrf++;
152 if (used != (context_mm[id] != NULL))
153 pr_err("MMU: Context %d is %s and MM is %p !\n",
154 id, used ? "used" : "free", context_mm[id]);
155 if (context_mm[id] != NULL)
156 nact += context_mm[id]->context.active;
157 }
158 if (nrf != nr_free_contexts) {
159 pr_err("MMU: Free context count out of sync ! (%d vs %d)\n",
160 nr_free_contexts, nrf);
161 nr_free_contexts = nrf;
162 }
163 if (nact > num_online_cpus())
164 pr_err("MMU: More active contexts than CPUs ! (%d vs %d)\n",
165 nact, num_online_cpus());
166 if (first_context > 0 && !test_bit(0, context_map))
167 pr_err("MMU: Context 0 has been freed !!!\n");
168}
169#else
170static void context_check_map(void) { }
171#endif
172
173void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
174{
175 unsigned int id, cpu = smp_processor_id();
176 unsigned long *map;
177
178 /* No lockless fast path .. yet */
179 spin_lock(&context_lock);
180
181#ifndef DEBUG_STEAL_ONLY
182 pr_debug("[%d] activating context for mm @%p, active=%d, id=%d\n",
183 cpu, next, next->context.active, next->context.id);
184#endif
185
186#ifdef CONFIG_SMP
187 /* Mark us active and the previous one not anymore */
188 next->context.active++;
189 if (prev) {
190#ifndef DEBUG_STEAL_ONLY
191 pr_debug(" old context %p active was: %d\n",
192 prev, prev->context.active);
193#endif
194 WARN_ON(prev->context.active < 1);
195 prev->context.active--;
196 }
197#endif /* CONFIG_SMP */
198
199 /* If we already have a valid assigned context, skip all that */
200 id = next->context.id;
201 if (likely(id != MMU_NO_CONTEXT))
202 goto ctxt_ok;
203
204 /* We really don't have a context, let's try to acquire one */
205 id = next_context;
206 if (id > last_context)
207 id = first_context;
208 map = context_map;
209
210 /* No more free contexts, let's try to steal one */
211 if (nr_free_contexts == 0) {
212#ifdef CONFIG_SMP
213 if (num_online_cpus() > 1) {
214 id = steal_context_smp(id);
215 goto stolen;
216 }
217#endif /* CONFIG_SMP */
218 id = steal_context_up(id);
219 goto stolen;
220 }
221 nr_free_contexts--;
222
223 /* We know there's at least one free context, try to find it */
224 while (__test_and_set_bit(id, map)) {
225 id = find_next_zero_bit(map, last_context+1, id);
226 if (id > last_context)
227 id = first_context;
228 }
229 stolen:
230 next_context = id + 1;
231 context_mm[id] = next;
232 next->context.id = id;
233
234#ifndef DEBUG_STEAL_ONLY
235 pr_debug("[%d] picked up new id %d, nrf is now %d\n",
236 cpu, id, nr_free_contexts);
237#endif
238
239 context_check_map();
240 ctxt_ok:
241
242 /* If that context got marked stale on this CPU, then flush the
243 * local TLB for it and unmark it before we use it
244 */
245 if (test_bit(id, stale_map[cpu])) {
246 pr_debug("[%d] flushing stale context %d for mm @%p !\n",
247 cpu, id, next);
248 local_flush_tlb_mm(next);
249
250 /* XXX This clear should ultimately be part of local_flush_tlb_mm */
251 __clear_bit(id, stale_map[cpu]);
252 }
253
254 /* Flick the MMU and release lock */
255 set_context(id, next->pgd);
256 spin_unlock(&context_lock);
257}
258
259/*
260 * Set up the context for a new address space.
261 */
262int init_new_context(struct task_struct *t, struct mm_struct *mm)
263{
264 mm->context.id = MMU_NO_CONTEXT;
265 mm->context.active = 0;
266
267 return 0;
268}
269
270/*
271 * We're finished using the context for an address space.
272 */
273void destroy_context(struct mm_struct *mm)
274{
275 unsigned int id;
276
277 if (mm->context.id == MMU_NO_CONTEXT)
278 return;
279
280 WARN_ON(mm->context.active != 0);
281
282 spin_lock(&context_lock);
283 id = mm->context.id;
284 if (id != MMU_NO_CONTEXT) {
285 __clear_bit(id, context_map);
286 mm->context.id = MMU_NO_CONTEXT;
287#ifdef DEBUG_MAP_CONSISTENCY
288 mm->context.active = 0;
289 context_mm[id] = NULL;
290#endif
291 nr_free_contexts++;
292 }
293 spin_unlock(&context_lock);
294}
295
296#ifdef CONFIG_SMP
297
298static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,
299 unsigned long action, void *hcpu)
300{
301 unsigned int cpu = (unsigned int)(long)hcpu;
302
303 /* We don't touch CPU 0 map, it's allocated at aboot and kept
304 * around forever
305 */
306 if (cpu == 0)
307 return NOTIFY_OK;
308
309 switch (action) {
310 case CPU_ONLINE:
311 case CPU_ONLINE_FROZEN:
312 pr_debug("MMU: Allocating stale context map for CPU %d\n", cpu);
313 stale_map[cpu] = kzalloc(CTX_MAP_SIZE, GFP_KERNEL);
314 break;
315#ifdef CONFIG_HOTPLUG_CPU
316 case CPU_DEAD:
317 case CPU_DEAD_FROZEN:
318 pr_debug("MMU: Freeing stale context map for CPU %d\n", cpu);
319 kfree(stale_map[cpu]);
320 stale_map[cpu] = NULL;
321 break;
322#endif
323 }
324 return NOTIFY_OK;
325}
326
327static struct notifier_block __cpuinitdata mmu_context_cpu_nb = {
328 .notifier_call = mmu_context_cpu_notify,
329};
330
331#endif /* CONFIG_SMP */
332
333/*
334 * Initialize the context management stuff.
335 */
336void __init mmu_context_init(void)
337{
338 /* Mark init_mm as being active on all possible CPUs since
339 * we'll get called with prev == init_mm the first time
340 * we schedule on a given CPU
341 */
342 init_mm.context.active = NR_CPUS;
343
344 /*
345 * The MPC8xx has only 16 contexts. We rotate through them on each
346 * task switch. A better way would be to keep track of tasks that
347 * own contexts, and implement an LRU usage. That way very active
348 * tasks don't always have to pay the TLB reload overhead. The
349 * kernel pages are mapped shared, so the kernel can run on behalf
350 * of any task that makes a kernel entry. Shared does not mean they
351 * are not protected, just that the ASID comparison is not performed.
352 * -- Dan
353 *
354 * The IBM4xx has 256 contexts, so we can just rotate through these
355 * as a way of "switching" contexts. If the TID of the TLB is zero,
356 * the PID/TID comparison is disabled, so we can use a TID of zero
357 * to represent all kernel pages as shared among all contexts.
358 * -- Dan
359 */
360 if (mmu_has_feature(MMU_FTR_TYPE_8xx)) {
361 first_context = 0;
362 last_context = 15;
363 } else {
364 first_context = 1;
365 last_context = 255;
366 }
367
368#ifdef DEBUG_CLAMP_LAST_CONTEXT
369 last_context = DEBUG_CLAMP_LAST_CONTEXT;
370#endif
371 /*
372 * Allocate the maps used by context management
373 */
374 context_map = alloc_bootmem(CTX_MAP_SIZE);
375 context_mm = alloc_bootmem(sizeof(void *) * (last_context + 1));
376 stale_map[0] = alloc_bootmem(CTX_MAP_SIZE);
377
378#ifdef CONFIG_SMP
379 register_cpu_notifier(&mmu_context_cpu_nb);
380#endif
381
382 printk(KERN_INFO
383 "MMU: Allocated %d bytes of context maps for %d contexts\n",
384 2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)),
385 last_context - first_context + 1);
386
387 /*
388 * Some processors have too few contexts to reserve one for
389 * init_mm, and require using context 0 for a normal task.
390 * Other processors reserve the use of context zero for the kernel.
391 * This code assumes first_context < 32.
392 */
393 context_map[0] = (1 << first_context) - 1;
394 next_context = first_context;
395 nr_free_contexts = last_context - first_context + 1;
396}
397
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index fab3cfad4099..4314b39b6faf 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -22,10 +22,58 @@
22#include <asm/tlbflush.h> 22#include <asm/tlbflush.h>
23#include <asm/mmu.h> 23#include <asm/mmu.h>
24 24
25#ifdef CONFIG_PPC_MMU_NOHASH
26
27/*
28 * On 40x and 8xx, we directly inline tlbia and tlbivax
29 */
30#if defined(CONFIG_40x) || defined(CONFIG_8xx)
31static inline void _tlbil_all(void)
32{
33 asm volatile ("sync; tlbia; isync" : : : "memory")
34}
35static inline void _tlbil_pid(unsigned int pid)
36{
37 asm volatile ("sync; tlbia; isync" : : : "memory")
38}
39#else /* CONFIG_40x || CONFIG_8xx */
40extern void _tlbil_all(void);
41extern void _tlbil_pid(unsigned int pid);
42#endif /* !(CONFIG_40x || CONFIG_8xx) */
43
44/*
45 * On 8xx, we directly inline tlbie, on others, it's extern
46 */
47#ifdef CONFIG_8xx
48static inline void _tlbil_va(unsigned long address, unsigned int pid)
49{
50 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory")
51}
52#else /* CONFIG_8xx */
53extern void _tlbil_va(unsigned long address, unsigned int pid);
54#endif /* CONIFG_8xx */
55
56/*
57 * As of today, we don't support tlbivax broadcast on any
58 * implementation. When that becomes the case, this will be
59 * an extern.
60 */
61static inline void _tlbivax_bcast(unsigned long address, unsigned int pid)
62{
63 BUG();
64}
65
66#else /* CONFIG_PPC_MMU_NOHASH */
67
25extern void hash_preload(struct mm_struct *mm, unsigned long ea, 68extern void hash_preload(struct mm_struct *mm, unsigned long ea,
26 unsigned long access, unsigned long trap); 69 unsigned long access, unsigned long trap);
27 70
28 71
72extern void _tlbie(unsigned long address);
73extern void _tlbia(void);
74
75#endif /* CONFIG_PPC_MMU_NOHASH */
76
29#ifdef CONFIG_PPC32 77#ifdef CONFIG_PPC32
30extern void mapin_ram(void); 78extern void mapin_ram(void);
31extern int map_page(unsigned long va, phys_addr_t pa, int flags); 79extern int map_page(unsigned long va, phys_addr_t pa, int flags);
@@ -58,17 +106,14 @@ extern phys_addr_t lowmem_end_addr;
58 * architectures. -- Dan 106 * architectures. -- Dan
59 */ 107 */
60#if defined(CONFIG_8xx) 108#if defined(CONFIG_8xx)
61#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
62#define MMU_init_hw() do { } while(0) 109#define MMU_init_hw() do { } while(0)
63#define mmu_mapin_ram() (0UL) 110#define mmu_mapin_ram() (0UL)
64 111
65#elif defined(CONFIG_4xx) 112#elif defined(CONFIG_4xx)
66#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
67extern void MMU_init_hw(void); 113extern void MMU_init_hw(void);
68extern unsigned long mmu_mapin_ram(void); 114extern unsigned long mmu_mapin_ram(void);
69 115
70#elif defined(CONFIG_FSL_BOOKE) 116#elif defined(CONFIG_FSL_BOOKE)
71#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
72extern void MMU_init_hw(void); 117extern void MMU_init_hw(void);
73extern unsigned long mmu_mapin_ram(void); 118extern unsigned long mmu_mapin_ram(void);
74extern void adjust_total_lowmem(void); 119extern void adjust_total_lowmem(void);
@@ -77,18 +122,4 @@ extern void adjust_total_lowmem(void);
77/* anything 32-bit except 4xx or 8xx */ 122/* anything 32-bit except 4xx or 8xx */
78extern void MMU_init_hw(void); 123extern void MMU_init_hw(void);
79extern unsigned long mmu_mapin_ram(void); 124extern unsigned long mmu_mapin_ram(void);
80
81/* Be careful....this needs to be updated if we ever encounter 603 SMPs,
82 * which includes all new 82xx processors. We need tlbie/tlbsync here
83 * in that case (I think). -- Dan.
84 */
85static inline void flush_HPTE(unsigned context, unsigned long va,
86 unsigned long pdval)
87{
88 if ((Hash != 0) &&
89 cpu_has_feature(CPU_FTR_HPTE_TABLE))
90 flush_hash_pages(0, va, pdval, 1);
91 else
92 _tlbie(va);
93}
94#endif 125#endif
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index a8397bbad3d4..cf81049e1e51 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -901,10 +901,17 @@ static void mark_reserved_regions_for_nid(int nid)
901 if (end_pfn > node_ar.end_pfn) 901 if (end_pfn > node_ar.end_pfn)
902 reserve_size = (node_ar.end_pfn << PAGE_SHIFT) 902 reserve_size = (node_ar.end_pfn << PAGE_SHIFT)
903 - (start_pfn << PAGE_SHIFT); 903 - (start_pfn << PAGE_SHIFT);
904 dbg("reserve_bootmem %lx %lx nid=%d\n", physbase, 904 /*
905 reserve_size, node_ar.nid); 905 * Only worry about *this* node, others may not
906 reserve_bootmem_node(NODE_DATA(node_ar.nid), physbase, 906 * yet have valid NODE_DATA().
907 reserve_size, BOOTMEM_DEFAULT); 907 */
908 if (node_ar.nid == nid) {
909 dbg("reserve_bootmem %lx %lx nid=%d\n",
910 physbase, reserve_size, node_ar.nid);
911 reserve_bootmem_node(NODE_DATA(node_ar.nid),
912 physbase, reserve_size,
913 BOOTMEM_DEFAULT);
914 }
908 /* 915 /*
909 * if reserved region is contained in the active region 916 * if reserved region is contained in the active region
910 * then done. 917 * then done.
@@ -929,7 +936,6 @@ static void mark_reserved_regions_for_nid(int nid)
929void __init do_init_bootmem(void) 936void __init do_init_bootmem(void)
930{ 937{
931 int nid; 938 int nid;
932 unsigned int i;
933 939
934 min_low_pfn = 0; 940 min_low_pfn = 0;
935 max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT; 941 max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
new file mode 100644
index 000000000000..6d94116fdea1
--- /dev/null
+++ b/arch/powerpc/mm/pgtable.c
@@ -0,0 +1,117 @@
1/*
2 * This file contains common routines for dealing with free of page tables
3 *
4 * Derived from arch/powerpc/mm/tlb_64.c:
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
8 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
9 * Copyright (C) 1996 Paul Mackerras
10 *
11 * Derived from "arch/i386/mm/init.c"
12 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
13 *
14 * Dave Engebretsen <engebret@us.ibm.com>
15 * Rework for PPC64 port.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 */
22
23#include <linux/kernel.h>
24#include <linux/mm.h>
25#include <linux/init.h>
26#include <linux/percpu.h>
27#include <linux/hardirq.h>
28#include <asm/pgalloc.h>
29#include <asm/tlbflush.h>
30#include <asm/tlb.h>
31
32static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
33static unsigned long pte_freelist_forced_free;
34
35struct pte_freelist_batch
36{
37 struct rcu_head rcu;
38 unsigned int index;
39 pgtable_free_t tables[0];
40};
41
42#define PTE_FREELIST_SIZE \
43 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
44 / sizeof(pgtable_free_t))
45
46static void pte_free_smp_sync(void *arg)
47{
48 /* Do nothing, just ensure we sync with all CPUs */
49}
50
51/* This is only called when we are critically out of memory
52 * (and fail to get a page in pte_free_tlb).
53 */
54static void pgtable_free_now(pgtable_free_t pgf)
55{
56 pte_freelist_forced_free++;
57
58 smp_call_function(pte_free_smp_sync, NULL, 1);
59
60 pgtable_free(pgf);
61}
62
63static void pte_free_rcu_callback(struct rcu_head *head)
64{
65 struct pte_freelist_batch *batch =
66 container_of(head, struct pte_freelist_batch, rcu);
67 unsigned int i;
68
69 for (i = 0; i < batch->index; i++)
70 pgtable_free(batch->tables[i]);
71
72 free_page((unsigned long)batch);
73}
74
75static void pte_free_submit(struct pte_freelist_batch *batch)
76{
77 INIT_RCU_HEAD(&batch->rcu);
78 call_rcu(&batch->rcu, pte_free_rcu_callback);
79}
80
81void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
82{
83 /* This is safe since tlb_gather_mmu has disabled preemption */
84 cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
85 struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
86
87 if (atomic_read(&tlb->mm->mm_users) < 2 ||
88 cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
89 pgtable_free(pgf);
90 return;
91 }
92
93 if (*batchp == NULL) {
94 *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
95 if (*batchp == NULL) {
96 pgtable_free_now(pgf);
97 return;
98 }
99 (*batchp)->index = 0;
100 }
101 (*batchp)->tables[(*batchp)->index++] = pgf;
102 if ((*batchp)->index == PTE_FREELIST_SIZE) {
103 pte_free_submit(*batchp);
104 *batchp = NULL;
105 }
106}
107
108void pte_free_finish(void)
109{
110 /* This is safe since tlb_gather_mmu has disabled preemption */
111 struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
112
113 if (*batchp == NULL)
114 return;
115 pte_free_submit(*batchp);
116 *batchp = NULL;
117}
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index c31d6d26f0b5..38ff35f2142a 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -48,10 +48,6 @@ EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
48 48
49extern char etext[], _stext[]; 49extern char etext[], _stext[];
50 50
51#ifdef CONFIG_SMP
52extern void hash_page_sync(void);
53#endif
54
55#ifdef HAVE_BATS 51#ifdef HAVE_BATS
56extern phys_addr_t v_mapped_by_bats(unsigned long va); 52extern phys_addr_t v_mapped_by_bats(unsigned long va);
57extern unsigned long p_mapped_by_bats(phys_addr_t pa); 53extern unsigned long p_mapped_by_bats(phys_addr_t pa);
@@ -72,24 +68,29 @@ extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
72#define p_mapped_by_tlbcam(x) (0UL) 68#define p_mapped_by_tlbcam(x) (0UL)
73#endif /* HAVE_TLBCAM */ 69#endif /* HAVE_TLBCAM */
74 70
75#ifdef CONFIG_PTE_64BIT 71#define PGDIR_ORDER (32 + PGD_T_LOG2 - PGDIR_SHIFT)
76/* Some processors use an 8kB pgdir because they have 8-byte Linux PTEs. */
77#define PGDIR_ORDER 1
78#else
79#define PGDIR_ORDER 0
80#endif
81 72
82pgd_t *pgd_alloc(struct mm_struct *mm) 73pgd_t *pgd_alloc(struct mm_struct *mm)
83{ 74{
84 pgd_t *ret; 75 pgd_t *ret;
85 76
86 ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGDIR_ORDER); 77 /* pgdir take page or two with 4K pages and a page fraction otherwise */
78#ifndef CONFIG_PPC_4K_PAGES
79 ret = (pgd_t *)kzalloc(1 << PGDIR_ORDER, GFP_KERNEL);
80#else
81 ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO,
82 PGDIR_ORDER - PAGE_SHIFT);
83#endif
87 return ret; 84 return ret;
88} 85}
89 86
90void pgd_free(struct mm_struct *mm, pgd_t *pgd) 87void pgd_free(struct mm_struct *mm, pgd_t *pgd)
91{ 88{
92 free_pages((unsigned long)pgd, PGDIR_ORDER); 89#ifndef CONFIG_PPC_4K_PAGES
90 kfree((void *)pgd);
91#else
92 free_pages((unsigned long)pgd, PGDIR_ORDER - PAGE_SHIFT);
93#endif
93} 94}
94 95
95__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) 96__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
@@ -125,23 +126,6 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
125 return ptepage; 126 return ptepage;
126} 127}
127 128
128void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
129{
130#ifdef CONFIG_SMP
131 hash_page_sync();
132#endif
133 free_page((unsigned long)pte);
134}
135
136void pte_free(struct mm_struct *mm, pgtable_t ptepage)
137{
138#ifdef CONFIG_SMP
139 hash_page_sync();
140#endif
141 pgtable_page_dtor(ptepage);
142 __free_page(ptepage);
143}
144
145void __iomem * 129void __iomem *
146ioremap(phys_addr_t addr, unsigned long size) 130ioremap(phys_addr_t addr, unsigned long size)
147{ 131{
@@ -194,6 +178,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
194 if (p < 16*1024*1024) 178 if (p < 16*1024*1024)
195 p += _ISA_MEM_BASE; 179 p += _ISA_MEM_BASE;
196 180
181#ifndef CONFIG_CRASH_DUMP
197 /* 182 /*
198 * Don't allow anybody to remap normal RAM that we're using. 183 * Don't allow anybody to remap normal RAM that we're using.
199 * mem_init() sets high_memory so only do the check after that. 184 * mem_init() sets high_memory so only do the check after that.
@@ -203,6 +188,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
203 (unsigned long long)p, __builtin_return_address(0)); 188 (unsigned long long)p, __builtin_return_address(0));
204 return NULL; 189 return NULL;
205 } 190 }
191#endif
206 192
207 if (size == 0) 193 if (size == 0)
208 return NULL; 194 return NULL;
@@ -288,7 +274,7 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
288} 274}
289 275
290/* 276/*
291 * Map in a big chunk of physical memory starting at KERNELBASE. 277 * Map in a big chunk of physical memory starting at PAGE_OFFSET.
292 */ 278 */
293void __init mapin_ram(void) 279void __init mapin_ram(void)
294{ 280{
@@ -297,7 +283,7 @@ void __init mapin_ram(void)
297 int ktext; 283 int ktext;
298 284
299 s = mmu_mapin_ram(); 285 s = mmu_mapin_ram();
300 v = KERNELBASE + s; 286 v = PAGE_OFFSET + s;
301 p = memstart_addr + s; 287 p = memstart_addr + s;
302 for (; s < total_lowmem; s += PAGE_SIZE) { 288 for (; s < total_lowmem; s += PAGE_SIZE) {
303 ktext = ((char *) v >= _stext && (char *) v < etext); 289 ktext = ((char *) v >= _stext && (char *) v < etext);
@@ -363,7 +349,11 @@ static int __change_page_attr(struct page *page, pgprot_t prot)
363 return -EINVAL; 349 return -EINVAL;
364 set_pte_at(&init_mm, address, kpte, mk_pte(page, prot)); 350 set_pte_at(&init_mm, address, kpte, mk_pte(page, prot));
365 wmb(); 351 wmb();
366 flush_HPTE(0, address, pmd_val(*kpmd)); 352#ifdef CONFIG_PPC_STD_MMU
353 flush_hash_pages(0, address, pmd_val(*kpmd), 1);
354#else
355 flush_tlb_page(NULL, address);
356#endif
367 pte_unmap(kpte); 357 pte_unmap(kpte);
368 358
369 return 0; 359 return 0;
@@ -400,7 +390,7 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
400#endif /* CONFIG_DEBUG_PAGEALLOC */ 390#endif /* CONFIG_DEBUG_PAGEALLOC */
401 391
402static int fixmaps; 392static int fixmaps;
403unsigned long FIXADDR_TOP = 0xfffff000; 393unsigned long FIXADDR_TOP = (-PAGE_SIZE);
404EXPORT_SYMBOL(FIXADDR_TOP); 394EXPORT_SYMBOL(FIXADDR_TOP);
405 395
406void __set_fixmap (enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags) 396void __set_fixmap (enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags)
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 6aa120813775..45d925360b89 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -95,16 +95,16 @@ unsigned long __init mmu_mapin_ram(void)
95 break; 95 break;
96 } 96 }
97 97
98 setbat(2, KERNELBASE, 0, bl, _PAGE_RAM); 98 setbat(2, PAGE_OFFSET, 0, bl, _PAGE_RAM);
99 done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1; 99 done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1;
100 if ((done < tot) && !bat_addrs[3].limit) { 100 if ((done < tot) && !bat_addrs[3].limit) {
101 /* use BAT3 to cover a bit more */ 101 /* use BAT3 to cover a bit more */
102 tot -= done; 102 tot -= done;
103 for (bl = 128<<10; bl < max_size; bl <<= 1) 103 for (bl = 128<<10; bl < max_size; bl <<= 1)
104 if (bl * 2 > tot) 104 if (bl * 2 > tot)
105 break; 105 break;
106 setbat(3, KERNELBASE+done, done, bl, _PAGE_RAM); 106 setbat(3, PAGE_OFFSET+done, done, bl, _PAGE_RAM);
107 done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1; 107 done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1;
108 } 108 }
109 109
110 return done; 110 return done;
@@ -192,7 +192,7 @@ void __init MMU_init_hw(void)
192 extern unsigned int hash_page[]; 192 extern unsigned int hash_page[];
193 extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[]; 193 extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
194 194
195 if (!cpu_has_feature(CPU_FTR_HPTE_TABLE)) { 195 if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) {
196 /* 196 /*
197 * Put a blr (procedure return) instruction at the 197 * Put a blr (procedure return) instruction at the
198 * start of hash_page, since we can still get DSI 198 * start of hash_page, since we can still get DSI
diff --git a/arch/powerpc/mm/tlb_32.c b/arch/powerpc/mm/tlb_hash32.c
index f9a47fee3927..65190587a365 100644
--- a/arch/powerpc/mm/tlb_32.c
+++ b/arch/powerpc/mm/tlb_hash32.c
@@ -137,6 +137,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
137 flush_range(&init_mm, start, end); 137 flush_range(&init_mm, start, end);
138 FINISH_FLUSH; 138 FINISH_FLUSH;
139} 139}
140EXPORT_SYMBOL(flush_tlb_kernel_range);
140 141
141/* 142/*
142 * Flush all the (user) entries for the address space described by mm. 143 * Flush all the (user) entries for the address space described by mm.
@@ -160,6 +161,7 @@ void flush_tlb_mm(struct mm_struct *mm)
160 flush_range(mp->vm_mm, mp->vm_start, mp->vm_end); 161 flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
161 FINISH_FLUSH; 162 FINISH_FLUSH;
162} 163}
164EXPORT_SYMBOL(flush_tlb_mm);
163 165
164void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) 166void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
165{ 167{
@@ -176,6 +178,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
176 flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1); 178 flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1);
177 FINISH_FLUSH; 179 FINISH_FLUSH;
178} 180}
181EXPORT_SYMBOL(flush_tlb_page);
179 182
180/* 183/*
181 * For each address in the range, find the pte for the address 184 * For each address in the range, find the pte for the address
@@ -188,3 +191,4 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
188 flush_range(vma->vm_mm, start, end); 191 flush_range(vma->vm_mm, start, end);
189 FINISH_FLUSH; 192 FINISH_FLUSH;
190} 193}
194EXPORT_SYMBOL(flush_tlb_range);
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_hash64.c
index be7dd422c0fa..c931bc7d1079 100644
--- a/arch/powerpc/mm/tlb_64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -37,81 +37,6 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
37 * arch/powerpc/include/asm/tlb.h file -- tgall 37 * arch/powerpc/include/asm/tlb.h file -- tgall
38 */ 38 */
39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
40static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
41static unsigned long pte_freelist_forced_free;
42
43struct pte_freelist_batch
44{
45 struct rcu_head rcu;
46 unsigned int index;
47 pgtable_free_t tables[0];
48};
49
50#define PTE_FREELIST_SIZE \
51 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
52 / sizeof(pgtable_free_t))
53
54static void pte_free_smp_sync(void *arg)
55{
56 /* Do nothing, just ensure we sync with all CPUs */
57}
58
59/* This is only called when we are critically out of memory
60 * (and fail to get a page in pte_free_tlb).
61 */
62static void pgtable_free_now(pgtable_free_t pgf)
63{
64 pte_freelist_forced_free++;
65
66 smp_call_function(pte_free_smp_sync, NULL, 1);
67
68 pgtable_free(pgf);
69}
70
71static void pte_free_rcu_callback(struct rcu_head *head)
72{
73 struct pte_freelist_batch *batch =
74 container_of(head, struct pte_freelist_batch, rcu);
75 unsigned int i;
76
77 for (i = 0; i < batch->index; i++)
78 pgtable_free(batch->tables[i]);
79
80 free_page((unsigned long)batch);
81}
82
83static void pte_free_submit(struct pte_freelist_batch *batch)
84{
85 INIT_RCU_HEAD(&batch->rcu);
86 call_rcu(&batch->rcu, pte_free_rcu_callback);
87}
88
89void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
90{
91 /* This is safe since tlb_gather_mmu has disabled preemption */
92 cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
93 struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
94
95 if (atomic_read(&tlb->mm->mm_users) < 2 ||
96 cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
97 pgtable_free(pgf);
98 return;
99 }
100
101 if (*batchp == NULL) {
102 *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
103 if (*batchp == NULL) {
104 pgtable_free_now(pgf);
105 return;
106 }
107 (*batchp)->index = 0;
108 }
109 (*batchp)->tables[(*batchp)->index++] = pgf;
110 if ((*batchp)->index == PTE_FREELIST_SIZE) {
111 pte_free_submit(*batchp);
112 *batchp = NULL;
113 }
114}
115 40
116/* 41/*
117 * A linux PTE was changed and the corresponding hash table entry 42 * A linux PTE was changed and the corresponding hash table entry
@@ -229,17 +154,6 @@ void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
229 batch->index = 0; 154 batch->index = 0;
230} 155}
231 156
232void pte_free_finish(void)
233{
234 /* This is safe since tlb_gather_mmu has disabled preemption */
235 struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
236
237 if (*batchp == NULL)
238 return;
239 pte_free_submit(*batchp);
240 *batchp = NULL;
241}
242
243/** 157/**
244 * __flush_hash_table_range - Flush all HPTEs for a given address range 158 * __flush_hash_table_range - Flush all HPTEs for a given address range
245 * from the hash table (and the TLB). But keeps 159 * from the hash table (and the TLB). But keeps
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
new file mode 100644
index 000000000000..803a64c02b06
--- /dev/null
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -0,0 +1,209 @@
1/*
2 * This file contains the routines for TLB flushing.
3 * On machines where the MMU does not use a hash table to store virtual to
4 * physical translations (ie, SW loaded TLBs or Book3E compilant processors,
5 * this does -not- include 603 however which shares the implementation with
6 * hash based processors)
7 *
8 * -- BenH
9 *
10 * Copyright 2008 Ben Herrenschmidt <benh@kernel.crashing.org>
11 * IBM Corp.
12 *
13 * Derived from arch/ppc/mm/init.c:
14 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
15 *
16 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
17 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
18 * Copyright (C) 1996 Paul Mackerras
19 *
20 * Derived from "arch/i386/mm/init.c"
21 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
22 *
23 * This program is free software; you can redistribute it and/or
24 * modify it under the terms of the GNU General Public License
25 * as published by the Free Software Foundation; either version
26 * 2 of the License, or (at your option) any later version.
27 *
28 */
29
30#include <linux/kernel.h>
31#include <linux/mm.h>
32#include <linux/init.h>
33#include <linux/highmem.h>
34#include <linux/pagemap.h>
35#include <linux/preempt.h>
36#include <linux/spinlock.h>
37
38#include <asm/tlbflush.h>
39#include <asm/tlb.h>
40
41#include "mmu_decl.h"
42
43/*
44 * Base TLB flushing operations:
45 *
46 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
47 * - flush_tlb_page(vma, vmaddr) flushes one page
48 * - flush_tlb_range(vma, start, end) flushes a range of pages
49 * - flush_tlb_kernel_range(start, end) flushes kernel pages
50 *
51 * - local_* variants of page and mm only apply to the current
52 * processor
53 */
54
55/*
56 * These are the base non-SMP variants of page and mm flushing
57 */
58void local_flush_tlb_mm(struct mm_struct *mm)
59{
60 unsigned int pid;
61
62 preempt_disable();
63 pid = mm->context.id;
64 if (pid != MMU_NO_CONTEXT)
65 _tlbil_pid(pid);
66 preempt_enable();
67}
68EXPORT_SYMBOL(local_flush_tlb_mm);
69
70void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
71{
72 unsigned int pid;
73
74 preempt_disable();
75 pid = vma ? vma->vm_mm->context.id : 0;
76 if (pid != MMU_NO_CONTEXT)
77 _tlbil_va(vmaddr, pid);
78 preempt_enable();
79}
80EXPORT_SYMBOL(local_flush_tlb_page);
81
82
83/*
84 * And here are the SMP non-local implementations
85 */
86#ifdef CONFIG_SMP
87
88static DEFINE_SPINLOCK(tlbivax_lock);
89
90struct tlb_flush_param {
91 unsigned long addr;
92 unsigned int pid;
93};
94
95static void do_flush_tlb_mm_ipi(void *param)
96{
97 struct tlb_flush_param *p = param;
98
99 _tlbil_pid(p ? p->pid : 0);
100}
101
102static void do_flush_tlb_page_ipi(void *param)
103{
104 struct tlb_flush_param *p = param;
105
106 _tlbil_va(p->addr, p->pid);
107}
108
109
110/* Note on invalidations and PID:
111 *
112 * We snapshot the PID with preempt disabled. At this point, it can still
113 * change either because:
114 * - our context is being stolen (PID -> NO_CONTEXT) on another CPU
115 * - we are invaliating some target that isn't currently running here
116 * and is concurrently acquiring a new PID on another CPU
117 * - some other CPU is re-acquiring a lost PID for this mm
118 * etc...
119 *
120 * However, this shouldn't be a problem as we only guarantee
121 * invalidation of TLB entries present prior to this call, so we
122 * don't care about the PID changing, and invalidating a stale PID
123 * is generally harmless.
124 */
125
126void flush_tlb_mm(struct mm_struct *mm)
127{
128 cpumask_t cpu_mask;
129 unsigned int pid;
130
131 preempt_disable();
132 pid = mm->context.id;
133 if (unlikely(pid == MMU_NO_CONTEXT))
134 goto no_context;
135 cpu_mask = mm->cpu_vm_mask;
136 cpu_clear(smp_processor_id(), cpu_mask);
137 if (!cpus_empty(cpu_mask)) {
138 struct tlb_flush_param p = { .pid = pid };
139 smp_call_function_mask(cpu_mask, do_flush_tlb_mm_ipi, &p, 1);
140 }
141 _tlbil_pid(pid);
142 no_context:
143 preempt_enable();
144}
145EXPORT_SYMBOL(flush_tlb_mm);
146
147void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
148{
149 cpumask_t cpu_mask;
150 unsigned int pid;
151
152 preempt_disable();
153 pid = vma ? vma->vm_mm->context.id : 0;
154 if (unlikely(pid == MMU_NO_CONTEXT))
155 goto bail;
156 cpu_mask = vma->vm_mm->cpu_vm_mask;
157 cpu_clear(smp_processor_id(), cpu_mask);
158 if (!cpus_empty(cpu_mask)) {
159 /* If broadcast tlbivax is supported, use it */
160 if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) {
161 int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL);
162 if (lock)
163 spin_lock(&tlbivax_lock);
164 _tlbivax_bcast(vmaddr, pid);
165 if (lock)
166 spin_unlock(&tlbivax_lock);
167 goto bail;
168 } else {
169 struct tlb_flush_param p = { .pid = pid, .addr = vmaddr };
170 smp_call_function_mask(cpu_mask,
171 do_flush_tlb_page_ipi, &p, 1);
172 }
173 }
174 _tlbil_va(vmaddr, pid);
175 bail:
176 preempt_enable();
177}
178EXPORT_SYMBOL(flush_tlb_page);
179
180#endif /* CONFIG_SMP */
181
182/*
183 * Flush kernel TLB entries in the given range
184 */
185void flush_tlb_kernel_range(unsigned long start, unsigned long end)
186{
187#ifdef CONFIG_SMP
188 preempt_disable();
189 smp_call_function(do_flush_tlb_mm_ipi, NULL, 1);
190 _tlbil_pid(0);
191 preempt_enable();
192#endif
193 _tlbil_pid(0);
194}
195EXPORT_SYMBOL(flush_tlb_kernel_range);
196
197/*
198 * Currently, for range flushing, we just do a full mm flush. This should
199 * be optimized based on a threshold on the size of the range, since
200 * some implementation can stack multiple tlbivax before a tlbsync but
201 * for now, we keep it that way
202 */
203void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
204 unsigned long end)
205
206{
207 flush_tlb_mm(vma->vm_mm);
208}
209EXPORT_SYMBOL(flush_tlb_range);
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
new file mode 100644
index 000000000000..f900a39e6ec4
--- /dev/null
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -0,0 +1,166 @@
1/*
2 * This file contains low-level functions for performing various
3 * types of TLB invalidations on various processors with no hash
4 * table.
5 *
6 * This file implements the following functions for all no-hash
7 * processors. Some aren't implemented for some variants. Some
8 * are inline in tlbflush.h
9 *
10 * - tlbil_va
11 * - tlbil_pid
12 * - tlbil_all
13 * - tlbivax_bcast (not yet)
14 *
15 * Code mostly moved over from misc_32.S
16 *
17 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
18 *
19 * Partially rewritten by Cort Dougan (cort@cs.nmt.edu)
20 * Paul Mackerras, Kumar Gala and Benjamin Herrenschmidt.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 *
27 */
28
29#include <asm/reg.h>
30#include <asm/page.h>
31#include <asm/cputable.h>
32#include <asm/mmu.h>
33#include <asm/ppc_asm.h>
34#include <asm/asm-offsets.h>
35#include <asm/processor.h>
36
37#if defined(CONFIG_40x)
38
39/*
40 * 40x implementation needs only tlbil_va
41 */
42_GLOBAL(_tlbil_va)
43 /* We run the search with interrupts disabled because we have to change
44 * the PID and I don't want to preempt when that happens.
45 */
46 mfmsr r5
47 mfspr r6,SPRN_PID
48 wrteei 0
49 mtspr SPRN_PID,r4
50 tlbsx. r3, 0, r3
51 mtspr SPRN_PID,r6
52 wrtee r5
53 bne 1f
54 sync
55 /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is
56 * clear. Since 25 is the V bit in the TLB_TAG, loading this value
57 * will invalidate the TLB entry. */
58 tlbwe r3, r3, TLB_TAG
59 isync
601: blr
61
62#elif defined(CONFIG_8xx)
63
64/*
65 * Nothing to do for 8xx, everything is inline
66 */
67
68#elif defined(CONFIG_44x)
69
70/*
71 * 440 implementation uses tlbsx/we for tlbil_va and a full sweep
72 * of the TLB for everything else.
73 */
74_GLOBAL(_tlbil_va)
75 mfspr r5,SPRN_MMUCR
76 rlwimi r5,r4,0,24,31 /* Set TID */
77
78 /* We have to run the search with interrupts disabled, otherwise
79 * an interrupt which causes a TLB miss can clobber the MMUCR
80 * between the mtspr and the tlbsx.
81 *
82 * Critical and Machine Check interrupts take care of saving
83 * and restoring MMUCR, so only normal interrupts have to be
84 * taken care of.
85 */
86 mfmsr r4
87 wrteei 0
88 mtspr SPRN_MMUCR,r5
89 tlbsx. r3, 0, r3
90 wrtee r4
91 bne 1f
92 sync
93 /* There are only 64 TLB entries, so r3 < 64,
94 * which means bit 22, is clear. Since 22 is
95 * the V bit in the TLB_PAGEID, loading this
96 * value will invalidate the TLB entry.
97 */
98 tlbwe r3, r3, PPC44x_TLB_PAGEID
99 isync
1001: blr
101
102_GLOBAL(_tlbil_all)
103_GLOBAL(_tlbil_pid)
104 li r3,0
105 sync
106
107 /* Load high watermark */
108 lis r4,tlb_44x_hwater@ha
109 lwz r5,tlb_44x_hwater@l(r4)
110
1111: tlbwe r3,r3,PPC44x_TLB_PAGEID
112 addi r3,r3,1
113 cmpw 0,r3,r5
114 ble 1b
115
116 isync
117 blr
118
119#elif defined(CONFIG_FSL_BOOKE)
120/*
121 * FSL BookE implementations. Currently _pid and _all are the
122 * same. This will change when tlbilx is actually supported and
123 * performs invalidate-by-PID. This change will be driven by
124 * mmu_features conditional
125 */
126
127/*
128 * Flush MMU TLB on the local processor
129 */
130_GLOBAL(_tlbil_pid)
131_GLOBAL(_tlbil_all)
132#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
133 MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
134 li r3,(MMUCSR0_TLBFI)@l
135 mtspr SPRN_MMUCSR0, r3
1361:
137 mfspr r3,SPRN_MMUCSR0
138 andi. r3,r3,MMUCSR0_TLBFI@l
139 bne 1b
140 msync
141 isync
142 blr
143
144/*
145 * Flush MMU TLB for a particular address, but only on the local processor
146 * (no broadcast)
147 */
148_GLOBAL(_tlbil_va)
149 mfmsr r10
150 wrteei 0
151 slwi r4,r4,16
152 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
153 tlbsx 0,r3
154 mfspr r4,SPRN_MAS1 /* check valid */
155 andis. r3,r4,MAS1_VALID@h
156 beq 1f
157 rlwinm r4,r4,0,1,31
158 mtspr SPRN_MAS1,r4
159 tlbwe
160 msync
161 isync
1621: wrtee r10
163 blr
164#elif
165#error Unsupported processor type !
166#endif
diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c
index ae2e7f67c18e..4058fd1e7fc7 100644
--- a/arch/powerpc/platforms/40x/ep405.c
+++ b/arch/powerpc/platforms/40x/ep405.c
@@ -100,7 +100,7 @@ static void __init ep405_setup_arch(void)
100 /* Find & init the BCSR CPLD */ 100 /* Find & init the BCSR CPLD */
101 ep405_init_bcsr(); 101 ep405_init_bcsr();
102 102
103 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; 103 ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
104} 104}
105 105
106static int __init ep405_probe(void) 106static int __init ep405_probe(void)
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c
index 1dd24ffc0dc1..fd7d934dac8b 100644
--- a/arch/powerpc/platforms/40x/kilauea.c
+++ b/arch/powerpc/platforms/40x/kilauea.c
@@ -44,7 +44,7 @@ static int __init kilauea_probe(void)
44 if (!of_flat_dt_is_compatible(root, "amcc,kilauea")) 44 if (!of_flat_dt_is_compatible(root, "amcc,kilauea"))
45 return 0; 45 return 0;
46 46
47 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; 47 ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
48 48
49 return 1; 49 return 1;
50} 50}
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
index 4498a86b46c3..f40ac9b8f99f 100644
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -61,7 +61,7 @@ static int __init ppc40x_probe(void)
61 61
62 for (i = 0; i < ARRAY_SIZE(board); i++) { 62 for (i = 0; i < ARRAY_SIZE(board); i++) {
63 if (of_flat_dt_is_compatible(root, board[i])) { 63 if (of_flat_dt_is_compatible(root, board[i])) {
64 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; 64 ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
65 return 1; 65 return 1;
66 } 66 }
67 } 67 }
diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c
index a0e8fe4662f6..88b9117fa691 100644
--- a/arch/powerpc/platforms/44x/ebony.c
+++ b/arch/powerpc/platforms/44x/ebony.c
@@ -54,7 +54,7 @@ static int __init ebony_probe(void)
54 if (!of_flat_dt_is_compatible(root, "ibm,ebony")) 54 if (!of_flat_dt_is_compatible(root, "ibm,ebony"))
55 return 0; 55 return 0;
56 56
57 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; 57 ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
58 58
59 return 1; 59 return 1;
60} 60}
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c
index 29671262801f..76fdc51dac8b 100644
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
@@ -69,7 +69,7 @@ static int __init ppc44x_probe(void)
69 69
70 for (i = 0; i < ARRAY_SIZE(board); i++) { 70 for (i = 0; i < ARRAY_SIZE(board); i++) {
71 if (of_flat_dt_is_compatible(root, board[i])) { 71 if (of_flat_dt_is_compatible(root, board[i])) {
72 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; 72 ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
73 return 1; 73 return 1;
74 } 74 }
75 } 75 }
diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c
index 47f10e647735..a78e8eb6da41 100644
--- a/arch/powerpc/platforms/44x/sam440ep.c
+++ b/arch/powerpc/platforms/44x/sam440ep.c
@@ -51,7 +51,7 @@ static int __init sam440ep_probe(void)
51 if (!of_flat_dt_is_compatible(root, "acube,sam440ep")) 51 if (!of_flat_dt_is_compatible(root, "acube,sam440ep"))
52 return 0; 52 return 0;
53 53
54 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; 54 ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
55 55
56 return 1; 56 return 1;
57} 57}
diff --git a/arch/powerpc/platforms/52xx/lite5200_pm.c b/arch/powerpc/platforms/52xx/lite5200_pm.c
index fe92e65103ed..b5c753db125e 100644
--- a/arch/powerpc/platforms/52xx/lite5200_pm.c
+++ b/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -3,7 +3,6 @@
3#include <asm/io.h> 3#include <asm/io.h>
4#include <asm/time.h> 4#include <asm/time.h>
5#include <asm/mpc52xx.h> 5#include <asm/mpc52xx.h>
6#include "mpc52xx_pic.h"
7 6
8/* defined in lite5200_sleep.S and only used here */ 7/* defined in lite5200_sleep.S and only used here */
9extern void lite5200_low_power(void __iomem *sram, void __iomem *mbar); 8extern void lite5200_low_power(void __iomem *sram, void __iomem *mbar);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index b49a18527661..c3f2c21024e3 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -375,7 +375,7 @@ mpc52xx_add_bridge(struct device_node *node)
375 375
376 pr_debug("Adding MPC52xx PCI host bridge %s\n", node->full_name); 376 pr_debug("Adding MPC52xx PCI host bridge %s\n", node->full_name);
377 377
378 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 378 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
379 379
380 if (of_address_to_resource(node, 0, &rsrc) != 0) { 380 if (of_address_to_resource(node, 0, &rsrc) != 0) {
381 printk(KERN_ERR "Can't get %s resources\n", node->full_name); 381 printk(KERN_ERR "Can't get %s resources\n", node->full_name);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8479394e9ab4..72865e8e4b51 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -2,20 +2,100 @@
2 * 2 *
3 * Programmable Interrupt Controller functions for the Freescale MPC52xx. 3 * Programmable Interrupt Controller functions for the Freescale MPC52xx.
4 * 4 *
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
5 * Copyright (C) 2006 bplan GmbH 6 * Copyright (C) 2006 bplan GmbH
7 * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
8 * Copyright (C) 2003 Montavista Software, Inc
6 * 9 *
7 * Based on the code from the 2.4 kernel by 10 * Based on the code from the 2.4 kernel by
8 * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg. 11 * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
9 * 12 *
10 * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
11 * Copyright (C) 2003 Montavista Software, Inc
12 *
13 * This file is licensed under the terms of the GNU General Public License 13 * This file is licensed under the terms of the GNU General Public License
14 * version 2. This program is licensed "as is" without any warranty of any 14 * version 2. This program is licensed "as is" without any warranty of any
15 * kind, whether express or implied. 15 * kind, whether express or implied.
16 * 16 *
17 */ 17 */
18 18
19/*
20 * This is the device driver for the MPC5200 interrupt controller.
21 *
22 * hardware overview
23 * -----------------
24 * The MPC5200 interrupt controller groups the all interrupt sources into
25 * three groups called 'critical', 'main', and 'peripheral'. The critical
26 * group has 3 irqs, External IRQ0, slice timer 0 irq, and wake from deep
27 * sleep. Main group include the other 3 external IRQs, slice timer 1, RTC,
28 * gpios, and the general purpose timers. Peripheral group contains the
29 * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
30 * USB, DMA, etc).
31 *
32 * virqs
33 * -----
34 * The Linux IRQ subsystem requires that each irq source be assigned a
35 * system wide unique IRQ number starting at 1 (0 means no irq). Since
36 * systems can have multiple interrupt controllers, the virtual IRQ (virq)
37 * infrastructure lets each interrupt controller to define a local set
38 * of IRQ numbers and the virq infrastructure maps those numbers into
39 * a unique range of the global IRQ# space.
40 *
41 * To define a range of virq numbers for this controller, this driver first
42 * assigns a number to each of the irq groups (called the level 1 or L1
43 * value). Within each group individual irq sources are also assigned a
44 * number, as defined by the MPC5200 user guide, and refers to it as the
45 * level 2 or L2 value. The virq number is determined by shifting up the
46 * L1 value by MPC52xx_IRQ_L1_OFFSET and ORing it with the L2 value.
47 *
48 * For example, the TMR0 interrupt is irq 9 in the main group. The
49 * virq for TMR0 is calculated by ((1 << MPC52xx_IRQ_L1_OFFSET) | 9).
50 *
51 * The observant reader will also notice that this driver defines a 4th
52 * interrupt group called 'bestcomm'. The bestcomm group isn't physically
53 * part of the MPC5200 interrupt controller, but it is used here to assign
54 * a separate virq number for each bestcomm task (since any of the 16
55 * bestcomm tasks can cause the bestcomm interrupt to be raised). When a
56 * bestcomm interrupt occurs (peripheral group, irq 0) this driver determines
57 * which task needs servicing and returns the irq number for that task. This
58 * allows drivers which use bestcomm to define their own interrupt handlers.
59 *
60 * irq_chip structures
61 * -------------------
62 * For actually manipulating IRQs (masking, enabling, clearing, etc) this
63 * driver defines four separate 'irq_chip' structures, one for the main
64 * group, one for the peripherals group, one for the bestcomm group and one
65 * for external interrupts. The irq_chip structures provide the hooks needed
66 * to manipulate each IRQ source, and since each group is has a separate set
67 * of registers for controlling the irq, it makes sense to divide up the
68 * hooks along those lines.
69 *
70 * You'll notice that there is not an irq_chip for the critical group and
71 * you'll also notice that there is an irq_chip defined for external
72 * interrupts even though there is no external interrupt group. The reason
73 * for this is that the four external interrupts are all managed with the same
74 * register even though one of the external IRQs is in the critical group and
75 * the other three are in the main group. For this reason it makes sense for
76 * the 4 external irqs to be managed using a separate set of hooks. The
77 * reason there is no crit irq_chip is that of the 3 irqs in the critical
78 * group, only external interrupt is actually support at this time by this
79 * driver and since external interrupt is the only one used, it can just
80 * be directed to make use of the external irq irq_chip.
81 *
82 * device tree bindings
83 * --------------------
84 * The device tree bindings for this controller reflect the two level
85 * organization of irqs in the device. #interrupt-cells = <3> where the
86 * first cell is the group number [0..3], the second cell is the irq
87 * number in the group, and the third cell is the sense type (level/edge).
88 * For reference, the following is a list of the interrupt property values
89 * associated with external interrupt sources on the MPC5200 (just because
90 * it is non-obvious to determine what the interrupts property should be
91 * when reading the mpc5200 manual and it is a frequently asked question).
92 *
93 * External interrupts:
94 * <0 0 n> external irq0, n is sense (n=0: level high,
95 * <1 1 n> external irq1, n is sense n=1: edge rising,
96 * <1 2 n> external irq2, n is sense n=2: edge falling,
97 * <1 3 n> external irq3, n is sense n=3: level low)
98 */
19#undef DEBUG 99#undef DEBUG
20 100
21#include <linux/interrupt.h> 101#include <linux/interrupt.h>
@@ -24,11 +104,19 @@
24#include <asm/io.h> 104#include <asm/io.h>
25#include <asm/prom.h> 105#include <asm/prom.h>
26#include <asm/mpc52xx.h> 106#include <asm/mpc52xx.h>
27#include "mpc52xx_pic.h"
28 107
29/* 108/* HW IRQ mapping */
30 * 109#define MPC52xx_IRQ_L1_CRIT (0)
31*/ 110#define MPC52xx_IRQ_L1_MAIN (1)
111#define MPC52xx_IRQ_L1_PERP (2)
112#define MPC52xx_IRQ_L1_SDMA (3)
113
114#define MPC52xx_IRQ_L1_OFFSET (6)
115#define MPC52xx_IRQ_L1_MASK (0x00c0)
116#define MPC52xx_IRQ_L2_MASK (0x003f)
117
118#define MPC52xx_IRQ_HIGHTESTHWIRQ (0xd0)
119
32 120
33/* MPC5200 device tree match tables */ 121/* MPC5200 device tree match tables */
34static struct of_device_id mpc52xx_pic_ids[] __initdata = { 122static struct of_device_id mpc52xx_pic_ids[] __initdata = {
@@ -53,10 +141,7 @@ static unsigned char mpc52xx_map_senses[4] = {
53 IRQ_TYPE_LEVEL_LOW, 141 IRQ_TYPE_LEVEL_LOW,
54}; 142};
55 143
56/* 144/* Utility functions */
57 *
58*/
59
60static inline void io_be_setbit(u32 __iomem *addr, int bitno) 145static inline void io_be_setbit(u32 __iomem *addr, int bitno)
61{ 146{
62 out_be32(addr, in_be32(addr) | (1 << bitno)); 147 out_be32(addr, in_be32(addr) | (1 << bitno));
@@ -69,15 +154,14 @@ static inline void io_be_clrbit(u32 __iomem *addr, int bitno)
69 154
70/* 155/*
71 * IRQ[0-3] interrupt irq_chip 156 * IRQ[0-3] interrupt irq_chip
72*/ 157 */
73
74static void mpc52xx_extirq_mask(unsigned int virq) 158static void mpc52xx_extirq_mask(unsigned int virq)
75{ 159{
76 int irq; 160 int irq;
77 int l2irq; 161 int l2irq;
78 162
79 irq = irq_map[virq].hwirq; 163 irq = irq_map[virq].hwirq;
80 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 164 l2irq = irq & MPC52xx_IRQ_L2_MASK;
81 165
82 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 166 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
83 167
@@ -90,7 +174,7 @@ static void mpc52xx_extirq_unmask(unsigned int virq)
90 int l2irq; 174 int l2irq;
91 175
92 irq = irq_map[virq].hwirq; 176 irq = irq_map[virq].hwirq;
93 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 177 l2irq = irq & MPC52xx_IRQ_L2_MASK;
94 178
95 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 179 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
96 180
@@ -103,7 +187,7 @@ static void mpc52xx_extirq_ack(unsigned int virq)
103 int l2irq; 187 int l2irq;
104 188
105 irq = irq_map[virq].hwirq; 189 irq = irq_map[virq].hwirq;
106 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 190 l2irq = irq & MPC52xx_IRQ_L2_MASK;
107 191
108 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 192 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
109 193
@@ -117,7 +201,7 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
117 int l2irq; 201 int l2irq;
118 202
119 irq = irq_map[virq].hwirq; 203 irq = irq_map[virq].hwirq;
120 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 204 l2irq = irq & MPC52xx_IRQ_L2_MASK;
121 205
122 pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type); 206 pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
123 207
@@ -156,15 +240,14 @@ static struct irq_chip mpc52xx_extirq_irqchip = {
156 240
157/* 241/*
158 * Main interrupt irq_chip 242 * Main interrupt irq_chip
159*/ 243 */
160
161static void mpc52xx_main_mask(unsigned int virq) 244static void mpc52xx_main_mask(unsigned int virq)
162{ 245{
163 int irq; 246 int irq;
164 int l2irq; 247 int l2irq;
165 248
166 irq = irq_map[virq].hwirq; 249 irq = irq_map[virq].hwirq;
167 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 250 l2irq = irq & MPC52xx_IRQ_L2_MASK;
168 251
169 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 252 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
170 253
@@ -177,7 +260,7 @@ static void mpc52xx_main_unmask(unsigned int virq)
177 int l2irq; 260 int l2irq;
178 261
179 irq = irq_map[virq].hwirq; 262 irq = irq_map[virq].hwirq;
180 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 263 l2irq = irq & MPC52xx_IRQ_L2_MASK;
181 264
182 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 265 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
183 266
@@ -193,15 +276,14 @@ static struct irq_chip mpc52xx_main_irqchip = {
193 276
194/* 277/*
195 * Peripherals interrupt irq_chip 278 * Peripherals interrupt irq_chip
196*/ 279 */
197
198static void mpc52xx_periph_mask(unsigned int virq) 280static void mpc52xx_periph_mask(unsigned int virq)
199{ 281{
200 int irq; 282 int irq;
201 int l2irq; 283 int l2irq;
202 284
203 irq = irq_map[virq].hwirq; 285 irq = irq_map[virq].hwirq;
204 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 286 l2irq = irq & MPC52xx_IRQ_L2_MASK;
205 287
206 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 288 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
207 289
@@ -214,7 +296,7 @@ static void mpc52xx_periph_unmask(unsigned int virq)
214 int l2irq; 296 int l2irq;
215 297
216 irq = irq_map[virq].hwirq; 298 irq = irq_map[virq].hwirq;
217 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 299 l2irq = irq & MPC52xx_IRQ_L2_MASK;
218 300
219 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 301 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
220 302
@@ -230,15 +312,14 @@ static struct irq_chip mpc52xx_periph_irqchip = {
230 312
231/* 313/*
232 * SDMA interrupt irq_chip 314 * SDMA interrupt irq_chip
233*/ 315 */
234
235static void mpc52xx_sdma_mask(unsigned int virq) 316static void mpc52xx_sdma_mask(unsigned int virq)
236{ 317{
237 int irq; 318 int irq;
238 int l2irq; 319 int l2irq;
239 320
240 irq = irq_map[virq].hwirq; 321 irq = irq_map[virq].hwirq;
241 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 322 l2irq = irq & MPC52xx_IRQ_L2_MASK;
242 323
243 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 324 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
244 325
@@ -251,7 +332,7 @@ static void mpc52xx_sdma_unmask(unsigned int virq)
251 int l2irq; 332 int l2irq;
252 333
253 irq = irq_map[virq].hwirq; 334 irq = irq_map[virq].hwirq;
254 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 335 l2irq = irq & MPC52xx_IRQ_L2_MASK;
255 336
256 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 337 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
257 338
@@ -264,7 +345,7 @@ static void mpc52xx_sdma_ack(unsigned int virq)
264 int l2irq; 345 int l2irq;
265 346
266 irq = irq_map[virq].hwirq; 347 irq = irq_map[virq].hwirq;
267 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 348 l2irq = irq & MPC52xx_IRQ_L2_MASK;
268 349
269 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); 350 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
270 351
@@ -278,13 +359,12 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
278 .ack = mpc52xx_sdma_ack, 359 .ack = mpc52xx_sdma_ack,
279}; 360};
280 361
281/* 362/**
282 * irq_host 363 * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
283*/ 364 */
284
285static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, 365static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
286 u32 * intspec, unsigned int intsize, 366 u32 *intspec, unsigned int intsize,
287 irq_hw_number_t * out_hwirq, 367 irq_hw_number_t *out_hwirq,
288 unsigned int *out_flags) 368 unsigned int *out_flags)
289{ 369{
290 int intrvect_l1; 370 int intrvect_l1;
@@ -299,10 +379,9 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
299 intrvect_l2 = (int)intspec[1]; 379 intrvect_l2 = (int)intspec[1];
300 intrvect_type = (int)intspec[2]; 380 intrvect_type = (int)intspec[2];
301 381
302 intrvect_linux = 382 intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) &
303 (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & MPC52xx_IRQ_L1_MASK; 383 MPC52xx_IRQ_L1_MASK;
304 intrvect_linux |= 384 intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK;
305 (intrvect_l2 << MPC52xx_IRQ_L2_OFFSET) & MPC52xx_IRQ_L2_MASK;
306 385
307 pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1, 386 pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
308 intrvect_l2); 387 intrvect_l2);
@@ -313,11 +392,11 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
313 return 0; 392 return 0;
314} 393}
315 394
316/* 395/**
317 * this function retrieves the correct IRQ type out 396 * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge)
318 * of the MPC regs 397 *
319 * Only externals IRQs needs this 398 * Only external IRQs need this.
320*/ 399 */
321static int mpc52xx_irqx_gettype(int irq) 400static int mpc52xx_irqx_gettype(int irq)
322{ 401{
323 int type; 402 int type;
@@ -329,6 +408,9 @@ static int mpc52xx_irqx_gettype(int irq)
329 return mpc52xx_map_senses[type]; 408 return mpc52xx_map_senses[type];
330} 409}
331 410
411/**
412 * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
413 */
332static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, 414static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
333 irq_hw_number_t irq) 415 irq_hw_number_t irq)
334{ 416{
@@ -339,7 +421,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
339 int type; 421 int type;
340 422
341 l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET; 423 l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
342 l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; 424 l2irq = irq & MPC52xx_IRQ_L2_MASK;
343 425
344 /* 426 /*
345 * Most of ours IRQs will be level low 427 * Most of ours IRQs will be level low
@@ -379,8 +461,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
379 break; 461 break;
380 462
381 default: 463 default:
382 pr_debug("%s: Error, unknown L1 IRQ (0x%x)\n", __func__, l1irq); 464 pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq);
383 printk(KERN_ERR "Unknow IRQ!\n");
384 return -EINVAL; 465 return -EINVAL;
385 } 466 }
386 467
@@ -406,10 +487,15 @@ static struct irq_host_ops mpc52xx_irqhost_ops = {
406 .map = mpc52xx_irqhost_map, 487 .map = mpc52xx_irqhost_map,
407}; 488};
408 489
409/* 490/**
410 * init (public) 491 * mpc52xx_init_irq - Initialize and register with the virq subsystem
411*/ 492 *
412 493 * Hook for setting up IRQs on an mpc5200 system. A pointer to this function
494 * is to be put into the machine definition structure.
495 *
496 * This function searches the device tree for an MPC5200 interrupt controller,
497 * initializes it, and registers it with the virq subsystem.
498 */
413void __init mpc52xx_init_irq(void) 499void __init mpc52xx_init_irq(void)
414{ 500{
415 u32 intr_ctrl; 501 u32 intr_ctrl;
@@ -454,7 +540,6 @@ void __init mpc52xx_init_irq(void)
454 * As last step, add an irq host to translate the real 540 * As last step, add an irq host to translate the real
455 * hw irq information provided by the ofw to linux virq 541 * hw irq information provided by the ofw to linux virq
456 */ 542 */
457
458 mpc52xx_irqhost = irq_alloc_host(picnode, IRQ_HOST_MAP_LINEAR, 543 mpc52xx_irqhost = irq_alloc_host(picnode, IRQ_HOST_MAP_LINEAR,
459 MPC52xx_IRQ_HIGHTESTHWIRQ, 544 MPC52xx_IRQ_HIGHTESTHWIRQ,
460 &mpc52xx_irqhost_ops, -1); 545 &mpc52xx_irqhost_ops, -1);
@@ -462,12 +547,38 @@ void __init mpc52xx_init_irq(void)
462 if (!mpc52xx_irqhost) 547 if (!mpc52xx_irqhost)
463 panic(__FILE__ ": Cannot allocate the IRQ host\n"); 548 panic(__FILE__ ": Cannot allocate the IRQ host\n");
464 549
465 printk(KERN_INFO "MPC52xx PIC is up and running!\n"); 550 irq_set_default_host(mpc52xx_irqhost);
551
552 pr_info("MPC52xx PIC is up and running!\n");
466} 553}
467 554
468/* 555/**
469 * get_irq (public) 556 * mpc52xx_get_irq - Get pending interrupt number hook function
470*/ 557 *
558 * Called by the interupt handler to determine what IRQ handler needs to be
559 * executed.
560 *
561 * Status of pending interrupts is determined by reading the encoded status
562 * register. The encoded status register has three fields; one for each of the
563 * types of interrupts defined by the controller - 'critical', 'main' and
564 * 'peripheral'. This function reads the status register and returns the IRQ
565 * number associated with the highest priority pending interrupt. 'Critical'
566 * interrupts have the highest priority, followed by 'main' interrupts, and
567 * then 'peripheral'.
568 *
569 * The mpc5200 interrupt controller can be configured to boost the priority
570 * of individual 'peripheral' interrupts. If this is the case then a special
571 * value will appear in either the crit or main fields indicating a high
572 * or medium priority peripheral irq has occurred.
573 *
574 * This function checks each of the 3 irq request fields and returns the
575 * first pending interrupt that it finds.
576 *
577 * This function also identifies a 4th type of interrupt; 'bestcomm'. Each
578 * bestcomm DMA task can raise the bestcomm peripheral interrupt. When this
579 * occurs at task-specific IRQ# is decoded so that each task can have its
580 * own IRQ handler.
581 */
471unsigned int mpc52xx_get_irq(void) 582unsigned int mpc52xx_get_irq(void)
472{ 583{
473 u32 status; 584 u32 status;
@@ -478,25 +589,21 @@ unsigned int mpc52xx_get_irq(void)
478 irq = (status >> 8) & 0x3; 589 irq = (status >> 8) & 0x3;
479 if (irq == 2) /* high priority peripheral */ 590 if (irq == 2) /* high priority peripheral */
480 goto peripheral; 591 goto peripheral;
481 irq |= (MPC52xx_IRQ_L1_CRIT << MPC52xx_IRQ_L1_OFFSET) & 592 irq |= (MPC52xx_IRQ_L1_CRIT << MPC52xx_IRQ_L1_OFFSET);
482 MPC52xx_IRQ_L1_MASK;
483 } else if (status & 0x00200000) { /* main */ 593 } else if (status & 0x00200000) { /* main */
484 irq = (status >> 16) & 0x1f; 594 irq = (status >> 16) & 0x1f;
485 if (irq == 4) /* low priority peripheral */ 595 if (irq == 4) /* low priority peripheral */
486 goto peripheral; 596 goto peripheral;
487 irq |= (MPC52xx_IRQ_L1_MAIN << MPC52xx_IRQ_L1_OFFSET) & 597 irq |= (MPC52xx_IRQ_L1_MAIN << MPC52xx_IRQ_L1_OFFSET);
488 MPC52xx_IRQ_L1_MASK;
489 } else if (status & 0x20000000) { /* peripheral */ 598 } else if (status & 0x20000000) { /* peripheral */
490 peripheral: 599 peripheral:
491 irq = (status >> 24) & 0x1f; 600 irq = (status >> 24) & 0x1f;
492 if (irq == 0) { /* bestcomm */ 601 if (irq == 0) { /* bestcomm */
493 status = in_be32(&sdma->IntPend); 602 status = in_be32(&sdma->IntPend);
494 irq = ffs(status) - 1; 603 irq = ffs(status) - 1;
495 irq |= (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET) & 604 irq |= (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET);
496 MPC52xx_IRQ_L1_MASK;
497 } else { 605 } else {
498 irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET) & 606 irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET);
499 MPC52xx_IRQ_L1_MASK;
500 } 607 }
501 } 608 }
502 609
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.h b/arch/powerpc/platforms/52xx/mpc52xx_pic.h
deleted file mode 100644
index 1a26bcdb3049..000000000000
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Header file for Freescale MPC52xx Interrupt controller
3 *
4 * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
5 * Copyright (C) 2003 MontaVista, Software, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#ifndef __POWERPC_SYSDEV_MPC52xx_PIC_H__
13#define __POWERPC_SYSDEV_MPC52xx_PIC_H__
14
15#include <asm/types.h>
16
17
18/* HW IRQ mapping */
19#define MPC52xx_IRQ_L1_CRIT (0)
20#define MPC52xx_IRQ_L1_MAIN (1)
21#define MPC52xx_IRQ_L1_PERP (2)
22#define MPC52xx_IRQ_L1_SDMA (3)
23
24#define MPC52xx_IRQ_L1_OFFSET (6)
25#define MPC52xx_IRQ_L1_MASK (0x00c0)
26
27#define MPC52xx_IRQ_L2_OFFSET (0)
28#define MPC52xx_IRQ_L2_MASK (0x003f)
29
30#define MPC52xx_IRQ_HIGHTESTHWIRQ (0xd0)
31
32
33/* Interrupt controller Register set */
34struct mpc52xx_intr {
35 u32 per_mask; /* INTR + 0x00 */
36 u32 per_pri1; /* INTR + 0x04 */
37 u32 per_pri2; /* INTR + 0x08 */
38 u32 per_pri3; /* INTR + 0x0c */
39 u32 ctrl; /* INTR + 0x10 */
40 u32 main_mask; /* INTR + 0x14 */
41 u32 main_pri1; /* INTR + 0x18 */
42 u32 main_pri2; /* INTR + 0x1c */
43 u32 reserved1; /* INTR + 0x20 */
44 u32 enc_status; /* INTR + 0x24 */
45 u32 crit_status; /* INTR + 0x28 */
46 u32 main_status; /* INTR + 0x2c */
47 u32 per_status; /* INTR + 0x30 */
48 u32 reserved2; /* INTR + 0x34 */
49 u32 per_error; /* INTR + 0x38 */
50};
51
52#endif /* __POWERPC_SYSDEV_MPC52xx_PIC_H__ */
53
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pm.c b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
index c72d3304387f..a55b0b6813ed 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pm.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
@@ -5,9 +5,6 @@
5#include <asm/cacheflush.h> 5#include <asm/cacheflush.h>
6#include <asm/mpc52xx.h> 6#include <asm/mpc52xx.h>
7 7
8#include "mpc52xx_pic.h"
9
10
11/* these are defined in mpc52xx_sleep.S, and only used here */ 8/* these are defined in mpc52xx_sleep.S, and only used here */
12extern void mpc52xx_deep_sleep(void __iomem *sram, void __iomem *sdram_regs, 9extern void mpc52xx_deep_sleep(void __iomem *sram, void __iomem *sdram_regs,
13 struct mpc52xx_cdm __iomem *, struct mpc52xx_intr __iomem*); 10 struct mpc52xx_cdm __iomem *, struct mpc52xx_intr __iomem*);
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index 1b75902fad64..9761a59f175f 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -53,7 +53,7 @@ static void __init pq2_pci_add_bridge(struct device_node *np)
53 if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b) 53 if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)
54 goto err; 54 goto err;
55 55
56 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 56 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
57 57
58 hose = pcibios_alloc_controller(np); 58 hose = pcibios_alloc_controller(np);
59 if (!hose) 59 if (!hose)
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index cb3054e1001d..f0798c09980f 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -1,6 +1,8 @@
1# 1#
2# Makefile for the PowerPC 85xx linux kernel. 2# Makefile for the PowerPC 85xx linux kernel.
3# 3#
4obj-$(CONFIG_SMP) += smp.o
5
4obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o 6obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
5obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o 7obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
6obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o 8obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 613bf8c2e30d..a8301c8ad537 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -63,6 +63,7 @@ void __init mpc85xx_ds_pic_init(void)
63 struct device_node *cascade_node = NULL; 63 struct device_node *cascade_node = NULL;
64 int cascade_irq; 64 int cascade_irq;
65#endif 65#endif
66 unsigned long root = of_get_flat_dt_root();
66 67
67 np = of_find_node_by_type(NULL, "open-pic"); 68 np = of_find_node_by_type(NULL, "open-pic");
68 if (np == NULL) { 69 if (np == NULL) {
@@ -76,11 +77,19 @@ void __init mpc85xx_ds_pic_init(void)
76 return; 77 return;
77 } 78 }
78 79
79 mpic = mpic_alloc(np, r.start, 80 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
81 mpic = mpic_alloc(np, r.start,
82 MPIC_PRIMARY |
83 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
84 0, 256, " OpenPIC ");
85 } else {
86 mpic = mpic_alloc(np, r.start,
80 MPIC_PRIMARY | MPIC_WANTS_RESET | 87 MPIC_PRIMARY | MPIC_WANTS_RESET |
81 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | 88 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
82 MPIC_SINGLE_DEST_CPU, 89 MPIC_SINGLE_DEST_CPU,
83 0, 256, " OpenPIC "); 90 0, 256, " OpenPIC ");
91 }
92
84 BUG_ON(mpic == NULL); 93 BUG_ON(mpic == NULL);
85 of_node_put(np); 94 of_node_put(np);
86 95
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 2494c5155919..658a36fab3ab 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -231,7 +231,7 @@ static void __init mpc85xx_mds_setup_arch(void)
231 231
232static int __init board_fixups(void) 232static int __init board_fixups(void)
233{ 233{
234 char phy_id[BUS_ID_SIZE]; 234 char phy_id[20];
235 char *compstrs[2] = {"fsl,gianfar-mdio", "fsl,ucc-mdio"}; 235 char *compstrs[2] = {"fsl,gianfar-mdio", "fsl,ucc-mdio"};
236 struct device_node *mdio; 236 struct device_node *mdio;
237 struct resource res; 237 struct resource res;
@@ -241,13 +241,15 @@ static int __init board_fixups(void)
241 mdio = of_find_compatible_node(NULL, NULL, compstrs[i]); 241 mdio = of_find_compatible_node(NULL, NULL, compstrs[i]);
242 242
243 of_address_to_resource(mdio, 0, &res); 243 of_address_to_resource(mdio, 0, &res);
244 snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 1); 244 snprintf(phy_id, sizeof(phy_id), "%llx:%02x",
245 (unsigned long long)res.start, 1);
245 246
246 phy_register_fixup_for_id(phy_id, mpc8568_fixup_125_clock); 247 phy_register_fixup_for_id(phy_id, mpc8568_fixup_125_clock);
247 phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups); 248 phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
248 249
249 /* Register a workaround for errata */ 250 /* Register a workaround for errata */
250 snprintf(phy_id, BUS_ID_SIZE, "%x:%02x", res.start, 7); 251 snprintf(phy_id, sizeof(phy_id), "%llx:%02x",
252 (unsigned long long)res.start, 7);
251 phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups); 253 phy_register_fixup_for_id(phy_id, mpc8568_mds_phy_fixups);
252 254
253 of_node_put(mdio); 255 of_node_put(mdio);
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
new file mode 100644
index 000000000000..d652c713f496
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -0,0 +1,104 @@
1/*
2 * Author: Andy Fleming <afleming@freescale.com>
3 * Kumar Gala <galak@kernel.crashing.org>
4 *
5 * Copyright 2006-2008 Freescale Semiconductor Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/stddef.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/of.h>
18
19#include <asm/machdep.h>
20#include <asm/pgtable.h>
21#include <asm/page.h>
22#include <asm/mpic.h>
23#include <asm/cacheflush.h>
24
25#include <sysdev/fsl_soc.h>
26
27extern volatile unsigned long __secondary_hold_acknowledge;
28extern void __early_start(void);
29
30#define BOOT_ENTRY_ADDR_UPPER 0
31#define BOOT_ENTRY_ADDR_LOWER 1
32#define BOOT_ENTRY_R3_UPPER 2
33#define BOOT_ENTRY_R3_LOWER 3
34#define BOOT_ENTRY_RESV 4
35#define BOOT_ENTRY_PIR 5
36#define BOOT_ENTRY_R6_UPPER 6
37#define BOOT_ENTRY_R6_LOWER 7
38#define NUM_BOOT_ENTRY 8
39#define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32))
40
41static void __init
42smp_85xx_kick_cpu(int nr)
43{
44 unsigned long flags;
45 const u64 *cpu_rel_addr;
46 __iomem u32 *bptr_vaddr;
47 struct device_node *np;
48 int n = 0;
49
50 WARN_ON (nr < 0 || nr >= NR_CPUS);
51
52 pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
53
54 local_irq_save(flags);
55
56 np = of_get_cpu_node(nr, NULL);
57 cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL);
58
59 if (cpu_rel_addr == NULL) {
60 printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr);
61 return;
62 }
63
64 /* Map the spin table */
65 bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
66
67 out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
68 out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
69
70 /* Wait a bit for the CPU to ack. */
71 while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
72 mdelay(1);
73
74 iounmap(bptr_vaddr);
75
76 local_irq_restore(flags);
77
78 pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
79}
80
81static void __init
82smp_85xx_setup_cpu(int cpu_nr)
83{
84 mpic_setup_this_cpu();
85
86 /* Clear any pending timer interrupts */
87 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
88
89 /* Enable decrementer interrupt */
90 mtspr(SPRN_TCR, TCR_DIE);
91}
92
93struct smp_ops_t smp_85xx_ops = {
94 .message_pass = smp_mpic_message_pass,
95 .probe = smp_mpic_probe,
96 .kick_cpu = smp_85xx_kick_cpu,
97 .setup_cpu = smp_85xx_setup_cpu,
98};
99
100void __init
101mpc85xx_smp_init(void)
102{
103 smp_ops = &smp_85xx_ops;
104}
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 77dd797a2580..8e5693935975 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -34,6 +34,8 @@ config MPC8610_HPCD
34config GEF_SBC610 34config GEF_SBC610
35 bool "GE Fanuc SBC610" 35 bool "GE Fanuc SBC610"
36 select DEFAULT_UIMAGE 36 select DEFAULT_UIMAGE
37 select GENERIC_GPIO
38 select ARCH_REQUIRE_GPIOLIB
37 select HAS_RAPIDIO 39 select HAS_RAPIDIO
38 help 40 help
39 This option enables support for GE Fanuc's SBC610. 41 This option enables support for GE Fanuc's SBC610.
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 4a56ff619afd..31e540c2ebbc 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_SMP) += mpc86xx_smp.o
7obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o 7obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
8obj-$(CONFIG_SBC8641D) += sbc8641d.o 8obj-$(CONFIG_SBC8641D) += sbc8641d.o
9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o 9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
10obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o 10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
new file mode 100644
index 000000000000..85b2800f4cb7
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -0,0 +1,143 @@
1/*
2 * Driver for GE Fanuc's FPGA based GPIO pins
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13/* TODO
14 *
15 * Configuration of output modes (totem-pole/open-drain)
16 * Interrupt configuration - interrupts are always generated the FPGA relies on
17 * the I/O interrupt controllers mask to stop them propergating
18 */
19
20#include <linux/kernel.h>
21#include <linux/compiler.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/of_platform.h>
27#include <linux/of_gpio.h>
28#include <linux/gpio.h>
29
30#define GEF_GPIO_DIRECT 0x00
31#define GEF_GPIO_IN 0x04
32#define GEF_GPIO_OUT 0x08
33#define GEF_GPIO_TRIG 0x0C
34#define GEF_GPIO_POLAR_A 0x10
35#define GEF_GPIO_POLAR_B 0x14
36#define GEF_GPIO_INT_STAT 0x18
37#define GEF_GPIO_OVERRUN 0x1C
38#define GEF_GPIO_MODE 0x20
39
40#define NUM_GPIO 19
41
42static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
43{
44 unsigned int data;
45
46 data = ioread32be(reg);
47 /* value: 0=low; 1=high */
48 if (value & 0x1)
49 data = data | (0x1 << offset);
50 else
51 data = data & ~(0x1 << offset);
52
53 iowrite32be(data, reg);
54}
55
56
57static int gef_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
58{
59 unsigned int data;
60 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
61
62 data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
63 data = data | (0x1 << offset);
64 iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
65
66 return 0;
67}
68
69static int gef_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
70{
71 unsigned int data;
72 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
73
74 /* Set direction before switching to input */
75 _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
76
77 data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
78 data = data & ~(0x1 << offset);
79 iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
80
81 return 0;
82}
83
84static int gef_gpio_get(struct gpio_chip *chip, unsigned offset)
85{
86 unsigned int data;
87 int state = 0;
88 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
89
90 data = ioread32be(mmchip->regs + GEF_GPIO_IN);
91 state = (int)((data >> offset) & 0x1);
92
93 return state;
94}
95
96static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
97{
98 struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
99
100 _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
101}
102
103static int __init gef_gpio_init(void)
104{
105 struct device_node *np;
106
107 for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
108 int retval;
109 struct of_mm_gpio_chip *gef_gpio_chip;
110
111 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
112
113 /* Allocate chip structure */
114 gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
115 if (!gef_gpio_chip) {
116 pr_err("%s: Unable to allocate structure\n",
117 np->full_name);
118 continue;
119 }
120
121 /* Setup pointers to chip functions */
122 gef_gpio_chip->of_gc.gpio_cells = 2;
123 gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO;
124 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
125 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
126 gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
127 gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
128
129 /* This function adds a memory mapped GPIO chip */
130 retval = of_mm_gpiochip_add(np, gef_gpio_chip);
131 if (retval) {
132 kfree(gef_gpio_chip);
133 pr_err("%s: Unable to add GPIO\n", np->full_name);
134 }
135 }
136
137 return 0;
138};
139arch_initcall(gef_gpio_init);
140
141MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver");
142MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com");
143MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 548efa55c8fe..3d0c776f888d 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -195,16 +195,24 @@ config SPE
195 195
196config PPC_STD_MMU 196config PPC_STD_MMU
197 bool 197 bool
198 depends on 6xx || POWER3 || POWER4 || PPC64 198 depends on 6xx || PPC64
199 default y 199 default y
200 200
201config PPC_STD_MMU_32 201config PPC_STD_MMU_32
202 def_bool y 202 def_bool y
203 depends on PPC_STD_MMU && PPC32 203 depends on PPC_STD_MMU && PPC32
204 204
205config PPC_STD_MMU_64
206 def_bool y
207 depends on PPC_STD_MMU && PPC64
208
209config PPC_MMU_NOHASH
210 def_bool y
211 depends on !PPC_STD_MMU
212
205config PPC_MM_SLICES 213config PPC_MM_SLICES
206 bool 214 bool
207 default y if HUGETLB_PAGE || PPC_64K_PAGES 215 default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
208 default n 216 default n
209 217
210config VIRT_CPU_ACCOUNTING 218config VIRT_CPU_ACCOUNTING
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index c14d7d8d96c8..5cc3279559a4 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -2,13 +2,18 @@ config PPC_CELL
2 bool 2 bool
3 default n 3 default n
4 4
5config PPC_CELL_NATIVE 5config PPC_CELL_COMMON
6 bool 6 bool
7 select PPC_CELL 7 select PPC_CELL
8 select PPC_DCR_MMIO 8 select PPC_DCR_MMIO
9 select PPC_OF_PLATFORM_PCI
10 select PPC_INDIRECT_IO 9 select PPC_INDIRECT_IO
11 select PPC_NATIVE 10 select PPC_NATIVE
11 select PPC_RTAS
12
13config PPC_CELL_NATIVE
14 bool
15 select PPC_CELL_COMMON
16 select PPC_OF_PLATFORM_PCI
12 select MPIC 17 select MPIC
13 select IBM_NEW_EMAC_EMAC4 18 select IBM_NEW_EMAC_EMAC4
14 select IBM_NEW_EMAC_RGMII 19 select IBM_NEW_EMAC_RGMII
@@ -20,7 +25,6 @@ config PPC_IBM_CELL_BLADE
20 bool "IBM Cell Blade" 25 bool "IBM Cell Blade"
21 depends on PPC_MULTIPLATFORM && PPC64 26 depends on PPC_MULTIPLATFORM && PPC64
22 select PPC_CELL_NATIVE 27 select PPC_CELL_NATIVE
23 select PPC_RTAS
24 select MMIO_NVRAM 28 select MMIO_NVRAM
25 select PPC_UDBG_16550 29 select PPC_UDBG_16550
26 select UDBG_RTAS_CONSOLE 30 select UDBG_RTAS_CONSOLE
@@ -28,16 +32,17 @@ config PPC_IBM_CELL_BLADE
28config PPC_CELLEB 32config PPC_CELLEB
29 bool "Toshiba's Cell Reference Set 'Celleb' Architecture" 33 bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
30 depends on PPC_MULTIPLATFORM && PPC64 34 depends on PPC_MULTIPLATFORM && PPC64
31 select PPC_CELL
32 select PPC_CELL_NATIVE 35 select PPC_CELL_NATIVE
33 select PPC_RTAS
34 select PPC_INDIRECT_IO
35 select PPC_OF_PLATFORM_PCI
36 select HAS_TXX9_SERIAL 36 select HAS_TXX9_SERIAL
37 select PPC_UDBG_BEAT 37 select PPC_UDBG_BEAT
38 select USB_OHCI_BIG_ENDIAN_MMIO 38 select USB_OHCI_BIG_ENDIAN_MMIO
39 select USB_EHCI_BIG_ENDIAN_MMIO 39 select USB_EHCI_BIG_ENDIAN_MMIO
40 40
41config PPC_CELL_QPACE
42 bool "IBM Cell - QPACE"
43 depends on PPC_MULTIPLATFORM && PPC64
44 select PPC_CELL_COMMON
45
41menu "Cell Broadband Engine options" 46menu "Cell Broadband Engine options"
42 depends on PPC_CELL 47 depends on PPC_CELL
43 48
@@ -102,7 +107,7 @@ config PPC_IBM_CELL_POWERBUTTON
102config CBE_THERM 107config CBE_THERM
103 tristate "CBE thermal support" 108 tristate "CBE thermal support"
104 default m 109 default m
105 depends on CBE_RAS 110 depends on CBE_RAS && SPU_BASE
106 111
107config CBE_CPUFREQ 112config CBE_CPUFREQ
108 tristate "CBE frequency scaling" 113 tristate "CBE frequency scaling"
@@ -136,5 +141,5 @@ endmenu
136 141
137config OPROFILE_CELL 142config OPROFILE_CELL
138 def_bool y 143 def_bool y
139 depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) 144 depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE
140 145
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 7fd830872c43..43eccb270301 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -1,7 +1,7 @@
1obj-$(CONFIG_PPC_CELL_NATIVE) += interrupt.o iommu.o setup.o \ 1obj-$(CONFIG_PPC_CELL_COMMON) += cbe_regs.o interrupt.o pervasive.o
2 cbe_regs.o spider-pic.o \ 2
3 pervasive.o pmu.o io-workarounds.o \ 3obj-$(CONFIG_PPC_CELL_NATIVE) += iommu.o setup.o spider-pic.o \
4 spider-pci.o 4 pmu.o io-workarounds.o spider-pci.o
5obj-$(CONFIG_CBE_RAS) += ras.o 5obj-$(CONFIG_CBE_RAS) += ras.o
6 6
7obj-$(CONFIG_CBE_THERM) += cbe_thermal.o 7obj-$(CONFIG_CBE_THERM) += cbe_thermal.o
@@ -14,13 +14,12 @@ obj-$(CONFIG_PPC_IBM_CELL_POWERBUTTON) += cbe_powerbutton.o
14 14
15ifeq ($(CONFIG_SMP),y) 15ifeq ($(CONFIG_SMP),y)
16obj-$(CONFIG_PPC_CELL_NATIVE) += smp.o 16obj-$(CONFIG_PPC_CELL_NATIVE) += smp.o
17obj-$(CONFIG_PPC_CELL_QPACE) += smp.o
17endif 18endif
18 19
19# needed only when building loadable spufs.ko 20# needed only when building loadable spufs.ko
20spu-priv1-$(CONFIG_PPC_CELL_NATIVE) += spu_priv1_mmio.o 21spu-priv1-$(CONFIG_PPC_CELL_COMMON) += spu_priv1_mmio.o
21 22spu-manage-$(CONFIG_PPC_CELL_COMMON) += spu_manage.o
22spu-manage-$(CONFIG_PPC_CELLEB) += spu_manage.o
23spu-manage-$(CONFIG_PPC_CELL_NATIVE) += spu_manage.o
24 23
25obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \ 24obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
26 spu_notify.o \ 25 spu_notify.o \
@@ -31,6 +30,8 @@ obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
31 30
32obj-$(CONFIG_PCI_MSI) += axon_msi.o 31obj-$(CONFIG_PCI_MSI) += axon_msi.o
33 32
33# qpace setup
34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o
34 35
35# celleb stuff 36# celleb stuff
36ifeq ($(CONFIG_PPC_CELLEB),y) 37ifeq ($(CONFIG_PPC_CELLEB),y)
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 442cf36aa172..0ce45c2b42f8 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -413,6 +413,9 @@ static int axon_msi_probe(struct of_device *device,
413 MSIC_CTRL_IRQ_ENABLE | MSIC_CTRL_ENABLE | 413 MSIC_CTRL_IRQ_ENABLE | MSIC_CTRL_ENABLE |
414 MSIC_CTRL_FIFO_SIZE); 414 MSIC_CTRL_FIFO_SIZE);
415 415
416 msic->read_offset = dcr_read(msic->dcr_host, MSIC_WRITE_OFFSET_REG)
417 & MSIC_FIFO_SIZE_MASK;
418
416 device->dev.platform_data = msic; 419 device->dev.platform_data = msic;
417 420
418 ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs; 421 ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;
diff --git a/arch/powerpc/platforms/cell/celleb_setup.c b/arch/powerpc/platforms/cell/celleb_setup.c
index b11cb30decb2..07c234f6b2b6 100644
--- a/arch/powerpc/platforms/cell/celleb_setup.c
+++ b/arch/powerpc/platforms/cell/celleb_setup.c
@@ -45,7 +45,6 @@
45#include <asm/mmu.h> 45#include <asm/mmu.h>
46#include <asm/processor.h> 46#include <asm/processor.h>
47#include <asm/io.h> 47#include <asm/io.h>
48#include <asm/kexec.h>
49#include <asm/prom.h> 48#include <asm/prom.h>
50#include <asm/machdep.h> 49#include <asm/machdep.h>
51#include <asm/cputable.h> 50#include <asm/cputable.h>
@@ -226,9 +225,6 @@ define_machine(celleb_beat) {
226 .pci_setup_phb = celleb_setup_phb, 225 .pci_setup_phb = celleb_setup_phb,
227#ifdef CONFIG_KEXEC 226#ifdef CONFIG_KEXEC
228 .kexec_cpu_down = beat_kexec_cpu_down, 227 .kexec_cpu_down = beat_kexec_cpu_down,
229 .machine_kexec = default_machine_kexec,
230 .machine_kexec_prepare = default_machine_kexec_prepare,
231 .machine_crash_shutdown = default_machine_crash_shutdown,
232#endif 228#endif
233}; 229};
234 230
@@ -248,9 +244,4 @@ define_machine(celleb_native) {
248 .pci_probe_mode = celleb_pci_probe_mode, 244 .pci_probe_mode = celleb_pci_probe_mode,
249 .pci_setup_phb = celleb_setup_phb, 245 .pci_setup_phb = celleb_setup_phb,
250 .init_IRQ = celleb_init_IRQ_native, 246 .init_IRQ = celleb_init_IRQ_native,
251#ifdef CONFIG_KEXEC
252 .machine_kexec = default_machine_kexec,
253 .machine_kexec_prepare = default_machine_kexec_prepare,
254 .machine_crash_shutdown = default_machine_crash_shutdown,
255#endif
256}; 247};
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 3168272ab0d7..86db4dd170a0 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -1053,10 +1053,7 @@ static int __init cell_iommu_fixed_mapping_init(void)
1053 } 1053 }
1054 1054
1055 /* We must have dma-ranges properties for fixed mapping to work */ 1055 /* We must have dma-ranges properties for fixed mapping to work */
1056 for (np = NULL; (np = of_find_all_nodes(np));) { 1056 np = of_find_node_with_property(NULL, "dma-ranges");
1057 if (of_find_property(np, "dma-ranges", NULL))
1058 break;
1059 }
1060 of_node_put(np); 1057 of_node_put(np);
1061 1058
1062 if (!np) { 1059 if (!np) {
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
new file mode 100644
index 000000000000..be84e6a16b30
--- /dev/null
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -0,0 +1,152 @@
1/*
2 * linux/arch/powerpc/platforms/cell/qpace_setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
9 * Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/delay.h>
21#include <linux/irq.h>
22#include <linux/console.h>
23#include <linux/of_platform.h>
24
25#include <asm/mmu.h>
26#include <asm/processor.h>
27#include <asm/io.h>
28#include <asm/kexec.h>
29#include <asm/pgtable.h>
30#include <asm/prom.h>
31#include <asm/rtas.h>
32#include <asm/dma.h>
33#include <asm/machdep.h>
34#include <asm/time.h>
35#include <asm/cputable.h>
36#include <asm/irq.h>
37#include <asm/spu.h>
38#include <asm/spu_priv1.h>
39#include <asm/udbg.h>
40#include <asm/cell-regs.h>
41
42#include "interrupt.h"
43#include "pervasive.h"
44#include "ras.h"
45#include "io-workarounds.h"
46
47static void qpace_show_cpuinfo(struct seq_file *m)
48{
49 struct device_node *root;
50 const char *model = "";
51
52 root = of_find_node_by_path("/");
53 if (root)
54 model = of_get_property(root, "model", NULL);
55 seq_printf(m, "machine\t\t: CHRP %s\n", model);
56 of_node_put(root);
57}
58
59static void qpace_progress(char *s, unsigned short hex)
60{
61 printk("*** %04x : %s\n", hex, s ? s : "");
62}
63
64static int __init qpace_publish_devices(void)
65{
66 int node;
67
68 /* Publish OF platform devices for southbridge IOs */
69 of_platform_bus_probe(NULL, NULL, NULL);
70
71 /* There is no device for the MIC memory controller, thus we create
72 * a platform device for it to attach the EDAC driver to.
73 */
74 for_each_online_node(node) {
75 if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
76 continue;
77 platform_device_register_simple("cbe-mic", node, NULL, 0);
78 }
79
80 return 0;
81}
82machine_subsys_initcall(qpace, qpace_publish_devices);
83
84extern int qpace_notify(struct device *dev)
85{
86 /* set dma_ops for of_platform bus */
87 if (dev->bus && dev->bus->name
88 && !strcmp(dev->bus->name, "of_platform"))
89 set_dma_ops(dev, &dma_direct_ops);
90
91 return 0;
92}
93
94static void __init qpace_setup_arch(void)
95{
96#ifdef CONFIG_SPU_BASE
97 spu_priv1_ops = &spu_priv1_mmio_ops;
98 spu_management_ops = &spu_management_of_ops;
99#endif
100
101 cbe_regs_init();
102
103#ifdef CONFIG_CBE_RAS
104 cbe_ras_init();
105#endif
106
107#ifdef CONFIG_SMP
108 smp_init_cell();
109#endif
110
111 /* init to some ~sane value until calibrate_delay() runs */
112 loops_per_jiffy = 50000000;
113
114 cbe_pervasive_init();
115#ifdef CONFIG_DUMMY_CONSOLE
116 conswitchp = &dummy_con;
117#endif
118
119 /* set notifier function */
120 platform_notify = &qpace_notify;
121}
122
123static int __init qpace_probe(void)
124{
125 unsigned long root = of_get_flat_dt_root();
126
127 if (!of_flat_dt_is_compatible(root, "IBM,QPACE"))
128 return 0;
129
130 hpte_init_native();
131
132 return 1;
133}
134
135define_machine(qpace) {
136 .name = "QPACE",
137 .probe = qpace_probe,
138 .setup_arch = qpace_setup_arch,
139 .show_cpuinfo = qpace_show_cpuinfo,
140 .restart = rtas_restart,
141 .power_off = rtas_power_off,
142 .halt = rtas_halt,
143 .get_boot_time = rtas_get_boot_time,
144 .calibrate_decr = generic_calibrate_decr,
145 .progress = qpace_progress,
146 .init_IRQ = iic_init_IRQ,
147#ifdef CONFIG_KEXEC
148 .machine_kexec = default_machine_kexec,
149 .machine_kexec_prepare = default_machine_kexec_prepare,
150 .machine_crash_shutdown = default_machine_crash_shutdown,
151#endif
152};
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index ab721b50fbba..59305369f6b2 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -35,7 +35,6 @@
35#include <asm/mmu.h> 35#include <asm/mmu.h>
36#include <asm/processor.h> 36#include <asm/processor.h>
37#include <asm/io.h> 37#include <asm/io.h>
38#include <asm/kexec.h>
39#include <asm/pgtable.h> 38#include <asm/pgtable.h>
40#include <asm/prom.h> 39#include <asm/prom.h>
41#include <asm/rtas.h> 40#include <asm/rtas.h>
@@ -289,9 +288,4 @@ define_machine(cell) {
289 .progress = cell_progress, 288 .progress = cell_progress,
290 .init_IRQ = cell_init_irq, 289 .init_IRQ = cell_init_irq,
291 .pci_setup_phb = cell_setup_phb, 290 .pci_setup_phb = cell_setup_phb,
292#ifdef CONFIG_KEXEC
293 .machine_kexec = default_machine_kexec,
294 .machine_kexec_prepare = default_machine_kexec_prepare,
295 .machine_crash_shutdown = default_machine_crash_shutdown,
296#endif
297}; 291};
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 1b26071a86ca..7106b63d401b 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -273,12 +273,10 @@ spufs_mem_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
273 return VM_FAULT_NOPAGE; 273 return VM_FAULT_NOPAGE;
274 274
275 if (ctx->state == SPU_STATE_SAVED) { 275 if (ctx->state == SPU_STATE_SAVED) {
276 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 276 vma->vm_page_prot = pgprot_cached(vma->vm_page_prot);
277 & ~_PAGE_NO_CACHE);
278 pfn = vmalloc_to_pfn(ctx->csa.lscsa->ls + offset); 277 pfn = vmalloc_to_pfn(ctx->csa.lscsa->ls + offset);
279 } else { 278 } else {
280 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 279 vma->vm_page_prot = pgprot_noncached_wc(vma->vm_page_prot);
281 | _PAGE_NO_CACHE);
282 pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT; 280 pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT;
283 } 281 }
284 vm_insert_pfn(vma, address, pfn); 282 vm_insert_pfn(vma, address, pfn);
@@ -338,8 +336,7 @@ static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
338 return -EINVAL; 336 return -EINVAL;
339 337
340 vma->vm_flags |= VM_IO | VM_PFNMAP; 338 vma->vm_flags |= VM_IO | VM_PFNMAP;
341 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 339 vma->vm_page_prot = pgprot_noncached_wc(vma->vm_page_prot);
342 | _PAGE_NO_CACHE);
343 340
344 vma->vm_ops = &spufs_mem_mmap_vmops; 341 vma->vm_ops = &spufs_mem_mmap_vmops;
345 return 0; 342 return 0;
@@ -452,8 +449,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma)
452 return -EINVAL; 449 return -EINVAL;
453 450
454 vma->vm_flags |= VM_IO | VM_PFNMAP; 451 vma->vm_flags |= VM_IO | VM_PFNMAP;
455 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 452 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
456 | _PAGE_NO_CACHE | _PAGE_GUARDED);
457 453
458 vma->vm_ops = &spufs_cntl_mmap_vmops; 454 vma->vm_ops = &spufs_cntl_mmap_vmops;
459 return 0; 455 return 0;
@@ -1155,8 +1151,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
1155 return -EINVAL; 1151 return -EINVAL;
1156 1152
1157 vma->vm_flags |= VM_IO | VM_PFNMAP; 1153 vma->vm_flags |= VM_IO | VM_PFNMAP;
1158 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 1154 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1159 | _PAGE_NO_CACHE | _PAGE_GUARDED);
1160 1155
1161 vma->vm_ops = &spufs_signal1_mmap_vmops; 1156 vma->vm_ops = &spufs_signal1_mmap_vmops;
1162 return 0; 1157 return 0;
@@ -1292,8 +1287,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
1292 return -EINVAL; 1287 return -EINVAL;
1293 1288
1294 vma->vm_flags |= VM_IO | VM_PFNMAP; 1289 vma->vm_flags |= VM_IO | VM_PFNMAP;
1295 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 1290 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1296 | _PAGE_NO_CACHE | _PAGE_GUARDED);
1297 1291
1298 vma->vm_ops = &spufs_signal2_mmap_vmops; 1292 vma->vm_ops = &spufs_signal2_mmap_vmops;
1299 return 0; 1293 return 0;
@@ -1414,8 +1408,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
1414 return -EINVAL; 1408 return -EINVAL;
1415 1409
1416 vma->vm_flags |= VM_IO | VM_PFNMAP; 1410 vma->vm_flags |= VM_IO | VM_PFNMAP;
1417 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 1411 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1418 | _PAGE_NO_CACHE | _PAGE_GUARDED);
1419 1412
1420 vma->vm_ops = &spufs_mss_mmap_vmops; 1413 vma->vm_ops = &spufs_mss_mmap_vmops;
1421 return 0; 1414 return 0;
@@ -1476,8 +1469,7 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma)
1476 return -EINVAL; 1469 return -EINVAL;
1477 1470
1478 vma->vm_flags |= VM_IO | VM_PFNMAP; 1471 vma->vm_flags |= VM_IO | VM_PFNMAP;
1479 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 1472 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1480 | _PAGE_NO_CACHE | _PAGE_GUARDED);
1481 1473
1482 vma->vm_ops = &spufs_psmap_mmap_vmops; 1474 vma->vm_ops = &spufs_psmap_mmap_vmops;
1483 return 0; 1475 return 0;
@@ -1536,8 +1528,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma)
1536 return -EINVAL; 1528 return -EINVAL;
1537 1529
1538 vma->vm_flags |= VM_IO | VM_PFNMAP; 1530 vma->vm_flags |= VM_IO | VM_PFNMAP;
1539 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 1531 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1540 | _PAGE_NO_CACHE | _PAGE_GUARDED);
1541 1532
1542 vma->vm_ops = &spufs_mfc_mmap_vmops; 1533 vma->vm_ops = &spufs_mfc_mmap_vmops;
1543 return 0; 1534 return 0;
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index cb85d237e492..6296bfd9cb0b 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -95,8 +95,8 @@ spufs_new_inode(struct super_block *sb, int mode)
95 goto out; 95 goto out;
96 96
97 inode->i_mode = mode; 97 inode->i_mode = mode;
98 inode->i_uid = current->fsuid; 98 inode->i_uid = current_fsuid();
99 inode->i_gid = current->fsgid; 99 inode->i_gid = current_fsgid();
100 inode->i_blocks = 0; 100 inode->i_blocks = 0;
101 inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; 101 inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
102out: 102out:
@@ -323,7 +323,7 @@ static int spufs_context_open(struct dentry *dentry, struct vfsmount *mnt)
323 goto out; 323 goto out;
324 } 324 }
325 325
326 filp = dentry_open(dentry, mnt, O_RDONLY); 326 filp = dentry_open(dentry, mnt, O_RDONLY, current_cred());
327 if (IS_ERR(filp)) { 327 if (IS_ERR(filp)) {
328 put_unused_fd(ret); 328 put_unused_fd(ret);
329 ret = PTR_ERR(filp); 329 ret = PTR_ERR(filp);
@@ -562,7 +562,7 @@ static int spufs_gang_open(struct dentry *dentry, struct vfsmount *mnt)
562 goto out; 562 goto out;
563 } 563 }
564 564
565 filp = dentry_open(dentry, mnt, O_RDONLY); 565 filp = dentry_open(dentry, mnt, O_RDONLY, current_cred());
566 if (IS_ERR(filp)) { 566 if (IS_ERR(filp)) {
567 put_unused_fd(ret); 567 put_unused_fd(ret);
568 ret = PTR_ERR(filp); 568 ret = PTR_ERR(filp);
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index d3cde6b9d2df..f6b0c519d5a2 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -141,6 +141,7 @@ hydra_init(void)
141 of_node_put(np); 141 of_node_put(np);
142 return 0; 142 return 0;
143 } 143 }
144 of_node_put(np);
144 Hydra = ioremap(r.start, r.end-r.start); 145 Hydra = ioremap(r.start, r.end-r.start);
145 printk("Hydra Mac I/O at %llx\n", (unsigned long long)r.start); 146 printk("Hydra Mac I/O at %llx\n", (unsigned long long)r.start);
146 printk("Hydra Feature_Control was %x", 147 printk("Hydra Feature_Control was %x",
@@ -198,7 +199,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
198 printk ("RTAS supporting Pegasos OF not found, please upgrade" 199 printk ("RTAS supporting Pegasos OF not found, please upgrade"
199 " your firmware\n"); 200 " your firmware\n");
200 } 201 }
201 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 202 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
202 /* keep the reference to the root node */ 203 /* keep the reference to the root node */
203} 204}
204 205
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c
index 32ba0fa0ad03..8cab5731850f 100644
--- a/arch/powerpc/platforms/embedded6xx/c2k.c
+++ b/arch/powerpc/platforms/embedded6xx/c2k.c
@@ -20,7 +20,6 @@
20#include <linux/seq_file.h> 20#include <linux/seq_file.h>
21#include <linux/time.h> 21#include <linux/time.h>
22#include <linux/of.h> 22#include <linux/of.h>
23#include <linux/kexec.h>
24 23
25#include <asm/machdep.h> 24#include <asm/machdep.h>
26#include <asm/prom.h> 25#include <asm/prom.h>
@@ -147,9 +146,4 @@ define_machine(c2k) {
147 .get_irq = mv64x60_get_irq, 146 .get_irq = mv64x60_get_irq,
148 .restart = c2k_restart, 147 .restart = c2k_restart,
149 .calibrate_decr = generic_calibrate_decr, 148 .calibrate_decr = generic_calibrate_decr,
150#ifdef CONFIG_KEXEC
151 .machine_kexec = default_machine_kexec,
152 .machine_kexec_prepare = default_machine_kexec_prepare,
153 .machine_crash_shutdown = default_machine_crash_shutdown,
154#endif
155}; 149};
diff --git a/arch/powerpc/platforms/embedded6xx/prpmc2800.c b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
index 4c485e984236..670035f49a69 100644
--- a/arch/powerpc/platforms/embedded6xx/prpmc2800.c
+++ b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
@@ -19,7 +19,6 @@
19#include <asm/prom.h> 19#include <asm/prom.h>
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/time.h> 21#include <asm/time.h>
22#include <asm/kexec.h>
23 22
24#include <mm/mmu_decl.h> 23#include <mm/mmu_decl.h>
25 24
@@ -155,9 +154,4 @@ define_machine(prpmc2800){
155 .get_irq = mv64x60_get_irq, 154 .get_irq = mv64x60_get_irq,
156 .restart = prpmc2800_restart, 155 .restart = prpmc2800_restart,
157 .calibrate_decr = generic_calibrate_decr, 156 .calibrate_decr = generic_calibrate_decr,
158#ifdef CONFIG_KEXEC
159 .machine_kexec = default_machine_kexec,
160 .machine_kexec_prepare = default_machine_kexec_prepare,
161 .machine_crash_shutdown = default_machine_crash_shutdown,
162#endif
163}; 157};
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 45ffd8e542f4..ed3753d8c109 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -9,6 +9,7 @@ menu "iSeries device drivers"
9 9
10config VIODASD 10config VIODASD
11 tristate "iSeries Virtual I/O disk support" 11 tristate "iSeries Virtual I/O disk support"
12 depends on BLOCK
12 help 13 help
13 If you are running on an iSeries system and you want to use 14 If you are running on an iSeries system and you want to use
14 virtual disks created and managed by OS/400, say Y. 15 virtual disks created and managed by OS/400, say Y.
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index d4c61c3c9669..bfd60e4accee 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -50,7 +50,6 @@
50#include <asm/system.h> 50#include <asm/system.h>
51#include <asm/pgtable.h> 51#include <asm/pgtable.h>
52#include <asm/io.h> 52#include <asm/io.h>
53#include <asm/kexec.h>
54#include <asm/pci-bridge.h> 53#include <asm/pci-bridge.h>
55#include <asm/iommu.h> 54#include <asm/iommu.h>
56#include <asm/machdep.h> 55#include <asm/machdep.h>
@@ -335,9 +334,4 @@ define_machine(maple) {
335 .calibrate_decr = generic_calibrate_decr, 334 .calibrate_decr = generic_calibrate_decr,
336 .progress = maple_progress, 335 .progress = maple_progress,
337 .power_save = power4_idle, 336 .power_save = power4_idle,
338#ifdef CONFIG_KEXEC
339 .machine_kexec = default_machine_kexec,
340 .machine_kexec_prepare = default_machine_kexec_prepare,
341 .machine_crash_shutdown = default_machine_crash_shutdown,
342#endif
343}; 337};
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 792d3ce8112e..65c585b8b00d 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -310,7 +310,7 @@ static int pmu_set_cpu_speed(int low_speed)
310 _set_L3CR(save_l3cr); 310 _set_L3CR(save_l3cr);
311 311
312 /* Restore userland MMU context */ 312 /* Restore userland MMU context */
313 set_context(current->active_mm->context.id, current->active_mm->pgd); 313 switch_mmu_context(NULL, current->active_mm);
314 314
315#ifdef DEBUG_FREQ 315#ifdef DEBUG_FREQ
316 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); 316 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index bcf50d7056e9..54b7b76ed4f0 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -729,7 +729,7 @@ static void __init setup_bandit(struct pci_controller *hose,
729static int __init setup_uninorth(struct pci_controller *hose, 729static int __init setup_uninorth(struct pci_controller *hose,
730 struct resource *addr) 730 struct resource *addr)
731{ 731{
732 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 732 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
733 has_uninorth = 1; 733 has_uninorth = 1;
734 hose->ops = &macrisc_pci_ops; 734 hose->ops = &macrisc_pci_ops;
735 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); 735 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
@@ -996,7 +996,7 @@ void __init pmac_pci_init(void)
996 struct device_node *np, *root; 996 struct device_node *np, *root;
997 struct device_node *ht = NULL; 997 struct device_node *ht = NULL;
998 998
999 ppc_pci_flags = PPC_PCI_CAN_SKIP_ISA_ALIGN; 999 ppc_pci_set_flags(PPC_PCI_CAN_SKIP_ISA_ALIGN);
1000 1000
1001 root = of_find_node_by_path("/"); 1001 root = of_find_node_by_path("/");
1002 if (root == NULL) { 1002 if (root == NULL) {
@@ -1055,7 +1055,7 @@ void __init pmac_pci_init(void)
1055 * some offset between bus number and domains for now when we 1055 * some offset between bus number and domains for now when we
1056 * assign all busses should help for now 1056 * assign all busses should help for now
1057 */ 1057 */
1058 if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS) 1058 if (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
1059 pcibios_assign_bus_offset = 0x10; 1059 pcibios_assign_bus_offset = 0x10;
1060#endif 1060#endif
1061} 1061}
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 82c14d203d8b..9b78f5300c24 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -60,7 +60,6 @@
60#include <asm/system.h> 60#include <asm/system.h>
61#include <asm/pgtable.h> 61#include <asm/pgtable.h>
62#include <asm/io.h> 62#include <asm/io.h>
63#include <asm/kexec.h>
64#include <asm/pci-bridge.h> 63#include <asm/pci-bridge.h>
65#include <asm/ohare.h> 64#include <asm/ohare.h>
66#include <asm/mediabay.h> 65#include <asm/mediabay.h>
@@ -310,9 +309,7 @@ static void __init pmac_setup_arch(void)
310 } 309 }
311 310
312 /* See if newworld or oldworld */ 311 /* See if newworld or oldworld */
313 for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) 312 ic = of_find_node_with_property(NULL, "interrupt-controller");
314 if (of_get_property(ic, "interrupt-controller", NULL))
315 break;
316 if (ic) { 313 if (ic) {
317 pmac_newworld = 1; 314 pmac_newworld = 1;
318 of_node_put(ic); 315 of_node_put(ic);
@@ -740,11 +737,6 @@ define_machine(powermac) {
740 .pci_probe_mode = pmac_pci_probe_mode, 737 .pci_probe_mode = pmac_pci_probe_mode,
741 .power_save = power4_idle, 738 .power_save = power4_idle,
742 .enable_pmcs = power4_enable_pmcs, 739 .enable_pmcs = power4_enable_pmcs,
743#ifdef CONFIG_KEXEC
744 .machine_kexec = default_machine_kexec,
745 .machine_kexec_prepare = default_machine_kexec_prepare,
746 .machine_crash_shutdown = default_machine_crash_shutdown,
747#endif
748#endif /* CONFIG_PPC64 */ 740#endif /* CONFIG_PPC64 */
749#ifdef CONFIG_PPC32 741#ifdef CONFIG_PPC32
750 .pcibios_enable_device_hook = pmac_pci_enable_device_hook, 742 .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
diff --git a/arch/powerpc/platforms/powermac/sleep.S b/arch/powerpc/platforms/powermac/sleep.S
index adee28da353f..1c2802fabd57 100644
--- a/arch/powerpc/platforms/powermac/sleep.S
+++ b/arch/powerpc/platforms/powermac/sleep.S
@@ -17,6 +17,7 @@
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/thread_info.h> 18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h> 19#include <asm/asm-offsets.h>
20#include <asm/mmu.h>
20 21
21#define MAGIC 0x4c617273 /* 'Lars' */ 22#define MAGIC 0x4c617273 /* 'Lars' */
22 23
@@ -323,7 +324,7 @@ grackle_wake_up:
323 lwz r4,SL_IBAT3+4(r1) 324 lwz r4,SL_IBAT3+4(r1)
324 mtibatl 3,r4 325 mtibatl 3,r4
325 326
326BEGIN_FTR_SECTION 327BEGIN_MMU_FTR_SECTION
327 li r4,0 328 li r4,0
328 mtspr SPRN_DBAT4U,r4 329 mtspr SPRN_DBAT4U,r4
329 mtspr SPRN_DBAT4L,r4 330 mtspr SPRN_DBAT4L,r4
@@ -341,7 +342,7 @@ BEGIN_FTR_SECTION
341 mtspr SPRN_IBAT6L,r4 342 mtspr SPRN_IBAT6L,r4
342 mtspr SPRN_IBAT7U,r4 343 mtspr SPRN_IBAT7U,r4
343 mtspr SPRN_IBAT7L,r4 344 mtspr SPRN_IBAT7L,r4
344END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS) 345END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
345 346
346 /* Flush all TLBs */ 347 /* Flush all TLBs */
347 lis r4,0x1000 348 lis r4,0x1000
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 40f72c2a4699..6b0711c15eca 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -739,7 +739,7 @@ static void __init smp_core99_setup(int ncpus)
739 739
740 /* XXX should get this from reg properties */ 740 /* XXX should get this from reg properties */
741 for (i = 1; i < ncpus; ++i) 741 for (i = 1; i < ncpus; ++i)
742 smp_hw_index[i] = i; 742 set_hard_smp_processor_id(i, i);
743 } 743 }
744#endif 744#endif
745 745
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index ffdd8e963fbd..dbc124e05646 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -314,11 +314,17 @@ static int __init ps3_setup_vuart_device(enum ps3_match_id match_id,
314 314
315 result = ps3_system_bus_device_register(&p->dev); 315 result = ps3_system_bus_device_register(&p->dev);
316 316
317 if (result) 317 if (result) {
318 pr_debug("%s:%d ps3_system_bus_device_register failed\n", 318 pr_debug("%s:%d ps3_system_bus_device_register failed\n",
319 __func__, __LINE__); 319 __func__, __LINE__);
320 320 goto fail_device_register;
321 }
321 pr_debug(" <- %s:%d\n", __func__, __LINE__); 322 pr_debug(" <- %s:%d\n", __func__, __LINE__);
323 return 0;
324
325fail_device_register:
326 kfree(p);
327 pr_debug(" <- %s:%d fail\n", __func__, __LINE__);
322 return result; 328 return result;
323} 329}
324 330
@@ -463,11 +469,17 @@ static int __init ps3_register_sound_devices(void)
463 469
464 result = ps3_system_bus_device_register(&p->dev); 470 result = ps3_system_bus_device_register(&p->dev);
465 471
466 if (result) 472 if (result) {
467 pr_debug("%s:%d ps3_system_bus_device_register failed\n", 473 pr_debug("%s:%d ps3_system_bus_device_register failed\n",
468 __func__, __LINE__); 474 __func__, __LINE__);
469 475 goto fail_device_register;
476 }
470 pr_debug(" <- %s:%d\n", __func__, __LINE__); 477 pr_debug(" <- %s:%d\n", __func__, __LINE__);
478 return 0;
479
480fail_device_register:
481 kfree(p);
482 pr_debug(" <- %s:%d failed\n", __func__, __LINE__);
471 return result; 483 return result;
472} 484}
473 485
@@ -485,17 +497,24 @@ static int __init ps3_register_graphics_devices(void)
485 if (!p) 497 if (!p)
486 return -ENOMEM; 498 return -ENOMEM;
487 499
488 p->dev.match_id = PS3_MATCH_ID_GRAPHICS; 500 p->dev.match_id = PS3_MATCH_ID_GPU;
489 p->dev.match_sub_id = PS3_MATCH_SUB_ID_FB; 501 p->dev.match_sub_id = PS3_MATCH_SUB_ID_GPU_FB;
490 p->dev.dev_type = PS3_DEVICE_TYPE_IOC0; 502 p->dev.dev_type = PS3_DEVICE_TYPE_IOC0;
491 503
492 result = ps3_system_bus_device_register(&p->dev); 504 result = ps3_system_bus_device_register(&p->dev);
493 505
494 if (result) 506 if (result) {
495 pr_debug("%s:%d ps3_system_bus_device_register failed\n", 507 pr_debug("%s:%d ps3_system_bus_device_register failed\n",
496 __func__, __LINE__); 508 __func__, __LINE__);
509 goto fail_device_register;
510 }
497 511
498 pr_debug(" <- %s:%d\n", __func__, __LINE__); 512 pr_debug(" <- %s:%d\n", __func__, __LINE__);
513 return 0;
514
515fail_device_register:
516 kfree(p);
517 pr_debug(" <- %s:%d failed\n", __func__, __LINE__);
499 return result; 518 return result;
500} 519}
501 520
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index 3a58ffabccd9..a4d49dd9e8a9 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -649,7 +649,7 @@ static int dma_sb_region_create(struct ps3_dma_region *r)
649{ 649{
650 int result; 650 int result;
651 651
652 pr_info(" -> %s:%d:\n", __func__, __LINE__); 652 DBG(" -> %s:%d:\n", __func__, __LINE__);
653 653
654 BUG_ON(!r); 654 BUG_ON(!r);
655 655
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c
index 77bc330263c4..35f3e85cf60e 100644
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -23,7 +23,6 @@
23#include <linux/fs.h> 23#include <linux/fs.h>
24#include <linux/root_dev.h> 24#include <linux/root_dev.h>
25#include <linux/console.h> 25#include <linux/console.h>
26#include <linux/kexec.h>
27#include <linux/bootmem.h> 26#include <linux/bootmem.h>
28 27
29#include <asm/machdep.h> 28#include <asm/machdep.h>
@@ -42,6 +41,10 @@
42#define DBG pr_debug 41#define DBG pr_debug
43#endif 42#endif
44 43
44/* mutex synchronizing GPU accesses and video mode changes */
45DEFINE_MUTEX(ps3_gpu_mutex);
46EXPORT_SYMBOL_GPL(ps3_gpu_mutex);
47
45#if !defined(CONFIG_SMP) 48#if !defined(CONFIG_SMP)
46static void smp_send_stop(void) {} 49static void smp_send_stop(void) {}
47#endif 50#endif
@@ -277,8 +280,5 @@ define_machine(ps3) {
277 .halt = ps3_halt, 280 .halt = ps3_halt,
278#if defined(CONFIG_KEXEC) 281#if defined(CONFIG_KEXEC)
279 .kexec_cpu_down = ps3_kexec_cpu_down, 282 .kexec_cpu_down = ps3_kexec_cpu_down,
280 .machine_kexec = default_machine_kexec,
281 .machine_kexec_prepare = default_machine_kexec_prepare,
282 .machine_crash_shutdown = default_machine_crash_shutdown,
283#endif 283#endif
284}; 284};
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 661e9f77ebf6..ee0d22911621 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -31,7 +31,7 @@
31#include "platform.h" 31#include "platform.h"
32 32
33static struct device ps3_system_bus = { 33static struct device ps3_system_bus = {
34 .bus_id = "ps3_system", 34 .init_name = "ps3_system",
35}; 35};
36 36
37/* FIXME: need device usage counters! */ 37/* FIXME: need device usage counters! */
@@ -175,7 +175,7 @@ int ps3_open_hv_device(struct ps3_system_bus_device *dev)
175 return ps3_open_hv_device_sb(dev); 175 return ps3_open_hv_device_sb(dev);
176 176
177 case PS3_MATCH_ID_SOUND: 177 case PS3_MATCH_ID_SOUND:
178 case PS3_MATCH_ID_GRAPHICS: 178 case PS3_MATCH_ID_GPU:
179 return ps3_open_hv_device_gpu(dev); 179 return ps3_open_hv_device_gpu(dev);
180 180
181 case PS3_MATCH_ID_AV_SETTINGS: 181 case PS3_MATCH_ID_AV_SETTINGS:
@@ -213,7 +213,7 @@ int ps3_close_hv_device(struct ps3_system_bus_device *dev)
213 return ps3_close_hv_device_sb(dev); 213 return ps3_close_hv_device_sb(dev);
214 214
215 case PS3_MATCH_ID_SOUND: 215 case PS3_MATCH_ID_SOUND:
216 case PS3_MATCH_ID_GRAPHICS: 216 case PS3_MATCH_ID_GPU:
217 return ps3_close_hv_device_gpu(dev); 217 return ps3_close_hv_device_gpu(dev);
218 218
219 case PS3_MATCH_ID_AV_SETTINGS: 219 case PS3_MATCH_ID_AV_SETTINGS:
@@ -356,12 +356,12 @@ static int ps3_system_bus_match(struct device *_dev,
356 if (result) 356 if (result)
357 pr_info("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): match\n", 357 pr_info("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): match\n",
358 __func__, __LINE__, 358 __func__, __LINE__,
359 dev->match_id, dev->match_sub_id, dev->core.bus_id, 359 dev->match_id, dev->match_sub_id, dev_name(&dev->core),
360 drv->match_id, drv->match_sub_id, drv->core.name); 360 drv->match_id, drv->match_sub_id, drv->core.name);
361 else 361 else
362 pr_debug("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): miss\n", 362 pr_debug("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): miss\n",
363 __func__, __LINE__, 363 __func__, __LINE__,
364 dev->match_id, dev->match_sub_id, dev->core.bus_id, 364 dev->match_id, dev->match_sub_id, dev_name(&dev->core),
365 drv->match_id, drv->match_sub_id, drv->core.name); 365 drv->match_id, drv->match_sub_id, drv->core.name);
366 366
367 return result; 367 return result;
@@ -383,9 +383,9 @@ static int ps3_system_bus_probe(struct device *_dev)
383 result = drv->probe(dev); 383 result = drv->probe(dev);
384 else 384 else
385 pr_debug("%s:%d: %s no probe method\n", __func__, __LINE__, 385 pr_debug("%s:%d: %s no probe method\n", __func__, __LINE__,
386 dev->core.bus_id); 386 dev_name(&dev->core));
387 387
388 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); 388 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core));
389 return result; 389 return result;
390} 390}
391 391
@@ -407,7 +407,7 @@ static int ps3_system_bus_remove(struct device *_dev)
407 dev_dbg(&dev->core, "%s:%d %s: no remove method\n", 407 dev_dbg(&dev->core, "%s:%d %s: no remove method\n",
408 __func__, __LINE__, drv->core.name); 408 __func__, __LINE__, drv->core.name);
409 409
410 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); 410 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core));
411 return result; 411 return result;
412} 412}
413 413
@@ -432,7 +432,7 @@ static void ps3_system_bus_shutdown(struct device *_dev)
432 BUG_ON(!drv); 432 BUG_ON(!drv);
433 433
434 dev_dbg(&dev->core, "%s:%d: %s -> %s\n", __func__, __LINE__, 434 dev_dbg(&dev->core, "%s:%d: %s -> %s\n", __func__, __LINE__,
435 dev->core.bus_id, drv->core.name); 435 dev_name(&dev->core), drv->core.name);
436 436
437 if (drv->shutdown) 437 if (drv->shutdown)
438 drv->shutdown(dev); 438 drv->shutdown(dev);
@@ -453,7 +453,8 @@ static int ps3_system_bus_uevent(struct device *_dev, struct kobj_uevent_env *en
453{ 453{
454 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 454 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
455 455
456 if (add_uevent_var(env, "MODALIAS=ps3:%d", dev->match_id)) 456 if (add_uevent_var(env, "MODALIAS=ps3:%d:%d", dev->match_id,
457 dev->match_sub_id))
457 return -ENOMEM; 458 return -ENOMEM;
458 return 0; 459 return 0;
459} 460}
@@ -462,7 +463,8 @@ static ssize_t modalias_show(struct device *_dev, struct device_attribute *a,
462 char *buf) 463 char *buf)
463{ 464{
464 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 465 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
465 int len = snprintf(buf, PAGE_SIZE, "ps3:%d\n", dev->match_id); 466 int len = snprintf(buf, PAGE_SIZE, "ps3:%d:%d\n", dev->match_id,
467 dev->match_sub_id);
466 468
467 return (len >= PAGE_SIZE) ? (PAGE_SIZE - 1) : len; 469 return (len >= PAGE_SIZE) ? (PAGE_SIZE - 1) : len;
468} 470}
@@ -742,22 +744,18 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
742 switch (dev->dev_type) { 744 switch (dev->dev_type) {
743 case PS3_DEVICE_TYPE_IOC0: 745 case PS3_DEVICE_TYPE_IOC0:
744 dev->core.archdata.dma_ops = &ps3_ioc0_dma_ops; 746 dev->core.archdata.dma_ops = &ps3_ioc0_dma_ops;
745 snprintf(dev->core.bus_id, sizeof(dev->core.bus_id), 747 dev_set_name(&dev->core, "ioc0_%02x", ++dev_ioc0_count);
746 "ioc0_%02x", ++dev_ioc0_count);
747 break; 748 break;
748 case PS3_DEVICE_TYPE_SB: 749 case PS3_DEVICE_TYPE_SB:
749 dev->core.archdata.dma_ops = &ps3_sb_dma_ops; 750 dev->core.archdata.dma_ops = &ps3_sb_dma_ops;
750 snprintf(dev->core.bus_id, sizeof(dev->core.bus_id), 751 dev_set_name(&dev->core, "sb_%02x", ++dev_sb_count);
751 "sb_%02x", ++dev_sb_count);
752 752
753 break; 753 break;
754 case PS3_DEVICE_TYPE_VUART: 754 case PS3_DEVICE_TYPE_VUART:
755 snprintf(dev->core.bus_id, sizeof(dev->core.bus_id), 755 dev_set_name(&dev->core, "vuart_%02x", ++dev_vuart_count);
756 "vuart_%02x", ++dev_vuart_count);
757 break; 756 break;
758 case PS3_DEVICE_TYPE_LPM: 757 case PS3_DEVICE_TYPE_LPM:
759 snprintf(dev->core.bus_id, sizeof(dev->core.bus_id), 758 dev_set_name(&dev->core, "lpm_%02x", ++dev_lpm_count);
760 "lpm_%02x", ++dev_lpm_count);
761 break; 759 break;
762 default: 760 default:
763 BUG(); 761 BUG();
@@ -766,7 +764,7 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
766 dev->core.archdata.of_node = NULL; 764 dev->core.archdata.of_node = NULL;
767 set_dev_node(&dev->core, 0); 765 set_dev_node(&dev->core, 0);
768 766
769 pr_debug("%s:%d add %s\n", __func__, __LINE__, dev->core.bus_id); 767 pr_debug("%s:%d add %s\n", __func__, __LINE__, dev_name(&dev->core));
770 768
771 result = device_register(&dev->core); 769 result = device_register(&dev->core);
772 return result; 770 return result;
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 97619fd51e39..ddc2a307cd50 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -54,7 +54,7 @@ config PPC_SMLPAR
54 54
55config CMM 55config CMM
56 tristate "Collaborative memory management" 56 tristate "Collaborative memory management"
57 depends on PPC_SMLPAR 57 depends on PPC_SMLPAR && !CRASH_DUMP
58 default y 58 default y
59 help 59 help
60 Select this option, if you want to enable the kernel interface 60 Select this option, if you want to enable the kernel interface
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index 5cd4d2761620..6567439fe78d 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -28,6 +28,7 @@
28#include <linux/kthread.h> 28#include <linux/kthread.h>
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/oom.h> 30#include <linux/oom.h>
31#include <linux/reboot.h>
31#include <linux/sched.h> 32#include <linux/sched.h>
32#include <linux/stringify.h> 33#include <linux/stringify.h>
33#include <linux/swap.h> 34#include <linux/swap.h>
@@ -384,6 +385,26 @@ static void cmm_unregister_sysfs(struct sys_device *sysdev)
384} 385}
385 386
386/** 387/**
388 * cmm_reboot_notifier - Make sure pages are not still marked as "loaned"
389 *
390 **/
391static int cmm_reboot_notifier(struct notifier_block *nb,
392 unsigned long action, void *unused)
393{
394 if (action == SYS_RESTART) {
395 if (cmm_thread_ptr)
396 kthread_stop(cmm_thread_ptr);
397 cmm_thread_ptr = NULL;
398 cmm_free_pages(loaned_pages);
399 }
400 return NOTIFY_DONE;
401}
402
403static struct notifier_block cmm_reboot_nb = {
404 .notifier_call = cmm_reboot_notifier,
405};
406
407/**
387 * cmm_init - Module initialization 408 * cmm_init - Module initialization
388 * 409 *
389 * Return value: 410 * Return value:
@@ -399,9 +420,12 @@ static int cmm_init(void)
399 if ((rc = register_oom_notifier(&cmm_oom_nb)) < 0) 420 if ((rc = register_oom_notifier(&cmm_oom_nb)) < 0)
400 return rc; 421 return rc;
401 422
402 if ((rc = cmm_sysfs_register(&cmm_sysdev))) 423 if ((rc = register_reboot_notifier(&cmm_reboot_nb)))
403 goto out_oom_notifier; 424 goto out_oom_notifier;
404 425
426 if ((rc = cmm_sysfs_register(&cmm_sysdev)))
427 goto out_reboot_notifier;
428
405 if (cmm_disabled) 429 if (cmm_disabled)
406 return rc; 430 return rc;
407 431
@@ -415,6 +439,8 @@ static int cmm_init(void)
415 439
416out_unregister_sysfs: 440out_unregister_sysfs:
417 cmm_unregister_sysfs(&cmm_sysdev); 441 cmm_unregister_sysfs(&cmm_sysdev);
442out_reboot_notifier:
443 unregister_reboot_notifier(&cmm_reboot_nb);
418out_oom_notifier: 444out_oom_notifier:
419 unregister_oom_notifier(&cmm_oom_nb); 445 unregister_oom_notifier(&cmm_oom_nb);
420 return rc; 446 return rc;
@@ -431,6 +457,7 @@ static void cmm_exit(void)
431 if (cmm_thread_ptr) 457 if (cmm_thread_ptr)
432 kthread_stop(cmm_thread_ptr); 458 kthread_stop(cmm_thread_ptr);
433 unregister_oom_notifier(&cmm_oom_nb); 459 unregister_oom_notifier(&cmm_oom_nb);
460 unregister_reboot_notifier(&cmm_reboot_nb);
434 cmm_free_pages(loaned_pages); 461 cmm_free_pages(loaned_pages);
435 cmm_unregister_sysfs(&cmm_sysdev); 462 cmm_unregister_sysfs(&cmm_sysdev);
436} 463}
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 54816d75b578..989d6462c154 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -21,6 +21,8 @@
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com> 21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
22 */ 22 */
23 23
24#undef DEBUG
25
24#include <linux/delay.h> 26#include <linux/delay.h>
25#include <linux/init.h> 27#include <linux/init.h>
26#include <linux/list.h> 28#include <linux/list.h>
@@ -488,10 +490,8 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
488 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) || 490 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
489 pdn->eeh_mode & EEH_MODE_NOCHECK) { 491 pdn->eeh_mode & EEH_MODE_NOCHECK) {
490 ignored_check++; 492 ignored_check++;
491#ifdef DEBUG 493 pr_debug("EEH: Ignored check (%x) for %s %s\n",
492 printk ("EEH:ignored check (%x) for %s %s\n", 494 pdn->eeh_mode, pci_name (dev), dn->full_name);
493 pdn->eeh_mode, pci_name (dev), dn->full_name);
494#endif
495 return 0; 495 return 0;
496 } 496 }
497 497
@@ -1014,10 +1014,9 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
1014 eeh_subsystem_enabled = 1; 1014 eeh_subsystem_enabled = 1;
1015 pdn->eeh_mode |= EEH_MODE_SUPPORTED; 1015 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
1016 1016
1017#ifdef DEBUG 1017 pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
1018 printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n", 1018 dn->full_name, pdn->eeh_config_addr,
1019 dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr); 1019 pdn->eeh_pe_config_addr);
1020#endif
1021 } else { 1020 } else {
1022 1021
1023 /* This device doesn't support EEH, but it may have an 1022 /* This device doesn't support EEH, but it may have an
@@ -1161,13 +1160,17 @@ static void eeh_add_device_late(struct pci_dev *dev)
1161 if (!dev || !eeh_subsystem_enabled) 1160 if (!dev || !eeh_subsystem_enabled)
1162 return; 1161 return;
1163 1162
1164#ifdef DEBUG 1163 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1165 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
1166#endif
1167 1164
1168 pci_dev_get (dev);
1169 dn = pci_device_to_OF_node(dev); 1165 dn = pci_device_to_OF_node(dev);
1170 pdn = PCI_DN(dn); 1166 pdn = PCI_DN(dn);
1167 if (pdn->pcidev == dev) {
1168 pr_debug("EEH: Already referenced !\n");
1169 return;
1170 }
1171 WARN_ON(pdn->pcidev);
1172
1173 pci_dev_get (dev);
1171 pdn->pcidev = dev; 1174 pdn->pcidev = dev;
1172 1175
1173 pci_addr_cache_insert_device(dev); 1176 pci_addr_cache_insert_device(dev);
@@ -1206,17 +1209,18 @@ static void eeh_remove_device(struct pci_dev *dev)
1206 return; 1209 return;
1207 1210
1208 /* Unregister the device with the EEH/PCI address search system */ 1211 /* Unregister the device with the EEH/PCI address search system */
1209#ifdef DEBUG 1212 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1210 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
1211#endif
1212 pci_addr_cache_remove_device(dev);
1213 eeh_sysfs_remove_device(dev);
1214 1213
1215 dn = pci_device_to_OF_node(dev); 1214 dn = pci_device_to_OF_node(dev);
1216 if (PCI_DN(dn)->pcidev) { 1215 if (PCI_DN(dn)->pcidev == NULL) {
1217 PCI_DN(dn)->pcidev = NULL; 1216 pr_debug("EEH: Not referenced !\n");
1218 pci_dev_put (dev); 1217 return;
1219 } 1218 }
1219 PCI_DN(dn)->pcidev = NULL;
1220 pci_dev_put (dev);
1221
1222 pci_addr_cache_remove_device(dev);
1223 eeh_sysfs_remove_device(dev);
1220} 1224}
1221 1225
1222void eeh_remove_bus_device(struct pci_dev *dev) 1226void eeh_remove_bus_device(struct pci_dev *dev)
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 1f032483c026..a20ead87153d 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -116,7 +116,7 @@ static void pseries_cpu_die(unsigned int cpu)
116 cpu_status = query_cpu_stopped(pcpu); 116 cpu_status = query_cpu_stopped(pcpu);
117 if (cpu_status == 0 || cpu_status == -1) 117 if (cpu_status == 0 || cpu_status == -1)
118 break; 118 break;
119 msleep(200); 119 cpu_relax();
120 } 120 }
121 if (cpu_status != 0) { 121 if (cpu_status != 0) {
122 printk("Querying DEAD? cpu %i (%i) shows %i\n", 122 printk("Querying DEAD? cpu %i (%i) shows %i\n",
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 7190493e9bdc..5e1ed3d60ee5 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -25,6 +25,8 @@
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */ 26 */
27 27
28#undef DEBUG
29
28#include <linux/pci.h> 30#include <linux/pci.h>
29#include <asm/pci-bridge.h> 31#include <asm/pci-bridge.h>
30#include <asm/ppc-pci.h> 32#include <asm/ppc-pci.h>
@@ -69,74 +71,25 @@ EXPORT_SYMBOL_GPL(pcibios_find_pci_bus);
69 * Remove all of the PCI devices under this bus both from the 71 * Remove all of the PCI devices under this bus both from the
70 * linux pci device tree, and from the powerpc EEH address cache. 72 * linux pci device tree, and from the powerpc EEH address cache.
71 */ 73 */
72void 74void pcibios_remove_pci_devices(struct pci_bus *bus)
73pcibios_remove_pci_devices(struct pci_bus *bus)
74{ 75{
75 struct pci_dev *dev, *tmp; 76 struct pci_dev *dev, *tmp;
77 struct pci_bus *child_bus;
78
79 /* First go down child busses */
80 list_for_each_entry(child_bus, &bus->children, node)
81 pcibios_remove_pci_devices(child_bus);
76 82
83 pr_debug("PCI: Removing devices on bus %04x:%02x\n",
84 pci_domain_nr(bus), bus->number);
77 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) { 85 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
86 pr_debug(" * Removing %s...\n", pci_name(dev));
78 eeh_remove_bus_device(dev); 87 eeh_remove_bus_device(dev);
79 pci_remove_bus_device(dev); 88 pci_remove_bus_device(dev);
80 } 89 }
81} 90}
82EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices); 91EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
83 92
84/* Must be called before pci_bus_add_devices */
85void
86pcibios_fixup_new_pci_devices(struct pci_bus *bus)
87{
88 struct pci_dev *dev;
89
90 list_for_each_entry(dev, &bus->devices, bus_list) {
91 /* Skip already-added devices */
92 if (!dev->is_added) {
93 int i;
94
95 /* Fill device archdata and setup iommu table */
96 pcibios_setup_new_device(dev);
97
98 pci_read_irq_line(dev);
99 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
100 struct resource *r = &dev->resource[i];
101
102 if (r->parent || !r->start || !r->flags)
103 continue;
104 pci_claim_resource(dev, i);
105 }
106 }
107 }
108}
109EXPORT_SYMBOL_GPL(pcibios_fixup_new_pci_devices);
110
111static int
112pcibios_pci_config_bridge(struct pci_dev *dev)
113{
114 u8 sec_busno;
115 struct pci_bus *child_bus;
116
117 /* Get busno of downstream bus */
118 pci_read_config_byte(dev, PCI_SECONDARY_BUS, &sec_busno);
119
120 /* Add to children of PCI bridge dev->bus */
121 child_bus = pci_add_new_bus(dev->bus, dev, sec_busno);
122 if (!child_bus) {
123 printk (KERN_ERR "%s: could not add second bus\n", __func__);
124 return -EIO;
125 }
126 sprintf(child_bus->name, "PCI Bus #%02x", child_bus->number);
127
128 pci_scan_child_bus(child_bus);
129
130 /* Fixup new pci devices */
131 pcibios_fixup_new_pci_devices(child_bus);
132
133 /* Make the discovered devices available */
134 pci_bus_add_devices(child_bus);
135
136 eeh_add_device_tree_late(child_bus);
137 return 0;
138}
139
140/** 93/**
141 * pcibios_add_pci_devices - adds new pci devices to bus 94 * pcibios_add_pci_devices - adds new pci devices to bus
142 * 95 *
@@ -147,10 +100,9 @@ pcibios_pci_config_bridge(struct pci_dev *dev)
147 * is how this routine differs from other, similar pcibios 100 * is how this routine differs from other, similar pcibios
148 * routines.) 101 * routines.)
149 */ 102 */
150void 103void pcibios_add_pci_devices(struct pci_bus * bus)
151pcibios_add_pci_devices(struct pci_bus * bus)
152{ 104{
153 int slotno, num, mode; 105 int slotno, num, mode, pass, max;
154 struct pci_dev *dev; 106 struct pci_dev *dev;
155 struct device_node *dn = pci_bus_to_OF_node(bus); 107 struct device_node *dn = pci_bus_to_OF_node(bus);
156 108
@@ -162,26 +114,23 @@ pcibios_add_pci_devices(struct pci_bus * bus)
162 114
163 if (mode == PCI_PROBE_DEVTREE) { 115 if (mode == PCI_PROBE_DEVTREE) {
164 /* use ofdt-based probe */ 116 /* use ofdt-based probe */
165 of_scan_bus(dn, bus); 117 of_rescan_bus(dn, bus);
166 if (!list_empty(&bus->devices)) {
167 pcibios_fixup_new_pci_devices(bus);
168 pci_bus_add_devices(bus);
169 eeh_add_device_tree_late(bus);
170 }
171 } else if (mode == PCI_PROBE_NORMAL) { 118 } else if (mode == PCI_PROBE_NORMAL) {
172 /* use legacy probe */ 119 /* use legacy probe */
173 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn); 120 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
174 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0)); 121 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
175 if (num) { 122 if (!num)
176 pcibios_fixup_new_pci_devices(bus); 123 return;
177 pci_bus_add_devices(bus); 124 pcibios_setup_bus_devices(bus);
178 eeh_add_device_tree_late(bus); 125 max = bus->secondary;
126 for (pass=0; pass < 2; pass++)
127 list_for_each_entry(dev, &bus->devices, bus_list) {
128 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
129 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
130 max = pci_scan_bridge(bus, dev, max, pass);
179 } 131 }
180
181 list_for_each_entry(dev, &bus->devices, bus_list)
182 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
183 pcibios_pci_config_bridge(dev);
184 } 132 }
133 pcibios_finish_adding_to_bus(bus);
185} 134}
186EXPORT_SYMBOL_GPL(pcibios_add_pci_devices); 135EXPORT_SYMBOL_GPL(pcibios_add_pci_devices);
187 136
@@ -190,6 +139,8 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
190 struct pci_controller *phb; 139 struct pci_controller *phb;
191 int primary; 140 int primary;
192 141
142 pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name);
143
193 primary = list_empty(&hose_list); 144 primary = list_empty(&hose_list);
194 phb = pcibios_alloc_controller(dn); 145 phb = pcibios_alloc_controller(dn);
195 if (!phb) 146 if (!phb)
@@ -203,11 +154,59 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
203 eeh_add_device_tree_early(dn); 154 eeh_add_device_tree_early(dn);
204 155
205 scan_phb(phb); 156 scan_phb(phb);
206 pcibios_allocate_bus_resources(phb->bus); 157 pcibios_finish_adding_to_bus(phb->bus);
207 pcibios_fixup_new_pci_devices(phb->bus);
208 pci_bus_add_devices(phb->bus);
209 eeh_add_device_tree_late(phb->bus);
210 158
211 return phb; 159 return phb;
212} 160}
213EXPORT_SYMBOL_GPL(init_phb_dynamic); 161EXPORT_SYMBOL_GPL(init_phb_dynamic);
162
163/* RPA-specific bits for removing PHBs */
164int remove_phb_dynamic(struct pci_controller *phb)
165{
166 struct pci_bus *b = phb->bus;
167 struct resource *res;
168 int rc, i;
169
170 pr_debug("PCI: Removing PHB %04x:%02x... \n",
171 pci_domain_nr(b), b->number);
172
173 /* We cannot to remove a root bus that has children */
174 if (!(list_empty(&b->children) && list_empty(&b->devices)))
175 return -EBUSY;
176
177 /* We -know- there aren't any child devices anymore at this stage
178 * and thus, we can safely unmap the IO space as it's not in use
179 */
180 res = &phb->io_resource;
181 if (res->flags & IORESOURCE_IO) {
182 rc = pcibios_unmap_io_space(b);
183 if (rc) {
184 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
185 __func__, b->name);
186 return 1;
187 }
188 }
189
190 /* Unregister the bridge device from sysfs and remove the PCI bus */
191 device_unregister(b->bridge);
192 phb->bus = NULL;
193 pci_remove_bus(b);
194
195 /* Now release the IO resource */
196 if (res->flags & IORESOURCE_IO)
197 release_resource(res);
198
199 /* Release memory resources */
200 for (i = 0; i < 3; ++i) {
201 res = &phb->mem_resources[i];
202 if (!(res->flags & IORESOURCE_MEM))
203 continue;
204 release_resource(res);
205 }
206
207 /* Free pci_controller data structure */
208 pcibios_free_controller(phb);
209
210 return 0;
211}
212EXPORT_SYMBOL_GPL(remove_phb_dynamic);
diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c
index edbc012c2ebc..6cf35cd8d0b5 100644
--- a/arch/powerpc/platforms/pseries/phyp_dump.c
+++ b/arch/powerpc/platforms/pseries/phyp_dump.c
@@ -130,6 +130,9 @@ static unsigned long init_dump_header(struct phyp_dump_header *ph)
130static void print_dump_header(const struct phyp_dump_header *ph) 130static void print_dump_header(const struct phyp_dump_header *ph)
131{ 131{
132#ifdef DEBUG 132#ifdef DEBUG
133 if (ph == NULL)
134 return;
135
133 printk(KERN_INFO "dump header:\n"); 136 printk(KERN_INFO "dump header:\n");
134 /* setup some ph->sections required */ 137 /* setup some ph->sections required */
135 printk(KERN_INFO "version = %d\n", ph->version); 138 printk(KERN_INFO "version = %d\n", ph->version);
@@ -411,6 +414,8 @@ static int __init phyp_dump_setup(void)
411 of_node_put(rtas); 414 of_node_put(rtas);
412 } 415 }
413 416
417 ibm_configure_kernel_dump = rtas_token("ibm,configure-kernel-dump");
418
414 print_dump_header(dump_header); 419 print_dump_header(dump_header);
415 dump_area_length = init_dump_header(&phdr); 420 dump_area_length = init_dump_header(&phdr);
416 /* align down */ 421 /* align down */
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 424b335a71c8..84e058f1e1cc 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -579,7 +579,7 @@ static void xics_update_irq_servers(void)
579 int i, j; 579 int i, j;
580 struct device_node *np; 580 struct device_node *np;
581 u32 ilen; 581 u32 ilen;
582 const u32 *ireg, *isize; 582 const u32 *ireg;
583 u32 hcpuid; 583 u32 hcpuid;
584 584
585 /* Find the server numbers for the boot cpu. */ 585 /* Find the server numbers for the boot cpu. */
@@ -607,11 +607,6 @@ static void xics_update_irq_servers(void)
607 } 607 }
608 } 608 }
609 609
610 /* get the bit size of server numbers */
611 isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
612 if (isize)
613 interrupt_server_size = *isize;
614
615 of_node_put(np); 610 of_node_put(np);
616} 611}
617 612
@@ -682,6 +677,7 @@ void __init xics_init_IRQ(void)
682 struct device_node *np; 677 struct device_node *np;
683 u32 indx = 0; 678 u32 indx = 0;
684 int found = 0; 679 int found = 0;
680 const u32 *isize;
685 681
686 ppc64_boot_msg(0x20, "XICS Init"); 682 ppc64_boot_msg(0x20, "XICS Init");
687 683
@@ -701,6 +697,26 @@ void __init xics_init_IRQ(void)
701 if (found == 0) 697 if (found == 0)
702 return; 698 return;
703 699
700 /* get the bit size of server numbers */
701 found = 0;
702
703 for_each_compatible_node(np, NULL, "ibm,ppc-xics") {
704 isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
705
706 if (!isize)
707 continue;
708
709 if (!found) {
710 interrupt_server_size = *isize;
711 found = 1;
712 } else if (*isize != interrupt_server_size) {
713 printk(KERN_WARNING "XICS: "
714 "mismatched ibm,interrupt-server#-size\n");
715 interrupt_server_size = max(*isize,
716 interrupt_server_size);
717 }
718 }
719
704 xics_update_irq_servers(); 720 xics_update_irq_servers();
705 xics_init_host(); 721 xics_init_host();
706 722
@@ -728,9 +744,18 @@ static void xics_set_cpu_priority(unsigned char cppr)
728/* Have the calling processor join or leave the specified global queue */ 744/* Have the calling processor join or leave the specified global queue */
729static void xics_set_cpu_giq(unsigned int gserver, unsigned int join) 745static void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
730{ 746{
731 int status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, 747 int index;
732 (1UL << interrupt_server_size) - 1 - gserver, join); 748 int status;
733 WARN_ON(status < 0); 749
750 if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
751 return;
752
753 index = (1UL << interrupt_server_size) - 1 - gserver;
754
755 status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
756
757 WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
758 GLOBAL_INTERRUPT_QUEUE, index, join, status);
734} 759}
735 760
736void xics_setup_cpu(void) 761void xics_setup_cpu(void)
diff --git a/arch/powerpc/sysdev/bestcomm/ata.c b/arch/powerpc/sysdev/bestcomm/ata.c
index 1f5258fb38c3..901c9f91e5dd 100644
--- a/arch/powerpc/sysdev/bestcomm/ata.c
+++ b/arch/powerpc/sysdev/bestcomm/ata.c
@@ -61,6 +61,9 @@ bcom_ata_init(int queue_len, int maxbufsize)
61 struct bcom_ata_var *var; 61 struct bcom_ata_var *var;
62 struct bcom_ata_inc *inc; 62 struct bcom_ata_inc *inc;
63 63
64 /* Prefetch breaks ATA DMA. Turn it off for ATA DMA */
65 bcom_disable_prefetch();
66
64 tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_ata_bd), 0); 67 tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_ata_bd), 0);
65 if (!tsk) 68 if (!tsk)
66 return NULL; 69 return NULL;
diff --git a/arch/powerpc/sysdev/bestcomm/ata.h b/arch/powerpc/sysdev/bestcomm/ata.h
index 10982769c465..0b2371811334 100644
--- a/arch/powerpc/sysdev/bestcomm/ata.h
+++ b/arch/powerpc/sysdev/bestcomm/ata.h
@@ -16,22 +16,15 @@
16 16
17struct bcom_ata_bd { 17struct bcom_ata_bd {
18 u32 status; 18 u32 status;
19 u32 dst_pa;
20 u32 src_pa; 19 u32 src_pa;
20 u32 dst_pa;
21}; 21};
22 22
23extern struct bcom_task * 23extern struct bcom_task * bcom_ata_init(int queue_len, int maxbufsize);
24bcom_ata_init(int queue_len, int maxbufsize); 24extern void bcom_ata_rx_prepare(struct bcom_task *tsk);
25 25extern void bcom_ata_tx_prepare(struct bcom_task *tsk);
26extern void 26extern void bcom_ata_reset_bd(struct bcom_task *tsk);
27bcom_ata_rx_prepare(struct bcom_task *tsk); 27extern void bcom_ata_release(struct bcom_task *tsk);
28
29extern void
30bcom_ata_tx_prepare(struct bcom_task *tsk);
31
32extern void
33bcom_ata_reset_bd(struct bcom_task *tsk);
34
35 28
36#endif /* __BESTCOMM_ATA_H__ */ 29#endif /* __BESTCOMM_ATA_H__ */
37 30
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c
index 446c9ea85b30..378ebd9aac18 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
@@ -279,7 +279,6 @@ bcom_engine_init(void)
279 int task; 279 int task;
280 phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa; 280 phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
281 unsigned int tdt_size, ctx_size, var_size, fdt_size; 281 unsigned int tdt_size, ctx_size, var_size, fdt_size;
282 u16 regval;
283 282
284 /* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */ 283 /* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */
285 tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt); 284 tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
@@ -331,10 +330,8 @@ bcom_engine_init(void)
331 out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS); 330 out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
332 331
333 /* Disable COMM Bus Prefetch on the original 5200; it's broken */ 332 /* Disable COMM Bus Prefetch on the original 5200; it's broken */
334 if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) { 333 if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR)
335 regval = in_be16(&bcom_eng->regs->PtdCntrl); 334 bcom_disable_prefetch();
336 out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
337 }
338 335
339 /* Init lock */ 336 /* Init lock */
340 spin_lock_init(&bcom_eng->lock); 337 spin_lock_init(&bcom_eng->lock);
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.h b/arch/powerpc/sysdev/bestcomm/bestcomm.h
index c960a8b49655..23a95f80dfdb 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.h
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.h
@@ -16,8 +16,19 @@
16#ifndef __BESTCOMM_H__ 16#ifndef __BESTCOMM_H__
17#define __BESTCOMM_H__ 17#define __BESTCOMM_H__
18 18
19struct bcom_bd; /* defined later on ... */ 19/**
20 20 * struct bcom_bd - Structure describing a generic BestComm buffer descriptor
21 * @status: The current status of this buffer. Exact meaning depends on the
22 * task type
23 * @data: An array of u32 extra data. Size of array is task dependant.
24 *
25 * Note: Don't dereference a bcom_bd pointer as an array. The size of the
26 * bcom_bd is variable. Use bcom_get_bd() instead.
27 */
28struct bcom_bd {
29 u32 status;
30 u32 data[0]; /* variable payload size */
31};
21 32
22/* ======================================================================== */ 33/* ======================================================================== */
23/* Generic task management */ 34/* Generic task management */
@@ -84,17 +95,6 @@ bcom_get_task_irq(struct bcom_task *tsk) {
84/* BD based tasks helpers */ 95/* BD based tasks helpers */
85/* ======================================================================== */ 96/* ======================================================================== */
86 97
87/**
88 * struct bcom_bd - Structure describing a generic BestComm buffer descriptor
89 * @status: The current status of this buffer. Exact meaning depends on the
90 * task type
91 * @data: An array of u32 whose meaning depends on the task type.
92 */
93struct bcom_bd {
94 u32 status;
95 u32 data[1]; /* variable, but at least 1 */
96};
97
98#define BCOM_BD_READY 0x40000000ul 98#define BCOM_BD_READY 0x40000000ul
99 99
100/** _bcom_next_index - Get next input index. 100/** _bcom_next_index - Get next input index.
@@ -140,15 +140,31 @@ bcom_queue_full(struct bcom_task *tsk)
140} 140}
141 141
142/** 142/**
143 * bcom_get_bd - Get a BD from the queue
144 * @tsk: The BestComm task structure
145 * index: Index of the BD to fetch
146 */
147static inline struct bcom_bd
148*bcom_get_bd(struct bcom_task *tsk, unsigned int index)
149{
150 /* A cast to (void*) so the address can be incremented by the
151 * real size instead of by sizeof(struct bcom_bd) */
152 return ((void *)tsk->bd) + (index * tsk->bd_size);
153}
154
155/**
143 * bcom_buffer_done - Checks if a BestComm 156 * bcom_buffer_done - Checks if a BestComm
144 * @tsk: The BestComm task structure 157 * @tsk: The BestComm task structure
145 */ 158 */
146static inline int 159static inline int
147bcom_buffer_done(struct bcom_task *tsk) 160bcom_buffer_done(struct bcom_task *tsk)
148{ 161{
162 struct bcom_bd *bd;
149 if (bcom_queue_empty(tsk)) 163 if (bcom_queue_empty(tsk))
150 return 0; 164 return 0;
151 return !(tsk->bd[tsk->outdex].status & BCOM_BD_READY); 165
166 bd = bcom_get_bd(tsk, tsk->outdex);
167 return !(bd->status & BCOM_BD_READY);
152} 168}
153 169
154/** 170/**
@@ -160,16 +176,21 @@ bcom_buffer_done(struct bcom_task *tsk)
160static inline struct bcom_bd * 176static inline struct bcom_bd *
161bcom_prepare_next_buffer(struct bcom_task *tsk) 177bcom_prepare_next_buffer(struct bcom_task *tsk)
162{ 178{
163 tsk->bd[tsk->index].status = 0; /* cleanup last status */ 179 struct bcom_bd *bd;
164 return &tsk->bd[tsk->index]; 180
181 bd = bcom_get_bd(tsk, tsk->index);
182 bd->status = 0; /* cleanup last status */
183 return bd;
165} 184}
166 185
167static inline void 186static inline void
168bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie) 187bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie)
169{ 188{
189 struct bcom_bd *bd = bcom_get_bd(tsk, tsk->index);
190
170 tsk->cookie[tsk->index] = cookie; 191 tsk->cookie[tsk->index] = cookie;
171 mb(); /* ensure the bd is really up-to-date */ 192 mb(); /* ensure the bd is really up-to-date */
172 tsk->bd[tsk->index].status |= BCOM_BD_READY; 193 bd->status |= BCOM_BD_READY;
173 tsk->index = _bcom_next_index(tsk); 194 tsk->index = _bcom_next_index(tsk);
174 if (tsk->flags & BCOM_FLAGS_ENABLE_TASK) 195 if (tsk->flags & BCOM_FLAGS_ENABLE_TASK)
175 bcom_enable(tsk); 196 bcom_enable(tsk);
@@ -179,10 +200,12 @@ static inline void *
179bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd) 200bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd)
180{ 201{
181 void *cookie = tsk->cookie[tsk->outdex]; 202 void *cookie = tsk->cookie[tsk->outdex];
203 struct bcom_bd *bd = bcom_get_bd(tsk, tsk->outdex);
204
182 if (p_status) 205 if (p_status)
183 *p_status = tsk->bd[tsk->outdex].status; 206 *p_status = bd->status;
184 if (p_bd) 207 if (p_bd)
185 *p_bd = &tsk->bd[tsk->outdex]; 208 *p_bd = bd;
186 tsk->outdex = _bcom_next_outdex(tsk); 209 tsk->outdex = _bcom_next_outdex(tsk);
187 return cookie; 210 return cookie;
188} 211}
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
index 866a2915ef2f..eb0d1c883c31 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
@@ -198,8 +198,8 @@ struct bcom_task_header {
198#define BCOM_IPR_SCTMR_1 2 198#define BCOM_IPR_SCTMR_1 2
199#define BCOM_IPR_FEC_RX 6 199#define BCOM_IPR_FEC_RX 6
200#define BCOM_IPR_FEC_TX 5 200#define BCOM_IPR_FEC_TX 5
201#define BCOM_IPR_ATA_RX 4 201#define BCOM_IPR_ATA_RX 7
202#define BCOM_IPR_ATA_TX 3 202#define BCOM_IPR_ATA_TX 7
203#define BCOM_IPR_SCPCI_RX 2 203#define BCOM_IPR_SCPCI_RX 2
204#define BCOM_IPR_SCPCI_TX 2 204#define BCOM_IPR_SCPCI_TX 2
205#define BCOM_IPR_PSC3_RX 2 205#define BCOM_IPR_PSC3_RX 2
@@ -241,6 +241,22 @@ extern void bcom_set_initiator(int task, int initiator);
241 241
242#define TASK_ENABLE 0x8000 242#define TASK_ENABLE 0x8000
243 243
244/**
245 * bcom_disable_prefetch - Hook to disable bus prefetching
246 *
247 * ATA DMA and the original MPC5200 need this due to silicon bugs. At the
248 * moment disabling prefetch is a one-way street. There is no mechanism
249 * in place to turn prefetch back on after it has been disabled. There is
250 * no reason it couldn't be done, it would just be more complex to implement.
251 */
252static inline void bcom_disable_prefetch(void)
253{
254 u16 regval;
255
256 regval = in_be16(&bcom_eng->regs->PtdCntrl);
257 out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
258};
259
244static inline void 260static inline void
245bcom_enable_task(int task) 261bcom_enable_task(int task)
246{ 262{
diff --git a/arch/powerpc/sysdev/dcr-low.S b/arch/powerpc/sysdev/dcr-low.S
index 2078f39e2f17..d3098ef1404a 100644
--- a/arch/powerpc/sysdev/dcr-low.S
+++ b/arch/powerpc/sysdev/dcr-low.S
@@ -11,14 +11,20 @@
11 11
12#include <asm/ppc_asm.h> 12#include <asm/ppc_asm.h>
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/bug.h>
14 15
15#define DCR_ACCESS_PROLOG(table) \ 16#define DCR_ACCESS_PROLOG(table) \
17 cmpli cr0,r3,1024; \
16 rlwinm r3,r3,4,18,27; \ 18 rlwinm r3,r3,4,18,27; \
17 lis r5,table@h; \ 19 lis r5,table@h; \
18 ori r5,r5,table@l; \ 20 ori r5,r5,table@l; \
19 add r3,r3,r5; \ 21 add r3,r3,r5; \
22 bge- 1f; \
20 mtctr r3; \ 23 mtctr r3; \
21 bctr 24 bctr; \
251: trap; \
26 EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0; \
27 blr
22 28
23_GLOBAL(__mfdcr) 29_GLOBAL(__mfdcr)
24 DCR_ACCESS_PROLOG(__mfdcr_table) 30 DCR_ACCESS_PROLOG(__mfdcr_table)
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index a8ba9983dd5a..bb44aa9fd470 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -124,7 +124,8 @@ EXPORT_SYMBOL_GPL(dcr_write_generic);
124 124
125#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ 125#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
126 126
127unsigned int dcr_resource_start(struct device_node *np, unsigned int index) 127unsigned int dcr_resource_start(const struct device_node *np,
128 unsigned int index)
128{ 129{
129 unsigned int ds; 130 unsigned int ds;
130 const u32 *dr = of_get_property(np, "dcr-reg", &ds); 131 const u32 *dr = of_get_property(np, "dcr-reg", &ds);
@@ -136,7 +137,7 @@ unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
136} 137}
137EXPORT_SYMBOL_GPL(dcr_resource_start); 138EXPORT_SYMBOL_GPL(dcr_resource_start);
138 139
139unsigned int dcr_resource_len(struct device_node *np, unsigned int index) 140unsigned int dcr_resource_len(const struct device_node *np, unsigned int index)
140{ 141{
141 unsigned int ds; 142 unsigned int ds;
142 const u32 *dr = of_get_property(np, "dcr-reg", &ds); 143 const u32 *dr = of_get_property(np, "dcr-reg", &ds);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 5b264eb4b1f7..d5f9ae0f1b75 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -187,7 +187,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
187 printk(KERN_WARNING "Can't get bus-range for %s, assume" 187 printk(KERN_WARNING "Can't get bus-range for %s, assume"
188 " bus 0\n", dev->full_name); 188 " bus 0\n", dev->full_name);
189 189
190 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 190 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
191 hose = pcibios_alloc_controller(dev); 191 hose = pcibios_alloc_controller(dev);
192 if (!hose) 192 if (!hose)
193 return -ENOMEM; 193 return -ENOMEM;
@@ -300,7 +300,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
300 " bus 0\n", dev->full_name); 300 " bus 0\n", dev->full_name);
301 } 301 }
302 302
303 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 303 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
304 hose = pcibios_alloc_controller(dev); 304 hose = pcibios_alloc_controller(dev);
305 if (!hose) 305 if (!hose)
306 return -ENOMEM; 306 return -ENOMEM;
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 26ecb96f9731..115cb16351fd 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -207,236 +207,51 @@ static int __init of_add_fixed_phys(void)
207arch_initcall(of_add_fixed_phys); 207arch_initcall(of_add_fixed_phys);
208#endif /* CONFIG_FIXED_PHY */ 208#endif /* CONFIG_FIXED_PHY */
209 209
210static int gfar_mdio_of_init_one(struct device_node *np) 210#ifdef CONFIG_PPC_83xx
211{ 211static int __init mpc83xx_wdt_init(void)
212 int k;
213 struct device_node *child = NULL;
214 struct gianfar_mdio_data mdio_data;
215 struct platform_device *mdio_dev;
216 struct resource res;
217 int ret;
218
219 memset(&res, 0, sizeof(res));
220 memset(&mdio_data, 0, sizeof(mdio_data));
221
222 ret = of_address_to_resource(np, 0, &res);
223 if (ret)
224 return ret;
225
226 /* The gianfar device will try to use the same ID created below to find
227 * this bus, to coordinate register access (since they share). */
228 mdio_dev = platform_device_register_simple("fsl-gianfar_mdio",
229 res.start&0xfffff, &res, 1);
230 if (IS_ERR(mdio_dev))
231 return PTR_ERR(mdio_dev);
232
233 for (k = 0; k < 32; k++)
234 mdio_data.irq[k] = PHY_POLL;
235
236 while ((child = of_get_next_child(np, child)) != NULL) {
237 int irq = irq_of_parse_and_map(child, 0);
238 if (irq != NO_IRQ) {
239 const u32 *id = of_get_property(child, "reg", NULL);
240 mdio_data.irq[*id] = irq;
241 }
242 }
243
244 ret = platform_device_add_data(mdio_dev, &mdio_data,
245 sizeof(struct gianfar_mdio_data));
246 if (ret)
247 platform_device_unregister(mdio_dev);
248
249 return ret;
250}
251
252static int __init gfar_mdio_of_init(void)
253{
254 struct device_node *np = NULL;
255
256 for_each_compatible_node(np, NULL, "fsl,gianfar-mdio")
257 gfar_mdio_of_init_one(np);
258
259 /* try the deprecated version */
260 for_each_compatible_node(np, "mdio", "gianfar");
261 gfar_mdio_of_init_one(np);
262
263 return 0;
264}
265
266arch_initcall(gfar_mdio_of_init);
267
268static const char *gfar_tx_intr = "tx";
269static const char *gfar_rx_intr = "rx";
270static const char *gfar_err_intr = "error";
271
272static int __init gfar_of_init(void)
273{ 212{
213 struct resource r;
274 struct device_node *np; 214 struct device_node *np;
275 unsigned int i; 215 struct platform_device *dev;
276 struct platform_device *gfar_dev; 216 u32 freq = fsl_get_sys_freq();
277 struct resource res;
278 int ret; 217 int ret;
279 218
280 for (np = NULL, i = 0; 219 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
281 (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
282 i++) {
283 struct resource r[4];
284 struct device_node *phy, *mdio;
285 struct gianfar_platform_data gfar_data;
286 const unsigned int *id;
287 const char *model;
288 const char *ctype;
289 const void *mac_addr;
290 const phandle *ph;
291 int n_res = 2;
292
293 if (!of_device_is_available(np))
294 continue;
295
296 memset(r, 0, sizeof(r));
297 memset(&gfar_data, 0, sizeof(gfar_data));
298
299 ret = of_address_to_resource(np, 0, &r[0]);
300 if (ret)
301 goto err;
302
303 of_irq_to_resource(np, 0, &r[1]);
304
305 model = of_get_property(np, "model", NULL);
306
307 /* If we aren't the FEC we have multiple interrupts */
308 if (model && strcasecmp(model, "FEC")) {
309 r[1].name = gfar_tx_intr;
310
311 r[2].name = gfar_rx_intr;
312 of_irq_to_resource(np, 1, &r[2]);
313 220
314 r[3].name = gfar_err_intr; 221 if (!np) {
315 of_irq_to_resource(np, 2, &r[3]); 222 ret = -ENODEV;
316 223 goto nodev;
317 n_res += 2; 224 }
318 }
319
320 gfar_dev =
321 platform_device_register_simple("fsl-gianfar", i, &r[0],
322 n_res);
323
324 if (IS_ERR(gfar_dev)) {
325 ret = PTR_ERR(gfar_dev);
326 goto err;
327 }
328
329 mac_addr = of_get_mac_address(np);
330 if (mac_addr)
331 memcpy(gfar_data.mac_addr, mac_addr, 6);
332
333 if (model && !strcasecmp(model, "TSEC"))
334 gfar_data.device_flags =
335 FSL_GIANFAR_DEV_HAS_GIGABIT |
336 FSL_GIANFAR_DEV_HAS_COALESCE |
337 FSL_GIANFAR_DEV_HAS_RMON |
338 FSL_GIANFAR_DEV_HAS_MULTI_INTR;
339 if (model && !strcasecmp(model, "eTSEC"))
340 gfar_data.device_flags =
341 FSL_GIANFAR_DEV_HAS_GIGABIT |
342 FSL_GIANFAR_DEV_HAS_COALESCE |
343 FSL_GIANFAR_DEV_HAS_RMON |
344 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
345 FSL_GIANFAR_DEV_HAS_CSUM |
346 FSL_GIANFAR_DEV_HAS_VLAN |
347 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
348
349 ctype = of_get_property(np, "phy-connection-type", NULL);
350
351 /* We only care about rgmii-id. The rest are autodetected */
352 if (ctype && !strcmp(ctype, "rgmii-id"))
353 gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
354 else
355 gfar_data.interface = PHY_INTERFACE_MODE_MII;
356
357 if (of_get_property(np, "fsl,magic-packet", NULL))
358 gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
359
360 ph = of_get_property(np, "phy-handle", NULL);
361 if (ph == NULL) {
362 u32 *fixed_link;
363
364 fixed_link = (u32 *)of_get_property(np, "fixed-link",
365 NULL);
366 if (!fixed_link) {
367 ret = -ENODEV;
368 goto unreg;
369 }
370
371 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
372 gfar_data.phy_id = fixed_link[0];
373 } else {
374 phy = of_find_node_by_phandle(*ph);
375
376 if (phy == NULL) {
377 ret = -ENODEV;
378 goto unreg;
379 }
380
381 mdio = of_get_parent(phy);
382
383 id = of_get_property(phy, "reg", NULL);
384 ret = of_address_to_resource(mdio, 0, &res);
385 if (ret) {
386 of_node_put(phy);
387 of_node_put(mdio);
388 goto unreg;
389 }
390
391 gfar_data.phy_id = *id;
392 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
393 (unsigned long long)res.start&0xfffff);
394 225
395 of_node_put(phy); 226 memset(&r, 0, sizeof(r));
396 of_node_put(mdio);
397 }
398 227
399 /* Get MDIO bus controlled by this eTSEC, if any. Normally only 228 ret = of_address_to_resource(np, 0, &r);
400 * eTSEC 1 will control an MDIO bus, not necessarily the same 229 if (ret)
401 * bus that its PHY is on ('mdio' above), so we can't just use 230 goto err;
402 * that. What we do is look for a gianfar mdio device that has
403 * overlapping registers with this device. That's really the
404 * whole point, to find the device sharing our registers to
405 * coordinate access with it.
406 */
407 for_each_compatible_node(mdio, NULL, "fsl,gianfar-mdio") {
408 if (of_address_to_resource(mdio, 0, &res))
409 continue;
410
411 if (res.start >= r[0].start && res.end <= r[0].end) {
412 /* Get the ID the mdio bus platform device was
413 * registered with. gfar_data.bus_id is
414 * different because it's for finding a PHY,
415 * while this is for finding a MII bus.
416 */
417 gfar_data.mdio_bus = res.start&0xfffff;
418 of_node_put(mdio);
419 break;
420 }
421 }
422 231
423 ret = 232 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
424 platform_device_add_data(gfar_dev, &gfar_data, 233 if (IS_ERR(dev)) {
425 sizeof(struct 234 ret = PTR_ERR(dev);
426 gianfar_platform_data)); 235 goto err;
427 if (ret)
428 goto unreg;
429 } 236 }
430 237
238 ret = platform_device_add_data(dev, &freq, sizeof(freq));
239 if (ret)
240 goto unreg;
241
242 of_node_put(np);
431 return 0; 243 return 0;
432 244
433unreg: 245unreg:
434 platform_device_unregister(gfar_dev); 246 platform_device_unregister(dev);
435err: 247err:
248 of_node_put(np);
249nodev:
436 return ret; 250 return ret;
437} 251}
438 252
439arch_initcall(gfar_of_init); 253arch_initcall(mpc83xx_wdt_init);
254#endif
440 255
441static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) 256static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
442{ 257{
diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c
index d502927644c6..5da37c2f22ee 100644
--- a/arch/powerpc/sysdev/grackle.c
+++ b/arch/powerpc/sysdev/grackle.c
@@ -57,7 +57,7 @@ void __init setup_grackle(struct pci_controller *hose)
57{ 57{
58 setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); 58 setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
59 if (machine_is_compatible("PowerMac1,1")) 59 if (machine_is_compatible("PowerMac1,1"))
60 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; 60 ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS);
61 if (machine_is_compatible("AAPL,PowerBook1998")) 61 if (machine_is_compatible("AAPL,PowerBook1998"))
62 grackle_set_loop_snoop(hose, 1); 62 grackle_set_loop_snoop(hose, 1);
63#if 0 /* Disabled for now, HW problems ??? */ 63#if 0 /* Disabled for now, HW problems ??? */
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 5d7f9f0c93c3..3e0d89dcdba2 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -661,17 +661,6 @@ static inline void mpic_eoi(struct mpic *mpic)
661 (void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI)); 661 (void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI));
662} 662}
663 663
664#ifdef CONFIG_SMP
665static irqreturn_t mpic_ipi_action(int irq, void *data)
666{
667 long ipi = (long)data;
668
669 smp_message_recv(ipi);
670
671 return IRQ_HANDLED;
672}
673#endif /* CONFIG_SMP */
674
675/* 664/*
676 * Linux descriptor level callbacks 665 * Linux descriptor level callbacks
677 */ 666 */
@@ -1548,13 +1537,7 @@ unsigned int mpic_get_mcirq(void)
1548void mpic_request_ipis(void) 1537void mpic_request_ipis(void)
1549{ 1538{
1550 struct mpic *mpic = mpic_primary; 1539 struct mpic *mpic = mpic_primary;
1551 long i, err; 1540 int i;
1552 static char *ipi_names[] = {
1553 "IPI0 (call function)",
1554 "IPI1 (reschedule)",
1555 "IPI2 (call function single)",
1556 "IPI3 (debugger break)",
1557 };
1558 BUG_ON(mpic == NULL); 1541 BUG_ON(mpic == NULL);
1559 1542
1560 printk(KERN_INFO "mpic: requesting IPIs ... \n"); 1543 printk(KERN_INFO "mpic: requesting IPIs ... \n");
@@ -1563,17 +1546,10 @@ void mpic_request_ipis(void)
1563 unsigned int vipi = irq_create_mapping(mpic->irqhost, 1546 unsigned int vipi = irq_create_mapping(mpic->irqhost,
1564 mpic->ipi_vecs[0] + i); 1547 mpic->ipi_vecs[0] + i);
1565 if (vipi == NO_IRQ) { 1548 if (vipi == NO_IRQ) {
1566 printk(KERN_ERR "Failed to map IPI %ld\n", i); 1549 printk(KERN_ERR "Failed to map %s\n", smp_ipi_name[i]);
1567 break; 1550 continue;
1568 }
1569 err = request_irq(vipi, mpic_ipi_action,
1570 IRQF_DISABLED|IRQF_PERCPU,
1571 ipi_names[i], (void *)i);
1572 if (err) {
1573 printk(KERN_ERR "Request of irq %d for IPI %ld failed\n",
1574 vipi, i);
1575 break;
1576 } 1551 }
1552 smp_request_message_ipi(vipi, i);
1577 } 1553 }
1578} 1554}
1579 1555
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index d3e4d61030b5..77fae5f64f2e 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -194,11 +194,41 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
194 * 4xx PCI 2.x part 194 * 4xx PCI 2.x part
195 */ 195 */
196 196
197static int __init ppc4xx_setup_one_pci_PMM(struct pci_controller *hose,
198 void __iomem *reg,
199 u64 plb_addr,
200 u64 pci_addr,
201 u64 size,
202 unsigned int flags,
203 int index)
204{
205 u32 ma, pcila, pciha;
206
207 if ((plb_addr + size) > 0xffffffffull || !is_power_of_2(size) ||
208 size < 0x1000 || (plb_addr & (size - 1)) != 0) {
209 printk(KERN_WARNING "%s: Resource out of range\n",
210 hose->dn->full_name);
211 return -1;
212 }
213 ma = (0xffffffffu << ilog2(size)) | 1;
214 if (flags & IORESOURCE_PREFETCH)
215 ma |= 2;
216
217 pciha = RES_TO_U32_HIGH(pci_addr);
218 pcila = RES_TO_U32_LOW(pci_addr);
219
220 writel(plb_addr, reg + PCIL0_PMM0LA + (0x10 * index));
221 writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * index));
222 writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * index));
223 writel(ma, reg + PCIL0_PMM0MA + (0x10 * index));
224
225 return 0;
226}
227
197static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose, 228static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
198 void __iomem *reg) 229 void __iomem *reg)
199{ 230{
200 u32 la, ma, pcila, pciha; 231 int i, j, found_isa_hole = 0;
201 int i, j;
202 232
203 /* Setup outbound memory windows */ 233 /* Setup outbound memory windows */
204 for (i = j = 0; i < 3; i++) { 234 for (i = j = 0; i < 3; i++) {
@@ -213,28 +243,29 @@ static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
213 break; 243 break;
214 } 244 }
215 245
216 /* Calculate register values */ 246 /* Configure the resource */
217 la = res->start; 247 if (ppc4xx_setup_one_pci_PMM(hose, reg,
218 pciha = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset); 248 res->start,
219 pcila = RES_TO_U32_LOW(res->start - hose->pci_mem_offset); 249 res->start - hose->pci_mem_offset,
220 250 res->end + 1 - res->start,
221 ma = res->end + 1 - res->start; 251 res->flags,
222 if (!is_power_of_2(ma) || ma < 0x1000 || ma > 0xffffffffu) { 252 j) == 0) {
223 printk(KERN_WARNING "%s: Resource out of range\n", 253 j++;
224 hose->dn->full_name); 254
225 continue; 255 /* If the resource PCI address is 0 then we have our
256 * ISA memory hole
257 */
258 if (res->start == hose->pci_mem_offset)
259 found_isa_hole = 1;
226 } 260 }
227 ma = (0xffffffffu << ilog2(ma)) | 0x1;
228 if (res->flags & IORESOURCE_PREFETCH)
229 ma |= 0x2;
230
231 /* Program register values */
232 writel(la, reg + PCIL0_PMM0LA + (0x10 * j));
233 writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * j));
234 writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * j));
235 writel(ma, reg + PCIL0_PMM0MA + (0x10 * j));
236 j++;
237 } 261 }
262
263 /* Handle ISA memory hole if not already covered */
264 if (j <= 2 && !found_isa_hole && hose->isa_mem_size)
265 if (ppc4xx_setup_one_pci_PMM(hose, reg, hose->isa_mem_phys, 0,
266 hose->isa_mem_size, 0, j) == 0)
267 printk(KERN_INFO "%s: Legacy ISA memory support enabled\n",
268 hose->dn->full_name);
238} 269}
239 270
240static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose, 271static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
@@ -352,11 +383,52 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
352 * 4xx PCI-X part 383 * 4xx PCI-X part
353 */ 384 */
354 385
386static int __init ppc4xx_setup_one_pcix_POM(struct pci_controller *hose,
387 void __iomem *reg,
388 u64 plb_addr,
389 u64 pci_addr,
390 u64 size,
391 unsigned int flags,
392 int index)
393{
394 u32 lah, lal, pciah, pcial, sa;
395
396 if (!is_power_of_2(size) || size < 0x1000 ||
397 (plb_addr & (size - 1)) != 0) {
398 printk(KERN_WARNING "%s: Resource out of range\n",
399 hose->dn->full_name);
400 return -1;
401 }
402
403 /* Calculate register values */
404 lah = RES_TO_U32_HIGH(plb_addr);
405 lal = RES_TO_U32_LOW(plb_addr);
406 pciah = RES_TO_U32_HIGH(pci_addr);
407 pcial = RES_TO_U32_LOW(pci_addr);
408 sa = (0xffffffffu << ilog2(size)) | 0x1;
409
410 /* Program register values */
411 if (index == 0) {
412 writel(lah, reg + PCIX0_POM0LAH);
413 writel(lal, reg + PCIX0_POM0LAL);
414 writel(pciah, reg + PCIX0_POM0PCIAH);
415 writel(pcial, reg + PCIX0_POM0PCIAL);
416 writel(sa, reg + PCIX0_POM0SA);
417 } else {
418 writel(lah, reg + PCIX0_POM1LAH);
419 writel(lal, reg + PCIX0_POM1LAL);
420 writel(pciah, reg + PCIX0_POM1PCIAH);
421 writel(pcial, reg + PCIX0_POM1PCIAL);
422 writel(sa, reg + PCIX0_POM1SA);
423 }
424
425 return 0;
426}
427
355static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose, 428static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
356 void __iomem *reg) 429 void __iomem *reg)
357{ 430{
358 u32 lah, lal, pciah, pcial, sa; 431 int i, j, found_isa_hole = 0;
359 int i, j;
360 432
361 /* Setup outbound memory windows */ 433 /* Setup outbound memory windows */
362 for (i = j = 0; i < 3; i++) { 434 for (i = j = 0; i < 3; i++) {
@@ -371,36 +443,29 @@ static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
371 break; 443 break;
372 } 444 }
373 445
374 /* Calculate register values */ 446 /* Configure the resource */
375 lah = RES_TO_U32_HIGH(res->start); 447 if (ppc4xx_setup_one_pcix_POM(hose, reg,
376 lal = RES_TO_U32_LOW(res->start); 448 res->start,
377 pciah = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset); 449 res->start - hose->pci_mem_offset,
378 pcial = RES_TO_U32_LOW(res->start - hose->pci_mem_offset); 450 res->end + 1 - res->start,
379 sa = res->end + 1 - res->start; 451 res->flags,
380 if (!is_power_of_2(sa) || sa < 0x100000 || 452 j) == 0) {
381 sa > 0xffffffffu) { 453 j++;
382 printk(KERN_WARNING "%s: Resource out of range\n", 454
383 hose->dn->full_name); 455 /* If the resource PCI address is 0 then we have our
384 continue; 456 * ISA memory hole
457 */
458 if (res->start == hose->pci_mem_offset)
459 found_isa_hole = 1;
385 } 460 }
386 sa = (0xffffffffu << ilog2(sa)) | 0x1;
387
388 /* Program register values */
389 if (j == 0) {
390 writel(lah, reg + PCIX0_POM0LAH);
391 writel(lal, reg + PCIX0_POM0LAL);
392 writel(pciah, reg + PCIX0_POM0PCIAH);
393 writel(pcial, reg + PCIX0_POM0PCIAL);
394 writel(sa, reg + PCIX0_POM0SA);
395 } else {
396 writel(lah, reg + PCIX0_POM1LAH);
397 writel(lal, reg + PCIX0_POM1LAL);
398 writel(pciah, reg + PCIX0_POM1PCIAH);
399 writel(pcial, reg + PCIX0_POM1PCIAL);
400 writel(sa, reg + PCIX0_POM1SA);
401 }
402 j++;
403 } 461 }
462
463 /* Handle ISA memory hole if not already covered */
464 if (j <= 1 && !found_isa_hole && hose->isa_mem_size)
465 if (ppc4xx_setup_one_pcix_POM(hose, reg, hose->isa_mem_phys, 0,
466 hose->isa_mem_size, 0, j) == 0)
467 printk(KERN_INFO "%s: Legacy ISA memory support enabled\n",
468 hose->dn->full_name);
404} 469}
405 470
406static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose, 471static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose,
@@ -1317,12 +1382,72 @@ static struct pci_ops ppc4xx_pciex_pci_ops =
1317 .write = ppc4xx_pciex_write_config, 1382 .write = ppc4xx_pciex_write_config,
1318}; 1383};
1319 1384
1385static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
1386 struct pci_controller *hose,
1387 void __iomem *mbase,
1388 u64 plb_addr,
1389 u64 pci_addr,
1390 u64 size,
1391 unsigned int flags,
1392 int index)
1393{
1394 u32 lah, lal, pciah, pcial, sa;
1395
1396 if (!is_power_of_2(size) ||
1397 (index < 2 && size < 0x100000) ||
1398 (index == 2 && size < 0x100) ||
1399 (plb_addr & (size - 1)) != 0) {
1400 printk(KERN_WARNING "%s: Resource out of range\n",
1401 hose->dn->full_name);
1402 return -1;
1403 }
1404
1405 /* Calculate register values */
1406 lah = RES_TO_U32_HIGH(plb_addr);
1407 lal = RES_TO_U32_LOW(plb_addr);
1408 pciah = RES_TO_U32_HIGH(pci_addr);
1409 pcial = RES_TO_U32_LOW(pci_addr);
1410 sa = (0xffffffffu << ilog2(size)) | 0x1;
1411
1412 /* Program register values */
1413 switch (index) {
1414 case 0:
1415 out_le32(mbase + PECFG_POM0LAH, pciah);
1416 out_le32(mbase + PECFG_POM0LAL, pcial);
1417 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);
1418 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);
1419 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);
1420 /* Note that 3 here means enabled | single region */
1421 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3);
1422 break;
1423 case 1:
1424 out_le32(mbase + PECFG_POM1LAH, pciah);
1425 out_le32(mbase + PECFG_POM1LAL, pcial);
1426 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);
1427 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);
1428 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);
1429 /* Note that 3 here means enabled | single region */
1430 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3);
1431 break;
1432 case 2:
1433 out_le32(mbase + PECFG_POM2LAH, pciah);
1434 out_le32(mbase + PECFG_POM2LAL, pcial);
1435 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);
1436 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);
1437 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);
1438 /* Note that 3 here means enabled | IO space !!! */
1439 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, sa | 3);
1440 break;
1441 }
1442
1443 return 0;
1444}
1445
1320static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port, 1446static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
1321 struct pci_controller *hose, 1447 struct pci_controller *hose,
1322 void __iomem *mbase) 1448 void __iomem *mbase)
1323{ 1449{
1324 u32 lah, lal, pciah, pcial, sa; 1450 int i, j, found_isa_hole = 0;
1325 int i, j;
1326 1451
1327 /* Setup outbound memory windows */ 1452 /* Setup outbound memory windows */
1328 for (i = j = 0; i < 3; i++) { 1453 for (i = j = 0; i < 3; i++) {
@@ -1337,53 +1462,38 @@ static void __init ppc4xx_configure_pciex_POMs(struct ppc4xx_pciex_port *port,
1337 break; 1462 break;
1338 } 1463 }
1339 1464
1340 /* Calculate register values */ 1465 /* Configure the resource */
1341 lah = RES_TO_U32_HIGH(res->start); 1466 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1342 lal = RES_TO_U32_LOW(res->start); 1467 res->start,
1343 pciah = RES_TO_U32_HIGH(res->start - hose->pci_mem_offset); 1468 res->start - hose->pci_mem_offset,
1344 pcial = RES_TO_U32_LOW(res->start - hose->pci_mem_offset); 1469 res->end + 1 - res->start,
1345 sa = res->end + 1 - res->start; 1470 res->flags,
1346 if (!is_power_of_2(sa) || sa < 0x100000 || 1471 j) == 0) {
1347 sa > 0xffffffffu) { 1472 j++;
1348 printk(KERN_WARNING "%s: Resource out of range\n", 1473
1349 port->node->full_name); 1474 /* If the resource PCI address is 0 then we have our
1350 continue; 1475 * ISA memory hole
1351 } 1476 */
1352 sa = (0xffffffffu << ilog2(sa)) | 0x1; 1477 if (res->start == hose->pci_mem_offset)
1353 1478 found_isa_hole = 1;
1354 /* Program register values */
1355 switch (j) {
1356 case 0:
1357 out_le32(mbase + PECFG_POM0LAH, pciah);
1358 out_le32(mbase + PECFG_POM0LAL, pcial);
1359 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);
1360 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);
1361 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);
1362 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3);
1363 break;
1364 case 1:
1365 out_le32(mbase + PECFG_POM1LAH, pciah);
1366 out_le32(mbase + PECFG_POM1LAL, pcial);
1367 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);
1368 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);
1369 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);
1370 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3);
1371 break;
1372 } 1479 }
1373 j++;
1374 } 1480 }
1375 1481
1376 /* Configure IO, always 64K starting at 0 */ 1482 /* Handle ISA memory hole if not already covered */
1377 if (hose->io_resource.flags & IORESOURCE_IO) { 1483 if (j <= 1 && !found_isa_hole && hose->isa_mem_size)
1378 lah = RES_TO_U32_HIGH(hose->io_base_phys); 1484 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1379 lal = RES_TO_U32_LOW(hose->io_base_phys); 1485 hose->isa_mem_phys, 0,
1380 out_le32(mbase + PECFG_POM2LAH, 0); 1486 hose->isa_mem_size, 0, j) == 0)
1381 out_le32(mbase + PECFG_POM2LAL, 0); 1487 printk(KERN_INFO "%s: Legacy ISA memory support enabled\n",
1382 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah); 1488 hose->dn->full_name);
1383 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal); 1489
1384 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff); 1490 /* Configure IO, always 64K starting at 0. We hard wire it to 64K !
1385 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0xffff0000 | 3); 1491 * Note also that it -has- to be region index 2 on this HW
1386 } 1492 */
1493 if (hose->io_resource.flags & IORESOURCE_IO)
1494 ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1495 hose->io_base_phys, 0,
1496 0x10000, IORESOURCE_IO, 2);
1387} 1497}
1388 1498
1389static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port, 1499static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index b3b73ae57d6d..01bce3784b0a 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/param.h> 20#include <linux/param.h>
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/spinlock.h>
22#include <linux/mm.h> 23#include <linux/mm.h>
23#include <linux/interrupt.h> 24#include <linux/interrupt.h>
24#include <linux/bootmem.h> 25#include <linux/bootmem.h>
@@ -38,6 +39,8 @@ static void qe_snums_init(void);
38static int qe_sdma_init(void); 39static int qe_sdma_init(void);
39 40
40static DEFINE_SPINLOCK(qe_lock); 41static DEFINE_SPINLOCK(qe_lock);
42DEFINE_SPINLOCK(cmxgcr_lock);
43EXPORT_SYMBOL(cmxgcr_lock);
41 44
42/* QE snum state */ 45/* QE snum state */
43enum qe_snum_state { 46enum qe_snum_state {
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index 1d78071aad7d..ebb442ea1917 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -18,6 +18,7 @@
18#include <linux/errno.h> 18#include <linux/errno.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/stddef.h> 20#include <linux/stddef.h>
21#include <linux/spinlock.h>
21#include <linux/module.h> 22#include <linux/module.h>
22 23
23#include <asm/irq.h> 24#include <asm/irq.h>
@@ -26,9 +27,6 @@
26#include <asm/qe.h> 27#include <asm/qe.h>
27#include <asm/ucc.h> 28#include <asm/ucc.h>
28 29
29DEFINE_SPINLOCK(cmxgcr_lock);
30EXPORT_SYMBOL(cmxgcr_lock);
31
32int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) 30int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
33{ 31{
34 unsigned long flags; 32 unsigned long flags;
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
index 51d97588e762..9cb03b71b9d6 100644
--- a/arch/powerpc/xmon/Makefile
+++ b/arch/powerpc/xmon/Makefile
@@ -4,7 +4,7 @@ ifdef CONFIG_PPC64
4EXTRA_CFLAGS += -mno-minimal-toc 4EXTRA_CFLAGS += -mno-minimal-toc
5endif 5endif
6 6
7obj-y += xmon.o setjmp.o start.o nonstdio.o 7obj-y += xmon.o start.o nonstdio.o
8 8
9ifdef CONFIG_XMON_DISASSEMBLY 9ifdef CONFIG_XMON_DISASSEMBLY
10obj-y += ppc-dis.o ppc-opc.o 10obj-y += ppc-dis.o ppc-opc.o
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 076368c8b8a9..8dfad7d9a004 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -41,6 +41,7 @@
41#include <asm/spu_priv1.h> 41#include <asm/spu_priv1.h>
42#include <asm/firmware.h> 42#include <asm/firmware.h>
43#include <asm/setjmp.h> 43#include <asm/setjmp.h>
44#include <asm/reg.h>
44 45
45#ifdef CONFIG_PPC64 46#ifdef CONFIG_PPC64
46#include <asm/hvcall.h> 47#include <asm/hvcall.h>
@@ -159,8 +160,6 @@ static int xmon_no_auto_backtrace;
159extern void xmon_enter(void); 160extern void xmon_enter(void);
160extern void xmon_leave(void); 161extern void xmon_leave(void);
161 162
162extern void xmon_save_regs(struct pt_regs *);
163
164#ifdef CONFIG_PPC64 163#ifdef CONFIG_PPC64
165#define REG "%.16lx" 164#define REG "%.16lx"
166#define REGS_PER_LINE 4 165#define REGS_PER_LINE 4
@@ -532,7 +531,7 @@ int xmon(struct pt_regs *excp)
532 struct pt_regs regs; 531 struct pt_regs regs;
533 532
534 if (excp == NULL) { 533 if (excp == NULL) {
535 xmon_save_regs(&regs); 534 ppc_save_regs(&regs);
536 excp = &regs; 535 excp = &regs;
537 } 536 }
538 537
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index b4aa5869c7f9..19577aeffd7b 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -43,6 +43,9 @@ config GENERIC_HWEIGHT
43config GENERIC_TIME 43config GENERIC_TIME
44 def_bool y 44 def_bool y
45 45
46config GENERIC_TIME_VSYSCALL
47 def_bool y
48
46config GENERIC_CLOCKEVENTS 49config GENERIC_CLOCKEVENTS
47 def_bool y 50 def_bool y
48 51
@@ -66,10 +69,15 @@ config PGSTE
66 bool 69 bool
67 default y if KVM 70 default y if KVM
68 71
72config VIRT_CPU_ACCOUNTING
73 def_bool y
74
69mainmenu "Linux Kernel Configuration" 75mainmenu "Linux Kernel Configuration"
70 76
71config S390 77config S390
72 def_bool y 78 def_bool y
79 select USE_GENERIC_SMP_HELPERS if SMP
80 select HAVE_FUNCTION_TRACER
73 select HAVE_OPROFILE 81 select HAVE_OPROFILE
74 select HAVE_KPROBES 82 select HAVE_KPROBES
75 select HAVE_KRETPROBES 83 select HAVE_KRETPROBES
@@ -226,6 +234,14 @@ config MARCH_Z9_109
226 Class (z9 BC). The kernel will be slightly faster but will not 234 Class (z9 BC). The kernel will be slightly faster but will not
227 work on older machines such as the z990, z890, z900, and z800. 235 work on older machines such as the z990, z890, z900, and z800.
228 236
237config MARCH_Z10
238 bool "IBM System z10"
239 help
240 Select this to enable optimizations for IBM System z10. The
241 kernel will be slightly faster but will not work on older
242 machines such as the z990, z890, z900, z800, z9-109, z9-ec
243 and z9-bc.
244
229endchoice 245endchoice
230 246
231config PACK_STACK 247config PACK_STACK
@@ -344,16 +360,6 @@ config QDIO
344 360
345 If unsure, say Y. 361 If unsure, say Y.
346 362
347config QDIO_DEBUG
348 bool "Extended debugging information"
349 depends on QDIO
350 help
351 Say Y here to get extended debugging output in
352 /sys/kernel/debug/s390dbf/qdio...
353 Warning: this option reduces the performance of the QDIO module.
354
355 If unsure, say N.
356
357config CHSC_SCH 363config CHSC_SCH
358 tristate "Support for CHSC subchannels" 364 tristate "Support for CHSC subchannels"
359 help 365 help
@@ -467,22 +473,9 @@ config PAGE_STATES
467 hypervisor. The ESSA instruction is used to do the states 473 hypervisor. The ESSA instruction is used to do the states
468 changes between a page that has content and the unused state. 474 changes between a page that has content and the unused state.
469 475
470config VIRT_TIMER
471 bool "Virtual CPU timer support"
472 help
473 This provides a kernel interface for virtual CPU timers.
474 Default is disabled.
475
476config VIRT_CPU_ACCOUNTING
477 bool "Base user process accounting on virtual cpu timer"
478 depends on VIRT_TIMER
479 help
480 Select this option to use CPU timer deltas to do user
481 process accounting.
482
483config APPLDATA_BASE 476config APPLDATA_BASE
484 bool "Linux - VM Monitor Stream, base infrastructure" 477 bool "Linux - VM Monitor Stream, base infrastructure"
485 depends on PROC_FS && VIRT_TIMER=y 478 depends on PROC_FS
486 help 479 help
487 This provides a kernel interface for creating and updating z/VM APPLDATA 480 This provides a kernel interface for creating and updating z/VM APPLDATA
488 monitor records. The monitor records are updated at certain time 481 monitor records. The monitor records are updated at certain time
diff --git a/arch/s390/Makefile b/arch/s390/Makefile
index 792a4e7743ce..578c61f15a4b 100644
--- a/arch/s390/Makefile
+++ b/arch/s390/Makefile
@@ -34,6 +34,7 @@ cflags-$(CONFIG_MARCH_G5) += $(call cc-option,-march=g5)
34cflags-$(CONFIG_MARCH_Z900) += $(call cc-option,-march=z900) 34cflags-$(CONFIG_MARCH_Z900) += $(call cc-option,-march=z900)
35cflags-$(CONFIG_MARCH_Z990) += $(call cc-option,-march=z990) 35cflags-$(CONFIG_MARCH_Z990) += $(call cc-option,-march=z990)
36cflags-$(CONFIG_MARCH_Z9_109) += $(call cc-option,-march=z9-109) 36cflags-$(CONFIG_MARCH_Z9_109) += $(call cc-option,-march=z9-109)
37cflags-$(CONFIG_MARCH_Z10) += $(call cc-option,-march=z10)
37 38
38#KBUILD_IMAGE is necessary for make rpm 39#KBUILD_IMAGE is necessary for make rpm
39KBUILD_IMAGE :=arch/s390/boot/image 40KBUILD_IMAGE :=arch/s390/boot/image
diff --git a/arch/s390/appldata/appldata.h b/arch/s390/appldata/appldata.h
index 17a2636fec0a..f0b23fc759ba 100644
--- a/arch/s390/appldata/appldata.h
+++ b/arch/s390/appldata/appldata.h
@@ -26,10 +26,6 @@
26#define CTL_APPLDATA_NET_SUM 2125 26#define CTL_APPLDATA_NET_SUM 2125
27#define CTL_APPLDATA_PROC 2126 27#define CTL_APPLDATA_PROC 2126
28 28
29#define P_INFO(x...) printk(KERN_INFO MY_PRINT_NAME " info: " x)
30#define P_ERROR(x...) printk(KERN_ERR MY_PRINT_NAME " error: " x)
31#define P_WARNING(x...) printk(KERN_WARNING MY_PRINT_NAME " status: " x)
32
33struct appldata_ops { 29struct appldata_ops {
34 struct list_head list; 30 struct list_head list;
35 struct ctl_table_header *sysctl_header; 31 struct ctl_table_header *sysctl_header;
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index a06a47cdd5e0..27b70d8a359c 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -10,6 +10,9 @@
10 * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> 10 * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com>
11 */ 11 */
12 12
13#define KMSG_COMPONENT "appldata"
14#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
15
13#include <linux/module.h> 16#include <linux/module.h>
14#include <linux/init.h> 17#include <linux/init.h>
15#include <linux/slab.h> 18#include <linux/slab.h>
@@ -32,7 +35,6 @@
32#include "appldata.h" 35#include "appldata.h"
33 36
34 37
35#define MY_PRINT_NAME "appldata" /* for debug messages, etc. */
36#define APPLDATA_CPU_INTERVAL 10000 /* default (CPU) time for 38#define APPLDATA_CPU_INTERVAL 10000 /* default (CPU) time for
37 sampling interval in 39 sampling interval in
38 milliseconds */ 40 milliseconds */
@@ -390,8 +392,8 @@ appldata_generic_handler(ctl_table *ctl, int write, struct file *filp,
390 (unsigned long) ops->data, ops->size, 392 (unsigned long) ops->data, ops->size,
391 ops->mod_lvl); 393 ops->mod_lvl);
392 if (rc != 0) { 394 if (rc != 0) {
393 P_ERROR("START DIAG 0xDC for %s failed, " 395 pr_err("Starting the data collection for %s "
394 "return code: %d\n", ops->name, rc); 396 "failed with rc=%d\n", ops->name, rc);
395 module_put(ops->owner); 397 module_put(ops->owner);
396 } else 398 } else
397 ops->active = 1; 399 ops->active = 1;
@@ -401,8 +403,8 @@ appldata_generic_handler(ctl_table *ctl, int write, struct file *filp,
401 (unsigned long) ops->data, ops->size, 403 (unsigned long) ops->data, ops->size,
402 ops->mod_lvl); 404 ops->mod_lvl);
403 if (rc != 0) 405 if (rc != 0)
404 P_ERROR("STOP DIAG 0xDC for %s failed, " 406 pr_err("Stopping the data collection for %s "
405 "return code: %d\n", ops->name, rc); 407 "failed with rc=%d\n", ops->name, rc);
406 module_put(ops->owner); 408 module_put(ops->owner);
407 } 409 }
408 spin_unlock(&appldata_ops_lock); 410 spin_unlock(&appldata_ops_lock);
diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c
index 3b746556e1a3..fa741f84c5b9 100644
--- a/arch/s390/appldata/appldata_net_sum.c
+++ b/arch/s390/appldata/appldata_net_sum.c
@@ -67,7 +67,6 @@ static void appldata_get_net_sum_data(void *data)
67 int i; 67 int i;
68 struct appldata_net_sum_data *net_data; 68 struct appldata_net_sum_data *net_data;
69 struct net_device *dev; 69 struct net_device *dev;
70 struct net_device_stats *stats;
71 unsigned long rx_packets, tx_packets, rx_bytes, tx_bytes, rx_errors, 70 unsigned long rx_packets, tx_packets, rx_bytes, tx_bytes, rx_errors,
72 tx_errors, rx_dropped, tx_dropped, collisions; 71 tx_errors, rx_dropped, tx_dropped, collisions;
73 72
@@ -86,7 +85,8 @@ static void appldata_get_net_sum_data(void *data)
86 collisions = 0; 85 collisions = 0;
87 read_lock(&dev_base_lock); 86 read_lock(&dev_base_lock);
88 for_each_netdev(&init_net, dev) { 87 for_each_netdev(&init_net, dev) {
89 stats = dev->get_stats(dev); 88 const struct net_device_stats *stats = dev_get_stats(dev);
89
90 rx_packets += stats->rx_packets; 90 rx_packets += stats->rx_packets;
91 tx_packets += stats->tx_packets; 91 tx_packets += stats->tx_packets;
92 rx_bytes += stats->rx_bytes; 92 rx_bytes += stats->rx_bytes;
diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c
index eb44f9f8ab91..55c80ffd42b9 100644
--- a/arch/s390/appldata/appldata_os.c
+++ b/arch/s390/appldata/appldata_os.c
@@ -9,6 +9,9 @@
9 * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> 9 * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com>
10 */ 10 */
11 11
12#define KMSG_COMPONENT "appldata"
13#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14
12#include <linux/module.h> 15#include <linux/module.h>
13#include <linux/init.h> 16#include <linux/init.h>
14#include <linux/slab.h> 17#include <linux/slab.h>
@@ -22,7 +25,6 @@
22#include "appldata.h" 25#include "appldata.h"
23 26
24 27
25#define MY_PRINT_NAME "appldata_os" /* for debug messages, etc. */
26#define LOAD_INT(x) ((x) >> FSHIFT) 28#define LOAD_INT(x) ((x) >> FSHIFT)
27#define LOAD_FRAC(x) LOAD_INT(((x) & (FIXED_1-1)) * 100) 29#define LOAD_FRAC(x) LOAD_INT(((x) & (FIXED_1-1)) * 100)
28 30
@@ -143,21 +145,16 @@ static void appldata_get_os_data(void *data)
143 (unsigned long) ops.data, new_size, 145 (unsigned long) ops.data, new_size,
144 ops.mod_lvl); 146 ops.mod_lvl);
145 if (rc != 0) 147 if (rc != 0)
146 P_ERROR("os: START NEW DIAG 0xDC failed, " 148 pr_err("Starting a new OS data collection "
147 "return code: %d, new size = %i\n", rc, 149 "failed with rc=%d\n", rc);
148 new_size);
149 150
150 rc = appldata_diag(APPLDATA_RECORD_OS_ID, 151 rc = appldata_diag(APPLDATA_RECORD_OS_ID,
151 APPLDATA_STOP_REC, 152 APPLDATA_STOP_REC,
152 (unsigned long) ops.data, ops.size, 153 (unsigned long) ops.data, ops.size,
153 ops.mod_lvl); 154 ops.mod_lvl);
154 if (rc != 0) 155 if (rc != 0)
155 P_ERROR("os: STOP OLD DIAG 0xDC failed, " 156 pr_err("Stopping a faulty OS data "
156 "return code: %d, old size = %i\n", rc, 157 "collection failed with rc=%d\n", rc);
157 ops.size);
158 else
159 P_INFO("os: old record size = %i stopped\n",
160 ops.size);
161 } 158 }
162 ops.size = new_size; 159 ops.size = new_size;
163 } 160 }
@@ -178,8 +175,8 @@ static int __init appldata_os_init(void)
178 max_size = sizeof(struct appldata_os_data) + 175 max_size = sizeof(struct appldata_os_data) +
179 (NR_CPUS * sizeof(struct appldata_os_per_cpu)); 176 (NR_CPUS * sizeof(struct appldata_os_per_cpu));
180 if (max_size > APPLDATA_MAX_REC_SIZE) { 177 if (max_size > APPLDATA_MAX_REC_SIZE) {
181 P_ERROR("Max. size of OS record = %i, bigger than maximum " 178 pr_err("Maximum OS record size %i exceeds the maximum "
182 "record size (%i)\n", max_size, APPLDATA_MAX_REC_SIZE); 179 "record size %i\n", max_size, APPLDATA_MAX_REC_SIZE);
183 rc = -ENOMEM; 180 rc = -ENOMEM;
184 goto out; 181 goto out;
185 } 182 }
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index e33f32b54c08..c42cd898f68b 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -17,6 +17,9 @@
17 * 17 *
18 */ 18 */
19 19
20#define KMSG_COMPONENT "aes_s390"
21#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
22
20#include <crypto/aes.h> 23#include <crypto/aes.h>
21#include <crypto/algapi.h> 24#include <crypto/algapi.h>
22#include <linux/err.h> 25#include <linux/err.h>
@@ -169,7 +172,8 @@ static int fallback_init_cip(struct crypto_tfm *tfm)
169 CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK); 172 CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
170 173
171 if (IS_ERR(sctx->fallback.cip)) { 174 if (IS_ERR(sctx->fallback.cip)) {
172 printk(KERN_ERR "Error allocating fallback algo %s\n", name); 175 pr_err("Allocating AES fallback algorithm %s failed\n",
176 name);
173 return PTR_ERR(sctx->fallback.blk); 177 return PTR_ERR(sctx->fallback.blk);
174 } 178 }
175 179
@@ -349,7 +353,8 @@ static int fallback_init_blk(struct crypto_tfm *tfm)
349 CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK); 353 CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
350 354
351 if (IS_ERR(sctx->fallback.blk)) { 355 if (IS_ERR(sctx->fallback.blk)) {
352 printk(KERN_ERR "Error allocating fallback algo %s\n", name); 356 pr_err("Allocating AES fallback algorithm %s failed\n",
357 name);
353 return PTR_ERR(sctx->fallback.blk); 358 return PTR_ERR(sctx->fallback.blk);
354 } 359 }
355 360
@@ -515,9 +520,8 @@ static int __init aes_s390_init(void)
515 520
516 /* z9 109 and z9 BC/EC only support 128 bit key length */ 521 /* z9 109 and z9 BC/EC only support 128 bit key length */
517 if (keylen_flag == AES_KEYLEN_128) 522 if (keylen_flag == AES_KEYLEN_128)
518 printk(KERN_INFO 523 pr_info("AES hardware acceleration is only available for"
519 "aes_s390: hardware acceleration only available for " 524 " 128-bit keys\n");
520 "128 bit keys\n");
521 525
522 ret = crypto_register_alg(&aes_alg); 526 ret = crypto_register_alg(&aes_alg);
523 if (ret) 527 if (ret)
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c
index b9a1ce1f28e4..b1e892a43816 100644
--- a/arch/s390/hypfs/hypfs_diag.c
+++ b/arch/s390/hypfs/hypfs_diag.c
@@ -3,10 +3,13 @@
3 * Hypervisor filesystem for Linux on s390. Diag 204 and 224 3 * Hypervisor filesystem for Linux on s390. Diag 204 and 224
4 * implementation. 4 * implementation.
5 * 5 *
6 * Copyright (C) IBM Corp. 2006 6 * Copyright IBM Corp. 2006, 2008
7 * Author(s): Michael Holzheu <holzheu@de.ibm.com> 7 * Author(s): Michael Holzheu <holzheu@de.ibm.com>
8 */ 8 */
9 9
10#define KMSG_COMPONENT "hypfs"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
10#include <linux/types.h> 13#include <linux/types.h>
11#include <linux/errno.h> 14#include <linux/errno.h>
12#include <linux/string.h> 15#include <linux/string.h>
@@ -527,13 +530,14 @@ __init int hypfs_diag_init(void)
527 int rc; 530 int rc;
528 531
529 if (diag204_probe()) { 532 if (diag204_probe()) {
530 printk(KERN_ERR "hypfs: diag 204 not working."); 533 pr_err("The hardware system does not support hypfs\n");
531 return -ENODATA; 534 return -ENODATA;
532 } 535 }
533 rc = diag224_get_name_table(); 536 rc = diag224_get_name_table();
534 if (rc) { 537 if (rc) {
535 diag204_free_buffer(); 538 diag204_free_buffer();
536 printk(KERN_ERR "hypfs: could not get name table.\n"); 539 pr_err("The hardware system does not provide all "
540 "functions required by hypfs\n");
537 } 541 }
538 return rc; 542 return rc;
539} 543}
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index 36313801cd5c..9d4f8e6c0800 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -2,10 +2,13 @@
2 * arch/s390/hypfs/inode.c 2 * arch/s390/hypfs/inode.c
3 * Hypervisor filesystem for Linux on s390. 3 * Hypervisor filesystem for Linux on s390.
4 * 4 *
5 * Copyright (C) IBM Corp. 2006 5 * Copyright IBM Corp. 2006, 2008
6 * Author(s): Michael Holzheu <holzheu@de.ibm.com> 6 * Author(s): Michael Holzheu <holzheu@de.ibm.com>
7 */ 7 */
8 8
9#define KMSG_COMPONENT "hypfs"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
9#include <linux/types.h> 12#include <linux/types.h>
10#include <linux/errno.h> 13#include <linux/errno.h>
11#include <linux/fs.h> 14#include <linux/fs.h>
@@ -200,7 +203,7 @@ static ssize_t hypfs_aio_write(struct kiocb *iocb, const struct iovec *iov,
200 else 203 else
201 rc = hypfs_diag_create_files(sb, sb->s_root); 204 rc = hypfs_diag_create_files(sb, sb->s_root);
202 if (rc) { 205 if (rc) {
203 printk(KERN_ERR "hypfs: Update failed\n"); 206 pr_err("Updating the hypfs tree failed\n");
204 hypfs_delete_tree(sb->s_root); 207 hypfs_delete_tree(sb->s_root);
205 goto out; 208 goto out;
206 } 209 }
@@ -252,8 +255,7 @@ static int hypfs_parse_options(char *options, struct super_block *sb)
252 break; 255 break;
253 case opt_err: 256 case opt_err:
254 default: 257 default:
255 printk(KERN_ERR "hypfs: Unrecognized mount option " 258 pr_err("%s is not a valid mount option\n", str);
256 "\"%s\" or missing value\n", str);
257 return -EINVAL; 259 return -EINVAL;
258 } 260 }
259 } 261 }
@@ -280,8 +282,8 @@ static int hypfs_fill_super(struct super_block *sb, void *data, int silent)
280 if (!sbi) 282 if (!sbi)
281 return -ENOMEM; 283 return -ENOMEM;
282 mutex_init(&sbi->lock); 284 mutex_init(&sbi->lock);
283 sbi->uid = current->uid; 285 sbi->uid = current_uid();
284 sbi->gid = current->gid; 286 sbi->gid = current_gid();
285 sb->s_fs_info = sbi; 287 sb->s_fs_info = sbi;
286 sb->s_blocksize = PAGE_CACHE_SIZE; 288 sb->s_blocksize = PAGE_CACHE_SIZE;
287 sb->s_blocksize_bits = PAGE_CACHE_SHIFT; 289 sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
@@ -317,7 +319,7 @@ static int hypfs_fill_super(struct super_block *sb, void *data, int silent)
317 } 319 }
318 hypfs_update_update(sb); 320 hypfs_update_update(sb);
319 sb->s_root = root_dentry; 321 sb->s_root = root_dentry;
320 printk(KERN_INFO "hypfs: Hypervisor filesystem mounted\n"); 322 pr_info("Hypervisor filesystem mounted\n");
321 return 0; 323 return 0;
322 324
323err_tree: 325err_tree:
@@ -513,7 +515,7 @@ fail_sysfs:
513 if (!MACHINE_IS_VM) 515 if (!MACHINE_IS_VM)
514 hypfs_diag_exit(); 516 hypfs_diag_exit();
515fail_diag: 517fail_diag:
516 printk(KERN_ERR "hypfs: Initialization failed with rc = %i.\n", rc); 518 pr_err("Initialization of hypfs failed with rc=%i\n", rc);
517 return rc; 519 return rc;
518} 520}
519 521
diff --git a/arch/s390/include/asm/auxvec.h b/arch/s390/include/asm/auxvec.h
index 0d340720fd99..a1f153e89133 100644
--- a/arch/s390/include/asm/auxvec.h
+++ b/arch/s390/include/asm/auxvec.h
@@ -1,4 +1,6 @@
1#ifndef __ASMS390_AUXVEC_H 1#ifndef __ASMS390_AUXVEC_H
2#define __ASMS390_AUXVEC_H 2#define __ASMS390_AUXVEC_H
3 3
4#define AT_SYSINFO_EHDR 33
5
4#endif 6#endif
diff --git a/arch/s390/include/asm/bug.h b/arch/s390/include/asm/bug.h
index 384e3621e341..7efd0abe8887 100644
--- a/arch/s390/include/asm/bug.h
+++ b/arch/s390/include/asm/bug.h
@@ -47,7 +47,10 @@
47 47
48#endif /* CONFIG_DEBUG_BUGVERBOSE */ 48#endif /* CONFIG_DEBUG_BUGVERBOSE */
49 49
50#define BUG() __EMIT_BUG(0) 50#define BUG() do { \
51 __EMIT_BUG(0); \
52 for (;;); \
53} while (0)
51 54
52#define WARN_ON(x) ({ \ 55#define WARN_ON(x) ({ \
53 int __ret_warn_on = !!(x); \ 56 int __ret_warn_on = !!(x); \
diff --git a/arch/s390/include/asm/byteorder.h b/arch/s390/include/asm/byteorder.h
index 1fe2492baa8d..8bcf277c8468 100644
--- a/arch/s390/include/asm/byteorder.h
+++ b/arch/s390/include/asm/byteorder.h
@@ -11,32 +11,39 @@
11 11
12#include <asm/types.h> 12#include <asm/types.h>
13 13
14#ifdef __GNUC__ 14#define __BIG_ENDIAN
15
16#ifndef __s390x__
17# define __SWAB_64_THRU_32__
18#endif
15 19
16#ifdef __s390x__ 20#ifdef __s390x__
17static inline __u64 ___arch__swab64p(const __u64 *x) 21static inline __u64 __arch_swab64p(const __u64 *x)
18{ 22{
19 __u64 result; 23 __u64 result;
20 24
21 asm volatile("lrvg %0,%1" : "=d" (result) : "m" (*x)); 25 asm volatile("lrvg %0,%1" : "=d" (result) : "m" (*x));
22 return result; 26 return result;
23} 27}
28#define __arch_swab64p __arch_swab64p
24 29
25static inline __u64 ___arch__swab64(__u64 x) 30static inline __u64 __arch_swab64(__u64 x)
26{ 31{
27 __u64 result; 32 __u64 result;
28 33
29 asm volatile("lrvgr %0,%1" : "=d" (result) : "d" (x)); 34 asm volatile("lrvgr %0,%1" : "=d" (result) : "d" (x));
30 return result; 35 return result;
31} 36}
37#define __arch_swab64 __arch_swab64
32 38
33static inline void ___arch__swab64s(__u64 *x) 39static inline void __arch_swab64s(__u64 *x)
34{ 40{
35 *x = ___arch__swab64p(x); 41 *x = __arch_swab64p(x);
36} 42}
43#define __arch_swab64s __arch_swab64s
37#endif /* __s390x__ */ 44#endif /* __s390x__ */
38 45
39static inline __u32 ___arch__swab32p(const __u32 *x) 46static inline __u32 __arch_swab32p(const __u32 *x)
40{ 47{
41 __u32 result; 48 __u32 result;
42 49
@@ -53,25 +60,20 @@ static inline __u32 ___arch__swab32p(const __u32 *x)
53#endif /* __s390x__ */ 60#endif /* __s390x__ */
54 return result; 61 return result;
55} 62}
63#define __arch_swab32p __arch_swab32p
56 64
57static inline __u32 ___arch__swab32(__u32 x) 65#ifdef __s390x__
66static inline __u32 __arch_swab32(__u32 x)
58{ 67{
59#ifndef __s390x__
60 return ___arch__swab32p(&x);
61#else /* __s390x__ */
62 __u32 result; 68 __u32 result;
63 69
64 asm volatile("lrvr %0,%1" : "=d" (result) : "d" (x)); 70 asm volatile("lrvr %0,%1" : "=d" (result) : "d" (x));
65 return result; 71 return result;
66#endif /* __s390x__ */
67}
68
69static __inline__ void ___arch__swab32s(__u32 *x)
70{
71 *x = ___arch__swab32p(x);
72} 72}
73#define __arch_swab32 __arch_swab32
74#endif /* __s390x__ */
73 75
74static __inline__ __u16 ___arch__swab16p(const __u16 *x) 76static inline __u16 __arch_swab16p(const __u16 *x)
75{ 77{
76 __u16 result; 78 __u16 result;
77 79
@@ -86,40 +88,8 @@ static __inline__ __u16 ___arch__swab16p(const __u16 *x)
86#endif /* __s390x__ */ 88#endif /* __s390x__ */
87 return result; 89 return result;
88} 90}
91#define __arch_swab16p __arch_swab16p
89 92
90static __inline__ __u16 ___arch__swab16(__u16 x) 93#include <linux/byteorder.h>
91{
92 return ___arch__swab16p(&x);
93}
94
95static __inline__ void ___arch__swab16s(__u16 *x)
96{
97 *x = ___arch__swab16p(x);
98}
99
100#ifdef __s390x__
101#define __arch__swab64(x) ___arch__swab64(x)
102#define __arch__swab64p(x) ___arch__swab64p(x)
103#define __arch__swab64s(x) ___arch__swab64s(x)
104#endif /* __s390x__ */
105#define __arch__swab32(x) ___arch__swab32(x)
106#define __arch__swab16(x) ___arch__swab16(x)
107#define __arch__swab32p(x) ___arch__swab32p(x)
108#define __arch__swab16p(x) ___arch__swab16p(x)
109#define __arch__swab32s(x) ___arch__swab32s(x)
110#define __arch__swab16s(x) ___arch__swab16s(x)
111
112#ifndef __s390x__
113#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
114# define __BYTEORDER_HAS_U64__
115# define __SWAB_64_THRU_32__
116#endif
117#else /* __s390x__ */
118#define __BYTEORDER_HAS_U64__
119#endif /* __s390x__ */
120
121#endif /* __GNUC__ */
122
123#include <linux/byteorder/big_endian.h>
124 94
125#endif /* _S390_BYTEORDER_H */ 95#endif /* _S390_BYTEORDER_H */
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index 261785ab5b22..d480f39d65e6 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -120,6 +120,10 @@ typedef s390_compat_regs compat_elf_gregset_t;
120#include <asm/system.h> /* for save_access_regs */ 120#include <asm/system.h> /* for save_access_regs */
121#include <asm/mmu_context.h> 121#include <asm/mmu_context.h>
122 122
123#include <asm/vdso.h>
124
125extern unsigned int vdso_enabled;
126
123/* 127/*
124 * This is used to ensure we don't load something for the wrong architecture. 128 * This is used to ensure we don't load something for the wrong architecture.
125 */ 129 */
@@ -191,4 +195,16 @@ do { \
191 current->mm->context.noexec == 0; \ 195 current->mm->context.noexec == 0; \
192}) 196})
193 197
198#define ARCH_DLINFO \
199do { \
200 if (vdso_enabled) \
201 NEW_AUX_ENT(AT_SYSINFO_EHDR, \
202 (unsigned long)current->mm->context.vdso_base); \
203} while (0)
204
205struct linux_binprm;
206
207#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
208int arch_setup_additional_pages(struct linux_binprm *, int);
209
194#endif 210#endif
diff --git a/arch/s390/include/asm/fcx.h b/arch/s390/include/asm/fcx.h
index 8be1f3a58042..ef6170995076 100644
--- a/arch/s390/include/asm/fcx.h
+++ b/arch/s390/include/asm/fcx.h
@@ -248,8 +248,8 @@ struct dcw {
248#define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \ 248#define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \
249 TCCB_MAX_DCW * sizeof(struct dcw) + \ 249 TCCB_MAX_DCW * sizeof(struct dcw) + \
250 sizeof(struct tccb_tcat)) 250 sizeof(struct tccb_tcat))
251#define TCCB_SAC_DEFAULT 0xf901 251#define TCCB_SAC_DEFAULT 0x1ffe
252#define TCCB_SAC_INTRG 0xf902 252#define TCCB_SAC_INTRG 0x1fff
253 253
254/** 254/**
255 * struct tccb_tcah - Transport-Command-Area Header (TCAH) 255 * struct tccb_tcah - Transport-Command-Area Header (TCAH)
diff --git a/arch/s390/include/asm/ftrace.h b/arch/s390/include/asm/ftrace.h
new file mode 100644
index 000000000000..5a5bc75e19d4
--- /dev/null
+++ b/arch/s390/include/asm/ftrace.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_S390_FTRACE_H
2#define _ASM_S390_FTRACE_H
3
4#ifndef __ASSEMBLY__
5extern void _mcount(void);
6#endif
7
8#endif /* _ASM_S390_FTRACE_H */
diff --git a/arch/s390/include/asm/isc.h b/arch/s390/include/asm/isc.h
index 34bb8916db4f..1420a1115948 100644
--- a/arch/s390/include/asm/isc.h
+++ b/arch/s390/include/asm/isc.h
@@ -17,6 +17,7 @@
17#define CHSC_SCH_ISC 7 /* CHSC subchannels */ 17#define CHSC_SCH_ISC 7 /* CHSC subchannels */
18/* Adapter interrupts. */ 18/* Adapter interrupts. */
19#define QDIO_AIRQ_ISC IO_SCH_ISC /* I/O subchannel in qdio mode */ 19#define QDIO_AIRQ_ISC IO_SCH_ISC /* I/O subchannel in qdio mode */
20#define AP_ISC 6 /* adjunct processor (crypto) devices */
20 21
21/* Functions for registration of I/O interruption subclasses */ 22/* Functions for registration of I/O interruption subclasses */
22void isc_register(unsigned int isc); 23void isc_register(unsigned int isc);
diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h
index d2b4ff831477..3b59216e6284 100644
--- a/arch/s390/include/asm/mmu.h
+++ b/arch/s390/include/asm/mmu.h
@@ -6,6 +6,7 @@ typedef struct {
6 struct list_head pgtable_list; 6 struct list_head pgtable_list;
7 unsigned long asce_bits; 7 unsigned long asce_bits;
8 unsigned long asce_limit; 8 unsigned long asce_limit;
9 unsigned long vdso_base;
9 int noexec; 10 int noexec;
10 int has_pgste; /* The mmu context has extended page tables */ 11 int has_pgste; /* The mmu context has extended page tables */
11 int alloc_pgste; /* cloned contexts will have extended page tables */ 12 int alloc_pgste; /* cloned contexts will have extended page tables */
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 991ba939408c..32e8f6aa4384 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -152,4 +152,6 @@ void arch_alloc_page(struct page *page, int order);
152#include <asm-generic/memory_model.h> 152#include <asm-generic/memory_model.h>
153#include <asm-generic/page.h> 153#include <asm-generic/page.h>
154 154
155#define __HAVE_ARCH_GATE_AREA 1
156
155#endif /* _S390_PAGE_H */ 157#endif /* _S390_PAGE_H */
diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h
index f5b2bf3d7c1d..b2658b9220fe 100644
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -28,6 +28,8 @@ void disable_noexec(struct mm_struct *, struct task_struct *);
28 28
29static inline void clear_table(unsigned long *s, unsigned long val, size_t n) 29static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
30{ 30{
31 typedef struct { char _[n]; } addrtype;
32
31 *s = val; 33 *s = val;
32 n = (n / 256) - 1; 34 n = (n / 256) - 1;
33 asm volatile( 35 asm volatile(
@@ -39,7 +41,8 @@ static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
39 "0: mvc 256(256,%0),0(%0)\n" 41 "0: mvc 256(256,%0),0(%0)\n"
40 " la %0,256(%0)\n" 42 " la %0,256(%0)\n"
41 " brct %1,0b\n" 43 " brct %1,0b\n"
42 : "+a" (s), "+d" (n)); 44 : "+a" (s), "+d" (n), "=m" (*(addrtype *) s)
45 : "m" (*(addrtype *) s));
43} 46}
44 47
45static inline void crst_table_init(unsigned long *crst, unsigned long entry) 48static inline void crst_table_init(unsigned long *crst, unsigned long entry)
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 4af80af2a88f..066b99502e09 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -13,6 +13,7 @@
13#ifndef __ASM_S390_PROCESSOR_H 13#ifndef __ASM_S390_PROCESSOR_H
14#define __ASM_S390_PROCESSOR_H 14#define __ASM_S390_PROCESSOR_H
15 15
16#include <linux/linkage.h>
16#include <asm/ptrace.h> 17#include <asm/ptrace.h>
17 18
18#ifdef __KERNEL__ 19#ifdef __KERNEL__
@@ -258,7 +259,7 @@ static inline void enabled_wait(void)
258 * Function to drop a processor into disabled wait state 259 * Function to drop a processor into disabled wait state
259 */ 260 */
260 261
261static inline void disabled_wait(unsigned long code) 262static inline void ATTRIB_NORET disabled_wait(unsigned long code)
262{ 263{
263 unsigned long ctl_buf; 264 unsigned long ctl_buf;
264 psw_t dw_psw; 265 psw_t dw_psw;
@@ -322,6 +323,7 @@ static inline void disabled_wait(unsigned long code)
322 : "=m" (ctl_buf) 323 : "=m" (ctl_buf)
323 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0"); 324 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
324#endif /* __s390x__ */ 325#endif /* __s390x__ */
326 while (1);
325} 327}
326 328
327/* 329/*
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 4734c3f05354..27fc1746de15 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -373,16 +373,16 @@ struct qdio_initialize {
373#define QDIO_FLAG_SYNC_OUTPUT 0x02 373#define QDIO_FLAG_SYNC_OUTPUT 0x02
374#define QDIO_FLAG_PCI_OUT 0x10 374#define QDIO_FLAG_PCI_OUT 0x10
375 375
376extern int qdio_initialize(struct qdio_initialize *init_data); 376extern int qdio_initialize(struct qdio_initialize *);
377extern int qdio_allocate(struct qdio_initialize *init_data); 377extern int qdio_allocate(struct qdio_initialize *);
378extern int qdio_establish(struct qdio_initialize *init_data); 378extern int qdio_establish(struct qdio_initialize *);
379extern int qdio_activate(struct ccw_device *); 379extern int qdio_activate(struct ccw_device *);
380 380
381extern int do_QDIO(struct ccw_device*, unsigned int flags, 381extern int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
382 int q_nr, int qidx, int count); 382 int q_nr, int bufnr, int count);
383extern int qdio_cleanup(struct ccw_device*, int how); 383extern int qdio_cleanup(struct ccw_device*, int);
384extern int qdio_shutdown(struct ccw_device*, int how); 384extern int qdio_shutdown(struct ccw_device*, int);
385extern int qdio_free(struct ccw_device *); 385extern int qdio_free(struct ccw_device *);
386extern struct qdio_ssqd_desc *qdio_get_ssqd_desc(struct ccw_device *cdev); 386extern int qdio_get_ssqd_desc(struct ccw_device *dev, struct qdio_ssqd_desc*);
387 387
388#endif /* __QDIO_H__ */ 388#endif /* __QDIO_H__ */
diff --git a/arch/s390/include/asm/sigp.h b/arch/s390/include/asm/sigp.h
index e16d56f8dfe1..ec403d4304f8 100644
--- a/arch/s390/include/asm/sigp.h
+++ b/arch/s390/include/asm/sigp.h
@@ -61,6 +61,7 @@ typedef enum
61{ 61{
62 ec_schedule=0, 62 ec_schedule=0,
63 ec_call_function, 63 ec_call_function,
64 ec_call_function_single,
64 ec_bit_last 65 ec_bit_last
65} ec_bit_sig; 66} ec_bit_sig;
66 67
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index ae89cf2478fc..024b91e06239 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -91,8 +91,9 @@ extern int __cpu_up (unsigned int cpu);
91extern struct mutex smp_cpu_state_mutex; 91extern struct mutex smp_cpu_state_mutex;
92extern int smp_cpu_polarization[]; 92extern int smp_cpu_polarization[];
93 93
94extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *), 94extern void arch_send_call_function_single_ipi(int cpu);
95 void *info, int wait); 95extern void arch_send_call_function_ipi(cpumask_t mask);
96
96#endif 97#endif
97 98
98#ifndef CONFIG_SMP 99#ifndef CONFIG_SMP
diff --git a/arch/s390/include/asm/sysinfo.h b/arch/s390/include/asm/sysinfo.h
index 79d01343f8b0..ad93212d9e16 100644
--- a/arch/s390/include/asm/sysinfo.h
+++ b/arch/s390/include/asm/sysinfo.h
@@ -118,4 +118,15 @@ static inline int stsi(void *sysinfo, int fc, int sel1, int sel2)
118 return r0; 118 return r0;
119} 119}
120 120
121/*
122 * Service level reporting interface.
123 */
124struct service_level {
125 struct list_head list;
126 void (*seq_print)(struct seq_file *, struct service_level *);
127};
128
129int register_service_level(struct service_level *);
130int unregister_service_level(struct service_level *);
131
121#endif /* __ASM_S390_SYSINFO_H */ 132#endif /* __ASM_S390_SYSINFO_H */
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 819e7d99ca0c..024ef42ed6d7 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -12,6 +12,7 @@
12#define __ASM_SYSTEM_H 12#define __ASM_SYSTEM_H
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/errno.h>
15#include <asm/types.h> 16#include <asm/types.h>
16#include <asm/ptrace.h> 17#include <asm/ptrace.h>
17#include <asm/setup.h> 18#include <asm/setup.h>
@@ -98,13 +99,9 @@ static inline void restore_access_regs(unsigned int *acrs)
98 prev = __switch_to(prev,next); \ 99 prev = __switch_to(prev,next); \
99} while (0) 100} while (0)
100 101
101#ifdef CONFIG_VIRT_CPU_ACCOUNTING
102extern void account_vtime(struct task_struct *); 102extern void account_vtime(struct task_struct *);
103extern void account_tick_vtime(struct task_struct *); 103extern void account_tick_vtime(struct task_struct *);
104extern void account_system_vtime(struct task_struct *); 104extern void account_system_vtime(struct task_struct *);
105#else
106#define account_vtime(x) do { /* empty */ } while (0)
107#endif
108 105
109#ifdef CONFIG_PFAULT 106#ifdef CONFIG_PFAULT
110extern void pfault_irq_init(void); 107extern void pfault_irq_init(void);
@@ -413,8 +410,6 @@ __set_psw_mask(unsigned long mask)
413#define local_mcck_enable() __set_psw_mask(psw_kernel_bits) 410#define local_mcck_enable() __set_psw_mask(psw_kernel_bits)
414#define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK) 411#define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
415 412
416int stfle(unsigned long long *list, int doublewords);
417
418#ifdef CONFIG_SMP 413#ifdef CONFIG_SMP
419 414
420extern void smp_ctl_set_bit(int cr, int bit); 415extern void smp_ctl_set_bit(int cr, int bit);
@@ -438,6 +433,23 @@ static inline unsigned int stfl(void)
438 return S390_lowcore.stfl_fac_list; 433 return S390_lowcore.stfl_fac_list;
439} 434}
440 435
436static inline int __stfle(unsigned long long *list, int doublewords)
437{
438 typedef struct { unsigned long long _[doublewords]; } addrtype;
439 register unsigned long __nr asm("0") = doublewords - 1;
440
441 asm volatile(".insn s,0xb2b00000,%0" /* stfle */
442 : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc");
443 return __nr + 1;
444}
445
446static inline int stfle(unsigned long long *list, int doublewords)
447{
448 if (!(stfl() & (1UL << 24)))
449 return -EOPNOTSUPP;
450 return __stfle(list, doublewords);
451}
452
441static inline unsigned short stap(void) 453static inline unsigned short stap(void)
442{ 454{
443 unsigned short cpu_address; 455 unsigned short cpu_address;
diff --git a/arch/s390/include/asm/timer.h b/arch/s390/include/asm/timer.h
index d98d79e35cd6..61705d60f995 100644
--- a/arch/s390/include/asm/timer.h
+++ b/arch/s390/include/asm/timer.h
@@ -48,18 +48,9 @@ extern int del_virt_timer(struct vtimer_list *timer);
48extern void init_cpu_vtimer(void); 48extern void init_cpu_vtimer(void);
49extern void vtime_init(void); 49extern void vtime_init(void);
50 50
51#ifdef CONFIG_VIRT_TIMER
52
53extern void vtime_start_cpu_timer(void); 51extern void vtime_start_cpu_timer(void);
54extern void vtime_stop_cpu_timer(void); 52extern void vtime_stop_cpu_timer(void);
55 53
56#else
57
58static inline void vtime_start_cpu_timer(void) { }
59static inline void vtime_stop_cpu_timer(void) { }
60
61#endif /* CONFIG_VIRT_TIMER */
62
63#endif /* __KERNEL__ */ 54#endif /* __KERNEL__ */
64 55
65#endif /* _ASM_S390_TIMER_H */ 56#endif /* _ASM_S390_TIMER_H */
diff --git a/arch/s390/include/asm/vdso.h b/arch/s390/include/asm/vdso.h
new file mode 100644
index 000000000000..a44f4fe16a35
--- /dev/null
+++ b/arch/s390/include/asm/vdso.h
@@ -0,0 +1,39 @@
1#ifndef __S390_VDSO_H__
2#define __S390_VDSO_H__
3
4#ifdef __KERNEL__
5
6/* Default link addresses for the vDSOs */
7#define VDSO32_LBASE 0
8#define VDSO64_LBASE 0
9
10#define VDSO_VERSION_STRING LINUX_2.6.26
11
12#ifndef __ASSEMBLY__
13
14/*
15 * Note about this structure:
16 *
17 * NEVER USE THIS IN USERSPACE CODE DIRECTLY. The layout of this
18 * structure is supposed to be known only to the function in the vdso
19 * itself and may change without notice.
20 */
21
22struct vdso_data {
23 __u64 tb_update_count; /* Timebase atomicity ctr 0x00 */
24 __u64 xtime_tod_stamp; /* TOD clock for xtime 0x08 */
25 __u64 xtime_clock_sec; /* Kernel time 0x10 */
26 __u64 xtime_clock_nsec; /* 0x18 */
27 __u64 wtom_clock_sec; /* Wall to monotonic clock 0x20 */
28 __u64 wtom_clock_nsec; /* 0x28 */
29 __u32 tz_minuteswest; /* Minutes west of Greenwich 0x30 */
30 __u32 tz_dsttime; /* Type of dst correction 0x34 */
31};
32
33extern struct vdso_data *vdso_data;
34
35#endif /* __ASSEMBLY__ */
36
37#endif /* __KERNEL__ */
38
39#endif /* __S390_VDSO_H__ */
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 50f657e77344..3edc6c6f258b 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -2,6 +2,11 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5ifdef CONFIG_FUNCTION_TRACER
6# Do not trace early boot code
7CFLAGS_REMOVE_early.o = -pg
8endif
9
5# 10#
6# Passing null pointers is ok for smp code, since we access the lowcore here. 11# Passing null pointers is ok for smp code, since we access the lowcore here.
7# 12#
@@ -12,9 +17,10 @@ CFLAGS_smp.o := -Wno-nonnull
12# 17#
13CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"' 18CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
14 19
15obj-y := bitmap.o traps.o time.o process.o base.o early.o \ 20obj-y := bitmap.o traps.o time.o process.o base.o early.o setup.o \
16 setup.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \ 21 processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
17 s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o 22 s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \
23 vdso.o vtime.o
18 24
19obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o) 25obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o)
20obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o) 26obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
@@ -30,12 +36,16 @@ obj-$(CONFIG_COMPAT) += compat_linux.o compat_signal.o \
30 compat_wrapper.o compat_exec_domain.o \ 36 compat_wrapper.o compat_exec_domain.o \
31 $(compat-obj-y) 37 $(compat-obj-y)
32 38
33obj-$(CONFIG_VIRT_TIMER) += vtime.o
34obj-$(CONFIG_STACKTRACE) += stacktrace.o 39obj-$(CONFIG_STACKTRACE) += stacktrace.o
35obj-$(CONFIG_KPROBES) += kprobes.o 40obj-$(CONFIG_KPROBES) += kprobes.o
41obj-$(CONFIG_FUNCTION_TRACER) += mcount.o
36 42
37# Kexec part 43# Kexec part
38S390_KEXEC_OBJS := machine_kexec.o crash.o 44S390_KEXEC_OBJS := machine_kexec.o crash.o
39S390_KEXEC_OBJS += $(if $(CONFIG_64BIT),relocate_kernel64.o,relocate_kernel.o) 45S390_KEXEC_OBJS += $(if $(CONFIG_64BIT),relocate_kernel64.o,relocate_kernel.o)
40obj-$(CONFIG_KEXEC) += $(S390_KEXEC_OBJS) 46obj-$(CONFIG_KEXEC) += $(S390_KEXEC_OBJS)
41 47
48# vdso
49obj-$(CONFIG_64BIT) += vdso64/
50obj-$(CONFIG_32BIT) += vdso32/
51obj-$(CONFIG_COMPAT) += vdso32/
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 3d144e6020c6..e641f60bac99 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -6,6 +6,7 @@
6 6
7#include <linux/sched.h> 7#include <linux/sched.h>
8#include <linux/kbuild.h> 8#include <linux/kbuild.h>
9#include <asm/vdso.h>
9 10
10int main(void) 11int main(void)
11{ 12{
@@ -38,5 +39,19 @@ int main(void)
38 DEFINE(__SF_BACKCHAIN, offsetof(struct stack_frame, back_chain)); 39 DEFINE(__SF_BACKCHAIN, offsetof(struct stack_frame, back_chain));
39 DEFINE(__SF_GPRS, offsetof(struct stack_frame, gprs)); 40 DEFINE(__SF_GPRS, offsetof(struct stack_frame, gprs));
40 DEFINE(__SF_EMPTY, offsetof(struct stack_frame, empty1)); 41 DEFINE(__SF_EMPTY, offsetof(struct stack_frame, empty1));
42 BLANK();
43 /* timeval/timezone offsets for use by vdso */
44 DEFINE(__VDSO_UPD_COUNT, offsetof(struct vdso_data, tb_update_count));
45 DEFINE(__VDSO_XTIME_STAMP, offsetof(struct vdso_data, xtime_tod_stamp));
46 DEFINE(__VDSO_XTIME_SEC, offsetof(struct vdso_data, xtime_clock_sec));
47 DEFINE(__VDSO_XTIME_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
48 DEFINE(__VDSO_WTOM_SEC, offsetof(struct vdso_data, wtom_clock_sec));
49 DEFINE(__VDSO_WTOM_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
50 DEFINE(__VDSO_TIMEZONE, offsetof(struct vdso_data, tz_minuteswest));
51 /* constants used by the vdso */
52 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
53 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
54 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
55
41 return 0; 56 return 0;
42} 57}
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 4646382af34f..6cc87d8c8682 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -148,9 +148,9 @@ asmlinkage long sys32_getresuid16(u16 __user *ruid, u16 __user *euid, u16 __user
148{ 148{
149 int retval; 149 int retval;
150 150
151 if (!(retval = put_user(high2lowuid(current->uid), ruid)) && 151 if (!(retval = put_user(high2lowuid(current->cred->uid), ruid)) &&
152 !(retval = put_user(high2lowuid(current->euid), euid))) 152 !(retval = put_user(high2lowuid(current->cred->euid), euid)))
153 retval = put_user(high2lowuid(current->suid), suid); 153 retval = put_user(high2lowuid(current->cred->suid), suid);
154 154
155 return retval; 155 return retval;
156} 156}
@@ -165,9 +165,9 @@ asmlinkage long sys32_getresgid16(u16 __user *rgid, u16 __user *egid, u16 __user
165{ 165{
166 int retval; 166 int retval;
167 167
168 if (!(retval = put_user(high2lowgid(current->gid), rgid)) && 168 if (!(retval = put_user(high2lowgid(current->cred->gid), rgid)) &&
169 !(retval = put_user(high2lowgid(current->egid), egid))) 169 !(retval = put_user(high2lowgid(current->cred->egid), egid)))
170 retval = put_user(high2lowgid(current->sgid), sgid); 170 retval = put_user(high2lowgid(current->cred->sgid), sgid);
171 171
172 return retval; 172 return retval;
173} 173}
@@ -217,20 +217,20 @@ asmlinkage long sys32_getgroups16(int gidsetsize, u16 __user *grouplist)
217 if (gidsetsize < 0) 217 if (gidsetsize < 0)
218 return -EINVAL; 218 return -EINVAL;
219 219
220 get_group_info(current->group_info); 220 get_group_info(current->cred->group_info);
221 i = current->group_info->ngroups; 221 i = current->cred->group_info->ngroups;
222 if (gidsetsize) { 222 if (gidsetsize) {
223 if (i > gidsetsize) { 223 if (i > gidsetsize) {
224 i = -EINVAL; 224 i = -EINVAL;
225 goto out; 225 goto out;
226 } 226 }
227 if (groups16_to_user(grouplist, current->group_info)) { 227 if (groups16_to_user(grouplist, current->cred->group_info)) {
228 i = -EFAULT; 228 i = -EFAULT;
229 goto out; 229 goto out;
230 } 230 }
231 } 231 }
232out: 232out:
233 put_group_info(current->group_info); 233 put_group_info(current->cred->group_info);
234 return i; 234 return i;
235} 235}
236 236
@@ -261,22 +261,22 @@ asmlinkage long sys32_setgroups16(int gidsetsize, u16 __user *grouplist)
261 261
262asmlinkage long sys32_getuid16(void) 262asmlinkage long sys32_getuid16(void)
263{ 263{
264 return high2lowuid(current->uid); 264 return high2lowuid(current->cred->uid);
265} 265}
266 266
267asmlinkage long sys32_geteuid16(void) 267asmlinkage long sys32_geteuid16(void)
268{ 268{
269 return high2lowuid(current->euid); 269 return high2lowuid(current->cred->euid);
270} 270}
271 271
272asmlinkage long sys32_getgid16(void) 272asmlinkage long sys32_getgid16(void)
273{ 273{
274 return high2lowgid(current->gid); 274 return high2lowgid(current->cred->gid);
275} 275}
276 276
277asmlinkage long sys32_getegid16(void) 277asmlinkage long sys32_getegid16(void)
278{ 278{
279 return high2lowgid(current->egid); 279 return high2lowgid(current->cred->egid);
280} 280}
281 281
282/* 282/*
diff --git a/arch/s390/kernel/cpcmd.c b/arch/s390/kernel/cpcmd.c
index d8c1131e0815..3e8b8816f309 100644
--- a/arch/s390/kernel/cpcmd.c
+++ b/arch/s390/kernel/cpcmd.c
@@ -7,6 +7,9 @@
7 * Christian Borntraeger (cborntra@de.ibm.com), 7 * Christian Borntraeger (cborntra@de.ibm.com),
8 */ 8 */
9 9
10#define KMSG_COMPONENT "cpcmd"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
10#include <linux/kernel.h> 13#include <linux/kernel.h>
11#include <linux/module.h> 14#include <linux/module.h>
12#include <linux/slab.h> 15#include <linux/slab.h>
@@ -104,8 +107,8 @@ int cpcmd(const char *cmd, char *response, int rlen, int *response_code)
104 (((unsigned long)response + rlen) >> 31)) { 107 (((unsigned long)response + rlen) >> 31)) {
105 lowbuf = kmalloc(rlen, GFP_KERNEL | GFP_DMA); 108 lowbuf = kmalloc(rlen, GFP_KERNEL | GFP_DMA);
106 if (!lowbuf) { 109 if (!lowbuf) {
107 printk(KERN_WARNING 110 pr_warning("The cpcmd kernel function failed to "
108 "cpcmd: could not allocate response buffer\n"); 111 "allocate a response buffer\n");
109 return -ENOMEM; 112 return -ENOMEM;
110 } 113 }
111 spin_lock_irqsave(&cpcmd_lock, flags); 114 spin_lock_irqsave(&cpcmd_lock, flags);
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index d80fcd4a7fe1..ba03fc0a3a56 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -10,6 +10,9 @@
10 * Bugreports to: <Linux390@de.ibm.com> 10 * Bugreports to: <Linux390@de.ibm.com>
11 */ 11 */
12 12
13#define KMSG_COMPONENT "s390dbf"
14#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
15
13#include <linux/stddef.h> 16#include <linux/stddef.h>
14#include <linux/kernel.h> 17#include <linux/kernel.h>
15#include <linux/errno.h> 18#include <linux/errno.h>
@@ -388,7 +391,7 @@ debug_info_copy(debug_info_t* in, int mode)
388 debug_info_free(rc); 391 debug_info_free(rc);
389 } while (1); 392 } while (1);
390 393
391 if(!rc || (mode == NO_AREAS)) 394 if (mode == NO_AREAS)
392 goto out; 395 goto out;
393 396
394 for(i = 0; i < in->nr_areas; i++){ 397 for(i = 0; i < in->nr_areas; i++){
@@ -693,8 +696,8 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
693 /* Since debugfs currently does not support uid/gid other than root, */ 696 /* Since debugfs currently does not support uid/gid other than root, */
694 /* we do not allow gid/uid != 0 until we get support for that. */ 697 /* we do not allow gid/uid != 0 until we get support for that. */
695 if ((uid != 0) || (gid != 0)) 698 if ((uid != 0) || (gid != 0))
696 printk(KERN_WARNING "debug: Warning - Currently only uid/gid " 699 pr_warning("Root becomes the owner of all s390dbf files "
697 "= 0 are supported. Using root as owner now!"); 700 "in sysfs\n");
698 if (!initialized) 701 if (!initialized)
699 BUG(); 702 BUG();
700 mutex_lock(&debug_mutex); 703 mutex_lock(&debug_mutex);
@@ -709,7 +712,7 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
709 debug_register_view(rc, &debug_pages_view); 712 debug_register_view(rc, &debug_pages_view);
710out: 713out:
711 if (!rc){ 714 if (!rc){
712 printk(KERN_ERR "debug: debug_register failed for %s\n",name); 715 pr_err("Registering debug feature %s failed\n", name);
713 } 716 }
714 mutex_unlock(&debug_mutex); 717 mutex_unlock(&debug_mutex);
715 return rc; 718 return rc;
@@ -763,8 +766,8 @@ debug_set_size(debug_info_t* id, int nr_areas, int pages_per_area)
763 if(pages_per_area > 0){ 766 if(pages_per_area > 0){
764 new_areas = debug_areas_alloc(pages_per_area, nr_areas); 767 new_areas = debug_areas_alloc(pages_per_area, nr_areas);
765 if(!new_areas) { 768 if(!new_areas) {
766 printk(KERN_WARNING "debug: could not allocate memory "\ 769 pr_info("Allocating memory for %i pages failed\n",
767 "for pagenumber: %i\n",pages_per_area); 770 pages_per_area);
768 rc = -ENOMEM; 771 rc = -ENOMEM;
769 goto out; 772 goto out;
770 } 773 }
@@ -780,8 +783,7 @@ debug_set_size(debug_info_t* id, int nr_areas, int pages_per_area)
780 memset(id->active_entries,0,sizeof(int)*id->nr_areas); 783 memset(id->active_entries,0,sizeof(int)*id->nr_areas);
781 memset(id->active_pages, 0, sizeof(int)*id->nr_areas); 784 memset(id->active_pages, 0, sizeof(int)*id->nr_areas);
782 spin_unlock_irqrestore(&id->lock,flags); 785 spin_unlock_irqrestore(&id->lock,flags);
783 printk(KERN_INFO "debug: %s: set new size (%i pages)\n"\ 786 pr_info("%s: set new size (%i pages)\n" ,id->name, pages_per_area);
784 ,id->name, pages_per_area);
785out: 787out:
786 return rc; 788 return rc;
787} 789}
@@ -800,10 +802,9 @@ debug_set_level(debug_info_t* id, int new_level)
800 spin_lock_irqsave(&id->lock,flags); 802 spin_lock_irqsave(&id->lock,flags);
801 if(new_level == DEBUG_OFF_LEVEL){ 803 if(new_level == DEBUG_OFF_LEVEL){
802 id->level = DEBUG_OFF_LEVEL; 804 id->level = DEBUG_OFF_LEVEL;
803 printk(KERN_INFO "debug: %s: switched off\n",id->name); 805 pr_info("%s: switched off\n",id->name);
804 } else if ((new_level > DEBUG_MAX_LEVEL) || (new_level < 0)) { 806 } else if ((new_level > DEBUG_MAX_LEVEL) || (new_level < 0)) {
805 printk(KERN_INFO 807 pr_info("%s: level %i is out of range (%i - %i)\n",
806 "debug: %s: level %i is out of range (%i - %i)\n",
807 id->name, new_level, 0, DEBUG_MAX_LEVEL); 808 id->name, new_level, 0, DEBUG_MAX_LEVEL);
808 } else { 809 } else {
809 id->level = new_level; 810 id->level = new_level;
@@ -1108,8 +1109,8 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
1108 pde = debugfs_create_file(view->name, mode, id->debugfs_root_entry, 1109 pde = debugfs_create_file(view->name, mode, id->debugfs_root_entry,
1109 id , &debug_file_ops); 1110 id , &debug_file_ops);
1110 if (!pde){ 1111 if (!pde){
1111 printk(KERN_WARNING "debug: debugfs_create_file() failed!"\ 1112 pr_err("Registering view %s/%s failed due to out of "
1112 " Cannot register view %s/%s\n", id->name,view->name); 1113 "memory\n", id->name,view->name);
1113 rc = -1; 1114 rc = -1;
1114 goto out; 1115 goto out;
1115 } 1116 }
@@ -1119,10 +1120,8 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
1119 break; 1120 break;
1120 } 1121 }
1121 if (i == DEBUG_MAX_VIEWS) { 1122 if (i == DEBUG_MAX_VIEWS) {
1122 printk(KERN_WARNING "debug: cannot register view %s/%s\n", 1123 pr_err("Registering view %s/%s would exceed the maximum "
1123 id->name,view->name); 1124 "number of views %i\n", id->name, view->name, i);
1124 printk(KERN_WARNING
1125 "debug: maximum number of views reached (%i)!\n", i);
1126 debugfs_remove(pde); 1125 debugfs_remove(pde);
1127 rc = -1; 1126 rc = -1;
1128 } else { 1127 } else {
@@ -1303,7 +1302,8 @@ debug_input_level_fn(debug_info_t * id, struct debug_view *view,
1303 new_level = debug_get_uint(str); 1302 new_level = debug_get_uint(str);
1304 } 1303 }
1305 if(new_level < 0) { 1304 if(new_level < 0) {
1306 printk(KERN_INFO "debug: level `%s` is not valid\n", str); 1305 pr_warning("%s is not a valid level for a debug "
1306 "feature\n", str);
1307 rc = -EINVAL; 1307 rc = -EINVAL;
1308 } else { 1308 } else {
1309 debug_set_level(id, new_level); 1309 debug_set_level(id, new_level);
@@ -1380,7 +1380,8 @@ debug_input_flush_fn(debug_info_t * id, struct debug_view *view,
1380 goto out; 1380 goto out;
1381 } 1381 }
1382 1382
1383 printk(KERN_INFO "debug: area `%c` is not valid\n", input_buf[0]); 1383 pr_info("Flushing debug data failed because %c is not a valid "
1384 "area\n", input_buf[0]);
1384 1385
1385out: 1386out:
1386 *offset += user_len; 1387 *offset += user_len;
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 198ea18a534d..55de521aef77 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -109,13 +109,6 @@ STACK_SIZE = 1 << STACK_SHIFT
109 * R15 - kernel stack pointer 109 * R15 - kernel stack pointer
110 */ 110 */
111 111
112 .macro STORE_TIMER lc_offset
113#ifdef CONFIG_VIRT_CPU_ACCOUNTING
114 stpt \lc_offset
115#endif
116 .endm
117
118#ifdef CONFIG_VIRT_CPU_ACCOUNTING
119 .macro UPDATE_VTIME lc_from,lc_to,lc_sum 112 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
120 lm %r10,%r11,\lc_from 113 lm %r10,%r11,\lc_from
121 sl %r10,\lc_to 114 sl %r10,\lc_to
@@ -128,7 +121,6 @@ STACK_SIZE = 1 << STACK_SHIFT
128 al %r10,BASED(.Lc_1) 121 al %r10,BASED(.Lc_1)
1291: stm %r10,%r11,\lc_sum 1221: stm %r10,%r11,\lc_sum
130 .endm 123 .endm
131#endif
132 124
133 .macro SAVE_ALL_BASE savearea 125 .macro SAVE_ALL_BASE savearea
134 stm %r12,%r15,\savearea 126 stm %r12,%r15,\savearea
@@ -198,7 +190,7 @@ STACK_SIZE = 1 << STACK_SHIFT
198 ni \psworg+1,0xfd # clear wait state bit 190 ni \psworg+1,0xfd # clear wait state bit
199 .endif 191 .endif
200 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 192 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
201 STORE_TIMER __LC_EXIT_TIMER 193 stpt __LC_EXIT_TIMER
202 lpsw \psworg # back to caller 194 lpsw \psworg # back to caller
203 .endm 195 .endm
204 196
@@ -247,20 +239,18 @@ __critical_start:
247 239
248 .globl system_call 240 .globl system_call
249system_call: 241system_call:
250 STORE_TIMER __LC_SYNC_ENTER_TIMER 242 stpt __LC_SYNC_ENTER_TIMER
251sysc_saveall: 243sysc_saveall:
252 SAVE_ALL_BASE __LC_SAVE_AREA 244 SAVE_ALL_BASE __LC_SAVE_AREA
253 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 245 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
254 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 246 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
255 lh %r7,0x8a # get svc number from lowcore 247 lh %r7,0x8a # get svc number from lowcore
256#ifdef CONFIG_VIRT_CPU_ACCOUNTING
257sysc_vtime: 248sysc_vtime:
258 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 249 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
259sysc_stime: 250sysc_stime:
260 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 251 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
261sysc_update: 252sysc_update:
262 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 253 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
263#endif
264sysc_do_svc: 254sysc_do_svc:
265 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 255 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
266 ltr %r7,%r7 # test for svc 0 256 ltr %r7,%r7 # test for svc 0
@@ -436,7 +426,7 @@ ret_from_fork:
436 basr %r14,%r1 426 basr %r14,%r1
437 TRACE_IRQS_ON 427 TRACE_IRQS_ON
438 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 428 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
439 b BASED(sysc_return) 429 b BASED(sysc_tracenogo)
440 430
441# 431#
442# kernel_execve function needs to deal with pt_regs that is not 432# kernel_execve function needs to deal with pt_regs that is not
@@ -490,20 +480,18 @@ pgm_check_handler:
490 * we just ignore the PER event (FIXME: is there anything we have to do 480 * we just ignore the PER event (FIXME: is there anything we have to do
491 * for LPSW?). 481 * for LPSW?).
492 */ 482 */
493 STORE_TIMER __LC_SYNC_ENTER_TIMER 483 stpt __LC_SYNC_ENTER_TIMER
494 SAVE_ALL_BASE __LC_SAVE_AREA 484 SAVE_ALL_BASE __LC_SAVE_AREA
495 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 485 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
496 bnz BASED(pgm_per) # got per exception -> special case 486 bnz BASED(pgm_per) # got per exception -> special case
497 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 487 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
498 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 488 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
499#ifdef CONFIG_VIRT_CPU_ACCOUNTING
500 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 489 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
501 bz BASED(pgm_no_vtime) 490 bz BASED(pgm_no_vtime)
502 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 491 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
503 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 492 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
504 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 493 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
505pgm_no_vtime: 494pgm_no_vtime:
506#endif
507 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 495 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
508 TRACE_IRQS_OFF 496 TRACE_IRQS_OFF
509 l %r3,__LC_PGM_ILC # load program interruption code 497 l %r3,__LC_PGM_ILC # load program interruption code
@@ -536,14 +524,12 @@ pgm_per:
536pgm_per_std: 524pgm_per_std:
537 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 525 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
538 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 526 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
539#ifdef CONFIG_VIRT_CPU_ACCOUNTING
540 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 527 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
541 bz BASED(pgm_no_vtime2) 528 bz BASED(pgm_no_vtime2)
542 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 529 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
543 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 530 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
544 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 531 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
545pgm_no_vtime2: 532pgm_no_vtime2:
546#endif
547 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 533 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
548 TRACE_IRQS_OFF 534 TRACE_IRQS_OFF
549 l %r1,__TI_task(%r9) 535 l %r1,__TI_task(%r9)
@@ -565,11 +551,9 @@ pgm_no_vtime2:
565pgm_svcper: 551pgm_svcper:
566 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 552 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
567 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 553 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
568#ifdef CONFIG_VIRT_CPU_ACCOUNTING
569 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 554 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
570 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 555 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
571 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 556 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
572#endif
573 lh %r7,0x8a # get svc number from lowcore 557 lh %r7,0x8a # get svc number from lowcore
574 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 558 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
575 TRACE_IRQS_OFF 559 TRACE_IRQS_OFF
@@ -599,19 +583,17 @@ kernel_per:
599 583
600 .globl io_int_handler 584 .globl io_int_handler
601io_int_handler: 585io_int_handler:
602 STORE_TIMER __LC_ASYNC_ENTER_TIMER 586 stpt __LC_ASYNC_ENTER_TIMER
603 stck __LC_INT_CLOCK 587 stck __LC_INT_CLOCK
604 SAVE_ALL_BASE __LC_SAVE_AREA+16 588 SAVE_ALL_BASE __LC_SAVE_AREA+16
605 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 589 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
606 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 590 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
607#ifdef CONFIG_VIRT_CPU_ACCOUNTING
608 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 591 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
609 bz BASED(io_no_vtime) 592 bz BASED(io_no_vtime)
610 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 593 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
611 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 594 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
612 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 595 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
613io_no_vtime: 596io_no_vtime:
614#endif
615 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 597 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
616 TRACE_IRQS_OFF 598 TRACE_IRQS_OFF
617 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 599 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
@@ -741,19 +723,17 @@ io_notify_resume:
741 723
742 .globl ext_int_handler 724 .globl ext_int_handler
743ext_int_handler: 725ext_int_handler:
744 STORE_TIMER __LC_ASYNC_ENTER_TIMER 726 stpt __LC_ASYNC_ENTER_TIMER
745 stck __LC_INT_CLOCK 727 stck __LC_INT_CLOCK
746 SAVE_ALL_BASE __LC_SAVE_AREA+16 728 SAVE_ALL_BASE __LC_SAVE_AREA+16
747 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 729 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
748 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 730 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
749#ifdef CONFIG_VIRT_CPU_ACCOUNTING
750 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 731 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
751 bz BASED(ext_no_vtime) 732 bz BASED(ext_no_vtime)
752 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 733 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
753 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 734 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
754 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 735 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
755ext_no_vtime: 736ext_no_vtime:
756#endif
757 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 737 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
758 TRACE_IRQS_OFF 738 TRACE_IRQS_OFF
759 la %r2,SP_PTREGS(%r15) # address of register-save area 739 la %r2,SP_PTREGS(%r15) # address of register-save area
@@ -776,7 +756,6 @@ mcck_int_handler:
776 la %r12,__LC_MCK_OLD_PSW 756 la %r12,__LC_MCK_OLD_PSW
777 tm __LC_MCCK_CODE,0x80 # system damage? 757 tm __LC_MCCK_CODE,0x80 # system damage?
778 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid 758 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
779#ifdef CONFIG_VIRT_CPU_ACCOUNTING
780 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER 759 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
781 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA 760 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
782 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 761 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
@@ -793,9 +772,7 @@ mcck_int_handler:
793 la %r14,__LC_LAST_UPDATE_TIMER 772 la %r14,__LC_LAST_UPDATE_TIMER
7940: spt 0(%r14) 7730: spt 0(%r14)
795 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 774 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
7961: 7751: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
797#endif
798 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
799 bno BASED(mcck_int_main) # no -> skip cleanup critical 776 bno BASED(mcck_int_main) # no -> skip cleanup critical
800 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 777 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
801 bnz BASED(mcck_int_main) # from user -> load async stack 778 bnz BASED(mcck_int_main) # from user -> load async stack
@@ -812,7 +789,6 @@ mcck_int_main:
812 be BASED(0f) 789 be BASED(0f)
813 l %r15,__LC_PANIC_STACK # load panic stack 790 l %r15,__LC_PANIC_STACK # load panic stack
8140: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 7910: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
815#ifdef CONFIG_VIRT_CPU_ACCOUNTING
816 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 792 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
817 bno BASED(mcck_no_vtime) # no -> skip cleanup critical 793 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
818 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 794 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
@@ -821,7 +797,6 @@ mcck_int_main:
821 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 797 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
822 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 798 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
823mcck_no_vtime: 799mcck_no_vtime:
824#endif
825 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 800 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
826 la %r2,SP_PTREGS(%r15) # load pt_regs 801 la %r2,SP_PTREGS(%r15) # load pt_regs
827 l %r1,BASED(.Ls390_mcck) 802 l %r1,BASED(.Ls390_mcck)
@@ -843,16 +818,13 @@ mcck_no_vtime:
843mcck_return: 818mcck_return:
844 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 819 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
845 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 820 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
846#ifdef CONFIG_VIRT_CPU_ACCOUNTING
847 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 821 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
848 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 822 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
849 bno BASED(0f) 823 bno BASED(0f)
850 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 824 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
851 stpt __LC_EXIT_TIMER 825 stpt __LC_EXIT_TIMER
852 lpsw __LC_RETURN_MCCK_PSW # back to caller 826 lpsw __LC_RETURN_MCCK_PSW # back to caller
8530: 8270: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
854#endif
855 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
856 lpsw __LC_RETURN_MCCK_PSW # back to caller 828 lpsw __LC_RETURN_MCCK_PSW # back to caller
857 829
858 RESTORE_ALL __LC_RETURN_MCCK_PSW,0 830 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
@@ -976,13 +948,11 @@ cleanup_system_call:
976 b BASED(1f) 948 b BASED(1f)
9770: la %r12,__LC_SAVE_AREA+32 9490: la %r12,__LC_SAVE_AREA+32
9781: 9501:
979#ifdef CONFIG_VIRT_CPU_ACCOUNTING
980 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 951 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
981 bh BASED(0f) 952 bh BASED(0f)
982 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 953 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9830: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) 9540: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
984 bhe BASED(cleanup_vtime) 955 bhe BASED(cleanup_vtime)
985#endif
986 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 956 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
987 bh BASED(0f) 957 bh BASED(0f)
988 mvc __LC_SAVE_AREA(16),0(%r12) 958 mvc __LC_SAVE_AREA(16),0(%r12)
@@ -993,7 +963,6 @@ cleanup_system_call:
993 l %r12,__LC_SAVE_AREA+48 # argh 963 l %r12,__LC_SAVE_AREA+48 # argh
994 st %r15,12(%r12) 964 st %r15,12(%r12)
995 lh %r7,0x8a 965 lh %r7,0x8a
996#ifdef CONFIG_VIRT_CPU_ACCOUNTING
997cleanup_vtime: 966cleanup_vtime:
998 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) 967 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
999 bhe BASED(cleanup_stime) 968 bhe BASED(cleanup_stime)
@@ -1004,18 +973,15 @@ cleanup_stime:
1004 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 973 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
1005cleanup_update: 974cleanup_update:
1006 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 975 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1007#endif
1008 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) 976 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
1009 la %r12,__LC_RETURN_PSW 977 la %r12,__LC_RETURN_PSW
1010 br %r14 978 br %r14
1011cleanup_system_call_insn: 979cleanup_system_call_insn:
1012 .long sysc_saveall + 0x80000000 980 .long sysc_saveall + 0x80000000
1013#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1014 .long system_call + 0x80000000 981 .long system_call + 0x80000000
1015 .long sysc_vtime + 0x80000000 982 .long sysc_vtime + 0x80000000
1016 .long sysc_stime + 0x80000000 983 .long sysc_stime + 0x80000000
1017 .long sysc_update + 0x80000000 984 .long sysc_update + 0x80000000
1018#endif
1019 985
1020cleanup_sysc_return: 986cleanup_sysc_return:
1021 mvc __LC_RETURN_PSW(4),0(%r12) 987 mvc __LC_RETURN_PSW(4),0(%r12)
@@ -1026,11 +992,9 @@ cleanup_sysc_return:
1026cleanup_sysc_leave: 992cleanup_sysc_leave:
1027 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) 993 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
1028 be BASED(2f) 994 be BASED(2f)
1029#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1030 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 995 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1031 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) 996 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1032 be BASED(2f) 997 be BASED(2f)
1033#endif
1034 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 998 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1035 c %r12,BASED(.Lmck_old_psw) 999 c %r12,BASED(.Lmck_old_psw)
1036 bne BASED(0f) 1000 bne BASED(0f)
@@ -1043,9 +1007,7 @@ cleanup_sysc_leave:
1043 br %r14 1007 br %r14
1044cleanup_sysc_leave_insn: 1008cleanup_sysc_leave_insn:
1045 .long sysc_done - 4 + 0x80000000 1009 .long sysc_done - 4 + 0x80000000
1046#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1047 .long sysc_done - 8 + 0x80000000 1010 .long sysc_done - 8 + 0x80000000
1048#endif
1049 1011
1050cleanup_io_return: 1012cleanup_io_return:
1051 mvc __LC_RETURN_PSW(4),0(%r12) 1013 mvc __LC_RETURN_PSW(4),0(%r12)
@@ -1056,11 +1018,9 @@ cleanup_io_return:
1056cleanup_io_leave: 1018cleanup_io_leave:
1057 clc 4(4,%r12),BASED(cleanup_io_leave_insn) 1019 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1058 be BASED(2f) 1020 be BASED(2f)
1059#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1060 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1021 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1061 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) 1022 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1062 be BASED(2f) 1023 be BASED(2f)
1063#endif
1064 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 1024 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1065 c %r12,BASED(.Lmck_old_psw) 1025 c %r12,BASED(.Lmck_old_psw)
1066 bne BASED(0f) 1026 bne BASED(0f)
@@ -1073,9 +1033,7 @@ cleanup_io_leave:
1073 br %r14 1033 br %r14
1074cleanup_io_leave_insn: 1034cleanup_io_leave_insn:
1075 .long io_done - 4 + 0x80000000 1035 .long io_done - 4 + 0x80000000
1076#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1077 .long io_done - 8 + 0x80000000 1036 .long io_done - 8 + 0x80000000
1078#endif
1079 1037
1080/* 1038/*
1081 * Integer constants 1039 * Integer constants
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 89c121ae6339..16bb4fd1a403 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -96,20 +96,12 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
96#define LOCKDEP_SYS_EXIT 96#define LOCKDEP_SYS_EXIT
97#endif 97#endif
98 98
99 .macro STORE_TIMER lc_offset
100#ifdef CONFIG_VIRT_CPU_ACCOUNTING
101 stpt \lc_offset
102#endif
103 .endm
104
105#ifdef CONFIG_VIRT_CPU_ACCOUNTING
106 .macro UPDATE_VTIME lc_from,lc_to,lc_sum 99 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
107 lg %r10,\lc_from 100 lg %r10,\lc_from
108 slg %r10,\lc_to 101 slg %r10,\lc_to
109 alg %r10,\lc_sum 102 alg %r10,\lc_sum
110 stg %r10,\lc_sum 103 stg %r10,\lc_sum
111 .endm 104 .endm
112#endif
113 105
114/* 106/*
115 * Register usage in interrupt handlers: 107 * Register usage in interrupt handlers:
@@ -186,7 +178,7 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
186 ni \psworg+1,0xfd # clear wait state bit 178 ni \psworg+1,0xfd # clear wait state bit
187 .endif 179 .endif
188 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 180 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
189 STORE_TIMER __LC_EXIT_TIMER 181 stpt __LC_EXIT_TIMER
190 lpswe \psworg # back to caller 182 lpswe \psworg # back to caller
191 .endm 183 .endm
192 184
@@ -233,20 +225,18 @@ __critical_start:
233 225
234 .globl system_call 226 .globl system_call
235system_call: 227system_call:
236 STORE_TIMER __LC_SYNC_ENTER_TIMER 228 stpt __LC_SYNC_ENTER_TIMER
237sysc_saveall: 229sysc_saveall:
238 SAVE_ALL_BASE __LC_SAVE_AREA 230 SAVE_ALL_BASE __LC_SAVE_AREA
239 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 231 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
240 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 232 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
241 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore 233 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
242#ifdef CONFIG_VIRT_CPU_ACCOUNTING
243sysc_vtime: 234sysc_vtime:
244 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 235 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
245sysc_stime: 236sysc_stime:
246 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 237 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
247sysc_update: 238sysc_update:
248 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 239 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
249#endif
250sysc_do_svc: 240sysc_do_svc:
251 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 241 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
252 ltgr %r7,%r7 # test for svc 0 242 ltgr %r7,%r7 # test for svc 0
@@ -417,7 +407,7 @@ ret_from_fork:
4170: brasl %r14,schedule_tail 4070: brasl %r14,schedule_tail
418 TRACE_IRQS_ON 408 TRACE_IRQS_ON
419 stosm 24(%r15),0x03 # reenable interrupts 409 stosm 24(%r15),0x03 # reenable interrupts
420 j sysc_return 410 j sysc_tracenogo
421 411
422# 412#
423# kernel_execve function needs to deal with pt_regs that is not 413# kernel_execve function needs to deal with pt_regs that is not
@@ -469,20 +459,18 @@ pgm_check_handler:
469 * we just ignore the PER event (FIXME: is there anything we have to do 459 * we just ignore the PER event (FIXME: is there anything we have to do
470 * for LPSW?). 460 * for LPSW?).
471 */ 461 */
472 STORE_TIMER __LC_SYNC_ENTER_TIMER 462 stpt __LC_SYNC_ENTER_TIMER
473 SAVE_ALL_BASE __LC_SAVE_AREA 463 SAVE_ALL_BASE __LC_SAVE_AREA
474 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 464 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
475 jnz pgm_per # got per exception -> special case 465 jnz pgm_per # got per exception -> special case
476 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 466 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
477 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 467 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
478#ifdef CONFIG_VIRT_CPU_ACCOUNTING
479 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 468 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
480 jz pgm_no_vtime 469 jz pgm_no_vtime
481 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 470 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
482 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 471 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
483 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 472 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
484pgm_no_vtime: 473pgm_no_vtime:
485#endif
486 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 474 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
487 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK 475 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
488 TRACE_IRQS_OFF 476 TRACE_IRQS_OFF
@@ -516,14 +504,12 @@ pgm_per:
516pgm_per_std: 504pgm_per_std:
517 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 505 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
518 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 506 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
519#ifdef CONFIG_VIRT_CPU_ACCOUNTING
520 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 507 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
521 jz pgm_no_vtime2 508 jz pgm_no_vtime2
522 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 509 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
523 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 510 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
524 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 511 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
525pgm_no_vtime2: 512pgm_no_vtime2:
526#endif
527 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 513 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
528 TRACE_IRQS_OFF 514 TRACE_IRQS_OFF
529 lg %r1,__TI_task(%r9) 515 lg %r1,__TI_task(%r9)
@@ -545,11 +531,9 @@ pgm_no_vtime2:
545pgm_svcper: 531pgm_svcper:
546 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 532 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
547 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 533 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
548#ifdef CONFIG_VIRT_CPU_ACCOUNTING
549 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 534 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
550 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 535 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
551 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 536 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
552#endif
553 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore 537 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
554 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 538 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
555 lg %r1,__TI_task(%r9) 539 lg %r1,__TI_task(%r9)
@@ -575,19 +559,17 @@ kernel_per:
575 */ 559 */
576 .globl io_int_handler 560 .globl io_int_handler
577io_int_handler: 561io_int_handler:
578 STORE_TIMER __LC_ASYNC_ENTER_TIMER 562 stpt __LC_ASYNC_ENTER_TIMER
579 stck __LC_INT_CLOCK 563 stck __LC_INT_CLOCK
580 SAVE_ALL_BASE __LC_SAVE_AREA+32 564 SAVE_ALL_BASE __LC_SAVE_AREA+32
581 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 565 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
582 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 566 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
583#ifdef CONFIG_VIRT_CPU_ACCOUNTING
584 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 567 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
585 jz io_no_vtime 568 jz io_no_vtime
586 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 569 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
587 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 570 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
588 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 571 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
589io_no_vtime: 572io_no_vtime:
590#endif
591 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 573 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
592 TRACE_IRQS_OFF 574 TRACE_IRQS_OFF
593 la %r2,SP_PTREGS(%r15) # address of register-save area 575 la %r2,SP_PTREGS(%r15) # address of register-save area
@@ -739,19 +721,17 @@ io_notify_resume:
739 */ 721 */
740 .globl ext_int_handler 722 .globl ext_int_handler
741ext_int_handler: 723ext_int_handler:
742 STORE_TIMER __LC_ASYNC_ENTER_TIMER 724 stpt __LC_ASYNC_ENTER_TIMER
743 stck __LC_INT_CLOCK 725 stck __LC_INT_CLOCK
744 SAVE_ALL_BASE __LC_SAVE_AREA+32 726 SAVE_ALL_BASE __LC_SAVE_AREA+32
745 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 727 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
746 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 728 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
747#ifdef CONFIG_VIRT_CPU_ACCOUNTING
748 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 729 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
749 jz ext_no_vtime 730 jz ext_no_vtime
750 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 731 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
751 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 732 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
752 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 733 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
753ext_no_vtime: 734ext_no_vtime:
754#endif
755 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 735 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
756 TRACE_IRQS_OFF 736 TRACE_IRQS_OFF
757 la %r2,SP_PTREGS(%r15) # address of register-save area 737 la %r2,SP_PTREGS(%r15) # address of register-save area
@@ -773,7 +753,6 @@ mcck_int_handler:
773 la %r12,__LC_MCK_OLD_PSW 753 la %r12,__LC_MCK_OLD_PSW
774 tm __LC_MCCK_CODE,0x80 # system damage? 754 tm __LC_MCCK_CODE,0x80 # system damage?
775 jo mcck_int_main # yes -> rest of mcck code invalid 755 jo mcck_int_main # yes -> rest of mcck code invalid
776#ifdef CONFIG_VIRT_CPU_ACCOUNTING
777 la %r14,4095 756 la %r14,4095
778 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER 757 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
779 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) 758 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
@@ -791,9 +770,7 @@ mcck_int_handler:
791 la %r14,__LC_LAST_UPDATE_TIMER 770 la %r14,__LC_LAST_UPDATE_TIMER
7920: spt 0(%r14) 7710: spt 0(%r14)
793 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 772 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
7941: 7731: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
795#endif
796 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
797 jno mcck_int_main # no -> skip cleanup critical 774 jno mcck_int_main # no -> skip cleanup critical
798 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 775 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
799 jnz mcck_int_main # from user -> load kernel stack 776 jnz mcck_int_main # from user -> load kernel stack
@@ -809,7 +786,6 @@ mcck_int_main:
809 jz 0f 786 jz 0f
810 lg %r15,__LC_PANIC_STACK # load panic stack 787 lg %r15,__LC_PANIC_STACK # load panic stack
8110: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 7880: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
812#ifdef CONFIG_VIRT_CPU_ACCOUNTING
813 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 789 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
814 jno mcck_no_vtime # no -> no timer update 790 jno mcck_no_vtime # no -> no timer update
815 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 791 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
@@ -818,7 +794,6 @@ mcck_int_main:
818 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 794 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
819 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 795 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
820mcck_no_vtime: 796mcck_no_vtime:
821#endif
822 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 797 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
823 la %r2,SP_PTREGS(%r15) # load pt_regs 798 la %r2,SP_PTREGS(%r15) # load pt_regs
824 brasl %r14,s390_do_machine_check 799 brasl %r14,s390_do_machine_check
@@ -839,14 +814,11 @@ mcck_return:
839 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW 814 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
840 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 815 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
841 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 816 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
842#ifdef CONFIG_VIRT_CPU_ACCOUNTING
843 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104 817 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
844 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 818 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
845 jno 0f 819 jno 0f
846 stpt __LC_EXIT_TIMER 820 stpt __LC_EXIT_TIMER
8470: 8210: lpswe __LC_RETURN_MCCK_PSW # back to caller
848#endif
849 lpswe __LC_RETURN_MCCK_PSW # back to caller
850 822
851/* 823/*
852 * Restart interruption handler, kick starter for additional CPUs 824 * Restart interruption handler, kick starter for additional CPUs
@@ -964,13 +936,11 @@ cleanup_system_call:
964 j 1f 936 j 1f
9650: la %r12,__LC_SAVE_AREA+64 9370: la %r12,__LC_SAVE_AREA+64
9661: 9381:
967#ifdef CONFIG_VIRT_CPU_ACCOUNTING
968 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) 939 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
969 jh 0f 940 jh 0f
970 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 941 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9710: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) 9420: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
972 jhe cleanup_vtime 943 jhe cleanup_vtime
973#endif
974 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) 944 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
975 jh 0f 945 jh 0f
976 mvc __LC_SAVE_AREA(32),0(%r12) 946 mvc __LC_SAVE_AREA(32),0(%r12)
@@ -981,7 +951,6 @@ cleanup_system_call:
981 lg %r12,__LC_SAVE_AREA+96 # argh 951 lg %r12,__LC_SAVE_AREA+96 # argh
982 stg %r15,24(%r12) 952 stg %r15,24(%r12)
983 llgh %r7,__LC_SVC_INT_CODE 953 llgh %r7,__LC_SVC_INT_CODE
984#ifdef CONFIG_VIRT_CPU_ACCOUNTING
985cleanup_vtime: 954cleanup_vtime:
986 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) 955 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
987 jhe cleanup_stime 956 jhe cleanup_stime
@@ -992,18 +961,15 @@ cleanup_stime:
992 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 961 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
993cleanup_update: 962cleanup_update:
994 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 963 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
995#endif
996 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) 964 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
997 la %r12,__LC_RETURN_PSW 965 la %r12,__LC_RETURN_PSW
998 br %r14 966 br %r14
999cleanup_system_call_insn: 967cleanup_system_call_insn:
1000 .quad sysc_saveall 968 .quad sysc_saveall
1001#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1002 .quad system_call 969 .quad system_call
1003 .quad sysc_vtime 970 .quad sysc_vtime
1004 .quad sysc_stime 971 .quad sysc_stime
1005 .quad sysc_update 972 .quad sysc_update
1006#endif
1007 973
1008cleanup_sysc_return: 974cleanup_sysc_return:
1009 mvc __LC_RETURN_PSW(8),0(%r12) 975 mvc __LC_RETURN_PSW(8),0(%r12)
@@ -1014,11 +980,9 @@ cleanup_sysc_return:
1014cleanup_sysc_leave: 980cleanup_sysc_leave:
1015 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) 981 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
1016 je 2f 982 je 2f
1017#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1018 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 983 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1019 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) 984 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
1020 je 2f 985 je 2f
1021#endif
1022 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 986 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1023 cghi %r12,__LC_MCK_OLD_PSW 987 cghi %r12,__LC_MCK_OLD_PSW
1024 jne 0f 988 jne 0f
@@ -1031,9 +995,7 @@ cleanup_sysc_leave:
1031 br %r14 995 br %r14
1032cleanup_sysc_leave_insn: 996cleanup_sysc_leave_insn:
1033 .quad sysc_done - 4 997 .quad sysc_done - 4
1034#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1035 .quad sysc_done - 8 998 .quad sysc_done - 8
1036#endif
1037 999
1038cleanup_io_return: 1000cleanup_io_return:
1039 mvc __LC_RETURN_PSW(8),0(%r12) 1001 mvc __LC_RETURN_PSW(8),0(%r12)
@@ -1044,11 +1006,9 @@ cleanup_io_return:
1044cleanup_io_leave: 1006cleanup_io_leave:
1045 clc 8(8,%r12),BASED(cleanup_io_leave_insn) 1007 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1046 je 2f 1008 je 2f
1047#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1048 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1009 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1049 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) 1010 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1050 je 2f 1011 je 2f
1051#endif
1052 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 1012 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1053 cghi %r12,__LC_MCK_OLD_PSW 1013 cghi %r12,__LC_MCK_OLD_PSW
1054 jne 0f 1014 jne 0f
@@ -1061,9 +1021,7 @@ cleanup_io_leave:
1061 br %r14 1021 br %r14
1062cleanup_io_leave_insn: 1022cleanup_io_leave_insn:
1063 .quad io_done - 4 1023 .quad io_done - 4
1064#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1065 .quad io_done - 8 1024 .quad io_done - 8
1066#endif
1067 1025
1068/* 1026/*
1069 * Integer constants 1027 * Integer constants
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 83477c7dc743..ec7e35f6055b 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -461,6 +461,55 @@ start:
461 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7 461 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
462 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff 462 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
463 463
464#
465# startup-code at 0x10000, running in absolute addressing mode
466# this is called either by the ipl loader or directly by PSW restart
467# or linload or SALIPL
468#
469 .org 0x10000
470startup:basr %r13,0 # get base
471.LPG0:
472
473#ifndef CONFIG_MARCH_G5
474 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
475 stidp __LC_CPUID # store cpuid
476 lhi %r0,(3f-2f) / 2
477 la %r1,2f-.LPG0(%r13)
4780: clc __LC_CPUID+4(2),0(%r1)
479 jne 3f
480 lpsw 1f-.LPG0(13) # machine type not good enough, crash
481 .align 16
4821: .long 0x000a0000,0x00000000
4832:
484#if defined(CONFIG_MARCH_Z10)
485 .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086, 0x2094, 0x2096
486#elif defined(CONFIG_MARCH_Z9_109)
487 .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086
488#elif defined(CONFIG_MARCH_Z990)
489 .short 0x9672, 0x2064, 0x2066
490#elif defined(CONFIG_MARCH_Z900)
491 .short 0x9672
492#endif
4933: la %r1,2(%r1)
494 brct %r0,0b
495#endif
496
497 l %r13,0f-.LPG0(%r13)
498 b 0(%r13)
4990: .long startup_continue
500
501#
502# params at 10400 (setup.h)
503#
504 .org PARMAREA
505 .long 0,0 # IPL_DEVICE
506 .long 0,0 # INITRD_START
507 .long 0,0 # INITRD_SIZE
508
509 .org COMMAND_LINE
510 .byte "root=/dev/ram0 ro"
511 .byte 0
512
464#ifdef CONFIG_64BIT 513#ifdef CONFIG_64BIT
465#include "head64.S" 514#include "head64.S"
466#else 515#else
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S
index a816e2de32b9..db476d114caa 100644
--- a/arch/s390/kernel/head31.S
+++ b/arch/s390/kernel/head31.S
@@ -10,34 +10,13 @@
10 * 10 *
11 */ 11 */
12 12
13#
14# startup-code at 0x10000, running in absolute addressing mode
15# this is called either by the ipl loader or directly by PSW restart
16# or linload or SALIPL
17#
18 .org 0x10000
19startup:basr %r13,0 # get base
20.LPG0: l %r13,0f-.LPG0(%r13)
21 b 0(%r13)
220: .long startup_continue
23
24#
25# params at 10400 (setup.h)
26#
27 .org PARMAREA
28 .long 0,0 # IPL_DEVICE
29 .long 0,0 # INITRD_START
30 .long 0,0 # INITRD_SIZE
31
32 .org COMMAND_LINE
33 .byte "root=/dev/ram0 ro"
34 .byte 0
35
36 .org 0x11000 13 .org 0x11000
37 14
38startup_continue: 15startup_continue:
39 basr %r13,0 # get base 16 basr %r13,0 # get base
40.LPG1: mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0) 17.LPG1:
18
19 mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0)
41 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers 20 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
42 l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area 21 l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
43 # move IPL device to lowcore 22 # move IPL device to lowcore
@@ -50,7 +29,6 @@ startup_continue:
50 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE 29 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
51 st %r15,__LC_KERNEL_STACK # set end of kernel stack 30 st %r15,__LC_KERNEL_STACK # set end of kernel stack
52 ahi %r15,-96 31 ahi %r15,-96
53 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
54# 32#
55# Save ipl parameters, clear bss memory, initialize storage key for kernel pages, 33# Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
56# and create a kernel NSS if the SAVESYS= parm is defined 34# and create a kernel NSS if the SAVESYS= parm is defined
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 1d06961e87b3..3ccd36b24b8f 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -10,29 +10,6 @@
10 * 10 *
11 */ 11 */
12 12
13#
14# startup-code at 0x10000, running in absolute addressing mode
15# this is called either by the ipl loader or directly by PSW restart
16# or linload or SALIPL
17#
18 .org 0x10000
19startup:basr %r13,0 # get base
20.LPG0: l %r13,0f-.LPG0(%r13)
21 b 0(%r13)
220: .long startup_continue
23
24#
25# params at 10400 (setup.h)
26#
27 .org PARMAREA
28 .quad 0 # IPL_DEVICE
29 .quad 0 # INITRD_START
30 .quad 0 # INITRD_SIZE
31
32 .org COMMAND_LINE
33 .byte "root=/dev/ram0 ro"
34 .byte 0
35
36 .org 0x11000 13 .org 0x11000
37 14
38startup_continue: 15startup_continue:
@@ -119,7 +96,6 @@ startup_continue:
119 aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE 96 aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
120 stg %r15,__LC_KERNEL_STACK # set end of kernel stack 97 stg %r15,__LC_KERNEL_STACK # set end of kernel stack
121 aghi %r15,-160 98 aghi %r15,-160
122 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
123# 99#
124# Save ipl parameters, clear bss memory, initialize storage key for kernel pages, 100# Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
125# and create a kernel NSS if the SAVESYS= parm is defined 101# and create a kernel NSS if the SAVESYS= parm is defined
diff --git a/arch/s390/kernel/mcount.S b/arch/s390/kernel/mcount.S
new file mode 100644
index 000000000000..397d131a345f
--- /dev/null
+++ b/arch/s390/kernel/mcount.S
@@ -0,0 +1,56 @@
1/*
2 * Copyright IBM Corp. 2008
3 *
4 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>,
5 *
6 */
7
8#ifndef CONFIG_64BIT
9.globl _mcount
10_mcount:
11 stm %r0,%r5,8(%r15)
12 st %r14,56(%r15)
13 lr %r1,%r15
14 ahi %r15,-96
15 l %r3,100(%r15)
16 la %r2,0(%r14)
17 st %r1,0(%r15)
18 la %r3,0(%r3)
19 bras %r14,0f
20 .long ftrace_trace_function
210: l %r14,0(%r14)
22 l %r14,0(%r14)
23 basr %r14,%r14
24 ahi %r15,96
25 lm %r0,%r5,8(%r15)
26 l %r14,56(%r15)
27 br %r14
28
29.globl ftrace_stub
30ftrace_stub:
31 br %r14
32
33#else /* CONFIG_64BIT */
34
35.globl _mcount
36_mcount:
37 stmg %r0,%r5,16(%r15)
38 stg %r14,112(%r15)
39 lgr %r1,%r15
40 aghi %r15,-160
41 stg %r1,0(%r15)
42 lgr %r2,%r14
43 lg %r3,168(%r15)
44 larl %r14,ftrace_trace_function
45 lg %r14,0(%r14)
46 basr %r14,%r14
47 aghi %r15,160
48 lmg %r0,%r5,16(%r15)
49 lg %r14,112(%r15)
50 br %r14
51
52.globl ftrace_stub
53ftrace_stub:
54 br %r14
55
56#endif /* CONFIG_64BIT */
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
new file mode 100644
index 000000000000..82c1872cfe80
--- /dev/null
+++ b/arch/s390/kernel/processor.c
@@ -0,0 +1,98 @@
1/*
2 * arch/s390/kernel/processor.c
3 *
4 * Copyright IBM Corp. 2008
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
6 */
7
8#define KMSG_COMPONENT "cpu"
9#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/smp.h>
14#include <linux/seq_file.h>
15#include <linux/delay.h>
16
17#include <asm/elf.h>
18#include <asm/lowcore.h>
19#include <asm/param.h>
20
21void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
22{
23 pr_info("Processor %d started, address %d, identification %06X\n",
24 cpuinfo->cpu_nr, cpuinfo->cpu_addr, cpuinfo->cpu_id.ident);
25}
26
27/*
28 * show_cpuinfo - Get information on one CPU for use by procfs.
29 */
30
31static int show_cpuinfo(struct seq_file *m, void *v)
32{
33 static const char *hwcap_str[8] = {
34 "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
35 "edat"
36 };
37 struct cpuinfo_S390 *cpuinfo;
38 unsigned long n = (unsigned long) v - 1;
39 int i;
40
41 s390_adjust_jiffies();
42 preempt_disable();
43 if (!n) {
44 seq_printf(m, "vendor_id : IBM/S390\n"
45 "# processors : %i\n"
46 "bogomips per cpu: %lu.%02lu\n",
47 num_online_cpus(), loops_per_jiffy/(500000/HZ),
48 (loops_per_jiffy/(5000/HZ))%100);
49 seq_puts(m, "features\t: ");
50 for (i = 0; i < 8; i++)
51 if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
52 seq_printf(m, "%s ", hwcap_str[i]);
53 seq_puts(m, "\n");
54 }
55
56 if (cpu_online(n)) {
57#ifdef CONFIG_SMP
58 if (smp_processor_id() == n)
59 cpuinfo = &S390_lowcore.cpu_data;
60 else
61 cpuinfo = &lowcore_ptr[n]->cpu_data;
62#else
63 cpuinfo = &S390_lowcore.cpu_data;
64#endif
65 seq_printf(m, "processor %li: "
66 "version = %02X, "
67 "identification = %06X, "
68 "machine = %04X\n",
69 n, cpuinfo->cpu_id.version,
70 cpuinfo->cpu_id.ident,
71 cpuinfo->cpu_id.machine);
72 }
73 preempt_enable();
74 return 0;
75}
76
77static void *c_start(struct seq_file *m, loff_t *pos)
78{
79 return *pos < NR_CPUS ? (void *)((unsigned long) *pos + 1) : NULL;
80}
81
82static void *c_next(struct seq_file *m, void *v, loff_t *pos)
83{
84 ++*pos;
85 return c_start(m, pos);
86}
87
88static void c_stop(struct seq_file *m, void *v)
89{
90}
91
92const struct seq_operations cpuinfo_op = {
93 .start = c_start,
94 .next = c_next,
95 .stop = c_stop,
96 .show = show_cpuinfo,
97};
98
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 38ff2bce1203..75c496f4f16d 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -204,7 +204,6 @@ static unsigned long __peek_user(struct task_struct *child, addr_t addr)
204static int 204static int
205peek_user(struct task_struct *child, addr_t addr, addr_t data) 205peek_user(struct task_struct *child, addr_t addr, addr_t data)
206{ 206{
207 struct user *dummy = NULL;
208 addr_t tmp, mask; 207 addr_t tmp, mask;
209 208
210 /* 209 /*
@@ -213,8 +212,8 @@ peek_user(struct task_struct *child, addr_t addr, addr_t data)
213 */ 212 */
214 mask = __ADDR_MASK; 213 mask = __ADDR_MASK;
215#ifdef CONFIG_64BIT 214#ifdef CONFIG_64BIT
216 if (addr >= (addr_t) &dummy->regs.acrs && 215 if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
217 addr < (addr_t) &dummy->regs.orig_gpr2) 216 addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
218 mask = 3; 217 mask = 3;
219#endif 218#endif
220 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) 219 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
@@ -312,7 +311,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
312static int 311static int
313poke_user(struct task_struct *child, addr_t addr, addr_t data) 312poke_user(struct task_struct *child, addr_t addr, addr_t data)
314{ 313{
315 struct user *dummy = NULL;
316 addr_t mask; 314 addr_t mask;
317 315
318 /* 316 /*
@@ -321,8 +319,8 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data)
321 */ 319 */
322 mask = __ADDR_MASK; 320 mask = __ADDR_MASK;
323#ifdef CONFIG_64BIT 321#ifdef CONFIG_64BIT
324 if (addr >= (addr_t) &dummy->regs.acrs && 322 if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs &&
325 addr < (addr_t) &dummy->regs.orig_gpr2) 323 addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2)
326 mask = 3; 324 mask = 3;
327#endif 325#endif
328 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) 326 if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK)
diff --git a/arch/s390/kernel/s390_ksyms.c b/arch/s390/kernel/s390_ksyms.c
index 48238a114ce9..46b90cb03707 100644
--- a/arch/s390/kernel/s390_ksyms.c
+++ b/arch/s390/kernel/s390_ksyms.c
@@ -14,6 +14,7 @@
14#include <asm/delay.h> 14#include <asm/delay.h>
15#include <asm/pgalloc.h> 15#include <asm/pgalloc.h>
16#include <asm/setup.h> 16#include <asm/setup.h>
17#include <asm/ftrace.h>
17#ifdef CONFIG_IP_MULTICAST 18#ifdef CONFIG_IP_MULTICAST
18#include <net/arp.h> 19#include <net/arp.h>
19#endif 20#endif
@@ -43,3 +44,7 @@ EXPORT_SYMBOL(csum_fold);
43EXPORT_SYMBOL(console_mode); 44EXPORT_SYMBOL(console_mode);
44EXPORT_SYMBOL(console_devno); 45EXPORT_SYMBOL(console_devno);
45EXPORT_SYMBOL(console_irq); 46EXPORT_SYMBOL(console_irq);
47
48#ifdef CONFIG_FUNCTION_TRACER
49EXPORT_SYMBOL(_mcount);
50#endif
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 400b040df7fa..b7a1efd5522c 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -14,6 +14,9 @@
14 * This file handles the architecture-dependent parts of initialization 14 * This file handles the architecture-dependent parts of initialization
15 */ 15 */
16 16
17#define KMSG_COMPONENT "setup"
18#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
19
17#include <linux/errno.h> 20#include <linux/errno.h>
18#include <linux/module.h> 21#include <linux/module.h>
19#include <linux/sched.h> 22#include <linux/sched.h>
@@ -32,7 +35,6 @@
32#include <linux/bootmem.h> 35#include <linux/bootmem.h>
33#include <linux/root_dev.h> 36#include <linux/root_dev.h>
34#include <linux/console.h> 37#include <linux/console.h>
35#include <linux/seq_file.h>
36#include <linux/kernel_stat.h> 38#include <linux/kernel_stat.h>
37#include <linux/device.h> 39#include <linux/device.h>
38#include <linux/notifier.h> 40#include <linux/notifier.h>
@@ -291,8 +293,8 @@ unsigned int switch_amode = 0;
291#endif 293#endif
292EXPORT_SYMBOL_GPL(switch_amode); 294EXPORT_SYMBOL_GPL(switch_amode);
293 295
294static void set_amode_and_uaccess(unsigned long user_amode, 296static int set_amode_and_uaccess(unsigned long user_amode,
295 unsigned long user32_amode) 297 unsigned long user32_amode)
296{ 298{
297 psw_user_bits = PSW_BASE_BITS | PSW_MASK_DAT | user_amode | 299 psw_user_bits = PSW_BASE_BITS | PSW_MASK_DAT | user_amode |
298 PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | 300 PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK |
@@ -309,11 +311,11 @@ static void set_amode_and_uaccess(unsigned long user_amode,
309 PSW_MASK_MCHECK | PSW_DEFAULT_KEY; 311 PSW_MASK_MCHECK | PSW_DEFAULT_KEY;
310 312
311 if (MACHINE_HAS_MVCOS) { 313 if (MACHINE_HAS_MVCOS) {
312 printk("mvcos available.\n");
313 memcpy(&uaccess, &uaccess_mvcos_switch, sizeof(uaccess)); 314 memcpy(&uaccess, &uaccess_mvcos_switch, sizeof(uaccess));
315 return 1;
314 } else { 316 } else {
315 printk("mvcos not available.\n");
316 memcpy(&uaccess, &uaccess_pt, sizeof(uaccess)); 317 memcpy(&uaccess, &uaccess_pt, sizeof(uaccess));
318 return 0;
317 } 319 }
318} 320}
319 321
@@ -328,9 +330,10 @@ static int __init early_parse_switch_amode(char *p)
328early_param("switch_amode", early_parse_switch_amode); 330early_param("switch_amode", early_parse_switch_amode);
329 331
330#else /* CONFIG_S390_SWITCH_AMODE */ 332#else /* CONFIG_S390_SWITCH_AMODE */
331static inline void set_amode_and_uaccess(unsigned long user_amode, 333static inline int set_amode_and_uaccess(unsigned long user_amode,
332 unsigned long user32_amode) 334 unsigned long user32_amode)
333{ 335{
336 return 0;
334} 337}
335#endif /* CONFIG_S390_SWITCH_AMODE */ 338#endif /* CONFIG_S390_SWITCH_AMODE */
336 339
@@ -355,11 +358,20 @@ early_param("noexec", early_parse_noexec);
355static void setup_addressing_mode(void) 358static void setup_addressing_mode(void)
356{ 359{
357 if (s390_noexec) { 360 if (s390_noexec) {
358 printk("S390 execute protection active, "); 361 if (set_amode_and_uaccess(PSW_ASC_SECONDARY,
359 set_amode_and_uaccess(PSW_ASC_SECONDARY, PSW32_ASC_SECONDARY); 362 PSW32_ASC_SECONDARY))
363 pr_info("Execute protection active, "
364 "mvcos available\n");
365 else
366 pr_info("Execute protection active, "
367 "mvcos not available\n");
360 } else if (switch_amode) { 368 } else if (switch_amode) {
361 printk("S390 address spaces switched, "); 369 if (set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY))
362 set_amode_and_uaccess(PSW_ASC_PRIMARY, PSW32_ASC_PRIMARY); 370 pr_info("Address spaces switched, "
371 "mvcos available\n");
372 else
373 pr_info("Address spaces switched, "
374 "mvcos not available\n");
363 } 375 }
364#ifdef CONFIG_TRACE_IRQFLAGS 376#ifdef CONFIG_TRACE_IRQFLAGS
365 sysc_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK; 377 sysc_restore_trace_psw.mask = psw_kernel_bits & ~PSW_MASK_MCHECK;
@@ -572,15 +584,15 @@ setup_memory(void)
572 start = PFN_PHYS(start_pfn) + bmap_size + PAGE_SIZE; 584 start = PFN_PHYS(start_pfn) + bmap_size + PAGE_SIZE;
573 585
574 if (start + INITRD_SIZE > memory_end) { 586 if (start + INITRD_SIZE > memory_end) {
575 printk("initrd extends beyond end of memory " 587 pr_err("initrd extends beyond end of "
576 "(0x%08lx > 0x%08lx)\n" 588 "memory (0x%08lx > 0x%08lx) "
577 "disabling initrd\n", 589 "disabling initrd\n",
578 start + INITRD_SIZE, memory_end); 590 start + INITRD_SIZE, memory_end);
579 INITRD_START = INITRD_SIZE = 0; 591 INITRD_START = INITRD_SIZE = 0;
580 } else { 592 } else {
581 printk("Moving initrd (0x%08lx -> 0x%08lx, " 593 pr_info("Moving initrd (0x%08lx -> "
582 "size: %ld)\n", 594 "0x%08lx, size: %ld)\n",
583 INITRD_START, start, INITRD_SIZE); 595 INITRD_START, start, INITRD_SIZE);
584 memmove((void *) start, (void *) INITRD_START, 596 memmove((void *) start, (void *) INITRD_START,
585 INITRD_SIZE); 597 INITRD_SIZE);
586 INITRD_START = start; 598 INITRD_START = start;
@@ -642,8 +654,9 @@ setup_memory(void)
642 initrd_start = INITRD_START; 654 initrd_start = INITRD_START;
643 initrd_end = initrd_start + INITRD_SIZE; 655 initrd_end = initrd_start + INITRD_SIZE;
644 } else { 656 } else {
645 printk("initrd extends beyond end of memory " 657 pr_err("initrd extends beyond end of "
646 "(0x%08lx > 0x%08lx)\ndisabling initrd\n", 658 "memory (0x%08lx > 0x%08lx) "
659 "disabling initrd\n",
647 initrd_start + INITRD_SIZE, memory_end); 660 initrd_start + INITRD_SIZE, memory_end);
648 initrd_start = initrd_end = 0; 661 initrd_start = initrd_end = 0;
649 } 662 }
@@ -651,23 +664,6 @@ setup_memory(void)
651#endif 664#endif
652} 665}
653 666
654static int __init __stfle(unsigned long long *list, int doublewords)
655{
656 typedef struct { unsigned long long _[doublewords]; } addrtype;
657 register unsigned long __nr asm("0") = doublewords - 1;
658
659 asm volatile(".insn s,0xb2b00000,%0" /* stfle */
660 : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc");
661 return __nr + 1;
662}
663
664int __init stfle(unsigned long long *list, int doublewords)
665{
666 if (!(stfl() & (1UL << 24)))
667 return -EOPNOTSUPP;
668 return __stfle(list, doublewords);
669}
670
671/* 667/*
672 * Setup hardware capabilities. 668 * Setup hardware capabilities.
673 */ 669 */
@@ -739,8 +735,13 @@ static void __init setup_hwcaps(void)
739 strcpy(elf_platform, "z990"); 735 strcpy(elf_platform, "z990");
740 break; 736 break;
741 case 0x2094: 737 case 0x2094:
738 case 0x2096:
742 strcpy(elf_platform, "z9-109"); 739 strcpy(elf_platform, "z9-109");
743 break; 740 break;
741 case 0x2097:
742 case 0x2098:
743 strcpy(elf_platform, "z10");
744 break;
744 } 745 }
745} 746}
746 747
@@ -752,25 +753,34 @@ static void __init setup_hwcaps(void)
752void __init 753void __init
753setup_arch(char **cmdline_p) 754setup_arch(char **cmdline_p)
754{ 755{
756 /* set up preferred console */
757 add_preferred_console("ttyS", 0, NULL);
758
755 /* 759 /*
756 * print what head.S has found out about the machine 760 * print what head.S has found out about the machine
757 */ 761 */
758#ifndef CONFIG_64BIT 762#ifndef CONFIG_64BIT
759 printk((MACHINE_IS_VM) ? 763 if (MACHINE_IS_VM)
760 "We are running under VM (31 bit mode)\n" : 764 pr_info("Linux is running as a z/VM "
761 "We are running native (31 bit mode)\n"); 765 "guest operating system in 31-bit mode\n");
762 printk((MACHINE_HAS_IEEE) ? 766 else
763 "This machine has an IEEE fpu\n" : 767 pr_info("Linux is running natively in 31-bit mode\n");
764 "This machine has no IEEE fpu\n"); 768 if (MACHINE_HAS_IEEE)
769 pr_info("The hardware system has IEEE compatible "
770 "floating point units\n");
771 else
772 pr_info("The hardware system has no IEEE compatible "
773 "floating point units\n");
765#else /* CONFIG_64BIT */ 774#else /* CONFIG_64BIT */
766 if (MACHINE_IS_VM) 775 if (MACHINE_IS_VM)
767 printk("We are running under VM (64 bit mode)\n"); 776 pr_info("Linux is running as a z/VM "
777 "guest operating system in 64-bit mode\n");
768 else if (MACHINE_IS_KVM) { 778 else if (MACHINE_IS_KVM) {
769 printk("We are running under KVM (64 bit mode)\n"); 779 pr_info("Linux is running under KVM in 64-bit mode\n");
770 add_preferred_console("hvc", 0, NULL); 780 add_preferred_console("hvc", 0, NULL);
771 s390_virtio_console_init(); 781 s390_virtio_console_init();
772 } else 782 } else
773 printk("We are running native (64 bit mode)\n"); 783 pr_info("Linux is running natively in 64-bit mode\n");
774#endif /* CONFIG_64BIT */ 784#endif /* CONFIG_64BIT */
775 785
776 /* Have one command line that is parsed and saved in /proc/cmdline */ 786 /* Have one command line that is parsed and saved in /proc/cmdline */
@@ -818,90 +828,3 @@ setup_arch(char **cmdline_p)
818 /* Setup zfcpdump support */ 828 /* Setup zfcpdump support */
819 setup_zfcpdump(console_devno); 829 setup_zfcpdump(console_devno);
820} 830}
821
822void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
823{
824 printk(KERN_INFO "cpu %d "
825#ifdef CONFIG_SMP
826 "phys_idx=%d "
827#endif
828 "vers=%02X ident=%06X machine=%04X unused=%04X\n",
829 cpuinfo->cpu_nr,
830#ifdef CONFIG_SMP
831 cpuinfo->cpu_addr,
832#endif
833 cpuinfo->cpu_id.version,
834 cpuinfo->cpu_id.ident,
835 cpuinfo->cpu_id.machine,
836 cpuinfo->cpu_id.unused);
837}
838
839/*
840 * show_cpuinfo - Get information on one CPU for use by procfs.
841 */
842
843static int show_cpuinfo(struct seq_file *m, void *v)
844{
845 static const char *hwcap_str[8] = {
846 "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
847 "edat"
848 };
849 struct cpuinfo_S390 *cpuinfo;
850 unsigned long n = (unsigned long) v - 1;
851 int i;
852
853 s390_adjust_jiffies();
854 preempt_disable();
855 if (!n) {
856 seq_printf(m, "vendor_id : IBM/S390\n"
857 "# processors : %i\n"
858 "bogomips per cpu: %lu.%02lu\n",
859 num_online_cpus(), loops_per_jiffy/(500000/HZ),
860 (loops_per_jiffy/(5000/HZ))%100);
861 seq_puts(m, "features\t: ");
862 for (i = 0; i < 8; i++)
863 if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
864 seq_printf(m, "%s ", hwcap_str[i]);
865 seq_puts(m, "\n");
866 }
867
868 if (cpu_online(n)) {
869#ifdef CONFIG_SMP
870 if (smp_processor_id() == n)
871 cpuinfo = &S390_lowcore.cpu_data;
872 else
873 cpuinfo = &lowcore_ptr[n]->cpu_data;
874#else
875 cpuinfo = &S390_lowcore.cpu_data;
876#endif
877 seq_printf(m, "processor %li: "
878 "version = %02X, "
879 "identification = %06X, "
880 "machine = %04X\n",
881 n, cpuinfo->cpu_id.version,
882 cpuinfo->cpu_id.ident,
883 cpuinfo->cpu_id.machine);
884 }
885 preempt_enable();
886 return 0;
887}
888
889static void *c_start(struct seq_file *m, loff_t *pos)
890{
891 return *pos < NR_CPUS ? (void *)((unsigned long) *pos + 1) : NULL;
892}
893static void *c_next(struct seq_file *m, void *v, loff_t *pos)
894{
895 ++*pos;
896 return c_start(m, pos);
897}
898static void c_stop(struct seq_file *m, void *v)
899{
900}
901const struct seq_operations cpuinfo_op = {
902 .start = c_start,
903 .next = c_next,
904 .stop = c_stop,
905 .show = show_cpuinfo,
906};
907
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index f03914b8ed2f..3ed5c7a83c6c 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -20,6 +20,9 @@
20 * cpu_number_map in other architectures. 20 * cpu_number_map in other architectures.
21 */ 21 */
22 22
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
23#include <linux/module.h> 26#include <linux/module.h>
24#include <linux/init.h> 27#include <linux/init.h>
25#include <linux/mm.h> 28#include <linux/mm.h>
@@ -71,159 +74,6 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
71 74
72static void smp_ext_bitcall(int, ec_bit_sig); 75static void smp_ext_bitcall(int, ec_bit_sig);
73 76
74/*
75 * Structure and data for __smp_call_function_map(). This is designed to
76 * minimise static memory requirements. It also looks cleaner.
77 */
78static DEFINE_SPINLOCK(call_lock);
79
80struct call_data_struct {
81 void (*func) (void *info);
82 void *info;
83 cpumask_t started;
84 cpumask_t finished;
85 int wait;
86};
87
88static struct call_data_struct *call_data;
89
90/*
91 * 'Call function' interrupt callback
92 */
93static void do_call_function(void)
94{
95 void (*func) (void *info) = call_data->func;
96 void *info = call_data->info;
97 int wait = call_data->wait;
98
99 cpu_set(smp_processor_id(), call_data->started);
100 (*func)(info);
101 if (wait)
102 cpu_set(smp_processor_id(), call_data->finished);;
103}
104
105static void __smp_call_function_map(void (*func) (void *info), void *info,
106 int wait, cpumask_t map)
107{
108 struct call_data_struct data;
109 int cpu, local = 0;
110
111 /*
112 * Can deadlock when interrupts are disabled or if in wrong context.
113 */
114 WARN_ON(irqs_disabled() || in_irq());
115
116 /*
117 * Check for local function call. We have to have the same call order
118 * as in on_each_cpu() because of machine_restart_smp().
119 */
120 if (cpu_isset(smp_processor_id(), map)) {
121 local = 1;
122 cpu_clear(smp_processor_id(), map);
123 }
124
125 cpus_and(map, map, cpu_online_map);
126 if (cpus_empty(map))
127 goto out;
128
129 data.func = func;
130 data.info = info;
131 data.started = CPU_MASK_NONE;
132 data.wait = wait;
133 if (wait)
134 data.finished = CPU_MASK_NONE;
135
136 call_data = &data;
137
138 for_each_cpu_mask(cpu, map)
139 smp_ext_bitcall(cpu, ec_call_function);
140
141 /* Wait for response */
142 while (!cpus_equal(map, data.started))
143 cpu_relax();
144 if (wait)
145 while (!cpus_equal(map, data.finished))
146 cpu_relax();
147out:
148 if (local) {
149 local_irq_disable();
150 func(info);
151 local_irq_enable();
152 }
153}
154
155/*
156 * smp_call_function:
157 * @func: the function to run; this must be fast and non-blocking
158 * @info: an arbitrary pointer to pass to the function
159 * @wait: if true, wait (atomically) until function has completed on other CPUs
160 *
161 * Run a function on all other CPUs.
162 *
163 * You must not call this function with disabled interrupts, from a
164 * hardware interrupt handler or from a bottom half.
165 */
166int smp_call_function(void (*func) (void *info), void *info, int wait)
167{
168 cpumask_t map;
169
170 spin_lock(&call_lock);
171 map = cpu_online_map;
172 cpu_clear(smp_processor_id(), map);
173 __smp_call_function_map(func, info, wait, map);
174 spin_unlock(&call_lock);
175 return 0;
176}
177EXPORT_SYMBOL(smp_call_function);
178
179/*
180 * smp_call_function_single:
181 * @cpu: the CPU where func should run
182 * @func: the function to run; this must be fast and non-blocking
183 * @info: an arbitrary pointer to pass to the function
184 * @wait: if true, wait (atomically) until function has completed on other CPUs
185 *
186 * Run a function on one processor.
187 *
188 * You must not call this function with disabled interrupts, from a
189 * hardware interrupt handler or from a bottom half.
190 */
191int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
192 int wait)
193{
194 spin_lock(&call_lock);
195 __smp_call_function_map(func, info, wait, cpumask_of_cpu(cpu));
196 spin_unlock(&call_lock);
197 return 0;
198}
199EXPORT_SYMBOL(smp_call_function_single);
200
201/**
202 * smp_call_function_mask(): Run a function on a set of other CPUs.
203 * @mask: The set of cpus to run on. Must not include the current cpu.
204 * @func: The function to run. This must be fast and non-blocking.
205 * @info: An arbitrary pointer to pass to the function.
206 * @wait: If true, wait (atomically) until function has completed on other CPUs.
207 *
208 * Returns 0 on success, else a negative status code.
209 *
210 * If @wait is true, then returns once @func has returned; otherwise
211 * it returns just before the target cpu calls @func.
212 *
213 * You must not call this function with disabled interrupts or from a
214 * hardware interrupt handler or from a bottom half handler.
215 */
216int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info,
217 int wait)
218{
219 spin_lock(&call_lock);
220 cpu_clear(smp_processor_id(), mask);
221 __smp_call_function_map(func, info, wait, mask);
222 spin_unlock(&call_lock);
223 return 0;
224}
225EXPORT_SYMBOL(smp_call_function_mask);
226
227void smp_send_stop(void) 77void smp_send_stop(void)
228{ 78{
229 int cpu, rc; 79 int cpu, rc;
@@ -265,7 +115,10 @@ static void do_ext_call_interrupt(__u16 code)
265 bits = xchg(&S390_lowcore.ext_call_fast, 0); 115 bits = xchg(&S390_lowcore.ext_call_fast, 0);
266 116
267 if (test_bit(ec_call_function, &bits)) 117 if (test_bit(ec_call_function, &bits))
268 do_call_function(); 118 generic_smp_call_function_interrupt();
119
120 if (test_bit(ec_call_function_single, &bits))
121 generic_smp_call_function_single_interrupt();
269} 122}
270 123
271/* 124/*
@@ -282,6 +135,19 @@ static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
282 udelay(10); 135 udelay(10);
283} 136}
284 137
138void arch_send_call_function_ipi(cpumask_t mask)
139{
140 int cpu;
141
142 for_each_cpu_mask(cpu, mask)
143 smp_ext_bitcall(cpu, ec_call_function);
144}
145
146void arch_send_call_function_single_ipi(int cpu)
147{
148 smp_ext_bitcall(cpu, ec_call_function_single);
149}
150
285#ifndef CONFIG_64BIT 151#ifndef CONFIG_64BIT
286/* 152/*
287 * this function sends a 'purge tlb' signal to another CPU. 153 * this function sends a 'purge tlb' signal to another CPU.
@@ -382,8 +248,8 @@ static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
382 if (ipl_info.type != IPL_TYPE_FCP_DUMP) 248 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
383 return; 249 return;
384 if (cpu >= NR_CPUS) { 250 if (cpu >= NR_CPUS) {
385 printk(KERN_WARNING "Registers for cpu %i not saved since dump " 251 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
386 "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS); 252 "the dump\n", cpu, NR_CPUS - 1);
387 return; 253 return;
388 } 254 }
389 zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL); 255 zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL);
@@ -556,7 +422,7 @@ static void __init smp_detect_cpus(void)
556 } 422 }
557out: 423out:
558 kfree(info); 424 kfree(info);
559 printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus); 425 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
560 get_online_cpus(); 426 get_online_cpus();
561 __smp_rescan_cpus(); 427 __smp_rescan_cpus();
562 put_online_cpus(); 428 put_online_cpus();
@@ -572,19 +438,17 @@ int __cpuinit start_secondary(void *cpuvoid)
572 preempt_disable(); 438 preempt_disable();
573 /* Enable TOD clock interrupts on the secondary cpu. */ 439 /* Enable TOD clock interrupts on the secondary cpu. */
574 init_cpu_timer(); 440 init_cpu_timer();
575#ifdef CONFIG_VIRT_TIMER
576 /* Enable cpu timer interrupts on the secondary cpu. */ 441 /* Enable cpu timer interrupts on the secondary cpu. */
577 init_cpu_vtimer(); 442 init_cpu_vtimer();
578#endif
579 /* Enable pfault pseudo page faults on this cpu. */ 443 /* Enable pfault pseudo page faults on this cpu. */
580 pfault_init(); 444 pfault_init();
581 445
582 /* call cpu notifiers */ 446 /* call cpu notifiers */
583 notify_cpu_starting(smp_processor_id()); 447 notify_cpu_starting(smp_processor_id());
584 /* Mark this cpu as online */ 448 /* Mark this cpu as online */
585 spin_lock(&call_lock); 449 ipi_call_lock();
586 cpu_set(smp_processor_id(), cpu_online_map); 450 cpu_set(smp_processor_id(), cpu_online_map);
587 spin_unlock(&call_lock); 451 ipi_call_unlock();
588 /* Switch on interrupts */ 452 /* Switch on interrupts */
589 local_irq_enable(); 453 local_irq_enable();
590 /* Print info about this processor */ 454 /* Print info about this processor */
@@ -633,18 +497,15 @@ static int __cpuinit smp_alloc_lowcore(int cpu)
633 497
634 save_area = get_zeroed_page(GFP_KERNEL); 498 save_area = get_zeroed_page(GFP_KERNEL);
635 if (!save_area) 499 if (!save_area)
636 goto out_save_area; 500 goto out;
637 lowcore->extended_save_area_addr = (u32) save_area; 501 lowcore->extended_save_area_addr = (u32) save_area;
638 } 502 }
639#endif 503#endif
640 lowcore_ptr[cpu] = lowcore; 504 lowcore_ptr[cpu] = lowcore;
641 return 0; 505 return 0;
642 506
643#ifndef CONFIG_64BIT
644out_save_area:
645 free_page(panic_stack);
646#endif
647out: 507out:
508 free_page(panic_stack);
648 free_pages(async_stack, ASYNC_ORDER); 509 free_pages(async_stack, ASYNC_ORDER);
649 free_pages((unsigned long) lowcore, lc_order); 510 free_pages((unsigned long) lowcore, lc_order);
650 return -ENOMEM; 511 return -ENOMEM;
@@ -684,12 +545,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
684 545
685 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), 546 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
686 cpu, sigp_set_prefix); 547 cpu, sigp_set_prefix);
687 if (ccode) { 548 if (ccode)
688 printk("sigp_set_prefix failed for cpu %d "
689 "with condition code %d\n",
690 (int) cpu, (int) ccode);
691 return -EIO; 549 return -EIO;
692 }
693 550
694 idle = current_set[cpu]; 551 idle = current_set[cpu];
695 cpu_lowcore = lowcore_ptr[cpu]; 552 cpu_lowcore = lowcore_ptr[cpu];
@@ -772,7 +629,7 @@ void __cpu_die(unsigned int cpu)
772 while (!smp_cpu_not_running(cpu)) 629 while (!smp_cpu_not_running(cpu))
773 cpu_relax(); 630 cpu_relax();
774 smp_free_lowcore(cpu); 631 smp_free_lowcore(cpu);
775 printk(KERN_INFO "Processor %d spun down\n", cpu); 632 pr_info("Processor %d stopped\n", cpu);
776} 633}
777 634
778void cpu_die(void) 635void cpu_die(void)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index f5bd141c8443..d649600df5b9 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -12,6 +12,9 @@
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
13 */ 13 */
14 14
15#define KMSG_COMPONENT "time"
16#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
17
15#include <linux/errno.h> 18#include <linux/errno.h>
16#include <linux/module.h> 19#include <linux/module.h>
17#include <linux/sched.h> 20#include <linux/sched.h>
@@ -20,6 +23,8 @@
20#include <linux/string.h> 23#include <linux/string.h>
21#include <linux/mm.h> 24#include <linux/mm.h>
22#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/cpu.h>
27#include <linux/stop_machine.h>
23#include <linux/time.h> 28#include <linux/time.h>
24#include <linux/sysdev.h> 29#include <linux/sysdev.h>
25#include <linux/delay.h> 30#include <linux/delay.h>
@@ -36,6 +41,7 @@
36#include <asm/delay.h> 41#include <asm/delay.h>
37#include <asm/s390_ext.h> 42#include <asm/s390_ext.h>
38#include <asm/div64.h> 43#include <asm/div64.h>
44#include <asm/vdso.h>
39#include <asm/irq.h> 45#include <asm/irq.h>
40#include <asm/irq_regs.h> 46#include <asm/irq_regs.h>
41#include <asm/timer.h> 47#include <asm/timer.h>
@@ -223,6 +229,36 @@ static struct clocksource clocksource_tod = {
223}; 229};
224 230
225 231
232void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
233{
234 if (clock != &clocksource_tod)
235 return;
236
237 /* Make userspace gettimeofday spin until we're done. */
238 ++vdso_data->tb_update_count;
239 smp_wmb();
240 vdso_data->xtime_tod_stamp = clock->cycle_last;
241 vdso_data->xtime_clock_sec = xtime.tv_sec;
242 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
243 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
244 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
245 smp_wmb();
246 ++vdso_data->tb_update_count;
247}
248
249extern struct timezone sys_tz;
250
251void update_vsyscall_tz(void)
252{
253 /* Make userspace gettimeofday spin until we're done. */
254 ++vdso_data->tb_update_count;
255 smp_wmb();
256 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
257 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
258 smp_wmb();
259 ++vdso_data->tb_update_count;
260}
261
226/* 262/*
227 * Initialize the TOD clock and the CPU timer of 263 * Initialize the TOD clock and the CPU timer of
228 * the boot cpu. 264 * the boot cpu.
@@ -253,10 +289,8 @@ void __init time_init(void)
253 289
254 /* Enable TOD clock interrupts on the boot cpu. */ 290 /* Enable TOD clock interrupts on the boot cpu. */
255 init_cpu_timer(); 291 init_cpu_timer();
256 292 /* Enable cpu timer interrupts on the boot cpu. */
257#ifdef CONFIG_VIRT_TIMER
258 vtime_init(); 293 vtime_init();
259#endif
260} 294}
261 295
262/* 296/*
@@ -288,8 +322,8 @@ static unsigned long long adjust_time(unsigned long long old,
288 } 322 }
289 sched_clock_base_cc += delta; 323 sched_clock_base_cc += delta;
290 if (adjust.offset != 0) { 324 if (adjust.offset != 0) {
291 printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n", 325 pr_notice("The ETR interface has adjusted the clock "
292 adjust.offset); 326 "by %li microseconds\n", adjust.offset);
293 adjust.modes = ADJ_OFFSET_SINGLESHOT; 327 adjust.modes = ADJ_OFFSET_SINGLESHOT;
294 do_adjtimex(&adjust); 328 do_adjtimex(&adjust);
295 } 329 }
@@ -360,6 +394,15 @@ static void enable_sync_clock(void)
360 atomic_set_mask(0x80000000, sw_ptr); 394 atomic_set_mask(0x80000000, sw_ptr);
361} 395}
362 396
397/* Single threaded workqueue used for etr and stp sync events */
398static struct workqueue_struct *time_sync_wq;
399
400static void __init time_init_wq(void)
401{
402 if (!time_sync_wq)
403 time_sync_wq = create_singlethread_workqueue("timesync");
404}
405
363/* 406/*
364 * External Time Reference (ETR) code. 407 * External Time Reference (ETR) code.
365 */ 408 */
@@ -425,6 +468,7 @@ static struct timer_list etr_timer;
425 468
426static void etr_timeout(unsigned long dummy); 469static void etr_timeout(unsigned long dummy);
427static void etr_work_fn(struct work_struct *work); 470static void etr_work_fn(struct work_struct *work);
471static DEFINE_MUTEX(etr_work_mutex);
428static DECLARE_WORK(etr_work, etr_work_fn); 472static DECLARE_WORK(etr_work, etr_work_fn);
429 473
430/* 474/*
@@ -440,8 +484,8 @@ static void etr_reset(void)
440 etr_tolec = get_clock(); 484 etr_tolec = get_clock();
441 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 485 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
442 } else if (etr_port0_online || etr_port1_online) { 486 } else if (etr_port0_online || etr_port1_online) {
443 printk(KERN_WARNING "Running on non ETR capable " 487 pr_warning("The real or virtual hardware system does "
444 "machine, only local mode available.\n"); 488 "not provide an ETR interface\n");
445 etr_port0_online = etr_port1_online = 0; 489 etr_port0_online = etr_port1_online = 0;
446 } 490 }
447} 491}
@@ -452,17 +496,18 @@ static int __init etr_init(void)
452 496
453 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 497 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
454 return 0; 498 return 0;
499 time_init_wq();
455 /* Check if this machine has the steai instruction. */ 500 /* Check if this machine has the steai instruction. */
456 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 501 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
457 etr_steai_available = 1; 502 etr_steai_available = 1;
458 setup_timer(&etr_timer, etr_timeout, 0UL); 503 setup_timer(&etr_timer, etr_timeout, 0UL);
459 if (etr_port0_online) { 504 if (etr_port0_online) {
460 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 505 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
461 schedule_work(&etr_work); 506 queue_work(time_sync_wq, &etr_work);
462 } 507 }
463 if (etr_port1_online) { 508 if (etr_port1_online) {
464 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 509 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
465 schedule_work(&etr_work); 510 queue_work(time_sync_wq, &etr_work);
466 } 511 }
467 return 0; 512 return 0;
468} 513}
@@ -489,7 +534,7 @@ void etr_switch_to_local(void)
489 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 534 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
490 disable_sync_clock(NULL); 535 disable_sync_clock(NULL);
491 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 536 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
492 schedule_work(&etr_work); 537 queue_work(time_sync_wq, &etr_work);
493} 538}
494 539
495/* 540/*
@@ -505,7 +550,7 @@ void etr_sync_check(void)
505 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 550 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
506 disable_sync_clock(NULL); 551 disable_sync_clock(NULL);
507 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 552 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
508 schedule_work(&etr_work); 553 queue_work(time_sync_wq, &etr_work);
509} 554}
510 555
511/* 556/*
@@ -529,13 +574,13 @@ static void etr_timing_alert(struct etr_irq_parm *intparm)
529 * Both ports are not up-to-date now. 574 * Both ports are not up-to-date now.
530 */ 575 */
531 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 576 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
532 schedule_work(&etr_work); 577 queue_work(time_sync_wq, &etr_work);
533} 578}
534 579
535static void etr_timeout(unsigned long dummy) 580static void etr_timeout(unsigned long dummy)
536{ 581{
537 set_bit(ETR_EVENT_UPDATE, &etr_events); 582 set_bit(ETR_EVENT_UPDATE, &etr_events);
538 schedule_work(&etr_work); 583 queue_work(time_sync_wq, &etr_work);
539} 584}
540 585
541/* 586/*
@@ -642,14 +687,16 @@ static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
642} 687}
643 688
644struct clock_sync_data { 689struct clock_sync_data {
690 atomic_t cpus;
645 int in_sync; 691 int in_sync;
646 unsigned long long fixup_cc; 692 unsigned long long fixup_cc;
693 int etr_port;
694 struct etr_aib *etr_aib;
647}; 695};
648 696
649static void clock_sync_cpu_start(void *dummy) 697static void clock_sync_cpu(struct clock_sync_data *sync)
650{ 698{
651 struct clock_sync_data *sync = dummy; 699 atomic_dec(&sync->cpus);
652
653 enable_sync_clock(); 700 enable_sync_clock();
654 /* 701 /*
655 * This looks like a busy wait loop but it isn't. etr_sync_cpus 702 * This looks like a busy wait loop but it isn't. etr_sync_cpus
@@ -675,39 +722,35 @@ static void clock_sync_cpu_start(void *dummy)
675 fixup_clock_comparator(sync->fixup_cc); 722 fixup_clock_comparator(sync->fixup_cc);
676} 723}
677 724
678static void clock_sync_cpu_end(void *dummy)
679{
680}
681
682/* 725/*
683 * Sync the TOD clock using the port refered to by aibp. This port 726 * Sync the TOD clock using the port refered to by aibp. This port
684 * has to be enabled and the other port has to be disabled. The 727 * has to be enabled and the other port has to be disabled. The
685 * last eacr update has to be more than 1.6 seconds in the past. 728 * last eacr update has to be more than 1.6 seconds in the past.
686 */ 729 */
687static int etr_sync_clock(struct etr_aib *aib, int port) 730static int etr_sync_clock(void *data)
688{ 731{
689 struct etr_aib *sync_port; 732 static int first;
690 struct clock_sync_data etr_sync;
691 unsigned long long clock, old_clock, delay, delta; 733 unsigned long long clock, old_clock, delay, delta;
692 int follows; 734 struct clock_sync_data *etr_sync;
735 struct etr_aib *sync_port, *aib;
736 int port;
693 int rc; 737 int rc;
694 738
695 /* Check if the current aib is adjacent to the sync port aib. */ 739 etr_sync = data;
696 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
697 follows = etr_aib_follows(sync_port, aib, port);
698 memcpy(sync_port, aib, sizeof(*aib));
699 if (!follows)
700 return -EAGAIN;
701 740
702 /* 741 if (xchg(&first, 1) == 1) {
703 * Catch all other cpus and make them wait until we have 742 /* Slave */
704 * successfully synced the clock. smp_call_function will 743 clock_sync_cpu(etr_sync);
705 * return after all other cpus are in etr_sync_cpu_start. 744 return 0;
706 */ 745 }
707 memset(&etr_sync, 0, sizeof(etr_sync)); 746
708 preempt_disable(); 747 /* Wait until all other cpus entered the sync function. */
709 smp_call_function(clock_sync_cpu_start, &etr_sync, 0); 748 while (atomic_read(&etr_sync->cpus) != 0)
710 local_irq_disable(); 749 cpu_relax();
750
751 port = etr_sync->etr_port;
752 aib = etr_sync->etr_aib;
753 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
711 enable_sync_clock(); 754 enable_sync_clock();
712 755
713 /* Set clock to next OTE. */ 756 /* Set clock to next OTE. */
@@ -724,16 +767,16 @@ static int etr_sync_clock(struct etr_aib *aib, int port)
724 delay = (unsigned long long) 767 delay = (unsigned long long)
725 (aib->edf2.etv - sync_port->edf2.etv) << 32; 768 (aib->edf2.etv - sync_port->edf2.etv) << 32;
726 delta = adjust_time(old_clock, clock, delay); 769 delta = adjust_time(old_clock, clock, delay);
727 etr_sync.fixup_cc = delta; 770 etr_sync->fixup_cc = delta;
728 fixup_clock_comparator(delta); 771 fixup_clock_comparator(delta);
729 /* Verify that the clock is properly set. */ 772 /* Verify that the clock is properly set. */
730 if (!etr_aib_follows(sync_port, aib, port)) { 773 if (!etr_aib_follows(sync_port, aib, port)) {
731 /* Didn't work. */ 774 /* Didn't work. */
732 disable_sync_clock(NULL); 775 disable_sync_clock(NULL);
733 etr_sync.in_sync = -EAGAIN; 776 etr_sync->in_sync = -EAGAIN;
734 rc = -EAGAIN; 777 rc = -EAGAIN;
735 } else { 778 } else {
736 etr_sync.in_sync = 1; 779 etr_sync->in_sync = 1;
737 rc = 0; 780 rc = 0;
738 } 781 }
739 } else { 782 } else {
@@ -741,12 +784,33 @@ static int etr_sync_clock(struct etr_aib *aib, int port)
741 __ctl_clear_bit(0, 29); 784 __ctl_clear_bit(0, 29);
742 __ctl_clear_bit(14, 21); 785 __ctl_clear_bit(14, 21);
743 disable_sync_clock(NULL); 786 disable_sync_clock(NULL);
744 etr_sync.in_sync = -EAGAIN; 787 etr_sync->in_sync = -EAGAIN;
745 rc = -EAGAIN; 788 rc = -EAGAIN;
746 } 789 }
747 local_irq_enable(); 790 xchg(&first, 0);
748 smp_call_function(clock_sync_cpu_end, NULL, 0); 791 return rc;
749 preempt_enable(); 792}
793
794static int etr_sync_clock_stop(struct etr_aib *aib, int port)
795{
796 struct clock_sync_data etr_sync;
797 struct etr_aib *sync_port;
798 int follows;
799 int rc;
800
801 /* Check if the current aib is adjacent to the sync port aib. */
802 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
803 follows = etr_aib_follows(sync_port, aib, port);
804 memcpy(sync_port, aib, sizeof(*aib));
805 if (!follows)
806 return -EAGAIN;
807 memset(&etr_sync, 0, sizeof(etr_sync));
808 etr_sync.etr_aib = aib;
809 etr_sync.etr_port = port;
810 get_online_cpus();
811 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
812 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
813 put_online_cpus();
750 return rc; 814 return rc;
751} 815}
752 816
@@ -903,7 +967,7 @@ static void etr_update_eacr(struct etr_eacr eacr)
903} 967}
904 968
905/* 969/*
906 * ETR tasklet. In this function you'll find the main logic. In 970 * ETR work. In this function you'll find the main logic. In
907 * particular this is the only function that calls etr_update_eacr(), 971 * particular this is the only function that calls etr_update_eacr(),
908 * it "controls" the etr control register. 972 * it "controls" the etr control register.
909 */ 973 */
@@ -914,6 +978,9 @@ static void etr_work_fn(struct work_struct *work)
914 struct etr_aib aib; 978 struct etr_aib aib;
915 int sync_port; 979 int sync_port;
916 980
981 /* prevent multiple execution. */
982 mutex_lock(&etr_work_mutex);
983
917 /* Create working copy of etr_eacr. */ 984 /* Create working copy of etr_eacr. */
918 eacr = etr_eacr; 985 eacr = etr_eacr;
919 986
@@ -929,7 +996,7 @@ static void etr_work_fn(struct work_struct *work)
929 del_timer_sync(&etr_timer); 996 del_timer_sync(&etr_timer);
930 etr_update_eacr(eacr); 997 etr_update_eacr(eacr);
931 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 998 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
932 return; 999 goto out_unlock;
933 } 1000 }
934 1001
935 /* Store aib to get the current ETR status word. */ 1002 /* Store aib to get the current ETR status word. */
@@ -1016,7 +1083,7 @@ static void etr_work_fn(struct work_struct *work)
1016 eacr.es || sync_port < 0) { 1083 eacr.es || sync_port < 0) {
1017 etr_update_eacr(eacr); 1084 etr_update_eacr(eacr);
1018 etr_set_tolec_timeout(now); 1085 etr_set_tolec_timeout(now);
1019 return; 1086 goto out_unlock;
1020 } 1087 }
1021 1088
1022 /* 1089 /*
@@ -1036,7 +1103,7 @@ static void etr_work_fn(struct work_struct *work)
1036 etr_update_eacr(eacr); 1103 etr_update_eacr(eacr);
1037 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1104 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1038 if (now < etr_tolec + (1600000 << 12) || 1105 if (now < etr_tolec + (1600000 << 12) ||
1039 etr_sync_clock(&aib, sync_port) != 0) { 1106 etr_sync_clock_stop(&aib, sync_port) != 0) {
1040 /* Sync failed. Try again in 1/2 second. */ 1107 /* Sync failed. Try again in 1/2 second. */
1041 eacr.es = 0; 1108 eacr.es = 0;
1042 etr_update_eacr(eacr); 1109 etr_update_eacr(eacr);
@@ -1044,6 +1111,8 @@ static void etr_work_fn(struct work_struct *work)
1044 etr_set_sync_timeout(); 1111 etr_set_sync_timeout();
1045 } else 1112 } else
1046 etr_set_tolec_timeout(now); 1113 etr_set_tolec_timeout(now);
1114out_unlock:
1115 mutex_unlock(&etr_work_mutex);
1047} 1116}
1048 1117
1049/* 1118/*
@@ -1125,13 +1194,13 @@ static ssize_t etr_online_store(struct sys_device *dev,
1125 return count; /* Nothing to do. */ 1194 return count; /* Nothing to do. */
1126 etr_port0_online = value; 1195 etr_port0_online = value;
1127 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1196 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1128 schedule_work(&etr_work); 1197 queue_work(time_sync_wq, &etr_work);
1129 } else { 1198 } else {
1130 if (etr_port1_online == value) 1199 if (etr_port1_online == value)
1131 return count; /* Nothing to do. */ 1200 return count; /* Nothing to do. */
1132 etr_port1_online = value; 1201 etr_port1_online = value;
1133 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1202 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1134 schedule_work(&etr_work); 1203 queue_work(time_sync_wq, &etr_work);
1135 } 1204 }
1136 return count; 1205 return count;
1137} 1206}
@@ -1332,6 +1401,7 @@ static struct stp_sstpi stp_info;
1332static void *stp_page; 1401static void *stp_page;
1333 1402
1334static void stp_work_fn(struct work_struct *work); 1403static void stp_work_fn(struct work_struct *work);
1404static DEFINE_MUTEX(stp_work_mutex);
1335static DECLARE_WORK(stp_work, stp_work_fn); 1405static DECLARE_WORK(stp_work, stp_work_fn);
1336 1406
1337static int __init early_parse_stp(char *p) 1407static int __init early_parse_stp(char *p)
@@ -1356,7 +1426,8 @@ static void __init stp_reset(void)
1356 if (rc == 0) 1426 if (rc == 0)
1357 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1427 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1358 else if (stp_online) { 1428 else if (stp_online) {
1359 printk(KERN_WARNING "Running on non STP capable machine.\n"); 1429 pr_warning("The real or virtual hardware system does "
1430 "not provide an STP interface\n");
1360 free_bootmem((unsigned long) stp_page, PAGE_SIZE); 1431 free_bootmem((unsigned long) stp_page, PAGE_SIZE);
1361 stp_page = NULL; 1432 stp_page = NULL;
1362 stp_online = 0; 1433 stp_online = 0;
@@ -1365,8 +1436,12 @@ static void __init stp_reset(void)
1365 1436
1366static int __init stp_init(void) 1437static int __init stp_init(void)
1367{ 1438{
1368 if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online) 1439 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1369 schedule_work(&stp_work); 1440 return 0;
1441 time_init_wq();
1442 if (!stp_online)
1443 return 0;
1444 queue_work(time_sync_wq, &stp_work);
1370 return 0; 1445 return 0;
1371} 1446}
1372 1447
@@ -1383,7 +1458,7 @@ arch_initcall(stp_init);
1383static void stp_timing_alert(struct stp_irq_parm *intparm) 1458static void stp_timing_alert(struct stp_irq_parm *intparm)
1384{ 1459{
1385 if (intparm->tsc || intparm->lac || intparm->tcpc) 1460 if (intparm->tsc || intparm->lac || intparm->tcpc)
1386 schedule_work(&stp_work); 1461 queue_work(time_sync_wq, &stp_work);
1387} 1462}
1388 1463
1389/* 1464/*
@@ -1397,7 +1472,7 @@ void stp_sync_check(void)
1397 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 1472 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1398 return; 1473 return;
1399 disable_sync_clock(NULL); 1474 disable_sync_clock(NULL);
1400 schedule_work(&stp_work); 1475 queue_work(time_sync_wq, &stp_work);
1401} 1476}
1402 1477
1403/* 1478/*
@@ -1411,46 +1486,34 @@ void stp_island_check(void)
1411 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 1486 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1412 return; 1487 return;
1413 disable_sync_clock(NULL); 1488 disable_sync_clock(NULL);
1414 schedule_work(&stp_work); 1489 queue_work(time_sync_wq, &stp_work);
1415} 1490}
1416 1491
1417/* 1492
1418 * STP tasklet. Check for the STP state and take over the clock 1493static int stp_sync_clock(void *data)
1419 * synchronization if the STP clock source is usable.
1420 */
1421static void stp_work_fn(struct work_struct *work)
1422{ 1494{
1423 struct clock_sync_data stp_sync; 1495 static int first;
1424 unsigned long long old_clock, delta; 1496 unsigned long long old_clock, delta;
1497 struct clock_sync_data *stp_sync;
1425 int rc; 1498 int rc;
1426 1499
1427 if (!stp_online) { 1500 stp_sync = data;
1428 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1429 return;
1430 }
1431 1501
1432 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1502 if (xchg(&first, 1) == 1) {
1433 if (rc) 1503 /* Slave */
1434 return; 1504 clock_sync_cpu(stp_sync);
1505 return 0;
1506 }
1435 1507
1436 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1508 /* Wait until all other cpus entered the sync function. */
1437 if (rc || stp_info.c == 0) 1509 while (atomic_read(&stp_sync->cpus) != 0)
1438 return; 1510 cpu_relax();
1439 1511
1440 /*
1441 * Catch all other cpus and make them wait until we have
1442 * successfully synced the clock. smp_call_function will
1443 * return after all other cpus are in clock_sync_cpu_start.
1444 */
1445 memset(&stp_sync, 0, sizeof(stp_sync));
1446 preempt_disable();
1447 smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
1448 local_irq_disable();
1449 enable_sync_clock(); 1512 enable_sync_clock();
1450 1513
1451 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1514 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1452 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 1515 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1453 schedule_work(&etr_work); 1516 queue_work(time_sync_wq, &etr_work);
1454 1517
1455 rc = 0; 1518 rc = 0;
1456 if (stp_info.todoff[0] || stp_info.todoff[1] || 1519 if (stp_info.todoff[0] || stp_info.todoff[1] ||
@@ -1469,16 +1532,49 @@ static void stp_work_fn(struct work_struct *work)
1469 } 1532 }
1470 if (rc) { 1533 if (rc) {
1471 disable_sync_clock(NULL); 1534 disable_sync_clock(NULL);
1472 stp_sync.in_sync = -EAGAIN; 1535 stp_sync->in_sync = -EAGAIN;
1473 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1536 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1474 if (etr_port0_online || etr_port1_online) 1537 if (etr_port0_online || etr_port1_online)
1475 schedule_work(&etr_work); 1538 queue_work(time_sync_wq, &etr_work);
1476 } else 1539 } else
1477 stp_sync.in_sync = 1; 1540 stp_sync->in_sync = 1;
1541 xchg(&first, 0);
1542 return 0;
1543}
1544
1545/*
1546 * STP work. Check for the STP state and take over the clock
1547 * synchronization if the STP clock source is usable.
1548 */
1549static void stp_work_fn(struct work_struct *work)
1550{
1551 struct clock_sync_data stp_sync;
1552 int rc;
1553
1554 /* prevent multiple execution. */
1555 mutex_lock(&stp_work_mutex);
1556
1557 if (!stp_online) {
1558 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1559 goto out_unlock;
1560 }
1561
1562 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1563 if (rc)
1564 goto out_unlock;
1565
1566 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1567 if (rc || stp_info.c == 0)
1568 goto out_unlock;
1569
1570 memset(&stp_sync, 0, sizeof(stp_sync));
1571 get_online_cpus();
1572 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1573 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1574 put_online_cpus();
1478 1575
1479 local_irq_enable(); 1576out_unlock:
1480 smp_call_function(clock_sync_cpu_end, NULL, 0); 1577 mutex_unlock(&stp_work_mutex);
1481 preempt_enable();
1482} 1578}
1483 1579
1484/* 1580/*
@@ -1587,7 +1683,7 @@ static ssize_t stp_online_store(struct sysdev_class *class,
1587 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1683 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1588 return -EOPNOTSUPP; 1684 return -EOPNOTSUPP;
1589 stp_online = value; 1685 stp_online = value;
1590 schedule_work(&stp_work); 1686 queue_work(time_sync_wq, &stp_work);
1591 return count; 1687 return count;
1592} 1688}
1593 1689
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 0601cd3231e4..cc362c9ea8f1 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -3,6 +3,9 @@
3 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> 3 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
4 */ 4 */
5 5
6#define KMSG_COMPONENT "cpu"
7#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
8
6#include <linux/kernel.h> 9#include <linux/kernel.h>
7#include <linux/mm.h> 10#include <linux/mm.h>
8#include <linux/init.h> 11#include <linux/init.h>
@@ -12,6 +15,7 @@
12#include <linux/workqueue.h> 15#include <linux/workqueue.h>
13#include <linux/cpu.h> 16#include <linux/cpu.h>
14#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/cpuset.h>
15#include <asm/delay.h> 19#include <asm/delay.h>
16#include <asm/s390_ext.h> 20#include <asm/s390_ext.h>
17#include <asm/sysinfo.h> 21#include <asm/sysinfo.h>
@@ -57,11 +61,11 @@ struct core_info {
57 cpumask_t mask; 61 cpumask_t mask;
58}; 62};
59 63
64static int topology_enabled;
60static void topology_work_fn(struct work_struct *work); 65static void topology_work_fn(struct work_struct *work);
61static struct tl_info *tl_info; 66static struct tl_info *tl_info;
62static struct core_info core_info; 67static struct core_info core_info;
63static int machine_has_topology; 68static int machine_has_topology;
64static int machine_has_topology_irq;
65static struct timer_list topology_timer; 69static struct timer_list topology_timer;
66static void set_topology_timer(void); 70static void set_topology_timer(void);
67static DECLARE_WORK(topology_work, topology_work_fn); 71static DECLARE_WORK(topology_work, topology_work_fn);
@@ -77,8 +81,8 @@ cpumask_t cpu_coregroup_map(unsigned int cpu)
77 cpumask_t mask; 81 cpumask_t mask;
78 82
79 cpus_clear(mask); 83 cpus_clear(mask);
80 if (!machine_has_topology) 84 if (!topology_enabled || !machine_has_topology)
81 return cpu_present_map; 85 return cpu_possible_map;
82 spin_lock_irqsave(&topology_lock, flags); 86 spin_lock_irqsave(&topology_lock, flags);
83 while (core) { 87 while (core) {
84 if (cpu_isset(cpu, core->mask)) { 88 if (cpu_isset(cpu, core->mask)) {
@@ -173,7 +177,7 @@ static void topology_update_polarization_simple(void)
173 int cpu; 177 int cpu;
174 178
175 mutex_lock(&smp_cpu_state_mutex); 179 mutex_lock(&smp_cpu_state_mutex);
176 for_each_present_cpu(cpu) 180 for_each_possible_cpu(cpu)
177 smp_cpu_polarization[cpu] = POLARIZATION_HRZ; 181 smp_cpu_polarization[cpu] = POLARIZATION_HRZ;
178 mutex_unlock(&smp_cpu_state_mutex); 182 mutex_unlock(&smp_cpu_state_mutex);
179} 183}
@@ -204,7 +208,7 @@ int topology_set_cpu_management(int fc)
204 rc = ptf(PTF_HORIZONTAL); 208 rc = ptf(PTF_HORIZONTAL);
205 if (rc) 209 if (rc)
206 return -EBUSY; 210 return -EBUSY;
207 for_each_present_cpu(cpu) 211 for_each_possible_cpu(cpu)
208 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; 212 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
209 return rc; 213 return rc;
210} 214}
@@ -213,11 +217,11 @@ static void update_cpu_core_map(void)
213{ 217{
214 int cpu; 218 int cpu;
215 219
216 for_each_present_cpu(cpu) 220 for_each_possible_cpu(cpu)
217 cpu_core_map[cpu] = cpu_coregroup_map(cpu); 221 cpu_core_map[cpu] = cpu_coregroup_map(cpu);
218} 222}
219 223
220void arch_update_cpu_topology(void) 224int arch_update_cpu_topology(void)
221{ 225{
222 struct tl_info *info = tl_info; 226 struct tl_info *info = tl_info;
223 struct sys_device *sysdev; 227 struct sys_device *sysdev;
@@ -226,7 +230,7 @@ void arch_update_cpu_topology(void)
226 if (!machine_has_topology) { 230 if (!machine_has_topology) {
227 update_cpu_core_map(); 231 update_cpu_core_map();
228 topology_update_polarization_simple(); 232 topology_update_polarization_simple();
229 return; 233 return 0;
230 } 234 }
231 stsi(info, 15, 1, 2); 235 stsi(info, 15, 1, 2);
232 tl_to_cores(info); 236 tl_to_cores(info);
@@ -235,11 +239,12 @@ void arch_update_cpu_topology(void)
235 sysdev = get_cpu_sysdev(cpu); 239 sysdev = get_cpu_sysdev(cpu);
236 kobject_uevent(&sysdev->kobj, KOBJ_CHANGE); 240 kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
237 } 241 }
242 return 1;
238} 243}
239 244
240static void topology_work_fn(struct work_struct *work) 245static void topology_work_fn(struct work_struct *work)
241{ 246{
242 arch_reinit_sched_domains(); 247 rebuild_sched_domains();
243} 248}
244 249
245void topology_schedule_update(void) 250void topology_schedule_update(void)
@@ -262,10 +267,14 @@ static void set_topology_timer(void)
262 add_timer(&topology_timer); 267 add_timer(&topology_timer);
263} 268}
264 269
265static void topology_interrupt(__u16 code) 270static int __init early_parse_topology(char *p)
266{ 271{
267 schedule_work(&topology_work); 272 if (strncmp(p, "on", 2))
273 return 0;
274 topology_enabled = 1;
275 return 0;
268} 276}
277early_param("topology", early_parse_topology);
269 278
270static int __init init_topology_update(void) 279static int __init init_topology_update(void)
271{ 280{
@@ -277,14 +286,7 @@ static int __init init_topology_update(void)
277 goto out; 286 goto out;
278 } 287 }
279 init_timer_deferrable(&topology_timer); 288 init_timer_deferrable(&topology_timer);
280 if (machine_has_topology_irq) { 289 set_topology_timer();
281 rc = register_external_interrupt(0x2005, topology_interrupt);
282 if (rc)
283 goto out;
284 ctl_set_bit(0, 8);
285 }
286 else
287 set_topology_timer();
288out: 290out:
289 update_cpu_core_map(); 291 update_cpu_core_map();
290 return rc; 292 return rc;
@@ -305,9 +307,6 @@ void __init s390_init_cpu_topology(void)
305 return; 307 return;
306 machine_has_topology = 1; 308 machine_has_topology = 1;
307 309
308 if (facility_bits & (1ULL << 51))
309 machine_has_topology_irq = 1;
310
311 tl_info = alloc_bootmem_pages(PAGE_SIZE); 310 tl_info = alloc_bootmem_pages(PAGE_SIZE);
312 info = tl_info; 311 info = tl_info;
313 stsi(info, 15, 1, 2); 312 stsi(info, 15, 1, 2);
@@ -316,7 +315,7 @@ void __init s390_init_cpu_topology(void)
316 for (i = 0; i < info->mnest - 2; i++) 315 for (i = 0; i < info->mnest - 2; i++)
317 nr_cores *= info->mag[NR_MAG - 3 - i]; 316 nr_cores *= info->mag[NR_MAG - 3 - i];
318 317
319 printk(KERN_INFO "CPU topology:"); 318 pr_info("The CPU configuration topology of the machine is:");
320 for (i = 0; i < NR_MAG; i++) 319 for (i = 0; i < NR_MAG; i++)
321 printk(" %d", info->mag[i]); 320 printk(" %d", info->mag[i]);
322 printk(" / %d\n", info->mnest); 321 printk(" / %d\n", info->mnest);
@@ -331,5 +330,4 @@ void __init s390_init_cpu_topology(void)
331 return; 330 return;
332error: 331error:
333 machine_has_topology = 0; 332 machine_has_topology = 0;
334 machine_has_topology_irq = 0;
335} 333}
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
new file mode 100644
index 000000000000..10a6ccef4412
--- /dev/null
+++ b/arch/s390/kernel/vdso.c
@@ -0,0 +1,234 @@
1/*
2 * vdso setup for s390
3 *
4 * Copyright IBM Corp. 2008
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License (version 2 only)
9 * as published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/errno.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/smp.h>
18#include <linux/stddef.h>
19#include <linux/unistd.h>
20#include <linux/slab.h>
21#include <linux/user.h>
22#include <linux/elf.h>
23#include <linux/security.h>
24#include <linux/bootmem.h>
25
26#include <asm/pgtable.h>
27#include <asm/system.h>
28#include <asm/processor.h>
29#include <asm/mmu.h>
30#include <asm/mmu_context.h>
31#include <asm/sections.h>
32#include <asm/vdso.h>
33
34/* Max supported size for symbol names */
35#define MAX_SYMNAME 64
36
37#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
38extern char vdso32_start, vdso32_end;
39static void *vdso32_kbase = &vdso32_start;
40static unsigned int vdso32_pages;
41static struct page **vdso32_pagelist;
42#endif
43
44#ifdef CONFIG_64BIT
45extern char vdso64_start, vdso64_end;
46static void *vdso64_kbase = &vdso64_start;
47static unsigned int vdso64_pages;
48static struct page **vdso64_pagelist;
49#endif /* CONFIG_64BIT */
50
51/*
52 * Should the kernel map a VDSO page into processes and pass its
53 * address down to glibc upon exec()?
54 */
55unsigned int __read_mostly vdso_enabled = 1;
56
57static int __init vdso_setup(char *s)
58{
59 vdso_enabled = simple_strtoul(s, NULL, 0);
60 return 1;
61}
62__setup("vdso=", vdso_setup);
63
64/*
65 * The vdso data page
66 */
67static union {
68 struct vdso_data data;
69 u8 page[PAGE_SIZE];
70} vdso_data_store __attribute__((__section__(".data.page_aligned")));
71struct vdso_data *vdso_data = &vdso_data_store.data;
72
73/*
74 * This is called from binfmt_elf, we create the special vma for the
75 * vDSO and insert it into the mm struct tree
76 */
77int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
78{
79 struct mm_struct *mm = current->mm;
80 struct page **vdso_pagelist;
81 unsigned long vdso_pages;
82 unsigned long vdso_base;
83 int rc;
84
85 if (!vdso_enabled)
86 return 0;
87 /*
88 * Only map the vdso for dynamically linked elf binaries.
89 */
90 if (!uses_interp)
91 return 0;
92
93 vdso_base = mm->mmap_base;
94#ifdef CONFIG_64BIT
95 vdso_pagelist = vdso64_pagelist;
96 vdso_pages = vdso64_pages;
97#ifdef CONFIG_COMPAT
98 if (test_thread_flag(TIF_31BIT)) {
99 vdso_pagelist = vdso32_pagelist;
100 vdso_pages = vdso32_pages;
101 }
102#endif
103#else
104 vdso_pagelist = vdso32_pagelist;
105 vdso_pages = vdso32_pages;
106#endif
107
108 /*
109 * vDSO has a problem and was disabled, just don't "enable" it for
110 * the process
111 */
112 if (vdso_pages == 0)
113 return 0;
114
115 current->mm->context.vdso_base = 0;
116
117 /*
118 * pick a base address for the vDSO in process space. We try to put
119 * it at vdso_base which is the "natural" base for it, but we might
120 * fail and end up putting it elsewhere.
121 */
122 down_write(&mm->mmap_sem);
123 vdso_base = get_unmapped_area(NULL, vdso_base,
124 vdso_pages << PAGE_SHIFT, 0, 0);
125 if (IS_ERR_VALUE(vdso_base)) {
126 rc = vdso_base;
127 goto out_up;
128 }
129
130 /*
131 * our vma flags don't have VM_WRITE so by default, the process
132 * isn't allowed to write those pages.
133 * gdb can break that with ptrace interface, and thus trigger COW
134 * on those pages but it's then your responsibility to never do that
135 * on the "data" page of the vDSO or you'll stop getting kernel
136 * updates and your nice userland gettimeofday will be totally dead.
137 * It's fine to use that for setting breakpoints in the vDSO code
138 * pages though
139 *
140 * Make sure the vDSO gets into every core dump.
141 * Dumping its contents makes post-mortem fully interpretable later
142 * without matching up the same kernel and hardware config to see
143 * what PC values meant.
144 */
145 rc = install_special_mapping(mm, vdso_base, vdso_pages << PAGE_SHIFT,
146 VM_READ|VM_EXEC|
147 VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
148 VM_ALWAYSDUMP,
149 vdso_pagelist);
150 if (rc)
151 goto out_up;
152
153 /* Put vDSO base into mm struct */
154 current->mm->context.vdso_base = vdso_base;
155
156 up_write(&mm->mmap_sem);
157 return 0;
158
159out_up:
160 up_write(&mm->mmap_sem);
161 return rc;
162}
163
164const char *arch_vma_name(struct vm_area_struct *vma)
165{
166 if (vma->vm_mm && vma->vm_start == vma->vm_mm->context.vdso_base)
167 return "[vdso]";
168 return NULL;
169}
170
171static int __init vdso_init(void)
172{
173 int i;
174
175#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
176 /* Calculate the size of the 32 bit vDSO */
177 vdso32_pages = ((&vdso32_end - &vdso32_start
178 + PAGE_SIZE - 1) >> PAGE_SHIFT) + 1;
179
180 /* Make sure pages are in the correct state */
181 vdso32_pagelist = kzalloc(sizeof(struct page *) * (vdso32_pages + 1),
182 GFP_KERNEL);
183 BUG_ON(vdso32_pagelist == NULL);
184 for (i = 0; i < vdso32_pages - 1; i++) {
185 struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE);
186 ClearPageReserved(pg);
187 get_page(pg);
188 vdso32_pagelist[i] = pg;
189 }
190 vdso32_pagelist[vdso32_pages - 1] = virt_to_page(vdso_data);
191 vdso32_pagelist[vdso32_pages] = NULL;
192#endif
193
194#ifdef CONFIG_64BIT
195 /* Calculate the size of the 64 bit vDSO */
196 vdso64_pages = ((&vdso64_end - &vdso64_start
197 + PAGE_SIZE - 1) >> PAGE_SHIFT) + 1;
198
199 /* Make sure pages are in the correct state */
200 vdso64_pagelist = kzalloc(sizeof(struct page *) * (vdso64_pages + 1),
201 GFP_KERNEL);
202 BUG_ON(vdso64_pagelist == NULL);
203 for (i = 0; i < vdso64_pages - 1; i++) {
204 struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE);
205 ClearPageReserved(pg);
206 get_page(pg);
207 vdso64_pagelist[i] = pg;
208 }
209 vdso64_pagelist[vdso64_pages - 1] = virt_to_page(vdso_data);
210 vdso64_pagelist[vdso64_pages] = NULL;
211#endif /* CONFIG_64BIT */
212
213 get_page(virt_to_page(vdso_data));
214
215 smp_wmb();
216
217 return 0;
218}
219arch_initcall(vdso_init);
220
221int in_gate_area_no_task(unsigned long addr)
222{
223 return 0;
224}
225
226int in_gate_area(struct task_struct *task, unsigned long addr)
227{
228 return 0;
229}
230
231struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
232{
233 return NULL;
234}
diff --git a/arch/s390/kernel/vdso32/Makefile b/arch/s390/kernel/vdso32/Makefile
new file mode 100644
index 000000000000..ca78ad60ba24
--- /dev/null
+++ b/arch/s390/kernel/vdso32/Makefile
@@ -0,0 +1,55 @@
1# List of files in the vdso, has to be asm only for now
2
3obj-vdso32 = gettimeofday.o clock_getres.o clock_gettime.o note.o
4
5# Build rules
6
7targets := $(obj-vdso32) vdso32.so vdso32.so.dbg
8obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32))
9
10KBUILD_AFLAGS_31 := $(filter-out -m64,$(KBUILD_AFLAGS))
11KBUILD_AFLAGS_31 += -m31 -s
12
13KBUILD_CFLAGS_31 := $(filter-out -m64,$(KBUILD_CFLAGS))
14KBUILD_CFLAGS_31 += -m31 -fPIC -shared -fno-common -fno-builtin
15KBUILD_CFLAGS_31 += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
16 $(call ld-option, -Wl$(comma)--hash-style=sysv)
17
18$(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_31)
19$(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_31)
20
21obj-y += vdso32_wrapper.o
22extra-y += vdso32.lds
23CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)
24
25# Force dependency (incbin is bad)
26$(obj)/vdso32_wrapper.o : $(obj)/vdso32.so
27
28# link rule for the .so file, .lds has to be first
29$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32)
30 $(call if_changed,vdso32ld)
31
32# strip rule for the .so file
33$(obj)/%.so: OBJCOPYFLAGS := -S
34$(obj)/%.so: $(obj)/%.so.dbg FORCE
35 $(call if_changed,objcopy)
36
37# assembly rules for the .S files
38$(obj-vdso32): %.o: %.S
39 $(call if_changed_dep,vdso32as)
40
41# actual build commands
42quiet_cmd_vdso32ld = VDSO32L $@
43 cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
44quiet_cmd_vdso32as = VDSO32A $@
45 cmd_vdso32as = $(CC) $(a_flags) -c -o $@ $<
46
47# install commands for the unstripped file
48quiet_cmd_vdso_install = INSTALL $@
49 cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
50
51vdso32.so: $(obj)/vdso32.so.dbg
52 @mkdir -p $(MODLIB)/vdso
53 $(call cmd,vdso_install)
54
55vdso_install: vdso32.so
diff --git a/arch/s390/kernel/vdso32/clock_getres.S b/arch/s390/kernel/vdso32/clock_getres.S
new file mode 100644
index 000000000000..9532c4e6a9d2
--- /dev/null
+++ b/arch/s390/kernel/vdso32/clock_getres.S
@@ -0,0 +1,39 @@
1/*
2 * Userland implementation of clock_getres() for 32 bits processes in a
3 * s390 kernel for use in the vDSO
4 *
5 * Copyright IBM Corp. 2008
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License (version 2 only)
10 * as published by the Free Software Foundation.
11 */
12#include <asm/vdso.h>
13#include <asm/asm-offsets.h>
14#include <asm/unistd.h>
15
16 .text
17 .align 4
18 .globl __kernel_clock_getres
19 .type __kernel_clock_getres,@function
20__kernel_clock_getres:
21 .cfi_startproc
22 chi %r2,CLOCK_REALTIME
23 je 0f
24 chi %r2,CLOCK_MONOTONIC
25 jne 3f
260: ltr %r3,%r3
27 jz 2f /* res == NULL */
28 basr %r1,0
291: l %r0,4f-1b(%r1)
30 xc 0(4,%r3),0(%r3) /* set tp->tv_sec to zero */
31 st %r0,4(%r3) /* store tp->tv_usec */
322: lhi %r2,0
33 br %r14
343: lhi %r1,__NR_clock_getres /* fallback to svc */
35 svc 0
36 br %r14
374: .long CLOCK_REALTIME_RES
38 .cfi_endproc
39 .size __kernel_clock_getres,.-__kernel_clock_getres
diff --git a/arch/s390/kernel/vdso32/clock_gettime.S b/arch/s390/kernel/vdso32/clock_gettime.S
new file mode 100644
index 000000000000..4a98909a8310
--- /dev/null
+++ b/arch/s390/kernel/vdso32/clock_gettime.S
@@ -0,0 +1,128 @@
1/*
2 * Userland implementation of clock_gettime() for 32 bits processes in a
3 * s390 kernel for use in the vDSO
4 *
5 * Copyright IBM Corp. 2008
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License (version 2 only)
10 * as published by the Free Software Foundation.
11 */
12#include <asm/vdso.h>
13#include <asm/asm-offsets.h>
14#include <asm/unistd.h>
15
16 .text
17 .align 4
18 .globl __kernel_clock_gettime
19 .type __kernel_clock_gettime,@function
20__kernel_clock_gettime:
21 .cfi_startproc
22 basr %r5,0
230: al %r5,21f-0b(%r5) /* get &_vdso_data */
24 chi %r2,CLOCK_REALTIME
25 je 10f
26 chi %r2,CLOCK_MONOTONIC
27 jne 19f
28
29 /* CLOCK_MONOTONIC */
30 ltr %r3,%r3
31 jz 9f /* tp == NULL */
321: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
33 tml %r4,0x0001 /* pending update ? loop */
34 jnz 1b
35 stck 24(%r15) /* Store TOD clock */
36 lm %r0,%r1,24(%r15)
37 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
38 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
39 brc 3,2f
40 ahi %r0,-1
412: mhi %r0,1000 /* cyc2ns(clock,cycle_delta) */
42 lr %r2,%r0
43 lhi %r0,1000
44 ltr %r1,%r1
45 mr %r0,%r0
46 jnm 3f
47 ahi %r0,1000
483: alr %r0,%r2
49 srdl %r0,12
50 al %r0,__VDSO_XTIME_NSEC(%r5) /* + xtime */
51 al %r1,__VDSO_XTIME_NSEC+4(%r5)
52 brc 12,4f
53 ahi %r0,1
544: l %r2,__VDSO_XTIME_SEC+4(%r5)
55 al %r0,__VDSO_WTOM_NSEC(%r5) /* + wall_to_monotonic */
56 al %r1,__VDSO_WTOM_NSEC+4(%r5)
57 brc 12,5f
58 ahi %r0,1
595: al %r2,__VDSO_WTOM_SEC+4(%r5)
60 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */
61 jne 1b
62 basr %r5,0
636: ltr %r0,%r0
64 jnz 7f
65 cl %r1,20f-6b(%r5)
66 jl 8f
677: ahi %r2,1
68 sl %r1,20f-6b(%r5)
69 brc 3,6b
70 ahi %r0,-1
71 j 6b
728: st %r2,0(%r3) /* store tp->tv_sec */
73 st %r1,4(%r3) /* store tp->tv_nsec */
749: lhi %r2,0
75 br %r14
76
77 /* CLOCK_REALTIME */
7810: ltr %r3,%r3 /* tp == NULL */
79 jz 18f
8011: l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
81 tml %r4,0x0001 /* pending update ? loop */
82 jnz 11b
83 stck 24(%r15) /* Store TOD clock */
84 lm %r0,%r1,24(%r15)
85 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
86 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
87 brc 3,12f
88 ahi %r0,-1
8912: mhi %r0,1000 /* cyc2ns(clock,cycle_delta) */
90 lr %r2,%r0
91 lhi %r0,1000
92 ltr %r1,%r1
93 mr %r0,%r0
94 jnm 13f
95 ahi %r0,1000
9613: alr %r0,%r2
97 srdl %r0,12
98 al %r0,__VDSO_XTIME_NSEC(%r5) /* + xtime */
99 al %r1,__VDSO_XTIME_NSEC+4(%r5)
100 brc 12,14f
101 ahi %r0,1
10214: l %r2,__VDSO_XTIME_SEC+4(%r5)
103 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */
104 jne 11b
105 basr %r5,0
10615: ltr %r0,%r0
107 jnz 16f
108 cl %r1,20f-15b(%r5)
109 jl 17f
11016: ahi %r2,1
111 sl %r1,20f-15b(%r5)
112 brc 3,15b
113 ahi %r0,-1
114 j 15b
11517: st %r2,0(%r3) /* store tp->tv_sec */
116 st %r1,4(%r3) /* store tp->tv_nsec */
11718: lhi %r2,0
118 br %r14
119
120 /* Fallback to system call */
12119: lhi %r1,__NR_clock_gettime
122 svc 0
123 br %r14
124
12520: .long 1000000000
12621: .long _vdso_data - 0b
127 .cfi_endproc
128 .size __kernel_clock_gettime,.-__kernel_clock_gettime
diff --git a/arch/s390/kernel/vdso32/gettimeofday.S b/arch/s390/kernel/vdso32/gettimeofday.S
new file mode 100644
index 000000000000..c32f29c3d70c
--- /dev/null
+++ b/arch/s390/kernel/vdso32/gettimeofday.S
@@ -0,0 +1,82 @@
1/*
2 * Userland implementation of gettimeofday() for 32 bits processes in a
3 * s390 kernel for use in the vDSO
4 *
5 * Copyright IBM Corp. 2008
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License (version 2 only)
10 * as published by the Free Software Foundation.
11 */
12#include <asm/vdso.h>
13#include <asm/asm-offsets.h>
14#include <asm/unistd.h>
15
16#include <asm/vdso.h>
17#include <asm/asm-offsets.h>
18#include <asm/unistd.h>
19
20 .text
21 .align 4
22 .globl __kernel_gettimeofday
23 .type __kernel_gettimeofday,@function
24__kernel_gettimeofday:
25 .cfi_startproc
26 basr %r5,0
270: al %r5,13f-0b(%r5) /* get &_vdso_data */
281: ltr %r3,%r3 /* check if tz is NULL */
29 je 2f
30 mvc 0(8,%r3),__VDSO_TIMEZONE(%r5)
312: ltr %r2,%r2 /* check if tv is NULL */
32 je 10f
33 l %r4,__VDSO_UPD_COUNT+4(%r5) /* load update counter */
34 tml %r4,0x0001 /* pending update ? loop */
35 jnz 1b
36 stck 24(%r15) /* Store TOD clock */
37 lm %r0,%r1,24(%r15)
38 s %r0,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
39 sl %r1,__VDSO_XTIME_STAMP+4(%r5)
40 brc 3,3f
41 ahi %r0,-1
423: mhi %r0,1000 /* cyc2ns(clock,cycle_delta) */
43 st %r0,24(%r15)
44 lhi %r0,1000
45 ltr %r1,%r1
46 mr %r0,%r0
47 jnm 4f
48 ahi %r0,1000
494: al %r0,24(%r15)
50 srdl %r0,12
51 al %r0,__VDSO_XTIME_NSEC(%r5) /* + xtime */
52 al %r1,__VDSO_XTIME_NSEC+4(%r5)
53 brc 12,5f
54 ahi %r0,1
555: mvc 24(4,%r15),__VDSO_XTIME_SEC+4(%r5)
56 cl %r4,__VDSO_UPD_COUNT+4(%r5) /* check update counter */
57 jne 1b
58 l %r4,24(%r15) /* get tv_sec from stack */
59 basr %r5,0
606: ltr %r0,%r0
61 jnz 7f
62 cl %r1,11f-6b(%r5)
63 jl 8f
647: ahi %r4,1
65 sl %r1,11f-6b(%r5)
66 brc 3,6b
67 ahi %r0,-1
68 j 6b
698: st %r4,0(%r2) /* store tv->tv_sec */
70 ltr %r1,%r1
71 m %r0,12f-6b(%r5)
72 jnm 9f
73 al %r0,12f-6b(%r5)
749: srl %r0,6
75 st %r0,4(%r2) /* store tv->tv_usec */
7610: slr %r2,%r2
77 br %r14
7811: .long 1000000000
7912: .long 274877907
8013: .long _vdso_data - 0b
81 .cfi_endproc
82 .size __kernel_gettimeofday,.-__kernel_gettimeofday
diff --git a/arch/s390/kernel/vdso32/note.S b/arch/s390/kernel/vdso32/note.S
new file mode 100644
index 000000000000..79a071e4357e
--- /dev/null
+++ b/arch/s390/kernel/vdso32/note.S
@@ -0,0 +1,12 @@
1/*
2 * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
3 * Here we can supply some information useful to userland.
4 */
5
6#include <linux/uts.h>
7#include <linux/version.h>
8#include <linux/elfnote.h>
9
10ELFNOTE_START(Linux, 0, "a")
11 .long LINUX_VERSION_CODE
12ELFNOTE_END
diff --git a/arch/s390/kernel/vdso32/vdso32.lds.S b/arch/s390/kernel/vdso32/vdso32.lds.S
new file mode 100644
index 000000000000..a8c379fa1247
--- /dev/null
+++ b/arch/s390/kernel/vdso32/vdso32.lds.S
@@ -0,0 +1,138 @@
1/*
2 * This is the infamous ld script for the 32 bits vdso
3 * library
4 */
5#include <asm/vdso.h>
6
7OUTPUT_FORMAT("elf32-s390", "elf32-s390", "elf32-s390")
8OUTPUT_ARCH(s390:31-bit)
9ENTRY(_start)
10
11SECTIONS
12{
13 . = VDSO32_LBASE + SIZEOF_HEADERS;
14
15 .hash : { *(.hash) } :text
16 .gnu.hash : { *(.gnu.hash) }
17 .dynsym : { *(.dynsym) }
18 .dynstr : { *(.dynstr) }
19 .gnu.version : { *(.gnu.version) }
20 .gnu.version_d : { *(.gnu.version_d) }
21 .gnu.version_r : { *(.gnu.version_r) }
22
23 .note : { *(.note.*) } :text :note
24
25 . = ALIGN(16);
26 .text : {
27 *(.text .stub .text.* .gnu.linkonce.t.*)
28 } :text
29 PROVIDE(__etext = .);
30 PROVIDE(_etext = .);
31 PROVIDE(etext = .);
32
33 /*
34 * Other stuff is appended to the text segment:
35 */
36 .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
37 .rodata1 : { *(.rodata1) }
38
39 .dynamic : { *(.dynamic) } :text :dynamic
40
41 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
42 .eh_frame : { KEEP (*(.eh_frame)) } :text
43 .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*) }
44
45 .rela.dyn ALIGN(8) : { *(.rela.dyn) }
46 .got ALIGN(8) : { *(.got .toc) }
47
48 _end = .;
49 PROVIDE(end = .);
50
51 /*
52 * Stabs debugging sections are here too.
53 */
54 .stab 0 : { *(.stab) }
55 .stabstr 0 : { *(.stabstr) }
56 .stab.excl 0 : { *(.stab.excl) }
57 .stab.exclstr 0 : { *(.stab.exclstr) }
58 .stab.index 0 : { *(.stab.index) }
59 .stab.indexstr 0 : { *(.stab.indexstr) }
60 .comment 0 : { *(.comment) }
61
62 /*
63 * DWARF debug sections.
64 * Symbols in the DWARF debugging sections are relative to the
65 * beginning of the section so we begin them at 0.
66 */
67 /* DWARF 1 */
68 .debug 0 : { *(.debug) }
69 .line 0 : { *(.line) }
70 /* GNU DWARF 1 extensions */
71 .debug_srcinfo 0 : { *(.debug_srcinfo) }
72 .debug_sfnames 0 : { *(.debug_sfnames) }
73 /* DWARF 1.1 and DWARF 2 */
74 .debug_aranges 0 : { *(.debug_aranges) }
75 .debug_pubnames 0 : { *(.debug_pubnames) }
76 /* DWARF 2 */
77 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
78 .debug_abbrev 0 : { *(.debug_abbrev) }
79 .debug_line 0 : { *(.debug_line) }
80 .debug_frame 0 : { *(.debug_frame) }
81 .debug_str 0 : { *(.debug_str) }
82 .debug_loc 0 : { *(.debug_loc) }
83 .debug_macinfo 0 : { *(.debug_macinfo) }
84 /* SGI/MIPS DWARF 2 extensions */
85 .debug_weaknames 0 : { *(.debug_weaknames) }
86 .debug_funcnames 0 : { *(.debug_funcnames) }
87 .debug_typenames 0 : { *(.debug_typenames) }
88 .debug_varnames 0 : { *(.debug_varnames) }
89 /* DWARF 3 */
90 .debug_pubtypes 0 : { *(.debug_pubtypes) }
91 .debug_ranges 0 : { *(.debug_ranges) }
92 .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
93
94 . = ALIGN(4096);
95 PROVIDE(_vdso_data = .);
96
97 /DISCARD/ : {
98 *(.note.GNU-stack)
99 *(.branch_lt)
100 *(.data .data.* .gnu.linkonce.d.* .sdata*)
101 *(.bss .sbss .dynbss .dynsbss)
102 }
103}
104
105/*
106 * Very old versions of ld do not recognize this name token; use the constant.
107 */
108#define PT_GNU_EH_FRAME 0x6474e550
109
110/*
111 * We must supply the ELF program headers explicitly to get just one
112 * PT_LOAD segment, and set the flags explicitly to make segments read-only.
113 */
114PHDRS
115{
116 text PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */
117 dynamic PT_DYNAMIC FLAGS(4); /* PF_R */
118 note PT_NOTE FLAGS(4); /* PF_R */
119 eh_frame_hdr PT_GNU_EH_FRAME;
120}
121
122/*
123 * This controls what symbols we export from the DSO.
124 */
125VERSION
126{
127 VDSO_VERSION_STRING {
128 global:
129 /*
130 * Has to be there for the kernel to find
131 */
132 __kernel_gettimeofday;
133 __kernel_clock_gettime;
134 __kernel_clock_getres;
135
136 local: *;
137 };
138}
diff --git a/arch/s390/kernel/vdso32/vdso32_wrapper.S b/arch/s390/kernel/vdso32/vdso32_wrapper.S
new file mode 100644
index 000000000000..61639a89e70b
--- /dev/null
+++ b/arch/s390/kernel/vdso32/vdso32_wrapper.S
@@ -0,0 +1,13 @@
1#include <linux/init.h>
2#include <asm/page.h>
3
4 .section ".data.page_aligned"
5
6 .globl vdso32_start, vdso32_end
7 .balign PAGE_SIZE
8vdso32_start:
9 .incbin "arch/s390/kernel/vdso32/vdso32.so"
10 .balign PAGE_SIZE
11vdso32_end:
12
13 .previous
diff --git a/arch/s390/kernel/vdso64/Makefile b/arch/s390/kernel/vdso64/Makefile
new file mode 100644
index 000000000000..6fc8e829258c
--- /dev/null
+++ b/arch/s390/kernel/vdso64/Makefile
@@ -0,0 +1,55 @@
1# List of files in the vdso, has to be asm only for now
2
3obj-vdso64 = gettimeofday.o clock_getres.o clock_gettime.o note.o
4
5# Build rules
6
7targets := $(obj-vdso64) vdso64.so vdso64.so.dbg
8obj-vdso64 := $(addprefix $(obj)/, $(obj-vdso64))
9
10KBUILD_AFLAGS_64 := $(filter-out -m64,$(KBUILD_AFLAGS))
11KBUILD_AFLAGS_64 += -m64 -s
12
13KBUILD_CFLAGS_64 := $(filter-out -m64,$(KBUILD_CFLAGS))
14KBUILD_CFLAGS_64 += -m64 -fPIC -shared -fno-common -fno-builtin
15KBUILD_CFLAGS_64 += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
16 $(call ld-option, -Wl$(comma)--hash-style=sysv)
17
18$(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_64)
19$(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_64)
20
21obj-y += vdso64_wrapper.o
22extra-y += vdso64.lds
23CPPFLAGS_vdso64.lds += -P -C -U$(ARCH)
24
25# Force dependency (incbin is bad)
26$(obj)/vdso64_wrapper.o : $(obj)/vdso64.so
27
28# link rule for the .so file, .lds has to be first
29$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64)
30 $(call if_changed,vdso64ld)
31
32# strip rule for the .so file
33$(obj)/%.so: OBJCOPYFLAGS := -S
34$(obj)/%.so: $(obj)/%.so.dbg FORCE
35 $(call if_changed,objcopy)
36
37# assembly rules for the .S files
38$(obj-vdso64): %.o: %.S
39 $(call if_changed_dep,vdso64as)
40
41# actual build commands
42quiet_cmd_vdso64ld = VDSO64L $@
43 cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
44quiet_cmd_vdso64as = VDSO64A $@
45 cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
46
47# install commands for the unstripped file
48quiet_cmd_vdso_install = INSTALL $@
49 cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
50
51vdso64.so: $(obj)/vdso64.so.dbg
52 @mkdir -p $(MODLIB)/vdso
53 $(call cmd,vdso_install)
54
55vdso_install: vdso64.so
diff --git a/arch/s390/kernel/vdso64/clock_getres.S b/arch/s390/kernel/vdso64/clock_getres.S
new file mode 100644
index 000000000000..488e31a3c0e7
--- /dev/null
+++ b/arch/s390/kernel/vdso64/clock_getres.S
@@ -0,0 +1,39 @@
1/*
2 * Userland implementation of clock_getres() for 64 bits processes in a
3 * s390 kernel for use in the vDSO
4 *
5 * Copyright IBM Corp. 2008
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License (version 2 only)
10 * as published by the Free Software Foundation.
11 */
12#include <asm/vdso.h>
13#include <asm/asm-offsets.h>
14#include <asm/unistd.h>
15
16 .text
17 .align 4
18 .globl __kernel_clock_getres
19 .type __kernel_clock_getres,@function
20__kernel_clock_getres:
21 .cfi_startproc
22 cghi %r2,CLOCK_REALTIME
23 je 0f
24 cghi %r2,CLOCK_MONOTONIC
25 jne 2f
260: ltgr %r3,%r3
27 jz 1f /* res == NULL */
28 larl %r1,3f
29 lg %r0,0(%r1)
30 xc 0(8,%r3),0(%r3) /* set tp->tv_sec to zero */
31 stg %r0,8(%r3) /* store tp->tv_usec */
321: lghi %r2,0
33 br %r14
342: lghi %r1,__NR_clock_getres /* fallback to svc */
35 svc 0
36 br %r14
373: .quad CLOCK_REALTIME_RES
38 .cfi_endproc
39 .size __kernel_clock_getres,.-__kernel_clock_getres
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
new file mode 100644
index 000000000000..738a410b7eb2
--- /dev/null
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -0,0 +1,89 @@
1/*
2 * Userland implementation of clock_gettime() for 64 bits processes in a
3 * s390 kernel for use in the vDSO
4 *
5 * Copyright IBM Corp. 2008
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License (version 2 only)
10 * as published by the Free Software Foundation.
11 */
12#include <asm/vdso.h>
13#include <asm/asm-offsets.h>
14#include <asm/unistd.h>
15
16 .text
17 .align 4
18 .globl __kernel_clock_gettime
19 .type __kernel_clock_gettime,@function
20__kernel_clock_gettime:
21 .cfi_startproc
22 larl %r5,_vdso_data
23 cghi %r2,CLOCK_REALTIME
24 je 4f
25 cghi %r2,CLOCK_MONOTONIC
26 jne 9f
27
28 /* CLOCK_MONOTONIC */
29 ltgr %r3,%r3
30 jz 3f /* tp == NULL */
310: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
32 tmll %r4,0x0001 /* pending update ? loop */
33 jnz 0b
34 stck 48(%r15) /* Store TOD clock */
35 lg %r1,48(%r15)
36 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
37 mghi %r1,1000
38 srlg %r1,%r1,12 /* cyc2ns(clock,cycle_delta) */
39 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + xtime */
40 lg %r0,__VDSO_XTIME_SEC(%r5)
41 alg %r1,__VDSO_WTOM_NSEC(%r5) /* + wall_to_monotonic */
42 alg %r0,__VDSO_WTOM_SEC(%r5)
43 clg %r4,__VDSO_UPD_COUNT(%r5) /* check update counter */
44 jne 0b
45 larl %r5,10f
461: clg %r1,0(%r5)
47 jl 2f
48 slg %r1,0(%r5)
49 aghi %r0,1
50 j 1b
512: stg %r0,0(%r3) /* store tp->tv_sec */
52 stg %r1,8(%r3) /* store tp->tv_nsec */
533: lghi %r2,0
54 br %r14
55
56 /* CLOCK_REALTIME */
574: ltr %r3,%r3 /* tp == NULL */
58 jz 8f
595: lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
60 tmll %r4,0x0001 /* pending update ? loop */
61 jnz 5b
62 stck 48(%r15) /* Store TOD clock */
63 lg %r1,48(%r15)
64 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
65 mghi %r1,1000
66 srlg %r1,%r1,12 /* cyc2ns(clock,cycle_delta) */
67 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + xtime */
68 lg %r0,__VDSO_XTIME_SEC(%r5)
69 clg %r4,__VDSO_UPD_COUNT(%r5) /* check update counter */
70 jne 5b
71 larl %r5,10f
726: clg %r1,0(%r5)
73 jl 7f
74 slg %r1,0(%r5)
75 aghi %r0,1
76 j 6b
777: stg %r0,0(%r3) /* store tp->tv_sec */
78 stg %r1,8(%r3) /* store tp->tv_nsec */
798: lghi %r2,0
80 br %r14
81
82 /* Fallback to system call */
839: lghi %r1,__NR_clock_gettime
84 svc 0
85 br %r14
86
8710: .quad 1000000000
88 .cfi_endproc
89 .size __kernel_clock_gettime,.-__kernel_clock_gettime
diff --git a/arch/s390/kernel/vdso64/gettimeofday.S b/arch/s390/kernel/vdso64/gettimeofday.S
new file mode 100644
index 000000000000..f873e75634e1
--- /dev/null
+++ b/arch/s390/kernel/vdso64/gettimeofday.S
@@ -0,0 +1,56 @@
1/*
2 * Userland implementation of gettimeofday() for 64 bits processes in a
3 * s390 kernel for use in the vDSO
4 *
5 * Copyright IBM Corp. 2008
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License (version 2 only)
10 * as published by the Free Software Foundation.
11 */
12#include <asm/vdso.h>
13#include <asm/asm-offsets.h>
14#include <asm/unistd.h>
15
16 .text
17 .align 4
18 .globl __kernel_gettimeofday
19 .type __kernel_gettimeofday,@function
20__kernel_gettimeofday:
21 .cfi_startproc
22 larl %r5,_vdso_data
230: ltgr %r3,%r3 /* check if tz is NULL */
24 je 1f
25 mvc 0(8,%r3),__VDSO_TIMEZONE(%r5)
261: ltgr %r2,%r2 /* check if tv is NULL */
27 je 4f
28 lg %r4,__VDSO_UPD_COUNT(%r5) /* load update counter */
29 tmll %r4,0x0001 /* pending update ? loop */
30 jnz 0b
31 stck 48(%r15) /* Store TOD clock */
32 lg %r1,48(%r15)
33 sg %r1,__VDSO_XTIME_STAMP(%r5) /* TOD - cycle_last */
34 mghi %r1,1000
35 srlg %r1,%r1,12 /* cyc2ns(clock,cycle_delta) */
36 alg %r1,__VDSO_XTIME_NSEC(%r5) /* + xtime.tv_nsec */
37 lg %r0,__VDSO_XTIME_SEC(%r5) /* xtime.tv_sec */
38 clg %r4,__VDSO_UPD_COUNT(%r5) /* check update counter */
39 jne 0b
40 larl %r5,5f
412: clg %r1,0(%r5)
42 jl 3f
43 slg %r1,0(%r5)
44 aghi %r0,1
45 j 2b
463: stg %r0,0(%r2) /* store tv->tv_sec */
47 slgr %r0,%r0 /* tv_nsec -> tv_usec */
48 ml %r0,8(%r5)
49 srlg %r0,%r0,6
50 stg %r0,8(%r2) /* store tv->tv_usec */
514: lghi %r2,0
52 br %r14
535: .quad 1000000000
54 .long 274877907
55 .cfi_endproc
56 .size __kernel_gettimeofday,.-__kernel_gettimeofday
diff --git a/arch/s390/kernel/vdso64/note.S b/arch/s390/kernel/vdso64/note.S
new file mode 100644
index 000000000000..79a071e4357e
--- /dev/null
+++ b/arch/s390/kernel/vdso64/note.S
@@ -0,0 +1,12 @@
1/*
2 * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
3 * Here we can supply some information useful to userland.
4 */
5
6#include <linux/uts.h>
7#include <linux/version.h>
8#include <linux/elfnote.h>
9
10ELFNOTE_START(Linux, 0, "a")
11 .long LINUX_VERSION_CODE
12ELFNOTE_END
diff --git a/arch/s390/kernel/vdso64/vdso64.lds.S b/arch/s390/kernel/vdso64/vdso64.lds.S
new file mode 100644
index 000000000000..9f5979d102a9
--- /dev/null
+++ b/arch/s390/kernel/vdso64/vdso64.lds.S
@@ -0,0 +1,138 @@
1/*
2 * This is the infamous ld script for the 64 bits vdso
3 * library
4 */
5#include <asm/vdso.h>
6
7OUTPUT_FORMAT("elf64-s390", "elf64-s390", "elf64-s390")
8OUTPUT_ARCH(s390:64-bit)
9ENTRY(_start)
10
11SECTIONS
12{
13 . = VDSO64_LBASE + SIZEOF_HEADERS;
14
15 .hash : { *(.hash) } :text
16 .gnu.hash : { *(.gnu.hash) }
17 .dynsym : { *(.dynsym) }
18 .dynstr : { *(.dynstr) }
19 .gnu.version : { *(.gnu.version) }
20 .gnu.version_d : { *(.gnu.version_d) }
21 .gnu.version_r : { *(.gnu.version_r) }
22
23 .note : { *(.note.*) } :text :note
24
25 . = ALIGN(16);
26 .text : {
27 *(.text .stub .text.* .gnu.linkonce.t.*)
28 } :text
29 PROVIDE(__etext = .);
30 PROVIDE(_etext = .);
31 PROVIDE(etext = .);
32
33 /*
34 * Other stuff is appended to the text segment:
35 */
36 .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
37 .rodata1 : { *(.rodata1) }
38
39 .dynamic : { *(.dynamic) } :text :dynamic
40
41 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
42 .eh_frame : { KEEP (*(.eh_frame)) } :text
43 .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*) }
44
45 .rela.dyn ALIGN(8) : { *(.rela.dyn) }
46 .got ALIGN(8) : { *(.got .toc) }
47
48 _end = .;
49 PROVIDE(end = .);
50
51 /*
52 * Stabs debugging sections are here too.
53 */
54 .stab 0 : { *(.stab) }
55 .stabstr 0 : { *(.stabstr) }
56 .stab.excl 0 : { *(.stab.excl) }
57 .stab.exclstr 0 : { *(.stab.exclstr) }
58 .stab.index 0 : { *(.stab.index) }
59 .stab.indexstr 0 : { *(.stab.indexstr) }
60 .comment 0 : { *(.comment) }
61
62 /*
63 * DWARF debug sections.
64 * Symbols in the DWARF debugging sections are relative to the
65 * beginning of the section so we begin them at 0.
66 */
67 /* DWARF 1 */
68 .debug 0 : { *(.debug) }
69 .line 0 : { *(.line) }
70 /* GNU DWARF 1 extensions */
71 .debug_srcinfo 0 : { *(.debug_srcinfo) }
72 .debug_sfnames 0 : { *(.debug_sfnames) }
73 /* DWARF 1.1 and DWARF 2 */
74 .debug_aranges 0 : { *(.debug_aranges) }
75 .debug_pubnames 0 : { *(.debug_pubnames) }
76 /* DWARF 2 */
77 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
78 .debug_abbrev 0 : { *(.debug_abbrev) }
79 .debug_line 0 : { *(.debug_line) }
80 .debug_frame 0 : { *(.debug_frame) }
81 .debug_str 0 : { *(.debug_str) }
82 .debug_loc 0 : { *(.debug_loc) }
83 .debug_macinfo 0 : { *(.debug_macinfo) }
84 /* SGI/MIPS DWARF 2 extensions */
85 .debug_weaknames 0 : { *(.debug_weaknames) }
86 .debug_funcnames 0 : { *(.debug_funcnames) }
87 .debug_typenames 0 : { *(.debug_typenames) }
88 .debug_varnames 0 : { *(.debug_varnames) }
89 /* DWARF 3 */
90 .debug_pubtypes 0 : { *(.debug_pubtypes) }
91 .debug_ranges 0 : { *(.debug_ranges) }
92 .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
93
94 . = ALIGN(4096);
95 PROVIDE(_vdso_data = .);
96
97 /DISCARD/ : {
98 *(.note.GNU-stack)
99 *(.branch_lt)
100 *(.data .data.* .gnu.linkonce.d.* .sdata*)
101 *(.bss .sbss .dynbss .dynsbss)
102 }
103}
104
105/*
106 * Very old versions of ld do not recognize this name token; use the constant.
107 */
108#define PT_GNU_EH_FRAME 0x6474e550
109
110/*
111 * We must supply the ELF program headers explicitly to get just one
112 * PT_LOAD segment, and set the flags explicitly to make segments read-only.
113 */
114PHDRS
115{
116 text PT_LOAD FILEHDR PHDRS FLAGS(5); /* PF_R|PF_X */
117 dynamic PT_DYNAMIC FLAGS(4); /* PF_R */
118 note PT_NOTE FLAGS(4); /* PF_R */
119 eh_frame_hdr PT_GNU_EH_FRAME;
120}
121
122/*
123 * This controls what symbols we export from the DSO.
124 */
125VERSION
126{
127 VDSO_VERSION_STRING {
128 global:
129 /*
130 * Has to be there for the kernel to find
131 */
132 __kernel_gettimeofday;
133 __kernel_clock_gettime;
134 __kernel_clock_getres;
135
136 local: *;
137 };
138}
diff --git a/arch/s390/kernel/vdso64/vdso64_wrapper.S b/arch/s390/kernel/vdso64/vdso64_wrapper.S
new file mode 100644
index 000000000000..d8e2ac14d564
--- /dev/null
+++ b/arch/s390/kernel/vdso64/vdso64_wrapper.S
@@ -0,0 +1,13 @@
1#include <linux/init.h>
2#include <asm/page.h>
3
4 .section ".data.page_aligned"
5
6 .globl vdso64_start, vdso64_end
7 .balign PAGE_SIZE
8vdso64_start:
9 .incbin "arch/s390/kernel/vdso64/vdso64.so"
10 .balign PAGE_SIZE
11vdso64_end:
12
13 .previous
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 0fa5dc5d68e1..75a6e62ea973 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -27,7 +27,6 @@
27static ext_int_info_t ext_int_info_timer; 27static ext_int_info_t ext_int_info_timer;
28static DEFINE_PER_CPU(struct vtimer_queue, virt_cpu_timer); 28static DEFINE_PER_CPU(struct vtimer_queue, virt_cpu_timer);
29 29
30#ifdef CONFIG_VIRT_CPU_ACCOUNTING
31/* 30/*
32 * Update process times based on virtual cpu times stored by entry.S 31 * Update process times based on virtual cpu times stored by entry.S
33 * to the lowcore fields user_timer, system_timer & steal_clock. 32 * to the lowcore fields user_timer, system_timer & steal_clock.
@@ -125,16 +124,6 @@ static inline void set_vtimer(__u64 expires)
125 /* store expire time for this CPU timer */ 124 /* store expire time for this CPU timer */
126 __get_cpu_var(virt_cpu_timer).to_expire = expires; 125 __get_cpu_var(virt_cpu_timer).to_expire = expires;
127} 126}
128#else
129static inline void set_vtimer(__u64 expires)
130{
131 S390_lowcore.last_update_timer = expires;
132 asm volatile ("SPT %0" : : "m" (S390_lowcore.last_update_timer));
133
134 /* store expire time for this CPU timer */
135 __get_cpu_var(virt_cpu_timer).to_expire = expires;
136}
137#endif
138 127
139void vtime_start_cpu_timer(void) 128void vtime_start_cpu_timer(void)
140{ 129{
diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c
index 580fc64cc735..5c8457129603 100644
--- a/arch/s390/mm/extmem.c
+++ b/arch/s390/mm/extmem.c
@@ -7,6 +7,9 @@
7 * (C) IBM Corporation 2002-2004 7 * (C) IBM Corporation 2002-2004
8 */ 8 */
9 9
10#define KMSG_COMPONENT "extmem"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
10#include <linux/kernel.h> 13#include <linux/kernel.h>
11#include <linux/string.h> 14#include <linux/string.h>
12#include <linux/spinlock.h> 15#include <linux/spinlock.h>
@@ -24,19 +27,6 @@
24#include <asm/cpcmd.h> 27#include <asm/cpcmd.h>
25#include <asm/setup.h> 28#include <asm/setup.h>
26 29
27#define DCSS_DEBUG /* Debug messages on/off */
28
29#define DCSS_NAME "extmem"
30#ifdef DCSS_DEBUG
31#define PRINT_DEBUG(x...) printk(KERN_DEBUG DCSS_NAME " debug:" x)
32#else
33#define PRINT_DEBUG(x...) do {} while (0)
34#endif
35#define PRINT_INFO(x...) printk(KERN_INFO DCSS_NAME " info:" x)
36#define PRINT_WARN(x...) printk(KERN_WARNING DCSS_NAME " warning:" x)
37#define PRINT_ERR(x...) printk(KERN_ERR DCSS_NAME " error:" x)
38
39
40#define DCSS_LOADSHR 0x00 30#define DCSS_LOADSHR 0x00
41#define DCSS_LOADNSR 0x04 31#define DCSS_LOADNSR 0x04
42#define DCSS_PURGESEG 0x08 32#define DCSS_PURGESEG 0x08
@@ -286,7 +276,7 @@ query_segment_type (struct dcss_segment *seg)
286 goto out_free; 276 goto out_free;
287 } 277 }
288 if (diag_cc > 1) { 278 if (diag_cc > 1) {
289 PRINT_WARN ("segment_type: diag returned error %ld\n", vmrc); 279 pr_warning("Querying a DCSS type failed with rc=%ld\n", vmrc);
290 rc = dcss_diag_translate_rc (vmrc); 280 rc = dcss_diag_translate_rc (vmrc);
291 goto out_free; 281 goto out_free;
292 } 282 }
@@ -368,7 +358,6 @@ query_segment_type (struct dcss_segment *seg)
368 * -EIO : could not perform query diagnose 358 * -EIO : could not perform query diagnose
369 * -ENOENT : no such segment 359 * -ENOENT : no such segment
370 * -ENOTSUPP: multi-part segment cannot be used with linux 360 * -ENOTSUPP: multi-part segment cannot be used with linux
371 * -ENOSPC : segment cannot be used (overlaps with storage)
372 * -ENOMEM : out of memory 361 * -ENOMEM : out of memory
373 * 0 .. 6 : type of segment as defined in include/asm-s390/extmem.h 362 * 0 .. 6 : type of segment as defined in include/asm-s390/extmem.h
374 */ 363 */
@@ -480,9 +469,8 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
480 goto out_resource; 469 goto out_resource;
481 } 470 }
482 if (diag_cc > 1) { 471 if (diag_cc > 1) {
483 PRINT_WARN ("segment_load: could not load segment %s - " 472 pr_warning("Loading DCSS %s failed with rc=%ld\n", name,
484 "diag returned error (%ld)\n", 473 end_addr);
485 name, end_addr);
486 rc = dcss_diag_translate_rc(end_addr); 474 rc = dcss_diag_translate_rc(end_addr);
487 dcss_diag(&purgeseg_scode, seg->dcss_name, 475 dcss_diag(&purgeseg_scode, seg->dcss_name,
488 &dummy, &dummy); 476 &dummy, &dummy);
@@ -496,15 +484,13 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
496 *addr = seg->start_addr; 484 *addr = seg->start_addr;
497 *end = seg->end; 485 *end = seg->end;
498 if (do_nonshared) 486 if (do_nonshared)
499 PRINT_INFO ("segment_load: loaded segment %s range %p .. %p " 487 pr_info("DCSS %s of range %p to %p and type %s loaded as "
500 "type %s in non-shared mode\n", name, 488 "exclusive-writable\n", name, (void*) seg->start_addr,
501 (void*)seg->start_addr, (void*)seg->end, 489 (void*) seg->end, segtype_string[seg->vm_segtype]);
502 segtype_string[seg->vm_segtype]);
503 else { 490 else {
504 PRINT_INFO ("segment_load: loaded segment %s range %p .. %p " 491 pr_info("DCSS %s of range %p to %p and type %s loaded in "
505 "type %s in shared mode\n", name, 492 "shared access mode\n", name, (void*) seg->start_addr,
506 (void*)seg->start_addr, (void*)seg->end, 493 (void*) seg->end, segtype_string[seg->vm_segtype]);
507 segtype_string[seg->vm_segtype]);
508 } 494 }
509 goto out; 495 goto out;
510 out_resource: 496 out_resource:
@@ -593,14 +579,14 @@ segment_modify_shared (char *name, int do_nonshared)
593 goto out_unlock; 579 goto out_unlock;
594 } 580 }
595 if (do_nonshared == seg->do_nonshared) { 581 if (do_nonshared == seg->do_nonshared) {
596 PRINT_INFO ("segment_modify_shared: not reloading segment %s" 582 pr_info("DCSS %s is already in the requested access "
597 " - already in requested mode\n",name); 583 "mode\n", name);
598 rc = 0; 584 rc = 0;
599 goto out_unlock; 585 goto out_unlock;
600 } 586 }
601 if (atomic_read (&seg->ref_count) != 1) { 587 if (atomic_read (&seg->ref_count) != 1) {
602 PRINT_WARN ("segment_modify_shared: not reloading segment %s - " 588 pr_warning("DCSS %s is in use and cannot be reloaded\n",
603 "segment is in use by other driver(s)\n",name); 589 name);
604 rc = -EAGAIN; 590 rc = -EAGAIN;
605 goto out_unlock; 591 goto out_unlock;
606 } 592 }
@@ -613,8 +599,8 @@ segment_modify_shared (char *name, int do_nonshared)
613 seg->res->flags |= IORESOURCE_READONLY; 599 seg->res->flags |= IORESOURCE_READONLY;
614 600
615 if (request_resource(&iomem_resource, seg->res)) { 601 if (request_resource(&iomem_resource, seg->res)) {
616 PRINT_WARN("segment_modify_shared: could not reload segment %s" 602 pr_warning("DCSS %s overlaps with used memory resources "
617 " - overlapping resources\n", name); 603 "and cannot be reloaded\n", name);
618 rc = -EBUSY; 604 rc = -EBUSY;
619 kfree(seg->res); 605 kfree(seg->res);
620 goto out_del_mem; 606 goto out_del_mem;
@@ -632,9 +618,8 @@ segment_modify_shared (char *name, int do_nonshared)
632 goto out_del_res; 618 goto out_del_res;
633 } 619 }
634 if (diag_cc > 1) { 620 if (diag_cc > 1) {
635 PRINT_WARN ("segment_modify_shared: could not reload segment %s" 621 pr_warning("Reloading DCSS %s failed with rc=%ld\n", name,
636 " - diag returned error (%ld)\n", 622 end_addr);
637 name, end_addr);
638 rc = dcss_diag_translate_rc(end_addr); 623 rc = dcss_diag_translate_rc(end_addr);
639 goto out_del_res; 624 goto out_del_res;
640 } 625 }
@@ -673,8 +658,7 @@ segment_unload(char *name)
673 mutex_lock(&dcss_lock); 658 mutex_lock(&dcss_lock);
674 seg = segment_by_name (name); 659 seg = segment_by_name (name);
675 if (seg == NULL) { 660 if (seg == NULL) {
676 PRINT_ERR ("could not find segment %s in segment_unload, " 661 pr_err("Unloading unknown DCSS %s failed\n", name);
677 "please report to linux390@de.ibm.com\n",name);
678 goto out_unlock; 662 goto out_unlock;
679 } 663 }
680 if (atomic_dec_return(&seg->ref_count) != 0) 664 if (atomic_dec_return(&seg->ref_count) != 0)
@@ -709,8 +693,7 @@ segment_save(char *name)
709 seg = segment_by_name (name); 693 seg = segment_by_name (name);
710 694
711 if (seg == NULL) { 695 if (seg == NULL) {
712 PRINT_ERR("could not find segment %s in segment_save, please " 696 pr_err("Saving unknown DCSS %s failed\n", name);
713 "report to linux390@de.ibm.com\n", name);
714 goto out; 697 goto out;
715 } 698 }
716 699
@@ -727,14 +710,14 @@ segment_save(char *name)
727 response = 0; 710 response = 0;
728 cpcmd(cmd1, NULL, 0, &response); 711 cpcmd(cmd1, NULL, 0, &response);
729 if (response) { 712 if (response) {
730 PRINT_ERR("segment_save: DEFSEG failed with response code %i\n", 713 pr_err("Saving a DCSS failed with DEFSEG response code "
731 response); 714 "%i\n", response);
732 goto out; 715 goto out;
733 } 716 }
734 cpcmd(cmd2, NULL, 0, &response); 717 cpcmd(cmd2, NULL, 0, &response);
735 if (response) { 718 if (response) {
736 PRINT_ERR("segment_save: SAVESEG failed with response code %i\n", 719 pr_err("Saving a DCSS failed with SAVESEG response code "
737 response); 720 "%i\n", response);
738 goto out; 721 goto out;
739 } 722 }
740out: 723out:
@@ -749,44 +732,41 @@ void segment_warning(int rc, char *seg_name)
749{ 732{
750 switch (rc) { 733 switch (rc) {
751 case -ENOENT: 734 case -ENOENT:
752 PRINT_WARN("cannot load/query segment %s, " 735 pr_err("DCSS %s cannot be loaded or queried\n", seg_name);
753 "does not exist\n", seg_name);
754 break; 736 break;
755 case -ENOSYS: 737 case -ENOSYS:
756 PRINT_WARN("cannot load/query segment %s, " 738 pr_err("DCSS %s cannot be loaded or queried without "
757 "not running on VM\n", seg_name); 739 "z/VM\n", seg_name);
758 break; 740 break;
759 case -EIO: 741 case -EIO:
760 PRINT_WARN("cannot load/query segment %s, " 742 pr_err("Loading or querying DCSS %s resulted in a "
761 "hardware error\n", seg_name); 743 "hardware error\n", seg_name);
762 break; 744 break;
763 case -ENOTSUPP: 745 case -ENOTSUPP:
764 PRINT_WARN("cannot load/query segment %s, " 746 pr_err("DCSS %s has multiple page ranges and cannot be "
765 "is a multi-part segment\n", seg_name); 747 "loaded or queried\n", seg_name);
766 break; 748 break;
767 case -ENOSPC: 749 case -ENOSPC:
768 PRINT_WARN("cannot load/query segment %s, " 750 pr_err("DCSS %s overlaps with used storage and cannot "
769 "overlaps with storage\n", seg_name); 751 "be loaded\n", seg_name);
770 break; 752 break;
771 case -EBUSY: 753 case -EBUSY:
772 PRINT_WARN("cannot load/query segment %s, " 754 pr_err("%s needs used memory resources and cannot be "
773 "overlaps with already loaded dcss\n", seg_name); 755 "loaded or queried\n", seg_name);
774 break; 756 break;
775 case -EPERM: 757 case -EPERM:
776 PRINT_WARN("cannot load/query segment %s, " 758 pr_err("DCSS %s is already loaded in a different access "
777 "already loaded in incompatible mode\n", seg_name); 759 "mode\n", seg_name);
778 break; 760 break;
779 case -ENOMEM: 761 case -ENOMEM:
780 PRINT_WARN("cannot load/query segment %s, " 762 pr_err("There is not enough memory to load or query "
781 "out of memory\n", seg_name); 763 "DCSS %s\n", seg_name);
782 break; 764 break;
783 case -ERANGE: 765 case -ERANGE:
784 PRINT_WARN("cannot load/query segment %s, " 766 pr_err("DCSS %s exceeds the kernel mapping range (%lu) "
785 "exceeds kernel mapping range\n", seg_name); 767 "and cannot be loaded\n", seg_name, VMEM_MAX_PHYS);
786 break; 768 break;
787 default: 769 default:
788 PRINT_WARN("cannot load/query segment %s, "
789 "return value %i\n", seg_name, rc);
790 break; 770 break;
791 } 771 }
792} 772}
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 80119b3398e7..f32a5197128d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -13,6 +13,7 @@ config SUPERH
13 select HAVE_OPROFILE 13 select HAVE_OPROFILE
14 select HAVE_GENERIC_DMA_COHERENT 14 select HAVE_GENERIC_DMA_COHERENT
15 select HAVE_IOREMAP_PROT if MMU 15 select HAVE_IOREMAP_PROT if MMU
16 select HAVE_ARCH_TRACEHOOK
16 help 17 help
17 The SuperH is a RISC processor targeted for use in embedded systems 18 The SuperH is a RISC processor targeted for use in embedded systems
18 and consumer electronics; it was also used in the Sega Dreamcast 19 and consumer electronics; it was also used in the Sega Dreamcast
@@ -23,8 +24,10 @@ config SUPERH32
23 def_bool !SUPERH64 24 def_bool !SUPERH64
24 select HAVE_KPROBES 25 select HAVE_KPROBES
25 select HAVE_KRETPROBES 26 select HAVE_KRETPROBES
26 select HAVE_ARCH_TRACEHOOK
27 select HAVE_FUNCTION_TRACER 27 select HAVE_FUNCTION_TRACER
28 select HAVE_FTRACE_MCOUNT_RECORD
29 select HAVE_DYNAMIC_FTRACE
30 select HAVE_ARCH_KGDB
28 31
29config SUPERH64 32config SUPERH64
30 def_bool y if CPU_SH5 33 def_bool y if CPU_SH5
@@ -83,10 +86,17 @@ config GENERIC_LOCKBREAK
83 86
84config SYS_SUPPORTS_PM 87config SYS_SUPPORTS_PM
85 bool 88 bool
89 depends on !SMP
90
91config ARCH_SUSPEND_POSSIBLE
92 def_bool n
93
94config ARCH_HIBERNATION_POSSIBLE
95 def_bool n
86 96
87config SYS_SUPPORTS_APM_EMULATION 97config SYS_SUPPORTS_APM_EMULATION
88 bool 98 bool
89 select SYS_SUPPORTS_PM 99 select ARCH_SUSPEND_POSSIBLE
90 100
91config SYS_SUPPORTS_SMP 101config SYS_SUPPORTS_SMP
92 bool 102 bool
@@ -181,6 +191,11 @@ config CPU_SUBTYPE_SH7619
181 191
182# SH-2A Processor Support 192# SH-2A Processor Support
183 193
194config CPU_SUBTYPE_SH7201
195 bool "Support SH7201 processor"
196 select CPU_SH2A
197 select CPU_HAS_FPU
198
184config CPU_SUBTYPE_SH7203 199config CPU_SUBTYPE_SH7203
185 bool "Support SH7203 processor" 200 bool "Support SH7203 processor"
186 select CPU_SH2A 201 select CPU_SH2A
@@ -454,8 +469,12 @@ config SH_CPU_FREQ
454 depends on CPU_FREQ 469 depends on CPU_FREQ
455 select CPU_FREQ_TABLE 470 select CPU_FREQ_TABLE
456 help 471 help
457 This adds the cpufreq driver for SuperH. At present, only 472 This adds the cpufreq driver for SuperH. Any CPU that supports
458 the SH-4 is supported. 473 clock rate rounding through the clock framework can use this
474 driver. While it will make the kernel slightly larger, this is
475 harmless for CPUs that don't support rate rounding. The driver
476 will also generate a notice in the boot log before disabling
477 itself if the CPU in question is not capable of rate rounding.
459 478
460 For details, take a look at <file:Documentation/cpu-freq>. 479 For details, take a look at <file:Documentation/cpu-freq>.
461 480
@@ -467,9 +486,6 @@ source "arch/sh/drivers/Kconfig"
467 486
468endmenu 487endmenu
469 488
470config ISA_DMA_API
471 bool
472
473menu "Kernel features" 489menu "Kernel features"
474 490
475source kernel/Kconfig.hz 491source kernel/Kconfig.hz
@@ -686,49 +702,6 @@ config MAPLE
686 Dreamcast with a serial line terminal or a remote network 702 Dreamcast with a serial line terminal or a remote network
687 connection. 703 connection.
688 704
689config CF_ENABLER
690 bool "Compact Flash Enabler support"
691 depends on SOLUTION_ENGINE || SH_SH03
692 ---help---
693 Compact Flash is a small, removable mass storage device introduced
694 in 1994 originally as a PCMCIA device. If you say `Y' here, you
695 compile in support for Compact Flash devices directly connected to
696 a SuperH processor. A Compact Flash FAQ is available at
697 <http://www.compactflash.org/faqs/faq.htm>.
698
699 If your board has "Directly Connected" CompactFlash at area 5 or 6,
700 you may want to enable this option. Then, you can use CF as
701 primary IDE drive (only tested for SanDisk).
702
703 If in doubt, select 'N'.
704
705choice
706 prompt "Compact Flash Connection Area"
707 depends on CF_ENABLER
708 default CF_AREA6
709
710config CF_AREA5
711 bool "Area5"
712 help
713 If your board has "Directly Connected" CompactFlash, You should
714 select the area where your CF is connected to.
715
716 - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
717 - "Area6" if it is connected to Area 6 (0x18000000)
718
719 "Area6" will work for most boards.
720
721config CF_AREA6
722 bool "Area6"
723
724endchoice
725
726config CF_BASE_ADDR
727 hex
728 depends on CF_ENABLER
729 default "0xb8000000" if CF_AREA6
730 default "0xb4000000" if CF_AREA5
731
732source "arch/sh/drivers/pci/Kconfig" 705source "arch/sh/drivers/pci/Kconfig"
733 706
734source "drivers/pci/Kconfig" 707source "drivers/pci/Kconfig"
@@ -746,13 +719,11 @@ source "fs/Kconfig.binfmt"
746endmenu 719endmenu
747 720
748menu "Power management options (EXPERIMENTAL)" 721menu "Power management options (EXPERIMENTAL)"
749depends on EXPERIMENTAL && SYS_SUPPORTS_PM 722depends on EXPERIMENTAL
750 723
751config ARCH_SUSPEND_POSSIBLE 724source "kernel/power/Kconfig"
752 def_bool y
753 depends on !SMP
754 725
755source kernel/power/Kconfig 726source "drivers/cpuidle/Kconfig"
756 727
757endmenu 728endmenu
758 729
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index e6d2c8b11abd..0d62681f72a0 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -98,18 +98,29 @@ config IRQSTACKS
98 for handling hard and soft interrupts. This can help avoid 98 for handling hard and soft interrupts. This can help avoid
99 overflowing the process kernel stacks. 99 overflowing the process kernel stacks.
100 100
101config SH_KGDB 101config DUMP_CODE
102 bool "Include KGDB kernel debugger" 102 bool "Show disassembly of nearby code in register dumps"
103 select FRAME_POINTER 103 depends on DEBUG_KERNEL && SUPERH32
104 select DEBUG_INFO 104 default y if DEBUG_BUGVERBOSE
105 depends on CPU_SH3 || CPU_SH4 105 default n
106 help
107 This prints out a code trace of the instructions leading up to
108 the faulting instruction as a debugging aid. As this does grow
109 the kernel in size a bit, most users will want to say N here.
110
111 Those looking for more verbose debugging output should say Y.
112
113config SH_NO_BSS_INIT
114 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
115 depends on DEBUG_KERNEL
116 default n
106 help 117 help
107 Include in-kernel hooks for kgdb, the Linux kernel source level 118 If running in painfully slow environments, such as an RTL
108 debugger. See <http://kgdb.sourceforge.net/> for more information. 119 simulation or from remote memory via SHdebug, where the memory
109 Unless you are intending to debug the kernel, say N here. 120 can already be gauranteed to ber zeroed on boot, say Y.
110 121
111menu "KGDB configuration options" 122 For all other cases, say N. If this option seems perplexing, or
112 depends on SH_KGDB 123 you aren't sure, say N.
113 124
114config MORE_COMPILE_OPTIONS 125config MORE_COMPILE_OPTIONS
115 bool "Add any additional compile options" 126 bool "Add any additional compile options"
@@ -122,85 +133,16 @@ config COMPILE_OPTIONS
122 string "Additional compile arguments" 133 string "Additional compile arguments"
123 depends on MORE_COMPILE_OPTIONS 134 depends on MORE_COMPILE_OPTIONS
124 135
125config KGDB_NMI
126 def_bool n
127 prompt "Enter KGDB on NMI"
128
129config SH_KGDB_CONSOLE
130 def_bool n
131 prompt "Console messages through GDB"
132 depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y
133 select SERIAL_CORE_CONSOLE
134
135config KGDB_SYSRQ
136 def_bool y
137 prompt "Allow SysRq 'G' to enter KGDB"
138 depends on MAGIC_SYSRQ
139
140comment "Serial port setup"
141
142config KGDB_DEFPORT
143 int "Port number (ttySCn)"
144 default "1"
145
146config KGDB_DEFBAUD
147 int "Baud rate"
148 default "115200"
149
150choice
151 prompt "Parity"
152 depends on SH_KGDB
153 default KGDB_DEFPARITY_N
154
155config KGDB_DEFPARITY_N
156 bool "None"
157
158config KGDB_DEFPARITY_E
159 bool "Even"
160
161config KGDB_DEFPARITY_O
162 bool "Odd"
163
164endchoice
165
166choice
167 prompt "Data bits"
168 depends on SH_KGDB
169 default KGDB_DEFBITS_8
170
171config KGDB_DEFBITS_8
172 bool "8"
173
174config KGDB_DEFBITS_7
175 bool "7"
176
177endchoice
178
179endmenu
180
181if SUPERH64
182
183config SH64_PROC_ASIDS
184 bool "Debug: report ASIDs through /proc/asids"
185 depends on PROC_FS && MMU
186
187config SH64_SR_WATCH 136config SH64_SR_WATCH
188 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" 137 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
138 depends on SUPERH64
189 139
190config POOR_MANS_STRACE 140config POOR_MANS_STRACE
191 bool "Debug: enable rudimentary strace facility" 141 bool "Debug: enable rudimentary strace facility"
142 depends on SUPERH64
192 help 143 help
193 This option allows system calls to be traced to the console. It also 144 This option allows system calls to be traced to the console. It also
194 aids in detecting kernel stack underflow. It is useful for debugging 145 aids in detecting kernel stack underflow. It is useful for debugging
195 early-userland problems (e.g. init incurring fatal exceptions.) 146 early-userland problems (e.g. init incurring fatal exceptions.)
196 147
197config SH_ALPHANUMERIC
198 bool "Enable debug outputs to on-board alphanumeric display"
199 depends on SH_CAYMAN
200
201config SH_NO_BSS_INIT
202 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
203
204endif
205
206endmenu 148endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index c43eb0d7fa3b..4067b0d9287b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -32,6 +32,7 @@ cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \
32 $(call cc-option,-mno-implicit-fp,-m4-nofpu) 32 $(call cc-option,-mno-implicit-fp,-m4-nofpu)
33cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ 33cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \
34 $(call cc-option,-m4a-nofpu,) 34 $(call cc-option,-m4a-nofpu,)
35cflags-$(CONFIG_CPU_SH4AL_DSP) += $(call cc-option,-m4al,)
35cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) 36cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,)
36 37
37ifeq ($(cflags-y),) 38ifeq ($(cflags-y),)
@@ -39,22 +40,16 @@ ifeq ($(cflags-y),)
39# In the case where we are stuck with a compiler that has been uselessly 40# In the case where we are stuck with a compiler that has been uselessly
40# restricted to a particular ISA, a favourite default of newer GCCs when 41# restricted to a particular ISA, a favourite default of newer GCCs when
41# extensive multilib targets are not provided, ensure we get the best fit 42# extensive multilib targets are not provided, ensure we get the best fit
42# regarding FP generation. This is necessary to avoid references to FP 43# regarding FP generation. This is intentionally stupid (albeit many
43# variants in libgcc where integer variants exist, which otherwise result 44# orders of magnitude less than GCC's default behaviour), as anything
44# in link errors. This is intentionally stupid (albeit many orders of 45# with a large number of multilib targets better have been built
45# magnitude less than GCC's default behaviour), as anything with a large 46# correctly for the target in mind.
46# number of multilib targets better have been built correctly for
47# the target in mind.
48# 47#
49cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \ 48cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \
50 grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//') 49 grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//')
51endif 50# At this point, anything goes.
52 51isaflags-y := $(call as-option,-Wa$(comma)-isa=any,)
53cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb 52else
54cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
55
56cflags-y += $(call cc-option,-mno-fdpic)
57
58# 53#
59# -Wa,-isa= tuning implies -Wa,-dsp for the versions of binutils that 54# -Wa,-isa= tuning implies -Wa,-dsp for the versions of binutils that
60# support it, while -Wa,-dsp by itself limits the range of usable opcodes 55# support it, while -Wa,-dsp by itself limits the range of usable opcodes
@@ -67,7 +62,12 @@ isaflags-y := $(call as-option,-Wa$(comma)-isa=$(isa-y),)
67 62
68isaflags-$(CONFIG_SH_DSP) := \ 63isaflags-$(CONFIG_SH_DSP) := \
69 $(call as-option,-Wa$(comma)-isa=$(isa-y),-Wa$(comma)-dsp) 64 $(call as-option,-Wa$(comma)-isa=$(isa-y),-Wa$(comma)-dsp)
65endif
70 66
67cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb
68cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
69
70cflags-y += $(call cc-option,-mno-fdpic)
71cflags-y += $(isaflags-y) -ffreestanding 71cflags-y += $(isaflags-y) -ffreestanding
72 72
73cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ 73cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \
@@ -79,6 +79,9 @@ OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \
79# Give the various platforms the opportunity to set default image types 79# Give the various platforms the opportunity to set default image types
80defaultimage-$(CONFIG_SUPERH32) := zImage 80defaultimage-$(CONFIG_SUPERH32) := zImage
81defaultimage-$(CONFIG_SH_SH7785LCR) := uImage 81defaultimage-$(CONFIG_SH_SH7785LCR) := uImage
82defaultimage-$(CONFIG_SH_RSK) := uImage
83defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux
84defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux
82 85
83# Set some sensible Kbuild defaults 86# Set some sensible Kbuild defaults
84KBUILD_DEFCONFIG := shx3_defconfig 87KBUILD_DEFCONFIG := shx3_defconfig
@@ -132,6 +135,7 @@ machdir-$(CONFIG_SH_LANDISK) += mach-landisk
132machdir-$(CONFIG_SH_TITAN) += mach-titan 135machdir-$(CONFIG_SH_TITAN) += mach-titan
133machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2 136machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
134machdir-$(CONFIG_SH_CAYMAN) += mach-cayman 137machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
138machdir-$(CONFIG_SH_RSK) += mach-rsk
135 139
136ifneq ($(machdir-y),) 140ifneq ($(machdir-y),)
137core-y += $(addprefix arch/sh/boards/, \ 141core-y += $(addprefix arch/sh/boards/, \
@@ -173,11 +177,8 @@ KBUILD_CFLAGS += -pipe $(cflags-y)
173KBUILD_CPPFLAGS += $(cflags-y) 177KBUILD_CPPFLAGS += $(cflags-y)
174KBUILD_AFLAGS += $(cflags-y) 178KBUILD_AFLAGS += $(cflags-y)
175 179
176LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
177
178libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) 180libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
179libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) 181libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
180libs-y += $(LIBGCC)
181 182
182PHONY += maketools FORCE 183PHONY += maketools FORCE
183 184
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 50467f9d0d0b..861914747e4e 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -126,10 +126,12 @@ config SH_RTS7751R2D
126 Select RTS7751R2D if configuring for a Renesas Technology 126 Select RTS7751R2D if configuring for a Renesas Technology
127 Sales SH-Graphics board. 127 Sales SH-Graphics board.
128 128
129config SH_RSK7203 129config SH_RSK
130 bool "RSK7203" 130 bool "Renesas Starter Kit"
131 select GENERIC_GPIO 131 depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203
132 depends on CPU_SUBTYPE_SH7203 132 help
133 Select this option if configuring for any of the RSK+ MCU
134 evaluation platforms.
133 135
134config SH_SDK7780 136config SH_SDK7780
135 bool "SDK7780R3" 137 bool "SDK7780R3"
@@ -253,6 +255,7 @@ source "arch/sh/boards/mach-r2d/Kconfig"
253source "arch/sh/boards/mach-highlander/Kconfig" 255source "arch/sh/boards/mach-highlander/Kconfig"
254source "arch/sh/boards/mach-sdk7780/Kconfig" 256source "arch/sh/boards/mach-sdk7780/Kconfig"
255source "arch/sh/boards/mach-migor/Kconfig" 257source "arch/sh/boards/mach-migor/Kconfig"
258source "arch/sh/boards/mach-rsk/Kconfig"
256 259
257if SH_MAGIC_PANEL_R2 260if SH_MAGIC_PANEL_R2
258 261
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index d9efa3923721..269ae2be49ef 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -3,7 +3,6 @@
3# 3#
4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o 4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
6obj-$(CONFIG_SH_RSK7203) += board-rsk7203.o
7obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
8obj-$(CONFIG_SH_SHMIN) += board-shmin.o 7obj-$(CONFIG_SH_SHMIN) += board-shmin.o
9obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 8881a643ac32..1c67cba6e34f 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -197,6 +197,10 @@ static struct resource lcdc_resources[] = {
197 .end = 0xfe941fff, 197 .end = 0xfe941fff,
198 .flags = IORESOURCE_MEM, 198 .flags = IORESOURCE_MEM,
199 }, 199 },
200 [1] = {
201 .start = 28,
202 .flags = IORESOURCE_IRQ,
203 },
200}; 204};
201 205
202static struct platform_device lcdc_device = { 206static struct platform_device lcdc_device = {
@@ -303,6 +307,7 @@ static struct resource ceu_resources[] = {
303 307
304static struct platform_device ceu_device = { 308static struct platform_device ceu_device = {
305 .name = "sh_mobile_ceu", 309 .name = "sh_mobile_ceu",
310 .id = 0, /* "ceu0" clock */
306 .num_resources = ARRAY_SIZE(ceu_resources), 311 .num_resources = ARRAY_SIZE(ceu_resources),
307 .resource = ceu_resources, 312 .resource = ceu_resources,
308 .dev = { 313 .dev = {
@@ -344,7 +349,6 @@ static int __init ap325rxa_devices_setup(void)
344 gpio_export(GPIO_PTF7, 0); 349 gpio_export(GPIO_PTF7, 0);
345 350
346 /* LCDC */ 351 /* LCDC */
347 clk_always_enable("mstp200");
348 gpio_request(GPIO_FN_LCDD15, NULL); 352 gpio_request(GPIO_FN_LCDD15, NULL);
349 gpio_request(GPIO_FN_LCDD14, NULL); 353 gpio_request(GPIO_FN_LCDD14, NULL);
350 gpio_request(GPIO_FN_LCDD13, NULL); 354 gpio_request(GPIO_FN_LCDD13, NULL);
@@ -375,7 +379,6 @@ static int __init ap325rxa_devices_setup(void)
375 gpio_direction_output(GPIO_PTS3, 1); 379 gpio_direction_output(GPIO_PTS3, 1);
376 380
377 /* CEU */ 381 /* CEU */
378 clk_always_enable("mstp203");
379 gpio_request(GPIO_FN_VIO_CLK2, NULL); 382 gpio_request(GPIO_FN_VIO_CLK2, NULL);
380 gpio_request(GPIO_FN_VIO_VD2, NULL); 383 gpio_request(GPIO_FN_VIO_VD2, NULL);
381 gpio_request(GPIO_FN_VIO_HD2, NULL); 384 gpio_request(GPIO_FN_VIO_HD2, NULL);
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index 5cc0867de5ab..b1dcbbc89188 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -22,21 +22,13 @@ static void __init init_shmin_irq(void)
22 plat_irq_setup_pins(IRQ_MODE_IRQ); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
23} 23}
24 24
25static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) 25static void __init shmin_setup(char **cmdline_p)
26{ 26{
27 static int dummy; 27 __set_io_port_base(SHMIN_IO_BASE);
28
29 if ((port & ~0x1f) == SHMIN_NE_BASE)
30 return (void __iomem *)(SHMIN_IO_BASE + port);
31
32 dummy = 0;
33
34 return &dummy;
35
36} 28}
37 29
38static struct sh_machine_vector mv_shmin __initmv = { 30static struct sh_machine_vector mv_shmin __initmv = {
39 .mv_name = "SHMIN", 31 .mv_name = "SHMIN",
32 .mv_setup = shmin_setup,
40 .mv_init_irq = init_shmin_irq, 33 .mv_init_irq = init_shmin_irq,
41 .mv_ioport_map = shmin_ioport_map,
42}; 34};
diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile
index 489a8f867368..cafe1ac3b29c 100644
--- a/arch/sh/boards/mach-cayman/Makefile
+++ b/arch/sh/boards/mach-cayman/Makefile
@@ -2,4 +2,3 @@
2# Makefile for the Hitachi Cayman specific parts of the kernel 2# Makefile for the Hitachi Cayman specific parts of the kernel
3# 3#
4obj-y := setup.o irq.o 4obj-y := setup.o irq.o
5obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index ceb37ae92c70..da62ad516994 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -94,31 +94,11 @@ static void ack_cayman_irq(unsigned int irq)
94 disable_cayman_irq(irq); 94 disable_cayman_irq(irq);
95} 95}
96 96
97static void end_cayman_irq(unsigned int irq) 97struct irq_chip cayman_irq_type = {
98{ 98 .name = "Cayman-IRQ",
99 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 99 .unmask = enable_cayman_irq,
100 enable_cayman_irq(irq); 100 .mask = disable_cayman_irq,
101} 101 .mask_ack = ack_cayman_irq,
102
103static unsigned int startup_cayman_irq(unsigned int irq)
104{
105 enable_cayman_irq(irq);
106 return 0; /* never anything pending */
107}
108
109static void shutdown_cayman_irq(unsigned int irq)
110{
111 disable_cayman_irq(irq);
112}
113
114struct hw_interrupt_type cayman_irq_type = {
115 .typename = "Cayman-IRQ",
116 .startup = startup_cayman_irq,
117 .shutdown = shutdown_cayman_irq,
118 .enable = enable_cayman_irq,
119 .disable = disable_cayman_irq,
120 .ack = ack_cayman_irq,
121 .end = end_cayman_irq,
122}; 102};
123 103
124int cayman_irq_demux(int evt) 104int cayman_irq_demux(int evt)
@@ -187,8 +167,9 @@ void init_cayman_irq(void)
187 return; 167 return;
188 } 168 }
189 169
190 for (i=0; i<NR_EXT_IRQS; i++) { 170 for (i = 0; i < NR_EXT_IRQS; i++) {
191 irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type; 171 set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type,
172 handle_level_irq);
192 } 173 }
193 174
194 /* Setup the SMSC interrupt */ 175 /* Setup the SMSC interrupt */
diff --git a/arch/sh/boards/mach-cayman/led.c b/arch/sh/boards/mach-cayman/led.c
deleted file mode 100644
index a808eac4ecd6..000000000000
--- a/arch/sh/boards/mach-cayman/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/sh/boards/cayman/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Flash the LEDs
10 */
11#include <asm/io.h>
12
13/*
14** It is supposed these functions to be used for a low level
15** debugging (via Cayman LEDs), hence to be available as soon
16** as possible.
17** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped
18** (this happen when IRQ are initialized... quite late).
19** These triky dependencies should be removed. Temporary, it
20** may be enough to NOP until EPLD is mapped.
21*/
22
23extern unsigned long epld_virt;
24
25#define LED_ADDR (epld_virt + 0x008)
26#define HDSP2534_ADDR (epld_virt + 0x100)
27
28void mach_led(int position, int value)
29{
30 if (!epld_virt)
31 return;
32
33 if (value)
34 ctrl_outl(0, LED_ADDR);
35 else
36 ctrl_outl(1, LED_ADDR);
37
38}
39
40void mach_alphanum(int position, unsigned char value)
41{
42 if (!epld_virt)
43 return;
44
45 ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2));
46}
47
48void mach_alphanum_brightness(int setting)
49{
50 ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0);
51}
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index 67bdc33dd411..f55fc8e795e9 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -10,106 +10,90 @@
10 */ 10 */
11 11
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <asm/io.h> 13#include <linux/io.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <mach/sysasic.h> 15#include <mach/sysasic.h>
16 16
17/* Dreamcast System ASIC Hardware Events - 17/*
18 18 * Dreamcast System ASIC Hardware Events -
19 The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving 19 *
20 hardware events from system peripherals and triggering an SH7750 IRQ. 20 * The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving
21 Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are 21 * hardware events from system peripherals and triggering an SH7750 IRQ.
22 set in the Event Mask Registers (EMRs). When a hardware event is 22 * Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are
23 triggered, it's corresponding bit in the Event Status Registers (ESRs) 23 * set in the Event Mask Registers (EMRs). When a hardware event is
24 is set, and that bit should be rewritten to the ESR to acknowledge that 24 * triggered, its corresponding bit in the Event Status Registers (ESRs)
25 event. 25 * is set, and that bit should be rewritten to the ESR to acknowledge that
26 26 * event.
27 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event 27 *
28 types can be found in include/asm-sh/dreamcast/sysasic.h. There are three 28 * There are three 32-bit ESRs located at 0xa05f6900 - 0xa05f6908. Event
29 groups of EMRs that parallel the ESRs. Each EMR group corresponds to an 29 * types can be found in arch/sh/include/mach-dreamcast/mach/sysasic.h.
30 IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 30 * There are three groups of EMRs that parallel the ESRs. Each EMR group
31 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. 31 * corresponds to an IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13,
32 32 * 0xa05f6920 - 0xa05f6928 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938
33 In the kernel, these events are mapped to virtual IRQs so that drivers can 33 * triggers IRQ 9.
34 respond to them as they would a normal interrupt. In order to keep this 34 *
35 mapping simple, the events are mapped as: 35 * In the kernel, these events are mapped to virtual IRQs so that drivers can
36 36 * respond to them as they would a normal interrupt. In order to keep this
37 6900/6910 - Events 0-31, IRQ 13 37 * mapping simple, the events are mapped as:
38 6904/6924 - Events 32-63, IRQ 11 38 *
39 6908/6938 - Events 64-95, IRQ 9 39 * 6900/6910 - Events 0-31, IRQ 13
40 40 * 6904/6924 - Events 32-63, IRQ 11
41*/ 41 * 6908/6938 - Events 64-95, IRQ 9
42 *
43 */
42 44
43#define ESR_BASE 0x005f6900 /* Base event status register */ 45#define ESR_BASE 0x005f6900 /* Base event status register */
44#define EMR_BASE 0x005f6910 /* Base event mask register */ 46#define EMR_BASE 0x005f6910 /* Base event mask register */
45 47
46/* Helps us determine the EMR group that this event belongs to: 0 = 0x6910, 48/*
47 1 = 0x6920, 2 = 0x6930; also determine the event offset */ 49 * Helps us determine the EMR group that this event belongs to: 0 = 0x6910,
50 * 1 = 0x6920, 2 = 0x6930; also determine the event offset.
51 */
48#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) 52#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32)
49 53
50/* Return the hardware event's bit positon within the EMR/ESR */ 54/* Return the hardware event's bit positon within the EMR/ESR */
51#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) 55#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31)
52 56
53/* For each of these *_irq routines, the IRQ passed in is the virtual IRQ 57/*
54 (logically mapped to the corresponding bit for the hardware event). */ 58 * For each of these *_irq routines, the IRQ passed in is the virtual IRQ
59 * (logically mapped to the corresponding bit for the hardware event).
60 */
55 61
56/* Disable the hardware event by masking its bit in its EMR */ 62/* Disable the hardware event by masking its bit in its EMR */
57static inline void disable_systemasic_irq(unsigned int irq) 63static inline void disable_systemasic_irq(unsigned int irq)
58{ 64{
59 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 65 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
60 __u32 mask; 66 __u32 mask;
61 67
62 mask = inl(emr); 68 mask = inl(emr);
63 mask &= ~(1 << EVENT_BIT(irq)); 69 mask &= ~(1 << EVENT_BIT(irq));
64 outl(mask, emr); 70 outl(mask, emr);
65} 71}
66 72
67/* Enable the hardware event by setting its bit in its EMR */ 73/* Enable the hardware event by setting its bit in its EMR */
68static inline void enable_systemasic_irq(unsigned int irq) 74static inline void enable_systemasic_irq(unsigned int irq)
69{ 75{
70 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 76 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
71 __u32 mask; 77 __u32 mask;
72 78
73 mask = inl(emr); 79 mask = inl(emr);
74 mask |= (1 << EVENT_BIT(irq)); 80 mask |= (1 << EVENT_BIT(irq));
75 outl(mask, emr); 81 outl(mask, emr);
76} 82}
77 83
78/* Acknowledge a hardware event by writing its bit back to its ESR */ 84/* Acknowledge a hardware event by writing its bit back to its ESR */
79static void ack_systemasic_irq(unsigned int irq) 85static void mask_ack_systemasic_irq(unsigned int irq)
80{
81 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
82 disable_systemasic_irq(irq);
83 outl((1 << EVENT_BIT(irq)), esr);
84}
85
86/* After a IRQ has been ack'd and responded to, it needs to be renabled */
87static void end_systemasic_irq(unsigned int irq)
88{
89 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
90 enable_systemasic_irq(irq);
91}
92
93static unsigned int startup_systemasic_irq(unsigned int irq)
94{
95 enable_systemasic_irq(irq);
96
97 return 0;
98}
99
100static void shutdown_systemasic_irq(unsigned int irq)
101{ 86{
102 disable_systemasic_irq(irq); 87 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
88 disable_systemasic_irq(irq);
89 outl((1 << EVENT_BIT(irq)), esr);
103} 90}
104 91
105struct hw_interrupt_type systemasic_int = { 92struct irq_chip systemasic_int = {
106 .typename = "System ASIC", 93 .name = "System ASIC",
107 .startup = startup_systemasic_irq, 94 .mask = disable_systemasic_irq,
108 .shutdown = shutdown_systemasic_irq, 95 .mask_ack = mask_ack_systemasic_irq,
109 .enable = enable_systemasic_irq, 96 .unmask = enable_systemasic_irq,
110 .disable = disable_systemasic_irq,
111 .ack = ack_systemasic_irq,
112 .end = end_systemasic_irq,
113}; 97};
114 98
115/* 99/*
@@ -117,37 +101,37 @@ struct hw_interrupt_type systemasic_int = {
117 */ 101 */
118int systemasic_irq_demux(int irq) 102int systemasic_irq_demux(int irq)
119{ 103{
120 __u32 emr, esr, status, level; 104 __u32 emr, esr, status, level;
121 __u32 j, bit; 105 __u32 j, bit;
122 106
123 switch (irq) { 107 switch (irq) {
124 case 13: 108 case 13:
125 level = 0; 109 level = 0;
126 break; 110 break;
127 case 11: 111 case 11:
128 level = 1; 112 level = 1;
129 break; 113 break;
130 case 9: 114 case 9:
131 level = 2; 115 level = 2;
132 break; 116 break;
133 default: 117 default:
134 return irq; 118 return irq;
135 } 119 }
136 emr = EMR_BASE + (level << 4) + (level << 2); 120 emr = EMR_BASE + (level << 4) + (level << 2);
137 esr = ESR_BASE + (level << 2); 121 esr = ESR_BASE + (level << 2);
138 122
139 /* Mask the ESR to filter any spurious, unwanted interrupts */ 123 /* Mask the ESR to filter any spurious, unwanted interrupts */
140 status = inl(esr); 124 status = inl(esr);
141 status &= inl(emr); 125 status &= inl(emr);
142 126
143 /* Now scan and find the first set bit as the event to map */ 127 /* Now scan and find the first set bit as the event to map */
144 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { 128 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
145 if (status & bit) { 129 if (status & bit) {
146 irq = HW_EVENT_IRQ_BASE + j + (level << 5); 130 irq = HW_EVENT_IRQ_BASE + j + (level << 5);
147 return irq; 131 return irq;
148 } 132 }
149 } 133 }
150 134
151 /* Not reached */ 135 /* Not reached */
152 return irq; 136 return irq;
153} 137}
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index 7d944fc75e93..d1bee4884cd6 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,7 +28,7 @@
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <mach/sysasic.h> 29#include <mach/sysasic.h>
30 30
31extern struct hw_interrupt_type systemasic_int; 31extern struct irq_chip systemasic_int;
32extern void aica_time_init(void); 32extern void aica_time_init(void);
33extern int gapspci_init(void); 33extern int gapspci_init(void);
34extern int systemasic_irq_demux(int); 34extern int systemasic_irq_demux(int);
@@ -47,7 +47,8 @@ static void __init dreamcast_setup(char **cmdline_p)
47 47
48 /* Assign all virtual IRQs to the System ASIC int. handler */ 48 /* Assign all virtual IRQs to the System ASIC int. handler */
49 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) 49 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
50 irq_desc[i].chip = &systemasic_int; 50 set_irq_chip_and_handler(i, &systemasic_int,
51 handle_level_irq);
51 52
52 board_time_init = aica_time_init; 53 board_time_init = aica_time_init;
53 54
diff --git a/arch/sh/boards/mach-edosk7705/Makefile b/arch/sh/boards/mach-edosk7705/Makefile
index 14bdd531f116..cd54acb51499 100644
--- a/arch/sh/boards/mach-edosk7705/Makefile
+++ b/arch/sh/boards/mach-edosk7705/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o 5obj-y := setup.o io.o
6
diff --git a/arch/sh/boards/mach-edosk7705/io.c b/arch/sh/boards/mach-edosk7705/io.c
index 7d153e50a01b..5b9c57c43241 100644
--- a/arch/sh/boards/mach-edosk7705/io.c
+++ b/arch/sh/boards/mach-edosk7705/io.c
@@ -10,28 +10,24 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/io.h> 13#include <linux/io.h>
14#include <mach/edosk7705.h> 14#include <mach/edosk7705.h>
15#include <asm/addrspace.h> 15#include <asm/addrspace.h>
16 16
17#define SMC_IOADDR 0xA2000000 17#define SMC_IOADDR 0xA2000000
18 18
19#define maybebadio(name,port) \
20 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
21 #name, (port), (__u32) __builtin_return_address(0))
22
23/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */ 19/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */
24unsigned long sh_edosk7705_isa_port2addr(unsigned long port) 20static unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
25{ 21{
26 if (port >= 0x300 && port < 0x320) { 22 /*
27 /* SMC91C96 registers are 4 byte aligned rather than the 23 * SMC91C96 registers are 4 byte aligned rather than the
28 * usual 2 byte! 24 * usual 2 byte!
29 */ 25 */
30 return SMC_IOADDR + ( (port - 0x300) * 2); 26 if (port >= 0x300 && port < 0x320)
31 } 27 return SMC_IOADDR + ((port - 0x300) * 2);
32 28
33 maybebadio(sh_edosk7705_isa_port2addr, port); 29 maybebadio(port);
34 return port; 30 return port;
35} 31}
36 32
37/* Trying to read / write bytes on odd-byte boundaries to the Ethernet 33/* Trying to read / write bytes on odd-byte boundaries to the Ethernet
@@ -42,53 +38,34 @@ unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
42 */ 38 */
43unsigned char sh_edosk7705_inb(unsigned long port) 39unsigned char sh_edosk7705_inb(unsigned long port)
44{ 40{
45 if (port >= 0x300 && port < 0x320 && port & 0x01) { 41 if (port >= 0x300 && port < 0x320 && port & 0x01)
46 return (volatile unsigned char)(generic_inw(port -1) >> 8); 42 return __raw_readw(port - 1) >> 8;
47 }
48 return *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port);
49}
50 43
51unsigned int sh_edosk7705_inl(unsigned long port) 44 return __raw_readb(sh_edosk7705_isa_port2addr(port));
52{
53 return *(volatile unsigned long *)port;
54} 45}
55 46
56void sh_edosk7705_outb(unsigned char value, unsigned long port) 47void sh_edosk7705_outb(unsigned char value, unsigned long port)
57{ 48{
58 if (port >= 0x300 && port < 0x320 && port & 0x01) { 49 if (port >= 0x300 && port < 0x320 && port & 0x01) {
59 generic_outw(((unsigned short)value << 8), port -1); 50 __raw_writew(((unsigned short)value << 8), port - 1);
60 return; 51 return;
61 } 52 }
62 *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port) = value;
63}
64 53
65void sh_edosk7705_outl(unsigned int value, unsigned long port) 54 __raw_writeb(value, sh_edosk7705_isa_port2addr(port));
66{
67 *(volatile unsigned long *)port = value;
68} 55}
69 56
70void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count) 57void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count)
71{ 58{
72 unsigned char *p = addr; 59 unsigned char *p = addr;
73 while (count--) *p++ = sh_edosk7705_inb(port);
74}
75 60
76void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count)
77{
78 unsigned long *p = (unsigned long*)addr;
79 while (count--) 61 while (count--)
80 *p++ = *(volatile unsigned long *)port; 62 *p++ = sh_edosk7705_inb(port);
81} 63}
82 64
83void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count) 65void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count)
84{ 66{
85 unsigned char *p = (unsigned char*)addr; 67 unsigned char *p = (unsigned char *)addr;
86 while (count--) sh_edosk7705_outb(*p++, port);
87}
88 68
89void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count) 69 while (count--)
90{ 70 sh_edosk7705_outb(*p++, port);
91 unsigned long *p = (unsigned long*)addr;
92 while (count--) sh_edosk7705_outl(*p++, port);
93} 71}
94
diff --git a/arch/sh/boards/mach-edosk7705/setup.c b/arch/sh/boards/mach-edosk7705/setup.c
index ab3f47bffdf3..d59225e26fb9 100644
--- a/arch/sh/boards/mach-edosk7705/setup.c
+++ b/arch/sh/boards/mach-edosk7705/setup.c
@@ -9,6 +9,7 @@
9 * board by S. Dunn, 2003. 9 * board by S. Dunn, 2003.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/irq.h>
12#include <asm/machvec.h> 13#include <asm/machvec.h>
13#include <mach/edosk7705.h> 14#include <mach/edosk7705.h>
14 15
@@ -26,18 +27,10 @@ static struct sh_machine_vector mv_edosk7705 __initmv = {
26 .mv_nr_irqs = 80, 27 .mv_nr_irqs = 80,
27 28
28 .mv_inb = sh_edosk7705_inb, 29 .mv_inb = sh_edosk7705_inb,
29 .mv_inl = sh_edosk7705_inl,
30 .mv_outb = sh_edosk7705_outb, 30 .mv_outb = sh_edosk7705_outb,
31 .mv_outl = sh_edosk7705_outl,
32
33 .mv_inl_p = sh_edosk7705_inl,
34 .mv_outl_p = sh_edosk7705_outl,
35 31
36 .mv_insb = sh_edosk7705_insb, 32 .mv_insb = sh_edosk7705_insb,
37 .mv_insl = sh_edosk7705_insl,
38 .mv_outsb = sh_edosk7705_outsb, 33 .mv_outsb = sh_edosk7705_outsb,
39 .mv_outsl = sh_edosk7705_outsl,
40 34
41 .mv_isa_port2addr = sh_edosk7705_isa_port2addr,
42 .mv_init_irq = sh_edosk7705_init_irq, 35 .mv_init_irq = sh_edosk7705_init_irq,
43}; 36};
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index 64af1f2eef05..d936c1af7620 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -10,15 +10,91 @@
10#include <linux/suspend.h> 10#include <linux/suspend.h>
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/time.h> 12#include <linux/time.h>
13#include <linux/delay.h>
14#include <linux/gfp.h>
13#include <asm/io.h> 15#include <asm/io.h>
14#include <asm/hd64461.h> 16#include <asm/hd64461.h>
15#include <mach/hp6xx.h> 17#include <mach/hp6xx.h>
16#include <cpu/dac.h> 18#include <cpu/dac.h>
17#include <asm/pm.h> 19#include <asm/freq.h>
20#include <asm/watchdog.h>
21
22#define INTR_OFFSET 0x600
18 23
19#define STBCR 0xffffff82 24#define STBCR 0xffffff82
20#define STBCR2 0xffffff88 25#define STBCR2 0xffffff88
21 26
27#define STBCR_STBY 0x80
28#define STBCR_MSTP2 0x04
29
30#define MCR 0xffffff68
31#define RTCNT 0xffffff70
32
33#define MCR_RMODE 2
34#define MCR_RFSH 4
35
36extern u8 wakeup_start;
37extern u8 wakeup_end;
38
39static void pm_enter(void)
40{
41 u8 stbcr, csr;
42 u16 frqcr, mcr;
43 u32 vbr_new, vbr_old;
44
45 set_bl_bit();
46
47 /* set wdt */
48 csr = sh_wdt_read_csr();
49 csr &= ~WTCSR_TME;
50 csr |= WTCSR_CKS_4096;
51 sh_wdt_write_csr(csr);
52 csr = sh_wdt_read_csr();
53 sh_wdt_write_cnt(0);
54
55 /* disable PLL1 */
56 frqcr = ctrl_inw(FRQCR);
57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
58 ctrl_outw(frqcr, FRQCR);
59
60 /* enable standby */
61 stbcr = ctrl_inb(STBCR);
62 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
63
64 /* set self-refresh */
65 mcr = ctrl_inw(MCR);
66 ctrl_outw(mcr & ~MCR_RFSH, MCR);
67
68 /* set interrupt handler */
69 asm volatile("stc vbr, %0" : "=r" (vbr_old));
70 vbr_new = get_zeroed_page(GFP_ATOMIC);
71 udelay(50);
72 memcpy((void*)(vbr_new + INTR_OFFSET),
73 &wakeup_start, &wakeup_end - &wakeup_start);
74 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
75
76 ctrl_outw(0, RTCNT);
77 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
78
79 cpu_sleep();
80
81 asm volatile("ldc %0, vbr" : : "r" (vbr_old));
82
83 free_page(vbr_new);
84
85 /* enable PLL1 */
86 frqcr = ctrl_inw(FRQCR);
87 frqcr |= FRQCR_PSTBY;
88 ctrl_outw(frqcr, FRQCR);
89 udelay(50);
90 frqcr |= FRQCR_PLLEN;
91 ctrl_outw(frqcr, FRQCR);
92
93 ctrl_outb(stbcr, STBCR);
94
95 clear_bl_bit();
96}
97
22static int hp6x0_pm_enter(suspend_state_t state) 98static int hp6x0_pm_enter(suspend_state_t state)
23{ 99{
24 u8 stbcr, stbcr2; 100 u8 stbcr, stbcr2;
diff --git a/arch/sh/boards/mach-microdev/Makefile b/arch/sh/boards/mach-microdev/Makefile
index 1387dd6c85eb..4e3588e8806b 100644
--- a/arch/sh/boards/mach-microdev/Makefile
+++ b/arch/sh/boards/mach-microdev/Makefile
@@ -2,7 +2,4 @@
2# Makefile for the SuperH MicroDev specific parts of the kernel 2# Makefile for the SuperH MicroDev specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o irq.o io.o 5obj-y := setup.o irq.o io.o fdc37c93xapm.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
8
diff --git a/arch/sh/boards/mach-microdev/fdc37c93xapm.c b/arch/sh/boards/mach-microdev/fdc37c93xapm.c
new file mode 100644
index 000000000000..458a7cf5fb46
--- /dev/null
+++ b/arch/sh/boards/mach-microdev/fdc37c93xapm.c
@@ -0,0 +1,160 @@
1/*
2 *
3 * Setup for the SMSC FDC37C93xAPM
4 *
5 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
6 * Copyright (C) 2003, 2004 SuperH, Inc.
7 * Copyright (C) 2004, 2005 Paul Mundt
8 *
9 * SuperH SH4-202 MicroDev board support.
10 *
11 * May be copied or modified under the terms of the GNU General Public
12 * License. See linux/COPYING for more information.
13 */
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/err.h>
18#include <mach/microdev.h>
19
20#define SMSC_CONFIG_PORT_ADDR (0x3F0)
21#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
22#define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1)
23
24#define SMSC_ENTER_CONFIG_KEY 0x55
25#define SMSC_EXIT_CONFIG_KEY 0xaa
26
27#define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */
28#define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */
29#define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */
30#define SMSC_ACTIVATE_INDEX 0x30 /* Activate */
31#define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */
32#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */
33#define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */
34#define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */
35#define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */
36#define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */
37
38#define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */
39#define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */
40#define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */
41#define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */
42#define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */
43#define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */
44#define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */
45
46#define SMSC_READ_INDEXED(index) ({ \
47 outb((index), SMSC_INDEX_PORT_ADDR); \
48 inb(SMSC_DATA_PORT_ADDR); })
49#define SMSC_WRITE_INDEXED(val, index) ({ \
50 outb((index), SMSC_INDEX_PORT_ADDR); \
51 outb((val), SMSC_DATA_PORT_ADDR); })
52
53#define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */
54#define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */
55#define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */
56#define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */
57
58#define SERIAL1_PRIMARY_BASE 0x03f8
59#define SERIAL2_PRIMARY_BASE 0x02f8
60
61#define MSB(x) ( (x) >> 8 )
62#define LSB(x) ( (x) & 0xff )
63
64 /* General-Purpose base address on CPU-board FPGA */
65#define MICRODEV_FPGA_GP_BASE 0xa6100000ul
66
67static int __init smsc_superio_setup(void)
68{
69
70 unsigned char devid, devrev;
71
72 /* Initially the chip is in run state */
73 /* Put it into configuration state */
74 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
75
76 /* Read device ID info */
77 devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
78 devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
79
80 if ((devid == 0x30) && (devrev == 0x01))
81 printk("SMSC FDC37C93xAPM SuperIO device detected\n");
82 else
83 return -ENODEV;
84
85 /* Select the keyboard device */
86 SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
87 /* enable it */
88 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
89 /* enable the interrupts */
90 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
91 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
92
93 /* Select the Serial #1 device */
94 SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
95 /* enable it */
96 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
97 /* program with port addresses */
98 SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
99 SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
100 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
101 /* enable the interrupts */
102 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
103
104 /* Select the Serial #2 device */
105 SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
106 /* enable it */
107 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
108 /* program with port addresses */
109 SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
110 SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
111 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
112 /* enable the interrupts */
113 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
114
115 /* Select the IDE#1 device */
116 SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
117 /* enable it */
118 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
119 /* program with port addresses */
120 SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
121 SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
122 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
123 SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
124 SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
125 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
126 /* select the interrupt */
127 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
128
129 /* Select the IDE#2 device */
130 SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
131 /* enable it */
132 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
133 /* program with port addresses */
134 SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
135 SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
136 SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
137 SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
138 /* select the interrupt */
139 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
140
141 /* Select the configuration registers */
142 SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
143 /* enable the appropriate GPIO pins for IDE functionality:
144 * bit[0] In/Out 1==input; 0==output
145 * bit[1] Polarity 1==invert; 0==no invert
146 * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable
147 * bit[3:4] Function Select 00==original; 01==Alternate Function #1
148 */
149 SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
150 SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
151 SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
152 SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
153 SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
154
155 /* Exit the configuration state */
156 outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
157
158 return 0;
159}
160device_initcall(smsc_superio_setup);
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index 702753cbd28f..b551963579c1 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -67,27 +67,13 @@ static const struct {
67 67
68static void enable_microdev_irq(unsigned int irq); 68static void enable_microdev_irq(unsigned int irq);
69static void disable_microdev_irq(unsigned int irq); 69static void disable_microdev_irq(unsigned int irq);
70
71 /* shutdown is same as "disable" */
72#define shutdown_microdev_irq disable_microdev_irq
73
74static void mask_and_ack_microdev(unsigned int); 70static void mask_and_ack_microdev(unsigned int);
75static void end_microdev_irq(unsigned int irq);
76
77static unsigned int startup_microdev_irq(unsigned int irq)
78{
79 enable_microdev_irq(irq);
80 return 0; /* never anything pending */
81}
82 71
83static struct hw_interrupt_type microdev_irq_type = { 72static struct irq_chip microdev_irq_type = {
84 .typename = "MicroDev-IRQ", 73 .name = "MicroDev-IRQ",
85 .startup = startup_microdev_irq, 74 .unmask = enable_microdev_irq,
86 .shutdown = shutdown_microdev_irq, 75 .mask = disable_microdev_irq,
87 .enable = enable_microdev_irq,
88 .disable = disable_microdev_irq,
89 .ack = mask_and_ack_microdev, 76 .ack = mask_and_ack_microdev,
90 .end = end_microdev_irq
91}; 77};
92 78
93static void disable_microdev_irq(unsigned int irq) 79static void disable_microdev_irq(unsigned int irq)
@@ -130,11 +116,11 @@ static void enable_microdev_irq(unsigned int irq)
130 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 116 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
131} 117}
132 118
133 /* This functions sets the desired irq handler to be a MicroDev type */ 119/* This function sets the desired irq handler to be a MicroDev type */
134static void __init make_microdev_irq(unsigned int irq) 120static void __init make_microdev_irq(unsigned int irq)
135{ 121{
136 disable_irq_nosync(irq); 122 disable_irq_nosync(irq);
137 irq_desc[irq].chip = &microdev_irq_type; 123 set_irq_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
138 disable_microdev_irq(irq); 124 disable_microdev_irq(irq);
139} 125}
140 126
@@ -143,17 +129,11 @@ static void mask_and_ack_microdev(unsigned int irq)
143 disable_microdev_irq(irq); 129 disable_microdev_irq(irq);
144} 130}
145 131
146static void end_microdev_irq(unsigned int irq)
147{
148 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
149 enable_microdev_irq(irq);
150}
151
152extern void __init init_microdev_irq(void) 132extern void __init init_microdev_irq(void)
153{ 133{
154 int i; 134 int i;
155 135
156 /* disable interrupts on the FPGA INTC register */ 136 /* disable interrupts on the FPGA INTC register */
157 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 137 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
158 138
159 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
@@ -179,5 +159,3 @@ extern void microdev_print_fpga_intc_status(void)
179 printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria); 159 printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria);
180 printk("-------------------------------------------------------------------------------\n"); 160 printk("-------------------------------------------------------------------------------\n");
181} 161}
182
183
diff --git a/arch/sh/boards/mach-microdev/led.c b/arch/sh/boards/mach-microdev/led.c
deleted file mode 100644
index 36e54b47a752..000000000000
--- a/arch/sh/boards/mach-microdev/led.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * linux/arch/sh/boards/superh/microdev/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com)
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 *
10 */
11
12#include <asm/io.h>
13
14#define LED_REGISTER 0xa6104d20
15
16static void mach_led_d9(int value)
17{
18 unsigned long reg;
19 reg = ctrl_inl(LED_REGISTER);
20 reg &= ~1;
21 reg |= (value & 1);
22 ctrl_outl(reg, LED_REGISTER);
23 return;
24}
25
26static void mach_led_d10(int value)
27{
28 unsigned long reg;
29 reg = ctrl_inl(LED_REGISTER);
30 reg &= ~2;
31 reg |= ((value & 1) << 1);
32 ctrl_outl(reg, LED_REGISTER);
33 return;
34}
35
36
37#ifdef CONFIG_HEARTBEAT
38#include <linux/sched.h>
39
40static unsigned char banner_table[] = {
41 0x11, 0x01, 0x11, 0x01, 0x11, 0x03,
42 0x11, 0x01, 0x11, 0x01, 0x13, 0x03,
43 0x11, 0x01, 0x13, 0x01, 0x13, 0x01, 0x11, 0x03,
44 0x11, 0x03,
45 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
46 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x11, 0x07,
47 0x13, 0x01, 0x13, 0x03,
48 0x11, 0x01, 0x11, 0x03,
49 0x13, 0x01, 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
50 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
51 0x13, 0x01, 0x13, 0x01, 0x13, 0x03,
52 0x13, 0x01, 0x11, 0x01, 0x11, 0x03,
53 0x11, 0x03,
54 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x13, 0x07,
55 0xff
56};
57
58static void banner(void)
59{
60 static int pos = 0;
61 static int count = 0;
62
63 if (count) {
64 count--;
65 } else {
66 int val = banner_table[pos];
67 if (val == 0xff) {
68 pos = 0;
69 val = banner_table[pos];
70 }
71 pos++;
72 mach_led_d10((val >> 4) & 1);
73 count = 10 * (val & 0xf);
74 }
75}
76
77/* From heartbeat_harp in the stboards directory */
78/* acts like an actual heart beat -- ie thump-thump-pause... */
79void microdev_heartbeat(void)
80{
81 static unsigned cnt = 0, period = 0, dist = 0;
82
83 if (cnt == 0 || cnt == dist)
84 mach_led_d9(1);
85 else if (cnt == 7 || cnt == dist+7)
86 mach_led_d9(0);
87
88 if (++cnt > period) {
89 cnt = 0;
90 /* The hyperbolic function below modifies the heartbeat period
91 * length in dependency of the current (5min) load. It goes
92 * through the points f(0)=126, f(1)=86, f(5)=51,
93 * f(inf)->30. */
94 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
95 dist = period / 4;
96 }
97
98 banner();
99}
100
101#endif
diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c
index a9202fe3cb59..d1df2a4fb9b8 100644
--- a/arch/sh/boards/mach-microdev/setup.c
+++ b/arch/sh/boards/mach-microdev/setup.c
@@ -17,70 +17,12 @@
17#include <mach/microdev.h> 17#include <mach/microdev.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/machvec.h> 19#include <asm/machvec.h>
20 20#include <asm/sizes.h>
21extern void microdev_heartbeat(void);
22
23
24/****************************************************************************/
25
26
27 /*
28 * Setup for the SMSC FDC37C93xAPM
29 */
30#define SMSC_CONFIG_PORT_ADDR (0x3F0)
31#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
32#define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1)
33
34#define SMSC_ENTER_CONFIG_KEY 0x55
35#define SMSC_EXIT_CONFIG_KEY 0xaa
36
37#define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */
38#define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */
39#define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */
40#define SMSC_ACTIVATE_INDEX 0x30 /* Activate */
41#define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */
42#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */
43#define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */
44#define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */
45#define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */
46#define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */
47
48#define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */
49#define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */
50#define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */
51#define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */
52#define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */
53#define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */
54#define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */
55
56#define SMSC_READ_INDEXED(index) ({ \
57 outb((index), SMSC_INDEX_PORT_ADDR); \
58 inb(SMSC_DATA_PORT_ADDR); })
59#define SMSC_WRITE_INDEXED(val, index) ({ \
60 outb((index), SMSC_INDEX_PORT_ADDR); \
61 outb((val), SMSC_DATA_PORT_ADDR); })
62
63#define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */
64#define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */
65#define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */
66#define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */
67
68#define SERIAL1_PRIMARY_BASE 0x03f8
69#define SERIAL2_PRIMARY_BASE 0x02f8
70
71#define MSB(x) ( (x) >> 8 )
72#define LSB(x) ( (x) & 0xff )
73
74 /* General-Purpose base address on CPU-board FPGA */
75#define MICRODEV_FPGA_GP_BASE 0xa6100000ul
76
77 /* assume a Keyboard Controller is present */
78int microdev_kbd_controller_present = 1;
79 21
80static struct resource smc91x_resources[] = { 22static struct resource smc91x_resources[] = {
81 [0] = { 23 [0] = {
82 .start = 0x300, 24 .start = 0x300,
83 .end = 0x300 + 0x0001000 - 1, 25 .end = 0x300 + SZ_4K - 1,
84 .flags = IORESOURCE_MEM, 26 .flags = IORESOURCE_MEM,
85 }, 27 },
86 [1] = { 28 [1] = {
@@ -97,7 +39,6 @@ static struct platform_device smc91x_device = {
97 .resource = smc91x_resources, 39 .resource = smc91x_resources,
98}; 40};
99 41
100#ifdef CONFIG_FB_S1D13XXX
101static struct s1d13xxxfb_regval s1d13806_initregs[] = { 42static struct s1d13xxxfb_regval s1d13806_initregs[] = {
102 { S1DREG_MISC, 0x00 }, 43 { S1DREG_MISC, 0x00 },
103 { S1DREG_COM_DISP_MODE, 0x00 }, 44 { S1DREG_COM_DISP_MODE, 0x00 },
@@ -216,12 +157,12 @@ static struct s1d13xxxfb_pdata s1d13806_platform_data = {
216static struct resource s1d13806_resources[] = { 157static struct resource s1d13806_resources[] = {
217 [0] = { 158 [0] = {
218 .start = 0x07200000, 159 .start = 0x07200000,
219 .end = 0x07200000 + 0x00200000 - 1, 160 .end = 0x07200000 + SZ_2M - 1,
220 .flags = IORESOURCE_MEM, 161 .flags = IORESOURCE_MEM,
221 }, 162 },
222 [1] = { 163 [1] = {
223 .start = 0x07000000, 164 .start = 0x07000000,
224 .end = 0x07000000 + 0x00200000 - 1, 165 .end = 0x07000000 + SZ_2M - 1,
225 .flags = IORESOURCE_MEM, 166 .flags = IORESOURCE_MEM,
226 }, 167 },
227}; 168};
@@ -236,145 +177,24 @@ static struct platform_device s1d13806_device = {
236 .platform_data = &s1d13806_platform_data, 177 .platform_data = &s1d13806_platform_data,
237 }, 178 },
238}; 179};
239#endif
240 180
241static struct platform_device *microdev_devices[] __initdata = { 181static struct platform_device *microdev_devices[] __initdata = {
242 &smc91x_device, 182 &smc91x_device,
243#ifdef CONFIG_FB_S1D13XXX
244 &s1d13806_device, 183 &s1d13806_device,
245#endif
246}; 184};
247 185
248static int __init microdev_devices_setup(void) 186static int __init microdev_devices_setup(void)
249{ 187{
250 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); 188 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
251} 189}
252 190device_initcall(microdev_devices_setup);
253/*
254 * Setup for the SMSC FDC37C93xAPM
255 */
256static int __init smsc_superio_setup(void)
257{
258
259 unsigned char devid, devrev;
260
261 /* Initially the chip is in run state */
262 /* Put it into configuration state */
263 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
264
265 /* Read device ID info */
266 devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
267 devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
268 if ( (devid==0x30) && (devrev==0x01) )
269 {
270 printk("SMSC FDC37C93xAPM SuperIO device detected\n");
271 }
272 else
273 { /* not the device identity we expected */
274 printk("Not detected a SMSC FDC37C93xAPM SuperIO device (devid=0x%02x, rev=0x%02x)\n",
275 devid, devrev);
276 /* inform the keyboard driver that we have no keyboard controller */
277 microdev_kbd_controller_present = 0;
278 /* little point in doing anything else in this functon */
279 return 0;
280 }
281
282 /* Select the keyboard device */
283 SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
284 /* enable it */
285 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
286 /* enable the interrupts */
287 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
288 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
289
290 /* Select the Serial #1 device */
291 SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
292 /* enable it */
293 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
294 /* program with port addresses */
295 SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
296 SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
297 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
298 /* enable the interrupts */
299 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
300
301 /* Select the Serial #2 device */
302 SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
303 /* enable it */
304 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
305 /* program with port addresses */
306 SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
307 SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
308 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
309 /* enable the interrupts */
310 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
311
312 /* Select the IDE#1 device */
313 SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
314 /* enable it */
315 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
316 /* program with port addresses */
317 SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
318 SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
319 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
320 SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
321 SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
322 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
323 /* select the interrupt */
324 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
325
326 /* Select the IDE#2 device */
327 SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
328 /* enable it */
329 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
330 /* program with port addresses */
331 SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
332 SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
333 SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
334 SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
335 /* select the interrupt */
336 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
337
338 /* Select the configuration registers */
339 SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
340 /* enable the appropriate GPIO pins for IDE functionality:
341 * bit[0] In/Out 1==input; 0==output
342 * bit[1] Polarity 1==invert; 0==no invert
343 * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable
344 * bit[3:4] Function Select 00==original; 01==Alternate Function #1
345 */
346 SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
347 SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
348 SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
349 SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
350 SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
351
352 /* Exit the configuration state */
353 outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
354
355 return 0;
356}
357
358static void __init microdev_setup(char **cmdline_p)
359{
360 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
361 const int fpgaRevision = *fpgaRevisionRegister;
362 int * const CacheControlRegister = (int*)CCR;
363
364 device_initcall(microdev_devices_setup);
365 device_initcall(smsc_superio_setup);
366
367 printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
368 get_system_type(), fpgaRevision, *CacheControlRegister);
369}
370 191
371/* 192/*
372 * The Machine Vector 193 * The Machine Vector
373 */ 194 */
374static struct sh_machine_vector mv_sh4202_microdev __initmv = { 195static struct sh_machine_vector mv_sh4202_microdev __initmv = {
375 .mv_name = "SH4-202 MicroDev", 196 .mv_name = "SH4-202 MicroDev",
376 .mv_setup = microdev_setup, 197 .mv_nr_irqs = 72,
377 .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
378 198
379 .mv_inb = microdev_inb, 199 .mv_inb = microdev_inb,
380 .mv_inw = microdev_inw, 200 .mv_inw = microdev_inw,
@@ -398,8 +218,4 @@ static struct sh_machine_vector mv_sh4202_microdev __initmv = {
398 .mv_outsl = microdev_outsl, 218 .mv_outsl = microdev_outsl,
399 219
400 .mv_init_irq = init_microdev_irq, 220 .mv_init_irq = init_microdev_irq,
401
402#ifdef CONFIG_HEARTBEAT
403 .mv_heartbeat = microdev_heartbeat,
404#endif
405}; 221};
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 975281980299..cc1408119c24 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -89,6 +89,7 @@ static struct resource sh_keysc_resources[] = {
89 89
90static struct platform_device sh_keysc_device = { 90static struct platform_device sh_keysc_device = {
91 .name = "sh_keysc", 91 .name = "sh_keysc",
92 .id = 0, /* "keysc0" clock */
92 .num_resources = ARRAY_SIZE(sh_keysc_resources), 93 .num_resources = ARRAY_SIZE(sh_keysc_resources),
93 .resource = sh_keysc_resources, 94 .resource = sh_keysc_resources,
94 .dev = { 95 .dev = {
@@ -261,6 +262,8 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
261 .sys_bus_cfg = { 262 .sys_bus_cfg = {
262 .ldmt2r = 0x06000a09, 263 .ldmt2r = 0x06000a09,
263 .ldmt3r = 0x180e3418, 264 .ldmt3r = 0x180e3418,
265 /* set 1s delay to encourage fsync() */
266 .deferred_io_msec = 1000,
264 }, 267 },
265 } 268 }
266#endif 269#endif
@@ -273,6 +276,10 @@ static struct resource migor_lcdc_resources[] = {
273 .end = 0xfe941fff, 276 .end = 0xfe941fff,
274 .flags = IORESOURCE_MEM, 277 .flags = IORESOURCE_MEM,
275 }, 278 },
279 [1] = {
280 .start = 28,
281 .flags = IORESOURCE_IRQ,
282 },
276}; 283};
277 284
278static struct platform_device migor_lcdc_device = { 285static struct platform_device migor_lcdc_device = {
@@ -300,6 +307,7 @@ static void camera_power_on(void)
300 gpio_set_value(GPIO_PTT3, 0); 307 gpio_set_value(GPIO_PTT3, 0);
301 mdelay(10); 308 mdelay(10);
302 gpio_set_value(GPIO_PTT3, 1); 309 gpio_set_value(GPIO_PTT3, 1);
310 mdelay(10); /* wait to let chip come out of reset */
303} 311}
304 312
305static void camera_power_off(void) 313static void camera_power_off(void)
@@ -432,6 +440,7 @@ static struct resource migor_ceu_resources[] = {
432 440
433static struct platform_device migor_ceu_device = { 441static struct platform_device migor_ceu_device = {
434 .name = "sh_mobile_ceu", 442 .name = "sh_mobile_ceu",
443 .id = 0, /* "ceu0" clock */
435 .num_resources = ARRAY_SIZE(migor_ceu_resources), 444 .num_resources = ARRAY_SIZE(migor_ceu_resources),
436 .resource = migor_ceu_resources, 445 .resource = migor_ceu_resources,
437 .dev = { 446 .dev = {
@@ -479,7 +488,6 @@ static int __init migor_devices_setup(void)
479 ctrl_outl(0x00110080, BSC_CS4WCR); 488 ctrl_outl(0x00110080, BSC_CS4WCR);
480 489
481 /* KEYSC */ 490 /* KEYSC */
482 clk_always_enable("mstp214"); /* KEYSC */
483 gpio_request(GPIO_FN_KEYOUT0, NULL); 491 gpio_request(GPIO_FN_KEYOUT0, NULL);
484 gpio_request(GPIO_FN_KEYOUT1, NULL); 492 gpio_request(GPIO_FN_KEYOUT1, NULL);
485 gpio_request(GPIO_FN_KEYOUT2, NULL); 493 gpio_request(GPIO_FN_KEYOUT2, NULL);
@@ -501,7 +509,6 @@ static int __init migor_devices_setup(void)
501 gpio_request(GPIO_FN_IRQ6, NULL); 509 gpio_request(GPIO_FN_IRQ6, NULL);
502 510
503 /* LCD Panel */ 511 /* LCD Panel */
504 clk_always_enable("mstp200"); /* LCDC */
505#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */ 512#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
506 gpio_request(GPIO_FN_LCDD17, NULL); 513 gpio_request(GPIO_FN_LCDD17, NULL);
507 gpio_request(GPIO_FN_LCDD16, NULL); 514 gpio_request(GPIO_FN_LCDD16, NULL);
@@ -554,7 +561,6 @@ static int __init migor_devices_setup(void)
554#endif 561#endif
555 562
556 /* CEU */ 563 /* CEU */
557 clk_always_enable("mstp203"); /* CEU */
558 gpio_request(GPIO_FN_VIO_CLK2, NULL); 564 gpio_request(GPIO_FN_VIO_CLK2, NULL);
559 gpio_request(GPIO_FN_VIO_VD2, NULL); 565 gpio_request(GPIO_FN_VIO_VD2, NULL);
560 gpio_request(GPIO_FN_VIO_HD2, NULL); 566 gpio_request(GPIO_FN_VIO_HD2, NULL);
@@ -589,12 +595,3 @@ static int __init migor_devices_setup(void)
589 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 595 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
590} 596}
591__initcall(migor_devices_setup); 597__initcall(migor_devices_setup);
592
593static void __init migor_setup(char **cmdline_p)
594{
595}
596
597static struct sh_machine_vector mv_migor __initmv = {
598 .mv_name = "Migo-R",
599 .mv_setup = migor_setup,
600};
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
new file mode 100644
index 000000000000..bff095dffc02
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -0,0 +1,18 @@
1if SH_RSK
2
3choice
4 prompt "RSK+ options"
5 default SH_RSK7203
6
7config SH_RSK7201
8 bool "RSK7201"
9 depends on CPU_SUBTYPE_SH7201
10
11config SH_RSK7203
12 bool "RSK7203"
13 select GENERIC_GPIO
14 depends on CPU_SUBTYPE_SH7203
15
16endchoice
17
18endif
diff --git a/arch/sh/boards/mach-rsk/Makefile b/arch/sh/boards/mach-rsk/Makefile
new file mode 100644
index 000000000000..498da75ce38b
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o
2obj-$(CONFIG_SH_RSK7203) += devices-rsk7203.o
diff --git a/arch/sh/boards/board-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index 58266f06134a..73f743b9be8d 100644
--- a/arch/sh/boards/board-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -50,73 +50,6 @@ static struct platform_device smc911x_device = {
50 }, 50 },
51}; 51};
52 52
53static const char *probes[] = { "cmdlinepart", NULL };
54
55static struct mtd_partition *parsed_partitions;
56
57static struct mtd_partition rsk7203_partitions[] = {
58 {
59 .name = "Bootloader",
60 .offset = 0x00000000,
61 .size = 0x00040000,
62 .mask_flags = MTD_WRITEABLE,
63 }, {
64 .name = "Kernel",
65 .offset = MTDPART_OFS_NXTBLK,
66 .size = 0x001c0000,
67 }, {
68 .name = "Flash_FS",
69 .offset = MTDPART_OFS_NXTBLK,
70 .size = MTDPART_SIZ_FULL,
71 }
72};
73
74static struct physmap_flash_data flash_data = {
75 .width = 2,
76};
77
78static struct resource flash_resource = {
79 .start = 0x20000000,
80 .end = 0x20400000,
81 .flags = IORESOURCE_MEM,
82};
83
84static struct platform_device flash_device = {
85 .name = "physmap-flash",
86 .id = -1,
87 .resource = &flash_resource,
88 .num_resources = 1,
89 .dev = {
90 .platform_data = &flash_data,
91 },
92};
93
94static struct mtd_info *flash_mtd;
95
96static struct map_info rsk7203_flash_map = {
97 .name = "RSK+ Flash",
98 .size = 0x400000,
99 .bankwidth = 2,
100};
101
102static void __init set_mtd_partitions(void)
103{
104 int nr_parts = 0;
105
106 simple_map_init(&rsk7203_flash_map);
107 flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map);
108 nr_parts = parse_mtd_partitions(flash_mtd, probes,
109 &parsed_partitions, 0);
110 /* If there is no partition table, used the hard coded table */
111 if (nr_parts <= 0) {
112 flash_data.parts = rsk7203_partitions;
113 flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions);
114 } else {
115 flash_data.nr_parts = nr_parts;
116 flash_data.parts = parsed_partitions;
117 }
118}
119
120static struct gpio_led rsk7203_gpio_leds[] = { 53static struct gpio_led rsk7203_gpio_leds[] = {
121 { 54 {
122 .name = "green", 55 .name = "green",
@@ -155,7 +88,6 @@ static struct platform_device led_device = {
155 88
156static struct platform_device *rsk7203_devices[] __initdata = { 89static struct platform_device *rsk7203_devices[] __initdata = {
157 &smc911x_device, 90 &smc911x_device,
158 &flash_device,
159 &led_device, 91 &led_device,
160}; 92};
161 93
@@ -165,15 +97,7 @@ static int __init rsk7203_devices_setup(void)
165 gpio_request(GPIO_FN_TXD0, NULL); 97 gpio_request(GPIO_FN_TXD0, NULL);
166 gpio_request(GPIO_FN_RXD0, NULL); 98 gpio_request(GPIO_FN_RXD0, NULL);
167 99
168 set_mtd_partitions();
169 return platform_add_devices(rsk7203_devices, 100 return platform_add_devices(rsk7203_devices,
170 ARRAY_SIZE(rsk7203_devices)); 101 ARRAY_SIZE(rsk7203_devices));
171} 102}
172device_initcall(rsk7203_devices_setup); 103device_initcall(rsk7203_devices_setup);
173
174/*
175 * The Machine Vector
176 */
177static struct sh_machine_vector mv_rsk7203 __initmv = {
178 .mv_name = "RSK+7203",
179};
diff --git a/arch/sh/boards/mach-rsk/setup.c b/arch/sh/boards/mach-rsk/setup.c
new file mode 100644
index 000000000000..af64d030a5c7
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/setup.c
@@ -0,0 +1,106 @@
1/*
2 * Renesas Technology Europe RSK+ Support.
3 *
4 * Copyright (C) 2008 Paul Mundt
5 * Copyright (C) 2008 Peter Griffin <pgriffin@mpc-data.co.uk>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/types.h>
13#include <linux/platform_device.h>
14#include <linux/interrupt.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/partitions.h>
17#include <linux/mtd/physmap.h>
18#include <linux/mtd/map.h>
19#include <asm/machvec.h>
20#include <asm/io.h>
21
22static const char *probes[] = { "cmdlinepart", NULL };
23
24static struct mtd_partition *parsed_partitions;
25
26static struct mtd_partition rsk_partitions[] = {
27 {
28 .name = "Bootloader",
29 .offset = 0x00000000,
30 .size = 0x00040000,
31 .mask_flags = MTD_WRITEABLE,
32 }, {
33 .name = "Kernel",
34 .offset = MTDPART_OFS_NXTBLK,
35 .size = 0x001c0000,
36 }, {
37 .name = "Flash_FS",
38 .offset = MTDPART_OFS_NXTBLK,
39 .size = MTDPART_SIZ_FULL,
40 }
41};
42
43static struct physmap_flash_data flash_data = {
44 .width = 2,
45};
46
47static struct resource flash_resource = {
48 .start = 0x20000000,
49 .end = 0x20400000,
50 .flags = IORESOURCE_MEM,
51};
52
53static struct platform_device flash_device = {
54 .name = "physmap-flash",
55 .id = -1,
56 .resource = &flash_resource,
57 .num_resources = 1,
58 .dev = {
59 .platform_data = &flash_data,
60 },
61};
62
63static struct mtd_info *flash_mtd;
64
65static struct map_info rsk_flash_map = {
66 .name = "RSK+ Flash",
67 .size = 0x400000,
68 .bankwidth = 2,
69};
70
71static void __init set_mtd_partitions(void)
72{
73 int nr_parts = 0;
74
75 simple_map_init(&rsk_flash_map);
76 flash_mtd = do_map_probe("cfi_probe", &rsk_flash_map);
77 nr_parts = parse_mtd_partitions(flash_mtd, probes,
78 &parsed_partitions, 0);
79 /* If there is no partition table, used the hard coded table */
80 if (nr_parts <= 0) {
81 flash_data.parts = rsk_partitions;
82 flash_data.nr_parts = ARRAY_SIZE(rsk_partitions);
83 } else {
84 flash_data.nr_parts = nr_parts;
85 flash_data.parts = parsed_partitions;
86 }
87}
88
89static struct platform_device *rsk_devices[] __initdata = {
90 &flash_device,
91};
92
93static int __init rsk_devices_setup(void)
94{
95 set_mtd_partitions();
96 return platform_add_devices(rsk_devices,
97 ARRAY_SIZE(rsk_devices));
98}
99device_initcall(rsk_devices_setup);
100
101/*
102 * The Machine Vector
103 */
104static struct sh_machine_vector mv_rsk __initmv = {
105 .mv_name = "RSK+",
106};
diff --git a/arch/sh/boards/mach-se/7343/Makefile b/arch/sh/boards/mach-se/7343/Makefile
index 3024796c6203..4c3666a93790 100644
--- a/arch/sh/boards/mach-se/7343/Makefile
+++ b/arch/sh/boards/mach-se/7343/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the 7343 SolutionEngine specific parts of the kernel 2# Makefile for the 7343 SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7343/io.c b/arch/sh/boards/mach-se/7343/io.c
deleted file mode 100644
index 8741abc1da7b..000000000000
--- a/arch/sh/boards/mach-se/7343/io.c
+++ /dev/null
@@ -1,273 +0,0 @@
1/*
2 * arch/sh/boards/se/7343/io.c
3 *
4 * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
5 *
6 */
7#include <linux/kernel.h>
8#include <asm/io.h>
9#include <mach-se/mach/se7343.h>
10
11#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
12
13struct iop {
14 unsigned long start, end;
15 unsigned long base;
16 struct iop *(*check) (struct iop * p, unsigned long port);
17 unsigned char (*inb) (struct iop * p, unsigned long port);
18 unsigned short (*inw) (struct iop * p, unsigned long port);
19 void (*outb) (struct iop * p, unsigned char value, unsigned long port);
20 void (*outw) (struct iop * p, unsigned short value, unsigned long port);
21};
22
23struct iop *
24simple_check(struct iop *p, unsigned long port)
25{
26 static int count;
27
28 if (count < 100)
29 count++;
30
31 port &= 0xFFFF;
32
33 if ((p->start <= port) && (port <= p->end))
34 return p;
35 else
36 badio(check, port);
37}
38
39struct iop *
40ide_check(struct iop *p, unsigned long port)
41{
42 if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
43 return p;
44 return NULL;
45}
46
47unsigned char
48simple_inb(struct iop *p, unsigned long port)
49{
50 return *(unsigned char *) (p->base + port);
51}
52
53unsigned short
54simple_inw(struct iop *p, unsigned long port)
55{
56 return *(unsigned short *) (p->base + port);
57}
58
59void
60simple_outb(struct iop *p, unsigned char value, unsigned long port)
61{
62 *(unsigned char *) (p->base + port) = value;
63}
64
65void
66simple_outw(struct iop *p, unsigned short value, unsigned long port)
67{
68 *(unsigned short *) (p->base + port) = value;
69}
70
71unsigned char
72pcc_inb(struct iop *p, unsigned long port)
73{
74 unsigned long addr = p->base + port + 0x40000;
75 unsigned long v;
76
77 if (port & 1)
78 addr += 0x00400000;
79 v = *(volatile unsigned char *) addr;
80 return v;
81}
82
83void
84pcc_outb(struct iop *p, unsigned char value, unsigned long port)
85{
86 unsigned long addr = p->base + port + 0x40000;
87
88 if (port & 1)
89 addr += 0x00400000;
90 *(volatile unsigned char *) addr = value;
91}
92
93unsigned char
94bad_inb(struct iop *p, unsigned long port)
95{
96 badio(inb, port);
97}
98
99void
100bad_outb(struct iop *p, unsigned char value, unsigned long port)
101{
102 badio(inw, port);
103}
104
105#ifdef CONFIG_SMC91X
106/* MSTLANEX01 LAN at 0xb400:0000 */
107static struct iop laniop = {
108 .start = 0x00,
109 .end = 0x0F,
110 .base = 0x04000000,
111 .check = simple_check,
112 .inb = simple_inb,
113 .inw = simple_inw,
114 .outb = simple_outb,
115 .outw = simple_outw,
116};
117#endif
118
119#ifdef CONFIG_NE2000
120/* NE2000 pc card NIC */
121static struct iop neiop = {
122 .start = 0x280,
123 .end = 0x29f,
124 .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
125 .check = simple_check,
126 .inb = pcc_inb,
127 .inw = simple_inw,
128 .outb = pcc_outb,
129 .outw = simple_outw,
130};
131#endif
132
133#ifdef CONFIG_IDE
134/* CF in CF slot */
135static struct iop cfiop = {
136 .base = 0xb0600000,
137 .check = ide_check,
138 .inb = pcc_inb,
139 .inw = simple_inw,
140 .outb = pcc_outb,
141 .outw = simple_outw,
142};
143#endif
144
145static __inline__ struct iop *
146port2iop(unsigned long port)
147{
148 if (0) ;
149#if defined(CONFIG_SMC91X)
150 else if (laniop.check(&laniop, port))
151 return &laniop;
152#endif
153#if defined(CONFIG_NE2000)
154 else if (neiop.check(&neiop, port))
155 return &neiop;
156#endif
157#if defined(CONFIG_IDE)
158 else if (cfiop.check(&cfiop, port))
159 return &cfiop;
160#endif
161 else
162 return NULL;
163}
164
165static inline void
166delay(void)
167{
168 ctrl_inw(0xac000000);
169 ctrl_inw(0xac000000);
170}
171
172unsigned char
173sh7343se_inb(unsigned long port)
174{
175 struct iop *p = port2iop(port);
176 return (p->inb) (p, port);
177}
178
179unsigned char
180sh7343se_inb_p(unsigned long port)
181{
182 unsigned char v = sh7343se_inb(port);
183 delay();
184 return v;
185}
186
187unsigned short
188sh7343se_inw(unsigned long port)
189{
190 struct iop *p = port2iop(port);
191 return (p->inw) (p, port);
192}
193
194unsigned int
195sh7343se_inl(unsigned long port)
196{
197 badio(inl, port);
198}
199
200void
201sh7343se_outb(unsigned char value, unsigned long port)
202{
203 struct iop *p = port2iop(port);
204 (p->outb) (p, value, port);
205}
206
207void
208sh7343se_outb_p(unsigned char value, unsigned long port)
209{
210 sh7343se_outb(value, port);
211 delay();
212}
213
214void
215sh7343se_outw(unsigned short value, unsigned long port)
216{
217 struct iop *p = port2iop(port);
218 (p->outw) (p, value, port);
219}
220
221void
222sh7343se_outl(unsigned int value, unsigned long port)
223{
224 badio(outl, port);
225}
226
227void
228sh7343se_insb(unsigned long port, void *addr, unsigned long count)
229{
230 unsigned char *a = addr;
231 struct iop *p = port2iop(port);
232 while (count--)
233 *a++ = (p->inb) (p, port);
234}
235
236void
237sh7343se_insw(unsigned long port, void *addr, unsigned long count)
238{
239 unsigned short *a = addr;
240 struct iop *p = port2iop(port);
241 while (count--)
242 *a++ = (p->inw) (p, port);
243}
244
245void
246sh7343se_insl(unsigned long port, void *addr, unsigned long count)
247{
248 badio(insl, port);
249}
250
251void
252sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
253{
254 unsigned char *a = (unsigned char *) addr;
255 struct iop *p = port2iop(port);
256 while (count--)
257 (p->outb) (p, *a++, port);
258}
259
260void
261sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
262{
263 unsigned short *a = (unsigned short *) addr;
264 struct iop *p = port2iop(port);
265 while (count--)
266 (p->outw) (p, *a++, port);
267}
268
269void
270sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
271{
272 badio(outsw, port);
273}
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 486f40bf9274..4de56f35f419 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -1,36 +1,16 @@
1#include <linux/init.h> 1#include <linux/init.h>
2#include <linux/platform_device.h> 2#include <linux/platform_device.h>
3#include <linux/mtd/physmap.h> 3#include <linux/mtd/physmap.h>
4#include <linux/serial_8250.h>
5#include <linux/serial_reg.h>
6#include <linux/usb/isp116x.h>
7#include <linux/delay.h>
4#include <asm/machvec.h> 8#include <asm/machvec.h>
5#include <mach-se/mach/se7343.h> 9#include <mach-se/mach/se7343.h>
6#include <asm/heartbeat.h> 10#include <asm/heartbeat.h>
7#include <asm/irq.h> 11#include <asm/irq.h>
8#include <asm/io.h> 12#include <asm/io.h>
9 13
10static struct resource smc91x_resources[] = {
11 [0] = {
12 .start = 0x10000000,
13 .end = 0x1000000F,
14 .flags = IORESOURCE_MEM,
15 },
16 [1] = {
17 /*
18 * shared with other devices via externel
19 * interrupt controller in FPGA...
20 */
21 .start = SMC_IRQ,
22 .end = SMC_IRQ,
23 .flags = IORESOURCE_IRQ,
24 },
25};
26
27static struct platform_device smc91x_device = {
28 .name = "smc91x",
29 .id = 0,
30 .num_resources = ARRAY_SIZE(smc91x_resources),
31 .resource = smc91x_resources,
32};
33
34static struct resource heartbeat_resources[] = { 14static struct resource heartbeat_resources[] = {
35 [0] = { 15 [0] = {
36 .start = PA_LED, 16 .start = PA_LED,
@@ -94,10 +74,83 @@ static struct platform_device nor_flash_device = {
94 .resource = nor_flash_resources, 74 .resource = nor_flash_resources,
95}; 75};
96 76
77#define ST16C2550C_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP)
78
79static struct plat_serial8250_port serial_platform_data[] = {
80 [0] = {
81 .iotype = UPIO_MEM,
82 .mapbase = 0x16000000,
83 .regshift = 1,
84 .flags = ST16C2550C_FLAGS,
85 .irq = UARTA_IRQ,
86 .uartclk = 7372800,
87 },
88 [1] = {
89 .iotype = UPIO_MEM,
90 .mapbase = 0x17000000,
91 .regshift = 1,
92 .flags = ST16C2550C_FLAGS,
93 .irq = UARTB_IRQ,
94 .uartclk = 7372800,
95 },
96 { },
97};
98
99static struct platform_device uart_device = {
100 .name = "serial8250",
101 .id = PLAT8250_DEV_PLATFORM,
102 .dev = {
103 .platform_data = serial_platform_data,
104 },
105};
106
107static void isp116x_delay(struct device *dev, int delay)
108{
109 ndelay(delay);
110}
111
112static struct resource usb_resources[] = {
113 [0] = {
114 .start = 0x11800000,
115 .end = 0x11800001,
116 .flags = IORESOURCE_MEM,
117 },
118 [1] = {
119 .start = 0x11800002,
120 .end = 0x11800003,
121 .flags = IORESOURCE_MEM,
122 },
123 [2] = {
124 .start = USB_IRQ,
125 .flags = IORESOURCE_IRQ,
126 },
127};
128
129static struct isp116x_platform_data usb_platform_data = {
130 .sel15Kres = 1,
131 .oc_enable = 1,
132 .int_act_high = 0,
133 .int_edge_triggered = 0,
134 .remote_wakeup_enable = 0,
135 .delay = isp116x_delay,
136};
137
138static struct platform_device usb_device = {
139 .name = "isp116x-hcd",
140 .id = -1,
141 .num_resources = ARRAY_SIZE(usb_resources),
142 .resource = usb_resources,
143 .dev = {
144 .platform_data = &usb_platform_data,
145 },
146
147};
148
97static struct platform_device *sh7343se_platform_devices[] __initdata = { 149static struct platform_device *sh7343se_platform_devices[] __initdata = {
98 &smc91x_device,
99 &heartbeat_device, 150 &heartbeat_device,
100 &nor_flash_device, 151 &nor_flash_device,
152 &uart_device,
153 &usb_device,
101}; 154};
102 155
103static int __init sh7343se_devices_setup(void) 156static int __init sh7343se_devices_setup(void)
@@ -126,27 +179,6 @@ static void __init sh7343se_setup(char **cmdline_p)
126static struct sh_machine_vector mv_7343se __initmv = { 179static struct sh_machine_vector mv_7343se __initmv = {
127 .mv_name = "SolutionEngine 7343", 180 .mv_name = "SolutionEngine 7343",
128 .mv_setup = sh7343se_setup, 181 .mv_setup = sh7343se_setup,
129 .mv_nr_irqs = 108, 182 .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
130 .mv_inb = sh7343se_inb,
131 .mv_inw = sh7343se_inw,
132 .mv_inl = sh7343se_inl,
133 .mv_outb = sh7343se_outb,
134 .mv_outw = sh7343se_outw,
135 .mv_outl = sh7343se_outl,
136
137 .mv_inb_p = sh7343se_inb_p,
138 .mv_inw_p = sh7343se_inw,
139 .mv_inl_p = sh7343se_inl,
140 .mv_outb_p = sh7343se_outb_p,
141 .mv_outw_p = sh7343se_outw,
142 .mv_outl_p = sh7343se_outl,
143
144 .mv_insb = sh7343se_insb,
145 .mv_insw = sh7343se_insw,
146 .mv_insl = sh7343se_insl,
147 .mv_outsb = sh7343se_outsb,
148 .mv_outsw = sh7343se_outsw,
149 .mv_outsl = sh7343se_outsl,
150
151 .mv_init_irq = init_7343se_IRQ, 183 .mv_init_irq = init_7343se_IRQ,
152}; 184};
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 9123d9687bf7..527eb6b12610 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -8,8 +8,9 @@
8 */ 8 */
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <asm/machvec.h>
12#include <mach-se/mach/se.h> 11#include <mach-se/mach/se.h>
12#include <mach-se/mach/mrshpc.h>
13#include <asm/machvec.h>
13#include <asm/io.h> 14#include <asm/io.h>
14#include <asm/smc37c93x.h> 15#include <asm/smc37c93x.h>
15#include <asm/heartbeat.h> 16#include <asm/heartbeat.h>
@@ -175,6 +176,7 @@ static struct platform_device *se_devices[] __initdata = {
175 176
176static int __init se_devices_setup(void) 177static int __init se_devices_setup(void)
177{ 178{
179 mrshpc_setup_windows();
178 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); 180 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
179} 181}
180device_initcall(se_devices_setup); 182device_initcall(se_devices_setup);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index d3fc80ff4d83..55af4c36b43a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -12,8 +12,9 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <asm/machvec.h>
16#include <mach-se/mach/se7721.h> 15#include <mach-se/mach/se7721.h>
16#include <mach-se/mach/mrshpc.h>
17#include <asm/machvec.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <asm/heartbeat.h> 19#include <asm/heartbeat.h>
19 20
@@ -74,8 +75,8 @@ static struct platform_device *se7721_devices[] __initdata = {
74 75
75static int __init se7721_devices_setup(void) 76static int __init se7721_devices_setup(void)
76{ 77{
77 return platform_add_devices(se7721_devices, 78 mrshpc_setup_windows();
78 ARRAY_SIZE(se7721_devices)); 79 return platform_add_devices(se7721_devices, ARRAY_SIZE(se7721_devices));
79} 80}
80device_initcall(se7721_devices_setup); 81device_initcall(se7721_devices_setup);
81 82
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index fe6f96517e12..af84904ed86f 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -15,9 +15,10 @@
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/smc91x.h> 17#include <linux/smc91x.h>
18#include <mach-se/mach/se7722.h>
19#include <mach-se/mach/mrshpc.h>
18#include <asm/machvec.h> 20#include <asm/machvec.h>
19#include <asm/clock.h> 21#include <asm/clock.h>
20#include <mach-se/mach/se7722.h>
21#include <asm/io.h> 22#include <asm/io.h>
22#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
23#include <asm/sh_keysc.h> 24#include <asm/sh_keysc.h>
@@ -130,6 +131,7 @@ static struct resource sh_keysc_resources[] = {
130 131
131static struct platform_device sh_keysc_device = { 132static struct platform_device sh_keysc_device = {
132 .name = "sh_keysc", 133 .name = "sh_keysc",
134 .id = 0, /* "keysc0" clock */
133 .num_resources = ARRAY_SIZE(sh_keysc_resources), 135 .num_resources = ARRAY_SIZE(sh_keysc_resources),
134 .resource = sh_keysc_resources, 136 .resource = sh_keysc_resources,
135 .dev = { 137 .dev = {
@@ -146,10 +148,8 @@ static struct platform_device *se7722_devices[] __initdata = {
146 148
147static int __init se7722_devices_setup(void) 149static int __init se7722_devices_setup(void)
148{ 150{
149 clk_always_enable("mstp214"); /* KEYSC */ 151 mrshpc_setup_windows();
150 152 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
151 return platform_add_devices(se7722_devices,
152 ARRAY_SIZE(se7722_devices));
153} 153}
154device_initcall(se7722_devices_setup); 154device_initcall(se7722_devices_setup);
155 155
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 5771219be3fd..74cfb4b8b03d 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -9,6 +9,7 @@
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/ata_platform.h>
12#include <asm/io.h> 13#include <asm/io.h>
13#include <asm/rtc.h> 14#include <asm/rtc.h>
14#include <mach-sh03/mach/io.h> 15#include <mach-sh03/mach/io.h>
@@ -20,19 +21,6 @@ static void __init init_sh03_IRQ(void)
20 plat_irq_setup_pins(IRQ_MODE_IRQ); 21 plat_irq_setup_pins(IRQ_MODE_IRQ);
21} 22}
22 23
23extern void *cf_io_base;
24
25static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
26{
27 if (PXSEG(port))
28 return (void __iomem *)port;
29 /* CompactFlash (IDE) */
30 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
31 return (void __iomem *)((unsigned long)cf_io_base + port);
32
33 return (void __iomem *)(port + PCI_IO_BASE);
34}
35
36/* arch/sh/boards/sh03/rtc.c */ 24/* arch/sh/boards/sh03/rtc.c */
37void sh03_time_init(void); 25void sh03_time_init(void);
38 26
@@ -41,6 +29,30 @@ static void __init sh03_setup(char **cmdline_p)
41 board_time_init = sh03_time_init; 29 board_time_init = sh03_time_init;
42} 30}
43 31
32static struct resource cf_ide_resources[] = {
33 [0] = {
34 .start = 0x1f0,
35 .end = 0x1f0 + 8,
36 .flags = IORESOURCE_IO,
37 },
38 [1] = {
39 .start = 0x1f0 + 0x206,
40 .end = 0x1f0 +8 + 0x206 + 8,
41 .flags = IORESOURCE_IO,
42 },
43 [2] = {
44 .start = IRL2_IRQ,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct platform_device cf_ide_device = {
50 .name = "pata_platform",
51 .id = -1,
52 .num_resources = ARRAY_SIZE(cf_ide_resources),
53 .resource = cf_ide_resources,
54};
55
44static struct resource heartbeat_resources[] = { 56static struct resource heartbeat_resources[] = {
45 [0] = { 57 [0] = {
46 .start = 0xa0800000, 58 .start = 0xa0800000,
@@ -58,10 +70,30 @@ static struct platform_device heartbeat_device = {
58 70
59static struct platform_device *sh03_devices[] __initdata = { 71static struct platform_device *sh03_devices[] __initdata = {
60 &heartbeat_device, 72 &heartbeat_device,
73 &cf_ide_device,
61}; 74};
62 75
63static int __init sh03_devices_setup(void) 76static int __init sh03_devices_setup(void)
64{ 77{
78 pgprot_t prot;
79 unsigned long paddrbase;
80 void *cf_ide_base;
81
82 /* open I/O area window */
83 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
85 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
86 if (!cf_ide_base) {
87 printk("allocate_cf_area : can't open CF I/O window!\n");
88 return -ENOMEM;
89 }
90
91 /* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */
92 cf_ide_resources[0].start += (unsigned long)cf_ide_base;
93 cf_ide_resources[0].end += (unsigned long)cf_ide_base;
94 cf_ide_resources[1].start += (unsigned long)cf_ide_base;
95 cf_ide_resources[1].end += (unsigned long)cf_ide_base;
96
65 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices)); 97 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
66} 98}
67__initcall(sh03_devices_setup); 99__initcall(sh03_devices_setup);
@@ -70,6 +102,5 @@ static struct sh_machine_vector mv_sh03 __initmv = {
70 .mv_name = "Interface (CTP/PCI-SH03)", 102 .mv_name = "Interface (CTP/PCI-SH03)",
71 .mv_setup = sh03_setup, 103 .mv_setup = sh03_setup,
72 .mv_nr_irqs = 48, 104 .mv_nr_irqs = 48,
73 .mv_ioport_map = sh03_ioport_map,
74 .mv_init_irq = init_sh03_IRQ, 105 .mv_init_irq = init_sh03_IRQ,
75}; 106};
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 538406872a89..986a0e71d220 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -12,8 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h>
15 16
16#include <asm/io.h>
17#include <mach/systemh7751.h> 17#include <mach/systemh7751.h>
18#include <asm/smc37c93x.h> 18#include <asm/smc37c93x.h>
19 19
@@ -24,35 +24,17 @@ static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; 24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
25 25
26/* forward declaration */ 26/* forward declaration */
27static unsigned int startup_systemh_irq(unsigned int irq);
28static void shutdown_systemh_irq(unsigned int irq);
29static void enable_systemh_irq(unsigned int irq); 27static void enable_systemh_irq(unsigned int irq);
30static void disable_systemh_irq(unsigned int irq); 28static void disable_systemh_irq(unsigned int irq);
31static void mask_and_ack_systemh(unsigned int); 29static void mask_and_ack_systemh(unsigned int);
32static void end_systemh_irq(unsigned int irq);
33 30
34/* hw_interrupt_type */ 31static struct irq_chip systemh_irq_type = {
35static struct hw_interrupt_type systemh_irq_type = { 32 .name = " SystemH Register",
36 .typename = " SystemH Register", 33 .unmask = enable_systemh_irq,
37 .startup = startup_systemh_irq, 34 .mask = disable_systemh_irq,
38 .shutdown = shutdown_systemh_irq,
39 .enable = enable_systemh_irq,
40 .disable = disable_systemh_irq,
41 .ack = mask_and_ack_systemh, 35 .ack = mask_and_ack_systemh,
42 .end = end_systemh_irq
43}; 36};
44 37
45static unsigned int startup_systemh_irq(unsigned int irq)
46{
47 enable_systemh_irq(irq);
48 return 0; /* never anything pending */
49}
50
51static void shutdown_systemh_irq(unsigned int irq)
52{
53 disable_systemh_irq(irq);
54}
55
56static void disable_systemh_irq(unsigned int irq) 38static void disable_systemh_irq(unsigned int irq)
57{ 39{
58 if (systemh_irq_mask_register) { 40 if (systemh_irq_mask_register) {
@@ -86,16 +68,9 @@ static void mask_and_ack_systemh(unsigned int irq)
86 disable_systemh_irq(irq); 68 disable_systemh_irq(irq);
87} 69}
88 70
89static void end_systemh_irq(unsigned int irq)
90{
91 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
92 enable_systemh_irq(irq);
93}
94
95void make_systemh_irq(unsigned int irq) 71void make_systemh_irq(unsigned int irq)
96{ 72{
97 disable_irq_nosync(irq); 73 disable_irq_nosync(irq);
98 irq_desc[irq].chip = &systemh_irq_type; 74 set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
99 disable_systemh_irq(irq); 75 disable_systemh_irq(irq);
100} 76}
101
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index f1a4a0763c59..27ceeb948bb1 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -10,99 +10,49 @@
10#include <linux/interrupt.h> 10#include <linux/interrupt.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <asm/io.h> 13#include <linux/io.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <asm/hd64461.h> 15#include <asm/hd64461.h>
16 16
17/* This belongs in cpu specific */ 17/* This belongs in cpu specific */
18#define INTC_ICR1 0xA4140010UL 18#define INTC_ICR1 0xA4140010UL
19 19
20static void disable_hd64461_irq(unsigned int irq) 20static void hd64461_mask_irq(unsigned int irq)
21{ 21{
22 unsigned short nimr; 22 unsigned short nimr;
23 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 23 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
24 24
25 nimr = inw(HD64461_NIMR); 25 nimr = __raw_readw(HD64461_NIMR);
26 nimr |= mask; 26 nimr |= mask;
27 outw(nimr, HD64461_NIMR); 27 __raw_writew(nimr, HD64461_NIMR);
28} 28}
29 29
30static void enable_hd64461_irq(unsigned int irq) 30static void hd64461_unmask_irq(unsigned int irq)
31{ 31{
32 unsigned short nimr; 32 unsigned short nimr;
33 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 33 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
34 34
35 nimr = inw(HD64461_NIMR); 35 nimr = __raw_readw(HD64461_NIMR);
36 nimr &= ~mask; 36 nimr &= ~mask;
37 outw(nimr, HD64461_NIMR); 37 __raw_writew(nimr, HD64461_NIMR);
38} 38}
39 39
40static void mask_and_ack_hd64461(unsigned int irq) 40static void hd64461_mask_and_ack_irq(unsigned int irq)
41{ 41{
42 disable_hd64461_irq(irq); 42 hd64461_mask_irq(irq);
43#ifdef CONFIG_HD64461_ENABLER 43#ifdef CONFIG_HD64461_ENABLER
44 if (irq == HD64461_IRQBASE + 13) 44 if (irq == HD64461_IRQBASE + 13)
45 outb(0x00, HD64461_PCC1CSCR); 45 __raw_writeb(0x00, HD64461_PCC1CSCR);
46#endif 46#endif
47} 47}
48 48
49static void end_hd64461_irq(unsigned int irq) 49static struct irq_chip hd64461_irq_chip = {
50{ 50 .name = "HD64461-IRQ",
51 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 51 .mask = hd64461_mask_irq,
52 enable_hd64461_irq(irq); 52 .mask_ack = hd64461_mask_and_ack_irq,
53} 53 .unmask = hd64461_unmask_irq,
54
55static unsigned int startup_hd64461_irq(unsigned int irq)
56{
57 enable_hd64461_irq(irq);
58 return 0;
59}
60
61static void shutdown_hd64461_irq(unsigned int irq)
62{
63 disable_hd64461_irq(irq);
64}
65
66static struct hw_interrupt_type hd64461_irq_type = {
67 .typename = "HD64461-IRQ",
68 .startup = startup_hd64461_irq,
69 .shutdown = shutdown_hd64461_irq,
70 .enable = enable_hd64461_irq,
71 .disable = disable_hd64461_irq,
72 .ack = mask_and_ack_hd64461,
73 .end = end_hd64461_irq,
74}; 54};
75 55
76static irqreturn_t hd64461_interrupt(int irq, void *dev_id)
77{
78 printk(KERN_INFO
79 "HD64461: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
80 inw(HD64461_NIRR), inw(HD64461_NIMR));
81
82 return IRQ_NONE;
83}
84
85static struct {
86 int (*func) (int, void *);
87 void *dev;
88} hd64461_demux[HD64461_IRQ_NUM];
89
90void hd64461_register_irq_demux(int irq,
91 int (*demux) (int irq, void *dev), void *dev)
92{
93 hd64461_demux[irq - HD64461_IRQBASE].func = demux;
94 hd64461_demux[irq - HD64461_IRQBASE].dev = dev;
95}
96
97EXPORT_SYMBOL(hd64461_register_irq_demux);
98
99void hd64461_unregister_irq_demux(int irq)
100{
101 hd64461_demux[irq - HD64461_IRQBASE].func = 0;
102}
103
104EXPORT_SYMBOL(hd64461_unregister_irq_demux);
105
106int hd64461_irq_demux(int irq) 56int hd64461_irq_demux(int irq)
107{ 57{
108 if (irq == CONFIG_HD64461_IRQ) { 58 if (irq == CONFIG_HD64461_IRQ) {
@@ -115,25 +65,11 @@ int hd64461_irq_demux(int irq)
115 for (bit = 1, i = 0; i < 16; bit <<= 1, i++) 65 for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
116 if (nirr & bit) 66 if (nirr & bit)
117 break; 67 break;
118 if (i == 16) 68 irq = HD64461_IRQBASE + i;
119 irq = CONFIG_HD64461_IRQ;
120 else {
121 irq = HD64461_IRQBASE + i;
122 if (hd64461_demux[i].func != 0) {
123 irq = hd64461_demux[i].func(irq, hd64461_demux[i].dev);
124 }
125 }
126 } 69 }
127 return irq; 70 return irq;
128} 71}
129 72
130static struct irqaction irq0 = {
131 .handler = hd64461_interrupt,
132 .flags = IRQF_DISABLED,
133 .mask = CPU_MASK_NONE,
134 .name = "HD64461",
135};
136
137int __init setup_hd64461(void) 73int __init setup_hd64461(void)
138{ 74{
139 int i; 75 int i;
@@ -146,22 +82,21 @@ int __init setup_hd64461(void)
146 CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE, 82 CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
147 HD64461_IRQBASE + 15); 83 HD64461_IRQBASE + 15);
148 84
149#if defined(CONFIG_CPU_SUBTYPE_SH7709) /* Should be at processor specific part.. */ 85/* Should be at processor specific part.. */
150 outw(0x2240, INTC_ICR1); 86#if defined(CONFIG_CPU_SUBTYPE_SH7709)
87 __raw_writew(0x2240, INTC_ICR1);
151#endif 88#endif
152 outw(0xffff, HD64461_NIMR); 89 __raw_writew(0xffff, HD64461_NIMR);
153 90
154 /* IRQ 80 -> 95 belongs to HD64461 */ 91 /* IRQ 80 -> 95 belongs to HD64461 */
155 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { 92 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
156 irq_desc[i].chip = &hd64461_irq_type; 93 set_irq_chip_and_handler(i, &hd64461_irq_chip,
157 } 94 handle_level_irq);
158
159 setup_irq(CONFIG_HD64461_IRQ, &irq0);
160 95
161#ifdef CONFIG_HD64461_ENABLER 96#ifdef CONFIG_HD64461_ENABLER
162 printk(KERN_INFO "HD64461: enabling PCMCIA devices\n"); 97 printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
163 outb(0x4c, HD64461_PCC1CSCIER); 98 __raw_writeb(0x4c, HD64461_PCC1CSCIER);
164 outb(0x00, HD64461_PCC1CSCR); 99 __raw_writeb(0x00, HD64461_PCC1CSCR);
165#endif 100#endif
166 101
167 return 0; 102 return 0;
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig
new file mode 100644
index 000000000000..8f4329fbbd39
--- /dev/null
+++ b/arch/sh/configs/edosk7705_defconfig
@@ -0,0 +1,438 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc6
4# Wed Dec 17 13:53:02 2008
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
9CONFIG_RWSEM_GENERIC_SPINLOCK=y
10CONFIG_GENERIC_FIND_NEXT_BIT=y
11CONFIG_GENERIC_HWEIGHT=y
12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
14CONFIG_GENERIC_IRQ_PROBE=y
15# CONFIG_GENERIC_GPIO is not set
16CONFIG_GENERIC_TIME=y
17CONFIG_GENERIC_CLOCKEVENTS=y
18# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
19# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
20CONFIG_STACKTRACE_SUPPORT=y
21CONFIG_LOCKDEP_SUPPORT=y
22CONFIG_HAVE_LATENCYTOP_SUPPORT=y
23# CONFIG_ARCH_HAS_ILOG2_U32 is not set
24# CONFIG_ARCH_HAS_ILOG2_U64 is not set
25CONFIG_ARCH_NO_VIRT_TO_BUS=y
26CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
27
28#
29# General setup
30#
31# CONFIG_EXPERIMENTAL is not set
32CONFIG_BROKEN_ON_SMP=y
33CONFIG_INIT_ENV_ARG_LIMIT=32
34CONFIG_LOCALVERSION=""
35# CONFIG_LOCALVERSION_AUTO is not set
36# CONFIG_SYSVIPC is not set
37# CONFIG_BSD_PROCESS_ACCT is not set
38# CONFIG_IKCONFIG is not set
39CONFIG_LOG_BUF_SHIFT=17
40# CONFIG_CGROUPS is not set
41# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set
43# CONFIG_BLK_DEV_INITRD is not set
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_EMBEDDED=y
46# CONFIG_UID16 is not set
47# CONFIG_SYSCTL_SYSCALL is not set
48# CONFIG_KALLSYMS is not set
49# CONFIG_HOTPLUG is not set
50# CONFIG_PRINTK is not set
51# CONFIG_BUG is not set
52# CONFIG_ELF_CORE is not set
53# CONFIG_COMPAT_BRK is not set
54# CONFIG_BASE_FULL is not set
55# CONFIG_FUTEX is not set
56# CONFIG_EPOLL is not set
57# CONFIG_SIGNALFD is not set
58# CONFIG_TIMERFD is not set
59# CONFIG_EVENTFD is not set
60CONFIG_SHMEM=y
61# CONFIG_AIO is not set
62# CONFIG_VM_EVENT_COUNTERS is not set
63# CONFIG_SLAB is not set
64CONFIG_SLUB=y
65# CONFIG_SLOB is not set
66# CONFIG_PROFILING is not set
67# CONFIG_MARKERS is not set
68CONFIG_HAVE_OPROFILE=y
69CONFIG_HAVE_IOREMAP_PROT=y
70CONFIG_HAVE_KPROBES=y
71CONFIG_HAVE_KRETPROBES=y
72CONFIG_HAVE_ARCH_TRACEHOOK=y
73CONFIG_HAVE_CLK=y
74CONFIG_HAVE_GENERIC_DMA_COHERENT=y
75# CONFIG_TINY_SHMEM is not set
76CONFIG_BASE_SMALL=1
77# CONFIG_MODULES is not set
78# CONFIG_BLOCK is not set
79CONFIG_CLASSIC_RCU=y
80# CONFIG_FREEZER is not set
81
82#
83# System type
84#
85CONFIG_CPU_SH3=y
86# CONFIG_CPU_SUBTYPE_SH7619 is not set
87# CONFIG_CPU_SUBTYPE_SH7201 is not set
88# CONFIG_CPU_SUBTYPE_SH7203 is not set
89# CONFIG_CPU_SUBTYPE_SH7206 is not set
90# CONFIG_CPU_SUBTYPE_SH7263 is not set
91# CONFIG_CPU_SUBTYPE_MXG is not set
92CONFIG_CPU_SUBTYPE_SH7705=y
93# CONFIG_CPU_SUBTYPE_SH7706 is not set
94# CONFIG_CPU_SUBTYPE_SH7707 is not set
95# CONFIG_CPU_SUBTYPE_SH7708 is not set
96# CONFIG_CPU_SUBTYPE_SH7709 is not set
97# CONFIG_CPU_SUBTYPE_SH7710 is not set
98# CONFIG_CPU_SUBTYPE_SH7712 is not set
99# CONFIG_CPU_SUBTYPE_SH7720 is not set
100# CONFIG_CPU_SUBTYPE_SH7721 is not set
101# CONFIG_CPU_SUBTYPE_SH7750 is not set
102# CONFIG_CPU_SUBTYPE_SH7091 is not set
103# CONFIG_CPU_SUBTYPE_SH7750R is not set
104# CONFIG_CPU_SUBTYPE_SH7750S is not set
105# CONFIG_CPU_SUBTYPE_SH7751 is not set
106# CONFIG_CPU_SUBTYPE_SH7751R is not set
107# CONFIG_CPU_SUBTYPE_SH7760 is not set
108# CONFIG_CPU_SUBTYPE_SH4_202 is not set
109# CONFIG_CPU_SUBTYPE_SH7723 is not set
110# CONFIG_CPU_SUBTYPE_SH7763 is not set
111# CONFIG_CPU_SUBTYPE_SH7770 is not set
112# CONFIG_CPU_SUBTYPE_SH7780 is not set
113# CONFIG_CPU_SUBTYPE_SH7785 is not set
114# CONFIG_CPU_SUBTYPE_SHX3 is not set
115# CONFIG_CPU_SUBTYPE_SH7343 is not set
116# CONFIG_CPU_SUBTYPE_SH7722 is not set
117# CONFIG_CPU_SUBTYPE_SH7366 is not set
118# CONFIG_CPU_SUBTYPE_SH5_101 is not set
119# CONFIG_CPU_SUBTYPE_SH5_103 is not set
120
121#
122# Memory management options
123#
124CONFIG_QUICKLIST=y
125CONFIG_MMU=y
126CONFIG_PAGE_OFFSET=0x80000000
127CONFIG_MEMORY_START=0x08000000
128CONFIG_MEMORY_SIZE=0x04000000
129CONFIG_29BIT=y
130CONFIG_VSYSCALL=y
131CONFIG_ARCH_FLATMEM_ENABLE=y
132CONFIG_ARCH_SPARSEMEM_ENABLE=y
133CONFIG_ARCH_SPARSEMEM_DEFAULT=y
134CONFIG_MAX_ACTIVE_REGIONS=1
135CONFIG_ARCH_POPULATES_NODE_MAP=y
136CONFIG_ARCH_SELECT_MEMORY_MODEL=y
137CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
138CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
139CONFIG_PAGE_SIZE_4KB=y
140# CONFIG_PAGE_SIZE_8KB is not set
141# CONFIG_PAGE_SIZE_16KB is not set
142# CONFIG_PAGE_SIZE_64KB is not set
143CONFIG_ENTRY_OFFSET=0x00001000
144CONFIG_SELECT_MEMORY_MODEL=y
145# CONFIG_FLATMEM_MANUAL is not set
146# CONFIG_DISCONTIGMEM_MANUAL is not set
147CONFIG_SPARSEMEM_MANUAL=y
148CONFIG_SPARSEMEM=y
149CONFIG_HAVE_MEMORY_PRESENT=y
150CONFIG_SPARSEMEM_STATIC=y
151CONFIG_PAGEFLAGS_EXTENDED=y
152CONFIG_SPLIT_PTLOCK_CPUS=4
153CONFIG_MIGRATION=y
154# CONFIG_RESOURCES_64BIT is not set
155# CONFIG_PHYS_ADDR_T_64BIT is not set
156CONFIG_ZONE_DMA_FLAG=0
157CONFIG_NR_QUICK=2
158CONFIG_UNEVICTABLE_LRU=y
159
160#
161# Cache configuration
162#
163CONFIG_SH7705_CACHE_32KB=y
164# CONFIG_SH_DIRECT_MAPPED is not set
165CONFIG_CACHE_WRITEBACK=y
166# CONFIG_CACHE_WRITETHROUGH is not set
167# CONFIG_CACHE_OFF is not set
168
169#
170# Processor features
171#
172CONFIG_CPU_LITTLE_ENDIAN=y
173# CONFIG_CPU_BIG_ENDIAN is not set
174CONFIG_SH_ADC=y
175CONFIG_CPU_HAS_INTEVT=y
176CONFIG_CPU_HAS_SR_RB=y
177
178#
179# Board support
180#
181# CONFIG_SH_SOLUTION_ENGINE is not set
182CONFIG_SH_EDOSK7705=y
183
184#
185# Timer and clock configuration
186#
187CONFIG_SH_TMU=y
188CONFIG_SH_TIMER_IRQ=16
189CONFIG_SH_PCLK_FREQ=31250000
190# CONFIG_NO_HZ is not set
191# CONFIG_HIGH_RES_TIMERS is not set
192CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
193
194#
195# CPU Frequency scaling
196#
197# CONFIG_CPU_FREQ is not set
198
199#
200# DMA support
201#
202# CONFIG_SH_DMA is not set
203
204#
205# Companion Chips
206#
207
208#
209# Additional SuperH Device Drivers
210#
211# CONFIG_HEARTBEAT is not set
212# CONFIG_PUSH_SWITCH is not set
213
214#
215# Kernel features
216#
217# CONFIG_HZ_100 is not set
218CONFIG_HZ_250=y
219# CONFIG_HZ_300 is not set
220# CONFIG_HZ_1000 is not set
221CONFIG_HZ=250
222# CONFIG_SCHED_HRTICK is not set
223CONFIG_PREEMPT_NONE=y
224# CONFIG_PREEMPT_VOLUNTARY is not set
225# CONFIG_PREEMPT is not set
226CONFIG_GUSA=y
227# CONFIG_GUSA_RB is not set
228
229#
230# Boot options
231#
232CONFIG_ZERO_PAGE_OFFSET=0x00001000
233CONFIG_BOOT_LINK_OFFSET=0x00800000
234# CONFIG_CMDLINE_BOOL is not set
235
236#
237# Bus options
238#
239# CONFIG_ARCH_SUPPORTS_MSI is not set
240
241#
242# Executable file formats
243#
244CONFIG_BINFMT_ELF=y
245# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
246# CONFIG_HAVE_AOUT is not set
247# CONFIG_BINFMT_MISC is not set
248# CONFIG_NET is not set
249
250#
251# Device Drivers
252#
253
254#
255# Generic Driver Options
256#
257CONFIG_STANDALONE=y
258# CONFIG_PREVENT_FIRMWARE_BUILD is not set
259# CONFIG_SYS_HYPERVISOR is not set
260# CONFIG_MTD is not set
261# CONFIG_PARPORT is not set
262# CONFIG_MISC_DEVICES is not set
263CONFIG_HAVE_IDE=y
264
265#
266# SCSI device support
267#
268# CONFIG_SCSI_DMA is not set
269# CONFIG_SCSI_NETLINK is not set
270# CONFIG_PHONE is not set
271
272#
273# Input device support
274#
275# CONFIG_INPUT is not set
276
277#
278# Hardware I/O ports
279#
280# CONFIG_SERIO is not set
281# CONFIG_GAMEPORT is not set
282
283#
284# Character devices
285#
286# CONFIG_VT is not set
287# CONFIG_DEVKMEM is not set
288# CONFIG_SERIAL_NONSTANDARD is not set
289
290#
291# Serial drivers
292#
293# CONFIG_SERIAL_8250 is not set
294
295#
296# Non-8250 serial port support
297#
298# CONFIG_SERIAL_SH_SCI is not set
299# CONFIG_UNIX98_PTYS is not set
300# CONFIG_LEGACY_PTYS is not set
301# CONFIG_IPMI_HANDLER is not set
302# CONFIG_HW_RANDOM is not set
303# CONFIG_R3964 is not set
304# CONFIG_I2C is not set
305# CONFIG_SPI is not set
306# CONFIG_W1 is not set
307# CONFIG_POWER_SUPPLY is not set
308# CONFIG_HWMON is not set
309# CONFIG_THERMAL is not set
310# CONFIG_THERMAL_HWMON is not set
311# CONFIG_WATCHDOG is not set
312CONFIG_SSB_POSSIBLE=y
313
314#
315# Sonics Silicon Backplane
316#
317# CONFIG_SSB is not set
318
319#
320# Multifunction device drivers
321#
322# CONFIG_MFD_CORE is not set
323# CONFIG_MFD_SM501 is not set
324# CONFIG_HTC_PASIC3 is not set
325# CONFIG_MFD_TMIO is not set
326# CONFIG_REGULATOR is not set
327
328#
329# Multimedia devices
330#
331
332#
333# Multimedia core support
334#
335# CONFIG_VIDEO_DEV is not set
336# CONFIG_VIDEO_MEDIA is not set
337
338#
339# Multimedia drivers
340#
341# CONFIG_DAB is not set
342
343#
344# Graphics support
345#
346# CONFIG_VGASTATE is not set
347# CONFIG_VIDEO_OUTPUT_CONTROL is not set
348# CONFIG_FB is not set
349# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
350
351#
352# Display device support
353#
354# CONFIG_DISPLAY_SUPPORT is not set
355# CONFIG_SOUND is not set
356# CONFIG_USB_SUPPORT is not set
357# CONFIG_MMC is not set
358# CONFIG_MEMSTICK is not set
359# CONFIG_NEW_LEDS is not set
360# CONFIG_ACCESSIBILITY is not set
361# CONFIG_RTC_CLASS is not set
362# CONFIG_DMADEVICES is not set
363# CONFIG_UIO is not set
364# CONFIG_STAGING is not set
365CONFIG_STAGING_EXCLUDE_BUILD=y
366
367#
368# File systems
369#
370# CONFIG_DNOTIFY is not set
371# CONFIG_INOTIFY is not set
372# CONFIG_QUOTA is not set
373# CONFIG_AUTOFS_FS is not set
374# CONFIG_AUTOFS4_FS is not set
375# CONFIG_FUSE_FS is not set
376
377#
378# Pseudo filesystems
379#
380# CONFIG_PROC_FS is not set
381# CONFIG_SYSFS is not set
382# CONFIG_TMPFS is not set
383# CONFIG_HUGETLBFS is not set
384# CONFIG_HUGETLB_PAGE is not set
385
386#
387# Miscellaneous filesystems
388#
389# CONFIG_NLS is not set
390
391#
392# Kernel hacking
393#
394CONFIG_TRACE_IRQFLAGS_SUPPORT=y
395# CONFIG_ENABLE_WARN_DEPRECATED is not set
396# CONFIG_ENABLE_MUST_CHECK is not set
397CONFIG_FRAME_WARN=1024
398# CONFIG_MAGIC_SYSRQ is not set
399# CONFIG_UNUSED_SYMBOLS is not set
400# CONFIG_HEADERS_CHECK is not set
401# CONFIG_DEBUG_KERNEL is not set
402# CONFIG_DEBUG_MEMORY_INIT is not set
403# CONFIG_RCU_CPU_STALL_DETECTOR is not set
404# CONFIG_LATENCYTOP is not set
405CONFIG_HAVE_FUNCTION_TRACER=y
406CONFIG_HAVE_DYNAMIC_FTRACE=y
407CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
408
409#
410# Tracers
411#
412# CONFIG_SAMPLES is not set
413CONFIG_HAVE_ARCH_KGDB=y
414# CONFIG_SH_STANDARD_BIOS is not set
415# CONFIG_EARLY_SCIF_CONSOLE is not set
416# CONFIG_MORE_COMPILE_OPTIONS is not set
417
418#
419# Security options
420#
421# CONFIG_KEYS is not set
422# CONFIG_SECURITYFS is not set
423# CONFIG_SECURITY_FILE_CAPABILITIES is not set
424# CONFIG_CRYPTO is not set
425
426#
427# Library routines
428#
429# CONFIG_CRC_CCITT is not set
430# CONFIG_CRC16 is not set
431# CONFIG_CRC_T10DIF is not set
432# CONFIG_CRC_ITU_T is not set
433# CONFIG_CRC32 is not set
434# CONFIG_CRC7 is not set
435# CONFIG_LIBCRC32C is not set
436CONFIG_HAS_IOMEM=y
437CONFIG_HAS_IOPORT=y
438CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig
new file mode 100644
index 000000000000..014c18cbf46a
--- /dev/null
+++ b/arch/sh/configs/rsk7201_defconfig
@@ -0,0 +1,703 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc6
4# Mon Dec 8 14:48:02 2008
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
9CONFIG_RWSEM_GENERIC_SPINLOCK=y
10CONFIG_GENERIC_BUG=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_IRQ_PROBE=y
16# CONFIG_GENERIC_GPIO is not set
17# CONFIG_GENERIC_TIME is not set
18# CONFIG_GENERIC_CLOCKEVENTS is not set
19# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
20# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
21CONFIG_STACKTRACE_SUPPORT=y
22CONFIG_LOCKDEP_SUPPORT=y
23CONFIG_HAVE_LATENCYTOP_SUPPORT=y
24# CONFIG_ARCH_HAS_ILOG2_U32 is not set
25# CONFIG_ARCH_HAS_ILOG2_U64 is not set
26CONFIG_ARCH_NO_VIRT_TO_BUS=y
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36# CONFIG_LOCALVERSION_AUTO is not set
37CONFIG_SYSVIPC=y
38CONFIG_SYSVIPC_SYSCTL=y
39CONFIG_BSD_PROCESS_ACCT=y
40# CONFIG_BSD_PROCESS_ACCT_V3 is not set
41CONFIG_IKCONFIG=y
42# CONFIG_IKCONFIG_PROC is not set
43CONFIG_LOG_BUF_SHIFT=14
44# CONFIG_CGROUPS is not set
45# CONFIG_GROUP_SCHED is not set
46# CONFIG_SYSFS_DEPRECATED_V2 is not set
47# CONFIG_RELAY is not set
48CONFIG_NAMESPACES=y
49CONFIG_UTS_NS=y
50CONFIG_IPC_NS=y
51CONFIG_USER_NS=y
52CONFIG_PID_NS=y
53CONFIG_BLK_DEV_INITRD=y
54CONFIG_INITRAMFS_SOURCE=""
55CONFIG_CC_OPTIMIZE_FOR_SIZE=y
56CONFIG_SYSCTL=y
57CONFIG_EMBEDDED=y
58CONFIG_UID16=y
59CONFIG_SYSCTL_SYSCALL=y
60CONFIG_KALLSYMS=y
61# CONFIG_KALLSYMS_EXTRA_PASS is not set
62CONFIG_HOTPLUG=y
63CONFIG_PRINTK=y
64CONFIG_BUG=y
65CONFIG_ELF_CORE=y
66CONFIG_COMPAT_BRK=y
67CONFIG_BASE_FULL=y
68CONFIG_FUTEX=y
69CONFIG_ANON_INODES=y
70CONFIG_EPOLL=y
71CONFIG_SIGNALFD=y
72CONFIG_TIMERFD=y
73CONFIG_EVENTFD=y
74# CONFIG_AIO is not set
75CONFIG_VM_EVENT_COUNTERS=y
76# CONFIG_SLAB is not set
77# CONFIG_SLUB is not set
78CONFIG_SLOB=y
79CONFIG_PROFILING=y
80# CONFIG_MARKERS is not set
81CONFIG_OPROFILE=y
82CONFIG_HAVE_OPROFILE=y
83# CONFIG_KPROBES is not set
84CONFIG_HAVE_KPROBES=y
85CONFIG_HAVE_KRETPROBES=y
86CONFIG_HAVE_ARCH_TRACEHOOK=y
87CONFIG_HAVE_CLK=y
88CONFIG_HAVE_GENERIC_DMA_COHERENT=y
89CONFIG_RT_MUTEXES=y
90CONFIG_TINY_SHMEM=y
91CONFIG_BASE_SMALL=0
92CONFIG_MODULES=y
93# CONFIG_MODULE_FORCE_LOAD is not set
94# CONFIG_MODULE_UNLOAD is not set
95# CONFIG_MODVERSIONS is not set
96# CONFIG_MODULE_SRCVERSION_ALL is not set
97CONFIG_KMOD=y
98CONFIG_BLOCK=y
99# CONFIG_LBD is not set
100# CONFIG_BLK_DEV_IO_TRACE is not set
101# CONFIG_LSF is not set
102# CONFIG_BLK_DEV_BSG is not set
103# CONFIG_BLK_DEV_INTEGRITY is not set
104
105#
106# IO Schedulers
107#
108CONFIG_IOSCHED_NOOP=y
109# CONFIG_IOSCHED_AS is not set
110# CONFIG_IOSCHED_DEADLINE is not set
111# CONFIG_IOSCHED_CFQ is not set
112# CONFIG_DEFAULT_AS is not set
113# CONFIG_DEFAULT_DEADLINE is not set
114# CONFIG_DEFAULT_CFQ is not set
115CONFIG_DEFAULT_NOOP=y
116CONFIG_DEFAULT_IOSCHED="noop"
117CONFIG_CLASSIC_RCU=y
118# CONFIG_FREEZER is not set
119
120#
121# System type
122#
123CONFIG_CPU_SH2=y
124CONFIG_CPU_SH2A=y
125# CONFIG_CPU_SUBTYPE_SH7619 is not set
126CONFIG_CPU_SUBTYPE_SH7201=y
127# CONFIG_CPU_SUBTYPE_SH7203 is not set
128# CONFIG_CPU_SUBTYPE_SH7206 is not set
129# CONFIG_CPU_SUBTYPE_SH7263 is not set
130# CONFIG_CPU_SUBTYPE_MXG is not set
131# CONFIG_CPU_SUBTYPE_SH7705 is not set
132# CONFIG_CPU_SUBTYPE_SH7706 is not set
133# CONFIG_CPU_SUBTYPE_SH7707 is not set
134# CONFIG_CPU_SUBTYPE_SH7708 is not set
135# CONFIG_CPU_SUBTYPE_SH7709 is not set
136# CONFIG_CPU_SUBTYPE_SH7710 is not set
137# CONFIG_CPU_SUBTYPE_SH7712 is not set
138# CONFIG_CPU_SUBTYPE_SH7720 is not set
139# CONFIG_CPU_SUBTYPE_SH7721 is not set
140# CONFIG_CPU_SUBTYPE_SH7750 is not set
141# CONFIG_CPU_SUBTYPE_SH7091 is not set
142# CONFIG_CPU_SUBTYPE_SH7750R is not set
143# CONFIG_CPU_SUBTYPE_SH7750S is not set
144# CONFIG_CPU_SUBTYPE_SH7751 is not set
145# CONFIG_CPU_SUBTYPE_SH7751R is not set
146# CONFIG_CPU_SUBTYPE_SH7760 is not set
147# CONFIG_CPU_SUBTYPE_SH4_202 is not set
148# CONFIG_CPU_SUBTYPE_SH7723 is not set
149# CONFIG_CPU_SUBTYPE_SH7763 is not set
150# CONFIG_CPU_SUBTYPE_SH7770 is not set
151# CONFIG_CPU_SUBTYPE_SH7780 is not set
152# CONFIG_CPU_SUBTYPE_SH7785 is not set
153# CONFIG_CPU_SUBTYPE_SHX3 is not set
154# CONFIG_CPU_SUBTYPE_SH7343 is not set
155# CONFIG_CPU_SUBTYPE_SH7722 is not set
156# CONFIG_CPU_SUBTYPE_SH7366 is not set
157# CONFIG_CPU_SUBTYPE_SH5_101 is not set
158# CONFIG_CPU_SUBTYPE_SH5_103 is not set
159
160#
161# Memory management options
162#
163CONFIG_QUICKLIST=y
164CONFIG_PAGE_OFFSET=0x00000000
165CONFIG_MEMORY_START=0x08000000
166CONFIG_MEMORY_SIZE=0x01000000
167CONFIG_29BIT=y
168CONFIG_ARCH_FLATMEM_ENABLE=y
169CONFIG_ARCH_SPARSEMEM_ENABLE=y
170CONFIG_ARCH_SPARSEMEM_DEFAULT=y
171CONFIG_MAX_ACTIVE_REGIONS=1
172CONFIG_ARCH_POPULATES_NODE_MAP=y
173CONFIG_ARCH_SELECT_MEMORY_MODEL=y
174CONFIG_PAGE_SIZE_4KB=y
175# CONFIG_PAGE_SIZE_8KB is not set
176# CONFIG_PAGE_SIZE_16KB is not set
177# CONFIG_PAGE_SIZE_64KB is not set
178CONFIG_ENTRY_OFFSET=0x00001000
179CONFIG_SELECT_MEMORY_MODEL=y
180CONFIG_FLATMEM_MANUAL=y
181# CONFIG_DISCONTIGMEM_MANUAL is not set
182# CONFIG_SPARSEMEM_MANUAL is not set
183CONFIG_FLATMEM=y
184CONFIG_FLAT_NODE_MEM_MAP=y
185CONFIG_SPARSEMEM_STATIC=y
186CONFIG_PAGEFLAGS_EXTENDED=y
187CONFIG_SPLIT_PTLOCK_CPUS=4
188# CONFIG_RESOURCES_64BIT is not set
189# CONFIG_PHYS_ADDR_T_64BIT is not set
190CONFIG_ZONE_DMA_FLAG=0
191CONFIG_NR_QUICK=2
192
193#
194# Cache configuration
195#
196# CONFIG_SH_DIRECT_MAPPED is not set
197CONFIG_CACHE_WRITEBACK=y
198# CONFIG_CACHE_WRITETHROUGH is not set
199# CONFIG_CACHE_OFF is not set
200
201#
202# Processor features
203#
204# CONFIG_CPU_LITTLE_ENDIAN is not set
205CONFIG_CPU_BIG_ENDIAN=y
206CONFIG_SH_FPU=y
207CONFIG_CPU_HAS_FPU=y
208
209#
210# Board support
211#
212CONFIG_SH_RSK=y
213CONFIG_SH_RSK7201=y
214# CONFIG_SH_RSK7203 is not set
215
216#
217# Timer and clock configuration
218#
219# CONFIG_SH_CMT is not set
220CONFIG_SH_MTU2=y
221CONFIG_SH_TIMER_IRQ=16
222CONFIG_SH_PCLK_FREQ=40000000
223CONFIG_SH_CLK_MD=0
224
225#
226# CPU Frequency scaling
227#
228# CONFIG_CPU_FREQ is not set
229
230#
231# DMA support
232#
233
234#
235# Companion Chips
236#
237
238#
239# Additional SuperH Device Drivers
240#
241# CONFIG_HEARTBEAT is not set
242# CONFIG_PUSH_SWITCH is not set
243
244#
245# Kernel features
246#
247# CONFIG_HZ_100 is not set
248# CONFIG_HZ_250 is not set
249# CONFIG_HZ_300 is not set
250CONFIG_HZ_1000=y
251CONFIG_HZ=1000
252# CONFIG_SCHED_HRTICK is not set
253# CONFIG_KEXEC is not set
254# CONFIG_CRASH_DUMP is not set
255# CONFIG_SECCOMP is not set
256CONFIG_PREEMPT_NONE=y
257# CONFIG_PREEMPT_VOLUNTARY is not set
258# CONFIG_PREEMPT is not set
259CONFIG_GUSA=y
260
261#
262# Boot options
263#
264CONFIG_ZERO_PAGE_OFFSET=0x00001000
265CONFIG_BOOT_LINK_OFFSET=0x00800000
266CONFIG_CMDLINE_BOOL=y
267CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ignore_loglevel"
268
269#
270# Bus options
271#
272# CONFIG_ARCH_SUPPORTS_MSI is not set
273# CONFIG_PCCARD is not set
274
275#
276# Executable file formats
277#
278CONFIG_BINFMT_ELF_FDPIC=y
279CONFIG_BINFMT_FLAT=y
280CONFIG_BINFMT_ZFLAT=y
281CONFIG_BINFMT_SHARED_FLAT=y
282# CONFIG_HAVE_AOUT is not set
283# CONFIG_BINFMT_MISC is not set
284
285#
286# Power management options (EXPERIMENTAL)
287#
288CONFIG_PM=y
289# CONFIG_PM_DEBUG is not set
290CONFIG_CPU_IDLE=y
291CONFIG_CPU_IDLE_GOV_LADDER=y
292# CONFIG_NET is not set
293
294#
295# Device Drivers
296#
297
298#
299# Generic Driver Options
300#
301CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
302# CONFIG_STANDALONE is not set
303# CONFIG_PREVENT_FIRMWARE_BUILD is not set
304# CONFIG_FW_LOADER is not set
305# CONFIG_SYS_HYPERVISOR is not set
306CONFIG_MTD=y
307# CONFIG_MTD_DEBUG is not set
308CONFIG_MTD_CONCAT=y
309CONFIG_MTD_PARTITIONS=y
310CONFIG_MTD_REDBOOT_PARTS=y
311CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
312# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
313# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
314# CONFIG_MTD_CMDLINE_PARTS is not set
315# CONFIG_MTD_AR7_PARTS is not set
316
317#
318# User Modules And Translation Layers
319#
320CONFIG_MTD_CHAR=y
321CONFIG_MTD_BLKDEVS=y
322CONFIG_MTD_BLOCK=y
323# CONFIG_FTL is not set
324# CONFIG_NFTL is not set
325# CONFIG_INFTL is not set
326# CONFIG_RFD_FTL is not set
327# CONFIG_SSFDC is not set
328# CONFIG_MTD_OOPS is not set
329
330#
331# RAM/ROM/Flash chip drivers
332#
333CONFIG_MTD_CFI=y
334# CONFIG_MTD_JEDECPROBE is not set
335CONFIG_MTD_GEN_PROBE=y
336# CONFIG_MTD_CFI_ADV_OPTIONS is not set
337CONFIG_MTD_MAP_BANK_WIDTH_1=y
338CONFIG_MTD_MAP_BANK_WIDTH_2=y
339CONFIG_MTD_MAP_BANK_WIDTH_4=y
340# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
341# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
342# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
343CONFIG_MTD_CFI_I1=y
344CONFIG_MTD_CFI_I2=y
345# CONFIG_MTD_CFI_I4 is not set
346# CONFIG_MTD_CFI_I8 is not set
347# CONFIG_MTD_CFI_INTELEXT is not set
348CONFIG_MTD_CFI_AMDSTD=y
349# CONFIG_MTD_CFI_STAA is not set
350CONFIG_MTD_CFI_UTIL=y
351# CONFIG_MTD_RAM is not set
352# CONFIG_MTD_ROM is not set
353# CONFIG_MTD_ABSENT is not set
354
355#
356# Mapping drivers for chip access
357#
358# CONFIG_MTD_COMPLEX_MAPPINGS is not set
359CONFIG_MTD_PHYSMAP=y
360CONFIG_MTD_PHYSMAP_START=0x0
361CONFIG_MTD_PHYSMAP_LEN=0x0
362CONFIG_MTD_PHYSMAP_BANKWIDTH=4
363# CONFIG_MTD_PLATRAM is not set
364
365#
366# Self-contained MTD device drivers
367#
368# CONFIG_MTD_SLRAM is not set
369# CONFIG_MTD_PHRAM is not set
370# CONFIG_MTD_MTDRAM is not set
371# CONFIG_MTD_BLOCK2MTD is not set
372
373#
374# Disk-On-Chip Device Drivers
375#
376# CONFIG_MTD_DOC2000 is not set
377# CONFIG_MTD_DOC2001 is not set
378# CONFIG_MTD_DOC2001PLUS is not set
379# CONFIG_MTD_NAND is not set
380# CONFIG_MTD_ONENAND is not set
381
382#
383# UBI - Unsorted block images
384#
385# CONFIG_MTD_UBI is not set
386# CONFIG_PARPORT is not set
387CONFIG_BLK_DEV=y
388# CONFIG_BLK_DEV_COW_COMMON is not set
389# CONFIG_BLK_DEV_LOOP is not set
390# CONFIG_BLK_DEV_RAM is not set
391# CONFIG_CDROM_PKTCDVD is not set
392# CONFIG_BLK_DEV_HD is not set
393CONFIG_MISC_DEVICES=y
394# CONFIG_EEPROM_93CX6 is not set
395# CONFIG_ENCLOSURE_SERVICES is not set
396# CONFIG_C2PORT is not set
397CONFIG_HAVE_IDE=y
398# CONFIG_IDE is not set
399
400#
401# SCSI device support
402#
403# CONFIG_RAID_ATTRS is not set
404# CONFIG_SCSI is not set
405# CONFIG_SCSI_DMA is not set
406# CONFIG_SCSI_NETLINK is not set
407# CONFIG_ATA is not set
408# CONFIG_MD is not set
409# CONFIG_PHONE is not set
410
411#
412# Input device support
413#
414CONFIG_INPUT=y
415# CONFIG_INPUT_FF_MEMLESS is not set
416# CONFIG_INPUT_POLLDEV is not set
417
418#
419# Userland interfaces
420#
421# CONFIG_INPUT_MOUSEDEV is not set
422# CONFIG_INPUT_JOYDEV is not set
423# CONFIG_INPUT_EVDEV is not set
424# CONFIG_INPUT_EVBUG is not set
425
426#
427# Input Device Drivers
428#
429# CONFIG_INPUT_KEYBOARD is not set
430# CONFIG_INPUT_MOUSE is not set
431# CONFIG_INPUT_JOYSTICK is not set
432# CONFIG_INPUT_TABLET is not set
433# CONFIG_INPUT_TOUCHSCREEN is not set
434# CONFIG_INPUT_MISC is not set
435
436#
437# Hardware I/O ports
438#
439# CONFIG_SERIO is not set
440# CONFIG_GAMEPORT is not set
441
442#
443# Character devices
444#
445# CONFIG_VT is not set
446CONFIG_DEVKMEM=y
447# CONFIG_SERIAL_NONSTANDARD is not set
448
449#
450# Serial drivers
451#
452# CONFIG_SERIAL_8250 is not set
453
454#
455# Non-8250 serial port support
456#
457CONFIG_SERIAL_SH_SCI=y
458CONFIG_SERIAL_SH_SCI_NR_UARTS=8
459CONFIG_SERIAL_SH_SCI_CONSOLE=y
460CONFIG_SERIAL_CORE=y
461CONFIG_SERIAL_CORE_CONSOLE=y
462# CONFIG_UNIX98_PTYS is not set
463# CONFIG_LEGACY_PTYS is not set
464# CONFIG_IPMI_HANDLER is not set
465# CONFIG_HW_RANDOM is not set
466# CONFIG_R3964 is not set
467# CONFIG_RAW_DRIVER is not set
468# CONFIG_TCG_TPM is not set
469# CONFIG_I2C is not set
470# CONFIG_SPI is not set
471# CONFIG_W1 is not set
472# CONFIG_POWER_SUPPLY is not set
473# CONFIG_HWMON is not set
474CONFIG_THERMAL=y
475# CONFIG_WATCHDOG is not set
476CONFIG_SSB_POSSIBLE=y
477
478#
479# Sonics Silicon Backplane
480#
481# CONFIG_SSB is not set
482
483#
484# Multifunction device drivers
485#
486# CONFIG_MFD_CORE is not set
487# CONFIG_MFD_SM501 is not set
488# CONFIG_HTC_PASIC3 is not set
489# CONFIG_MFD_TMIO is not set
490# CONFIG_REGULATOR is not set
491
492#
493# Multimedia devices
494#
495
496#
497# Multimedia core support
498#
499# CONFIG_VIDEO_DEV is not set
500# CONFIG_VIDEO_MEDIA is not set
501
502#
503# Multimedia drivers
504#
505CONFIG_DAB=y
506
507#
508# Graphics support
509#
510# CONFIG_VGASTATE is not set
511CONFIG_VIDEO_OUTPUT_CONTROL=y
512# CONFIG_FB is not set
513# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
514
515#
516# Display device support
517#
518# CONFIG_DISPLAY_SUPPORT is not set
519# CONFIG_SOUND is not set
520# CONFIG_HID_SUPPORT is not set
521# CONFIG_USB_SUPPORT is not set
522# CONFIG_MMC is not set
523# CONFIG_MEMSTICK is not set
524# CONFIG_NEW_LEDS is not set
525# CONFIG_ACCESSIBILITY is not set
526CONFIG_RTC_LIB=y
527CONFIG_RTC_CLASS=y
528CONFIG_RTC_HCTOSYS=y
529CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
530# CONFIG_RTC_DEBUG is not set
531
532#
533# RTC interfaces
534#
535CONFIG_RTC_INTF_SYSFS=y
536CONFIG_RTC_INTF_PROC=y
537CONFIG_RTC_INTF_DEV=y
538# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
539# CONFIG_RTC_DRV_TEST is not set
540
541#
542# SPI RTC drivers
543#
544
545#
546# Platform RTC drivers
547#
548# CONFIG_RTC_DRV_DS1286 is not set
549# CONFIG_RTC_DRV_DS1511 is not set
550# CONFIG_RTC_DRV_DS1553 is not set
551# CONFIG_RTC_DRV_DS1742 is not set
552# CONFIG_RTC_DRV_STK17TA8 is not set
553# CONFIG_RTC_DRV_M48T86 is not set
554# CONFIG_RTC_DRV_M48T35 is not set
555# CONFIG_RTC_DRV_M48T59 is not set
556# CONFIG_RTC_DRV_BQ4802 is not set
557# CONFIG_RTC_DRV_V3020 is not set
558
559#
560# on-CPU RTC drivers
561#
562CONFIG_RTC_DRV_SH=y
563# CONFIG_DMADEVICES is not set
564# CONFIG_UIO is not set
565# CONFIG_STAGING is not set
566CONFIG_STAGING_EXCLUDE_BUILD=y
567
568#
569# File systems
570#
571CONFIG_EXT2_FS=y
572# CONFIG_EXT2_FS_XATTR is not set
573# CONFIG_EXT3_FS is not set
574# CONFIG_EXT4_FS is not set
575# CONFIG_REISERFS_FS is not set
576# CONFIG_JFS_FS is not set
577# CONFIG_FS_POSIX_ACL is not set
578# CONFIG_FILE_LOCKING is not set
579# CONFIG_XFS_FS is not set
580# CONFIG_DNOTIFY is not set
581# CONFIG_INOTIFY is not set
582# CONFIG_QUOTA is not set
583# CONFIG_AUTOFS_FS is not set
584# CONFIG_AUTOFS4_FS is not set
585# CONFIG_FUSE_FS is not set
586
587#
588# CD-ROM/DVD Filesystems
589#
590# CONFIG_ISO9660_FS is not set
591# CONFIG_UDF_FS is not set
592
593#
594# DOS/FAT/NT Filesystems
595#
596# CONFIG_MSDOS_FS is not set
597# CONFIG_VFAT_FS is not set
598# CONFIG_NTFS_FS is not set
599
600#
601# Pseudo filesystems
602#
603CONFIG_PROC_FS=y
604CONFIG_PROC_SYSCTL=y
605CONFIG_SYSFS=y
606# CONFIG_TMPFS is not set
607# CONFIG_HUGETLB_PAGE is not set
608# CONFIG_CONFIGFS_FS is not set
609
610#
611# Miscellaneous filesystems
612#
613# CONFIG_ADFS_FS is not set
614# CONFIG_AFFS_FS is not set
615# CONFIG_HFS_FS is not set
616# CONFIG_HFSPLUS_FS is not set
617# CONFIG_BEFS_FS is not set
618# CONFIG_BFS_FS is not set
619# CONFIG_EFS_FS is not set
620CONFIG_JFFS2_FS=y
621CONFIG_JFFS2_FS_DEBUG=0
622CONFIG_JFFS2_FS_WRITEBUFFER=y
623# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
624# CONFIG_JFFS2_SUMMARY is not set
625# CONFIG_JFFS2_FS_XATTR is not set
626# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
627CONFIG_JFFS2_ZLIB=y
628# CONFIG_JFFS2_LZO is not set
629CONFIG_JFFS2_RTIME=y
630# CONFIG_JFFS2_RUBIN is not set
631# CONFIG_CRAMFS is not set
632# CONFIG_VXFS_FS is not set
633# CONFIG_MINIX_FS is not set
634# CONFIG_OMFS_FS is not set
635# CONFIG_HPFS_FS is not set
636# CONFIG_QNX4FS_FS is not set
637CONFIG_ROMFS_FS=y
638# CONFIG_SYSV_FS is not set
639# CONFIG_UFS_FS is not set
640
641#
642# Partition Types
643#
644# CONFIG_PARTITION_ADVANCED is not set
645CONFIG_MSDOS_PARTITION=y
646# CONFIG_NLS is not set
647
648#
649# Kernel hacking
650#
651CONFIG_TRACE_IRQFLAGS_SUPPORT=y
652# CONFIG_PRINTK_TIME is not set
653CONFIG_ENABLE_WARN_DEPRECATED=y
654# CONFIG_ENABLE_MUST_CHECK is not set
655CONFIG_FRAME_WARN=1024
656CONFIG_MAGIC_SYSRQ=y
657# CONFIG_UNUSED_SYMBOLS is not set
658CONFIG_DEBUG_FS=y
659# CONFIG_HEADERS_CHECK is not set
660# CONFIG_DEBUG_KERNEL is not set
661# CONFIG_DEBUG_BUGVERBOSE is not set
662# CONFIG_DEBUG_MEMORY_INIT is not set
663# CONFIG_RCU_CPU_STALL_DETECTOR is not set
664# CONFIG_LATENCYTOP is not set
665CONFIG_SYSCTL_SYSCALL_CHECK=y
666CONFIG_HAVE_FUNCTION_TRACER=y
667CONFIG_HAVE_DYNAMIC_FTRACE=y
668CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
669
670#
671# Tracers
672#
673# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
674# CONFIG_SAMPLES is not set
675# CONFIG_SH_STANDARD_BIOS is not set
676# CONFIG_EARLY_SCIF_CONSOLE is not set
677
678#
679# Security options
680#
681# CONFIG_KEYS is not set
682# CONFIG_SECURITY is not set
683# CONFIG_SECURITYFS is not set
684# CONFIG_SECURITY_FILE_CAPABILITIES is not set
685# CONFIG_CRYPTO is not set
686
687#
688# Library routines
689#
690CONFIG_BITREVERSE=y
691# CONFIG_CRC_CCITT is not set
692# CONFIG_CRC16 is not set
693# CONFIG_CRC_T10DIF is not set
694# CONFIG_CRC_ITU_T is not set
695CONFIG_CRC32=y
696# CONFIG_CRC7 is not set
697# CONFIG_LIBCRC32C is not set
698CONFIG_ZLIB_INFLATE=y
699CONFIG_ZLIB_DEFLATE=y
700CONFIG_PLIST=y
701CONFIG_HAS_IOMEM=y
702CONFIG_HAS_IOPORT=y
703CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
index 85b0ac4fc667..dcdef31cf19b 100644
--- a/arch/sh/configs/rsk7203_defconfig
+++ b/arch/sh/configs/rsk7203_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27 3# Linux kernel version: 2.6.28-rc6
4# Tue Oct 21 12:58:47 2008 4# Mon Dec 8 14:35:03 2008
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -16,6 +16,8 @@ CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_GPIO=y 16CONFIG_GENERIC_GPIO=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18# CONFIG_GENERIC_CLOCKEVENTS is not set 18# CONFIG_GENERIC_CLOCKEVENTS is not set
19# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
20# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
19CONFIG_STACKTRACE_SUPPORT=y 21CONFIG_STACKTRACE_SUPPORT=y
20CONFIG_LOCKDEP_SUPPORT=y 22CONFIG_LOCKDEP_SUPPORT=y
21CONFIG_HAVE_LATENCYTOP_SUPPORT=y 23CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -75,7 +77,6 @@ CONFIG_TIMERFD=y
75CONFIG_EVENTFD=y 77CONFIG_EVENTFD=y
76CONFIG_AIO=y 78CONFIG_AIO=y
77CONFIG_VM_EVENT_COUNTERS=y 79CONFIG_VM_EVENT_COUNTERS=y
78CONFIG_PCI_QUIRKS=y
79# CONFIG_SLAB is not set 80# CONFIG_SLAB is not set
80# CONFIG_SLUB is not set 81# CONFIG_SLUB is not set
81CONFIG_SLOB=y 82CONFIG_SLOB=y
@@ -126,6 +127,7 @@ CONFIG_CLASSIC_RCU=y
126CONFIG_CPU_SH2=y 127CONFIG_CPU_SH2=y
127CONFIG_CPU_SH2A=y 128CONFIG_CPU_SH2A=y
128# CONFIG_CPU_SUBTYPE_SH7619 is not set 129# CONFIG_CPU_SUBTYPE_SH7619 is not set
130# CONFIG_CPU_SUBTYPE_SH7201 is not set
129CONFIG_CPU_SUBTYPE_SH7203=y 131CONFIG_CPU_SUBTYPE_SH7203=y
130# CONFIG_CPU_SUBTYPE_SH7206 is not set 132# CONFIG_CPU_SUBTYPE_SH7206 is not set
131# CONFIG_CPU_SUBTYPE_SH7263 is not set 133# CONFIG_CPU_SUBTYPE_SH7263 is not set
@@ -211,6 +213,8 @@ CONFIG_CPU_HAS_FPU=y
211# 213#
212# Board support 214# Board support
213# 215#
216CONFIG_SH_RSK=y
217# CONFIG_SH_RSK7201 is not set
214CONFIG_SH_RSK7203=y 218CONFIG_SH_RSK7203=y
215 219
216# 220#
@@ -296,6 +300,14 @@ CONFIG_BINFMT_ZFLAT=y
296CONFIG_BINFMT_SHARED_FLAT=y 300CONFIG_BINFMT_SHARED_FLAT=y
297# CONFIG_HAVE_AOUT is not set 301# CONFIG_HAVE_AOUT is not set
298# CONFIG_BINFMT_MISC is not set 302# CONFIG_BINFMT_MISC is not set
303
304#
305# Power management options (EXPERIMENTAL)
306#
307CONFIG_PM=y
308# CONFIG_PM_DEBUG is not set
309CONFIG_CPU_IDLE=y
310CONFIG_CPU_IDLE_GOV_LADDER=y
299CONFIG_NET=y 311CONFIG_NET=y
300 312
301# 313#
@@ -477,6 +489,7 @@ CONFIG_BLK_DEV=y
477CONFIG_MISC_DEVICES=y 489CONFIG_MISC_DEVICES=y
478# CONFIG_EEPROM_93CX6 is not set 490# CONFIG_EEPROM_93CX6 is not set
479# CONFIG_ENCLOSURE_SERVICES is not set 491# CONFIG_ENCLOSURE_SERVICES is not set
492# CONFIG_C2PORT is not set
480CONFIG_HAVE_IDE=y 493CONFIG_HAVE_IDE=y
481# CONFIG_IDE is not set 494# CONFIG_IDE is not set
482 495
@@ -603,11 +616,11 @@ CONFIG_SERIAL_CORE_CONSOLE=y
603# CONFIG_HWMON is not set 616# CONFIG_HWMON is not set
604CONFIG_THERMAL=y 617CONFIG_THERMAL=y
605# CONFIG_WATCHDOG is not set 618# CONFIG_WATCHDOG is not set
619CONFIG_SSB_POSSIBLE=y
606 620
607# 621#
608# Sonics Silicon Backplane 622# Sonics Silicon Backplane
609# 623#
610CONFIG_SSB_POSSIBLE=y
611# CONFIG_SSB is not set 624# CONFIG_SSB is not set
612 625
613# 626#
@@ -617,7 +630,11 @@ CONFIG_SSB_POSSIBLE=y
617# CONFIG_MFD_SM501 is not set 630# CONFIG_MFD_SM501 is not set
618# CONFIG_HTC_PASIC3 is not set 631# CONFIG_HTC_PASIC3 is not set
619# CONFIG_MFD_TMIO is not set 632# CONFIG_MFD_TMIO is not set
620# CONFIG_MFD_WM8400 is not set 633CONFIG_REGULATOR=y
634# CONFIG_REGULATOR_DEBUG is not set
635# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
636# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
637# CONFIG_REGULATOR_BQ24022 is not set
621 638
622# 639#
623# Multimedia devices 640# Multimedia devices
@@ -702,19 +719,22 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
702CONFIG_USB_DEVICEFS=y 719CONFIG_USB_DEVICEFS=y
703CONFIG_USB_DEVICE_CLASS=y 720CONFIG_USB_DEVICE_CLASS=y
704# CONFIG_USB_DYNAMIC_MINORS is not set 721# CONFIG_USB_DYNAMIC_MINORS is not set
722# CONFIG_USB_SUSPEND is not set
705# CONFIG_USB_OTG is not set 723# CONFIG_USB_OTG is not set
706# CONFIG_USB_OTG_WHITELIST is not set 724# CONFIG_USB_OTG_WHITELIST is not set
707# CONFIG_USB_OTG_BLACKLIST_HUB is not set 725# CONFIG_USB_OTG_BLACKLIST_HUB is not set
708CONFIG_USB_MON=y 726CONFIG_USB_MON=y
727# CONFIG_USB_WUSB is not set
728# CONFIG_USB_WUSB_CBAF is not set
709 729
710# 730#
711# USB Host Controller Drivers 731# USB Host Controller Drivers
712# 732#
713# CONFIG_USB_C67X00_HCD is not set 733# CONFIG_USB_C67X00_HCD is not set
714# CONFIG_USB_ISP116X_HCD is not set 734# CONFIG_USB_ISP116X_HCD is not set
715# CONFIG_USB_ISP1760_HCD is not set
716# CONFIG_USB_SL811_HCD is not set 735# CONFIG_USB_SL811_HCD is not set
717CONFIG_USB_R8A66597_HCD=y 736CONFIG_USB_R8A66597_HCD=y
737# CONFIG_USB_HWA_HCD is not set
718 738
719# 739#
720# USB Device Class drivers 740# USB Device Class drivers
@@ -725,11 +745,11 @@ CONFIG_USB_R8A66597_HCD=y
725# CONFIG_USB_TMC is not set 745# CONFIG_USB_TMC is not set
726 746
727# 747#
728# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 748# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
729# 749#
730 750
731# 751#
732# may also be needed; see USB_STORAGE Help for more information 752# see USB_STORAGE Help for more information
733# 753#
734# CONFIG_USB_LIBUSUAL is not set 754# CONFIG_USB_LIBUSUAL is not set
735 755
@@ -770,7 +790,22 @@ CONFIG_USB_R8A66597_HCD=y
770# CONFIG_USB_GADGET is not set 790# CONFIG_USB_GADGET is not set
771# CONFIG_MMC is not set 791# CONFIG_MMC is not set
772# CONFIG_MEMSTICK is not set 792# CONFIG_MEMSTICK is not set
773# CONFIG_NEW_LEDS is not set 793CONFIG_NEW_LEDS=y
794CONFIG_LEDS_CLASS=y
795
796#
797# LED drivers
798#
799CONFIG_LEDS_GPIO=y
800
801#
802# LED Triggers
803#
804CONFIG_LEDS_TRIGGERS=y
805CONFIG_LEDS_TRIGGER_TIMER=y
806CONFIG_LEDS_TRIGGER_HEARTBEAT=y
807CONFIG_LEDS_TRIGGER_BACKLIGHT=y
808CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
774# CONFIG_ACCESSIBILITY is not set 809# CONFIG_ACCESSIBILITY is not set
775CONFIG_RTC_LIB=y 810CONFIG_RTC_LIB=y
776CONFIG_RTC_CLASS=y 811CONFIG_RTC_CLASS=y
@@ -812,6 +847,7 @@ CONFIG_RTC_DRV_SH=y
812# CONFIG_DMADEVICES is not set 847# CONFIG_DMADEVICES is not set
813# CONFIG_UIO is not set 848# CONFIG_UIO is not set
814# CONFIG_STAGING is not set 849# CONFIG_STAGING is not set
850CONFIG_STAGING_EXCLUDE_BUILD=y
815 851
816# 852#
817# File systems 853# File systems
@@ -950,9 +986,14 @@ CONFIG_FRAME_POINTER=y
950# CONFIG_FAULT_INJECTION is not set 986# CONFIG_FAULT_INJECTION is not set
951# CONFIG_LATENCYTOP is not set 987# CONFIG_LATENCYTOP is not set
952CONFIG_SYSCTL_SYSCALL_CHECK=y 988CONFIG_SYSCTL_SYSCALL_CHECK=y
953CONFIG_NOP_TRACER=y 989CONFIG_HAVE_FUNCTION_TRACER=y
954CONFIG_HAVE_FTRACE=y 990CONFIG_HAVE_DYNAMIC_FTRACE=y
955# CONFIG_FTRACE is not set 991CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
992
993#
994# Tracers
995#
996# CONFIG_FUNCTION_TRACER is not set
956# CONFIG_SCHED_TRACER is not set 997# CONFIG_SCHED_TRACER is not set
957# CONFIG_CONTEXT_SWITCH_TRACER is not set 998# CONFIG_CONTEXT_SWITCH_TRACER is not set
958# CONFIG_BOOT_TRACER is not set 999# CONFIG_BOOT_TRACER is not set
diff --git a/arch/sh/configs/rts7751r2dplus_qemu_defconfig b/arch/sh/configs/rts7751r2dplus_qemu_defconfig
deleted file mode 100644
index ae8f63000fbf..000000000000
--- a/arch/sh/configs/rts7751r2dplus_qemu_defconfig
+++ /dev/null
@@ -1,949 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27
4# Wed Oct 22 18:51:20 2008
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
9CONFIG_RWSEM_GENERIC_SPINLOCK=y
10CONFIG_GENERIC_BUG=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
15CONFIG_GENERIC_IRQ_PROBE=y
16# CONFIG_GENERIC_GPIO is not set
17CONFIG_GENERIC_TIME=y
18CONFIG_GENERIC_CLOCKEVENTS=y
19CONFIG_SYS_SUPPORTS_PCI=y
20CONFIG_STACKTRACE_SUPPORT=y
21CONFIG_LOCKDEP_SUPPORT=y
22CONFIG_HAVE_LATENCYTOP_SUPPORT=y
23# CONFIG_ARCH_HAS_ILOG2_U32 is not set
24# CONFIG_ARCH_HAS_ILOG2_U64 is not set
25CONFIG_ARCH_NO_VIRT_TO_BUS=y
26CONFIG_IO_TRAPPED=y
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y
37CONFIG_SWAP=y
38CONFIG_SYSVIPC=y
39CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_BSD_PROCESS_ACCT is not set
41CONFIG_IKCONFIG=y
42CONFIG_IKCONFIG_PROC=y
43CONFIG_LOG_BUF_SHIFT=14
44# CONFIG_CGROUPS is not set
45CONFIG_GROUP_SCHED=y
46CONFIG_FAIR_GROUP_SCHED=y
47# CONFIG_RT_GROUP_SCHED is not set
48CONFIG_USER_SCHED=y
49# CONFIG_CGROUP_SCHED is not set
50CONFIG_SYSFS_DEPRECATED=y
51CONFIG_SYSFS_DEPRECATED_V2=y
52# CONFIG_RELAY is not set
53# CONFIG_NAMESPACES is not set
54CONFIG_BLK_DEV_INITRD=y
55CONFIG_INITRAMFS_SOURCE=""
56# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
57CONFIG_SYSCTL=y
58CONFIG_EMBEDDED=y
59CONFIG_UID16=y
60# CONFIG_SYSCTL_SYSCALL is not set
61CONFIG_KALLSYMS=y
62# CONFIG_KALLSYMS_ALL is not set
63# CONFIG_KALLSYMS_EXTRA_PASS is not set
64# CONFIG_HOTPLUG is not set
65CONFIG_PRINTK=y
66CONFIG_BUG=y
67CONFIG_ELF_CORE=y
68CONFIG_COMPAT_BRK=y
69CONFIG_BASE_FULL=y
70CONFIG_FUTEX=y
71CONFIG_ANON_INODES=y
72CONFIG_EPOLL=y
73CONFIG_SIGNALFD=y
74CONFIG_TIMERFD=y
75CONFIG_EVENTFD=y
76CONFIG_SHMEM=y
77CONFIG_AIO=y
78CONFIG_VM_EVENT_COUNTERS=y
79CONFIG_PCI_QUIRKS=y
80CONFIG_SLAB=y
81# CONFIG_SLUB is not set
82# CONFIG_SLOB is not set
83CONFIG_PROFILING=y
84# CONFIG_MARKERS is not set
85CONFIG_OPROFILE=y
86CONFIG_HAVE_OPROFILE=y
87# CONFIG_KPROBES is not set
88CONFIG_HAVE_IOREMAP_PROT=y
89CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y
91CONFIG_HAVE_ARCH_TRACEHOOK=y
92CONFIG_HAVE_CLK=y
93CONFIG_HAVE_GENERIC_DMA_COHERENT=y
94CONFIG_SLABINFO=y
95CONFIG_RT_MUTEXES=y
96# CONFIG_TINY_SHMEM is not set
97CONFIG_BASE_SMALL=0
98CONFIG_MODULES=y
99# CONFIG_MODULE_FORCE_LOAD is not set
100# CONFIG_MODULE_UNLOAD is not set
101# CONFIG_MODVERSIONS is not set
102# CONFIG_MODULE_SRCVERSION_ALL is not set
103CONFIG_KMOD=y
104CONFIG_BLOCK=y
105# CONFIG_LBD is not set
106# CONFIG_BLK_DEV_IO_TRACE is not set
107# CONFIG_LSF is not set
108# CONFIG_BLK_DEV_BSG is not set
109# CONFIG_BLK_DEV_INTEGRITY is not set
110
111#
112# IO Schedulers
113#
114CONFIG_IOSCHED_NOOP=y
115CONFIG_IOSCHED_AS=y
116CONFIG_IOSCHED_DEADLINE=y
117CONFIG_IOSCHED_CFQ=y
118CONFIG_DEFAULT_AS=y
119# CONFIG_DEFAULT_DEADLINE is not set
120# CONFIG_DEFAULT_CFQ is not set
121# CONFIG_DEFAULT_NOOP is not set
122CONFIG_DEFAULT_IOSCHED="anticipatory"
123CONFIG_CLASSIC_RCU=y
124# CONFIG_FREEZER is not set
125
126#
127# System type
128#
129CONFIG_CPU_SH4=y
130# CONFIG_CPU_SUBTYPE_SH7619 is not set
131# CONFIG_CPU_SUBTYPE_SH7203 is not set
132# CONFIG_CPU_SUBTYPE_SH7206 is not set
133# CONFIG_CPU_SUBTYPE_SH7263 is not set
134# CONFIG_CPU_SUBTYPE_MXG is not set
135# CONFIG_CPU_SUBTYPE_SH7705 is not set
136# CONFIG_CPU_SUBTYPE_SH7706 is not set
137# CONFIG_CPU_SUBTYPE_SH7707 is not set
138# CONFIG_CPU_SUBTYPE_SH7708 is not set
139# CONFIG_CPU_SUBTYPE_SH7709 is not set
140# CONFIG_CPU_SUBTYPE_SH7710 is not set
141# CONFIG_CPU_SUBTYPE_SH7712 is not set
142# CONFIG_CPU_SUBTYPE_SH7720 is not set
143# CONFIG_CPU_SUBTYPE_SH7721 is not set
144# CONFIG_CPU_SUBTYPE_SH7750 is not set
145# CONFIG_CPU_SUBTYPE_SH7091 is not set
146# CONFIG_CPU_SUBTYPE_SH7750R is not set
147# CONFIG_CPU_SUBTYPE_SH7750S is not set
148# CONFIG_CPU_SUBTYPE_SH7751 is not set
149CONFIG_CPU_SUBTYPE_SH7751R=y
150# CONFIG_CPU_SUBTYPE_SH7760 is not set
151# CONFIG_CPU_SUBTYPE_SH4_202 is not set
152# CONFIG_CPU_SUBTYPE_SH7723 is not set
153# CONFIG_CPU_SUBTYPE_SH7763 is not set
154# CONFIG_CPU_SUBTYPE_SH7770 is not set
155# CONFIG_CPU_SUBTYPE_SH7780 is not set
156# CONFIG_CPU_SUBTYPE_SH7785 is not set
157# CONFIG_CPU_SUBTYPE_SHX3 is not set
158# CONFIG_CPU_SUBTYPE_SH7343 is not set
159# CONFIG_CPU_SUBTYPE_SH7722 is not set
160# CONFIG_CPU_SUBTYPE_SH7366 is not set
161# CONFIG_CPU_SUBTYPE_SH5_101 is not set
162# CONFIG_CPU_SUBTYPE_SH5_103 is not set
163
164#
165# Memory management options
166#
167CONFIG_QUICKLIST=y
168CONFIG_MMU=y
169CONFIG_PAGE_OFFSET=0x80000000
170CONFIG_MEMORY_START=0x0c000000
171CONFIG_MEMORY_SIZE=0x04000000
172CONFIG_29BIT=y
173CONFIG_VSYSCALL=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_ARCH_SPARSEMEM_ENABLE=y
176CONFIG_ARCH_SPARSEMEM_DEFAULT=y
177CONFIG_MAX_ACTIVE_REGIONS=1
178CONFIG_ARCH_POPULATES_NODE_MAP=y
179CONFIG_ARCH_SELECT_MEMORY_MODEL=y
180CONFIG_PAGE_SIZE_4KB=y
181# CONFIG_PAGE_SIZE_8KB is not set
182# CONFIG_PAGE_SIZE_16KB is not set
183# CONFIG_PAGE_SIZE_64KB is not set
184CONFIG_ENTRY_OFFSET=0x00001000
185CONFIG_SELECT_MEMORY_MODEL=y
186CONFIG_FLATMEM_MANUAL=y
187# CONFIG_DISCONTIGMEM_MANUAL is not set
188# CONFIG_SPARSEMEM_MANUAL is not set
189CONFIG_FLATMEM=y
190CONFIG_FLAT_NODE_MEM_MAP=y
191CONFIG_SPARSEMEM_STATIC=y
192CONFIG_PAGEFLAGS_EXTENDED=y
193CONFIG_SPLIT_PTLOCK_CPUS=4
194# CONFIG_RESOURCES_64BIT is not set
195# CONFIG_PHYS_ADDR_T_64BIT is not set
196CONFIG_ZONE_DMA_FLAG=0
197CONFIG_NR_QUICK=2
198CONFIG_UNEVICTABLE_LRU=y
199
200#
201# Cache configuration
202#
203# CONFIG_SH_DIRECT_MAPPED is not set
204CONFIG_CACHE_WRITEBACK=y
205# CONFIG_CACHE_WRITETHROUGH is not set
206# CONFIG_CACHE_OFF is not set
207
208#
209# Processor features
210#
211CONFIG_CPU_LITTLE_ENDIAN=y
212# CONFIG_CPU_BIG_ENDIAN is not set
213CONFIG_SH_FPU=y
214# CONFIG_SH_STORE_QUEUES is not set
215CONFIG_CPU_HAS_INTEVT=y
216CONFIG_CPU_HAS_SR_RB=y
217CONFIG_CPU_HAS_PTEA=y
218CONFIG_CPU_HAS_FPU=y
219
220#
221# Board support
222#
223# CONFIG_SH_7751_SYSTEMH is not set
224# CONFIG_SH_SECUREEDGE5410 is not set
225CONFIG_SH_RTS7751R2D=y
226# CONFIG_SH_LANDISK is not set
227# CONFIG_SH_TITAN is not set
228# CONFIG_SH_LBOX_RE2 is not set
229
230#
231# RTS7751R2D Board Revision
232#
233CONFIG_RTS7751R2D_PLUS=y
234# CONFIG_RTS7751R2D_1 is not set
235
236#
237# Timer and clock configuration
238#
239CONFIG_SH_TMU=y
240CONFIG_SH_TIMER_IRQ=16
241CONFIG_SH_PCLK_FREQ=60000000
242# CONFIG_NO_HZ is not set
243# CONFIG_HIGH_RES_TIMERS is not set
244CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
245
246#
247# CPU Frequency scaling
248#
249# CONFIG_CPU_FREQ is not set
250
251#
252# DMA support
253#
254# CONFIG_SH_DMA is not set
255
256#
257# Companion Chips
258#
259
260#
261# Additional SuperH Device Drivers
262#
263CONFIG_HEARTBEAT=y
264# CONFIG_PUSH_SWITCH is not set
265
266#
267# Kernel features
268#
269# CONFIG_HZ_100 is not set
270CONFIG_HZ_250=y
271# CONFIG_HZ_300 is not set
272# CONFIG_HZ_1000 is not set
273CONFIG_HZ=250
274# CONFIG_SCHED_HRTICK is not set
275# CONFIG_KEXEC is not set
276# CONFIG_CRASH_DUMP is not set
277CONFIG_SECCOMP=y
278CONFIG_PREEMPT_NONE=y
279# CONFIG_PREEMPT_VOLUNTARY is not set
280# CONFIG_PREEMPT is not set
281CONFIG_GUSA=y
282# CONFIG_GUSA_RB is not set
283
284#
285# Boot options
286#
287CONFIG_ZERO_PAGE_OFFSET=0x00010000
288CONFIG_BOOT_LINK_OFFSET=0x00800000
289# CONFIG_UBC_WAKEUP is not set
290CONFIG_CMDLINE_BOOL=y
291CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
292
293#
294# Bus options
295#
296# CONFIG_PCI is not set
297# CONFIG_ARCH_SUPPORTS_MSI is not set
298
299#
300# Executable file formats
301#
302CONFIG_BINFMT_ELF=y
303# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
304# CONFIG_HAVE_AOUT is not set
305# CONFIG_BINFMT_MISC is not set
306# CONFIG_NET is not set
307
308#
309# Device Drivers
310#
311
312#
313# Generic Driver Options
314#
315CONFIG_STANDALONE=y
316CONFIG_PREVENT_FIRMWARE_BUILD=y
317# CONFIG_DEBUG_DRIVER is not set
318# CONFIG_DEBUG_DEVRES is not set
319# CONFIG_SYS_HYPERVISOR is not set
320# CONFIG_MTD is not set
321# CONFIG_PARPORT is not set
322CONFIG_BLK_DEV=y
323# CONFIG_BLK_DEV_COW_COMMON is not set
324# CONFIG_BLK_DEV_LOOP is not set
325CONFIG_BLK_DEV_RAM=y
326CONFIG_BLK_DEV_RAM_COUNT=16
327CONFIG_BLK_DEV_RAM_SIZE=4096
328# CONFIG_BLK_DEV_XIP is not set
329# CONFIG_CDROM_PKTCDVD is not set
330# CONFIG_BLK_DEV_HD is not set
331CONFIG_MISC_DEVICES=y
332# CONFIG_EEPROM_93CX6 is not set
333# CONFIG_ENCLOSURE_SERVICES is not set
334CONFIG_HAVE_IDE=y
335# CONFIG_IDE is not set
336
337#
338# SCSI device support
339#
340# CONFIG_RAID_ATTRS is not set
341CONFIG_SCSI=y
342CONFIG_SCSI_DMA=y
343# CONFIG_SCSI_TGT is not set
344# CONFIG_SCSI_NETLINK is not set
345CONFIG_SCSI_PROC_FS=y
346
347#
348# SCSI support type (disk, tape, CD-ROM)
349#
350CONFIG_BLK_DEV_SD=y
351# CONFIG_CHR_DEV_ST is not set
352# CONFIG_CHR_DEV_OSST is not set
353# CONFIG_BLK_DEV_SR is not set
354# CONFIG_CHR_DEV_SG is not set
355# CONFIG_CHR_DEV_SCH is not set
356
357#
358# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
359#
360# CONFIG_SCSI_MULTI_LUN is not set
361# CONFIG_SCSI_CONSTANTS is not set
362# CONFIG_SCSI_LOGGING is not set
363# CONFIG_SCSI_SCAN_ASYNC is not set
364CONFIG_SCSI_WAIT_SCAN=m
365
366#
367# SCSI Transports
368#
369# CONFIG_SCSI_SPI_ATTRS is not set
370# CONFIG_SCSI_FC_ATTRS is not set
371# CONFIG_SCSI_SAS_LIBSAS is not set
372# CONFIG_SCSI_SRP_ATTRS is not set
373CONFIG_SCSI_LOWLEVEL=y
374# CONFIG_SCSI_DEBUG is not set
375# CONFIG_SCSI_DH is not set
376CONFIG_ATA=y
377# CONFIG_ATA_NONSTANDARD is not set
378CONFIG_SATA_PMP=y
379CONFIG_ATA_SFF=y
380# CONFIG_SATA_MV is not set
381# CONFIG_PATA_PLATFORM is not set
382# CONFIG_MD is not set
383# CONFIG_PHONE is not set
384
385#
386# Input device support
387#
388CONFIG_INPUT=y
389# CONFIG_INPUT_FF_MEMLESS is not set
390# CONFIG_INPUT_POLLDEV is not set
391
392#
393# Userland interfaces
394#
395# CONFIG_INPUT_MOUSEDEV is not set
396# CONFIG_INPUT_JOYDEV is not set
397# CONFIG_INPUT_EVDEV is not set
398# CONFIG_INPUT_EVBUG is not set
399
400#
401# Input Device Drivers
402#
403# CONFIG_INPUT_KEYBOARD is not set
404# CONFIG_INPUT_MOUSE is not set
405# CONFIG_INPUT_JOYSTICK is not set
406# CONFIG_INPUT_TABLET is not set
407# CONFIG_INPUT_TOUCHSCREEN is not set
408# CONFIG_INPUT_MISC is not set
409
410#
411# Hardware I/O ports
412#
413# CONFIG_SERIO is not set
414# CONFIG_GAMEPORT is not set
415
416#
417# Character devices
418#
419CONFIG_VT=y
420CONFIG_CONSOLE_TRANSLATIONS=y
421CONFIG_VT_CONSOLE=y
422CONFIG_HW_CONSOLE=y
423CONFIG_VT_HW_CONSOLE_BINDING=y
424CONFIG_DEVKMEM=y
425# CONFIG_SERIAL_NONSTANDARD is not set
426
427#
428# Serial drivers
429#
430CONFIG_SERIAL_8250=y
431# CONFIG_SERIAL_8250_CONSOLE is not set
432CONFIG_SERIAL_8250_NR_UARTS=4
433CONFIG_SERIAL_8250_RUNTIME_UARTS=4
434# CONFIG_SERIAL_8250_EXTENDED is not set
435
436#
437# Non-8250 serial port support
438#
439CONFIG_SERIAL_SH_SCI=y
440CONFIG_SERIAL_SH_SCI_NR_UARTS=1
441CONFIG_SERIAL_SH_SCI_CONSOLE=y
442CONFIG_SERIAL_CORE=y
443CONFIG_SERIAL_CORE_CONSOLE=y
444CONFIG_UNIX98_PTYS=y
445CONFIG_LEGACY_PTYS=y
446CONFIG_LEGACY_PTY_COUNT=256
447# CONFIG_IPMI_HANDLER is not set
448CONFIG_HW_RANDOM=y
449# CONFIG_R3964 is not set
450# CONFIG_RAW_DRIVER is not set
451# CONFIG_TCG_TPM is not set
452# CONFIG_I2C is not set
453CONFIG_SPI=y
454# CONFIG_SPI_DEBUG is not set
455CONFIG_SPI_MASTER=y
456
457#
458# SPI Master Controller Drivers
459#
460CONFIG_SPI_BITBANG=y
461# CONFIG_SPI_SH_SCI is not set
462
463#
464# SPI Protocol Masters
465#
466# CONFIG_SPI_AT25 is not set
467# CONFIG_SPI_SPIDEV is not set
468# CONFIG_SPI_TLE62X0 is not set
469# CONFIG_W1 is not set
470# CONFIG_POWER_SUPPLY is not set
471CONFIG_HWMON=y
472# CONFIG_HWMON_VID is not set
473# CONFIG_SENSORS_ADCXX is not set
474# CONFIG_SENSORS_F71805F is not set
475# CONFIG_SENSORS_F71882FG is not set
476# CONFIG_SENSORS_IT87 is not set
477# CONFIG_SENSORS_LM70 is not set
478# CONFIG_SENSORS_MAX1111 is not set
479# CONFIG_SENSORS_PC87360 is not set
480# CONFIG_SENSORS_PC87427 is not set
481# CONFIG_SENSORS_SMSC47M1 is not set
482# CONFIG_SENSORS_SMSC47B397 is not set
483# CONFIG_SENSORS_VT1211 is not set
484# CONFIG_SENSORS_W83627HF is not set
485# CONFIG_SENSORS_W83627EHF is not set
486# CONFIG_HWMON_DEBUG_CHIP is not set
487# CONFIG_THERMAL is not set
488# CONFIG_THERMAL_HWMON is not set
489# CONFIG_WATCHDOG is not set
490
491#
492# Sonics Silicon Backplane
493#
494CONFIG_SSB_POSSIBLE=y
495# CONFIG_SSB is not set
496
497#
498# Multifunction device drivers
499#
500# CONFIG_MFD_CORE is not set
501CONFIG_MFD_SM501=y
502# CONFIG_HTC_PASIC3 is not set
503# CONFIG_MFD_TMIO is not set
504# CONFIG_MFD_WM8400 is not set
505
506#
507# Multimedia devices
508#
509
510#
511# Multimedia core support
512#
513# CONFIG_VIDEO_DEV is not set
514# CONFIG_VIDEO_MEDIA is not set
515
516#
517# Multimedia drivers
518#
519CONFIG_DAB=y
520
521#
522# Graphics support
523#
524# CONFIG_VGASTATE is not set
525CONFIG_VIDEO_OUTPUT_CONTROL=m
526CONFIG_FB=y
527# CONFIG_FIRMWARE_EDID is not set
528# CONFIG_FB_DDC is not set
529# CONFIG_FB_BOOT_VESA_SUPPORT is not set
530CONFIG_FB_CFB_FILLRECT=y
531CONFIG_FB_CFB_COPYAREA=y
532CONFIG_FB_CFB_IMAGEBLIT=y
533# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
534# CONFIG_FB_SYS_FILLRECT is not set
535# CONFIG_FB_SYS_COPYAREA is not set
536# CONFIG_FB_SYS_IMAGEBLIT is not set
537# CONFIG_FB_FOREIGN_ENDIAN is not set
538# CONFIG_FB_SYS_FOPS is not set
539# CONFIG_FB_SVGALIB is not set
540# CONFIG_FB_MACMODES is not set
541# CONFIG_FB_BACKLIGHT is not set
542# CONFIG_FB_MODE_HELPERS is not set
543# CONFIG_FB_TILEBLITTING is not set
544
545#
546# Frame buffer hardware drivers
547#
548# CONFIG_FB_S1D13XXX is not set
549CONFIG_FB_SH_MOBILE_LCDC=m
550CONFIG_FB_SM501=y
551# CONFIG_FB_VIRTUAL is not set
552# CONFIG_FB_METRONOME is not set
553# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
554
555#
556# Display device support
557#
558# CONFIG_DISPLAY_SUPPORT is not set
559
560#
561# Console display driver support
562#
563CONFIG_DUMMY_CONSOLE=y
564CONFIG_FRAMEBUFFER_CONSOLE=y
565# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
566# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
567# CONFIG_FONTS is not set
568CONFIG_FONT_8x8=y
569CONFIG_FONT_8x16=y
570CONFIG_LOGO=y
571# CONFIG_LOGO_LINUX_MONO is not set
572# CONFIG_LOGO_LINUX_VGA16 is not set
573# CONFIG_LOGO_LINUX_CLUT224 is not set
574# CONFIG_LOGO_SUPERH_MONO is not set
575# CONFIG_LOGO_SUPERH_VGA16 is not set
576CONFIG_LOGO_SUPERH_CLUT224=y
577CONFIG_SOUND=y
578CONFIG_SOUND_OSS_CORE=y
579CONFIG_SND=m
580# CONFIG_SND_SEQUENCER is not set
581# CONFIG_SND_MIXER_OSS is not set
582# CONFIG_SND_PCM_OSS is not set
583# CONFIG_SND_DYNAMIC_MINORS is not set
584CONFIG_SND_SUPPORT_OLD_API=y
585CONFIG_SND_VERBOSE_PROCFS=y
586# CONFIG_SND_VERBOSE_PRINTK is not set
587# CONFIG_SND_DEBUG is not set
588CONFIG_SND_DRIVERS=y
589# CONFIG_SND_DUMMY is not set
590# CONFIG_SND_MTPAV is not set
591# CONFIG_SND_SERIAL_U16550 is not set
592# CONFIG_SND_MPU401 is not set
593CONFIG_SND_SPI=y
594CONFIG_SND_SUPERH=y
595# CONFIG_SND_SOC is not set
596CONFIG_SOUND_PRIME=m
597CONFIG_HID_SUPPORT=y
598CONFIG_HID=y
599# CONFIG_HID_DEBUG is not set
600# CONFIG_HIDRAW is not set
601# CONFIG_HID_PID is not set
602
603#
604# Special HID drivers
605#
606CONFIG_HID_COMPAT=y
607# CONFIG_USB_SUPPORT is not set
608# CONFIG_MMC is not set
609# CONFIG_MEMSTICK is not set
610# CONFIG_NEW_LEDS is not set
611# CONFIG_ACCESSIBILITY is not set
612CONFIG_RTC_LIB=y
613CONFIG_RTC_CLASS=y
614CONFIG_RTC_HCTOSYS=y
615CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
616# CONFIG_RTC_DEBUG is not set
617
618#
619# RTC interfaces
620#
621CONFIG_RTC_INTF_SYSFS=y
622CONFIG_RTC_INTF_PROC=y
623CONFIG_RTC_INTF_DEV=y
624# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
625# CONFIG_RTC_DRV_TEST is not set
626
627#
628# SPI RTC drivers
629#
630# CONFIG_RTC_DRV_M41T94 is not set
631# CONFIG_RTC_DRV_DS1305 is not set
632# CONFIG_RTC_DRV_MAX6902 is not set
633CONFIG_RTC_DRV_R9701=y
634# CONFIG_RTC_DRV_RS5C348 is not set
635# CONFIG_RTC_DRV_DS3234 is not set
636
637#
638# Platform RTC drivers
639#
640# CONFIG_RTC_DRV_DS1286 is not set
641# CONFIG_RTC_DRV_DS1511 is not set
642# CONFIG_RTC_DRV_DS1553 is not set
643# CONFIG_RTC_DRV_DS1742 is not set
644# CONFIG_RTC_DRV_STK17TA8 is not set
645# CONFIG_RTC_DRV_M48T86 is not set
646# CONFIG_RTC_DRV_M48T35 is not set
647# CONFIG_RTC_DRV_M48T59 is not set
648# CONFIG_RTC_DRV_BQ4802 is not set
649# CONFIG_RTC_DRV_V3020 is not set
650
651#
652# on-CPU RTC drivers
653#
654# CONFIG_RTC_DRV_SH is not set
655# CONFIG_DMADEVICES is not set
656# CONFIG_UIO is not set
657# CONFIG_STAGING is not set
658
659#
660# File systems
661#
662CONFIG_EXT2_FS=y
663# CONFIG_EXT2_FS_XATTR is not set
664# CONFIG_EXT2_FS_XIP is not set
665# CONFIG_EXT3_FS is not set
666# CONFIG_EXT4_FS is not set
667# CONFIG_REISERFS_FS is not set
668# CONFIG_JFS_FS is not set
669# CONFIG_FS_POSIX_ACL is not set
670CONFIG_FILE_LOCKING=y
671# CONFIG_XFS_FS is not set
672CONFIG_DNOTIFY=y
673CONFIG_INOTIFY=y
674CONFIG_INOTIFY_USER=y
675# CONFIG_QUOTA is not set
676# CONFIG_AUTOFS_FS is not set
677# CONFIG_AUTOFS4_FS is not set
678# CONFIG_FUSE_FS is not set
679
680#
681# CD-ROM/DVD Filesystems
682#
683# CONFIG_ISO9660_FS is not set
684# CONFIG_UDF_FS is not set
685
686#
687# DOS/FAT/NT Filesystems
688#
689CONFIG_FAT_FS=y
690CONFIG_MSDOS_FS=y
691CONFIG_VFAT_FS=y
692CONFIG_FAT_DEFAULT_CODEPAGE=437
693CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
694# CONFIG_NTFS_FS is not set
695
696#
697# Pseudo filesystems
698#
699CONFIG_PROC_FS=y
700CONFIG_PROC_KCORE=y
701CONFIG_PROC_SYSCTL=y
702CONFIG_PROC_PAGE_MONITOR=y
703CONFIG_SYSFS=y
704CONFIG_TMPFS=y
705# CONFIG_TMPFS_POSIX_ACL is not set
706# CONFIG_HUGETLBFS is not set
707# CONFIG_HUGETLB_PAGE is not set
708# CONFIG_CONFIGFS_FS is not set
709
710#
711# Miscellaneous filesystems
712#
713# CONFIG_ADFS_FS is not set
714# CONFIG_AFFS_FS is not set
715# CONFIG_HFS_FS is not set
716# CONFIG_HFSPLUS_FS is not set
717# CONFIG_BEFS_FS is not set
718# CONFIG_BFS_FS is not set
719# CONFIG_EFS_FS is not set
720# CONFIG_CRAMFS is not set
721# CONFIG_VXFS_FS is not set
722CONFIG_MINIX_FS=y
723# CONFIG_OMFS_FS is not set
724# CONFIG_HPFS_FS is not set
725# CONFIG_QNX4FS_FS is not set
726# CONFIG_ROMFS_FS is not set
727# CONFIG_SYSV_FS is not set
728# CONFIG_UFS_FS is not set
729
730#
731# Partition Types
732#
733# CONFIG_PARTITION_ADVANCED is not set
734CONFIG_MSDOS_PARTITION=y
735CONFIG_NLS=y
736CONFIG_NLS_DEFAULT="iso8859-1"
737# CONFIG_NLS_CODEPAGE_437 is not set
738# CONFIG_NLS_CODEPAGE_737 is not set
739# CONFIG_NLS_CODEPAGE_775 is not set
740# CONFIG_NLS_CODEPAGE_850 is not set
741# CONFIG_NLS_CODEPAGE_852 is not set
742# CONFIG_NLS_CODEPAGE_855 is not set
743# CONFIG_NLS_CODEPAGE_857 is not set
744# CONFIG_NLS_CODEPAGE_860 is not set
745# CONFIG_NLS_CODEPAGE_861 is not set
746# CONFIG_NLS_CODEPAGE_862 is not set
747# CONFIG_NLS_CODEPAGE_863 is not set
748# CONFIG_NLS_CODEPAGE_864 is not set
749# CONFIG_NLS_CODEPAGE_865 is not set
750# CONFIG_NLS_CODEPAGE_866 is not set
751# CONFIG_NLS_CODEPAGE_869 is not set
752# CONFIG_NLS_CODEPAGE_936 is not set
753# CONFIG_NLS_CODEPAGE_950 is not set
754CONFIG_NLS_CODEPAGE_932=y
755# CONFIG_NLS_CODEPAGE_949 is not set
756# CONFIG_NLS_CODEPAGE_874 is not set
757# CONFIG_NLS_ISO8859_8 is not set
758# CONFIG_NLS_CODEPAGE_1250 is not set
759# CONFIG_NLS_CODEPAGE_1251 is not set
760# CONFIG_NLS_ASCII is not set
761# CONFIG_NLS_ISO8859_1 is not set
762# CONFIG_NLS_ISO8859_2 is not set
763# CONFIG_NLS_ISO8859_3 is not set
764# CONFIG_NLS_ISO8859_4 is not set
765# CONFIG_NLS_ISO8859_5 is not set
766# CONFIG_NLS_ISO8859_6 is not set
767# CONFIG_NLS_ISO8859_7 is not set
768# CONFIG_NLS_ISO8859_9 is not set
769# CONFIG_NLS_ISO8859_13 is not set
770# CONFIG_NLS_ISO8859_14 is not set
771# CONFIG_NLS_ISO8859_15 is not set
772# CONFIG_NLS_KOI8_R is not set
773# CONFIG_NLS_KOI8_U is not set
774# CONFIG_NLS_UTF8 is not set
775
776#
777# Kernel hacking
778#
779CONFIG_TRACE_IRQFLAGS_SUPPORT=y
780# CONFIG_PRINTK_TIME is not set
781CONFIG_ENABLE_WARN_DEPRECATED=y
782CONFIG_ENABLE_MUST_CHECK=y
783CONFIG_FRAME_WARN=1024
784# CONFIG_MAGIC_SYSRQ is not set
785# CONFIG_UNUSED_SYMBOLS is not set
786CONFIG_DEBUG_FS=y
787# CONFIG_HEADERS_CHECK is not set
788CONFIG_DEBUG_KERNEL=y
789# CONFIG_DEBUG_SHIRQ is not set
790CONFIG_DETECT_SOFTLOCKUP=y
791# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
792CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
793CONFIG_SCHED_DEBUG=y
794# CONFIG_SCHEDSTATS is not set
795# CONFIG_TIMER_STATS is not set
796# CONFIG_DEBUG_OBJECTS is not set
797# CONFIG_DEBUG_SLAB is not set
798# CONFIG_DEBUG_RT_MUTEXES is not set
799# CONFIG_RT_MUTEX_TESTER is not set
800# CONFIG_DEBUG_SPINLOCK is not set
801# CONFIG_DEBUG_MUTEXES is not set
802# CONFIG_DEBUG_LOCK_ALLOC is not set
803# CONFIG_PROVE_LOCKING is not set
804# CONFIG_LOCK_STAT is not set
805# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
806# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
807# CONFIG_DEBUG_KOBJECT is not set
808# CONFIG_DEBUG_BUGVERBOSE is not set
809CONFIG_DEBUG_INFO=y
810# CONFIG_DEBUG_VM is not set
811# CONFIG_DEBUG_WRITECOUNT is not set
812# CONFIG_DEBUG_MEMORY_INIT is not set
813# CONFIG_DEBUG_LIST is not set
814# CONFIG_DEBUG_SG is not set
815# CONFIG_FRAME_POINTER is not set
816# CONFIG_RCU_TORTURE_TEST is not set
817# CONFIG_RCU_CPU_STALL_DETECTOR is not set
818# CONFIG_BACKTRACE_SELF_TEST is not set
819# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
820# CONFIG_FAULT_INJECTION is not set
821# CONFIG_LATENCYTOP is not set
822CONFIG_NOP_TRACER=y
823CONFIG_HAVE_FTRACE=y
824# CONFIG_FTRACE is not set
825# CONFIG_IRQSOFF_TRACER is not set
826# CONFIG_SCHED_TRACER is not set
827# CONFIG_CONTEXT_SWITCH_TRACER is not set
828# CONFIG_BOOT_TRACER is not set
829# CONFIG_STACK_TRACER is not set
830# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
831# CONFIG_SAMPLES is not set
832# CONFIG_SH_STANDARD_BIOS is not set
833CONFIG_EARLY_SCIF_CONSOLE=y
834CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
835CONFIG_EARLY_PRINTK=y
836# CONFIG_DEBUG_BOOTMEM is not set
837# CONFIG_DEBUG_STACKOVERFLOW is not set
838# CONFIG_DEBUG_STACK_USAGE is not set
839# CONFIG_4KSTACKS is not set
840# CONFIG_IRQSTACKS is not set
841# CONFIG_SH_KGDB is not set
842
843#
844# Security options
845#
846# CONFIG_KEYS is not set
847# CONFIG_SECURITY is not set
848# CONFIG_SECURITYFS is not set
849# CONFIG_SECURITY_FILE_CAPABILITIES is not set
850CONFIG_CRYPTO=y
851
852#
853# Crypto core or helper
854#
855# CONFIG_CRYPTO_FIPS is not set
856# CONFIG_CRYPTO_MANAGER is not set
857# CONFIG_CRYPTO_GF128MUL is not set
858# CONFIG_CRYPTO_NULL is not set
859# CONFIG_CRYPTO_CRYPTD is not set
860# CONFIG_CRYPTO_AUTHENC is not set
861# CONFIG_CRYPTO_TEST is not set
862
863#
864# Authenticated Encryption with Associated Data
865#
866# CONFIG_CRYPTO_CCM is not set
867# CONFIG_CRYPTO_GCM is not set
868# CONFIG_CRYPTO_SEQIV is not set
869
870#
871# Block modes
872#
873# CONFIG_CRYPTO_CBC is not set
874# CONFIG_CRYPTO_CTR is not set
875# CONFIG_CRYPTO_CTS is not set
876# CONFIG_CRYPTO_ECB is not set
877# CONFIG_CRYPTO_LRW is not set
878# CONFIG_CRYPTO_PCBC is not set
879# CONFIG_CRYPTO_XTS is not set
880
881#
882# Hash modes
883#
884# CONFIG_CRYPTO_HMAC is not set
885# CONFIG_CRYPTO_XCBC is not set
886
887#
888# Digest
889#
890# CONFIG_CRYPTO_CRC32C is not set
891# CONFIG_CRYPTO_MD4 is not set
892# CONFIG_CRYPTO_MD5 is not set
893# CONFIG_CRYPTO_MICHAEL_MIC is not set
894# CONFIG_CRYPTO_RMD128 is not set
895# CONFIG_CRYPTO_RMD160 is not set
896# CONFIG_CRYPTO_RMD256 is not set
897# CONFIG_CRYPTO_RMD320 is not set
898# CONFIG_CRYPTO_SHA1 is not set
899# CONFIG_CRYPTO_SHA256 is not set
900# CONFIG_CRYPTO_SHA512 is not set
901# CONFIG_CRYPTO_TGR192 is not set
902# CONFIG_CRYPTO_WP512 is not set
903
904#
905# Ciphers
906#
907# CONFIG_CRYPTO_AES is not set
908# CONFIG_CRYPTO_ANUBIS is not set
909# CONFIG_CRYPTO_ARC4 is not set
910# CONFIG_CRYPTO_BLOWFISH is not set
911# CONFIG_CRYPTO_CAMELLIA is not set
912# CONFIG_CRYPTO_CAST5 is not set
913# CONFIG_CRYPTO_CAST6 is not set
914# CONFIG_CRYPTO_DES is not set
915# CONFIG_CRYPTO_FCRYPT is not set
916# CONFIG_CRYPTO_KHAZAD is not set
917# CONFIG_CRYPTO_SALSA20 is not set
918# CONFIG_CRYPTO_SEED is not set
919# CONFIG_CRYPTO_SERPENT is not set
920# CONFIG_CRYPTO_TEA is not set
921# CONFIG_CRYPTO_TWOFISH is not set
922
923#
924# Compression
925#
926# CONFIG_CRYPTO_DEFLATE is not set
927# CONFIG_CRYPTO_LZO is not set
928
929#
930# Random Number Generation
931#
932# CONFIG_CRYPTO_ANSI_CPRNG is not set
933CONFIG_CRYPTO_HW=y
934
935#
936# Library routines
937#
938CONFIG_BITREVERSE=y
939# CONFIG_CRC_CCITT is not set
940# CONFIG_CRC16 is not set
941CONFIG_CRC_T10DIF=y
942# CONFIG_CRC_ITU_T is not set
943CONFIG_CRC32=y
944# CONFIG_CRC7 is not set
945# CONFIG_LIBCRC32C is not set
946CONFIG_PLIST=y
947CONFIG_HAS_IOMEM=y
948CONFIG_HAS_IOPORT=y
949CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
index 075f42ed5b09..be246f381507 100644
--- a/arch/sh/configs/se7343_defconfig
+++ b/arch/sh/configs/se7343_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27 3# Linux kernel version: 2.6.28-rc6
4# Wed Oct 22 19:00:21 2008 4# Thu Dec 4 16:40:25 2008
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -74,7 +74,6 @@ CONFIG_EVENTFD=y
74# CONFIG_SHMEM is not set 74# CONFIG_SHMEM is not set
75CONFIG_AIO=y 75CONFIG_AIO=y
76CONFIG_VM_EVENT_COUNTERS=y 76CONFIG_VM_EVENT_COUNTERS=y
77CONFIG_PCI_QUIRKS=y
78CONFIG_SLAB=y 77CONFIG_SLAB=y
79# CONFIG_SLUB is not set 78# CONFIG_SLUB is not set
80# CONFIG_SLOB is not set 79# CONFIG_SLOB is not set
@@ -127,6 +126,7 @@ CONFIG_CPU_SH4=y
127CONFIG_CPU_SH4A=y 126CONFIG_CPU_SH4A=y
128CONFIG_CPU_SH4AL_DSP=y 127CONFIG_CPU_SH4AL_DSP=y
129# CONFIG_CPU_SUBTYPE_SH7619 is not set 128# CONFIG_CPU_SUBTYPE_SH7619 is not set
129# CONFIG_CPU_SUBTYPE_SH7201 is not set
130# CONFIG_CPU_SUBTYPE_SH7203 is not set 130# CONFIG_CPU_SUBTYPE_SH7203 is not set
131# CONFIG_CPU_SUBTYPE_SH7206 is not set 131# CONFIG_CPU_SUBTYPE_SH7206 is not set
132# CONFIG_CPU_SUBTYPE_SH7263 is not set 132# CONFIG_CPU_SUBTYPE_SH7263 is not set
@@ -227,7 +227,7 @@ CONFIG_SH_7343_SOLUTION_ENGINE=y
227# 227#
228CONFIG_SH_TMU=y 228CONFIG_SH_TMU=y
229CONFIG_SH_TIMER_IRQ=16 229CONFIG_SH_TIMER_IRQ=16
230CONFIG_SH_PCLK_FREQ=27000000 230CONFIG_SH_PCLK_FREQ=33333333
231# CONFIG_NO_HZ is not set 231# CONFIG_NO_HZ is not set
232# CONFIG_HIGH_RES_TIMERS is not set 232# CONFIG_HIGH_RES_TIMERS is not set
233CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 233CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -274,7 +274,8 @@ CONFIG_GUSA=y
274# 274#
275CONFIG_ZERO_PAGE_OFFSET=0x00001000 275CONFIG_ZERO_PAGE_OFFSET=0x00001000
276CONFIG_BOOT_LINK_OFFSET=0x00800000 276CONFIG_BOOT_LINK_OFFSET=0x00800000
277# CONFIG_CMDLINE_BOOL is not set 277CONFIG_CMDLINE_BOOL=y
278CONFIG_CMDLINE="console=ttySC0,115200"
278 279
279# 280#
280# Bus options 281# Bus options
@@ -463,6 +464,7 @@ CONFIG_BLK_DEV=y
463# CONFIG_BLK_DEV_COW_COMMON is not set 464# CONFIG_BLK_DEV_COW_COMMON is not set
464# CONFIG_BLK_DEV_LOOP is not set 465# CONFIG_BLK_DEV_LOOP is not set
465# CONFIG_BLK_DEV_NBD is not set 466# CONFIG_BLK_DEV_NBD is not set
467# CONFIG_BLK_DEV_UB is not set
466# CONFIG_BLK_DEV_RAM is not set 468# CONFIG_BLK_DEV_RAM is not set
467# CONFIG_CDROM_PKTCDVD is not set 469# CONFIG_CDROM_PKTCDVD is not set
468# CONFIG_ATA_OVER_ETH is not set 470# CONFIG_ATA_OVER_ETH is not set
@@ -519,23 +521,10 @@ CONFIG_NETDEVICES=y
519# CONFIG_EQUALIZER is not set 521# CONFIG_EQUALIZER is not set
520# CONFIG_TUN is not set 522# CONFIG_TUN is not set
521# CONFIG_VETH is not set 523# CONFIG_VETH is not set
522# CONFIG_PHYLIB is not set 524# CONFIG_NET_ETHERNET is not set
523CONFIG_NET_ETHERNET=y
524CONFIG_MII=y 525CONFIG_MII=y
525# CONFIG_AX88796 is not set 526# CONFIG_NETDEV_1000 is not set
526# CONFIG_STNIC is not set 527# CONFIG_NETDEV_10000 is not set
527CONFIG_SMC91X=y
528# CONFIG_SMC911X is not set
529# CONFIG_IBM_NEW_EMAC_ZMII is not set
530# CONFIG_IBM_NEW_EMAC_RGMII is not set
531# CONFIG_IBM_NEW_EMAC_TAH is not set
532# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
533# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
534# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
535# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
536# CONFIG_B44 is not set
537CONFIG_NETDEV_1000=y
538CONFIG_NETDEV_10000=y
539 528
540# 529#
541# Wireless LAN 530# Wireless LAN
@@ -543,6 +532,26 @@ CONFIG_NETDEV_10000=y
543# CONFIG_WLAN_PRE80211 is not set 532# CONFIG_WLAN_PRE80211 is not set
544# CONFIG_WLAN_80211 is not set 533# CONFIG_WLAN_80211 is not set
545# CONFIG_IWLWIFI_LEDS is not set 534# CONFIG_IWLWIFI_LEDS is not set
535
536#
537# USB Network Adapters
538#
539# CONFIG_USB_CATC is not set
540# CONFIG_USB_KAWETH is not set
541# CONFIG_USB_PEGASUS is not set
542# CONFIG_USB_RTL8150 is not set
543CONFIG_USB_USBNET=y
544# CONFIG_USB_NET_AX8817X is not set
545CONFIG_USB_NET_CDCETHER=y
546CONFIG_USB_NET_DM9601=y
547# CONFIG_USB_NET_SMSC95XX is not set
548# CONFIG_USB_NET_GL620A is not set
549# CONFIG_USB_NET_NET1080 is not set
550# CONFIG_USB_NET_PLUSB is not set
551# CONFIG_USB_NET_MCS7830 is not set
552# CONFIG_USB_NET_RNDIS_HOST is not set
553# CONFIG_USB_NET_CDC_SUBSET is not set
554# CONFIG_USB_NET_ZAURUS is not set
546# CONFIG_WAN is not set 555# CONFIG_WAN is not set
547# CONFIG_PPP is not set 556# CONFIG_PPP is not set
548# CONFIG_SLIP is not set 557# CONFIG_SLIP is not set
@@ -597,13 +606,17 @@ CONFIG_DEVKMEM=y
597# 606#
598# Serial drivers 607# Serial drivers
599# 608#
600# CONFIG_SERIAL_8250 is not set 609CONFIG_SERIAL_8250=y
610# CONFIG_SERIAL_8250_CONSOLE is not set
611CONFIG_SERIAL_8250_NR_UARTS=2
612CONFIG_SERIAL_8250_RUNTIME_UARTS=2
613# CONFIG_SERIAL_8250_EXTENDED is not set
601 614
602# 615#
603# Non-8250 serial port support 616# Non-8250 serial port support
604# 617#
605CONFIG_SERIAL_SH_SCI=y 618CONFIG_SERIAL_SH_SCI=y
606CONFIG_SERIAL_SH_SCI_NR_UARTS=2 619CONFIG_SERIAL_SH_SCI_NR_UARTS=4
607CONFIG_SERIAL_SH_SCI_CONSOLE=y 620CONFIG_SERIAL_SH_SCI_CONSOLE=y
608CONFIG_SERIAL_CORE=y 621CONFIG_SERIAL_CORE=y
609CONFIG_SERIAL_CORE_CONSOLE=y 622CONFIG_SERIAL_CORE_CONSOLE=y
@@ -615,7 +628,51 @@ CONFIG_HW_RANDOM=y
615# CONFIG_R3964 is not set 628# CONFIG_R3964 is not set
616# CONFIG_RAW_DRIVER is not set 629# CONFIG_RAW_DRIVER is not set
617# CONFIG_TCG_TPM is not set 630# CONFIG_TCG_TPM is not set
618# CONFIG_I2C is not set 631CONFIG_I2C=y
632CONFIG_I2C_BOARDINFO=y
633# CONFIG_I2C_CHARDEV is not set
634CONFIG_I2C_HELPER_AUTO=y
635
636#
637# I2C Hardware Bus support
638#
639
640#
641# I2C system bus drivers (mostly embedded / system-on-chip)
642#
643# CONFIG_I2C_OCORES is not set
644CONFIG_I2C_SH_MOBILE=y
645# CONFIG_I2C_SIMTEC is not set
646
647#
648# External I2C/SMBus adapter drivers
649#
650# CONFIG_I2C_PARPORT_LIGHT is not set
651# CONFIG_I2C_TAOS_EVM is not set
652# CONFIG_I2C_TINY_USB is not set
653
654#
655# Other I2C/SMBus bus drivers
656#
657# CONFIG_I2C_PCA_PLATFORM is not set
658# CONFIG_I2C_STUB is not set
659
660#
661# Miscellaneous I2C Chip support
662#
663# CONFIG_DS1682 is not set
664# CONFIG_AT24 is not set
665# CONFIG_SENSORS_EEPROM is not set
666# CONFIG_SENSORS_PCF8574 is not set
667# CONFIG_PCF8575 is not set
668# CONFIG_SENSORS_PCA9539 is not set
669# CONFIG_SENSORS_PCF8591 is not set
670# CONFIG_SENSORS_MAX6875 is not set
671# CONFIG_SENSORS_TSL2550 is not set
672# CONFIG_I2C_DEBUG_CORE is not set
673# CONFIG_I2C_DEBUG_ALGO is not set
674# CONFIG_I2C_DEBUG_BUS is not set
675# CONFIG_I2C_DEBUG_CHIP is not set
619# CONFIG_SPI is not set 676# CONFIG_SPI is not set
620# CONFIG_W1 is not set 677# CONFIG_W1 is not set
621# CONFIG_POWER_SUPPLY is not set 678# CONFIG_POWER_SUPPLY is not set
@@ -623,11 +680,11 @@ CONFIG_HW_RANDOM=y
623# CONFIG_THERMAL is not set 680# CONFIG_THERMAL is not set
624# CONFIG_THERMAL_HWMON is not set 681# CONFIG_THERMAL_HWMON is not set
625# CONFIG_WATCHDOG is not set 682# CONFIG_WATCHDOG is not set
683CONFIG_SSB_POSSIBLE=y
626 684
627# 685#
628# Sonics Silicon Backplane 686# Sonics Silicon Backplane
629# 687#
630CONFIG_SSB_POSSIBLE=y
631# CONFIG_SSB is not set 688# CONFIG_SSB is not set
632 689
633# 690#
@@ -637,7 +694,10 @@ CONFIG_SSB_POSSIBLE=y
637# CONFIG_MFD_SM501 is not set 694# CONFIG_MFD_SM501 is not set
638# CONFIG_HTC_PASIC3 is not set 695# CONFIG_HTC_PASIC3 is not set
639# CONFIG_MFD_TMIO is not set 696# CONFIG_MFD_TMIO is not set
697# CONFIG_PMIC_DA903X is not set
640# CONFIG_MFD_WM8400 is not set 698# CONFIG_MFD_WM8400 is not set
699# CONFIG_MFD_WM8350_I2C is not set
700# CONFIG_REGULATOR is not set
641 701
642# 702#
643# Multimedia devices 703# Multimedia devices
@@ -657,6 +717,16 @@ CONFIG_VIDEO_MEDIA=y
657# Multimedia drivers 717# Multimedia drivers
658# 718#
659# CONFIG_MEDIA_ATTACH is not set 719# CONFIG_MEDIA_ATTACH is not set
720CONFIG_MEDIA_TUNER=y
721# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
722CONFIG_MEDIA_TUNER_SIMPLE=y
723CONFIG_MEDIA_TUNER_TDA8290=y
724CONFIG_MEDIA_TUNER_TDA9887=y
725CONFIG_MEDIA_TUNER_TEA5761=y
726CONFIG_MEDIA_TUNER_TEA5767=y
727CONFIG_MEDIA_TUNER_MT20XX=y
728CONFIG_MEDIA_TUNER_XC2028=y
729CONFIG_MEDIA_TUNER_XC5000=y
660CONFIG_VIDEO_V4L2=y 730CONFIG_VIDEO_V4L2=y
661CONFIG_VIDEO_V4L1=y 731CONFIG_VIDEO_V4L1=y
662CONFIG_VIDEO_CAPTURE_DRIVERS=y 732CONFIG_VIDEO_CAPTURE_DRIVERS=y
@@ -665,8 +735,57 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y
665CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 735CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
666# CONFIG_VIDEO_VIVI is not set 736# CONFIG_VIDEO_VIVI is not set
667# CONFIG_VIDEO_CPIA is not set 737# CONFIG_VIDEO_CPIA is not set
738# CONFIG_VIDEO_CPIA2 is not set
739# CONFIG_VIDEO_SAA5246A is not set
740# CONFIG_VIDEO_SAA5249 is not set
668# CONFIG_SOC_CAMERA is not set 741# CONFIG_SOC_CAMERA is not set
742CONFIG_V4L_USB_DRIVERS=y
743# CONFIG_USB_VIDEO_CLASS is not set
744CONFIG_USB_GSPCA=m
745# CONFIG_USB_M5602 is not set
746# CONFIG_USB_GSPCA_CONEX is not set
747# CONFIG_USB_GSPCA_ETOMS is not set
748# CONFIG_USB_GSPCA_FINEPIX is not set
749# CONFIG_USB_GSPCA_MARS is not set
750# CONFIG_USB_GSPCA_OV519 is not set
751# CONFIG_USB_GSPCA_PAC207 is not set
752# CONFIG_USB_GSPCA_PAC7311 is not set
753# CONFIG_USB_GSPCA_SONIXB is not set
754# CONFIG_USB_GSPCA_SONIXJ is not set
755# CONFIG_USB_GSPCA_SPCA500 is not set
756# CONFIG_USB_GSPCA_SPCA501 is not set
757# CONFIG_USB_GSPCA_SPCA505 is not set
758# CONFIG_USB_GSPCA_SPCA506 is not set
759# CONFIG_USB_GSPCA_SPCA508 is not set
760# CONFIG_USB_GSPCA_SPCA561 is not set
761# CONFIG_USB_GSPCA_STK014 is not set
762# CONFIG_USB_GSPCA_SUNPLUS is not set
763# CONFIG_USB_GSPCA_T613 is not set
764# CONFIG_USB_GSPCA_TV8532 is not set
765# CONFIG_USB_GSPCA_VC032X is not set
766# CONFIG_USB_GSPCA_ZC3XX is not set
767# CONFIG_VIDEO_PVRUSB2 is not set
768# CONFIG_VIDEO_EM28XX is not set
769# CONFIG_VIDEO_USBVISION is not set
770# CONFIG_USB_VICAM is not set
771# CONFIG_USB_IBMCAM is not set
772# CONFIG_USB_KONICAWC is not set
773# CONFIG_USB_QUICKCAM_MESSENGER is not set
774# CONFIG_USB_ET61X251 is not set
775# CONFIG_VIDEO_OVCAMCHIP is not set
776# CONFIG_USB_OV511 is not set
777# CONFIG_USB_SE401 is not set
778# CONFIG_USB_SN9C102 is not set
779# CONFIG_USB_STV680 is not set
780# CONFIG_USB_ZC0301 is not set
781# CONFIG_USB_PWC is not set
782# CONFIG_USB_ZR364XX is not set
783# CONFIG_USB_STKWEBCAM is not set
784# CONFIG_USB_S2255 is not set
669CONFIG_RADIO_ADAPTERS=y 785CONFIG_RADIO_ADAPTERS=y
786# CONFIG_USB_DSBR is not set
787# CONFIG_USB_SI470X is not set
788# CONFIG_USB_MR800 is not set
670# CONFIG_DAB is not set 789# CONFIG_DAB is not set
671 790
672# 791#
@@ -700,6 +819,7 @@ CONFIG_FB_CFB_IMAGEBLIT=m
700CONFIG_FB_SH_MOBILE_LCDC=m 819CONFIG_FB_SH_MOBILE_LCDC=m
701# CONFIG_FB_VIRTUAL is not set 820# CONFIG_FB_VIRTUAL is not set
702# CONFIG_FB_METRONOME is not set 821# CONFIG_FB_METRONOME is not set
822# CONFIG_FB_MB862XX is not set
703# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 823# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
704 824
705# 825#
@@ -737,27 +857,147 @@ CONFIG_SND_DRIVERS=y
737# CONFIG_SND_SERIAL_U16550 is not set 857# CONFIG_SND_SERIAL_U16550 is not set
738# CONFIG_SND_MPU401 is not set 858# CONFIG_SND_MPU401 is not set
739CONFIG_SND_SUPERH=y 859CONFIG_SND_SUPERH=y
860CONFIG_SND_USB=y
861# CONFIG_SND_USB_AUDIO is not set
862# CONFIG_SND_USB_CAIAQ is not set
740# CONFIG_SND_SOC is not set 863# CONFIG_SND_SOC is not set
741# CONFIG_SOUND_PRIME is not set 864# CONFIG_SOUND_PRIME is not set
742CONFIG_HID_SUPPORT=y 865CONFIG_HID_SUPPORT=y
743CONFIG_HID=y 866CONFIG_HID=y
744# CONFIG_HID_DEBUG is not set 867# CONFIG_HID_DEBUG is not set
745# CONFIG_HIDRAW is not set 868# CONFIG_HIDRAW is not set
869
870#
871# USB Input Devices
872#
873CONFIG_USB_HID=y
746# CONFIG_HID_PID is not set 874# CONFIG_HID_PID is not set
875# CONFIG_USB_HIDDEV is not set
747 876
748# 877#
749# Special HID drivers 878# Special HID drivers
750# 879#
751CONFIG_HID_COMPAT=y 880CONFIG_HID_COMPAT=y
752# CONFIG_USB_SUPPORT is not set 881CONFIG_HID_A4TECH=y
882CONFIG_HID_APPLE=y
883CONFIG_HID_BELKIN=y
884CONFIG_HID_BRIGHT=y
885CONFIG_HID_CHERRY=y
886CONFIG_HID_CHICONY=y
887CONFIG_HID_CYPRESS=y
888CONFIG_HID_DELL=y
889CONFIG_HID_EZKEY=y
890CONFIG_HID_GYRATION=y
891CONFIG_HID_LOGITECH=y
892# CONFIG_LOGITECH_FF is not set
893# CONFIG_LOGIRUMBLEPAD2_FF is not set
894CONFIG_HID_MICROSOFT=y
895CONFIG_HID_MONTEREY=y
896CONFIG_HID_PANTHERLORD=y
897# CONFIG_PANTHERLORD_FF is not set
898CONFIG_HID_PETALYNX=y
899CONFIG_HID_SAMSUNG=y
900CONFIG_HID_SONY=y
901CONFIG_HID_SUNPLUS=y
902# CONFIG_THRUSTMASTER_FF is not set
903# CONFIG_ZEROPLUS_FF is not set
904CONFIG_USB_SUPPORT=y
905CONFIG_USB_ARCH_HAS_HCD=y
906# CONFIG_USB_ARCH_HAS_OHCI is not set
907# CONFIG_USB_ARCH_HAS_EHCI is not set
908CONFIG_USB=y
909CONFIG_USB_DEBUG=y
910CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
911
912#
913# Miscellaneous USB options
914#
915CONFIG_USB_DEVICEFS=y
916CONFIG_USB_DEVICE_CLASS=y
917# CONFIG_USB_DYNAMIC_MINORS is not set
918# CONFIG_USB_OTG is not set
919# CONFIG_USB_OTG_WHITELIST is not set
920# CONFIG_USB_OTG_BLACKLIST_HUB is not set
921# CONFIG_USB_MON is not set
922# CONFIG_USB_WUSB is not set
923# CONFIG_USB_WUSB_CBAF is not set
924
925#
926# USB Host Controller Drivers
927#
928# CONFIG_USB_C67X00_HCD is not set
929CONFIG_USB_ISP116X_HCD=y
930# CONFIG_USB_SL811_HCD is not set
931# CONFIG_USB_R8A66597_HCD is not set
932# CONFIG_USB_HWA_HCD is not set
933
934#
935# USB Device Class drivers
936#
937# CONFIG_USB_ACM is not set
938# CONFIG_USB_PRINTER is not set
939# CONFIG_USB_WDM is not set
940# CONFIG_USB_TMC is not set
941
942#
943# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
944#
945
946#
947# see USB_STORAGE Help for more information
948#
949# CONFIG_USB_STORAGE is not set
950# CONFIG_USB_LIBUSUAL is not set
951
952#
953# USB Imaging devices
954#
955# CONFIG_USB_MDC800 is not set
956# CONFIG_USB_MICROTEK is not set
957
958#
959# USB port drivers
960#
961# CONFIG_USB_SERIAL is not set
962
963#
964# USB Miscellaneous drivers
965#
966# CONFIG_USB_EMI62 is not set
967# CONFIG_USB_EMI26 is not set
968# CONFIG_USB_ADUTUX is not set
969# CONFIG_USB_SEVSEG is not set
970# CONFIG_USB_RIO500 is not set
971# CONFIG_USB_LEGOTOWER is not set
972# CONFIG_USB_LCD is not set
973# CONFIG_USB_BERRY_CHARGE is not set
974# CONFIG_USB_LED is not set
975# CONFIG_USB_CYPRESS_CY7C63 is not set
976# CONFIG_USB_CYTHERM is not set
977# CONFIG_USB_PHIDGET is not set
978# CONFIG_USB_IDMOUSE is not set
979# CONFIG_USB_FTDI_ELAN is not set
980# CONFIG_USB_APPLEDISPLAY is not set
981# CONFIG_USB_LD is not set
982# CONFIG_USB_TRANCEVIBRATOR is not set
983# CONFIG_USB_IOWARRIOR is not set
984# CONFIG_USB_TEST is not set
985# CONFIG_USB_ISIGHTFW is not set
986# CONFIG_USB_VST is not set
987# CONFIG_USB_GADGET is not set
753# CONFIG_MMC is not set 988# CONFIG_MMC is not set
754# CONFIG_MEMSTICK is not set 989# CONFIG_MEMSTICK is not set
755# CONFIG_NEW_LEDS is not set 990# CONFIG_NEW_LEDS is not set
756# CONFIG_ACCESSIBILITY is not set 991# CONFIG_ACCESSIBILITY is not set
757# CONFIG_RTC_CLASS is not set 992# CONFIG_RTC_CLASS is not set
758# CONFIG_DMADEVICES is not set 993# CONFIG_DMADEVICES is not set
759# CONFIG_UIO is not set 994CONFIG_UIO=y
995# CONFIG_UIO_PDRV is not set
996# CONFIG_UIO_PDRV_GENIRQ is not set
997# CONFIG_UIO_SMX is not set
998# CONFIG_UIO_SERCOS3 is not set
760# CONFIG_STAGING is not set 999# CONFIG_STAGING is not set
1000CONFIG_STAGING_EXCLUDE_BUILD=y
761 1001
762# 1002#
763# File systems 1003# File systems
@@ -889,8 +1129,13 @@ CONFIG_FRAME_WARN=1024
889# CONFIG_DEBUG_MEMORY_INIT is not set 1129# CONFIG_DEBUG_MEMORY_INIT is not set
890# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1130# CONFIG_RCU_CPU_STALL_DETECTOR is not set
891# CONFIG_LATENCYTOP is not set 1131# CONFIG_LATENCYTOP is not set
892CONFIG_NOP_TRACER=y 1132CONFIG_HAVE_FUNCTION_TRACER=y
893CONFIG_HAVE_FTRACE=y 1133CONFIG_HAVE_DYNAMIC_FTRACE=y
1134CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1135
1136#
1137# Tracers
1138#
894# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1139# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
895# CONFIG_SAMPLES is not set 1140# CONFIG_SAMPLES is not set
896# CONFIG_SH_STANDARD_BIOS is not set 1141# CONFIG_SH_STANDARD_BIOS is not set
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile
index 1ac812d24488..ab956adacb47 100644
--- a/arch/sh/drivers/dma/Makefile
+++ b/arch/sh/drivers/dma/Makefile
@@ -3,7 +3,6 @@
3# 3#
4 4
5obj-$(CONFIG_SH_DMA_API) += dma-api.o dma-sysfs.o 5obj-$(CONFIG_SH_DMA_API) += dma-api.o dma-sysfs.o
6obj-$(CONFIG_ISA_DMA_API) += dma-isa.o
7obj-$(CONFIG_SH_DMA) += dma-sh.o 6obj-$(CONFIG_SH_DMA) += dma-sh.o
8obj-$(CONFIG_SH_DREAMCAST) += dma-pvr2.o dma-g2.o 7obj-$(CONFIG_SH_DREAMCAST) += dma-pvr2.o dma-g2.o
9obj-$(CONFIG_SH_DMABRG) += dmabrg.o 8obj-$(CONFIG_SH_DMABRG) += dmabrg.o
diff --git a/arch/sh/drivers/dma/dma-isa.c b/arch/sh/drivers/dma/dma-isa.c
deleted file mode 100644
index 5fb044b791c3..000000000000
--- a/arch/sh/drivers/dma/dma-isa.c
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * arch/sh/drivers/dma/dma-isa.c
3 *
4 * Generic ISA DMA wrapper for SH DMA API
5 *
6 * Copyright (C) 2003, 2004 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <asm/dma.h>
15
16/*
17 * This implements a small wrapper set to make code using the old ISA DMA API
18 * work with the SH DMA API. Since most of the work in the new API happens
19 * at ops->xfer() time, we simply use the various set_dma_xxx() routines to
20 * fill in per-channel info, and then hand hand this off to ops->xfer() at
21 * enable_dma() time.
22 *
23 * For channels that are doing on-demand data transfer via cascading, the
24 * channel itself will still need to be configured through the new API. As
25 * such, this code is meant for only the simplest of tasks (and shouldn't be
26 * used in any new drivers at all).
27 *
28 * NOTE: ops->xfer() is the preferred way of doing things. However, there
29 * are some users of the ISA DMA API that exist in common code that we
30 * don't necessarily want to go out of our way to break, so we still
31 * allow for some compatibility at that level. Any new code is strongly
32 * advised to run far away from the ISA DMA API and use the SH DMA API
33 * directly.
34 */
35unsigned long claim_dma_lock(void)
36{
37 unsigned long flags;
38
39 spin_lock_irqsave(&dma_spin_lock, flags);
40
41 return flags;
42}
43EXPORT_SYMBOL(claim_dma_lock);
44
45void release_dma_lock(unsigned long flags)
46{
47 spin_unlock_irqrestore(&dma_spin_lock, flags);
48}
49EXPORT_SYMBOL(release_dma_lock);
50
51void disable_dma(unsigned int chan)
52{
53 /* Nothing */
54}
55EXPORT_SYMBOL(disable_dma);
56
57void enable_dma(unsigned int chan)
58{
59 struct dma_info *info = get_dma_info(chan);
60 struct dma_channel *channel = &info->channels[chan];
61
62 info->ops->xfer(channel);
63}
64EXPORT_SYMBOL(enable_dma);
65
66void clear_dma_ff(unsigned int chan)
67{
68 /* Nothing */
69}
70EXPORT_SYMBOL(clear_dma_ff);
71
72void set_dma_mode(unsigned int chan, char mode)
73{
74 struct dma_info *info = get_dma_info(chan);
75 struct dma_channel *channel = &info->channels[chan];
76
77 channel->mode = mode;
78}
79EXPORT_SYMBOL(set_dma_mode);
80
81void set_dma_addr(unsigned int chan, unsigned int addr)
82{
83 struct dma_info *info = get_dma_info(chan);
84 struct dma_channel *channel = &info->channels[chan];
85
86 /*
87 * Single address mode is the only thing supported through
88 * this interface.
89 */
90 if ((channel->mode & DMA_MODE_MASK) == DMA_MODE_READ) {
91 channel->sar = addr;
92 } else {
93 channel->dar = addr;
94 }
95}
96EXPORT_SYMBOL(set_dma_addr);
97
98void set_dma_count(unsigned int chan, unsigned int count)
99{
100 struct dma_info *info = get_dma_info(chan);
101 struct dma_channel *channel = &info->channels[chan];
102
103 channel->count = count;
104}
105EXPORT_SYMBOL(set_dma_count);
106
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index b2ffe649c7c0..50887a592dd0 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -205,7 +205,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
205 205
206#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 206#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
207 defined(CONFIG_CPU_SUBTYPE_SH7721) || \ 207 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
208 defined(CONFIG_CPU_SUBTYPE_SH7780) 208 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
209 defined(CONFIG_CPU_SUBTYPE_SH7709)
209#define dmaor_read_reg() ctrl_inw(DMAOR) 210#define dmaor_read_reg() ctrl_inw(DMAOR)
210#define dmaor_write_reg(data) ctrl_outw(data, DMAOR) 211#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
211#else 212#else
diff --git a/arch/sh/drivers/dma/dma-sh.h b/arch/sh/drivers/dma/dma-sh.h
index b05af34fc15d..05fecd5428e4 100644
--- a/arch/sh/drivers/dma/dma-sh.h
+++ b/arch/sh/drivers/dma/dma-sh.h
@@ -29,6 +29,7 @@
29#define RS_IN 0x00000200 29#define RS_IN 0x00000200
30#define RS_OUT 0x00000300 30#define RS_OUT 0x00000300
31#define TS_BLK 0x00000040 31#define TS_BLK 0x00000040
32#define TM_BUR 0x00000020
32#define CHCR_DE 0x00000001 33#define CHCR_DE 0x00000001
33#define CHCR_TE 0x00000002 34#define CHCR_TE 0x00000002
34#define CHCR_IE 0x00000004 35#define CHCR_IE 0x00000004
diff --git a/arch/sh/drivers/pci/ops-sh03.c b/arch/sh/drivers/pci/ops-sh03.c
index ebb58e605d9d..e1703ff5a4d2 100644
--- a/arch/sh/drivers/pci/ops-sh03.c
+++ b/arch/sh/drivers/pci/ops-sh03.c
@@ -18,7 +18,8 @@
18 */ 18 */
19int __init pcibios_init_platform(void) 19int __init pcibios_init_platform(void)
20{ 20{
21 return 1; 21 __set_io_port_base(SH7751_PCI_IO_BASE);
22 return 1;
22} 23}
23 24
24static struct resource sh7751_io_resource = { 25static struct resource sh7751_io_resource = {
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index b2a2bfa3c1bd..078dc44d6b08 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -123,16 +123,14 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
123 * Window0 = map->window0.size @ non-cached area base = SDRAM 123 * Window0 = map->window0.size @ non-cached area base = SDRAM
124 * Window1 = map->window1.size @ cached area base = SDRAM 124 * Window1 = map->window1.size @ cached area base = SDRAM
125 */ 125 */
126 word = ((map->window0.size - 1) & 0x1ff00001) | 0x01; 126 word = (CONFIG_MEMORY_SIZE - 0x00100000) | 0x00000001;
127 pci_write_reg(0x07f00001, SH4_PCILSR0); 127 pci_write_reg(word, SH4_PCILSR0);
128 word = ((map->window1.size - 1) & 0x1ff00001) | 0x01;
129 pci_write_reg(0x00000001, SH4_PCILSR1); 128 pci_write_reg(0x00000001, SH4_PCILSR1);
130 /* Set the values on window 0 PCI config registers */ 129 /* Set the values on window 0 PCI config registers */
131 word = P2SEGADDR(map->window0.base); 130 word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000;
132 pci_write_reg(0xa8000000, SH4_PCILAR0); 131 pci_write_reg(word | 0xa0000000, SH4_PCILAR0);
133 pci_write_reg(0x08000000, SH7780_PCIMBAR0); 132 pci_write_reg(word, SH7780_PCIMBAR0);
134 /* Set the values on window 1 PCI config registers */ 133 /* Set the values on window 1 PCI config registers */
135 word = P2SEGADDR(map->window1.base);
136 pci_write_reg(0x00000000, SH4_PCILAR1); 134 pci_write_reg(0x00000000, SH4_PCILAR1);
137 pci_write_reg(0x00000000, SH7780_PCIMBAR1); 135 pci_write_reg(0x00000000, SH7780_PCIMBAR1);
138 136
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 2702d81bfc0d..36736c7e93db 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -49,5 +49,16 @@
49/* Check if an address can be reached in 29 bits */ 49/* Check if an address can be reached in 29 bits */
50#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) 50#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000)
51 51
52#ifdef CONFIG_SH_STORE_QUEUES
53/*
54 * This is a special case for the SH-4 store queues, as pages for this
55 * space still need to be faulted in before it's possible to flush the
56 * store queue cache for writeout to the remapped region.
57 */
58#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000)
59#else
60#define P3_ADDR_MAX P4SEG
61#endif
62
52#endif /* __KERNEL__ */ 63#endif /* __KERNEL__ */
53#endif /* __ASM_SH_ADDRSPACE_H */ 64#endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/arch/sh/include/asm/bitops-grb.h b/arch/sh/include/asm/bitops-grb.h
index a5907b94395b..e73af33acbf4 100644
--- a/arch/sh/include/asm/bitops-grb.h
+++ b/arch/sh/include/asm/bitops-grb.h
@@ -166,4 +166,7 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
166 166
167 return retval; 167 return retval;
168} 168}
169
170#include <asm-generic/bitops/non-atomic.h>
171
169#endif /* __ASM_SH_BITOPS_GRB_H */ 172#endif /* __ASM_SH_BITOPS_GRB_H */
diff --git a/arch/sh/include/asm/bitops-irq.h b/arch/sh/include/asm/bitops-irq.h
deleted file mode 100644
index 653a12750584..000000000000
--- a/arch/sh/include/asm/bitops-irq.h
+++ /dev/null
@@ -1,91 +0,0 @@
1#ifndef __ASM_SH_BITOPS_IRQ_H
2#define __ASM_SH_BITOPS_IRQ_H
3
4static inline void set_bit(int nr, volatile void *addr)
5{
6 int mask;
7 volatile unsigned int *a = addr;
8 unsigned long flags;
9
10 a += nr >> 5;
11 mask = 1 << (nr & 0x1f);
12 local_irq_save(flags);
13 *a |= mask;
14 local_irq_restore(flags);
15}
16
17static inline void clear_bit(int nr, volatile void *addr)
18{
19 int mask;
20 volatile unsigned int *a = addr;
21 unsigned long flags;
22
23 a += nr >> 5;
24 mask = 1 << (nr & 0x1f);
25 local_irq_save(flags);
26 *a &= ~mask;
27 local_irq_restore(flags);
28}
29
30static inline void change_bit(int nr, volatile void *addr)
31{
32 int mask;
33 volatile unsigned int *a = addr;
34 unsigned long flags;
35
36 a += nr >> 5;
37 mask = 1 << (nr & 0x1f);
38 local_irq_save(flags);
39 *a ^= mask;
40 local_irq_restore(flags);
41}
42
43static inline int test_and_set_bit(int nr, volatile void *addr)
44{
45 int mask, retval;
46 volatile unsigned int *a = addr;
47 unsigned long flags;
48
49 a += nr >> 5;
50 mask = 1 << (nr & 0x1f);
51 local_irq_save(flags);
52 retval = (mask & *a) != 0;
53 *a |= mask;
54 local_irq_restore(flags);
55
56 return retval;
57}
58
59static inline int test_and_clear_bit(int nr, volatile void *addr)
60{
61 int mask, retval;
62 volatile unsigned int *a = addr;
63 unsigned long flags;
64
65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f);
67 local_irq_save(flags);
68 retval = (mask & *a) != 0;
69 *a &= ~mask;
70 local_irq_restore(flags);
71
72 return retval;
73}
74
75static inline int test_and_change_bit(int nr, volatile void *addr)
76{
77 int mask, retval;
78 volatile unsigned int *a = addr;
79 unsigned long flags;
80
81 a += nr >> 5;
82 mask = 1 << (nr & 0x1f);
83 local_irq_save(flags);
84 retval = (mask & *a) != 0;
85 *a ^= mask;
86 local_irq_restore(flags);
87
88 return retval;
89}
90
91#endif /* __ASM_SH_BITOPS_IRQ_H */
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h
index 43b8e1a8239e..1d2fc0b010ad 100644
--- a/arch/sh/include/asm/bitops-llsc.h
+++ b/arch/sh/include/asm/bitops-llsc.h
@@ -141,4 +141,6 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
141 return retval != 0; 141 return retval != 0;
142} 142}
143 143
144#include <asm-generic/bitops/non-atomic.h>
145
144#endif /* __ASM_SH_BITOPS_LLSC_H */ 146#endif /* __ASM_SH_BITOPS_LLSC_H */
diff --git a/arch/sh/include/asm/bitops-op32.h b/arch/sh/include/asm/bitops-op32.h
new file mode 100644
index 000000000000..f0ae7e9218e0
--- /dev/null
+++ b/arch/sh/include/asm/bitops-op32.h
@@ -0,0 +1,142 @@
1#ifndef __ASM_SH_BITOPS_OP32_H
2#define __ASM_SH_BITOPS_OP32_H
3
4/*
5 * The bit modifying instructions on SH-2A are only capable of working
6 * with a 3-bit immediate, which signifies the shift position for the bit
7 * being worked on.
8 */
9#if defined(__BIG_ENDIAN)
10#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
11#define BYTE_NUMBER(nr) ((nr ^ BITOP_LE_SWIZZLE) / BITS_PER_BYTE)
12#define BYTE_OFFSET(nr) ((nr ^ BITOP_LE_SWIZZLE) % BITS_PER_BYTE)
13#else
14#define BYTE_NUMBER(nr) ((nr) / BITS_PER_BYTE)
15#define BYTE_OFFSET(nr) ((nr) % BITS_PER_BYTE)
16#endif
17
18#define IS_IMMEDIATE(nr) (__builtin_constant_p(nr))
19
20static inline void __set_bit(int nr, volatile unsigned long *addr)
21{
22 if (IS_IMMEDIATE(nr)) {
23 __asm__ __volatile__ (
24 "bset.b %1, @(%O2,%0) ! __set_bit\n\t"
25 : "+r" (addr)
26 : "i" (BYTE_OFFSET(nr)), "i" (BYTE_NUMBER(nr))
27 : "t", "memory"
28 );
29 } else {
30 unsigned long mask = BIT_MASK(nr);
31 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
32
33 *p |= mask;
34 }
35}
36
37static inline void __clear_bit(int nr, volatile unsigned long *addr)
38{
39 if (IS_IMMEDIATE(nr)) {
40 __asm__ __volatile__ (
41 "bclr.b %1, @(%O2,%0) ! __clear_bit\n\t"
42 : "+r" (addr)
43 : "i" (BYTE_OFFSET(nr)),
44 "i" (BYTE_NUMBER(nr))
45 : "t", "memory"
46 );
47 } else {
48 unsigned long mask = BIT_MASK(nr);
49 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
50
51 *p &= ~mask;
52 }
53}
54
55/**
56 * __change_bit - Toggle a bit in memory
57 * @nr: the bit to change
58 * @addr: the address to start counting from
59 *
60 * Unlike change_bit(), this function is non-atomic and may be reordered.
61 * If it's called on the same region of memory simultaneously, the effect
62 * may be that only one operation succeeds.
63 */
64static inline void __change_bit(int nr, volatile unsigned long *addr)
65{
66 if (IS_IMMEDIATE(nr)) {
67 __asm__ __volatile__ (
68 "bxor.b %1, @(%O2,%0) ! __change_bit\n\t"
69 : "+r" (addr)
70 : "i" (BYTE_OFFSET(nr)),
71 "i" (BYTE_NUMBER(nr))
72 : "t", "memory"
73 );
74 } else {
75 unsigned long mask = BIT_MASK(nr);
76 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
77
78 *p ^= mask;
79 }
80}
81
82/**
83 * __test_and_set_bit - Set a bit and return its old value
84 * @nr: Bit to set
85 * @addr: Address to count from
86 *
87 * This operation is non-atomic and can be reordered.
88 * If two examples of this operation race, one can appear to succeed
89 * but actually fail. You must protect multiple accesses with a lock.
90 */
91static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
92{
93 unsigned long mask = BIT_MASK(nr);
94 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
95 unsigned long old = *p;
96
97 *p = old | mask;
98 return (old & mask) != 0;
99}
100
101/**
102 * __test_and_clear_bit - Clear a bit and return its old value
103 * @nr: Bit to clear
104 * @addr: Address to count from
105 *
106 * This operation is non-atomic and can be reordered.
107 * If two examples of this operation race, one can appear to succeed
108 * but actually fail. You must protect multiple accesses with a lock.
109 */
110static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
111{
112 unsigned long mask = BIT_MASK(nr);
113 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
114 unsigned long old = *p;
115
116 *p = old & ~mask;
117 return (old & mask) != 0;
118}
119
120/* WARNING: non atomic and it can be reordered! */
121static inline int __test_and_change_bit(int nr,
122 volatile unsigned long *addr)
123{
124 unsigned long mask = BIT_MASK(nr);
125 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
126 unsigned long old = *p;
127
128 *p = old ^ mask;
129 return (old & mask) != 0;
130}
131
132/**
133 * test_bit - Determine whether a bit is set
134 * @nr: bit number to test
135 * @addr: Address to start counting from
136 */
137static inline int test_bit(int nr, const volatile unsigned long *addr)
138{
139 return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
140}
141
142#endif /* __ASM_SH_BITOPS_OP32_H */
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index 367930d8e5ae..ebe595b7ab1f 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -13,21 +13,22 @@
13 13
14#ifdef CONFIG_GUSA_RB 14#ifdef CONFIG_GUSA_RB
15#include <asm/bitops-grb.h> 15#include <asm/bitops-grb.h>
16#elif defined(CONFIG_CPU_SH2A)
17#include <asm-generic/bitops/atomic.h>
18#include <asm/bitops-op32.h>
16#elif defined(CONFIG_CPU_SH4A) 19#elif defined(CONFIG_CPU_SH4A)
17#include <asm/bitops-llsc.h> 20#include <asm/bitops-llsc.h>
18#else 21#else
19#include <asm/bitops-irq.h> 22#include <asm-generic/bitops/atomic.h>
23#include <asm-generic/bitops/non-atomic.h>
20#endif 24#endif
21 25
22
23/* 26/*
24 * clear_bit() doesn't provide any barrier for the compiler. 27 * clear_bit() doesn't provide any barrier for the compiler.
25 */ 28 */
26#define smp_mb__before_clear_bit() barrier() 29#define smp_mb__before_clear_bit() barrier()
27#define smp_mb__after_clear_bit() barrier() 30#define smp_mb__after_clear_bit() barrier()
28 31
29#include <asm-generic/bitops/non-atomic.h>
30
31#ifdef CONFIG_SUPERH32 32#ifdef CONFIG_SUPERH32
32static inline unsigned long ffz(unsigned long word) 33static inline unsigned long ffz(unsigned long word)
33{ 34{
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 121b2ecddfc3..4924ff6f5439 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -25,7 +25,7 @@ static void __init check_bugs(void)
25 case CPU_SH7619: 25 case CPU_SH7619:
26 *p++ = '2'; 26 *p++ = '2';
27 break; 27 break;
28 case CPU_SH7203 ... CPU_MXG: 28 case CPU_SH7201 ... CPU_MXG:
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index 9eb9036a1bdc..ccb1d93bb043 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -108,13 +108,11 @@ typedef struct user_fpu_struct elf_fpregset_t;
108#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) 108#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC)
109#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) 109#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC)
110 110
111#ifdef CONFIG_SUPERH32
112/* 111/*
113 * Enable dump using regset. 112 * Enable dump using regset.
114 * This covers all of general/DSP/FPU regs. 113 * This covers all of general/DSP/FPU regs.
115 */ 114 */
116#define CORE_DUMP_USE_REGSET 115#define CORE_DUMP_USE_REGSET
117#endif
118 116
119#define USE_ELF_CORE_DUMP 117#define USE_ELF_CORE_DUMP
120#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC 118#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC
@@ -204,7 +202,7 @@ do { \
204#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 202#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
205struct linux_binprm; 203struct linux_binprm;
206extern int arch_setup_additional_pages(struct linux_binprm *bprm, 204extern int arch_setup_additional_pages(struct linux_binprm *bprm,
207 int executable_stack); 205 int uses_interp);
208 206
209extern unsigned int vdso_enabled; 207extern unsigned int vdso_enabled;
210extern void __kernel_vsyscall; 208extern void __kernel_vsyscall;
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 3aed362c9463..8fea7d8c8258 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -1,8 +1,34 @@
1#ifndef __ASM_SH_FTRACE_H 1#ifndef __ASM_SH_FTRACE_H
2#define __ASM_SH_FTRACE_H 2#define __ASM_SH_FTRACE_H
3 3
4#ifdef CONFIG_FUNCTION_TRACER
5
6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
7
4#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
5extern void mcount(void); 9extern void mcount(void);
6#endif 10
11#define MCOUNT_ADDR ((long)(mcount))
12
13#ifdef CONFIG_DYNAMIC_FTRACE
14#define CALLER_ADDR ((long)(ftrace_caller))
15#define STUB_ADDR ((long)(ftrace_stub))
16
17#define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALLER_ADDR) >> 1)
18
19struct dyn_arch_ftrace {
20 /* No extra data needed on sh */
21};
22
23#endif /* CONFIG_DYNAMIC_FTRACE */
24
25static inline unsigned long ftrace_call_adjust(unsigned long addr)
26{
27 /* 'addr' is the memory table address. */
28 return addr;
29}
30
31#endif /* __ASSEMBLY__ */
32#endif /* CONFIG_FUNCTION_TRACER */
7 33
8#endif /* __ASM_SH_FTRACE_H */ 34#endif /* __ASM_SH_FTRACE_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 65eaae34e753..61f6dae40534 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -260,6 +260,10 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
260 260
261 return (void __iomem *)P2SEGADDR(offset); 261 return (void __iomem *)P2SEGADDR(offset);
262 } 262 }
263
264 /* P4 above the store queues are always mapped. */
265 if (unlikely(offset >= P3_ADDR_MAX))
266 return (void __iomem *)P4SEGADDR(offset);
263#endif 267#endif
264 268
265 return __ioremap(offset, size, flags); 269 return __ioremap(offset, size, flags);
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h
index 24e42078f36f..72704ed725e5 100644
--- a/arch/sh/include/asm/kgdb.h
+++ b/arch/sh/include/asm/kgdb.h
@@ -1,21 +1,7 @@
1/* 1#ifndef __ASM_SH_KGDB_H
2 * May be copied or modified under the terms of the GNU General Public 2#define __ASM_SH_KGDB_H
3 * License. See linux/COPYING for more information.
4 *
5 * Based on original code by Glenn Engel, Jim Kingdon,
6 * David Grothe <dave@gcom.com>, Tigran Aivazian, <tigran@sco.com> and
7 * Amit S. Kale <akale@veritas.com>
8 *
9 * Super-H port based on sh-stub.c (Ben Lee and Steve Chamberlain) by
10 * Henry Bell <henry.bell@st.com>
11 *
12 * Header file for low-level support for remote debug using GDB.
13 *
14 */
15
16#ifndef __KGDB_H
17#define __KGDB_H
18 3
4#include <asm/cacheflush.h>
19#include <asm/ptrace.h> 5#include <asm/ptrace.h>
20 6
21/* Same as pt_regs but has vbr in place of syscall_nr */ 7/* Same as pt_regs but has vbr in place of syscall_nr */
@@ -30,40 +16,26 @@ struct kgdb_regs {
30 unsigned long vbr; 16 unsigned long vbr;
31}; 17};
32 18
33/* State info */ 19enum regnames {
34extern char kgdb_in_gdb_mode; 20 GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7,
35extern int kgdb_nofault; /* Ignore bus errors (in gdb mem access) */ 21 GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15,
36extern char in_nmi; /* Debounce flag to prevent NMI reentry*/
37 22
38/* SCI */ 23 GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR,
39extern int kgdb_portnum; 24};
40extern int kgdb_baud;
41extern char kgdb_parity;
42extern char kgdb_bits;
43 25
44/* Init and interface stuff */ 26#define NUMREGBYTES ((GDB_VBR + 1) * 4)
45extern int kgdb_init(void);
46extern int (*kgdb_getchar)(void);
47extern void (*kgdb_putchar)(int);
48 27
49/* Trap functions */ 28static inline void arch_kgdb_breakpoint(void)
50typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); 29{
51typedef void (kgdb_bus_error_hook_t)(void); 30 __asm__ __volatile__ ("trapa #0x3c\n");
52extern kgdb_debug_hook_t *kgdb_debug_hook; 31}
53extern kgdb_bus_error_hook_t *kgdb_bus_err_hook;
54 32
55/* Console */ 33/* State info */
56struct console; 34extern char in_nmi; /* Debounce flag to prevent NMI reentry*/
57void kgdb_console_write(struct console *co, const char *s, unsigned count);
58extern int kgdb_console_setup(struct console *, char *);
59 35
60/* Prototypes for jmp fns */ 36#define BUFMAX 2048
61#define _JBLEN 9
62typedef int jmp_buf[_JBLEN];
63extern void longjmp(jmp_buf __jmpb, int __retval);
64extern int setjmp(jmp_buf __jmpb);
65 37
66/* Forced breakpoint */ 38#define CACHE_FLUSH_IS_SAFE 1
67#define breakpoint() __asm__ __volatile__("trapa #0x3c") 39#define BREAK_INSTR_SIZE 2
68 40
69#endif 41#endif /* __ASM_SH_KGDB_H */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index f1bae02ef7b6..64b1c16a0f03 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -14,8 +14,6 @@
14#include <linux/time.h> 14#include <linux/time.h>
15#include <asm/machtypes.h> 15#include <asm/machtypes.h>
16 16
17struct device;
18
19struct sh_machine_vector { 17struct sh_machine_vector {
20 void (*mv_setup)(char **cmdline_p); 18 void (*mv_setup)(char **cmdline_p);
21 const char *mv_name; 19 const char *mv_name;
@@ -45,9 +43,6 @@ struct sh_machine_vector {
45 int (*mv_irq_demux)(int irq); 43 int (*mv_irq_demux)(int irq);
46 44
47 void (*mv_init_irq)(void); 45 void (*mv_init_irq)(void);
48 void (*mv_init_pci)(void);
49
50 void (*mv_heartbeat)(void);
51 46
52 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); 47 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
53 void (*mv_ioport_unmap)(void __iomem *); 48 void (*mv_ioport_unmap)(void __iomem *);
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 04c0c9733ad6..5d9157bd474d 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -22,7 +22,7 @@
22#define MMU_CONTEXT_ASID_MASK 0x000000ff 22#define MMU_CONTEXT_ASID_MASK 0x000000ff
23#define MMU_CONTEXT_VERSION_MASK 0xffffff00 23#define MMU_CONTEXT_VERSION_MASK 0xffffff00
24#define MMU_CONTEXT_FIRST_VERSION 0x00000100 24#define MMU_CONTEXT_FIRST_VERSION 0x00000100
25#define NO_CONTEXT 0 25#define NO_CONTEXT 0UL
26 26
27/* ASID is 8-bit value, so it can't be 0x100 */ 27/* ASID is 8-bit value, so it can't be 0x100 */
28#define MMU_NO_ASID 0x100 28#define MMU_NO_ASID 0x100
@@ -130,7 +130,7 @@ static inline void switch_mm(struct mm_struct *prev,
130#define destroy_context(mm) do { } while (0) 130#define destroy_context(mm) do { } while (0)
131#define set_asid(asid) do { } while (0) 131#define set_asid(asid) do { } while (0)
132#define get_asid() (0) 132#define get_asid() (0)
133#define cpu_asid(cpu, mm) ({ (void)cpu; 0; }) 133#define cpu_asid(cpu, mm) ({ (void)cpu; NO_CONTEXT; })
134#define switch_and_save_asid(asid) (0) 134#define switch_and_save_asid(asid) (0)
135#define set_TTB(pgd) do { } while (0) 135#define set_TTB(pgd) do { } while (0)
136#define get_TTB() (0) 136#define get_TTB() (0)
diff --git a/arch/sh/include/asm/mutex-llsc.h b/arch/sh/include/asm/mutex-llsc.h
new file mode 100644
index 000000000000..ee839ee58ac8
--- /dev/null
+++ b/arch/sh/include/asm/mutex-llsc.h
@@ -0,0 +1,112 @@
1/*
2 * arch/sh/include/asm/mutex-llsc.h
3 *
4 * SH-4A optimized mutex locking primitives
5 *
6 * Please look into asm-generic/mutex-xchg.h for a formal definition.
7 */
8#ifndef __ASM_SH_MUTEX_LLSC_H
9#define __ASM_SH_MUTEX_LLSC_H
10
11/*
12 * Attempting to lock a mutex on SH4A is done like in ARMv6+ architecure.
13 * with a bastardized atomic decrement (it is not a reliable atomic decrement
14 * but it satisfies the defined semantics for our purpose, while being
15 * smaller and faster than a real atomic decrement or atomic swap.
16 * The idea is to attempt decrementing the lock value only once. If once
17 * decremented it isn't zero, or if its store-back fails due to a dispute
18 * on the exclusive store, we simply bail out immediately through the slow
19 * path where the lock will be reattempted until it succeeds.
20 */
21static inline void
22__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
23{
24 int __ex_flag, __res;
25
26 __asm__ __volatile__ (
27 "movli.l @%2, %0 \n"
28 "add #-1, %0 \n"
29 "movco.l %0, @%2 \n"
30 "movt %1 \n"
31 : "=&z" (__res), "=&r" (__ex_flag)
32 : "r" (&(count)->counter)
33 : "t");
34
35 __res |= !__ex_flag;
36 if (unlikely(__res != 0))
37 fail_fn(count);
38}
39
40static inline int
41__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
42{
43 int __ex_flag, __res;
44
45 __asm__ __volatile__ (
46 "movli.l @%2, %0 \n"
47 "add #-1, %0 \n"
48 "movco.l %0, @%2 \n"
49 "movt %1 \n"
50 : "=&z" (__res), "=&r" (__ex_flag)
51 : "r" (&(count)->counter)
52 : "t");
53
54 __res |= !__ex_flag;
55 if (unlikely(__res != 0))
56 __res = fail_fn(count);
57
58 return __res;
59}
60
61static inline void
62__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
63{
64 int __ex_flag, __res;
65
66 __asm__ __volatile__ (
67 "movli.l @%2, %0 \n\t"
68 "add #1, %0 \n\t"
69 "movco.l %0, @%2 \n\t"
70 "movt %1 \n\t"
71 : "=&z" (__res), "=&r" (__ex_flag)
72 : "r" (&(count)->counter)
73 : "t");
74
75 __res |= !__ex_flag;
76 if (unlikely(__res <= 0))
77 fail_fn(count);
78}
79
80/*
81 * If the unlock was done on a contended lock, or if the unlock simply fails
82 * then the mutex remains locked.
83 */
84#define __mutex_slowpath_needs_to_unlock() 1
85
86/*
87 * For __mutex_fastpath_trylock we do an atomic decrement and check the
88 * result and put it in the __res variable.
89 */
90static inline int
91__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
92{
93 int __res, __orig;
94
95 __asm__ __volatile__ (
96 "1: movli.l @%2, %0 \n\t"
97 "dt %0 \n\t"
98 "movco.l %0,@%2 \n\t"
99 "bf 1b \n\t"
100 "cmp/eq #0,%0 \n\t"
101 "bt 2f \n\t"
102 "mov #0, %1 \n\t"
103 "bf 3f \n\t"
104 "2: mov #1, %1 \n\t"
105 "3: "
106 : "=&z" (__orig), "=&r" (__res)
107 : "r" (&count->counter)
108 : "t");
109
110 return __res;
111}
112#endif /* __ASM_SH_MUTEX_LLSC_H */
diff --git a/arch/sh/include/asm/mutex.h b/arch/sh/include/asm/mutex.h
index 458c1f7fbc18..d8e37716a4a0 100644
--- a/arch/sh/include/asm/mutex.h
+++ b/arch/sh/include/asm/mutex.h
@@ -5,5 +5,8 @@
5 * implementation in place, or pick the atomic_xchg() based generic 5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details) 6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */ 7 */
8 8#if defined(CONFIG_CPU_SH4A)
9#include <asm/mutex-llsc.h>
10#else
9#include <asm-generic/mutex-dec.h> 11#include <asm-generic/mutex-dec.h>
12#endif
diff --git a/arch/sh/include/asm/pm.h b/arch/sh/include/asm/pm.h
deleted file mode 100644
index 56fdbd6b1c94..000000000000
--- a/arch/sh/include/asm/pm.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com>
7 *
8 */
9#ifndef __ASM_SH_PM_H
10#define __ASM_SH_PM_H
11
12extern u8 wakeup_start;
13extern u8 wakeup_end;
14
15void pm_enter(void);
16
17#endif
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 693364a20ad7..1ef4b24d7619 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -18,7 +18,7 @@ enum cpu_type {
18 CPU_SH7619, 18 CPU_SH7619,
19 19
20 /* SH-2A types */ 20 /* SH-2A types */
21 CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, 21 CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
22 22
23 /* SH-3 types */ 23 /* SH-3 types */
24 CPU_SH7705, CPU_SH7706, CPU_SH7707, 24 CPU_SH7705, CPU_SH7706, CPU_SH7707,
@@ -82,6 +82,9 @@ extern struct sh_cpuinfo cpu_data[];
82#define current_cpu_data cpu_data[smp_processor_id()] 82#define current_cpu_data cpu_data[smp_processor_id()]
83#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] 83#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
84 84
85#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
86#define cpu_relax() barrier()
87
85/* Forward decl */ 88/* Forward decl */
86struct seq_operations; 89struct seq_operations;
87 90
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index a46a0207e977..d79063c5eb9c 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -175,6 +175,15 @@ static __inline__ void enable_fpu(void)
175 175
176void show_trace(struct task_struct *tsk, unsigned long *sp, 176void show_trace(struct task_struct *tsk, unsigned long *sp,
177 struct pt_regs *regs); 177 struct pt_regs *regs);
178
179#ifdef CONFIG_DUMP_CODE
180void show_code(struct pt_regs *regs);
181#else
182static inline void show_code(struct pt_regs *regs)
183{
184}
185#endif
186
178extern unsigned long get_wchan(struct task_struct *p); 187extern unsigned long get_wchan(struct task_struct *p);
179 188
180#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) 189#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
@@ -182,9 +191,6 @@ extern unsigned long get_wchan(struct task_struct *p);
182 191
183#define user_stack_pointer(regs) ((regs)->regs[15]) 192#define user_stack_pointer(regs) ((regs)->regs[15])
184 193
185#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
186#define cpu_relax() barrier()
187
188#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ 194#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
189 defined(CONFIG_CPU_SH4) 195 defined(CONFIG_CPU_SH4)
190#define PREFETCH_STRIDE L1_CACHE_BYTES 196#define PREFETCH_STRIDE L1_CACHE_BYTES
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index b0b4824dfc4c..803177fcf086 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -226,9 +226,7 @@ extern unsigned long get_wchan(struct task_struct *p);
226#define KSTK_EIP(tsk) ((tsk)->thread.pc) 226#define KSTK_EIP(tsk) ((tsk)->thread.pc)
227#define KSTK_ESP(tsk) ((tsk)->thread.sp) 227#define KSTK_ESP(tsk) ((tsk)->thread.sp)
228 228
229#define user_stack_pointer(regs) ((regs)->sp) 229#define user_stack_pointer(regs) ((regs)->regs[15])
230
231#define cpu_relax() barrier()
232 230
233#endif /* __ASSEMBLY__ */ 231#endif /* __ASSEMBLY__ */
234#endif /* __ASM_SH_PROCESSOR_64_H */ 232#endif /* __ASM_SH_PROCESSOR_64_H */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 3ad18e91bca6..12912ab80c15 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -86,6 +86,7 @@ struct pt_dspregs {
86 unsigned long re; 86 unsigned long re;
87 unsigned long mod; 87 unsigned long mod;
88}; 88};
89#endif
89 90
90#define PTRACE_GETREGS 12 /* General registers */ 91#define PTRACE_GETREGS 12 /* General registers */
91#define PTRACE_SETREGS 13 92#define PTRACE_SETREGS 13
@@ -100,7 +101,6 @@ struct pt_dspregs {
100 101
101#define PTRACE_GETDSPREGS 55 /* DSP registers */ 102#define PTRACE_GETDSPREGS 55 /* DSP registers */
102#define PTRACE_SETDSPREGS 56 103#define PTRACE_SETDSPREGS 56
103#endif
104 104
105#ifdef __KERNEL__ 105#ifdef __KERNEL__
106#include <asm/addrspace.h> 106#include <asm/addrspace.h>
diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h
index 0ca261956e3d..d9c96d7cf6c7 100644
--- a/arch/sh/include/asm/sh_bios.h
+++ b/arch/sh/include/asm/sh_bios.h
@@ -10,7 +10,6 @@
10 10
11extern void sh_bios_console_write(const char *buf, unsigned int len); 11extern void sh_bios_console_write(const char *buf, unsigned int len);
12extern void sh_bios_char_out(char ch); 12extern void sh_bios_char_out(char ch);
13extern int sh_bios_in_gdb_mode(void);
14extern void sh_bios_gdb_detach(void); 13extern void sh_bios_gdb_detach(void);
15 14
16extern void sh_bios_get_node_addr(unsigned char *node_addr); 15extern void sh_bios_get_node_addr(unsigned char *node_addr);
diff --git a/arch/sh/include/asm/string_64.h b/arch/sh/include/asm/string_64.h
index aa1fef229c78..742007172624 100644
--- a/arch/sh/include/asm/string_64.h
+++ b/arch/sh/include/asm/string_64.h
@@ -1,17 +1,20 @@
1#ifndef __ASM_SH_STRING_64_H 1#ifndef __ASM_SH_STRING_64_H
2#define __ASM_SH_STRING_64_H 2#define __ASM_SH_STRING_64_H
3 3
4/* 4#ifdef __KERNEL__
5 * include/asm-sh/string_64.h 5
6 * 6#define __HAVE_ARCH_MEMSET
7 * Copyright (C) 2000, 2001 Paolo Alberelli 7extern void *memset(void *__s, int __c, size_t __count);
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13 8
14#define __HAVE_ARCH_MEMCPY 9#define __HAVE_ARCH_MEMCPY
15extern void *memcpy(void *dest, const void *src, size_t count); 10extern void *memcpy(void *dest, const void *src, size_t count);
16 11
12#define __HAVE_ARCH_STRLEN
13extern size_t strlen(const char *);
14
15#define __HAVE_ARCH_STRCPY
16extern char *strcpy(char *__dest, const char *__src);
17
18#endif /* __KERNEL__ */
19
17#endif /* __ASM_SH_STRING_64_H */ 20#endif /* __ASM_SH_STRING_64_H */
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h
index 54773f26cd44..05a868a71ef5 100644
--- a/arch/sh/include/asm/syscall_32.h
+++ b/arch/sh/include/asm/syscall_32.h
@@ -5,7 +5,7 @@
5#include <linux/sched.h> 5#include <linux/sched.h>
6#include <asm/ptrace.h> 6#include <asm/ptrace.h>
7 7
8/* The system call number is given by the user in %g1 */ 8/* The system call number is given by the user in R3 */
9static inline long syscall_get_nr(struct task_struct *task, 9static inline long syscall_get_nr(struct task_struct *task,
10 struct pt_regs *regs) 10 struct pt_regs *regs)
11{ 11{
diff --git a/arch/sh/include/asm/syscall_64.h b/arch/sh/include/asm/syscall_64.h
index bcaaa8ca4d70..e1143b9784d6 100644
--- a/arch/sh/include/asm/syscall_64.h
+++ b/arch/sh/include/asm/syscall_64.h
@@ -1,6 +1,80 @@
1#ifndef __ASM_SH_SYSCALL_64_H 1#ifndef __ASM_SH_SYSCALL_64_H
2#define __ASM_SH_SYSCALL_64_H 2#define __ASM_SH_SYSCALL_64_H
3 3
4#include <asm-generic/syscall.h> 4#include <linux/kernel.h>
5#include <linux/sched.h>
6#include <asm/ptrace.h>
7
8/* The system call number is given by the user in R9 */
9static inline long syscall_get_nr(struct task_struct *task,
10 struct pt_regs *regs)
11{
12 return (regs->syscall_nr >= 0) ? regs->regs[9] : -1L;
13}
14
15static inline void syscall_rollback(struct task_struct *task,
16 struct pt_regs *regs)
17{
18 /*
19 * XXX: This needs some thought. On SH we don't
20 * save away the original R9 value anywhere.
21 */
22}
23
24static inline bool syscall_has_error(struct pt_regs *regs)
25{
26 return (regs->sr & 0x1) ? true : false;
27}
28static inline void syscall_set_error(struct pt_regs *regs)
29{
30 regs->sr |= 0x1;
31}
32static inline void syscall_clear_error(struct pt_regs *regs)
33{
34 regs->sr &= ~0x1;
35}
36
37static inline long syscall_get_error(struct task_struct *task,
38 struct pt_regs *regs)
39{
40 return syscall_has_error(regs) ? regs->regs[9] : 0;
41}
42
43static inline long syscall_get_return_value(struct task_struct *task,
44 struct pt_regs *regs)
45{
46 return regs->regs[9];
47}
48
49static inline void syscall_set_return_value(struct task_struct *task,
50 struct pt_regs *regs,
51 int error, long val)
52{
53 if (error) {
54 syscall_set_error(regs);
55 regs->regs[9] = -error;
56 } else {
57 syscall_clear_error(regs);
58 regs->regs[9] = val;
59 }
60}
61
62static inline void syscall_get_arguments(struct task_struct *task,
63 struct pt_regs *regs,
64 unsigned int i, unsigned int n,
65 unsigned long *args)
66{
67 BUG_ON(i + n > 6);
68 memcpy(args, &regs->regs[2 + i], n * sizeof(args[0]));
69}
70
71static inline void syscall_set_arguments(struct task_struct *task,
72 struct pt_regs *regs,
73 unsigned int i, unsigned int n,
74 const unsigned long *args)
75{
76 BUG_ON(i + n > 6);
77 memcpy(&regs->regs[2 + i], args, n * sizeof(args[0]));
78}
5 79
6#endif /* __ASM_SH_SYSCALL_64_H */ 80#endif /* __ASM_SH_SYSCALL_64_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index 6160fe445161..c9ec6af8e745 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -175,6 +175,8 @@ asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
175BUILD_TRAP_HANDLER(address_error); 175BUILD_TRAP_HANDLER(address_error);
176BUILD_TRAP_HANDLER(debug); 176BUILD_TRAP_HANDLER(debug);
177BUILD_TRAP_HANDLER(bug); 177BUILD_TRAP_HANDLER(bug);
178BUILD_TRAP_HANDLER(breakpoint);
179BUILD_TRAP_HANDLER(singlestep);
178BUILD_TRAP_HANDLER(fpu_error); 180BUILD_TRAP_HANDLER(fpu_error);
179BUILD_TRAP_HANDLER(fpu_state_restore); 181BUILD_TRAP_HANDLER(fpu_state_restore);
180 182
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h
new file mode 100644
index 000000000000..d8f89770275b
--- /dev/null
+++ b/arch/sh/include/asm/unaligned-sh4a.h
@@ -0,0 +1,258 @@
1#ifndef __ASM_SH_UNALIGNED_SH4A_H
2#define __ASM_SH_UNALIGNED_SH4A_H
3
4/*
5 * SH-4A has support for unaligned 32-bit loads, and 32-bit loads only.
6 * Support for 16 and 64-bit accesses are done through shifting and
7 * masking relative to the endianness. Unaligned stores are not supported
8 * by the instruction encoding, so these continue to use the packed
9 * struct.
10 *
11 * The same note as with the movli.l/movco.l pair applies here, as long
12 * as the load is gauranteed to be inlined, nothing else will hook in to
13 * r0 and we get the return value for free.
14 *
15 * NOTE: Due to the fact we require r0 encoding, care should be taken to
16 * avoid mixing these heavily with other r0 consumers, such as the atomic
17 * ops. Failure to adhere to this can result in the compiler running out
18 * of spill registers and blowing up when building at low optimization
19 * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
20 */
21#include <linux/types.h>
22#include <asm/byteorder.h>
23
24static __always_inline u32 __get_unaligned_cpu32(const u8 *p)
25{
26 unsigned long unaligned;
27
28 __asm__ __volatile__ (
29 "movua.l @%1, %0\n\t"
30 : "=z" (unaligned)
31 : "r" (p)
32 );
33
34 return unaligned;
35}
36
37struct __una_u16 { u16 x __attribute__((packed)); };
38struct __una_u32 { u32 x __attribute__((packed)); };
39struct __una_u64 { u64 x __attribute__((packed)); };
40
41static inline u16 __get_unaligned_cpu16(const u8 *p)
42{
43#ifdef __LITTLE_ENDIAN
44 return __get_unaligned_cpu32(p) & 0xffff;
45#else
46 return __get_unaligned_cpu32(p) >> 16;
47#endif
48}
49
50/*
51 * Even though movua.l supports auto-increment on the read side, it can
52 * only store to r0 due to instruction encoding constraints, so just let
53 * the compiler sort it out on its own.
54 */
55static inline u64 __get_unaligned_cpu64(const u8 *p)
56{
57#ifdef __LITTLE_ENDIAN
58 return (u64)__get_unaligned_cpu32(p + 4) << 32 |
59 __get_unaligned_cpu32(p);
60#else
61 return (u64)__get_unaligned_cpu32(p) << 32 |
62 __get_unaligned_cpu32(p + 4);
63#endif
64}
65
66static inline u16 get_unaligned_le16(const void *p)
67{
68 return le16_to_cpu(__get_unaligned_cpu16(p));
69}
70
71static inline u32 get_unaligned_le32(const void *p)
72{
73 return le32_to_cpu(__get_unaligned_cpu32(p));
74}
75
76static inline u64 get_unaligned_le64(const void *p)
77{
78 return le64_to_cpu(__get_unaligned_cpu64(p));
79}
80
81static inline u16 get_unaligned_be16(const void *p)
82{
83 return be16_to_cpu(__get_unaligned_cpu16(p));
84}
85
86static inline u32 get_unaligned_be32(const void *p)
87{
88 return be32_to_cpu(__get_unaligned_cpu32(p));
89}
90
91static inline u64 get_unaligned_be64(const void *p)
92{
93 return be64_to_cpu(__get_unaligned_cpu64(p));
94}
95
96static inline void __put_le16_noalign(u8 *p, u16 val)
97{
98 *p++ = val;
99 *p++ = val >> 8;
100}
101
102static inline void __put_le32_noalign(u8 *p, u32 val)
103{
104 __put_le16_noalign(p, val);
105 __put_le16_noalign(p + 2, val >> 16);
106}
107
108static inline void __put_le64_noalign(u8 *p, u64 val)
109{
110 __put_le32_noalign(p, val);
111 __put_le32_noalign(p + 4, val >> 32);
112}
113
114static inline void __put_be16_noalign(u8 *p, u16 val)
115{
116 *p++ = val >> 8;
117 *p++ = val;
118}
119
120static inline void __put_be32_noalign(u8 *p, u32 val)
121{
122 __put_be16_noalign(p, val >> 16);
123 __put_be16_noalign(p + 2, val);
124}
125
126static inline void __put_be64_noalign(u8 *p, u64 val)
127{
128 __put_be32_noalign(p, val >> 32);
129 __put_be32_noalign(p + 4, val);
130}
131
132static inline void put_unaligned_le16(u16 val, void *p)
133{
134#ifdef __LITTLE_ENDIAN
135 ((struct __una_u16 *)p)->x = val;
136#else
137 __put_le16_noalign(p, val);
138#endif
139}
140
141static inline void put_unaligned_le32(u32 val, void *p)
142{
143#ifdef __LITTLE_ENDIAN
144 ((struct __una_u32 *)p)->x = val;
145#else
146 __put_le32_noalign(p, val);
147#endif
148}
149
150static inline void put_unaligned_le64(u64 val, void *p)
151{
152#ifdef __LITTLE_ENDIAN
153 ((struct __una_u64 *)p)->x = val;
154#else
155 __put_le64_noalign(p, val);
156#endif
157}
158
159static inline void put_unaligned_be16(u16 val, void *p)
160{
161#ifdef __BIG_ENDIAN
162 ((struct __una_u16 *)p)->x = val;
163#else
164 __put_be16_noalign(p, val);
165#endif
166}
167
168static inline void put_unaligned_be32(u32 val, void *p)
169{
170#ifdef __BIG_ENDIAN
171 ((struct __una_u32 *)p)->x = val;
172#else
173 __put_be32_noalign(p, val);
174#endif
175}
176
177static inline void put_unaligned_be64(u64 val, void *p)
178{
179#ifdef __BIG_ENDIAN
180 ((struct __una_u64 *)p)->x = val;
181#else
182 __put_be64_noalign(p, val);
183#endif
184}
185
186/*
187 * Cause a link-time error if we try an unaligned access other than
188 * 1,2,4 or 8 bytes long
189 */
190extern void __bad_unaligned_access_size(void);
191
192#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
193 __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
194 __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
195 __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
196 __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
197 __bad_unaligned_access_size())))); \
198 }))
199
200#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
201 __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
202 __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
203 __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
204 __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
205 __bad_unaligned_access_size())))); \
206 }))
207
208#define __put_unaligned_le(val, ptr) ({ \
209 void *__gu_p = (ptr); \
210 switch (sizeof(*(ptr))) { \
211 case 1: \
212 *(u8 *)__gu_p = (__force u8)(val); \
213 break; \
214 case 2: \
215 put_unaligned_le16((__force u16)(val), __gu_p); \
216 break; \
217 case 4: \
218 put_unaligned_le32((__force u32)(val), __gu_p); \
219 break; \
220 case 8: \
221 put_unaligned_le64((__force u64)(val), __gu_p); \
222 break; \
223 default: \
224 __bad_unaligned_access_size(); \
225 break; \
226 } \
227 (void)0; })
228
229#define __put_unaligned_be(val, ptr) ({ \
230 void *__gu_p = (ptr); \
231 switch (sizeof(*(ptr))) { \
232 case 1: \
233 *(u8 *)__gu_p = (__force u8)(val); \
234 break; \
235 case 2: \
236 put_unaligned_be16((__force u16)(val), __gu_p); \
237 break; \
238 case 4: \
239 put_unaligned_be32((__force u32)(val), __gu_p); \
240 break; \
241 case 8: \
242 put_unaligned_be64((__force u64)(val), __gu_p); \
243 break; \
244 default: \
245 __bad_unaligned_access_size(); \
246 break; \
247 } \
248 (void)0; })
249
250#ifdef __LITTLE_ENDIAN
251# define get_unaligned __get_unaligned_le
252# define put_unaligned __put_unaligned_le
253#else
254# define get_unaligned __get_unaligned_be
255# define put_unaligned __put_unaligned_be
256#endif
257
258#endif /* __ASM_SH_UNALIGNED_SH4A_H */
diff --git a/arch/sh/include/asm/unaligned.h b/arch/sh/include/asm/unaligned.h
index c1641a01d50f..8c0ad5e4487a 100644
--- a/arch/sh/include/asm/unaligned.h
+++ b/arch/sh/include/asm/unaligned.h
@@ -1,7 +1,11 @@
1#ifndef _ASM_SH_UNALIGNED_H 1#ifndef _ASM_SH_UNALIGNED_H
2#define _ASM_SH_UNALIGNED_H 2#define _ASM_SH_UNALIGNED_H
3 3
4/* SH can't handle unaligned accesses. */ 4#ifdef CONFIG_CPU_SH4A
5/* SH-4A can handle unaligned loads in a relatively neutered fashion. */
6#include <asm/unaligned-sh4a.h>
7#else
8/* Otherwise, SH can't handle unaligned accesses. */
5#ifdef __LITTLE_ENDIAN__ 9#ifdef __LITTLE_ENDIAN__
6# include <linux/unaligned/le_struct.h> 10# include <linux/unaligned/le_struct.h>
7# include <linux/unaligned/be_byteshift.h> 11# include <linux/unaligned/be_byteshift.h>
@@ -15,5 +19,6 @@
15# define get_unaligned __get_unaligned_be 19# define get_unaligned __get_unaligned_be
16# define put_unaligned __put_unaligned_be 20# define put_unaligned __put_unaligned_be
17#endif 21#endif
22#endif
18 23
19#endif /* _ASM_SH_UNALIGNED_H */ 24#endif /* _ASM_SH_UNALIGNED_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/gpio.h b/arch/sh/include/cpu-sh3/cpu/gpio.h
index 4e53eb314b8f..9a22b882f3dc 100644
--- a/arch/sh/include/cpu-sh3/cpu/gpio.h
+++ b/arch/sh/include/cpu-sh3/cpu/gpio.h
@@ -62,6 +62,20 @@
62#define PORT_PSELC 0xA4050128UL 62#define PORT_PSELC 0xA4050128UL
63#define PORT_PSELD 0xA405012AUL 63#define PORT_PSELD 0xA405012AUL
64 64
65#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
66
67/* Control registers */
68#define PORT_PACR 0xa4000100UL
69#define PORT_PBCR 0xa4000102UL
70#define PORT_PCCR 0xa4000104UL
71#define PORT_PFCR 0xa400010aUL
72
73/* Data registers */
74#define PORT_PADR 0xa4000120UL
75#define PORT_PBDR 0xa4000122UL
76#define PORT_PCDR 0xa4000124UL
77#define PORT_PFDR 0xa400012aUL
78
65#endif 79#endif
66 80
67#endif 81#endif
diff --git a/arch/sh/include/mach-common/mach/edosk7705.h b/arch/sh/include/mach-common/mach/edosk7705.h
index 5bdc9d9be3de..efc43b323466 100644
--- a/arch/sh/include/mach-common/mach/edosk7705.h
+++ b/arch/sh/include/mach-common/mach/edosk7705.h
@@ -1,30 +1,7 @@
1/* 1#ifndef __ASM_SH_EDOSK7705_H
2 * include/asm-sh/edosk7705.h 2#define __ASM_SH_EDOSK7705_H
3 *
4 * Modified version of io_se.h for the EDOSK7705 specific functions.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an Hitachi EDOSK7705 development board
10 */
11
12#ifndef __ASM_SH_EDOSK7705_IO_H
13#define __ASM_SH_EDOSK7705_IO_H
14 3
4#define __IO_PREFIX sh_edosk7705
15#include <asm/io_generic.h> 5#include <asm/io_generic.h>
16 6
17extern unsigned char sh_edosk7705_inb(unsigned long port); 7#endif /* __ASM_SH_EDOSK7705_H */
18extern unsigned int sh_edosk7705_inl(unsigned long port);
19
20extern void sh_edosk7705_outb(unsigned char value, unsigned long port);
21extern void sh_edosk7705_outl(unsigned int value, unsigned long port);
22
23extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count);
24extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count);
25extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count);
26extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count);
27
28extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset);
29
30#endif /* __ASM_SH_EDOSK7705_IO_H */
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h
new file mode 100644
index 000000000000..56287ee8563a
--- /dev/null
+++ b/arch/sh/include/mach-se/mach/mrshpc.h
@@ -0,0 +1,52 @@
1#ifndef __MACH_SE_MRSHPC_H
2#define __MACH_SE_MRSHPC_H
3
4#include <linux/io.h>
5
6static inline void __init mrshpc_setup_windows(void)
7{
8 if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
9 return; /* Not detected */
10
11 if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
12 __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
13 } else {
14 __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
15 }
16
17 /*
18 * PC-Card window open
19 * flag == COMMON/ATTRIBUTE/IO
20 */
21 /* common window open */
22 __raw_writew(0x8a84, MRSHPC_MW0CR1);
23 if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
24 /* common mode & bus width 16bit SWAP = 1*/
25 __raw_writew(0x0b00, MRSHPC_MW0CR2);
26 else
27 /* common mode & bus width 16bit SWAP = 0*/
28 __raw_writew(0x0300, MRSHPC_MW0CR2);
29
30 /* attribute window open */
31 __raw_writew(0x8a85, MRSHPC_MW1CR1);
32 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
33 /* attribute mode & bus width 16bit SWAP = 1*/
34 __raw_writew(0x0a00, MRSHPC_MW1CR2);
35 else
36 /* attribute mode & bus width 16bit SWAP = 0*/
37 __raw_writew(0x0200, MRSHPC_MW1CR2);
38
39 /* I/O window open */
40 __raw_writew(0x8a86, MRSHPC_IOWCR1);
41 __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */
42 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
43 __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
44 else
45 __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
46
47 __raw_writew(0x2000, MRSHPC_ICR);
48 __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206);
49 __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200);
50}
51
52#endif /* __MACH_SE_MRSHPC_H */
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h
index eb23000e1bbe..14be91c5a2f0 100644
--- a/arch/sh/include/mach-se/mach/se.h
+++ b/arch/sh/include/mach-se/mach/se.h
@@ -68,6 +68,24 @@
68#define BCR_ILCRF (PA_BCR + 10) 68#define BCR_ILCRF (PA_BCR + 10)
69#define BCR_ILCRG (PA_BCR + 12) 69#define BCR_ILCRG (PA_BCR + 12)
70 70
71#if defined(CONFIG_CPU_SUBTYPE_SH7709)
72#define INTC_IRR0 0xa4000004UL
73#define INTC_IRR1 0xa4000006UL
74#define INTC_IRR2 0xa4000008UL
75
76#define INTC_ICR0 0xfffffee0UL
77#define INTC_ICR1 0xa4000010UL
78#define INTC_ICR2 0xa4000012UL
79#define INTC_INTER 0xa4000014UL
80
81#define INTC_IPRC 0xa4000016UL
82#define INTC_IPRD 0xa4000018UL
83#define INTC_IPRE 0xa400001aUL
84
85#define IRQ0_IRQ 32
86#define IRQ1_IRQ 33
87#endif
88
71#if defined(CONFIG_CPU_SUBTYPE_SH7705) 89#if defined(CONFIG_CPU_SUBTYPE_SH7705)
72#define IRQ_STNIC 12 90#define IRQ_STNIC 12
73#define IRQ_CFCARD 14 91#define IRQ_CFCARD 14
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 98458460e632..749914b400fb 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -118,9 +118,6 @@
118#define FPGA_IN 0xb1400000 118#define FPGA_IN 0xb1400000
119#define FPGA_OUT 0xb1400002 119#define FPGA_OUT 0xb1400002
120 120
121#define __IO_PREFIX sh7343se
122#include <asm/io_generic.h>
123
124#define IRQ0_IRQ 32 121#define IRQ0_IRQ 32
125#define IRQ1_IRQ 33 122#define IRQ1_IRQ 33
126#define IRQ4_IRQ 36 123#define IRQ4_IRQ 36
@@ -132,8 +129,10 @@
132#define SE7343_FPGA_IRQ_MRSHPC3 3 129#define SE7343_FPGA_IRQ_MRSHPC3 3
133#define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ 130#define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */
134#define SE7343_FPGA_IRQ_USB 8 131#define SE7343_FPGA_IRQ_USB 8
132#define SE7343_FPGA_IRQ_UARTA 10
133#define SE7343_FPGA_IRQ_UARTB 11
135 134
136#define SE7343_FPGA_IRQ_NR 11 135#define SE7343_FPGA_IRQ_NR 12
137#define SE7343_FPGA_IRQ_BASE 120 136#define SE7343_FPGA_IRQ_BASE 120
138 137
139#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) 138#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3)
@@ -142,6 +141,8 @@
142#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) 141#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0)
143#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) 142#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC)
144#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) 143#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB)
144#define UARTA_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA)
145#define UARTB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB)
145 146
146/* arch/sh/boards/se/7343/irq.c */ 147/* arch/sh/boards/se/7343/irq.c */
147void init_7343se_IRQ(void); 148void init_7343se_IRQ(void);
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 48edfb145fb4..2e1b86e16ab5 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -4,25 +4,31 @@
4 4
5extra-y := head_32.o init_task.o vmlinux.lds 5extra-y := head_32.o init_task.o vmlinux.lds
6 6
7obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \ 7ifdef CONFIG_FUNCTION_TRACER
8 ptrace_32.o setup.o signal_32.o sys_sh.o sys_sh32.o \ 8# Do not profile debug and lowlevel utilities
9 syscalls_32.o time_32.o topology.o traps.o traps_32.o 9CFLAGS_REMOVE_ftrace.o = -pg
10endif
11
12obj-y := debugtraps.o idle.o io.o io_generic.o irq.o \
13 machvec.o process_32.o ptrace_32.o setup.o signal_32.o \
14 sys_sh.o sys_sh32.o syscalls_32.o time_32.o topology.o \
15 traps.o traps_32.o
10 16
11obj-y += cpu/ timers/ 17obj-y += cpu/ timers/
12obj-$(CONFIG_VSYSCALL) += vsyscall/ 18obj-$(CONFIG_VSYSCALL) += vsyscall/
13obj-$(CONFIG_SMP) += smp.o 19obj-$(CONFIG_SMP) += smp.o
14obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
15obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o 20obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
16obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o 21obj-$(CONFIG_KGDB) += kgdb.o
17obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o 22obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
18obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o 23obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o
19obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 24obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
20obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 25obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
21obj-$(CONFIG_CRASH_DUMP) += crash_dump.o 26obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
22obj-$(CONFIG_PM) += pm.o
23obj-$(CONFIG_STACKTRACE) += stacktrace.o 27obj-$(CONFIG_STACKTRACE) += stacktrace.o
24obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 28obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
25obj-$(CONFIG_KPROBES) += kprobes.o 29obj-$(CONFIG_KPROBES) += kprobes.o
26obj-$(CONFIG_GENERIC_GPIO) += gpio.o 30obj-$(CONFIG_GENERIC_GPIO) += gpio.o
31obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
32obj-$(CONFIG_DUMP_CODE) += disassemble.o
27 33
28EXTRA_CFLAGS += -Werror 34EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
index c97660b2b48d..fe425d7f6871 100644
--- a/arch/sh/kernel/Makefile_64
+++ b/arch/sh/kernel/Makefile_64
@@ -1,21 +1,18 @@
1extra-y := head_64.o init_task.o vmlinux.lds 1extra-y := head_64.o init_task.o vmlinux.lds
2 2
3obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \ 3obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ 4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
5 syscalls_64.o time_64.o topology.o traps.o traps_64.o 5 syscalls_64.o time_64.o topology.o traps.o traps_64.o
6 6
7obj-y += cpu/ timers/ 7obj-y += cpu/ timers/
8obj-$(CONFIG_VSYSCALL) += vsyscall/ 8obj-$(CONFIG_VSYSCALL) += vsyscall/
9obj-$(CONFIG_SMP) += smp.o 9obj-$(CONFIG_SMP) += smp.o
10obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
11obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o 10obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
12obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
13obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o 11obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
14obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o 12obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o
15obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 13obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
16obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 14obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
17obj-$(CONFIG_CRASH_DUMP) += crash_dump.o 15obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
18obj-$(CONFIG_PM) += pm.o
19obj-$(CONFIG_STACKTRACE) += stacktrace.o 16obj-$(CONFIG_STACKTRACE) += stacktrace.o
20obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 17obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
21obj-$(CONFIG_GENERIC_GPIO) += gpio.o 18obj-$(CONFIG_GENERIC_GPIO) += gpio.o
diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c
deleted file mode 100644
index bea40339919b..000000000000
--- a/arch/sh/kernel/cf-enabler.c
+++ /dev/null
@@ -1,168 +0,0 @@
1/* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
2 *
3 * linux/drivers/block/cf-enabler.c
4 *
5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000 Toshiharu Nozawa
7 * Copyright (C) 2001 A&D Co., Ltd.
8 *
9 * Enable the CF configuration.
10 */
11
12#include <linux/init.h>
13#include <linux/mm.h>
14#include <linux/vmalloc.h>
15#include <linux/interrupt.h>
16#include <asm/io.h>
17#include <asm/irq.h>
18
19/*
20 * You can connect Compact Flash directly to the bus of SuperH.
21 * This is the enabler for that.
22 *
23 * SIM: How generic is this really? It looks pretty board, or at
24 * least SH sub-type, specific to me.
25 * I know it doesn't work on the Overdrive!
26 */
27
28/*
29 * 0xB8000000 : Attribute
30 * 0xB8001000 : Common Memory
31 * 0xBA000000 : I/O
32 */
33#if defined(CONFIG_CPU_SH4)
34/* SH4 can't access PCMCIA interface through P2 area.
35 * we must remap it with appropriate attribute bit of the page set.
36 * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
37
38#if defined(CONFIG_CF_AREA6)
39#define slot_no 0
40#else
41#define slot_no 1
42#endif
43
44/* use this pointer to access to directly connected compact flash io area*/
45void *cf_io_base;
46
47static int __init allocate_cf_area(void)
48{
49 pgprot_t prot;
50 unsigned long paddrbase, psize;
51
52 /* open I/O area window */
53 paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
54 psize = PAGE_SIZE;
55 prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
56 cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
57 if (!cf_io_base) {
58 printk("allocate_cf_area : can't open CF I/O window!\n");
59 return -ENOMEM;
60 }
61/* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
62 paddrbase, psize, prot.pgprot, cf_io_base);*/
63
64 /* XXX : do we need attribute and common-memory area also? */
65
66 return 0;
67}
68#endif
69
70static int __init cf_init_default(void)
71{
72/* You must have enabled the card, and set the level interrupt
73 * before reaching this point. Possibly in boot ROM or boot loader.
74 */
75#if defined(CONFIG_CPU_SH4)
76 allocate_cf_area();
77#endif
78
79 return 0;
80}
81
82#if defined(CONFIG_SH_SOLUTION_ENGINE)
83#include <mach-se/mach/se.h>
84#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
85#include <mach-se/mach/se7722.h>
86#elif defined(CONFIG_SH_7721_SOLUTION_ENGINE)
87#include <mach-se/mach/se7721.h>
88#endif
89
90/*
91 * SolutionEngine Seriese
92 *
93 * about MS770xSE
94 * 0xB8400000 : Common Memory
95 * 0xB8500000 : Attribute
96 * 0xB8600000 : I/O
97 *
98 * about MS7722SE
99 * 0xB0400000 : Common Memory
100 * 0xB0500000 : Attribute
101 * 0xB0600000 : I/O
102 */
103
104#if defined(CONFIG_SH_SOLUTION_ENGINE) || \
105 defined(CONFIG_SH_7722_SOLUTION_ENGINE) || \
106 defined(CONFIG_SH_7721_SOLUTION_ENGINE)
107static int __init cf_init_se(void)
108{
109 if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
110 return 0; /* Not detected */
111
112 if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
113 ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
114 } else {
115 ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
116 }
117
118 /*
119 * PC-Card window open
120 * flag == COMMON/ATTRIBUTE/IO
121 */
122 /* common window open */
123 ctrl_outw(0x8a84, MRSHPC_MW0CR1);
124 if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
125 /* common mode & bus width 16bit SWAP = 1*/
126 ctrl_outw(0x0b00, MRSHPC_MW0CR2);
127 else
128 /* common mode & bus width 16bit SWAP = 0*/
129 ctrl_outw(0x0300, MRSHPC_MW0CR2);
130
131 /* attribute window open */
132 ctrl_outw(0x8a85, MRSHPC_MW1CR1);
133 if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
134 /* attribute mode & bus width 16bit SWAP = 1*/
135 ctrl_outw(0x0a00, MRSHPC_MW1CR2);
136 else
137 /* attribute mode & bus width 16bit SWAP = 0*/
138 ctrl_outw(0x0200, MRSHPC_MW1CR2);
139
140 /* I/O window open */
141 ctrl_outw(0x8a86, MRSHPC_IOWCR1);
142 ctrl_outw(0x0008, MRSHPC_CDCR); /* I/O card mode */
143 if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
144 ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
145 else
146 ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
147
148 ctrl_outw(0x2000, MRSHPC_ICR);
149 ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
150 ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
151 return 0;
152}
153#else
154static int __init cf_init_se(void)
155{
156 return -1;
157}
158#endif
159
160static int __init cf_init(void)
161{
162 if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
163 return cf_init_se();
164
165 return cf_init_default();
166}
167
168__initcall (cf_init);
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index b7e46d5bba43..7b17137536d6 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -117,6 +117,11 @@ int clk_enable(struct clk *clk)
117 unsigned long flags; 117 unsigned long flags;
118 int ret; 118 int ret;
119 119
120 if (!clk)
121 return -EINVAL;
122
123 clk_enable(clk->parent);
124
120 spin_lock_irqsave(&clock_lock, flags); 125 spin_lock_irqsave(&clock_lock, flags);
121 ret = __clk_enable(clk); 126 ret = __clk_enable(clk);
122 spin_unlock_irqrestore(&clock_lock, flags); 127 spin_unlock_irqrestore(&clock_lock, flags);
@@ -147,9 +152,14 @@ void clk_disable(struct clk *clk)
147{ 152{
148 unsigned long flags; 153 unsigned long flags;
149 154
155 if (!clk)
156 return;
157
150 spin_lock_irqsave(&clock_lock, flags); 158 spin_lock_irqsave(&clock_lock, flags);
151 __clk_disable(clk); 159 __clk_disable(clk);
152 spin_unlock_irqrestore(&clock_lock, flags); 160 spin_unlock_irqrestore(&clock_lock, flags);
161
162 clk_disable(clk->parent);
153} 163}
154EXPORT_SYMBOL_GPL(clk_disable); 164EXPORT_SYMBOL_GPL(clk_disable);
155 165
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 75fb03d35670..d29e69c156f0 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -261,9 +261,11 @@ asmlinkage void __init sh_cpu_init(void)
261 cache_init(); 261 cache_init();
262 262
263 if (raw_smp_processor_id() == 0) { 263 if (raw_smp_processor_id() == 0) {
264#ifdef CONFIG_MMU
264 shm_align_mask = max_t(unsigned long, 265 shm_align_mask = max_t(unsigned long,
265 current_cpu_data.dcache.way_size - 1, 266 current_cpu_data.dcache.way_size - 1,
266 PAGE_SIZE - 1); 267 PAGE_SIZE - 1);
268#endif
267 269
268 /* Boot CPU sets the cache shape */ 270 /* Boot CPU sets the cache shape */
269 detect_cache_shape(); 271 detect_cache_shape();
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 428450cc0809..45f85c77ef75 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -8,9 +8,10 @@ common-y += ex.o entry.o
8 8
9obj-$(CONFIG_SH_FPU) += fpu.o 9obj-$(CONFIG_SH_FPU) += fpu.o
10 10
11obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7201) += setup-sh7201.o clock-sh7201.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o 15obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o
15 16
16# Pinmux setup 17# Pinmux setup
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
new file mode 100644
index 000000000000..020a96fe961a
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -0,0 +1,85 @@
1/*
2 * arch/sh/kernel/cpu/sh2a/clock-sh7201.c
3 *
4 * SH7201 support for the clock framework
5 *
6 * Copyright (C) 2008 Peter Griffin <pgriffin@mpc-data.co.uk>
7 *
8 * Based on clock-sh4.c
9 * Copyright (C) 2005 Paul Mundt
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <asm/clock.h>
18#include <asm/freq.h>
19#include <asm/io.h>
20
21const static int pll1rate[]={1,2,3,4,6,8};
22const static int pfc_divisors[]={1,2,3,4,6,8,12};
23#define ifc_divisors pfc_divisors
24
25#if (CONFIG_SH_CLK_MD == 0)
26#define PLL2 (4)
27#elif (CONFIG_SH_CLK_MD == 2)
28#define PLL2 (2)
29#elif (CONFIG_SH_CLK_MD == 3)
30#define PLL2 (1)
31#else
32#error "Illegal Clock Mode!"
33#endif
34
35static void master_clk_init(struct clk *clk)
36{
37 clk->rate = 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
38}
39
40static struct clk_ops sh7201_master_clk_ops = {
41 .init = master_clk_init,
42};
43
44static void module_clk_recalc(struct clk *clk)
45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007);
47 clk->rate = clk->parent->rate / pfc_divisors[idx];
48}
49
50static struct clk_ops sh7201_module_clk_ops = {
51 .recalc = module_clk_recalc,
52};
53
54static void bus_clk_recalc(struct clk *clk)
55{
56 int idx = (ctrl_inw(FREQCR) & 0x0007);
57 clk->rate = clk->parent->rate / pfc_divisors[idx];
58}
59
60static struct clk_ops sh7201_bus_clk_ops = {
61 .recalc = bus_clk_recalc,
62};
63
64static void cpu_clk_recalc(struct clk *clk)
65{
66 int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
67 clk->rate = clk->parent->rate / ifc_divisors[idx];
68}
69
70static struct clk_ops sh7201_cpu_clk_ops = {
71 .recalc = cpu_clk_recalc,
72};
73
74static struct clk_ops *sh7201_clk_ops[] = {
75 &sh7201_master_clk_ops,
76 &sh7201_module_clk_ops,
77 &sh7201_bus_clk_ops,
78 &sh7201_cpu_clk_ops,
79};
80
81void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
82{
83 if (idx < ARRAY_SIZE(sh7201_clk_ops))
84 *ops = sh7201_clk_ops[idx];
85}
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6e79132f6f30..e098e2f6aa08 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -18,16 +18,17 @@ int __init detect_cpu_and_cache_system(void)
18 /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ 18 /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
19 boot_cpu_data.flags |= CPU_HAS_OP32; 19 boot_cpu_data.flags |= CPU_HAS_OP32;
20 20
21#if defined(CONFIG_CPU_SUBTYPE_SH7203) 21#if defined(CONFIG_CPU_SUBTYPE_SH7201)
22 boot_cpu_data.type = CPU_SH7201;
23 boot_cpu_data.flags |= CPU_HAS_FPU;
24#elif defined(CONFIG_CPU_SUBTYPE_SH7203)
22 boot_cpu_data.type = CPU_SH7203; 25 boot_cpu_data.type = CPU_SH7203;
23 /* SH7203 has an FPU.. */
24 boot_cpu_data.flags |= CPU_HAS_FPU; 26 boot_cpu_data.flags |= CPU_HAS_FPU;
25#elif defined(CONFIG_CPU_SUBTYPE_SH7263) 27#elif defined(CONFIG_CPU_SUBTYPE_SH7263)
26 boot_cpu_data.type = CPU_SH7263; 28 boot_cpu_data.type = CPU_SH7263;
27 boot_cpu_data.flags |= CPU_HAS_FPU; 29 boot_cpu_data.flags |= CPU_HAS_FPU;
28#elif defined(CONFIG_CPU_SUBTYPE_SH7206) 30#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
29 boot_cpu_data.type = CPU_SH7206; 31 boot_cpu_data.type = CPU_SH7206;
30 /* While SH7206 has a DSP.. */
31 boot_cpu_data.flags |= CPU_HAS_DSP; 32 boot_cpu_data.flags |= CPU_HAS_DSP;
32#elif defined(CONFIG_CPU_SUBTYPE_MXG) 33#elif defined(CONFIG_CPU_SUBTYPE_MXG)
33 boot_cpu_data.type = CPU_MXG; 34 boot_cpu_data.type = CPU_MXG;
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
new file mode 100644
index 000000000000..0631e421c022
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -0,0 +1,331 @@
1/*
2 * SH7201 setup
3 *
4 * Copyright (C) 2008 Peter Griffin pgriffin@mpc-data.co.uk
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <linux/serial_sci.h>
14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
21 ADC_ADI,
22 MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
23 MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
24 MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
25 MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
26 MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
27 MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
28 MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
29 RTC_ARM, RTC_PRD, RTC_CUP,
30 WDT,
31 IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
32 IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
33 IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
34
35 DMAC0_DMINT0, DMAC1_DMINT1,
36 DMAC2_DMINT2, DMAC3_DMINT3,
37
38 SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
39 SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
40 SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
41 SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
42 SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,
43 SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,
44 SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,
45 SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,
46
47 DMAC0_DMINTA, DMAC4_DMINT4, DMAC5_DMINT5, DMAC6_DMINT6,
48 DMAC7_DMINT7,
49
50 RCAN0_ERS, RCAN0_OVR,
51 RCAN0_SLE,
52 RCAN0_RM0, RCAN0_RM1,
53
54 RCAN1_ERS, RCAN1_OVR,
55 RCAN1_SLE,
56 RCAN1_RM0, RCAN1_RM1,
57
58 SSI0_SSII, SSI1_SSII,
59
60 TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0,
61 TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1,
62
63 /* interrupt groups */
64
65 IRQ, PINT, ADC,
66 MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU,
67 MTU23_ABCD, MTU24_ABCD, MTU25_UVW,
68 RTC, IIC30, IIC31, IIC32,
69 SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
70 RCAN0, RCAN1, TMR0, TMR1
71
72};
73
74static struct intc_vect vectors[] __initdata = {
75 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
76 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
77 INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
78 INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
79 INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
80 INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
81 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
82 INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
83
84 INTC_IRQ(ADC_ADI, 92),
85
86 INTC_IRQ(MTU2_TGI0A, 108), INTC_IRQ(MTU2_TGI0B, 109),
87 INTC_IRQ(MTU2_TGI0C, 110), INTC_IRQ(MTU2_TGI0D, 111),
88 INTC_IRQ(MTU2_TCI0V, 112),
89 INTC_IRQ(MTU2_TGI0E, 113), INTC_IRQ(MTU2_TGI0F, 114),
90
91 INTC_IRQ(MTU2_TGI1A, 116), INTC_IRQ(MTU2_TGI1B, 117),
92 INTC_IRQ(MTU2_TCI1V, 120), INTC_IRQ(MTU2_TCI1U, 121),
93
94 INTC_IRQ(MTU2_TGI2A, 124), INTC_IRQ(MTU2_TGI2B, 125),
95 INTC_IRQ(MTU2_TCI2V, 128), INTC_IRQ(MTU2_TCI2U, 129),
96
97 INTC_IRQ(MTU2_TGI3A, 132), INTC_IRQ(MTU2_TGI3B, 133),
98 INTC_IRQ(MTU2_TGI3C, 134), INTC_IRQ(MTU2_TGI3D, 135),
99 INTC_IRQ(MTU2_TCI3V, 136),
100
101 INTC_IRQ(MTU2_TGI4A, 140), INTC_IRQ(MTU2_TGI4B, 141),
102 INTC_IRQ(MTU2_TGI4C, 142), INTC_IRQ(MTU2_TGI4D, 143),
103 INTC_IRQ(MTU2_TCI4V, 144),
104
105 INTC_IRQ(MTU2_TGI5U, 148), INTC_IRQ(MTU2_TGI5V, 149),
106 INTC_IRQ(MTU2_TGI5W, 150),
107
108 INTC_IRQ(RTC_ARM, 152), INTC_IRQ(RTC_PRD, 153),
109 INTC_IRQ(RTC_CUP, 154), INTC_IRQ(WDT, 156),
110
111 INTC_IRQ(IIC30_STPI, 157), INTC_IRQ(IIC30_NAKI, 158),
112 INTC_IRQ(IIC30_RXI, 159), INTC_IRQ(IIC30_TXI, 160),
113 INTC_IRQ(IIC30_TEI, 161),
114
115 INTC_IRQ(IIC31_STPI, 164), INTC_IRQ(IIC31_NAKI, 165),
116 INTC_IRQ(IIC31_RXI, 166), INTC_IRQ(IIC31_TXI, 167),
117 INTC_IRQ(IIC31_TEI, 168),
118
119 INTC_IRQ(IIC32_STPI, 170), INTC_IRQ(IIC32_NAKI, 171),
120 INTC_IRQ(IIC32_RXI, 172), INTC_IRQ(IIC32_TXI, 173),
121 INTC_IRQ(IIC32_TEI, 174),
122
123 INTC_IRQ(DMAC0_DMINT0, 176), INTC_IRQ(DMAC1_DMINT1, 177),
124 INTC_IRQ(DMAC2_DMINT2, 178), INTC_IRQ(DMAC3_DMINT3, 179),
125
126 INTC_IRQ(SCIF0_BRI, 180), INTC_IRQ(SCIF0_ERI, 181),
127 INTC_IRQ(SCIF0_RXI, 182), INTC_IRQ(SCIF0_TXI, 183),
128 INTC_IRQ(SCIF1_BRI, 184), INTC_IRQ(SCIF1_ERI, 185),
129 INTC_IRQ(SCIF1_RXI, 186), INTC_IRQ(SCIF1_TXI, 187),
130 INTC_IRQ(SCIF2_BRI, 188), INTC_IRQ(SCIF2_ERI, 189),
131 INTC_IRQ(SCIF2_RXI, 190), INTC_IRQ(SCIF2_TXI, 191),
132 INTC_IRQ(SCIF3_BRI, 192), INTC_IRQ(SCIF3_ERI, 193),
133 INTC_IRQ(SCIF3_RXI, 194), INTC_IRQ(SCIF3_TXI, 195),
134 INTC_IRQ(SCIF4_BRI, 196), INTC_IRQ(SCIF4_ERI, 197),
135 INTC_IRQ(SCIF4_RXI, 198), INTC_IRQ(SCIF4_TXI, 199),
136 INTC_IRQ(SCIF5_BRI, 200), INTC_IRQ(SCIF5_ERI, 201),
137 INTC_IRQ(SCIF5_RXI, 202), INTC_IRQ(SCIF5_TXI, 203),
138 INTC_IRQ(SCIF6_BRI, 204), INTC_IRQ(SCIF6_ERI, 205),
139 INTC_IRQ(SCIF6_RXI, 206), INTC_IRQ(SCIF6_TXI, 207),
140 INTC_IRQ(SCIF7_BRI, 208), INTC_IRQ(SCIF7_ERI, 209),
141 INTC_IRQ(SCIF7_RXI, 210), INTC_IRQ(SCIF7_TXI, 211),
142
143 INTC_IRQ(DMAC0_DMINTA, 212), INTC_IRQ(DMAC4_DMINT4, 216),
144 INTC_IRQ(DMAC5_DMINT5, 217), INTC_IRQ(DMAC6_DMINT6, 218),
145 INTC_IRQ(DMAC7_DMINT7, 219),
146
147 INTC_IRQ(RCAN0_ERS, 228), INTC_IRQ(RCAN0_OVR, 229),
148 INTC_IRQ(RCAN0_SLE, 230),
149 INTC_IRQ(RCAN0_RM0, 231), INTC_IRQ(RCAN0_RM1, 232),
150
151 INTC_IRQ(RCAN1_ERS, 234), INTC_IRQ(RCAN1_OVR, 235),
152 INTC_IRQ(RCAN1_SLE, 236),
153 INTC_IRQ(RCAN1_RM0, 237), INTC_IRQ(RCAN1_RM1, 238),
154
155 INTC_IRQ(SSI0_SSII, 244), INTC_IRQ(SSI1_SSII, 245),
156
157 INTC_IRQ(TMR0_CMIA0, 246), INTC_IRQ(TMR0_CMIB0, 247),
158 INTC_IRQ(TMR0_OVI0, 248),
159
160 INTC_IRQ(TMR1_CMIA1, 252), INTC_IRQ(TMR1_CMIB1, 253),
161 INTC_IRQ(TMR1_OVI1, 254),
162
163};
164
165static struct intc_group groups[] __initdata = {
166 INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
167 PINT4, PINT5, PINT6, PINT7),
168 INTC_GROUP(MTU20_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
169 INTC_GROUP(MTU20_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
170
171 INTC_GROUP(MTU21_AB, MTU2_TGI1A, MTU2_TGI1B),
172 INTC_GROUP(MTU21_VU, MTU2_TCI1V, MTU2_TCI1U),
173 INTC_GROUP(MTU22_AB, MTU2_TGI2A, MTU2_TGI2B),
174 INTC_GROUP(MTU22_VU, MTU2_TCI2V, MTU2_TCI2U),
175 INTC_GROUP(MTU23_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
176 INTC_GROUP(MTU24_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
177 INTC_GROUP(MTU25_UVW, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
178 INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP ),
179
180 INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
181 IIC30_TEI),
182 INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
183 IIC31_TEI),
184 INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
185 IIC32_TEI),
186
187 INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
188 INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
189 INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
190 INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
191 INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),
192 INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),
193 INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),
194 INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),
195
196 INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
197 RCAN0_SLE),
198 INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
199 RCAN1_SLE),
200
201 INTC_GROUP(TMR0, TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0),
202 INTC_GROUP(TMR1, TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1),
203};
204
205static struct intc_prio_reg prio_registers[] __initdata = {
206 { 0xfffe9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
207 { 0xfffe941a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
208 { 0xfffe9420, 0, 16, 4, /* IPR05 */ { PINT, 0, ADC_ADI, 0 } },
209 { 0xfffe9800, 0, 16, 4, /* IPR06 */ { 0, MTU20_ABCD, MTU20_VEF, MTU21_AB } },
210 { 0xfffe9802, 0, 16, 4, /* IPR07 */ { MTU21_VU, MTU22_AB, MTU22_VU, MTU23_ABCD } },
211 { 0xfffe9804, 0, 16, 4, /* IPR08 */ { MTU2_TCI3V, MTU24_ABCD, MTU2_TCI4V, MTU25_UVW } },
212
213 { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
214 { 0xfffe9808, 0, 16, 4, /* IPR10 */ { IIC31, IIC32, DMAC0_DMINT0, DMAC1_DMINT1 } },
215 { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0 , SCIF1 } },
216 { 0xfffe980c, 0, 16, 4, /* IPR12 */ { SCIF2, SCIF3, SCIF4, SCIF5 } },
217 { 0xfffe980e, 0, 16, 4, /* IPR13 */ { SCIF6, SCIF7, DMAC0_DMINTA, DMAC4_DMINT4 } },
218 { 0xfffe9810, 0, 16, 4, /* IPR14 */ { DMAC5_DMINT5, DMAC6_DMINT6, DMAC7_DMINT7, 0 } },
219 { 0xfffe9812, 0, 16, 4, /* IPR15 */ { 0, RCAN0, RCAN1, 0 } },
220 { 0xfffe9814, 0, 16, 4, /* IPR16 */ { SSI0_SSII, SSI1_SSII, TMR0, TMR1 } },
221};
222
223static struct intc_mask_reg mask_registers[] __initdata = {
224 { 0xfffe9408, 0, 16, /* PINTER */
225 { 0, 0, 0, 0, 0, 0, 0, 0,
226 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
227};
228
229static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
230 mask_registers, prio_registers, NULL);
231
232static struct plat_sci_port sci_platform_data[] = {
233 {
234 .mapbase = 0xfffe8000,
235 .flags = UPF_BOOT_AUTOCONF,
236 .type = PORT_SCIF,
237 .irqs = { 181, 182, 183, 180}
238 }, {
239 .mapbase = 0xfffe8800,
240 .flags = UPF_BOOT_AUTOCONF,
241 .type = PORT_SCIF,
242 .irqs = { 185, 186, 187, 184}
243 }, {
244 .mapbase = 0xfffe9000,
245 .flags = UPF_BOOT_AUTOCONF,
246 .type = PORT_SCIF,
247 .irqs = { 189, 186, 187, 188}
248 }, {
249 .mapbase = 0xfffe9800,
250 .flags = UPF_BOOT_AUTOCONF,
251 .type = PORT_SCIF,
252 .irqs = { 193, 194, 195, 192}
253 }, {
254 .mapbase = 0xfffea000,
255 .flags = UPF_BOOT_AUTOCONF,
256 .type = PORT_SCIF,
257 .irqs = { 196, 198, 199, 196}
258 }, {
259 .mapbase = 0xfffea800,
260 .flags = UPF_BOOT_AUTOCONF,
261 .type = PORT_SCIF,
262 .irqs = { 201, 202, 203, 200}
263 }, {
264 .mapbase = 0xfffeb000,
265 .flags = UPF_BOOT_AUTOCONF,
266 .type = PORT_SCIF,
267 .irqs = { 205, 206, 207, 204}
268 }, {
269 .mapbase = 0xfffeb800,
270 .flags = UPF_BOOT_AUTOCONF,
271 .type = PORT_SCIF,
272 .irqs = { 209, 210, 211, 208}
273 }, {
274 .flags = 0,
275 }
276};
277
278static struct platform_device sci_device = {
279 .name = "sh-sci",
280 .id = -1,
281 .dev = {
282 .platform_data = sci_platform_data,
283 },
284};
285
286static struct resource rtc_resources[] = {
287 [0] = {
288 .start = 0xffff0800,
289 .end = 0xffff2000 + 0x58 - 1,
290 .flags = IORESOURCE_IO,
291 },
292 [1] = {
293 /* Period IRQ */
294 .start = 153,
295 .flags = IORESOURCE_IRQ,
296 },
297 [2] = {
298 /* Carry IRQ */
299 .start = 154,
300 .flags = IORESOURCE_IRQ,
301 },
302 [3] = {
303 /* Alarm IRQ */
304 .start = 152,
305 .flags = IORESOURCE_IRQ,
306 },
307};
308
309static struct platform_device rtc_device = {
310 .name = "sh-rtc",
311 .id = -1,
312 .num_resources = ARRAY_SIZE(rtc_resources),
313 .resource = rtc_resources,
314};
315
316static struct platform_device *sh7201_devices[] __initdata = {
317 &sci_device,
318 &rtc_device,
319};
320
321static int __init sh7201_devices_setup(void)
322{
323 return platform_add_devices(sh7201_devices,
324 ARRAY_SIZE(sh7201_devices));
325}
326__initcall(sh7201_devices_setup);
327
328void __init plat_irq_setup(void)
329{
330 register_intc_controller(&intc_desc);
331}
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 3fe482dd05c1..b4106d0c68ec 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -52,7 +52,7 @@
52 * syscall # 52 * syscall #
53 * 53 *
54 */ 54 */
55#if defined(CONFIG_KGDB_NMI) 55#if defined(CONFIG_KGDB)
56NMI_VEC = 0x1c0 ! Must catch early for debounce 56NMI_VEC = 0x1c0 ! Must catch early for debounce
57#endif 57#endif
58 58
@@ -307,7 +307,7 @@ skip_restore:
3076: or k0, k2 ! Set the IMASK-bits 3076: or k0, k2 ! Set the IMASK-bits
308 ldc k2, ssr 308 ldc k2, ssr
309 ! 309 !
310#if defined(CONFIG_KGDB_NMI) 310#if defined(CONFIG_KGDB)
311 ! Clear in_nmi 311 ! Clear in_nmi
312 mov.l 6f, k0 312 mov.l 6f, k0
313 mov #0, k1 313 mov #0, k1
@@ -320,7 +320,7 @@ skip_restore:
320 320
321 .align 2 321 .align 2
3225: .long 0x00001000 ! DSP 3225: .long 0x00001000 ! DSP
323#ifdef CONFIG_KGDB_NMI 323#ifdef CONFIG_KGDB
3246: .long in_nmi 3246: .long in_nmi
325#endif 325#endif
3267: .long 0x30000000 3267: .long 0x30000000
@@ -376,9 +376,9 @@ tlb_miss:
376! 376!
377 .balign 512,0,512 377 .balign 512,0,512
378interrupt: 378interrupt:
379 mov.l 2f, k2
380 mov.l 3f, k3 379 mov.l 3f, k3
381#if defined(CONFIG_KGDB_NMI) 380#if defined(CONFIG_KGDB)
381 mov.l 2f, k2
382 ! Debounce (filter nested NMI) 382 ! Debounce (filter nested NMI)
383 mov.l @k2, k0 383 mov.l @k2, k0
384 mov.l 5f, k1 384 mov.l 5f, k1
@@ -390,16 +390,16 @@ interrupt:
390 rte 390 rte
391 nop 391 nop
392 .align 2 392 .align 2
3932: .long INTEVT
3935: .long NMI_VEC 3945: .long NMI_VEC
3946: .long in_nmi 3956: .long in_nmi
3950: 3960:
396#endif /* defined(CONFIG_KGDB_NMI) */ 397#endif /* defined(CONFIG_KGDB) */
397 bra handle_exception 398 bra handle_exception
398 mov #-1, k2 ! interrupt exception marker 399 mov #-1, k2 ! interrupt exception marker
399 400
400 .align 2 401 .align 2
4011: .long EXPEVT 4021: .long EXPEVT
4022: .long INTEVT
4033: .long ret_from_irq 4033: .long ret_from_irq
4044: .long ret_from_exception 4044: .long ret_from_exception
405 405
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index dac429726899..e5a0de39a2db 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -26,7 +26,7 @@
26#define fpu_error_trap_handler exception_error 26#define fpu_error_trap_handler exception_error
27#endif 27#endif
28 28
29#if !defined(CONFIG_KGDB_NMI) 29#if !defined(CONFIG_KGDB)
30#define kgdb_handle_exception exception_error 30#define kgdb_handle_exception exception_error
31#endif 31#endif
32 32
diff --git a/arch/sh/kernel/cpu/sh4/softfloat.c b/arch/sh/kernel/cpu/sh4/softfloat.c
index 2b747f3b02bd..42edf2e54e85 100644
--- a/arch/sh/kernel/cpu/sh4/softfloat.c
+++ b/arch/sh/kernel/cpu/sh4/softfloat.c
@@ -37,6 +37,7 @@
37 */ 37 */
38#include <linux/kernel.h> 38#include <linux/kernel.h>
39#include <cpu/fpu.h> 39#include <cpu/fpu.h>
40#include <asm/div64.h>
40 41
41#define LIT64( a ) a##LL 42#define LIT64( a ) a##LL
42 43
@@ -67,16 +68,16 @@ typedef unsigned long long float64;
67extern void float_raise(unsigned int flags); /* in fpu.c */ 68extern void float_raise(unsigned int flags); /* in fpu.c */
68extern int float_rounding_mode(void); /* in fpu.c */ 69extern int float_rounding_mode(void); /* in fpu.c */
69 70
70inline bits64 extractFloat64Frac(float64 a); 71bits64 extractFloat64Frac(float64 a);
71inline flag extractFloat64Sign(float64 a); 72flag extractFloat64Sign(float64 a);
72inline int16 extractFloat64Exp(float64 a); 73int16 extractFloat64Exp(float64 a);
73inline int16 extractFloat32Exp(float32 a); 74int16 extractFloat32Exp(float32 a);
74inline flag extractFloat32Sign(float32 a); 75flag extractFloat32Sign(float32 a);
75inline bits32 extractFloat32Frac(float32 a); 76bits32 extractFloat32Frac(float32 a);
76inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig); 77float64 packFloat64(flag zSign, int16 zExp, bits64 zSig);
77inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr); 78void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
78inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig); 79float32 packFloat32(flag zSign, int16 zExp, bits32 zSig);
79inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr); 80void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
80float64 float64_sub(float64 a, float64 b); 81float64 float64_sub(float64 a, float64 b);
81float32 float32_sub(float32 a, float32 b); 82float32 float32_sub(float32 a, float32 b);
82float32 float32_add(float32 a, float32 b); 83float32 float32_add(float32 a, float32 b);
@@ -86,11 +87,11 @@ float32 float32_div(float32 a, float32 b);
86float32 float32_mul(float32 a, float32 b); 87float32 float32_mul(float32 a, float32 b);
87float64 float64_mul(float64 a, float64 b); 88float64 float64_mul(float64 a, float64 b);
88float32 float64_to_float32(float64 a); 89float32 float64_to_float32(float64 a);
89inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, 90void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
90 bits64 * z1Ptr); 91 bits64 * z1Ptr);
91inline void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, 92void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
92 bits64 * z1Ptr); 93 bits64 * z1Ptr);
93inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr); 94void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr);
94 95
95static int8 countLeadingZeros32(bits32 a); 96static int8 countLeadingZeros32(bits32 a);
96static int8 countLeadingZeros64(bits64 a); 97static int8 countLeadingZeros64(bits64 a);
@@ -110,42 +111,42 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b);
110static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr, 111static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr,
111 bits32 * zSigPtr); 112 bits32 * zSigPtr);
112 113
113inline bits64 extractFloat64Frac(float64 a) 114bits64 extractFloat64Frac(float64 a)
114{ 115{
115 return a & LIT64(0x000FFFFFFFFFFFFF); 116 return a & LIT64(0x000FFFFFFFFFFFFF);
116} 117}
117 118
118inline flag extractFloat64Sign(float64 a) 119flag extractFloat64Sign(float64 a)
119{ 120{
120 return a >> 63; 121 return a >> 63;
121} 122}
122 123
123inline int16 extractFloat64Exp(float64 a) 124int16 extractFloat64Exp(float64 a)
124{ 125{
125 return (a >> 52) & 0x7FF; 126 return (a >> 52) & 0x7FF;
126} 127}
127 128
128inline int16 extractFloat32Exp(float32 a) 129int16 extractFloat32Exp(float32 a)
129{ 130{
130 return (a >> 23) & 0xFF; 131 return (a >> 23) & 0xFF;
131} 132}
132 133
133inline flag extractFloat32Sign(float32 a) 134flag extractFloat32Sign(float32 a)
134{ 135{
135 return a >> 31; 136 return a >> 31;
136} 137}
137 138
138inline bits32 extractFloat32Frac(float32 a) 139bits32 extractFloat32Frac(float32 a)
139{ 140{
140 return a & 0x007FFFFF; 141 return a & 0x007FFFFF;
141} 142}
142 143
143inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig) 144float64 packFloat64(flag zSign, int16 zExp, bits64 zSig)
144{ 145{
145 return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig; 146 return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig;
146} 147}
147 148
148inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr) 149void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr)
149{ 150{
150 bits64 z; 151 bits64 z;
151 152
@@ -338,12 +339,12 @@ static float64 addFloat64Sigs(float64 a, float64 b, flag zSign)
338 339
339} 340}
340 341
341inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig) 342float32 packFloat32(flag zSign, int16 zExp, bits32 zSig)
342{ 343{
343 return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig; 344 return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig;
344} 345}
345 346
346inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr) 347void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr)
347{ 348{
348 bits32 z; 349 bits32 z;
349 if (count == 0) { 350 if (count == 0) {
@@ -634,7 +635,7 @@ normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, bits64 * zSigPtr)
634 *zExpPtr = 1 - shiftCount; 635 *zExpPtr = 1 - shiftCount;
635} 636}
636 637
637inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, 638void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
638 bits64 * z1Ptr) 639 bits64 * z1Ptr)
639{ 640{
640 bits64 z1; 641 bits64 z1;
@@ -644,7 +645,7 @@ inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
644 *z0Ptr = a0 + b0 + (z1 < a1); 645 *z0Ptr = a0 + b0 + (z1 < a1);
645} 646}
646 647
647inline void 648void
648sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, 649sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
649 bits64 * z1Ptr) 650 bits64 * z1Ptr)
650{ 651{
@@ -656,11 +657,14 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b)
656{ 657{
657 bits64 b0, b1; 658 bits64 b0, b1;
658 bits64 rem0, rem1, term0, term1; 659 bits64 rem0, rem1, term0, term1;
659 bits64 z; 660 bits64 z, tmp;
660 if (b <= a0) 661 if (b <= a0)
661 return LIT64(0xFFFFFFFFFFFFFFFF); 662 return LIT64(0xFFFFFFFFFFFFFFFF);
662 b0 = b >> 32; 663 b0 = b >> 32;
663 z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : (a0 / b0) << 32; 664 tmp = a0;
665 do_div(tmp, b0);
666
667 z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : tmp << 32;
664 mul64To128(b, z, &term0, &term1); 668 mul64To128(b, z, &term0, &term1);
665 sub128(a0, a1, term0, term1, &rem0, &rem1); 669 sub128(a0, a1, term0, term1, &rem0, &rem1);
666 while (((sbits64) rem0) < 0) { 670 while (((sbits64) rem0) < 0) {
@@ -669,11 +673,13 @@ static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b)
669 add128(rem0, rem1, b0, b1, &rem0, &rem1); 673 add128(rem0, rem1, b0, b1, &rem0, &rem1);
670 } 674 }
671 rem0 = (rem0 << 32) | (rem1 >> 32); 675 rem0 = (rem0 << 32) | (rem1 >> 32);
672 z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : rem0 / b0; 676 tmp = rem0;
677 do_div(tmp, b0);
678 z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : tmp;
673 return z; 679 return z;
674} 680}
675 681
676inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr) 682void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr)
677{ 683{
678 bits32 aHigh, aLow, bHigh, bLow; 684 bits32 aHigh, aLow, bHigh, bLow;
679 bits64 z0, zMiddleA, zMiddleB, z1; 685 bits64 z0, zMiddleA, zMiddleB, z1;
@@ -769,7 +775,8 @@ float32 float32_div(float32 a, float32 b)
769{ 775{
770 flag aSign, bSign, zSign; 776 flag aSign, bSign, zSign;
771 int16 aExp, bExp, zExp; 777 int16 aExp, bExp, zExp;
772 bits32 aSig, bSig, zSig; 778 bits32 aSig, bSig;
779 uint64_t zSig;
773 780
774 aSig = extractFloat32Frac(a); 781 aSig = extractFloat32Frac(a);
775 aExp = extractFloat32Exp(a); 782 aExp = extractFloat32Exp(a);
@@ -804,11 +811,13 @@ float32 float32_div(float32 a, float32 b)
804 aSig >>= 1; 811 aSig >>= 1;
805 ++zExp; 812 ++zExp;
806 } 813 }
807 zSig = (((bits64) aSig) << 32) / bSig; 814 zSig = (((bits64) aSig) << 32);
815 do_div(zSig, bSig);
816
808 if ((zSig & 0x3F) == 0) { 817 if ((zSig & 0x3F) == 0) {
809 zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32); 818 zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32);
810 } 819 }
811 return roundAndPackFloat32(zSign, zExp, zSig); 820 return roundAndPackFloat32(zSign, zExp, (bits32)zSig);
812 821
813} 822}
814 823
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index db913855c2fd..0e174af21874 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -229,7 +229,7 @@ struct frqcr_context sh7722_get_clk_context(const char *name)
229} 229}
230 230
231/** 231/**
232 * sh7722_find_divisors - find divisor for setting rate 232 * sh7722_find_div_index - find divisor for setting rate
233 * 233 *
234 * All sh7722 clocks use the same set of multipliers/divisors. This function 234 * All sh7722 clocks use the same set of multipliers/divisors. This function
235 * chooses correct divisor to set the rate of clock with parent clock that 235 * chooses correct divisor to set the rate of clock with parent clock that
@@ -238,7 +238,7 @@ struct frqcr_context sh7722_get_clk_context(const char *name)
238 * @parent_rate: rate of parent clock 238 * @parent_rate: rate of parent clock
239 * @rate: requested rate to be set 239 * @rate: requested rate to be set
240 */ 240 */
241static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate) 241static int sh7722_find_div_index(unsigned long parent_rate, unsigned rate)
242{ 242{
243 unsigned div2 = parent_rate * 2 / rate; 243 unsigned div2 = parent_rate * 2 / rate;
244 int index; 244 int index;
@@ -247,12 +247,12 @@ static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate)
247 return -EINVAL; 247 return -EINVAL;
248 248
249 for (index = 1; index < ARRAY_SIZE(divisors2); index++) { 249 for (index = 1; index < ARRAY_SIZE(divisors2); index++) {
250 if (div2 > divisors2[index] && div2 <= divisors2[index]) 250 if (div2 > divisors2[index - 1] && div2 <= divisors2[index])
251 break; 251 break;
252 } 252 }
253 if (index >= ARRAY_SIZE(divisors2)) 253 if (index >= ARRAY_SIZE(divisors2))
254 index = ARRAY_SIZE(divisors2) - 1; 254 index = ARRAY_SIZE(divisors2) - 1;
255 return divisors2[index]; 255 return index;
256} 256}
257 257
258static void sh7722_frqcr_recalc(struct clk *clk) 258static void sh7722_frqcr_recalc(struct clk *clk)
@@ -279,12 +279,12 @@ static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
279 return -EINVAL; 279 return -EINVAL;
280 280
281 /* look for multiplier/divisor pair */ 281 /* look for multiplier/divisor pair */
282 div = sh7722_find_divisors(parent_rate, rate); 282 div = sh7722_find_div_index(parent_rate, rate);
283 if (div<0) 283 if (div<0)
284 return div; 284 return div;
285 285
286 /* calculate new value of clock rate */ 286 /* calculate new value of clock rate */
287 clk->rate = parent_rate * 2 / div; 287 clk->rate = parent_rate * 2 / divisors2[div];
288 frqcr = ctrl_inl(FRQCR); 288 frqcr = ctrl_inl(FRQCR);
289 289
290 /* FIXME: adjust as algo_id specifies */ 290 /* FIXME: adjust as algo_id specifies */
@@ -353,7 +353,7 @@ static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
353 int part_div; 353 int part_div;
354 354
355 if (likely(!err)) { 355 if (likely(!err)) {
356 part_div = sh7722_find_divisors(parent_rate, 356 part_div = sh7722_find_div_index(parent_rate,
357 rate); 357 rate);
358 if (part_div > 0) { 358 if (part_div > 0) {
359 part_ctx = sh7722_get_clk_context( 359 part_ctx = sh7722_get_clk_context(
@@ -394,12 +394,12 @@ static long sh7722_frqcr_round_rate(struct clk *clk, unsigned long rate)
394 int div; 394 int div;
395 395
396 /* look for multiplier/divisor pair */ 396 /* look for multiplier/divisor pair */
397 div = sh7722_find_divisors(parent_rate, rate); 397 div = sh7722_find_div_index(parent_rate, rate);
398 if (div < 0) 398 if (div < 0)
399 return clk->rate; 399 return clk->rate;
400 400
401 /* calculate new value of clock rate */ 401 /* calculate new value of clock rate */
402 return parent_rate * 2 / div; 402 return parent_rate * 2 / divisors2[div];
403} 403}
404 404
405static struct clk_ops sh7722_frqcr_clk_ops = { 405static struct clk_ops sh7722_frqcr_clk_ops = {
@@ -421,7 +421,7 @@ static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
421 int div; 421 int div;
422 422
423 r = ctrl_inl(clk->arch_flags); 423 r = ctrl_inl(clk->arch_flags);
424 div = sh7722_find_divisors(clk->parent->rate, rate); 424 div = sh7722_find_div_index(clk->parent->rate, rate);
425 if (div < 0) 425 if (div < 0)
426 return div; 426 return div;
427 r = (r & ~0xF) | div; 427 r = (r & ~0xF) | div;
@@ -516,16 +516,19 @@ static struct clk_ops sh7722_video_clk_ops = {
516static struct clk sh7722_umem_clock = { 516static struct clk sh7722_umem_clock = {
517 .name = "umem_clk", 517 .name = "umem_clk",
518 .ops = &sh7722_frqcr_clk_ops, 518 .ops = &sh7722_frqcr_clk_ops,
519 .flags = CLK_RATE_PROPAGATES,
519}; 520};
520 521
521static struct clk sh7722_sh_clock = { 522static struct clk sh7722_sh_clock = {
522 .name = "sh_clk", 523 .name = "sh_clk",
523 .ops = &sh7722_frqcr_clk_ops, 524 .ops = &sh7722_frqcr_clk_ops,
525 .flags = CLK_RATE_PROPAGATES,
524}; 526};
525 527
526static struct clk sh7722_peripheral_clock = { 528static struct clk sh7722_peripheral_clock = {
527 .name = "peripheral_clk", 529 .name = "peripheral_clk",
528 .ops = &sh7722_frqcr_clk_ops, 530 .ops = &sh7722_frqcr_clk_ops,
531 .flags = CLK_RATE_PROPAGATES,
529}; 532};
530 533
531static struct clk sh7722_sdram_clock = { 534static struct clk sh7722_sdram_clock = {
@@ -533,6 +536,11 @@ static struct clk sh7722_sdram_clock = {
533 .ops = &sh7722_frqcr_clk_ops, 536 .ops = &sh7722_frqcr_clk_ops,
534}; 537};
535 538
539static struct clk sh7722_r_clock = {
540 .name = "r_clk",
541 .rate = 32768,
542 .flags = CLK_RATE_PROPAGATES,
543};
536 544
537#ifndef CONFIG_CPU_SUBTYPE_SH7343 545#ifndef CONFIG_CPU_SUBTYPE_SH7343
538 546
@@ -567,12 +575,30 @@ static struct clk sh7722_video_clock = {
567 .ops = &sh7722_video_clk_ops, 575 .ops = &sh7722_video_clk_ops,
568}; 576};
569 577
570static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg, 578#define MSTPCR_ARCH_FLAGS(reg, bit) (((reg) << 8) | (bit))
571 int enable) 579#define MSTPCR_ARCH_FLAGS_REG(value) ((value) >> 8)
580#define MSTPCR_ARCH_FLAGS_BIT(value) ((value) & 0xff)
581
582static int sh7722_mstpcr_start_stop(struct clk *clk, int enable)
572{ 583{
573 unsigned long bit = clk->arch_flags; 584 unsigned long bit = MSTPCR_ARCH_FLAGS_BIT(clk->arch_flags);
585 unsigned long reg;
574 unsigned long r; 586 unsigned long r;
575 587
588 switch(MSTPCR_ARCH_FLAGS_REG(clk->arch_flags)) {
589 case 0:
590 reg = MSTPCR0;
591 break;
592 case 1:
593 reg = MSTPCR1;
594 break;
595 case 2:
596 reg = MSTPCR2;
597 break;
598 default:
599 return -EINVAL;
600 }
601
576 r = ctrl_inl(reg); 602 r = ctrl_inl(reg);
577 603
578 if (enable) 604 if (enable)
@@ -584,96 +610,175 @@ static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg,
584 return 0; 610 return 0;
585} 611}
586 612
587static void sh7722_mstpcr0_enable(struct clk *clk) 613static void sh7722_mstpcr_enable(struct clk *clk)
588{
589 sh7722_mstpcr_start_stop(clk, MSTPCR0, 1);
590}
591
592static void sh7722_mstpcr0_disable(struct clk *clk)
593{
594 sh7722_mstpcr_start_stop(clk, MSTPCR0, 0);
595}
596
597static void sh7722_mstpcr1_enable(struct clk *clk)
598{
599 sh7722_mstpcr_start_stop(clk, MSTPCR1, 1);
600}
601
602static void sh7722_mstpcr1_disable(struct clk *clk)
603{ 614{
604 sh7722_mstpcr_start_stop(clk, MSTPCR1, 0); 615 sh7722_mstpcr_start_stop(clk, 1);
605} 616}
606 617
607static void sh7722_mstpcr2_enable(struct clk *clk) 618static void sh7722_mstpcr_disable(struct clk *clk)
608{ 619{
609 sh7722_mstpcr_start_stop(clk, MSTPCR2, 1); 620 sh7722_mstpcr_start_stop(clk, 0);
610} 621}
611 622
612static void sh7722_mstpcr2_disable(struct clk *clk) 623static void sh7722_mstpcr_recalc(struct clk *clk)
613{ 624{
614 sh7722_mstpcr_start_stop(clk, MSTPCR2, 0); 625 if (clk->parent)
626 clk->rate = clk->parent->rate;
615} 627}
616 628
617static struct clk_ops sh7722_mstpcr0_clk_ops = { 629static struct clk_ops sh7722_mstpcr_clk_ops = {
618 .enable = sh7722_mstpcr0_enable, 630 .enable = sh7722_mstpcr_enable,
619 .disable = sh7722_mstpcr0_disable, 631 .disable = sh7722_mstpcr_disable,
620}; 632 .recalc = sh7722_mstpcr_recalc,
621
622static struct clk_ops sh7722_mstpcr1_clk_ops = {
623 .enable = sh7722_mstpcr1_enable,
624 .disable = sh7722_mstpcr1_disable,
625}; 633};
626 634
627static struct clk_ops sh7722_mstpcr2_clk_ops = { 635#define MSTPCR(_name, _parent, regnr, bitnr) \
628 .enable = sh7722_mstpcr2_enable, 636{ \
629 .disable = sh7722_mstpcr2_disable, 637 .name = _name, \
630}; 638 .arch_flags = MSTPCR_ARCH_FLAGS(regnr, bitnr), \
631 639 .ops = (void *)_parent, \
632#define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \
633{ \
634 .name = "mstp" __stringify(regnr) bitstr, \
635 .arch_flags = bitnr, \
636 .ops = &sh7722_mstpcr ## regnr ## _clk_ops, \
637} 640}
638 641
639#define DECLARE_MSTPCR(regnr) \ 642static struct clk sh7722_mstpcr_clocks[] = {
640 DECLARE_MSTPCRN(regnr, 31, "31"), \ 643#if defined(CONFIG_CPU_SUBTYPE_SH7722)
641 DECLARE_MSTPCRN(regnr, 30, "30"), \ 644 MSTPCR("uram0", "umem_clk", 0, 28),
642 DECLARE_MSTPCRN(regnr, 29, "29"), \ 645 MSTPCR("xymem0", "bus_clk", 0, 26),
643 DECLARE_MSTPCRN(regnr, 28, "28"), \ 646 MSTPCR("tmu0", "peripheral_clk", 0, 15),
644 DECLARE_MSTPCRN(regnr, 27, "27"), \ 647 MSTPCR("cmt0", "r_clk", 0, 14),
645 DECLARE_MSTPCRN(regnr, 26, "26"), \ 648 MSTPCR("rwdt0", "r_clk", 0, 13),
646 DECLARE_MSTPCRN(regnr, 25, "25"), \ 649 MSTPCR("flctl0", "peripheral_clk", 0, 10),
647 DECLARE_MSTPCRN(regnr, 24, "24"), \ 650 MSTPCR("scif0", "peripheral_clk", 0, 7),
648 DECLARE_MSTPCRN(regnr, 23, "23"), \ 651 MSTPCR("scif1", "peripheral_clk", 0, 6),
649 DECLARE_MSTPCRN(regnr, 22, "22"), \ 652 MSTPCR("scif2", "peripheral_clk", 0, 5),
650 DECLARE_MSTPCRN(regnr, 21, "21"), \ 653 MSTPCR("i2c0", "peripheral_clk", 1, 9),
651 DECLARE_MSTPCRN(regnr, 20, "20"), \ 654 MSTPCR("rtc0", "r_clk", 1, 8),
652 DECLARE_MSTPCRN(regnr, 19, "19"), \ 655 MSTPCR("sdhi0", "peripheral_clk", 2, 18),
653 DECLARE_MSTPCRN(regnr, 18, "18"), \ 656 MSTPCR("keysc0", "r_clk", 2, 14),
654 DECLARE_MSTPCRN(regnr, 17, "17"), \ 657 MSTPCR("usbf0", "peripheral_clk", 2, 11),
655 DECLARE_MSTPCRN(regnr, 16, "16"), \ 658 MSTPCR("2dg0", "bus_clk", 2, 9),
656 DECLARE_MSTPCRN(regnr, 15, "15"), \ 659 MSTPCR("siu0", "bus_clk", 2, 8),
657 DECLARE_MSTPCRN(regnr, 14, "14"), \ 660 MSTPCR("vou0", "bus_clk", 2, 5),
658 DECLARE_MSTPCRN(regnr, 13, "13"), \ 661 MSTPCR("jpu0", "bus_clk", 2, 6),
659 DECLARE_MSTPCRN(regnr, 12, "12"), \ 662 MSTPCR("beu0", "bus_clk", 2, 4),
660 DECLARE_MSTPCRN(regnr, 11, "11"), \ 663 MSTPCR("ceu0", "bus_clk", 2, 3),
661 DECLARE_MSTPCRN(regnr, 10, "10"), \ 664 MSTPCR("veu0", "bus_clk", 2, 2),
662 DECLARE_MSTPCRN(regnr, 9, "09"), \ 665 MSTPCR("vpu0", "bus_clk", 2, 1),
663 DECLARE_MSTPCRN(regnr, 8, "08"), \ 666 MSTPCR("lcdc0", "bus_clk", 2, 0),
664 DECLARE_MSTPCRN(regnr, 7, "07"), \ 667#endif
665 DECLARE_MSTPCRN(regnr, 6, "06"), \ 668#if defined(CONFIG_CPU_SUBTYPE_SH7723)
666 DECLARE_MSTPCRN(regnr, 5, "05"), \ 669 /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
667 DECLARE_MSTPCRN(regnr, 4, "04"), \ 670 MSTPCR("tlb0", "cpu_clk", 0, 31),
668 DECLARE_MSTPCRN(regnr, 3, "03"), \ 671 MSTPCR("ic0", "cpu_clk", 0, 30),
669 DECLARE_MSTPCRN(regnr, 2, "02"), \ 672 MSTPCR("oc0", "cpu_clk", 0, 29),
670 DECLARE_MSTPCRN(regnr, 1, "01"), \ 673 MSTPCR("l2c0", "sh_clk", 0, 28),
671 DECLARE_MSTPCRN(regnr, 0, "00") 674 MSTPCR("ilmem0", "cpu_clk", 0, 27),
672 675 MSTPCR("fpu0", "cpu_clk", 0, 24),
673static struct clk sh7722_mstpcr[] = { 676 MSTPCR("intc0", "cpu_clk", 0, 22),
674 DECLARE_MSTPCR(0), 677 MSTPCR("dmac0", "bus_clk", 0, 21),
675 DECLARE_MSTPCR(1), 678 MSTPCR("sh0", "sh_clk", 0, 20),
676 DECLARE_MSTPCR(2), 679 MSTPCR("hudi0", "peripheral_clk", 0, 19),
680 MSTPCR("ubc0", "cpu_clk", 0, 17),
681 MSTPCR("tmu0", "peripheral_clk", 0, 15),
682 MSTPCR("cmt0", "r_clk", 0, 14),
683 MSTPCR("rwdt0", "r_clk", 0, 13),
684 MSTPCR("dmac1", "bus_clk", 0, 12),
685 MSTPCR("tmu1", "peripheral_clk", 0, 11),
686 MSTPCR("flctl0", "peripheral_clk", 0, 10),
687 MSTPCR("scif0", "peripheral_clk", 0, 9),
688 MSTPCR("scif1", "peripheral_clk", 0, 8),
689 MSTPCR("scif2", "peripheral_clk", 0, 7),
690 MSTPCR("scif3", "bus_clk", 0, 6),
691 MSTPCR("scif4", "bus_clk", 0, 5),
692 MSTPCR("scif5", "bus_clk", 0, 4),
693 MSTPCR("msiof0", "bus_clk", 0, 2),
694 MSTPCR("msiof1", "bus_clk", 0, 1),
695 MSTPCR("meram0", "sh_clk", 0, 0),
696 MSTPCR("i2c0", "peripheral_clk", 1, 9),
697 MSTPCR("rtc0", "r_clk", 1, 8),
698 MSTPCR("atapi0", "sh_clk", 2, 28),
699 MSTPCR("adc0", "peripheral_clk", 2, 28),
700 MSTPCR("tpu0", "bus_clk", 2, 25),
701 MSTPCR("irda0", "peripheral_clk", 2, 24),
702 MSTPCR("tsif0", "bus_clk", 2, 22),
703 MSTPCR("icb0", "bus_clk", 2, 21),
704 MSTPCR("sdhi0", "bus_clk", 2, 18),
705 MSTPCR("sdhi1", "bus_clk", 2, 17),
706 MSTPCR("keysc0", "r_clk", 2, 14),
707 MSTPCR("usb0", "bus_clk", 2, 11),
708 MSTPCR("2dg0", "bus_clk", 2, 10),
709 MSTPCR("siu0", "bus_clk", 2, 8),
710 MSTPCR("veu1", "bus_clk", 2, 6),
711 MSTPCR("vou0", "bus_clk", 2, 5),
712 MSTPCR("beu0", "bus_clk", 2, 4),
713 MSTPCR("ceu0", "bus_clk", 2, 3),
714 MSTPCR("veu0", "bus_clk", 2, 2),
715 MSTPCR("vpu0", "bus_clk", 2, 1),
716 MSTPCR("lcdc0", "bus_clk", 2, 0),
717#endif
718#if defined(CONFIG_CPU_SUBTYPE_SH7343)
719 MSTPCR("uram0", "umem_clk", 0, 28),
720 MSTPCR("xymem0", "bus_clk", 0, 26),
721 MSTPCR("tmu0", "peripheral_clk", 0, 15),
722 MSTPCR("cmt0", "r_clk", 0, 14),
723 MSTPCR("rwdt0", "r_clk", 0, 13),
724 MSTPCR("scif0", "peripheral_clk", 0, 7),
725 MSTPCR("scif1", "peripheral_clk", 0, 6),
726 MSTPCR("scif2", "peripheral_clk", 0, 5),
727 MSTPCR("scif3", "peripheral_clk", 0, 4),
728 MSTPCR("i2c0", "peripheral_clk", 1, 9),
729 MSTPCR("i2c1", "peripheral_clk", 1, 8),
730 MSTPCR("sdhi0", "peripheral_clk", 2, 18),
731 MSTPCR("keysc0", "r_clk", 2, 14),
732 MSTPCR("usbf0", "peripheral_clk", 2, 11),
733 MSTPCR("siu0", "bus_clk", 2, 8),
734 MSTPCR("jpu0", "bus_clk", 2, 6),
735 MSTPCR("vou0", "bus_clk", 2, 5),
736 MSTPCR("beu0", "bus_clk", 2, 4),
737 MSTPCR("ceu0", "bus_clk", 2, 3),
738 MSTPCR("veu0", "bus_clk", 2, 2),
739 MSTPCR("vpu0", "bus_clk", 2, 1),
740 MSTPCR("lcdc0", "bus_clk", 2, 0),
741#endif
742#if defined(CONFIG_CPU_SUBTYPE_SH7366)
743 /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */
744 MSTPCR("tlb0", "cpu_clk", 0, 31),
745 MSTPCR("ic0", "cpu_clk", 0, 30),
746 MSTPCR("oc0", "cpu_clk", 0, 29),
747 MSTPCR("rsmem0", "sh_clk", 0, 28),
748 MSTPCR("xymem0", "cpu_clk", 0, 26),
749 MSTPCR("intc30", "peripheral_clk", 0, 23),
750 MSTPCR("intc0", "peripheral_clk", 0, 22),
751 MSTPCR("dmac0", "bus_clk", 0, 21),
752 MSTPCR("sh0", "sh_clk", 0, 20),
753 MSTPCR("hudi0", "peripheral_clk", 0, 19),
754 MSTPCR("ubc0", "cpu_clk", 0, 17),
755 MSTPCR("tmu0", "peripheral_clk", 0, 15),
756 MSTPCR("cmt0", "r_clk", 0, 14),
757 MSTPCR("rwdt0", "r_clk", 0, 13),
758 MSTPCR("flctl0", "peripheral_clk", 0, 10),
759 MSTPCR("scif0", "peripheral_clk", 0, 7),
760 MSTPCR("scif1", "bus_clk", 0, 6),
761 MSTPCR("scif2", "bus_clk", 0, 5),
762 MSTPCR("msiof0", "peripheral_clk", 0, 2),
763 MSTPCR("sbr0", "peripheral_clk", 0, 1),
764 MSTPCR("i2c0", "peripheral_clk", 1, 9),
765 MSTPCR("icb0", "bus_clk", 2, 27),
766 MSTPCR("meram0", "sh_clk", 2, 26),
767 MSTPCR("dacc0", "peripheral_clk", 2, 24),
768 MSTPCR("dacy0", "peripheral_clk", 2, 23),
769 MSTPCR("tsif0", "bus_clk", 2, 22),
770 MSTPCR("sdhi0", "bus_clk", 2, 18),
771 MSTPCR("mmcif0", "bus_clk", 2, 17),
772 MSTPCR("usb0", "bus_clk", 2, 11),
773 MSTPCR("siu0", "bus_clk", 2, 8),
774 MSTPCR("veu1", "bus_clk", 2, 7),
775 MSTPCR("vou0", "bus_clk", 2, 5),
776 MSTPCR("beu0", "bus_clk", 2, 4),
777 MSTPCR("ceu0", "bus_clk", 2, 3),
778 MSTPCR("veu0", "bus_clk", 2, 2),
779 MSTPCR("vpu0", "bus_clk", 2, 1),
780 MSTPCR("lcdc0", "bus_clk", 2, 0),
781#endif
677}; 782};
678 783
679static struct clk *sh7722_clocks[] = { 784static struct clk *sh7722_clocks[] = {
@@ -710,21 +815,30 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
710 815
711int __init arch_clk_init(void) 816int __init arch_clk_init(void)
712{ 817{
713 struct clk *master; 818 struct clk *clk;
714 int i; 819 int i;
715 820
716 master = clk_get(NULL, "master_clk"); 821 clk = clk_get(NULL, "master_clk");
717 for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) { 822 for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) {
718 pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name); 823 pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name);
719 sh7722_clocks[i]->parent = master; 824 sh7722_clocks[i]->parent = clk;
720 clk_register(sh7722_clocks[i]); 825 clk_register(sh7722_clocks[i]);
721 } 826 }
722 clk_put(master); 827 clk_put(clk);
723 828
724 for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) { 829 clk_register(&sh7722_r_clock);
725 pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name); 830
726 clk_register(&sh7722_mstpcr[i]); 831 for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr_clocks); i++) {
832 pr_debug( "Registering mstpcr clock '%s'\n",
833 sh7722_mstpcr_clocks[i].name);
834 clk = clk_get(NULL, (void *) sh7722_mstpcr_clocks[i].ops);
835 sh7722_mstpcr_clocks[i].parent = clk;
836 sh7722_mstpcr_clocks[i].ops = &sh7722_mstpcr_clk_ops;
837 clk_register(&sh7722_mstpcr_clocks[i]);
838 clk_put(clk);
727 } 839 }
728 840
841 clk_recalc_rate(&sh7722_r_clock); /* make sure rate gets propagated */
842
729 return 0; 843 return 0;
730} 844}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 78881b4214da..0623e377f488 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -30,6 +30,7 @@ static struct resource iic0_resources[] = {
30 30
31static struct platform_device iic0_device = { 31static struct platform_device iic0_device = {
32 .name = "i2c-sh_mobile", 32 .name = "i2c-sh_mobile",
33 .id = 0, /* "i2c0" clock */
33 .num_resources = ARRAY_SIZE(iic0_resources), 34 .num_resources = ARRAY_SIZE(iic0_resources),
34 .resource = iic0_resources, 35 .resource = iic0_resources,
35}; 36};
@@ -50,6 +51,7 @@ static struct resource iic1_resources[] = {
50 51
51static struct platform_device iic1_device = { 52static struct platform_device iic1_device = {
52 .name = "i2c-sh_mobile", 53 .name = "i2c-sh_mobile",
54 .id = 1, /* "i2c1" clock */
53 .num_resources = ARRAY_SIZE(iic1_resources), 55 .num_resources = ARRAY_SIZE(iic1_resources),
54 .resource = iic1_resources, 56 .resource = iic1_resources,
55}; 57};
@@ -115,7 +117,22 @@ static struct plat_sci_port sci_platform_data[] = {
115 .mapbase = 0xffe00000, 117 .mapbase = 0xffe00000,
116 .flags = UPF_BOOT_AUTOCONF, 118 .flags = UPF_BOOT_AUTOCONF,
117 .type = PORT_SCIF, 119 .type = PORT_SCIF,
118 .irqs = { 80, 81, 83, 82 }, 120 .irqs = { 80, 80, 80, 80 },
121 }, {
122 .mapbase = 0xffe10000,
123 .flags = UPF_BOOT_AUTOCONF,
124 .type = PORT_SCIF,
125 .irqs = { 81, 81, 81, 81 },
126 }, {
127 .mapbase = 0xffe20000,
128 .flags = UPF_BOOT_AUTOCONF,
129 .type = PORT_SCIF,
130 .irqs = { 82, 82, 82, 82 },
131 }, {
132 .mapbase = 0xffe30000,
133 .flags = UPF_BOOT_AUTOCONF,
134 .type = PORT_SCIF,
135 .irqs = { 83, 83, 83, 83 },
119 }, { 136 }, {
120 .flags = 0, 137 .flags = 0,
121 } 138 }
@@ -139,18 +156,10 @@ static struct platform_device *sh7343_devices[] __initdata = {
139 156
140static int __init sh7343_devices_setup(void) 157static int __init sh7343_devices_setup(void)
141{ 158{
142 clk_always_enable("mstp031"); /* TLB */ 159 clk_always_enable("uram0"); /* URAM */
143 clk_always_enable("mstp030"); /* IC */ 160 clk_always_enable("xymem0"); /* XYMEM */
144 clk_always_enable("mstp029"); /* OC */ 161 clk_always_enable("veu0"); /* VEU */
145 clk_always_enable("mstp028"); /* URAM */ 162 clk_always_enable("vpu0"); /* VPU */
146 clk_always_enable("mstp026"); /* XYMEM */
147 clk_always_enable("mstp023"); /* INTC3 */
148 clk_always_enable("mstp022"); /* INTC */
149 clk_always_enable("mstp020"); /* SuperHyway */
150 clk_always_enable("mstp109"); /* I2C0 */
151 clk_always_enable("mstp108"); /* I2C1 */
152 clk_always_enable("mstp202"); /* VEU */
153 clk_always_enable("mstp201"); /* VPU */
154 163
155 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); 164 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
156 platform_resource_setup_memory(&veu_device, "veu", 2 << 20); 165 platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
@@ -171,7 +180,7 @@ enum {
171 MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY, 180 MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY,
172 DMAC4, DMAC5, DMAC_DADERR, 181 DMAC4, DMAC5, DMAC_DADERR,
173 KEYSC, 182 KEYSC,
174 SCIF, SCIF1, SCIF2, SCIF3, SCIF4, 183 SCIF, SCIF1, SCIF2, SCIF3,
175 SIOF0, SIOF1, SIO, 184 SIOF0, SIOF1, SIO,
176 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 185 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
177 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, 186 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index e17db39b97aa..839ae97a7fd2 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -32,6 +32,7 @@ static struct resource iic_resources[] = {
32 32
33static struct platform_device iic_device = { 33static struct platform_device iic_device = {
34 .name = "i2c-sh_mobile", 34 .name = "i2c-sh_mobile",
35 .id = 0, /* "i2c0" clock */
35 .num_resources = ARRAY_SIZE(iic_resources), 36 .num_resources = ARRAY_SIZE(iic_resources),
36 .resource = iic_resources, 37 .resource = iic_resources,
37}; 38};
@@ -176,19 +177,11 @@ static struct platform_device *sh7366_devices[] __initdata = {
176 177
177static int __init sh7366_devices_setup(void) 178static int __init sh7366_devices_setup(void)
178{ 179{
179 clk_always_enable("mstp031"); /* TLB */ 180 clk_always_enable("rsmem0"); /* RSMEM */
180 clk_always_enable("mstp030"); /* IC */ 181 clk_always_enable("xymem0"); /* XYMEM */
181 clk_always_enable("mstp029"); /* OC */ 182 clk_always_enable("veu1"); /* VEU-2 */
182 clk_always_enable("mstp028"); /* RSMEM */ 183 clk_always_enable("veu0"); /* VEU-1 */
183 clk_always_enable("mstp026"); /* XYMEM */ 184 clk_always_enable("vpu0"); /* VPU */
184 clk_always_enable("mstp023"); /* INTC3 */
185 clk_always_enable("mstp022"); /* INTC */
186 clk_always_enable("mstp020"); /* SuperHyway */
187 clk_always_enable("mstp109"); /* I2C */
188 clk_always_enable("mstp211"); /* USB */
189 clk_always_enable("mstp207"); /* VEU-2 */
190 clk_always_enable("mstp202"); /* VEU-1 */
191 clk_always_enable("mstp201"); /* VPU */
192 185
193 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); 186 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
194 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 187 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index ef77ee1d9f53..50cf6838ec41 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -62,7 +62,7 @@ static struct resource usbf_resources[] = {
62 62
63static struct platform_device usbf_device = { 63static struct platform_device usbf_device = {
64 .name = "m66592_udc", 64 .name = "m66592_udc",
65 .id = -1, 65 .id = 0, /* "usbf0" clock */
66 .dev = { 66 .dev = {
67 .dma_mask = NULL, 67 .dma_mask = NULL,
68 .coherent_dma_mask = 0xffffffff, 68 .coherent_dma_mask = 0xffffffff,
@@ -87,6 +87,7 @@ static struct resource iic_resources[] = {
87 87
88static struct platform_device iic_device = { 88static struct platform_device iic_device = {
89 .name = "i2c-sh_mobile", 89 .name = "i2c-sh_mobile",
90 .id = 0, /* "i2c0" clock */
90 .num_resources = ARRAY_SIZE(iic_resources), 91 .num_resources = ARRAY_SIZE(iic_resources),
91 .resource = iic_resources, 92 .resource = iic_resources,
92}; 93};
@@ -147,6 +148,34 @@ static struct platform_device veu_device = {
147 .num_resources = ARRAY_SIZE(veu_resources), 148 .num_resources = ARRAY_SIZE(veu_resources),
148}; 149};
149 150
151static struct uio_info jpu_platform_data = {
152 .name = "JPU",
153 .version = "0",
154 .irq = 27,
155};
156
157static struct resource jpu_resources[] = {
158 [0] = {
159 .name = "JPU",
160 .start = 0xfea00000,
161 .end = 0xfea102d0,
162 .flags = IORESOURCE_MEM,
163 },
164 [1] = {
165 /* place holder for contiguous memory */
166 },
167};
168
169static struct platform_device jpu_device = {
170 .name = "uio_pdrv_genirq",
171 .id = 2,
172 .dev = {
173 .platform_data = &jpu_platform_data,
174 },
175 .resource = jpu_resources,
176 .num_resources = ARRAY_SIZE(jpu_resources),
177};
178
150static struct plat_sci_port sci_platform_data[] = { 179static struct plat_sci_port sci_platform_data[] = {
151 { 180 {
152 .mapbase = 0xffe00000, 181 .mapbase = 0xffe00000,
@@ -186,24 +215,21 @@ static struct platform_device *sh7722_devices[] __initdata = {
186 &sci_device, 215 &sci_device,
187 &vpu_device, 216 &vpu_device,
188 &veu_device, 217 &veu_device,
218 &jpu_device,
189}; 219};
190 220
191static int __init sh7722_devices_setup(void) 221static int __init sh7722_devices_setup(void)
192{ 222{
193 clk_always_enable("mstp031"); /* TLB */ 223 clk_always_enable("uram0"); /* URAM */
194 clk_always_enable("mstp030"); /* IC */ 224 clk_always_enable("xymem0"); /* XYMEM */
195 clk_always_enable("mstp029"); /* OC */ 225 clk_always_enable("rtc0"); /* RTC */
196 clk_always_enable("mstp028"); /* URAM */ 226 clk_always_enable("veu0"); /* VEU */
197 clk_always_enable("mstp026"); /* XYMEM */ 227 clk_always_enable("vpu0"); /* VPU */
198 clk_always_enable("mstp022"); /* INTC */ 228 clk_always_enable("jpu0"); /* JPU */
199 clk_always_enable("mstp020"); /* SuperHyway */
200 clk_always_enable("mstp109"); /* I2C */
201 clk_always_enable("mstp211"); /* USB */
202 clk_always_enable("mstp202"); /* VEU */
203 clk_always_enable("mstp201"); /* VPU */
204 229
205 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); 230 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
206 platform_resource_setup_memory(&veu_device, "veu", 2 << 20); 231 platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
232 platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20);
207 233
208 return platform_add_devices(sh7722_devices, 234 return platform_add_devices(sh7722_devices,
209 ARRAY_SIZE(sh7722_devices)); 235 ARRAY_SIZE(sh7722_devices));
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 6d9e6972cfc9..849770d780ae 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -215,6 +215,7 @@ static struct resource iic_resources[] = {
215 215
216static struct platform_device iic_device = { 216static struct platform_device iic_device = {
217 .name = "i2c-sh_mobile", 217 .name = "i2c-sh_mobile",
218 .id = 0, /* "i2c0" clock */
218 .num_resources = ARRAY_SIZE(iic_resources), 219 .num_resources = ARRAY_SIZE(iic_resources),
219 .resource = iic_resources, 220 .resource = iic_resources,
220}; 221};
@@ -231,19 +232,11 @@ static struct platform_device *sh7723_devices[] __initdata = {
231 232
232static int __init sh7723_devices_setup(void) 233static int __init sh7723_devices_setup(void)
233{ 234{
234 clk_always_enable("mstp031"); /* TLB */ 235 clk_always_enable("meram0"); /* MERAM */
235 clk_always_enable("mstp030"); /* IC */ 236 clk_always_enable("rtc0"); /* RTC */
236 clk_always_enable("mstp029"); /* OC */ 237 clk_always_enable("veu1"); /* VEU2H1 */
237 clk_always_enable("mstp024"); /* FPU */ 238 clk_always_enable("veu0"); /* VEU2H0 */
238 clk_always_enable("mstp022"); /* INTC */ 239 clk_always_enable("vpu0"); /* VPU */
239 clk_always_enable("mstp020"); /* SuperHyway */
240 clk_always_enable("mstp000"); /* MERAM */
241 clk_always_enable("mstp109"); /* I2C */
242 clk_always_enable("mstp108"); /* RTC */
243 clk_always_enable("mstp211"); /* USB */
244 clk_always_enable("mstp206"); /* VEU2H1 */
245 clk_always_enable("mstp202"); /* VEU2H0 */
246 clk_always_enable("mstp201"); /* VPU */
247 240
248 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); 241 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
249 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 242 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S
index 13b66746410a..591741383ee6 100644
--- a/arch/sh/kernel/debugtraps.S
+++ b/arch/sh/kernel/debugtraps.S
@@ -3,7 +3,7 @@
3 * 3 *
4 * Debug trap jump tables for SuperH 4 * Debug trap jump tables for SuperH
5 * 5 *
6 * Copyright (C) 2006 Paul Mundt 6 * Copyright (C) 2006 - 2008 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -12,12 +12,13 @@
12#include <linux/sys.h> 12#include <linux/sys.h>
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14 14
15#if !defined(CONFIG_SH_KGDB) 15#if !defined(CONFIG_KGDB)
16#define kgdb_handle_exception debug_trap_handler 16#define breakpoint_trap_handler debug_trap_handler
17#define singlestep_trap_handler debug_trap_handler
17#endif 18#endif
18 19
19#if !defined(CONFIG_SH_STANDARD_BIOS) 20#if !defined(CONFIG_SH_STANDARD_BIOS)
20#define sh_bios_handler debug_trap_handler 21#define sh_bios_handler debug_trap_handler
21#endif 22#endif
22 23
23 .data 24 .data
@@ -35,7 +36,7 @@ ENTRY(debug_trap_table)
35 .long debug_trap_handler /* 0x39 */ 36 .long debug_trap_handler /* 0x39 */
36 .long debug_trap_handler /* 0x3a */ 37 .long debug_trap_handler /* 0x3a */
37 .long debug_trap_handler /* 0x3b */ 38 .long debug_trap_handler /* 0x3b */
38 .long kgdb_handle_exception /* 0x3c */ 39 .long breakpoint_trap_handler /* 0x3c */
39 .long debug_trap_handler /* 0x3d */ 40 .long singlestep_trap_handler /* 0x3d */
40 .long bug_trap_handler /* 0x3e */ 41 .long bug_trap_handler /* 0x3e */
41 .long sh_bios_handler /* 0x3f */ 42 .long sh_bios_handler /* 0x3f */
diff --git a/arch/sh/kernel/disassemble.c b/arch/sh/kernel/disassemble.c
new file mode 100644
index 000000000000..64d5d8dded7c
--- /dev/null
+++ b/arch/sh/kernel/disassemble.c
@@ -0,0 +1,573 @@
1/*
2 * Disassemble SuperH instructions.
3 *
4 * Copyright (C) 1999 kaz Kojima
5 * Copyright (C) 2008 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/uaccess.h>
14
15/*
16 * Format of an instruction in memory.
17 */
18typedef enum {
19 HEX_0, HEX_1, HEX_2, HEX_3, HEX_4, HEX_5, HEX_6, HEX_7,
20 HEX_8, HEX_9, HEX_A, HEX_B, HEX_C, HEX_D, HEX_E, HEX_F,
21 REG_N, REG_M, REG_NM, REG_B,
22 BRANCH_12, BRANCH_8,
23 DISP_8, DISP_4,
24 IMM_4, IMM_4BY2, IMM_4BY4, PCRELIMM_8BY2, PCRELIMM_8BY4,
25 IMM_8, IMM_8BY2, IMM_8BY4,
26} sh_nibble_type;
27
28typedef enum {
29 A_END, A_BDISP12, A_BDISP8,
30 A_DEC_M, A_DEC_N,
31 A_DISP_GBR, A_DISP_PC, A_DISP_REG_M, A_DISP_REG_N,
32 A_GBR,
33 A_IMM,
34 A_INC_M, A_INC_N,
35 A_IND_M, A_IND_N, A_IND_R0_REG_M, A_IND_R0_REG_N,
36 A_MACH, A_MACL,
37 A_PR, A_R0, A_R0_GBR, A_REG_M, A_REG_N, A_REG_B,
38 A_SR, A_VBR, A_SSR, A_SPC, A_SGR, A_DBR,
39 F_REG_N, F_REG_M, D_REG_N, D_REG_M,
40 X_REG_N, /* Only used for argument parsing */
41 X_REG_M, /* Only used for argument parsing */
42 DX_REG_N, DX_REG_M, V_REG_N, V_REG_M,
43 FD_REG_N,
44 XMTRX_M4,
45 F_FR0,
46 FPUL_N, FPUL_M, FPSCR_N, FPSCR_M,
47} sh_arg_type;
48
49static struct sh_opcode_info {
50 char *name;
51 sh_arg_type arg[7];
52 sh_nibble_type nibbles[4];
53} sh_table[] = {
54 {"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}},
55 {"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}},
56 {"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}},
57 {"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}},
58 {"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}},
59 {"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}},
60 {"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM_8}},
61 {"bra",{A_BDISP12},{HEX_A,BRANCH_12}},
62 {"bsr",{A_BDISP12},{HEX_B,BRANCH_12}},
63 {"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}},
64 {"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}},
65 {"bt.s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}},
66 {"bt/s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}},
67 {"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}},
68 {"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}},
69 {"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}},
70 {"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}},
71 {"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}},
72 {"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}},
73 {"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}},
74 {"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}},
75 {"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}},
76 {"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}},
77 {"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_2}},
78 {"cmp/pl",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_5}},
79 {"cmp/pz",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_1}},
80 {"cmp/str",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_C}},
81 {"div0s",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_7}},
82 {"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}},
83 {"div1",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_4}},
84 {"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}},
85 {"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}},
86 {"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}},
87 {"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}},
88 {"jmp",{A_IND_N},{HEX_4,REG_N,HEX_2,HEX_B}},
89 {"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}},
90 {"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}},
91 {"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}},
92 {"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}},
93 {"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}},
94 {"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}},
95 {"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_E}},
96 {"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}},
97 {"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}},
98 {"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}},
99 {"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}},
100 {"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}},
101 {"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}},
102 {"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_7}},
103 {"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}},
104 {"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}},
105 {"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}},
106 {"lds",{A_REG_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_A}},
107 {"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}},
108 {"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}},
109 {"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}},
110 {"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}},
111 {"lds.l",{A_INC_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_6}},
112 {"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}},
113 {"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}},
114 {"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}},
115 {"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}},
116 {"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}},
117 {"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}},
118 {"mov.b",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_4}},
119 {"mov.b",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_4}},
120 {"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}},
121 {"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}},
122 {"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}},
123 {"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}},
124 {"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}},
125 {"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}},
126 {"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}},
127 {"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}},
128 {"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}},
129 {"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}},
130 {"mov.l",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_6}},
131 {"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}},
132 {"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM_4BY4}},
133 {"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}},
134 {"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}},
135 {"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}},
136 {"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}},
137 {"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}},
138 {"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}},
139 {"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}},
140 {"mov.w",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_5}},
141 {"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}},
142 {"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}},
143 {"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}},
144 {"mov.w",{A_DISP_PC,A_REG_N},{HEX_9,REG_N,PCRELIMM_8BY2}},
145 {"mov.w",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_D}},
146 {"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}},
147 {"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}},
148 {"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}},
149 {"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}},
150 {"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}},
151 {"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}},
152 {"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}},
153 {"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}},
154 {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
155 {"mulu",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_E}},
156 {"neg",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_B}},
157 {"negc",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_A}},
158 {"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}},
159 {"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}},
160 {"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}},
161 {"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}},
162 {"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}},
163 {"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}},
164 {"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}},
165 {"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM_8}},
166 {"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}},
167 {"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}},
168 {"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}},
169 {"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}},
170 {"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}},
171 {"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}},
172 {"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}},
173 {"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}},
174 {"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
175 {"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}},
176 {"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}},
177 {"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}},
178 {"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}},
179 {"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}},
180 {"shll16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_8}},
181 {"shll2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_8}},
182 {"shll8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_8}},
183 {"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}},
184 {"shlr16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_9}},
185 {"shlr2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_9}},
186 {"shlr8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_9}},
187 {"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}},
188 {"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}},
189 {"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
190 {"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}},
191 {"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}},
192 {"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}},
193 {"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}},
194 {"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_7,HEX_2}},
195 {"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}},
196 {"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}},
197 {"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}},
198 {"stc.l",{A_VBR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_3}},
199 {"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}},
200 {"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}},
201 {"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}},
202 {"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_7,HEX_3}},
203 {"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}},
204 {"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}},
205 {"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}},
206 {"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}},
207 {"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}},
208 {"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}},
209 {"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}},
210 {"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}},
211 {"sts.l",{A_PR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_2}},
212 {"sts.l",{FPUL_M,A_DEC_N},{HEX_4,REG_N,HEX_5,HEX_2}},
213 {"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_2}},
214 {"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}},
215 {"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}},
216 {"subv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_B}},
217 {"swap.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_8}},
218 {"swap.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_9}},
219 {"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}},
220 {"trapa",{A_IMM},{HEX_C,HEX_3,IMM_8}},
221 {"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}},
222 {"tst",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_8}},
223 {"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM_8}},
224 {"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}},
225 {"xor",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_A}},
226 {"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM_8}},
227 {"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}},
228 {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
229 {"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}},
230 {"dmuls.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_D}},
231 {"dmulu.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_5}},
232 {"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}},
233 {"braf",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_3}},
234 {"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}},
235 {"fabs",{FD_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}},
236 {"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
237 {"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
238 {"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
239 {"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
240 {"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
241 {"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
242 {"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}},
243 {"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}},
244 {"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
245 {"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
246 {"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}},
247 {"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}},
248 {"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}},
249 {"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
250 {"float",{FPUL_M,FD_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}},
251 {"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}},
252 {"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
253 {"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
254 {"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
255 {"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
256 {"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
257 {"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
258 {"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
259 {"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
260 {"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
261 {"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
262 {"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
263 {"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
264 {"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
265 {"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
266 {"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
267 {"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
268 {"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
269 {"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
270 {"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
271 {"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
272 {"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
273 {"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
274 {"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
275 {"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
276 {"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
277 {"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
278 {"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
279 {"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
280 {"fneg",{FD_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}},
281 {"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}},
282 {"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}},
283 {"fsqrt",{FD_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}},
284 {"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}},
285 {"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
286 {"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
287 {"ftrc",{FD_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}},
288 {"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}},
289 { 0 },
290};
291
292static void print_sh_insn(u32 memaddr, u16 insn)
293{
294 int relmask = ~0;
295 int nibs[4] = { (insn >> 12) & 0xf, (insn >> 8) & 0xf, (insn >> 4) & 0xf, insn & 0xf};
296 int lastsp;
297 struct sh_opcode_info *op = sh_table;
298
299 for (; op->name; op++) {
300 int n;
301 int imm = 0;
302 int rn = 0;
303 int rm = 0;
304 int rb = 0;
305 int disp_pc;
306 int disp_pc_addr = 0;
307
308 for (n = 0; n < 4; n++) {
309 int i = op->nibbles[n];
310
311 if (i < 16) {
312 if (nibs[n] == i)
313 continue;
314 goto fail;
315 }
316 switch (i) {
317 case BRANCH_8:
318 imm = (nibs[2] << 4) | (nibs[3]);
319 if (imm & 0x80)
320 imm |= ~0xff;
321 imm = ((char)imm) * 2 + 4 ;
322 goto ok;
323 case BRANCH_12:
324 imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]);
325 if (imm & 0x800)
326 imm |= ~0xfff;
327 imm = imm * 2 + 4;
328 goto ok;
329 case IMM_4:
330 imm = nibs[3];
331 goto ok;
332 case IMM_4BY2:
333 imm = nibs[3] <<1;
334 goto ok;
335 case IMM_4BY4:
336 imm = nibs[3] <<2;
337 goto ok;
338 case IMM_8:
339 imm = (nibs[2] << 4) | nibs[3];
340 goto ok;
341 case PCRELIMM_8BY2:
342 imm = ((nibs[2] << 4) | nibs[3]) <<1;
343 relmask = ~1;
344 goto ok;
345 case PCRELIMM_8BY4:
346 imm = ((nibs[2] << 4) | nibs[3]) <<2;
347 relmask = ~3;
348 goto ok;
349 case IMM_8BY2:
350 imm = ((nibs[2] << 4) | nibs[3]) <<1;
351 goto ok;
352 case IMM_8BY4:
353 imm = ((nibs[2] << 4) | nibs[3]) <<2;
354 goto ok;
355 case DISP_8:
356 imm = (nibs[2] << 4) | (nibs[3]);
357 goto ok;
358 case DISP_4:
359 imm = nibs[3];
360 goto ok;
361 case REG_N:
362 rn = nibs[n];
363 break;
364 case REG_M:
365 rm = nibs[n];
366 break;
367 case REG_NM:
368 rn = (nibs[n] & 0xc) >> 2;
369 rm = (nibs[n] & 0x3);
370 break;
371 case REG_B:
372 rb = nibs[n] & 0x07;
373 break;
374 default:
375 return;
376 }
377 }
378
379 ok:
380 printk("%-8s ", op->name);
381 lastsp = (op->arg[0] == A_END);
382 disp_pc = 0;
383 for (n = 0; n < 6 && op->arg[n] != A_END; n++) {
384 if (n && op->arg[1] != A_END)
385 printk(", ");
386 switch (op->arg[n]) {
387 case A_IMM:
388 printk("#%d", (char)(imm));
389 break;
390 case A_R0:
391 printk("r0");
392 break;
393 case A_REG_N:
394 printk("r%d", rn);
395 break;
396 case A_INC_N:
397 printk("@r%d+", rn);
398 break;
399 case A_DEC_N:
400 printk("@-r%d", rn);
401 break;
402 case A_IND_N:
403 printk("@r%d", rn);
404 break;
405 case A_DISP_REG_N:
406 printk("@(%d,r%d)", imm, rn);
407 break;
408 case A_REG_M:
409 printk("r%d", rm);
410 break;
411 case A_INC_M:
412 printk("@r%d+", rm);
413 break;
414 case A_DEC_M:
415 printk("@-r%d", rm);
416 break;
417 case A_IND_M:
418 printk("@r%d", rm);
419 break;
420 case A_DISP_REG_M:
421 printk("@(%d,r%d)", imm, rm);
422 break;
423 case A_REG_B:
424 printk("r%d_bank", rb);
425 break;
426 case A_DISP_PC:
427 disp_pc = 1;
428 disp_pc_addr = imm + 4 + (memaddr & relmask);
429 printk("%08x <%pS>", disp_pc_addr,
430 (void *)disp_pc_addr);
431 break;
432 case A_IND_R0_REG_N:
433 printk("@(r0,r%d)", rn);
434 break;
435 case A_IND_R0_REG_M:
436 printk("@(r0,r%d)", rm);
437 break;
438 case A_DISP_GBR:
439 printk("@(%d,gbr)",imm);
440 break;
441 case A_R0_GBR:
442 printk("@(r0,gbr)");
443 break;
444 case A_BDISP12:
445 case A_BDISP8:
446 printk("%08x", imm + memaddr);
447 break;
448 case A_SR:
449 printk("sr");
450 break;
451 case A_GBR:
452 printk("gbr");
453 break;
454 case A_VBR:
455 printk("vbr");
456 break;
457 case A_SSR:
458 printk("ssr");
459 break;
460 case A_SPC:
461 printk("spc");
462 break;
463 case A_MACH:
464 printk("mach");
465 break;
466 case A_MACL:
467 printk("macl");
468 break;
469 case A_PR:
470 printk("pr");
471 break;
472 case A_SGR:
473 printk("sgr");
474 break;
475 case A_DBR:
476 printk("dbr");
477 break;
478 case FD_REG_N:
479 if (0)
480 goto d_reg_n;
481 case F_REG_N:
482 printk("fr%d", rn);
483 break;
484 case F_REG_M:
485 printk("fr%d", rm);
486 break;
487 case DX_REG_N:
488 if (rn & 1) {
489 printk("xd%d", rn & ~1);
490 break;
491 }
492 d_reg_n:
493 case D_REG_N:
494 printk("dr%d", rn);
495 break;
496 case DX_REG_M:
497 if (rm & 1) {
498 printk("xd%d", rm & ~1);
499 break;
500 }
501 case D_REG_M:
502 printk("dr%d", rm);
503 break;
504 case FPSCR_M:
505 case FPSCR_N:
506 printk("fpscr");
507 break;
508 case FPUL_M:
509 case FPUL_N:
510 printk("fpul");
511 break;
512 case F_FR0:
513 printk("fr0");
514 break;
515 case V_REG_N:
516 printk("fv%d", rn*4);
517 break;
518 case V_REG_M:
519 printk("fv%d", rm*4);
520 break;
521 case XMTRX_M4:
522 printk("xmtrx");
523 break;
524 default:
525 return;
526 }
527 }
528
529 if (disp_pc && strcmp(op->name, "mova") != 0) {
530 u32 val;
531
532 if (relmask == ~1)
533 __get_user(val, (u16 *)disp_pc_addr);
534 else
535 __get_user(val, (u32 *)disp_pc_addr);
536
537 printk(" ! %08x <%pS>", val, (void *)val);
538 }
539
540 return;
541 fail:
542 ;
543
544 }
545
546 printk(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
547}
548
549void show_code(struct pt_regs *regs)
550{
551 unsigned short *pc = (unsigned short *)regs->pc;
552 long i;
553
554 if (regs->pc & 0x1)
555 return;
556
557 printk("Code:\n");
558
559 for (i = -3 ; i < 6 ; i++) {
560 unsigned short insn;
561
562 if (__get_user(insn, pc + i)) {
563 printk(" (Bad address in pc)\n");
564 break;
565 }
566
567 printk("%s%08lx: ", (i ? " ": "->"), (unsigned long)(pc + i));
568 print_sh_insn((unsigned long)(pc + i), insn);
569 printk("\n");
570 }
571
572 printk("\n");
573}
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 5b7efc4016fa..d62359cfbbe2 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -308,15 +308,19 @@ ENTRY(system_call)
308 mov.l 1f, r9 308 mov.l 1f, r9
309 mov.l @r9, r8 ! Read from TRA (Trap Address) Register 309 mov.l @r9, r8 ! Read from TRA (Trap Address) Register
310#endif 310#endif
311
312 mov #OFF_TRA, r10
313 add r15, r10
314 mov.l r8, @r10 ! set TRA value to tra
315
311 /* 316 /*
312 * Check the trap type 317 * Check the trap type
313 */ 318 */
314 mov #((0x20 << 2) - 1), r9 319 mov #((0x20 << 2) - 1), r9
315 cmp/hi r9, r8 320 cmp/hi r9, r8
316 bt/s debug_trap ! it's a debug trap.. 321 bt/s debug_trap ! it's a debug trap..
317 mov #OFF_TRA, r9 322 nop
318 add r15, r9 323
319 mov.l r8, @r9 ! set TRA value to tra
320#ifdef CONFIG_TRACE_IRQFLAGS 324#ifdef CONFIG_TRACE_IRQFLAGS
321 mov.l 5f, r10 325 mov.l 5f, r10
322 jsr @r10 326 jsr @r10
@@ -371,47 +375,3 @@ syscall_exit:
371#endif 375#endif
3727: .long do_syscall_trace_enter 3767: .long do_syscall_trace_enter
3738: .long do_syscall_trace_leave 3778: .long do_syscall_trace_leave
374
375#ifdef CONFIG_FUNCTION_TRACER
376 .align 2
377 .globl _mcount
378 .type _mcount,@function
379 .globl mcount
380 .type mcount,@function
381_mcount:
382mcount:
383 mov.l r4, @-r15
384 mov.l r5, @-r15
385 mov.l r6, @-r15
386 mov.l r7, @-r15
387 sts.l pr, @-r15
388
389 mov.l @(20,r15),r4
390 sts pr, r5
391
392 mov.l 1f, r6
393 mov.l ftrace_stub, r7
394 cmp/eq r6, r7
395 bt skip_trace
396
397 mov.l @r6, r6
398 jsr @r6
399 nop
400
401skip_trace:
402
403 lds.l @r15+, pr
404 mov.l @r15+, r7
405 mov.l @r15+, r6
406 mov.l @r15+, r5
407 rts
408 mov.l @r15+, r4
409
410 .align 2
4111: .long ftrace_trace_function
412
413 .globl ftrace_stub
414ftrace_stub:
415 rts
416 nop
417#endif /* CONFIG_FUNCTION_TRACER */
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
new file mode 100644
index 000000000000..4c3247477aa3
--- /dev/null
+++ b/arch/sh/kernel/ftrace.c
@@ -0,0 +1,133 @@
1/*
2 * Copyright (C) 2008 Matt Fleming <mjf@gentoo.org>
3 * Copyright (C) 2008 Paul Mundt <lethal@linux-sh.org>
4 *
5 * Code for replacing ftrace calls with jumps.
6 *
7 * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
8 *
9 * Thanks goes to Ingo Molnar, for suggesting the idea.
10 * Mathieu Desnoyers, for suggesting postponing the modifications.
11 * Arjan van de Ven, for keeping me straight, and explaining to me
12 * the dangers of modifying code on the run.
13 */
14#include <linux/uaccess.h>
15#include <linux/ftrace.h>
16#include <linux/string.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <asm/ftrace.h>
20#include <asm/cacheflush.h>
21
22static unsigned char ftrace_nop[] = {
23 0x09, 0x00, /* nop */
24 0x09, 0x00, /* nop */
25};
26
27static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE];
28
29unsigned char *ftrace_nop_replace(void)
30{
31 return ftrace_nop;
32}
33
34static int is_sh_nop(unsigned char *ip)
35{
36 return strncmp(ip, ftrace_nop, sizeof(ftrace_nop));
37}
38
39unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
40{
41 /* Place the address in the memory table. */
42 if (addr == CALLER_ADDR)
43 __raw_writel(addr + MCOUNT_INSN_OFFSET, ftrace_replaced_code);
44 else
45 __raw_writel(addr, ftrace_replaced_code);
46
47 /*
48 * No locking needed, this must be called via kstop_machine
49 * which in essence is like running on a uniprocessor machine.
50 */
51 return ftrace_replaced_code;
52}
53
54int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
55 unsigned char *new_code)
56{
57 unsigned char replaced[MCOUNT_INSN_SIZE];
58
59 /*
60 * Note: Due to modules and __init, code can
61 * disappear and change, we need to protect against faulting
62 * as well as code changing. We do this by using the
63 * probe_kernel_* functions.
64 *
65 * No real locking needed, this code is run through
66 * kstop_machine, or before SMP starts.
67 */
68
69 /*
70 * If we're trying to nop out a call to a function, we instead
71 * place a call to the address after the memory table.
72 */
73 if (is_sh_nop(new_code) == 0)
74 __raw_writel(ip + MCOUNT_INSN_SIZE, (unsigned long)new_code);
75
76 /* read the text we want to modify */
77 if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
78 return -EFAULT;
79
80 /* Make sure it is what we expect it to be */
81 if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0)
82 return -EINVAL;
83
84 /* replace the text with the new text */
85 if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
86 return -EPERM;
87
88 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE);
89
90 return 0;
91}
92
93int ftrace_update_ftrace_func(ftrace_func_t func)
94{
95 unsigned long ip = (unsigned long)(&ftrace_call);
96 unsigned char old[MCOUNT_INSN_SIZE], *new;
97
98 memcpy(old, (unsigned char *)(ip + MCOUNT_INSN_OFFSET), MCOUNT_INSN_SIZE);
99 new = ftrace_call_replace(ip, (unsigned long)func);
100
101 return ftrace_modify_code(ip + MCOUNT_INSN_OFFSET, old, new);
102}
103
104int ftrace_make_nop(struct module *mod,
105 struct dyn_ftrace *rec, unsigned long addr)
106{
107 unsigned char *new, *old;
108 unsigned long ip = rec->ip;
109
110 old = ftrace_call_replace(ip, addr);
111 new = ftrace_nop_replace();
112
113 return ftrace_modify_code(rec->ip, old, new);
114}
115
116int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
117{
118 unsigned char *new, *old;
119 unsigned long ip = rec->ip;
120
121 old = ftrace_nop_replace();
122 new = ftrace_call_replace(ip, addr);
123
124 return ftrace_modify_code(rec->ip, old, new);
125}
126
127int __init ftrace_dyn_arch_init(void *data)
128{
129 /* The return code is retured via data */
130 __raw_writel(0, (unsigned long)data);
131
132 return 0;
133}
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index ae0a382a82eb..788605ff7088 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -80,8 +80,14 @@ ENTRY(_stext)
80 mov.l 7f, r0 80 mov.l 7f, r0
81 ldc r0, r7_bank ! ... and initial thread_info 81 ldc r0, r7_bank ! ... and initial thread_info
82#endif 82#endif
83 83
84 ! Clear BSS area 84#ifndef CONFIG_SH_NO_BSS_INIT
85 /*
86 * Don't clear BSS if running on slow platforms such as an RTL simulation,
87 * remote memory via SHdebug link, etc. For these the memory can be guaranteed
88 * to be all zero on boot anyway.
89 */
90 ! Clear BSS area
85#ifdef CONFIG_SMP 91#ifdef CONFIG_SMP
86 mov.l 3f, r0 92 mov.l 3f, r0
87 cmp/eq #0, r0 ! skip clear if set to zero 93 cmp/eq #0, r0 ! skip clear if set to zero
@@ -97,6 +103,8 @@ ENTRY(_stext)
97 mov.l r0,@-r2 103 mov.l r0,@-r2
98 104
9910: 10510:
106#endif
107
100 ! Additional CPU initialization 108 ! Additional CPU initialization
101 mov.l 6f, r0 109 mov.l 6f, r0
102 jsr @r0 110 jsr @r0
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
new file mode 100644
index 000000000000..fe59ccfc1152
--- /dev/null
+++ b/arch/sh/kernel/idle.c
@@ -0,0 +1,81 @@
1/*
2 * The idle loop for all SuperH platforms.
3 *
4 * Copyright (C) 2002 - 2008 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/mm.h>
13#include <linux/pm.h>
14#include <linux/tick.h>
15#include <linux/preempt.h>
16#include <linux/thread_info.h>
17#include <linux/irqflags.h>
18#include <asm/pgalloc.h>
19#include <asm/system.h>
20#include <asm/atomic.h>
21
22static int hlt_counter;
23void (*pm_idle)(void);
24void (*pm_power_off)(void);
25EXPORT_SYMBOL(pm_power_off);
26
27static int __init nohlt_setup(char *__unused)
28{
29 hlt_counter = 1;
30 return 1;
31}
32__setup("nohlt", nohlt_setup);
33
34static int __init hlt_setup(char *__unused)
35{
36 hlt_counter = 0;
37 return 1;
38}
39__setup("hlt", hlt_setup);
40
41static void default_idle(void)
42{
43 if (!hlt_counter) {
44 clear_thread_flag(TIF_POLLING_NRFLAG);
45 smp_mb__after_clear_bit();
46 set_bl_bit();
47 stop_critical_timings();
48
49 while (!need_resched())
50 cpu_sleep();
51
52 start_critical_timings();
53 clear_bl_bit();
54 set_thread_flag(TIF_POLLING_NRFLAG);
55 } else
56 while (!need_resched())
57 cpu_relax();
58}
59
60void cpu_idle(void)
61{
62 set_thread_flag(TIF_POLLING_NRFLAG);
63
64 /* endless idle loop with no priority at all */
65 while (1) {
66 void (*idle)(void) = pm_idle;
67
68 if (!idle)
69 idle = default_idle;
70
71 tick_nohz_stop_sched_tick(1);
72 while (!need_resched())
73 idle();
74 tick_nohz_restart_sched_tick();
75
76 preempt_enable_no_resched();
77 schedule();
78 preempt_disable();
79 check_pgt_cache();
80 }
81}
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
new file mode 100644
index 000000000000..7c747e7d71b8
--- /dev/null
+++ b/arch/sh/kernel/kgdb.c
@@ -0,0 +1,285 @@
1/*
2 * SuperH KGDB support
3 *
4 * Copyright (C) 2008 Paul Mundt
5 *
6 * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/kgdb.h>
13#include <linux/kdebug.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <asm/cacheflush.h>
17
18char in_nmi = 0; /* Set during NMI to prevent re-entry */
19
20/* Macros for single step instruction identification */
21#define OPCODE_BT(op) (((op) & 0xff00) == 0x8900)
22#define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00)
23#define OPCODE_BTF_DISP(op) (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \
24 (((op) & 0x7f ) << 1))
25#define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00)
26#define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00)
27#define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000)
28#define OPCODE_BRA_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
29 (((op) & 0x7ff) << 1))
30#define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023)
31#define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8)
32#define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000)
33#define OPCODE_BSR_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
34 (((op) & 0x7ff) << 1))
35#define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003)
36#define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf)
37#define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b)
38#define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf)
39#define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b)
40#define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf)
41#define OPCODE_RTS(op) ((op) == 0xb)
42#define OPCODE_RTE(op) ((op) == 0x2b)
43
44#define SR_T_BIT_MASK 0x1
45#define STEP_OPCODE 0xc33d
46
47/* Calculate the new address for after a step */
48static short *get_step_address(struct pt_regs *linux_regs)
49{
50 opcode_t op = __raw_readw(linux_regs->pc);
51 long addr;
52
53 /* BT */
54 if (OPCODE_BT(op)) {
55 if (linux_regs->sr & SR_T_BIT_MASK)
56 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
57 else
58 addr = linux_regs->pc + 2;
59 }
60
61 /* BTS */
62 else if (OPCODE_BTS(op)) {
63 if (linux_regs->sr & SR_T_BIT_MASK)
64 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
65 else
66 addr = linux_regs->pc + 4; /* Not in delay slot */
67 }
68
69 /* BF */
70 else if (OPCODE_BF(op)) {
71 if (!(linux_regs->sr & SR_T_BIT_MASK))
72 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
73 else
74 addr = linux_regs->pc + 2;
75 }
76
77 /* BFS */
78 else if (OPCODE_BFS(op)) {
79 if (!(linux_regs->sr & SR_T_BIT_MASK))
80 addr = linux_regs->pc + 4 + OPCODE_BTF_DISP(op);
81 else
82 addr = linux_regs->pc + 4; /* Not in delay slot */
83 }
84
85 /* BRA */
86 else if (OPCODE_BRA(op))
87 addr = linux_regs->pc + 4 + OPCODE_BRA_DISP(op);
88
89 /* BRAF */
90 else if (OPCODE_BRAF(op))
91 addr = linux_regs->pc + 4
92 + linux_regs->regs[OPCODE_BRAF_REG(op)];
93
94 /* BSR */
95 else if (OPCODE_BSR(op))
96 addr = linux_regs->pc + 4 + OPCODE_BSR_DISP(op);
97
98 /* BSRF */
99 else if (OPCODE_BSRF(op))
100 addr = linux_regs->pc + 4
101 + linux_regs->regs[OPCODE_BSRF_REG(op)];
102
103 /* JMP */
104 else if (OPCODE_JMP(op))
105 addr = linux_regs->regs[OPCODE_JMP_REG(op)];
106
107 /* JSR */
108 else if (OPCODE_JSR(op))
109 addr = linux_regs->regs[OPCODE_JSR_REG(op)];
110
111 /* RTS */
112 else if (OPCODE_RTS(op))
113 addr = linux_regs->pr;
114
115 /* RTE */
116 else if (OPCODE_RTE(op))
117 addr = linux_regs->regs[15];
118
119 /* Other */
120 else
121 addr = linux_regs->pc + instruction_size(op);
122
123 flush_icache_range(addr, addr + instruction_size(op));
124 return (short *)addr;
125}
126
127/*
128 * Replace the instruction immediately after the current instruction
129 * (i.e. next in the expected flow of control) with a trap instruction,
130 * so that returning will cause only a single instruction to be executed.
131 * Note that this model is slightly broken for instructions with delay
132 * slots (e.g. B[TF]S, BSR, BRA etc), where both the branch and the
133 * instruction in the delay slot will be executed.
134 */
135
136static unsigned long stepped_address;
137static opcode_t stepped_opcode;
138
139static void do_single_step(struct pt_regs *linux_regs)
140{
141 /* Determine where the target instruction will send us to */
142 unsigned short *addr = get_step_address(linux_regs);
143
144 stepped_address = (int)addr;
145
146 /* Replace it */
147 stepped_opcode = __raw_readw((long)addr);
148 *addr = STEP_OPCODE;
149
150 /* Flush and return */
151 flush_icache_range((long)addr, (long)addr +
152 instruction_size(stepped_opcode));
153}
154
155/* Undo a single step */
156static void undo_single_step(struct pt_regs *linux_regs)
157{
158 /* If we have stepped, put back the old instruction */
159 /* Use stepped_address in case we stopped elsewhere */
160 if (stepped_opcode != 0) {
161 __raw_writew(stepped_opcode, stepped_address);
162 flush_icache_range(stepped_address, stepped_address + 2);
163 }
164
165 stepped_opcode = 0;
166}
167
168void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
169{
170 int i;
171
172 for (i = 0; i < 16; i++)
173 gdb_regs[GDB_R0 + i] = regs->regs[i];
174
175 gdb_regs[GDB_PC] = regs->pc;
176 gdb_regs[GDB_PR] = regs->pr;
177 gdb_regs[GDB_SR] = regs->sr;
178 gdb_regs[GDB_GBR] = regs->gbr;
179 gdb_regs[GDB_MACH] = regs->mach;
180 gdb_regs[GDB_MACL] = regs->macl;
181
182 __asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR]));
183}
184
185void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
186{
187 int i;
188
189 for (i = 0; i < 16; i++)
190 regs->regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i];
191
192 regs->pc = gdb_regs[GDB_PC];
193 regs->pr = gdb_regs[GDB_PR];
194 regs->sr = gdb_regs[GDB_SR];
195 regs->gbr = gdb_regs[GDB_GBR];
196 regs->mach = gdb_regs[GDB_MACH];
197 regs->macl = gdb_regs[GDB_MACL];
198
199 __asm__ __volatile__ ("ldc %0, vbr" : : "r" (gdb_regs[GDB_VBR]));
200}
201
202void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
203{
204 gdb_regs[GDB_R15] = p->thread.sp;
205 gdb_regs[GDB_PC] = p->thread.pc;
206}
207
208int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
209 char *remcomInBuffer, char *remcomOutBuffer,
210 struct pt_regs *linux_regs)
211{
212 unsigned long addr;
213 char *ptr;
214
215 /* Undo any stepping we may have done */
216 undo_single_step(linux_regs);
217
218 switch (remcomInBuffer[0]) {
219 case 'c':
220 case 's':
221 /* try to read optional parameter, pc unchanged if no parm */
222 ptr = &remcomInBuffer[1];
223 if (kgdb_hex2long(&ptr, &addr))
224 linux_regs->pc = addr;
225 case 'D':
226 case 'k':
227 atomic_set(&kgdb_cpu_doing_single_step, -1);
228
229 if (remcomInBuffer[0] == 's') {
230 do_single_step(linux_regs);
231 kgdb_single_step = 1;
232
233 atomic_set(&kgdb_cpu_doing_single_step,
234 raw_smp_processor_id());
235 }
236
237 return 0;
238 }
239
240 /* this means that we do not want to exit from the handler: */
241 return -1;
242}
243
244/*
245 * The primary entry points for the kgdb debug trap table entries.
246 */
247BUILD_TRAP_HANDLER(singlestep)
248{
249 unsigned long flags;
250 TRAP_HANDLER_DECL;
251
252 local_irq_save(flags);
253 regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
254 kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs);
255 local_irq_restore(flags);
256}
257
258
259BUILD_TRAP_HANDLER(breakpoint)
260{
261 unsigned long flags;
262 TRAP_HANDLER_DECL;
263
264 local_irq_save(flags);
265 kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs);
266 local_irq_restore(flags);
267}
268
269int kgdb_arch_init(void)
270{
271 return 0;
272}
273
274void kgdb_arch_exit(void)
275{
276}
277
278struct kgdb_arch arch_kgdb_ops = {
279 /* Breakpoint instruction: trapa #0x3c */
280#ifdef CONFIG_CPU_LITTLE_ENDIAN
281 .gdb_bpt_instr = { 0x3c, 0xc3 },
282#else
283 .gdb_bpt_instr = { 0xc3, 0x3c },
284#endif
285};
diff --git a/arch/sh/kernel/kgdb_jmp.S b/arch/sh/kernel/kgdb_jmp.S
deleted file mode 100644
index 339bb1d7ff0b..000000000000
--- a/arch/sh/kernel/kgdb_jmp.S
+++ /dev/null
@@ -1,33 +0,0 @@
1#include <linux/linkage.h>
2
3ENTRY(setjmp)
4 add #(9*4), r4
5 sts.l pr, @-r4
6 mov.l r15, @-r4
7 mov.l r14, @-r4
8 mov.l r13, @-r4
9 mov.l r12, @-r4
10 mov.l r11, @-r4
11 mov.l r10, @-r4
12 mov.l r9, @-r4
13 mov.l r8, @-r4
14 rts
15 mov #0, r0
16
17ENTRY(longjmp)
18 mov.l @r4+, r8
19 mov.l @r4+, r9
20 mov.l @r4+, r10
21 mov.l @r4+, r11
22 mov.l @r4+, r12
23 mov.l @r4+, r13
24 mov.l @r4+, r14
25 mov.l @r4+, r15
26 lds.l @r4+, pr
27 mov r5, r0
28 tst r0, r0
29 bf 1f
30 mov #1, r0 ! in case val==0
311: rts
32 nop
33
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
deleted file mode 100644
index bf8ac4c71640..000000000000
--- a/arch/sh/kernel/kgdb_stub.c
+++ /dev/null
@@ -1,1052 +0,0 @@
1/*
2 * May be copied or modified under the terms of the GNU General Public
3 * License. See linux/COPYING for more information.
4 *
5 * Contains extracts from code by Glenn Engel, Jim Kingdon,
6 * David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>,
7 * Amit S. Kale <akale@veritas.com>, William Gatliff <bgat@open-widgets.com>,
8 * Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>.
9 *
10 * This version by Henry Bell <henry.bell@st.com>
11 * Minor modifications by Jeremy Siegel <jsiegel@mvista.com>
12 *
13 * Contains low-level support for remote debug using GDB.
14 *
15 * To enable debugger support, two things need to happen. A call to
16 * set_debug_traps() is necessary in order to allow any breakpoints
17 * or error conditions to be properly intercepted and reported to gdb.
18 * A breakpoint also needs to be generated to begin communication. This
19 * is most easily accomplished by a call to breakpoint() which does
20 * a trapa if the initialisation phase has been successfully completed.
21 *
22 * In this case, set_debug_traps() is not used to "take over" exceptions;
23 * other kernel code is modified instead to enter the kgdb functions here
24 * when appropriate (see entry.S for breakpoint traps and NMI interrupts,
25 * see traps.c for kernel error exceptions).
26 *
27 * The following gdb commands are supported:
28 *
29 * Command Function Return value
30 *
31 * g return the value of the CPU registers hex data or ENN
32 * G set the value of the CPU registers OK or ENN
33 *
34 * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
35 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
36 * XAA..AA,LLLL: Same, but data is binary (not hex) OK or ENN
37 *
38 * c Resume at current address SNN ( signal NN)
39 * cAA..AA Continue at address AA..AA SNN
40 * CNN; Resume at current address with signal SNN
41 * CNN;AA..AA Resume at address AA..AA with signal SNN
42 *
43 * s Step one instruction SNN
44 * sAA..AA Step one instruction from AA..AA SNN
45 * SNN; Step one instruction with signal SNN
46 * SNNAA..AA Step one instruction from AA..AA w/NN SNN
47 *
48 * k kill (Detach GDB)
49 *
50 * d Toggle debug flag
51 * D Detach GDB
52 *
53 * Hct Set thread t for operations, OK or ENN
54 * c = 'c' (step, cont), c = 'g' (other
55 * operations)
56 *
57 * qC Query current thread ID QCpid
58 * qfThreadInfo Get list of current threads (first) m<id>
59 * qsThreadInfo " " " " " (subsequent)
60 * qOffsets Get section offsets Text=x;Data=y;Bss=z
61 *
62 * TXX Find if thread XX is alive OK or ENN
63 * ? What was the last sigval ? SNN (signal NN)
64 * O Output to GDB console
65 *
66 * Remote communication protocol.
67 *
68 * A debug packet whose contents are <data> is encapsulated for
69 * transmission in the form:
70 *
71 * $ <data> # CSUM1 CSUM2
72 *
73 * <data> must be ASCII alphanumeric and cannot include characters
74 * '$' or '#'. If <data> starts with two characters followed by
75 * ':', then the existing stubs interpret this as a sequence number.
76 *
77 * CSUM1 and CSUM2 are ascii hex representation of an 8-bit
78 * checksum of <data>, the most significant nibble is sent first.
79 * the hex digits 0-9,a-f are used.
80 *
81 * Receiver responds with:
82 *
83 * + - if CSUM is correct and ready for next packet
84 * - - if CSUM is incorrect
85 *
86 * Responses can be run-length encoded to save space. A '*' means that
87 * the next character is an ASCII encoding giving a repeat count which
88 * stands for that many repetitions of the character preceding the '*'.
89 * The encoding is n+29, yielding a printable character where n >=3
90 * (which is where RLE starts to win). Don't use an n > 126.
91 *
92 * So "0* " means the same as "0000".
93 */
94
95#include <linux/string.h>
96#include <linux/kernel.h>
97#include <linux/sched.h>
98#include <linux/smp.h>
99#include <linux/spinlock.h>
100#include <linux/delay.h>
101#include <linux/linkage.h>
102#include <linux/init.h>
103#include <linux/console.h>
104#include <linux/sysrq.h>
105#include <linux/module.h>
106#include <asm/system.h>
107#include <asm/cacheflush.h>
108#include <asm/current.h>
109#include <asm/signal.h>
110#include <asm/pgtable.h>
111#include <asm/ptrace.h>
112#include <asm/kgdb.h>
113#include <asm/io.h>
114
115/* Function pointers for linkage */
116kgdb_debug_hook_t *kgdb_debug_hook;
117kgdb_bus_error_hook_t *kgdb_bus_err_hook;
118
119int (*kgdb_getchar)(void);
120EXPORT_SYMBOL_GPL(kgdb_getchar);
121void (*kgdb_putchar)(int);
122EXPORT_SYMBOL_GPL(kgdb_putchar);
123
124static void put_debug_char(int c)
125{
126 if (!kgdb_putchar)
127 return;
128 (*kgdb_putchar)(c);
129}
130static int get_debug_char(void)
131{
132 if (!kgdb_getchar)
133 return -1;
134 return (*kgdb_getchar)();
135}
136
137/* Num chars in in/out bound buffers, register packets need NUMREGBYTES * 2 */
138#define BUFMAX 1024
139#define NUMREGBYTES (MAXREG*4)
140#define OUTBUFMAX (NUMREGBYTES*2+512)
141
142enum {
143 R0 = 0, R1, R2, R3, R4, R5, R6, R7,
144 R8, R9, R10, R11, R12, R13, R14, R15,
145 PC, PR, GBR, VBR, MACH, MACL, SR,
146 /* */
147 MAXREG
148};
149
150static unsigned int registers[MAXREG];
151struct kgdb_regs trap_registers;
152
153char kgdb_in_gdb_mode;
154char in_nmi; /* Set during NMI to prevent reentry */
155int kgdb_nofault; /* Boolean to ignore bus errs (i.e. in GDB) */
156
157/* Default values for SCI (can override via kernel args in setup.c) */
158#ifndef CONFIG_KGDB_DEFPORT
159#define CONFIG_KGDB_DEFPORT 1
160#endif
161
162#ifndef CONFIG_KGDB_DEFBAUD
163#define CONFIG_KGDB_DEFBAUD 115200
164#endif
165
166#if defined(CONFIG_KGDB_DEFPARITY_E)
167#define CONFIG_KGDB_DEFPARITY 'E'
168#elif defined(CONFIG_KGDB_DEFPARITY_O)
169#define CONFIG_KGDB_DEFPARITY 'O'
170#else /* CONFIG_KGDB_DEFPARITY_N */
171#define CONFIG_KGDB_DEFPARITY 'N'
172#endif
173
174#ifdef CONFIG_KGDB_DEFBITS_7
175#define CONFIG_KGDB_DEFBITS '7'
176#else /* CONFIG_KGDB_DEFBITS_8 */
177#define CONFIG_KGDB_DEFBITS '8'
178#endif
179
180/* SCI/UART settings, used in kgdb_console_setup() */
181int kgdb_portnum = CONFIG_KGDB_DEFPORT;
182EXPORT_SYMBOL_GPL(kgdb_portnum);
183int kgdb_baud = CONFIG_KGDB_DEFBAUD;
184EXPORT_SYMBOL_GPL(kgdb_baud);
185char kgdb_parity = CONFIG_KGDB_DEFPARITY;
186EXPORT_SYMBOL_GPL(kgdb_parity);
187char kgdb_bits = CONFIG_KGDB_DEFBITS;
188EXPORT_SYMBOL_GPL(kgdb_bits);
189
190/* Jump buffer for setjmp/longjmp */
191static jmp_buf rem_com_env;
192
193/* TRA differs sh3/4 */
194#if defined(CONFIG_CPU_SH3)
195#define TRA 0xffffffd0
196#elif defined(CONFIG_CPU_SH4)
197#define TRA 0xff000020
198#endif
199
200/* Macros for single step instruction identification */
201#define OPCODE_BT(op) (((op) & 0xff00) == 0x8900)
202#define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00)
203#define OPCODE_BTF_DISP(op) (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \
204 (((op) & 0x7f ) << 1))
205#define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00)
206#define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00)
207#define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000)
208#define OPCODE_BRA_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
209 (((op) & 0x7ff) << 1))
210#define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023)
211#define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8)
212#define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000)
213#define OPCODE_BSR_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
214 (((op) & 0x7ff) << 1))
215#define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003)
216#define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf)
217#define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b)
218#define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf)
219#define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b)
220#define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf)
221#define OPCODE_RTS(op) ((op) == 0xb)
222#define OPCODE_RTE(op) ((op) == 0x2b)
223
224#define SR_T_BIT_MASK 0x1
225#define STEP_OPCODE 0xc320
226#define BIOS_CALL_TRAP 0x3f
227
228/* Exception codes as per SH-4 core manual */
229#define ADDRESS_ERROR_LOAD_VEC 7
230#define ADDRESS_ERROR_STORE_VEC 8
231#define TRAP_VEC 11
232#define INVALID_INSN_VEC 12
233#define INVALID_SLOT_VEC 13
234#define NMI_VEC 14
235#define USER_BREAK_VEC 15
236#define SERIAL_BREAK_VEC 58
237
238/* Misc static */
239static int stepped_address;
240static short stepped_opcode;
241static char in_buffer[BUFMAX];
242static char out_buffer[OUTBUFMAX];
243
244static void kgdb_to_gdb(const char *s);
245
246/* Convert ch to hex */
247static int hex(const char ch)
248{
249 if ((ch >= 'a') && (ch <= 'f'))
250 return (ch - 'a' + 10);
251 if ((ch >= '0') && (ch <= '9'))
252 return (ch - '0');
253 if ((ch >= 'A') && (ch <= 'F'))
254 return (ch - 'A' + 10);
255 return (-1);
256}
257
258/* Convert the memory pointed to by mem into hex, placing result in buf.
259 Returns a pointer to the last char put in buf (null) */
260static char *mem_to_hex(const char *mem, char *buf, const int count)
261{
262 int i;
263 int ch;
264 unsigned short s_val;
265 unsigned long l_val;
266
267 /* Check for 16 or 32 */
268 if (count == 2 && ((long) mem & 1) == 0) {
269 s_val = *(unsigned short *) mem;
270 mem = (char *) &s_val;
271 } else if (count == 4 && ((long) mem & 3) == 0) {
272 l_val = *(unsigned long *) mem;
273 mem = (char *) &l_val;
274 }
275 for (i = 0; i < count; i++) {
276 ch = *mem++;
277 buf = pack_hex_byte(buf, ch);
278 }
279 *buf = 0;
280 return (buf);
281}
282
283/* Convert the hex array pointed to by buf into binary, to be placed in mem.
284 Return a pointer to the character after the last byte written */
285static char *hex_to_mem(const char *buf, char *mem, const int count)
286{
287 int i;
288 unsigned char ch;
289
290 for (i = 0; i < count; i++) {
291 ch = hex(*buf++) << 4;
292 ch = ch + hex(*buf++);
293 *mem++ = ch;
294 }
295 return (mem);
296}
297
298/* While finding valid hex chars, convert to an integer, then return it */
299static int hex_to_int(char **ptr, int *int_value)
300{
301 int num_chars = 0;
302 int hex_value;
303
304 *int_value = 0;
305
306 while (**ptr) {
307 hex_value = hex(**ptr);
308 if (hex_value >= 0) {
309 *int_value = (*int_value << 4) | hex_value;
310 num_chars++;
311 } else
312 break;
313 (*ptr)++;
314 }
315 return num_chars;
316}
317
318/* Copy the binary array pointed to by buf into mem. Fix $, #,
319 and 0x7d escaped with 0x7d. Return a pointer to the character
320 after the last byte written. */
321static char *ebin_to_mem(const char *buf, char *mem, int count)
322{
323 for (; count > 0; count--, buf++) {
324 if (*buf == 0x7d)
325 *mem++ = *(++buf) ^ 0x20;
326 else
327 *mem++ = *buf;
328 }
329 return mem;
330}
331
332/* Scan for the start char '$', read the packet and check the checksum */
333static void get_packet(char *buffer, int buflen)
334{
335 unsigned char checksum;
336 unsigned char xmitcsum;
337 int i;
338 int count;
339 char ch;
340
341 do {
342 /* Ignore everything until the start character */
343 while ((ch = get_debug_char()) != '$');
344
345 checksum = 0;
346 xmitcsum = -1;
347 count = 0;
348
349 /* Now, read until a # or end of buffer is found */
350 while (count < (buflen - 1)) {
351 ch = get_debug_char();
352
353 if (ch == '#')
354 break;
355
356 checksum = checksum + ch;
357 buffer[count] = ch;
358 count = count + 1;
359 }
360
361 buffer[count] = 0;
362
363 /* Continue to read checksum following # */
364 if (ch == '#') {
365 xmitcsum = hex(get_debug_char()) << 4;
366 xmitcsum += hex(get_debug_char());
367
368 /* Checksum */
369 if (checksum != xmitcsum)
370 put_debug_char('-'); /* Failed checksum */
371 else {
372 /* Ack successful transfer */
373 put_debug_char('+');
374
375 /* If a sequence char is present, reply
376 the sequence ID */
377 if (buffer[2] == ':') {
378 put_debug_char(buffer[0]);
379 put_debug_char(buffer[1]);
380
381 /* Remove sequence chars from buffer */
382 count = strlen(buffer);
383 for (i = 3; i <= count; i++)
384 buffer[i - 3] = buffer[i];
385 }
386 }
387 }
388 }
389 while (checksum != xmitcsum); /* Keep trying while we fail */
390}
391
392/* Send the packet in the buffer with run-length encoding */
393static void put_packet(char *buffer)
394{
395 int checksum;
396 char *src;
397 int runlen;
398 int encode;
399
400 do {
401 src = buffer;
402 put_debug_char('$');
403 checksum = 0;
404
405 /* Continue while we still have chars left */
406 while (*src) {
407 /* Check for runs up to 99 chars long */
408 for (runlen = 1; runlen < 99; runlen++) {
409 if (src[0] != src[runlen])
410 break;
411 }
412
413 if (runlen > 3) {
414 /* Got a useful amount, send encoding */
415 encode = runlen + ' ' - 4;
416 put_debug_char(*src); checksum += *src;
417 put_debug_char('*'); checksum += '*';
418 put_debug_char(encode); checksum += encode;
419 src += runlen;
420 } else {
421 /* Otherwise just send the current char */
422 put_debug_char(*src); checksum += *src;
423 src += 1;
424 }
425 }
426
427 /* '#' Separator, put high and low components of checksum */
428 put_debug_char('#');
429 put_debug_char(hex_asc_hi(checksum));
430 put_debug_char(hex_asc_lo(checksum));
431 }
432 while ((get_debug_char()) != '+'); /* While no ack */
433}
434
435/* A bus error has occurred - perform a longjmp to return execution and
436 allow handling of the error */
437static void kgdb_handle_bus_error(void)
438{
439 longjmp(rem_com_env, 1);
440}
441
442/* Translate SH-3/4 exception numbers to unix-like signal values */
443static int compute_signal(const int excep_code)
444{
445 int sigval;
446
447 switch (excep_code) {
448
449 case INVALID_INSN_VEC:
450 case INVALID_SLOT_VEC:
451 sigval = SIGILL;
452 break;
453 case ADDRESS_ERROR_LOAD_VEC:
454 case ADDRESS_ERROR_STORE_VEC:
455 sigval = SIGSEGV;
456 break;
457
458 case SERIAL_BREAK_VEC:
459 case NMI_VEC:
460 sigval = SIGINT;
461 break;
462
463 case USER_BREAK_VEC:
464 case TRAP_VEC:
465 sigval = SIGTRAP;
466 break;
467
468 default:
469 sigval = SIGBUS; /* "software generated" */
470 break;
471 }
472
473 return (sigval);
474}
475
476/* Make a local copy of the registers passed into the handler (bletch) */
477static void kgdb_regs_to_gdb_regs(const struct kgdb_regs *regs,
478 int *gdb_regs)
479{
480 gdb_regs[R0] = regs->regs[R0];
481 gdb_regs[R1] = regs->regs[R1];
482 gdb_regs[R2] = regs->regs[R2];
483 gdb_regs[R3] = regs->regs[R3];
484 gdb_regs[R4] = regs->regs[R4];
485 gdb_regs[R5] = regs->regs[R5];
486 gdb_regs[R6] = regs->regs[R6];
487 gdb_regs[R7] = regs->regs[R7];
488 gdb_regs[R8] = regs->regs[R8];
489 gdb_regs[R9] = regs->regs[R9];
490 gdb_regs[R10] = regs->regs[R10];
491 gdb_regs[R11] = regs->regs[R11];
492 gdb_regs[R12] = regs->regs[R12];
493 gdb_regs[R13] = regs->regs[R13];
494 gdb_regs[R14] = regs->regs[R14];
495 gdb_regs[R15] = regs->regs[R15];
496 gdb_regs[PC] = regs->pc;
497 gdb_regs[PR] = regs->pr;
498 gdb_regs[GBR] = regs->gbr;
499 gdb_regs[MACH] = regs->mach;
500 gdb_regs[MACL] = regs->macl;
501 gdb_regs[SR] = regs->sr;
502 gdb_regs[VBR] = regs->vbr;
503}
504
505/* Copy local gdb registers back to kgdb regs, for later copy to kernel */
506static void gdb_regs_to_kgdb_regs(const int *gdb_regs,
507 struct kgdb_regs *regs)
508{
509 regs->regs[R0] = gdb_regs[R0];
510 regs->regs[R1] = gdb_regs[R1];
511 regs->regs[R2] = gdb_regs[R2];
512 regs->regs[R3] = gdb_regs[R3];
513 regs->regs[R4] = gdb_regs[R4];
514 regs->regs[R5] = gdb_regs[R5];
515 regs->regs[R6] = gdb_regs[R6];
516 regs->regs[R7] = gdb_regs[R7];
517 regs->regs[R8] = gdb_regs[R8];
518 regs->regs[R9] = gdb_regs[R9];
519 regs->regs[R10] = gdb_regs[R10];
520 regs->regs[R11] = gdb_regs[R11];
521 regs->regs[R12] = gdb_regs[R12];
522 regs->regs[R13] = gdb_regs[R13];
523 regs->regs[R14] = gdb_regs[R14];
524 regs->regs[R15] = gdb_regs[R15];
525 regs->pc = gdb_regs[PC];
526 regs->pr = gdb_regs[PR];
527 regs->gbr = gdb_regs[GBR];
528 regs->mach = gdb_regs[MACH];
529 regs->macl = gdb_regs[MACL];
530 regs->sr = gdb_regs[SR];
531 regs->vbr = gdb_regs[VBR];
532}
533
534/* Calculate the new address for after a step */
535static short *get_step_address(void)
536{
537 short op = *(short *) trap_registers.pc;
538 long addr;
539
540 /* BT */
541 if (OPCODE_BT(op)) {
542 if (trap_registers.sr & SR_T_BIT_MASK)
543 addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
544 else
545 addr = trap_registers.pc + 2;
546 }
547
548 /* BTS */
549 else if (OPCODE_BTS(op)) {
550 if (trap_registers.sr & SR_T_BIT_MASK)
551 addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
552 else
553 addr = trap_registers.pc + 4; /* Not in delay slot */
554 }
555
556 /* BF */
557 else if (OPCODE_BF(op)) {
558 if (!(trap_registers.sr & SR_T_BIT_MASK))
559 addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
560 else
561 addr = trap_registers.pc + 2;
562 }
563
564 /* BFS */
565 else if (OPCODE_BFS(op)) {
566 if (!(trap_registers.sr & SR_T_BIT_MASK))
567 addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
568 else
569 addr = trap_registers.pc + 4; /* Not in delay slot */
570 }
571
572 /* BRA */
573 else if (OPCODE_BRA(op))
574 addr = trap_registers.pc + 4 + OPCODE_BRA_DISP(op);
575
576 /* BRAF */
577 else if (OPCODE_BRAF(op))
578 addr = trap_registers.pc + 4
579 + trap_registers.regs[OPCODE_BRAF_REG(op)];
580
581 /* BSR */
582 else if (OPCODE_BSR(op))
583 addr = trap_registers.pc + 4 + OPCODE_BSR_DISP(op);
584
585 /* BSRF */
586 else if (OPCODE_BSRF(op))
587 addr = trap_registers.pc + 4
588 + trap_registers.regs[OPCODE_BSRF_REG(op)];
589
590 /* JMP */
591 else if (OPCODE_JMP(op))
592 addr = trap_registers.regs[OPCODE_JMP_REG(op)];
593
594 /* JSR */
595 else if (OPCODE_JSR(op))
596 addr = trap_registers.regs[OPCODE_JSR_REG(op)];
597
598 /* RTS */
599 else if (OPCODE_RTS(op))
600 addr = trap_registers.pr;
601
602 /* RTE */
603 else if (OPCODE_RTE(op))
604 addr = trap_registers.regs[15];
605
606 /* Other */
607 else
608 addr = trap_registers.pc + 2;
609
610 flush_icache_range(addr, addr + 2);
611 return (short *) addr;
612}
613
614/* Set up a single-step. Replace the instruction immediately after the
615 current instruction (i.e. next in the expected flow of control) with a
616 trap instruction, so that returning will cause only a single instruction
617 to be executed. Note that this model is slightly broken for instructions
618 with delay slots (e.g. B[TF]S, BSR, BRA etc), where both the branch
619 and the instruction in the delay slot will be executed. */
620static void do_single_step(void)
621{
622 unsigned short *addr = 0;
623
624 /* Determine where the target instruction will send us to */
625 addr = get_step_address();
626 stepped_address = (int)addr;
627
628 /* Replace it */
629 stepped_opcode = *(short *)addr;
630 *addr = STEP_OPCODE;
631
632 /* Flush and return */
633 flush_icache_range((long) addr, (long) addr + 2);
634}
635
636/* Undo a single step */
637static void undo_single_step(void)
638{
639 /* If we have stepped, put back the old instruction */
640 /* Use stepped_address in case we stopped elsewhere */
641 if (stepped_opcode != 0) {
642 *(short*)stepped_address = stepped_opcode;
643 flush_icache_range(stepped_address, stepped_address + 2);
644 }
645 stepped_opcode = 0;
646}
647
648/* Send a signal message */
649static void send_signal_msg(const int signum)
650{
651 out_buffer[0] = 'S';
652 out_buffer[1] = hex_asc_hi(signum);
653 out_buffer[2] = hex_asc_lo(signum);
654 out_buffer[3] = 0;
655 put_packet(out_buffer);
656}
657
658/* Reply that all was well */
659static void send_ok_msg(void)
660{
661 strcpy(out_buffer, "OK");
662 put_packet(out_buffer);
663}
664
665/* Reply that an error occurred */
666static void send_err_msg(void)
667{
668 strcpy(out_buffer, "E01");
669 put_packet(out_buffer);
670}
671
672/* Empty message indicates unrecognised command */
673static void send_empty_msg(void)
674{
675 put_packet("");
676}
677
678/* Read memory due to 'm' message */
679static void read_mem_msg(void)
680{
681 char *ptr;
682 int addr;
683 int length;
684
685 /* Jmp, disable bus error handler */
686 if (setjmp(rem_com_env) == 0) {
687
688 kgdb_nofault = 1;
689
690 /* Walk through, have m<addr>,<length> */
691 ptr = &in_buffer[1];
692 if (hex_to_int(&ptr, &addr) && (*ptr++ == ','))
693 if (hex_to_int(&ptr, &length)) {
694 ptr = 0;
695 if (length * 2 > OUTBUFMAX)
696 length = OUTBUFMAX / 2;
697 mem_to_hex((char *) addr, out_buffer, length);
698 }
699 if (ptr)
700 send_err_msg();
701 else
702 put_packet(out_buffer);
703 } else
704 send_err_msg();
705
706 /* Restore bus error handler */
707 kgdb_nofault = 0;
708}
709
710/* Write memory due to 'M' or 'X' message */
711static void write_mem_msg(int binary)
712{
713 char *ptr;
714 int addr;
715 int length;
716
717 if (setjmp(rem_com_env) == 0) {
718
719 kgdb_nofault = 1;
720
721 /* Walk through, have M<addr>,<length>:<data> */
722 ptr = &in_buffer[1];
723 if (hex_to_int(&ptr, &addr) && (*ptr++ == ','))
724 if (hex_to_int(&ptr, &length) && (*ptr++ == ':')) {
725 if (binary)
726 ebin_to_mem(ptr, (char*)addr, length);
727 else
728 hex_to_mem(ptr, (char*)addr, length);
729 flush_icache_range(addr, addr + length);
730 ptr = 0;
731 send_ok_msg();
732 }
733 if (ptr)
734 send_err_msg();
735 } else
736 send_err_msg();
737
738 /* Restore bus error handler */
739 kgdb_nofault = 0;
740}
741
742/* Continue message */
743static void continue_msg(void)
744{
745 /* Try to read optional parameter, PC unchanged if none */
746 char *ptr = &in_buffer[1];
747 int addr;
748
749 if (hex_to_int(&ptr, &addr))
750 trap_registers.pc = addr;
751}
752
753/* Continue message with signal */
754static void continue_with_sig_msg(void)
755{
756 int signal;
757 char *ptr = &in_buffer[1];
758 int addr;
759
760 /* Report limitation */
761 kgdb_to_gdb("Cannot force signal in kgdb, continuing anyway.\n");
762
763 /* Signal */
764 hex_to_int(&ptr, &signal);
765 if (*ptr == ';')
766 ptr++;
767
768 /* Optional address */
769 if (hex_to_int(&ptr, &addr))
770 trap_registers.pc = addr;
771}
772
773/* Step message */
774static void step_msg(void)
775{
776 continue_msg();
777 do_single_step();
778}
779
780/* Step message with signal */
781static void step_with_sig_msg(void)
782{
783 continue_with_sig_msg();
784 do_single_step();
785}
786
787/* Send register contents */
788static void send_regs_msg(void)
789{
790 kgdb_regs_to_gdb_regs(&trap_registers, registers);
791 mem_to_hex((char *) registers, out_buffer, NUMREGBYTES);
792 put_packet(out_buffer);
793}
794
795/* Set register contents - currently can't set other thread's registers */
796static void set_regs_msg(void)
797{
798 kgdb_regs_to_gdb_regs(&trap_registers, registers);
799 hex_to_mem(&in_buffer[1], (char *) registers, NUMREGBYTES);
800 gdb_regs_to_kgdb_regs(registers, &trap_registers);
801 send_ok_msg();
802}
803
804#ifdef CONFIG_SH_KGDB_CONSOLE
805/*
806 * Bring up the ports..
807 */
808static int __init kgdb_serial_setup(void)
809{
810 struct console dummy;
811 return kgdb_console_setup(&dummy, 0);
812}
813#else
814#define kgdb_serial_setup() 0
815#endif
816
817/* The command loop, read and act on requests */
818static void kgdb_command_loop(const int excep_code, const int trapa_value)
819{
820 int sigval;
821
822 /* Enter GDB mode (e.g. after detach) */
823 if (!kgdb_in_gdb_mode) {
824 /* Do serial setup, notify user, issue preemptive ack */
825 printk(KERN_NOTICE "KGDB: Waiting for GDB\n");
826 kgdb_in_gdb_mode = 1;
827 put_debug_char('+');
828 }
829
830 /* Reply to host that an exception has occurred */
831 sigval = compute_signal(excep_code);
832 send_signal_msg(sigval);
833
834 /* TRAP_VEC exception indicates a software trap inserted in place of
835 code by GDB so back up PC by one instruction, as this instruction
836 will later be replaced by its original one. Do NOT do this for
837 trap 0xff, since that indicates a compiled-in breakpoint which
838 will not be replaced (and we would retake the trap forever) */
839 if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2)))
840 trap_registers.pc -= 2;
841
842 /* Undo any stepping we may have done */
843 undo_single_step();
844
845 while (1) {
846 out_buffer[0] = 0;
847 get_packet(in_buffer, BUFMAX);
848
849 /* Examine first char of buffer to see what we need to do */
850 switch (in_buffer[0]) {
851 case '?': /* Send which signal we've received */
852 send_signal_msg(sigval);
853 break;
854
855 case 'g': /* Return the values of the CPU registers */
856 send_regs_msg();
857 break;
858
859 case 'G': /* Set the value of the CPU registers */
860 set_regs_msg();
861 break;
862
863 case 'm': /* Read LLLL bytes address AA..AA */
864 read_mem_msg();
865 break;
866
867 case 'M': /* Write LLLL bytes address AA..AA, ret OK */
868 write_mem_msg(0); /* 0 = data in hex */
869 break;
870
871 case 'X': /* Write LLLL bytes esc bin address AA..AA */
872 if (kgdb_bits == '8')
873 write_mem_msg(1); /* 1 = data in binary */
874 else
875 send_empty_msg();
876 break;
877
878 case 'C': /* Continue, signum included, we ignore it */
879 continue_with_sig_msg();
880 return;
881
882 case 'c': /* Continue at address AA..AA (optional) */
883 continue_msg();
884 return;
885
886 case 'S': /* Step, signum included, we ignore it */
887 step_with_sig_msg();
888 return;
889
890 case 's': /* Step one instruction from AA..AA */
891 step_msg();
892 return;
893
894 case 'k': /* 'Kill the program' with a kernel ? */
895 break;
896
897 case 'D': /* Detach from program, send reply OK */
898 kgdb_in_gdb_mode = 0;
899 send_ok_msg();
900 get_debug_char();
901 return;
902
903 default:
904 send_empty_msg();
905 break;
906 }
907 }
908}
909
910/* There has been an exception, most likely a breakpoint. */
911static void handle_exception(struct pt_regs *regs)
912{
913 int excep_code, vbr_val;
914 int count;
915 int trapa_value = ctrl_inl(TRA);
916
917 /* Copy kernel regs (from stack) */
918 for (count = 0; count < 16; count++)
919 trap_registers.regs[count] = regs->regs[count];
920 trap_registers.pc = regs->pc;
921 trap_registers.pr = regs->pr;
922 trap_registers.sr = regs->sr;
923 trap_registers.gbr = regs->gbr;
924 trap_registers.mach = regs->mach;
925 trap_registers.macl = regs->macl;
926
927 asm("stc vbr, %0":"=r"(vbr_val));
928 trap_registers.vbr = vbr_val;
929
930 /* Get excode for command loop call, user access */
931 asm("stc r2_bank, %0":"=r"(excep_code));
932
933 /* Act on the exception */
934 kgdb_command_loop(excep_code, trapa_value);
935
936 /* Copy back the (maybe modified) registers */
937 for (count = 0; count < 16; count++)
938 regs->regs[count] = trap_registers.regs[count];
939 regs->pc = trap_registers.pc;
940 regs->pr = trap_registers.pr;
941 regs->sr = trap_registers.sr;
942 regs->gbr = trap_registers.gbr;
943 regs->mach = trap_registers.mach;
944 regs->macl = trap_registers.macl;
945
946 vbr_val = trap_registers.vbr;
947 asm("ldc %0, vbr": :"r"(vbr_val));
948}
949
950asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
951 unsigned long r6, unsigned long r7,
952 struct pt_regs __regs)
953{
954 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
955 handle_exception(regs);
956}
957
958/* Initialise the KGDB data structures and serial configuration */
959int __init kgdb_init(void)
960{
961 in_nmi = 0;
962 kgdb_nofault = 0;
963 stepped_opcode = 0;
964 kgdb_in_gdb_mode = 0;
965
966 if (kgdb_serial_setup() != 0) {
967 printk(KERN_NOTICE "KGDB: serial setup error\n");
968 return -1;
969 }
970
971 /* Init ptr to exception handler */
972 kgdb_debug_hook = handle_exception;
973 kgdb_bus_err_hook = kgdb_handle_bus_error;
974
975 /* Enter kgdb now if requested, or just report init done */
976 printk(KERN_NOTICE "KGDB: stub is initialized.\n");
977
978 return 0;
979}
980
981/* Make function available for "user messages"; console will use it too. */
982
983char gdbmsgbuf[BUFMAX];
984#define MAXOUT ((BUFMAX-2)/2)
985
986static void kgdb_msg_write(const char *s, unsigned count)
987{
988 int i;
989 int wcount;
990 char *bufptr;
991
992 /* 'O'utput */
993 gdbmsgbuf[0] = 'O';
994
995 /* Fill and send buffers... */
996 while (count > 0) {
997 bufptr = gdbmsgbuf + 1;
998
999 /* Calculate how many this time */
1000 wcount = (count > MAXOUT) ? MAXOUT : count;
1001
1002 /* Pack in hex chars */
1003 for (i = 0; i < wcount; i++)
1004 bufptr = pack_hex_byte(bufptr, s[i]);
1005 *bufptr = '\0';
1006
1007 /* Move up */
1008 s += wcount;
1009 count -= wcount;
1010
1011 /* Write packet */
1012 put_packet(gdbmsgbuf);
1013 }
1014}
1015
1016static void kgdb_to_gdb(const char *s)
1017{
1018 kgdb_msg_write(s, strlen(s));
1019}
1020
1021#ifdef CONFIG_SH_KGDB_CONSOLE
1022void kgdb_console_write(struct console *co, const char *s, unsigned count)
1023{
1024 /* Bail if we're not talking to GDB */
1025 if (!kgdb_in_gdb_mode)
1026 return;
1027
1028 kgdb_msg_write(s, count);
1029}
1030#endif
1031
1032#ifdef CONFIG_KGDB_SYSRQ
1033static void sysrq_handle_gdb(int key, struct tty_struct *tty)
1034{
1035 printk("Entering GDB stub\n");
1036 breakpoint();
1037}
1038
1039static struct sysrq_key_op sysrq_gdb_op = {
1040 .handler = sysrq_handle_gdb,
1041 .help_msg = "Gdb",
1042 .action_msg = "GDB",
1043};
1044
1045static int gdb_register_sysrq(void)
1046{
1047 printk("Registering GDB sysrq handler\n");
1048 register_sysrq_key('g', &sysrq_gdb_op);
1049 return 0;
1050}
1051module_init(gdb_register_sysrq);
1052#endif
diff --git a/arch/sh/kernel/pm.c b/arch/sh/kernel/pm.c
deleted file mode 100644
index 10ab62c9aede..000000000000
--- a/arch/sh/kernel/pm.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * Generic Power Management Routine
3 *
4 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License.
8 */
9#include <linux/suspend.h>
10#include <linux/delay.h>
11#include <linux/gfp.h>
12#include <asm/freq.h>
13#include <asm/io.h>
14#include <asm/watchdog.h>
15#include <asm/pm.h>
16
17#define INTR_OFFSET 0x600
18
19#define STBCR 0xffffff82
20#define STBCR2 0xffffff88
21
22#define STBCR_STBY 0x80
23#define STBCR_MSTP2 0x04
24
25#define MCR 0xffffff68
26#define RTCNT 0xffffff70
27
28#define MCR_RMODE 2
29#define MCR_RFSH 4
30
31void pm_enter(void)
32{
33 u8 stbcr, csr;
34 u16 frqcr, mcr;
35 u32 vbr_new, vbr_old;
36
37 set_bl_bit();
38
39 /* set wdt */
40 csr = sh_wdt_read_csr();
41 csr &= ~WTCSR_TME;
42 csr |= WTCSR_CKS_4096;
43 sh_wdt_write_csr(csr);
44 csr = sh_wdt_read_csr();
45 sh_wdt_write_cnt(0);
46
47 /* disable PLL1 */
48 frqcr = ctrl_inw(FRQCR);
49 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
50 ctrl_outw(frqcr, FRQCR);
51
52 /* enable standby */
53 stbcr = ctrl_inb(STBCR);
54 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
55
56 /* set self-refresh */
57 mcr = ctrl_inw(MCR);
58 ctrl_outw(mcr & ~MCR_RFSH, MCR);
59
60 /* set interrupt handler */
61 asm volatile("stc vbr, %0" : "=r" (vbr_old));
62 vbr_new = get_zeroed_page(GFP_ATOMIC);
63 udelay(50);
64 memcpy((void*)(vbr_new + INTR_OFFSET),
65 &wakeup_start, &wakeup_end - &wakeup_start);
66 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
67
68 ctrl_outw(0, RTCNT);
69 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
70
71 cpu_sleep();
72
73 asm volatile("ldc %0, vbr" : : "r" (vbr_old));
74
75 free_page(vbr_new);
76
77 /* enable PLL1 */
78 frqcr = ctrl_inw(FRQCR);
79 frqcr |= FRQCR_PSTBY;
80 ctrl_outw(frqcr, FRQCR);
81 udelay(50);
82 frqcr |= FRQCR_PLLEN;
83 ctrl_outw(frqcr, FRQCR);
84
85 ctrl_outb(stbcr, STBCR);
86
87 clear_bl_bit();
88}
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index b965f0282c7d..ddafbbbab2ab 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -32,65 +32,8 @@
32#include <asm/fpu.h> 32#include <asm/fpu.h>
33#include <asm/syscalls.h> 33#include <asm/syscalls.h>
34 34
35static int hlt_counter;
36int ubc_usercnt = 0; 35int ubc_usercnt = 0;
37 36
38void (*pm_idle)(void);
39void (*pm_power_off)(void);
40EXPORT_SYMBOL(pm_power_off);
41
42static int __init nohlt_setup(char *__unused)
43{
44 hlt_counter = 1;
45 return 1;
46}
47__setup("nohlt", nohlt_setup);
48
49static int __init hlt_setup(char *__unused)
50{
51 hlt_counter = 0;
52 return 1;
53}
54__setup("hlt", hlt_setup);
55
56static void default_idle(void)
57{
58 if (!hlt_counter) {
59 clear_thread_flag(TIF_POLLING_NRFLAG);
60 smp_mb__after_clear_bit();
61 set_bl_bit();
62 while (!need_resched())
63 cpu_sleep();
64 clear_bl_bit();
65 set_thread_flag(TIF_POLLING_NRFLAG);
66 } else
67 while (!need_resched())
68 cpu_relax();
69}
70
71void cpu_idle(void)
72{
73 set_thread_flag(TIF_POLLING_NRFLAG);
74
75 /* endless idle loop with no priority at all */
76 while (1) {
77 void (*idle)(void) = pm_idle;
78
79 if (!idle)
80 idle = default_idle;
81
82 tick_nohz_stop_sched_tick(1);
83 while (!need_resched())
84 idle();
85 tick_nohz_restart_sched_tick();
86
87 preempt_enable_no_resched();
88 schedule();
89 preempt_disable();
90 check_pgt_cache();
91 }
92}
93
94void machine_restart(char * __unused) 37void machine_restart(char * __unused)
95{ 38{
96 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ 39 /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
@@ -115,8 +58,8 @@ void machine_power_off(void)
115void show_regs(struct pt_regs * regs) 58void show_regs(struct pt_regs * regs)
116{ 59{
117 printk("\n"); 60 printk("\n");
118 printk("Pid : %d, Comm: %20s\n", task_pid_nr(current), current->comm); 61 printk("Pid : %d, Comm: \t\t%s\n", task_pid_nr(current), current->comm);
119 printk("CPU : %d %s (%s %.*s)\n", 62 printk("CPU : %d \t\t%s (%s %.*s)\n\n",
120 smp_processor_id(), print_tainted(), init_utsname()->release, 63 smp_processor_id(), print_tainted(), init_utsname()->release,
121 (int)strcspn(init_utsname()->version, " "), 64 (int)strcspn(init_utsname()->version, " "),
122 init_utsname()->version); 65 init_utsname()->version);
@@ -148,26 +91,16 @@ void show_regs(struct pt_regs * regs)
148 regs->mach, regs->macl, regs->gbr, regs->pr); 91 regs->mach, regs->macl, regs->gbr, regs->pr);
149 92
150 show_trace(NULL, (unsigned long *)regs->regs[15], regs); 93 show_trace(NULL, (unsigned long *)regs->regs[15], regs);
94 show_code(regs);
151} 95}
152 96
153/* 97/*
154 * Create a kernel thread 98 * Create a kernel thread
155 */ 99 */
156 100ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *))
157/* 101{
158 * This is the mechanism for creating a new kernel thread. 102 do_exit(fn(arg));
159 * 103}
160 */
161extern void kernel_thread_helper(void);
162__asm__(".align 5\n"
163 "kernel_thread_helper:\n\t"
164 "jsr @r5\n\t"
165 " nop\n\t"
166 "mov.l 1f, r1\n\t"
167 "jsr @r1\n\t"
168 " mov r0, r4\n\t"
169 ".align 2\n\t"
170 "1:.long do_exit");
171 104
172/* Don't use this in BL=1(cli). Or else, CPU resets! */ 105/* Don't use this in BL=1(cli). Or else, CPU resets! */
173int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) 106int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index b7aa09235b51..a7e5f2e74bac 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -23,7 +23,6 @@
23#include <linux/reboot.h> 23#include <linux/reboot.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/proc_fs.h>
27#include <linux/io.h> 26#include <linux/io.h>
28#include <asm/syscalls.h> 27#include <asm/syscalls.h>
29#include <asm/uaccess.h> 28#include <asm/uaccess.h>
@@ -33,56 +32,6 @@
33 32
34struct task_struct *last_task_used_math = NULL; 33struct task_struct *last_task_used_math = NULL;
35 34
36static int hlt_counter = 1;
37
38#define HARD_IDLE_TIMEOUT (HZ / 3)
39
40static int __init nohlt_setup(char *__unused)
41{
42 hlt_counter = 1;
43 return 1;
44}
45
46static int __init hlt_setup(char *__unused)
47{
48 hlt_counter = 0;
49 return 1;
50}
51
52__setup("nohlt", nohlt_setup);
53__setup("hlt", hlt_setup);
54
55static inline void hlt(void)
56{
57 __asm__ __volatile__ ("sleep" : : : "memory");
58}
59
60/*
61 * The idle loop on a uniprocessor SH..
62 */
63void cpu_idle(void)
64{
65 /* endless idle loop with no priority at all */
66 while (1) {
67 if (hlt_counter) {
68 while (!need_resched())
69 cpu_relax();
70 } else {
71 local_irq_disable();
72 while (!need_resched()) {
73 local_irq_enable();
74 hlt();
75 local_irq_disable();
76 }
77 local_irq_enable();
78 }
79 preempt_enable_no_resched();
80 schedule();
81 preempt_disable();
82 }
83
84}
85
86void machine_restart(char * __unused) 35void machine_restart(char * __unused)
87{ 36{
88 extern void phys_stext(void); 37 extern void phys_stext(void);
@@ -97,13 +46,6 @@ void machine_halt(void)
97 46
98void machine_power_off(void) 47void machine_power_off(void)
99{ 48{
100#if 0
101 /* Disable watchdog timer */
102 ctrl_outl(0xa5000000, WTCSR);
103 /* Configure deep standby on sleep */
104 ctrl_outl(0x03, STBCR);
105#endif
106
107 __asm__ __volatile__ ( 49 __asm__ __volatile__ (
108 "sleep\n\t" 50 "sleep\n\t"
109 "synci\n\t" 51 "synci\n\t"
@@ -113,9 +55,6 @@ void machine_power_off(void)
113 panic("Unexpected wakeup!\n"); 55 panic("Unexpected wakeup!\n");
114} 56}
115 57
116void (*pm_power_off)(void) = machine_power_off;
117EXPORT_SYMBOL(pm_power_off);
118
119void show_regs(struct pt_regs * regs) 58void show_regs(struct pt_regs * regs)
120{ 59{
121 unsigned long long ah, al, bh, bl, ch, cl; 60 unsigned long long ah, al, bh, bl, ch, cl;
@@ -365,18 +304,6 @@ void show_regs(struct pt_regs * regs)
365 } 304 }
366} 305}
367 306
368struct task_struct * alloc_task_struct(void)
369{
370 /* Get task descriptor pages */
371 return (struct task_struct *)
372 __get_free_pages(GFP_KERNEL, get_order(THREAD_SIZE));
373}
374
375void free_task_struct(struct task_struct *p)
376{
377 free_pages((unsigned long) p, get_order(THREAD_SIZE));
378}
379
380/* 307/*
381 * Create a kernel thread 308 * Create a kernel thread
382 */ 309 */
@@ -662,41 +589,3 @@ unsigned long get_wchan(struct task_struct *p)
662#endif 589#endif
663 return pc; 590 return pc;
664} 591}
665
666/* Provide a /proc/asids file that lists out the
667 ASIDs currently associated with the processes. (If the DM.PC register is
668 examined through the debug link, this shows ASID + PC. To make use of this,
669 the PID->ASID relationship needs to be known. This is primarily for
670 debugging.)
671 */
672
673#if defined(CONFIG_SH64_PROC_ASIDS)
674static int
675asids_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data)
676{
677 int len=0;
678 struct task_struct *p;
679 read_lock(&tasklist_lock);
680 for_each_process(p) {
681 int pid = p->pid;
682
683 if (!pid)
684 continue;
685 if (p->mm)
686 len += sprintf(buf+len, "%5d : %02lx\n", pid,
687 asid_cache(smp_processor_id()));
688 else
689 len += sprintf(buf+len, "%5d : (none)\n", pid);
690 }
691 read_unlock(&tasklist_lock);
692 *eof = 1;
693 return len;
694}
695
696static int __init register_proc_asids(void)
697{
698 create_proc_read_entry("asids", 0, NULL, asids_proc_info, NULL);
699 return 0;
700}
701__initcall(register_proc_asids);
702#endif
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index e15b099c1f06..695097438f02 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -2,7 +2,7 @@
2 * arch/sh/kernel/ptrace_64.c 2 * arch/sh/kernel/ptrace_64.c
3 * 3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2003 - 2007 Paul Mundt 5 * Copyright (C) 2003 - 2008 Paul Mundt
6 * 6 *
7 * Started from SH3/4 version: 7 * Started from SH3/4 version:
8 * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 8 * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
@@ -29,6 +29,8 @@
29#include <linux/audit.h> 29#include <linux/audit.h>
30#include <linux/seccomp.h> 30#include <linux/seccomp.h>
31#include <linux/tracehook.h> 31#include <linux/tracehook.h>
32#include <linux/elf.h>
33#include <linux/regset.h>
32#include <asm/io.h> 34#include <asm/io.h>
33#include <asm/uaccess.h> 35#include <asm/uaccess.h>
34#include <asm/pgtable.h> 36#include <asm/pgtable.h>
@@ -137,6 +139,165 @@ void user_disable_single_step(struct task_struct *child)
137 regs->sr &= ~SR_SSTEP; 139 regs->sr &= ~SR_SSTEP;
138} 140}
139 141
142static int genregs_get(struct task_struct *target,
143 const struct user_regset *regset,
144 unsigned int pos, unsigned int count,
145 void *kbuf, void __user *ubuf)
146{
147 const struct pt_regs *regs = task_pt_regs(target);
148 int ret;
149
150 /* PC, SR, SYSCALL */
151 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
152 &regs->pc,
153 0, 3 * sizeof(unsigned long long));
154
155 /* R1 -> R63 */
156 if (!ret)
157 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
158 regs->regs,
159 offsetof(struct pt_regs, regs[0]),
160 63 * sizeof(unsigned long long));
161 /* TR0 -> TR7 */
162 if (!ret)
163 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
164 regs->tregs,
165 offsetof(struct pt_regs, tregs[0]),
166 8 * sizeof(unsigned long long));
167
168 if (!ret)
169 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
170 sizeof(struct pt_regs), -1);
171
172 return ret;
173}
174
175static int genregs_set(struct task_struct *target,
176 const struct user_regset *regset,
177 unsigned int pos, unsigned int count,
178 const void *kbuf, const void __user *ubuf)
179{
180 struct pt_regs *regs = task_pt_regs(target);
181 int ret;
182
183 /* PC, SR, SYSCALL */
184 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
185 &regs->pc,
186 0, 3 * sizeof(unsigned long long));
187
188 /* R1 -> R63 */
189 if (!ret && count > 0)
190 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
191 regs->regs,
192 offsetof(struct pt_regs, regs[0]),
193 63 * sizeof(unsigned long long));
194
195 /* TR0 -> TR7 */
196 if (!ret && count > 0)
197 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
198 regs->tregs,
199 offsetof(struct pt_regs, tregs[0]),
200 8 * sizeof(unsigned long long));
201
202 if (!ret)
203 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
204 sizeof(struct pt_regs), -1);
205
206 return ret;
207}
208
209#ifdef CONFIG_SH_FPU
210int fpregs_get(struct task_struct *target,
211 const struct user_regset *regset,
212 unsigned int pos, unsigned int count,
213 void *kbuf, void __user *ubuf)
214{
215 int ret;
216
217 ret = init_fpu(target);
218 if (ret)
219 return ret;
220
221 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
222 &target->thread.fpu.hard, 0, -1);
223}
224
225static int fpregs_set(struct task_struct *target,
226 const struct user_regset *regset,
227 unsigned int pos, unsigned int count,
228 const void *kbuf, const void __user *ubuf)
229{
230 int ret;
231
232 ret = init_fpu(target);
233 if (ret)
234 return ret;
235
236 set_stopped_child_used_math(target);
237
238 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
239 &target->thread.fpu.hard, 0, -1);
240}
241
242static int fpregs_active(struct task_struct *target,
243 const struct user_regset *regset)
244{
245 return tsk_used_math(target) ? regset->n : 0;
246}
247#endif
248
249/*
250 * These are our native regset flavours.
251 */
252enum sh_regset {
253 REGSET_GENERAL,
254#ifdef CONFIG_SH_FPU
255 REGSET_FPU,
256#endif
257};
258
259static const struct user_regset sh_regsets[] = {
260 /*
261 * Format is:
262 * PC, SR, SYSCALL,
263 * R1 --> R63,
264 * TR0 --> TR7,
265 */
266 [REGSET_GENERAL] = {
267 .core_note_type = NT_PRSTATUS,
268 .n = ELF_NGREG,
269 .size = sizeof(long long),
270 .align = sizeof(long long),
271 .get = genregs_get,
272 .set = genregs_set,
273 },
274
275#ifdef CONFIG_SH_FPU
276 [REGSET_FPU] = {
277 .core_note_type = NT_PRFPREG,
278 .n = sizeof(struct user_fpu_struct) /
279 sizeof(long long),
280 .size = sizeof(long long),
281 .align = sizeof(long long),
282 .get = fpregs_get,
283 .set = fpregs_set,
284 .active = fpregs_active,
285 },
286#endif
287};
288
289static const struct user_regset_view user_sh64_native_view = {
290 .name = "sh64",
291 .e_machine = EM_SH,
292 .regsets = sh_regsets,
293 .n = ARRAY_SIZE(sh_regsets),
294};
295
296const struct user_regset_view *task_user_regset_view(struct task_struct *task)
297{
298 return &user_sh64_native_view;
299}
300
140long arch_ptrace(struct task_struct *child, long request, long addr, long data) 301long arch_ptrace(struct task_struct *child, long request, long addr, long data)
141{ 302{
142 int ret; 303 int ret;
@@ -195,10 +356,33 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
195 } 356 }
196 break; 357 break;
197 358
359 case PTRACE_GETREGS:
360 return copy_regset_to_user(child, &user_sh64_native_view,
361 REGSET_GENERAL,
362 0, sizeof(struct pt_regs),
363 (void __user *)data);
364 case PTRACE_SETREGS:
365 return copy_regset_from_user(child, &user_sh64_native_view,
366 REGSET_GENERAL,
367 0, sizeof(struct pt_regs),
368 (const void __user *)data);
369#ifdef CONFIG_SH_FPU
370 case PTRACE_GETFPREGS:
371 return copy_regset_to_user(child, &user_sh64_native_view,
372 REGSET_FPU,
373 0, sizeof(struct user_fpu_struct),
374 (void __user *)data);
375 case PTRACE_SETFPREGS:
376 return copy_regset_from_user(child, &user_sh64_native_view,
377 REGSET_FPU,
378 0, sizeof(struct user_fpu_struct),
379 (const void __user *)data);
380#endif
198 default: 381 default:
199 ret = ptrace_request(child, request, addr, data); 382 ret = ptrace_request(child, request, addr, data);
200 break; 383 break;
201 } 384 }
385
202 return ret; 386 return ret;
203} 387}
204 388
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index e7152cc6930e..534247508572 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -417,6 +417,7 @@ void __init setup_arch(char **cmdline_p)
417} 417}
418 418
419static const char *cpu_name[] = { 419static const char *cpu_name[] = {
420 [CPU_SH7201] = "SH7201",
420 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", 421 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
421 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", 422 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
422 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", 423 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
diff --git a/arch/sh/kernel/sh_bios.c b/arch/sh/kernel/sh_bios.c
index d1bcac4fa269..c852f7805728 100644
--- a/arch/sh/kernel/sh_bios.c
+++ b/arch/sh/kernel/sh_bios.c
@@ -8,69 +8,50 @@
8#include <linux/module.h> 8#include <linux/module.h>
9#include <asm/sh_bios.h> 9#include <asm/sh_bios.h>
10 10
11#define BIOS_CALL_CONSOLE_WRITE 0 11#define BIOS_CALL_CONSOLE_WRITE 0
12#define BIOS_CALL_READ_BLOCK 1
13#define BIOS_CALL_ETH_NODE_ADDR 10 12#define BIOS_CALL_ETH_NODE_ADDR 10
14#define BIOS_CALL_SHUTDOWN 11 13#define BIOS_CALL_SHUTDOWN 11
15#define BIOS_CALL_CHAR_OUT 0x1f /* TODO: hack */ 14#define BIOS_CALL_CHAR_OUT 0x1f /* TODO: hack */
16#define BIOS_CALL_GDB_GET_MODE_PTR 0xfe 15#define BIOS_CALL_GDB_DETACH 0xff
17#define BIOS_CALL_GDB_DETACH 0xff
18 16
19static __inline__ long sh_bios_call(long func, long arg0, long arg1, long arg2, long arg3) 17static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
18 long arg3)
20{ 19{
21 register long r0 __asm__("r0") = func; 20 register long r0 __asm__("r0") = func;
22 register long r4 __asm__("r4") = arg0; 21 register long r4 __asm__("r4") = arg0;
23 register long r5 __asm__("r5") = arg1; 22 register long r5 __asm__("r5") = arg1;
24 register long r6 __asm__("r6") = arg2; 23 register long r6 __asm__("r6") = arg2;
25 register long r7 __asm__("r7") = arg3; 24 register long r7 __asm__("r7") = arg3;
26 __asm__ __volatile__("trapa #0x3f" 25
27 : "=z" (r0) 26 __asm__ __volatile__("trapa #0x3f":"=z"(r0)
28 : "0" (r0), "r" (r4), "r" (r5), "r" (r6), "r" (r7) 27 :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7)
29 : "memory"); 28 :"memory");
30 return r0; 29 return r0;
31} 30}
32 31
33
34void sh_bios_console_write(const char *buf, unsigned int len) 32void sh_bios_console_write(const char *buf, unsigned int len)
35{ 33{
36 sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0); 34 sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0);
37} 35}
38 36
39
40void sh_bios_char_out(char ch) 37void sh_bios_char_out(char ch)
41{ 38{
42 sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0); 39 sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0);
43}
44
45
46int sh_bios_in_gdb_mode(void)
47{
48 static char queried = 0;
49 static char *gdb_mode_p = 0;
50
51 if (!queried)
52 {
53 /* Query the gdb stub for address of its gdb mode variable */
54 long r = sh_bios_call(BIOS_CALL_GDB_GET_MODE_PTR, 0, 0, 0, 0);
55 if (r != ~0) /* BIOS returns -1 for unknown function */
56 gdb_mode_p = (char *)r;
57 queried = 1;
58 }
59 return (gdb_mode_p != 0 ? *gdb_mode_p : 0);
60} 40}
61 41
62void sh_bios_gdb_detach(void) 42void sh_bios_gdb_detach(void)
63{ 43{
64 sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0); 44 sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0);
65} 45}
66EXPORT_SYMBOL(sh_bios_gdb_detach); 46EXPORT_SYMBOL_GPL(sh_bios_gdb_detach);
67 47
68void sh_bios_get_node_addr (unsigned char *node_addr) 48void sh_bios_get_node_addr(unsigned char *node_addr)
69{ 49{
70 sh_bios_call(BIOS_CALL_ETH_NODE_ADDR, 0, (long)node_addr, 0, 0); 50 sh_bios_call(BIOS_CALL_ETH_NODE_ADDR, 0, (long)node_addr, 0, 0);
71} 51}
52EXPORT_SYMBOL_GPL(sh_bios_get_node_addr);
72 53
73void sh_bios_shutdown(unsigned int how) 54void sh_bios_shutdown(unsigned int how)
74{ 55{
75 sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0); 56 sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0);
76} 57}
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 92ae5e6c099e..528de2955c81 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -52,16 +52,12 @@ EXPORT_SYMBOL(__const_udelay);
52 52
53#define DECLARE_EXPORT(name) \ 53#define DECLARE_EXPORT(name) \
54 extern void name(void);EXPORT_SYMBOL(name) 54 extern void name(void);EXPORT_SYMBOL(name)
55#define MAYBE_DECLARE_EXPORT(name) \
56 extern void name(void) __weak;EXPORT_SYMBOL(name)
57 55
58/* These symbols are generated by the compiler itself */
59DECLARE_EXPORT(__udivsi3); 56DECLARE_EXPORT(__udivsi3);
60DECLARE_EXPORT(__sdivsi3); 57DECLARE_EXPORT(__sdivsi3);
58DECLARE_EXPORT(__lshrsi3);
61DECLARE_EXPORT(__ashrsi3); 59DECLARE_EXPORT(__ashrsi3);
62DECLARE_EXPORT(__ashlsi3); 60DECLARE_EXPORT(__ashlsi3);
63DECLARE_EXPORT(__ashrdi3);
64DECLARE_EXPORT(__ashldi3);
65DECLARE_EXPORT(__ashiftrt_r4_6); 61DECLARE_EXPORT(__ashiftrt_r4_6);
66DECLARE_EXPORT(__ashiftrt_r4_7); 62DECLARE_EXPORT(__ashiftrt_r4_7);
67DECLARE_EXPORT(__ashiftrt_r4_8); 63DECLARE_EXPORT(__ashiftrt_r4_8);
@@ -79,8 +75,7 @@ DECLARE_EXPORT(__ashiftrt_r4_23);
79DECLARE_EXPORT(__ashiftrt_r4_24); 75DECLARE_EXPORT(__ashiftrt_r4_24);
80DECLARE_EXPORT(__ashiftrt_r4_27); 76DECLARE_EXPORT(__ashiftrt_r4_27);
81DECLARE_EXPORT(__ashiftrt_r4_30); 77DECLARE_EXPORT(__ashiftrt_r4_30);
82DECLARE_EXPORT(__lshrsi3); 78DECLARE_EXPORT(__movstr);
83DECLARE_EXPORT(__lshrdi3);
84DECLARE_EXPORT(__movstrSI8); 79DECLARE_EXPORT(__movstrSI8);
85DECLARE_EXPORT(__movstrSI12); 80DECLARE_EXPORT(__movstrSI12);
86DECLARE_EXPORT(__movstrSI16); 81DECLARE_EXPORT(__movstrSI16);
@@ -95,31 +90,17 @@ DECLARE_EXPORT(__movstrSI48);
95DECLARE_EXPORT(__movstrSI52); 90DECLARE_EXPORT(__movstrSI52);
96DECLARE_EXPORT(__movstrSI56); 91DECLARE_EXPORT(__movstrSI56);
97DECLARE_EXPORT(__movstrSI60); 92DECLARE_EXPORT(__movstrSI60);
98#if __GNUC__ == 4 93DECLARE_EXPORT(__movstr_i4_even);
99DECLARE_EXPORT(__movmem); 94DECLARE_EXPORT(__movstr_i4_odd);
100#else 95DECLARE_EXPORT(__movstrSI12_i4);
101DECLARE_EXPORT(__movstr);
102#endif
103
104#if __GNUC__ == 4
105DECLARE_EXPORT(__movmem_i4_even); 96DECLARE_EXPORT(__movmem_i4_even);
106DECLARE_EXPORT(__movmem_i4_odd); 97DECLARE_EXPORT(__movmem_i4_odd);
107DECLARE_EXPORT(__movmemSI12_i4); 98DECLARE_EXPORT(__movmemSI12_i4);
108
109#if (__GNUC_MINOR__ >= 2 || defined(__GNUC_STM_RELEASE__))
110/*
111 * GCC >= 4.2 emits these for division, as do GCC 4.1.x versions of the ST
112 * compiler which include backported patches.
113 */
114DECLARE_EXPORT(__udiv_qrnnd_16); 99DECLARE_EXPORT(__udiv_qrnnd_16);
115MAYBE_DECLARE_EXPORT(__sdivsi3_i4i); 100DECLARE_EXPORT(__sdivsi3_i4);
116MAYBE_DECLARE_EXPORT(__udivsi3_i4i); 101DECLARE_EXPORT(__udivsi3_i4);
117#endif 102DECLARE_EXPORT(__sdivsi3_i4i);
118#else /* GCC 3.x */ 103DECLARE_EXPORT(__udivsi3_i4i);
119DECLARE_EXPORT(__movstr_i4_even);
120DECLARE_EXPORT(__movstr_i4_odd);
121DECLARE_EXPORT(__movstrSI12_i4);
122#endif /* __GNUC__ == 4 */
123 104
124#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ 105#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
125 defined(CONFIG_SH7705_CACHE_32KB)) 106 defined(CONFIG_SH7705_CACHE_32KB))
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index 9324d32adacc..0d74d6b8774e 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -65,15 +65,16 @@ EXPORT_SYMBOL(copy_page);
65EXPORT_SYMBOL(__copy_user); 65EXPORT_SYMBOL(__copy_user);
66EXPORT_SYMBOL(empty_zero_page); 66EXPORT_SYMBOL(empty_zero_page);
67EXPORT_SYMBOL(memcpy); 67EXPORT_SYMBOL(memcpy);
68EXPORT_SYMBOL(memset);
68EXPORT_SYMBOL(__udelay); 69EXPORT_SYMBOL(__udelay);
69EXPORT_SYMBOL(__ndelay); 70EXPORT_SYMBOL(__ndelay);
70EXPORT_SYMBOL(__const_udelay); 71EXPORT_SYMBOL(__const_udelay);
72EXPORT_SYMBOL(strlen);
73EXPORT_SYMBOL(strcpy);
71 74
72/* Ugh. These come in from libgcc.a at link time. */ 75/* Ugh. These come in from libgcc.a at link time. */
73#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) 76#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
74 77
75DECLARE_EXPORT(__sdivsi3); 78DECLARE_EXPORT(__sdivsi3);
76DECLARE_EXPORT(__sdivsi3_2);
77DECLARE_EXPORT(__muldi3);
78DECLARE_EXPORT(__udivsi3); 79DECLARE_EXPORT(__udivsi3);
79DECLARE_EXPORT(__div_table); 80DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 69d09c0b3498..77c21bde376a 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -533,7 +533,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
533{ 533{
534 int ret; 534 int ret;
535 535
536
537 /* Set up the stack frame */ 536 /* Set up the stack frame */
538 if (ka->sa.sa_flags & SA_SIGINFO) 537 if (ka->sa.sa_flags & SA_SIGINFO)
539 ret = setup_rt_frame(sig, ka, info, oldset, regs); 538 ret = setup_rt_frame(sig, ka, info, oldset, regs);
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index ce3e851dffcb..b22fdfaaa191 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -2,7 +2,7 @@
2 * arch/sh/kernel/signal_64.c 2 * arch/sh/kernel/signal_64.c
3 * 3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2003 Paul Mundt 5 * Copyright (C) 2003 - 2008 Paul Mundt
6 * Copyright (C) 2004 Richard Curnow 6 * Copyright (C) 2004 Richard Curnow
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
@@ -43,10 +43,38 @@
43 43
44#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 44#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
45 45
46static void 46static int
47handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, 47handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
48 sigset_t *oldset, struct pt_regs * regs); 48 sigset_t *oldset, struct pt_regs * regs);
49 49
50static inline void
51handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa)
52{
53 /* If we're not from a syscall, bail out */
54 if (regs->syscall_nr < 0)
55 return;
56
57 /* check for system call restart.. */
58 switch (regs->regs[REG_RET]) {
59 case -ERESTART_RESTARTBLOCK:
60 case -ERESTARTNOHAND:
61 no_system_call_restart:
62 regs->regs[REG_RET] = -EINTR;
63 regs->sr |= 1;
64 break;
65
66 case -ERESTARTSYS:
67 if (!(sa->sa_flags & SA_RESTART))
68 goto no_system_call_restart;
69 /* fallthrough */
70 case -ERESTARTNOINTR:
71 /* Decode syscall # */
72 regs->regs[REG_RET] = regs->syscall_nr;
73 regs->pc -= 4;
74 break;
75 }
76}
77
50/* 78/*
51 * Note that 'init' is a special process: it doesn't get signals it doesn't 79 * Note that 'init' is a special process: it doesn't get signals it doesn't
52 * want to handle. Thus you cannot kill init even with a SIGKILL even by 80 * want to handle. Thus you cannot kill init even with a SIGKILL even by
@@ -80,21 +108,23 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
80 oldset = &current->blocked; 108 oldset = &current->blocked;
81 109
82 signr = get_signal_to_deliver(&info, &ka, regs, 0); 110 signr = get_signal_to_deliver(&info, &ka, regs, 0);
83
84 if (signr > 0) { 111 if (signr > 0) {
85 /* Whee! Actually deliver the signal. */ 112 if (regs->sr & 1)
86 handle_signal(signr, &info, &ka, oldset, regs); 113 handle_syscall_restart(regs, &ka.sa);
87 114
88 /* 115 /* Whee! Actually deliver the signal. */
89 * If a signal was successfully delivered, the saved sigmask 116 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
90 * is in its frame, and we can clear the TIF_RESTORE_SIGMASK 117 /*
91 * flag. 118 * If a signal was successfully delivered, the
92 */ 119 * saved sigmask is in its frame, and we can
93 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 120 * clear the TIF_RESTORE_SIGMASK flag.
94 clear_thread_flag(TIF_RESTORE_SIGMASK); 121 */
95 122 if (test_thread_flag(TIF_RESTORE_SIGMASK))
96 tracehook_signal_handler(signr, &info, &ka, regs, 0); 123 clear_thread_flag(TIF_RESTORE_SIGMASK);
97 return 1; 124
125 tracehook_signal_handler(signr, &info, &ka, regs, 0);
126 return 1;
127 }
98 } 128 }
99 129
100no_signal: 130no_signal:
@@ -129,7 +159,6 @@ no_signal:
129/* 159/*
130 * Atomically swap in the new signal mask, and wait for a signal. 160 * Atomically swap in the new signal mask, and wait for a signal.
131 */ 161 */
132
133asmlinkage int 162asmlinkage int
134sys_sigsuspend(old_sigset_t mask, 163sys_sigsuspend(old_sigset_t mask,
135 unsigned long r3, unsigned long r4, unsigned long r5, 164 unsigned long r3, unsigned long r4, unsigned long r5,
@@ -235,20 +264,16 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
235 return do_sigaltstack(uss, uoss, REF_REG_SP); 264 return do_sigaltstack(uss, uoss, REF_REG_SP);
236} 265}
237 266
238
239/* 267/*
240 * Do a signal return; undo the signal stack. 268 * Do a signal return; undo the signal stack.
241 */ 269 */
242 270struct sigframe {
243struct sigframe
244{
245 struct sigcontext sc; 271 struct sigcontext sc;
246 unsigned long extramask[_NSIG_WORDS-1]; 272 unsigned long extramask[_NSIG_WORDS-1];
247 long long retcode[2]; 273 long long retcode[2];
248}; 274};
249 275
250struct rt_sigframe 276struct rt_sigframe {
251{
252 struct siginfo __user *pinfo; 277 struct siginfo __user *pinfo;
253 void *puc; 278 void *puc;
254 struct siginfo info; 279 struct siginfo info;
@@ -450,7 +475,6 @@ badframe:
450/* 475/*
451 * Set up a signal frame. 476 * Set up a signal frame.
452 */ 477 */
453
454static int 478static int
455setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, 479setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
456 unsigned long mask) 480 unsigned long mask)
@@ -504,8 +528,8 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
504void sa_default_restorer(void); /* See comments below */ 528void sa_default_restorer(void); /* See comments below */
505void sa_default_rt_restorer(void); /* See comments below */ 529void sa_default_rt_restorer(void); /* See comments below */
506 530
507static void setup_frame(int sig, struct k_sigaction *ka, 531static int setup_frame(int sig, struct k_sigaction *ka,
508 sigset_t *set, struct pt_regs *regs) 532 sigset_t *set, struct pt_regs *regs)
509{ 533{
510 struct sigframe __user *frame; 534 struct sigframe __user *frame;
511 int err = 0; 535 int err = 0;
@@ -596,23 +620,21 @@ static void setup_frame(int sig, struct k_sigaction *ka,
596 620
597 set_fs(USER_DS); 621 set_fs(USER_DS);
598 622
599#if DEBUG_SIG
600 /* Broken %016Lx */ 623 /* Broken %016Lx */
601 printk("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n", 624 pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
602 signal, 625 signal, current->comm, current->pid, frame,
603 current->comm, current->pid, frame, 626 regs->pc >> 32, regs->pc & 0xffffffff,
604 regs->pc >> 32, regs->pc & 0xffffffff, 627 DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
605 DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
606#endif
607 628
608 return; 629 return 0;
609 630
610give_sigsegv: 631give_sigsegv:
611 force_sigsegv(sig, current); 632 force_sigsegv(sig, current);
633 return -EFAULT;
612} 634}
613 635
614static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 636static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
615 sigset_t *set, struct pt_regs *regs) 637 sigset_t *set, struct pt_regs *regs)
616{ 638{
617 struct rt_sigframe __user *frame; 639 struct rt_sigframe __user *frame;
618 int err = 0; 640 int err = 0;
@@ -702,62 +724,46 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
702 724
703 set_fs(USER_DS); 725 set_fs(USER_DS);
704 726
705#if DEBUG_SIG 727 pr_debug("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n",
706 /* Broken %016Lx */ 728 signal, current->comm, current->pid, frame,
707 printk("SIG deliver (#%d,%s:%d): sp=%p pc=%08Lx%08Lx link=%08Lx%08Lx\n", 729 regs->pc >> 32, regs->pc & 0xffffffff,
708 signal, 730 DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
709 current->comm, current->pid, frame,
710 regs->pc >> 32, regs->pc & 0xffffffff,
711 DEREF_REG_PR >> 32, DEREF_REG_PR & 0xffffffff);
712#endif
713 731
714 return; 732 return 0;
715 733
716give_sigsegv: 734give_sigsegv:
717 force_sigsegv(sig, current); 735 force_sigsegv(sig, current);
736 return -EFAULT;
718} 737}
719 738
720/* 739/*
721 * OK, we're invoking a handler 740 * OK, we're invoking a handler
722 */ 741 */
723 742static int
724static void
725handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, 743handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
726 sigset_t *oldset, struct pt_regs * regs) 744 sigset_t *oldset, struct pt_regs * regs)
727{ 745{
728 /* Are we from a system call? */ 746 int ret;
729 if (regs->syscall_nr >= 0) {
730 /* If so, check system call restarting.. */
731 switch (regs->regs[REG_RET]) {
732 case -ERESTART_RESTARTBLOCK:
733 case -ERESTARTNOHAND:
734 no_system_call_restart:
735 regs->regs[REG_RET] = -EINTR;
736 break;
737
738 case -ERESTARTSYS:
739 if (!(ka->sa.sa_flags & SA_RESTART))
740 goto no_system_call_restart;
741 /* fallthrough */
742 case -ERESTARTNOINTR:
743 /* Decode syscall # */
744 regs->regs[REG_RET] = regs->syscall_nr;
745 regs->pc -= 4;
746 }
747 }
748 747
749 /* Set up the stack frame */ 748 /* Set up the stack frame */
750 if (ka->sa.sa_flags & SA_SIGINFO) 749 if (ka->sa.sa_flags & SA_SIGINFO)
751 setup_rt_frame(sig, ka, info, oldset, regs); 750 ret = setup_rt_frame(sig, ka, info, oldset, regs);
752 else 751 else
753 setup_frame(sig, ka, oldset, regs); 752 ret = setup_frame(sig, ka, oldset, regs);
753
754 if (ka->sa.sa_flags & SA_ONESHOT)
755 ka->sa.sa_handler = SIG_DFL;
756
757 if (ret == 0) {
758 spin_lock_irq(&current->sighand->siglock);
759 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
760 if (!(ka->sa.sa_flags & SA_NODEFER))
761 sigaddset(&current->blocked,sig);
762 recalc_sigpending();
763 spin_unlock_irq(&current->sighand->siglock);
764 }
754 765
755 spin_lock_irq(&current->sighand->siglock); 766 return ret;
756 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
757 if (!(ka->sa.sa_flags & SA_NODEFER))
758 sigaddset(&current->blocked,sig);
759 recalc_sigpending();
760 spin_unlock_irq(&current->sighand->siglock);
761} 767}
762 768
763asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) 769asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 38f098c9c72d..58dfc02c7af1 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -22,102 +22,10 @@
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/fs.h> 23#include <linux/fs.h>
24#include <linux/ipc.h> 24#include <linux/ipc.h>
25#include <asm/cacheflush.h>
26#include <asm/syscalls.h> 25#include <asm/syscalls.h>
27#include <asm/uaccess.h> 26#include <asm/uaccess.h>
28#include <asm/unistd.h> 27#include <asm/unistd.h>
29 28
30unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
31EXPORT_SYMBOL(shm_align_mask);
32
33#ifdef CONFIG_MMU
34/*
35 * To avoid cache aliases, we map the shared page with same color.
36 */
37#define COLOUR_ALIGN(addr, pgoff) \
38 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
39 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
40
41unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
42 unsigned long len, unsigned long pgoff, unsigned long flags)
43{
44 struct mm_struct *mm = current->mm;
45 struct vm_area_struct *vma;
46 unsigned long start_addr;
47 int do_colour_align;
48
49 if (flags & MAP_FIXED) {
50 /* We do not accept a shared mapping if it would violate
51 * cache aliasing constraints.
52 */
53 if ((flags & MAP_SHARED) && (addr & shm_align_mask))
54 return -EINVAL;
55 return addr;
56 }
57
58 if (unlikely(len > TASK_SIZE))
59 return -ENOMEM;
60
61 do_colour_align = 0;
62 if (filp || (flags & MAP_SHARED))
63 do_colour_align = 1;
64
65 if (addr) {
66 if (do_colour_align)
67 addr = COLOUR_ALIGN(addr, pgoff);
68 else
69 addr = PAGE_ALIGN(addr);
70
71 vma = find_vma(mm, addr);
72 if (TASK_SIZE - len >= addr &&
73 (!vma || addr + len <= vma->vm_start))
74 return addr;
75 }
76
77 if (len > mm->cached_hole_size) {
78 start_addr = addr = mm->free_area_cache;
79 } else {
80 mm->cached_hole_size = 0;
81 start_addr = addr = TASK_UNMAPPED_BASE;
82 }
83
84full_search:
85 if (do_colour_align)
86 addr = COLOUR_ALIGN(addr, pgoff);
87 else
88 addr = PAGE_ALIGN(mm->free_area_cache);
89
90 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
91 /* At this point: (!vma || addr < vma->vm_end). */
92 if (unlikely(TASK_SIZE - len < addr)) {
93 /*
94 * Start a new search - just in case we missed
95 * some holes.
96 */
97 if (start_addr != TASK_UNMAPPED_BASE) {
98 start_addr = addr = TASK_UNMAPPED_BASE;
99 mm->cached_hole_size = 0;
100 goto full_search;
101 }
102 return -ENOMEM;
103 }
104 if (likely(!vma || addr + len <= vma->vm_start)) {
105 /*
106 * Remember the place where we stopped the search:
107 */
108 mm->free_area_cache = addr + len;
109 return addr;
110 }
111 if (addr + mm->cached_hole_size < vma->vm_start)
112 mm->cached_hole_size = vma->vm_start - addr;
113
114 addr = vma->vm_end;
115 if (do_colour_align)
116 addr = COLOUR_ALIGN(addr, pgoff);
117 }
118}
119#endif /* CONFIG_MMU */
120
121static inline long 29static inline long
122do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 30do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
123 unsigned long flags, int fd, unsigned long pgoff) 31 unsigned long flags, int fd, unsigned long pgoff)
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c
index 23ca711c27d2..8457f83242c5 100644
--- a/arch/sh/kernel/time_32.c
+++ b/arch/sh/kernel/time_32.c
@@ -125,11 +125,6 @@ void handle_timer_tick(void)
125 if (current->pid) 125 if (current->pid)
126 profile_tick(CPU_PROFILING); 126 profile_tick(CPU_PROFILING);
127 127
128#ifdef CONFIG_HEARTBEAT
129 if (sh_mv.mv_heartbeat != NULL)
130 sh_mv.mv_heartbeat();
131#endif
132
133 /* 128 /*
134 * Here we are in the timer irq handler. We just have irqs locally 129 * Here we are in the timer irq handler. We just have irqs locally
135 * disabled but we don't know if the timer_bh is running on the other 130 * disabled but we don't know if the timer_bh is running on the other
@@ -277,11 +272,4 @@ void __init time_init(void)
277 ((sh_hpt_frequency + 500) / 1000) / 1000, 272 ((sh_hpt_frequency + 500) / 1000) / 1000,
278 ((sh_hpt_frequency + 500) / 1000) % 1000); 273 ((sh_hpt_frequency + 500) / 1000) % 1000);
279 274
280#if defined(CONFIG_SH_KGDB)
281 /*
282 * Set up kgdb as requested. We do it here because the serial
283 * init uses the timer vars we just set up for figuring baud.
284 */
285 kgdb_init();
286#endif
287} 275}
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index bbb2af1004d9..59d2a03e8b3c 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -240,11 +240,6 @@ static inline void do_timer_interrupt(void)
240 240
241 do_timer(1); 241 do_timer(1);
242 242
243#ifdef CONFIG_HEARTBEAT
244 if (sh_mv.mv_heartbeat != NULL)
245 sh_mv.mv_heartbeat();
246#endif
247
248 /* 243 /*
249 * If we have an externally synchronized Linux clock, then update 244 * If we have an externally synchronized Linux clock, then update
250 * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be 245 * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index fe453c01f9c9..c3d237e1d566 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -34,7 +34,12 @@
34#define MTU2_TIER_1 0xfffe4384 34#define MTU2_TIER_1 0xfffe4384
35#define MTU2_TSR_1 0xfffe4385 35#define MTU2_TSR_1 0xfffe4385
36#define MTU2_TCNT_1 0xfffe4386 /* 16-bit counter */ 36#define MTU2_TCNT_1 0xfffe4386 /* 16-bit counter */
37
38#if defined(CONFIG_CPU_SUBTYPE_SH7201)
39#define MTU2_TGRA_1 0xfffe4388
40#else
37#define MTU2_TGRA_1 0xfffe438a 41#define MTU2_TGRA_1 0xfffe438a
42#endif
38 43
39#define STBCR3 0xfffe0408 44#define STBCR3 0xfffe0408
40 45
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 1e5c74efbacc..88807a2aacc3 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -28,17 +28,6 @@
28#include <asm/fpu.h> 28#include <asm/fpu.h>
29#include <asm/kprobes.h> 29#include <asm/kprobes.h>
30 30
31#ifdef CONFIG_SH_KGDB
32#include <asm/kgdb.h>
33#define CHK_REMOTE_DEBUG(regs) \
34{ \
35 if (kgdb_debug_hook && !user_mode(regs))\
36 (*kgdb_debug_hook)(regs); \
37}
38#else
39#define CHK_REMOTE_DEBUG(regs)
40#endif
41
42#ifdef CONFIG_CPU_SH2 31#ifdef CONFIG_CPU_SH2
43# define TRAP_RESERVED_INST 4 32# define TRAP_RESERVED_INST 4
44# define TRAP_ILLEGAL_SLOT_INST 6 33# define TRAP_ILLEGAL_SLOT_INST 6
@@ -94,7 +83,6 @@ void die(const char * str, struct pt_regs * regs, long err)
94 83
95 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); 84 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
96 85
97 CHK_REMOTE_DEBUG(regs);
98 print_modules(); 86 print_modules();
99 show_regs(regs); 87 show_regs(regs);
100 88
@@ -683,13 +671,12 @@ asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
683 error_code = lookup_exception_vector(); 671 error_code = lookup_exception_vector();
684 672
685 local_irq_enable(); 673 local_irq_enable();
686 CHK_REMOTE_DEBUG(regs);
687 force_sig(SIGILL, tsk); 674 force_sig(SIGILL, tsk);
688 die_if_no_fixup("reserved instruction", regs, error_code); 675 die_if_no_fixup("reserved instruction", regs, error_code);
689} 676}
690 677
691#ifdef CONFIG_SH_FPU_EMU 678#ifdef CONFIG_SH_FPU_EMU
692static int emulate_branch(unsigned short inst, struct pt_regs* regs) 679static int emulate_branch(unsigned short inst, struct pt_regs *regs)
693{ 680{
694 /* 681 /*
695 * bfs: 8fxx: PC+=d*2+4; 682 * bfs: 8fxx: PC+=d*2+4;
@@ -702,27 +689,32 @@ static int emulate_branch(unsigned short inst, struct pt_regs* regs)
702 * jsr: 4x0b: PC=Rn after PR=PC+4; 689 * jsr: 4x0b: PC=Rn after PR=PC+4;
703 * rts: 000b: PC=PR; 690 * rts: 000b: PC=PR;
704 */ 691 */
705 if ((inst & 0xfd00) == 0x8d00) { 692 if (((inst & 0xf000) == 0xb000) || /* bsr */
693 ((inst & 0xf0ff) == 0x0003) || /* bsrf */
694 ((inst & 0xf0ff) == 0x400b)) /* jsr */
695 regs->pr = regs->pc + 4;
696
697 if ((inst & 0xfd00) == 0x8d00) { /* bfs, bts */
706 regs->pc += SH_PC_8BIT_OFFSET(inst); 698 regs->pc += SH_PC_8BIT_OFFSET(inst);
707 return 0; 699 return 0;
708 } 700 }
709 701
710 if ((inst & 0xe000) == 0xa000) { 702 if ((inst & 0xe000) == 0xa000) { /* bra, bsr */
711 regs->pc += SH_PC_12BIT_OFFSET(inst); 703 regs->pc += SH_PC_12BIT_OFFSET(inst);
712 return 0; 704 return 0;
713 } 705 }
714 706
715 if ((inst & 0xf0df) == 0x0003) { 707 if ((inst & 0xf0df) == 0x0003) { /* braf, bsrf */
716 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; 708 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
717 return 0; 709 return 0;
718 } 710 }
719 711
720 if ((inst & 0xf0df) == 0x400b) { 712 if ((inst & 0xf0df) == 0x400b) { /* jmp, jsr */
721 regs->pc = regs->regs[(inst & 0x0f00) >> 8]; 713 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
722 return 0; 714 return 0;
723 } 715 }
724 716
725 if ((inst & 0xffff) == 0x000b) { 717 if ((inst & 0xffff) == 0x000b) { /* rts */
726 regs->pc = regs->pr; 718 regs->pc = regs->pr;
727 return 0; 719 return 0;
728 } 720 }
@@ -756,7 +748,6 @@ asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
756 inst = lookup_exception_vector(); 748 inst = lookup_exception_vector();
757 749
758 local_irq_enable(); 750 local_irq_enable();
759 CHK_REMOTE_DEBUG(regs);
760 force_sig(SIGILL, tsk); 751 force_sig(SIGILL, tsk);
761 die_if_no_fixup("illegal slot instruction", regs, inst); 752 die_if_no_fixup("illegal slot instruction", regs, inst);
762} 753}
@@ -868,10 +859,7 @@ void show_trace(struct task_struct *tsk, unsigned long *sp,
868 if (regs && user_mode(regs)) 859 if (regs && user_mode(regs))
869 return; 860 return;
870 861
871 printk("\nCall trace: "); 862 printk("\nCall trace:\n");
872#ifdef CONFIG_KALLSYMS
873 printk("\n");
874#endif
875 863
876 while (!kstack_end(sp)) { 864 while (!kstack_end(sp)) {
877 addr = *sp++; 865 addr = *sp++;
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 95f4de0800ec..3f7e415be86a 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -59,8 +59,7 @@ int __init vsyscall_init(void)
59} 59}
60 60
61/* Setup a VMA at program startup for the vsyscall page */ 61/* Setup a VMA at program startup for the vsyscall page */
62int arch_setup_additional_pages(struct linux_binprm *bprm, 62int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
63 int executable_stack)
64{ 63{
65 struct mm_struct *mm = current->mm; 64 struct mm_struct *mm = current->mm;
66 unsigned long addr; 65 unsigned long addr;
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index 8596cc78e18d..aaea580b65bb 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -5,12 +5,26 @@
5lib-y = delay.o memset.o memmove.o memchr.o \ 5lib-y = delay.o memset.o memmove.o memchr.o \
6 checksum.o strlen.o div64.o div64-generic.o 6 checksum.o strlen.o div64.o div64-generic.o
7 7
8# Extracted from libgcc
9lib-y += movmem.o ashldi3.o ashrdi3.o lshrdi3.o \
10 ashlsi3.o ashrsi3.o ashiftrt.o lshrsi3.o \
11 udiv_qrnnd.o
12
13udivsi3-y := udivsi3_i4i-Os.o
14
15ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y)
16udivsi3-$(CONFIG_CPU_SH3) := udivsi3_i4i.o
17udivsi3-$(CONFIG_CPU_SH4) := udivsi3_i4i.o
18endif
19udivsi3-y += udivsi3.o
20
8obj-y += io.o 21obj-y += io.o
9 22
10memcpy-y := memcpy.o 23memcpy-y := memcpy.o
11memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o 24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
12 25
13lib-$(CONFIG_MMU) += copy_page.o clear_page.o 26lib-$(CONFIG_MMU) += copy_page.o clear_page.o
14lib-y += $(memcpy-y) 27lib-$(CONFIG_FUNCTION_TRACER) += mcount.o
28lib-y += $(memcpy-y) $(udivsi3-y)
15 29
16EXTRA_CFLAGS += -Werror 30EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/lib/ashiftrt.S b/arch/sh/lib/ashiftrt.S
new file mode 100644
index 000000000000..45ce86558f46
--- /dev/null
+++ b/arch/sh/lib/ashiftrt.S
@@ -0,0 +1,149 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41 .global __ashiftrt_r4_0
42 .global __ashiftrt_r4_1
43 .global __ashiftrt_r4_2
44 .global __ashiftrt_r4_3
45 .global __ashiftrt_r4_4
46 .global __ashiftrt_r4_5
47 .global __ashiftrt_r4_6
48 .global __ashiftrt_r4_7
49 .global __ashiftrt_r4_8
50 .global __ashiftrt_r4_9
51 .global __ashiftrt_r4_10
52 .global __ashiftrt_r4_11
53 .global __ashiftrt_r4_12
54 .global __ashiftrt_r4_13
55 .global __ashiftrt_r4_14
56 .global __ashiftrt_r4_15
57 .global __ashiftrt_r4_16
58 .global __ashiftrt_r4_17
59 .global __ashiftrt_r4_18
60 .global __ashiftrt_r4_19
61 .global __ashiftrt_r4_20
62 .global __ashiftrt_r4_21
63 .global __ashiftrt_r4_22
64 .global __ashiftrt_r4_23
65 .global __ashiftrt_r4_24
66 .global __ashiftrt_r4_25
67 .global __ashiftrt_r4_26
68 .global __ashiftrt_r4_27
69 .global __ashiftrt_r4_28
70 .global __ashiftrt_r4_29
71 .global __ashiftrt_r4_30
72 .global __ashiftrt_r4_31
73 .global __ashiftrt_r4_32
74
75 .align 1
76__ashiftrt_r4_32:
77__ashiftrt_r4_31:
78 rotcl r4
79 rts
80 subc r4,r4
81__ashiftrt_r4_30:
82 shar r4
83__ashiftrt_r4_29:
84 shar r4
85__ashiftrt_r4_28:
86 shar r4
87__ashiftrt_r4_27:
88 shar r4
89__ashiftrt_r4_26:
90 shar r4
91__ashiftrt_r4_25:
92 shar r4
93__ashiftrt_r4_24:
94 shlr16 r4
95 shlr8 r4
96 rts
97 exts.b r4,r4
98__ashiftrt_r4_23:
99 shar r4
100__ashiftrt_r4_22:
101 shar r4
102__ashiftrt_r4_21:
103 shar r4
104__ashiftrt_r4_20:
105 shar r4
106__ashiftrt_r4_19:
107 shar r4
108__ashiftrt_r4_18:
109 shar r4
110__ashiftrt_r4_17:
111 shar r4
112__ashiftrt_r4_16:
113 shlr16 r4
114 rts
115 exts.w r4,r4
116__ashiftrt_r4_15:
117 shar r4
118__ashiftrt_r4_14:
119 shar r4
120__ashiftrt_r4_13:
121 shar r4
122__ashiftrt_r4_12:
123 shar r4
124__ashiftrt_r4_11:
125 shar r4
126__ashiftrt_r4_10:
127 shar r4
128__ashiftrt_r4_9:
129 shar r4
130__ashiftrt_r4_8:
131 shar r4
132__ashiftrt_r4_7:
133 shar r4
134__ashiftrt_r4_6:
135 shar r4
136__ashiftrt_r4_5:
137 shar r4
138__ashiftrt_r4_4:
139 shar r4
140__ashiftrt_r4_3:
141 shar r4
142__ashiftrt_r4_2:
143 shar r4
144__ashiftrt_r4_1:
145 rts
146 shar r4
147__ashiftrt_r4_0:
148 rts
149 nop
diff --git a/arch/sh/lib/ashldi3.c b/arch/sh/lib/ashldi3.c
new file mode 100644
index 000000000000..beb80f316095
--- /dev/null
+++ b/arch/sh/lib/ashldi3.c
@@ -0,0 +1,29 @@
1#include <linux/module.h>
2
3#include "libgcc.h"
4
5long long __ashldi3(long long u, word_type b)
6{
7 DWunion uu, w;
8 word_type bm;
9
10 if (b == 0)
11 return u;
12
13 uu.ll = u;
14 bm = 32 - b;
15
16 if (bm <= 0) {
17 w.s.low = 0;
18 w.s.high = (unsigned int) uu.s.low << -bm;
19 } else {
20 const unsigned int carries = (unsigned int) uu.s.low >> bm;
21
22 w.s.low = (unsigned int) uu.s.low << b;
23 w.s.high = ((unsigned int) uu.s.high << b) | carries;
24 }
25
26 return w.ll;
27}
28
29EXPORT_SYMBOL(__ashldi3);
diff --git a/arch/sh/lib/ashlsi3.S b/arch/sh/lib/ashlsi3.S
new file mode 100644
index 000000000000..bd47e9b403a5
--- /dev/null
+++ b/arch/sh/lib/ashlsi3.S
@@ -0,0 +1,193 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41!
42! __ashlsi3
43!
44! Entry:
45!
46! r4: Value to shift
47! r5: Shifts
48!
49! Exit:
50!
51! r0: Result
52!
53! Destroys:
54!
55! (none)
56!
57 .global __ashlsi3
58
59 .align 2
60__ashlsi3:
61 mov #31,r0
62 and r0,r5
63 mova ashlsi3_table,r0
64 mov.b @(r0,r5),r5
65#ifdef __sh1__
66 add r5,r0
67 jmp @r0
68#else
69 braf r5
70#endif
71 mov r4,r0
72
73 .align 2
74ashlsi3_table:
75 .byte ashlsi3_0-ashlsi3_table
76 .byte ashlsi3_1-ashlsi3_table
77 .byte ashlsi3_2-ashlsi3_table
78 .byte ashlsi3_3-ashlsi3_table
79 .byte ashlsi3_4-ashlsi3_table
80 .byte ashlsi3_5-ashlsi3_table
81 .byte ashlsi3_6-ashlsi3_table
82 .byte ashlsi3_7-ashlsi3_table
83 .byte ashlsi3_8-ashlsi3_table
84 .byte ashlsi3_9-ashlsi3_table
85 .byte ashlsi3_10-ashlsi3_table
86 .byte ashlsi3_11-ashlsi3_table
87 .byte ashlsi3_12-ashlsi3_table
88 .byte ashlsi3_13-ashlsi3_table
89 .byte ashlsi3_14-ashlsi3_table
90 .byte ashlsi3_15-ashlsi3_table
91 .byte ashlsi3_16-ashlsi3_table
92 .byte ashlsi3_17-ashlsi3_table
93 .byte ashlsi3_18-ashlsi3_table
94 .byte ashlsi3_19-ashlsi3_table
95 .byte ashlsi3_20-ashlsi3_table
96 .byte ashlsi3_21-ashlsi3_table
97 .byte ashlsi3_22-ashlsi3_table
98 .byte ashlsi3_23-ashlsi3_table
99 .byte ashlsi3_24-ashlsi3_table
100 .byte ashlsi3_25-ashlsi3_table
101 .byte ashlsi3_26-ashlsi3_table
102 .byte ashlsi3_27-ashlsi3_table
103 .byte ashlsi3_28-ashlsi3_table
104 .byte ashlsi3_29-ashlsi3_table
105 .byte ashlsi3_30-ashlsi3_table
106 .byte ashlsi3_31-ashlsi3_table
107
108ashlsi3_6:
109 shll2 r0
110ashlsi3_4:
111 shll2 r0
112ashlsi3_2:
113 rts
114 shll2 r0
115
116ashlsi3_7:
117 shll2 r0
118ashlsi3_5:
119 shll2 r0
120ashlsi3_3:
121 shll2 r0
122ashlsi3_1:
123 rts
124 shll r0
125
126ashlsi3_14:
127 shll2 r0
128ashlsi3_12:
129 shll2 r0
130ashlsi3_10:
131 shll2 r0
132ashlsi3_8:
133 rts
134 shll8 r0
135
136ashlsi3_15:
137 shll2 r0
138ashlsi3_13:
139 shll2 r0
140ashlsi3_11:
141 shll2 r0
142ashlsi3_9:
143 shll8 r0
144 rts
145 shll r0
146
147ashlsi3_22:
148 shll2 r0
149ashlsi3_20:
150 shll2 r0
151ashlsi3_18:
152 shll2 r0
153ashlsi3_16:
154 rts
155 shll16 r0
156
157ashlsi3_23:
158 shll2 r0
159ashlsi3_21:
160 shll2 r0
161ashlsi3_19:
162 shll2 r0
163ashlsi3_17:
164 shll16 r0
165 rts
166 shll r0
167
168ashlsi3_30:
169 shll2 r0
170ashlsi3_28:
171 shll2 r0
172ashlsi3_26:
173 shll2 r0
174ashlsi3_24:
175 shll16 r0
176 rts
177 shll8 r0
178
179ashlsi3_31:
180 shll2 r0
181ashlsi3_29:
182 shll2 r0
183ashlsi3_27:
184 shll2 r0
185ashlsi3_25:
186 shll16 r0
187 shll8 r0
188 rts
189 shll r0
190
191ashlsi3_0:
192 rts
193 nop
diff --git a/arch/sh/lib/ashrdi3.c b/arch/sh/lib/ashrdi3.c
new file mode 100644
index 000000000000..c884a912b660
--- /dev/null
+++ b/arch/sh/lib/ashrdi3.c
@@ -0,0 +1,31 @@
1#include <linux/module.h>
2
3#include "libgcc.h"
4
5long long __ashrdi3(long long u, word_type b)
6{
7 DWunion uu, w;
8 word_type bm;
9
10 if (b == 0)
11 return u;
12
13 uu.ll = u;
14 bm = 32 - b;
15
16 if (bm <= 0) {
17 /* w.s.high = 1..1 or 0..0 */
18 w.s.high =
19 uu.s.high >> 31;
20 w.s.low = uu.s.high >> -bm;
21 } else {
22 const unsigned int carries = (unsigned int) uu.s.high << bm;
23
24 w.s.high = uu.s.high >> b;
25 w.s.low = ((unsigned int) uu.s.low >> b) | carries;
26 }
27
28 return w.ll;
29}
30
31EXPORT_SYMBOL(__ashrdi3);
diff --git a/arch/sh/lib/ashrsi3.S b/arch/sh/lib/ashrsi3.S
new file mode 100644
index 000000000000..6f3cf46b77c2
--- /dev/null
+++ b/arch/sh/lib/ashrsi3.S
@@ -0,0 +1,185 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41!
42! __ashrsi3
43!
44! Entry:
45!
46! r4: Value to shift
47! r5: Shifts
48!
49! Exit:
50!
51! r0: Result
52!
53! Destroys:
54!
55! (none)
56!
57
58 .global __ashrsi3
59
60 .align 2
61__ashrsi3:
62 mov #31,r0
63 and r0,r5
64 mova ashrsi3_table,r0
65 mov.b @(r0,r5),r5
66#ifdef __sh1__
67 add r5,r0
68 jmp @r0
69#else
70 braf r5
71#endif
72 mov r4,r0
73
74 .align 2
75ashrsi3_table:
76 .byte ashrsi3_0-ashrsi3_table
77 .byte ashrsi3_1-ashrsi3_table
78 .byte ashrsi3_2-ashrsi3_table
79 .byte ashrsi3_3-ashrsi3_table
80 .byte ashrsi3_4-ashrsi3_table
81 .byte ashrsi3_5-ashrsi3_table
82 .byte ashrsi3_6-ashrsi3_table
83 .byte ashrsi3_7-ashrsi3_table
84 .byte ashrsi3_8-ashrsi3_table
85 .byte ashrsi3_9-ashrsi3_table
86 .byte ashrsi3_10-ashrsi3_table
87 .byte ashrsi3_11-ashrsi3_table
88 .byte ashrsi3_12-ashrsi3_table
89 .byte ashrsi3_13-ashrsi3_table
90 .byte ashrsi3_14-ashrsi3_table
91 .byte ashrsi3_15-ashrsi3_table
92 .byte ashrsi3_16-ashrsi3_table
93 .byte ashrsi3_17-ashrsi3_table
94 .byte ashrsi3_18-ashrsi3_table
95 .byte ashrsi3_19-ashrsi3_table
96 .byte ashrsi3_20-ashrsi3_table
97 .byte ashrsi3_21-ashrsi3_table
98 .byte ashrsi3_22-ashrsi3_table
99 .byte ashrsi3_23-ashrsi3_table
100 .byte ashrsi3_24-ashrsi3_table
101 .byte ashrsi3_25-ashrsi3_table
102 .byte ashrsi3_26-ashrsi3_table
103 .byte ashrsi3_27-ashrsi3_table
104 .byte ashrsi3_28-ashrsi3_table
105 .byte ashrsi3_29-ashrsi3_table
106 .byte ashrsi3_30-ashrsi3_table
107 .byte ashrsi3_31-ashrsi3_table
108
109ashrsi3_31:
110 rotcl r0
111 rts
112 subc r0,r0
113
114ashrsi3_30:
115 shar r0
116ashrsi3_29:
117 shar r0
118ashrsi3_28:
119 shar r0
120ashrsi3_27:
121 shar r0
122ashrsi3_26:
123 shar r0
124ashrsi3_25:
125 shar r0
126ashrsi3_24:
127 shlr16 r0
128 shlr8 r0
129 rts
130 exts.b r0,r0
131
132ashrsi3_23:
133 shar r0
134ashrsi3_22:
135 shar r0
136ashrsi3_21:
137 shar r0
138ashrsi3_20:
139 shar r0
140ashrsi3_19:
141 shar r0
142ashrsi3_18:
143 shar r0
144ashrsi3_17:
145 shar r0
146ashrsi3_16:
147 shlr16 r0
148 rts
149 exts.w r0,r0
150
151ashrsi3_15:
152 shar r0
153ashrsi3_14:
154 shar r0
155ashrsi3_13:
156 shar r0
157ashrsi3_12:
158 shar r0
159ashrsi3_11:
160 shar r0
161ashrsi3_10:
162 shar r0
163ashrsi3_9:
164 shar r0
165ashrsi3_8:
166 shar r0
167ashrsi3_7:
168 shar r0
169ashrsi3_6:
170 shar r0
171ashrsi3_5:
172 shar r0
173ashrsi3_4:
174 shar r0
175ashrsi3_3:
176 shar r0
177ashrsi3_2:
178 shar r0
179ashrsi3_1:
180 rts
181 shar r0
182
183ashrsi3_0:
184 rts
185 nop
diff --git a/arch/sh/lib/libgcc.h b/arch/sh/lib/libgcc.h
new file mode 100644
index 000000000000..3f19d1c5d942
--- /dev/null
+++ b/arch/sh/lib/libgcc.h
@@ -0,0 +1,26 @@
1#ifndef __ASM_LIBGCC_H
2#define __ASM_LIBGCC_H
3
4#include <asm/byteorder.h>
5
6typedef int word_type __attribute__ ((mode (__word__)));
7
8#ifdef __BIG_ENDIAN
9struct DWstruct {
10 int high, low;
11};
12#elif defined(__LITTLE_ENDIAN)
13struct DWstruct {
14 int low, high;
15};
16#else
17#error I feel sick.
18#endif
19
20typedef union
21{
22 struct DWstruct s;
23 long long ll;
24} DWunion;
25
26#endif /* __ASM_LIBGCC_H */
diff --git a/arch/sh/lib/lshrdi3.c b/arch/sh/lib/lshrdi3.c
new file mode 100644
index 000000000000..dcf8d6810b7c
--- /dev/null
+++ b/arch/sh/lib/lshrdi3.c
@@ -0,0 +1,29 @@
1#include <linux/module.h>
2
3#include "libgcc.h"
4
5long long __lshrdi3(long long u, word_type b)
6{
7 DWunion uu, w;
8 word_type bm;
9
10 if (b == 0)
11 return u;
12
13 uu.ll = u;
14 bm = 32 - b;
15
16 if (bm <= 0) {
17 w.s.high = 0;
18 w.s.low = (unsigned int) uu.s.high >> -bm;
19 } else {
20 const unsigned int carries = (unsigned int) uu.s.high << bm;
21
22 w.s.high = (unsigned int) uu.s.high >> b;
23 w.s.low = ((unsigned int) uu.s.low >> b) | carries;
24 }
25
26 return w.ll;
27}
28
29EXPORT_SYMBOL(__lshrdi3);
diff --git a/arch/sh/lib/lshrsi3.S b/arch/sh/lib/lshrsi3.S
new file mode 100644
index 000000000000..1e7aaa557130
--- /dev/null
+++ b/arch/sh/lib/lshrsi3.S
@@ -0,0 +1,193 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41!
42! __lshrsi3
43!
44! Entry:
45!
46! r4: Value to shift
47! r5: Shifts
48!
49! Exit:
50!
51! r0: Result
52!
53! Destroys:
54!
55! (none)
56!
57 .global __lshrsi3
58
59 .align 2
60__lshrsi3:
61 mov #31,r0
62 and r0,r5
63 mova lshrsi3_table,r0
64 mov.b @(r0,r5),r5
65#ifdef __sh1__
66 add r5,r0
67 jmp @r0
68#else
69 braf r5
70#endif
71 mov r4,r0
72
73 .align 2
74lshrsi3_table:
75 .byte lshrsi3_0-lshrsi3_table
76 .byte lshrsi3_1-lshrsi3_table
77 .byte lshrsi3_2-lshrsi3_table
78 .byte lshrsi3_3-lshrsi3_table
79 .byte lshrsi3_4-lshrsi3_table
80 .byte lshrsi3_5-lshrsi3_table
81 .byte lshrsi3_6-lshrsi3_table
82 .byte lshrsi3_7-lshrsi3_table
83 .byte lshrsi3_8-lshrsi3_table
84 .byte lshrsi3_9-lshrsi3_table
85 .byte lshrsi3_10-lshrsi3_table
86 .byte lshrsi3_11-lshrsi3_table
87 .byte lshrsi3_12-lshrsi3_table
88 .byte lshrsi3_13-lshrsi3_table
89 .byte lshrsi3_14-lshrsi3_table
90 .byte lshrsi3_15-lshrsi3_table
91 .byte lshrsi3_16-lshrsi3_table
92 .byte lshrsi3_17-lshrsi3_table
93 .byte lshrsi3_18-lshrsi3_table
94 .byte lshrsi3_19-lshrsi3_table
95 .byte lshrsi3_20-lshrsi3_table
96 .byte lshrsi3_21-lshrsi3_table
97 .byte lshrsi3_22-lshrsi3_table
98 .byte lshrsi3_23-lshrsi3_table
99 .byte lshrsi3_24-lshrsi3_table
100 .byte lshrsi3_25-lshrsi3_table
101 .byte lshrsi3_26-lshrsi3_table
102 .byte lshrsi3_27-lshrsi3_table
103 .byte lshrsi3_28-lshrsi3_table
104 .byte lshrsi3_29-lshrsi3_table
105 .byte lshrsi3_30-lshrsi3_table
106 .byte lshrsi3_31-lshrsi3_table
107
108lshrsi3_6:
109 shlr2 r0
110lshrsi3_4:
111 shlr2 r0
112lshrsi3_2:
113 rts
114 shlr2 r0
115
116lshrsi3_7:
117 shlr2 r0
118lshrsi3_5:
119 shlr2 r0
120lshrsi3_3:
121 shlr2 r0
122lshrsi3_1:
123 rts
124 shlr r0
125
126lshrsi3_14:
127 shlr2 r0
128lshrsi3_12:
129 shlr2 r0
130lshrsi3_10:
131 shlr2 r0
132lshrsi3_8:
133 rts
134 shlr8 r0
135
136lshrsi3_15:
137 shlr2 r0
138lshrsi3_13:
139 shlr2 r0
140lshrsi3_11:
141 shlr2 r0
142lshrsi3_9:
143 shlr8 r0
144 rts
145 shlr r0
146
147lshrsi3_22:
148 shlr2 r0
149lshrsi3_20:
150 shlr2 r0
151lshrsi3_18:
152 shlr2 r0
153lshrsi3_16:
154 rts
155 shlr16 r0
156
157lshrsi3_23:
158 shlr2 r0
159lshrsi3_21:
160 shlr2 r0
161lshrsi3_19:
162 shlr2 r0
163lshrsi3_17:
164 shlr16 r0
165 rts
166 shlr r0
167
168lshrsi3_30:
169 shlr2 r0
170lshrsi3_28:
171 shlr2 r0
172lshrsi3_26:
173 shlr2 r0
174lshrsi3_24:
175 shlr16 r0
176 rts
177 shlr8 r0
178
179lshrsi3_31:
180 shlr2 r0
181lshrsi3_29:
182 shlr2 r0
183lshrsi3_27:
184 shlr2 r0
185lshrsi3_25:
186 shlr16 r0
187 shlr8 r0
188 rts
189 shlr r0
190
191lshrsi3_0:
192 rts
193 nop
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
new file mode 100644
index 000000000000..110fbfe1831f
--- /dev/null
+++ b/arch/sh/lib/mcount.S
@@ -0,0 +1,90 @@
1/*
2 * arch/sh/lib/mcount.S
3 *
4 * Copyright (C) 2008 Paul Mundt
5 * Copyright (C) 2008 Matt Fleming
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <asm/ftrace.h>
12
13#define MCOUNT_ENTER() \
14 mov.l r4, @-r15; \
15 mov.l r5, @-r15; \
16 mov.l r6, @-r15; \
17 mov.l r7, @-r15; \
18 sts.l pr, @-r15; \
19 \
20 mov.l @(20,r15),r4; \
21 sts pr, r5
22
23#define MCOUNT_LEAVE() \
24 lds.l @r15+, pr; \
25 mov.l @r15+, r7; \
26 mov.l @r15+, r6; \
27 mov.l @r15+, r5; \
28 rts; \
29 mov.l @r15+, r4
30
31 .align 2
32 .globl _mcount
33 .type _mcount,@function
34 .globl mcount
35 .type mcount,@function
36_mcount:
37mcount:
38 MCOUNT_ENTER()
39
40#ifdef CONFIG_DYNAMIC_FTRACE
41 .globl mcount_call
42mcount_call:
43 mov.l .Lftrace_stub, r6
44#else
45 mov.l .Lftrace_trace_function, r6
46 mov.l ftrace_stub, r7
47 cmp/eq r6, r7
48 bt skip_trace
49 mov.l @r6, r6
50#endif
51
52 jsr @r6
53 nop
54
55skip_trace:
56 MCOUNT_LEAVE()
57
58 .align 2
59.Lftrace_trace_function:
60 .long ftrace_trace_function
61
62#ifdef CONFIG_DYNAMIC_FTRACE
63 .globl ftrace_caller
64ftrace_caller:
65 MCOUNT_ENTER()
66
67 .globl ftrace_call
68ftrace_call:
69 mov.l .Lftrace_stub, r6
70 jsr @r6
71 nop
72
73 MCOUNT_LEAVE()
74#endif /* CONFIG_DYNAMIC_FTRACE */
75
76/*
77 * NOTE: From here on the locations of the .Lftrace_stub label and
78 * ftrace_stub itself are fixed. Adding additional data here will skew
79 * the displacement for the memory table and break the block replacement.
80 * Place new labels either after the ftrace_stub body, or before
81 * ftrace_caller. You have been warned.
82 */
83 .align 2
84.Lftrace_stub:
85 .long ftrace_stub
86
87 .globl ftrace_stub
88ftrace_stub:
89 rts
90 nop
diff --git a/arch/sh/lib/movmem.S b/arch/sh/lib/movmem.S
new file mode 100644
index 000000000000..62075f6bc67c
--- /dev/null
+++ b/arch/sh/lib/movmem.S
@@ -0,0 +1,238 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41 .text
42 .balign 4
43 .global __movmem
44 .global __movstr
45 .set __movstr, __movmem
46 /* This would be a lot simpler if r6 contained the byte count
47 minus 64, and we wouldn't be called here for a byte count of 64. */
48__movmem:
49 sts.l pr,@-r15
50 shll2 r6
51 bsr __movmemSI52+2
52 mov.l @(48,r5),r0
53 .balign 4
54movmem_loop: /* Reached with rts */
55 mov.l @(60,r5),r0
56 add #-64,r6
57 mov.l r0,@(60,r4)
58 tst r6,r6
59 mov.l @(56,r5),r0
60 bt movmem_done
61 mov.l r0,@(56,r4)
62 cmp/pl r6
63 mov.l @(52,r5),r0
64 add #64,r5
65 mov.l r0,@(52,r4)
66 add #64,r4
67 bt __movmemSI52
68! done all the large groups, do the remainder
69! jump to movmem+
70 mova __movmemSI4+4,r0
71 add r6,r0
72 jmp @r0
73movmem_done: ! share slot insn, works out aligned.
74 lds.l @r15+,pr
75 mov.l r0,@(56,r4)
76 mov.l @(52,r5),r0
77 rts
78 mov.l r0,@(52,r4)
79 .balign 4
80
81 .global __movmemSI64
82 .global __movstrSI64
83 .set __movstrSI64, __movmemSI64
84__movmemSI64:
85 mov.l @(60,r5),r0
86 mov.l r0,@(60,r4)
87 .global __movmemSI60
88 .global __movstrSI60
89 .set __movstrSI60, __movmemSI60
90__movmemSI60:
91 mov.l @(56,r5),r0
92 mov.l r0,@(56,r4)
93 .global __movmemSI56
94 .global __movstrSI56
95 .set __movstrSI56, __movmemSI56
96__movmemSI56:
97 mov.l @(52,r5),r0
98 mov.l r0,@(52,r4)
99 .global __movmemSI52
100 .global __movstrSI52
101 .set __movstrSI52, __movmemSI52
102__movmemSI52:
103 mov.l @(48,r5),r0
104 mov.l r0,@(48,r4)
105 .global __movmemSI48
106 .global __movstrSI48
107 .set __movstrSI48, __movmemSI48
108__movmemSI48:
109 mov.l @(44,r5),r0
110 mov.l r0,@(44,r4)
111 .global __movmemSI44
112 .global __movstrSI44
113 .set __movstrSI44, __movmemSI44
114__movmemSI44:
115 mov.l @(40,r5),r0
116 mov.l r0,@(40,r4)
117 .global __movmemSI40
118 .global __movstrSI40
119 .set __movstrSI40, __movmemSI40
120__movmemSI40:
121 mov.l @(36,r5),r0
122 mov.l r0,@(36,r4)
123 .global __movmemSI36
124 .global __movstrSI36
125 .set __movstrSI36, __movmemSI36
126__movmemSI36:
127 mov.l @(32,r5),r0
128 mov.l r0,@(32,r4)
129 .global __movmemSI32
130 .global __movstrSI32
131 .set __movstrSI32, __movmemSI32
132__movmemSI32:
133 mov.l @(28,r5),r0
134 mov.l r0,@(28,r4)
135 .global __movmemSI28
136 .global __movstrSI28
137 .set __movstrSI28, __movmemSI28
138__movmemSI28:
139 mov.l @(24,r5),r0
140 mov.l r0,@(24,r4)
141 .global __movmemSI24
142 .global __movstrSI24
143 .set __movstrSI24, __movmemSI24
144__movmemSI24:
145 mov.l @(20,r5),r0
146 mov.l r0,@(20,r4)
147 .global __movmemSI20
148 .global __movstrSI20
149 .set __movstrSI20, __movmemSI20
150__movmemSI20:
151 mov.l @(16,r5),r0
152 mov.l r0,@(16,r4)
153 .global __movmemSI16
154 .global __movstrSI16
155 .set __movstrSI16, __movmemSI16
156__movmemSI16:
157 mov.l @(12,r5),r0
158 mov.l r0,@(12,r4)
159 .global __movmemSI12
160 .global __movstrSI12
161 .set __movstrSI12, __movmemSI12
162__movmemSI12:
163 mov.l @(8,r5),r0
164 mov.l r0,@(8,r4)
165 .global __movmemSI8
166 .global __movstrSI8
167 .set __movstrSI8, __movmemSI8
168__movmemSI8:
169 mov.l @(4,r5),r0
170 mov.l r0,@(4,r4)
171 .global __movmemSI4
172 .global __movstrSI4
173 .set __movstrSI4, __movmemSI4
174__movmemSI4:
175 mov.l @(0,r5),r0
176 rts
177 mov.l r0,@(0,r4)
178
179 .global __movmem_i4_even
180 .global __movstr_i4_even
181 .set __movstr_i4_even, __movmem_i4_even
182
183 .global __movmem_i4_odd
184 .global __movstr_i4_odd
185 .set __movstr_i4_odd, __movmem_i4_odd
186
187 .global __movmemSI12_i4
188 .global __movstrSI12_i4
189 .set __movstrSI12_i4, __movmemSI12_i4
190
191 .p2align 5
192L_movmem_2mod4_end:
193 mov.l r0,@(16,r4)
194 rts
195 mov.l r1,@(20,r4)
196
197 .p2align 2
198
199__movmem_i4_even:
200 mov.l @r5+,r0
201 bra L_movmem_start_even
202 mov.l @r5+,r1
203
204__movmem_i4_odd:
205 mov.l @r5+,r1
206 add #-4,r4
207 mov.l @r5+,r2
208 mov.l @r5+,r3
209 mov.l r1,@(4,r4)
210 mov.l r2,@(8,r4)
211
212L_movmem_loop:
213 mov.l r3,@(12,r4)
214 dt r6
215 mov.l @r5+,r0
216 bt/s L_movmem_2mod4_end
217 mov.l @r5+,r1
218 add #16,r4
219L_movmem_start_even:
220 mov.l @r5+,r2
221 mov.l @r5+,r3
222 mov.l r0,@r4
223 dt r6
224 mov.l r1,@(4,r4)
225 bf/s L_movmem_loop
226 mov.l r2,@(8,r4)
227 rts
228 mov.l r3,@(12,r4)
229
230 .p2align 4
231__movmemSI12_i4:
232 mov.l @r5,r0
233 mov.l @(4,r5),r1
234 mov.l @(8,r5),r2
235 mov.l r0,@r4
236 mov.l r1,@(4,r4)
237 rts
238 mov.l r2,@(8,r4)
diff --git a/arch/sh/lib/udiv_qrnnd.S b/arch/sh/lib/udiv_qrnnd.S
new file mode 100644
index 000000000000..32b9a36de943
--- /dev/null
+++ b/arch/sh/lib/udiv_qrnnd.S
@@ -0,0 +1,81 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41 /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
42 /* n1 < d, but n1 might be larger than d1. */
43 .global __udiv_qrnnd_16
44 .balign 8
45__udiv_qrnnd_16:
46 div0u
47 cmp/hi r6,r0
48 bt .Lots
49 .rept 16
50 div1 r6,r0
51 .endr
52 extu.w r0,r1
53 bt 0f
54 add r6,r0
550: rotcl r1
56 mulu.w r1,r5
57 xtrct r4,r0
58 swap.w r0,r0
59 sts macl,r2
60 cmp/hs r2,r0
61 sub r2,r0
62 bt 0f
63 addc r5,r0
64 add #-1,r1
65 bt 0f
661: add #-1,r1
67 rts
68 add r5,r0
69 .balign 8
70.Lots:
71 sub r5,r0
72 swap.w r4,r1
73 xtrct r0,r1
74 clrt
75 mov r1,r0
76 addc r5,r0
77 mov #-1,r1
78 bf/s 1b
79 shlr16 r1
800: rts
81 nop
diff --git a/arch/sh/lib/udivsi3.S b/arch/sh/lib/udivsi3.S
new file mode 100644
index 000000000000..72157ab5c314
--- /dev/null
+++ b/arch/sh/lib/udivsi3.S
@@ -0,0 +1,87 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33 .balign 4
34 .global __udivsi3
35 .type __udivsi3, @function
36div8:
37 div1 r5,r4
38div7:
39 div1 r5,r4; div1 r5,r4; div1 r5,r4
40 div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
41
42divx4:
43 div1 r5,r4; rotcl r0
44 div1 r5,r4; rotcl r0
45 div1 r5,r4; rotcl r0
46 rts; div1 r5,r4
47
48__udivsi3:
49 sts.l pr,@-r15
50 extu.w r5,r0
51 cmp/eq r5,r0
52 bf/s large_divisor
53 div0u
54 swap.w r4,r0
55 shlr16 r4
56 bsr div8
57 shll16 r5
58 bsr div7
59 div1 r5,r4
60 xtrct r4,r0
61 xtrct r0,r4
62 bsr div8
63 swap.w r4,r4
64 bsr div7
65 div1 r5,r4
66 lds.l @r15+,pr
67 xtrct r4,r0
68 swap.w r0,r0
69 rotcl r0
70 rts
71 shlr16 r5
72
73large_divisor:
74 mov #0,r0
75 xtrct r4,r0
76 xtrct r0,r4
77 bsr divx4
78 rotcl r0
79 bsr divx4
80 rotcl r0
81 bsr divx4
82 rotcl r0
83 bsr divx4
84 rotcl r0
85 lds.l @r15+,pr
86 rts
87 rotcl r0
diff --git a/arch/sh/lib/udivsi3_i4i-Os.S b/arch/sh/lib/udivsi3_i4i-Os.S
new file mode 100644
index 000000000000..4835553e1ea9
--- /dev/null
+++ b/arch/sh/lib/udivsi3_i4i-Os.S
@@ -0,0 +1,149 @@
1/* Copyright (C) 2006 Free Software Foundation, Inc.
2
3This file is free software; you can redistribute it and/or modify it
4under the terms of the GNU General Public License as published by the
5Free Software Foundation; either version 2, or (at your option) any
6later version.
7
8In addition to the permissions in the GNU General Public License, the
9Free Software Foundation gives you unlimited permission to link the
10compiled version of this file into combinations with other programs,
11and to distribute those combinations without any restriction coming
12from the use of this file. (The General Public License restrictions
13do apply in other respects; for example, they cover modification of
14the file, and distribution when not linked into a combine
15executable.)
16
17This file is distributed in the hope that it will be useful, but
18WITHOUT ANY WARRANTY; without even the implied warranty of
19MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20General Public License for more details.
21
22You should have received a copy of the GNU General Public License
23along with this program; see the file COPYING. If not, write to
24the Free Software Foundation, 51 Franklin Street, Fifth Floor,
25Boston, MA 02110-1301, USA. */
26
27/* Moderately Space-optimized libgcc routines for the Renesas SH /
28 STMicroelectronics ST40 CPUs.
29 Contributed by J"orn Rennecke joern.rennecke@st.com. */
30
31/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
32 sh4-200 run times:
33 udiv small divisor: 55 cycles
34 udiv large divisor: 52 cycles
35 sdiv small divisor, positive result: 59 cycles
36 sdiv large divisor, positive result: 56 cycles
37 sdiv small divisor, negative result: 65 cycles (*)
38 sdiv large divisor, negative result: 62 cycles (*)
39 (*): r2 is restored in the rts delay slot and has a lingering latency
40 of two more cycles. */
41 .balign 4
42 .global __udivsi3_i4i
43 .global __udivsi3_i4
44 .set __udivsi3_i4, __udivsi3_i4i
45 .type __udivsi3_i4i, @function
46 .type __sdivsi3_i4i, @function
47__udivsi3_i4i:
48 sts pr,r1
49 mov.l r4,@-r15
50 extu.w r5,r0
51 cmp/eq r5,r0
52 swap.w r4,r0
53 shlr16 r4
54 bf/s large_divisor
55 div0u
56 mov.l r5,@-r15
57 shll16 r5
58sdiv_small_divisor:
59 div1 r5,r4
60 bsr div6
61 div1 r5,r4
62 div1 r5,r4
63 bsr div6
64 div1 r5,r4
65 xtrct r4,r0
66 xtrct r0,r4
67 bsr div7
68 swap.w r4,r4
69 div1 r5,r4
70 bsr div7
71 div1 r5,r4
72 xtrct r4,r0
73 mov.l @r15+,r5
74 swap.w r0,r0
75 mov.l @r15+,r4
76 jmp @r1
77 rotcl r0
78div7:
79 div1 r5,r4
80div6:
81 div1 r5,r4; div1 r5,r4; div1 r5,r4
82 div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
83
84divx3:
85 rotcl r0
86 div1 r5,r4
87 rotcl r0
88 div1 r5,r4
89 rotcl r0
90 rts
91 div1 r5,r4
92
93large_divisor:
94 mov.l r5,@-r15
95sdiv_large_divisor:
96 xor r4,r0
97 .rept 4
98 rotcl r0
99 bsr divx3
100 div1 r5,r4
101 .endr
102 mov.l @r15+,r5
103 mov.l @r15+,r4
104 jmp @r1
105 rotcl r0
106
107 .global __sdivsi3_i4i
108 .global __sdivsi3_i4
109 .global __sdivsi3
110 .set __sdivsi3_i4, __sdivsi3_i4i
111 .set __sdivsi3, __sdivsi3_i4i
112__sdivsi3_i4i:
113 mov.l r4,@-r15
114 cmp/pz r5
115 mov.l r5,@-r15
116 bt/s pos_divisor
117 cmp/pz r4
118 neg r5,r5
119 extu.w r5,r0
120 bt/s neg_result
121 cmp/eq r5,r0
122 neg r4,r4
123pos_result:
124 swap.w r4,r0
125 bra sdiv_check_divisor
126 sts pr,r1
127pos_divisor:
128 extu.w r5,r0
129 bt/s pos_result
130 cmp/eq r5,r0
131 neg r4,r4
132neg_result:
133 mova negate_result,r0
134 ;
135 mov r0,r1
136 swap.w r4,r0
137 lds r2,macl
138 sts pr,r2
139sdiv_check_divisor:
140 shlr16 r4
141 bf/s sdiv_large_divisor
142 div0u
143 bra sdiv_small_divisor
144 shll16 r5
145 .balign 4
146negate_result:
147 neg r0,r0
148 jmp @r2
149 sts macl,r2
diff --git a/arch/sh/lib/udivsi3_i4i.S b/arch/sh/lib/udivsi3_i4i.S
new file mode 100644
index 000000000000..f1a79d9c5015
--- /dev/null
+++ b/arch/sh/lib/udivsi3_i4i.S
@@ -0,0 +1,666 @@
1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2 2004, 2005, 2006
3 Free Software Foundation, Inc.
4
5This file is free software; you can redistribute it and/or modify it
6under the terms of the GNU General Public License as published by the
7Free Software Foundation; either version 2, or (at your option) any
8later version.
9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file. (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA. */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38 ELF local label prefixes by J"orn Rennecke
39 amylaar@cygnus.com */
40
41/* This code used shld, thus is not suitable for SH1 / SH2. */
42
43/* Signed / unsigned division without use of FPU, optimized for SH4.
44 Uses a lookup table for divisors in the range -128 .. +128, and
45 div1 with case distinction for larger divisors in three more ranges.
46 The code is lumped together with the table to allow the use of mova. */
47#ifdef CONFIG_CPU_LITTLE_ENDIAN
48#define L_LSB 0
49#define L_LSWMSB 1
50#define L_MSWLSB 2
51#else
52#define L_LSB 3
53#define L_LSWMSB 2
54#define L_MSWLSB 1
55#endif
56
57 .balign 4
58 .global __udivsi3_i4i
59 .global __udivsi3_i4
60 .set __udivsi3_i4, __udivsi3_i4i
61 .type __udivsi3_i4i, @function
62__udivsi3_i4i:
63 mov.w c128_w, r1
64 div0u
65 mov r4,r0
66 shlr8 r0
67 cmp/hi r1,r5
68 extu.w r5,r1
69 bf udiv_le128
70 cmp/eq r5,r1
71 bf udiv_ge64k
72 shlr r0
73 mov r5,r1
74 shll16 r5
75 mov.l r4,@-r15
76 div1 r5,r0
77 mov.l r1,@-r15
78 div1 r5,r0
79 div1 r5,r0
80 bra udiv_25
81 div1 r5,r0
82
83div_le128:
84 mova div_table_ix,r0
85 bra div_le128_2
86 mov.b @(r0,r5),r1
87udiv_le128:
88 mov.l r4,@-r15
89 mova div_table_ix,r0
90 mov.b @(r0,r5),r1
91 mov.l r5,@-r15
92div_le128_2:
93 mova div_table_inv,r0
94 mov.l @(r0,r1),r1
95 mov r5,r0
96 tst #0xfe,r0
97 mova div_table_clz,r0
98 dmulu.l r1,r4
99 mov.b @(r0,r5),r1
100 bt/s div_by_1
101 mov r4,r0
102 mov.l @r15+,r5
103 sts mach,r0
104 /* clrt */
105 addc r4,r0
106 mov.l @r15+,r4
107 rotcr r0
108 rts
109 shld r1,r0
110
111div_by_1_neg:
112 neg r4,r0
113div_by_1:
114 mov.l @r15+,r5
115 rts
116 mov.l @r15+,r4
117
118div_ge64k:
119 bt/s div_r8
120 div0u
121 shll8 r5
122 bra div_ge64k_2
123 div1 r5,r0
124udiv_ge64k:
125 cmp/hi r0,r5
126 mov r5,r1
127 bt udiv_r8
128 shll8 r5
129 mov.l r4,@-r15
130 div1 r5,r0
131 mov.l r1,@-r15
132div_ge64k_2:
133 div1 r5,r0
134 mov.l zero_l,r1
135 .rept 4
136 div1 r5,r0
137 .endr
138 mov.l r1,@-r15
139 div1 r5,r0
140 mov.w m256_w,r1
141 div1 r5,r0
142 mov.b r0,@(L_LSWMSB,r15)
143 xor r4,r0
144 and r1,r0
145 bra div_ge64k_end
146 xor r4,r0
147
148div_r8:
149 shll16 r4
150 bra div_r8_2
151 shll8 r4
152udiv_r8:
153 mov.l r4,@-r15
154 shll16 r4
155 clrt
156 shll8 r4
157 mov.l r5,@-r15
158div_r8_2:
159 rotcl r4
160 mov r0,r1
161 div1 r5,r1
162 mov r4,r0
163 rotcl r0
164 mov r5,r4
165 div1 r5,r1
166 .rept 5
167 rotcl r0; div1 r5,r1
168 .endr
169 rotcl r0
170 mov.l @r15+,r5
171 div1 r4,r1
172 mov.l @r15+,r4
173 rts
174 rotcl r0
175
176 .global __sdivsi3_i4i
177 .global __sdivsi3_i4
178 .global __sdivsi3
179 .set __sdivsi3_i4, __sdivsi3_i4i
180 .set __sdivsi3, __sdivsi3_i4i
181 .type __sdivsi3_i4i, @function
182 /* This is link-compatible with a __sdivsi3 call,
183 but we effectively clobber only r1. */
184__sdivsi3_i4i:
185 mov.l r4,@-r15
186 cmp/pz r5
187 mov.w c128_w, r1
188 bt/s pos_divisor
189 cmp/pz r4
190 mov.l r5,@-r15
191 neg r5,r5
192 bt/s neg_result
193 cmp/hi r1,r5
194 neg r4,r4
195pos_result:
196 extu.w r5,r0
197 bf div_le128
198 cmp/eq r5,r0
199 mov r4,r0
200 shlr8 r0
201 bf/s div_ge64k
202 cmp/hi r0,r5
203 div0u
204 shll16 r5
205 div1 r5,r0
206 div1 r5,r0
207 div1 r5,r0
208udiv_25:
209 mov.l zero_l,r1
210 div1 r5,r0
211 div1 r5,r0
212 mov.l r1,@-r15
213 .rept 3
214 div1 r5,r0
215 .endr
216 mov.b r0,@(L_MSWLSB,r15)
217 xtrct r4,r0
218 swap.w r0,r0
219 .rept 8
220 div1 r5,r0
221 .endr
222 mov.b r0,@(L_LSWMSB,r15)
223div_ge64k_end:
224 .rept 8
225 div1 r5,r0
226 .endr
227 mov.l @r15+,r4 ! zero-extension and swap using LS unit.
228 extu.b r0,r0
229 mov.l @r15+,r5
230 or r4,r0
231 mov.l @r15+,r4
232 rts
233 rotcl r0
234
235div_le128_neg:
236 tst #0xfe,r0
237 mova div_table_ix,r0
238 mov.b @(r0,r5),r1
239 mova div_table_inv,r0
240 bt/s div_by_1_neg
241 mov.l @(r0,r1),r1
242 mova div_table_clz,r0
243 dmulu.l r1,r4
244 mov.b @(r0,r5),r1
245 mov.l @r15+,r5
246 sts mach,r0
247 /* clrt */
248 addc r4,r0
249 mov.l @r15+,r4
250 rotcr r0
251 shld r1,r0
252 rts
253 neg r0,r0
254
255pos_divisor:
256 mov.l r5,@-r15
257 bt/s pos_result
258 cmp/hi r1,r5
259 neg r4,r4
260neg_result:
261 extu.w r5,r0
262 bf div_le128_neg
263 cmp/eq r5,r0
264 mov r4,r0
265 shlr8 r0
266 bf/s div_ge64k_neg
267 cmp/hi r0,r5
268 div0u
269 mov.l zero_l,r1
270 shll16 r5
271 div1 r5,r0
272 mov.l r1,@-r15
273 .rept 7
274 div1 r5,r0
275 .endr
276 mov.b r0,@(L_MSWLSB,r15)
277 xtrct r4,r0
278 swap.w r0,r0
279 .rept 8
280 div1 r5,r0
281 .endr
282 mov.b r0,@(L_LSWMSB,r15)
283div_ge64k_neg_end:
284 .rept 8
285 div1 r5,r0
286 .endr
287 mov.l @r15+,r4 ! zero-extension and swap using LS unit.
288 extu.b r0,r1
289 mov.l @r15+,r5
290 or r4,r1
291div_r8_neg_end:
292 mov.l @r15+,r4
293 rotcl r1
294 rts
295 neg r1,r0
296
297div_ge64k_neg:
298 bt/s div_r8_neg
299 div0u
300 shll8 r5
301 mov.l zero_l,r1
302 .rept 6
303 div1 r5,r0
304 .endr
305 mov.l r1,@-r15
306 div1 r5,r0
307 mov.w m256_w,r1
308 div1 r5,r0
309 mov.b r0,@(L_LSWMSB,r15)
310 xor r4,r0
311 and r1,r0
312 bra div_ge64k_neg_end
313 xor r4,r0
314
315c128_w:
316 .word 128
317
318div_r8_neg:
319 clrt
320 shll16 r4
321 mov r4,r1
322 shll8 r1
323 mov r5,r4
324 .rept 7
325 rotcl r1; div1 r5,r0
326 .endr
327 mov.l @r15+,r5
328 rotcl r1
329 bra div_r8_neg_end
330 div1 r4,r0
331
332m256_w:
333 .word 0xff00
334/* This table has been generated by divtab-sh4.c. */
335 .balign 4
336div_table_clz:
337 .byte 0
338 .byte 1
339 .byte 0
340 .byte -1
341 .byte -1
342 .byte -2
343 .byte -2
344 .byte -2
345 .byte -2
346 .byte -3
347 .byte -3
348 .byte -3
349 .byte -3
350 .byte -3
351 .byte -3
352 .byte -3
353 .byte -3
354 .byte -4
355 .byte -4
356 .byte -4
357 .byte -4
358 .byte -4
359 .byte -4
360 .byte -4
361 .byte -4
362 .byte -4
363 .byte -4
364 .byte -4
365 .byte -4
366 .byte -4
367 .byte -4
368 .byte -4
369 .byte -4
370 .byte -5
371 .byte -5
372 .byte -5
373 .byte -5
374 .byte -5
375 .byte -5
376 .byte -5
377 .byte -5
378 .byte -5
379 .byte -5
380 .byte -5
381 .byte -5
382 .byte -5
383 .byte -5
384 .byte -5
385 .byte -5
386 .byte -5
387 .byte -5
388 .byte -5
389 .byte -5
390 .byte -5
391 .byte -5
392 .byte -5
393 .byte -5
394 .byte -5
395 .byte -5
396 .byte -5
397 .byte -5
398 .byte -5
399 .byte -5
400 .byte -5
401 .byte -5
402 .byte -6
403 .byte -6
404 .byte -6
405 .byte -6
406 .byte -6
407 .byte -6
408 .byte -6
409 .byte -6
410 .byte -6
411 .byte -6
412 .byte -6
413 .byte -6
414 .byte -6
415 .byte -6
416 .byte -6
417 .byte -6
418 .byte -6
419 .byte -6
420 .byte -6
421 .byte -6
422 .byte -6
423 .byte -6
424 .byte -6
425 .byte -6
426 .byte -6
427 .byte -6
428 .byte -6
429 .byte -6
430 .byte -6
431 .byte -6
432 .byte -6
433 .byte -6
434 .byte -6
435 .byte -6
436 .byte -6
437 .byte -6
438 .byte -6
439 .byte -6
440 .byte -6
441 .byte -6
442 .byte -6
443 .byte -6
444 .byte -6
445 .byte -6
446 .byte -6
447 .byte -6
448 .byte -6
449 .byte -6
450 .byte -6
451 .byte -6
452 .byte -6
453 .byte -6
454 .byte -6
455 .byte -6
456 .byte -6
457 .byte -6
458 .byte -6
459 .byte -6
460 .byte -6
461 .byte -6
462 .byte -6
463 .byte -6
464 .byte -6
465/* Lookup table translating positive divisor to index into table of
466 normalized inverse. N.B. the '0' entry is also the last entry of the
467 previous table, and causes an unaligned access for division by zero. */
468div_table_ix:
469 .byte -6
470 .byte -128
471 .byte -128
472 .byte 0
473 .byte -128
474 .byte -64
475 .byte 0
476 .byte 64
477 .byte -128
478 .byte -96
479 .byte -64
480 .byte -32
481 .byte 0
482 .byte 32
483 .byte 64
484 .byte 96
485 .byte -128
486 .byte -112
487 .byte -96
488 .byte -80
489 .byte -64
490 .byte -48
491 .byte -32
492 .byte -16
493 .byte 0
494 .byte 16
495 .byte 32
496 .byte 48
497 .byte 64
498 .byte 80
499 .byte 96
500 .byte 112
501 .byte -128
502 .byte -120
503 .byte -112
504 .byte -104
505 .byte -96
506 .byte -88
507 .byte -80
508 .byte -72
509 .byte -64
510 .byte -56
511 .byte -48
512 .byte -40
513 .byte -32
514 .byte -24
515 .byte -16
516 .byte -8
517 .byte 0
518 .byte 8
519 .byte 16
520 .byte 24
521 .byte 32
522 .byte 40
523 .byte 48
524 .byte 56
525 .byte 64
526 .byte 72
527 .byte 80
528 .byte 88
529 .byte 96
530 .byte 104
531 .byte 112
532 .byte 120
533 .byte -128
534 .byte -124
535 .byte -120
536 .byte -116
537 .byte -112
538 .byte -108
539 .byte -104
540 .byte -100
541 .byte -96
542 .byte -92
543 .byte -88
544 .byte -84
545 .byte -80
546 .byte -76
547 .byte -72
548 .byte -68
549 .byte -64
550 .byte -60
551 .byte -56
552 .byte -52
553 .byte -48
554 .byte -44
555 .byte -40
556 .byte -36
557 .byte -32
558 .byte -28
559 .byte -24
560 .byte -20
561 .byte -16
562 .byte -12
563 .byte -8
564 .byte -4
565 .byte 0
566 .byte 4
567 .byte 8
568 .byte 12
569 .byte 16
570 .byte 20
571 .byte 24
572 .byte 28
573 .byte 32
574 .byte 36
575 .byte 40
576 .byte 44
577 .byte 48
578 .byte 52
579 .byte 56
580 .byte 60
581 .byte 64
582 .byte 68
583 .byte 72
584 .byte 76
585 .byte 80
586 .byte 84
587 .byte 88
588 .byte 92
589 .byte 96
590 .byte 100
591 .byte 104
592 .byte 108
593 .byte 112
594 .byte 116
595 .byte 120
596 .byte 124
597 .byte -128
598/* 1/64 .. 1/127, normalized. There is an implicit leading 1 in bit 32. */
599 .balign 4
600zero_l:
601 .long 0x0
602 .long 0xF81F81F9
603 .long 0xF07C1F08
604 .long 0xE9131AC0
605 .long 0xE1E1E1E2
606 .long 0xDAE6076C
607 .long 0xD41D41D5
608 .long 0xCD856891
609 .long 0xC71C71C8
610 .long 0xC0E07039
611 .long 0xBACF914D
612 .long 0xB4E81B4F
613 .long 0xAF286BCB
614 .long 0xA98EF607
615 .long 0xA41A41A5
616 .long 0x9EC8E952
617 .long 0x9999999A
618 .long 0x948B0FCE
619 .long 0x8F9C18FA
620 .long 0x8ACB90F7
621 .long 0x86186187
622 .long 0x81818182
623 .long 0x7D05F418
624 .long 0x78A4C818
625 .long 0x745D1746
626 .long 0x702E05C1
627 .long 0x6C16C16D
628 .long 0x68168169
629 .long 0x642C8591
630 .long 0x60581606
631 .long 0x5C9882BA
632 .long 0x58ED2309
633div_table_inv:
634 .long 0x55555556
635 .long 0x51D07EAF
636 .long 0x4E5E0A73
637 .long 0x4AFD6A06
638 .long 0x47AE147B
639 .long 0x446F8657
640 .long 0x41414142
641 .long 0x3E22CBCF
642 .long 0x3B13B13C
643 .long 0x38138139
644 .long 0x3521CFB3
645 .long 0x323E34A3
646 .long 0x2F684BDB
647 .long 0x2C9FB4D9
648 .long 0x29E4129F
649 .long 0x27350B89
650 .long 0x24924925
651 .long 0x21FB7813
652 .long 0x1F7047DD
653 .long 0x1CF06ADB
654 .long 0x1A7B9612
655 .long 0x18118119
656 .long 0x15B1E5F8
657 .long 0x135C8114
658 .long 0x11111112
659 .long 0xECF56BF
660 .long 0xC9714FC
661 .long 0xA6810A7
662 .long 0x8421085
663 .long 0x624DD30
664 .long 0x4104105
665 .long 0x2040811
666 /* maximum error: 0.987342 scaled: 0.921875*/
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
index 9950966923a0..4bacb9e83478 100644
--- a/arch/sh/lib64/Makefile
+++ b/arch/sh/lib64/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the SH-5 specific library files.. 2# Makefile for the SH-5 specific library files..
3# 3#
4# Copyright (C) 2000, 2001 Paolo Alberelli 4# Copyright (C) 2000, 2001 Paolo Alberelli
5# Copyright (C) 2003 Paul Mundt 5# Copyright (C) 2003 - 2008 Paul Mundt
6# 6#
7# This file is subject to the terms and conditions of the GNU General Public 7# This file is subject to the terms and conditions of the GNU General Public
8# License. See the file "COPYING" in the main directory of this archive 8# License. See the file "COPYING" in the main directory of this archive
@@ -10,6 +10,8 @@
10# 10#
11 11
12# Panic should really be compiled as PIC 12# Panic should really be compiled as PIC
13lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o copy_user_memcpy.o \ 13lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o memset.o \
14 copy_page.o clear_page.o 14 copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o
15 15
16# Extracted from libgcc
17lib-y += udivsi3.o udivdi3.o sdivsi3.o
diff --git a/arch/sh/lib64/c-checksum.c b/arch/sh/lib64/c-checksum.c
index 5c284e0cff9c..73c0877e3a29 100644
--- a/arch/sh/lib64/c-checksum.c
+++ b/arch/sh/lib64/c-checksum.c
@@ -35,7 +35,7 @@ static inline unsigned short foldto16(unsigned long x)
35 35
36static inline unsigned short myfoldto16(unsigned long long x) 36static inline unsigned short myfoldto16(unsigned long long x)
37{ 37{
38 /* Fold down to 32-bits so we don't loose in the typedef-less 38 /* Fold down to 32-bits so we don't lose in the typedef-less
39 network stack. */ 39 network stack. */
40 /* 64 to 33 */ 40 /* 64 to 33 */
41 x = (x & 0xffffffff) + (x >> 32); 41 x = (x & 0xffffffff) + (x >> 32);
@@ -199,7 +199,7 @@ __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
199 result = (__force u64) saddr + (__force u64) daddr + 199 result = (__force u64) saddr + (__force u64) daddr +
200 (__force u64) sum + ((len + proto) << 8); 200 (__force u64) sum + ((len + proto) << 8);
201 201
202 /* Fold down to 32-bits so we don't loose in the typedef-less 202 /* Fold down to 32-bits so we don't lose in the typedef-less
203 network stack. */ 203 network stack. */
204 /* 64 to 33 */ 204 /* 64 to 33 */
205 result = (result & 0xffffffff) + (result >> 32); 205 result = (result & 0xffffffff) + (result >> 32);
diff --git a/arch/sh/lib64/memcpy.S b/arch/sh/lib64/memcpy.S
new file mode 100644
index 000000000000..dd300c372ce1
--- /dev/null
+++ b/arch/sh/lib64/memcpy.S
@@ -0,0 +1,201 @@
1/* Cloned and hacked for uClibc by Paul Mundt, December 2003 */
2/* Modified by SuperH, Inc. September 2003 */
3!
4! Fast SH memcpy
5!
6! by Toshiyasu Morita (tm@netcom.com)
7! hacked by J"orn Rernnecke (joern.rennecke@superh.com) ("o for o-umlaut)
8! SH5 code Copyright 2002 SuperH Ltd.
9!
10! Entry: ARG0: destination pointer
11! ARG1: source pointer
12! ARG2: byte count
13!
14! Exit: RESULT: destination pointer
15! any other registers in the range r0-r7: trashed
16!
17! Notes: Usually one wants to do small reads and write a longword, but
18! unfortunately it is difficult in some cases to concatanate bytes
19! into a longword on the SH, so this does a longword read and small
20! writes.
21!
22! This implementation makes two assumptions about how it is called:
23!
24! 1.: If the byte count is nonzero, the address of the last byte to be
25! copied is unsigned greater than the address of the first byte to
26! be copied. This could be easily swapped for a signed comparison,
27! but the algorithm used needs some comparison.
28!
29! 2.: When there are two or three bytes in the last word of an 11-or-more
30! bytes memory chunk to b copied, the rest of the word can be read
31! without side effects.
32! This could be easily changed by increasing the minumum size of
33! a fast memcpy and the amount subtracted from r7 before L_2l_loop be 2,
34! however, this would cost a few extra cyles on average.
35! For SHmedia, the assumption is that any quadword can be read in its
36! enirety if at least one byte is included in the copy.
37!
38
39 .section .text..SHmedia32,"ax"
40 .globl memcpy
41 .type memcpy, @function
42 .align 5
43
44memcpy:
45
46#define LDUAQ(P,O,D0,D1) ldlo.q P,O,D0; ldhi.q P,O+7,D1
47#define STUAQ(P,O,D0,D1) stlo.q P,O,D0; sthi.q P,O+7,D1
48#define LDUAL(P,O,D0,D1) ldlo.l P,O,D0; ldhi.l P,O+3,D1
49#define STUAL(P,O,D0,D1) stlo.l P,O,D0; sthi.l P,O+3,D1
50
51 ld.b r3,0,r63
52 pta/l Large,tr0
53 movi 25,r0
54 bgeu/u r4,r0,tr0
55 nsb r4,r0
56 shlli r0,5,r0
57 movi (L1-L0+63*32 + 1) & 0xffff,r1
58 sub r1, r0, r0
59L0: ptrel r0,tr0
60 add r2,r4,r5
61 ptabs r18,tr1
62 add r3,r4,r6
63 blink tr0,r63
64
65/* Rearranged to make cut2 safe */
66 .balign 8
67L4_7: /* 4..7 byte memcpy cntd. */
68 stlo.l r2, 0, r0
69 or r6, r7, r6
70 sthi.l r5, -1, r6
71 stlo.l r5, -4, r6
72 blink tr1,r63
73
74 .balign 8
75L1: /* 0 byte memcpy */
76 nop
77 blink tr1,r63
78 nop
79 nop
80 nop
81 nop
82
83L2_3: /* 2 or 3 byte memcpy cntd. */
84 st.b r5,-1,r6
85 blink tr1,r63
86
87 /* 1 byte memcpy */
88 ld.b r3,0,r0
89 st.b r2,0,r0
90 blink tr1,r63
91
92L8_15: /* 8..15 byte memcpy cntd. */
93 stlo.q r2, 0, r0
94 or r6, r7, r6
95 sthi.q r5, -1, r6
96 stlo.q r5, -8, r6
97 blink tr1,r63
98
99 /* 2 or 3 byte memcpy */
100 ld.b r3,0,r0
101 ld.b r2,0,r63
102 ld.b r3,1,r1
103 st.b r2,0,r0
104 pta/l L2_3,tr0
105 ld.b r6,-1,r6
106 st.b r2,1,r1
107 blink tr0, r63
108
109 /* 4 .. 7 byte memcpy */
110 LDUAL (r3, 0, r0, r1)
111 pta L4_7, tr0
112 ldlo.l r6, -4, r7
113 or r0, r1, r0
114 sthi.l r2, 3, r0
115 ldhi.l r6, -1, r6
116 blink tr0, r63
117
118 /* 8 .. 15 byte memcpy */
119 LDUAQ (r3, 0, r0, r1)
120 pta L8_15, tr0
121 ldlo.q r6, -8, r7
122 or r0, r1, r0
123 sthi.q r2, 7, r0
124 ldhi.q r6, -1, r6
125 blink tr0, r63
126
127 /* 16 .. 24 byte memcpy */
128 LDUAQ (r3, 0, r0, r1)
129 LDUAQ (r3, 8, r8, r9)
130 or r0, r1, r0
131 sthi.q r2, 7, r0
132 or r8, r9, r8
133 sthi.q r2, 15, r8
134 ldlo.q r6, -8, r7
135 ldhi.q r6, -1, r6
136 stlo.q r2, 8, r8
137 stlo.q r2, 0, r0
138 or r6, r7, r6
139 sthi.q r5, -1, r6
140 stlo.q r5, -8, r6
141 blink tr1,r63
142
143Large:
144 ld.b r2, 0, r63
145 pta/l Loop_ua, tr1
146 ori r3, -8, r7
147 sub r2, r7, r22
148 sub r3, r2, r6
149 add r2, r4, r5
150 ldlo.q r3, 0, r0
151 addi r5, -16, r5
152 movi 64+8, r27 // could subtract r7 from that.
153 stlo.q r2, 0, r0
154 sthi.q r2, 7, r0
155 ldx.q r22, r6, r0
156 bgtu/l r27, r4, tr1
157
158 addi r5, -48, r27
159 pta/l Loop_line, tr0
160 addi r6, 64, r36
161 addi r6, -24, r19
162 addi r6, -16, r20
163 addi r6, -8, r21
164
165Loop_line:
166 ldx.q r22, r36, r63
167 alloco r22, 32
168 addi r22, 32, r22
169 ldx.q r22, r19, r23
170 sthi.q r22, -25, r0
171 ldx.q r22, r20, r24
172 ldx.q r22, r21, r25
173 stlo.q r22, -32, r0
174 ldx.q r22, r6, r0
175 sthi.q r22, -17, r23
176 sthi.q r22, -9, r24
177 sthi.q r22, -1, r25
178 stlo.q r22, -24, r23
179 stlo.q r22, -16, r24
180 stlo.q r22, -8, r25
181 bgeu r27, r22, tr0
182
183Loop_ua:
184 addi r22, 8, r22
185 sthi.q r22, -1, r0
186 stlo.q r22, -8, r0
187 ldx.q r22, r6, r0
188 bgtu/l r5, r22, tr1
189
190 add r3, r4, r7
191 ldlo.q r7, -8, r1
192 sthi.q r22, 7, r0
193 ldhi.q r7, -1, r7
194 ptabs r18,tr1
195 stlo.q r22, 0, r0
196 or r1, r7, r1
197 sthi.q r5, 15, r1
198 stlo.q r5, 8, r1
199 blink tr1, r63
200
201 .size memcpy,.-memcpy
diff --git a/arch/sh/lib64/memcpy.c b/arch/sh/lib64/memcpy.c
deleted file mode 100644
index fba436a92bfa..000000000000
--- a/arch/sh/lib64/memcpy.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright (C) 2002 Mark Debbage (Mark.Debbage@superh.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 */
8
9#include <linux/types.h>
10#include <asm/string.h>
11
12// This is a simplistic optimization of memcpy to increase the
13// granularity of access beyond one byte using aligned
14// loads and stores. This is not an optimal implementation
15// for SH-5 (especially with regard to prefetching and the cache),
16// and a better version should be provided later ...
17
18void *memcpy(void *dest, const void *src, size_t count)
19{
20 char *d = (char *) dest, *s = (char *) src;
21
22 if (count >= 32) {
23 int i = 8 - (((unsigned long) d) & 0x7);
24
25 if (i != 8)
26 while (i-- && count--) {
27 *d++ = *s++;
28 }
29
30 if (((((unsigned long) d) & 0x7) == 0) &&
31 ((((unsigned long) s) & 0x7) == 0)) {
32 while (count >= 32) {
33 unsigned long long t1, t2, t3, t4;
34 t1 = *(unsigned long long *) (s);
35 t2 = *(unsigned long long *) (s + 8);
36 t3 = *(unsigned long long *) (s + 16);
37 t4 = *(unsigned long long *) (s + 24);
38 *(unsigned long long *) (d) = t1;
39 *(unsigned long long *) (d + 8) = t2;
40 *(unsigned long long *) (d + 16) = t3;
41 *(unsigned long long *) (d + 24) = t4;
42 d += 32;
43 s += 32;
44 count -= 32;
45 }
46 while (count >= 8) {
47 *(unsigned long long *) d =
48 *(unsigned long long *) s;
49 d += 8;
50 s += 8;
51 count -= 8;
52 }
53 }
54
55 if (((((unsigned long) d) & 0x3) == 0) &&
56 ((((unsigned long) s) & 0x3) == 0)) {
57 while (count >= 4) {
58 *(unsigned long *) d = *(unsigned long *) s;
59 d += 4;
60 s += 4;
61 count -= 4;
62 }
63 }
64
65 if (((((unsigned long) d) & 0x1) == 0) &&
66 ((((unsigned long) s) & 0x1) == 0)) {
67 while (count >= 2) {
68 *(unsigned short *) d = *(unsigned short *) s;
69 d += 2;
70 s += 2;
71 count -= 2;
72 }
73 }
74 }
75
76 while (count--) {
77 *d++ = *s++;
78 }
79
80 return d;
81}
diff --git a/arch/sh/lib64/memset.S b/arch/sh/lib64/memset.S
new file mode 100644
index 000000000000..2d37b0488552
--- /dev/null
+++ b/arch/sh/lib64/memset.S
@@ -0,0 +1,91 @@
1/* Cloned and hacked for uClibc by Paul Mundt, December 2003 */
2/* Modified by SuperH, Inc. September 2003 */
3!
4! Fast SH memset
5!
6! by Toshiyasu Morita (tm@netcom.com)
7!
8! SH5 code by J"orn Rennecke (joern.rennecke@superh.com)
9! Copyright 2002 SuperH Ltd.
10!
11
12#if __BYTE_ORDER == __LITTLE_ENDIAN
13#define SHHI shlld
14#define SHLO shlrd
15#else
16#define SHHI shlrd
17#define SHLO shlld
18#endif
19
20 .section .text..SHmedia32,"ax"
21 .globl memset
22 .type memset, @function
23
24 .align 5
25
26memset:
27 pta/l multiquad, tr0
28 andi r2, 7, r22
29 ptabs r18, tr2
30 mshflo.b r3,r3,r3
31 add r4, r22, r23
32 mperm.w r3, r63, r3 // Fill pattern now in every byte of r3
33
34 movi 8, r9
35 bgtu/u r23, r9, tr0 // multiquad
36
37 beqi/u r4, 0, tr2 // Return with size 0 - ensures no mem accesses
38 ldlo.q r2, 0, r7
39 shlli r4, 2, r4
40 movi -1, r8
41 SHHI r8, r4, r8
42 SHHI r8, r4, r8
43 mcmv r7, r8, r3
44 stlo.q r2, 0, r3
45 blink tr2, r63
46
47multiquad:
48 pta/l lastquad, tr0
49 stlo.q r2, 0, r3
50 shlri r23, 3, r24
51 add r2, r4, r5
52 beqi/u r24, 1, tr0 // lastquad
53 pta/l loop, tr1
54 sub r2, r22, r25
55 andi r5, -8, r20 // calculate end address and
56 addi r20, -7*8, r8 // loop end address; This might overflow, so we need
57 // to use a different test before we start the loop
58 bge/u r24, r9, tr1 // loop
59 st.q r25, 8, r3
60 st.q r20, -8, r3
61 shlri r24, 1, r24
62 beqi/u r24, 1, tr0 // lastquad
63 st.q r25, 16, r3
64 st.q r20, -16, r3
65 beqi/u r24, 2, tr0 // lastquad
66 st.q r25, 24, r3
67 st.q r20, -24, r3
68lastquad:
69 sthi.q r5, -1, r3
70 blink tr2,r63
71
72loop:
73!!! alloco r25, 32 // QQQ comment out for short-term fix to SHUK #3895.
74 // QQQ commenting out is locically correct, but sub-optimal
75 // QQQ Sean McGoogan - 4th April 2003.
76 st.q r25, 8, r3
77 st.q r25, 16, r3
78 st.q r25, 24, r3
79 st.q r25, 32, r3
80 addi r25, 32, r25
81 bgeu/l r8, r25, tr1 // loop
82
83 st.q r20, -40, r3
84 st.q r20, -32, r3
85 st.q r20, -24, r3
86 st.q r20, -16, r3
87 st.q r20, -8, r3
88 sthi.q r5, -1, r3
89 blink tr2,r63
90
91 .size memset,.-memset
diff --git a/arch/sh/lib64/sdivsi3.S b/arch/sh/lib64/sdivsi3.S
new file mode 100644
index 000000000000..6a800c6a4904
--- /dev/null
+++ b/arch/sh/lib64/sdivsi3.S
@@ -0,0 +1,131 @@
1 .global __sdivsi3
2 .section .text..SHmedia32,"ax"
3 .align 2
4
5 /* inputs: r4,r5 */
6 /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
7 /* result in r0 */
8__sdivsi3:
9 ptb __div_table,tr0
10
11 nsb r5, r1
12 shlld r5, r1, r25 /* normalize; [-2 ..1, 1..2) in s2.62 */
13 shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */
14 /* bubble */
15 gettr tr0,r20
16 ldx.ub r20, r21, r19 /* u0.8 */
17 shari r25, 32, r25 /* normalize to s2.30 */
18 shlli r21, 1, r21
19 muls.l r25, r19, r19 /* s2.38 */
20 ldx.w r20, r21, r21 /* s2.14 */
21 ptabs r18, tr0
22 shari r19, 24, r19 /* truncate to s2.14 */
23 sub r21, r19, r19 /* some 11 bit inverse in s1.14 */
24 muls.l r19, r19, r21 /* u0.28 */
25 sub r63, r1, r1
26 addi r1, 92, r1
27 muls.l r25, r21, r18 /* s2.58 */
28 shlli r19, 45, r19 /* multiply by two and convert to s2.58 */
29 /* bubble */
30 sub r19, r18, r18
31 shari r18, 28, r18 /* some 22 bit inverse in s1.30 */
32 muls.l r18, r25, r0 /* s2.60 */
33 muls.l r18, r4, r25 /* s32.30 */
34 /* bubble */
35 shari r0, 16, r19 /* s-16.44 */
36 muls.l r19, r18, r19 /* s-16.74 */
37 shari r25, 63, r0
38 shari r4, 14, r18 /* s19.-14 */
39 shari r19, 30, r19 /* s-16.44 */
40 muls.l r19, r18, r19 /* s15.30 */
41 xor r21, r0, r21 /* You could also use the constant 1 << 27. */
42 add r21, r25, r21
43 sub r21, r19, r21
44 shard r21, r1, r21
45 sub r21, r0, r0
46 blink tr0, r63
47
48/* This table has been generated by divtab.c .
49Defects for bias -330:
50 Max defect: 6.081536e-07 at -1.000000e+00
51 Min defect: 2.849516e-08 at 1.030651e+00
52 Max 2nd step defect: 9.606539e-12 at -1.000000e+00
53 Min 2nd step defect: 0.000000e+00 at 0.000000e+00
54 Defect at 1: 1.238659e-07
55 Defect at -2: 1.061708e-07 */
56
57 .balign 2
58 .type __div_table,@object
59 .size __div_table,128
60/* negative division constants */
61 .word -16638
62 .word -17135
63 .word -17737
64 .word -18433
65 .word -19103
66 .word -19751
67 .word -20583
68 .word -21383
69 .word -22343
70 .word -23353
71 .word -24407
72 .word -25582
73 .word -26863
74 .word -28382
75 .word -29965
76 .word -31800
77/* negative division factors */
78 .byte 66
79 .byte 70
80 .byte 75
81 .byte 81
82 .byte 87
83 .byte 93
84 .byte 101
85 .byte 109
86 .byte 119
87 .byte 130
88 .byte 142
89 .byte 156
90 .byte 172
91 .byte 192
92 .byte 214
93 .byte 241
94 .skip 16
95 .global __div_table
96__div_table:
97 .skip 16
98/* positive division factors */
99 .byte 241
100 .byte 214
101 .byte 192
102 .byte 172
103 .byte 156
104 .byte 142
105 .byte 130
106 .byte 119
107 .byte 109
108 .byte 101
109 .byte 93
110 .byte 87
111 .byte 81
112 .byte 75
113 .byte 70
114 .byte 66
115/* positive division constants */
116 .word 31801
117 .word 29966
118 .word 28383
119 .word 26864
120 .word 25583
121 .word 24408
122 .word 23354
123 .word 22344
124 .word 21384
125 .word 20584
126 .word 19752
127 .word 19104
128 .word 18434
129 .word 17738
130 .word 17136
131 .word 16639
diff --git a/arch/sh/lib64/strcpy.S b/arch/sh/lib64/strcpy.S
new file mode 100644
index 000000000000..ea7c9c533eea
--- /dev/null
+++ b/arch/sh/lib64/strcpy.S
@@ -0,0 +1,97 @@
1/* Cloned and hacked for uClibc by Paul Mundt, December 2003 */
2/* Modified by SuperH, Inc. September 2003 */
3! Entry: arg0: destination
4! arg1: source
5! Exit: result: destination
6!
7! SH5 code Copyright 2002 SuperH Ltd.
8
9#if __BYTE_ORDER == __LITTLE_ENDIAN
10#define SHHI shlld
11#define SHLO shlrd
12#else
13#define SHHI shlrd
14#define SHLO shlld
15#endif
16
17 .section .text..SHmedia32,"ax"
18 .globl strcpy
19 .type strcpy, @function
20 .align 5
21
22strcpy:
23
24 pta/l shortstring,tr1
25 ldlo.q r3,0,r4
26 ptabs r18,tr4
27 shlli r3,3,r7
28 addi r2, 8, r0
29 mcmpeq.b r4,r63,r6
30 SHHI r6,r7,r6
31 bnei/u r6,0,tr1 // shortstring
32 pta/l no_lddst, tr2
33 ori r3,-8,r23
34 sub r2, r23, r0
35 sub r3, r2, r21
36 addi r21, 8, r20
37 ldx.q r0, r21, r5
38 pta/l loop, tr0
39 ori r2,-8,r22
40 mcmpeq.b r5, r63, r6
41 bgt/u r22, r23, tr2 // no_lddst
42
43 // r22 < r23 : Need to do a load from the destination.
44 // r22 == r23 : Doesn't actually need to load from destination,
45 // but still can be handled here.
46 ldlo.q r2, 0, r9
47 movi -1, r8
48 SHLO r8, r7, r8
49 mcmv r4, r8, r9
50 stlo.q r2, 0, r9
51 beqi/l r6, 0, tr0 // loop
52
53 add r5, r63, r4
54 addi r0, 8, r0
55 blink tr1, r63 // shortstring
56no_lddst:
57 // r22 > r23: note that for r22 == r23 the sthi.q would clobber
58 // bytes before the destination region.
59 stlo.q r2, 0, r4
60 SHHI r4, r7, r4
61 sthi.q r0, -1, r4
62 beqi/l r6, 0, tr0 // loop
63
64 add r5, r63, r4
65 addi r0, 8, r0
66shortstring:
67#if __BYTE_ORDER != __LITTLE_ENDIAN
68 pta/l shortstring2,tr1
69 byterev r4,r4
70#endif
71shortstring2:
72 st.b r0,-8,r4
73 andi r4,0xff,r5
74 shlri r4,8,r4
75 addi r0,1,r0
76 bnei/l r5,0,tr1
77 blink tr4,r63 // return
78
79 .balign 8
80loop:
81 stlo.q r0, 0, r5
82 ldx.q r0, r20, r4
83 addi r0, 16, r0
84 sthi.q r0, -9, r5
85 mcmpeq.b r4, r63, r6
86 bnei/u r6, 0, tr1 // shortstring
87 ldx.q r0, r21, r5
88 stlo.q r0, -8, r4
89 sthi.q r0, -1, r4
90 mcmpeq.b r5, r63, r6
91 beqi/l r6, 0, tr0 // loop
92
93 add r5, r63, r4
94 addi r0, 8, r0
95 blink tr1, r63 // shortstring
96
97 .size strcpy,.-strcpy
diff --git a/arch/sh/lib64/strlen.S b/arch/sh/lib64/strlen.S
new file mode 100644
index 000000000000..cbc0d912e5f3
--- /dev/null
+++ b/arch/sh/lib64/strlen.S
@@ -0,0 +1,33 @@
1/*
2 * Simplistic strlen() implementation for SHmedia.
3 *
4 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
5 */
6
7 .section .text..SHmedia32,"ax"
8 .globl strlen
9 .type strlen,@function
10
11 .balign 16
12strlen:
13 ptabs r18, tr4
14
15 /*
16 * Note: We could easily deal with the NULL case here with a simple
17 * sanity check, though it seems that the behavior we want is to fault
18 * in the event that r2 == NULL, so we don't bother.
19 */
20/* beqi r2, 0, tr4 */ ! Sanity check
21
22 movi -1, r0
23 pta/l loop, tr0
24loop:
25 ld.b r2, 0, r1
26 addi r2, 1, r2
27 addi r0, 1, r0
28 bnei/l r1, 0, tr0
29
30 or r0, r63, r2
31 blink tr4, r63
32
33 .size strlen,.-strlen
diff --git a/arch/sh/lib64/udivdi3.S b/arch/sh/lib64/udivdi3.S
new file mode 100644
index 000000000000..6895c0225b85
--- /dev/null
+++ b/arch/sh/lib64/udivdi3.S
@@ -0,0 +1,120 @@
1 .section .text..SHmedia32,"ax"
2 .align 2
3 .global __udivdi3
4__udivdi3:
5 shlri r3,1,r4
6 nsb r4,r22
7 shlld r3,r22,r6
8 shlri r6,49,r5
9 movi 0xffffffffffffbaf1,r21 /* .l shift count 17. */
10 sub r21,r5,r1
11 mmulfx.w r1,r1,r4
12 mshflo.w r1,r63,r1
13 sub r63,r22,r20 // r63 == 64 % 64
14 mmulfx.w r5,r4,r4
15 pta large_divisor,tr0
16 addi r20,32,r9
17 msub.w r1,r4,r1
18 madd.w r1,r1,r1
19 mmulfx.w r1,r1,r4
20 shlri r6,32,r7
21 bgt/u r9,r63,tr0 // large_divisor
22 mmulfx.w r5,r4,r4
23 shlri r2,32+14,r19
24 addi r22,-31,r0
25 msub.w r1,r4,r1
26
27 mulu.l r1,r7,r4
28 addi r1,-3,r5
29 mulu.l r5,r19,r5
30 sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
31 shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
32 the case may be, %0000000000000000 000.11111111111, still */
33 muls.l r1,r4,r4 /* leaving at least one sign bit. */
34 mulu.l r5,r3,r8
35 mshalds.l r1,r21,r1
36 shari r4,26,r4
37 shlld r8,r0,r8
38 add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
39 sub r2,r8,r2
40 /* Can do second step of 64 : 32 div now, using r1 and the rest in r2. */
41
42 shlri r2,22,r21
43 mulu.l r21,r1,r21
44 shlld r5,r0,r8
45 addi r20,30-22,r0
46 shlrd r21,r0,r21
47 mulu.l r21,r3,r5
48 add r8,r21,r8
49 mcmpgt.l r21,r63,r21 // See Note 1
50 addi r20,30,r0
51 mshfhi.l r63,r21,r21
52 sub r2,r5,r2
53 andc r2,r21,r2
54
55 /* small divisor: need a third divide step */
56 mulu.l r2,r1,r7
57 ptabs r18,tr0
58 addi r2,1,r2
59 shlrd r7,r0,r7
60 mulu.l r7,r3,r5
61 add r8,r7,r8
62 sub r2,r3,r2
63 cmpgt r2,r5,r5
64 add r8,r5,r2
65 /* could test r3 here to check for divide by zero. */
66 blink tr0,r63
67
68large_divisor:
69 mmulfx.w r5,r4,r4
70 shlrd r2,r9,r25
71 shlri r25,32,r8
72 msub.w r1,r4,r1
73
74 mulu.l r1,r7,r4
75 addi r1,-3,r5
76 mulu.l r5,r8,r5
77 sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
78 shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
79 the case may be, %0000000000000000 000.11111111111, still */
80 muls.l r1,r4,r4 /* leaving at least one sign bit. */
81 shlri r5,14-1,r8
82 mulu.l r8,r7,r5
83 mshalds.l r1,r21,r1
84 shari r4,26,r4
85 add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
86 sub r25,r5,r25
87 /* Can do second step of 64 : 32 div now, using r1 and the rest in r25. */
88
89 shlri r25,22,r21
90 mulu.l r21,r1,r21
91 pta no_lo_adj,tr0
92 addi r22,32,r0
93 shlri r21,40,r21
94 mulu.l r21,r7,r5
95 add r8,r21,r8
96 shlld r2,r0,r2
97 sub r25,r5,r25
98 bgtu/u r7,r25,tr0 // no_lo_adj
99 addi r8,1,r8
100 sub r25,r7,r25
101no_lo_adj:
102 mextr4 r2,r25,r2
103
104 /* large_divisor: only needs a few adjustments. */
105 mulu.l r8,r6,r5
106 ptabs r18,tr0
107 /* bubble */
108 cmpgtu r5,r2,r5
109 sub r8,r5,r2
110 blink tr0,r63
111
112/* Note 1: To shift the result of the second divide stage so that the result
113 always fits into 32 bits, yet we still reduce the rest sufficiently
114 would require a lot of instructions to do the shifts just right. Using
115 the full 64 bit shift result to multiply with the divisor would require
116 four extra instructions for the upper 32 bits (shift / mulu / shift / sub).
117 Fortunately, if the upper 32 bits of the shift result are nonzero, we
118 know that the rest after taking this partial result into account will
119 fit into 32 bits. So we just clear the upper 32 bits of the rest if the
120 upper 32 bits of the partial result are nonzero. */
diff --git a/arch/sh/lib64/udivsi3.S b/arch/sh/lib64/udivsi3.S
new file mode 100644
index 000000000000..e68120e4b847
--- /dev/null
+++ b/arch/sh/lib64/udivsi3.S
@@ -0,0 +1,59 @@
1 .global __udivsi3
2 .section .text..SHmedia32,"ax"
3 .align 2
4
5/*
6 inputs: r4,r5
7 clobbered: r18,r19,r20,r21,r22,r25,tr0
8 result in r0.
9 */
10__udivsi3:
11 addz.l r5,r63,r22
12 nsb r22,r0
13 shlld r22,r0,r25
14 shlri r25,48,r25
15 movi 0xffffffffffffbb0c,r20 /* shift count eqiv 76 */
16 sub r20,r25,r21
17 mmulfx.w r21,r21,r19
18 mshflo.w r21,r63,r21
19 ptabs r18,tr0
20 mmulfx.w r25,r19,r19
21 sub r20,r0,r0
22 /* bubble */
23 msub.w r21,r19,r19
24
25 /*
26 * It would be nice for scheduling to do this add to r21 before
27 * the msub.w, but we need a different value for r19 to keep
28 * errors under control.
29 */
30 addi r19,-2,r21
31 mulu.l r4,r21,r18
32 mmulfx.w r19,r19,r19
33 shlli r21,15,r21
34 shlrd r18,r0,r18
35 mulu.l r18,r22,r20
36 mmacnfx.wl r25,r19,r21
37 /* bubble */
38 sub r4,r20,r25
39
40 mulu.l r25,r21,r19
41 addi r0,14,r0
42 /* bubble */
43 shlrd r19,r0,r19
44 mulu.l r19,r22,r20
45 add r18,r19,r18
46 /* bubble */
47 sub.l r25,r20,r25
48
49 mulu.l r25,r21,r19
50 addz.l r25,r63,r25
51 sub r25,r22,r25
52 shlrd r19,r0,r19
53 mulu.l r19,r22,r20
54 addi r25,1,r25
55 add r18,r19,r18
56
57 cmpgt r25,r20,r25
58 add.l r18,r25,r0
59 blink tr0,r63
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
index f066e76da204..cb2f3f299591 100644
--- a/arch/sh/mm/Makefile_32
+++ b/arch/sh/mm/Makefile_32
@@ -18,6 +18,7 @@ mmu-y := tlb-nommu.o pg-nommu.o
18mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o 18mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o
19 19
20obj-y += $(mmu-y) 20obj-y += $(mmu-y)
21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o
21 22
22ifdef CONFIG_DEBUG_FS 23ifdef CONFIG_DEBUG_FS
23obj-$(CONFIG_CPU_SH4) += cache-debugfs.o 24obj-$(CONFIG_CPU_SH4) += cache-debugfs.o
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index 9481d0f54efd..2863ffb7006d 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -13,6 +13,7 @@ obj-y += cache-sh5.o
13endif 13endif
14 14
15obj-y += $(mmu-y) 15obj-y += $(mmu-y)
16obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o
16 17
17obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 18obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
18obj-$(CONFIG_NUMA) += numa.o 19obj-$(CONFIG_NUMA) += numa.o
diff --git a/arch/sh/mm/asids-debugfs.c b/arch/sh/mm/asids-debugfs.c
new file mode 100644
index 000000000000..8e912a15e94f
--- /dev/null
+++ b/arch/sh/mm/asids-debugfs.c
@@ -0,0 +1,79 @@
1/*
2 * debugfs ops for process ASIDs
3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2003 - 2008 Paul Mundt
6 * Copyright (C) 2003, 2004 Richard Curnow
7 *
8 * Provides a debugfs file that lists out the ASIDs currently associated
9 * with the processes.
10 *
11 * In the SH-5 case, if the DM.PC register is examined through the debug
12 * link, this shows ASID + PC. To make use of this, the PID->ASID
13 * relationship needs to be known. This is primarily for debugging.
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive
17 * for more details.
18 */
19#include <linux/init.h>
20#include <linux/module.h>
21#include <linux/debugfs.h>
22#include <linux/seq_file.h>
23#include <linux/spinlock.h>
24#include <asm/processor.h>
25#include <asm/mmu_context.h>
26
27static int asids_seq_show(struct seq_file *file, void *iter)
28{
29 struct task_struct *p;
30
31 read_lock(&tasklist_lock);
32
33 for_each_process(p) {
34 int pid = p->pid;
35
36 if (unlikely(!pid))
37 continue;
38
39 if (p->mm)
40 seq_printf(file, "%5d : %02lx\n", pid,
41 cpu_asid(smp_processor_id(), p->mm));
42 else
43 seq_printf(file, "%5d : (none)\n", pid);
44 }
45
46 read_unlock(&tasklist_lock);
47
48 return 0;
49}
50
51static int asids_debugfs_open(struct inode *inode, struct file *file)
52{
53 return single_open(file, asids_seq_show, inode->i_private);
54}
55
56static const struct file_operations asids_debugfs_fops = {
57 .owner = THIS_MODULE,
58 .open = asids_debugfs_open,
59 .read = seq_read,
60 .llseek = seq_lseek,
61 .release = single_release,
62};
63
64static int __init asids_debugfs_init(void)
65{
66 struct dentry *asids_dentry;
67
68 asids_dentry = debugfs_create_file("asids", S_IRUSR, sh_debugfs_root,
69 NULL, &asids_debugfs_fops);
70 if (!asids_dentry)
71 return -ENOMEM;
72 if (IS_ERR(asids_dentry))
73 return PTR_ERR(asids_dentry);
74
75 return 0;
76}
77module_init(asids_debugfs_init);
78
79MODULE_LICENSE("GPL v2");
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 9f8ea3ada4db..edcd5fbf9651 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -42,6 +42,8 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
42 return NULL; 42 return NULL;
43 } 43 }
44 44
45 split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order);
46
45 *dma_handle = virt_to_phys(ret); 47 *dma_handle = virt_to_phys(ret);
46 return ret_nocache; 48 return ret_nocache;
47} 49}
@@ -51,10 +53,13 @@ void dma_free_coherent(struct device *dev, size_t size,
51 void *vaddr, dma_addr_t dma_handle) 53 void *vaddr, dma_addr_t dma_handle)
52{ 54{
53 int order = get_order(size); 55 int order = get_order(size);
56 unsigned long pfn = dma_handle >> PAGE_SHIFT;
57 int k;
54 58
55 if (!dma_release_from_coherent(dev, order, vaddr)) { 59 if (!dma_release_from_coherent(dev, order, vaddr)) {
56 WARN_ON(irqs_disabled()); /* for portability */ 60 WARN_ON(irqs_disabled()); /* for portability */
57 free_pages((unsigned long)phys_to_virt(dma_handle), order); 61 for (k = 0; k < (1 << order); k++)
62 __free_pages(pfn_to_page(pfn + k), 0);
58 iounmap(vaddr); 63 iounmap(vaddr);
59 } 64 }
60} 65}
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 898d477e47c1..31a33ebdef6f 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -20,7 +20,6 @@
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/mmu_context.h> 21#include <asm/mmu_context.h>
22#include <asm/tlbflush.h> 22#include <asm/tlbflush.h>
23#include <asm/kgdb.h>
24 23
25/* 24/*
26 * This routine handles page faults. It determines the address, 25 * This routine handles page faults. It determines the address,
@@ -265,17 +264,6 @@ static inline int notify_page_fault(struct pt_regs *regs, int trap)
265 return ret; 264 return ret;
266} 265}
267 266
268#ifdef CONFIG_SH_STORE_QUEUES
269/*
270 * This is a special case for the SH-4 store queues, as pages for this
271 * space still need to be faulted in before it's possible to flush the
272 * store queue cache for writeout to the remapped region.
273 */
274#define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000)
275#else
276#define P3_ADDR_MAX P4SEG
277#endif
278
279/* 267/*
280 * Called with interrupts disabled. 268 * Called with interrupts disabled.
281 */ 269 */
@@ -293,11 +281,6 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
293 if (notify_page_fault(regs, lookup_exception_vector())) 281 if (notify_page_fault(regs, lookup_exception_vector()))
294 goto out; 282 goto out;
295 283
296#ifdef CONFIG_SH_KGDB
297 if (kgdb_nofault && kgdb_bus_err_hook)
298 kgdb_bus_err_hook();
299#endif
300
301 ret = 1; 284 ret = 1;
302 285
303 /* 286 /*
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index 882a32ebc6b7..32946fba123e 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -116,9 +116,10 @@ EXPORT_SYMBOL(__ioremap);
116void __iounmap(void __iomem *addr) 116void __iounmap(void __iomem *addr)
117{ 117{
118 unsigned long vaddr = (unsigned long __force)addr; 118 unsigned long vaddr = (unsigned long __force)addr;
119 unsigned long seg = PXSEG(vaddr);
119 struct vm_struct *p; 120 struct vm_struct *p;
120 121
121 if (PXSEG(vaddr) < P3SEG || is_pci_memaddr(vaddr)) 122 if (seg < P3SEG || seg >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
122 return; 123 return;
123 124
124#ifdef CONFIG_32BIT 125#ifdef CONFIG_32BIT
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index 8837d511710a..931f4d003fa0 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -9,7 +9,101 @@
9 */ 9 */
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/mman.h>
13#include <linux/module.h>
12#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/processor.h>
16
17#ifdef CONFIG_MMU
18unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
19EXPORT_SYMBOL(shm_align_mask);
20
21/*
22 * To avoid cache aliases, we map the shared page with same color.
23 */
24#define COLOUR_ALIGN(addr, pgoff) \
25 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
26 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
27
28unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
29 unsigned long len, unsigned long pgoff, unsigned long flags)
30{
31 struct mm_struct *mm = current->mm;
32 struct vm_area_struct *vma;
33 unsigned long start_addr;
34 int do_colour_align;
35
36 if (flags & MAP_FIXED) {
37 /* We do not accept a shared mapping if it would violate
38 * cache aliasing constraints.
39 */
40 if ((flags & MAP_SHARED) && (addr & shm_align_mask))
41 return -EINVAL;
42 return addr;
43 }
44
45 if (unlikely(len > TASK_SIZE))
46 return -ENOMEM;
47
48 do_colour_align = 0;
49 if (filp || (flags & MAP_SHARED))
50 do_colour_align = 1;
51
52 if (addr) {
53 if (do_colour_align)
54 addr = COLOUR_ALIGN(addr, pgoff);
55 else
56 addr = PAGE_ALIGN(addr);
57
58 vma = find_vma(mm, addr);
59 if (TASK_SIZE - len >= addr &&
60 (!vma || addr + len <= vma->vm_start))
61 return addr;
62 }
63
64 if (len > mm->cached_hole_size) {
65 start_addr = addr = mm->free_area_cache;
66 } else {
67 mm->cached_hole_size = 0;
68 start_addr = addr = TASK_UNMAPPED_BASE;
69 }
70
71full_search:
72 if (do_colour_align)
73 addr = COLOUR_ALIGN(addr, pgoff);
74 else
75 addr = PAGE_ALIGN(mm->free_area_cache);
76
77 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
78 /* At this point: (!vma || addr < vma->vm_end). */
79 if (unlikely(TASK_SIZE - len < addr)) {
80 /*
81 * Start a new search - just in case we missed
82 * some holes.
83 */
84 if (start_addr != TASK_UNMAPPED_BASE) {
85 start_addr = addr = TASK_UNMAPPED_BASE;
86 mm->cached_hole_size = 0;
87 goto full_search;
88 }
89 return -ENOMEM;
90 }
91 if (likely(!vma || addr + len <= vma->vm_start)) {
92 /*
93 * Remember the place where we stopped the search:
94 */
95 mm->free_area_cache = addr + len;
96 return addr;
97 }
98 if (addr + mm->cached_hole_size < vma->vm_start)
99 mm->cached_hole_size = vma->vm_start - addr;
100
101 addr = vma->vm_end;
102 if (do_colour_align)
103 addr = COLOUR_ALIGN(addr, pgoff);
104 }
105}
106#endif /* CONFIG_MMU */
13 107
14/* 108/*
15 * You really shouldn't be using read() or write() on /dev/mem. This 109 * You really shouldn't be using read() or write() on /dev/mem. This
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile
index 2efc2e79fd29..8e6eec91c14c 100644
--- a/arch/sh/oprofile/Makefile
+++ b/arch/sh/oprofile/Makefile
@@ -6,13 +6,8 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
6 oprofilefs.o oprofile_stats.o \ 6 oprofilefs.o oprofile_stats.o \
7 timer_int.o ) 7 timer_int.o )
8 8
9profdrvr-y := op_model_null.o 9oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
10 10
11# SH7750-style performance counters exist across 7750/7750S and 7091. 11oprofile-$(CONFIG_CPU_SUBTYPE_SH7750S) += op_model_sh7750.o
12profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750S) := op_model_sh7750.o 12oprofile-$(CONFIG_CPU_SUBTYPE_SH7750) += op_model_sh7750.o
13profdrvr-$(CONFIG_CPU_SUBTYPE_SH7750) := op_model_sh7750.o 13oprofile-$(CONFIG_CPU_SUBTYPE_SH7091) += op_model_sh7750.o
14profdrvr-$(CONFIG_CPU_SUBTYPE_SH7091) := op_model_sh7750.o
15
16oprofile-y := $(DRIVER_OBJS) $(profdrvr-y)
17
18EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c
new file mode 100644
index 000000000000..9499a2914f89
--- /dev/null
+++ b/arch/sh/oprofile/backtrace.c
@@ -0,0 +1,114 @@
1/*
2 * SH specific backtracing code for oprofile
3 *
4 * Copyright 2007 STMicroelectronics Ltd.
5 *
6 * Author: Dave Peverley <dpeverley@mpc-data.co.uk>
7 *
8 * Based on ARM oprofile backtrace code by Richard Purdie and in turn, i386
9 * oprofile backtrace code by John Levon, David Smith
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16#include <linux/oprofile.h>
17#include <linux/sched.h>
18#include <linux/kallsyms.h>
19#include <linux/mm.h>
20#include <asm/ptrace.h>
21#include <asm/uaccess.h>
22#include <asm/sections.h>
23
24/* Limit to stop backtracing too far. */
25static int backtrace_limit = 20;
26
27static unsigned long *
28user_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
29{
30 unsigned long buf_stack;
31
32 /* Also check accessibility of address */
33 if (!access_ok(VERIFY_READ, stackaddr, sizeof(unsigned long)))
34 return NULL;
35
36 if (__copy_from_user_inatomic(&buf_stack, stackaddr, sizeof(unsigned long)))
37 return NULL;
38
39 /* Quick paranoia check */
40 if (buf_stack & 3)
41 return NULL;
42
43 oprofile_add_trace(buf_stack);
44
45 stackaddr++;
46
47 return stackaddr;
48}
49
50/*
51 * | | /\ Higher addresses
52 * | |
53 * --------------- stack base (address of current_thread_info)
54 * | thread info |
55 * . .
56 * | stack |
57 * --------------- saved regs->regs[15] value if valid
58 * . .
59 * --------------- struct pt_regs stored on stack (struct pt_regs *)
60 * | |
61 * . .
62 * | |
63 * --------------- ???
64 * | |
65 * | | \/ Lower addresses
66 *
67 * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values
68 */
69static int valid_kernel_stack(unsigned long *stackaddr, struct pt_regs *regs)
70{
71 unsigned long stack = (unsigned long)regs;
72 unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE;
73
74 return ((unsigned long)stackaddr > stack) && ((unsigned long)stackaddr < stack_base);
75}
76
77static unsigned long *
78kernel_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
79{
80 unsigned long addr;
81
82 /*
83 * If not a valid kernel address, keep going till we find one
84 * or the SP stops being a valid address.
85 */
86 do {
87 addr = *stackaddr++;
88 oprofile_add_trace(addr);
89 } while (valid_kernel_stack(stackaddr, regs));
90
91 return stackaddr;
92}
93
94void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
95{
96 unsigned long *stackaddr;
97
98 /*
99 * Paranoia - clip max depth as we could get lost in the weeds.
100 */
101 if (depth > backtrace_limit)
102 depth = backtrace_limit;
103
104 stackaddr = (unsigned long *)regs->regs[15];
105 if (!user_mode(regs)) {
106 while (depth-- && valid_kernel_stack(stackaddr, regs))
107 stackaddr = kernel_backtrace(stackaddr, regs);
108
109 return;
110 }
111
112 while (depth-- && (stackaddr != NULL))
113 stackaddr = user_backtrace(stackaddr, regs);
114}
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
new file mode 100644
index 000000000000..1d97d64cb95f
--- /dev/null
+++ b/arch/sh/oprofile/common.c
@@ -0,0 +1,150 @@
1/*
2 * arch/sh/oprofile/init.c
3 *
4 * Copyright (C) 2003 - 2008 Paul Mundt
5 *
6 * Based on arch/mips/oprofile/common.c:
7 *
8 * Copyright (C) 2004, 2005 Ralf Baechle
9 * Copyright (C) 2005 MIPS Technologies, Inc.
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/kernel.h>
16#include <linux/oprofile.h>
17#include <linux/init.h>
18#include <linux/errno.h>
19#include <linux/smp.h>
20#include <asm/processor.h>
21#include "op_impl.h"
22
23extern struct op_sh_model op_model_sh7750_ops __weak;
24extern struct op_sh_model op_model_sh4a_ops __weak;
25
26static struct op_sh_model *model;
27
28static struct op_counter_config ctr[20];
29
30extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth);
31
32static int op_sh_setup(void)
33{
34 /* Pre-compute the values to stuff in the hardware registers. */
35 model->reg_setup(ctr);
36
37 /* Configure the registers on all cpus. */
38 on_each_cpu(model->cpu_setup, NULL, 1);
39
40 return 0;
41}
42
43static int op_sh_create_files(struct super_block *sb, struct dentry *root)
44{
45 int i, ret = 0;
46
47 for (i = 0; i < model->num_counters; i++) {
48 struct dentry *dir;
49 char buf[4];
50
51 snprintf(buf, sizeof(buf), "%d", i);
52 dir = oprofilefs_mkdir(sb, root, buf);
53
54 ret |= oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
55 ret |= oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
56 ret |= oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
57 ret |= oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
58
59 if (model->create_files)
60 ret |= model->create_files(sb, dir);
61 else
62 ret |= oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
63
64 /* Dummy entries */
65 ret |= oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
66 }
67
68 return ret;
69}
70
71static int op_sh_start(void)
72{
73 /* Enable performance monitoring for all counters. */
74 on_each_cpu(model->cpu_start, NULL, 1);
75
76 return 0;
77}
78
79static void op_sh_stop(void)
80{
81 /* Disable performance monitoring for all counters. */
82 on_each_cpu(model->cpu_stop, NULL, 1);
83}
84
85int __init oprofile_arch_init(struct oprofile_operations *ops)
86{
87 struct op_sh_model *lmodel = NULL;
88 int ret;
89
90 /*
91 * Always assign the backtrace op. If the counter initialization
92 * fails, we fall back to the timer which will still make use of
93 * this.
94 */
95 ops->backtrace = sh_backtrace;
96
97 switch (current_cpu_data.type) {
98 /* SH-4 types */
99 case CPU_SH7750:
100 case CPU_SH7750S:
101 lmodel = &op_model_sh7750_ops;
102 break;
103
104 /* SH-4A types */
105 case CPU_SH7763:
106 case CPU_SH7770:
107 case CPU_SH7780:
108 case CPU_SH7781:
109 case CPU_SH7785:
110 case CPU_SH7723:
111 case CPU_SHX3:
112 lmodel = &op_model_sh4a_ops;
113 break;
114
115 /* SH4AL-DSP types */
116 case CPU_SH7343:
117 case CPU_SH7722:
118 case CPU_SH7366:
119 lmodel = &op_model_sh4a_ops;
120 break;
121 }
122
123 if (!lmodel)
124 return -ENODEV;
125 if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER))
126 return -ENODEV;
127
128 ret = lmodel->init();
129 if (unlikely(ret != 0))
130 return ret;
131
132 model = lmodel;
133
134 ops->setup = op_sh_setup;
135 ops->create_files = op_sh_create_files;
136 ops->start = op_sh_start;
137 ops->stop = op_sh_stop;
138 ops->cpu_type = lmodel->cpu_type;
139
140 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
141 lmodel->cpu_type);
142
143 return 0;
144}
145
146void oprofile_arch_exit(void)
147{
148 if (model && model->exit)
149 model->exit();
150}
diff --git a/arch/sh/oprofile/op_impl.h b/arch/sh/oprofile/op_impl.h
new file mode 100644
index 000000000000..4d509975eba6
--- /dev/null
+++ b/arch/sh/oprofile/op_impl.h
@@ -0,0 +1,33 @@
1#ifndef __OP_IMPL_H
2#define __OP_IMPL_H
3
4/* Per-counter configuration as set via oprofilefs. */
5struct op_counter_config {
6 unsigned long enabled;
7 unsigned long event;
8
9 unsigned long long count;
10
11 /* Dummy values for userspace tool compliance */
12 unsigned long kernel;
13 unsigned long user;
14 unsigned long unit_mask;
15};
16
17/* Per-architecture configury and hooks. */
18struct op_sh_model {
19 void (*reg_setup)(struct op_counter_config *);
20 int (*create_files)(struct super_block *sb, struct dentry *dir);
21 void (*cpu_setup)(void *dummy);
22 int (*init)(void);
23 void (*exit)(void);
24 void (*cpu_start)(void *args);
25 void (*cpu_stop)(void *args);
26 char *cpu_type;
27 unsigned char num_counters;
28};
29
30/* arch/sh/oprofile/common.c */
31extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth);
32
33#endif /* __OP_IMPL_H */
diff --git a/arch/sh/oprofile/op_model_null.c b/arch/sh/oprofile/op_model_null.c
deleted file mode 100644
index a845b088edb4..000000000000
--- a/arch/sh/oprofile/op_model_null.c
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/sh/oprofile/op_model_null.c
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/oprofile.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14
15int __init oprofile_arch_init(struct oprofile_operations *ops)
16{
17 return -ENODEV;
18}
19
20void oprofile_arch_exit(void)
21{
22}
23
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c
index 008b3b03750a..c892c7c30c2f 100644
--- a/arch/sh/oprofile/op_model_sh7750.c
+++ b/arch/sh/oprofile/op_model_sh7750.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * OProfile support for SH7750/SH7750S Performance Counters 4 * OProfile support for SH7750/SH7750S Performance Counters
5 * 5 *
6 * Copyright (C) 2003, 2004 Paul Mundt 6 * Copyright (C) 2003 - 2008 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -15,19 +15,16 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/io.h>
18#include <linux/fs.h> 19#include <linux/fs.h>
19#include <asm/uaccess.h> 20#include "op_impl.h"
20#include <asm/io.h>
21 21
22#define PM_CR_BASE 0xff000084 /* 16-bit */ 22#define PM_CR_BASE 0xff000084 /* 16-bit */
23#define PM_CTR_BASE 0xff100004 /* 32-bit */ 23#define PM_CTR_BASE 0xff100004 /* 32-bit */
24 24
25#define PMCR1 (PM_CR_BASE + 0x00) 25#define PMCR(n) (PM_CR_BASE + ((n) * 0x04))
26#define PMCR2 (PM_CR_BASE + 0x04) 26#define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08))
27#define PMCTR1H (PM_CTR_BASE + 0x00) 27#define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08))
28#define PMCTR1L (PM_CTR_BASE + 0x04)
29#define PMCTR2H (PM_CTR_BASE + 0x08)
30#define PMCTR2L (PM_CTR_BASE + 0x0c)
31 28
32#define PMCR_PMM_MASK 0x0000003f 29#define PMCR_PMM_MASK 0x0000003f
33 30
@@ -36,25 +33,15 @@
36#define PMCR_PMST 0x00004000 33#define PMCR_PMST 0x00004000
37#define PMCR_PMEN 0x00008000 34#define PMCR_PMEN 0x00008000
38 35
39#define PMCR_ENABLE (PMCR_PMST | PMCR_PMEN) 36struct op_sh_model op_model_sh7750_ops;
40 37
41/*
42 * SH7750/SH7750S have 2 perf counters
43 */
44#define NR_CNTRS 2 38#define NR_CNTRS 2
45 39
46struct op_counter_config { 40static struct sh7750_ppc_register_config {
47 unsigned long enabled; 41 unsigned int ctrl;
48 unsigned long event; 42 unsigned long cnt_hi;
49 unsigned long count; 43 unsigned long cnt_lo;
50 44} regcache[NR_CNTRS];
51 /* Dummy values for userspace tool compliance */
52 unsigned long kernel;
53 unsigned long user;
54 unsigned long unit_mask;
55};
56
57static struct op_counter_config ctr[NR_CNTRS];
58 45
59/* 46/*
60 * There are a number of events supported by each counter (33 in total). 47 * There are a number of events supported by each counter (33 in total).
@@ -116,12 +103,8 @@ static int sh7750_timer_notify(struct pt_regs *regs)
116 103
117static u64 sh7750_read_counter(int counter) 104static u64 sh7750_read_counter(int counter)
118{ 105{
119 u32 hi, lo; 106 return (u64)((u64)(__raw_readl(PMCTRH(counter)) & 0xffff) << 32) |
120 107 __raw_readl(PMCTRL(counter));
121 hi = (counter == 0) ? ctrl_inl(PMCTR1H) : ctrl_inl(PMCTR2H);
122 lo = (counter == 0) ? ctrl_inl(PMCTR1L) : ctrl_inl(PMCTR2L);
123
124 return (u64)((u64)(hi & 0xffff) << 32) | lo;
125} 108}
126 109
127/* 110/*
@@ -170,11 +153,7 @@ static ssize_t sh7750_write_count(struct file *file, const char __user *buf,
170 */ 153 */
171 WARN_ON(val != 0); 154 WARN_ON(val != 0);
172 155
173 if (counter == 0) { 156 __raw_writew(__raw_readw(PMCR(counter)) | PMCR_PMCLR, PMCR(counter));
174 ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
175 } else {
176 ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2);
177 }
178 157
179 return count; 158 return count;
180} 159}
@@ -184,88 +163,93 @@ static const struct file_operations count_fops = {
184 .write = sh7750_write_count, 163 .write = sh7750_write_count,
185}; 164};
186 165
187static int sh7750_perf_counter_create_files(struct super_block *sb, struct dentry *root) 166static int sh7750_ppc_create_files(struct super_block *sb, struct dentry *dir)
188{ 167{
189 int i; 168 return oprofilefs_create_file(sb, dir, "count", &count_fops);
169}
190 170
191 for (i = 0; i < NR_CNTRS; i++) { 171static void sh7750_ppc_reg_setup(struct op_counter_config *ctr)
192 struct dentry *dir; 172{
193 char buf[4]; 173 unsigned int counters = op_model_sh7750_ops.num_counters;
174 int i;
194 175
195 snprintf(buf, sizeof(buf), "%d", i); 176 for (i = 0; i < counters; i++) {
196 dir = oprofilefs_mkdir(sb, root, buf); 177 regcache[i].ctrl = 0;
178 regcache[i].cnt_hi = 0;
179 regcache[i].cnt_lo = 0;
197 180
198 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); 181 if (!ctr[i].enabled)
199 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); 182 continue;
200 oprofilefs_create_file(sb, dir, "count", &count_fops);
201 183
202 /* Dummy entries */ 184 regcache[i].ctrl |= ctr[i].event | PMCR_PMEN | PMCR_PMST;
203 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); 185 regcache[i].cnt_hi = (unsigned long)((ctr->count >> 32) & 0xffff);
204 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); 186 regcache[i].cnt_lo = (unsigned long)(ctr->count & 0xffffffff);
205 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
206 } 187 }
207
208 return 0;
209} 188}
210 189
211static int sh7750_perf_counter_start(void) 190static void sh7750_ppc_cpu_setup(void *args)
212{ 191{
213 u16 pmcr; 192 unsigned int counters = op_model_sh7750_ops.num_counters;
214 193 int i;
215 /* Enable counter 1 */
216 if (ctr[0].enabled) {
217 pmcr = ctrl_inw(PMCR1);
218 WARN_ON(pmcr & PMCR_PMEN);
219
220 pmcr &= ~PMCR_PMM_MASK;
221 pmcr |= ctr[0].event;
222 ctrl_outw(pmcr | PMCR_ENABLE, PMCR1);
223 }
224
225 /* Enable counter 2 */
226 if (ctr[1].enabled) {
227 pmcr = ctrl_inw(PMCR2);
228 WARN_ON(pmcr & PMCR_PMEN);
229 194
230 pmcr &= ~PMCR_PMM_MASK; 195 for (i = 0; i < counters; i++) {
231 pmcr |= ctr[1].event; 196 __raw_writew(0, PMCR(i));
232 ctrl_outw(pmcr | PMCR_ENABLE, PMCR2); 197 __raw_writel(regcache[i].cnt_hi, PMCTRH(i));
198 __raw_writel(regcache[i].cnt_lo, PMCTRL(i));
233 } 199 }
234
235 return register_timer_hook(sh7750_timer_notify);
236} 200}
237 201
238static void sh7750_perf_counter_stop(void) 202static void sh7750_ppc_cpu_start(void *args)
239{ 203{
240 ctrl_outw(ctrl_inw(PMCR1) & ~PMCR_PMEN, PMCR1); 204 unsigned int counters = op_model_sh7750_ops.num_counters;
241 ctrl_outw(ctrl_inw(PMCR2) & ~PMCR_PMEN, PMCR2); 205 int i;
242 206
243 unregister_timer_hook(sh7750_timer_notify); 207 for (i = 0; i < counters; i++)
208 __raw_writew(regcache[i].ctrl, PMCR(i));
244} 209}
245 210
246static struct oprofile_operations sh7750_perf_counter_ops = { 211static void sh7750_ppc_cpu_stop(void *args)
247 .create_files = sh7750_perf_counter_create_files,
248 .start = sh7750_perf_counter_start,
249 .stop = sh7750_perf_counter_stop,
250};
251
252int __init oprofile_arch_init(struct oprofile_operations *ops)
253{ 212{
254 if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER)) 213 unsigned int counters = op_model_sh7750_ops.num_counters;
255 return -ENODEV; 214 int i;
256 215
257 ops = &sh7750_perf_counter_ops; 216 /* Disable the counters */
258 ops->cpu_type = "sh/sh7750"; 217 for (i = 0; i < counters; i++)
218 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
219}
259 220
260 printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n"); 221static inline void sh7750_ppc_reset(void)
222{
223 unsigned int counters = op_model_sh7750_ops.num_counters;
224 int i;
261 225
262 /* Clear the counters */ 226 /* Clear the counters */
263 ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1); 227 for (i = 0; i < counters; i++)
264 ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2); 228 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMCLR, PMCR(i));
229}
265 230
266 return 0; 231static int sh7750_ppc_init(void)
232{
233 sh7750_ppc_reset();
234
235 return register_timer_hook(sh7750_timer_notify);
267} 236}
268 237
269void oprofile_arch_exit(void) 238static void sh7750_ppc_exit(void)
270{ 239{
240 unregister_timer_hook(sh7750_timer_notify);
241
242 sh7750_ppc_reset();
271} 243}
244
245struct op_sh_model op_model_sh7750_ops = {
246 .cpu_type = "sh/sh7750",
247 .num_counters = NR_CNTRS,
248 .reg_setup = sh7750_ppc_reg_setup,
249 .cpu_setup = sh7750_ppc_cpu_setup,
250 .cpu_start = sh7750_ppc_cpu_start,
251 .cpu_stop = sh7750_ppc_cpu_stop,
252 .init = sh7750_ppc_init,
253 .exit = sh7750_ppc_exit,
254 .create_files = sh7750_ppc_create_files,
255};
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index d0c2928d1066..284b7e867496 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -8,6 +8,7 @@
8SE SH_SOLUTION_ENGINE 8SE SH_SOLUTION_ENGINE
9HIGHLANDER SH_HIGHLANDER 9HIGHLANDER SH_HIGHLANDER
10RTS7751R2D SH_RTS7751R2D 10RTS7751R2D SH_RTS7751R2D
11RSK SH_RSK
11 12
12# 13#
13# List of companion chips / MFDs. 14# List of companion chips / MFDs.
@@ -46,6 +47,7 @@ R2D_1 RTS7751R2D_1
46CAYMAN SH_CAYMAN 47CAYMAN SH_CAYMAN
47SDK7780 SH_SDK7780 48SDK7780 SH_SDK7780
48MIGOR SH_MIGOR 49MIGOR SH_MIGOR
50RSK7201 SH_RSK7201
49RSK7203 SH_RSK7203 51RSK7203 SH_RSK7203
50AP325RXA SH_AP325RXA 52AP325RXA SH_AP325RXA
51SH7763RDP SH_SH7763RDP 53SH7763RDP SH_SH7763RDP
diff --git a/arch/sparc/include/asm/device.h b/arch/sparc/include/asm/device.h
index 19790eb99cc6..3702e087df2c 100644
--- a/arch/sparc/include/asm/device.h
+++ b/arch/sparc/include/asm/device.h
@@ -20,4 +20,16 @@ struct dev_archdata {
20 int numa_node; 20 int numa_node;
21}; 21};
22 22
23static inline void dev_archdata_set_node(struct dev_archdata *ad,
24 struct device_node *np)
25{
26 ad->prom_node = np;
27}
28
29static inline struct device_node *
30dev_archdata_get_node(const struct dev_archdata *ad)
31{
32 return ad->prom_node;
33}
34
23#endif /* _ASM_SPARC_DEVICE_H */ 35#endif /* _ASM_SPARC_DEVICE_H */
diff --git a/arch/sparc/include/asm/ptrace_32.h b/arch/sparc/include/asm/ptrace_32.h
index d409c4f21a5c..4cef450167dd 100644
--- a/arch/sparc/include/asm/ptrace_32.h
+++ b/arch/sparc/include/asm/ptrace_32.h
@@ -62,6 +62,8 @@ struct sparc_stackf {
62 62
63#ifdef __KERNEL__ 63#ifdef __KERNEL__
64 64
65#include <asm/system.h>
66
65static inline bool pt_regs_is_syscall(struct pt_regs *regs) 67static inline bool pt_regs_is_syscall(struct pt_regs *regs)
66{ 68{
67 return (regs->psr & PSR_SYSCALL); 69 return (regs->psr & PSR_SYSCALL);
@@ -72,6 +74,14 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
72 return (regs->psr &= ~PSR_SYSCALL); 74 return (regs->psr &= ~PSR_SYSCALL);
73} 75}
74 76
77#define arch_ptrace_stop_needed(exit_code, info) \
78({ flush_user_windows(); \
79 current_thread_info()->w_saved != 0; \
80})
81
82#define arch_ptrace_stop(exit_code, info) \
83 synchronize_user_stack()
84
75#define user_mode(regs) (!((regs)->psr & PSR_PS)) 85#define user_mode(regs) (!((regs)->psr & PSR_PS))
76#define instruction_pointer(regs) ((regs)->pc) 86#define instruction_pointer(regs) ((regs)->pc)
77#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) 87#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
diff --git a/arch/sparc/include/asm/ptrace_64.h b/arch/sparc/include/asm/ptrace_64.h
index 84e969f06afe..cd6fbfc20435 100644
--- a/arch/sparc/include/asm/ptrace_64.h
+++ b/arch/sparc/include/asm/ptrace_64.h
@@ -114,6 +114,7 @@ struct sparc_trapf {
114#ifdef __KERNEL__ 114#ifdef __KERNEL__
115 115
116#include <linux/threads.h> 116#include <linux/threads.h>
117#include <asm/system.h>
117 118
118static inline int pt_regs_trap_type(struct pt_regs *regs) 119static inline int pt_regs_trap_type(struct pt_regs *regs)
119{ 120{
@@ -130,6 +131,14 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
130 return (regs->tstate &= ~TSTATE_SYSCALL); 131 return (regs->tstate &= ~TSTATE_SYSCALL);
131} 132}
132 133
134#define arch_ptrace_stop_needed(exit_code, info) \
135({ flush_user_windows(); \
136 get_thread_wsaved() != 0; \
137})
138
139#define arch_ptrace_stop(exit_code, info) \
140 synchronize_user_stack()
141
133struct global_reg_snapshot { 142struct global_reg_snapshot {
134 unsigned long tstate; 143 unsigned long tstate;
135 unsigned long tpc; 144 unsigned long tpc;
diff --git a/arch/sparc64/kernel/idprom.c b/arch/sparc64/kernel/idprom.c
index 5b45a808c621..a62ff83337cd 100644
--- a/arch/sparc64/kernel/idprom.c
+++ b/arch/sparc64/kernel/idprom.c
@@ -42,8 +42,5 @@ void __init idprom_init(void)
42 idprom->id_cksum, calc_idprom_cksum(idprom)); 42 idprom->id_cksum, calc_idprom_cksum(idprom));
43 } 43 }
44 44
45 printk("Ethernet address: %02x:%02x:%02x:%02x:%02x:%02x\n", 45 printk("Ethernet address: %pM\n", idprom->id_ethaddr);
46 idprom->id_ethaddr[0], idprom->id_ethaddr[1],
47 idprom->id_ethaddr[2], idprom->id_ethaddr[3],
48 idprom->id_ethaddr[4], idprom->id_ethaddr[5]);
49} 46}
diff --git a/arch/um/drivers/daemon_kern.c b/arch/um/drivers/daemon_kern.c
index d53ff52bb404..b4a1522f2157 100644
--- a/arch/um/drivers/daemon_kern.c
+++ b/arch/um/drivers/daemon_kern.c
@@ -22,7 +22,7 @@ static void daemon_init(struct net_device *dev, void *data)
22 struct daemon_data *dpri; 22 struct daemon_data *dpri;
23 struct daemon_init *init = data; 23 struct daemon_init *init = data;
24 24
25 pri = dev->priv; 25 pri = netdev_priv(dev);
26 dpri = (struct daemon_data *) pri->user; 26 dpri = (struct daemon_data *) pri->user;
27 dpri->sock_type = init->sock_type; 27 dpri->sock_type = init->sock_type;
28 dpri->ctl_sock = init->ctl_sock; 28 dpri->ctl_sock = init->ctl_sock;
diff --git a/arch/um/drivers/mcast_kern.c b/arch/um/drivers/mcast_kern.c
index 8c4378a76d63..ffc6416d5ed7 100644
--- a/arch/um/drivers/mcast_kern.c
+++ b/arch/um/drivers/mcast_kern.c
@@ -28,7 +28,7 @@ static void mcast_init(struct net_device *dev, void *data)
28 struct mcast_data *dpri; 28 struct mcast_data *dpri;
29 struct mcast_init *init = data; 29 struct mcast_init *init = data;
30 30
31 pri = dev->priv; 31 pri = netdev_priv(dev);
32 dpri = (struct mcast_data *) pri->user; 32 dpri = (struct mcast_data *) pri->user;
33 dpri->addr = init->addr; 33 dpri->addr = init->addr;
34 dpri->port = init->port; 34 dpri->port = init->port;
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index 8f44ebb0dec8..e14629c87de4 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -161,7 +161,8 @@ void mconsole_proc(struct mc_request *req)
161 goto out_kill; 161 goto out_kill;
162 } 162 }
163 163
164 file = dentry_open(nd.path.dentry, nd.path.mnt, O_RDONLY); 164 file = dentry_open(nd.path.dentry, nd.path.mnt, O_RDONLY,
165 current_cred());
165 if (IS_ERR(file)) { 166 if (IS_ERR(file)) {
166 mconsole_reply(req, "Failed to open file", 1, 0); 167 mconsole_reply(req, "Failed to open file", 1, 0);
167 goto out_kill; 168 goto out_kill;
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index 5b4ca8d93682..fde510b664d3 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -76,7 +76,7 @@ out:
76 76
77static int uml_net_rx(struct net_device *dev) 77static int uml_net_rx(struct net_device *dev)
78{ 78{
79 struct uml_net_private *lp = dev->priv; 79 struct uml_net_private *lp = netdev_priv(dev);
80 int pkt_len; 80 int pkt_len;
81 struct sk_buff *skb; 81 struct sk_buff *skb;
82 82
@@ -119,7 +119,7 @@ static void uml_dev_close(struct work_struct *work)
119static irqreturn_t uml_net_interrupt(int irq, void *dev_id) 119static irqreturn_t uml_net_interrupt(int irq, void *dev_id)
120{ 120{
121 struct net_device *dev = dev_id; 121 struct net_device *dev = dev_id;
122 struct uml_net_private *lp = dev->priv; 122 struct uml_net_private *lp = netdev_priv(dev);
123 int err; 123 int err;
124 124
125 if (!netif_running(dev)) 125 if (!netif_running(dev))
@@ -150,7 +150,7 @@ out:
150 150
151static int uml_net_open(struct net_device *dev) 151static int uml_net_open(struct net_device *dev)
152{ 152{
153 struct uml_net_private *lp = dev->priv; 153 struct uml_net_private *lp = netdev_priv(dev);
154 int err; 154 int err;
155 155
156 if (lp->fd >= 0) { 156 if (lp->fd >= 0) {
@@ -195,7 +195,7 @@ out:
195 195
196static int uml_net_close(struct net_device *dev) 196static int uml_net_close(struct net_device *dev)
197{ 197{
198 struct uml_net_private *lp = dev->priv; 198 struct uml_net_private *lp = netdev_priv(dev);
199 199
200 netif_stop_queue(dev); 200 netif_stop_queue(dev);
201 201
@@ -213,7 +213,7 @@ static int uml_net_close(struct net_device *dev)
213 213
214static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev) 214static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
215{ 215{
216 struct uml_net_private *lp = dev->priv; 216 struct uml_net_private *lp = netdev_priv(dev);
217 unsigned long flags; 217 unsigned long flags;
218 int len; 218 int len;
219 219
@@ -250,7 +250,7 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
250 250
251static struct net_device_stats *uml_net_get_stats(struct net_device *dev) 251static struct net_device_stats *uml_net_get_stats(struct net_device *dev)
252{ 252{
253 struct uml_net_private *lp = dev->priv; 253 struct uml_net_private *lp = netdev_priv(dev);
254 return &lp->stats; 254 return &lp->stats;
255} 255}
256 256
@@ -267,7 +267,7 @@ static void uml_net_tx_timeout(struct net_device *dev)
267 267
268static int uml_net_set_mac(struct net_device *dev, void *addr) 268static int uml_net_set_mac(struct net_device *dev, void *addr)
269{ 269{
270 struct uml_net_private *lp = dev->priv; 270 struct uml_net_private *lp = netdev_priv(dev);
271 struct sockaddr *hwaddr = addr; 271 struct sockaddr *hwaddr = addr;
272 272
273 spin_lock_irq(&lp->lock); 273 spin_lock_irq(&lp->lock);
@@ -368,7 +368,7 @@ static void net_device_release(struct device *dev)
368{ 368{
369 struct uml_net *device = dev->driver_data; 369 struct uml_net *device = dev->driver_data;
370 struct net_device *netdev = device->dev; 370 struct net_device *netdev = device->dev;
371 struct uml_net_private *lp = netdev->priv; 371 struct uml_net_private *lp = netdev_priv(netdev);
372 372
373 if (lp->remove != NULL) 373 if (lp->remove != NULL)
374 (*lp->remove)(&lp->user); 374 (*lp->remove)(&lp->user);
@@ -418,14 +418,9 @@ static void eth_configure(int n, void *init, char *mac,
418 418
419 setup_etheraddr(mac, device->mac, dev->name); 419 setup_etheraddr(mac, device->mac, dev->name);
420 420
421 printk(KERN_INFO "Netdevice %d ", n); 421 printk(KERN_INFO "Netdevice %d (%pM) : ", n, device->mac);
422 printk("(%02x:%02x:%02x:%02x:%02x:%02x) ",
423 device->mac[0], device->mac[1],
424 device->mac[2], device->mac[3],
425 device->mac[4], device->mac[5]);
426 printk(": ");
427 422
428 lp = dev->priv; 423 lp = netdev_priv(dev);
429 /* This points to the transport private data. It's still clear, but we 424 /* This points to the transport private data. It's still clear, but we
430 * must memset it to 0 *now*. Let's help the drivers. */ 425 * must memset it to 0 *now*. Let's help the drivers. */
431 memset(lp, 0, size); 426 memset(lp, 0, size);
@@ -735,7 +730,7 @@ static int net_remove(int n, char **error_out)
735 return -ENODEV; 730 return -ENODEV;
736 731
737 dev = device->dev; 732 dev = device->dev;
738 lp = dev->priv; 733 lp = netdev_priv(dev);
739 if (lp->fd > 0) 734 if (lp->fd > 0)
740 return -EBUSY; 735 return -EBUSY;
741 unregister_netdev(dev); 736 unregister_netdev(dev);
@@ -766,7 +761,7 @@ static int uml_inetaddr_event(struct notifier_block *this, unsigned long event,
766 if (dev->open != uml_net_open) 761 if (dev->open != uml_net_open)
767 return NOTIFY_DONE; 762 return NOTIFY_DONE;
768 763
769 lp = dev->priv; 764 lp = netdev_priv(dev);
770 765
771 proc = NULL; 766 proc = NULL;
772 switch (event) { 767 switch (event) {
diff --git a/arch/um/drivers/pcap_kern.c b/arch/um/drivers/pcap_kern.c
index 3a750dd39be1..2860525f8ff6 100644
--- a/arch/um/drivers/pcap_kern.c
+++ b/arch/um/drivers/pcap_kern.c
@@ -21,7 +21,7 @@ void pcap_init(struct net_device *dev, void *data)
21 struct pcap_data *ppri; 21 struct pcap_data *ppri;
22 struct pcap_init *init = data; 22 struct pcap_init *init = data;
23 23
24 pri = dev->priv; 24 pri = netdev_priv(dev);
25 ppri = (struct pcap_data *) pri->user; 25 ppri = (struct pcap_data *) pri->user;
26 ppri->host_if = init->host_if; 26 ppri->host_if = init->host_if;
27 ppri->promisc = init->promisc; 27 ppri->promisc = init->promisc;
diff --git a/arch/um/drivers/slip_kern.c b/arch/um/drivers/slip_kern.c
index d19faec7046e..5ec17563142e 100644
--- a/arch/um/drivers/slip_kern.c
+++ b/arch/um/drivers/slip_kern.c
@@ -19,7 +19,7 @@ static void slip_init(struct net_device *dev, void *data)
19 struct slip_data *spri; 19 struct slip_data *spri;
20 struct slip_init *init = data; 20 struct slip_init *init = data;
21 21
22 private = dev->priv; 22 private = netdev_priv(dev);
23 spri = (struct slip_data *) private->user; 23 spri = (struct slip_data *) private->user;
24 24
25 memset(spri->name, 0, sizeof(spri->name)); 25 memset(spri->name, 0, sizeof(spri->name));
diff --git a/arch/um/drivers/slirp_kern.c b/arch/um/drivers/slirp_kern.c
index d987af277db9..f15a6e7654f3 100644
--- a/arch/um/drivers/slirp_kern.c
+++ b/arch/um/drivers/slirp_kern.c
@@ -22,7 +22,7 @@ void slirp_init(struct net_device *dev, void *data)
22 struct slirp_init *init = data; 22 struct slirp_init *init = data;
23 int i; 23 int i;
24 24
25 private = dev->priv; 25 private = netdev_priv(dev);
26 spri = (struct slirp_data *) private->user; 26 spri = (struct slirp_data *) private->user;
27 27
28 spri->argw = init->argw; 28 spri->argw = init->argw;
diff --git a/arch/um/drivers/vde_kern.c b/arch/um/drivers/vde_kern.c
index add7e722defb..1b852bffdebc 100644
--- a/arch/um/drivers/vde_kern.c
+++ b/arch/um/drivers/vde_kern.c
@@ -19,7 +19,7 @@ static void vde_init(struct net_device *dev, void *data)
19 struct uml_net_private *pri; 19 struct uml_net_private *pri;
20 struct vde_data *vpri; 20 struct vde_data *vpri;
21 21
22 pri = dev->priv; 22 pri = netdev_priv(dev);
23 vpri = (struct vde_data *) pri->user; 23 vpri = (struct vde_data *) pri->user;
24 24
25 vpri->vde_switch = init->vde_switch; 25 vpri->vde_switch = init->vde_switch;
diff --git a/arch/um/os-Linux/drivers/ethertap_kern.c b/arch/um/os-Linux/drivers/ethertap_kern.c
index 046a131f6104..7f6f9a71aae4 100644
--- a/arch/um/os-Linux/drivers/ethertap_kern.c
+++ b/arch/um/os-Linux/drivers/ethertap_kern.c
@@ -22,7 +22,7 @@ static void etap_init(struct net_device *dev, void *data)
22 struct ethertap_data *epri; 22 struct ethertap_data *epri;
23 struct ethertap_init *init = data; 23 struct ethertap_init *init = data;
24 24
25 pri = dev->priv; 25 pri = netdev_priv(dev);
26 epri = (struct ethertap_data *) pri->user; 26 epri = (struct ethertap_data *) pri->user;
27 epri->dev_name = init->dev_name; 27 epri->dev_name = init->dev_name;
28 epri->gate_addr = init->gate_addr; 28 epri->gate_addr = init->gate_addr;
diff --git a/arch/um/os-Linux/drivers/tuntap_kern.c b/arch/um/os-Linux/drivers/tuntap_kern.c
index 6b9e33d5de20..4048800e4696 100644
--- a/arch/um/os-Linux/drivers/tuntap_kern.c
+++ b/arch/um/os-Linux/drivers/tuntap_kern.c
@@ -21,7 +21,7 @@ static void tuntap_init(struct net_device *dev, void *data)
21 struct tuntap_data *tpri; 21 struct tuntap_data *tpri;
22 struct tuntap_init *init = data; 22 struct tuntap_init *init = data;
23 23
24 pri = dev->priv; 24 pri = netdev_priv(dev);
25 tpri = (struct tuntap_data *) pri->user; 25 tpri = (struct tuntap_data *) pri->user;
26 tpri->dev_name = init->dev_name; 26 tpri->dev_name = init->dev_name;
27 tpri->fixed_config = (init->dev_name != NULL); 27 tpri->fixed_config = (init->dev_name != NULL);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ac22bb7719f7..98a0ed52b5c3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -19,6 +19,8 @@ config X86_64
19config X86 19config X86
20 def_bool y 20 def_bool y
21 select HAVE_AOUT if X86_32 21 select HAVE_AOUT if X86_32
22 select HAVE_READQ
23 select HAVE_WRITEQ
22 select HAVE_UNSTABLE_SCHED_CLOCK 24 select HAVE_UNSTABLE_SCHED_CLOCK
23 select HAVE_IDE 25 select HAVE_IDE
24 select HAVE_OPROFILE 26 select HAVE_OPROFILE
@@ -29,11 +31,14 @@ config X86
29 select HAVE_FTRACE_MCOUNT_RECORD 31 select HAVE_FTRACE_MCOUNT_RECORD
30 select HAVE_DYNAMIC_FTRACE 32 select HAVE_DYNAMIC_FTRACE
31 select HAVE_FUNCTION_TRACER 33 select HAVE_FUNCTION_TRACER
34 select HAVE_FUNCTION_GRAPH_TRACER
35 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
32 select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64) 36 select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
33 select HAVE_ARCH_KGDB if !X86_VOYAGER 37 select HAVE_ARCH_KGDB if !X86_VOYAGER
34 select HAVE_ARCH_TRACEHOOK 38 select HAVE_ARCH_TRACEHOOK
35 select HAVE_GENERIC_DMA_COHERENT if X86_32 39 select HAVE_GENERIC_DMA_COHERENT if X86_32
36 select HAVE_EFFICIENT_UNALIGNED_ACCESS 40 select HAVE_EFFICIENT_UNALIGNED_ACCESS
41 select USER_STACKTRACE_SUPPORT
37 42
38config ARCH_DEFCONFIG 43config ARCH_DEFCONFIG
39 string 44 string
@@ -87,6 +92,10 @@ config GENERIC_IOMAP
87config GENERIC_BUG 92config GENERIC_BUG
88 def_bool y 93 def_bool y
89 depends on BUG 94 depends on BUG
95 select GENERIC_BUG_RELATIVE_POINTERS if X86_64
96
97config GENERIC_BUG_RELATIVE_POINTERS
98 bool
90 99
91config GENERIC_HWEIGHT 100config GENERIC_HWEIGHT
92 def_bool y 101 def_bool y
@@ -242,21 +251,13 @@ config X86_FIND_SMP_CONFIG
242 def_bool y 251 def_bool y
243 depends on X86_MPPARSE || X86_VOYAGER 252 depends on X86_MPPARSE || X86_VOYAGER
244 253
245if ACPI
246config X86_MPPARSE 254config X86_MPPARSE
247 def_bool y 255 bool "Enable MPS table" if ACPI
248 bool "Enable MPS table" 256 default y
249 depends on X86_LOCAL_APIC 257 depends on X86_LOCAL_APIC
250 help 258 help
251 For old smp systems that do not have proper acpi support. Newer systems 259 For old smp systems that do not have proper acpi support. Newer systems
252 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 260 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
253endif
254
255if !ACPI
256config X86_MPPARSE
257 def_bool y
258 depends on X86_LOCAL_APIC
259endif
260 261
261choice 262choice
262 prompt "Subarchitecture Type" 263 prompt "Subarchitecture Type"
@@ -367,10 +368,10 @@ config X86_RDC321X
367 as R-8610-(G). 368 as R-8610-(G).
368 If you don't have one of these chips, you should say N here. 369 If you don't have one of these chips, you should say N here.
369 370
370config SCHED_NO_NO_OMIT_FRAME_POINTER 371config SCHED_OMIT_FRAME_POINTER
371 def_bool y 372 def_bool y
372 prompt "Single-depth WCHAN output" 373 prompt "Single-depth WCHAN output"
373 depends on X86_32 374 depends on X86
374 help 375 help
375 Calculate simpler /proc/<PID>/wchan values. If this option 376 Calculate simpler /proc/<PID>/wchan values. If this option
376 is disabled then wchan values will recurse back to the 377 is disabled then wchan values will recurse back to the
@@ -465,10 +466,6 @@ config X86_CYCLONE_TIMER
465 def_bool y 466 def_bool y
466 depends on X86_GENERICARCH 467 depends on X86_GENERICARCH
467 468
468config ES7000_CLUSTERED_APIC
469 def_bool y
470 depends on SMP && X86_ES7000 && MPENTIUMIII
471
472source "arch/x86/Kconfig.cpu" 469source "arch/x86/Kconfig.cpu"
473 470
474config HPET_TIMER 471config HPET_TIMER
@@ -569,7 +566,7 @@ config AMD_IOMMU
569 566
570# need this always selected by IOMMU for the VIA workaround 567# need this always selected by IOMMU for the VIA workaround
571config SWIOTLB 568config SWIOTLB
572 bool 569 def_bool y if X86_64
573 help 570 help
574 Support for software bounce buffers used on x86-64 systems 571 Support for software bounce buffers used on x86-64 systems
575 which don't have a hardware IOMMU (e.g. the current generation 572 which don't have a hardware IOMMU (e.g. the current generation
@@ -660,6 +657,30 @@ config X86_VISWS_APIC
660 def_bool y 657 def_bool y
661 depends on X86_32 && X86_VISWS 658 depends on X86_32 && X86_VISWS
662 659
660config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
661 bool "Reroute for broken boot IRQs"
662 default n
663 depends on X86_IO_APIC
664 help
665 This option enables a workaround that fixes a source of
666 spurious interrupts. This is recommended when threaded
667 interrupt handling is used on systems where the generation of
668 superfluous "boot interrupts" cannot be disabled.
669
670 Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
671 entry in the chipset's IO-APIC is masked (as, e.g. the RT
672 kernel does during interrupt handling). On chipsets where this
673 boot IRQ generation cannot be disabled, this workaround keeps
674 the original IRQ line masked so that only the equivalent "boot
675 IRQ" is delivered to the CPUs. The workaround also tells the
676 kernel to set up the IRQ handler on the boot IRQ line. In this
677 way only one interrupt is delivered to the kernel. Otherwise
678 the spurious second interrupt may cause the kernel to bring
679 down (vital) interrupt lines.
680
681 Only affects "broken" chipsets. Interrupt sharing may be
682 increased on these systems.
683
663config X86_MCE 684config X86_MCE
664 bool "Machine Check Exception" 685 bool "Machine Check Exception"
665 depends on !X86_VOYAGER 686 depends on !X86_VOYAGER
@@ -956,24 +977,37 @@ config X86_PAE
956config ARCH_PHYS_ADDR_T_64BIT 977config ARCH_PHYS_ADDR_T_64BIT
957 def_bool X86_64 || X86_PAE 978 def_bool X86_64 || X86_PAE
958 979
980config DIRECT_GBPAGES
981 bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
982 default y
983 depends on X86_64
984 help
985 Allow the kernel linear mapping to use 1GB pages on CPUs that
986 support it. This can improve the kernel's performance a tiny bit by
987 reducing TLB pressure. If in doubt, say "Y".
988
959# Common NUMA Features 989# Common NUMA Features
960config NUMA 990config NUMA
961 bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)" 991 bool "Numa Memory Allocation and Scheduler Support"
962 depends on SMP 992 depends on SMP
963 depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL) 993 depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
964 default n if X86_PC 994 default n if X86_PC
965 default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP) 995 default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
966 help 996 help
967 Enable NUMA (Non Uniform Memory Access) support. 997 Enable NUMA (Non Uniform Memory Access) support.
998
968 The kernel will try to allocate memory used by a CPU on the 999 The kernel will try to allocate memory used by a CPU on the
969 local memory controller of the CPU and add some more 1000 local memory controller of the CPU and add some more
970 NUMA awareness to the kernel. 1001 NUMA awareness to the kernel.
971 1002
972 For 32-bit this is currently highly experimental and should be only 1003 For 64-bit this is recommended if the system is Intel Core i7
973 used for kernel development. It might also cause boot failures. 1004 (or later), AMD Opteron, or EM64T NUMA.
974 For 64-bit this is recommended on all multiprocessor Opteron systems. 1005
975 If the system is EM64T, you should say N unless your system is 1006 For 32-bit this is only needed on (rare) 32-bit-only platforms
976 EM64T NUMA. 1007 that support NUMA topologies, such as NUMAQ / Summit, or if you
1008 boot a 32-bit kernel on a 64-bit NUMA platform.
1009
1010 Otherwise, you should say N.
977 1011
978comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI" 1012comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
979 depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI) 1013 depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
@@ -1493,6 +1527,10 @@ config ARCH_ENABLE_MEMORY_HOTPLUG
1493 def_bool y 1527 def_bool y
1494 depends on X86_64 || (X86_32 && HIGHMEM) 1528 depends on X86_64 || (X86_32 && HIGHMEM)
1495 1529
1530config ARCH_ENABLE_MEMORY_HOTREMOVE
1531 def_bool y
1532 depends on MEMORY_HOTPLUG
1533
1496config HAVE_ARCH_EARLY_PFN_TO_NID 1534config HAVE_ARCH_EARLY_PFN_TO_NID
1497 def_bool X86_64 1535 def_bool X86_64
1498 depends on NUMA 1536 depends on NUMA
@@ -1632,13 +1670,6 @@ config APM_ALLOW_INTS
1632 many of the newer IBM Thinkpads. If you experience hangs when you 1670 many of the newer IBM Thinkpads. If you experience hangs when you
1633 suspend, try setting this to Y. Otherwise, say N. 1671 suspend, try setting this to Y. Otherwise, say N.
1634 1672
1635config APM_REAL_MODE_POWER_OFF
1636 bool "Use real mode APM BIOS call to power off"
1637 help
1638 Use real mode APM BIOS calls to switch off the computer. This is
1639 a work-around for a number of buggy BIOSes. Switch this option on if
1640 your computer crashes instead of powering off properly.
1641
1642endif # APM 1673endif # APM
1643 1674
1644source "arch/x86/kernel/cpu/cpufreq/Kconfig" 1675source "arch/x86/kernel/cpu/cpufreq/Kconfig"
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index b815664fe370..85a78575956c 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -515,6 +515,7 @@ config CPU_SUP_UMC_32
515config X86_DS 515config X86_DS
516 def_bool X86_PTRACE_BTS 516 def_bool X86_PTRACE_BTS
517 depends on X86_DEBUGCTLMSR 517 depends on X86_DEBUGCTLMSR
518 select HAVE_HW_BRANCH_TRACER
518 519
519config X86_PTRACE_BTS 520config X86_PTRACE_BTS
520 bool "Branch Trace Store" 521 bool "Branch Trace Store"
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 2a3dfbd5e677..10d6cc3fd052 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -114,18 +114,6 @@ config DEBUG_RODATA
114 data. This is recommended so that we can catch kernel bugs sooner. 114 data. This is recommended so that we can catch kernel bugs sooner.
115 If in doubt, say "Y". 115 If in doubt, say "Y".
116 116
117config DIRECT_GBPAGES
118 bool "Enable gbpages-mapped kernel pagetables"
119 depends on DEBUG_KERNEL && EXPERIMENTAL && X86_64
120 help
121 Enable gigabyte pages support (if the CPU supports it). This can
122 improve the kernel's performance a tiny bit by reducing TLB
123 pressure.
124
125 This is experimental code.
126
127 If in doubt, say "N".
128
129config DEBUG_RODATA_TEST 117config DEBUG_RODATA_TEST
130 bool "Testcase for the DEBUG_RODATA feature" 118 bool "Testcase for the DEBUG_RODATA feature"
131 depends on DEBUG_RODATA 119 depends on DEBUG_RODATA
@@ -186,14 +174,10 @@ config IOMMU_LEAK
186 Add a simple leak tracer to the IOMMU code. This is useful when you 174 Add a simple leak tracer to the IOMMU code. This is useful when you
187 are debugging a buggy device driver that leaks IOMMU mappings. 175 are debugging a buggy device driver that leaks IOMMU mappings.
188 176
189config MMIOTRACE_HOOKS
190 bool
191
192config MMIOTRACE 177config MMIOTRACE
193 bool "Memory mapped IO tracing" 178 bool "Memory mapped IO tracing"
194 depends on DEBUG_KERNEL && PCI 179 depends on DEBUG_KERNEL && PCI
195 select TRACING 180 select TRACING
196 select MMIOTRACE_HOOKS
197 help 181 help
198 Mmiotrace traces Memory Mapped I/O access and is meant for 182 Mmiotrace traces Memory Mapped I/O access and is meant for
199 debugging and reverse engineering. It is called from the ioremap 183 debugging and reverse engineering. It is called from the ioremap
@@ -307,10 +291,10 @@ config OPTIMIZE_INLINING
307 developers have marked 'inline'. Doing so takes away freedom from gcc to 291 developers have marked 'inline'. Doing so takes away freedom from gcc to
308 do what it thinks is best, which is desirable for the gcc 3.x series of 292 do what it thinks is best, which is desirable for the gcc 3.x series of
309 compilers. The gcc 4.x series have a rewritten inlining algorithm and 293 compilers. The gcc 4.x series have a rewritten inlining algorithm and
310 disabling this option will generate a smaller kernel there. Hopefully 294 enabling this option will generate a smaller kernel there. Hopefully
311 this algorithm is so good that allowing gcc4 to make the decision can 295 this algorithm is so good that allowing gcc 4.x and above to make the
312 become the default in the future, until then this option is there to 296 decision will become the default in the future. Until then this option
313 test gcc for this. 297 is there to test gcc for this.
314 298
315 If unsure, say N. 299 If unsure, say N.
316 300
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c
index b939cb476dec..5d4742ed4aa2 100644
--- a/arch/x86/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
@@ -34,7 +34,7 @@ static struct mode_info cga_modes[] = {
34 { VIDEO_80x25, 80, 25, 0 }, 34 { VIDEO_80x25, 80, 25, 0 },
35}; 35};
36 36
37__videocard video_vga; 37static __videocard video_vga;
38 38
39/* Set basic 80x25 mode */ 39/* Set basic 80x25 mode */
40static u8 vga_set_basic_mode(void) 40static u8 vga_set_basic_mode(void)
@@ -259,7 +259,7 @@ static int vga_probe(void)
259 return mode_count[adapter]; 259 return mode_count[adapter];
260} 260}
261 261
262__videocard video_vga = { 262static __videocard video_vga = {
263 .card_name = "VGA", 263 .card_name = "VGA",
264 .probe = vga_probe, 264 .probe = vga_probe,
265 .set_mode = vga_set_mode, 265 .set_mode = vga_set_mode,
diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
index 83598b23093a..3bef2c1febe9 100644
--- a/arch/x86/boot/video.c
+++ b/arch/x86/boot/video.c
@@ -226,7 +226,7 @@ static unsigned int mode_menu(void)
226 226
227#ifdef CONFIG_VIDEO_RETAIN 227#ifdef CONFIG_VIDEO_RETAIN
228/* Save screen content to the heap */ 228/* Save screen content to the heap */
229struct saved_screen { 229static struct saved_screen {
230 int x, y; 230 int x, y;
231 int curx, cury; 231 int curx, cury;
232 u16 *data; 232 u16 *data;
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 13b8c86ae985..b30a08ed8eb4 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -77,7 +77,7 @@ CONFIG_AUDIT=y
77CONFIG_AUDITSYSCALL=y 77CONFIG_AUDITSYSCALL=y
78CONFIG_AUDIT_TREE=y 78CONFIG_AUDIT_TREE=y
79# CONFIG_IKCONFIG is not set 79# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=17 80CONFIG_LOG_BUF_SHIFT=18
81CONFIG_CGROUPS=y 81CONFIG_CGROUPS=y
82# CONFIG_CGROUP_DEBUG is not set 82# CONFIG_CGROUP_DEBUG is not set
83CONFIG_CGROUP_NS=y 83CONFIG_CGROUP_NS=y
@@ -298,7 +298,7 @@ CONFIG_KEXEC=y
298CONFIG_CRASH_DUMP=y 298CONFIG_CRASH_DUMP=y
299# CONFIG_KEXEC_JUMP is not set 299# CONFIG_KEXEC_JUMP is not set
300CONFIG_PHYSICAL_START=0x1000000 300CONFIG_PHYSICAL_START=0x1000000
301CONFIG_RELOCATABLE=y 301# CONFIG_RELOCATABLE is not set
302CONFIG_PHYSICAL_ALIGN=0x200000 302CONFIG_PHYSICAL_ALIGN=0x200000
303CONFIG_HOTPLUG_CPU=y 303CONFIG_HOTPLUG_CPU=y
304# CONFIG_COMPAT_VDSO is not set 304# CONFIG_COMPAT_VDSO is not set
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index f0a03d7a7d63..0e7dbc0a3e46 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -77,7 +77,7 @@ CONFIG_AUDIT=y
77CONFIG_AUDITSYSCALL=y 77CONFIG_AUDITSYSCALL=y
78CONFIG_AUDIT_TREE=y 78CONFIG_AUDIT_TREE=y
79# CONFIG_IKCONFIG is not set 79# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=17 80CONFIG_LOG_BUF_SHIFT=18
81CONFIG_CGROUPS=y 81CONFIG_CGROUPS=y
82# CONFIG_CGROUP_DEBUG is not set 82# CONFIG_CGROUP_DEBUG is not set
83CONFIG_CGROUP_NS=y 83CONFIG_CGROUP_NS=y
@@ -298,7 +298,7 @@ CONFIG_SCHED_HRTICK=y
298CONFIG_KEXEC=y 298CONFIG_KEXEC=y
299CONFIG_CRASH_DUMP=y 299CONFIG_CRASH_DUMP=y
300CONFIG_PHYSICAL_START=0x1000000 300CONFIG_PHYSICAL_START=0x1000000
301CONFIG_RELOCATABLE=y 301# CONFIG_RELOCATABLE is not set
302CONFIG_PHYSICAL_ALIGN=0x200000 302CONFIG_PHYSICAL_ALIGN=0x200000
303CONFIG_HOTPLUG_CPU=y 303CONFIG_HOTPLUG_CPU=y
304# CONFIG_COMPAT_VDSO is not set 304# CONFIG_COMPAT_VDSO is not set
diff --git a/arch/x86/crypto/crc32c-intel.c b/arch/x86/crypto/crc32c-intel.c
index 070afc5b6c94..b9d00261703c 100644
--- a/arch/x86/crypto/crc32c-intel.c
+++ b/arch/x86/crypto/crc32c-intel.c
@@ -6,13 +6,22 @@
6 * Intel(R) 64 and IA-32 Architectures Software Developer's Manual 6 * Intel(R) 64 and IA-32 Architectures Software Developer's Manual
7 * Volume 2A: Instruction Set Reference, A-M 7 * Volume 2A: Instruction Set Reference, A-M
8 * 8 *
9 * Copyright (c) 2008 Austin Zhang <austin_zhang@linux.intel.com> 9 * Copyright (C) 2008 Intel Corporation
10 * Copyright (c) 2008 Kent Liu <kent.liu@intel.com> 10 * Authors: Austin Zhang <austin_zhang@linux.intel.com>
11 * Kent Liu <kent.liu@intel.com>
11 * 12 *
12 * This program is free software; you can redistribute it and/or modify it 13 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free 14 * under the terms and conditions of the GNU General Public License,
14 * Software Foundation; either version 2 of the License, or (at your option) 15 * version 2, as published by the Free Software Foundation.
15 * any later version. 16 *
17 * This program is distributed in the hope it will be useful, but WITHOUT
18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
20 * more details.
21 *
22 * You should have received a copy of the GNU General Public License along with
23 * this program; if not, write to the Free Software Foundation, Inc.,
24 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16 * 25 *
17 */ 26 */
18#include <linux/init.h> 27#include <linux/init.h>
@@ -75,99 +84,92 @@ static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len
75 * If your algorithm starts with ~0, then XOR with ~0 before you set 84 * If your algorithm starts with ~0, then XOR with ~0 before you set
76 * the seed. 85 * the seed.
77 */ 86 */
78static int crc32c_intel_setkey(struct crypto_ahash *hash, const u8 *key, 87static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key,
79 unsigned int keylen) 88 unsigned int keylen)
80{ 89{
81 u32 *mctx = crypto_ahash_ctx(hash); 90 u32 *mctx = crypto_shash_ctx(hash);
82 91
83 if (keylen != sizeof(u32)) { 92 if (keylen != sizeof(u32)) {
84 crypto_ahash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN); 93 crypto_shash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
85 return -EINVAL; 94 return -EINVAL;
86 } 95 }
87 *mctx = le32_to_cpup((__le32 *)key); 96 *mctx = le32_to_cpup((__le32 *)key);
88 return 0; 97 return 0;
89} 98}
90 99
91static int crc32c_intel_init(struct ahash_request *req) 100static int crc32c_intel_init(struct shash_desc *desc)
92{ 101{
93 u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req)); 102 u32 *mctx = crypto_shash_ctx(desc->tfm);
94 u32 *crcp = ahash_request_ctx(req); 103 u32 *crcp = shash_desc_ctx(desc);
95 104
96 *crcp = *mctx; 105 *crcp = *mctx;
97 106
98 return 0; 107 return 0;
99} 108}
100 109
101static int crc32c_intel_update(struct ahash_request *req) 110static int crc32c_intel_update(struct shash_desc *desc, const u8 *data,
111 unsigned int len)
102{ 112{
103 struct crypto_hash_walk walk; 113 u32 *crcp = shash_desc_ctx(desc);
104 u32 *crcp = ahash_request_ctx(req);
105 u32 crc = *crcp;
106 int nbytes;
107
108 for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
109 nbytes = crypto_hash_walk_done(&walk, 0))
110 crc = crc32c_intel_le_hw(crc, walk.data, nbytes);
111 114
112 *crcp = crc; 115 *crcp = crc32c_intel_le_hw(*crcp, data, len);
113 return 0; 116 return 0;
114} 117}
115 118
116static int crc32c_intel_final(struct ahash_request *req) 119static int __crc32c_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
120 u8 *out)
117{ 121{
118 u32 *crcp = ahash_request_ctx(req); 122 *(__le32 *)out = ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
119
120 *(__le32 *)req->result = ~cpu_to_le32p(crcp);
121 return 0; 123 return 0;
122} 124}
123 125
124static int crc32c_intel_digest(struct ahash_request *req) 126static int crc32c_intel_finup(struct shash_desc *desc, const u8 *data,
127 unsigned int len, u8 *out)
125{ 128{
126 struct crypto_hash_walk walk; 129 return __crc32c_intel_finup(shash_desc_ctx(desc), data, len, out);
127 u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req)); 130}
128 u32 crc = *mctx;
129 int nbytes;
130 131
131 for (nbytes = crypto_hash_walk_first(req, &walk); nbytes; 132static int crc32c_intel_final(struct shash_desc *desc, u8 *out)
132 nbytes = crypto_hash_walk_done(&walk, 0)) 133{
133 crc = crc32c_intel_le_hw(crc, walk.data, nbytes); 134 u32 *crcp = shash_desc_ctx(desc);
134 135
135 *(__le32 *)req->result = ~cpu_to_le32(crc); 136 *(__le32 *)out = ~cpu_to_le32p(crcp);
136 return 0; 137 return 0;
137} 138}
138 139
140static int crc32c_intel_digest(struct shash_desc *desc, const u8 *data,
141 unsigned int len, u8 *out)
142{
143 return __crc32c_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
144 out);
145}
146
139static int crc32c_intel_cra_init(struct crypto_tfm *tfm) 147static int crc32c_intel_cra_init(struct crypto_tfm *tfm)
140{ 148{
141 u32 *key = crypto_tfm_ctx(tfm); 149 u32 *key = crypto_tfm_ctx(tfm);
142 150
143 *key = ~0; 151 *key = ~0;
144 152
145 tfm->crt_ahash.reqsize = sizeof(u32);
146
147 return 0; 153 return 0;
148} 154}
149 155
150static struct crypto_alg alg = { 156static struct shash_alg alg = {
151 .cra_name = "crc32c", 157 .setkey = crc32c_intel_setkey,
152 .cra_driver_name = "crc32c-intel", 158 .init = crc32c_intel_init,
153 .cra_priority = 200, 159 .update = crc32c_intel_update,
154 .cra_flags = CRYPTO_ALG_TYPE_AHASH, 160 .final = crc32c_intel_final,
155 .cra_blocksize = CHKSUM_BLOCK_SIZE, 161 .finup = crc32c_intel_finup,
156 .cra_alignmask = 3, 162 .digest = crc32c_intel_digest,
157 .cra_ctxsize = sizeof(u32), 163 .descsize = sizeof(u32),
158 .cra_module = THIS_MODULE, 164 .digestsize = CHKSUM_DIGEST_SIZE,
159 .cra_list = LIST_HEAD_INIT(alg.cra_list), 165 .base = {
160 .cra_init = crc32c_intel_cra_init, 166 .cra_name = "crc32c",
161 .cra_type = &crypto_ahash_type, 167 .cra_driver_name = "crc32c-intel",
162 .cra_u = { 168 .cra_priority = 200,
163 .ahash = { 169 .cra_blocksize = CHKSUM_BLOCK_SIZE,
164 .digestsize = CHKSUM_DIGEST_SIZE, 170 .cra_ctxsize = sizeof(u32),
165 .setkey = crc32c_intel_setkey, 171 .cra_module = THIS_MODULE,
166 .init = crc32c_intel_init, 172 .cra_init = crc32c_intel_cra_init,
167 .update = crc32c_intel_update,
168 .final = crc32c_intel_final,
169 .digest = crc32c_intel_digest,
170 }
171 } 173 }
172}; 174};
173 175
@@ -175,14 +177,14 @@ static struct crypto_alg alg = {
175static int __init crc32c_intel_mod_init(void) 177static int __init crc32c_intel_mod_init(void)
176{ 178{
177 if (cpu_has_xmm4_2) 179 if (cpu_has_xmm4_2)
178 return crypto_register_alg(&alg); 180 return crypto_register_shash(&alg);
179 else 181 else
180 return -ENODEV; 182 return -ENODEV;
181} 183}
182 184
183static void __exit crc32c_intel_mod_fini(void) 185static void __exit crc32c_intel_mod_fini(void)
184{ 186{
185 crypto_unregister_alg(&alg); 187 crypto_unregister_shash(&alg);
186} 188}
187 189
188module_init(crc32c_intel_mod_init); 190module_init(crc32c_intel_mod_init);
@@ -194,4 +196,3 @@ MODULE_LICENSE("GPL");
194 196
195MODULE_ALIAS("crc32c"); 197MODULE_ALIAS("crc32c");
196MODULE_ALIAS("crc32c-intel"); 198MODULE_ALIAS("crc32c-intel");
197
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 127ec3f07214..2a4d073d2cf1 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -327,7 +327,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
327 current->mm->cached_hole_size = 0; 327 current->mm->cached_hole_size = 0;
328 328
329 current->mm->mmap = NULL; 329 current->mm->mmap = NULL;
330 compute_creds(bprm); 330 install_exec_creds(bprm);
331 current->flags &= ~PF_FORKNOEXEC; 331 current->flags &= ~PF_FORKNOEXEC;
332 332
333 if (N_MAGIC(ex) == OMAGIC) { 333 if (N_MAGIC(ex) == OMAGIC) {
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index 4bc02b23674b..b195f85526e3 100644
--- a/arch/x86/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
@@ -32,6 +32,8 @@
32#include <asm/proto.h> 32#include <asm/proto.h>
33#include <asm/vdso.h> 33#include <asm/vdso.h>
34 34
35#include <asm/sigframe.h>
36
35#define DEBUG_SIG 0 37#define DEBUG_SIG 0
36 38
37#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 39#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
@@ -41,7 +43,6 @@
41 X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \ 43 X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \
42 X86_EFLAGS_CF) 44 X86_EFLAGS_CF)
43 45
44asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);
45void signal_fault(struct pt_regs *regs, void __user *frame, char *where); 46void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
46 47
47int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) 48int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
@@ -173,47 +174,28 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
173/* 174/*
174 * Do a signal return; undo the signal stack. 175 * Do a signal return; undo the signal stack.
175 */ 176 */
177#define COPY(x) { \
178 err |= __get_user(regs->x, &sc->x); \
179}
176 180
177struct sigframe 181#define COPY_SEG_CPL3(seg) { \
178{ 182 unsigned short tmp; \
179 u32 pretcode; 183 err |= __get_user(tmp, &sc->seg); \
180 int sig; 184 regs->seg = tmp | 3; \
181 struct sigcontext_ia32 sc;
182 struct _fpstate_ia32 fpstate_unused; /* look at kernel/sigframe.h */
183 unsigned int extramask[_COMPAT_NSIG_WORDS-1];
184 char retcode[8];
185 /* fp state follows here */
186};
187
188struct rt_sigframe
189{
190 u32 pretcode;
191 int sig;
192 u32 pinfo;
193 u32 puc;
194 compat_siginfo_t info;
195 struct ucontext_ia32 uc;
196 char retcode[8];
197 /* fp state follows here */
198};
199
200#define COPY(x) { \
201 unsigned int reg; \
202 err |= __get_user(reg, &sc->x); \
203 regs->x = reg; \
204} 185}
205 186
206#define RELOAD_SEG(seg,mask) \ 187#define RELOAD_SEG(seg) { \
207 { unsigned int cur; \ 188 unsigned int cur, pre; \
208 unsigned short pre; \ 189 err |= __get_user(pre, &sc->seg); \
209 err |= __get_user(pre, &sc->seg); \ 190 savesegment(seg, cur); \
210 savesegment(seg, cur); \ 191 pre |= 3; \
211 pre |= mask; \ 192 if (pre != cur) \
212 if (pre != cur) loadsegment(seg, pre); } 193 loadsegment(seg, pre); \
194}
213 195
214static int ia32_restore_sigcontext(struct pt_regs *regs, 196static int ia32_restore_sigcontext(struct pt_regs *regs,
215 struct sigcontext_ia32 __user *sc, 197 struct sigcontext_ia32 __user *sc,
216 unsigned int *peax) 198 unsigned int *pax)
217{ 199{
218 unsigned int tmpflags, gs, oldgs, err = 0; 200 unsigned int tmpflags, gs, oldgs, err = 0;
219 void __user *buf; 201 void __user *buf;
@@ -240,18 +222,16 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
240 if (gs != oldgs) 222 if (gs != oldgs)
241 load_gs_index(gs); 223 load_gs_index(gs);
242 224
243 RELOAD_SEG(fs, 3); 225 RELOAD_SEG(fs);
244 RELOAD_SEG(ds, 3); 226 RELOAD_SEG(ds);
245 RELOAD_SEG(es, 3); 227 RELOAD_SEG(es);
246 228
247 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); 229 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
248 COPY(dx); COPY(cx); COPY(ip); 230 COPY(dx); COPY(cx); COPY(ip);
249 /* Don't touch extended registers */ 231 /* Don't touch extended registers */
250 232
251 err |= __get_user(regs->cs, &sc->cs); 233 COPY_SEG_CPL3(cs);
252 regs->cs |= 3; 234 COPY_SEG_CPL3(ss);
253 err |= __get_user(regs->ss, &sc->ss);
254 regs->ss |= 3;
255 235
256 err |= __get_user(tmpflags, &sc->flags); 236 err |= __get_user(tmpflags, &sc->flags);
257 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); 237 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
@@ -262,15 +242,13 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
262 buf = compat_ptr(tmp); 242 buf = compat_ptr(tmp);
263 err |= restore_i387_xstate_ia32(buf); 243 err |= restore_i387_xstate_ia32(buf);
264 244
265 err |= __get_user(tmp, &sc->ax); 245 err |= __get_user(*pax, &sc->ax);
266 *peax = tmp;
267
268 return err; 246 return err;
269} 247}
270 248
271asmlinkage long sys32_sigreturn(struct pt_regs *regs) 249asmlinkage long sys32_sigreturn(struct pt_regs *regs)
272{ 250{
273 struct sigframe __user *frame = (struct sigframe __user *)(regs->sp-8); 251 struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(regs->sp-8);
274 sigset_t set; 252 sigset_t set;
275 unsigned int ax; 253 unsigned int ax;
276 254
@@ -300,12 +278,12 @@ badframe:
300 278
301asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs) 279asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs)
302{ 280{
303 struct rt_sigframe __user *frame; 281 struct rt_sigframe_ia32 __user *frame;
304 sigset_t set; 282 sigset_t set;
305 unsigned int ax; 283 unsigned int ax;
306 struct pt_regs tregs; 284 struct pt_regs tregs;
307 285
308 frame = (struct rt_sigframe __user *)(regs->sp - 4); 286 frame = (struct rt_sigframe_ia32 __user *)(regs->sp - 4);
309 287
310 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 288 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
311 goto badframe; 289 goto badframe;
@@ -359,20 +337,15 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
359 err |= __put_user(regs->dx, &sc->dx); 337 err |= __put_user(regs->dx, &sc->dx);
360 err |= __put_user(regs->cx, &sc->cx); 338 err |= __put_user(regs->cx, &sc->cx);
361 err |= __put_user(regs->ax, &sc->ax); 339 err |= __put_user(regs->ax, &sc->ax);
362 err |= __put_user(regs->cs, &sc->cs);
363 err |= __put_user(regs->ss, &sc->ss);
364 err |= __put_user(current->thread.trap_no, &sc->trapno); 340 err |= __put_user(current->thread.trap_no, &sc->trapno);
365 err |= __put_user(current->thread.error_code, &sc->err); 341 err |= __put_user(current->thread.error_code, &sc->err);
366 err |= __put_user(regs->ip, &sc->ip); 342 err |= __put_user(regs->ip, &sc->ip);
343 err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
367 err |= __put_user(regs->flags, &sc->flags); 344 err |= __put_user(regs->flags, &sc->flags);
368 err |= __put_user(regs->sp, &sc->sp_at_signal); 345 err |= __put_user(regs->sp, &sc->sp_at_signal);
346 err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
369 347
370 tmp = save_i387_xstate_ia32(fpstate); 348 err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate);
371 if (tmp < 0)
372 err = -EFAULT;
373 else
374 err |= __put_user(ptr_to_compat(tmp ? fpstate : NULL),
375 &sc->fpstate);
376 349
377 /* non-iBCS2 extensions.. */ 350 /* non-iBCS2 extensions.. */
378 err |= __put_user(mask, &sc->oldmask); 351 err |= __put_user(mask, &sc->oldmask);
@@ -400,7 +373,7 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
400 } 373 }
401 374
402 /* This is the legacy signal stack switching. */ 375 /* This is the legacy signal stack switching. */
403 else if ((regs->ss & 0xffff) != __USER_DS && 376 else if ((regs->ss & 0xffff) != __USER32_DS &&
404 !(ka->sa.sa_flags & SA_RESTORER) && 377 !(ka->sa.sa_flags & SA_RESTORER) &&
405 ka->sa.sa_restorer) 378 ka->sa.sa_restorer)
406 sp = (unsigned long) ka->sa.sa_restorer; 379 sp = (unsigned long) ka->sa.sa_restorer;
@@ -408,6 +381,8 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
408 if (used_math()) { 381 if (used_math()) {
409 sp = sp - sig_xstate_ia32_size; 382 sp = sp - sig_xstate_ia32_size;
410 *fpstate = (struct _fpstate_ia32 *) sp; 383 *fpstate = (struct _fpstate_ia32 *) sp;
384 if (save_i387_xstate_ia32(*fpstate) < 0)
385 return (void __user *) -1L;
411 } 386 }
412 387
413 sp -= frame_size; 388 sp -= frame_size;
@@ -420,7 +395,7 @@ static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
420int ia32_setup_frame(int sig, struct k_sigaction *ka, 395int ia32_setup_frame(int sig, struct k_sigaction *ka,
421 compat_sigset_t *set, struct pt_regs *regs) 396 compat_sigset_t *set, struct pt_regs *regs)
422{ 397{
423 struct sigframe __user *frame; 398 struct sigframe_ia32 __user *frame;
424 void __user *restorer; 399 void __user *restorer;
425 int err = 0; 400 int err = 0;
426 void __user *fpstate = NULL; 401 void __user *fpstate = NULL;
@@ -430,12 +405,10 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
430 u16 poplmovl; 405 u16 poplmovl;
431 u32 val; 406 u32 val;
432 u16 int80; 407 u16 int80;
433 u16 pad;
434 } __attribute__((packed)) code = { 408 } __attribute__((packed)) code = {
435 0xb858, /* popl %eax ; movl $...,%eax */ 409 0xb858, /* popl %eax ; movl $...,%eax */
436 __NR_ia32_sigreturn, 410 __NR_ia32_sigreturn,
437 0x80cd, /* int $0x80 */ 411 0x80cd, /* int $0x80 */
438 0,
439 }; 412 };
440 413
441 frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate); 414 frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);
@@ -471,7 +444,7 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
471 * These are actually not used anymore, but left because some 444 * These are actually not used anymore, but left because some
472 * gdb versions depend on them as a marker. 445 * gdb versions depend on them as a marker.
473 */ 446 */
474 err |= __copy_to_user(frame->retcode, &code, 8); 447 err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
475 if (err) 448 if (err)
476 return -EFAULT; 449 return -EFAULT;
477 450
@@ -501,7 +474,7 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
501int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 474int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
502 compat_sigset_t *set, struct pt_regs *regs) 475 compat_sigset_t *set, struct pt_regs *regs)
503{ 476{
504 struct rt_sigframe __user *frame; 477 struct rt_sigframe_ia32 __user *frame;
505 void __user *restorer; 478 void __user *restorer;
506 int err = 0; 479 int err = 0;
507 void __user *fpstate = NULL; 480 void __user *fpstate = NULL;
@@ -511,8 +484,7 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
511 u8 movl; 484 u8 movl;
512 u32 val; 485 u32 val;
513 u16 int80; 486 u16 int80;
514 u16 pad; 487 u8 pad;
515 u8 pad2;
516 } __attribute__((packed)) code = { 488 } __attribute__((packed)) code = {
517 0xb8, 489 0xb8,
518 __NR_ia32_rt_sigreturn, 490 __NR_ia32_rt_sigreturn,
@@ -559,7 +531,7 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
559 * Not actually used anymore, but left because some gdb 531 * Not actually used anymore, but left because some gdb
560 * versions need it. 532 * versions need it.
561 */ 533 */
562 err |= __copy_to_user(frame->retcode, &code, 8); 534 err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
563 if (err) 535 if (err)
564 return -EFAULT; 536 return -EFAULT;
565 537
@@ -572,11 +544,6 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
572 regs->dx = (unsigned long) &frame->info; 544 regs->dx = (unsigned long) &frame->info;
573 regs->cx = (unsigned long) &frame->uc; 545 regs->cx = (unsigned long) &frame->uc;
574 546
575 /* Make -mregparm=3 work */
576 regs->ax = sig;
577 regs->dx = (unsigned long) &frame->info;
578 regs->cx = (unsigned long) &frame->uc;
579
580 loadsegment(ds, __USER32_DS); 547 loadsegment(ds, __USER32_DS);
581 loadsegment(es, __USER32_DS); 548 loadsegment(es, __USER32_DS);
582 549
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 3b1510b4fc57..25caa0738af5 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -193,6 +193,7 @@ extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
193static inline void lapic_shutdown(void) { } 193static inline void lapic_shutdown(void) { }
194#define local_apic_timer_c2_ok 1 194#define local_apic_timer_c2_ok 1
195static inline void init_apic_mappings(void) { } 195static inline void init_apic_mappings(void) { }
196static inline void disable_local_APIC(void) { }
196 197
197#endif /* !CONFIG_X86_LOCAL_APIC */ 198#endif /* !CONFIG_X86_LOCAL_APIC */
198 199
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 1d9543b9d358..ce547f24a1cd 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -24,8 +24,6 @@ static inline cpumask_t target_cpus(void)
24#define INT_DELIVERY_MODE (dest_Fixed) 24#define INT_DELIVERY_MODE (dest_Fixed)
25#define INT_DEST_MODE (0) /* phys delivery to target proc */ 25#define INT_DEST_MODE (0) /* phys delivery to target proc */
26#define NO_BALANCE_IRQ (0) 26#define NO_BALANCE_IRQ (0)
27#define WAKE_SECONDARY_VIA_INIT
28
29 27
30static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 28static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
31{ 29{
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 360010322711..9fa9dcdf344b 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -168,7 +168,15 @@ static inline void __change_bit(int nr, volatile unsigned long *addr)
168 */ 168 */
169static inline void change_bit(int nr, volatile unsigned long *addr) 169static inline void change_bit(int nr, volatile unsigned long *addr)
170{ 170{
171 asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr)); 171 if (IS_IMMEDIATE(nr)) {
172 asm volatile(LOCK_PREFIX "xorb %1,%0"
173 : CONST_MASK_ADDR(nr, addr)
174 : "iq" ((u8)CONST_MASK(nr)));
175 } else {
176 asm volatile(LOCK_PREFIX "btc %1,%0"
177 : BITOP_ADDR(addr)
178 : "Ir" (nr));
179 }
172} 180}
173 181
174/** 182/**
diff --git a/arch/x86/include/asm/bug.h b/arch/x86/include/asm/bug.h
index 3def2065fcea..d9cf1cd156d2 100644
--- a/arch/x86/include/asm/bug.h
+++ b/arch/x86/include/asm/bug.h
@@ -9,7 +9,7 @@
9#ifdef CONFIG_X86_32 9#ifdef CONFIG_X86_32
10# define __BUG_C0 "2:\t.long 1b, %c0\n" 10# define __BUG_C0 "2:\t.long 1b, %c0\n"
11#else 11#else
12# define __BUG_C0 "2:\t.quad 1b, %c0\n" 12# define __BUG_C0 "2:\t.long 1b - 2b, %c0 - 2b\n"
13#endif 13#endif
14 14
15#define BUG() \ 15#define BUG() \
diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/asm/byteorder.h
index e02ae2d89acf..f110ad417df3 100644
--- a/arch/x86/include/asm/byteorder.h
+++ b/arch/x86/include/asm/byteorder.h
@@ -4,26 +4,33 @@
4#include <asm/types.h> 4#include <asm/types.h>
5#include <linux/compiler.h> 5#include <linux/compiler.h>
6 6
7#ifdef __GNUC__ 7#define __LITTLE_ENDIAN
8 8
9#ifdef __i386__ 9static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
10
11static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
12{ 10{
13#ifdef CONFIG_X86_BSWAP 11#ifdef __i386__
14 asm("bswap %0" : "=r" (x) : "0" (x)); 12# ifdef CONFIG_X86_BSWAP
15#else 13 asm("bswap %0" : "=r" (val) : "0" (val));
14# else
16 asm("xchgb %b0,%h0\n\t" /* swap lower bytes */ 15 asm("xchgb %b0,%h0\n\t" /* swap lower bytes */
17 "rorl $16,%0\n\t" /* swap words */ 16 "rorl $16,%0\n\t" /* swap words */
18 "xchgb %b0,%h0" /* swap higher bytes */ 17 "xchgb %b0,%h0" /* swap higher bytes */
19 : "=q" (x) 18 : "=q" (val)
20 : "0" (x)); 19 : "0" (val));
20# endif
21
22#else /* __i386__ */
23 asm("bswapl %0"
24 : "=r" (val)
25 : "0" (val));
21#endif 26#endif
22 return x; 27 return val;
23} 28}
29#define __arch_swab32 __arch_swab32
24 30
25static inline __attribute_const__ __u64 ___arch__swab64(__u64 val) 31static inline __attribute_const__ __u64 __arch_swab64(__u64 val)
26{ 32{
33#ifdef __i386__
27 union { 34 union {
28 struct { 35 struct {
29 __u32 a; 36 __u32 a;
@@ -32,50 +39,27 @@ static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
32 __u64 u; 39 __u64 u;
33 } v; 40 } v;
34 v.u = val; 41 v.u = val;
35#ifdef CONFIG_X86_BSWAP 42# ifdef CONFIG_X86_BSWAP
36 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1" 43 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
37 : "=r" (v.s.a), "=r" (v.s.b) 44 : "=r" (v.s.a), "=r" (v.s.b)
38 : "0" (v.s.a), "1" (v.s.b)); 45 : "0" (v.s.a), "1" (v.s.b));
39#else 46# else
40 v.s.a = ___arch__swab32(v.s.a); 47 v.s.a = __arch_swab32(v.s.a);
41 v.s.b = ___arch__swab32(v.s.b); 48 v.s.b = __arch_swab32(v.s.b);
42 asm("xchgl %0,%1" 49 asm("xchgl %0,%1"
43 : "=r" (v.s.a), "=r" (v.s.b) 50 : "=r" (v.s.a), "=r" (v.s.b)
44 : "0" (v.s.a), "1" (v.s.b)); 51 : "0" (v.s.a), "1" (v.s.b));
45#endif 52# endif
46 return v.u; 53 return v.u;
47}
48
49#else /* __i386__ */ 54#else /* __i386__ */
50
51static inline __attribute_const__ __u64 ___arch__swab64(__u64 x)
52{
53 asm("bswapq %0" 55 asm("bswapq %0"
54 : "=r" (x) 56 : "=r" (val)
55 : "0" (x)); 57 : "0" (val));
56 return x; 58 return val;
57}
58
59static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
60{
61 asm("bswapl %0"
62 : "=r" (x)
63 : "0" (x));
64 return x;
65}
66
67#endif 59#endif
60}
61#define __arch_swab64 __arch_swab64
68 62
69/* Do not define swab16. Gcc is smart enough to recognize "C" version and 63#include <linux/byteorder.h>
70 convert it into rotation or exhange. */
71
72#define __arch__swab64(x) ___arch__swab64(x)
73#define __arch__swab32(x) ___arch__swab32(x)
74
75#define __BYTEORDER_HAS_U64__
76
77#endif /* __GNUC__ */
78
79#include <linux/byteorder/little_endian.h>
80 64
81#endif /* _ASM_X86_BYTEORDER_H */ 65#endif /* _ASM_X86_BYTEORDER_H */
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index cfdf8c2c5c31..ea408dcba513 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -80,7 +80,6 @@
80#define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ 80#define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */
81#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */ 81#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */
82#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ 82#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
83#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
84#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ 83#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */
85#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ 84#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */
86#define X86_FEATURE_SYSCALL32 (3*32+14) /* "" syscall in ia32 userspace */ 85#define X86_FEATURE_SYSCALL32 (3*32+14) /* "" syscall in ia32 userspace */
@@ -92,6 +91,8 @@
92#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ 91#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
93#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */ 92#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */
94#define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ 93#define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */
94#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
95#define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */
95 96
96/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 97/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
97#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ 98#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
@@ -117,6 +118,7 @@
117#define X86_FEATURE_XSAVE (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */ 118#define X86_FEATURE_XSAVE (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
118#define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */ 119#define X86_FEATURE_OSXSAVE (4*32+27) /* "" XSAVE enabled in the OS */
119#define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ 120#define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */
121#define X86_FEATURE_HYPERVISOR (4*32+31) /* Running on a hypervisor */
120 122
121/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ 123/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
122#define X86_FEATURE_XSTORE (5*32+ 2) /* "rng" RNG present (xstore) */ 124#define X86_FEATURE_XSTORE (5*32+ 2) /* "rng" RNG present (xstore) */
@@ -237,6 +239,7 @@ extern const char * const x86_power_flags[32];
237#define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2) 239#define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2)
238#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) 240#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
239#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) 241#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
242#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
240 243
241#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) 244#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
242# define cpu_has_invlpg 1 245# define cpu_has_invlpg 1
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 097794ff6b79..dc22c0733282 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -71,12 +71,10 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
71/* Make sure we keep the same behaviour */ 71/* Make sure we keep the same behaviour */
72static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 72static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
73{ 73{
74#ifdef CONFIG_X86_64
75 struct dma_mapping_ops *ops = get_dma_ops(dev); 74 struct dma_mapping_ops *ops = get_dma_ops(dev);
76 if (ops->mapping_error) 75 if (ops->mapping_error)
77 return ops->mapping_error(dev, dma_addr); 76 return ops->mapping_error(dev, dma_addr);
78 77
79#endif
80 return (dma_addr == bad_dma_address); 78 return (dma_addr == bad_dma_address);
81} 79}
82 80
diff --git a/arch/x86/include/asm/ds.h b/arch/x86/include/asm/ds.h
index a95008457ea4..a8f672ba100c 100644
--- a/arch/x86/include/asm/ds.h
+++ b/arch/x86/include/asm/ds.h
@@ -6,14 +6,13 @@
6 * precise-event based sampling (PEBS). 6 * precise-event based sampling (PEBS).
7 * 7 *
8 * It manages: 8 * It manages:
9 * - per-thread and per-cpu allocation of BTS and PEBS 9 * - DS and BTS hardware configuration
10 * - buffer memory allocation (optional) 10 * - buffer overflow handling (to be done)
11 * - buffer overflow handling
12 * - buffer access 11 * - buffer access
13 * 12 *
14 * It assumes: 13 * It does not do:
15 * - get_task_struct on all parameter tasks 14 * - security checking (is the caller allowed to trace the task)
16 * - current is allowed to trace parameter tasks 15 * - buffer allocation (memory accounting)
17 * 16 *
18 * 17 *
19 * Copyright (C) 2007-2008 Intel Corporation. 18 * Copyright (C) 2007-2008 Intel Corporation.
@@ -26,11 +25,51 @@
26 25
27#include <linux/types.h> 26#include <linux/types.h>
28#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/err.h>
29 29
30 30
31#ifdef CONFIG_X86_DS 31#ifdef CONFIG_X86_DS
32 32
33struct task_struct; 33struct task_struct;
34struct ds_context;
35struct ds_tracer;
36struct bts_tracer;
37struct pebs_tracer;
38
39typedef void (*bts_ovfl_callback_t)(struct bts_tracer *);
40typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *);
41
42
43/*
44 * A list of features plus corresponding macros to talk about them in
45 * the ds_request function's flags parameter.
46 *
47 * We use the enum to index an array of corresponding control bits;
48 * we use the macro to index a flags bit-vector.
49 */
50enum ds_feature {
51 dsf_bts = 0,
52 dsf_bts_kernel,
53#define BTS_KERNEL (1 << dsf_bts_kernel)
54 /* trace kernel-mode branches */
55
56 dsf_bts_user,
57#define BTS_USER (1 << dsf_bts_user)
58 /* trace user-mode branches */
59
60 dsf_bts_overflow,
61 dsf_bts_max,
62 dsf_pebs = dsf_bts_max,
63
64 dsf_pebs_max,
65 dsf_ctl_max = dsf_pebs_max,
66 dsf_bts_timestamps = dsf_ctl_max,
67#define BTS_TIMESTAMPS (1 << dsf_bts_timestamps)
68 /* add timestamps into BTS trace */
69
70#define BTS_USER_FLAGS (BTS_KERNEL | BTS_USER | BTS_TIMESTAMPS)
71};
72
34 73
35/* 74/*
36 * Request BTS or PEBS 75 * Request BTS or PEBS
@@ -38,163 +77,169 @@ struct task_struct;
38 * Due to alignement constraints, the actual buffer may be slightly 77 * Due to alignement constraints, the actual buffer may be slightly
39 * smaller than the requested or provided buffer. 78 * smaller than the requested or provided buffer.
40 * 79 *
41 * Returns 0 on success; -Eerrno otherwise 80 * Returns a pointer to a tracer structure on success, or
81 * ERR_PTR(errcode) on failure.
82 *
83 * The interrupt threshold is independent from the overflow callback
84 * to allow users to use their own overflow interrupt handling mechanism.
42 * 85 *
43 * task: the task to request recording for; 86 * task: the task to request recording for;
44 * NULL for per-cpu recording on the current cpu 87 * NULL for per-cpu recording on the current cpu
45 * base: the base pointer for the (non-pageable) buffer; 88 * base: the base pointer for the (non-pageable) buffer;
46 * NULL if buffer allocation requested 89 * size: the size of the provided buffer in bytes
47 * size: the size of the requested or provided buffer
48 * ovfl: pointer to a function to be called on buffer overflow; 90 * ovfl: pointer to a function to be called on buffer overflow;
49 * NULL if cyclic buffer requested 91 * NULL if cyclic buffer requested
92 * th: the interrupt threshold in records from the end of the buffer;
93 * -1 if no interrupt threshold is requested.
94 * flags: a bit-mask of the above flags
50 */ 95 */
51typedef void (*ds_ovfl_callback_t)(struct task_struct *); 96extern struct bts_tracer *ds_request_bts(struct task_struct *task,
52extern int ds_request_bts(struct task_struct *task, void *base, size_t size, 97 void *base, size_t size,
53 ds_ovfl_callback_t ovfl); 98 bts_ovfl_callback_t ovfl,
54extern int ds_request_pebs(struct task_struct *task, void *base, size_t size, 99 size_t th, unsigned int flags);
55 ds_ovfl_callback_t ovfl); 100extern struct pebs_tracer *ds_request_pebs(struct task_struct *task,
101 void *base, size_t size,
102 pebs_ovfl_callback_t ovfl,
103 size_t th, unsigned int flags);
56 104
57/* 105/*
58 * Release BTS or PEBS resources 106 * Release BTS or PEBS resources
107 * Suspend and resume BTS or PEBS tracing
59 * 108 *
60 * Frees buffers allocated on ds_request. 109 * tracer: the tracer handle returned from ds_request_~()
61 *
62 * Returns 0 on success; -Eerrno otherwise
63 *
64 * task: the task to release resources for;
65 * NULL to release resources for the current cpu
66 */ 110 */
67extern int ds_release_bts(struct task_struct *task); 111extern void ds_release_bts(struct bts_tracer *tracer);
68extern int ds_release_pebs(struct task_struct *task); 112extern void ds_suspend_bts(struct bts_tracer *tracer);
113extern void ds_resume_bts(struct bts_tracer *tracer);
114extern void ds_release_pebs(struct pebs_tracer *tracer);
115extern void ds_suspend_pebs(struct pebs_tracer *tracer);
116extern void ds_resume_pebs(struct pebs_tracer *tracer);
69 117
70/*
71 * Return the (array) index of the write pointer.
72 * (assuming an array of BTS/PEBS records)
73 *
74 * Returns -Eerrno on error
75 *
76 * task: the task to access;
77 * NULL to access the current cpu
78 * pos (out): if not NULL, will hold the result
79 */
80extern int ds_get_bts_index(struct task_struct *task, size_t *pos);
81extern int ds_get_pebs_index(struct task_struct *task, size_t *pos);
82 118
83/* 119/*
84 * Return the (array) index one record beyond the end of the array. 120 * The raw DS buffer state as it is used for BTS and PEBS recording.
85 * (assuming an array of BTS/PEBS records)
86 * 121 *
87 * Returns -Eerrno on error 122 * This is the low-level, arch-dependent interface for working
88 * 123 * directly on the raw trace data.
89 * task: the task to access;
90 * NULL to access the current cpu
91 * pos (out): if not NULL, will hold the result
92 */ 124 */
93extern int ds_get_bts_end(struct task_struct *task, size_t *pos); 125struct ds_trace {
94extern int ds_get_pebs_end(struct task_struct *task, size_t *pos); 126 /* the number of bts/pebs records */
127 size_t n;
128 /* the size of a bts/pebs record in bytes */
129 size_t size;
130 /* pointers into the raw buffer:
131 - to the first entry */
132 void *begin;
133 /* - one beyond the last entry */
134 void *end;
135 /* - one beyond the newest entry */
136 void *top;
137 /* - the interrupt threshold */
138 void *ith;
139 /* flags given on ds_request() */
140 unsigned int flags;
141};
95 142
96/* 143/*
97 * Provide a pointer to the BTS/PEBS record at parameter index. 144 * An arch-independent view on branch trace data.
98 * (assuming an array of BTS/PEBS records)
99 *
100 * The pointer points directly into the buffer. The user is
101 * responsible for copying the record.
102 *
103 * Returns the size of a single record on success; -Eerrno on error
104 *
105 * task: the task to access;
106 * NULL to access the current cpu
107 * index: the index of the requested record
108 * record (out): pointer to the requested record
109 */ 145 */
110extern int ds_access_bts(struct task_struct *task, 146enum bts_qualifier {
111 size_t index, const void **record); 147 bts_invalid,
112extern int ds_access_pebs(struct task_struct *task, 148#define BTS_INVALID bts_invalid
113 size_t index, const void **record); 149
150 bts_branch,
151#define BTS_BRANCH bts_branch
152
153 bts_task_arrives,
154#define BTS_TASK_ARRIVES bts_task_arrives
155
156 bts_task_departs,
157#define BTS_TASK_DEPARTS bts_task_departs
158
159 bts_qual_bit_size = 4,
160 bts_qual_max = (1 << bts_qual_bit_size),
161};
162
163struct bts_struct {
164 __u64 qualifier;
165 union {
166 /* BTS_BRANCH */
167 struct {
168 __u64 from;
169 __u64 to;
170 } lbr;
171 /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */
172 struct {
173 __u64 jiffies;
174 pid_t pid;
175 } timestamp;
176 } variant;
177};
114 178
115/*
116 * Write one or more BTS/PEBS records at the write pointer index and
117 * advance the write pointer.
118 *
119 * If size is not a multiple of the record size, trailing bytes are
120 * zeroed out.
121 *
122 * May result in one or more overflow notifications.
123 *
124 * If called during overflow handling, that is, with index >=
125 * interrupt threshold, the write will wrap around.
126 *
127 * An overflow notification is given if and when the interrupt
128 * threshold is reached during or after the write.
129 *
130 * Returns the number of bytes written or -Eerrno.
131 *
132 * task: the task to access;
133 * NULL to access the current cpu
134 * buffer: the buffer to write
135 * size: the size of the buffer
136 */
137extern int ds_write_bts(struct task_struct *task,
138 const void *buffer, size_t size);
139extern int ds_write_pebs(struct task_struct *task,
140 const void *buffer, size_t size);
141 179
142/* 180/*
143 * Same as ds_write_bts/pebs, but omit ownership checks. 181 * The BTS state.
144 * 182 *
145 * This is needed to have some other task than the owner of the 183 * This gives access to the raw DS state and adds functions to provide
146 * BTS/PEBS buffer or the parameter task itself write into the 184 * an arch-independent view of the BTS data.
147 * respective buffer.
148 */ 185 */
149extern int ds_unchecked_write_bts(struct task_struct *task, 186struct bts_trace {
150 const void *buffer, size_t size); 187 struct ds_trace ds;
151extern int ds_unchecked_write_pebs(struct task_struct *task, 188
152 const void *buffer, size_t size); 189 int (*read)(struct bts_tracer *tracer, const void *at,
190 struct bts_struct *out);
191 int (*write)(struct bts_tracer *tracer, const struct bts_struct *in);
192};
193
153 194
154/* 195/*
155 * Reset the write pointer of the BTS/PEBS buffer. 196 * The PEBS state.
156 * 197 *
157 * Returns 0 on success; -Eerrno on error 198 * This gives access to the raw DS state and the PEBS-specific counter
158 * 199 * reset value.
159 * task: the task to access;
160 * NULL to access the current cpu
161 */ 200 */
162extern int ds_reset_bts(struct task_struct *task); 201struct pebs_trace {
163extern int ds_reset_pebs(struct task_struct *task); 202 struct ds_trace ds;
203
204 /* the PEBS reset value */
205 unsigned long long reset_value;
206};
207
164 208
165/* 209/*
166 * Clear the BTS/PEBS buffer and reset the write pointer. 210 * Read the BTS or PEBS trace.
167 * The entire buffer will be zeroed out.
168 * 211 *
169 * Returns 0 on success; -Eerrno on error 212 * Returns a view on the trace collected for the parameter tracer.
213 *
214 * The view remains valid as long as the traced task is not running or
215 * the tracer is suspended.
216 * Writes into the trace buffer are not reflected.
170 * 217 *
171 * task: the task to access; 218 * tracer: the tracer handle returned from ds_request_~()
172 * NULL to access the current cpu
173 */ 219 */
174extern int ds_clear_bts(struct task_struct *task); 220extern const struct bts_trace *ds_read_bts(struct bts_tracer *tracer);
175extern int ds_clear_pebs(struct task_struct *task); 221extern const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer);
222
176 223
177/* 224/*
178 * Provide the PEBS counter reset value. 225 * Reset the write pointer of the BTS/PEBS buffer.
179 * 226 *
180 * Returns 0 on success; -Eerrno on error 227 * Returns 0 on success; -Eerrno on error
181 * 228 *
182 * task: the task to access; 229 * tracer: the tracer handle returned from ds_request_~()
183 * NULL to access the current cpu
184 * value (out): the counter reset value
185 */ 230 */
186extern int ds_get_pebs_reset(struct task_struct *task, u64 *value); 231extern int ds_reset_bts(struct bts_tracer *tracer);
232extern int ds_reset_pebs(struct pebs_tracer *tracer);
187 233
188/* 234/*
189 * Set the PEBS counter reset value. 235 * Set the PEBS counter reset value.
190 * 236 *
191 * Returns 0 on success; -Eerrno on error 237 * Returns 0 on success; -Eerrno on error
192 * 238 *
193 * task: the task to access; 239 * tracer: the tracer handle returned from ds_request_pebs()
194 * NULL to access the current cpu
195 * value: the new counter reset value 240 * value: the new counter reset value
196 */ 241 */
197extern int ds_set_pebs_reset(struct task_struct *task, u64 value); 242extern int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value);
198 243
199/* 244/*
200 * Initialization 245 * Initialization
@@ -202,39 +247,26 @@ extern int ds_set_pebs_reset(struct task_struct *task, u64 value);
202struct cpuinfo_x86; 247struct cpuinfo_x86;
203extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *); 248extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
204 249
205
206
207/* 250/*
208 * The DS context - part of struct thread_struct. 251 * Context switch work
209 */ 252 */
210struct ds_context { 253extern void ds_switch_to(struct task_struct *prev, struct task_struct *next);
211 /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
212 unsigned char *ds;
213 /* the owner of the BTS and PEBS configuration, respectively */
214 struct task_struct *owner[2];
215 /* buffer overflow notification function for BTS and PEBS */
216 ds_ovfl_callback_t callback[2];
217 /* the original buffer address */
218 void *buffer[2];
219 /* the number of allocated pages for on-request allocated buffers */
220 unsigned int pages[2];
221 /* use count */
222 unsigned long count;
223 /* a pointer to the context location inside the thread_struct
224 * or the per_cpu context array */
225 struct ds_context **this;
226 /* a pointer to the task owning this context, or NULL, if the
227 * context is owned by a cpu */
228 struct task_struct *task;
229};
230 254
231/* called by exit_thread() to free leftover contexts */ 255/*
232extern void ds_free(struct ds_context *context); 256 * Task clone/init and cleanup work
257 */
258extern void ds_copy_thread(struct task_struct *tsk, struct task_struct *father);
259extern void ds_exit_thread(struct task_struct *tsk);
233 260
234#else /* CONFIG_X86_DS */ 261#else /* CONFIG_X86_DS */
235 262
236struct cpuinfo_x86; 263struct cpuinfo_x86;
237static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {} 264static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {}
265static inline void ds_switch_to(struct task_struct *prev,
266 struct task_struct *next) {}
267static inline void ds_copy_thread(struct task_struct *tsk,
268 struct task_struct *father) {}
269static inline void ds_exit_thread(struct task_struct *tsk) {}
238 270
239#endif /* CONFIG_X86_DS */ 271#endif /* CONFIG_X86_DS */
240#endif /* _ASM_X86_DS_H */ 272#endif /* _ASM_X86_DS_H */
diff --git a/arch/x86/include/asm/dwarf2.h b/arch/x86/include/asm/dwarf2.h
index 804b6e6be929..3afc5e87cfdd 100644
--- a/arch/x86/include/asm/dwarf2.h
+++ b/arch/x86/include/asm/dwarf2.h
@@ -6,56 +6,91 @@
6#endif 6#endif
7 7
8/* 8/*
9 Macros for dwarf2 CFI unwind table entries. 9 * Macros for dwarf2 CFI unwind table entries.
10 See "as.info" for details on these pseudo ops. Unfortunately 10 * See "as.info" for details on these pseudo ops. Unfortunately
11 they are only supported in very new binutils, so define them 11 * they are only supported in very new binutils, so define them
12 away for older version. 12 * away for older version.
13 */ 13 */
14 14
15#ifdef CONFIG_AS_CFI 15#ifdef CONFIG_AS_CFI
16 16
17#define CFI_STARTPROC .cfi_startproc 17#define CFI_STARTPROC .cfi_startproc
18#define CFI_ENDPROC .cfi_endproc 18#define CFI_ENDPROC .cfi_endproc
19#define CFI_DEF_CFA .cfi_def_cfa 19#define CFI_DEF_CFA .cfi_def_cfa
20#define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register 20#define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register
21#define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset 21#define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset
22#define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset 22#define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset
23#define CFI_OFFSET .cfi_offset 23#define CFI_OFFSET .cfi_offset
24#define CFI_REL_OFFSET .cfi_rel_offset 24#define CFI_REL_OFFSET .cfi_rel_offset
25#define CFI_REGISTER .cfi_register 25#define CFI_REGISTER .cfi_register
26#define CFI_RESTORE .cfi_restore 26#define CFI_RESTORE .cfi_restore
27#define CFI_REMEMBER_STATE .cfi_remember_state 27#define CFI_REMEMBER_STATE .cfi_remember_state
28#define CFI_RESTORE_STATE .cfi_restore_state 28#define CFI_RESTORE_STATE .cfi_restore_state
29#define CFI_UNDEFINED .cfi_undefined 29#define CFI_UNDEFINED .cfi_undefined
30 30
31#ifdef CONFIG_AS_CFI_SIGNAL_FRAME 31#ifdef CONFIG_AS_CFI_SIGNAL_FRAME
32#define CFI_SIGNAL_FRAME .cfi_signal_frame 32#define CFI_SIGNAL_FRAME .cfi_signal_frame
33#else 33#else
34#define CFI_SIGNAL_FRAME 34#define CFI_SIGNAL_FRAME
35#endif 35#endif
36 36
37#else 37#else
38 38
39/* Due to the structure of pre-exisiting code, don't use assembler line 39/*
40 comment character # to ignore the arguments. Instead, use a dummy macro. */ 40 * Due to the structure of pre-exisiting code, don't use assembler line
41 * comment character # to ignore the arguments. Instead, use a dummy macro.
42 */
41.macro cfi_ignore a=0, b=0, c=0, d=0 43.macro cfi_ignore a=0, b=0, c=0, d=0
42.endm 44.endm
43 45
44#define CFI_STARTPROC cfi_ignore 46#define CFI_STARTPROC cfi_ignore
45#define CFI_ENDPROC cfi_ignore 47#define CFI_ENDPROC cfi_ignore
46#define CFI_DEF_CFA cfi_ignore 48#define CFI_DEF_CFA cfi_ignore
47#define CFI_DEF_CFA_REGISTER cfi_ignore 49#define CFI_DEF_CFA_REGISTER cfi_ignore
48#define CFI_DEF_CFA_OFFSET cfi_ignore 50#define CFI_DEF_CFA_OFFSET cfi_ignore
49#define CFI_ADJUST_CFA_OFFSET cfi_ignore 51#define CFI_ADJUST_CFA_OFFSET cfi_ignore
50#define CFI_OFFSET cfi_ignore 52#define CFI_OFFSET cfi_ignore
51#define CFI_REL_OFFSET cfi_ignore 53#define CFI_REL_OFFSET cfi_ignore
52#define CFI_REGISTER cfi_ignore 54#define CFI_REGISTER cfi_ignore
53#define CFI_RESTORE cfi_ignore 55#define CFI_RESTORE cfi_ignore
54#define CFI_REMEMBER_STATE cfi_ignore 56#define CFI_REMEMBER_STATE cfi_ignore
55#define CFI_RESTORE_STATE cfi_ignore 57#define CFI_RESTORE_STATE cfi_ignore
56#define CFI_UNDEFINED cfi_ignore 58#define CFI_UNDEFINED cfi_ignore
57#define CFI_SIGNAL_FRAME cfi_ignore 59#define CFI_SIGNAL_FRAME cfi_ignore
58 60
59#endif 61#endif
60 62
63/*
64 * An attempt to make CFI annotations more or less
65 * correct and shorter. It is implied that you know
66 * what you're doing if you use them.
67 */
68#ifdef __ASSEMBLY__
69#ifdef CONFIG_X86_64
70 .macro pushq_cfi reg
71 pushq \reg
72 CFI_ADJUST_CFA_OFFSET 8
73 .endm
74
75 .macro popq_cfi reg
76 popq \reg
77 CFI_ADJUST_CFA_OFFSET -8
78 .endm
79
80 .macro movq_cfi reg offset=0
81 movq %\reg, \offset(%rsp)
82 CFI_REL_OFFSET \reg, \offset
83 .endm
84
85 .macro movq_cfi_restore offset reg
86 movq \offset(%rsp), %\reg
87 CFI_RESTORE \reg
88 .endm
89#else /*!CONFIG_X86_64*/
90
91 /* 32bit defenitions are missed yet */
92
93#endif /*!CONFIG_X86_64*/
94#endif /*__ASSEMBLY__*/
95
61#endif /* _ASM_X86_DWARF2_H */ 96#endif /* _ASM_X86_DWARF2_H */
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 40ca1bea7916..f51a3ddde01a 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -325,7 +325,7 @@ struct linux_binprm;
325 325
326#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 326#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
327extern int arch_setup_additional_pages(struct linux_binprm *bprm, 327extern int arch_setup_additional_pages(struct linux_binprm *bprm,
328 int executable_stack); 328 int uses_interp);
329 329
330extern int syscall32_setup_pages(struct linux_binprm *, int exstack); 330extern int syscall32_setup_pages(struct linux_binprm *, int exstack);
331#define compat_arch_setup_additional_pages syscall32_setup_pages 331#define compat_arch_setup_additional_pages syscall32_setup_pages
diff --git a/arch/x86/include/asm/emergency-restart.h b/arch/x86/include/asm/emergency-restart.h
index 94826cf87455..cc70c1c78ca4 100644
--- a/arch/x86/include/asm/emergency-restart.h
+++ b/arch/x86/include/asm/emergency-restart.h
@@ -8,7 +8,9 @@ enum reboot_type {
8 BOOT_BIOS = 'b', 8 BOOT_BIOS = 'b',
9#endif 9#endif
10 BOOT_ACPI = 'a', 10 BOOT_ACPI = 'a',
11 BOOT_EFI = 'e' 11 BOOT_EFI = 'e',
12 BOOT_CF9 = 'p',
13 BOOT_CF9_COND = 'q',
12}; 14};
13 15
14extern enum reboot_type reboot_type; 16extern enum reboot_type reboot_type;
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 380f0b4f17ed..e24ef876915f 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -9,31 +9,27 @@ static inline int apic_id_registered(void)
9 return (1); 9 return (1);
10} 10}
11 11
12static inline cpumask_t target_cpus(void) 12static inline cpumask_t target_cpus_cluster(void)
13{ 13{
14#if defined CONFIG_ES7000_CLUSTERED_APIC
15 return CPU_MASK_ALL; 14 return CPU_MASK_ALL;
16#else 15}
16
17static inline cpumask_t target_cpus(void)
18{
17 return cpumask_of_cpu(smp_processor_id()); 19 return cpumask_of_cpu(smp_processor_id());
18#endif
19} 20}
20 21
21#if defined CONFIG_ES7000_CLUSTERED_APIC 22#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
22#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 23#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
23#define INT_DELIVERY_MODE (dest_LowestPrio) 24#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
24#define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */ 25#define NO_BALANCE_IRQ_CLUSTER (1)
25#define NO_BALANCE_IRQ (1) 26
26#undef WAKE_SECONDARY_VIA_INIT
27#define WAKE_SECONDARY_VIA_MIP
28#else
29#define APIC_DFR_VALUE (APIC_DFR_FLAT) 27#define APIC_DFR_VALUE (APIC_DFR_FLAT)
30#define INT_DELIVERY_MODE (dest_Fixed) 28#define INT_DELIVERY_MODE (dest_Fixed)
31#define INT_DEST_MODE (0) /* phys delivery to target procs */ 29#define INT_DEST_MODE (0) /* phys delivery to target procs */
32#define NO_BALANCE_IRQ (0) 30#define NO_BALANCE_IRQ (0)
33#undef APIC_DEST_LOGICAL 31#undef APIC_DEST_LOGICAL
34#define APIC_DEST_LOGICAL 0x0 32#define APIC_DEST_LOGICAL 0x0
35#define WAKE_SECONDARY_VIA_INIT
36#endif
37 33
38static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 34static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
39{ 35{
@@ -60,6 +56,16 @@ static inline unsigned long calculate_ldr(int cpu)
60 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 56 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
61 * document number 292116). So here it goes... 57 * document number 292116). So here it goes...
62 */ 58 */
59static inline void init_apic_ldr_cluster(void)
60{
61 unsigned long val;
62 int cpu = smp_processor_id();
63
64 apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
65 val = calculate_ldr(cpu);
66 apic_write(APIC_LDR, val);
67}
68
63static inline void init_apic_ldr(void) 69static inline void init_apic_ldr(void)
64{ 70{
65 unsigned long val; 71 unsigned long val;
@@ -70,10 +76,6 @@ static inline void init_apic_ldr(void)
70 apic_write(APIC_LDR, val); 76 apic_write(APIC_LDR, val);
71} 77}
72 78
73#ifndef CONFIG_X86_GENERICARCH
74extern void enable_apic_mode(void);
75#endif
76
77extern int apic_version [MAX_APICS]; 79extern int apic_version [MAX_APICS];
78static inline void setup_apic_routing(void) 80static inline void setup_apic_routing(void)
79{ 81{
@@ -144,7 +146,7 @@ static inline int check_phys_apicid_present(int cpu_physical_apicid)
144 return (1); 146 return (1);
145} 147}
146 148
147static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 149static inline unsigned int cpu_mask_to_apicid_cluster(cpumask_t cpumask)
148{ 150{
149 int num_bits_set; 151 int num_bits_set;
150 int cpus_found = 0; 152 int cpus_found = 0;
@@ -154,11 +156,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
154 num_bits_set = cpus_weight(cpumask); 156 num_bits_set = cpus_weight(cpumask);
155 /* Return id to all */ 157 /* Return id to all */
156 if (num_bits_set == NR_CPUS) 158 if (num_bits_set == NR_CPUS)
157#if defined CONFIG_ES7000_CLUSTERED_APIC
158 return 0xFF; 159 return 0xFF;
159#else
160 return cpu_to_logical_apicid(0);
161#endif
162 /* 160 /*
163 * The cpus in the mask must all be on the apic cluster. If are not 161 * The cpus in the mask must all be on the apic cluster. If are not
164 * on the same apicid cluster return default value of TARGET_CPUS. 162 * on the same apicid cluster return default value of TARGET_CPUS.
@@ -171,11 +169,40 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
171 if (apicid_cluster(apicid) != 169 if (apicid_cluster(apicid) !=
172 apicid_cluster(new_apicid)){ 170 apicid_cluster(new_apicid)){
173 printk ("%s: Not a valid mask!\n", __func__); 171 printk ("%s: Not a valid mask!\n", __func__);
174#if defined CONFIG_ES7000_CLUSTERED_APIC
175 return 0xFF; 172 return 0xFF;
176#else 173 }
174 apicid = new_apicid;
175 cpus_found++;
176 }
177 cpu++;
178 }
179 return apicid;
180}
181
182static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
183{
184 int num_bits_set;
185 int cpus_found = 0;
186 int cpu;
187 int apicid;
188
189 num_bits_set = cpus_weight(cpumask);
190 /* Return id to all */
191 if (num_bits_set == NR_CPUS)
192 return cpu_to_logical_apicid(0);
193 /*
194 * The cpus in the mask must all be on the apic cluster. If are not
195 * on the same apicid cluster return default value of TARGET_CPUS.
196 */
197 cpu = first_cpu(cpumask);
198 apicid = cpu_to_logical_apicid(cpu);
199 while (cpus_found < num_bits_set) {
200 if (cpu_isset(cpu, cpumask)) {
201 int new_apicid = cpu_to_logical_apicid(cpu);
202 if (apicid_cluster(apicid) !=
203 apicid_cluster(new_apicid)){
204 printk ("%s: Not a valid mask!\n", __func__);
177 return cpu_to_logical_apicid(0); 205 return cpu_to_logical_apicid(0);
178#endif
179 } 206 }
180 apicid = new_apicid; 207 apicid = new_apicid;
181 cpus_found++; 208 cpus_found++;
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h
index 398493461913..78f0daaee436 100644
--- a/arch/x86/include/asm/es7000/wakecpu.h
+++ b/arch/x86/include/asm/es7000/wakecpu.h
@@ -1,36 +1,12 @@
1#ifndef __ASM_ES7000_WAKECPU_H 1#ifndef __ASM_ES7000_WAKECPU_H
2#define __ASM_ES7000_WAKECPU_H 2#define __ASM_ES7000_WAKECPU_H
3 3
4/* 4#define TRAMPOLINE_PHYS_LOW 0x467
5 * This file copes with machines that wakeup secondary CPUs by the 5#define TRAMPOLINE_PHYS_HIGH 0x469
6 * INIT, INIT, STARTUP sequence.
7 */
8
9#ifdef CONFIG_ES7000_CLUSTERED_APIC
10#define WAKE_SECONDARY_VIA_MIP
11#else
12#define WAKE_SECONDARY_VIA_INIT
13#endif
14
15#ifdef WAKE_SECONDARY_VIA_MIP
16extern int es7000_start_cpu(int cpu, unsigned long eip);
17static inline int
18wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
19{
20 int boot_error = 0;
21 boot_error = es7000_start_cpu(phys_apicid, start_eip);
22 return boot_error;
23}
24#endif
25
26#define TRAMPOLINE_LOW phys_to_virt(0x467)
27#define TRAMPOLINE_HIGH phys_to_virt(0x469)
28
29#define boot_cpu_apicid boot_cpu_physical_apicid
30 6
31static inline void wait_for_init_deassert(atomic_t *deassert) 7static inline void wait_for_init_deassert(atomic_t *deassert)
32{ 8{
33#ifdef WAKE_SECONDARY_VIA_INIT 9#ifndef CONFIG_ES7000_CLUSTERED_APIC
34 while (!atomic_read(deassert)) 10 while (!atomic_read(deassert))
35 cpu_relax(); 11 cpu_relax();
36#endif 12#endif
@@ -50,9 +26,12 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
50{ 26{
51} 27}
52 28
53#define inquire_remote_apic(apicid) do { \ 29extern void __inquire_remote_apic(int apicid);
54 if (apic_verbosity >= APIC_DEBUG) \ 30
55 __inquire_remote_apic(apicid); \ 31static inline void inquire_remote_apic(int apicid)
56 } while (0) 32{
33 if (apic_verbosity >= APIC_DEBUG)
34 __inquire_remote_apic(apicid);
35}
57 36
58#endif /* __ASM_MACH_WAKECPU_H */ 37#endif /* __ASM_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
index 9e8bc29b8b17..b55b4a7fbefd 100644
--- a/arch/x86/include/asm/ftrace.h
+++ b/arch/x86/include/asm/ftrace.h
@@ -1,6 +1,33 @@
1#ifndef _ASM_X86_FTRACE_H 1#ifndef _ASM_X86_FTRACE_H
2#define _ASM_X86_FTRACE_H 2#define _ASM_X86_FTRACE_H
3 3
4#ifdef __ASSEMBLY__
5
6 .macro MCOUNT_SAVE_FRAME
7 /* taken from glibc */
8 subq $0x38, %rsp
9 movq %rax, (%rsp)
10 movq %rcx, 8(%rsp)
11 movq %rdx, 16(%rsp)
12 movq %rsi, 24(%rsp)
13 movq %rdi, 32(%rsp)
14 movq %r8, 40(%rsp)
15 movq %r9, 48(%rsp)
16 .endm
17
18 .macro MCOUNT_RESTORE_FRAME
19 movq 48(%rsp), %r9
20 movq 40(%rsp), %r8
21 movq 32(%rsp), %rdi
22 movq 24(%rsp), %rsi
23 movq 16(%rsp), %rdx
24 movq 8(%rsp), %rcx
25 movq (%rsp), %rax
26 addq $0x38, %rsp
27 .endm
28
29#endif
30
4#ifdef CONFIG_FUNCTION_TRACER 31#ifdef CONFIG_FUNCTION_TRACER
5#define MCOUNT_ADDR ((long)(mcount)) 32#define MCOUNT_ADDR ((long)(mcount))
6#define MCOUNT_INSN_SIZE 5 /* sizeof mcount call */ 33#define MCOUNT_INSN_SIZE 5 /* sizeof mcount call */
@@ -17,8 +44,40 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
17 */ 44 */
18 return addr - 1; 45 return addr - 1;
19} 46}
20#endif
21 47
48#ifdef CONFIG_DYNAMIC_FTRACE
49
50struct dyn_arch_ftrace {
51 /* No extra data needed for x86 */
52};
53
54#endif /* CONFIG_DYNAMIC_FTRACE */
55#endif /* __ASSEMBLY__ */
22#endif /* CONFIG_FUNCTION_TRACER */ 56#endif /* CONFIG_FUNCTION_TRACER */
23 57
58#ifdef CONFIG_FUNCTION_GRAPH_TRACER
59
60#ifndef __ASSEMBLY__
61
62/*
63 * Stack of return addresses for functions
64 * of a thread.
65 * Used in struct thread_info
66 */
67struct ftrace_ret_stack {
68 unsigned long ret;
69 unsigned long func;
70 unsigned long long calltime;
71};
72
73/*
74 * Primary handler of a function return.
75 * It relays on ftrace_return_to_handler.
76 * Defined in entry_32/64.S
77 */
78extern void return_to_handler(void);
79
80#endif /* __ASSEMBLY__ */
81#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
82
24#endif /* _ASM_X86_FTRACE_H */ 83#endif /* _ASM_X86_FTRACE_H */
diff --git a/arch/x86/include/asm/gart.h b/arch/x86/include/asm/gart.h
index 74252264433d..6cfdafa409d8 100644
--- a/arch/x86/include/asm/gart.h
+++ b/arch/x86/include/asm/gart.h
@@ -29,6 +29,39 @@ extern int fix_aperture;
29#define AMD64_GARTCACHECTL 0x9c 29#define AMD64_GARTCACHECTL 0x9c
30#define AMD64_GARTEN (1<<0) 30#define AMD64_GARTEN (1<<0)
31 31
32#ifdef CONFIG_GART_IOMMU
33extern int gart_iommu_aperture;
34extern int gart_iommu_aperture_allowed;
35extern int gart_iommu_aperture_disabled;
36
37extern void early_gart_iommu_check(void);
38extern void gart_iommu_init(void);
39extern void gart_iommu_shutdown(void);
40extern void __init gart_parse_options(char *);
41extern void gart_iommu_hole_init(void);
42
43#else
44#define gart_iommu_aperture 0
45#define gart_iommu_aperture_allowed 0
46#define gart_iommu_aperture_disabled 1
47
48static inline void early_gart_iommu_check(void)
49{
50}
51static inline void gart_iommu_init(void)
52{
53}
54static inline void gart_iommu_shutdown(void)
55{
56}
57static inline void gart_parse_options(char *options)
58{
59}
60static inline void gart_iommu_hole_init(void)
61{
62}
63#endif
64
32extern int agp_amd64_init(void); 65extern int agp_amd64_init(void);
33 66
34static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) 67static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h
index 5cbd4fcc06fd..0ac17d33a8c7 100644
--- a/arch/x86/include/asm/genapic_32.h
+++ b/arch/x86/include/asm/genapic_32.h
@@ -2,6 +2,7 @@
2#define _ASM_X86_GENAPIC_32_H 2#define _ASM_X86_GENAPIC_32_H
3 3
4#include <asm/mpspec.h> 4#include <asm/mpspec.h>
5#include <asm/atomic.h>
5 6
6/* 7/*
7 * Generic APIC driver interface. 8 * Generic APIC driver interface.
@@ -65,6 +66,14 @@ struct genapic {
65 void (*send_IPI_allbutself)(int vector); 66 void (*send_IPI_allbutself)(int vector);
66 void (*send_IPI_all)(int vector); 67 void (*send_IPI_all)(int vector);
67#endif 68#endif
69 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
70 int trampoline_phys_low;
71 int trampoline_phys_high;
72 void (*wait_for_init_deassert)(atomic_t *deassert);
73 void (*smp_callin_clear_local_apic)(void);
74 void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
75 void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
76 void (*inquire_remote_apic)(int apicid);
68}; 77};
69 78
70#define APICFUNC(x) .x = x, 79#define APICFUNC(x) .x = x,
@@ -105,16 +114,24 @@ struct genapic {
105 APICFUNC(get_apic_id) \ 114 APICFUNC(get_apic_id) \
106 .apic_id_mask = APIC_ID_MASK, \ 115 .apic_id_mask = APIC_ID_MASK, \
107 APICFUNC(cpu_mask_to_apicid) \ 116 APICFUNC(cpu_mask_to_apicid) \
108 APICFUNC(vector_allocation_domain) \ 117 APICFUNC(vector_allocation_domain) \
109 APICFUNC(acpi_madt_oem_check) \ 118 APICFUNC(acpi_madt_oem_check) \
110 IPIFUNC(send_IPI_mask) \ 119 IPIFUNC(send_IPI_mask) \
111 IPIFUNC(send_IPI_allbutself) \ 120 IPIFUNC(send_IPI_allbutself) \
112 IPIFUNC(send_IPI_all) \ 121 IPIFUNC(send_IPI_all) \
113 APICFUNC(enable_apic_mode) \ 122 APICFUNC(enable_apic_mode) \
114 APICFUNC(phys_pkg_id) \ 123 APICFUNC(phys_pkg_id) \
124 .trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \
125 .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \
126 APICFUNC(wait_for_init_deassert) \
127 APICFUNC(smp_callin_clear_local_apic) \
128 APICFUNC(store_NMI_vector) \
129 APICFUNC(restore_NMI_vector) \
130 APICFUNC(inquire_remote_apic) \
115} 131}
116 132
117extern struct genapic *genapic; 133extern struct genapic *genapic;
134extern void es7000_update_genapic_to_cluster(void);
118 135
119enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; 136enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
120#define get_uv_system_type() UV_NONE 137#define get_uv_system_type() UV_NONE
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h
index 13c4e96199ea..2cae011668b7 100644
--- a/arch/x86/include/asm/genapic_64.h
+++ b/arch/x86/include/asm/genapic_64.h
@@ -32,6 +32,8 @@ struct genapic {
32 unsigned int (*get_apic_id)(unsigned long x); 32 unsigned int (*get_apic_id)(unsigned long x);
33 unsigned long (*set_apic_id)(unsigned int id); 33 unsigned long (*set_apic_id)(unsigned int id);
34 unsigned long apic_id_mask; 34 unsigned long apic_id_mask;
35 /* wakeup_secondary_cpu */
36 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
35}; 37};
36 38
37extern struct genapic *genapic; 39extern struct genapic *genapic;
diff --git a/arch/x86/include/asm/hardirq_32.h b/arch/x86/include/asm/hardirq_32.h
index 5ca135e72f2b..cf7954d1405f 100644
--- a/arch/x86/include/asm/hardirq_32.h
+++ b/arch/x86/include/asm/hardirq_32.h
@@ -22,6 +22,8 @@ DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
22#define __ARCH_IRQ_STAT 22#define __ARCH_IRQ_STAT
23#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member) 23#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
24 24
25#define inc_irq_stat(member) (__get_cpu_var(irq_stat).member++)
26
25void ack_bad_irq(unsigned int irq); 27void ack_bad_irq(unsigned int irq);
26#include <linux/irq_cpustat.h> 28#include <linux/irq_cpustat.h>
27 29
diff --git a/arch/x86/include/asm/hardirq_64.h b/arch/x86/include/asm/hardirq_64.h
index 1ba381fc51d3..b5a6b5d56704 100644
--- a/arch/x86/include/asm/hardirq_64.h
+++ b/arch/x86/include/asm/hardirq_64.h
@@ -11,6 +11,8 @@
11 11
12#define __ARCH_IRQ_STAT 1 12#define __ARCH_IRQ_STAT 1
13 13
14#define inc_irq_stat(member) add_pda(member, 1)
15
14#define local_softirq_pending() read_pda(__softirq_pending) 16#define local_softirq_pending() read_pda(__softirq_pending)
15 17
16#define __ARCH_SET_SOFTIRQ_PENDING 1 18#define __ARCH_SET_SOFTIRQ_PENDING 1
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index b97aecb0b61d..8de644b6b959 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -109,9 +109,7 @@ extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
109#endif 109#endif
110#endif 110#endif
111 111
112#ifdef CONFIG_X86_32 112extern void (*__initconst interrupt[NR_VECTORS-FIRST_EXTERNAL_VECTOR])(void);
113extern void (*const interrupt[NR_VECTORS])(void);
114#endif
115 113
116typedef int vector_irq_t[NR_VECTORS]; 114typedef int vector_irq_t[NR_VECTORS];
117DECLARE_PER_CPU(vector_irq_t, vector_irq); 115DECLARE_PER_CPU(vector_irq_t, vector_irq);
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
new file mode 100644
index 000000000000..369f5c5d09a1
--- /dev/null
+++ b/arch/x86/include/asm/hypervisor.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2008, VMware, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more
13 * details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 */
20#ifndef ASM_X86__HYPERVISOR_H
21#define ASM_X86__HYPERVISOR_H
22
23extern unsigned long get_hypervisor_tsc_freq(void);
24extern void init_hypervisor(struct cpuinfo_x86 *c);
25
26#endif
diff --git a/arch/x86/include/asm/ia32.h b/arch/x86/include/asm/ia32.h
index 97989c0e534c..50ca486fd88c 100644
--- a/arch/x86/include/asm/ia32.h
+++ b/arch/x86/include/asm/ia32.h
@@ -129,24 +129,6 @@ typedef struct compat_siginfo {
129 } _sifields; 129 } _sifields;
130} compat_siginfo_t; 130} compat_siginfo_t;
131 131
132struct sigframe32 {
133 u32 pretcode;
134 int sig;
135 struct sigcontext_ia32 sc;
136 struct _fpstate_ia32 fpstate;
137 unsigned int extramask[_COMPAT_NSIG_WORDS-1];
138};
139
140struct rt_sigframe32 {
141 u32 pretcode;
142 int sig;
143 u32 pinfo;
144 u32 puc;
145 compat_siginfo_t info;
146 struct ucontext_ia32 uc;
147 struct _fpstate_ia32 fpstate;
148};
149
150struct ustat32 { 132struct ustat32 {
151 __u32 f_tfree; 133 __u32 f_tfree;
152 compat_ino_t f_tinode; 134 compat_ino_t f_tinode;
diff --git a/arch/x86/include/asm/idle.h b/arch/x86/include/asm/idle.h
index 44c89c3a23e9..38d87379e270 100644
--- a/arch/x86/include/asm/idle.h
+++ b/arch/x86/include/asm/idle.h
@@ -8,8 +8,13 @@ struct notifier_block;
8void idle_notifier_register(struct notifier_block *n); 8void idle_notifier_register(struct notifier_block *n);
9void idle_notifier_unregister(struct notifier_block *n); 9void idle_notifier_unregister(struct notifier_block *n);
10 10
11#ifdef CONFIG_X86_64
11void enter_idle(void); 12void enter_idle(void);
12void exit_idle(void); 13void exit_idle(void);
14#else /* !CONFIG_X86_64 */
15static inline void enter_idle(void) { }
16static inline void exit_idle(void) { }
17#endif /* CONFIG_X86_64 */
13 18
14void c1e_remove_cpu(int cpu); 19void c1e_remove_cpu(int cpu);
15 20
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index ac2abc88cd95..05cfed4485fa 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -4,6 +4,7 @@
4#define ARCH_HAS_IOREMAP_WC 4#define ARCH_HAS_IOREMAP_WC
5 5
6#include <linux/compiler.h> 6#include <linux/compiler.h>
7#include <asm-generic/int-ll64.h>
7 8
8#define build_mmio_read(name, size, type, reg, barrier) \ 9#define build_mmio_read(name, size, type, reg, barrier) \
9static inline type name(const volatile void __iomem *addr) \ 10static inline type name(const volatile void __iomem *addr) \
@@ -45,21 +46,39 @@ build_mmio_write(__writel, "l", unsigned int, "r", )
45#define mmiowb() barrier() 46#define mmiowb() barrier()
46 47
47#ifdef CONFIG_X86_64 48#ifdef CONFIG_X86_64
49
48build_mmio_read(readq, "q", unsigned long, "=r", :"memory") 50build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
49build_mmio_read(__readq, "q", unsigned long, "=r", )
50build_mmio_write(writeq, "q", unsigned long, "r", :"memory") 51build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
51build_mmio_write(__writeq, "q", unsigned long, "r", )
52 52
53#define readq_relaxed(a) __readq(a) 53#else
54#define __raw_readq __readq 54
55#define __raw_writeq writeq 55static inline __u64 readq(const volatile void __iomem *addr)
56{
57 const volatile u32 __iomem *p = addr;
58 u32 low, high;
59
60 low = readl(p);
61 high = readl(p + 1);
62
63 return low + ((u64)high << 32);
64}
65
66static inline void writeq(__u64 val, volatile void __iomem *addr)
67{
68 writel(val, addr);
69 writel(val >> 32, addr+4);
70}
56 71
57/* Let people know we have them */
58#define readq readq
59#define writeq writeq
60#endif 72#endif
61 73
62extern int iommu_bio_merge; 74#define readq_relaxed(a) readq(a)
75
76#define __raw_readq(a) readq(a)
77#define __raw_writeq(val, addr) writeq(val, addr)
78
79/* Let people know that we have them */
80#define readq readq
81#define writeq writeq
63 82
64#ifdef CONFIG_X86_32 83#ifdef CONFIG_X86_32
65# include "io_32.h" 84# include "io_32.h"
diff --git a/arch/x86/include/asm/io_64.h b/arch/x86/include/asm/io_64.h
index fea325a1122f..563c16270ba6 100644
--- a/arch/x86/include/asm/io_64.h
+++ b/arch/x86/include/asm/io_64.h
@@ -232,8 +232,6 @@ void memset_io(volatile void __iomem *a, int b, size_t c);
232 232
233#define flush_write_buffers() 233#define flush_write_buffers()
234 234
235#define BIO_VMERGE_BOUNDARY iommu_bio_merge
236
237/* 235/*
238 * Convert a virtual cached pointer to an uncached pointer 236 * Convert a virtual cached pointer to an uncached pointer
239 */ 237 */
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 6afd9933a7dd..e475e009ae5d 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -156,11 +156,21 @@ extern int sis_apic_bug;
156/* 1 if "noapic" boot option passed */ 156/* 1 if "noapic" boot option passed */
157extern int skip_ioapic_setup; 157extern int skip_ioapic_setup;
158 158
159/* 1 if "noapic" boot option passed */
160extern int noioapicquirk;
161
162/* -1 if "noapic" boot option passed */
163extern int noioapicreroute;
164
159/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ 165/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
160extern int timer_through_8259; 166extern int timer_through_8259;
161 167
162static inline void disable_ioapic_setup(void) 168static inline void disable_ioapic_setup(void)
163{ 169{
170#ifdef CONFIG_PCI
171 noioapicquirk = 1;
172 noioapicreroute = -1;
173#endif
164 skip_ioapic_setup = 1; 174 skip_ioapic_setup = 1;
165} 175}
166 176
diff --git a/arch/x86/include/asm/iommu.h b/arch/x86/include/asm/iommu.h
index 0b500c5b6446..295b13193f4d 100644
--- a/arch/x86/include/asm/iommu.h
+++ b/arch/x86/include/asm/iommu.h
@@ -12,37 +12,4 @@ extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
12/* 10 seconds */ 12/* 10 seconds */
13#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) 13#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000)
14 14
15#ifdef CONFIG_GART_IOMMU
16extern int gart_iommu_aperture;
17extern int gart_iommu_aperture_allowed;
18extern int gart_iommu_aperture_disabled;
19
20extern void early_gart_iommu_check(void);
21extern void gart_iommu_init(void);
22extern void gart_iommu_shutdown(void);
23extern void __init gart_parse_options(char *);
24extern void gart_iommu_hole_init(void);
25
26#else
27#define gart_iommu_aperture 0
28#define gart_iommu_aperture_allowed 0
29#define gart_iommu_aperture_disabled 1
30
31static inline void early_gart_iommu_check(void)
32{
33}
34static inline void gart_iommu_init(void)
35{
36}
37static inline void gart_iommu_shutdown(void)
38{
39}
40static inline void gart_parse_options(char *options)
41{
42}
43static inline void gart_iommu_hole_init(void)
44{
45}
46#endif
47
48#endif /* _ASM_X86_IOMMU_H */ 15#endif /* _ASM_X86_IOMMU_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index bae0eda95486..28e409fc73f3 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -31,10 +31,6 @@ static inline int irq_canonicalize(int irq)
31# endif 31# endif
32#endif 32#endif
33 33
34#ifdef CONFIG_IRQBALANCE
35extern int irqbalance_disable(char *str);
36#endif
37
38#ifdef CONFIG_HOTPLUG_CPU 34#ifdef CONFIG_HOTPLUG_CPU
39#include <linux/cpumask.h> 35#include <linux/cpumask.h>
40extern void fixup_irqs(cpumask_t map); 36extern void fixup_irqs(cpumask_t map);
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h
index af2f02d27fc7..86afd7473457 100644
--- a/arch/x86/include/asm/irq_regs_32.h
+++ b/arch/x86/include/asm/irq_regs_32.h
@@ -9,6 +9,8 @@
9 9
10#include <asm/percpu.h> 10#include <asm/percpu.h>
11 11
12#define ARCH_HAS_OWN_IRQ_REGS
13
12DECLARE_PER_CPU(struct pt_regs *, irq_regs); 14DECLARE_PER_CPU(struct pt_regs *, irq_regs);
13 15
14static inline struct pt_regs *get_irq_regs(void) 16static inline struct pt_regs *get_irq_regs(void)
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h
index a1f22771a15a..c61d8b2ab8b9 100644
--- a/arch/x86/include/asm/kexec.h
+++ b/arch/x86/include/asm/kexec.h
@@ -5,21 +5,8 @@
5# define PA_CONTROL_PAGE 0 5# define PA_CONTROL_PAGE 0
6# define VA_CONTROL_PAGE 1 6# define VA_CONTROL_PAGE 1
7# define PA_PGD 2 7# define PA_PGD 2
8# define VA_PGD 3 8# define PA_SWAP_PAGE 3
9# define PA_PTE_0 4 9# define PAGES_NR 4
10# define VA_PTE_0 5
11# define PA_PTE_1 6
12# define VA_PTE_1 7
13# define PA_SWAP_PAGE 8
14# ifdef CONFIG_X86_PAE
15# define PA_PMD_0 9
16# define VA_PMD_0 10
17# define PA_PMD_1 11
18# define VA_PMD_1 12
19# define PAGES_NR 13
20# else
21# define PAGES_NR 9
22# endif
23#else 10#else
24# define PA_CONTROL_PAGE 0 11# define PA_CONTROL_PAGE 0
25# define VA_CONTROL_PAGE 1 12# define VA_CONTROL_PAGE 1
@@ -170,6 +157,20 @@ relocate_kernel(unsigned long indirection_page,
170 unsigned long start_address) ATTRIB_NORET; 157 unsigned long start_address) ATTRIB_NORET;
171#endif 158#endif
172 159
160#ifdef CONFIG_X86_32
161#define ARCH_HAS_KIMAGE_ARCH
162
163struct kimage_arch {
164 pgd_t *pgd;
165#ifdef CONFIG_X86_PAE
166 pmd_t *pmd0;
167 pmd_t *pmd1;
168#endif
169 pte_t *pte0;
170 pte_t *pte1;
171};
172#endif
173
173#endif /* __ASSEMBLY__ */ 174#endif /* __ASSEMBLY__ */
174 175
175#endif /* _ASM_X86_KEXEC_H */ 176#endif /* _ASM_X86_KEXEC_H */
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index f61ee8f937e4..5d98d0b68ffc 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -57,5 +57,65 @@
57#define __ALIGN_STR ".align 16,0x90" 57#define __ALIGN_STR ".align 16,0x90"
58#endif 58#endif
59 59
60/*
61 * to check ENTRY_X86/END_X86 and
62 * KPROBE_ENTRY_X86/KPROBE_END_X86
63 * unbalanced-missed-mixed appearance
64 */
65#define __set_entry_x86 .set ENTRY_X86_IN, 0
66#define __unset_entry_x86 .set ENTRY_X86_IN, 1
67#define __set_kprobe_x86 .set KPROBE_X86_IN, 0
68#define __unset_kprobe_x86 .set KPROBE_X86_IN, 1
69
70#define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed"
71
72#define __check_entry_x86 \
73 .ifdef ENTRY_X86_IN; \
74 .ifeq ENTRY_X86_IN; \
75 __macro_err_x86; \
76 .abort; \
77 .endif; \
78 .endif
79
80#define __check_kprobe_x86 \
81 .ifdef KPROBE_X86_IN; \
82 .ifeq KPROBE_X86_IN; \
83 __macro_err_x86; \
84 .abort; \
85 .endif; \
86 .endif
87
88#define __check_entry_kprobe_x86 \
89 __check_entry_x86; \
90 __check_kprobe_x86
91
92#define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86
93
94#define ENTRY_X86(name) \
95 __check_entry_kprobe_x86; \
96 __set_entry_x86; \
97 .globl name; \
98 __ALIGN; \
99 name:
100
101#define END_X86(name) \
102 __unset_entry_x86; \
103 __check_entry_kprobe_x86; \
104 .size name, .-name
105
106#define KPROBE_ENTRY_X86(name) \
107 __check_entry_kprobe_x86; \
108 __set_kprobe_x86; \
109 .pushsection .kprobes.text, "ax"; \
110 .globl name; \
111 __ALIGN; \
112 name:
113
114#define KPROBE_END_X86(name) \
115 __unset_kprobe_x86; \
116 __check_entry_kprobe_x86; \
117 .size name, .-name; \
118 .popsection
119
60#endif /* _ASM_X86_LINKAGE_H */ 120#endif /* _ASM_X86_LINKAGE_H */
61 121
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index ff3a6c236c00..6cb3a467e067 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -32,11 +32,13 @@ static inline cpumask_t target_cpus(void)
32#define vector_allocation_domain (genapic->vector_allocation_domain) 32#define vector_allocation_domain (genapic->vector_allocation_domain)
33#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) 33#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
34#define send_IPI_self (genapic->send_IPI_self) 34#define send_IPI_self (genapic->send_IPI_self)
35#define wakeup_secondary_cpu (genapic->wakeup_cpu)
35extern void setup_apic_routing(void); 36extern void setup_apic_routing(void);
36#else 37#else
37#define INT_DELIVERY_MODE dest_LowestPrio 38#define INT_DELIVERY_MODE dest_LowestPrio
38#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ 39#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
39#define TARGET_CPUS (target_cpus()) 40#define TARGET_CPUS (target_cpus())
41#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
40/* 42/*
41 * Set up the logical destination ID. 43 * Set up the logical destination ID.
42 * 44 *
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h
index 9d80db91e992..ceb013660146 100644
--- a/arch/x86/include/asm/mach-default/mach_wakecpu.h
+++ b/arch/x86/include/asm/mach-default/mach_wakecpu.h
@@ -1,17 +1,8 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H 1#ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
2#define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H 2#define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
3 3
4/* 4#define TRAMPOLINE_PHYS_LOW (0x467)
5 * This file copes with machines that wakeup secondary CPUs by the 5#define TRAMPOLINE_PHYS_HIGH (0x469)
6 * INIT, INIT, STARTUP sequence.
7 */
8
9#define WAKE_SECONDARY_VIA_INIT
10
11#define TRAMPOLINE_LOW phys_to_virt(0x467)
12#define TRAMPOLINE_HIGH phys_to_virt(0x469)
13
14#define boot_cpu_apicid boot_cpu_physical_apicid
15 6
16static inline void wait_for_init_deassert(atomic_t *deassert) 7static inline void wait_for_init_deassert(atomic_t *deassert)
17{ 8{
@@ -33,9 +24,12 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
33{ 24{
34} 25}
35 26
36#define inquire_remote_apic(apicid) do { \ 27extern void __inquire_remote_apic(int apicid);
37 if (apic_verbosity >= APIC_DEBUG) \ 28
38 __inquire_remote_apic(apicid); \ 29static inline void inquire_remote_apic(int apicid)
39 } while (0) 30{
31 if (apic_verbosity >= APIC_DEBUG)
32 __inquire_remote_apic(apicid);
33}
40 34
41#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */ 35#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/mach-default/smpboot_hooks.h
index dbab36d64d48..23bf52103b89 100644
--- a/arch/x86/include/asm/mach-default/smpboot_hooks.h
+++ b/arch/x86/include/asm/mach-default/smpboot_hooks.h
@@ -13,9 +13,11 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
13 CMOS_WRITE(0xa, 0xf); 13 CMOS_WRITE(0xa, 0xf);
14 local_flush_tlb(); 14 local_flush_tlb();
15 pr_debug("1.\n"); 15 pr_debug("1.\n");
16 *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; 16 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
17 start_eip >> 4;
17 pr_debug("2.\n"); 18 pr_debug("2.\n");
18 *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; 19 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
20 start_eip & 0xf;
19 pr_debug("3.\n"); 21 pr_debug("3.\n");
20} 22}
21 23
@@ -32,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
32 */ 34 */
33 CMOS_WRITE(0, 0xf); 35 CMOS_WRITE(0, 0xf);
34 36
35 *((volatile long *) phys_to_virt(0x467)) = 0; 37 *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
36} 38}
37 39
38static inline void __init smpboot_setup_io_apic(void) 40static inline void __init smpboot_setup_io_apic(void)
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index 5180bd7478fb..e430f47df667 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -27,6 +27,7 @@
27#define vector_allocation_domain (genapic->vector_allocation_domain) 27#define vector_allocation_domain (genapic->vector_allocation_domain)
28#define enable_apic_mode (genapic->enable_apic_mode) 28#define enable_apic_mode (genapic->enable_apic_mode)
29#define phys_pkg_id (genapic->phys_pkg_id) 29#define phys_pkg_id (genapic->phys_pkg_id)
30#define wakeup_secondary_cpu (genapic->wakeup_cpu)
30 31
31extern void generic_bigsmp_probe(void); 32extern void generic_bigsmp_probe(void);
32 33
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
new file mode 100644
index 000000000000..1ab16b168c8a
--- /dev/null
+++ b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
2#define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low)
5#define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high)
6#define wait_for_init_deassert (genapic->wait_for_init_deassert)
7#define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic)
8#define store_NMI_vector (genapic->store_NMI_vector)
9#define restore_NMI_vector (genapic->restore_NMI_vector)
10#define inquire_remote_apic (genapic->inquire_remote_apic)
11
12#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mmu_context_32.h b/arch/x86/include/asm/mmu_context_32.h
index 8e10015781fb..7e98ce1d2c0e 100644
--- a/arch/x86/include/asm/mmu_context_32.h
+++ b/arch/x86/include/asm/mmu_context_32.h
@@ -4,9 +4,8 @@
4static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 4static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
5{ 5{
6#ifdef CONFIG_SMP 6#ifdef CONFIG_SMP
7 unsigned cpu = smp_processor_id(); 7 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK)
8 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) 8 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY);
9 per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
10#endif 9#endif
11} 10}
12 11
@@ -20,8 +19,8 @@ static inline void switch_mm(struct mm_struct *prev,
20 /* stop flush ipis for the previous mm */ 19 /* stop flush ipis for the previous mm */
21 cpu_clear(cpu, prev->cpu_vm_mask); 20 cpu_clear(cpu, prev->cpu_vm_mask);
22#ifdef CONFIG_SMP 21#ifdef CONFIG_SMP
23 per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK; 22 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
24 per_cpu(cpu_tlbstate, cpu).active_mm = next; 23 x86_write_percpu(cpu_tlbstate.active_mm, next);
25#endif 24#endif
26 cpu_set(cpu, next->cpu_vm_mask); 25 cpu_set(cpu, next->cpu_vm_mask);
27 26
@@ -36,8 +35,8 @@ static inline void switch_mm(struct mm_struct *prev,
36 } 35 }
37#ifdef CONFIG_SMP 36#ifdef CONFIG_SMP
38 else { 37 else {
39 per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK; 38 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
40 BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next); 39 BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next);
41 40
42 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) { 41 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
43 /* We were in lazy tlb mode and leave_mm disabled 42 /* We were in lazy tlb mode and leave_mm disabled
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index e38859d577a1..cb58643947b9 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -85,7 +85,9 @@
85/* AMD64 MSRs. Not complete. See the architecture manual for a more 85/* AMD64 MSRs. Not complete. See the architecture manual for a more
86 complete list. */ 86 complete list. */
87 87
88#define MSR_AMD64_PATCH_LEVEL 0x0000008b
88#define MSR_AMD64_NB_CFG 0xc001001f 89#define MSR_AMD64_NB_CFG 0xc001001f
90#define MSR_AMD64_PATCH_LOADER 0xc0010020
89#define MSR_AMD64_IBSFETCHCTL 0xc0011030 91#define MSR_AMD64_IBSFETCHCTL 0xc0011030
90#define MSR_AMD64_IBSFETCHLINAD 0xc0011031 92#define MSR_AMD64_IBSFETCHLINAD 0xc0011031
91#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 93#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index c2a812ebde89..638bf6241807 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -22,10 +22,10 @@ static inline unsigned long long native_read_tscp(unsigned int *aux)
22} 22}
23 23
24/* 24/*
25 * i386 calling convention returns 64-bit value in edx:eax, while 25 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
26 * x86_64 returns at rax. Also, the "A" constraint does not really 26 * constraint has different meanings. For i386, "A" means exactly
27 * mean rdx:rax in x86_64, so we need specialized behaviour for each 27 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
28 * architecture 28 * it means rax *or* rdx.
29 */ 29 */
30#ifdef CONFIG_X86_64 30#ifdef CONFIG_X86_64
31#define DECLARE_ARGS(val, low, high) unsigned low, high 31#define DECLARE_ARGS(val, low, high) unsigned low, high
@@ -85,7 +85,8 @@ static inline void native_write_msr(unsigned int msr,
85 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory"); 85 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
86} 86}
87 87
88static inline int native_write_msr_safe(unsigned int msr, 88/* Can be uninlined because referenced by paravirt */
89notrace static inline int native_write_msr_safe(unsigned int msr,
89 unsigned low, unsigned high) 90 unsigned low, unsigned high)
90{ 91{
91 int err; 92 int err;
@@ -181,10 +182,10 @@ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
181} 182}
182 183
183#define rdtscl(low) \ 184#define rdtscl(low) \
184 ((low) = (u32)native_read_tsc()) 185 ((low) = (u32)__native_read_tsc())
185 186
186#define rdtscll(val) \ 187#define rdtscll(val) \
187 ((val) = native_read_tsc()) 188 ((val) = __native_read_tsc())
188 189
189#define rdpmc(counter, low, high) \ 190#define rdpmc(counter, low, high) \
190do { \ 191do { \
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h
index c577bda5b1c5..6f499df8eddb 100644
--- a/arch/x86/include/asm/numaq/wakecpu.h
+++ b/arch/x86/include/asm/numaq/wakecpu.h
@@ -3,12 +3,8 @@
3 3
4/* This file copes with machines that wakeup secondary CPUs by NMIs */ 4/* This file copes with machines that wakeup secondary CPUs by NMIs */
5 5
6#define WAKE_SECONDARY_VIA_NMI 6#define TRAMPOLINE_PHYS_LOW (0x8)
7 7#define TRAMPOLINE_PHYS_HIGH (0xa)
8#define TRAMPOLINE_LOW phys_to_virt(0x8)
9#define TRAMPOLINE_HIGH phys_to_virt(0xa)
10
11#define boot_cpu_apicid boot_cpu_logical_apicid
12 8
13/* We don't do anything here because we use NMI's to boot instead */ 9/* We don't do anything here because we use NMI's to boot instead */
14static inline void wait_for_init_deassert(atomic_t *deassert) 10static inline void wait_for_init_deassert(atomic_t *deassert)
@@ -27,17 +23,23 @@ static inline void smp_callin_clear_local_apic(void)
27static inline void store_NMI_vector(unsigned short *high, unsigned short *low) 23static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
28{ 24{
29 printk("Storing NMI vector\n"); 25 printk("Storing NMI vector\n");
30 *high = *((volatile unsigned short *) TRAMPOLINE_HIGH); 26 *high =
31 *low = *((volatile unsigned short *) TRAMPOLINE_LOW); 27 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
28 *low =
29 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
32} 30}
33 31
34static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) 32static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
35{ 33{
36 printk("Restoring NMI vector\n"); 34 printk("Restoring NMI vector\n");
37 *((volatile unsigned short *) TRAMPOLINE_HIGH) = *high; 35 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
38 *((volatile unsigned short *) TRAMPOLINE_LOW) = *low; 36 *high;
37 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
38 *low;
39} 39}
40 40
41#define inquire_remote_apic(apicid) {} 41static inline void inquire_remote_apic(int apicid)
42{
43}
42 44
43#endif /* __ASM_NUMAQ_WAKECPU_H */ 45#endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 52d80d3d94f3..f8959c7a985f 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -19,6 +19,8 @@ struct pci_sysdata {
19}; 19};
20 20
21extern int pci_routeirq; 21extern int pci_routeirq;
22extern int noioapicquirk;
23extern int noioapicreroute;
22 24
23/* scan a bus after allocating a pci_sysdata for it */ 25/* scan a bus after allocating a pci_sysdata for it */
24extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, 26extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h
index b17edfd23628..e0d199fe1d83 100644
--- a/arch/x86/include/asm/pgtable-2level.h
+++ b/arch/x86/include/asm/pgtable-2level.h
@@ -56,23 +56,55 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
56#define pte_none(x) (!(x).pte_low) 56#define pte_none(x) (!(x).pte_low)
57 57
58/* 58/*
59 * Bits 0, 6 and 7 are taken, split up the 29 bits of offset 59 * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
60 * into this range: 60 * split up the 29 bits of offset into this range:
61 */ 61 */
62#define PTE_FILE_MAX_BITS 29 62#define PTE_FILE_MAX_BITS 29
63#define PTE_FILE_SHIFT1 (_PAGE_BIT_PRESENT + 1)
64#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
65#define PTE_FILE_SHIFT2 (_PAGE_BIT_FILE + 1)
66#define PTE_FILE_SHIFT3 (_PAGE_BIT_PROTNONE + 1)
67#else
68#define PTE_FILE_SHIFT2 (_PAGE_BIT_PROTNONE + 1)
69#define PTE_FILE_SHIFT3 (_PAGE_BIT_FILE + 1)
70#endif
71#define PTE_FILE_BITS1 (PTE_FILE_SHIFT2 - PTE_FILE_SHIFT1 - 1)
72#define PTE_FILE_BITS2 (PTE_FILE_SHIFT3 - PTE_FILE_SHIFT2 - 1)
63 73
64#define pte_to_pgoff(pte) \ 74#define pte_to_pgoff(pte) \
65 ((((pte).pte_low >> 1) & 0x1f) + (((pte).pte_low >> 8) << 5)) 75 ((((pte).pte_low >> PTE_FILE_SHIFT1) \
76 & ((1U << PTE_FILE_BITS1) - 1)) \
77 + ((((pte).pte_low >> PTE_FILE_SHIFT2) \
78 & ((1U << PTE_FILE_BITS2) - 1)) << PTE_FILE_BITS1) \
79 + (((pte).pte_low >> PTE_FILE_SHIFT3) \
80 << (PTE_FILE_BITS1 + PTE_FILE_BITS2)))
66 81
67#define pgoff_to_pte(off) \ 82#define pgoff_to_pte(off) \
68 ((pte_t) { .pte_low = (((off) & 0x1f) << 1) + \ 83 ((pte_t) { .pte_low = \
69 (((off) >> 5) << 8) + _PAGE_FILE }) 84 (((off) & ((1U << PTE_FILE_BITS1) - 1)) << PTE_FILE_SHIFT1) \
85 + ((((off) >> PTE_FILE_BITS1) & ((1U << PTE_FILE_BITS2) - 1)) \
86 << PTE_FILE_SHIFT2) \
87 + (((off) >> (PTE_FILE_BITS1 + PTE_FILE_BITS2)) \
88 << PTE_FILE_SHIFT3) \
89 + _PAGE_FILE })
70 90
71/* Encode and de-code a swap entry */ 91/* Encode and de-code a swap entry */
72#define __swp_type(x) (((x).val >> 1) & 0x1f) 92#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
73#define __swp_offset(x) ((x).val >> 8) 93#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
74#define __swp_entry(type, offset) \ 94#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
75 ((swp_entry_t) { ((type) << 1) | ((offset) << 8) }) 95#else
96#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
97#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
98#endif
99
100#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
101
102#define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
103 & ((1U << SWP_TYPE_BITS) - 1))
104#define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT)
105#define __swp_entry(type, offset) ((swp_entry_t) { \
106 ((type) << (_PAGE_BIT_PRESENT + 1)) \
107 | ((offset) << SWP_OFFSET_SHIFT) })
76#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low }) 108#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low })
77#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) 109#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
78 110
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 52597aeadfff..447da43cddb3 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -166,6 +166,7 @@ static inline int pte_none(pte_t pte)
166#define PTE_FILE_MAX_BITS 32 166#define PTE_FILE_MAX_BITS 32
167 167
168/* Encode and de-code a swap entry */ 168/* Encode and de-code a swap entry */
169#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > 5)
169#define __swp_type(x) (((x).val) & 0x1f) 170#define __swp_type(x) (((x).val) & 0x1f)
170#define __swp_offset(x) ((x).val >> 5) 171#define __swp_offset(x) ((x).val >> 5)
171#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) << 5}) 172#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) << 5})
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index c012f3b11671..83e69f4a37f0 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -10,7 +10,6 @@
10#define _PAGE_BIT_PCD 4 /* page cache disabled */ 10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ 11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ 12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
13#define _PAGE_BIT_FILE 6
14#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ 13#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
15#define _PAGE_BIT_PAT 7 /* on 4KB pages */ 14#define _PAGE_BIT_PAT 7 /* on 4KB pages */
16#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ 15#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
@@ -22,6 +21,12 @@
22#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1 21#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
23#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ 22#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
24 23
24/* If _PAGE_BIT_PRESENT is clear, we use these: */
25/* - if the user mapped it with PROT_NONE; pte_present gives true */
26#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
27/* - set: nonlinear file mapping, saved PTE; unset:swap */
28#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
29
25#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) 30#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
26#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) 31#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
27#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) 32#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
@@ -46,11 +51,8 @@
46#define _PAGE_NX (_AT(pteval_t, 0)) 51#define _PAGE_NX (_AT(pteval_t, 0))
47#endif 52#endif
48 53
49/* If _PAGE_PRESENT is clear, we use these: */ 54#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
50#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping, 55#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
51 * saved PTE; unset:swap */
52#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
53 pte_present gives true */
54 56
55#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ 57#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
56 _PAGE_ACCESSED | _PAGE_DIRTY) 58 _PAGE_ACCESSED | _PAGE_DIRTY)
@@ -158,8 +160,19 @@
158#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ 160#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
159#endif 161#endif
160 162
163/*
164 * Macro to mark a page protection value as UC-
165 */
166#define pgprot_noncached(prot) \
167 ((boot_cpu_data.x86 > 3) \
168 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
169 : (prot))
170
161#ifndef __ASSEMBLY__ 171#ifndef __ASSEMBLY__
162 172
173#define pgprot_writecombine pgprot_writecombine
174extern pgprot_t pgprot_writecombine(pgprot_t prot);
175
163/* 176/*
164 * ZERO_PAGE is a global shared page that is always zero: used 177 * ZERO_PAGE is a global shared page that is always zero: used
165 * for zero-mapped memory areas etc.. 178 * for zero-mapped memory areas etc..
@@ -329,6 +342,9 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
329#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) 342#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
330 343
331#ifndef __ASSEMBLY__ 344#ifndef __ASSEMBLY__
345/* Indicate that x86 has its own track and untrack pfn vma functions */
346#define __HAVE_PFNMAP_TRACKING
347
332#define __HAVE_PHYS_MEM_ACCESS_PROT 348#define __HAVE_PHYS_MEM_ACCESS_PROT
333struct file; 349struct file;
334pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 350pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index f9d5889b336b..72b020deb46b 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -101,15 +101,6 @@ extern unsigned long pg0[];
101#endif 101#endif
102 102
103/* 103/*
104 * Macro to mark a page protection value as "uncacheable".
105 * On processors which do not support it, this is a no-op.
106 */
107#define pgprot_noncached(prot) \
108 ((boot_cpu_data.x86 > 3) \
109 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) \
110 : (prot))
111
112/*
113 * Conversion functions: convert a page and protection to a page entry, 104 * Conversion functions: convert a page and protection to a page entry,
114 * and a page entry and page directory to the page they refer to. 105 * and a page entry and page directory to the page they refer to.
115 */ 106 */
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 545a0e042bb2..ba09289accaa 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -146,7 +146,7 @@ static inline void native_pgd_clear(pgd_t *pgd)
146#define PGDIR_MASK (~(PGDIR_SIZE - 1)) 146#define PGDIR_MASK (~(PGDIR_SIZE - 1))
147 147
148 148
149#define MAXMEM _AC(0x00003fffffffffff, UL) 149#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
150#define VMALLOC_START _AC(0xffffc20000000000, UL) 150#define VMALLOC_START _AC(0xffffc20000000000, UL)
151#define VMALLOC_END _AC(0xffffe1ffffffffff, UL) 151#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
152#define VMEMMAP_START _AC(0xffffe20000000000, UL) 152#define VMEMMAP_START _AC(0xffffe20000000000, UL)
@@ -177,12 +177,6 @@ static inline int pmd_bad(pmd_t pmd)
177#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */ 177#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */
178 178
179/* 179/*
180 * Macro to mark a page protection value as "uncacheable".
181 */
182#define pgprot_noncached(prot) \
183 (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT))
184
185/*
186 * Conversion functions: convert a page and protection to a page entry, 180 * Conversion functions: convert a page and protection to a page entry,
187 * and a page entry and page directory to the page they refer to. 181 * and a page entry and page directory to the page they refer to.
188 */ 182 */
@@ -250,10 +244,22 @@ static inline int pud_large(pud_t pte)
250extern int direct_gbpages; 244extern int direct_gbpages;
251 245
252/* Encode and de-code a swap entry */ 246/* Encode and de-code a swap entry */
253#define __swp_type(x) (((x).val >> 1) & 0x3f) 247#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
254#define __swp_offset(x) ((x).val >> 8) 248#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
255#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | \ 249#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
256 ((offset) << 8) }) 250#else
251#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
252#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
253#endif
254
255#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
256
257#define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
258 & ((1U << SWP_TYPE_BITS) - 1))
259#define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT)
260#define __swp_entry(type, offset) ((swp_entry_t) { \
261 ((type) << (_PAGE_BIT_PRESENT + 1)) \
262 | ((offset) << SWP_OFFSET_SHIFT) })
257#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) 263#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
258#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) 264#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
259 265
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/asm/prctl.h
index fe681147a4f7..a8894647dd9a 100644
--- a/arch/x86/include/asm/prctl.h
+++ b/arch/x86/include/asm/prctl.h
@@ -6,5 +6,8 @@
6#define ARCH_GET_FS 0x1003 6#define ARCH_GET_FS 0x1003
7#define ARCH_GET_GS 0x1004 7#define ARCH_GET_GS 0x1004
8 8
9#ifdef CONFIG_X86_64
10extern long sys_arch_prctl(int, unsigned long);
11#endif /* CONFIG_X86_64 */
9 12
10#endif /* _ASM_X86_PRCTL_H */ 13#endif /* _ASM_X86_PRCTL_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 5ca01e383269..091cd8855f2e 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -110,6 +110,7 @@ struct cpuinfo_x86 {
110 /* Index into per_cpu list: */ 110 /* Index into per_cpu list: */
111 u16 cpu_index; 111 u16 cpu_index;
112#endif 112#endif
113 unsigned int x86_hyper_vendor;
113} __attribute__((__aligned__(SMP_CACHE_BYTES))); 114} __attribute__((__aligned__(SMP_CACHE_BYTES)));
114 115
115#define X86_VENDOR_INTEL 0 116#define X86_VENDOR_INTEL 0
@@ -123,6 +124,9 @@ struct cpuinfo_x86 {
123 124
124#define X86_VENDOR_UNKNOWN 0xff 125#define X86_VENDOR_UNKNOWN 0xff
125 126
127#define X86_HYPER_VENDOR_NONE 0
128#define X86_HYPER_VENDOR_VMWARE 1
129
126/* 130/*
127 * capabilities of CPUs 131 * capabilities of CPUs
128 */ 132 */
@@ -752,6 +756,19 @@ extern void switch_to_new_gdt(void);
752extern void cpu_init(void); 756extern void cpu_init(void);
753extern void init_gdt(int cpu); 757extern void init_gdt(int cpu);
754 758
759static inline unsigned long get_debugctlmsr(void)
760{
761 unsigned long debugctlmsr = 0;
762
763#ifndef CONFIG_X86_DEBUGCTLMSR
764 if (boot_cpu_data.x86 < 6)
765 return 0;
766#endif
767 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
768
769 return debugctlmsr;
770}
771
755static inline void update_debugctlmsr(unsigned long debugctlmsr) 772static inline void update_debugctlmsr(unsigned long debugctlmsr)
756{ 773{
757#ifndef CONFIG_X86_DEBUGCTLMSR 774#ifndef CONFIG_X86_DEBUGCTLMSR
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index eefb0594b058..6d34d954c228 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -6,7 +6,6 @@
6#include <asm/processor-flags.h> 6#include <asm/processor-flags.h>
7 7
8#ifdef __KERNEL__ 8#ifdef __KERNEL__
9#include <asm/ds.h> /* the DS BTS struct is used for ptrace too */
10#include <asm/segment.h> 9#include <asm/segment.h>
11#endif 10#endif
12 11
@@ -128,34 +127,6 @@ struct pt_regs {
128#endif /* !__i386__ */ 127#endif /* !__i386__ */
129 128
130 129
131#ifdef CONFIG_X86_PTRACE_BTS
132/* a branch trace record entry
133 *
134 * In order to unify the interface between various processor versions,
135 * we use the below data structure for all processors.
136 */
137enum bts_qualifier {
138 BTS_INVALID = 0,
139 BTS_BRANCH,
140 BTS_TASK_ARRIVES,
141 BTS_TASK_DEPARTS
142};
143
144struct bts_struct {
145 __u64 qualifier;
146 union {
147 /* BTS_BRANCH */
148 struct {
149 __u64 from_ip;
150 __u64 to_ip;
151 } lbr;
152 /* BTS_TASK_ARRIVES or
153 BTS_TASK_DEPARTS */
154 __u64 jiffies;
155 } variant;
156};
157#endif /* CONFIG_X86_PTRACE_BTS */
158
159#ifdef __KERNEL__ 130#ifdef __KERNEL__
160 131
161#include <linux/init.h> 132#include <linux/init.h>
@@ -163,13 +134,6 @@ struct bts_struct {
163struct cpuinfo_x86; 134struct cpuinfo_x86;
164struct task_struct; 135struct task_struct;
165 136
166#ifdef CONFIG_X86_PTRACE_BTS
167extern void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *);
168extern void ptrace_bts_take_timestamp(struct task_struct *, enum bts_qualifier);
169#else
170#define ptrace_bts_init_intel(config) do {} while (0)
171#endif /* CONFIG_X86_PTRACE_BTS */
172
173extern unsigned long profile_pc(struct pt_regs *regs); 137extern unsigned long profile_pc(struct pt_regs *regs);
174 138
175extern unsigned long 139extern unsigned long
@@ -271,6 +235,13 @@ extern int do_get_thread_area(struct task_struct *p, int idx,
271extern int do_set_thread_area(struct task_struct *p, int idx, 235extern int do_set_thread_area(struct task_struct *p, int idx,
272 struct user_desc __user *info, int can_allocate); 236 struct user_desc __user *info, int can_allocate);
273 237
238extern void x86_ptrace_untrace(struct task_struct *);
239extern void x86_ptrace_fork(struct task_struct *child,
240 unsigned long clone_flags);
241
242#define arch_ptrace_untrace(tsk) x86_ptrace_untrace(tsk)
243#define arch_ptrace_fork(child, flags) x86_ptrace_fork(child, flags)
244
274#endif /* __KERNEL__ */ 245#endif /* __KERNEL__ */
275 246
276#endif /* !__ASSEMBLY__ */ 247#endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/reboot.h b/arch/x86/include/asm/reboot.h
index df7710354f85..562d4fd31ba8 100644
--- a/arch/x86/include/asm/reboot.h
+++ b/arch/x86/include/asm/reboot.h
@@ -1,6 +1,8 @@
1#ifndef _ASM_X86_REBOOT_H 1#ifndef _ASM_X86_REBOOT_H
2#define _ASM_X86_REBOOT_H 2#define _ASM_X86_REBOOT_H
3 3
4#include <linux/kdebug.h>
5
4struct pt_regs; 6struct pt_regs;
5 7
6struct machine_ops { 8struct machine_ops {
@@ -18,4 +20,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs);
18void native_machine_shutdown(void); 20void native_machine_shutdown(void);
19void machine_real_restart(const unsigned char *code, int length); 21void machine_real_restart(const unsigned char *code, int length);
20 22
23typedef void (*nmi_shootdown_cb)(int, struct die_args*);
24void nmi_shootdown_cpus(nmi_shootdown_cb callback);
25
21#endif /* _ASM_X86_REBOOT_H */ 26#endif /* _ASM_X86_REBOOT_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index f12d37237465..4fcd53fd5f43 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -8,6 +8,10 @@
8/* Interrupt control for vSMPowered x86_64 systems */ 8/* Interrupt control for vSMPowered x86_64 systems */
9void vsmp_init(void); 9void vsmp_init(void);
10 10
11
12void setup_bios_corruption_check(void);
13
14
11#ifdef CONFIG_X86_VISWS 15#ifdef CONFIG_X86_VISWS
12extern void visws_early_detect(void); 16extern void visws_early_detect(void);
13extern int is_visws_box(void); 17extern int is_visws_box(void);
@@ -16,6 +20,8 @@ static inline void visws_early_detect(void) { }
16static inline int is_visws_box(void) { return 0; } 20static inline int is_visws_box(void) { return 0; }
17#endif 21#endif
18 22
23extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
24extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
19/* 25/*
20 * Any setup quirks to be performed? 26 * Any setup quirks to be performed?
21 */ 27 */
@@ -39,6 +45,7 @@ struct x86_quirks {
39 void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable, 45 void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable,
40 unsigned short oemsize); 46 unsigned short oemsize);
41 int (*setup_ioapic_ids)(void); 47 int (*setup_ioapic_ids)(void);
48 int (*update_genapic)(void);
42}; 49};
43 50
44extern struct x86_quirks *x86_quirks; 51extern struct x86_quirks *x86_quirks;
diff --git a/arch/x86/include/asm/sigframe.h b/arch/x86/include/asm/sigframe.h
new file mode 100644
index 000000000000..4e0fe26d27d3
--- /dev/null
+++ b/arch/x86/include/asm/sigframe.h
@@ -0,0 +1,70 @@
1#ifndef _ASM_X86_SIGFRAME_H
2#define _ASM_X86_SIGFRAME_H
3
4#include <asm/sigcontext.h>
5#include <asm/siginfo.h>
6#include <asm/ucontext.h>
7
8#ifdef CONFIG_X86_32
9#define sigframe_ia32 sigframe
10#define rt_sigframe_ia32 rt_sigframe
11#define sigcontext_ia32 sigcontext
12#define _fpstate_ia32 _fpstate
13#define ucontext_ia32 ucontext
14#else /* !CONFIG_X86_32 */
15
16#ifdef CONFIG_IA32_EMULATION
17#include <asm/ia32.h>
18#endif /* CONFIG_IA32_EMULATION */
19
20#endif /* CONFIG_X86_32 */
21
22#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
23struct sigframe_ia32 {
24 u32 pretcode;
25 int sig;
26 struct sigcontext_ia32 sc;
27 /*
28 * fpstate is unused. fpstate is moved/allocated after
29 * retcode[] below. This movement allows to have the FP state and the
30 * future state extensions (xsave) stay together.
31 * And at the same time retaining the unused fpstate, prevents changing
32 * the offset of extramask[] in the sigframe and thus prevent any
33 * legacy application accessing/modifying it.
34 */
35 struct _fpstate_ia32 fpstate_unused;
36#ifdef CONFIG_IA32_EMULATION
37 unsigned int extramask[_COMPAT_NSIG_WORDS-1];
38#else /* !CONFIG_IA32_EMULATION */
39 unsigned long extramask[_NSIG_WORDS-1];
40#endif /* CONFIG_IA32_EMULATION */
41 char retcode[8];
42 /* fp state follows here */
43};
44
45struct rt_sigframe_ia32 {
46 u32 pretcode;
47 int sig;
48 u32 pinfo;
49 u32 puc;
50#ifdef CONFIG_IA32_EMULATION
51 compat_siginfo_t info;
52#else /* !CONFIG_IA32_EMULATION */
53 struct siginfo info;
54#endif /* CONFIG_IA32_EMULATION */
55 struct ucontext_ia32 uc;
56 char retcode[8];
57 /* fp state follows here */
58};
59#endif /* defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) */
60
61#ifdef CONFIG_X86_64
62struct rt_sigframe {
63 char __user *pretcode;
64 struct ucontext uc;
65 struct siginfo info;
66 /* fp state follows here */
67};
68#endif /* CONFIG_X86_64 */
69
70#endif /* _ASM_X86_SIGFRAME_H */
diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h
index 96ac44f275da..7761a5d554bb 100644
--- a/arch/x86/include/asm/signal.h
+++ b/arch/x86/include/asm/signal.h
@@ -121,6 +121,10 @@ typedef unsigned long sigset_t;
121 121
122#ifndef __ASSEMBLY__ 122#ifndef __ASSEMBLY__
123 123
124# ifdef __KERNEL__
125extern void do_notify_resume(struct pt_regs *, void *, __u32);
126# endif /* __KERNEL__ */
127
124#ifdef __i386__ 128#ifdef __i386__
125# ifdef __KERNEL__ 129# ifdef __KERNEL__
126struct old_sigaction { 130struct old_sigaction {
@@ -141,8 +145,6 @@ struct k_sigaction {
141 struct sigaction sa; 145 struct sigaction sa;
142}; 146};
143 147
144extern void do_notify_resume(struct pt_regs *, void *, __u32);
145
146# else /* __KERNEL__ */ 148# else /* __KERNEL__ */
147/* Here we must cater to libcs that poke about in kernel headers. */ 149/* Here we must cater to libcs that poke about in kernel headers. */
148 150
diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h
index be44f7dab395..e3cc3c063ec5 100644
--- a/arch/x86/include/asm/sparsemem.h
+++ b/arch/x86/include/asm/sparsemem.h
@@ -27,7 +27,7 @@
27#else /* CONFIG_X86_32 */ 27#else /* CONFIG_X86_32 */
28# define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ 28# define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */
29# define MAX_PHYSADDR_BITS 44 29# define MAX_PHYSADDR_BITS 44
30# define MAX_PHYSMEM_BITS 44 30# define MAX_PHYSMEM_BITS 44 /* Can be max 45 bits */
31#endif 31#endif
32 32
33#endif /* CONFIG_SPARSEMEM */ 33#endif /* CONFIG_SPARSEMEM */
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 87803da44010..9c6797c3e56c 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -19,6 +19,13 @@
19/* kernel/ioport.c */ 19/* kernel/ioport.c */
20asmlinkage long sys_ioperm(unsigned long, unsigned long, int); 20asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
21 21
22/* kernel/ldt.c */
23asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
24
25/* kernel/tls.c */
26asmlinkage int sys_set_thread_area(struct user_desc __user *);
27asmlinkage int sys_get_thread_area(struct user_desc __user *);
28
22/* X86_32 only */ 29/* X86_32 only */
23#ifdef CONFIG_X86_32 30#ifdef CONFIG_X86_32
24/* kernel/process_32.c */ 31/* kernel/process_32.c */
@@ -33,14 +40,11 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
33 struct old_sigaction __user *); 40 struct old_sigaction __user *);
34asmlinkage int sys_sigaltstack(unsigned long); 41asmlinkage int sys_sigaltstack(unsigned long);
35asmlinkage unsigned long sys_sigreturn(unsigned long); 42asmlinkage unsigned long sys_sigreturn(unsigned long);
36asmlinkage int sys_rt_sigreturn(unsigned long); 43asmlinkage int sys_rt_sigreturn(struct pt_regs);
37 44
38/* kernel/ioport.c */ 45/* kernel/ioport.c */
39asmlinkage long sys_iopl(unsigned long); 46asmlinkage long sys_iopl(unsigned long);
40 47
41/* kernel/ldt.c */
42asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
43
44/* kernel/sys_i386_32.c */ 48/* kernel/sys_i386_32.c */
45asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, 49asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
46 unsigned long, unsigned long, unsigned long); 50 unsigned long, unsigned long, unsigned long);
@@ -54,10 +58,6 @@ asmlinkage int sys_uname(struct old_utsname __user *);
54struct oldold_utsname; 58struct oldold_utsname;
55asmlinkage int sys_olduname(struct oldold_utsname __user *); 59asmlinkage int sys_olduname(struct oldold_utsname __user *);
56 60
57/* kernel/tls.c */
58asmlinkage int sys_set_thread_area(struct user_desc __user *);
59asmlinkage int sys_get_thread_area(struct user_desc __user *);
60
61/* kernel/vm86_32.c */ 61/* kernel/vm86_32.c */
62asmlinkage int sys_vm86old(struct pt_regs); 62asmlinkage int sys_vm86old(struct pt_regs);
63asmlinkage int sys_vm86(struct pt_regs); 63asmlinkage int sys_vm86(struct pt_regs);
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index 2ed3f0f44ff7..8e626ea33a1a 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -17,12 +17,12 @@
17# define AT_VECTOR_SIZE_ARCH 1 17# define AT_VECTOR_SIZE_ARCH 1
18#endif 18#endif
19 19
20#ifdef CONFIG_X86_32
21
22struct task_struct; /* one of the stranger aspects of C forward declarations */ 20struct task_struct; /* one of the stranger aspects of C forward declarations */
23struct task_struct *__switch_to(struct task_struct *prev, 21struct task_struct *__switch_to(struct task_struct *prev,
24 struct task_struct *next); 22 struct task_struct *next);
25 23
24#ifdef CONFIG_X86_32
25
26/* 26/*
27 * Saving eflags is important. It switches not only IOPL between tasks, 27 * Saving eflags is important. It switches not only IOPL between tasks,
28 * it also protects other tasks from NT leaking through sysenter etc. 28 * it also protects other tasks from NT leaking through sysenter etc.
@@ -314,6 +314,8 @@ extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
314 314
315void default_idle(void); 315void default_idle(void);
316 316
317void stop_this_cpu(void *dummy);
318
317/* 319/*
318 * Force strict CPU ordering. 320 * Force strict CPU ordering.
319 * And yes, this is required on UP too when we're talking 321 * And yes, this is required on UP too when we're talking
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index e44d379faad2..98789647baa9 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -20,11 +20,13 @@
20struct task_struct; 20struct task_struct;
21struct exec_domain; 21struct exec_domain;
22#include <asm/processor.h> 22#include <asm/processor.h>
23#include <asm/ftrace.h>
24#include <asm/atomic.h>
23 25
24struct thread_info { 26struct thread_info {
25 struct task_struct *task; /* main task structure */ 27 struct task_struct *task; /* main task structure */
26 struct exec_domain *exec_domain; /* execution domain */ 28 struct exec_domain *exec_domain; /* execution domain */
27 unsigned long flags; /* low level flags */ 29 __u32 flags; /* low level flags */
28 __u32 status; /* thread synchronous flags */ 30 __u32 status; /* thread synchronous flags */
29 __u32 cpu; /* current CPU */ 31 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable, 32 int preempt_count; /* 0 => preemptable,
@@ -91,7 +93,6 @@ struct thread_info {
91#define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ 93#define TIF_FORCED_TF 24 /* true if TF in eflags artificially */
92#define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ 94#define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */
93#define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ 95#define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */
94#define TIF_BTS_TRACE_TS 27 /* record scheduling event timestamps */
95 96
96#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 97#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
97#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 98#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
@@ -113,7 +114,6 @@ struct thread_info {
113#define _TIF_FORCED_TF (1 << TIF_FORCED_TF) 114#define _TIF_FORCED_TF (1 << TIF_FORCED_TF)
114#define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) 115#define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR)
115#define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) 116#define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR)
116#define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS)
117 117
118/* work to do in syscall_trace_enter() */ 118/* work to do in syscall_trace_enter() */
119#define _TIF_WORK_SYSCALL_ENTRY \ 119#define _TIF_WORK_SYSCALL_ENTRY \
@@ -139,8 +139,7 @@ struct thread_info {
139 139
140/* flags to check in __switch_to() */ 140/* flags to check in __switch_to() */
141#define _TIF_WORK_CTXSW \ 141#define _TIF_WORK_CTXSW \
142 (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS| \ 142 (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_NOTSC)
143 _TIF_NOTSC)
144 143
145#define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW 144#define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW
146#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG) 145#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG)
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h
index fa0d79facdbc..780ba0ab94f9 100644
--- a/arch/x86/include/asm/trampoline.h
+++ b/arch/x86/include/asm/trampoline.h
@@ -3,6 +3,7 @@
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5 5
6#ifdef CONFIG_X86_TRAMPOLINE
6/* 7/*
7 * Trampoline 80x86 program as an array. 8 * Trampoline 80x86 program as an array.
8 */ 9 */
@@ -13,8 +14,14 @@ extern unsigned char *trampoline_base;
13extern unsigned long init_rsp; 14extern unsigned long init_rsp;
14extern unsigned long initial_code; 15extern unsigned long initial_code;
15 16
17#define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)
16#define TRAMPOLINE_BASE 0x6000 18#define TRAMPOLINE_BASE 0x6000
19
17extern unsigned long setup_trampoline(void); 20extern unsigned long setup_trampoline(void);
21extern void __init reserve_trampoline_memory(void);
22#else
23static inline void reserve_trampoline_memory(void) {};
24#endif /* CONFIG_X86_TRAMPOLINE */
18 25
19#endif /* __ASSEMBLY__ */ 26#endif /* __ASSEMBLY__ */
20 27
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 45dee286e45c..2ee0a3bceedf 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -46,6 +46,10 @@ dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
46dotraplinkage void do_invalid_TSS(struct pt_regs *, long); 46dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
47dotraplinkage void do_segment_not_present(struct pt_regs *, long); 47dotraplinkage void do_segment_not_present(struct pt_regs *, long);
48dotraplinkage void do_stack_segment(struct pt_regs *, long); 48dotraplinkage void do_stack_segment(struct pt_regs *, long);
49#ifdef CONFIG_X86_64
50dotraplinkage void do_double_fault(struct pt_regs *, long);
51asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *);
52#endif
49dotraplinkage void do_general_protection(struct pt_regs *, long); 53dotraplinkage void do_general_protection(struct pt_regs *, long);
50dotraplinkage void do_page_fault(struct pt_regs *, unsigned long); 54dotraplinkage void do_page_fault(struct pt_regs *, unsigned long);
51dotraplinkage void do_spurious_interrupt_bug(struct pt_regs *, long); 55dotraplinkage void do_spurious_interrupt_bug(struct pt_regs *, long);
@@ -72,10 +76,13 @@ static inline int get_si_code(unsigned long condition)
72extern int panic_on_unrecovered_nmi; 76extern int panic_on_unrecovered_nmi;
73extern int kstack_depth_to_print; 77extern int kstack_depth_to_print;
74 78
75#ifdef CONFIG_X86_32
76void math_error(void __user *); 79void math_error(void __user *);
77unsigned long patch_espfix_desc(unsigned long, unsigned long);
78asmlinkage void math_emulate(long); 80asmlinkage void math_emulate(long);
81#ifdef CONFIG_X86_32
82unsigned long patch_espfix_desc(unsigned long, unsigned long);
83#else
84asmlinkage void smp_thermal_interrupt(void);
85asmlinkage void mce_threshold_interrupt(void);
79#endif 86#endif
80 87
81#endif /* _ASM_X86_TRAPS_H */ 88#endif /* _ASM_X86_TRAPS_H */
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 9cd83a8e40d5..38ae163cc91b 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -34,8 +34,6 @@ static inline cycles_t get_cycles(void)
34 34
35static __always_inline cycles_t vget_cycles(void) 35static __always_inline cycles_t vget_cycles(void)
36{ 36{
37 cycles_t cycles;
38
39 /* 37 /*
40 * We only do VDSOs on TSC capable CPUs, so this shouldnt 38 * We only do VDSOs on TSC capable CPUs, so this shouldnt
41 * access boot_cpu_data (which is not VDSO-safe): 39 * access boot_cpu_data (which is not VDSO-safe):
@@ -44,11 +42,7 @@ static __always_inline cycles_t vget_cycles(void)
44 if (!cpu_has_tsc) 42 if (!cpu_has_tsc)
45 return 0; 43 return 0;
46#endif 44#endif
47 rdtsc_barrier(); 45 return (cycles_t)__native_read_tsc();
48 cycles = (cycles_t)__native_read_tsc();
49 rdtsc_barrier();
50
51 return cycles;
52} 46}
53 47
54extern void tsc_init(void); 48extern void tsc_init(void);
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 35c54921b2e4..580c3ee6c58c 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -350,14 +350,14 @@ do { \
350 350
351#define __put_user_nocheck(x, ptr, size) \ 351#define __put_user_nocheck(x, ptr, size) \
352({ \ 352({ \
353 long __pu_err; \ 353 int __pu_err; \
354 __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \ 354 __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \
355 __pu_err; \ 355 __pu_err; \
356}) 356})
357 357
358#define __get_user_nocheck(x, ptr, size) \ 358#define __get_user_nocheck(x, ptr, size) \
359({ \ 359({ \
360 long __gu_err; \ 360 int __gu_err; \
361 unsigned long __gu_val; \ 361 unsigned long __gu_val; \
362 __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \ 362 __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \
363 (x) = (__force __typeof__(*(ptr)))__gu_val; \ 363 (x) = (__force __typeof__(*(ptr)))__gu_val; \
diff --git a/arch/x86/include/asm/uv/bios.h b/arch/x86/include/asm/uv/bios.h
index d931d3b7e6f7..7ed17ff502b9 100644
--- a/arch/x86/include/asm/uv/bios.h
+++ b/arch/x86/include/asm/uv/bios.h
@@ -32,13 +32,18 @@
32enum uv_bios_cmd { 32enum uv_bios_cmd {
33 UV_BIOS_COMMON, 33 UV_BIOS_COMMON,
34 UV_BIOS_GET_SN_INFO, 34 UV_BIOS_GET_SN_INFO,
35 UV_BIOS_FREQ_BASE 35 UV_BIOS_FREQ_BASE,
36 UV_BIOS_WATCHLIST_ALLOC,
37 UV_BIOS_WATCHLIST_FREE,
38 UV_BIOS_MEMPROTECT,
39 UV_BIOS_GET_PARTITION_ADDR
36}; 40};
37 41
38/* 42/*
39 * Status values returned from a BIOS call. 43 * Status values returned from a BIOS call.
40 */ 44 */
41enum { 45enum {
46 BIOS_STATUS_MORE_PASSES = 1,
42 BIOS_STATUS_SUCCESS = 0, 47 BIOS_STATUS_SUCCESS = 0,
43 BIOS_STATUS_UNIMPLEMENTED = -ENOSYS, 48 BIOS_STATUS_UNIMPLEMENTED = -ENOSYS,
44 BIOS_STATUS_EINVAL = -EINVAL, 49 BIOS_STATUS_EINVAL = -EINVAL,
@@ -71,6 +76,21 @@ union partition_info_u {
71 }; 76 };
72}; 77};
73 78
79union uv_watchlist_u {
80 u64 val;
81 struct {
82 u64 blade : 16,
83 size : 32,
84 filler : 16;
85 };
86};
87
88enum uv_memprotect {
89 UV_MEMPROT_RESTRICT_ACCESS,
90 UV_MEMPROT_ALLOW_AMO,
91 UV_MEMPROT_ALLOW_RW
92};
93
74/* 94/*
75 * bios calls have 6 parameters 95 * bios calls have 6 parameters
76 */ 96 */
@@ -80,14 +100,20 @@ extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64);
80 100
81extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *); 101extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *);
82extern s64 uv_bios_freq_base(u64, u64 *); 102extern s64 uv_bios_freq_base(u64, u64 *);
103extern int uv_bios_mq_watchlist_alloc(int, unsigned long, unsigned int,
104 unsigned long *);
105extern int uv_bios_mq_watchlist_free(int, int);
106extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
107extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *);
83 108
84extern void uv_bios_init(void); 109extern void uv_bios_init(void);
85 110
111extern unsigned long sn_rtc_cycles_per_second;
86extern int uv_type; 112extern int uv_type;
87extern long sn_partition_id; 113extern long sn_partition_id;
88extern long uv_coherency_id; 114extern long sn_coherency_id;
89extern long uv_region_size; 115extern long sn_region_size;
90#define partition_coherence_id() (uv_coherency_id) 116#define partition_coherence_id() (sn_coherency_id)
91 117
92extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */ 118extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */
93 119
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 7a5782610b2b..777327ef05c1 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -113,25 +113,37 @@
113 */ 113 */
114#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2) 114#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2)
115 115
116struct uv_scir_s {
117 struct timer_list timer;
118 unsigned long offset;
119 unsigned long last;
120 unsigned long idle_on;
121 unsigned long idle_off;
122 unsigned char state;
123 unsigned char enabled;
124};
125
116/* 126/*
117 * The following defines attributes of the HUB chip. These attributes are 127 * The following defines attributes of the HUB chip. These attributes are
118 * frequently referenced and are kept in the per-cpu data areas of each cpu. 128 * frequently referenced and are kept in the per-cpu data areas of each cpu.
119 * They are kept together in a struct to minimize cache misses. 129 * They are kept together in a struct to minimize cache misses.
120 */ 130 */
121struct uv_hub_info_s { 131struct uv_hub_info_s {
122 unsigned long global_mmr_base; 132 unsigned long global_mmr_base;
123 unsigned long gpa_mask; 133 unsigned long gpa_mask;
124 unsigned long gnode_upper; 134 unsigned long gnode_upper;
125 unsigned long lowmem_remap_top; 135 unsigned long lowmem_remap_top;
126 unsigned long lowmem_remap_base; 136 unsigned long lowmem_remap_base;
127 unsigned short pnode; 137 unsigned short pnode;
128 unsigned short pnode_mask; 138 unsigned short pnode_mask;
129 unsigned short coherency_domain_number; 139 unsigned short coherency_domain_number;
130 unsigned short numa_blade_id; 140 unsigned short numa_blade_id;
131 unsigned char blade_processor_id; 141 unsigned char blade_processor_id;
132 unsigned char m_val; 142 unsigned char m_val;
133 unsigned char n_val; 143 unsigned char n_val;
144 struct uv_scir_s scir;
134}; 145};
146
135DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); 147DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
136#define uv_hub_info (&__get_cpu_var(__uv_hub_info)) 148#define uv_hub_info (&__get_cpu_var(__uv_hub_info))
137#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) 149#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu))
@@ -163,6 +175,30 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
163 175
164#define UV_APIC_PNODE_SHIFT 6 176#define UV_APIC_PNODE_SHIFT 6
165 177
178/* Local Bus from cpu's perspective */
179#define LOCAL_BUS_BASE 0x1c00000
180#define LOCAL_BUS_SIZE (4 * 1024 * 1024)
181
182/*
183 * System Controller Interface Reg
184 *
185 * Note there are NO leds on a UV system. This register is only
186 * used by the system controller to monitor system-wide operation.
187 * There are 64 regs per node. With Nahelem cpus (2 cores per node,
188 * 8 cpus per core, 2 threads per cpu) there are 32 cpu threads on
189 * a node.
190 *
191 * The window is located at top of ACPI MMR space
192 */
193#define SCIR_WINDOW_COUNT 64
194#define SCIR_LOCAL_MMR_BASE (LOCAL_BUS_BASE + \
195 LOCAL_BUS_SIZE - \
196 SCIR_WINDOW_COUNT)
197
198#define SCIR_CPU_HEARTBEAT 0x01 /* timer interrupt */
199#define SCIR_CPU_ACTIVITY 0x02 /* not idle */
200#define SCIR_CPU_HB_INTERVAL (HZ) /* once per second */
201
166/* 202/*
167 * Macros for converting between kernel virtual addresses, socket local physical 203 * Macros for converting between kernel virtual addresses, socket local physical
168 * addresses, and UV global physical addresses. 204 * addresses, and UV global physical addresses.
@@ -174,7 +210,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
174static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr) 210static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
175{ 211{
176 if (paddr < uv_hub_info->lowmem_remap_top) 212 if (paddr < uv_hub_info->lowmem_remap_top)
177 paddr += uv_hub_info->lowmem_remap_base; 213 paddr |= uv_hub_info->lowmem_remap_base;
178 return paddr | uv_hub_info->gnode_upper; 214 return paddr | uv_hub_info->gnode_upper;
179} 215}
180 216
@@ -182,19 +218,7 @@ static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
182/* socket virtual --> UV global physical address */ 218/* socket virtual --> UV global physical address */
183static inline unsigned long uv_gpa(void *v) 219static inline unsigned long uv_gpa(void *v)
184{ 220{
185 return __pa(v) | uv_hub_info->gnode_upper; 221 return uv_soc_phys_ram_to_gpa(__pa(v));
186}
187
188/* socket virtual --> UV global physical address */
189static inline void *uv_vgpa(void *v)
190{
191 return (void *)uv_gpa(v);
192}
193
194/* UV global physical address --> socket virtual */
195static inline void *uv_va(unsigned long gpa)
196{
197 return __va(gpa & uv_hub_info->gpa_mask);
198} 222}
199 223
200/* pnode, offset --> socket virtual */ 224/* pnode, offset --> socket virtual */
@@ -277,6 +301,16 @@ static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
277 *uv_local_mmr_address(offset) = val; 301 *uv_local_mmr_address(offset) = val;
278} 302}
279 303
304static inline unsigned char uv_read_local_mmr8(unsigned long offset)
305{
306 return *((unsigned char *)uv_local_mmr_address(offset));
307}
308
309static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val)
310{
311 *((unsigned char *)uv_local_mmr_address(offset)) = val;
312}
313
280/* 314/*
281 * Structures and definitions for converting between cpu, node, pnode, and blade 315 * Structures and definitions for converting between cpu, node, pnode, and blade
282 * numbers. 316 * numbers.
@@ -351,5 +385,20 @@ static inline int uv_num_possible_blades(void)
351 return uv_possible_blades; 385 return uv_possible_blades;
352} 386}
353 387
354#endif /* _ASM_X86_UV_UV_HUB_H */ 388/* Update SCIR state */
389static inline void uv_set_scir_bits(unsigned char value)
390{
391 if (uv_hub_info->scir.state != value) {
392 uv_hub_info->scir.state = value;
393 uv_write_local_mmr8(uv_hub_info->scir.offset, value);
394 }
395}
396static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
397{
398 if (uv_cpu_hub_info(cpu)->scir.state != value) {
399 uv_cpu_hub_info(cpu)->scir.state = value;
400 uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value);
401 }
402}
355 403
404#endif /* _ASM_X86_UV_UV_HUB_H */
diff --git a/arch/x86/include/asm/vmi.h b/arch/x86/include/asm/vmi.h
index b7c0dea119fe..61e08c0a2907 100644
--- a/arch/x86/include/asm/vmi.h
+++ b/arch/x86/include/asm/vmi.h
@@ -223,9 +223,15 @@ struct pci_header {
223} __attribute__((packed)); 223} __attribute__((packed));
224 224
225/* Function prototypes for bootstrapping */ 225/* Function prototypes for bootstrapping */
226#ifdef CONFIG_VMI
226extern void vmi_init(void); 227extern void vmi_init(void);
228extern void vmi_activate(void);
227extern void vmi_bringup(void); 229extern void vmi_bringup(void);
228extern void vmi_apply_boot_page_allocations(void); 230#else
231static inline void vmi_init(void) {}
232static inline void vmi_activate(void) {}
233static inline void vmi_bringup(void) {}
234#endif
229 235
230/* State needed to start an application processor in an SMP system. */ 236/* State needed to start an application processor in an SMP system. */
231struct vmi_ap_state { 237struct vmi_ap_state {
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h
new file mode 100644
index 000000000000..c11b7e100d83
--- /dev/null
+++ b/arch/x86/include/asm/vmware.h
@@ -0,0 +1,27 @@
1/*
2 * Copyright (C) 2008, VMware, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more
13 * details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 */
20#ifndef ASM_X86__VMWARE_H
21#define ASM_X86__VMWARE_H
22
23extern unsigned long vmware_get_tsc_khz(void);
24extern int vmware_platform(void);
25extern void vmware_set_feature_bits(struct cpuinfo_x86 *c);
26
27#endif
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 3f6000d95fe2..5e79ca694326 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -33,8 +33,14 @@
33#ifndef _ASM_X86_XEN_HYPERCALL_H 33#ifndef _ASM_X86_XEN_HYPERCALL_H
34#define _ASM_X86_XEN_HYPERCALL_H 34#define _ASM_X86_XEN_HYPERCALL_H
35 35
36#include <linux/kernel.h>
37#include <linux/spinlock.h>
36#include <linux/errno.h> 38#include <linux/errno.h>
37#include <linux/string.h> 39#include <linux/string.h>
40#include <linux/types.h>
41
42#include <asm/page.h>
43#include <asm/pgtable.h>
38 44
39#include <xen/interface/xen.h> 45#include <xen/interface/xen.h>
40#include <xen/interface/sched.h> 46#include <xen/interface/sched.h>
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index a38d25ac87d2..81fbd735aec4 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -33,39 +33,10 @@
33#ifndef _ASM_X86_XEN_HYPERVISOR_H 33#ifndef _ASM_X86_XEN_HYPERVISOR_H
34#define _ASM_X86_XEN_HYPERVISOR_H 34#define _ASM_X86_XEN_HYPERVISOR_H
35 35
36#include <linux/types.h>
37#include <linux/kernel.h>
38
39#include <xen/interface/xen.h>
40#include <xen/interface/version.h>
41
42#include <asm/ptrace.h>
43#include <asm/page.h>
44#include <asm/desc.h>
45#if defined(__i386__)
46# ifdef CONFIG_X86_PAE
47# include <asm-generic/pgtable-nopud.h>
48# else
49# include <asm-generic/pgtable-nopmd.h>
50# endif
51#endif
52#include <asm/xen/hypercall.h>
53
54/* arch/i386/kernel/setup.c */ 36/* arch/i386/kernel/setup.c */
55extern struct shared_info *HYPERVISOR_shared_info; 37extern struct shared_info *HYPERVISOR_shared_info;
56extern struct start_info *xen_start_info; 38extern struct start_info *xen_start_info;
57 39
58/* arch/i386/mach-xen/evtchn.c */
59/* Force a proper event-channel callback from Xen. */
60extern void force_evtchn_callback(void);
61
62/* Turn jiffies into Xen system time. */
63u64 jiffies_to_st(unsigned long jiffies);
64
65
66#define MULTI_UVMFLAGS_INDEX 3
67#define MULTI_UVMDOMID_INDEX 4
68
69enum xen_domain_type { 40enum xen_domain_type {
70 XEN_NATIVE, 41 XEN_NATIVE,
71 XEN_PV_DOMAIN, 42 XEN_PV_DOMAIN,
@@ -74,9 +45,15 @@ enum xen_domain_type {
74 45
75extern enum xen_domain_type xen_domain_type; 46extern enum xen_domain_type xen_domain_type;
76 47
48#ifdef CONFIG_XEN
77#define xen_domain() (xen_domain_type != XEN_NATIVE) 49#define xen_domain() (xen_domain_type != XEN_NATIVE)
78#define xen_pv_domain() (xen_domain_type == XEN_PV_DOMAIN) 50#else
51#define xen_domain() (0)
52#endif
53
54#define xen_pv_domain() (xen_domain() && xen_domain_type == XEN_PV_DOMAIN)
55#define xen_hvm_domain() (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN)
56
79#define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN) 57#define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN)
80#define xen_hvm_domain() (xen_domain_type == XEN_HVM_DOMAIN)
81 58
82#endif /* _ASM_X86_XEN_HYPERVISOR_H */ 59#endif /* _ASM_X86_XEN_HYPERVISOR_H */
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index bc628998a1b9..7ef617ef1df3 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -1,11 +1,16 @@
1#ifndef _ASM_X86_XEN_PAGE_H 1#ifndef _ASM_X86_XEN_PAGE_H
2#define _ASM_X86_XEN_PAGE_H 2#define _ASM_X86_XEN_PAGE_H
3 3
4#include <linux/kernel.h>
5#include <linux/types.h>
6#include <linux/spinlock.h>
4#include <linux/pfn.h> 7#include <linux/pfn.h>
5 8
6#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10#include <asm/page.h>
7#include <asm/pgtable.h> 11#include <asm/pgtable.h>
8 12
13#include <xen/interface/xen.h>
9#include <xen/features.h> 14#include <xen/features.h>
10 15
11/* Xen machine address */ 16/* Xen machine address */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index b62a7667828e..88dd768eab6d 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -12,6 +12,7 @@ CFLAGS_REMOVE_tsc.o = -pg
12CFLAGS_REMOVE_rtc.o = -pg 12CFLAGS_REMOVE_rtc.o = -pg
13CFLAGS_REMOVE_paravirt-spinlocks.o = -pg 13CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
14CFLAGS_REMOVE_ftrace.o = -pg 14CFLAGS_REMOVE_ftrace.o = -pg
15CFLAGS_REMOVE_early_printk.o = -pg
15endif 16endif
16 17
17# 18#
@@ -23,9 +24,9 @@ CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp)
23CFLAGS_hpet.o := $(nostackp) 24CFLAGS_hpet.o := $(nostackp)
24CFLAGS_tsc.o := $(nostackp) 25CFLAGS_tsc.o := $(nostackp)
25 26
26obj-y := process_$(BITS).o signal_$(BITS).o entry_$(BITS).o 27obj-y := process_$(BITS).o signal.o entry_$(BITS).o
27obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o 28obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
28obj-y += time_$(BITS).o ioport.o ldt.o 29obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o
29obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o 30obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o
30obj-$(CONFIG_X86_VISWS) += visws_quirks.o 31obj-$(CONFIG_X86_VISWS) += visws_quirks.o
31obj-$(CONFIG_X86_32) += probe_roms_32.o 32obj-$(CONFIG_X86_32) += probe_roms_32.o
@@ -65,6 +66,7 @@ obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o
65obj-$(CONFIG_X86_IO_APIC) += io_apic.o 66obj-$(CONFIG_X86_IO_APIC) += io_apic.o
66obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o 67obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o
67obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 68obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
69obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
68obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o 70obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o
69obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o 71obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o
70obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o 72obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o
@@ -105,6 +107,8 @@ microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o
105microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o 107microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o
106obj-$(CONFIG_MICROCODE) += microcode.o 108obj-$(CONFIG_MICROCODE) += microcode.o
107 109
110obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
111
108### 112###
109# 64 bit specific files 113# 64 bit specific files
110ifeq ($(CONFIG_X86_64),y) 114ifeq ($(CONFIG_X86_64),y)
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4c51a2f8fd31..65d0b72777ea 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -1360,6 +1360,17 @@ static void __init acpi_process_madt(void)
1360 disable_acpi(); 1360 disable_acpi();
1361 } 1361 }
1362 } 1362 }
1363
1364 /*
1365 * ACPI supports both logical (e.g. Hyper-Threading) and physical
1366 * processors, where MPS only supports physical.
1367 */
1368 if (acpi_lapic && acpi_ioapic)
1369 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
1370 "information\n");
1371 else if (acpi_lapic)
1372 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
1373 "configuration information\n");
1363#endif 1374#endif
1364 return; 1375 return;
1365} 1376}
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index a7b6dec6fc3f..2e2da717b350 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -24,6 +24,7 @@
24#include <linux/iommu-helper.h> 24#include <linux/iommu-helper.h>
25#include <asm/proto.h> 25#include <asm/proto.h>
26#include <asm/iommu.h> 26#include <asm/iommu.h>
27#include <asm/gart.h>
27#include <asm/amd_iommu_types.h> 28#include <asm/amd_iommu_types.h>
28#include <asm/amd_iommu.h> 29#include <asm/amd_iommu.h>
29 30
@@ -235,8 +236,9 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
235 status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; 236 status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
236 writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); 237 writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
237 238
238 if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) 239 if (unlikely(i == EXIT_LOOP_COUNT))
239 printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); 240 panic("AMD IOMMU: Completion wait loop failed\n");
241
240out: 242out:
241 spin_unlock_irqrestore(&iommu->lock, flags); 243 spin_unlock_irqrestore(&iommu->lock, flags);
242 244
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 30ae2701b3df..c625800c55ca 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -28,6 +28,7 @@
28#include <asm/amd_iommu_types.h> 28#include <asm/amd_iommu_types.h>
29#include <asm/amd_iommu.h> 29#include <asm/amd_iommu.h>
30#include <asm/iommu.h> 30#include <asm/iommu.h>
31#include <asm/gart.h>
31 32
32/* 33/*
33 * definitions for the ACPI scanning code 34 * definitions for the ACPI scanning code
@@ -427,6 +428,10 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
427 memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, 428 memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET,
428 &entry, sizeof(entry)); 429 &entry, sizeof(entry));
429 430
431 /* set head and tail to zero manually */
432 writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
433 writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
434
430 iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); 435 iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
431 436
432 return cmd_buf; 437 return cmd_buf;
@@ -1074,7 +1079,8 @@ int __init amd_iommu_init(void)
1074 goto free; 1079 goto free;
1075 1080
1076 /* IOMMU rlookup table - find the IOMMU for a specific device */ 1081 /* IOMMU rlookup table - find the IOMMU for a specific device */
1077 amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL, 1082 amd_iommu_rlookup_table = (void *)__get_free_pages(
1083 GFP_KERNEL | __GFP_ZERO,
1078 get_order(rlookup_table_size)); 1084 get_order(rlookup_table_size));
1079 if (amd_iommu_rlookup_table == NULL) 1085 if (amd_iommu_rlookup_table == NULL)
1080 goto free; 1086 goto free;
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 9a32b37ee2ee..676debfc1702 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -1,8 +1,9 @@
1/* 1/*
2 * Firmware replacement code. 2 * Firmware replacement code.
3 * 3 *
4 * Work around broken BIOSes that don't set an aperture or only set the 4 * Work around broken BIOSes that don't set an aperture, only set the
5 * aperture in the AGP bridge. 5 * aperture in the AGP bridge, or set too small aperture.
6 *
6 * If all fails map the aperture over some low memory. This is cheaper than 7 * If all fails map the aperture over some low memory. This is cheaper than
7 * doing bounce buffering. The memory is lost. This is done at early boot 8 * doing bounce buffering. The memory is lost. This is done at early boot
8 * because only the bootmem allocator can allocate 32+MB. 9 * because only the bootmem allocator can allocate 32+MB.
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index b2cef49f3085..6107b41da9a5 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/dmi.h> 31#include <linux/dmi.h>
32#include <linux/dmar.h> 32#include <linux/dmar.h>
33#include <linux/ftrace.h>
33 34
34#include <asm/atomic.h> 35#include <asm/atomic.h>
35#include <asm/smp.h> 36#include <asm/smp.h>
@@ -441,6 +442,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
441 v = apic_read(APIC_LVTT); 442 v = apic_read(APIC_LVTT);
442 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); 443 v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
443 apic_write(APIC_LVTT, v); 444 apic_write(APIC_LVTT, v);
445 apic_write(APIC_TMICT, 0xffffffff);
444 break; 446 break;
445 case CLOCK_EVT_MODE_RESUME: 447 case CLOCK_EVT_MODE_RESUME:
446 /* Nothing to do here */ 448 /* Nothing to do here */
@@ -559,13 +561,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
559 } else { 561 } else {
560 res = (((u64)deltapm) * mult) >> 22; 562 res = (((u64)deltapm) * mult) >> 22;
561 do_div(res, 1000000); 563 do_div(res, 1000000);
562 printk(KERN_WARNING "APIC calibration not consistent " 564 pr_warning("APIC calibration not consistent "
563 "with PM Timer: %ldms instead of 100ms\n", 565 "with PM Timer: %ldms instead of 100ms\n",
564 (long)res); 566 (long)res);
565 /* Correct the lapic counter value */ 567 /* Correct the lapic counter value */
566 res = (((u64)(*delta)) * pm_100ms); 568 res = (((u64)(*delta)) * pm_100ms);
567 do_div(res, deltapm); 569 do_div(res, deltapm);
568 printk(KERN_INFO "APIC delta adjusted to PM-Timer: " 570 pr_info("APIC delta adjusted to PM-Timer: "
569 "%lu (%ld)\n", (unsigned long)res, *delta); 571 "%lu (%ld)\n", (unsigned long)res, *delta);
570 *delta = (long)res; 572 *delta = (long)res;
571 } 573 }
@@ -645,8 +647,7 @@ static int __init calibrate_APIC_clock(void)
645 */ 647 */
646 if (calibration_result < (1000000 / HZ)) { 648 if (calibration_result < (1000000 / HZ)) {
647 local_irq_enable(); 649 local_irq_enable();
648 printk(KERN_WARNING 650 pr_warning("APIC frequency too slow, disabling apic timer\n");
649 "APIC frequency too slow, disabling apic timer\n");
650 return -1; 651 return -1;
651 } 652 }
652 653
@@ -672,13 +673,9 @@ static int __init calibrate_APIC_clock(void)
672 while (lapic_cal_loops <= LAPIC_CAL_LOOPS) 673 while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
673 cpu_relax(); 674 cpu_relax();
674 675
675 local_irq_disable();
676
677 /* Stop the lapic timer */ 676 /* Stop the lapic timer */
678 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); 677 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
679 678
680 local_irq_enable();
681
682 /* Jiffies delta */ 679 /* Jiffies delta */
683 deltaj = lapic_cal_j2 - lapic_cal_j1; 680 deltaj = lapic_cal_j2 - lapic_cal_j1;
684 apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); 681 apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
@@ -692,8 +689,7 @@ static int __init calibrate_APIC_clock(void)
692 local_irq_enable(); 689 local_irq_enable();
693 690
694 if (levt->features & CLOCK_EVT_FEAT_DUMMY) { 691 if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
695 printk(KERN_WARNING 692 pr_warning("APIC timer disabled due to verification failure.\n");
696 "APIC timer disabled due to verification failure.\n");
697 return -1; 693 return -1;
698 } 694 }
699 695
@@ -714,7 +710,7 @@ void __init setup_boot_APIC_clock(void)
714 * broadcast mechanism is used. On UP systems simply ignore it. 710 * broadcast mechanism is used. On UP systems simply ignore it.
715 */ 711 */
716 if (disable_apic_timer) { 712 if (disable_apic_timer) {
717 printk(KERN_INFO "Disabling APIC timer\n"); 713 pr_info("Disabling APIC timer\n");
718 /* No broadcast on UP ! */ 714 /* No broadcast on UP ! */
719 if (num_possible_cpus() > 1) { 715 if (num_possible_cpus() > 1) {
720 lapic_clockevent.mult = 1; 716 lapic_clockevent.mult = 1;
@@ -741,7 +737,7 @@ void __init setup_boot_APIC_clock(void)
741 if (nmi_watchdog != NMI_IO_APIC) 737 if (nmi_watchdog != NMI_IO_APIC)
742 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; 738 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
743 else 739 else
744 printk(KERN_WARNING "APIC timer registered as dummy," 740 pr_warning("APIC timer registered as dummy,"
745 " due to nmi_watchdog=%d!\n", nmi_watchdog); 741 " due to nmi_watchdog=%d!\n", nmi_watchdog);
746 742
747 /* Setup the lapic or request the broadcast */ 743 /* Setup the lapic or request the broadcast */
@@ -773,8 +769,7 @@ static void local_apic_timer_interrupt(void)
773 * spurious. 769 * spurious.
774 */ 770 */
775 if (!evt->event_handler) { 771 if (!evt->event_handler) {
776 printk(KERN_WARNING 772 pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu);
777 "Spurious LAPIC timer interrupt on cpu %d\n", cpu);
778 /* Switch it off */ 773 /* Switch it off */
779 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); 774 lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
780 return; 775 return;
@@ -783,11 +778,7 @@ static void local_apic_timer_interrupt(void)
783 /* 778 /*
784 * the NMI deadlock-detector uses this. 779 * the NMI deadlock-detector uses this.
785 */ 780 */
786#ifdef CONFIG_X86_64 781 inc_irq_stat(apic_timer_irqs);
787 add_pda(apic_timer_irqs, 1);
788#else
789 per_cpu(irq_stat, cpu).apic_timer_irqs++;
790#endif
791 782
792 evt->event_handler(evt); 783 evt->event_handler(evt);
793} 784}
@@ -800,7 +791,7 @@ static void local_apic_timer_interrupt(void)
800 * [ if a single-CPU system runs an SMP kernel then we call the local 791 * [ if a single-CPU system runs an SMP kernel then we call the local
801 * interrupt as well. Thus we cannot inline the local irq ... ] 792 * interrupt as well. Thus we cannot inline the local irq ... ]
802 */ 793 */
803void smp_apic_timer_interrupt(struct pt_regs *regs) 794void __irq_entry smp_apic_timer_interrupt(struct pt_regs *regs)
804{ 795{
805 struct pt_regs *old_regs = set_irq_regs(regs); 796 struct pt_regs *old_regs = set_irq_regs(regs);
806 797
@@ -814,9 +805,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
814 * Besides, if we don't timer interrupts ignore the global 805 * Besides, if we don't timer interrupts ignore the global
815 * interrupt lock, which is the WrongThing (tm) to do. 806 * interrupt lock, which is the WrongThing (tm) to do.
816 */ 807 */
817#ifdef CONFIG_X86_64
818 exit_idle(); 808 exit_idle();
819#endif
820 irq_enter(); 809 irq_enter();
821 local_apic_timer_interrupt(); 810 local_apic_timer_interrupt();
822 irq_exit(); 811 irq_exit();
@@ -1093,7 +1082,7 @@ static void __cpuinit lapic_setup_esr(void)
1093 unsigned int oldvalue, value, maxlvt; 1082 unsigned int oldvalue, value, maxlvt;
1094 1083
1095 if (!lapic_is_integrated()) { 1084 if (!lapic_is_integrated()) {
1096 printk(KERN_INFO "No ESR for 82489DX.\n"); 1085 pr_info("No ESR for 82489DX.\n");
1097 return; 1086 return;
1098 } 1087 }
1099 1088
@@ -1104,7 +1093,7 @@ static void __cpuinit lapic_setup_esr(void)
1104 * ESR disabled - we can't do anything useful with the 1093 * ESR disabled - we can't do anything useful with the
1105 * errors anyway - mbligh 1094 * errors anyway - mbligh
1106 */ 1095 */
1107 printk(KERN_INFO "Leaving ESR disabled.\n"); 1096 pr_info("Leaving ESR disabled.\n");
1108 return; 1097 return;
1109 } 1098 }
1110 1099
@@ -1298,7 +1287,7 @@ void check_x2apic(void)
1298 rdmsr(MSR_IA32_APICBASE, msr, msr2); 1287 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1299 1288
1300 if (msr & X2APIC_ENABLE) { 1289 if (msr & X2APIC_ENABLE) {
1301 printk("x2apic enabled by BIOS, switching to x2apic ops\n"); 1290 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
1302 x2apic_preenabled = x2apic = 1; 1291 x2apic_preenabled = x2apic = 1;
1303 apic_ops = &x2apic_ops; 1292 apic_ops = &x2apic_ops;
1304 } 1293 }
@@ -1310,7 +1299,7 @@ void enable_x2apic(void)
1310 1299
1311 rdmsr(MSR_IA32_APICBASE, msr, msr2); 1300 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1312 if (!(msr & X2APIC_ENABLE)) { 1301 if (!(msr & X2APIC_ENABLE)) {
1313 printk("Enabling x2apic\n"); 1302 pr_info("Enabling x2apic\n");
1314 wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); 1303 wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
1315 } 1304 }
1316} 1305}
@@ -1325,9 +1314,8 @@ void __init enable_IR_x2apic(void)
1325 return; 1314 return;
1326 1315
1327 if (!x2apic_preenabled && disable_x2apic) { 1316 if (!x2apic_preenabled && disable_x2apic) {
1328 printk(KERN_INFO 1317 pr_info("Skipped enabling x2apic and Interrupt-remapping "
1329 "Skipped enabling x2apic and Interrupt-remapping " 1318 "because of nox2apic\n");
1330 "because of nox2apic\n");
1331 return; 1319 return;
1332 } 1320 }
1333 1321
@@ -1335,22 +1323,19 @@ void __init enable_IR_x2apic(void)
1335 panic("Bios already enabled x2apic, can't enforce nox2apic"); 1323 panic("Bios already enabled x2apic, can't enforce nox2apic");
1336 1324
1337 if (!x2apic_preenabled && skip_ioapic_setup) { 1325 if (!x2apic_preenabled && skip_ioapic_setup) {
1338 printk(KERN_INFO 1326 pr_info("Skipped enabling x2apic and Interrupt-remapping "
1339 "Skipped enabling x2apic and Interrupt-remapping " 1327 "because of skipping io-apic setup\n");
1340 "because of skipping io-apic setup\n");
1341 return; 1328 return;
1342 } 1329 }
1343 1330
1344 ret = dmar_table_init(); 1331 ret = dmar_table_init();
1345 if (ret) { 1332 if (ret) {
1346 printk(KERN_INFO 1333 pr_info("dmar_table_init() failed with %d:\n", ret);
1347 "dmar_table_init() failed with %d:\n", ret);
1348 1334
1349 if (x2apic_preenabled) 1335 if (x2apic_preenabled)
1350 panic("x2apic enabled by bios. But IR enabling failed"); 1336 panic("x2apic enabled by bios. But IR enabling failed");
1351 else 1337 else
1352 printk(KERN_INFO 1338 pr_info("Not enabling x2apic,Intr-remapping\n");
1353 "Not enabling x2apic,Intr-remapping\n");
1354 return; 1339 return;
1355 } 1340 }
1356 1341
@@ -1359,7 +1344,7 @@ void __init enable_IR_x2apic(void)
1359 1344
1360 ret = save_mask_IO_APIC_setup(); 1345 ret = save_mask_IO_APIC_setup();
1361 if (ret) { 1346 if (ret) {
1362 printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret); 1347 pr_info("Saving IO-APIC state failed: %d\n", ret);
1363 goto end; 1348 goto end;
1364 } 1349 }
1365 1350
@@ -1394,14 +1379,11 @@ end:
1394 1379
1395 if (!ret) { 1380 if (!ret) {
1396 if (!x2apic_preenabled) 1381 if (!x2apic_preenabled)
1397 printk(KERN_INFO 1382 pr_info("Enabled x2apic and interrupt-remapping\n");
1398 "Enabled x2apic and interrupt-remapping\n");
1399 else 1383 else
1400 printk(KERN_INFO 1384 pr_info("Enabled Interrupt-remapping\n");
1401 "Enabled Interrupt-remapping\n");
1402 } else 1385 } else
1403 printk(KERN_ERR 1386 pr_err("Failed to enable Interrupt-remapping and x2apic\n");
1404 "Failed to enable Interrupt-remapping and x2apic\n");
1405#else 1387#else
1406 if (!cpu_has_x2apic) 1388 if (!cpu_has_x2apic)
1407 return; 1389 return;
@@ -1410,8 +1392,8 @@ end:
1410 panic("x2apic enabled prior OS handover," 1392 panic("x2apic enabled prior OS handover,"
1411 " enable CONFIG_INTR_REMAP"); 1393 " enable CONFIG_INTR_REMAP");
1412 1394
1413 printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " 1395 pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping "
1414 " and x2apic\n"); 1396 " and x2apic\n");
1415#endif 1397#endif
1416 1398
1417 return; 1399 return;
@@ -1428,7 +1410,7 @@ end:
1428static int __init detect_init_APIC(void) 1410static int __init detect_init_APIC(void)
1429{ 1411{
1430 if (!cpu_has_apic) { 1412 if (!cpu_has_apic) {
1431 printk(KERN_INFO "No local APIC present\n"); 1413 pr_info("No local APIC present\n");
1432 return -1; 1414 return -1;
1433 } 1415 }
1434 1416
@@ -1469,8 +1451,8 @@ static int __init detect_init_APIC(void)
1469 * "lapic" specified. 1451 * "lapic" specified.
1470 */ 1452 */
1471 if (!force_enable_local_apic) { 1453 if (!force_enable_local_apic) {
1472 printk(KERN_INFO "Local APIC disabled by BIOS -- " 1454 pr_info("Local APIC disabled by BIOS -- "
1473 "you can enable it with \"lapic\"\n"); 1455 "you can enable it with \"lapic\"\n");
1474 return -1; 1456 return -1;
1475 } 1457 }
1476 /* 1458 /*
@@ -1480,8 +1462,7 @@ static int __init detect_init_APIC(void)
1480 */ 1462 */
1481 rdmsr(MSR_IA32_APICBASE, l, h); 1463 rdmsr(MSR_IA32_APICBASE, l, h);
1482 if (!(l & MSR_IA32_APICBASE_ENABLE)) { 1464 if (!(l & MSR_IA32_APICBASE_ENABLE)) {
1483 printk(KERN_INFO 1465 pr_info("Local APIC disabled by BIOS -- reenabling.\n");
1484 "Local APIC disabled by BIOS -- reenabling.\n");
1485 l &= ~MSR_IA32_APICBASE_BASE; 1466 l &= ~MSR_IA32_APICBASE_BASE;
1486 l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; 1467 l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
1487 wrmsr(MSR_IA32_APICBASE, l, h); 1468 wrmsr(MSR_IA32_APICBASE, l, h);
@@ -1494,7 +1475,7 @@ static int __init detect_init_APIC(void)
1494 */ 1475 */
1495 features = cpuid_edx(1); 1476 features = cpuid_edx(1);
1496 if (!(features & (1 << X86_FEATURE_APIC))) { 1477 if (!(features & (1 << X86_FEATURE_APIC))) {
1497 printk(KERN_WARNING "Could not enable APIC!\n"); 1478 pr_warning("Could not enable APIC!\n");
1498 return -1; 1479 return -1;
1499 } 1480 }
1500 set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); 1481 set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
@@ -1505,14 +1486,14 @@ static int __init detect_init_APIC(void)
1505 if (l & MSR_IA32_APICBASE_ENABLE) 1486 if (l & MSR_IA32_APICBASE_ENABLE)
1506 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; 1487 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
1507 1488
1508 printk(KERN_INFO "Found and enabled local APIC!\n"); 1489 pr_info("Found and enabled local APIC!\n");
1509 1490
1510 apic_pm_activate(); 1491 apic_pm_activate();
1511 1492
1512 return 0; 1493 return 0;
1513 1494
1514no_apic: 1495no_apic:
1515 printk(KERN_INFO "No local APIC present or hardware disabled\n"); 1496 pr_info("No local APIC present or hardware disabled\n");
1516 return -1; 1497 return -1;
1517} 1498}
1518#endif 1499#endif
@@ -1588,12 +1569,12 @@ int __init APIC_init_uniprocessor(void)
1588{ 1569{
1589#ifdef CONFIG_X86_64 1570#ifdef CONFIG_X86_64
1590 if (disable_apic) { 1571 if (disable_apic) {
1591 printk(KERN_INFO "Apic disabled\n"); 1572 pr_info("Apic disabled\n");
1592 return -1; 1573 return -1;
1593 } 1574 }
1594 if (!cpu_has_apic) { 1575 if (!cpu_has_apic) {
1595 disable_apic = 1; 1576 disable_apic = 1;
1596 printk(KERN_INFO "Apic disabled by BIOS\n"); 1577 pr_info("Apic disabled by BIOS\n");
1597 return -1; 1578 return -1;
1598 } 1579 }
1599#else 1580#else
@@ -1605,8 +1586,8 @@ int __init APIC_init_uniprocessor(void)
1605 */ 1586 */
1606 if (!cpu_has_apic && 1587 if (!cpu_has_apic &&
1607 APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { 1588 APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
1608 printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n", 1589 pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
1609 boot_cpu_physical_apicid); 1590 boot_cpu_physical_apicid);
1610 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); 1591 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
1611 return -1; 1592 return -1;
1612 } 1593 }
@@ -1682,9 +1663,7 @@ void smp_spurious_interrupt(struct pt_regs *regs)
1682{ 1663{
1683 u32 v; 1664 u32 v;
1684 1665
1685#ifdef CONFIG_X86_64
1686 exit_idle(); 1666 exit_idle();
1687#endif
1688 irq_enter(); 1667 irq_enter();
1689 /* 1668 /*
1690 * Check if this really is a spurious interrupt and ACK it 1669 * Check if this really is a spurious interrupt and ACK it
@@ -1695,14 +1674,11 @@ void smp_spurious_interrupt(struct pt_regs *regs)
1695 if (v & (1 << (SPURIOUS_APIC_VECTOR & 0x1f))) 1674 if (v & (1 << (SPURIOUS_APIC_VECTOR & 0x1f)))
1696 ack_APIC_irq(); 1675 ack_APIC_irq();
1697 1676
1698#ifdef CONFIG_X86_64 1677 inc_irq_stat(irq_spurious_count);
1699 add_pda(irq_spurious_count, 1); 1678
1700#else
1701 /* see sw-dev-man vol 3, chapter 7.4.13.5 */ 1679 /* see sw-dev-man vol 3, chapter 7.4.13.5 */
1702 printk(KERN_INFO "spurious APIC interrupt on CPU#%d, " 1680 pr_info("spurious APIC interrupt on CPU#%d, "
1703 "should never happen.\n", smp_processor_id()); 1681 "should never happen.\n", smp_processor_id());
1704 __get_cpu_var(irq_stat).irq_spurious_count++;
1705#endif
1706 irq_exit(); 1682 irq_exit();
1707} 1683}
1708 1684
@@ -1713,9 +1689,7 @@ void smp_error_interrupt(struct pt_regs *regs)
1713{ 1689{
1714 u32 v, v1; 1690 u32 v, v1;
1715 1691
1716#ifdef CONFIG_X86_64
1717 exit_idle(); 1692 exit_idle();
1718#endif
1719 irq_enter(); 1693 irq_enter();
1720 /* First tickle the hardware, only then report what went on. -- REW */ 1694 /* First tickle the hardware, only then report what went on. -- REW */
1721 v = apic_read(APIC_ESR); 1695 v = apic_read(APIC_ESR);
@@ -1724,17 +1698,18 @@ void smp_error_interrupt(struct pt_regs *regs)
1724 ack_APIC_irq(); 1698 ack_APIC_irq();
1725 atomic_inc(&irq_err_count); 1699 atomic_inc(&irq_err_count);
1726 1700
1727 /* Here is what the APIC error bits mean: 1701 /*
1728 0: Send CS error 1702 * Here is what the APIC error bits mean:
1729 1: Receive CS error 1703 * 0: Send CS error
1730 2: Send accept error 1704 * 1: Receive CS error
1731 3: Receive accept error 1705 * 2: Send accept error
1732 4: Reserved 1706 * 3: Receive accept error
1733 5: Send illegal vector 1707 * 4: Reserved
1734 6: Received illegal vector 1708 * 5: Send illegal vector
1735 7: Illegal register address 1709 * 6: Received illegal vector
1736 */ 1710 * 7: Illegal register address
1737 printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n", 1711 */
1712 pr_debug("APIC error on CPU%d: %02x(%02x)\n",
1738 smp_processor_id(), v , v1); 1713 smp_processor_id(), v , v1);
1739 irq_exit(); 1714 irq_exit();
1740} 1715}
@@ -1838,15 +1813,15 @@ void __cpuinit generic_processor_info(int apicid, int version)
1838 * Validate version 1813 * Validate version
1839 */ 1814 */
1840 if (version == 0x0) { 1815 if (version == 0x0) {
1841 printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! " 1816 pr_warning("BIOS bug, APIC version is 0 for CPU#%d! "
1842 "fixing up to 0x10. (tell your hw vendor)\n", 1817 "fixing up to 0x10. (tell your hw vendor)\n",
1843 version); 1818 version);
1844 version = 0x10; 1819 version = 0x10;
1845 } 1820 }
1846 apic_version[apicid] = version; 1821 apic_version[apicid] = version;
1847 1822
1848 if (num_processors >= NR_CPUS) { 1823 if (num_processors >= NR_CPUS) {
1849 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached." 1824 pr_warning("WARNING: NR_CPUS limit of %i reached."
1850 " Processor ignored.\n", NR_CPUS); 1825 " Processor ignored.\n", NR_CPUS);
1851 return; 1826 return;
1852 } 1827 }
@@ -2209,7 +2184,7 @@ static int __init apic_set_verbosity(char *arg)
2209 else if (strcmp("verbose", arg) == 0) 2184 else if (strcmp("verbose", arg) == 0)
2210 apic_verbosity = APIC_VERBOSE; 2185 apic_verbosity = APIC_VERBOSE;
2211 else { 2186 else {
2212 printk(KERN_WARNING "APIC Verbosity level %s not recognised" 2187 pr_warning("APIC Verbosity level %s not recognised"
2213 " use apic=verbose or apic=debug\n", arg); 2188 " use apic=verbose or apic=debug\n", arg);
2214 return -EINVAL; 2189 return -EINVAL;
2215 } 2190 }
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 5145a6e72bbb..3a26525a3f31 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -391,11 +391,7 @@ static int power_off;
391#else 391#else
392static int power_off = 1; 392static int power_off = 1;
393#endif 393#endif
394#ifdef CONFIG_APM_REAL_MODE_POWER_OFF
395static int realmode_power_off = 1;
396#else
397static int realmode_power_off; 394static int realmode_power_off;
398#endif
399#ifdef CONFIG_APM_ALLOW_INTS 395#ifdef CONFIG_APM_ALLOW_INTS
400static int allow_ints = 1; 396static int allow_ints = 1;
401#else 397#else
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index 6649d09ad88f..ee4df08feee6 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -11,7 +11,7 @@
11#include <linux/suspend.h> 11#include <linux/suspend.h>
12#include <linux/kbuild.h> 12#include <linux/kbuild.h>
13#include <asm/ucontext.h> 13#include <asm/ucontext.h>
14#include "sigframe.h" 14#include <asm/sigframe.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16#include <asm/fixmap.h> 16#include <asm/fixmap.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index 7fcf63d22f8b..1d41d3f1edbc 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -20,6 +20,8 @@
20 20
21#include <xen/interface/xen.h> 21#include <xen/interface/xen.h>
22 22
23#include <asm/sigframe.h>
24
23#define __NO_STUBS 1 25#define __NO_STUBS 1
24#undef __SYSCALL 26#undef __SYSCALL
25#undef _ASM_X86_UNISTD_64_H 27#undef _ASM_X86_UNISTD_64_H
@@ -87,7 +89,7 @@ int main(void)
87 BLANK(); 89 BLANK();
88#undef ENTRY 90#undef ENTRY
89 DEFINE(IA32_RT_SIGFRAME_sigcontext, 91 DEFINE(IA32_RT_SIGFRAME_sigcontext,
90 offsetof (struct rt_sigframe32, uc.uc_mcontext)); 92 offsetof (struct rt_sigframe_ia32, uc.uc_mcontext));
91 BLANK(); 93 BLANK();
92#endif 94#endif
93 DEFINE(pbe_address, offsetof(struct pbe, address)); 95 DEFINE(pbe_address, offsetof(struct pbe, address));
diff --git a/arch/x86/kernel/bios_uv.c b/arch/x86/kernel/bios_uv.c
index f0dfe6f17e7e..2a0a2a3cac26 100644
--- a/arch/x86/kernel/bios_uv.c
+++ b/arch/x86/kernel/bios_uv.c
@@ -69,10 +69,10 @@ s64 uv_bios_call_reentrant(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3,
69 69
70long sn_partition_id; 70long sn_partition_id;
71EXPORT_SYMBOL_GPL(sn_partition_id); 71EXPORT_SYMBOL_GPL(sn_partition_id);
72long uv_coherency_id; 72long sn_coherency_id;
73EXPORT_SYMBOL_GPL(uv_coherency_id); 73EXPORT_SYMBOL_GPL(sn_coherency_id);
74long uv_region_size; 74long sn_region_size;
75EXPORT_SYMBOL_GPL(uv_region_size); 75EXPORT_SYMBOL_GPL(sn_region_size);
76int uv_type; 76int uv_type;
77 77
78 78
@@ -100,6 +100,56 @@ s64 uv_bios_get_sn_info(int fc, int *uvtype, long *partid, long *coher,
100 return ret; 100 return ret;
101} 101}
102 102
103int
104uv_bios_mq_watchlist_alloc(int blade, unsigned long addr, unsigned int mq_size,
105 unsigned long *intr_mmr_offset)
106{
107 union uv_watchlist_u size_blade;
108 u64 watchlist;
109 s64 ret;
110
111 size_blade.size = mq_size;
112 size_blade.blade = blade;
113
114 /*
115 * bios returns watchlist number or negative error number.
116 */
117 ret = (int)uv_bios_call_irqsave(UV_BIOS_WATCHLIST_ALLOC, addr,
118 size_blade.val, (u64)intr_mmr_offset,
119 (u64)&watchlist, 0);
120 if (ret < BIOS_STATUS_SUCCESS)
121 return ret;
122
123 return watchlist;
124}
125EXPORT_SYMBOL_GPL(uv_bios_mq_watchlist_alloc);
126
127int
128uv_bios_mq_watchlist_free(int blade, int watchlist_num)
129{
130 return (int)uv_bios_call_irqsave(UV_BIOS_WATCHLIST_FREE,
131 blade, watchlist_num, 0, 0, 0);
132}
133EXPORT_SYMBOL_GPL(uv_bios_mq_watchlist_free);
134
135s64
136uv_bios_change_memprotect(u64 paddr, u64 len, enum uv_memprotect perms)
137{
138 return uv_bios_call_irqsave(UV_BIOS_MEMPROTECT, paddr, len,
139 perms, 0, 0);
140}
141EXPORT_SYMBOL_GPL(uv_bios_change_memprotect);
142
143s64
144uv_bios_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
145{
146 s64 ret;
147
148 ret = uv_bios_call_irqsave(UV_BIOS_GET_PARTITION_ADDR, (u64)cookie,
149 (u64)addr, buf, (u64)len, 0);
150 return ret;
151}
152EXPORT_SYMBOL_GPL(uv_bios_reserved_page_pa);
103 153
104s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second) 154s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second)
105{ 155{
diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c
new file mode 100644
index 000000000000..2ac0ab71412a
--- /dev/null
+++ b/arch/x86/kernel/check.c
@@ -0,0 +1,161 @@
1#include <linux/module.h>
2#include <linux/sched.h>
3#include <linux/kthread.h>
4#include <linux/workqueue.h>
5#include <asm/e820.h>
6#include <asm/proto.h>
7
8/*
9 * Some BIOSes seem to corrupt the low 64k of memory during events
10 * like suspend/resume and unplugging an HDMI cable. Reserve all
11 * remaining free memory in that area and fill it with a distinct
12 * pattern.
13 */
14#define MAX_SCAN_AREAS 8
15
16static int __read_mostly memory_corruption_check = -1;
17
18static unsigned __read_mostly corruption_check_size = 64*1024;
19static unsigned __read_mostly corruption_check_period = 60; /* seconds */
20
21static struct e820entry scan_areas[MAX_SCAN_AREAS];
22static int num_scan_areas;
23
24
25static __init int set_corruption_check(char *arg)
26{
27 char *end;
28
29 memory_corruption_check = simple_strtol(arg, &end, 10);
30
31 return (*end == 0) ? 0 : -EINVAL;
32}
33early_param("memory_corruption_check", set_corruption_check);
34
35static __init int set_corruption_check_period(char *arg)
36{
37 char *end;
38
39 corruption_check_period = simple_strtoul(arg, &end, 10);
40
41 return (*end == 0) ? 0 : -EINVAL;
42}
43early_param("memory_corruption_check_period", set_corruption_check_period);
44
45static __init int set_corruption_check_size(char *arg)
46{
47 char *end;
48 unsigned size;
49
50 size = memparse(arg, &end);
51
52 if (*end == '\0')
53 corruption_check_size = size;
54
55 return (size == corruption_check_size) ? 0 : -EINVAL;
56}
57early_param("memory_corruption_check_size", set_corruption_check_size);
58
59
60void __init setup_bios_corruption_check(void)
61{
62 u64 addr = PAGE_SIZE; /* assume first page is reserved anyway */
63
64 if (memory_corruption_check == -1) {
65 memory_corruption_check =
66#ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
67 1
68#else
69 0
70#endif
71 ;
72 }
73
74 if (corruption_check_size == 0)
75 memory_corruption_check = 0;
76
77 if (!memory_corruption_check)
78 return;
79
80 corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
81
82 while (addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
83 u64 size;
84 addr = find_e820_area_size(addr, &size, PAGE_SIZE);
85
86 if (addr == 0)
87 break;
88
89 if ((addr + size) > corruption_check_size)
90 size = corruption_check_size - addr;
91
92 if (size == 0)
93 break;
94
95 e820_update_range(addr, size, E820_RAM, E820_RESERVED);
96 scan_areas[num_scan_areas].addr = addr;
97 scan_areas[num_scan_areas].size = size;
98 num_scan_areas++;
99
100 /* Assume we've already mapped this early memory */
101 memset(__va(addr), 0, size);
102
103 addr += size;
104 }
105
106 printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
107 num_scan_areas);
108 update_e820();
109}
110
111
112void check_for_bios_corruption(void)
113{
114 int i;
115 int corruption = 0;
116
117 if (!memory_corruption_check)
118 return;
119
120 for (i = 0; i < num_scan_areas; i++) {
121 unsigned long *addr = __va(scan_areas[i].addr);
122 unsigned long size = scan_areas[i].size;
123
124 for (; size; addr++, size -= sizeof(unsigned long)) {
125 if (!*addr)
126 continue;
127 printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
128 addr, __pa(addr), *addr);
129 corruption = 1;
130 *addr = 0;
131 }
132 }
133
134 WARN_ONCE(corruption, KERN_ERR "Memory corruption detected in low memory\n");
135}
136
137static void check_corruption(struct work_struct *dummy);
138static DECLARE_DELAYED_WORK(bios_check_work, check_corruption);
139
140static void check_corruption(struct work_struct *dummy)
141{
142 check_for_bios_corruption();
143 schedule_delayed_work(&bios_check_work,
144 round_jiffies_relative(corruption_check_period*HZ));
145}
146
147static int start_periodic_check_for_corruption(void)
148{
149 if (!memory_corruption_check || corruption_check_period == 0)
150 return 0;
151
152 printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
153 corruption_check_period);
154
155 /* First time we run the checks right away */
156 schedule_delayed_work(&bios_check_work, 0);
157 return 0;
158}
159
160module_init(start_periodic_check_for_corruption);
161
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 82ec6075c057..82db7f45e2de 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -2,8 +2,14 @@
2# Makefile for x86-compatible CPU details and quirks 2# Makefile for x86-compatible CPU details and quirks
3# 3#
4 4
5# Don't trace early stages of a secondary CPU boot
6ifdef CONFIG_FUNCTION_TRACER
7CFLAGS_REMOVE_common.o = -pg
8endif
9
5obj-y := intel_cacheinfo.o addon_cpuid_features.o 10obj-y := intel_cacheinfo.o addon_cpuid_features.o
6obj-y += proc.o capflags.o powerflags.o common.o 11obj-y += proc.o capflags.o powerflags.o common.o
12obj-y += vmware.o hypervisor.o
7 13
8obj-$(CONFIG_X86_32) += bugs.o cmpxchg.o 14obj-$(CONFIG_X86_32) += bugs.o cmpxchg.o
9obj-$(CONFIG_X86_64) += bugs_64.o 15obj-$(CONFIG_X86_64) += bugs_64.o
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index ef8f831af823..2cf23634b6d9 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -120,9 +120,17 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
120 c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width) 120 c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
121 & core_select_mask; 121 & core_select_mask;
122 c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width); 122 c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
123 /*
124 * Reinit the apicid, now that we have extended initial_apicid.
125 */
126 c->apicid = phys_pkg_id(c->initial_apicid, 0);
123#else 127#else
124 c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask; 128 c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
125 c->phys_proc_id = phys_pkg_id(core_plus_mask_width); 129 c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
130 /*
131 * Reinit the apicid, now that we have extended initial_apicid.
132 */
133 c->apicid = phys_pkg_id(0);
126#endif 134#endif
127 c->x86_max_cores = (core_level_siblings / smp_num_siblings); 135 c->x86_max_cores = (core_level_siblings / smp_num_siblings);
128 136
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 8f1e31db2ad5..7c878f6aa919 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -283,9 +283,14 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
283{ 283{
284 early_init_amd_mc(c); 284 early_init_amd_mc(c);
285 285
286 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */ 286 /*
287 if (c->x86_power & (1<<8)) 287 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
288 * with P/T states and does not stop in deep C-states
289 */
290 if (c->x86_power & (1 << 8)) {
288 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 291 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
292 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
293 }
289 294
290#ifdef CONFIG_X86_64 295#ifdef CONFIG_X86_64
291 set_cpu_cap(c, X86_FEATURE_SYSCALL32); 296 set_cpu_cap(c, X86_FEATURE_SYSCALL32);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index b9c9ea0217a9..42e0853030cb 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -36,6 +36,7 @@
36#include <asm/proto.h> 36#include <asm/proto.h>
37#include <asm/sections.h> 37#include <asm/sections.h>
38#include <asm/setup.h> 38#include <asm/setup.h>
39#include <asm/hypervisor.h>
39 40
40#include "cpu.h" 41#include "cpu.h"
41 42
@@ -703,6 +704,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
703 detect_ht(c); 704 detect_ht(c);
704#endif 705#endif
705 706
707 init_hypervisor(c);
706 /* 708 /*
707 * On SMP, boot_cpu_data holds the common feature set between 709 * On SMP, boot_cpu_data holds the common feature set between
708 * all CPUs; so make sure that we indicate which features are 710 * all CPUs; so make sure that we indicate which features are
@@ -862,7 +864,7 @@ EXPORT_SYMBOL(_cpu_pda);
862 864
863struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; 865struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
864 866
865char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss; 867static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
866 868
867void __cpuinit pda_init(int cpu) 869void __cpuinit pda_init(int cpu)
868{ 870{
@@ -903,8 +905,8 @@ void __cpuinit pda_init(int cpu)
903 } 905 }
904} 906}
905 907
906char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + 908static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
907 DEBUG_STKSZ] __page_aligned_bss; 909 DEBUG_STKSZ] __page_aligned_bss;
908 910
909extern asmlinkage void ignore_sysret(void); 911extern asmlinkage void ignore_sysret(void);
910 912
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 8e48c5d4467d..88ea02dcb622 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -33,6 +33,7 @@
33#include <linux/cpufreq.h> 33#include <linux/cpufreq.h>
34#include <linux/compiler.h> 34#include <linux/compiler.h>
35#include <linux/dmi.h> 35#include <linux/dmi.h>
36#include <linux/ftrace.h>
36 37
37#include <linux/acpi.h> 38#include <linux/acpi.h>
38#include <acpi/processor.h> 39#include <acpi/processor.h>
@@ -391,6 +392,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
391 unsigned int next_perf_state = 0; /* Index into perf table */ 392 unsigned int next_perf_state = 0; /* Index into perf table */
392 unsigned int i; 393 unsigned int i;
393 int result = 0; 394 int result = 0;
395 struct power_trace it;
394 396
395 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); 397 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
396 398
@@ -427,6 +429,8 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
427 } 429 }
428 } 430 }
429 431
432 trace_power_mark(&it, POWER_PSTATE, next_perf_state);
433
430 switch (data->cpu_feature) { 434 switch (data->cpu_feature) {
431 case SYSTEM_INTEL_MSR_CAPABLE: 435 case SYSTEM_INTEL_MSR_CAPABLE:
432 cmd.type = SYSTEM_INTEL_MSR_CAPABLE; 436 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
new file mode 100644
index 000000000000..fb5b86af0b01
--- /dev/null
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -0,0 +1,58 @@
1/*
2 * Common hypervisor code
3 *
4 * Copyright (C) 2008, VMware, Inc.
5 * Author : Alok N Kataria <akataria@vmware.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15 * NON INFRINGEMENT. See the GNU General Public License for more
16 * details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 */
23
24#include <asm/processor.h>
25#include <asm/vmware.h>
26#include <asm/hypervisor.h>
27
28static inline void __cpuinit
29detect_hypervisor_vendor(struct cpuinfo_x86 *c)
30{
31 if (vmware_platform()) {
32 c->x86_hyper_vendor = X86_HYPER_VENDOR_VMWARE;
33 } else {
34 c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE;
35 }
36}
37
38unsigned long get_hypervisor_tsc_freq(void)
39{
40 if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
41 return vmware_get_tsc_khz();
42 return 0;
43}
44
45static inline void __cpuinit
46hypervisor_set_feature_bits(struct cpuinfo_x86 *c)
47{
48 if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) {
49 vmware_set_feature_bits(c);
50 return;
51 }
52}
53
54void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
55{
56 detect_hypervisor_vendor(c);
57 hypervisor_set_feature_bits(c);
58}
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index cce0b6118d55..8ea6929e974c 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -11,7 +11,6 @@
11#include <asm/pgtable.h> 11#include <asm/pgtable.h>
12#include <asm/msr.h> 12#include <asm/msr.h>
13#include <asm/uaccess.h> 13#include <asm/uaccess.h>
14#include <asm/ptrace.h>
15#include <asm/ds.h> 14#include <asm/ds.h>
16#include <asm/bugs.h> 15#include <asm/bugs.h>
17 16
@@ -41,6 +40,16 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
41 if (c->x86 == 15 && c->x86_cache_alignment == 64) 40 if (c->x86 == 15 && c->x86_cache_alignment == 64)
42 c->x86_cache_alignment = 128; 41 c->x86_cache_alignment = 128;
43#endif 42#endif
43
44 /*
45 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
46 * with P/T states and does not stop in deep C-states
47 */
48 if (c->x86_power & (1 << 8)) {
49 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
50 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
51 }
52
44} 53}
45 54
46#ifdef CONFIG_X86_32 55#ifdef CONFIG_X86_32
@@ -242,6 +251,13 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
242 251
243 intel_workarounds(c); 252 intel_workarounds(c);
244 253
254 /*
255 * Detect the extended topology information if available. This
256 * will reinitialise the initial_apicid which will be used
257 * in init_intel_cacheinfo()
258 */
259 detect_extended_topology(c);
260
245 l2 = init_intel_cacheinfo(c); 261 l2 = init_intel_cacheinfo(c);
246 if (c->cpuid_level > 9) { 262 if (c->cpuid_level > 9) {
247 unsigned eax = cpuid_eax(10); 263 unsigned eax = cpuid_eax(10);
@@ -307,13 +323,8 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
307 set_cpu_cap(c, X86_FEATURE_P4); 323 set_cpu_cap(c, X86_FEATURE_P4);
308 if (c->x86 == 6) 324 if (c->x86 == 6)
309 set_cpu_cap(c, X86_FEATURE_P3); 325 set_cpu_cap(c, X86_FEATURE_P3);
310
311 if (cpu_has_bts)
312 ptrace_bts_init_intel(c);
313
314#endif 326#endif
315 327
316 detect_extended_topology(c);
317 if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { 328 if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
318 /* 329 /*
319 * let's use the legacy cpuid vector 0x1 and 0x4 for topology 330 * let's use the legacy cpuid vector 0x1 and 0x4 for topology
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 43ea612d3e9d..15cf14e9bf26 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -644,20 +644,17 @@ static inline ssize_t show_shared_cpu_list(struct _cpuid4_info *leaf, char *buf)
644 return show_shared_cpu_map_func(leaf, 1, buf); 644 return show_shared_cpu_map_func(leaf, 1, buf);
645} 645}
646 646
647static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) { 647static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf)
648 switch(this_leaf->eax.split.type) { 648{
649 case CACHE_TYPE_DATA: 649 switch (this_leaf->eax.split.type) {
650 case CACHE_TYPE_DATA:
650 return sprintf(buf, "Data\n"); 651 return sprintf(buf, "Data\n");
651 break; 652 case CACHE_TYPE_INST:
652 case CACHE_TYPE_INST:
653 return sprintf(buf, "Instruction\n"); 653 return sprintf(buf, "Instruction\n");
654 break; 654 case CACHE_TYPE_UNIFIED:
655 case CACHE_TYPE_UNIFIED:
656 return sprintf(buf, "Unified\n"); 655 return sprintf(buf, "Unified\n");
657 break; 656 default:
658 default:
659 return sprintf(buf, "Unknown\n"); 657 return sprintf(buf, "Unknown\n");
660 break;
661 } 658 }
662} 659}
663 660
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 4b031a4ac856..1c838032fd37 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -510,12 +510,9 @@ static void __cpuinit mce_cpu_features(struct cpuinfo_x86 *c)
510 */ 510 */
511void __cpuinit mcheck_init(struct cpuinfo_x86 *c) 511void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
512{ 512{
513 static cpumask_t mce_cpus = CPU_MASK_NONE;
514
515 mce_cpu_quirks(c); 513 mce_cpu_quirks(c);
516 514
517 if (mce_dont_init || 515 if (mce_dont_init ||
518 cpu_test_and_set(smp_processor_id(), mce_cpus) ||
519 !mce_available(c)) 516 !mce_available(c))
520 return; 517 return;
521 518
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 5eb390a4b2e9..748c8f9e7a05 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -237,7 +237,7 @@ asmlinkage void mce_threshold_interrupt(void)
237 } 237 }
238 } 238 }
239out: 239out:
240 add_pda(irq_threshold_count, 1); 240 inc_irq_stat(irq_threshold_count);
241 irq_exit(); 241 irq_exit();
242} 242}
243 243
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index c17eaf5dd6dd..4b48f251fd39 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -26,7 +26,7 @@ asmlinkage void smp_thermal_interrupt(void)
26 if (therm_throt_process(msr_val & 1)) 26 if (therm_throt_process(msr_val & 1))
27 mce_log_therm_throt_event(smp_processor_id(), msr_val); 27 mce_log_therm_throt_event(smp_processor_id(), msr_val);
28 28
29 add_pda(irq_thermal_count, 1); 29 inc_irq_stat(irq_thermal_count);
30 irq_exit(); 30 irq_exit();
31} 31}
32 32
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index c78c04821ea1..1159e269e596 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -803,6 +803,7 @@ x86_get_mtrr_mem_range(struct res_range *range, int nr_range,
803} 803}
804 804
805static struct res_range __initdata range[RANGE_NUM]; 805static struct res_range __initdata range[RANGE_NUM];
806static int __initdata nr_range;
806 807
807#ifdef CONFIG_MTRR_SANITIZER 808#ifdef CONFIG_MTRR_SANITIZER
808 809
@@ -1206,39 +1207,43 @@ struct mtrr_cleanup_result {
1206#define PSHIFT (PAGE_SHIFT - 10) 1207#define PSHIFT (PAGE_SHIFT - 10)
1207 1208
1208static struct mtrr_cleanup_result __initdata result[NUM_RESULT]; 1209static struct mtrr_cleanup_result __initdata result[NUM_RESULT];
1209static struct res_range __initdata range_new[RANGE_NUM];
1210static unsigned long __initdata min_loss_pfn[RANGE_NUM]; 1210static unsigned long __initdata min_loss_pfn[RANGE_NUM];
1211 1211
1212static int __init mtrr_cleanup(unsigned address_bits) 1212static void __init print_out_mtrr_range_state(void)
1213{ 1213{
1214 unsigned long extra_remove_base, extra_remove_size;
1215 unsigned long base, size, def, dummy;
1216 mtrr_type type;
1217 int nr_range, nr_range_new;
1218 u64 chunk_size, gran_size;
1219 unsigned long range_sums, range_sums_new;
1220 int index_good;
1221 int num_reg_good;
1222 int i; 1214 int i;
1215 char start_factor = 'K', size_factor = 'K';
1216 unsigned long start_base, size_base;
1217 mtrr_type type;
1223 1218
1224 /* extra one for all 0 */ 1219 for (i = 0; i < num_var_ranges; i++) {
1225 int num[MTRR_NUM_TYPES + 1];
1226 1220
1227 if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1) 1221 size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10);
1228 return 0; 1222 if (!size_base)
1229 rdmsr(MTRRdefType_MSR, def, dummy); 1223 continue;
1230 def &= 0xff;
1231 if (def != MTRR_TYPE_UNCACHABLE)
1232 return 0;
1233 1224
1234 /* get it and store it aside */ 1225 size_base = to_size_factor(size_base, &size_factor),
1235 memset(range_state, 0, sizeof(range_state)); 1226 start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10);
1236 for (i = 0; i < num_var_ranges; i++) { 1227 start_base = to_size_factor(start_base, &start_factor),
1237 mtrr_if->get(i, &base, &size, &type); 1228 type = range_state[i].type;
1238 range_state[i].base_pfn = base; 1229
1239 range_state[i].size_pfn = size; 1230 printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n",
1240 range_state[i].type = type; 1231 i, start_base, start_factor,
1232 size_base, size_factor,
1233 (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
1234 ((type == MTRR_TYPE_WRPROT) ? "WP" :
1235 ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
1236 );
1241 } 1237 }
1238}
1239
1240static int __init mtrr_need_cleanup(void)
1241{
1242 int i;
1243 mtrr_type type;
1244 unsigned long size;
1245 /* extra one for all 0 */
1246 int num[MTRR_NUM_TYPES + 1];
1242 1247
1243 /* check entries number */ 1248 /* check entries number */
1244 memset(num, 0, sizeof(num)); 1249 memset(num, 0, sizeof(num));
@@ -1263,29 +1268,133 @@ static int __init mtrr_cleanup(unsigned address_bits)
1263 num_var_ranges - num[MTRR_NUM_TYPES]) 1268 num_var_ranges - num[MTRR_NUM_TYPES])
1264 return 0; 1269 return 0;
1265 1270
1266 /* print original var MTRRs at first, for debugging: */ 1271 return 1;
1267 printk(KERN_DEBUG "original variable MTRRs\n"); 1272}
1268 for (i = 0; i < num_var_ranges; i++) {
1269 char start_factor = 'K', size_factor = 'K';
1270 unsigned long start_base, size_base;
1271 1273
1272 size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10); 1274static unsigned long __initdata range_sums;
1273 if (!size_base) 1275static void __init mtrr_calc_range_state(u64 chunk_size, u64 gran_size,
1274 continue; 1276 unsigned long extra_remove_base,
1277 unsigned long extra_remove_size,
1278 int i)
1279{
1280 int num_reg;
1281 static struct res_range range_new[RANGE_NUM];
1282 static int nr_range_new;
1283 unsigned long range_sums_new;
1284
1285 /* convert ranges to var ranges state */
1286 num_reg = x86_setup_var_mtrrs(range, nr_range,
1287 chunk_size, gran_size);
1288
1289 /* we got new setting in range_state, check it */
1290 memset(range_new, 0, sizeof(range_new));
1291 nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
1292 extra_remove_base, extra_remove_size);
1293 range_sums_new = sum_ranges(range_new, nr_range_new);
1294
1295 result[i].chunk_sizek = chunk_size >> 10;
1296 result[i].gran_sizek = gran_size >> 10;
1297 result[i].num_reg = num_reg;
1298 if (range_sums < range_sums_new) {
1299 result[i].lose_cover_sizek =
1300 (range_sums_new - range_sums) << PSHIFT;
1301 result[i].bad = 1;
1302 } else
1303 result[i].lose_cover_sizek =
1304 (range_sums - range_sums_new) << PSHIFT;
1275 1305
1276 size_base = to_size_factor(size_base, &size_factor), 1306 /* double check it */
1277 start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10); 1307 if (!result[i].bad && !result[i].lose_cover_sizek) {
1278 start_base = to_size_factor(start_base, &start_factor), 1308 if (nr_range_new != nr_range ||
1279 type = range_state[i].type; 1309 memcmp(range, range_new, sizeof(range)))
1310 result[i].bad = 1;
1311 }
1280 1312
1281 printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n", 1313 if (!result[i].bad && (range_sums - range_sums_new <
1282 i, start_base, start_factor, 1314 min_loss_pfn[num_reg])) {
1283 size_base, size_factor, 1315 min_loss_pfn[num_reg] =
1284 (type == MTRR_TYPE_UNCACHABLE) ? "UC" : 1316 range_sums - range_sums_new;
1285 ((type == MTRR_TYPE_WRPROT) ? "WP" :
1286 ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
1287 );
1288 } 1317 }
1318}
1319
1320static void __init mtrr_print_out_one_result(int i)
1321{
1322 char gran_factor, chunk_factor, lose_factor;
1323 unsigned long gran_base, chunk_base, lose_base;
1324
1325 gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
1326 chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
1327 lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
1328 printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
1329 result[i].bad ? "*BAD*" : " ",
1330 gran_base, gran_factor, chunk_base, chunk_factor);
1331 printk(KERN_CONT "num_reg: %d \tlose cover RAM: %s%ld%c\n",
1332 result[i].num_reg, result[i].bad ? "-" : "",
1333 lose_base, lose_factor);
1334}
1335
1336static int __init mtrr_search_optimal_index(void)
1337{
1338 int i;
1339 int num_reg_good;
1340 int index_good;
1341
1342 if (nr_mtrr_spare_reg >= num_var_ranges)
1343 nr_mtrr_spare_reg = num_var_ranges - 1;
1344 num_reg_good = -1;
1345 for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
1346 if (!min_loss_pfn[i])
1347 num_reg_good = i;
1348 }
1349
1350 index_good = -1;
1351 if (num_reg_good != -1) {
1352 for (i = 0; i < NUM_RESULT; i++) {
1353 if (!result[i].bad &&
1354 result[i].num_reg == num_reg_good &&
1355 !result[i].lose_cover_sizek) {
1356 index_good = i;
1357 break;
1358 }
1359 }
1360 }
1361
1362 return index_good;
1363}
1364
1365
1366static int __init mtrr_cleanup(unsigned address_bits)
1367{
1368 unsigned long extra_remove_base, extra_remove_size;
1369 unsigned long base, size, def, dummy;
1370 mtrr_type type;
1371 u64 chunk_size, gran_size;
1372 int index_good;
1373 int i;
1374
1375 if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
1376 return 0;
1377 rdmsr(MTRRdefType_MSR, def, dummy);
1378 def &= 0xff;
1379 if (def != MTRR_TYPE_UNCACHABLE)
1380 return 0;
1381
1382 /* get it and store it aside */
1383 memset(range_state, 0, sizeof(range_state));
1384 for (i = 0; i < num_var_ranges; i++) {
1385 mtrr_if->get(i, &base, &size, &type);
1386 range_state[i].base_pfn = base;
1387 range_state[i].size_pfn = size;
1388 range_state[i].type = type;
1389 }
1390
1391 /* check if we need handle it and can handle it */
1392 if (!mtrr_need_cleanup())
1393 return 0;
1394
1395 /* print original var MTRRs at first, for debugging: */
1396 printk(KERN_DEBUG "original variable MTRRs\n");
1397 print_out_mtrr_range_state();
1289 1398
1290 memset(range, 0, sizeof(range)); 1399 memset(range, 0, sizeof(range));
1291 extra_remove_size = 0; 1400 extra_remove_size = 0;
@@ -1309,176 +1418,64 @@ static int __init mtrr_cleanup(unsigned address_bits)
1309 range_sums >> (20 - PAGE_SHIFT)); 1418 range_sums >> (20 - PAGE_SHIFT));
1310 1419
1311 if (mtrr_chunk_size && mtrr_gran_size) { 1420 if (mtrr_chunk_size && mtrr_gran_size) {
1312 int num_reg; 1421 i = 0;
1313 char gran_factor, chunk_factor, lose_factor; 1422 mtrr_calc_range_state(mtrr_chunk_size, mtrr_gran_size,
1314 unsigned long gran_base, chunk_base, lose_base; 1423 extra_remove_base, extra_remove_size, i);
1315
1316 debug_print++;
1317 /* convert ranges to var ranges state */
1318 num_reg = x86_setup_var_mtrrs(range, nr_range, mtrr_chunk_size,
1319 mtrr_gran_size);
1320 1424
1321 /* we got new setting in range_state, check it */ 1425 mtrr_print_out_one_result(i);
1322 memset(range_new, 0, sizeof(range_new));
1323 nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
1324 extra_remove_base,
1325 extra_remove_size);
1326 range_sums_new = sum_ranges(range_new, nr_range_new);
1327 1426
1328 i = 0;
1329 result[i].chunk_sizek = mtrr_chunk_size >> 10;
1330 result[i].gran_sizek = mtrr_gran_size >> 10;
1331 result[i].num_reg = num_reg;
1332 if (range_sums < range_sums_new) {
1333 result[i].lose_cover_sizek =
1334 (range_sums_new - range_sums) << PSHIFT;
1335 result[i].bad = 1;
1336 } else
1337 result[i].lose_cover_sizek =
1338 (range_sums - range_sums_new) << PSHIFT;
1339
1340 gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
1341 chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
1342 lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
1343 printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
1344 result[i].bad?"*BAD*":" ",
1345 gran_base, gran_factor, chunk_base, chunk_factor);
1346 printk(KERN_CONT "num_reg: %d \tlose cover RAM: %s%ld%c\n",
1347 result[i].num_reg, result[i].bad?"-":"",
1348 lose_base, lose_factor);
1349 if (!result[i].bad) { 1427 if (!result[i].bad) {
1350 set_var_mtrr_all(address_bits); 1428 set_var_mtrr_all(address_bits);
1351 return 1; 1429 return 1;
1352 } 1430 }
1353 printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, " 1431 printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, "
1354 "will find optimal one\n"); 1432 "will find optimal one\n");
1355 debug_print--;
1356 memset(result, 0, sizeof(result[0]));
1357 } 1433 }
1358 1434
1359 i = 0; 1435 i = 0;
1360 memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn)); 1436 memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn));
1361 memset(result, 0, sizeof(result)); 1437 memset(result, 0, sizeof(result));
1362 for (gran_size = (1ULL<<16); gran_size < (1ULL<<32); gran_size <<= 1) { 1438 for (gran_size = (1ULL<<16); gran_size < (1ULL<<32); gran_size <<= 1) {
1363 char gran_factor;
1364 unsigned long gran_base;
1365
1366 if (debug_print)
1367 gran_base = to_size_factor(gran_size >> 10, &gran_factor);
1368 1439
1369 for (chunk_size = gran_size; chunk_size < (1ULL<<32); 1440 for (chunk_size = gran_size; chunk_size < (1ULL<<32);
1370 chunk_size <<= 1) { 1441 chunk_size <<= 1) {
1371 int num_reg;
1372 1442
1373 if (debug_print) {
1374 char chunk_factor;
1375 unsigned long chunk_base;
1376
1377 chunk_base = to_size_factor(chunk_size>>10, &chunk_factor),
1378 printk(KERN_INFO "\n");
1379 printk(KERN_INFO "gran_size: %ld%c chunk_size: %ld%c \n",
1380 gran_base, gran_factor, chunk_base, chunk_factor);
1381 }
1382 if (i >= NUM_RESULT) 1443 if (i >= NUM_RESULT)
1383 continue; 1444 continue;
1384 1445
1385 /* convert ranges to var ranges state */ 1446 mtrr_calc_range_state(chunk_size, gran_size,
1386 num_reg = x86_setup_var_mtrrs(range, nr_range, 1447 extra_remove_base, extra_remove_size, i);
1387 chunk_size, gran_size); 1448 if (debug_print) {
1388 1449 mtrr_print_out_one_result(i);
1389 /* we got new setting in range_state, check it */ 1450 printk(KERN_INFO "\n");
1390 memset(range_new, 0, sizeof(range_new));
1391 nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
1392 extra_remove_base, extra_remove_size);
1393 range_sums_new = sum_ranges(range_new, nr_range_new);
1394
1395 result[i].chunk_sizek = chunk_size >> 10;
1396 result[i].gran_sizek = gran_size >> 10;
1397 result[i].num_reg = num_reg;
1398 if (range_sums < range_sums_new) {
1399 result[i].lose_cover_sizek =
1400 (range_sums_new - range_sums) << PSHIFT;
1401 result[i].bad = 1;
1402 } else
1403 result[i].lose_cover_sizek =
1404 (range_sums - range_sums_new) << PSHIFT;
1405
1406 /* double check it */
1407 if (!result[i].bad && !result[i].lose_cover_sizek) {
1408 if (nr_range_new != nr_range ||
1409 memcmp(range, range_new, sizeof(range)))
1410 result[i].bad = 1;
1411 } 1451 }
1412 1452
1413 if (!result[i].bad && (range_sums - range_sums_new <
1414 min_loss_pfn[num_reg])) {
1415 min_loss_pfn[num_reg] =
1416 range_sums - range_sums_new;
1417 }
1418 i++; 1453 i++;
1419 } 1454 }
1420 } 1455 }
1421 1456
1422 /* print out all */
1423 for (i = 0; i < NUM_RESULT; i++) {
1424 char gran_factor, chunk_factor, lose_factor;
1425 unsigned long gran_base, chunk_base, lose_base;
1426
1427 gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
1428 chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
1429 lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
1430 printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
1431 result[i].bad?"*BAD*":" ",
1432 gran_base, gran_factor, chunk_base, chunk_factor);
1433 printk(KERN_CONT "num_reg: %d \tlose cover RAM: %s%ld%c\n",
1434 result[i].num_reg, result[i].bad?"-":"",
1435 lose_base, lose_factor);
1436 }
1437
1438 /* try to find the optimal index */ 1457 /* try to find the optimal index */
1439 if (nr_mtrr_spare_reg >= num_var_ranges) 1458 index_good = mtrr_search_optimal_index();
1440 nr_mtrr_spare_reg = num_var_ranges - 1;
1441 num_reg_good = -1;
1442 for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
1443 if (!min_loss_pfn[i])
1444 num_reg_good = i;
1445 }
1446
1447 index_good = -1;
1448 if (num_reg_good != -1) {
1449 for (i = 0; i < NUM_RESULT; i++) {
1450 if (!result[i].bad &&
1451 result[i].num_reg == num_reg_good &&
1452 !result[i].lose_cover_sizek) {
1453 index_good = i;
1454 break;
1455 }
1456 }
1457 }
1458 1459
1459 if (index_good != -1) { 1460 if (index_good != -1) {
1460 char gran_factor, chunk_factor, lose_factor;
1461 unsigned long gran_base, chunk_base, lose_base;
1462
1463 printk(KERN_INFO "Found optimal setting for mtrr clean up\n"); 1461 printk(KERN_INFO "Found optimal setting for mtrr clean up\n");
1464 i = index_good; 1462 i = index_good;
1465 gran_base = to_size_factor(result[i].gran_sizek, &gran_factor), 1463 mtrr_print_out_one_result(i);
1466 chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor), 1464
1467 lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
1468 printk(KERN_INFO "gran_size: %ld%c \tchunk_size: %ld%c \t",
1469 gran_base, gran_factor, chunk_base, chunk_factor);
1470 printk(KERN_CONT "num_reg: %d \tlose RAM: %ld%c\n",
1471 result[i].num_reg, lose_base, lose_factor);
1472 /* convert ranges to var ranges state */ 1465 /* convert ranges to var ranges state */
1473 chunk_size = result[i].chunk_sizek; 1466 chunk_size = result[i].chunk_sizek;
1474 chunk_size <<= 10; 1467 chunk_size <<= 10;
1475 gran_size = result[i].gran_sizek; 1468 gran_size = result[i].gran_sizek;
1476 gran_size <<= 10; 1469 gran_size <<= 10;
1477 debug_print++;
1478 x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size); 1470 x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
1479 debug_print--;
1480 set_var_mtrr_all(address_bits); 1471 set_var_mtrr_all(address_bits);
1472 printk(KERN_DEBUG "New variable MTRRs\n");
1473 print_out_mtrr_range_state();
1481 return 1; 1474 return 1;
1475 } else {
1476 /* print out all */
1477 for (i = 0; i < NUM_RESULT; i++)
1478 mtrr_print_out_one_result(i);
1482 } 1479 }
1483 1480
1484 printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n"); 1481 printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n");
@@ -1562,7 +1559,6 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
1562{ 1559{
1563 unsigned long i, base, size, highest_pfn = 0, def, dummy; 1560 unsigned long i, base, size, highest_pfn = 0, def, dummy;
1564 mtrr_type type; 1561 mtrr_type type;
1565 int nr_range;
1566 u64 total_trim_size; 1562 u64 total_trim_size;
1567 1563
1568 /* extra one for all 0 */ 1564 /* extra one for all 0 */
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
new file mode 100644
index 000000000000..284c399e3234
--- /dev/null
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -0,0 +1,112 @@
1/*
2 * VMware Detection code.
3 *
4 * Copyright (C) 2008, VMware, Inc.
5 * Author : Alok N Kataria <akataria@vmware.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15 * NON INFRINGEMENT. See the GNU General Public License for more
16 * details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
21 *
22 */
23
24#include <linux/dmi.h>
25#include <asm/div64.h>
26#include <asm/vmware.h>
27
28#define CPUID_VMWARE_INFO_LEAF 0x40000000
29#define VMWARE_HYPERVISOR_MAGIC 0x564D5868
30#define VMWARE_HYPERVISOR_PORT 0x5658
31
32#define VMWARE_PORT_CMD_GETVERSION 10
33#define VMWARE_PORT_CMD_GETHZ 45
34
35#define VMWARE_PORT(cmd, eax, ebx, ecx, edx) \
36 __asm__("inl (%%dx)" : \
37 "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \
38 "0"(VMWARE_HYPERVISOR_MAGIC), \
39 "1"(VMWARE_PORT_CMD_##cmd), \
40 "2"(VMWARE_HYPERVISOR_PORT), "3"(UINT_MAX) : \
41 "memory");
42
43static inline int __vmware_platform(void)
44{
45 uint32_t eax, ebx, ecx, edx;
46 VMWARE_PORT(GETVERSION, eax, ebx, ecx, edx);
47 return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC;
48}
49
50static unsigned long __vmware_get_tsc_khz(void)
51{
52 uint64_t tsc_hz;
53 uint32_t eax, ebx, ecx, edx;
54
55 VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
56
57 if (ebx == UINT_MAX)
58 return 0;
59 tsc_hz = eax | (((uint64_t)ebx) << 32);
60 do_div(tsc_hz, 1000);
61 BUG_ON(tsc_hz >> 32);
62 return tsc_hz;
63}
64
65/*
66 * While checking the dmi string infomation, just checking the product
67 * serial key should be enough, as this will always have a VMware
68 * specific string when running under VMware hypervisor.
69 */
70int vmware_platform(void)
71{
72 if (cpu_has_hypervisor) {
73 unsigned int eax, ebx, ecx, edx;
74 char hyper_vendor_id[13];
75
76 cpuid(CPUID_VMWARE_INFO_LEAF, &eax, &ebx, &ecx, &edx);
77 memcpy(hyper_vendor_id + 0, &ebx, 4);
78 memcpy(hyper_vendor_id + 4, &ecx, 4);
79 memcpy(hyper_vendor_id + 8, &edx, 4);
80 hyper_vendor_id[12] = '\0';
81 if (!strcmp(hyper_vendor_id, "VMwareVMware"))
82 return 1;
83 } else if (dmi_available && dmi_name_in_serial("VMware") &&
84 __vmware_platform())
85 return 1;
86
87 return 0;
88}
89
90unsigned long vmware_get_tsc_khz(void)
91{
92 BUG_ON(!vmware_platform());
93 return __vmware_get_tsc_khz();
94}
95
96/*
97 * VMware hypervisor takes care of exporting a reliable TSC to the guest.
98 * Still, due to timing difference when running on virtual cpus, the TSC can
99 * be marked as unstable in some cases. For example, the TSC sync check at
100 * bootup can fail due to a marginal offset between vcpus' TSCs (though the
101 * TSCs do not drift from each other). Also, the ACPI PM timer clocksource
102 * is not suitable as a watchdog when running on a hypervisor because the
103 * kernel may miss a wrap of the counter if the vcpu is descheduled for a
104 * long time. To skip these checks at runtime we set these capability bits,
105 * so that the kernel could just trust the hypervisor with providing a
106 * reliable virtual TSC that is suitable for timekeeping.
107 */
108void __cpuinit vmware_set_feature_bits(struct cpuinfo_x86 *c)
109{
110 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
111 set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
112}
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index 268553817909..d84a852e4cd7 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -29,34 +29,17 @@
29 29
30#include <mach_ipi.h> 30#include <mach_ipi.h>
31 31
32/* This keeps a track of which one is crashing cpu. */
33static int crashing_cpu;
34 32
35#if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC) 33#if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
36static atomic_t waiting_for_crash_ipi;
37 34
38static int crash_nmi_callback(struct notifier_block *self, 35static void kdump_nmi_callback(int cpu, struct die_args *args)
39 unsigned long val, void *data)
40{ 36{
41 struct pt_regs *regs; 37 struct pt_regs *regs;
42#ifdef CONFIG_X86_32 38#ifdef CONFIG_X86_32
43 struct pt_regs fixed_regs; 39 struct pt_regs fixed_regs;
44#endif 40#endif
45 int cpu;
46 41
47 if (val != DIE_NMI_IPI) 42 regs = args->regs;
48 return NOTIFY_OK;
49
50 regs = ((struct die_args *)data)->regs;
51 cpu = raw_smp_processor_id();
52
53 /* Don't do anything if this handler is invoked on crashing cpu.
54 * Otherwise, system will completely hang. Crashing cpu can get
55 * an NMI if system was initially booted with nmi_watchdog parameter.
56 */
57 if (cpu == crashing_cpu)
58 return NOTIFY_STOP;
59 local_irq_disable();
60 43
61#ifdef CONFIG_X86_32 44#ifdef CONFIG_X86_32
62 if (!user_mode_vm(regs)) { 45 if (!user_mode_vm(regs)) {
@@ -65,54 +48,19 @@ static int crash_nmi_callback(struct notifier_block *self,
65 } 48 }
66#endif 49#endif
67 crash_save_cpu(regs, cpu); 50 crash_save_cpu(regs, cpu);
68 disable_local_APIC();
69 atomic_dec(&waiting_for_crash_ipi);
70 /* Assume hlt works */
71 halt();
72 for (;;)
73 cpu_relax();
74
75 return 1;
76}
77 51
78static void smp_send_nmi_allbutself(void) 52 disable_local_APIC();
79{
80 cpumask_t mask = cpu_online_map;
81 cpu_clear(safe_smp_processor_id(), mask);
82 if (!cpus_empty(mask))
83 send_IPI_mask(mask, NMI_VECTOR);
84} 53}
85 54
86static struct notifier_block crash_nmi_nb = { 55static void kdump_nmi_shootdown_cpus(void)
87 .notifier_call = crash_nmi_callback,
88};
89
90static void nmi_shootdown_cpus(void)
91{ 56{
92 unsigned long msecs; 57 nmi_shootdown_cpus(kdump_nmi_callback);
93
94 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
95 /* Would it be better to replace the trap vector here? */
96 if (register_die_notifier(&crash_nmi_nb))
97 return; /* return what? */
98 /* Ensure the new callback function is set before sending
99 * out the NMI
100 */
101 wmb();
102 58
103 smp_send_nmi_allbutself();
104
105 msecs = 1000; /* Wait at most a second for the other cpus to stop */
106 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
107 mdelay(1);
108 msecs--;
109 }
110
111 /* Leave the nmi callback set */
112 disable_local_APIC(); 59 disable_local_APIC();
113} 60}
61
114#else 62#else
115static void nmi_shootdown_cpus(void) 63static void kdump_nmi_shootdown_cpus(void)
116{ 64{
117 /* There are no cpus to shootdown */ 65 /* There are no cpus to shootdown */
118} 66}
@@ -131,9 +79,7 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
131 /* The kernel is broken so disable interrupts */ 79 /* The kernel is broken so disable interrupts */
132 local_irq_disable(); 80 local_irq_disable();
133 81
134 /* Make a note of crashing cpu. Will be used in NMI callback.*/ 82 kdump_nmi_shootdown_cpus();
135 crashing_cpu = safe_smp_processor_id();
136 nmi_shootdown_cpus();
137 lapic_shutdown(); 83 lapic_shutdown();
138#if defined(CONFIG_X86_IO_APIC) 84#if defined(CONFIG_X86_IO_APIC)
139 disable_IO_APIC(); 85 disable_IO_APIC();
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index a2d1176c38ee..da91701a2348 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -6,14 +6,13 @@
6 * precise-event based sampling (PEBS). 6 * precise-event based sampling (PEBS).
7 * 7 *
8 * It manages: 8 * It manages:
9 * - per-thread and per-cpu allocation of BTS and PEBS 9 * - DS and BTS hardware configuration
10 * - buffer memory allocation (optional) 10 * - buffer overflow handling (to be done)
11 * - buffer overflow handling
12 * - buffer access 11 * - buffer access
13 * 12 *
14 * It assumes: 13 * It does not do:
15 * - get_task_struct on all parameter tasks 14 * - security checking (is the caller allowed to trace the task)
16 * - current is allowed to trace parameter tasks 15 * - buffer allocation (memory accounting)
17 * 16 *
18 * 17 *
19 * Copyright (C) 2007-2008 Intel Corporation. 18 * Copyright (C) 2007-2008 Intel Corporation.
@@ -28,22 +27,69 @@
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/sched.h> 28#include <linux/sched.h>
30#include <linux/mm.h> 29#include <linux/mm.h>
30#include <linux/kernel.h>
31 31
32 32
33/* 33/*
34 * The configuration for a particular DS hardware implementation. 34 * The configuration for a particular DS hardware implementation.
35 */ 35 */
36struct ds_configuration { 36struct ds_configuration {
37 /* the size of the DS structure in bytes */ 37 /* the name of the configuration */
38 unsigned char sizeof_ds; 38 const char *name;
39 /* the size of one pointer-typed field in the DS structure in bytes; 39 /* the size of one pointer-typed field in the DS structure and
40 this covers the first 8 fields related to buffer management. */ 40 in the BTS and PEBS buffers in bytes;
41 this covers the first 8 DS fields related to buffer management. */
41 unsigned char sizeof_field; 42 unsigned char sizeof_field;
42 /* the size of a BTS/PEBS record in bytes */ 43 /* the size of a BTS/PEBS record in bytes */
43 unsigned char sizeof_rec[2]; 44 unsigned char sizeof_rec[2];
45 /* a series of bit-masks to control various features indexed
46 * by enum ds_feature */
47 unsigned long ctl[dsf_ctl_max];
44}; 48};
45static struct ds_configuration ds_cfg; 49static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array);
46 50
51#define ds_cfg per_cpu(ds_cfg_array, smp_processor_id())
52
53#define MAX_SIZEOF_DS (12 * 8) /* maximal size of a DS configuration */
54#define MAX_SIZEOF_BTS (3 * 8) /* maximal size of a BTS record */
55#define DS_ALIGNMENT (1 << 3) /* BTS and PEBS buffer alignment */
56
57#define BTS_CONTROL \
58 (ds_cfg.ctl[dsf_bts] | ds_cfg.ctl[dsf_bts_kernel] | ds_cfg.ctl[dsf_bts_user] |\
59 ds_cfg.ctl[dsf_bts_overflow])
60
61
62/*
63 * A BTS or PEBS tracer.
64 *
65 * This holds the configuration of the tracer and serves as a handle
66 * to identify tracers.
67 */
68struct ds_tracer {
69 /* the DS context (partially) owned by this tracer */
70 struct ds_context *context;
71 /* the buffer provided on ds_request() and its size in bytes */
72 void *buffer;
73 size_t size;
74};
75
76struct bts_tracer {
77 /* the common DS part */
78 struct ds_tracer ds;
79 /* the trace including the DS configuration */
80 struct bts_trace trace;
81 /* buffer overflow notification function */
82 bts_ovfl_callback_t ovfl;
83};
84
85struct pebs_tracer {
86 /* the common DS part */
87 struct ds_tracer ds;
88 /* the trace including the DS configuration */
89 struct pebs_trace trace;
90 /* buffer overflow notification function */
91 pebs_ovfl_callback_t ovfl;
92};
47 93
48/* 94/*
49 * Debug Store (DS) save area configuration (see Intel64 and IA32 95 * Debug Store (DS) save area configuration (see Intel64 and IA32
@@ -109,32 +155,9 @@ static inline void ds_set(unsigned char *base, enum ds_qualifier qual,
109 155
110 156
111/* 157/*
112 * Locking is done only for allocating BTS or PEBS resources and for 158 * Locking is done only for allocating BTS or PEBS resources.
113 * guarding context and buffer memory allocation.
114 *
115 * Most functions require the current task to own the ds context part
116 * they are going to access. All the locking is done when validating
117 * access to the context.
118 */ 159 */
119static spinlock_t ds_lock = __SPIN_LOCK_UNLOCKED(ds_lock); 160static DEFINE_SPINLOCK(ds_lock);
120
121/*
122 * Validate that the current task is allowed to access the BTS/PEBS
123 * buffer of the parameter task.
124 *
125 * Returns 0, if access is granted; -Eerrno, otherwise.
126 */
127static inline int ds_validate_access(struct ds_context *context,
128 enum ds_qualifier qual)
129{
130 if (!context)
131 return -EPERM;
132
133 if (context->owner[qual] == current)
134 return 0;
135
136 return -EPERM;
137}
138 161
139 162
140/* 163/*
@@ -150,27 +173,32 @@ static inline int ds_validate_access(struct ds_context *context,
150 * >0 number of per-thread tracers 173 * >0 number of per-thread tracers
151 * <0 number of per-cpu tracers 174 * <0 number of per-cpu tracers
152 * 175 *
153 * The below functions to get and put tracers and to check the
154 * allocation type require the ds_lock to be held by the caller.
155 *
156 * Tracers essentially gives the number of ds contexts for a certain 176 * Tracers essentially gives the number of ds contexts for a certain
157 * type of allocation. 177 * type of allocation.
158 */ 178 */
159static long tracers; 179static atomic_t tracers = ATOMIC_INIT(0);
160 180
161static inline void get_tracer(struct task_struct *task) 181static inline void get_tracer(struct task_struct *task)
162{ 182{
163 tracers += (task ? 1 : -1); 183 if (task)
184 atomic_inc(&tracers);
185 else
186 atomic_dec(&tracers);
164} 187}
165 188
166static inline void put_tracer(struct task_struct *task) 189static inline void put_tracer(struct task_struct *task)
167{ 190{
168 tracers -= (task ? 1 : -1); 191 if (task)
192 atomic_dec(&tracers);
193 else
194 atomic_inc(&tracers);
169} 195}
170 196
171static inline int check_tracer(struct task_struct *task) 197static inline int check_tracer(struct task_struct *task)
172{ 198{
173 return (task ? (tracers >= 0) : (tracers <= 0)); 199 return task ?
200 (atomic_read(&tracers) >= 0) :
201 (atomic_read(&tracers) <= 0);
174} 202}
175 203
176 204
@@ -183,99 +211,70 @@ static inline int check_tracer(struct task_struct *task)
183 * 211 *
184 * Contexts are use-counted. They are allocated on first access and 212 * Contexts are use-counted. They are allocated on first access and
185 * deallocated when the last user puts the context. 213 * deallocated when the last user puts the context.
186 *
187 * We distinguish between an allocating and a non-allocating get of a
188 * context:
189 * - the allocating get is used for requesting BTS/PEBS resources. It
190 * requires the caller to hold the global ds_lock.
191 * - the non-allocating get is used for all other cases. A
192 * non-existing context indicates an error. It acquires and releases
193 * the ds_lock itself for obtaining the context.
194 *
195 * A context and its DS configuration are allocated and deallocated
196 * together. A context always has a DS configuration of the
197 * appropriate size.
198 */
199static DEFINE_PER_CPU(struct ds_context *, system_context);
200
201#define this_system_context per_cpu(system_context, smp_processor_id())
202
203/*
204 * Returns the pointer to the parameter task's context or to the
205 * system-wide context, if task is NULL.
206 *
207 * Increases the use count of the returned context, if not NULL.
208 */ 214 */
209static inline struct ds_context *ds_get_context(struct task_struct *task) 215struct ds_context {
210{ 216 /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
211 struct ds_context *context; 217 unsigned char ds[MAX_SIZEOF_DS];
212 unsigned long irq; 218 /* the owner of the BTS and PEBS configuration, respectively */
219 struct bts_tracer *bts_master;
220 struct pebs_tracer *pebs_master;
221 /* use count */
222 unsigned long count;
223 /* a pointer to the context location inside the thread_struct
224 * or the per_cpu context array */
225 struct ds_context **this;
226 /* a pointer to the task owning this context, or NULL, if the
227 * context is owned by a cpu */
228 struct task_struct *task;
229};
213 230
214 spin_lock_irqsave(&ds_lock, irq); 231static DEFINE_PER_CPU(struct ds_context *, system_context_array);
215 232
216 context = (task ? task->thread.ds_ctx : this_system_context); 233#define system_context per_cpu(system_context_array, smp_processor_id())
217 if (context)
218 context->count++;
219 234
220 spin_unlock_irqrestore(&ds_lock, irq);
221
222 return context;
223}
224 235
225/* 236static inline struct ds_context *ds_get_context(struct task_struct *task)
226 * Same as ds_get_context, but allocates the context and it's DS
227 * structure, if necessary; returns NULL; if out of memory.
228 */
229static inline struct ds_context *ds_alloc_context(struct task_struct *task)
230{ 237{
231 struct ds_context **p_context = 238 struct ds_context **p_context =
232 (task ? &task->thread.ds_ctx : &this_system_context); 239 (task ? &task->thread.ds_ctx : &system_context);
233 struct ds_context *context = *p_context; 240 struct ds_context *context = NULL;
241 struct ds_context *new_context = NULL;
234 unsigned long irq; 242 unsigned long irq;
235 243
236 if (!context) { 244 /* Chances are small that we already have a context. */
237 context = kzalloc(sizeof(*context), GFP_KERNEL); 245 new_context = kzalloc(sizeof(*new_context), GFP_KERNEL);
238 if (!context) 246 if (!new_context)
239 return NULL; 247 return NULL;
240
241 context->ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
242 if (!context->ds) {
243 kfree(context);
244 return NULL;
245 }
246 248
247 spin_lock_irqsave(&ds_lock, irq); 249 spin_lock_irqsave(&ds_lock, irq);
248 250
249 if (*p_context) { 251 context = *p_context;
250 kfree(context->ds); 252 if (!context) {
251 kfree(context); 253 context = new_context;
252 254
253 context = *p_context; 255 context->this = p_context;
254 } else { 256 context->task = task;
255 *p_context = context; 257 context->count = 0;
256 258
257 context->this = p_context; 259 if (task)
258 context->task = task; 260 set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
259 261
260 if (task) 262 if (!task || (task == current))
261 set_tsk_thread_flag(task, TIF_DS_AREA_MSR); 263 wrmsrl(MSR_IA32_DS_AREA, (unsigned long)context->ds);
262 264
263 if (!task || (task == current)) 265 *p_context = context;
264 wrmsrl(MSR_IA32_DS_AREA,
265 (unsigned long)context->ds);
266 }
267 spin_unlock_irqrestore(&ds_lock, irq);
268 } 266 }
269 267
270 context->count++; 268 context->count++;
271 269
270 spin_unlock_irqrestore(&ds_lock, irq);
271
272 if (context != new_context)
273 kfree(new_context);
274
272 return context; 275 return context;
273} 276}
274 277
275/*
276 * Decreases the use count of the parameter context, if not NULL.
277 * Deallocates the context, if the use count reaches zero.
278 */
279static inline void ds_put_context(struct ds_context *context) 278static inline void ds_put_context(struct ds_context *context)
280{ 279{
281 unsigned long irq; 280 unsigned long irq;
@@ -285,8 +284,10 @@ static inline void ds_put_context(struct ds_context *context)
285 284
286 spin_lock_irqsave(&ds_lock, irq); 285 spin_lock_irqsave(&ds_lock, irq);
287 286
288 if (--context->count) 287 if (--context->count) {
289 goto out; 288 spin_unlock_irqrestore(&ds_lock, irq);
289 return;
290 }
290 291
291 *(context->this) = NULL; 292 *(context->this) = NULL;
292 293
@@ -296,135 +297,263 @@ static inline void ds_put_context(struct ds_context *context)
296 if (!context->task || (context->task == current)) 297 if (!context->task || (context->task == current))
297 wrmsrl(MSR_IA32_DS_AREA, 0); 298 wrmsrl(MSR_IA32_DS_AREA, 0);
298 299
299 put_tracer(context->task); 300 spin_unlock_irqrestore(&ds_lock, irq);
300 301
301 /* free any leftover buffers from tracers that did not
302 * deallocate them properly. */
303 kfree(context->buffer[ds_bts]);
304 kfree(context->buffer[ds_pebs]);
305 kfree(context->ds);
306 kfree(context); 302 kfree(context);
307 out:
308 spin_unlock_irqrestore(&ds_lock, irq);
309} 303}
310 304
311 305
312/* 306/*
313 * Handle a buffer overflow 307 * Call the tracer's callback on a buffer overflow.
314 * 308 *
315 * task: the task whose buffers are overflowing;
316 * NULL for a buffer overflow on the current cpu
317 * context: the ds context 309 * context: the ds context
318 * qual: the buffer type 310 * qual: the buffer type
319 */ 311 */
320static void ds_overflow(struct task_struct *task, struct ds_context *context, 312static void ds_overflow(struct ds_context *context, enum ds_qualifier qual)
321 enum ds_qualifier qual)
322{ 313{
323 if (!context) 314 switch (qual) {
324 return; 315 case ds_bts:
325 316 if (context->bts_master &&
326 if (context->callback[qual]) 317 context->bts_master->ovfl)
327 (*context->callback[qual])(task); 318 context->bts_master->ovfl(context->bts_master);
328 319 break;
329 /* todo: do some more overflow handling */ 320 case ds_pebs:
321 if (context->pebs_master &&
322 context->pebs_master->ovfl)
323 context->pebs_master->ovfl(context->pebs_master);
324 break;
325 }
330} 326}
331 327
332 328
333/* 329/*
334 * Allocate a non-pageable buffer of the parameter size. 330 * Write raw data into the BTS or PEBS buffer.
335 * Checks the memory and the locked memory rlimit.
336 * 331 *
337 * Returns the buffer, if successful; 332 * The remainder of any partially written record is zeroed out.
338 * NULL, if out of memory or rlimit exceeded.
339 * 333 *
340 * size: the requested buffer size in bytes 334 * context: the DS context
341 * pages (out): if not NULL, contains the number of pages reserved 335 * qual: the buffer type
336 * record: the data to write
337 * size: the size of the data
342 */ 338 */
343static inline void *ds_allocate_buffer(size_t size, unsigned int *pages) 339static int ds_write(struct ds_context *context, enum ds_qualifier qual,
340 const void *record, size_t size)
344{ 341{
345 unsigned long rlim, vm, pgsz; 342 int bytes_written = 0;
346 void *buffer;
347 343
348 pgsz = PAGE_ALIGN(size) >> PAGE_SHIFT; 344 if (!record)
345 return -EINVAL;
349 346
350 rlim = current->signal->rlim[RLIMIT_AS].rlim_cur >> PAGE_SHIFT; 347 while (size) {
351 vm = current->mm->total_vm + pgsz; 348 unsigned long base, index, end, write_end, int_th;
352 if (rlim < vm) 349 unsigned long write_size, adj_write_size;
353 return NULL;
354 350
355 rlim = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur >> PAGE_SHIFT; 351 /*
356 vm = current->mm->locked_vm + pgsz; 352 * write as much as possible without producing an
357 if (rlim < vm) 353 * overflow interrupt.
358 return NULL; 354 *
355 * interrupt_threshold must either be
356 * - bigger than absolute_maximum or
357 * - point to a record between buffer_base and absolute_maximum
358 *
359 * index points to a valid record.
360 */
361 base = ds_get(context->ds, qual, ds_buffer_base);
362 index = ds_get(context->ds, qual, ds_index);
363 end = ds_get(context->ds, qual, ds_absolute_maximum);
364 int_th = ds_get(context->ds, qual, ds_interrupt_threshold);
359 365
360 buffer = kzalloc(size, GFP_KERNEL); 366 write_end = min(end, int_th);
361 if (!buffer)
362 return NULL;
363 367
364 current->mm->total_vm += pgsz; 368 /* if we are already beyond the interrupt threshold,
365 current->mm->locked_vm += pgsz; 369 * we fill the entire buffer */
370 if (write_end <= index)
371 write_end = end;
366 372
367 if (pages) 373 if (write_end <= index)
368 *pages = pgsz; 374 break;
375
376 write_size = min((unsigned long) size, write_end - index);
377 memcpy((void *)index, record, write_size);
369 378
370 return buffer; 379 record = (const char *)record + write_size;
380 size -= write_size;
381 bytes_written += write_size;
382
383 adj_write_size = write_size / ds_cfg.sizeof_rec[qual];
384 adj_write_size *= ds_cfg.sizeof_rec[qual];
385
386 /* zero out trailing bytes */
387 memset((char *)index + write_size, 0,
388 adj_write_size - write_size);
389 index += adj_write_size;
390
391 if (index >= end)
392 index = base;
393 ds_set(context->ds, qual, ds_index, index);
394
395 if (index >= int_th)
396 ds_overflow(context, qual);
397 }
398
399 return bytes_written;
371} 400}
372 401
373static int ds_request(struct task_struct *task, void *base, size_t size, 402
374 ds_ovfl_callback_t ovfl, enum ds_qualifier qual) 403/*
404 * Branch Trace Store (BTS) uses the following format. Different
405 * architectures vary in the size of those fields.
406 * - source linear address
407 * - destination linear address
408 * - flags
409 *
410 * Later architectures use 64bit pointers throughout, whereas earlier
411 * architectures use 32bit pointers in 32bit mode.
412 *
413 * We compute the base address for the first 8 fields based on:
414 * - the field size stored in the DS configuration
415 * - the relative field position
416 *
417 * In order to store additional information in the BTS buffer, we use
418 * a special source address to indicate that the record requires
419 * special interpretation.
420 *
421 * Netburst indicated via a bit in the flags field whether the branch
422 * was predicted; this is ignored.
423 *
424 * We use two levels of abstraction:
425 * - the raw data level defined here
426 * - an arch-independent level defined in ds.h
427 */
428
429enum bts_field {
430 bts_from,
431 bts_to,
432 bts_flags,
433
434 bts_qual = bts_from,
435 bts_jiffies = bts_to,
436 bts_pid = bts_flags,
437
438 bts_qual_mask = (bts_qual_max - 1),
439 bts_escape = ((unsigned long)-1 & ~bts_qual_mask)
440};
441
442static inline unsigned long bts_get(const char *base, enum bts_field field)
375{ 443{
376 struct ds_context *context; 444 base += (ds_cfg.sizeof_field * field);
377 unsigned long buffer, adj; 445 return *(unsigned long *)base;
378 const unsigned long alignment = (1 << 3); 446}
379 unsigned long irq; 447
380 int error = 0; 448static inline void bts_set(char *base, enum bts_field field, unsigned long val)
449{
450 base += (ds_cfg.sizeof_field * field);;
451 (*(unsigned long *)base) = val;
452}
381 453
382 if (!ds_cfg.sizeof_ds)
383 return -EOPNOTSUPP;
384 454
385 /* we require some space to do alignment adjustments below */ 455/*
386 if (size < (alignment + ds_cfg.sizeof_rec[qual])) 456 * The raw BTS data is architecture dependent.
457 *
458 * For higher-level users, we give an arch-independent view.
459 * - ds.h defines struct bts_struct
460 * - bts_read translates one raw bts record into a bts_struct
461 * - bts_write translates one bts_struct into the raw format and
462 * writes it into the top of the parameter tracer's buffer.
463 *
464 * return: bytes read/written on success; -Eerrno, otherwise
465 */
466static int bts_read(struct bts_tracer *tracer, const void *at,
467 struct bts_struct *out)
468{
469 if (!tracer)
387 return -EINVAL; 470 return -EINVAL;
388 471
389 /* buffer overflow notification is not yet implemented */ 472 if (at < tracer->trace.ds.begin)
390 if (ovfl) 473 return -EINVAL;
391 return -EOPNOTSUPP;
392 474
475 if (tracer->trace.ds.end < (at + tracer->trace.ds.size))
476 return -EINVAL;
393 477
394 context = ds_alloc_context(task); 478 memset(out, 0, sizeof(*out));
395 if (!context) 479 if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) {
396 return -ENOMEM; 480 out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask);
481 out->variant.timestamp.jiffies = bts_get(at, bts_jiffies);
482 out->variant.timestamp.pid = bts_get(at, bts_pid);
483 } else {
484 out->qualifier = bts_branch;
485 out->variant.lbr.from = bts_get(at, bts_from);
486 out->variant.lbr.to = bts_get(at, bts_to);
487
488 if (!out->variant.lbr.from && !out->variant.lbr.to)
489 out->qualifier = bts_invalid;
490 }
397 491
398 spin_lock_irqsave(&ds_lock, irq); 492 return ds_cfg.sizeof_rec[ds_bts];
493}
399 494
400 error = -EPERM; 495static int bts_write(struct bts_tracer *tracer, const struct bts_struct *in)
401 if (!check_tracer(task)) 496{
402 goto out_unlock; 497 unsigned char raw[MAX_SIZEOF_BTS];
403 498
404 get_tracer(task); 499 if (!tracer)
500 return -EINVAL;
405 501
406 error = -EALREADY; 502 if (MAX_SIZEOF_BTS < ds_cfg.sizeof_rec[ds_bts])
407 if (context->owner[qual] == current) 503 return -EOVERFLOW;
408 goto out_put_tracer;
409 error = -EPERM;
410 if (context->owner[qual] != NULL)
411 goto out_put_tracer;
412 context->owner[qual] = current;
413 504
414 spin_unlock_irqrestore(&ds_lock, irq); 505 switch (in->qualifier) {
506 case bts_invalid:
507 bts_set(raw, bts_from, 0);
508 bts_set(raw, bts_to, 0);
509 bts_set(raw, bts_flags, 0);
510 break;
511 case bts_branch:
512 bts_set(raw, bts_from, in->variant.lbr.from);
513 bts_set(raw, bts_to, in->variant.lbr.to);
514 bts_set(raw, bts_flags, 0);
515 break;
516 case bts_task_arrives:
517 case bts_task_departs:
518 bts_set(raw, bts_qual, (bts_escape | in->qualifier));
519 bts_set(raw, bts_jiffies, in->variant.timestamp.jiffies);
520 bts_set(raw, bts_pid, in->variant.timestamp.pid);
521 break;
522 default:
523 return -EINVAL;
524 }
415 525
526 return ds_write(tracer->ds.context, ds_bts, raw,
527 ds_cfg.sizeof_rec[ds_bts]);
528}
416 529
417 error = -ENOMEM;
418 if (!base) {
419 base = ds_allocate_buffer(size, &context->pages[qual]);
420 if (!base)
421 goto out_release;
422 530
423 context->buffer[qual] = base; 531static void ds_write_config(struct ds_context *context,
424 } 532 struct ds_trace *cfg, enum ds_qualifier qual)
425 error = 0; 533{
534 unsigned char *ds = context->ds;
535
536 ds_set(ds, qual, ds_buffer_base, (unsigned long)cfg->begin);
537 ds_set(ds, qual, ds_index, (unsigned long)cfg->top);
538 ds_set(ds, qual, ds_absolute_maximum, (unsigned long)cfg->end);
539 ds_set(ds, qual, ds_interrupt_threshold, (unsigned long)cfg->ith);
540}
541
542static void ds_read_config(struct ds_context *context,
543 struct ds_trace *cfg, enum ds_qualifier qual)
544{
545 unsigned char *ds = context->ds;
426 546
427 context->callback[qual] = ovfl; 547 cfg->begin = (void *)ds_get(ds, qual, ds_buffer_base);
548 cfg->top = (void *)ds_get(ds, qual, ds_index);
549 cfg->end = (void *)ds_get(ds, qual, ds_absolute_maximum);
550 cfg->ith = (void *)ds_get(ds, qual, ds_interrupt_threshold);
551}
552
553static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
554 void *base, size_t size, size_t ith,
555 unsigned int flags) {
556 unsigned long buffer, adj;
428 557
429 /* adjust the buffer address and size to meet alignment 558 /* adjust the buffer address and size to meet alignment
430 * constraints: 559 * constraints:
@@ -436,410 +565,383 @@ static int ds_request(struct task_struct *task, void *base, size_t size,
436 */ 565 */
437 buffer = (unsigned long)base; 566 buffer = (unsigned long)base;
438 567
439 adj = ALIGN(buffer, alignment) - buffer; 568 adj = ALIGN(buffer, DS_ALIGNMENT) - buffer;
440 buffer += adj; 569 buffer += adj;
441 size -= adj; 570 size -= adj;
442 571
443 size /= ds_cfg.sizeof_rec[qual]; 572 trace->n = size / ds_cfg.sizeof_rec[qual];
444 size *= ds_cfg.sizeof_rec[qual]; 573 trace->size = ds_cfg.sizeof_rec[qual];
445
446 ds_set(context->ds, qual, ds_buffer_base, buffer);
447 ds_set(context->ds, qual, ds_index, buffer);
448 ds_set(context->ds, qual, ds_absolute_maximum, buffer + size);
449 574
450 if (ovfl) { 575 size = (trace->n * trace->size);
451 /* todo: select a suitable interrupt threshold */
452 } else
453 ds_set(context->ds, qual,
454 ds_interrupt_threshold, buffer + size + 1);
455 576
456 /* we keep the context until ds_release */ 577 trace->begin = (void *)buffer;
457 return error; 578 trace->top = trace->begin;
458 579 trace->end = (void *)(buffer + size);
459 out_release: 580 /* The value for 'no threshold' is -1, which will set the
460 context->owner[qual] = NULL; 581 * threshold outside of the buffer, just like we want it.
461 ds_put_context(context); 582 */
462 put_tracer(task); 583 trace->ith = (void *)(buffer + size - ith);
463 return error;
464
465 out_put_tracer:
466 spin_unlock_irqrestore(&ds_lock, irq);
467 ds_put_context(context);
468 put_tracer(task);
469 return error;
470 584
471 out_unlock: 585 trace->flags = flags;
472 spin_unlock_irqrestore(&ds_lock, irq);
473 ds_put_context(context);
474 return error;
475} 586}
476 587
477int ds_request_bts(struct task_struct *task, void *base, size_t size,
478 ds_ovfl_callback_t ovfl)
479{
480 return ds_request(task, base, size, ovfl, ds_bts);
481}
482 588
483int ds_request_pebs(struct task_struct *task, void *base, size_t size, 589static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace,
484 ds_ovfl_callback_t ovfl) 590 enum ds_qualifier qual, struct task_struct *task,
485{ 591 void *base, size_t size, size_t th, unsigned int flags)
486 return ds_request(task, base, size, ovfl, ds_pebs);
487}
488
489static int ds_release(struct task_struct *task, enum ds_qualifier qual)
490{ 592{
491 struct ds_context *context; 593 struct ds_context *context;
492 int error; 594 int error;
493 595
494 context = ds_get_context(task); 596 error = -EINVAL;
495 error = ds_validate_access(context, qual); 597 if (!base)
496 if (error < 0)
497 goto out; 598 goto out;
498 599
499 kfree(context->buffer[qual]); 600 /* we require some space to do alignment adjustments below */
500 context->buffer[qual] = NULL; 601 error = -EINVAL;
501 602 if (size < (DS_ALIGNMENT + ds_cfg.sizeof_rec[qual]))
502 current->mm->total_vm -= context->pages[qual]; 603 goto out;
503 current->mm->locked_vm -= context->pages[qual];
504 context->pages[qual] = 0;
505 context->owner[qual] = NULL;
506
507 /*
508 * we put the context twice:
509 * once for the ds_get_context
510 * once for the corresponding ds_request
511 */
512 ds_put_context(context);
513 out:
514 ds_put_context(context);
515 return error;
516}
517 604
518int ds_release_bts(struct task_struct *task) 605 if (th != (size_t)-1) {
519{ 606 th *= ds_cfg.sizeof_rec[qual];
520 return ds_release(task, ds_bts);
521}
522 607
523int ds_release_pebs(struct task_struct *task) 608 error = -EINVAL;
524{ 609 if (size <= th)
525 return ds_release(task, ds_pebs); 610 goto out;
526} 611 }
527 612
528static int ds_get_index(struct task_struct *task, size_t *pos, 613 tracer->buffer = base;
529 enum ds_qualifier qual) 614 tracer->size = size;
530{
531 struct ds_context *context;
532 unsigned long base, index;
533 int error;
534 615
616 error = -ENOMEM;
535 context = ds_get_context(task); 617 context = ds_get_context(task);
536 error = ds_validate_access(context, qual); 618 if (!context)
537 if (error < 0)
538 goto out; 619 goto out;
620 tracer->context = context;
539 621
540 base = ds_get(context->ds, qual, ds_buffer_base); 622 ds_init_ds_trace(trace, qual, base, size, th, flags);
541 index = ds_get(context->ds, qual, ds_index);
542 623
543 error = ((index - base) / ds_cfg.sizeof_rec[qual]); 624 error = 0;
544 if (pos)
545 *pos = error;
546 out: 625 out:
547 ds_put_context(context);
548 return error; 626 return error;
549} 627}
550 628
551int ds_get_bts_index(struct task_struct *task, size_t *pos) 629struct bts_tracer *ds_request_bts(struct task_struct *task,
552{ 630 void *base, size_t size,
553 return ds_get_index(task, pos, ds_bts); 631 bts_ovfl_callback_t ovfl, size_t th,
554} 632 unsigned int flags)
555
556int ds_get_pebs_index(struct task_struct *task, size_t *pos)
557{ 633{
558 return ds_get_index(task, pos, ds_pebs); 634 struct bts_tracer *tracer;
559} 635 unsigned long irq;
560
561static int ds_get_end(struct task_struct *task, size_t *pos,
562 enum ds_qualifier qual)
563{
564 struct ds_context *context;
565 unsigned long base, end;
566 int error; 636 int error;
567 637
568 context = ds_get_context(task); 638 error = -EOPNOTSUPP;
569 error = ds_validate_access(context, qual); 639 if (!ds_cfg.ctl[dsf_bts])
570 if (error < 0)
571 goto out; 640 goto out;
572 641
573 base = ds_get(context->ds, qual, ds_buffer_base); 642 /* buffer overflow notification is not yet implemented */
574 end = ds_get(context->ds, qual, ds_absolute_maximum); 643 error = -EOPNOTSUPP;
644 if (ovfl)
645 goto out;
575 646
576 error = ((end - base) / ds_cfg.sizeof_rec[qual]); 647 error = -ENOMEM;
577 if (pos) 648 tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
578 *pos = error; 649 if (!tracer)
579 out: 650 goto out;
580 ds_put_context(context); 651 tracer->ovfl = ovfl;
581 return error;
582}
583 652
584int ds_get_bts_end(struct task_struct *task, size_t *pos) 653 error = ds_request(&tracer->ds, &tracer->trace.ds,
585{ 654 ds_bts, task, base, size, th, flags);
586 return ds_get_end(task, pos, ds_bts); 655 if (error < 0)
587} 656 goto out_tracer;
588 657
589int ds_get_pebs_end(struct task_struct *task, size_t *pos)
590{
591 return ds_get_end(task, pos, ds_pebs);
592}
593 658
594static int ds_access(struct task_struct *task, size_t index, 659 spin_lock_irqsave(&ds_lock, irq);
595 const void **record, enum ds_qualifier qual)
596{
597 struct ds_context *context;
598 unsigned long base, idx;
599 int error;
600 660
601 if (!record) 661 error = -EPERM;
602 return -EINVAL; 662 if (!check_tracer(task))
663 goto out_unlock;
664 get_tracer(task);
603 665
604 context = ds_get_context(task); 666 error = -EPERM;
605 error = ds_validate_access(context, qual); 667 if (tracer->ds.context->bts_master)
606 if (error < 0) 668 goto out_put_tracer;
607 goto out; 669 tracer->ds.context->bts_master = tracer;
608 670
609 base = ds_get(context->ds, qual, ds_buffer_base); 671 spin_unlock_irqrestore(&ds_lock, irq);
610 idx = base + (index * ds_cfg.sizeof_rec[qual]);
611 672
612 error = -EINVAL;
613 if (idx > ds_get(context->ds, qual, ds_absolute_maximum))
614 goto out;
615 673
616 *record = (const void *)idx; 674 tracer->trace.read = bts_read;
617 error = ds_cfg.sizeof_rec[qual]; 675 tracer->trace.write = bts_write;
618 out:
619 ds_put_context(context);
620 return error;
621}
622 676
623int ds_access_bts(struct task_struct *task, size_t index, const void **record) 677 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
624{ 678 ds_resume_bts(tracer);
625 return ds_access(task, index, record, ds_bts);
626}
627 679
628int ds_access_pebs(struct task_struct *task, size_t index, const void **record) 680 return tracer;
629{ 681
630 return ds_access(task, index, record, ds_pebs); 682 out_put_tracer:
683 put_tracer(task);
684 out_unlock:
685 spin_unlock_irqrestore(&ds_lock, irq);
686 ds_put_context(tracer->ds.context);
687 out_tracer:
688 kfree(tracer);
689 out:
690 return ERR_PTR(error);
631} 691}
632 692
633static int ds_write(struct task_struct *task, const void *record, size_t size, 693struct pebs_tracer *ds_request_pebs(struct task_struct *task,
634 enum ds_qualifier qual, int force) 694 void *base, size_t size,
695 pebs_ovfl_callback_t ovfl, size_t th,
696 unsigned int flags)
635{ 697{
636 struct ds_context *context; 698 struct pebs_tracer *tracer;
699 unsigned long irq;
637 int error; 700 int error;
638 701
639 if (!record) 702 /* buffer overflow notification is not yet implemented */
640 return -EINVAL; 703 error = -EOPNOTSUPP;
704 if (ovfl)
705 goto out;
641 706
642 error = -EPERM; 707 error = -ENOMEM;
643 context = ds_get_context(task); 708 tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
644 if (!context) 709 if (!tracer)
645 goto out; 710 goto out;
711 tracer->ovfl = ovfl;
646 712
647 if (!force) { 713 error = ds_request(&tracer->ds, &tracer->trace.ds,
648 error = ds_validate_access(context, qual); 714 ds_pebs, task, base, size, th, flags);
649 if (error < 0) 715 if (error < 0)
650 goto out; 716 goto out_tracer;
651 }
652 717
653 error = 0; 718 spin_lock_irqsave(&ds_lock, irq);
654 while (size) {
655 unsigned long base, index, end, write_end, int_th;
656 unsigned long write_size, adj_write_size;
657 719
658 /* 720 error = -EPERM;
659 * write as much as possible without producing an 721 if (!check_tracer(task))
660 * overflow interrupt. 722 goto out_unlock;
661 * 723 get_tracer(task);
662 * interrupt_threshold must either be
663 * - bigger than absolute_maximum or
664 * - point to a record between buffer_base and absolute_maximum
665 *
666 * index points to a valid record.
667 */
668 base = ds_get(context->ds, qual, ds_buffer_base);
669 index = ds_get(context->ds, qual, ds_index);
670 end = ds_get(context->ds, qual, ds_absolute_maximum);
671 int_th = ds_get(context->ds, qual, ds_interrupt_threshold);
672 724
673 write_end = min(end, int_th); 725 error = -EPERM;
726 if (tracer->ds.context->pebs_master)
727 goto out_put_tracer;
728 tracer->ds.context->pebs_master = tracer;
674 729
675 /* if we are already beyond the interrupt threshold, 730 spin_unlock_irqrestore(&ds_lock, irq);
676 * we fill the entire buffer */
677 if (write_end <= index)
678 write_end = end;
679 731
680 if (write_end <= index) 732 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
681 goto out; 733 ds_resume_pebs(tracer);
682 734
683 write_size = min((unsigned long) size, write_end - index); 735 return tracer;
684 memcpy((void *)index, record, write_size);
685 736
686 record = (const char *)record + write_size; 737 out_put_tracer:
687 size -= write_size; 738 put_tracer(task);
688 error += write_size; 739 out_unlock:
740 spin_unlock_irqrestore(&ds_lock, irq);
741 ds_put_context(tracer->ds.context);
742 out_tracer:
743 kfree(tracer);
744 out:
745 return ERR_PTR(error);
746}
689 747
690 adj_write_size = write_size / ds_cfg.sizeof_rec[qual]; 748void ds_release_bts(struct bts_tracer *tracer)
691 adj_write_size *= ds_cfg.sizeof_rec[qual]; 749{
750 if (!tracer)
751 return;
692 752
693 /* zero out trailing bytes */ 753 ds_suspend_bts(tracer);
694 memset((char *)index + write_size, 0,
695 adj_write_size - write_size);
696 index += adj_write_size;
697 754
698 if (index >= end) 755 WARN_ON_ONCE(tracer->ds.context->bts_master != tracer);
699 index = base; 756 tracer->ds.context->bts_master = NULL;
700 ds_set(context->ds, qual, ds_index, index);
701 757
702 if (index >= int_th) 758 put_tracer(tracer->ds.context->task);
703 ds_overflow(task, context, qual); 759 ds_put_context(tracer->ds.context);
704 }
705 760
706 out: 761 kfree(tracer);
707 ds_put_context(context);
708 return error;
709} 762}
710 763
711int ds_write_bts(struct task_struct *task, const void *record, size_t size) 764void ds_suspend_bts(struct bts_tracer *tracer)
712{ 765{
713 return ds_write(task, record, size, ds_bts, /* force = */ 0); 766 struct task_struct *task;
714}
715 767
716int ds_write_pebs(struct task_struct *task, const void *record, size_t size) 768 if (!tracer)
717{ 769 return;
718 return ds_write(task, record, size, ds_pebs, /* force = */ 0);
719}
720 770
721int ds_unchecked_write_bts(struct task_struct *task, 771 task = tracer->ds.context->task;
722 const void *record, size_t size)
723{
724 return ds_write(task, record, size, ds_bts, /* force = */ 1);
725}
726 772
727int ds_unchecked_write_pebs(struct task_struct *task, 773 if (!task || (task == current))
728 const void *record, size_t size) 774 update_debugctlmsr(get_debugctlmsr() & ~BTS_CONTROL);
729{ 775
730 return ds_write(task, record, size, ds_pebs, /* force = */ 1); 776 if (task) {
777 task->thread.debugctlmsr &= ~BTS_CONTROL;
778
779 if (!task->thread.debugctlmsr)
780 clear_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
781 }
731} 782}
732 783
733static int ds_reset_or_clear(struct task_struct *task, 784void ds_resume_bts(struct bts_tracer *tracer)
734 enum ds_qualifier qual, int clear)
735{ 785{
736 struct ds_context *context; 786 struct task_struct *task;
737 unsigned long base, end; 787 unsigned long control;
738 int error;
739 788
740 context = ds_get_context(task); 789 if (!tracer)
741 error = ds_validate_access(context, qual); 790 return;
742 if (error < 0)
743 goto out;
744 791
745 base = ds_get(context->ds, qual, ds_buffer_base); 792 task = tracer->ds.context->task;
746 end = ds_get(context->ds, qual, ds_absolute_maximum);
747 793
748 if (clear) 794 control = ds_cfg.ctl[dsf_bts];
749 memset((void *)base, 0, end - base); 795 if (!(tracer->trace.ds.flags & BTS_KERNEL))
796 control |= ds_cfg.ctl[dsf_bts_kernel];
797 if (!(tracer->trace.ds.flags & BTS_USER))
798 control |= ds_cfg.ctl[dsf_bts_user];
750 799
751 ds_set(context->ds, qual, ds_index, base); 800 if (task) {
801 task->thread.debugctlmsr |= control;
802 set_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
803 }
752 804
753 error = 0; 805 if (!task || (task == current))
754 out: 806 update_debugctlmsr(get_debugctlmsr() | control);
755 ds_put_context(context);
756 return error;
757} 807}
758 808
759int ds_reset_bts(struct task_struct *task) 809void ds_release_pebs(struct pebs_tracer *tracer)
760{ 810{
761 return ds_reset_or_clear(task, ds_bts, /* clear = */ 0); 811 if (!tracer)
812 return;
813
814 ds_suspend_pebs(tracer);
815
816 WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer);
817 tracer->ds.context->pebs_master = NULL;
818
819 put_tracer(tracer->ds.context->task);
820 ds_put_context(tracer->ds.context);
821
822 kfree(tracer);
762} 823}
763 824
764int ds_reset_pebs(struct task_struct *task) 825void ds_suspend_pebs(struct pebs_tracer *tracer)
765{ 826{
766 return ds_reset_or_clear(task, ds_pebs, /* clear = */ 0); 827
767} 828}
768 829
769int ds_clear_bts(struct task_struct *task) 830void ds_resume_pebs(struct pebs_tracer *tracer)
770{ 831{
771 return ds_reset_or_clear(task, ds_bts, /* clear = */ 1); 832
772} 833}
773 834
774int ds_clear_pebs(struct task_struct *task) 835const struct bts_trace *ds_read_bts(struct bts_tracer *tracer)
775{ 836{
776 return ds_reset_or_clear(task, ds_pebs, /* clear = */ 1); 837 if (!tracer)
838 return NULL;
839
840 ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
841 return &tracer->trace;
777} 842}
778 843
779int ds_get_pebs_reset(struct task_struct *task, u64 *value) 844const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer)
780{ 845{
781 struct ds_context *context; 846 if (!tracer)
782 int error; 847 return NULL;
848
849 ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
850 tracer->trace.reset_value =
851 *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8));
783 852
784 if (!value) 853 return &tracer->trace;
854}
855
856int ds_reset_bts(struct bts_tracer *tracer)
857{
858 if (!tracer)
785 return -EINVAL; 859 return -EINVAL;
786 860
787 context = ds_get_context(task); 861 tracer->trace.ds.top = tracer->trace.ds.begin;
788 error = ds_validate_access(context, ds_pebs);
789 if (error < 0)
790 goto out;
791 862
792 *value = *(u64 *)(context->ds + (ds_cfg.sizeof_field * 8)); 863 ds_set(tracer->ds.context->ds, ds_bts, ds_index,
864 (unsigned long)tracer->trace.ds.top);
793 865
794 error = 0; 866 return 0;
795 out:
796 ds_put_context(context);
797 return error;
798} 867}
799 868
800int ds_set_pebs_reset(struct task_struct *task, u64 value) 869int ds_reset_pebs(struct pebs_tracer *tracer)
801{ 870{
802 struct ds_context *context; 871 if (!tracer)
803 int error; 872 return -EINVAL;
804 873
805 context = ds_get_context(task); 874 tracer->trace.ds.top = tracer->trace.ds.begin;
806 error = ds_validate_access(context, ds_pebs);
807 if (error < 0)
808 goto out;
809 875
810 *(u64 *)(context->ds + (ds_cfg.sizeof_field * 8)) = value; 876 ds_set(tracer->ds.context->ds, ds_bts, ds_index,
877 (unsigned long)tracer->trace.ds.top);
811 878
812 error = 0; 879 return 0;
813 out: 880}
814 ds_put_context(context); 881
815 return error; 882int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value)
883{
884 if (!tracer)
885 return -EINVAL;
886
887 *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8)) = value;
888
889 return 0;
816} 890}
817 891
818static const struct ds_configuration ds_cfg_var = { 892static const struct ds_configuration ds_cfg_netburst = {
819 .sizeof_ds = sizeof(long) * 12, 893 .name = "netburst",
820 .sizeof_field = sizeof(long), 894 .ctl[dsf_bts] = (1 << 2) | (1 << 3),
821 .sizeof_rec[ds_bts] = sizeof(long) * 3, 895 .ctl[dsf_bts_kernel] = (1 << 5),
896 .ctl[dsf_bts_user] = (1 << 6),
897
898 .sizeof_field = sizeof(long),
899 .sizeof_rec[ds_bts] = sizeof(long) * 3,
822#ifdef __i386__ 900#ifdef __i386__
823 .sizeof_rec[ds_pebs] = sizeof(long) * 10 901 .sizeof_rec[ds_pebs] = sizeof(long) * 10,
824#else 902#else
825 .sizeof_rec[ds_pebs] = sizeof(long) * 18 903 .sizeof_rec[ds_pebs] = sizeof(long) * 18,
826#endif 904#endif
827}; 905};
828static const struct ds_configuration ds_cfg_64 = { 906static const struct ds_configuration ds_cfg_pentium_m = {
829 .sizeof_ds = 8 * 12, 907 .name = "pentium m",
830 .sizeof_field = 8, 908 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
831 .sizeof_rec[ds_bts] = 8 * 3, 909
910 .sizeof_field = sizeof(long),
911 .sizeof_rec[ds_bts] = sizeof(long) * 3,
832#ifdef __i386__ 912#ifdef __i386__
833 .sizeof_rec[ds_pebs] = 8 * 10 913 .sizeof_rec[ds_pebs] = sizeof(long) * 10,
834#else 914#else
835 .sizeof_rec[ds_pebs] = 8 * 18 915 .sizeof_rec[ds_pebs] = sizeof(long) * 18,
836#endif 916#endif
837}; 917};
918static const struct ds_configuration ds_cfg_core2 = {
919 .name = "core 2",
920 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
921 .ctl[dsf_bts_kernel] = (1 << 9),
922 .ctl[dsf_bts_user] = (1 << 10),
923
924 .sizeof_field = 8,
925 .sizeof_rec[ds_bts] = 8 * 3,
926 .sizeof_rec[ds_pebs] = 8 * 18,
927};
838 928
839static inline void 929static void
840ds_configure(const struct ds_configuration *cfg) 930ds_configure(const struct ds_configuration *cfg)
841{ 931{
932 memset(&ds_cfg, 0, sizeof(ds_cfg));
842 ds_cfg = *cfg; 933 ds_cfg = *cfg;
934
935 printk(KERN_INFO "[ds] using %s configuration\n", ds_cfg.name);
936
937 if (!cpu_has_bts) {
938 ds_cfg.ctl[dsf_bts] = 0;
939 printk(KERN_INFO "[ds] bts not available\n");
940 }
941 if (!cpu_has_pebs)
942 printk(KERN_INFO "[ds] pebs not available\n");
943
944 WARN_ON_ONCE(MAX_SIZEOF_DS < (12 * ds_cfg.sizeof_field));
843} 945}
844 946
845void __cpuinit ds_init_intel(struct cpuinfo_x86 *c) 947void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
@@ -847,16 +949,15 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
847 switch (c->x86) { 949 switch (c->x86) {
848 case 0x6: 950 case 0x6:
849 switch (c->x86_model) { 951 switch (c->x86_model) {
952 case 0 ... 0xC:
953 /* sorry, don't know about them */
954 break;
850 case 0xD: 955 case 0xD:
851 case 0xE: /* Pentium M */ 956 case 0xE: /* Pentium M */
852 ds_configure(&ds_cfg_var); 957 ds_configure(&ds_cfg_pentium_m);
853 break; 958 break;
854 case 0xF: /* Core2 */ 959 default: /* Core2, Atom, ... */
855 case 0x1C: /* Atom */ 960 ds_configure(&ds_cfg_core2);
856 ds_configure(&ds_cfg_64);
857 break;
858 default:
859 /* sorry, don't know about them */
860 break; 961 break;
861 } 962 }
862 break; 963 break;
@@ -865,7 +966,7 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
865 case 0x0: 966 case 0x0:
866 case 0x1: 967 case 0x1:
867 case 0x2: /* Netburst */ 968 case 0x2: /* Netburst */
868 ds_configure(&ds_cfg_var); 969 ds_configure(&ds_cfg_netburst);
869 break; 970 break;
870 default: 971 default:
871 /* sorry, don't know about them */ 972 /* sorry, don't know about them */
@@ -878,12 +979,52 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
878 } 979 }
879} 980}
880 981
881void ds_free(struct ds_context *context) 982/*
983 * Change the DS configuration from tracing prev to tracing next.
984 */
985void ds_switch_to(struct task_struct *prev, struct task_struct *next)
986{
987 struct ds_context *prev_ctx = prev->thread.ds_ctx;
988 struct ds_context *next_ctx = next->thread.ds_ctx;
989
990 if (prev_ctx) {
991 update_debugctlmsr(0);
992
993 if (prev_ctx->bts_master &&
994 (prev_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
995 struct bts_struct ts = {
996 .qualifier = bts_task_departs,
997 .variant.timestamp.jiffies = jiffies_64,
998 .variant.timestamp.pid = prev->pid
999 };
1000 bts_write(prev_ctx->bts_master, &ts);
1001 }
1002 }
1003
1004 if (next_ctx) {
1005 if (next_ctx->bts_master &&
1006 (next_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
1007 struct bts_struct ts = {
1008 .qualifier = bts_task_arrives,
1009 .variant.timestamp.jiffies = jiffies_64,
1010 .variant.timestamp.pid = next->pid
1011 };
1012 bts_write(next_ctx->bts_master, &ts);
1013 }
1014
1015 wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds);
1016 }
1017
1018 update_debugctlmsr(next->thread.debugctlmsr);
1019}
1020
1021void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
1022{
1023 clear_tsk_thread_flag(tsk, TIF_DS_AREA_MSR);
1024 tsk->thread.ds_ctx = NULL;
1025}
1026
1027void ds_exit_thread(struct task_struct *tsk)
882{ 1028{
883 /* This is called when the task owning the parameter context 1029 WARN_ON(tsk->thread.ds_ctx);
884 * is dying. There should not be any user of that context left
885 * to disturb us, anymore. */
886 unsigned long leftovers = context->count;
887 while (leftovers--)
888 ds_put_context(context);
889} 1030}
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
new file mode 100644
index 000000000000..6b1f6f6f8661
--- /dev/null
+++ b/arch/x86/kernel/dumpstack.c
@@ -0,0 +1,351 @@
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 */
5#include <linux/kallsyms.h>
6#include <linux/kprobes.h>
7#include <linux/uaccess.h>
8#include <linux/utsname.h>
9#include <linux/hardirq.h>
10#include <linux/kdebug.h>
11#include <linux/module.h>
12#include <linux/ptrace.h>
13#include <linux/kexec.h>
14#include <linux/bug.h>
15#include <linux/nmi.h>
16#include <linux/sysfs.h>
17
18#include <asm/stacktrace.h>
19
20#include "dumpstack.h"
21
22int panic_on_unrecovered_nmi;
23unsigned int code_bytes = 64;
24int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
25static int die_counter;
26
27void printk_address(unsigned long address, int reliable)
28{
29 printk(" [<%p>] %s%pS\n", (void *) address,
30 reliable ? "" : "? ", (void *) address);
31}
32
33#ifdef CONFIG_FUNCTION_GRAPH_TRACER
34static void
35print_ftrace_graph_addr(unsigned long addr, void *data,
36 const struct stacktrace_ops *ops,
37 struct thread_info *tinfo, int *graph)
38{
39 struct task_struct *task = tinfo->task;
40 unsigned long ret_addr;
41 int index = task->curr_ret_stack;
42
43 if (addr != (unsigned long)return_to_handler)
44 return;
45
46 if (!task->ret_stack || index < *graph)
47 return;
48
49 index -= *graph;
50 ret_addr = task->ret_stack[index].ret;
51
52 ops->address(data, ret_addr, 1);
53
54 (*graph)++;
55}
56#else
57static inline void
58print_ftrace_graph_addr(unsigned long addr, void *data,
59 const struct stacktrace_ops *ops,
60 struct thread_info *tinfo, int *graph)
61{ }
62#endif
63
64/*
65 * x86-64 can have up to three kernel stacks:
66 * process stack
67 * interrupt stack
68 * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack
69 */
70
71static inline int valid_stack_ptr(struct thread_info *tinfo,
72 void *p, unsigned int size, void *end)
73{
74 void *t = tinfo;
75 if (end) {
76 if (p < end && p >= (end-THREAD_SIZE))
77 return 1;
78 else
79 return 0;
80 }
81 return p > t && p < t + THREAD_SIZE - size;
82}
83
84unsigned long
85print_context_stack(struct thread_info *tinfo,
86 unsigned long *stack, unsigned long bp,
87 const struct stacktrace_ops *ops, void *data,
88 unsigned long *end, int *graph)
89{
90 struct stack_frame *frame = (struct stack_frame *)bp;
91
92 while (valid_stack_ptr(tinfo, stack, sizeof(*stack), end)) {
93 unsigned long addr;
94
95 addr = *stack;
96 if (__kernel_text_address(addr)) {
97 if ((unsigned long) stack == bp + sizeof(long)) {
98 ops->address(data, addr, 1);
99 frame = frame->next_frame;
100 bp = (unsigned long) frame;
101 } else {
102 ops->address(data, addr, bp == 0);
103 }
104 print_ftrace_graph_addr(addr, data, ops, tinfo, graph);
105 }
106 stack++;
107 }
108 return bp;
109}
110
111
112static void
113print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
114{
115 printk(data);
116 print_symbol(msg, symbol);
117 printk("\n");
118}
119
120static void print_trace_warning(void *data, char *msg)
121{
122 printk("%s%s\n", (char *)data, msg);
123}
124
125static int print_trace_stack(void *data, char *name)
126{
127 printk("%s <%s> ", (char *)data, name);
128 return 0;
129}
130
131/*
132 * Print one address/symbol entries per line.
133 */
134static void print_trace_address(void *data, unsigned long addr, int reliable)
135{
136 touch_nmi_watchdog();
137 printk(data);
138 printk_address(addr, reliable);
139}
140
141static const struct stacktrace_ops print_trace_ops = {
142 .warning = print_trace_warning,
143 .warning_symbol = print_trace_warning_symbol,
144 .stack = print_trace_stack,
145 .address = print_trace_address,
146};
147
148void
149show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
150 unsigned long *stack, unsigned long bp, char *log_lvl)
151{
152 printk("%sCall Trace:\n", log_lvl);
153 dump_trace(task, regs, stack, bp, &print_trace_ops, log_lvl);
154}
155
156void show_trace(struct task_struct *task, struct pt_regs *regs,
157 unsigned long *stack, unsigned long bp)
158{
159 show_trace_log_lvl(task, regs, stack, bp, "");
160}
161
162void show_stack(struct task_struct *task, unsigned long *sp)
163{
164 show_stack_log_lvl(task, NULL, sp, 0, "");
165}
166
167/*
168 * The architecture-independent dump_stack generator
169 */
170void dump_stack(void)
171{
172 unsigned long bp = 0;
173 unsigned long stack;
174
175#ifdef CONFIG_FRAME_POINTER
176 if (!bp)
177 get_bp(bp);
178#endif
179
180 printk("Pid: %d, comm: %.20s %s %s %.*s\n",
181 current->pid, current->comm, print_tainted(),
182 init_utsname()->release,
183 (int)strcspn(init_utsname()->version, " "),
184 init_utsname()->version);
185 show_trace(NULL, NULL, &stack, bp);
186}
187EXPORT_SYMBOL(dump_stack);
188
189static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKED;
190static int die_owner = -1;
191static unsigned int die_nest_count;
192
193unsigned __kprobes long oops_begin(void)
194{
195 int cpu;
196 unsigned long flags;
197
198 oops_enter();
199
200 /* racy, but better than risking deadlock. */
201 raw_local_irq_save(flags);
202 cpu = smp_processor_id();
203 if (!__raw_spin_trylock(&die_lock)) {
204 if (cpu == die_owner)
205 /* nested oops. should stop eventually */;
206 else
207 __raw_spin_lock(&die_lock);
208 }
209 die_nest_count++;
210 die_owner = cpu;
211 console_verbose();
212 bust_spinlocks(1);
213 return flags;
214}
215
216void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)
217{
218 if (regs && kexec_should_crash(current))
219 crash_kexec(regs);
220
221 bust_spinlocks(0);
222 die_owner = -1;
223 add_taint(TAINT_DIE);
224 die_nest_count--;
225 if (!die_nest_count)
226 /* Nest count reaches zero, release the lock. */
227 __raw_spin_unlock(&die_lock);
228 raw_local_irq_restore(flags);
229 oops_exit();
230
231 if (!signr)
232 return;
233 if (in_interrupt())
234 panic("Fatal exception in interrupt");
235 if (panic_on_oops)
236 panic("Fatal exception");
237 do_exit(signr);
238}
239
240int __kprobes __die(const char *str, struct pt_regs *regs, long err)
241{
242#ifdef CONFIG_X86_32
243 unsigned short ss;
244 unsigned long sp;
245#endif
246 printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
247#ifdef CONFIG_PREEMPT
248 printk("PREEMPT ");
249#endif
250#ifdef CONFIG_SMP
251 printk("SMP ");
252#endif
253#ifdef CONFIG_DEBUG_PAGEALLOC
254 printk("DEBUG_PAGEALLOC");
255#endif
256 printk("\n");
257 sysfs_printk_last_file();
258 if (notify_die(DIE_OOPS, str, regs, err,
259 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
260 return 1;
261
262 show_registers(regs);
263#ifdef CONFIG_X86_32
264 sp = (unsigned long) (&regs->sp);
265 savesegment(ss, ss);
266 if (user_mode(regs)) {
267 sp = regs->sp;
268 ss = regs->ss & 0xffff;
269 }
270 printk(KERN_EMERG "EIP: [<%08lx>] ", regs->ip);
271 print_symbol("%s", regs->ip);
272 printk(" SS:ESP %04x:%08lx\n", ss, sp);
273#else
274 /* Executive summary in case the oops scrolled away */
275 printk(KERN_ALERT "RIP ");
276 printk_address(regs->ip, 1);
277 printk(" RSP <%016lx>\n", regs->sp);
278#endif
279 return 0;
280}
281
282/*
283 * This is gone through when something in the kernel has done something bad
284 * and is about to be terminated:
285 */
286void die(const char *str, struct pt_regs *regs, long err)
287{
288 unsigned long flags = oops_begin();
289 int sig = SIGSEGV;
290
291 if (!user_mode_vm(regs))
292 report_bug(regs->ip, regs);
293
294 if (__die(str, regs, err))
295 sig = 0;
296 oops_end(flags, regs, sig);
297}
298
299void notrace __kprobes
300die_nmi(char *str, struct pt_regs *regs, int do_panic)
301{
302 unsigned long flags;
303
304 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
305 return;
306
307 /*
308 * We are in trouble anyway, lets at least try
309 * to get a message out.
310 */
311 flags = oops_begin();
312 printk(KERN_EMERG "%s", str);
313 printk(" on CPU%d, ip %08lx, registers:\n",
314 smp_processor_id(), regs->ip);
315 show_registers(regs);
316 oops_end(flags, regs, 0);
317 if (do_panic || panic_on_oops)
318 panic("Non maskable interrupt");
319 nmi_exit();
320 local_irq_enable();
321 do_exit(SIGBUS);
322}
323
324static int __init oops_setup(char *s)
325{
326 if (!s)
327 return -EINVAL;
328 if (!strcmp(s, "panic"))
329 panic_on_oops = 1;
330 return 0;
331}
332early_param("oops", oops_setup);
333
334static int __init kstack_setup(char *s)
335{
336 if (!s)
337 return -EINVAL;
338 kstack_depth_to_print = simple_strtoul(s, NULL, 0);
339 return 0;
340}
341early_param("kstack", kstack_setup);
342
343static int __init code_bytes_setup(char *s)
344{
345 code_bytes = simple_strtoul(s, NULL, 0);
346 if (code_bytes > 8192)
347 code_bytes = 8192;
348
349 return 1;
350}
351__setup("code_bytes=", code_bytes_setup);
diff --git a/arch/x86/kernel/dumpstack.h b/arch/x86/kernel/dumpstack.h
new file mode 100644
index 000000000000..da87590b8698
--- /dev/null
+++ b/arch/x86/kernel/dumpstack.h
@@ -0,0 +1,39 @@
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 */
5
6#ifndef DUMPSTACK_H
7#define DUMPSTACK_H
8
9#ifdef CONFIG_X86_32
10#define STACKSLOTS_PER_LINE 8
11#define get_bp(bp) asm("movl %%ebp, %0" : "=r" (bp) :)
12#else
13#define STACKSLOTS_PER_LINE 4
14#define get_bp(bp) asm("movq %%rbp, %0" : "=r" (bp) :)
15#endif
16
17extern unsigned long
18print_context_stack(struct thread_info *tinfo,
19 unsigned long *stack, unsigned long bp,
20 const struct stacktrace_ops *ops, void *data,
21 unsigned long *end, int *graph);
22
23extern void
24show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
25 unsigned long *stack, unsigned long bp, char *log_lvl);
26
27extern void
28show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
29 unsigned long *sp, unsigned long bp, char *log_lvl);
30
31extern unsigned int code_bytes;
32extern int kstack_depth_to_print;
33
34/* The form of the top of the frame on the stack */
35struct stack_frame {
36 struct stack_frame *next_frame;
37 unsigned long return_address;
38};
39#endif
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index b3614752197b..d593cd1f58dc 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -17,69 +17,14 @@
17 17
18#include <asm/stacktrace.h> 18#include <asm/stacktrace.h>
19 19
20#define STACKSLOTS_PER_LINE 8 20#include "dumpstack.h"
21#define get_bp(bp) asm("movl %%ebp, %0" : "=r" (bp) :)
22
23int panic_on_unrecovered_nmi;
24int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
25static unsigned int code_bytes = 64;
26static int die_counter;
27
28void printk_address(unsigned long address, int reliable)
29{
30 printk(" [<%p>] %s%pS\n", (void *) address,
31 reliable ? "" : "? ", (void *) address);
32}
33
34static inline int valid_stack_ptr(struct thread_info *tinfo,
35 void *p, unsigned int size, void *end)
36{
37 void *t = tinfo;
38 if (end) {
39 if (p < end && p >= (end-THREAD_SIZE))
40 return 1;
41 else
42 return 0;
43 }
44 return p > t && p < t + THREAD_SIZE - size;
45}
46
47/* The form of the top of the frame on the stack */
48struct stack_frame {
49 struct stack_frame *next_frame;
50 unsigned long return_address;
51};
52
53static inline unsigned long
54print_context_stack(struct thread_info *tinfo,
55 unsigned long *stack, unsigned long bp,
56 const struct stacktrace_ops *ops, void *data,
57 unsigned long *end)
58{
59 struct stack_frame *frame = (struct stack_frame *)bp;
60
61 while (valid_stack_ptr(tinfo, stack, sizeof(*stack), end)) {
62 unsigned long addr;
63
64 addr = *stack;
65 if (__kernel_text_address(addr)) {
66 if ((unsigned long) stack == bp + sizeof(long)) {
67 ops->address(data, addr, 1);
68 frame = frame->next_frame;
69 bp = (unsigned long) frame;
70 } else {
71 ops->address(data, addr, bp == 0);
72 }
73 }
74 stack++;
75 }
76 return bp;
77}
78 21
79void dump_trace(struct task_struct *task, struct pt_regs *regs, 22void dump_trace(struct task_struct *task, struct pt_regs *regs,
80 unsigned long *stack, unsigned long bp, 23 unsigned long *stack, unsigned long bp,
81 const struct stacktrace_ops *ops, void *data) 24 const struct stacktrace_ops *ops, void *data)
82{ 25{
26 int graph = 0;
27
83 if (!task) 28 if (!task)
84 task = current; 29 task = current;
85 30
@@ -107,7 +52,8 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
107 52
108 context = (struct thread_info *) 53 context = (struct thread_info *)
109 ((unsigned long)stack & (~(THREAD_SIZE - 1))); 54 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
110 bp = print_context_stack(context, stack, bp, ops, data, NULL); 55 bp = print_context_stack(context, stack, bp, ops,
56 data, NULL, &graph);
111 57
112 stack = (unsigned long *)context->previous_esp; 58 stack = (unsigned long *)context->previous_esp;
113 if (!stack) 59 if (!stack)
@@ -119,57 +65,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
119} 65}
120EXPORT_SYMBOL(dump_trace); 66EXPORT_SYMBOL(dump_trace);
121 67
122static void 68void
123print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
124{
125 printk(data);
126 print_symbol(msg, symbol);
127 printk("\n");
128}
129
130static void print_trace_warning(void *data, char *msg)
131{
132 printk("%s%s\n", (char *)data, msg);
133}
134
135static int print_trace_stack(void *data, char *name)
136{
137 printk("%s <%s> ", (char *)data, name);
138 return 0;
139}
140
141/*
142 * Print one address/symbol entries per line.
143 */
144static void print_trace_address(void *data, unsigned long addr, int reliable)
145{
146 touch_nmi_watchdog();
147 printk(data);
148 printk_address(addr, reliable);
149}
150
151static const struct stacktrace_ops print_trace_ops = {
152 .warning = print_trace_warning,
153 .warning_symbol = print_trace_warning_symbol,
154 .stack = print_trace_stack,
155 .address = print_trace_address,
156};
157
158static void
159show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
160 unsigned long *stack, unsigned long bp, char *log_lvl)
161{
162 printk("%sCall Trace:\n", log_lvl);
163 dump_trace(task, regs, stack, bp, &print_trace_ops, log_lvl);
164}
165
166void show_trace(struct task_struct *task, struct pt_regs *regs,
167 unsigned long *stack, unsigned long bp)
168{
169 show_trace_log_lvl(task, regs, stack, bp, "");
170}
171
172static void
173show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs, 69show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
174 unsigned long *sp, unsigned long bp, char *log_lvl) 70 unsigned long *sp, unsigned long bp, char *log_lvl)
175{ 71{
@@ -196,33 +92,6 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
196 show_trace_log_lvl(task, regs, sp, bp, log_lvl); 92 show_trace_log_lvl(task, regs, sp, bp, log_lvl);
197} 93}
198 94
199void show_stack(struct task_struct *task, unsigned long *sp)
200{
201 show_stack_log_lvl(task, NULL, sp, 0, "");
202}
203
204/*
205 * The architecture-independent dump_stack generator
206 */
207void dump_stack(void)
208{
209 unsigned long bp = 0;
210 unsigned long stack;
211
212#ifdef CONFIG_FRAME_POINTER
213 if (!bp)
214 get_bp(bp);
215#endif
216
217 printk("Pid: %d, comm: %.20s %s %s %.*s\n",
218 current->pid, current->comm, print_tainted(),
219 init_utsname()->release,
220 (int)strcspn(init_utsname()->version, " "),
221 init_utsname()->version);
222 show_trace(NULL, NULL, &stack, bp);
223}
224
225EXPORT_SYMBOL(dump_stack);
226 95
227void show_registers(struct pt_regs *regs) 96void show_registers(struct pt_regs *regs)
228{ 97{
@@ -283,167 +152,3 @@ int is_valid_bugaddr(unsigned long ip)
283 return ud2 == 0x0b0f; 152 return ud2 == 0x0b0f;
284} 153}
285 154
286static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKED;
287static int die_owner = -1;
288static unsigned int die_nest_count;
289
290unsigned __kprobes long oops_begin(void)
291{
292 unsigned long flags;
293
294 oops_enter();
295
296 if (die_owner != raw_smp_processor_id()) {
297 console_verbose();
298 raw_local_irq_save(flags);
299 __raw_spin_lock(&die_lock);
300 die_owner = smp_processor_id();
301 die_nest_count = 0;
302 bust_spinlocks(1);
303 } else {
304 raw_local_irq_save(flags);
305 }
306 die_nest_count++;
307 return flags;
308}
309
310void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)
311{
312 bust_spinlocks(0);
313 die_owner = -1;
314 add_taint(TAINT_DIE);
315 __raw_spin_unlock(&die_lock);
316 raw_local_irq_restore(flags);
317
318 if (!regs)
319 return;
320
321 if (kexec_should_crash(current))
322 crash_kexec(regs);
323 if (in_interrupt())
324 panic("Fatal exception in interrupt");
325 if (panic_on_oops)
326 panic("Fatal exception");
327 oops_exit();
328 do_exit(signr);
329}
330
331int __kprobes __die(const char *str, struct pt_regs *regs, long err)
332{
333 unsigned short ss;
334 unsigned long sp;
335
336 printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
337#ifdef CONFIG_PREEMPT
338 printk("PREEMPT ");
339#endif
340#ifdef CONFIG_SMP
341 printk("SMP ");
342#endif
343#ifdef CONFIG_DEBUG_PAGEALLOC
344 printk("DEBUG_PAGEALLOC");
345#endif
346 printk("\n");
347 sysfs_printk_last_file();
348 if (notify_die(DIE_OOPS, str, regs, err,
349 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
350 return 1;
351
352 show_registers(regs);
353 /* Executive summary in case the oops scrolled away */
354 sp = (unsigned long) (&regs->sp);
355 savesegment(ss, ss);
356 if (user_mode(regs)) {
357 sp = regs->sp;
358 ss = regs->ss & 0xffff;
359 }
360 printk(KERN_EMERG "EIP: [<%08lx>] ", regs->ip);
361 print_symbol("%s", regs->ip);
362 printk(" SS:ESP %04x:%08lx\n", ss, sp);
363 return 0;
364}
365
366/*
367 * This is gone through when something in the kernel has done something bad
368 * and is about to be terminated:
369 */
370void die(const char *str, struct pt_regs *regs, long err)
371{
372 unsigned long flags = oops_begin();
373
374 if (die_nest_count < 3) {
375 report_bug(regs->ip, regs);
376
377 if (__die(str, regs, err))
378 regs = NULL;
379 } else {
380 printk(KERN_EMERG "Recursive die() failure, output suppressed\n");
381 }
382
383 oops_end(flags, regs, SIGSEGV);
384}
385
386static DEFINE_SPINLOCK(nmi_print_lock);
387
388void notrace __kprobes
389die_nmi(char *str, struct pt_regs *regs, int do_panic)
390{
391 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
392 return;
393
394 spin_lock(&nmi_print_lock);
395 /*
396 * We are in trouble anyway, lets at least try
397 * to get a message out:
398 */
399 bust_spinlocks(1);
400 printk(KERN_EMERG "%s", str);
401 printk(" on CPU%d, ip %08lx, registers:\n",
402 smp_processor_id(), regs->ip);
403 show_registers(regs);
404 if (do_panic)
405 panic("Non maskable interrupt");
406 console_silent();
407 spin_unlock(&nmi_print_lock);
408
409 /*
410 * If we are in kernel we are probably nested up pretty bad
411 * and might aswell get out now while we still can:
412 */
413 if (!user_mode_vm(regs)) {
414 current->thread.trap_no = 2;
415 crash_kexec(regs);
416 }
417
418 bust_spinlocks(0);
419 do_exit(SIGSEGV);
420}
421
422static int __init oops_setup(char *s)
423{
424 if (!s)
425 return -EINVAL;
426 if (!strcmp(s, "panic"))
427 panic_on_oops = 1;
428 return 0;
429}
430early_param("oops", oops_setup);
431
432static int __init kstack_setup(char *s)
433{
434 if (!s)
435 return -EINVAL;
436 kstack_depth_to_print = simple_strtoul(s, NULL, 0);
437 return 0;
438}
439early_param("kstack", kstack_setup);
440
441static int __init code_bytes_setup(char *s)
442{
443 code_bytes = simple_strtoul(s, NULL, 0);
444 if (code_bytes > 8192)
445 code_bytes = 8192;
446
447 return 1;
448}
449__setup("code_bytes=", code_bytes_setup);
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 96a5db7da8a7..c302d0707048 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -17,19 +17,7 @@
17 17
18#include <asm/stacktrace.h> 18#include <asm/stacktrace.h>
19 19
20#define STACKSLOTS_PER_LINE 4 20#include "dumpstack.h"
21#define get_bp(bp) asm("movq %%rbp, %0" : "=r" (bp) :)
22
23int panic_on_unrecovered_nmi;
24int kstack_depth_to_print = 3 * STACKSLOTS_PER_LINE;
25static unsigned int code_bytes = 64;
26static int die_counter;
27
28void printk_address(unsigned long address, int reliable)
29{
30 printk(" [<%p>] %s%pS\n", (void *) address,
31 reliable ? "" : "? ", (void *) address);
32}
33 21
34static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack, 22static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
35 unsigned *usedp, char **idp) 23 unsigned *usedp, char **idp)
@@ -113,51 +101,6 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack,
113 * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack 101 * severe exception (double fault, nmi, stack fault, debug, mce) hardware stack
114 */ 102 */
115 103
116static inline int valid_stack_ptr(struct thread_info *tinfo,
117 void *p, unsigned int size, void *end)
118{
119 void *t = tinfo;
120 if (end) {
121 if (p < end && p >= (end-THREAD_SIZE))
122 return 1;
123 else
124 return 0;
125 }
126 return p > t && p < t + THREAD_SIZE - size;
127}
128
129/* The form of the top of the frame on the stack */
130struct stack_frame {
131 struct stack_frame *next_frame;
132 unsigned long return_address;
133};
134
135static inline unsigned long
136print_context_stack(struct thread_info *tinfo,
137 unsigned long *stack, unsigned long bp,
138 const struct stacktrace_ops *ops, void *data,
139 unsigned long *end)
140{
141 struct stack_frame *frame = (struct stack_frame *)bp;
142
143 while (valid_stack_ptr(tinfo, stack, sizeof(*stack), end)) {
144 unsigned long addr;
145
146 addr = *stack;
147 if (__kernel_text_address(addr)) {
148 if ((unsigned long) stack == bp + sizeof(long)) {
149 ops->address(data, addr, 1);
150 frame = frame->next_frame;
151 bp = (unsigned long) frame;
152 } else {
153 ops->address(data, addr, bp == 0);
154 }
155 }
156 stack++;
157 }
158 return bp;
159}
160
161void dump_trace(struct task_struct *task, struct pt_regs *regs, 104void dump_trace(struct task_struct *task, struct pt_regs *regs,
162 unsigned long *stack, unsigned long bp, 105 unsigned long *stack, unsigned long bp,
163 const struct stacktrace_ops *ops, void *data) 106 const struct stacktrace_ops *ops, void *data)
@@ -166,6 +109,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
166 unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; 109 unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr;
167 unsigned used = 0; 110 unsigned used = 0;
168 struct thread_info *tinfo; 111 struct thread_info *tinfo;
112 int graph = 0;
169 113
170 if (!task) 114 if (!task)
171 task = current; 115 task = current;
@@ -206,7 +150,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
206 break; 150 break;
207 151
208 bp = print_context_stack(tinfo, stack, bp, ops, 152 bp = print_context_stack(tinfo, stack, bp, ops,
209 data, estack_end); 153 data, estack_end, &graph);
210 ops->stack(data, "<EOE>"); 154 ops->stack(data, "<EOE>");
211 /* 155 /*
212 * We link to the next stack via the 156 * We link to the next stack via the
@@ -225,7 +169,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
225 if (ops->stack(data, "IRQ") < 0) 169 if (ops->stack(data, "IRQ") < 0)
226 break; 170 break;
227 bp = print_context_stack(tinfo, stack, bp, 171 bp = print_context_stack(tinfo, stack, bp,
228 ops, data, irqstack_end); 172 ops, data, irqstack_end, &graph);
229 /* 173 /*
230 * We link to the next stack (which would be 174 * We link to the next stack (which would be
231 * the process stack normally) the last 175 * the process stack normally) the last
@@ -243,62 +187,12 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
243 /* 187 /*
244 * This handles the process stack: 188 * This handles the process stack:
245 */ 189 */
246 bp = print_context_stack(tinfo, stack, bp, ops, data, NULL); 190 bp = print_context_stack(tinfo, stack, bp, ops, data, NULL, &graph);
247 put_cpu(); 191 put_cpu();
248} 192}
249EXPORT_SYMBOL(dump_trace); 193EXPORT_SYMBOL(dump_trace);
250 194
251static void 195void
252print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
253{
254 printk(data);
255 print_symbol(msg, symbol);
256 printk("\n");
257}
258
259static void print_trace_warning(void *data, char *msg)
260{
261 printk("%s%s\n", (char *)data, msg);
262}
263
264static int print_trace_stack(void *data, char *name)
265{
266 printk("%s <%s> ", (char *)data, name);
267 return 0;
268}
269
270/*
271 * Print one address/symbol entries per line.
272 */
273static void print_trace_address(void *data, unsigned long addr, int reliable)
274{
275 touch_nmi_watchdog();
276 printk(data);
277 printk_address(addr, reliable);
278}
279
280static const struct stacktrace_ops print_trace_ops = {
281 .warning = print_trace_warning,
282 .warning_symbol = print_trace_warning_symbol,
283 .stack = print_trace_stack,
284 .address = print_trace_address,
285};
286
287static void
288show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
289 unsigned long *stack, unsigned long bp, char *log_lvl)
290{
291 printk("%sCall Trace:\n", log_lvl);
292 dump_trace(task, regs, stack, bp, &print_trace_ops, log_lvl);
293}
294
295void show_trace(struct task_struct *task, struct pt_regs *regs,
296 unsigned long *stack, unsigned long bp)
297{
298 show_trace_log_lvl(task, regs, stack, bp, "");
299}
300
301static void
302show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs, 196show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
303 unsigned long *sp, unsigned long bp, char *log_lvl) 197 unsigned long *sp, unsigned long bp, char *log_lvl)
304{ 198{
@@ -342,33 +236,6 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
342 show_trace_log_lvl(task, regs, sp, bp, log_lvl); 236 show_trace_log_lvl(task, regs, sp, bp, log_lvl);
343} 237}
344 238
345void show_stack(struct task_struct *task, unsigned long *sp)
346{
347 show_stack_log_lvl(task, NULL, sp, 0, "");
348}
349
350/*
351 * The architecture-independent dump_stack generator
352 */
353void dump_stack(void)
354{
355 unsigned long bp = 0;
356 unsigned long stack;
357
358#ifdef CONFIG_FRAME_POINTER
359 if (!bp)
360 get_bp(bp);
361#endif
362
363 printk("Pid: %d, comm: %.20s %s %s %.*s\n",
364 current->pid, current->comm, print_tainted(),
365 init_utsname()->release,
366 (int)strcspn(init_utsname()->version, " "),
367 init_utsname()->version);
368 show_trace(NULL, NULL, &stack, bp);
369}
370EXPORT_SYMBOL(dump_stack);
371
372void show_registers(struct pt_regs *regs) 239void show_registers(struct pt_regs *regs)
373{ 240{
374 int i; 241 int i;
@@ -429,147 +296,3 @@ int is_valid_bugaddr(unsigned long ip)
429 return ud2 == 0x0b0f; 296 return ud2 == 0x0b0f;
430} 297}
431 298
432static raw_spinlock_t die_lock = __RAW_SPIN_LOCK_UNLOCKED;
433static int die_owner = -1;
434static unsigned int die_nest_count;
435
436unsigned __kprobes long oops_begin(void)
437{
438 int cpu;
439 unsigned long flags;
440
441 oops_enter();
442
443 /* racy, but better than risking deadlock. */
444 raw_local_irq_save(flags);
445 cpu = smp_processor_id();
446 if (!__raw_spin_trylock(&die_lock)) {
447 if (cpu == die_owner)
448 /* nested oops. should stop eventually */;
449 else
450 __raw_spin_lock(&die_lock);
451 }
452 die_nest_count++;
453 die_owner = cpu;
454 console_verbose();
455 bust_spinlocks(1);
456 return flags;
457}
458
459void __kprobes oops_end(unsigned long flags, struct pt_regs *regs, int signr)
460{
461 die_owner = -1;
462 bust_spinlocks(0);
463 die_nest_count--;
464 if (!die_nest_count)
465 /* Nest count reaches zero, release the lock. */
466 __raw_spin_unlock(&die_lock);
467 raw_local_irq_restore(flags);
468 if (!regs) {
469 oops_exit();
470 return;
471 }
472 if (in_interrupt())
473 panic("Fatal exception in interrupt");
474 if (panic_on_oops)
475 panic("Fatal exception");
476 oops_exit();
477 do_exit(signr);
478}
479
480int __kprobes __die(const char *str, struct pt_regs *regs, long err)
481{
482 printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
483#ifdef CONFIG_PREEMPT
484 printk("PREEMPT ");
485#endif
486#ifdef CONFIG_SMP
487 printk("SMP ");
488#endif
489#ifdef CONFIG_DEBUG_PAGEALLOC
490 printk("DEBUG_PAGEALLOC");
491#endif
492 printk("\n");
493 sysfs_printk_last_file();
494 if (notify_die(DIE_OOPS, str, regs, err,
495 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
496 return 1;
497
498 show_registers(regs);
499 add_taint(TAINT_DIE);
500 /* Executive summary in case the oops scrolled away */
501 printk(KERN_ALERT "RIP ");
502 printk_address(regs->ip, 1);
503 printk(" RSP <%016lx>\n", regs->sp);
504 if (kexec_should_crash(current))
505 crash_kexec(regs);
506 return 0;
507}
508
509void die(const char *str, struct pt_regs *regs, long err)
510{
511 unsigned long flags = oops_begin();
512
513 if (!user_mode(regs))
514 report_bug(regs->ip, regs);
515
516 if (__die(str, regs, err))
517 regs = NULL;
518 oops_end(flags, regs, SIGSEGV);
519}
520
521notrace __kprobes void
522die_nmi(char *str, struct pt_regs *regs, int do_panic)
523{
524 unsigned long flags;
525
526 if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
527 return;
528
529 flags = oops_begin();
530 /*
531 * We are in trouble anyway, lets at least try
532 * to get a message out.
533 */
534 printk(KERN_EMERG "%s", str);
535 printk(" on CPU%d, ip %08lx, registers:\n",
536 smp_processor_id(), regs->ip);
537 show_registers(regs);
538 if (kexec_should_crash(current))
539 crash_kexec(regs);
540 if (do_panic || panic_on_oops)
541 panic("Non maskable interrupt");
542 oops_end(flags, NULL, SIGBUS);
543 nmi_exit();
544 local_irq_enable();
545 do_exit(SIGBUS);
546}
547
548static int __init oops_setup(char *s)
549{
550 if (!s)
551 return -EINVAL;
552 if (!strcmp(s, "panic"))
553 panic_on_oops = 1;
554 return 0;
555}
556early_param("oops", oops_setup);
557
558static int __init kstack_setup(char *s)
559{
560 if (!s)
561 return -EINVAL;
562 kstack_depth_to_print = simple_strtoul(s, NULL, 0);
563 return 0;
564}
565early_param("kstack", kstack_setup);
566
567static int __init code_bytes_setup(char *s)
568{
569 code_bytes = simple_strtoul(s, NULL, 0);
570 if (code_bytes > 8192)
571 code_bytes = 8192;
572
573 return 1;
574}
575__setup("code_bytes=", code_bytes_setup);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 7aafeb5263ef..65a13943e098 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -677,22 +677,6 @@ struct early_res {
677}; 677};
678static struct early_res early_res[MAX_EARLY_RES] __initdata = { 678static struct early_res early_res[MAX_EARLY_RES] __initdata = {
679 { 0, PAGE_SIZE, "BIOS data page" }, /* BIOS data page */ 679 { 0, PAGE_SIZE, "BIOS data page" }, /* BIOS data page */
680#if defined(CONFIG_X86_64) && defined(CONFIG_X86_TRAMPOLINE)
681 { TRAMPOLINE_BASE, TRAMPOLINE_BASE + 2 * PAGE_SIZE, "TRAMPOLINE" },
682#endif
683#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
684 /*
685 * But first pinch a few for the stack/trampoline stuff
686 * FIXME: Don't need the extra page at 4K, but need to fix
687 * trampoline before removing it. (see the GDT stuff)
688 */
689 { PAGE_SIZE, PAGE_SIZE + PAGE_SIZE, "EX TRAMPOLINE" },
690 /*
691 * Has to be in very low memory so we can execute
692 * real-mode AP code.
693 */
694 { TRAMPOLINE_BASE, TRAMPOLINE_BASE + PAGE_SIZE, "TRAMPOLINE" },
695#endif
696 {} 680 {}
697}; 681};
698 682
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 1b894b72c0f5..744aa7fc49d5 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -17,6 +17,7 @@
17#include <asm/io_apic.h> 17#include <asm/io_apic.h>
18#include <asm/apic.h> 18#include <asm/apic.h>
19#include <asm/iommu.h> 19#include <asm/iommu.h>
20#include <asm/gart.h>
20 21
21static void __init fix_hypertransport_config(int num, int slot, int func) 22static void __init fix_hypertransport_config(int num, int slot, int func)
22{ 23{
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 34ad997d3834..23b138e31e9c 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -875,49 +875,6 @@ static struct console early_dbgp_console = {
875}; 875};
876#endif 876#endif
877 877
878/* Console interface to a host file on AMD's SimNow! */
879
880static int simnow_fd;
881
882enum {
883 MAGIC1 = 0xBACCD00A,
884 MAGIC2 = 0xCA110000,
885 XOPEN = 5,
886 XWRITE = 4,
887};
888
889static noinline long simnow(long cmd, long a, long b, long c)
890{
891 long ret;
892
893 asm volatile("cpuid" :
894 "=a" (ret) :
895 "b" (a), "c" (b), "d" (c), "0" (MAGIC1), "D" (cmd + MAGIC2));
896 return ret;
897}
898
899static void __init simnow_init(char *str)
900{
901 char *fn = "klog";
902
903 if (*str == '=')
904 fn = ++str;
905 /* error ignored */
906 simnow_fd = simnow(XOPEN, (unsigned long)fn, O_WRONLY|O_APPEND|O_CREAT, 0644);
907}
908
909static void simnow_write(struct console *con, const char *s, unsigned n)
910{
911 simnow(XWRITE, simnow_fd, (unsigned long)s, n);
912}
913
914static struct console simnow_console = {
915 .name = "simnow",
916 .write = simnow_write,
917 .flags = CON_PRINTBUFFER,
918 .index = -1,
919};
920
921/* Direct interface for emergencies */ 878/* Direct interface for emergencies */
922static struct console *early_console = &early_vga_console; 879static struct console *early_console = &early_vga_console;
923static int __initdata early_console_initialized; 880static int __initdata early_console_initialized;
@@ -960,10 +917,6 @@ static int __init setup_early_printk(char *buf)
960 max_ypos = boot_params.screen_info.orig_video_lines; 917 max_ypos = boot_params.screen_info.orig_video_lines;
961 current_ypos = boot_params.screen_info.orig_y; 918 current_ypos = boot_params.screen_info.orig_y;
962 early_console = &early_vga_console; 919 early_console = &early_vga_console;
963 } else if (!strncmp(buf, "simnow", 6)) {
964 simnow_init(buf + 6);
965 early_console = &simnow_console;
966 keep_early = 1;
967#ifdef CONFIG_EARLY_PRINTK_DBGP 920#ifdef CONFIG_EARLY_PRINTK_DBGP
968 } else if (!strncmp(buf, "dbgp", 4)) { 921 } else if (!strncmp(buf, "dbgp", 4)) {
969 if (early_dbgp_init(buf+4) < 0) 922 if (early_dbgp_init(buf+4) < 0)
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 28b597ef9ca1..d6f0490a7391 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -619,28 +619,37 @@ END(syscall_badsys)
61927:; 61927:;
620 620
621/* 621/*
622 * Build the entry stubs and pointer table with 622 * Build the entry stubs and pointer table with some assembler magic.
623 * some assembler magic. 623 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
624 * single cache line on all modern x86 implementations.
624 */ 625 */
625.section .rodata,"a" 626.section .init.rodata,"a"
626ENTRY(interrupt) 627ENTRY(interrupt)
627.text 628.text
628 629 .p2align 5
630 .p2align CONFIG_X86_L1_CACHE_SHIFT
629ENTRY(irq_entries_start) 631ENTRY(irq_entries_start)
630 RING0_INT_FRAME 632 RING0_INT_FRAME
631vector=0 633vector=FIRST_EXTERNAL_VECTOR
632.rept NR_VECTORS 634.rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7
633 ALIGN 635 .balign 32
634 .if vector 636 .rept 7
637 .if vector < NR_VECTORS
638 .if vector <> FIRST_EXTERNAL_VECTOR
635 CFI_ADJUST_CFA_OFFSET -4 639 CFI_ADJUST_CFA_OFFSET -4
636 .endif 640 .endif
6371: pushl $~(vector) 6411: pushl $(~vector+0x80) /* Note: always in signed byte range */
638 CFI_ADJUST_CFA_OFFSET 4 642 CFI_ADJUST_CFA_OFFSET 4
639 jmp common_interrupt 643 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
640 .previous 644 jmp 2f
645 .endif
646 .previous
641 .long 1b 647 .long 1b
642 .text 648 .text
643vector=vector+1 649vector=vector+1
650 .endif
651 .endr
6522: jmp common_interrupt
644.endr 653.endr
645END(irq_entries_start) 654END(irq_entries_start)
646 655
@@ -652,8 +661,9 @@ END(interrupt)
652 * the CPU automatically disables interrupts when executing an IRQ vector, 661 * the CPU automatically disables interrupts when executing an IRQ vector,
653 * so IRQ-flags tracing has to follow that: 662 * so IRQ-flags tracing has to follow that:
654 */ 663 */
655 ALIGN 664 .p2align CONFIG_X86_L1_CACHE_SHIFT
656common_interrupt: 665common_interrupt:
666 addl $-0x80,(%esp) /* Adjust vector into the [-256,-1] range */
657 SAVE_ALL 667 SAVE_ALL
658 TRACE_IRQS_OFF 668 TRACE_IRQS_OFF
659 movl %esp,%eax 669 movl %esp,%eax
@@ -678,65 +688,6 @@ ENDPROC(name)
678/* The include is where all of the SMP etc. interrupts come from */ 688/* The include is where all of the SMP etc. interrupts come from */
679#include "entry_arch.h" 689#include "entry_arch.h"
680 690
681KPROBE_ENTRY(page_fault)
682 RING0_EC_FRAME
683 pushl $do_page_fault
684 CFI_ADJUST_CFA_OFFSET 4
685 ALIGN
686error_code:
687 /* the function address is in %fs's slot on the stack */
688 pushl %es
689 CFI_ADJUST_CFA_OFFSET 4
690 /*CFI_REL_OFFSET es, 0*/
691 pushl %ds
692 CFI_ADJUST_CFA_OFFSET 4
693 /*CFI_REL_OFFSET ds, 0*/
694 pushl %eax
695 CFI_ADJUST_CFA_OFFSET 4
696 CFI_REL_OFFSET eax, 0
697 pushl %ebp
698 CFI_ADJUST_CFA_OFFSET 4
699 CFI_REL_OFFSET ebp, 0
700 pushl %edi
701 CFI_ADJUST_CFA_OFFSET 4
702 CFI_REL_OFFSET edi, 0
703 pushl %esi
704 CFI_ADJUST_CFA_OFFSET 4
705 CFI_REL_OFFSET esi, 0
706 pushl %edx
707 CFI_ADJUST_CFA_OFFSET 4
708 CFI_REL_OFFSET edx, 0
709 pushl %ecx
710 CFI_ADJUST_CFA_OFFSET 4
711 CFI_REL_OFFSET ecx, 0
712 pushl %ebx
713 CFI_ADJUST_CFA_OFFSET 4
714 CFI_REL_OFFSET ebx, 0
715 cld
716 pushl %fs
717 CFI_ADJUST_CFA_OFFSET 4
718 /*CFI_REL_OFFSET fs, 0*/
719 movl $(__KERNEL_PERCPU), %ecx
720 movl %ecx, %fs
721 UNWIND_ESPFIX_STACK
722 popl %ecx
723 CFI_ADJUST_CFA_OFFSET -4
724 /*CFI_REGISTER es, ecx*/
725 movl PT_FS(%esp), %edi # get the function address
726 movl PT_ORIG_EAX(%esp), %edx # get the error code
727 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
728 mov %ecx, PT_FS(%esp)
729 /*CFI_REL_OFFSET fs, ES*/
730 movl $(__USER_DS), %ecx
731 movl %ecx, %ds
732 movl %ecx, %es
733 TRACE_IRQS_OFF
734 movl %esp,%eax # pt_regs pointer
735 call *%edi
736 jmp ret_from_exception
737 CFI_ENDPROC
738KPROBE_END(page_fault)
739
740ENTRY(coprocessor_error) 691ENTRY(coprocessor_error)
741 RING0_INT_FRAME 692 RING0_INT_FRAME
742 pushl $0 693 pushl $0
@@ -767,140 +718,6 @@ ENTRY(device_not_available)
767 CFI_ENDPROC 718 CFI_ENDPROC
768END(device_not_available) 719END(device_not_available)
769 720
770/*
771 * Debug traps and NMI can happen at the one SYSENTER instruction
772 * that sets up the real kernel stack. Check here, since we can't
773 * allow the wrong stack to be used.
774 *
775 * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have
776 * already pushed 3 words if it hits on the sysenter instruction:
777 * eflags, cs and eip.
778 *
779 * We just load the right stack, and push the three (known) values
780 * by hand onto the new stack - while updating the return eip past
781 * the instruction that would have done it for sysenter.
782 */
783#define FIX_STACK(offset, ok, label) \
784 cmpw $__KERNEL_CS,4(%esp); \
785 jne ok; \
786label: \
787 movl TSS_sysenter_sp0+offset(%esp),%esp; \
788 CFI_DEF_CFA esp, 0; \
789 CFI_UNDEFINED eip; \
790 pushfl; \
791 CFI_ADJUST_CFA_OFFSET 4; \
792 pushl $__KERNEL_CS; \
793 CFI_ADJUST_CFA_OFFSET 4; \
794 pushl $sysenter_past_esp; \
795 CFI_ADJUST_CFA_OFFSET 4; \
796 CFI_REL_OFFSET eip, 0
797
798KPROBE_ENTRY(debug)
799 RING0_INT_FRAME
800 cmpl $ia32_sysenter_target,(%esp)
801 jne debug_stack_correct
802 FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
803debug_stack_correct:
804 pushl $-1 # mark this as an int
805 CFI_ADJUST_CFA_OFFSET 4
806 SAVE_ALL
807 TRACE_IRQS_OFF
808 xorl %edx,%edx # error code 0
809 movl %esp,%eax # pt_regs pointer
810 call do_debug
811 jmp ret_from_exception
812 CFI_ENDPROC
813KPROBE_END(debug)
814
815/*
816 * NMI is doubly nasty. It can happen _while_ we're handling
817 * a debug fault, and the debug fault hasn't yet been able to
818 * clear up the stack. So we first check whether we got an
819 * NMI on the sysenter entry path, but after that we need to
820 * check whether we got an NMI on the debug path where the debug
821 * fault happened on the sysenter path.
822 */
823KPROBE_ENTRY(nmi)
824 RING0_INT_FRAME
825 pushl %eax
826 CFI_ADJUST_CFA_OFFSET 4
827 movl %ss, %eax
828 cmpw $__ESPFIX_SS, %ax
829 popl %eax
830 CFI_ADJUST_CFA_OFFSET -4
831 je nmi_espfix_stack
832 cmpl $ia32_sysenter_target,(%esp)
833 je nmi_stack_fixup
834 pushl %eax
835 CFI_ADJUST_CFA_OFFSET 4
836 movl %esp,%eax
837 /* Do not access memory above the end of our stack page,
838 * it might not exist.
839 */
840 andl $(THREAD_SIZE-1),%eax
841 cmpl $(THREAD_SIZE-20),%eax
842 popl %eax
843 CFI_ADJUST_CFA_OFFSET -4
844 jae nmi_stack_correct
845 cmpl $ia32_sysenter_target,12(%esp)
846 je nmi_debug_stack_check
847nmi_stack_correct:
848 /* We have a RING0_INT_FRAME here */
849 pushl %eax
850 CFI_ADJUST_CFA_OFFSET 4
851 SAVE_ALL
852 TRACE_IRQS_OFF
853 xorl %edx,%edx # zero error code
854 movl %esp,%eax # pt_regs pointer
855 call do_nmi
856 jmp restore_nocheck_notrace
857 CFI_ENDPROC
858
859nmi_stack_fixup:
860 RING0_INT_FRAME
861 FIX_STACK(12,nmi_stack_correct, 1)
862 jmp nmi_stack_correct
863
864nmi_debug_stack_check:
865 /* We have a RING0_INT_FRAME here */
866 cmpw $__KERNEL_CS,16(%esp)
867 jne nmi_stack_correct
868 cmpl $debug,(%esp)
869 jb nmi_stack_correct
870 cmpl $debug_esp_fix_insn,(%esp)
871 ja nmi_stack_correct
872 FIX_STACK(24,nmi_stack_correct, 1)
873 jmp nmi_stack_correct
874
875nmi_espfix_stack:
876 /* We have a RING0_INT_FRAME here.
877 *
878 * create the pointer to lss back
879 */
880 pushl %ss
881 CFI_ADJUST_CFA_OFFSET 4
882 pushl %esp
883 CFI_ADJUST_CFA_OFFSET 4
884 addw $4, (%esp)
885 /* copy the iret frame of 12 bytes */
886 .rept 3
887 pushl 16(%esp)
888 CFI_ADJUST_CFA_OFFSET 4
889 .endr
890 pushl %eax
891 CFI_ADJUST_CFA_OFFSET 4
892 SAVE_ALL
893 TRACE_IRQS_OFF
894 FIXUP_ESPFIX_STACK # %eax == %esp
895 xorl %edx,%edx # zero error code
896 call do_nmi
897 RESTORE_REGS
898 lss 12+4(%esp), %esp # back to espfix stack
899 CFI_ADJUST_CFA_OFFSET -24
900 jmp irq_return
901 CFI_ENDPROC
902KPROBE_END(nmi)
903
904#ifdef CONFIG_PARAVIRT 721#ifdef CONFIG_PARAVIRT
905ENTRY(native_iret) 722ENTRY(native_iret)
906 iret 723 iret
@@ -916,19 +733,6 @@ ENTRY(native_irq_enable_sysexit)
916END(native_irq_enable_sysexit) 733END(native_irq_enable_sysexit)
917#endif 734#endif
918 735
919KPROBE_ENTRY(int3)
920 RING0_INT_FRAME
921 pushl $-1 # mark this as an int
922 CFI_ADJUST_CFA_OFFSET 4
923 SAVE_ALL
924 TRACE_IRQS_OFF
925 xorl %edx,%edx # zero error code
926 movl %esp,%eax # pt_regs pointer
927 call do_int3
928 jmp ret_from_exception
929 CFI_ENDPROC
930KPROBE_END(int3)
931
932ENTRY(overflow) 736ENTRY(overflow)
933 RING0_INT_FRAME 737 RING0_INT_FRAME
934 pushl $0 738 pushl $0
@@ -993,14 +797,6 @@ ENTRY(stack_segment)
993 CFI_ENDPROC 797 CFI_ENDPROC
994END(stack_segment) 798END(stack_segment)
995 799
996KPROBE_ENTRY(general_protection)
997 RING0_EC_FRAME
998 pushl $do_general_protection
999 CFI_ADJUST_CFA_OFFSET 4
1000 jmp error_code
1001 CFI_ENDPROC
1002KPROBE_END(general_protection)
1003
1004ENTRY(alignment_check) 800ENTRY(alignment_check)
1005 RING0_EC_FRAME 801 RING0_EC_FRAME
1006 pushl $do_alignment_check 802 pushl $do_alignment_check
@@ -1051,6 +847,7 @@ ENTRY(kernel_thread_helper)
1051 push %eax 847 push %eax
1052 CFI_ADJUST_CFA_OFFSET 4 848 CFI_ADJUST_CFA_OFFSET 4
1053 call do_exit 849 call do_exit
850 ud2 # padding for call trace
1054 CFI_ENDPROC 851 CFI_ENDPROC
1055ENDPROC(kernel_thread_helper) 852ENDPROC(kernel_thread_helper)
1056 853
@@ -1157,6 +954,9 @@ ENTRY(mcount)
1157END(mcount) 954END(mcount)
1158 955
1159ENTRY(ftrace_caller) 956ENTRY(ftrace_caller)
957 cmpl $0, function_trace_stop
958 jne ftrace_stub
959
1160 pushl %eax 960 pushl %eax
1161 pushl %ecx 961 pushl %ecx
1162 pushl %edx 962 pushl %edx
@@ -1171,6 +971,11 @@ ftrace_call:
1171 popl %edx 971 popl %edx
1172 popl %ecx 972 popl %ecx
1173 popl %eax 973 popl %eax
974#ifdef CONFIG_FUNCTION_GRAPH_TRACER
975.globl ftrace_graph_call
976ftrace_graph_call:
977 jmp ftrace_stub
978#endif
1174 979
1175.globl ftrace_stub 980.globl ftrace_stub
1176ftrace_stub: 981ftrace_stub:
@@ -1180,8 +985,18 @@ END(ftrace_caller)
1180#else /* ! CONFIG_DYNAMIC_FTRACE */ 985#else /* ! CONFIG_DYNAMIC_FTRACE */
1181 986
1182ENTRY(mcount) 987ENTRY(mcount)
988 cmpl $0, function_trace_stop
989 jne ftrace_stub
990
1183 cmpl $ftrace_stub, ftrace_trace_function 991 cmpl $ftrace_stub, ftrace_trace_function
1184 jnz trace 992 jnz trace
993#ifdef CONFIG_FUNCTION_GRAPH_TRACER
994 cmpl $ftrace_stub, ftrace_graph_return
995 jnz ftrace_graph_caller
996
997 cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
998 jnz ftrace_graph_caller
999#endif
1185.globl ftrace_stub 1000.globl ftrace_stub
1186ftrace_stub: 1001ftrace_stub:
1187 ret 1002 ret
@@ -1200,13 +1015,268 @@ trace:
1200 popl %edx 1015 popl %edx
1201 popl %ecx 1016 popl %ecx
1202 popl %eax 1017 popl %eax
1203
1204 jmp ftrace_stub 1018 jmp ftrace_stub
1205END(mcount) 1019END(mcount)
1206#endif /* CONFIG_DYNAMIC_FTRACE */ 1020#endif /* CONFIG_DYNAMIC_FTRACE */
1207#endif /* CONFIG_FUNCTION_TRACER */ 1021#endif /* CONFIG_FUNCTION_TRACER */
1208 1022
1023#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1024ENTRY(ftrace_graph_caller)
1025 cmpl $0, function_trace_stop
1026 jne ftrace_stub
1027
1028 pushl %eax
1029 pushl %ecx
1030 pushl %edx
1031 movl 0xc(%esp), %edx
1032 lea 0x4(%ebp), %eax
1033 subl $MCOUNT_INSN_SIZE, %edx
1034 call prepare_ftrace_return
1035 popl %edx
1036 popl %ecx
1037 popl %eax
1038 ret
1039END(ftrace_graph_caller)
1040
1041.globl return_to_handler
1042return_to_handler:
1043 pushl $0
1044 pushl %eax
1045 pushl %ecx
1046 pushl %edx
1047 call ftrace_return_to_handler
1048 movl %eax, 0xc(%esp)
1049 popl %edx
1050 popl %ecx
1051 popl %eax
1052 ret
1053#endif
1054
1209.section .rodata,"a" 1055.section .rodata,"a"
1210#include "syscall_table_32.S" 1056#include "syscall_table_32.S"
1211 1057
1212syscall_table_size=(.-sys_call_table) 1058syscall_table_size=(.-sys_call_table)
1059
1060/*
1061 * Some functions should be protected against kprobes
1062 */
1063 .pushsection .kprobes.text, "ax"
1064
1065ENTRY(page_fault)
1066 RING0_EC_FRAME
1067 pushl $do_page_fault
1068 CFI_ADJUST_CFA_OFFSET 4
1069 ALIGN
1070error_code:
1071 /* the function address is in %fs's slot on the stack */
1072 pushl %es
1073 CFI_ADJUST_CFA_OFFSET 4
1074 /*CFI_REL_OFFSET es, 0*/
1075 pushl %ds
1076 CFI_ADJUST_CFA_OFFSET 4
1077 /*CFI_REL_OFFSET ds, 0*/
1078 pushl %eax
1079 CFI_ADJUST_CFA_OFFSET 4
1080 CFI_REL_OFFSET eax, 0
1081 pushl %ebp
1082 CFI_ADJUST_CFA_OFFSET 4
1083 CFI_REL_OFFSET ebp, 0
1084 pushl %edi
1085 CFI_ADJUST_CFA_OFFSET 4
1086 CFI_REL_OFFSET edi, 0
1087 pushl %esi
1088 CFI_ADJUST_CFA_OFFSET 4
1089 CFI_REL_OFFSET esi, 0
1090 pushl %edx
1091 CFI_ADJUST_CFA_OFFSET 4
1092 CFI_REL_OFFSET edx, 0
1093 pushl %ecx
1094 CFI_ADJUST_CFA_OFFSET 4
1095 CFI_REL_OFFSET ecx, 0
1096 pushl %ebx
1097 CFI_ADJUST_CFA_OFFSET 4
1098 CFI_REL_OFFSET ebx, 0
1099 cld
1100 pushl %fs
1101 CFI_ADJUST_CFA_OFFSET 4
1102 /*CFI_REL_OFFSET fs, 0*/
1103 movl $(__KERNEL_PERCPU), %ecx
1104 movl %ecx, %fs
1105 UNWIND_ESPFIX_STACK
1106 popl %ecx
1107 CFI_ADJUST_CFA_OFFSET -4
1108 /*CFI_REGISTER es, ecx*/
1109 movl PT_FS(%esp), %edi # get the function address
1110 movl PT_ORIG_EAX(%esp), %edx # get the error code
1111 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1112 mov %ecx, PT_FS(%esp)
1113 /*CFI_REL_OFFSET fs, ES*/
1114 movl $(__USER_DS), %ecx
1115 movl %ecx, %ds
1116 movl %ecx, %es
1117 TRACE_IRQS_OFF
1118 movl %esp,%eax # pt_regs pointer
1119 call *%edi
1120 jmp ret_from_exception
1121 CFI_ENDPROC
1122END(page_fault)
1123
1124/*
1125 * Debug traps and NMI can happen at the one SYSENTER instruction
1126 * that sets up the real kernel stack. Check here, since we can't
1127 * allow the wrong stack to be used.
1128 *
1129 * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have
1130 * already pushed 3 words if it hits on the sysenter instruction:
1131 * eflags, cs and eip.
1132 *
1133 * We just load the right stack, and push the three (known) values
1134 * by hand onto the new stack - while updating the return eip past
1135 * the instruction that would have done it for sysenter.
1136 */
1137#define FIX_STACK(offset, ok, label) \
1138 cmpw $__KERNEL_CS,4(%esp); \
1139 jne ok; \
1140label: \
1141 movl TSS_sysenter_sp0+offset(%esp),%esp; \
1142 CFI_DEF_CFA esp, 0; \
1143 CFI_UNDEFINED eip; \
1144 pushfl; \
1145 CFI_ADJUST_CFA_OFFSET 4; \
1146 pushl $__KERNEL_CS; \
1147 CFI_ADJUST_CFA_OFFSET 4; \
1148 pushl $sysenter_past_esp; \
1149 CFI_ADJUST_CFA_OFFSET 4; \
1150 CFI_REL_OFFSET eip, 0
1151
1152ENTRY(debug)
1153 RING0_INT_FRAME
1154 cmpl $ia32_sysenter_target,(%esp)
1155 jne debug_stack_correct
1156 FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
1157debug_stack_correct:
1158 pushl $-1 # mark this as an int
1159 CFI_ADJUST_CFA_OFFSET 4
1160 SAVE_ALL
1161 TRACE_IRQS_OFF
1162 xorl %edx,%edx # error code 0
1163 movl %esp,%eax # pt_regs pointer
1164 call do_debug
1165 jmp ret_from_exception
1166 CFI_ENDPROC
1167END(debug)
1168
1169/*
1170 * NMI is doubly nasty. It can happen _while_ we're handling
1171 * a debug fault, and the debug fault hasn't yet been able to
1172 * clear up the stack. So we first check whether we got an
1173 * NMI on the sysenter entry path, but after that we need to
1174 * check whether we got an NMI on the debug path where the debug
1175 * fault happened on the sysenter path.
1176 */
1177ENTRY(nmi)
1178 RING0_INT_FRAME
1179 pushl %eax
1180 CFI_ADJUST_CFA_OFFSET 4
1181 movl %ss, %eax
1182 cmpw $__ESPFIX_SS, %ax
1183 popl %eax
1184 CFI_ADJUST_CFA_OFFSET -4
1185 je nmi_espfix_stack
1186 cmpl $ia32_sysenter_target,(%esp)
1187 je nmi_stack_fixup
1188 pushl %eax
1189 CFI_ADJUST_CFA_OFFSET 4
1190 movl %esp,%eax
1191 /* Do not access memory above the end of our stack page,
1192 * it might not exist.
1193 */
1194 andl $(THREAD_SIZE-1),%eax
1195 cmpl $(THREAD_SIZE-20),%eax
1196 popl %eax
1197 CFI_ADJUST_CFA_OFFSET -4
1198 jae nmi_stack_correct
1199 cmpl $ia32_sysenter_target,12(%esp)
1200 je nmi_debug_stack_check
1201nmi_stack_correct:
1202 /* We have a RING0_INT_FRAME here */
1203 pushl %eax
1204 CFI_ADJUST_CFA_OFFSET 4
1205 SAVE_ALL
1206 TRACE_IRQS_OFF
1207 xorl %edx,%edx # zero error code
1208 movl %esp,%eax # pt_regs pointer
1209 call do_nmi
1210 jmp restore_nocheck_notrace
1211 CFI_ENDPROC
1212
1213nmi_stack_fixup:
1214 RING0_INT_FRAME
1215 FIX_STACK(12,nmi_stack_correct, 1)
1216 jmp nmi_stack_correct
1217
1218nmi_debug_stack_check:
1219 /* We have a RING0_INT_FRAME here */
1220 cmpw $__KERNEL_CS,16(%esp)
1221 jne nmi_stack_correct
1222 cmpl $debug,(%esp)
1223 jb nmi_stack_correct
1224 cmpl $debug_esp_fix_insn,(%esp)
1225 ja nmi_stack_correct
1226 FIX_STACK(24,nmi_stack_correct, 1)
1227 jmp nmi_stack_correct
1228
1229nmi_espfix_stack:
1230 /* We have a RING0_INT_FRAME here.
1231 *
1232 * create the pointer to lss back
1233 */
1234 pushl %ss
1235 CFI_ADJUST_CFA_OFFSET 4
1236 pushl %esp
1237 CFI_ADJUST_CFA_OFFSET 4
1238 addw $4, (%esp)
1239 /* copy the iret frame of 12 bytes */
1240 .rept 3
1241 pushl 16(%esp)
1242 CFI_ADJUST_CFA_OFFSET 4
1243 .endr
1244 pushl %eax
1245 CFI_ADJUST_CFA_OFFSET 4
1246 SAVE_ALL
1247 TRACE_IRQS_OFF
1248 FIXUP_ESPFIX_STACK # %eax == %esp
1249 xorl %edx,%edx # zero error code
1250 call do_nmi
1251 RESTORE_REGS
1252 lss 12+4(%esp), %esp # back to espfix stack
1253 CFI_ADJUST_CFA_OFFSET -24
1254 jmp irq_return
1255 CFI_ENDPROC
1256END(nmi)
1257
1258ENTRY(int3)
1259 RING0_INT_FRAME
1260 pushl $-1 # mark this as an int
1261 CFI_ADJUST_CFA_OFFSET 4
1262 SAVE_ALL
1263 TRACE_IRQS_OFF
1264 xorl %edx,%edx # zero error code
1265 movl %esp,%eax # pt_regs pointer
1266 call do_int3
1267 jmp ret_from_exception
1268 CFI_ENDPROC
1269END(int3)
1270
1271ENTRY(general_protection)
1272 RING0_EC_FRAME
1273 pushl $do_general_protection
1274 CFI_ADJUST_CFA_OFFSET 4
1275 jmp error_code
1276 CFI_ENDPROC
1277END(general_protection)
1278
1279/*
1280 * End of kprobes section
1281 */
1282 .popsection
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b86f332c96a6..e28c7a987793 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -11,15 +11,15 @@
11 * 11 *
12 * NOTE: This code handles signal-recognition, which happens every time 12 * NOTE: This code handles signal-recognition, which happens every time
13 * after an interrupt and after each system call. 13 * after an interrupt and after each system call.
14 * 14 *
15 * Normal syscalls and interrupts don't save a full stack frame, this is 15 * Normal syscalls and interrupts don't save a full stack frame, this is
16 * only done for syscall tracing, signals or fork/exec et.al. 16 * only done for syscall tracing, signals or fork/exec et.al.
17 * 17 *
18 * A note on terminology: 18 * A note on terminology:
19 * - top of stack: Architecture defined interrupt frame from SS to RIP 19 * - top of stack: Architecture defined interrupt frame from SS to RIP
20 * at the top of the kernel process stack. 20 * at the top of the kernel process stack.
21 * - partial stack frame: partially saved registers upto R11. 21 * - partial stack frame: partially saved registers upto R11.
22 * - full stack frame: Like partial stack frame, but all register saved. 22 * - full stack frame: Like partial stack frame, but all register saved.
23 * 23 *
24 * Some macro usage: 24 * Some macro usage:
25 * - CFI macros are used to generate dwarf2 unwind information for better 25 * - CFI macros are used to generate dwarf2 unwind information for better
@@ -60,7 +60,6 @@
60#define __AUDIT_ARCH_LE 0x40000000 60#define __AUDIT_ARCH_LE 0x40000000
61 61
62 .code64 62 .code64
63
64#ifdef CONFIG_FUNCTION_TRACER 63#ifdef CONFIG_FUNCTION_TRACER
65#ifdef CONFIG_DYNAMIC_FTRACE 64#ifdef CONFIG_DYNAMIC_FTRACE
66ENTRY(mcount) 65ENTRY(mcount)
@@ -68,16 +67,10 @@ ENTRY(mcount)
68END(mcount) 67END(mcount)
69 68
70ENTRY(ftrace_caller) 69ENTRY(ftrace_caller)
70 cmpl $0, function_trace_stop
71 jne ftrace_stub
71 72
72 /* taken from glibc */ 73 MCOUNT_SAVE_FRAME
73 subq $0x38, %rsp
74 movq %rax, (%rsp)
75 movq %rcx, 8(%rsp)
76 movq %rdx, 16(%rsp)
77 movq %rsi, 24(%rsp)
78 movq %rdi, 32(%rsp)
79 movq %r8, 40(%rsp)
80 movq %r9, 48(%rsp)
81 74
82 movq 0x38(%rsp), %rdi 75 movq 0x38(%rsp), %rdi
83 movq 8(%rbp), %rsi 76 movq 8(%rbp), %rsi
@@ -87,14 +80,13 @@ ENTRY(ftrace_caller)
87ftrace_call: 80ftrace_call:
88 call ftrace_stub 81 call ftrace_stub
89 82
90 movq 48(%rsp), %r9 83 MCOUNT_RESTORE_FRAME
91 movq 40(%rsp), %r8 84
92 movq 32(%rsp), %rdi 85#ifdef CONFIG_FUNCTION_GRAPH_TRACER
93 movq 24(%rsp), %rsi 86.globl ftrace_graph_call
94 movq 16(%rsp), %rdx 87ftrace_graph_call:
95 movq 8(%rsp), %rcx 88 jmp ftrace_stub
96 movq (%rsp), %rax 89#endif
97 addq $0x38, %rsp
98 90
99.globl ftrace_stub 91.globl ftrace_stub
100ftrace_stub: 92ftrace_stub:
@@ -103,15 +95,63 @@ END(ftrace_caller)
103 95
104#else /* ! CONFIG_DYNAMIC_FTRACE */ 96#else /* ! CONFIG_DYNAMIC_FTRACE */
105ENTRY(mcount) 97ENTRY(mcount)
98 cmpl $0, function_trace_stop
99 jne ftrace_stub
100
106 cmpq $ftrace_stub, ftrace_trace_function 101 cmpq $ftrace_stub, ftrace_trace_function
107 jnz trace 102 jnz trace
103
104#ifdef CONFIG_FUNCTION_GRAPH_TRACER
105 cmpq $ftrace_stub, ftrace_graph_return
106 jnz ftrace_graph_caller
107
108 cmpq $ftrace_graph_entry_stub, ftrace_graph_entry
109 jnz ftrace_graph_caller
110#endif
111
108.globl ftrace_stub 112.globl ftrace_stub
109ftrace_stub: 113ftrace_stub:
110 retq 114 retq
111 115
112trace: 116trace:
113 /* taken from glibc */ 117 MCOUNT_SAVE_FRAME
114 subq $0x38, %rsp 118
119 movq 0x38(%rsp), %rdi
120 movq 8(%rbp), %rsi
121 subq $MCOUNT_INSN_SIZE, %rdi
122
123 call *ftrace_trace_function
124
125 MCOUNT_RESTORE_FRAME
126
127 jmp ftrace_stub
128END(mcount)
129#endif /* CONFIG_DYNAMIC_FTRACE */
130#endif /* CONFIG_FUNCTION_TRACER */
131
132#ifdef CONFIG_FUNCTION_GRAPH_TRACER
133ENTRY(ftrace_graph_caller)
134 cmpl $0, function_trace_stop
135 jne ftrace_stub
136
137 MCOUNT_SAVE_FRAME
138
139 leaq 8(%rbp), %rdi
140 movq 0x38(%rsp), %rsi
141 subq $MCOUNT_INSN_SIZE, %rsi
142
143 call prepare_ftrace_return
144
145 MCOUNT_RESTORE_FRAME
146
147 retq
148END(ftrace_graph_caller)
149
150
151.globl return_to_handler
152return_to_handler:
153 subq $80, %rsp
154
115 movq %rax, (%rsp) 155 movq %rax, (%rsp)
116 movq %rcx, 8(%rsp) 156 movq %rcx, 8(%rsp)
117 movq %rdx, 16(%rsp) 157 movq %rdx, 16(%rsp)
@@ -119,13 +159,14 @@ trace:
119 movq %rdi, 32(%rsp) 159 movq %rdi, 32(%rsp)
120 movq %r8, 40(%rsp) 160 movq %r8, 40(%rsp)
121 movq %r9, 48(%rsp) 161 movq %r9, 48(%rsp)
162 movq %r10, 56(%rsp)
163 movq %r11, 64(%rsp)
122 164
123 movq 0x38(%rsp), %rdi 165 call ftrace_return_to_handler
124 movq 8(%rbp), %rsi
125 subq $MCOUNT_INSN_SIZE, %rdi
126
127 call *ftrace_trace_function
128 166
167 movq %rax, 72(%rsp)
168 movq 64(%rsp), %r11
169 movq 56(%rsp), %r10
129 movq 48(%rsp), %r9 170 movq 48(%rsp), %r9
130 movq 40(%rsp), %r8 171 movq 40(%rsp), %r8
131 movq 32(%rsp), %rdi 172 movq 32(%rsp), %rdi
@@ -133,16 +174,14 @@ trace:
133 movq 16(%rsp), %rdx 174 movq 16(%rsp), %rdx
134 movq 8(%rsp), %rcx 175 movq 8(%rsp), %rcx
135 movq (%rsp), %rax 176 movq (%rsp), %rax
136 addq $0x38, %rsp 177 addq $72, %rsp
178 retq
179#endif
137 180
138 jmp ftrace_stub
139END(mcount)
140#endif /* CONFIG_DYNAMIC_FTRACE */
141#endif /* CONFIG_FUNCTION_TRACER */
142 181
143#ifndef CONFIG_PREEMPT 182#ifndef CONFIG_PREEMPT
144#define retint_kernel retint_restore_args 183#define retint_kernel retint_restore_args
145#endif 184#endif
146 185
147#ifdef CONFIG_PARAVIRT 186#ifdef CONFIG_PARAVIRT
148ENTRY(native_usergs_sysret64) 187ENTRY(native_usergs_sysret64)
@@ -161,29 +200,29 @@ ENTRY(native_usergs_sysret64)
161.endm 200.endm
162 201
163/* 202/*
164 * C code is not supposed to know about undefined top of stack. Every time 203 * C code is not supposed to know about undefined top of stack. Every time
165 * a C function with an pt_regs argument is called from the SYSCALL based 204 * a C function with an pt_regs argument is called from the SYSCALL based
166 * fast path FIXUP_TOP_OF_STACK is needed. 205 * fast path FIXUP_TOP_OF_STACK is needed.
167 * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs 206 * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
168 * manipulation. 207 * manipulation.
169 */ 208 */
170 209
171 /* %rsp:at FRAMEEND */ 210 /* %rsp:at FRAMEEND */
172 .macro FIXUP_TOP_OF_STACK tmp 211 .macro FIXUP_TOP_OF_STACK tmp offset=0
173 movq %gs:pda_oldrsp,\tmp 212 movq %gs:pda_oldrsp,\tmp
174 movq \tmp,RSP(%rsp) 213 movq \tmp,RSP+\offset(%rsp)
175 movq $__USER_DS,SS(%rsp) 214 movq $__USER_DS,SS+\offset(%rsp)
176 movq $__USER_CS,CS(%rsp) 215 movq $__USER_CS,CS+\offset(%rsp)
177 movq $-1,RCX(%rsp) 216 movq $-1,RCX+\offset(%rsp)
178 movq R11(%rsp),\tmp /* get eflags */ 217 movq R11+\offset(%rsp),\tmp /* get eflags */
179 movq \tmp,EFLAGS(%rsp) 218 movq \tmp,EFLAGS+\offset(%rsp)
180 .endm 219 .endm
181 220
182 .macro RESTORE_TOP_OF_STACK tmp,offset=0 221 .macro RESTORE_TOP_OF_STACK tmp offset=0
183 movq RSP-\offset(%rsp),\tmp 222 movq RSP+\offset(%rsp),\tmp
184 movq \tmp,%gs:pda_oldrsp 223 movq \tmp,%gs:pda_oldrsp
185 movq EFLAGS-\offset(%rsp),\tmp 224 movq EFLAGS+\offset(%rsp),\tmp
186 movq \tmp,R11-\offset(%rsp) 225 movq \tmp,R11+\offset(%rsp)
187 .endm 226 .endm
188 227
189 .macro FAKE_STACK_FRAME child_rip 228 .macro FAKE_STACK_FRAME child_rip
@@ -195,7 +234,7 @@ ENTRY(native_usergs_sysret64)
195 pushq %rax /* rsp */ 234 pushq %rax /* rsp */
196 CFI_ADJUST_CFA_OFFSET 8 235 CFI_ADJUST_CFA_OFFSET 8
197 CFI_REL_OFFSET rsp,0 236 CFI_REL_OFFSET rsp,0
198 pushq $(1<<9) /* eflags - interrupts on */ 237 pushq $X86_EFLAGS_IF /* eflags - interrupts on */
199 CFI_ADJUST_CFA_OFFSET 8 238 CFI_ADJUST_CFA_OFFSET 8
200 /*CFI_REL_OFFSET rflags,0*/ 239 /*CFI_REL_OFFSET rflags,0*/
201 pushq $__KERNEL_CS /* cs */ 240 pushq $__KERNEL_CS /* cs */
@@ -213,62 +252,184 @@ ENTRY(native_usergs_sysret64)
213 CFI_ADJUST_CFA_OFFSET -(6*8) 252 CFI_ADJUST_CFA_OFFSET -(6*8)
214 .endm 253 .endm
215 254
216 .macro CFI_DEFAULT_STACK start=1 255/*
256 * initial frame state for interrupts (and exceptions without error code)
257 */
258 .macro EMPTY_FRAME start=1 offset=0
217 .if \start 259 .if \start
218 CFI_STARTPROC simple 260 CFI_STARTPROC simple
219 CFI_SIGNAL_FRAME 261 CFI_SIGNAL_FRAME
220 CFI_DEF_CFA rsp,SS+8 262 CFI_DEF_CFA rsp,8+\offset
221 .else 263 .else
222 CFI_DEF_CFA_OFFSET SS+8 264 CFI_DEF_CFA_OFFSET 8+\offset
223 .endif 265 .endif
224 CFI_REL_OFFSET r15,R15
225 CFI_REL_OFFSET r14,R14
226 CFI_REL_OFFSET r13,R13
227 CFI_REL_OFFSET r12,R12
228 CFI_REL_OFFSET rbp,RBP
229 CFI_REL_OFFSET rbx,RBX
230 CFI_REL_OFFSET r11,R11
231 CFI_REL_OFFSET r10,R10
232 CFI_REL_OFFSET r9,R9
233 CFI_REL_OFFSET r8,R8
234 CFI_REL_OFFSET rax,RAX
235 CFI_REL_OFFSET rcx,RCX
236 CFI_REL_OFFSET rdx,RDX
237 CFI_REL_OFFSET rsi,RSI
238 CFI_REL_OFFSET rdi,RDI
239 CFI_REL_OFFSET rip,RIP
240 /*CFI_REL_OFFSET cs,CS*/
241 /*CFI_REL_OFFSET rflags,EFLAGS*/
242 CFI_REL_OFFSET rsp,RSP
243 /*CFI_REL_OFFSET ss,SS*/
244 .endm 266 .endm
267
268/*
269 * initial frame state for interrupts (and exceptions without error code)
270 */
271 .macro INTR_FRAME start=1 offset=0
272 EMPTY_FRAME \start, SS+8+\offset-RIP
273 /*CFI_REL_OFFSET ss, SS+\offset-RIP*/
274 CFI_REL_OFFSET rsp, RSP+\offset-RIP
275 /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/
276 /*CFI_REL_OFFSET cs, CS+\offset-RIP*/
277 CFI_REL_OFFSET rip, RIP+\offset-RIP
278 .endm
279
280/*
281 * initial frame state for exceptions with error code (and interrupts
282 * with vector already pushed)
283 */
284 .macro XCPT_FRAME start=1 offset=0
285 INTR_FRAME \start, RIP+\offset-ORIG_RAX
286 /*CFI_REL_OFFSET orig_rax, ORIG_RAX-ORIG_RAX*/
287 .endm
288
245/* 289/*
246 * A newly forked process directly context switches into this. 290 * frame that enables calling into C.
247 */ 291 */
248/* rdi: prev */ 292 .macro PARTIAL_FRAME start=1 offset=0
293 XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET
294 CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET
295 CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET
296 CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET
297 CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET
298 CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET
299 CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET
300 CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET
301 CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET
302 CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET
303 .endm
304
305/*
306 * frame that enables passing a complete pt_regs to a C function.
307 */
308 .macro DEFAULT_FRAME start=1 offset=0
309 PARTIAL_FRAME \start, R11+\offset-R15
310 CFI_REL_OFFSET rbx, RBX+\offset
311 CFI_REL_OFFSET rbp, RBP+\offset
312 CFI_REL_OFFSET r12, R12+\offset
313 CFI_REL_OFFSET r13, R13+\offset
314 CFI_REL_OFFSET r14, R14+\offset
315 CFI_REL_OFFSET r15, R15+\offset
316 .endm
317
318/* save partial stack frame */
319ENTRY(save_args)
320 XCPT_FRAME
321 cld
322 movq_cfi rdi, RDI+16-ARGOFFSET
323 movq_cfi rsi, RSI+16-ARGOFFSET
324 movq_cfi rdx, RDX+16-ARGOFFSET
325 movq_cfi rcx, RCX+16-ARGOFFSET
326 movq_cfi rax, RAX+16-ARGOFFSET
327 movq_cfi r8, R8+16-ARGOFFSET
328 movq_cfi r9, R9+16-ARGOFFSET
329 movq_cfi r10, R10+16-ARGOFFSET
330 movq_cfi r11, R11+16-ARGOFFSET
331
332 leaq -ARGOFFSET+16(%rsp),%rdi /* arg1 for handler */
333 movq_cfi rbp, 8 /* push %rbp */
334 leaq 8(%rsp), %rbp /* mov %rsp, %ebp */
335 testl $3, CS(%rdi)
336 je 1f
337 SWAPGS
338 /*
339 * irqcount is used to check if a CPU is already on an interrupt stack
340 * or not. While this is essentially redundant with preempt_count it is
341 * a little cheaper to use a separate counter in the PDA (short of
342 * moving irq_enter into assembly, which would be too much work)
343 */
3441: incl %gs:pda_irqcount
345 jne 2f
346 popq_cfi %rax /* move return address... */
347 mov %gs:pda_irqstackptr,%rsp
348 EMPTY_FRAME 0
349 pushq_cfi %rax /* ... to the new stack */
350 /*
351 * We entered an interrupt context - irqs are off:
352 */
3532: TRACE_IRQS_OFF
354 ret
355 CFI_ENDPROC
356END(save_args)
357
358ENTRY(save_rest)
359 PARTIAL_FRAME 1 REST_SKIP+8
360 movq 5*8+16(%rsp), %r11 /* save return address */
361 movq_cfi rbx, RBX+16
362 movq_cfi rbp, RBP+16
363 movq_cfi r12, R12+16
364 movq_cfi r13, R13+16
365 movq_cfi r14, R14+16
366 movq_cfi r15, R15+16
367 movq %r11, 8(%rsp) /* return address */
368 FIXUP_TOP_OF_STACK %r11, 16
369 ret
370 CFI_ENDPROC
371END(save_rest)
372
373/* save complete stack frame */
374ENTRY(save_paranoid)
375 XCPT_FRAME 1 RDI+8
376 cld
377 movq_cfi rdi, RDI+8
378 movq_cfi rsi, RSI+8
379 movq_cfi rdx, RDX+8
380 movq_cfi rcx, RCX+8
381 movq_cfi rax, RAX+8
382 movq_cfi r8, R8+8
383 movq_cfi r9, R9+8
384 movq_cfi r10, R10+8
385 movq_cfi r11, R11+8
386 movq_cfi rbx, RBX+8
387 movq_cfi rbp, RBP+8
388 movq_cfi r12, R12+8
389 movq_cfi r13, R13+8
390 movq_cfi r14, R14+8
391 movq_cfi r15, R15+8
392 movl $1,%ebx
393 movl $MSR_GS_BASE,%ecx
394 rdmsr
395 testl %edx,%edx
396 js 1f /* negative -> in kernel */
397 SWAPGS
398 xorl %ebx,%ebx
3991: ret
400 CFI_ENDPROC
401END(save_paranoid)
402
403/*
404 * A newly forked process directly context switches into this address.
405 *
406 * rdi: prev task we switched from
407 */
249ENTRY(ret_from_fork) 408ENTRY(ret_from_fork)
250 CFI_DEFAULT_STACK 409 DEFAULT_FRAME
410
251 push kernel_eflags(%rip) 411 push kernel_eflags(%rip)
252 CFI_ADJUST_CFA_OFFSET 8 412 CFI_ADJUST_CFA_OFFSET 8
253 popf # reset kernel eflags 413 popf # reset kernel eflags
254 CFI_ADJUST_CFA_OFFSET -8 414 CFI_ADJUST_CFA_OFFSET -8
255 call schedule_tail 415
416 call schedule_tail # rdi: 'prev' task parameter
417
256 GET_THREAD_INFO(%rcx) 418 GET_THREAD_INFO(%rcx)
257 testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT),TI_flags(%rcx) 419
258 jnz rff_trace 420 CFI_REMEMBER_STATE
259rff_action:
260 RESTORE_REST 421 RESTORE_REST
261 testl $3,CS-ARGOFFSET(%rsp) # from kernel_thread? 422
423 testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread?
262 je int_ret_from_sys_call 424 je int_ret_from_sys_call
263 testl $_TIF_IA32,TI_flags(%rcx) 425
426 testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET
264 jnz int_ret_from_sys_call 427 jnz int_ret_from_sys_call
265 RESTORE_TOP_OF_STACK %rdi,ARGOFFSET 428
266 jmp ret_from_sys_call 429 RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET
267rff_trace: 430 jmp ret_from_sys_call # go to the SYSRET fastpath
268 movq %rsp,%rdi 431
269 call syscall_trace_leave 432 CFI_RESTORE_STATE
270 GET_THREAD_INFO(%rcx)
271 jmp rff_action
272 CFI_ENDPROC 433 CFI_ENDPROC
273END(ret_from_fork) 434END(ret_from_fork)
274 435
@@ -278,20 +439,20 @@ END(ret_from_fork)
278 * SYSCALL does not save anything on the stack and does not change the 439 * SYSCALL does not save anything on the stack and does not change the
279 * stack pointer. 440 * stack pointer.
280 */ 441 */
281 442
282/* 443/*
283 * Register setup: 444 * Register setup:
284 * rax system call number 445 * rax system call number
285 * rdi arg0 446 * rdi arg0
286 * rcx return address for syscall/sysret, C arg3 447 * rcx return address for syscall/sysret, C arg3
287 * rsi arg1 448 * rsi arg1
288 * rdx arg2 449 * rdx arg2
289 * r10 arg3 (--> moved to rcx for C) 450 * r10 arg3 (--> moved to rcx for C)
290 * r8 arg4 451 * r8 arg4
291 * r9 arg5 452 * r9 arg5
292 * r11 eflags for syscall/sysret, temporary for C 453 * r11 eflags for syscall/sysret, temporary for C
293 * r12-r15,rbp,rbx saved by C code, not touched. 454 * r12-r15,rbp,rbx saved by C code, not touched.
294 * 455 *
295 * Interrupts are off on entry. 456 * Interrupts are off on entry.
296 * Only called from user space. 457 * Only called from user space.
297 * 458 *
@@ -301,7 +462,7 @@ END(ret_from_fork)
301 * When user can change the frames always force IRET. That is because 462 * When user can change the frames always force IRET. That is because
302 * it deals with uncanonical addresses better. SYSRET has trouble 463 * it deals with uncanonical addresses better. SYSRET has trouble
303 * with them due to bugs in both AMD and Intel CPUs. 464 * with them due to bugs in both AMD and Intel CPUs.
304 */ 465 */
305 466
306ENTRY(system_call) 467ENTRY(system_call)
307 CFI_STARTPROC simple 468 CFI_STARTPROC simple
@@ -317,7 +478,7 @@ ENTRY(system_call)
317 */ 478 */
318ENTRY(system_call_after_swapgs) 479ENTRY(system_call_after_swapgs)
319 480
320 movq %rsp,%gs:pda_oldrsp 481 movq %rsp,%gs:pda_oldrsp
321 movq %gs:pda_kernelstack,%rsp 482 movq %gs:pda_kernelstack,%rsp
322 /* 483 /*
323 * No need to follow this irqs off/on section - it's straight 484 * No need to follow this irqs off/on section - it's straight
@@ -325,7 +486,7 @@ ENTRY(system_call_after_swapgs)
325 */ 486 */
326 ENABLE_INTERRUPTS(CLBR_NONE) 487 ENABLE_INTERRUPTS(CLBR_NONE)
327 SAVE_ARGS 8,1 488 SAVE_ARGS 8,1
328 movq %rax,ORIG_RAX-ARGOFFSET(%rsp) 489 movq %rax,ORIG_RAX-ARGOFFSET(%rsp)
329 movq %rcx,RIP-ARGOFFSET(%rsp) 490 movq %rcx,RIP-ARGOFFSET(%rsp)
330 CFI_REL_OFFSET rip,RIP-ARGOFFSET 491 CFI_REL_OFFSET rip,RIP-ARGOFFSET
331 GET_THREAD_INFO(%rcx) 492 GET_THREAD_INFO(%rcx)
@@ -339,19 +500,19 @@ system_call_fastpath:
339 movq %rax,RAX-ARGOFFSET(%rsp) 500 movq %rax,RAX-ARGOFFSET(%rsp)
340/* 501/*
341 * Syscall return path ending with SYSRET (fast path) 502 * Syscall return path ending with SYSRET (fast path)
342 * Has incomplete stack frame and undefined top of stack. 503 * Has incomplete stack frame and undefined top of stack.
343 */ 504 */
344ret_from_sys_call: 505ret_from_sys_call:
345 movl $_TIF_ALLWORK_MASK,%edi 506 movl $_TIF_ALLWORK_MASK,%edi
346 /* edi: flagmask */ 507 /* edi: flagmask */
347sysret_check: 508sysret_check:
348 LOCKDEP_SYS_EXIT 509 LOCKDEP_SYS_EXIT
349 GET_THREAD_INFO(%rcx) 510 GET_THREAD_INFO(%rcx)
350 DISABLE_INTERRUPTS(CLBR_NONE) 511 DISABLE_INTERRUPTS(CLBR_NONE)
351 TRACE_IRQS_OFF 512 TRACE_IRQS_OFF
352 movl TI_flags(%rcx),%edx 513 movl TI_flags(%rcx),%edx
353 andl %edi,%edx 514 andl %edi,%edx
354 jnz sysret_careful 515 jnz sysret_careful
355 CFI_REMEMBER_STATE 516 CFI_REMEMBER_STATE
356 /* 517 /*
357 * sysretq will re-enable interrupts: 518 * sysretq will re-enable interrupts:
@@ -366,7 +527,7 @@ sysret_check:
366 527
367 CFI_RESTORE_STATE 528 CFI_RESTORE_STATE
368 /* Handle reschedules */ 529 /* Handle reschedules */
369 /* edx: work, edi: workmask */ 530 /* edx: work, edi: workmask */
370sysret_careful: 531sysret_careful:
371 bt $TIF_NEED_RESCHED,%edx 532 bt $TIF_NEED_RESCHED,%edx
372 jnc sysret_signal 533 jnc sysret_signal
@@ -379,7 +540,7 @@ sysret_careful:
379 CFI_ADJUST_CFA_OFFSET -8 540 CFI_ADJUST_CFA_OFFSET -8
380 jmp sysret_check 541 jmp sysret_check
381 542
382 /* Handle a signal */ 543 /* Handle a signal */
383sysret_signal: 544sysret_signal:
384 TRACE_IRQS_ON 545 TRACE_IRQS_ON
385 ENABLE_INTERRUPTS(CLBR_NONE) 546 ENABLE_INTERRUPTS(CLBR_NONE)
@@ -388,17 +549,20 @@ sysret_signal:
388 jc sysret_audit 549 jc sysret_audit
389#endif 550#endif
390 /* edx: work flags (arg3) */ 551 /* edx: work flags (arg3) */
391 leaq do_notify_resume(%rip),%rax
392 leaq -ARGOFFSET(%rsp),%rdi # &pt_regs -> arg1 552 leaq -ARGOFFSET(%rsp),%rdi # &pt_regs -> arg1
393 xorl %esi,%esi # oldset -> arg2 553 xorl %esi,%esi # oldset -> arg2
394 call ptregscall_common 554 SAVE_REST
555 FIXUP_TOP_OF_STACK %r11
556 call do_notify_resume
557 RESTORE_TOP_OF_STACK %r11
558 RESTORE_REST
395 movl $_TIF_WORK_MASK,%edi 559 movl $_TIF_WORK_MASK,%edi
396 /* Use IRET because user could have changed frame. This 560 /* Use IRET because user could have changed frame. This
397 works because ptregscall_common has called FIXUP_TOP_OF_STACK. */ 561 works because ptregscall_common has called FIXUP_TOP_OF_STACK. */
398 DISABLE_INTERRUPTS(CLBR_NONE) 562 DISABLE_INTERRUPTS(CLBR_NONE)
399 TRACE_IRQS_OFF 563 TRACE_IRQS_OFF
400 jmp int_with_check 564 jmp int_with_check
401 565
402badsys: 566badsys:
403 movq $-ENOSYS,RAX-ARGOFFSET(%rsp) 567 movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
404 jmp ret_from_sys_call 568 jmp ret_from_sys_call
@@ -437,7 +601,7 @@ sysret_audit:
437#endif /* CONFIG_AUDITSYSCALL */ 601#endif /* CONFIG_AUDITSYSCALL */
438 602
439 /* Do syscall tracing */ 603 /* Do syscall tracing */
440tracesys: 604tracesys:
441#ifdef CONFIG_AUDITSYSCALL 605#ifdef CONFIG_AUDITSYSCALL
442 testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx) 606 testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
443 jz auditsys 607 jz auditsys
@@ -460,8 +624,8 @@ tracesys:
460 call *sys_call_table(,%rax,8) 624 call *sys_call_table(,%rax,8)
461 movq %rax,RAX-ARGOFFSET(%rsp) 625 movq %rax,RAX-ARGOFFSET(%rsp)
462 /* Use IRET because user could have changed frame */ 626 /* Use IRET because user could have changed frame */
463 627
464/* 628/*
465 * Syscall return path ending with IRET. 629 * Syscall return path ending with IRET.
466 * Has correct top of stack, but partial stack frame. 630 * Has correct top of stack, but partial stack frame.
467 */ 631 */
@@ -505,18 +669,18 @@ int_very_careful:
505 TRACE_IRQS_ON 669 TRACE_IRQS_ON
506 ENABLE_INTERRUPTS(CLBR_NONE) 670 ENABLE_INTERRUPTS(CLBR_NONE)
507 SAVE_REST 671 SAVE_REST
508 /* Check for syscall exit trace */ 672 /* Check for syscall exit trace */
509 testl $_TIF_WORK_SYSCALL_EXIT,%edx 673 testl $_TIF_WORK_SYSCALL_EXIT,%edx
510 jz int_signal 674 jz int_signal
511 pushq %rdi 675 pushq %rdi
512 CFI_ADJUST_CFA_OFFSET 8 676 CFI_ADJUST_CFA_OFFSET 8
513 leaq 8(%rsp),%rdi # &ptregs -> arg1 677 leaq 8(%rsp),%rdi # &ptregs -> arg1
514 call syscall_trace_leave 678 call syscall_trace_leave
515 popq %rdi 679 popq %rdi
516 CFI_ADJUST_CFA_OFFSET -8 680 CFI_ADJUST_CFA_OFFSET -8
517 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi 681 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
518 jmp int_restore_rest 682 jmp int_restore_rest
519 683
520int_signal: 684int_signal:
521 testl $_TIF_DO_NOTIFY_MASK,%edx 685 testl $_TIF_DO_NOTIFY_MASK,%edx
522 jz 1f 686 jz 1f
@@ -531,22 +695,24 @@ int_restore_rest:
531 jmp int_with_check 695 jmp int_with_check
532 CFI_ENDPROC 696 CFI_ENDPROC
533END(system_call) 697END(system_call)
534 698
535/* 699/*
536 * Certain special system calls that need to save a complete full stack frame. 700 * Certain special system calls that need to save a complete full stack frame.
537 */ 701 */
538
539 .macro PTREGSCALL label,func,arg 702 .macro PTREGSCALL label,func,arg
540 .globl \label 703ENTRY(\label)
541\label: 704 PARTIAL_FRAME 1 8 /* offset 8: return address */
542 leaq \func(%rip),%rax 705 subq $REST_SKIP, %rsp
543 leaq -ARGOFFSET+8(%rsp),\arg /* 8 for return address */ 706 CFI_ADJUST_CFA_OFFSET REST_SKIP
544 jmp ptregscall_common 707 call save_rest
708 DEFAULT_FRAME 0 8 /* offset 8: return address */
709 leaq 8(%rsp), \arg /* pt_regs pointer */
710 call \func
711 jmp ptregscall_common
712 CFI_ENDPROC
545END(\label) 713END(\label)
546 .endm 714 .endm
547 715
548 CFI_STARTPROC
549
550 PTREGSCALL stub_clone, sys_clone, %r8 716 PTREGSCALL stub_clone, sys_clone, %r8
551 PTREGSCALL stub_fork, sys_fork, %rdi 717 PTREGSCALL stub_fork, sys_fork, %rdi
552 PTREGSCALL stub_vfork, sys_vfork, %rdi 718 PTREGSCALL stub_vfork, sys_vfork, %rdi
@@ -554,25 +720,18 @@ END(\label)
554 PTREGSCALL stub_iopl, sys_iopl, %rsi 720 PTREGSCALL stub_iopl, sys_iopl, %rsi
555 721
556ENTRY(ptregscall_common) 722ENTRY(ptregscall_common)
557 popq %r11 723 DEFAULT_FRAME 1 8 /* offset 8: return address */
558 CFI_ADJUST_CFA_OFFSET -8 724 RESTORE_TOP_OF_STACK %r11, 8
559 CFI_REGISTER rip, r11 725 movq_cfi_restore R15+8, r15
560 SAVE_REST 726 movq_cfi_restore R14+8, r14
561 movq %r11, %r15 727 movq_cfi_restore R13+8, r13
562 CFI_REGISTER rip, r15 728 movq_cfi_restore R12+8, r12
563 FIXUP_TOP_OF_STACK %r11 729 movq_cfi_restore RBP+8, rbp
564 call *%rax 730 movq_cfi_restore RBX+8, rbx
565 RESTORE_TOP_OF_STACK %r11 731 ret $REST_SKIP /* pop extended registers */
566 movq %r15, %r11
567 CFI_REGISTER rip, r11
568 RESTORE_REST
569 pushq %r11
570 CFI_ADJUST_CFA_OFFSET 8
571 CFI_REL_OFFSET rip, 0
572 ret
573 CFI_ENDPROC 732 CFI_ENDPROC
574END(ptregscall_common) 733END(ptregscall_common)
575 734
576ENTRY(stub_execve) 735ENTRY(stub_execve)
577 CFI_STARTPROC 736 CFI_STARTPROC
578 popq %r11 737 popq %r11
@@ -588,11 +747,11 @@ ENTRY(stub_execve)
588 jmp int_ret_from_sys_call 747 jmp int_ret_from_sys_call
589 CFI_ENDPROC 748 CFI_ENDPROC
590END(stub_execve) 749END(stub_execve)
591 750
592/* 751/*
593 * sigreturn is special because it needs to restore all registers on return. 752 * sigreturn is special because it needs to restore all registers on return.
594 * This cannot be done with SYSRET, so use the IRET return path instead. 753 * This cannot be done with SYSRET, so use the IRET return path instead.
595 */ 754 */
596ENTRY(stub_rt_sigreturn) 755ENTRY(stub_rt_sigreturn)
597 CFI_STARTPROC 756 CFI_STARTPROC
598 addq $8, %rsp 757 addq $8, %rsp
@@ -608,70 +767,70 @@ ENTRY(stub_rt_sigreturn)
608END(stub_rt_sigreturn) 767END(stub_rt_sigreturn)
609 768
610/* 769/*
611 * initial frame state for interrupts and exceptions 770 * Build the entry stubs and pointer table with some assembler magic.
771 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
772 * single cache line on all modern x86 implementations.
612 */ 773 */
613 .macro _frame ref 774 .section .init.rodata,"a"
614 CFI_STARTPROC simple 775ENTRY(interrupt)
615 CFI_SIGNAL_FRAME 776 .text
616 CFI_DEF_CFA rsp,SS+8-\ref 777 .p2align 5
617 /*CFI_REL_OFFSET ss,SS-\ref*/ 778 .p2align CONFIG_X86_L1_CACHE_SHIFT
618 CFI_REL_OFFSET rsp,RSP-\ref 779ENTRY(irq_entries_start)
619 /*CFI_REL_OFFSET rflags,EFLAGS-\ref*/ 780 INTR_FRAME
620 /*CFI_REL_OFFSET cs,CS-\ref*/ 781vector=FIRST_EXTERNAL_VECTOR
621 CFI_REL_OFFSET rip,RIP-\ref 782.rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7
622 .endm 783 .balign 32
784 .rept 7
785 .if vector < NR_VECTORS
786 .if vector <> FIRST_EXTERNAL_VECTOR
787 CFI_ADJUST_CFA_OFFSET -8
788 .endif
7891: pushq $(~vector+0x80) /* Note: always in signed byte range */
790 CFI_ADJUST_CFA_OFFSET 8
791 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
792 jmp 2f
793 .endif
794 .previous
795 .quad 1b
796 .text
797vector=vector+1
798 .endif
799 .endr
8002: jmp common_interrupt
801.endr
802 CFI_ENDPROC
803END(irq_entries_start)
623 804
624/* initial frame state for interrupts (and exceptions without error code) */ 805.previous
625#define INTR_FRAME _frame RIP 806END(interrupt)
626/* initial frame state for exceptions with error code (and interrupts with 807.previous
627 vector already pushed) */
628#define XCPT_FRAME _frame ORIG_RAX
629 808
630/* 809/*
631 * Interrupt entry/exit. 810 * Interrupt entry/exit.
632 * 811 *
633 * Interrupt entry points save only callee clobbered registers in fast path. 812 * Interrupt entry points save only callee clobbered registers in fast path.
634 * 813 *
635 * Entry runs with interrupts off. 814 * Entry runs with interrupts off.
636 */ 815 */
637 816
638/* 0(%rsp): interrupt number */ 817/* 0(%rsp): ~(interrupt number) */
639 .macro interrupt func 818 .macro interrupt func
640 cld 819 subq $10*8, %rsp
641 SAVE_ARGS 820 CFI_ADJUST_CFA_OFFSET 10*8
642 leaq -ARGOFFSET(%rsp),%rdi # arg1 for handler 821 call save_args
643 pushq %rbp 822 PARTIAL_FRAME 0
644 /*
645 * Save rbp twice: One is for marking the stack frame, as usual, and the
646 * other, to fill pt_regs properly. This is because bx comes right
647 * before the last saved register in that structure, and not bp. If the
648 * base pointer were in the place bx is today, this would not be needed.
649 */
650 movq %rbp, -8(%rsp)
651 CFI_ADJUST_CFA_OFFSET 8
652 CFI_REL_OFFSET rbp, 0
653 movq %rsp,%rbp
654 CFI_DEF_CFA_REGISTER rbp
655 testl $3,CS(%rdi)
656 je 1f
657 SWAPGS
658 /* irqcount is used to check if a CPU is already on an interrupt
659 stack or not. While this is essentially redundant with preempt_count
660 it is a little cheaper to use a separate counter in the PDA
661 (short of moving irq_enter into assembly, which would be too
662 much work) */
6631: incl %gs:pda_irqcount
664 cmoveq %gs:pda_irqstackptr,%rsp
665 push %rbp # backlink for old unwinder
666 /*
667 * We entered an interrupt context - irqs are off:
668 */
669 TRACE_IRQS_OFF
670 call \func 823 call \func
671 .endm 824 .endm
672 825
673ENTRY(common_interrupt) 826 /*
827 * The interrupt stubs push (~vector+0x80) onto the stack and
828 * then jump to common_interrupt.
829 */
830 .p2align CONFIG_X86_L1_CACHE_SHIFT
831common_interrupt:
674 XCPT_FRAME 832 XCPT_FRAME
833 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
675 interrupt do_IRQ 834 interrupt do_IRQ
676 /* 0(%rsp): oldrsp-ARGOFFSET */ 835 /* 0(%rsp): oldrsp-ARGOFFSET */
677ret_from_intr: 836ret_from_intr:
@@ -685,12 +844,12 @@ exit_intr:
685 GET_THREAD_INFO(%rcx) 844 GET_THREAD_INFO(%rcx)
686 testl $3,CS-ARGOFFSET(%rsp) 845 testl $3,CS-ARGOFFSET(%rsp)
687 je retint_kernel 846 je retint_kernel
688 847
689 /* Interrupt came from user space */ 848 /* Interrupt came from user space */
690 /* 849 /*
691 * Has a correct top of stack, but a partial stack frame 850 * Has a correct top of stack, but a partial stack frame
692 * %rcx: thread info. Interrupts off. 851 * %rcx: thread info. Interrupts off.
693 */ 852 */
694retint_with_reschedule: 853retint_with_reschedule:
695 movl $_TIF_WORK_MASK,%edi 854 movl $_TIF_WORK_MASK,%edi
696retint_check: 855retint_check:
@@ -763,20 +922,20 @@ retint_careful:
763 pushq %rdi 922 pushq %rdi
764 CFI_ADJUST_CFA_OFFSET 8 923 CFI_ADJUST_CFA_OFFSET 8
765 call schedule 924 call schedule
766 popq %rdi 925 popq %rdi
767 CFI_ADJUST_CFA_OFFSET -8 926 CFI_ADJUST_CFA_OFFSET -8
768 GET_THREAD_INFO(%rcx) 927 GET_THREAD_INFO(%rcx)
769 DISABLE_INTERRUPTS(CLBR_NONE) 928 DISABLE_INTERRUPTS(CLBR_NONE)
770 TRACE_IRQS_OFF 929 TRACE_IRQS_OFF
771 jmp retint_check 930 jmp retint_check
772 931
773retint_signal: 932retint_signal:
774 testl $_TIF_DO_NOTIFY_MASK,%edx 933 testl $_TIF_DO_NOTIFY_MASK,%edx
775 jz retint_swapgs 934 jz retint_swapgs
776 TRACE_IRQS_ON 935 TRACE_IRQS_ON
777 ENABLE_INTERRUPTS(CLBR_NONE) 936 ENABLE_INTERRUPTS(CLBR_NONE)
778 SAVE_REST 937 SAVE_REST
779 movq $-1,ORIG_RAX(%rsp) 938 movq $-1,ORIG_RAX(%rsp)
780 xorl %esi,%esi # oldset 939 xorl %esi,%esi # oldset
781 movq %rsp,%rdi # &pt_regs 940 movq %rsp,%rdi # &pt_regs
782 call do_notify_resume 941 call do_notify_resume
@@ -798,324 +957,211 @@ ENTRY(retint_kernel)
798 jnc retint_restore_args 957 jnc retint_restore_args
799 call preempt_schedule_irq 958 call preempt_schedule_irq
800 jmp exit_intr 959 jmp exit_intr
801#endif 960#endif
802 961
803 CFI_ENDPROC 962 CFI_ENDPROC
804END(common_interrupt) 963END(common_interrupt)
805 964
806/* 965/*
807 * APIC interrupts. 966 * APIC interrupts.
808 */ 967 */
809 .macro apicinterrupt num,func 968.macro apicinterrupt num sym do_sym
969ENTRY(\sym)
810 INTR_FRAME 970 INTR_FRAME
811 pushq $~(\num) 971 pushq $~(\num)
812 CFI_ADJUST_CFA_OFFSET 8 972 CFI_ADJUST_CFA_OFFSET 8
813 interrupt \func 973 interrupt \do_sym
814 jmp ret_from_intr 974 jmp ret_from_intr
815 CFI_ENDPROC 975 CFI_ENDPROC
816 .endm 976END(\sym)
817 977.endm
818ENTRY(thermal_interrupt)
819 apicinterrupt THERMAL_APIC_VECTOR,smp_thermal_interrupt
820END(thermal_interrupt)
821
822ENTRY(threshold_interrupt)
823 apicinterrupt THRESHOLD_APIC_VECTOR,mce_threshold_interrupt
824END(threshold_interrupt)
825
826#ifdef CONFIG_SMP
827ENTRY(reschedule_interrupt)
828 apicinterrupt RESCHEDULE_VECTOR,smp_reschedule_interrupt
829END(reschedule_interrupt)
830
831 .macro INVALIDATE_ENTRY num
832ENTRY(invalidate_interrupt\num)
833 apicinterrupt INVALIDATE_TLB_VECTOR_START+\num,smp_invalidate_interrupt
834END(invalidate_interrupt\num)
835 .endm
836 978
837 INVALIDATE_ENTRY 0 979#ifdef CONFIG_SMP
838 INVALIDATE_ENTRY 1 980apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \
839 INVALIDATE_ENTRY 2 981 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
840 INVALIDATE_ENTRY 3
841 INVALIDATE_ENTRY 4
842 INVALIDATE_ENTRY 5
843 INVALIDATE_ENTRY 6
844 INVALIDATE_ENTRY 7
845
846ENTRY(call_function_interrupt)
847 apicinterrupt CALL_FUNCTION_VECTOR,smp_call_function_interrupt
848END(call_function_interrupt)
849ENTRY(call_function_single_interrupt)
850 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR,smp_call_function_single_interrupt
851END(call_function_single_interrupt)
852ENTRY(irq_move_cleanup_interrupt)
853 apicinterrupt IRQ_MOVE_CLEANUP_VECTOR,smp_irq_move_cleanup_interrupt
854END(irq_move_cleanup_interrupt)
855#endif 982#endif
856 983
857ENTRY(apic_timer_interrupt) 984apicinterrupt UV_BAU_MESSAGE \
858 apicinterrupt LOCAL_TIMER_VECTOR,smp_apic_timer_interrupt 985 uv_bau_message_intr1 uv_bau_message_interrupt
859END(apic_timer_interrupt) 986apicinterrupt LOCAL_TIMER_VECTOR \
987 apic_timer_interrupt smp_apic_timer_interrupt
988
989#ifdef CONFIG_SMP
990apicinterrupt INVALIDATE_TLB_VECTOR_START+0 \
991 invalidate_interrupt0 smp_invalidate_interrupt
992apicinterrupt INVALIDATE_TLB_VECTOR_START+1 \
993 invalidate_interrupt1 smp_invalidate_interrupt
994apicinterrupt INVALIDATE_TLB_VECTOR_START+2 \
995 invalidate_interrupt2 smp_invalidate_interrupt
996apicinterrupt INVALIDATE_TLB_VECTOR_START+3 \
997 invalidate_interrupt3 smp_invalidate_interrupt
998apicinterrupt INVALIDATE_TLB_VECTOR_START+4 \
999 invalidate_interrupt4 smp_invalidate_interrupt
1000apicinterrupt INVALIDATE_TLB_VECTOR_START+5 \
1001 invalidate_interrupt5 smp_invalidate_interrupt
1002apicinterrupt INVALIDATE_TLB_VECTOR_START+6 \
1003 invalidate_interrupt6 smp_invalidate_interrupt
1004apicinterrupt INVALIDATE_TLB_VECTOR_START+7 \
1005 invalidate_interrupt7 smp_invalidate_interrupt
1006#endif
860 1007
861ENTRY(uv_bau_message_intr1) 1008apicinterrupt THRESHOLD_APIC_VECTOR \
862 apicinterrupt 220,uv_bau_message_interrupt 1009 threshold_interrupt mce_threshold_interrupt
863END(uv_bau_message_intr1) 1010apicinterrupt THERMAL_APIC_VECTOR \
1011 thermal_interrupt smp_thermal_interrupt
1012
1013#ifdef CONFIG_SMP
1014apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
1015 call_function_single_interrupt smp_call_function_single_interrupt
1016apicinterrupt CALL_FUNCTION_VECTOR \
1017 call_function_interrupt smp_call_function_interrupt
1018apicinterrupt RESCHEDULE_VECTOR \
1019 reschedule_interrupt smp_reschedule_interrupt
1020#endif
864 1021
865ENTRY(error_interrupt) 1022apicinterrupt ERROR_APIC_VECTOR \
866 apicinterrupt ERROR_APIC_VECTOR,smp_error_interrupt 1023 error_interrupt smp_error_interrupt
867END(error_interrupt) 1024apicinterrupt SPURIOUS_APIC_VECTOR \
1025 spurious_interrupt smp_spurious_interrupt
868 1026
869ENTRY(spurious_interrupt)
870 apicinterrupt SPURIOUS_APIC_VECTOR,smp_spurious_interrupt
871END(spurious_interrupt)
872
873/* 1027/*
874 * Exception entry points. 1028 * Exception entry points.
875 */ 1029 */
876 .macro zeroentry sym 1030.macro zeroentry sym do_sym
1031ENTRY(\sym)
877 INTR_FRAME 1032 INTR_FRAME
878 PARAVIRT_ADJUST_EXCEPTION_FRAME 1033 PARAVIRT_ADJUST_EXCEPTION_FRAME
879 pushq $0 /* push error code/oldrax */ 1034 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
880 CFI_ADJUST_CFA_OFFSET 8 1035 subq $15*8,%rsp
881 pushq %rax /* push real oldrax to the rdi slot */ 1036 CFI_ADJUST_CFA_OFFSET 15*8
882 CFI_ADJUST_CFA_OFFSET 8 1037 call error_entry
883 CFI_REL_OFFSET rax,0 1038 DEFAULT_FRAME 0
884 leaq \sym(%rip),%rax 1039 movq %rsp,%rdi /* pt_regs pointer */
885 jmp error_entry 1040 xorl %esi,%esi /* no error code */
1041 call \do_sym
1042 jmp error_exit /* %ebx: no swapgs flag */
886 CFI_ENDPROC 1043 CFI_ENDPROC
887 .endm 1044END(\sym)
1045.endm
888 1046
889 .macro errorentry sym 1047.macro paranoidzeroentry sym do_sym
890 XCPT_FRAME 1048ENTRY(\sym)
1049 INTR_FRAME
891 PARAVIRT_ADJUST_EXCEPTION_FRAME 1050 PARAVIRT_ADJUST_EXCEPTION_FRAME
892 pushq %rax 1051 pushq $-1 /* ORIG_RAX: no syscall to restart */
893 CFI_ADJUST_CFA_OFFSET 8 1052 CFI_ADJUST_CFA_OFFSET 8
894 CFI_REL_OFFSET rax,0 1053 subq $15*8, %rsp
895 leaq \sym(%rip),%rax 1054 call save_paranoid
896 jmp error_entry 1055 TRACE_IRQS_OFF
1056 movq %rsp,%rdi /* pt_regs pointer */
1057 xorl %esi,%esi /* no error code */
1058 call \do_sym
1059 jmp paranoid_exit /* %ebx: no swapgs flag */
897 CFI_ENDPROC 1060 CFI_ENDPROC
898 .endm 1061END(\sym)
1062.endm
899 1063
900 /* error code is on the stack already */ 1064.macro paranoidzeroentry_ist sym do_sym ist
901 /* handle NMI like exceptions that can happen everywhere */ 1065ENTRY(\sym)
902 .macro paranoidentry sym, ist=0, irqtrace=1 1066 INTR_FRAME
903 SAVE_ALL 1067 PARAVIRT_ADJUST_EXCEPTION_FRAME
904 cld 1068 pushq $-1 /* ORIG_RAX: no syscall to restart */
905 movl $1,%ebx 1069 CFI_ADJUST_CFA_OFFSET 8
906 movl $MSR_GS_BASE,%ecx 1070 subq $15*8, %rsp
907 rdmsr 1071 call save_paranoid
908 testl %edx,%edx
909 js 1f
910 SWAPGS
911 xorl %ebx,%ebx
9121:
913 .if \ist
914 movq %gs:pda_data_offset, %rbp
915 .endif
916 .if \irqtrace
917 TRACE_IRQS_OFF
918 .endif
919 movq %rsp,%rdi
920 movq ORIG_RAX(%rsp),%rsi
921 movq $-1,ORIG_RAX(%rsp)
922 .if \ist
923 subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
924 .endif
925 call \sym
926 .if \ist
927 addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
928 .endif
929 DISABLE_INTERRUPTS(CLBR_NONE)
930 .if \irqtrace
931 TRACE_IRQS_OFF 1072 TRACE_IRQS_OFF
932 .endif 1073 movq %rsp,%rdi /* pt_regs pointer */
933 .endm 1074 xorl %esi,%esi /* no error code */
1075 movq %gs:pda_data_offset, %rbp
1076 subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
1077 call \do_sym
1078 addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp)
1079 jmp paranoid_exit /* %ebx: no swapgs flag */
1080 CFI_ENDPROC
1081END(\sym)
1082.endm
934 1083
935 /* 1084.macro errorentry sym do_sym
936 * "Paranoid" exit path from exception stack. 1085ENTRY(\sym)
937 * Paranoid because this is used by NMIs and cannot take 1086 XCPT_FRAME
938 * any kernel state for granted. 1087 PARAVIRT_ADJUST_EXCEPTION_FRAME
939 * We don't do kernel preemption checks here, because only 1088 subq $15*8,%rsp
940 * NMI should be common and it does not enable IRQs and 1089 CFI_ADJUST_CFA_OFFSET 15*8
941 * cannot get reschedule ticks. 1090 call error_entry
942 * 1091 DEFAULT_FRAME 0
943 * "trace" is 0 for the NMI handler only, because irq-tracing 1092 movq %rsp,%rdi /* pt_regs pointer */
944 * is fundamentally NMI-unsafe. (we cannot change the soft and 1093 movq ORIG_RAX(%rsp),%rsi /* get error code */
945 * hard flags at once, atomically) 1094 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
946 */ 1095 call \do_sym
947 .macro paranoidexit trace=1 1096 jmp error_exit /* %ebx: no swapgs flag */
948 /* ebx: no swapgs flag */
949paranoid_exit\trace:
950 testl %ebx,%ebx /* swapgs needed? */
951 jnz paranoid_restore\trace
952 testl $3,CS(%rsp)
953 jnz paranoid_userspace\trace
954paranoid_swapgs\trace:
955 .if \trace
956 TRACE_IRQS_IRETQ 0
957 .endif
958 SWAPGS_UNSAFE_STACK
959paranoid_restore\trace:
960 RESTORE_ALL 8
961 jmp irq_return
962paranoid_userspace\trace:
963 GET_THREAD_INFO(%rcx)
964 movl TI_flags(%rcx),%ebx
965 andl $_TIF_WORK_MASK,%ebx
966 jz paranoid_swapgs\trace
967 movq %rsp,%rdi /* &pt_regs */
968 call sync_regs
969 movq %rax,%rsp /* switch stack for scheduling */
970 testl $_TIF_NEED_RESCHED,%ebx
971 jnz paranoid_schedule\trace
972 movl %ebx,%edx /* arg3: thread flags */
973 .if \trace
974 TRACE_IRQS_ON
975 .endif
976 ENABLE_INTERRUPTS(CLBR_NONE)
977 xorl %esi,%esi /* arg2: oldset */
978 movq %rsp,%rdi /* arg1: &pt_regs */
979 call do_notify_resume
980 DISABLE_INTERRUPTS(CLBR_NONE)
981 .if \trace
982 TRACE_IRQS_OFF
983 .endif
984 jmp paranoid_userspace\trace
985paranoid_schedule\trace:
986 .if \trace
987 TRACE_IRQS_ON
988 .endif
989 ENABLE_INTERRUPTS(CLBR_ANY)
990 call schedule
991 DISABLE_INTERRUPTS(CLBR_ANY)
992 .if \trace
993 TRACE_IRQS_OFF
994 .endif
995 jmp paranoid_userspace\trace
996 CFI_ENDPROC 1097 CFI_ENDPROC
997 .endm 1098END(\sym)
1099.endm
998 1100
999/* 1101 /* error code is on the stack already */
1000 * Exception entry point. This expects an error code/orig_rax on the stack 1102.macro paranoiderrorentry sym do_sym
1001 * and the exception handler in %rax. 1103ENTRY(\sym)
1002 */ 1104 XCPT_FRAME
1003KPROBE_ENTRY(error_entry) 1105 PARAVIRT_ADJUST_EXCEPTION_FRAME
1004 _frame RDI 1106 subq $15*8,%rsp
1005 CFI_REL_OFFSET rax,0 1107 CFI_ADJUST_CFA_OFFSET 15*8
1006 /* rdi slot contains rax, oldrax contains error code */ 1108 call save_paranoid
1007 cld 1109 DEFAULT_FRAME 0
1008 subq $14*8,%rsp
1009 CFI_ADJUST_CFA_OFFSET (14*8)
1010 movq %rsi,13*8(%rsp)
1011 CFI_REL_OFFSET rsi,RSI
1012 movq 14*8(%rsp),%rsi /* load rax from rdi slot */
1013 CFI_REGISTER rax,rsi
1014 movq %rdx,12*8(%rsp)
1015 CFI_REL_OFFSET rdx,RDX
1016 movq %rcx,11*8(%rsp)
1017 CFI_REL_OFFSET rcx,RCX
1018 movq %rsi,10*8(%rsp) /* store rax */
1019 CFI_REL_OFFSET rax,RAX
1020 movq %r8, 9*8(%rsp)
1021 CFI_REL_OFFSET r8,R8
1022 movq %r9, 8*8(%rsp)
1023 CFI_REL_OFFSET r9,R9
1024 movq %r10,7*8(%rsp)
1025 CFI_REL_OFFSET r10,R10
1026 movq %r11,6*8(%rsp)
1027 CFI_REL_OFFSET r11,R11
1028 movq %rbx,5*8(%rsp)
1029 CFI_REL_OFFSET rbx,RBX
1030 movq %rbp,4*8(%rsp)
1031 CFI_REL_OFFSET rbp,RBP
1032 movq %r12,3*8(%rsp)
1033 CFI_REL_OFFSET r12,R12
1034 movq %r13,2*8(%rsp)
1035 CFI_REL_OFFSET r13,R13
1036 movq %r14,1*8(%rsp)
1037 CFI_REL_OFFSET r14,R14
1038 movq %r15,(%rsp)
1039 CFI_REL_OFFSET r15,R15
1040 xorl %ebx,%ebx
1041 testl $3,CS(%rsp)
1042 je error_kernelspace
1043error_swapgs:
1044 SWAPGS
1045error_sti:
1046 TRACE_IRQS_OFF
1047 movq %rdi,RDI(%rsp)
1048 CFI_REL_OFFSET rdi,RDI
1049 movq %rsp,%rdi
1050 movq ORIG_RAX(%rsp),%rsi /* get error code */
1051 movq $-1,ORIG_RAX(%rsp)
1052 call *%rax
1053 /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
1054error_exit:
1055 movl %ebx,%eax
1056 RESTORE_REST
1057 DISABLE_INTERRUPTS(CLBR_NONE)
1058 TRACE_IRQS_OFF 1110 TRACE_IRQS_OFF
1059 GET_THREAD_INFO(%rcx) 1111 movq %rsp,%rdi /* pt_regs pointer */
1060 testl %eax,%eax 1112 movq ORIG_RAX(%rsp),%rsi /* get error code */
1061 jne retint_kernel 1113 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1062 LOCKDEP_SYS_EXIT_IRQ 1114 call \do_sym
1063 movl TI_flags(%rcx),%edx 1115 jmp paranoid_exit /* %ebx: no swapgs flag */
1064 movl $_TIF_WORK_MASK,%edi
1065 andl %edi,%edx
1066 jnz retint_careful
1067 jmp retint_swapgs
1068 CFI_ENDPROC 1116 CFI_ENDPROC
1117END(\sym)
1118.endm
1069 1119
1070error_kernelspace: 1120zeroentry divide_error do_divide_error
1071 incl %ebx 1121zeroentry overflow do_overflow
1072 /* There are two places in the kernel that can potentially fault with 1122zeroentry bounds do_bounds
1073 usergs. Handle them here. The exception handlers after 1123zeroentry invalid_op do_invalid_op
1074 iret run with kernel gs again, so don't set the user space flag. 1124zeroentry device_not_available do_device_not_available
1075 B stepping K8s sometimes report an truncated RIP for IRET 1125paranoiderrorentry double_fault do_double_fault
1076 exceptions returning to compat mode. Check for these here too. */ 1126zeroentry coprocessor_segment_overrun do_coprocessor_segment_overrun
1077 leaq irq_return(%rip),%rcx 1127errorentry invalid_TSS do_invalid_TSS
1078 cmpq %rcx,RIP(%rsp) 1128errorentry segment_not_present do_segment_not_present
1079 je error_swapgs 1129zeroentry spurious_interrupt_bug do_spurious_interrupt_bug
1080 movl %ecx,%ecx /* zero extend */ 1130zeroentry coprocessor_error do_coprocessor_error
1081 cmpq %rcx,RIP(%rsp) 1131errorentry alignment_check do_alignment_check
1082 je error_swapgs 1132zeroentry simd_coprocessor_error do_simd_coprocessor_error
1083 cmpq $gs_change,RIP(%rsp) 1133
1084 je error_swapgs 1134 /* Reload gs selector with exception handling */
1085 jmp error_sti 1135 /* edi: new selector */
1086KPROBE_END(error_entry)
1087
1088 /* Reload gs selector with exception handling */
1089 /* edi: new selector */
1090ENTRY(native_load_gs_index) 1136ENTRY(native_load_gs_index)
1091 CFI_STARTPROC 1137 CFI_STARTPROC
1092 pushf 1138 pushf
1093 CFI_ADJUST_CFA_OFFSET 8 1139 CFI_ADJUST_CFA_OFFSET 8
1094 DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI)) 1140 DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI))
1095 SWAPGS 1141 SWAPGS
1096gs_change: 1142gs_change:
1097 movl %edi,%gs 1143 movl %edi,%gs
10982: mfence /* workaround */ 11442: mfence /* workaround */
1099 SWAPGS 1145 SWAPGS
1100 popf 1146 popf
1101 CFI_ADJUST_CFA_OFFSET -8 1147 CFI_ADJUST_CFA_OFFSET -8
1102 ret 1148 ret
1103 CFI_ENDPROC 1149 CFI_ENDPROC
1104ENDPROC(native_load_gs_index) 1150END(native_load_gs_index)
1105 1151
1106 .section __ex_table,"a" 1152 .section __ex_table,"a"
1107 .align 8 1153 .align 8
1108 .quad gs_change,bad_gs 1154 .quad gs_change,bad_gs
1109 .previous 1155 .previous
1110 .section .fixup,"ax" 1156 .section .fixup,"ax"
1111 /* running with kernelgs */ 1157 /* running with kernelgs */
1112bad_gs: 1158bad_gs:
1113 SWAPGS /* switch back to user gs */ 1159 SWAPGS /* switch back to user gs */
1114 xorl %eax,%eax 1160 xorl %eax,%eax
1115 movl %eax,%gs 1161 movl %eax,%gs
1116 jmp 2b 1162 jmp 2b
1117 .previous 1163 .previous
1118 1164
1119/* 1165/*
1120 * Create a kernel thread. 1166 * Create a kernel thread.
1121 * 1167 *
@@ -1138,7 +1184,7 @@ ENTRY(kernel_thread)
1138 1184
1139 xorl %r8d,%r8d 1185 xorl %r8d,%r8d
1140 xorl %r9d,%r9d 1186 xorl %r9d,%r9d
1141 1187
1142 # clone now 1188 # clone now
1143 call do_fork 1189 call do_fork
1144 movq %rax,RAX(%rsp) 1190 movq %rax,RAX(%rsp)
@@ -1149,15 +1195,15 @@ ENTRY(kernel_thread)
1149 * so internally to the x86_64 port you can rely on kernel_thread() 1195 * so internally to the x86_64 port you can rely on kernel_thread()
1150 * not to reschedule the child before returning, this avoids the need 1196 * not to reschedule the child before returning, this avoids the need
1151 * of hacks for example to fork off the per-CPU idle tasks. 1197 * of hacks for example to fork off the per-CPU idle tasks.
1152 * [Hopefully no generic code relies on the reschedule -AK] 1198 * [Hopefully no generic code relies on the reschedule -AK]
1153 */ 1199 */
1154 RESTORE_ALL 1200 RESTORE_ALL
1155 UNFAKE_STACK_FRAME 1201 UNFAKE_STACK_FRAME
1156 ret 1202 ret
1157 CFI_ENDPROC 1203 CFI_ENDPROC
1158ENDPROC(kernel_thread) 1204END(kernel_thread)
1159 1205
1160child_rip: 1206ENTRY(child_rip)
1161 pushq $0 # fake return address 1207 pushq $0 # fake return address
1162 CFI_STARTPROC 1208 CFI_STARTPROC
1163 /* 1209 /*
@@ -1170,8 +1216,9 @@ child_rip:
1170 # exit 1216 # exit
1171 mov %eax, %edi 1217 mov %eax, %edi
1172 call do_exit 1218 call do_exit
1219 ud2 # padding for call trace
1173 CFI_ENDPROC 1220 CFI_ENDPROC
1174ENDPROC(child_rip) 1221END(child_rip)
1175 1222
1176/* 1223/*
1177 * execve(). This function needs to use IRET, not SYSRET, to set up all state properly. 1224 * execve(). This function needs to use IRET, not SYSRET, to set up all state properly.
@@ -1191,10 +1238,10 @@ ENDPROC(child_rip)
1191ENTRY(kernel_execve) 1238ENTRY(kernel_execve)
1192 CFI_STARTPROC 1239 CFI_STARTPROC
1193 FAKE_STACK_FRAME $0 1240 FAKE_STACK_FRAME $0
1194 SAVE_ALL 1241 SAVE_ALL
1195 movq %rsp,%rcx 1242 movq %rsp,%rcx
1196 call sys_execve 1243 call sys_execve
1197 movq %rax, RAX(%rsp) 1244 movq %rax, RAX(%rsp)
1198 RESTORE_REST 1245 RESTORE_REST
1199 testq %rax,%rax 1246 testq %rax,%rax
1200 je int_ret_from_sys_call 1247 je int_ret_from_sys_call
@@ -1202,129 +1249,7 @@ ENTRY(kernel_execve)
1202 UNFAKE_STACK_FRAME 1249 UNFAKE_STACK_FRAME
1203 ret 1250 ret
1204 CFI_ENDPROC 1251 CFI_ENDPROC
1205ENDPROC(kernel_execve) 1252END(kernel_execve)
1206
1207KPROBE_ENTRY(page_fault)
1208 errorentry do_page_fault
1209KPROBE_END(page_fault)
1210
1211ENTRY(coprocessor_error)
1212 zeroentry do_coprocessor_error
1213END(coprocessor_error)
1214
1215ENTRY(simd_coprocessor_error)
1216 zeroentry do_simd_coprocessor_error
1217END(simd_coprocessor_error)
1218
1219ENTRY(device_not_available)
1220 zeroentry do_device_not_available
1221END(device_not_available)
1222
1223 /* runs on exception stack */
1224KPROBE_ENTRY(debug)
1225 INTR_FRAME
1226 PARAVIRT_ADJUST_EXCEPTION_FRAME
1227 pushq $0
1228 CFI_ADJUST_CFA_OFFSET 8
1229 paranoidentry do_debug, DEBUG_STACK
1230 paranoidexit
1231KPROBE_END(debug)
1232
1233 /* runs on exception stack */
1234KPROBE_ENTRY(nmi)
1235 INTR_FRAME
1236 PARAVIRT_ADJUST_EXCEPTION_FRAME
1237 pushq $-1
1238 CFI_ADJUST_CFA_OFFSET 8
1239 paranoidentry do_nmi, 0, 0
1240#ifdef CONFIG_TRACE_IRQFLAGS
1241 paranoidexit 0
1242#else
1243 jmp paranoid_exit1
1244 CFI_ENDPROC
1245#endif
1246KPROBE_END(nmi)
1247
1248KPROBE_ENTRY(int3)
1249 INTR_FRAME
1250 PARAVIRT_ADJUST_EXCEPTION_FRAME
1251 pushq $0
1252 CFI_ADJUST_CFA_OFFSET 8
1253 paranoidentry do_int3, DEBUG_STACK
1254 jmp paranoid_exit1
1255 CFI_ENDPROC
1256KPROBE_END(int3)
1257
1258ENTRY(overflow)
1259 zeroentry do_overflow
1260END(overflow)
1261
1262ENTRY(bounds)
1263 zeroentry do_bounds
1264END(bounds)
1265
1266ENTRY(invalid_op)
1267 zeroentry do_invalid_op
1268END(invalid_op)
1269
1270ENTRY(coprocessor_segment_overrun)
1271 zeroentry do_coprocessor_segment_overrun
1272END(coprocessor_segment_overrun)
1273
1274 /* runs on exception stack */
1275ENTRY(double_fault)
1276 XCPT_FRAME
1277 PARAVIRT_ADJUST_EXCEPTION_FRAME
1278 paranoidentry do_double_fault
1279 jmp paranoid_exit1
1280 CFI_ENDPROC
1281END(double_fault)
1282
1283ENTRY(invalid_TSS)
1284 errorentry do_invalid_TSS
1285END(invalid_TSS)
1286
1287ENTRY(segment_not_present)
1288 errorentry do_segment_not_present
1289END(segment_not_present)
1290
1291 /* runs on exception stack */
1292ENTRY(stack_segment)
1293 XCPT_FRAME
1294 PARAVIRT_ADJUST_EXCEPTION_FRAME
1295 paranoidentry do_stack_segment
1296 jmp paranoid_exit1
1297 CFI_ENDPROC
1298END(stack_segment)
1299
1300KPROBE_ENTRY(general_protection)
1301 errorentry do_general_protection
1302KPROBE_END(general_protection)
1303
1304ENTRY(alignment_check)
1305 errorentry do_alignment_check
1306END(alignment_check)
1307
1308ENTRY(divide_error)
1309 zeroentry do_divide_error
1310END(divide_error)
1311
1312ENTRY(spurious_interrupt_bug)
1313 zeroentry do_spurious_interrupt_bug
1314END(spurious_interrupt_bug)
1315
1316#ifdef CONFIG_X86_MCE
1317 /* runs on exception stack */
1318ENTRY(machine_check)
1319 INTR_FRAME
1320 PARAVIRT_ADJUST_EXCEPTION_FRAME
1321 pushq $0
1322 CFI_ADJUST_CFA_OFFSET 8
1323 paranoidentry do_machine_check
1324 jmp paranoid_exit1
1325 CFI_ENDPROC
1326END(machine_check)
1327#endif
1328 1253
1329/* Call softirq on interrupt stack. Interrupts are off. */ 1254/* Call softirq on interrupt stack. Interrupts are off. */
1330ENTRY(call_softirq) 1255ENTRY(call_softirq)
@@ -1344,40 +1269,33 @@ ENTRY(call_softirq)
1344 decl %gs:pda_irqcount 1269 decl %gs:pda_irqcount
1345 ret 1270 ret
1346 CFI_ENDPROC 1271 CFI_ENDPROC
1347ENDPROC(call_softirq) 1272END(call_softirq)
1348
1349KPROBE_ENTRY(ignore_sysret)
1350 CFI_STARTPROC
1351 mov $-ENOSYS,%eax
1352 sysret
1353 CFI_ENDPROC
1354ENDPROC(ignore_sysret)
1355 1273
1356#ifdef CONFIG_XEN 1274#ifdef CONFIG_XEN
1357ENTRY(xen_hypervisor_callback) 1275zeroentry xen_hypervisor_callback xen_do_hypervisor_callback
1358 zeroentry xen_do_hypervisor_callback
1359END(xen_hypervisor_callback)
1360 1276
1361/* 1277/*
1362# A note on the "critical region" in our callback handler. 1278 * A note on the "critical region" in our callback handler.
1363# We want to avoid stacking callback handlers due to events occurring 1279 * We want to avoid stacking callback handlers due to events occurring
1364# during handling of the last event. To do this, we keep events disabled 1280 * during handling of the last event. To do this, we keep events disabled
1365# until we've done all processing. HOWEVER, we must enable events before 1281 * until we've done all processing. HOWEVER, we must enable events before
1366# popping the stack frame (can't be done atomically) and so it would still 1282 * popping the stack frame (can't be done atomically) and so it would still
1367# be possible to get enough handler activations to overflow the stack. 1283 * be possible to get enough handler activations to overflow the stack.
1368# Although unlikely, bugs of that kind are hard to track down, so we'd 1284 * Although unlikely, bugs of that kind are hard to track down, so we'd
1369# like to avoid the possibility. 1285 * like to avoid the possibility.
1370# So, on entry to the handler we detect whether we interrupted an 1286 * So, on entry to the handler we detect whether we interrupted an
1371# existing activation in its critical region -- if so, we pop the current 1287 * existing activation in its critical region -- if so, we pop the current
1372# activation and restart the handler using the previous one. 1288 * activation and restart the handler using the previous one.
1373*/ 1289 */
1374ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) 1290ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1375 CFI_STARTPROC 1291 CFI_STARTPROC
1376/* Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 1292/*
1377 see the correct pointer to the pt_regs */ 1293 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1294 * see the correct pointer to the pt_regs
1295 */
1378 movq %rdi, %rsp # we don't return, adjust the stack frame 1296 movq %rdi, %rsp # we don't return, adjust the stack frame
1379 CFI_ENDPROC 1297 CFI_ENDPROC
1380 CFI_DEFAULT_STACK 1298 DEFAULT_FRAME
138111: incl %gs:pda_irqcount 129911: incl %gs:pda_irqcount
1382 movq %rsp,%rbp 1300 movq %rsp,%rbp
1383 CFI_DEF_CFA_REGISTER rbp 1301 CFI_DEF_CFA_REGISTER rbp
@@ -1392,23 +1310,26 @@ ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1392END(do_hypervisor_callback) 1310END(do_hypervisor_callback)
1393 1311
1394/* 1312/*
1395# Hypervisor uses this for application faults while it executes. 1313 * Hypervisor uses this for application faults while it executes.
1396# We get here for two reasons: 1314 * We get here for two reasons:
1397# 1. Fault while reloading DS, ES, FS or GS 1315 * 1. Fault while reloading DS, ES, FS or GS
1398# 2. Fault while executing IRET 1316 * 2. Fault while executing IRET
1399# Category 1 we do not need to fix up as Xen has already reloaded all segment 1317 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1400# registers that could be reloaded and zeroed the others. 1318 * registers that could be reloaded and zeroed the others.
1401# Category 2 we fix up by killing the current process. We cannot use the 1319 * Category 2 we fix up by killing the current process. We cannot use the
1402# normal Linux return path in this case because if we use the IRET hypercall 1320 * normal Linux return path in this case because if we use the IRET hypercall
1403# to pop the stack frame we end up in an infinite loop of failsafe callbacks. 1321 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1404# We distinguish between categories by comparing each saved segment register 1322 * We distinguish between categories by comparing each saved segment register
1405# with its current contents: any discrepancy means we in category 1. 1323 * with its current contents: any discrepancy means we in category 1.
1406*/ 1324 */
1407ENTRY(xen_failsafe_callback) 1325ENTRY(xen_failsafe_callback)
1408 framesz = (RIP-0x30) /* workaround buggy gas */ 1326 INTR_FRAME 1 (6*8)
1409 _frame framesz 1327 /*CFI_REL_OFFSET gs,GS*/
1410 CFI_REL_OFFSET rcx, 0 1328 /*CFI_REL_OFFSET fs,FS*/
1411 CFI_REL_OFFSET r11, 8 1329 /*CFI_REL_OFFSET es,ES*/
1330 /*CFI_REL_OFFSET ds,DS*/
1331 CFI_REL_OFFSET r11,8
1332 CFI_REL_OFFSET rcx,0
1412 movw %ds,%cx 1333 movw %ds,%cx
1413 cmpw %cx,0x10(%rsp) 1334 cmpw %cx,0x10(%rsp)
1414 CFI_REMEMBER_STATE 1335 CFI_REMEMBER_STATE
@@ -1429,12 +1350,9 @@ ENTRY(xen_failsafe_callback)
1429 CFI_RESTORE r11 1350 CFI_RESTORE r11
1430 addq $0x30,%rsp 1351 addq $0x30,%rsp
1431 CFI_ADJUST_CFA_OFFSET -0x30 1352 CFI_ADJUST_CFA_OFFSET -0x30
1432 pushq $0 1353 pushq_cfi $0 /* RIP */
1433 CFI_ADJUST_CFA_OFFSET 8 1354 pushq_cfi %r11
1434 pushq %r11 1355 pushq_cfi %rcx
1435 CFI_ADJUST_CFA_OFFSET 8
1436 pushq %rcx
1437 CFI_ADJUST_CFA_OFFSET 8
1438 jmp general_protection 1356 jmp general_protection
1439 CFI_RESTORE_STATE 1357 CFI_RESTORE_STATE
14401: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 13581: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
@@ -1444,11 +1362,223 @@ ENTRY(xen_failsafe_callback)
1444 CFI_RESTORE r11 1362 CFI_RESTORE r11
1445 addq $0x30,%rsp 1363 addq $0x30,%rsp
1446 CFI_ADJUST_CFA_OFFSET -0x30 1364 CFI_ADJUST_CFA_OFFSET -0x30
1447 pushq $0 1365 pushq_cfi $0
1448 CFI_ADJUST_CFA_OFFSET 8
1449 SAVE_ALL 1366 SAVE_ALL
1450 jmp error_exit 1367 jmp error_exit
1451 CFI_ENDPROC 1368 CFI_ENDPROC
1452END(xen_failsafe_callback) 1369END(xen_failsafe_callback)
1453 1370
1454#endif /* CONFIG_XEN */ 1371#endif /* CONFIG_XEN */
1372
1373/*
1374 * Some functions should be protected against kprobes
1375 */
1376 .pushsection .kprobes.text, "ax"
1377
1378paranoidzeroentry_ist debug do_debug DEBUG_STACK
1379paranoidzeroentry_ist int3 do_int3 DEBUG_STACK
1380paranoiderrorentry stack_segment do_stack_segment
1381errorentry general_protection do_general_protection
1382errorentry page_fault do_page_fault
1383#ifdef CONFIG_X86_MCE
1384paranoidzeroentry machine_check do_machine_check
1385#endif
1386
1387 /*
1388 * "Paranoid" exit path from exception stack.
1389 * Paranoid because this is used by NMIs and cannot take
1390 * any kernel state for granted.
1391 * We don't do kernel preemption checks here, because only
1392 * NMI should be common and it does not enable IRQs and
1393 * cannot get reschedule ticks.
1394 *
1395 * "trace" is 0 for the NMI handler only, because irq-tracing
1396 * is fundamentally NMI-unsafe. (we cannot change the soft and
1397 * hard flags at once, atomically)
1398 */
1399
1400 /* ebx: no swapgs flag */
1401ENTRY(paranoid_exit)
1402 INTR_FRAME
1403 DISABLE_INTERRUPTS(CLBR_NONE)
1404 TRACE_IRQS_OFF
1405 testl %ebx,%ebx /* swapgs needed? */
1406 jnz paranoid_restore
1407 testl $3,CS(%rsp)
1408 jnz paranoid_userspace
1409paranoid_swapgs:
1410 TRACE_IRQS_IRETQ 0
1411 SWAPGS_UNSAFE_STACK
1412paranoid_restore:
1413 RESTORE_ALL 8
1414 jmp irq_return
1415paranoid_userspace:
1416 GET_THREAD_INFO(%rcx)
1417 movl TI_flags(%rcx),%ebx
1418 andl $_TIF_WORK_MASK,%ebx
1419 jz paranoid_swapgs
1420 movq %rsp,%rdi /* &pt_regs */
1421 call sync_regs
1422 movq %rax,%rsp /* switch stack for scheduling */
1423 testl $_TIF_NEED_RESCHED,%ebx
1424 jnz paranoid_schedule
1425 movl %ebx,%edx /* arg3: thread flags */
1426 TRACE_IRQS_ON
1427 ENABLE_INTERRUPTS(CLBR_NONE)
1428 xorl %esi,%esi /* arg2: oldset */
1429 movq %rsp,%rdi /* arg1: &pt_regs */
1430 call do_notify_resume
1431 DISABLE_INTERRUPTS(CLBR_NONE)
1432 TRACE_IRQS_OFF
1433 jmp paranoid_userspace
1434paranoid_schedule:
1435 TRACE_IRQS_ON
1436 ENABLE_INTERRUPTS(CLBR_ANY)
1437 call schedule
1438 DISABLE_INTERRUPTS(CLBR_ANY)
1439 TRACE_IRQS_OFF
1440 jmp paranoid_userspace
1441 CFI_ENDPROC
1442END(paranoid_exit)
1443
1444/*
1445 * Exception entry point. This expects an error code/orig_rax on the stack.
1446 * returns in "no swapgs flag" in %ebx.
1447 */
1448ENTRY(error_entry)
1449 XCPT_FRAME
1450 CFI_ADJUST_CFA_OFFSET 15*8
1451 /* oldrax contains error code */
1452 cld
1453 movq_cfi rdi, RDI+8
1454 movq_cfi rsi, RSI+8
1455 movq_cfi rdx, RDX+8
1456 movq_cfi rcx, RCX+8
1457 movq_cfi rax, RAX+8
1458 movq_cfi r8, R8+8
1459 movq_cfi r9, R9+8
1460 movq_cfi r10, R10+8
1461 movq_cfi r11, R11+8
1462 movq_cfi rbx, RBX+8
1463 movq_cfi rbp, RBP+8
1464 movq_cfi r12, R12+8
1465 movq_cfi r13, R13+8
1466 movq_cfi r14, R14+8
1467 movq_cfi r15, R15+8
1468 xorl %ebx,%ebx
1469 testl $3,CS+8(%rsp)
1470 je error_kernelspace
1471error_swapgs:
1472 SWAPGS
1473error_sti:
1474 TRACE_IRQS_OFF
1475 ret
1476 CFI_ENDPROC
1477
1478/*
1479 * There are two places in the kernel that can potentially fault with
1480 * usergs. Handle them here. The exception handlers after iret run with
1481 * kernel gs again, so don't set the user space flag. B stepping K8s
1482 * sometimes report an truncated RIP for IRET exceptions returning to
1483 * compat mode. Check for these here too.
1484 */
1485error_kernelspace:
1486 incl %ebx
1487 leaq irq_return(%rip),%rcx
1488 cmpq %rcx,RIP+8(%rsp)
1489 je error_swapgs
1490 movl %ecx,%ecx /* zero extend */
1491 cmpq %rcx,RIP+8(%rsp)
1492 je error_swapgs
1493 cmpq $gs_change,RIP+8(%rsp)
1494 je error_swapgs
1495 jmp error_sti
1496END(error_entry)
1497
1498
1499/* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
1500ENTRY(error_exit)
1501 DEFAULT_FRAME
1502 movl %ebx,%eax
1503 RESTORE_REST
1504 DISABLE_INTERRUPTS(CLBR_NONE)
1505 TRACE_IRQS_OFF
1506 GET_THREAD_INFO(%rcx)
1507 testl %eax,%eax
1508 jne retint_kernel
1509 LOCKDEP_SYS_EXIT_IRQ
1510 movl TI_flags(%rcx),%edx
1511 movl $_TIF_WORK_MASK,%edi
1512 andl %edi,%edx
1513 jnz retint_careful
1514 jmp retint_swapgs
1515 CFI_ENDPROC
1516END(error_exit)
1517
1518
1519 /* runs on exception stack */
1520ENTRY(nmi)
1521 INTR_FRAME
1522 PARAVIRT_ADJUST_EXCEPTION_FRAME
1523 pushq_cfi $-1
1524 subq $15*8, %rsp
1525 CFI_ADJUST_CFA_OFFSET 15*8
1526 call save_paranoid
1527 DEFAULT_FRAME 0
1528 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1529 movq %rsp,%rdi
1530 movq $-1,%rsi
1531 call do_nmi
1532#ifdef CONFIG_TRACE_IRQFLAGS
1533 /* paranoidexit; without TRACE_IRQS_OFF */
1534 /* ebx: no swapgs flag */
1535 DISABLE_INTERRUPTS(CLBR_NONE)
1536 testl %ebx,%ebx /* swapgs needed? */
1537 jnz nmi_restore
1538 testl $3,CS(%rsp)
1539 jnz nmi_userspace
1540nmi_swapgs:
1541 SWAPGS_UNSAFE_STACK
1542nmi_restore:
1543 RESTORE_ALL 8
1544 jmp irq_return
1545nmi_userspace:
1546 GET_THREAD_INFO(%rcx)
1547 movl TI_flags(%rcx),%ebx
1548 andl $_TIF_WORK_MASK,%ebx
1549 jz nmi_swapgs
1550 movq %rsp,%rdi /* &pt_regs */
1551 call sync_regs
1552 movq %rax,%rsp /* switch stack for scheduling */
1553 testl $_TIF_NEED_RESCHED,%ebx
1554 jnz nmi_schedule
1555 movl %ebx,%edx /* arg3: thread flags */
1556 ENABLE_INTERRUPTS(CLBR_NONE)
1557 xorl %esi,%esi /* arg2: oldset */
1558 movq %rsp,%rdi /* arg1: &pt_regs */
1559 call do_notify_resume
1560 DISABLE_INTERRUPTS(CLBR_NONE)
1561 jmp nmi_userspace
1562nmi_schedule:
1563 ENABLE_INTERRUPTS(CLBR_ANY)
1564 call schedule
1565 DISABLE_INTERRUPTS(CLBR_ANY)
1566 jmp nmi_userspace
1567 CFI_ENDPROC
1568#else
1569 jmp paranoid_exit
1570 CFI_ENDPROC
1571#endif
1572END(nmi)
1573
1574ENTRY(ignore_sysret)
1575 CFI_STARTPROC
1576 mov $-ENOSYS,%eax
1577 sysret
1578 CFI_ENDPROC
1579END(ignore_sysret)
1580
1581/*
1582 * End of kprobes section
1583 */
1584 .popsection
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
index 0aa2c443d600..53699c931ad4 100644
--- a/arch/x86/kernel/es7000_32.c
+++ b/arch/x86/kernel/es7000_32.c
@@ -38,8 +38,11 @@
38#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/nmi.h> 39#include <asm/nmi.h>
40#include <asm/smp.h> 40#include <asm/smp.h>
41#include <asm/atomic.h>
41#include <asm/apicdef.h> 42#include <asm/apicdef.h>
42#include <mach_mpparse.h> 43#include <mach_mpparse.h>
44#include <asm/genapic.h>
45#include <asm/setup.h>
43 46
44/* 47/*
45 * ES7000 chipsets 48 * ES7000 chipsets
@@ -161,6 +164,43 @@ es7000_rename_gsi(int ioapic, int gsi)
161 return gsi; 164 return gsi;
162} 165}
163 166
167static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
168{
169 unsigned long vect = 0, psaival = 0;
170
171 if (psai == NULL)
172 return -1;
173
174 vect = ((unsigned long)__pa(eip)/0x1000) << 16;
175 psaival = (0x1000000 | vect | cpu);
176
177 while (*psai & 0x1000000)
178 ;
179
180 *psai = psaival;
181
182 return 0;
183}
184
185static void noop_wait_for_deassert(atomic_t *deassert_not_used)
186{
187}
188
189static int __init es7000_update_genapic(void)
190{
191 genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
192
193 /* MPENTIUMIII */
194 if (boot_cpu_data.x86 == 6 &&
195 (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
196 es7000_update_genapic_to_cluster();
197 genapic->wait_for_init_deassert = noop_wait_for_deassert;
198 genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
199 }
200
201 return 0;
202}
203
164void __init 204void __init
165setup_unisys(void) 205setup_unisys(void)
166{ 206{
@@ -176,6 +216,8 @@ setup_unisys(void)
176 else 216 else
177 es7000_plat = ES7000_CLASSIC; 217 es7000_plat = ES7000_CLASSIC;
178 ioapic_renumber_irq = es7000_rename_gsi; 218 ioapic_renumber_irq = es7000_rename_gsi;
219
220 x86_quirks->update_genapic = es7000_update_genapic;
179} 221}
180 222
181/* 223/*
@@ -317,26 +359,6 @@ es7000_mip_write(struct mip_reg *mip_reg)
317 return status; 359 return status;
318} 360}
319 361
320int
321es7000_start_cpu(int cpu, unsigned long eip)
322{
323 unsigned long vect = 0, psaival = 0;
324
325 if (psai == NULL)
326 return -1;
327
328 vect = ((unsigned long)__pa(eip)/0x1000) << 16;
329 psaival = (0x1000000 | vect | cpu);
330
331 while (*psai & 0x1000000)
332 ;
333
334 *psai = psaival;
335
336 return 0;
337
338}
339
340void __init 362void __init
341es7000_sw_apic(void) 363es7000_sw_apic(void)
342{ 364{
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 50ea0ac8c9bf..1b43086b097a 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -14,14 +14,17 @@
14#include <linux/uaccess.h> 14#include <linux/uaccess.h>
15#include <linux/ftrace.h> 15#include <linux/ftrace.h>
16#include <linux/percpu.h> 16#include <linux/percpu.h>
17#include <linux/sched.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/list.h> 19#include <linux/list.h>
19 20
20#include <asm/ftrace.h> 21#include <asm/ftrace.h>
22#include <linux/ftrace.h>
21#include <asm/nops.h> 23#include <asm/nops.h>
24#include <asm/nmi.h>
22 25
23 26
24static unsigned char ftrace_nop[MCOUNT_INSN_SIZE]; 27#ifdef CONFIG_DYNAMIC_FTRACE
25 28
26union ftrace_code_union { 29union ftrace_code_union {
27 char code[MCOUNT_INSN_SIZE]; 30 char code[MCOUNT_INSN_SIZE];
@@ -31,18 +34,12 @@ union ftrace_code_union {
31 } __attribute__((packed)); 34 } __attribute__((packed));
32}; 35};
33 36
34
35static int ftrace_calc_offset(long ip, long addr) 37static int ftrace_calc_offset(long ip, long addr)
36{ 38{
37 return (int)(addr - ip); 39 return (int)(addr - ip);
38} 40}
39 41
40unsigned char *ftrace_nop_replace(void) 42static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
41{
42 return ftrace_nop;
43}
44
45unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
46{ 43{
47 static union ftrace_code_union calc; 44 static union ftrace_code_union calc;
48 45
@@ -56,7 +53,142 @@ unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
56 return calc.code; 53 return calc.code;
57} 54}
58 55
59int 56/*
57 * Modifying code must take extra care. On an SMP machine, if
58 * the code being modified is also being executed on another CPU
59 * that CPU will have undefined results and possibly take a GPF.
60 * We use kstop_machine to stop other CPUS from exectuing code.
61 * But this does not stop NMIs from happening. We still need
62 * to protect against that. We separate out the modification of
63 * the code to take care of this.
64 *
65 * Two buffers are added: An IP buffer and a "code" buffer.
66 *
67 * 1) Put the instruction pointer into the IP buffer
68 * and the new code into the "code" buffer.
69 * 2) Set a flag that says we are modifying code
70 * 3) Wait for any running NMIs to finish.
71 * 4) Write the code
72 * 5) clear the flag.
73 * 6) Wait for any running NMIs to finish.
74 *
75 * If an NMI is executed, the first thing it does is to call
76 * "ftrace_nmi_enter". This will check if the flag is set to write
77 * and if it is, it will write what is in the IP and "code" buffers.
78 *
79 * The trick is, it does not matter if everyone is writing the same
80 * content to the code location. Also, if a CPU is executing code
81 * it is OK to write to that code location if the contents being written
82 * are the same as what exists.
83 */
84
85static atomic_t in_nmi = ATOMIC_INIT(0);
86static int mod_code_status; /* holds return value of text write */
87static int mod_code_write; /* set when NMI should do the write */
88static void *mod_code_ip; /* holds the IP to write to */
89static void *mod_code_newcode; /* holds the text to write to the IP */
90
91static unsigned nmi_wait_count;
92static atomic_t nmi_update_count = ATOMIC_INIT(0);
93
94int ftrace_arch_read_dyn_info(char *buf, int size)
95{
96 int r;
97
98 r = snprintf(buf, size, "%u %u",
99 nmi_wait_count,
100 atomic_read(&nmi_update_count));
101 return r;
102}
103
104static void ftrace_mod_code(void)
105{
106 /*
107 * Yes, more than one CPU process can be writing to mod_code_status.
108 * (and the code itself)
109 * But if one were to fail, then they all should, and if one were
110 * to succeed, then they all should.
111 */
112 mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,
113 MCOUNT_INSN_SIZE);
114}
115
116void ftrace_nmi_enter(void)
117{
118 atomic_inc(&in_nmi);
119 /* Must have in_nmi seen before reading write flag */
120 smp_mb();
121 if (mod_code_write) {
122 ftrace_mod_code();
123 atomic_inc(&nmi_update_count);
124 }
125}
126
127void ftrace_nmi_exit(void)
128{
129 /* Finish all executions before clearing in_nmi */
130 smp_wmb();
131 atomic_dec(&in_nmi);
132}
133
134static void wait_for_nmi(void)
135{
136 int waited = 0;
137
138 while (atomic_read(&in_nmi)) {
139 waited = 1;
140 cpu_relax();
141 }
142
143 if (waited)
144 nmi_wait_count++;
145}
146
147static int
148do_ftrace_mod_code(unsigned long ip, void *new_code)
149{
150 mod_code_ip = (void *)ip;
151 mod_code_newcode = new_code;
152
153 /* The buffers need to be visible before we let NMIs write them */
154 smp_wmb();
155
156 mod_code_write = 1;
157
158 /* Make sure write bit is visible before we wait on NMIs */
159 smp_mb();
160
161 wait_for_nmi();
162
163 /* Make sure all running NMIs have finished before we write the code */
164 smp_mb();
165
166 ftrace_mod_code();
167
168 /* Make sure the write happens before clearing the bit */
169 smp_wmb();
170
171 mod_code_write = 0;
172
173 /* make sure NMIs see the cleared bit */
174 smp_mb();
175
176 wait_for_nmi();
177
178 return mod_code_status;
179}
180
181
182
183
184static unsigned char ftrace_nop[MCOUNT_INSN_SIZE];
185
186static unsigned char *ftrace_nop_replace(void)
187{
188 return ftrace_nop;
189}
190
191static int
60ftrace_modify_code(unsigned long ip, unsigned char *old_code, 192ftrace_modify_code(unsigned long ip, unsigned char *old_code,
61 unsigned char *new_code) 193 unsigned char *new_code)
62{ 194{
@@ -81,7 +213,7 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
81 return -EINVAL; 213 return -EINVAL;
82 214
83 /* replace the text with the new text */ 215 /* replace the text with the new text */
84 if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE)) 216 if (do_ftrace_mod_code(ip, new_code))
85 return -EPERM; 217 return -EPERM;
86 218
87 sync_core(); 219 sync_core();
@@ -89,6 +221,29 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
89 return 0; 221 return 0;
90} 222}
91 223
224int ftrace_make_nop(struct module *mod,
225 struct dyn_ftrace *rec, unsigned long addr)
226{
227 unsigned char *new, *old;
228 unsigned long ip = rec->ip;
229
230 old = ftrace_call_replace(ip, addr);
231 new = ftrace_nop_replace();
232
233 return ftrace_modify_code(rec->ip, old, new);
234}
235
236int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
237{
238 unsigned char *new, *old;
239 unsigned long ip = rec->ip;
240
241 old = ftrace_nop_replace();
242 new = ftrace_call_replace(ip, addr);
243
244 return ftrace_modify_code(rec->ip, old, new);
245}
246
92int ftrace_update_ftrace_func(ftrace_func_t func) 247int ftrace_update_ftrace_func(ftrace_func_t func)
93{ 248{
94 unsigned long ip = (unsigned long)(&ftrace_call); 249 unsigned long ip = (unsigned long)(&ftrace_call);
@@ -165,3 +320,218 @@ int __init ftrace_dyn_arch_init(void *data)
165 320
166 return 0; 321 return 0;
167} 322}
323#endif
324
325#ifdef CONFIG_FUNCTION_GRAPH_TRACER
326
327#ifdef CONFIG_DYNAMIC_FTRACE
328extern void ftrace_graph_call(void);
329
330static int ftrace_mod_jmp(unsigned long ip,
331 int old_offset, int new_offset)
332{
333 unsigned char code[MCOUNT_INSN_SIZE];
334
335 if (probe_kernel_read(code, (void *)ip, MCOUNT_INSN_SIZE))
336 return -EFAULT;
337
338 if (code[0] != 0xe9 || old_offset != *(int *)(&code[1]))
339 return -EINVAL;
340
341 *(int *)(&code[1]) = new_offset;
342
343 if (do_ftrace_mod_code(ip, &code))
344 return -EPERM;
345
346 return 0;
347}
348
349int ftrace_enable_ftrace_graph_caller(void)
350{
351 unsigned long ip = (unsigned long)(&ftrace_graph_call);
352 int old_offset, new_offset;
353
354 old_offset = (unsigned long)(&ftrace_stub) - (ip + MCOUNT_INSN_SIZE);
355 new_offset = (unsigned long)(&ftrace_graph_caller) - (ip + MCOUNT_INSN_SIZE);
356
357 return ftrace_mod_jmp(ip, old_offset, new_offset);
358}
359
360int ftrace_disable_ftrace_graph_caller(void)
361{
362 unsigned long ip = (unsigned long)(&ftrace_graph_call);
363 int old_offset, new_offset;
364
365 old_offset = (unsigned long)(&ftrace_graph_caller) - (ip + MCOUNT_INSN_SIZE);
366 new_offset = (unsigned long)(&ftrace_stub) - (ip + MCOUNT_INSN_SIZE);
367
368 return ftrace_mod_jmp(ip, old_offset, new_offset);
369}
370
371#else /* CONFIG_DYNAMIC_FTRACE */
372
373/*
374 * These functions are picked from those used on
375 * this page for dynamic ftrace. They have been
376 * simplified to ignore all traces in NMI context.
377 */
378static atomic_t in_nmi;
379
380void ftrace_nmi_enter(void)
381{
382 atomic_inc(&in_nmi);
383}
384
385void ftrace_nmi_exit(void)
386{
387 atomic_dec(&in_nmi);
388}
389
390#endif /* !CONFIG_DYNAMIC_FTRACE */
391
392/* Add a function return address to the trace stack on thread info.*/
393static int push_return_trace(unsigned long ret, unsigned long long time,
394 unsigned long func, int *depth)
395{
396 int index;
397
398 if (!current->ret_stack)
399 return -EBUSY;
400
401 /* The return trace stack is full */
402 if (current->curr_ret_stack == FTRACE_RETFUNC_DEPTH - 1) {
403 atomic_inc(&current->trace_overrun);
404 return -EBUSY;
405 }
406
407 index = ++current->curr_ret_stack;
408 barrier();
409 current->ret_stack[index].ret = ret;
410 current->ret_stack[index].func = func;
411 current->ret_stack[index].calltime = time;
412 *depth = index;
413
414 return 0;
415}
416
417/* Retrieve a function return address to the trace stack on thread info.*/
418static void pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret)
419{
420 int index;
421
422 index = current->curr_ret_stack;
423
424 if (unlikely(index < 0)) {
425 ftrace_graph_stop();
426 WARN_ON(1);
427 /* Might as well panic, otherwise we have no where to go */
428 *ret = (unsigned long)panic;
429 return;
430 }
431
432 *ret = current->ret_stack[index].ret;
433 trace->func = current->ret_stack[index].func;
434 trace->calltime = current->ret_stack[index].calltime;
435 trace->overrun = atomic_read(&current->trace_overrun);
436 trace->depth = index;
437 barrier();
438 current->curr_ret_stack--;
439
440}
441
442/*
443 * Send the trace to the ring-buffer.
444 * @return the original return address.
445 */
446unsigned long ftrace_return_to_handler(void)
447{
448 struct ftrace_graph_ret trace;
449 unsigned long ret;
450
451 pop_return_trace(&trace, &ret);
452 trace.rettime = cpu_clock(raw_smp_processor_id());
453 ftrace_graph_return(&trace);
454
455 if (unlikely(!ret)) {
456 ftrace_graph_stop();
457 WARN_ON(1);
458 /* Might as well panic. What else to do? */
459 ret = (unsigned long)panic;
460 }
461
462 return ret;
463}
464
465/*
466 * Hook the return address and push it in the stack of return addrs
467 * in current thread info.
468 */
469void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
470{
471 unsigned long old;
472 unsigned long long calltime;
473 int faulted;
474 struct ftrace_graph_ent trace;
475 unsigned long return_hooker = (unsigned long)
476 &return_to_handler;
477
478 /* Nmi's are currently unsupported */
479 if (unlikely(atomic_read(&in_nmi)))
480 return;
481
482 if (unlikely(atomic_read(&current->tracing_graph_pause)))
483 return;
484
485 /*
486 * Protect against fault, even if it shouldn't
487 * happen. This tool is too much intrusive to
488 * ignore such a protection.
489 */
490 asm volatile(
491 "1: " _ASM_MOV " (%[parent_old]), %[old]\n"
492 "2: " _ASM_MOV " %[return_hooker], (%[parent_replaced])\n"
493 " movl $0, %[faulted]\n"
494
495 ".section .fixup, \"ax\"\n"
496 "3: movl $1, %[faulted]\n"
497 ".previous\n"
498
499 _ASM_EXTABLE(1b, 3b)
500 _ASM_EXTABLE(2b, 3b)
501
502 : [parent_replaced] "=r" (parent), [old] "=r" (old),
503 [faulted] "=r" (faulted)
504 : [parent_old] "0" (parent), [return_hooker] "r" (return_hooker)
505 : "memory"
506 );
507
508 if (unlikely(faulted)) {
509 ftrace_graph_stop();
510 WARN_ON(1);
511 return;
512 }
513
514 if (unlikely(!__kernel_text_address(old))) {
515 ftrace_graph_stop();
516 *parent = old;
517 WARN_ON(1);
518 return;
519 }
520
521 calltime = cpu_clock(raw_smp_processor_id());
522
523 if (push_return_trace(old, calltime,
524 self_addr, &trace.depth) == -EBUSY) {
525 *parent = old;
526 return;
527 }
528
529 trace.func = self_addr;
530
531 /* Only trace if the calling function expects to */
532 if (!ftrace_graph_entry(&trace)) {
533 current->curr_ret_stack--;
534 *parent = old;
535 }
536}
537#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/genapic_64.c
index 6c9bfc9e1e95..2bced78b0b8e 100644
--- a/arch/x86/kernel/genapic_64.c
+++ b/arch/x86/kernel/genapic_64.c
@@ -21,6 +21,7 @@
21#include <asm/smp.h> 21#include <asm/smp.h>
22#include <asm/ipi.h> 22#include <asm/ipi.h>
23#include <asm/genapic.h> 23#include <asm/genapic.h>
24#include <asm/setup.h>
24 25
25extern struct genapic apic_flat; 26extern struct genapic apic_flat;
26extern struct genapic apic_physflat; 27extern struct genapic apic_physflat;
@@ -53,6 +54,9 @@ void __init setup_apic_routing(void)
53 genapic = &apic_physflat; 54 genapic = &apic_physflat;
54 printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name); 55 printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name);
55 } 56 }
57
58 if (x86_quirks->update_genapic)
59 x86_quirks->update_genapic();
56} 60}
57 61
58/* Same for both flat and physical. */ 62/* Same for both flat and physical. */
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 2c7dbdb98278..dece17289731 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/threads.h> 12#include <linux/threads.h>
13#include <linux/cpu.h>
13#include <linux/cpumask.h> 14#include <linux/cpumask.h>
14#include <linux/string.h> 15#include <linux/string.h>
15#include <linux/ctype.h> 16#include <linux/ctype.h>
@@ -17,6 +18,9 @@
17#include <linux/sched.h> 18#include <linux/sched.h>
18#include <linux/module.h> 19#include <linux/module.h>
19#include <linux/hardirq.h> 20#include <linux/hardirq.h>
21#include <linux/timer.h>
22#include <linux/proc_fs.h>
23#include <asm/current.h>
20#include <asm/smp.h> 24#include <asm/smp.h>
21#include <asm/ipi.h> 25#include <asm/ipi.h>
22#include <asm/genapic.h> 26#include <asm/genapic.h>
@@ -356,6 +360,103 @@ static __init void uv_rtc_init(void)
356} 360}
357 361
358/* 362/*
363 * percpu heartbeat timer
364 */
365static void uv_heartbeat(unsigned long ignored)
366{
367 struct timer_list *timer = &uv_hub_info->scir.timer;
368 unsigned char bits = uv_hub_info->scir.state;
369
370 /* flip heartbeat bit */
371 bits ^= SCIR_CPU_HEARTBEAT;
372
373 /* is this cpu idle? */
374 if (idle_cpu(raw_smp_processor_id()))
375 bits &= ~SCIR_CPU_ACTIVITY;
376 else
377 bits |= SCIR_CPU_ACTIVITY;
378
379 /* update system controller interface reg */
380 uv_set_scir_bits(bits);
381
382 /* enable next timer period */
383 mod_timer(timer, jiffies + SCIR_CPU_HB_INTERVAL);
384}
385
386static void __cpuinit uv_heartbeat_enable(int cpu)
387{
388 if (!uv_cpu_hub_info(cpu)->scir.enabled) {
389 struct timer_list *timer = &uv_cpu_hub_info(cpu)->scir.timer;
390
391 uv_set_cpu_scir_bits(cpu, SCIR_CPU_HEARTBEAT|SCIR_CPU_ACTIVITY);
392 setup_timer(timer, uv_heartbeat, cpu);
393 timer->expires = jiffies + SCIR_CPU_HB_INTERVAL;
394 add_timer_on(timer, cpu);
395 uv_cpu_hub_info(cpu)->scir.enabled = 1;
396 }
397
398 /* check boot cpu */
399 if (!uv_cpu_hub_info(0)->scir.enabled)
400 uv_heartbeat_enable(0);
401}
402
403#ifdef CONFIG_HOTPLUG_CPU
404static void __cpuinit uv_heartbeat_disable(int cpu)
405{
406 if (uv_cpu_hub_info(cpu)->scir.enabled) {
407 uv_cpu_hub_info(cpu)->scir.enabled = 0;
408 del_timer(&uv_cpu_hub_info(cpu)->scir.timer);
409 }
410 uv_set_cpu_scir_bits(cpu, 0xff);
411}
412
413/*
414 * cpu hotplug notifier
415 */
416static __cpuinit int uv_scir_cpu_notify(struct notifier_block *self,
417 unsigned long action, void *hcpu)
418{
419 long cpu = (long)hcpu;
420
421 switch (action) {
422 case CPU_ONLINE:
423 uv_heartbeat_enable(cpu);
424 break;
425 case CPU_DOWN_PREPARE:
426 uv_heartbeat_disable(cpu);
427 break;
428 default:
429 break;
430 }
431 return NOTIFY_OK;
432}
433
434static __init void uv_scir_register_cpu_notifier(void)
435{
436 hotcpu_notifier(uv_scir_cpu_notify, 0);
437}
438
439#else /* !CONFIG_HOTPLUG_CPU */
440
441static __init void uv_scir_register_cpu_notifier(void)
442{
443}
444
445static __init int uv_init_heartbeat(void)
446{
447 int cpu;
448
449 if (is_uv_system())
450 for_each_online_cpu(cpu)
451 uv_heartbeat_enable(cpu);
452 return 0;
453}
454
455late_initcall(uv_init_heartbeat);
456
457#endif /* !CONFIG_HOTPLUG_CPU */
458
459/*
359 * Called on each cpu to initialize the per_cpu UV data area. 460 * Called on each cpu to initialize the per_cpu UV data area.
360 * ZZZ hotplug not supported yet 461 * ZZZ hotplug not supported yet
361 */ 462 */
@@ -428,7 +529,7 @@ void __init uv_system_init(void)
428 529
429 uv_bios_init(); 530 uv_bios_init();
430 uv_bios_get_sn_info(0, &uv_type, &sn_partition_id, 531 uv_bios_get_sn_info(0, &uv_type, &sn_partition_id,
431 &uv_coherency_id, &uv_region_size); 532 &sn_coherency_id, &sn_region_size);
432 uv_rtc_init(); 533 uv_rtc_init();
433 534
434 for_each_present_cpu(cpu) { 535 for_each_present_cpu(cpu) {
@@ -439,8 +540,7 @@ void __init uv_system_init(void)
439 uv_blade_info[blade].nr_possible_cpus++; 540 uv_blade_info[blade].nr_possible_cpus++;
440 541
441 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; 542 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
442 uv_cpu_hub_info(cpu)->lowmem_remap_top = 543 uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size;
443 lowmem_redir_base + lowmem_redir_size;
444 uv_cpu_hub_info(cpu)->m_val = m_val; 544 uv_cpu_hub_info(cpu)->m_val = m_val;
445 uv_cpu_hub_info(cpu)->n_val = m_val; 545 uv_cpu_hub_info(cpu)->n_val = m_val;
446 uv_cpu_hub_info(cpu)->numa_blade_id = blade; 546 uv_cpu_hub_info(cpu)->numa_blade_id = blade;
@@ -450,7 +550,8 @@ void __init uv_system_init(void)
450 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; 550 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
451 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; 551 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
452 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; 552 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
453 uv_cpu_hub_info(cpu)->coherency_domain_number = uv_coherency_id; 553 uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id;
554 uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu;
454 uv_node_to_blade[nid] = blade; 555 uv_node_to_blade[nid] = blade;
455 uv_cpu_to_blade[cpu] = blade; 556 uv_cpu_to_blade[cpu] = blade;
456 max_pnode = max(pnode, max_pnode); 557 max_pnode = max(pnode, max_pnode);
@@ -467,4 +568,6 @@ void __init uv_system_init(void)
467 map_mmioh_high(max_pnode); 568 map_mmioh_high(max_pnode);
468 569
469 uv_cpu_init(); 570 uv_cpu_init();
571 uv_scir_register_cpu_notifier();
572 proc_mkdir("sgi_uv", NULL);
470} 573}
diff --git a/arch/x86/kernel/head.c b/arch/x86/kernel/head.c
index 1dcb0f13897e..3e66bd364a9d 100644
--- a/arch/x86/kernel/head.c
+++ b/arch/x86/kernel/head.c
@@ -35,7 +35,6 @@ void __init reserve_ebda_region(void)
35 35
36 /* start of EBDA area */ 36 /* start of EBDA area */
37 ebda_addr = get_bios_ebda(); 37 ebda_addr = get_bios_ebda();
38 printk(KERN_INFO "BIOS EBDA/lowmem at: %08x/%08x\n", ebda_addr, lowmem);
39 38
40 /* Fixup: bios puts an EBDA in the top 64K segment */ 39 /* Fixup: bios puts an EBDA in the top 64K segment */
41 /* of conventional memory, but does not adjust lowmem. */ 40 /* of conventional memory, but does not adjust lowmem. */
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index fa1d25dd83e3..ac108d1fe182 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -12,9 +12,12 @@
12#include <asm/sections.h> 12#include <asm/sections.h>
13#include <asm/e820.h> 13#include <asm/e820.h>
14#include <asm/bios_ebda.h> 14#include <asm/bios_ebda.h>
15#include <asm/trampoline.h>
15 16
16void __init i386_start_kernel(void) 17void __init i386_start_kernel(void)
17{ 18{
19 reserve_trampoline_memory();
20
18 reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS"); 21 reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS");
19 22
20#ifdef CONFIG_BLK_DEV_INITRD 23#ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index d16084f90649..388e05a5fc17 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -24,6 +24,7 @@
24#include <asm/kdebug.h> 24#include <asm/kdebug.h>
25#include <asm/e820.h> 25#include <asm/e820.h>
26#include <asm/bios_ebda.h> 26#include <asm/bios_ebda.h>
27#include <asm/trampoline.h>
27 28
28/* boot cpu pda */ 29/* boot cpu pda */
29static struct x8664_pda _boot_cpu_pda __read_mostly; 30static struct x8664_pda _boot_cpu_pda __read_mostly;
@@ -120,6 +121,8 @@ void __init x86_64_start_reservations(char *real_mode_data)
120{ 121{
121 copy_bootdata(__va(real_mode_data)); 122 copy_bootdata(__va(real_mode_data));
122 123
124 reserve_trampoline_memory();
125
123 reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS"); 126 reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS");
124 127
125#ifdef CONFIG_BLK_DEV_INITRD 128#ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index e76d7e272974..b5310ff1259e 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -33,7 +33,9 @@
33 * HPET address is set in acpi/boot.c, when an ACPI entry exists 33 * HPET address is set in acpi/boot.c, when an ACPI entry exists
34 */ 34 */
35unsigned long hpet_address; 35unsigned long hpet_address;
36unsigned long hpet_num_timers; 36#ifdef CONFIG_PCI_MSI
37static unsigned long hpet_num_timers;
38#endif
37static void __iomem *hpet_virt_address; 39static void __iomem *hpet_virt_address;
38 40
39struct hpet_dev { 41struct hpet_dev {
diff --git a/arch/x86/kernel/init_task.c b/arch/x86/kernel/init_task.c
index a4f93b4120c1..d39918076bb4 100644
--- a/arch/x86/kernel/init_task.c
+++ b/arch/x86/kernel/init_task.c
@@ -14,7 +14,6 @@ static struct fs_struct init_fs = INIT_FS;
14static struct signal_struct init_signals = INIT_SIGNALS(init_signals); 14static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
15static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); 15static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
16struct mm_struct init_mm = INIT_MM(init_mm); 16struct mm_struct init_mm = INIT_MM(init_mm);
17EXPORT_UNUSED_SYMBOL(init_mm); /* will be removed in 2.6.26 */
18 17
19/* 18/*
20 * Initial thread structure. 19 * Initial thread structure.
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 1184210e6d0c..6dbf427175ff 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -2217,10 +2217,9 @@ static void set_ir_ioapic_affinity_irq(unsigned int irq,
2217asmlinkage void smp_irq_move_cleanup_interrupt(void) 2217asmlinkage void smp_irq_move_cleanup_interrupt(void)
2218{ 2218{
2219 unsigned vector, me; 2219 unsigned vector, me;
2220
2220 ack_APIC_irq(); 2221 ack_APIC_irq();
2221#ifdef CONFIG_X86_64
2222 exit_idle(); 2222 exit_idle();
2223#endif
2224 irq_enter(); 2223 irq_enter();
2225 2224
2226 me = smp_processor_id(); 2225 me = smp_processor_id();
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 7d37f847544d..8cbd069e5b41 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -13,12 +13,12 @@
13#include <linux/seq_file.h> 13#include <linux/seq_file.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/ftrace.h>
16#include <asm/uaccess.h> 17#include <asm/uaccess.h>
17#include <asm/io_apic.h> 18#include <asm/io_apic.h>
18#include <asm/idle.h> 19#include <asm/idle.h>
19#include <asm/smp.h> 20#include <asm/smp.h>
20 21
21#ifdef CONFIG_DEBUG_STACKOVERFLOW
22/* 22/*
23 * Probabilistic stack overflow check: 23 * Probabilistic stack overflow check:
24 * 24 *
@@ -28,26 +28,25 @@
28 */ 28 */
29static inline void stack_overflow_check(struct pt_regs *regs) 29static inline void stack_overflow_check(struct pt_regs *regs)
30{ 30{
31#ifdef CONFIG_DEBUG_STACKOVERFLOW
31 u64 curbase = (u64)task_stack_page(current); 32 u64 curbase = (u64)task_stack_page(current);
32 static unsigned long warned = -60*HZ; 33
33 34 WARN_ONCE(regs->sp >= curbase &&
34 if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE && 35 regs->sp <= curbase + THREAD_SIZE &&
35 regs->sp < curbase + sizeof(struct thread_info) + 128 && 36 regs->sp < curbase + sizeof(struct thread_info) +
36 time_after(jiffies, warned + 60*HZ)) { 37 sizeof(struct pt_regs) + 128,
37 printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n", 38
38 current->comm, curbase, regs->sp); 39 "do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
39 show_stack(NULL,NULL); 40 current->comm, curbase, regs->sp);
40 warned = jiffies;
41 }
42}
43#endif 41#endif
42}
44 43
45/* 44/*
46 * do_IRQ handles all normal device IRQ's (the special 45 * do_IRQ handles all normal device IRQ's (the special
47 * SMP cross-CPU interrupts have their own specific 46 * SMP cross-CPU interrupts have their own specific
48 * handlers). 47 * handlers).
49 */ 48 */
50asmlinkage unsigned int do_IRQ(struct pt_regs *regs) 49asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
51{ 50{
52 struct pt_regs *old_regs = set_irq_regs(regs); 51 struct pt_regs *old_regs = set_irq_regs(regs);
53 struct irq_desc *desc; 52 struct irq_desc *desc;
@@ -60,9 +59,7 @@ asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
60 irq_enter(); 59 irq_enter();
61 irq = __get_cpu_var(vector_irq)[vector]; 60 irq = __get_cpu_var(vector_irq)[vector];
62 61
63#ifdef CONFIG_DEBUG_STACKOVERFLOW
64 stack_overflow_check(regs); 62 stack_overflow_check(regs);
65#endif
66 63
67 desc = irq_to_desc(irq); 64 desc = irq_to_desc(irq);
68 if (likely(desc)) 65 if (likely(desc))
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 845aa9803e80..607db63044a5 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -129,7 +129,7 @@ void __init native_init_IRQ(void)
129 for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) { 129 for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
130 /* SYSCALL_VECTOR was reserved in trap_init. */ 130 /* SYSCALL_VECTOR was reserved in trap_init. */
131 if (i != SYSCALL_VECTOR) 131 if (i != SYSCALL_VECTOR)
132 set_intr_gate(i, interrupt[i]); 132 set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
133 } 133 }
134 134
135 135
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c
index ff0235391285..8670b3ce626e 100644
--- a/arch/x86/kernel/irqinit_64.c
+++ b/arch/x86/kernel/irqinit_64.c
@@ -24,41 +24,6 @@
24#include <asm/i8259.h> 24#include <asm/i8259.h>
25 25
26/* 26/*
27 * Common place to define all x86 IRQ vectors
28 *
29 * This builds up the IRQ handler stubs using some ugly macros in irq.h
30 *
31 * These macros create the low-level assembly IRQ routines that save
32 * register context and call do_IRQ(). do_IRQ() then does all the
33 * operations that are needed to keep the AT (or SMP IOAPIC)
34 * interrupt-controller happy.
35 */
36
37#define IRQ_NAME2(nr) nr##_interrupt(void)
38#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
39
40/*
41 * SMP has a few special interrupts for IPI messages
42 */
43
44#define BUILD_IRQ(nr) \
45 asmlinkage void IRQ_NAME(nr); \
46 asm("\n.text\n.p2align\n" \
47 "IRQ" #nr "_interrupt:\n\t" \
48 "push $~(" #nr ") ; " \
49 "jmp common_interrupt\n" \
50 ".previous");
51
52#define BI(x,y) \
53 BUILD_IRQ(x##y)
54
55#define BUILD_16_IRQS(x) \
56 BI(x,0) BI(x,1) BI(x,2) BI(x,3) \
57 BI(x,4) BI(x,5) BI(x,6) BI(x,7) \
58 BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
59 BI(x,c) BI(x,d) BI(x,e) BI(x,f)
60
61/*
62 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: 27 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
63 * (these are usually mapped to vectors 0x30-0x3f) 28 * (these are usually mapped to vectors 0x30-0x3f)
64 */ 29 */
@@ -73,37 +38,6 @@
73 * 38 *
74 * (these are usually mapped into the 0x30-0xff vector range) 39 * (these are usually mapped into the 0x30-0xff vector range)
75 */ 40 */
76 BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
77BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
78BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
79BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf)
80
81#undef BUILD_16_IRQS
82#undef BI
83
84
85#define IRQ(x,y) \
86 IRQ##x##y##_interrupt
87
88#define IRQLIST_16(x) \
89 IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
90 IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
91 IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
92 IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
93
94/* for the irq vectors */
95static void (*__initdata interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
96 IRQLIST_16(0x2), IRQLIST_16(0x3),
97 IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
98 IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
99 IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf)
100};
101
102#undef IRQ
103#undef IRQLIST_16
104
105
106
107 41
108/* 42/*
109 * IRQ2 is cascade interrupt to second interrupt controller 43 * IRQ2 is cascade interrupt to second interrupt controller
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 7a385746509a..37f420018a41 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -13,6 +13,7 @@
13#include <linux/numa.h> 13#include <linux/numa.h>
14#include <linux/ftrace.h> 14#include <linux/ftrace.h>
15#include <linux/suspend.h> 15#include <linux/suspend.h>
16#include <linux/gfp.h>
16 17
17#include <asm/pgtable.h> 18#include <asm/pgtable.h>
18#include <asm/pgalloc.h> 19#include <asm/pgalloc.h>
@@ -25,15 +26,6 @@
25#include <asm/system.h> 26#include <asm/system.h>
26#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
27 28
28#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
29static u32 kexec_pgd[1024] PAGE_ALIGNED;
30#ifdef CONFIG_X86_PAE
31static u32 kexec_pmd0[1024] PAGE_ALIGNED;
32static u32 kexec_pmd1[1024] PAGE_ALIGNED;
33#endif
34static u32 kexec_pte0[1024] PAGE_ALIGNED;
35static u32 kexec_pte1[1024] PAGE_ALIGNED;
36
37static void set_idt(void *newidt, __u16 limit) 29static void set_idt(void *newidt, __u16 limit)
38{ 30{
39 struct desc_ptr curidt; 31 struct desc_ptr curidt;
@@ -76,6 +68,76 @@ static void load_segments(void)
76#undef __STR 68#undef __STR
77} 69}
78 70
71static void machine_kexec_free_page_tables(struct kimage *image)
72{
73 free_page((unsigned long)image->arch.pgd);
74#ifdef CONFIG_X86_PAE
75 free_page((unsigned long)image->arch.pmd0);
76 free_page((unsigned long)image->arch.pmd1);
77#endif
78 free_page((unsigned long)image->arch.pte0);
79 free_page((unsigned long)image->arch.pte1);
80}
81
82static int machine_kexec_alloc_page_tables(struct kimage *image)
83{
84 image->arch.pgd = (pgd_t *)get_zeroed_page(GFP_KERNEL);
85#ifdef CONFIG_X86_PAE
86 image->arch.pmd0 = (pmd_t *)get_zeroed_page(GFP_KERNEL);
87 image->arch.pmd1 = (pmd_t *)get_zeroed_page(GFP_KERNEL);
88#endif
89 image->arch.pte0 = (pte_t *)get_zeroed_page(GFP_KERNEL);
90 image->arch.pte1 = (pte_t *)get_zeroed_page(GFP_KERNEL);
91 if (!image->arch.pgd ||
92#ifdef CONFIG_X86_PAE
93 !image->arch.pmd0 || !image->arch.pmd1 ||
94#endif
95 !image->arch.pte0 || !image->arch.pte1) {
96 machine_kexec_free_page_tables(image);
97 return -ENOMEM;
98 }
99 return 0;
100}
101
102static void machine_kexec_page_table_set_one(
103 pgd_t *pgd, pmd_t *pmd, pte_t *pte,
104 unsigned long vaddr, unsigned long paddr)
105{
106 pud_t *pud;
107
108 pgd += pgd_index(vaddr);
109#ifdef CONFIG_X86_PAE
110 if (!(pgd_val(*pgd) & _PAGE_PRESENT))
111 set_pgd(pgd, __pgd(__pa(pmd) | _PAGE_PRESENT));
112#endif
113 pud = pud_offset(pgd, vaddr);
114 pmd = pmd_offset(pud, vaddr);
115 if (!(pmd_val(*pmd) & _PAGE_PRESENT))
116 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE));
117 pte = pte_offset_kernel(pmd, vaddr);
118 set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
119}
120
121static void machine_kexec_prepare_page_tables(struct kimage *image)
122{
123 void *control_page;
124 pmd_t *pmd = 0;
125
126 control_page = page_address(image->control_code_page);
127#ifdef CONFIG_X86_PAE
128 pmd = image->arch.pmd0;
129#endif
130 machine_kexec_page_table_set_one(
131 image->arch.pgd, pmd, image->arch.pte0,
132 (unsigned long)control_page, __pa(control_page));
133#ifdef CONFIG_X86_PAE
134 pmd = image->arch.pmd1;
135#endif
136 machine_kexec_page_table_set_one(
137 image->arch.pgd, pmd, image->arch.pte1,
138 __pa(control_page), __pa(control_page));
139}
140
79/* 141/*
80 * A architecture hook called to validate the 142 * A architecture hook called to validate the
81 * proposed image and prepare the control pages 143 * proposed image and prepare the control pages
@@ -87,12 +149,20 @@ static void load_segments(void)
87 * reboot code buffer to allow us to avoid allocations 149 * reboot code buffer to allow us to avoid allocations
88 * later. 150 * later.
89 * 151 *
90 * Make control page executable. 152 * - Make control page executable.
153 * - Allocate page tables
154 * - Setup page tables
91 */ 155 */
92int machine_kexec_prepare(struct kimage *image) 156int machine_kexec_prepare(struct kimage *image)
93{ 157{
158 int error;
159
94 if (nx_enabled) 160 if (nx_enabled)
95 set_pages_x(image->control_code_page, 1); 161 set_pages_x(image->control_code_page, 1);
162 error = machine_kexec_alloc_page_tables(image);
163 if (error)
164 return error;
165 machine_kexec_prepare_page_tables(image);
96 return 0; 166 return 0;
97} 167}
98 168
@@ -104,6 +174,7 @@ void machine_kexec_cleanup(struct kimage *image)
104{ 174{
105 if (nx_enabled) 175 if (nx_enabled)
106 set_pages_nx(image->control_code_page, 1); 176 set_pages_nx(image->control_code_page, 1);
177 machine_kexec_free_page_tables(image);
107} 178}
108 179
109/* 180/*
@@ -150,18 +221,7 @@ void machine_kexec(struct kimage *image)
150 relocate_kernel_ptr = control_page; 221 relocate_kernel_ptr = control_page;
151 page_list[PA_CONTROL_PAGE] = __pa(control_page); 222 page_list[PA_CONTROL_PAGE] = __pa(control_page);
152 page_list[VA_CONTROL_PAGE] = (unsigned long)control_page; 223 page_list[VA_CONTROL_PAGE] = (unsigned long)control_page;
153 page_list[PA_PGD] = __pa(kexec_pgd); 224 page_list[PA_PGD] = __pa(image->arch.pgd);
154 page_list[VA_PGD] = (unsigned long)kexec_pgd;
155#ifdef CONFIG_X86_PAE
156 page_list[PA_PMD_0] = __pa(kexec_pmd0);
157 page_list[VA_PMD_0] = (unsigned long)kexec_pmd0;
158 page_list[PA_PMD_1] = __pa(kexec_pmd1);
159 page_list[VA_PMD_1] = (unsigned long)kexec_pmd1;
160#endif
161 page_list[PA_PTE_0] = __pa(kexec_pte0);
162 page_list[VA_PTE_0] = (unsigned long)kexec_pte0;
163 page_list[PA_PTE_1] = __pa(kexec_pte1);
164 page_list[VA_PTE_1] = (unsigned long)kexec_pte1;
165 225
166 if (image->type == KEXEC_TYPE_DEFAULT) 226 if (image->type == KEXEC_TYPE_DEFAULT)
167 page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page) 227 page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 5f8e5d75a254..c25fdb382292 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -10,7 +10,7 @@
10 * This driver allows to upgrade microcode on AMD 10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors. 11 * family 0x10 and 0x11 processors.
12 * 12 *
13 * Licensed unter the terms of the GNU General Public 13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details. 14 * License version 2. See file COPYING for details.
15*/ 15*/
16 16
@@ -32,9 +32,9 @@
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/pci_ids.h> 34#include <linux/pci_ids.h>
35#include <linux/uaccess.h>
35 36
36#include <asm/msr.h> 37#include <asm/msr.h>
37#include <asm/uaccess.h>
38#include <asm/processor.h> 38#include <asm/processor.h>
39#include <asm/microcode.h> 39#include <asm/microcode.h>
40 40
@@ -47,43 +47,38 @@ MODULE_LICENSE("GPL v2");
47#define UCODE_UCODE_TYPE 0x00000001 47#define UCODE_UCODE_TYPE 0x00000001
48 48
49struct equiv_cpu_entry { 49struct equiv_cpu_entry {
50 unsigned int installed_cpu; 50 u32 installed_cpu;
51 unsigned int fixed_errata_mask; 51 u32 fixed_errata_mask;
52 unsigned int fixed_errata_compare; 52 u32 fixed_errata_compare;
53 unsigned int equiv_cpu; 53 u16 equiv_cpu;
54}; 54 u16 res;
55} __attribute__((packed));
55 56
56struct microcode_header_amd { 57struct microcode_header_amd {
57 unsigned int data_code; 58 u32 data_code;
58 unsigned int patch_id; 59 u32 patch_id;
59 unsigned char mc_patch_data_id[2]; 60 u16 mc_patch_data_id;
60 unsigned char mc_patch_data_len; 61 u8 mc_patch_data_len;
61 unsigned char init_flag; 62 u8 init_flag;
62 unsigned int mc_patch_data_checksum; 63 u32 mc_patch_data_checksum;
63 unsigned int nb_dev_id; 64 u32 nb_dev_id;
64 unsigned int sb_dev_id; 65 u32 sb_dev_id;
65 unsigned char processor_rev_id[2]; 66 u16 processor_rev_id;
66 unsigned char nb_rev_id; 67 u8 nb_rev_id;
67 unsigned char sb_rev_id; 68 u8 sb_rev_id;
68 unsigned char bios_api_rev; 69 u8 bios_api_rev;
69 unsigned char reserved1[3]; 70 u8 reserved1[3];
70 unsigned int match_reg[8]; 71 u32 match_reg[8];
71}; 72} __attribute__((packed));
72 73
73struct microcode_amd { 74struct microcode_amd {
74 struct microcode_header_amd hdr; 75 struct microcode_header_amd hdr;
75 unsigned int mpb[0]; 76 unsigned int mpb[0];
76}; 77};
77 78
78#define UCODE_MAX_SIZE (2048) 79#define UCODE_MAX_SIZE 2048
79#define DEFAULT_UCODE_DATASIZE (896) 80#define UCODE_CONTAINER_SECTION_HDR 8
80#define MC_HEADER_SIZE (sizeof(struct microcode_header_amd)) 81#define UCODE_CONTAINER_HEADER_SIZE 12
81#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
82#define DWSIZE (sizeof(u32))
83/* For now we support a fixed ucode total size only */
84#define get_totalsize(mc) \
85 ((((struct microcode_amd *)mc)->hdr.mc_patch_data_len * 28) \
86 + MC_HEADER_SIZE)
87 82
88/* serialize access to the physical write */ 83/* serialize access to the physical write */
89static DEFINE_SPINLOCK(microcode_update_lock); 84static DEFINE_SPINLOCK(microcode_update_lock);
@@ -93,31 +88,24 @@ static struct equiv_cpu_entry *equiv_cpu_table;
93static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) 88static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
94{ 89{
95 struct cpuinfo_x86 *c = &cpu_data(cpu); 90 struct cpuinfo_x86 *c = &cpu_data(cpu);
91 u32 dummy;
96 92
97 memset(csig, 0, sizeof(*csig)); 93 memset(csig, 0, sizeof(*csig));
98
99 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) { 94 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
100 printk(KERN_ERR "microcode: CPU%d not a capable AMD processor\n", 95 printk(KERN_WARNING "microcode: CPU%d: AMD CPU family 0x%x not "
101 cpu); 96 "supported\n", cpu, c->x86);
102 return -1; 97 return -1;
103 } 98 }
104 99 rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
105 asm volatile("movl %1, %%ecx; rdmsr" 100 printk(KERN_INFO "microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev);
106 : "=a" (csig->rev)
107 : "i" (0x0000008B) : "ecx");
108
109 printk(KERN_INFO "microcode: collect_cpu_info_amd : patch_id=0x%x\n",
110 csig->rev);
111
112 return 0; 101 return 0;
113} 102}
114 103
115static int get_matching_microcode(int cpu, void *mc, int rev) 104static int get_matching_microcode(int cpu, void *mc, int rev)
116{ 105{
117 struct microcode_header_amd *mc_header = mc; 106 struct microcode_header_amd *mc_header = mc;
118 struct pci_dev *nb_pci_dev, *sb_pci_dev;
119 unsigned int current_cpu_id; 107 unsigned int current_cpu_id;
120 unsigned int equiv_cpu_id = 0x00; 108 u16 equiv_cpu_id = 0;
121 unsigned int i = 0; 109 unsigned int i = 0;
122 110
123 BUG_ON(equiv_cpu_table == NULL); 111 BUG_ON(equiv_cpu_table == NULL);
@@ -132,57 +120,25 @@ static int get_matching_microcode(int cpu, void *mc, int rev)
132 } 120 }
133 121
134 if (!equiv_cpu_id) { 122 if (!equiv_cpu_id) {
135 printk(KERN_ERR "microcode: CPU%d cpu_id " 123 printk(KERN_WARNING "microcode: CPU%d: cpu revision "
136 "not found in equivalent cpu table \n", cpu); 124 "not listed in equivalent cpu table\n", cpu);
137 return 0; 125 return 0;
138 } 126 }
139 127
140 if ((mc_header->processor_rev_id[0]) != (equiv_cpu_id & 0xff)) { 128 if (mc_header->processor_rev_id != equiv_cpu_id) {
141 printk(KERN_ERR 129 printk(KERN_ERR "microcode: CPU%d: patch mismatch "
142 "microcode: CPU%d patch does not match " 130 "(processor_rev_id: %x, equiv_cpu_id: %x)\n",
143 "(patch is %x, cpu extended is %x) \n", 131 cpu, mc_header->processor_rev_id, equiv_cpu_id);
144 cpu, mc_header->processor_rev_id[0],
145 (equiv_cpu_id & 0xff));
146 return 0; 132 return 0;
147 } 133 }
148 134
149 if ((mc_header->processor_rev_id[1]) != ((equiv_cpu_id >> 16) & 0xff)) { 135 /* ucode might be chipset specific -- currently we don't support this */
150 printk(KERN_ERR "microcode: CPU%d patch does not match " 136 if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
151 "(patch is %x, cpu base id is %x) \n", 137 printk(KERN_ERR "microcode: CPU%d: loading of chipset "
152 cpu, mc_header->processor_rev_id[1], 138 "specific code not yet supported\n", cpu);
153 ((equiv_cpu_id >> 16) & 0xff));
154
155 return 0; 139 return 0;
156 } 140 }
157 141
158 /* ucode may be northbridge specific */
159 if (mc_header->nb_dev_id) {
160 nb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
161 (mc_header->nb_dev_id & 0xff),
162 NULL);
163 if ((!nb_pci_dev) ||
164 (mc_header->nb_rev_id != nb_pci_dev->revision)) {
165 printk(KERN_ERR "microcode: CPU%d NB mismatch \n", cpu);
166 pci_dev_put(nb_pci_dev);
167 return 0;
168 }
169 pci_dev_put(nb_pci_dev);
170 }
171
172 /* ucode may be southbridge specific */
173 if (mc_header->sb_dev_id) {
174 sb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
175 (mc_header->sb_dev_id & 0xff),
176 NULL);
177 if ((!sb_pci_dev) ||
178 (mc_header->sb_rev_id != sb_pci_dev->revision)) {
179 printk(KERN_ERR "microcode: CPU%d SB mismatch \n", cpu);
180 pci_dev_put(sb_pci_dev);
181 return 0;
182 }
183 pci_dev_put(sb_pci_dev);
184 }
185
186 if (mc_header->patch_id <= rev) 142 if (mc_header->patch_id <= rev)
187 return 0; 143 return 0;
188 144
@@ -192,12 +148,10 @@ static int get_matching_microcode(int cpu, void *mc, int rev)
192static void apply_microcode_amd(int cpu) 148static void apply_microcode_amd(int cpu)
193{ 149{
194 unsigned long flags; 150 unsigned long flags;
195 unsigned int eax, edx; 151 u32 rev, dummy;
196 unsigned int rev;
197 int cpu_num = raw_smp_processor_id(); 152 int cpu_num = raw_smp_processor_id();
198 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num; 153 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
199 struct microcode_amd *mc_amd = uci->mc; 154 struct microcode_amd *mc_amd = uci->mc;
200 unsigned long addr;
201 155
202 /* We should bind the task to the CPU */ 156 /* We should bind the task to the CPU */
203 BUG_ON(cpu_num != cpu); 157 BUG_ON(cpu_num != cpu);
@@ -206,42 +160,34 @@ static void apply_microcode_amd(int cpu)
206 return; 160 return;
207 161
208 spin_lock_irqsave(&microcode_update_lock, flags); 162 spin_lock_irqsave(&microcode_update_lock, flags);
209 163 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
210 addr = (unsigned long)&mc_amd->hdr.data_code;
211 edx = (unsigned int)(((unsigned long)upper_32_bits(addr)));
212 eax = (unsigned int)(((unsigned long)lower_32_bits(addr)));
213
214 asm volatile("movl %0, %%ecx; wrmsr" :
215 : "i" (0xc0010020), "a" (eax), "d" (edx) : "ecx");
216
217 /* get patch id after patching */ 164 /* get patch id after patching */
218 asm volatile("movl %1, %%ecx; rdmsr" 165 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
219 : "=a" (rev)
220 : "i" (0x0000008B) : "ecx");
221
222 spin_unlock_irqrestore(&microcode_update_lock, flags); 166 spin_unlock_irqrestore(&microcode_update_lock, flags);
223 167
224 /* check current patch id and patch's id for match */ 168 /* check current patch id and patch's id for match */
225 if (rev != mc_amd->hdr.patch_id) { 169 if (rev != mc_amd->hdr.patch_id) {
226 printk(KERN_ERR "microcode: CPU%d update from revision " 170 printk(KERN_ERR "microcode: CPU%d: update failed "
227 "0x%x to 0x%x failed\n", cpu_num, 171 "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id);
228 mc_amd->hdr.patch_id, rev);
229 return; 172 return;
230 } 173 }
231 174
232 printk(KERN_INFO "microcode: CPU%d updated from revision " 175 printk(KERN_INFO "microcode: CPU%d: updated (new patch_level=0x%x)\n",
233 "0x%x to 0x%x \n", 176 cpu, rev);
234 cpu_num, uci->cpu_sig.rev, mc_amd->hdr.patch_id);
235 177
236 uci->cpu_sig.rev = rev; 178 uci->cpu_sig.rev = rev;
237} 179}
238 180
239static void * get_next_ucode(u8 *buf, unsigned int size, 181static int get_ucode_data(void *to, const u8 *from, size_t n)
240 int (*get_ucode_data)(void *, const void *, size_t), 182{
241 unsigned int *mc_size) 183 memcpy(to, from, n);
184 return 0;
185}
186
187static void *get_next_ucode(const u8 *buf, unsigned int size,
188 unsigned int *mc_size)
242{ 189{
243 unsigned int total_size; 190 unsigned int total_size;
244#define UCODE_CONTAINER_SECTION_HDR 8
245 u8 section_hdr[UCODE_CONTAINER_SECTION_HDR]; 191 u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
246 void *mc; 192 void *mc;
247 193
@@ -249,39 +195,37 @@ static void * get_next_ucode(u8 *buf, unsigned int size,
249 return NULL; 195 return NULL;
250 196
251 if (section_hdr[0] != UCODE_UCODE_TYPE) { 197 if (section_hdr[0] != UCODE_UCODE_TYPE) {
252 printk(KERN_ERR "microcode: error! " 198 printk(KERN_ERR "microcode: error: invalid type field in "
253 "Wrong microcode payload type field\n"); 199 "container file section header\n");
254 return NULL; 200 return NULL;
255 } 201 }
256 202
257 total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8)); 203 total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
258 204
259 printk(KERN_INFO "microcode: size %u, total_size %u\n", 205 printk(KERN_DEBUG "microcode: size %u, total_size %u\n",
260 size, total_size); 206 size, total_size);
261 207
262 if (total_size > size || total_size > UCODE_MAX_SIZE) { 208 if (total_size > size || total_size > UCODE_MAX_SIZE) {
263 printk(KERN_ERR "microcode: error! Bad data in microcode data file\n"); 209 printk(KERN_ERR "microcode: error: size mismatch\n");
264 return NULL; 210 return NULL;
265 } 211 }
266 212
267 mc = vmalloc(UCODE_MAX_SIZE); 213 mc = vmalloc(UCODE_MAX_SIZE);
268 if (mc) { 214 if (mc) {
269 memset(mc, 0, UCODE_MAX_SIZE); 215 memset(mc, 0, UCODE_MAX_SIZE);
270 if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR, total_size)) { 216 if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR,
217 total_size)) {
271 vfree(mc); 218 vfree(mc);
272 mc = NULL; 219 mc = NULL;
273 } else 220 } else
274 *mc_size = total_size + UCODE_CONTAINER_SECTION_HDR; 221 *mc_size = total_size + UCODE_CONTAINER_SECTION_HDR;
275 } 222 }
276#undef UCODE_CONTAINER_SECTION_HDR
277 return mc; 223 return mc;
278} 224}
279 225
280 226
281static int install_equiv_cpu_table(u8 *buf, 227static int install_equiv_cpu_table(const u8 *buf)
282 int (*get_ucode_data)(void *, const void *, size_t))
283{ 228{
284#define UCODE_CONTAINER_HEADER_SIZE 12
285 u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE]; 229 u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
286 unsigned int *buf_pos = (unsigned int *)container_hdr; 230 unsigned int *buf_pos = (unsigned int *)container_hdr;
287 unsigned long size; 231 unsigned long size;
@@ -292,14 +236,15 @@ static int install_equiv_cpu_table(u8 *buf,
292 size = buf_pos[2]; 236 size = buf_pos[2];
293 237
294 if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) { 238 if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
295 printk(KERN_ERR "microcode: error! " 239 printk(KERN_ERR "microcode: error: invalid type field in "
296 "Wrong microcode equivalnet cpu table\n"); 240 "container file section header\n");
297 return 0; 241 return 0;
298 } 242 }
299 243
300 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size); 244 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
301 if (!equiv_cpu_table) { 245 if (!equiv_cpu_table) {
302 printk(KERN_ERR "microcode: error, can't allocate memory for equiv CPU table\n"); 246 printk(KERN_ERR "microcode: failed to allocate "
247 "equivalent CPU table\n");
303 return 0; 248 return 0;
304 } 249 }
305 250
@@ -310,7 +255,6 @@ static int install_equiv_cpu_table(u8 *buf,
310 } 255 }
311 256
312 return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */ 257 return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
313#undef UCODE_CONTAINER_HEADER_SIZE
314} 258}
315 259
316static void free_equiv_cpu_table(void) 260static void free_equiv_cpu_table(void)
@@ -321,18 +265,20 @@ static void free_equiv_cpu_table(void)
321 } 265 }
322} 266}
323 267
324static int generic_load_microcode(int cpu, void *data, size_t size, 268static int generic_load_microcode(int cpu, const u8 *data, size_t size)
325 int (*get_ucode_data)(void *, const void *, size_t))
326{ 269{
327 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 270 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
328 u8 *ucode_ptr = data, *new_mc = NULL, *mc; 271 const u8 *ucode_ptr = data;
272 void *new_mc = NULL;
273 void *mc;
329 int new_rev = uci->cpu_sig.rev; 274 int new_rev = uci->cpu_sig.rev;
330 unsigned int leftover; 275 unsigned int leftover;
331 unsigned long offset; 276 unsigned long offset;
332 277
333 offset = install_equiv_cpu_table(ucode_ptr, get_ucode_data); 278 offset = install_equiv_cpu_table(ucode_ptr);
334 if (!offset) { 279 if (!offset) {
335 printk(KERN_ERR "microcode: installing equivalent cpu table failed\n"); 280 printk(KERN_ERR "microcode: failed to create "
281 "equivalent cpu table\n");
336 return -EINVAL; 282 return -EINVAL;
337 } 283 }
338 284
@@ -343,7 +289,7 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
343 unsigned int uninitialized_var(mc_size); 289 unsigned int uninitialized_var(mc_size);
344 struct microcode_header_amd *mc_header; 290 struct microcode_header_amd *mc_header;
345 291
346 mc = get_next_ucode(ucode_ptr, leftover, get_ucode_data, &mc_size); 292 mc = get_next_ucode(ucode_ptr, leftover, &mc_size);
347 if (!mc) 293 if (!mc)
348 break; 294 break;
349 295
@@ -353,7 +299,7 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
353 vfree(new_mc); 299 vfree(new_mc);
354 new_rev = mc_header->patch_id; 300 new_rev = mc_header->patch_id;
355 new_mc = mc; 301 new_mc = mc;
356 } else 302 } else
357 vfree(mc); 303 vfree(mc);
358 304
359 ucode_ptr += mc_size; 305 ucode_ptr += mc_size;
@@ -365,9 +311,9 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
365 if (uci->mc) 311 if (uci->mc)
366 vfree(uci->mc); 312 vfree(uci->mc);
367 uci->mc = new_mc; 313 uci->mc = new_mc;
368 pr_debug("microcode: CPU%d found a matching microcode update with" 314 pr_debug("microcode: CPU%d found a matching microcode "
369 " version 0x%x (current=0x%x)\n", 315 "update with version 0x%x (current=0x%x)\n",
370 cpu, new_rev, uci->cpu_sig.rev); 316 cpu, new_rev, uci->cpu_sig.rev);
371 } else 317 } else
372 vfree(new_mc); 318 vfree(new_mc);
373 } 319 }
@@ -377,12 +323,6 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
377 return (int)leftover; 323 return (int)leftover;
378} 324}
379 325
380static int get_ucode_fw(void *to, const void *from, size_t n)
381{
382 memcpy(to, from, n);
383 return 0;
384}
385
386static int request_microcode_fw(int cpu, struct device *device) 326static int request_microcode_fw(int cpu, struct device *device)
387{ 327{
388 const char *fw_name = "amd-ucode/microcode_amd.bin"; 328 const char *fw_name = "amd-ucode/microcode_amd.bin";
@@ -394,12 +334,11 @@ static int request_microcode_fw(int cpu, struct device *device)
394 334
395 ret = request_firmware(&firmware, fw_name, device); 335 ret = request_firmware(&firmware, fw_name, device);
396 if (ret) { 336 if (ret) {
397 printk(KERN_ERR "microcode: ucode data file %s load failed\n", fw_name); 337 printk(KERN_ERR "microcode: failed to load file %s\n", fw_name);
398 return ret; 338 return ret;
399 } 339 }
400 340
401 ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size, 341 ret = generic_load_microcode(cpu, firmware->data, firmware->size);
402 &get_ucode_fw);
403 342
404 release_firmware(firmware); 343 release_firmware(firmware);
405 344
@@ -408,8 +347,8 @@ static int request_microcode_fw(int cpu, struct device *device)
408 347
409static int request_microcode_user(int cpu, const void __user *buf, size_t size) 348static int request_microcode_user(int cpu, const void __user *buf, size_t size)
410{ 349{
411 printk(KERN_WARNING "microcode: AMD microcode update via /dev/cpu/microcode" 350 printk(KERN_INFO "microcode: AMD microcode update via "
412 "is not supported\n"); 351 "/dev/cpu/microcode not supported\n");
413 return -1; 352 return -1;
414} 353}
415 354
@@ -433,3 +372,4 @@ struct microcode_ops * __init init_amd_microcode(void)
433{ 372{
434 return &microcode_amd_ops; 373 return &microcode_amd_ops;
435} 374}
375
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 82fb2809ce32..c9b721ba968c 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -99,7 +99,7 @@ MODULE_LICENSE("GPL");
99 99
100#define MICROCODE_VERSION "2.00" 100#define MICROCODE_VERSION "2.00"
101 101
102struct microcode_ops *microcode_ops; 102static struct microcode_ops *microcode_ops;
103 103
104/* no concurrent ->write()s are allowed on /dev/cpu/microcode */ 104/* no concurrent ->write()s are allowed on /dev/cpu/microcode */
105static DEFINE_MUTEX(microcode_mutex); 105static DEFINE_MUTEX(microcode_mutex);
@@ -203,7 +203,7 @@ MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
203#endif 203#endif
204 204
205/* fake device for request_firmware */ 205/* fake device for request_firmware */
206struct platform_device *microcode_pdev; 206static struct platform_device *microcode_pdev;
207 207
208static ssize_t reload_store(struct sys_device *dev, 208static ssize_t reload_store(struct sys_device *dev,
209 struct sysdev_attribute *attr, 209 struct sysdev_attribute *attr,
@@ -272,13 +272,18 @@ static struct attribute_group mc_attr_group = {
272 .name = "microcode", 272 .name = "microcode",
273}; 273};
274 274
275static void microcode_fini_cpu(int cpu) 275static void __microcode_fini_cpu(int cpu)
276{ 276{
277 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 277 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
278 278
279 mutex_lock(&microcode_mutex);
280 microcode_ops->microcode_fini_cpu(cpu); 279 microcode_ops->microcode_fini_cpu(cpu);
281 uci->valid = 0; 280 uci->valid = 0;
281}
282
283static void microcode_fini_cpu(int cpu)
284{
285 mutex_lock(&microcode_mutex);
286 __microcode_fini_cpu(cpu);
282 mutex_unlock(&microcode_mutex); 287 mutex_unlock(&microcode_mutex);
283} 288}
284 289
@@ -306,12 +311,16 @@ static int microcode_resume_cpu(int cpu)
306 * to this cpu (a bit of paranoia): 311 * to this cpu (a bit of paranoia):
307 */ 312 */
308 if (microcode_ops->collect_cpu_info(cpu, &nsig)) { 313 if (microcode_ops->collect_cpu_info(cpu, &nsig)) {
309 microcode_fini_cpu(cpu); 314 __microcode_fini_cpu(cpu);
315 printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n",
316 cpu);
310 return -1; 317 return -1;
311 } 318 }
312 319
313 if (memcmp(&nsig, &uci->cpu_sig, sizeof(nsig))) { 320 if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) {
314 microcode_fini_cpu(cpu); 321 __microcode_fini_cpu(cpu);
322 printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n",
323 cpu);
315 /* Should we look for a new ucode here? */ 324 /* Should we look for a new ucode here? */
316 return 1; 325 return 1;
317 } 326 }
@@ -319,7 +328,7 @@ static int microcode_resume_cpu(int cpu)
319 return 0; 328 return 0;
320} 329}
321 330
322void microcode_update_cpu(int cpu) 331static void microcode_update_cpu(int cpu)
323{ 332{
324 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 333 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
325 int err = 0; 334 int err = 0;
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 622dc4a21784..b7f4c929e615 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock);
155static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) 155static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
156{ 156{
157 struct cpuinfo_x86 *c = &cpu_data(cpu_num); 157 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
158 unsigned long flags;
158 unsigned int val[2]; 159 unsigned int val[2];
159 160
160 memset(csig, 0, sizeof(*csig)); 161 memset(csig, 0, sizeof(*csig));
@@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
174 csig->pf = 1 << ((val[1] >> 18) & 7); 175 csig->pf = 1 << ((val[1] >> 18) & 7);
175 } 176 }
176 177
178 /* serialize access to the physical write to MSR 0x79 */
179 spin_lock_irqsave(&microcode_update_lock, flags);
180
177 wrmsr(MSR_IA32_UCODE_REV, 0, 0); 181 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
178 /* see notes above for revision 1.07. Apparent chip bug */ 182 /* see notes above for revision 1.07. Apparent chip bug */
179 sync_core(); 183 sync_core();
180 /* get the current revision from MSR 0x8B */ 184 /* get the current revision from MSR 0x8B */
181 rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); 185 rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
186 spin_unlock_irqrestore(&microcode_update_lock, flags);
187
182 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", 188 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
183 csig->sig, csig->pf, csig->rev); 189 csig->sig, csig->pf, csig->rev);
184 190
@@ -465,7 +471,7 @@ static void microcode_fini_cpu(int cpu)
465 uci->mc = NULL; 471 uci->mc = NULL;
466} 472}
467 473
468struct microcode_ops microcode_intel_ops = { 474static struct microcode_ops microcode_intel_ops = {
469 .request_microcode_user = request_microcode_user, 475 .request_microcode_user = request_microcode_user,
470 .request_microcode_fw = request_microcode_fw, 476 .request_microcode_fw = request_microcode_fw,
471 .collect_cpu_info = collect_cpu_info, 477 .collect_cpu_info = collect_cpu_info,
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 0f4c1fd5a1f4..45e3b69808ba 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -586,26 +586,23 @@ static void __init __get_smp_config(unsigned int early)
586{ 586{
587 struct intel_mp_floating *mpf = mpf_found; 587 struct intel_mp_floating *mpf = mpf_found;
588 588
589 if (x86_quirks->mach_get_smp_config) { 589 if (!mpf)
590 if (x86_quirks->mach_get_smp_config(early)) 590 return;
591 return; 591
592 }
593 if (acpi_lapic && early) 592 if (acpi_lapic && early)
594 return; 593 return;
594
595 /* 595 /*
596 * ACPI supports both logical (e.g. Hyper-Threading) and physical 596 * MPS doesn't support hyperthreading, aka only have
597 * processors, where MPS only supports physical. 597 * thread 0 apic id in MPS table
598 */ 598 */
599 if (acpi_lapic && acpi_ioapic) { 599 if (acpi_lapic && acpi_ioapic)
600 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
601 "information\n");
602 return; 600 return;
603 } else if (acpi_lapic)
604 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
605 "configuration information\n");
606 601
607 if (!mpf) 602 if (x86_quirks->mach_get_smp_config) {
608 return; 603 if (x86_quirks->mach_get_smp_config(early))
604 return;
605 }
609 606
610 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", 607 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
611 mpf->mpf_specification); 608 mpf->mpf_specification);
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 2c97f07f1c2c..8bd1bf9622a7 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -131,6 +131,11 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
131 atomic_dec(&nmi_active); 131 atomic_dec(&nmi_active);
132} 132}
133 133
134static void __acpi_nmi_disable(void *__unused)
135{
136 apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
137}
138
134int __init check_nmi_watchdog(void) 139int __init check_nmi_watchdog(void)
135{ 140{
136 unsigned int *prev_nmi_count; 141 unsigned int *prev_nmi_count;
@@ -179,8 +184,12 @@ int __init check_nmi_watchdog(void)
179 kfree(prev_nmi_count); 184 kfree(prev_nmi_count);
180 return 0; 185 return 0;
181error: 186error:
182 if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259) 187 if (nmi_watchdog == NMI_IO_APIC) {
183 disable_8259A_irq(0); 188 if (!timer_through_8259)
189 disable_8259A_irq(0);
190 on_each_cpu(__acpi_nmi_disable, NULL, 1);
191 }
192
184#ifdef CONFIG_X86_32 193#ifdef CONFIG_X86_32
185 timer_ack = 0; 194 timer_ack = 0;
186#endif 195#endif
@@ -199,12 +208,17 @@ static int __init setup_nmi_watchdog(char *str)
199 ++str; 208 ++str;
200 } 209 }
201 210
202 get_option(&str, &nmi); 211 if (!strncmp(str, "lapic", 5))
203 212 nmi_watchdog = NMI_LOCAL_APIC;
204 if (nmi >= NMI_INVALID) 213 else if (!strncmp(str, "ioapic", 6))
205 return 0; 214 nmi_watchdog = NMI_IO_APIC;
215 else {
216 get_option(&str, &nmi);
217 if (nmi >= NMI_INVALID)
218 return 0;
219 nmi_watchdog = nmi;
220 }
206 221
207 nmi_watchdog = nmi;
208 return 1; 222 return 1;
209} 223}
210__setup("nmi_watchdog=", setup_nmi_watchdog); 224__setup("nmi_watchdog=", setup_nmi_watchdog);
@@ -285,11 +299,6 @@ void acpi_nmi_enable(void)
285 on_each_cpu(__acpi_nmi_enable, NULL, 1); 299 on_each_cpu(__acpi_nmi_enable, NULL, 1);
286} 300}
287 301
288static void __acpi_nmi_disable(void *__unused)
289{
290 apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
291}
292
293/* 302/*
294 * Disable timer based NMIs on all CPUs: 303 * Disable timer based NMIs on all CPUs:
295 */ 304 */
@@ -340,6 +349,8 @@ void stop_apic_nmi_watchdog(void *unused)
340 return; 349 return;
341 if (nmi_watchdog == NMI_LOCAL_APIC) 350 if (nmi_watchdog == NMI_LOCAL_APIC)
342 lapic_watchdog_stop(); 351 lapic_watchdog_stop();
352 else
353 __acpi_nmi_disable(NULL);
343 __get_cpu_var(wd_enabled) = 0; 354 __get_cpu_var(wd_enabled) = 0;
344 atomic_dec(&nmi_active); 355 atomic_dec(&nmi_active);
345} 356}
@@ -465,6 +476,24 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
465 476
466#ifdef CONFIG_SYSCTL 477#ifdef CONFIG_SYSCTL
467 478
479static void enable_ioapic_nmi_watchdog_single(void *unused)
480{
481 __get_cpu_var(wd_enabled) = 1;
482 atomic_inc(&nmi_active);
483 __acpi_nmi_enable(NULL);
484}
485
486static void enable_ioapic_nmi_watchdog(void)
487{
488 on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
489 touch_nmi_watchdog();
490}
491
492static void disable_ioapic_nmi_watchdog(void)
493{
494 on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
495}
496
468static int __init setup_unknown_nmi_panic(char *str) 497static int __init setup_unknown_nmi_panic(char *str)
469{ 498{
470 unknown_nmi_panic = 1; 499 unknown_nmi_panic = 1;
@@ -507,6 +536,11 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
507 enable_lapic_nmi_watchdog(); 536 enable_lapic_nmi_watchdog();
508 else 537 else
509 disable_lapic_nmi_watchdog(); 538 disable_lapic_nmi_watchdog();
539 } else if (nmi_watchdog == NMI_IO_APIC) {
540 if (nmi_watchdog_enabled)
541 enable_ioapic_nmi_watchdog();
542 else
543 disable_ioapic_nmi_watchdog();
510 } else { 544 } else {
511 printk(KERN_WARNING 545 printk(KERN_WARNING
512 "NMI watchdog doesn't know what hardware to touch\n"); 546 "NMI watchdog doesn't know what hardware to touch\n");
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c
index 4caff39078e0..0deea37a53cf 100644
--- a/arch/x86/kernel/numaq_32.c
+++ b/arch/x86/kernel/numaq_32.c
@@ -31,7 +31,7 @@
31#include <asm/numaq.h> 31#include <asm/numaq.h>
32#include <asm/topology.h> 32#include <asm/topology.h>
33#include <asm/processor.h> 33#include <asm/processor.h>
34#include <asm/mpspec.h> 34#include <asm/genapic.h>
35#include <asm/e820.h> 35#include <asm/e820.h>
36#include <asm/setup.h> 36#include <asm/setup.h>
37 37
@@ -235,6 +235,13 @@ static int __init numaq_setup_ioapic_ids(void)
235 return 1; 235 return 1;
236} 236}
237 237
238static int __init numaq_update_genapic(void)
239{
240 genapic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
241
242 return 0;
243}
244
238static struct x86_quirks numaq_x86_quirks __initdata = { 245static struct x86_quirks numaq_x86_quirks __initdata = {
239 .arch_pre_time_init = numaq_pre_time_init, 246 .arch_pre_time_init = numaq_pre_time_init,
240 .arch_time_init = NULL, 247 .arch_time_init = NULL,
@@ -250,6 +257,7 @@ static struct x86_quirks numaq_x86_quirks __initdata = {
250 .mpc_oem_pci_bus = mpc_oem_pci_bus, 257 .mpc_oem_pci_bus = mpc_oem_pci_bus,
251 .smp_read_mpc_oem = smp_read_mpc_oem, 258 .smp_read_mpc_oem = smp_read_mpc_oem,
252 .setup_ioapic_ids = numaq_setup_ioapic_ids, 259 .setup_ioapic_ids = numaq_setup_ioapic_ids,
260 .update_genapic = numaq_update_genapic,
253}; 261};
254 262
255void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem, 263void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 192624820217..7a3dfceb90e4 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -6,6 +6,7 @@
6#include <asm/proto.h> 6#include <asm/proto.h>
7#include <asm/dma.h> 7#include <asm/dma.h>
8#include <asm/iommu.h> 8#include <asm/iommu.h>
9#include <asm/gart.h>
9#include <asm/calgary.h> 10#include <asm/calgary.h>
10#include <asm/amd_iommu.h> 11#include <asm/amd_iommu.h>
11 12
@@ -30,11 +31,6 @@ int no_iommu __read_mostly;
30/* Set this to 1 if there is a HW IOMMU in the system */ 31/* Set this to 1 if there is a HW IOMMU in the system */
31int iommu_detected __read_mostly = 0; 32int iommu_detected __read_mostly = 0;
32 33
33/* This tells the BIO block layer to assume merging. Default to off
34 because we cannot guarantee merging later. */
35int iommu_bio_merge __read_mostly = 0;
36EXPORT_SYMBOL(iommu_bio_merge);
37
38dma_addr_t bad_dma_address __read_mostly = 0; 34dma_addr_t bad_dma_address __read_mostly = 0;
39EXPORT_SYMBOL(bad_dma_address); 35EXPORT_SYMBOL(bad_dma_address);
40 36
@@ -188,7 +184,6 @@ static __init int iommu_setup(char *p)
188 } 184 }
189 185
190 if (!strncmp(p, "biomerge", 8)) { 186 if (!strncmp(p, "biomerge", 8)) {
191 iommu_bio_merge = 4096;
192 iommu_merge = 1; 187 iommu_merge = 1;
193 force_iommu = 1; 188 force_iommu = 1;
194 } 189 }
@@ -300,8 +295,8 @@ fs_initcall(pci_iommu_init);
300static __devinit void via_no_dac(struct pci_dev *dev) 295static __devinit void via_no_dac(struct pci_dev *dev)
301{ 296{
302 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) { 297 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
303 printk(KERN_INFO "PCI: VIA PCI bridge detected." 298 printk(KERN_INFO
304 "Disabling DAC.\n"); 299 "PCI: VIA PCI bridge detected. Disabling DAC.\n");
305 forbid_dac = 1; 300 forbid_dac = 1;
306 } 301 }
307} 302}
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index ba7ad83e20a8..a35eaa379ff6 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -745,10 +745,8 @@ void __init gart_iommu_init(void)
745 unsigned long scratch; 745 unsigned long scratch;
746 long i; 746 long i;
747 747
748 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) { 748 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0)
749 printk(KERN_INFO "PCI-GART: No AMD GART found.\n");
750 return; 749 return;
751 }
752 750
753#ifndef CONFIG_AGP_AMD64 751#ifndef CONFIG_AGP_AMD64
754 no_agp = 1; 752 no_agp = 1;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index c622772744d8..e68bb9e30864 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -1,13 +1,16 @@
1#include <linux/errno.h> 1#include <linux/errno.h>
2#include <linux/kernel.h> 2#include <linux/kernel.h>
3#include <linux/mm.h> 3#include <linux/mm.h>
4#include <asm/idle.h>
4#include <linux/smp.h> 5#include <linux/smp.h>
5#include <linux/slab.h> 6#include <linux/slab.h>
6#include <linux/sched.h> 7#include <linux/sched.h>
7#include <linux/module.h> 8#include <linux/module.h>
8#include <linux/pm.h> 9#include <linux/pm.h>
9#include <linux/clockchips.h> 10#include <linux/clockchips.h>
11#include <linux/ftrace.h>
10#include <asm/system.h> 12#include <asm/system.h>
13#include <asm/apic.h>
11 14
12unsigned long idle_halt; 15unsigned long idle_halt;
13EXPORT_SYMBOL(idle_halt); 16EXPORT_SYMBOL(idle_halt);
@@ -100,6 +103,9 @@ static inline int hlt_use_halt(void)
100void default_idle(void) 103void default_idle(void)
101{ 104{
102 if (hlt_use_halt()) { 105 if (hlt_use_halt()) {
106 struct power_trace it;
107
108 trace_power_start(&it, POWER_CSTATE, 1);
103 current_thread_info()->status &= ~TS_POLLING; 109 current_thread_info()->status &= ~TS_POLLING;
104 /* 110 /*
105 * TS_POLLING-cleared state must be visible before we 111 * TS_POLLING-cleared state must be visible before we
@@ -112,6 +118,7 @@ void default_idle(void)
112 else 118 else
113 local_irq_enable(); 119 local_irq_enable();
114 current_thread_info()->status |= TS_POLLING; 120 current_thread_info()->status |= TS_POLLING;
121 trace_power_end(&it);
115 } else { 122 } else {
116 local_irq_enable(); 123 local_irq_enable();
117 /* loop is done by the caller */ 124 /* loop is done by the caller */
@@ -122,6 +129,21 @@ void default_idle(void)
122EXPORT_SYMBOL(default_idle); 129EXPORT_SYMBOL(default_idle);
123#endif 130#endif
124 131
132void stop_this_cpu(void *dummy)
133{
134 local_irq_disable();
135 /*
136 * Remove this CPU:
137 */
138 cpu_clear(smp_processor_id(), cpu_online_map);
139 disable_local_APIC();
140
141 for (;;) {
142 if (hlt_works(smp_processor_id()))
143 halt();
144 }
145}
146
125static void do_nothing(void *unused) 147static void do_nothing(void *unused)
126{ 148{
127} 149}
@@ -154,24 +176,31 @@ EXPORT_SYMBOL_GPL(cpu_idle_wait);
154 */ 176 */
155void mwait_idle_with_hints(unsigned long ax, unsigned long cx) 177void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
156{ 178{
179 struct power_trace it;
180
181 trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
157 if (!need_resched()) { 182 if (!need_resched()) {
158 __monitor((void *)&current_thread_info()->flags, 0, 0); 183 __monitor((void *)&current_thread_info()->flags, 0, 0);
159 smp_mb(); 184 smp_mb();
160 if (!need_resched()) 185 if (!need_resched())
161 __mwait(ax, cx); 186 __mwait(ax, cx);
162 } 187 }
188 trace_power_end(&it);
163} 189}
164 190
165/* Default MONITOR/MWAIT with no hints, used for default C1 state */ 191/* Default MONITOR/MWAIT with no hints, used for default C1 state */
166static void mwait_idle(void) 192static void mwait_idle(void)
167{ 193{
194 struct power_trace it;
168 if (!need_resched()) { 195 if (!need_resched()) {
196 trace_power_start(&it, POWER_CSTATE, 1);
169 __monitor((void *)&current_thread_info()->flags, 0, 0); 197 __monitor((void *)&current_thread_info()->flags, 0, 0);
170 smp_mb(); 198 smp_mb();
171 if (!need_resched()) 199 if (!need_resched())
172 __sti_mwait(0, 0); 200 __sti_mwait(0, 0);
173 else 201 else
174 local_irq_enable(); 202 local_irq_enable();
203 trace_power_end(&it);
175 } else 204 } else
176 local_irq_enable(); 205 local_irq_enable();
177} 206}
@@ -183,9 +212,13 @@ static void mwait_idle(void)
183 */ 212 */
184static void poll_idle(void) 213static void poll_idle(void)
185{ 214{
215 struct power_trace it;
216
217 trace_power_start(&it, POWER_CSTATE, 0);
186 local_irq_enable(); 218 local_irq_enable();
187 while (!need_resched()) 219 while (!need_resched())
188 cpu_relax(); 220 cpu_relax();
221 trace_power_end(&it);
189} 222}
190 223
191/* 224/*
@@ -270,7 +303,7 @@ static void c1e_idle(void)
270 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); 303 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
271 if (lo & K8_INTP_C1E_ACTIVE_MASK) { 304 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
272 c1e_detected = 1; 305 c1e_detected = 1;
273 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) 306 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
274 mark_tsc_unstable("TSC halt in AMD C1E"); 307 mark_tsc_unstable("TSC halt in AMD C1E");
275 printk(KERN_INFO "System has AMD C1E enabled\n"); 308 printk(KERN_INFO "System has AMD C1E enabled\n");
276 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E); 309 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 0a1302fe6d45..3ba155d24884 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -38,6 +38,7 @@
38#include <linux/percpu.h> 38#include <linux/percpu.h>
39#include <linux/prctl.h> 39#include <linux/prctl.h>
40#include <linux/dmi.h> 40#include <linux/dmi.h>
41#include <linux/ftrace.h>
41 42
42#include <asm/uaccess.h> 43#include <asm/uaccess.h>
43#include <asm/pgtable.h> 44#include <asm/pgtable.h>
@@ -59,6 +60,7 @@
59#include <asm/idle.h> 60#include <asm/idle.h>
60#include <asm/syscalls.h> 61#include <asm/syscalls.h>
61#include <asm/smp.h> 62#include <asm/smp.h>
63#include <asm/ds.h>
62 64
63asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 65asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
64 66
@@ -250,14 +252,8 @@ void exit_thread(void)
250 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET; 252 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
251 put_cpu(); 253 put_cpu();
252 } 254 }
253#ifdef CONFIG_X86_DS 255
254 /* Free any DS contexts that have not been properly released. */ 256 ds_exit_thread(current);
255 if (unlikely(current->thread.ds_ctx)) {
256 /* we clear debugctl to make sure DS is not used. */
257 update_debugctlmsr(0);
258 ds_free(current->thread.ds_ctx);
259 }
260#endif /* CONFIG_X86_DS */
261} 257}
262 258
263void flush_thread(void) 259void flush_thread(void)
@@ -339,6 +335,12 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
339 kfree(p->thread.io_bitmap_ptr); 335 kfree(p->thread.io_bitmap_ptr);
340 p->thread.io_bitmap_max = 0; 336 p->thread.io_bitmap_max = 0;
341 } 337 }
338
339 ds_copy_thread(p, current);
340
341 clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
342 p->thread.debugctlmsr = 0;
343
342 return err; 344 return err;
343} 345}
344 346
@@ -419,48 +421,19 @@ int set_tsc_mode(unsigned int val)
419 return 0; 421 return 0;
420} 422}
421 423
422#ifdef CONFIG_X86_DS
423static int update_debugctl(struct thread_struct *prev,
424 struct thread_struct *next, unsigned long debugctl)
425{
426 unsigned long ds_prev = 0;
427 unsigned long ds_next = 0;
428
429 if (prev->ds_ctx)
430 ds_prev = (unsigned long)prev->ds_ctx->ds;
431 if (next->ds_ctx)
432 ds_next = (unsigned long)next->ds_ctx->ds;
433
434 if (ds_next != ds_prev) {
435 /* we clear debugctl to make sure DS
436 * is not in use when we change it */
437 debugctl = 0;
438 update_debugctlmsr(0);
439 wrmsr(MSR_IA32_DS_AREA, ds_next, 0);
440 }
441 return debugctl;
442}
443#else
444static int update_debugctl(struct thread_struct *prev,
445 struct thread_struct *next, unsigned long debugctl)
446{
447 return debugctl;
448}
449#endif /* CONFIG_X86_DS */
450
451static noinline void 424static noinline void
452__switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p, 425__switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
453 struct tss_struct *tss) 426 struct tss_struct *tss)
454{ 427{
455 struct thread_struct *prev, *next; 428 struct thread_struct *prev, *next;
456 unsigned long debugctl;
457 429
458 prev = &prev_p->thread; 430 prev = &prev_p->thread;
459 next = &next_p->thread; 431 next = &next_p->thread;
460 432
461 debugctl = update_debugctl(prev, next, prev->debugctlmsr); 433 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
462 434 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
463 if (next->debugctlmsr != debugctl) 435 ds_switch_to(prev_p, next_p);
436 else if (next->debugctlmsr != prev->debugctlmsr)
464 update_debugctlmsr(next->debugctlmsr); 437 update_debugctlmsr(next->debugctlmsr);
465 438
466 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) { 439 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
@@ -482,15 +455,6 @@ __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
482 hard_enable_TSC(); 455 hard_enable_TSC();
483 } 456 }
484 457
485#ifdef CONFIG_X86_PTRACE_BTS
486 if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
487 ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
488
489 if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
490 ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
491#endif /* CONFIG_X86_PTRACE_BTS */
492
493
494 if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) { 458 if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
495 /* 459 /*
496 * Disable the bitmap via an invalid offset. We still cache 460 * Disable the bitmap via an invalid offset. We still cache
@@ -548,7 +512,8 @@ __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
548 * the task-switch, and shows up in ret_from_fork in entry.S, 512 * the task-switch, and shows up in ret_from_fork in entry.S,
549 * for example. 513 * for example.
550 */ 514 */
551struct task_struct * __switch_to(struct task_struct *prev_p, struct task_struct *next_p) 515__notrace_funcgraph struct task_struct *
516__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
552{ 517{
553 struct thread_struct *prev = &prev_p->thread, 518 struct thread_struct *prev = &prev_p->thread,
554 *next = &next_p->thread; 519 *next = &next_p->thread;
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index c958120fb1b6..416fb9282f4f 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -39,6 +39,7 @@
39#include <linux/prctl.h> 39#include <linux/prctl.h>
40#include <linux/uaccess.h> 40#include <linux/uaccess.h>
41#include <linux/io.h> 41#include <linux/io.h>
42#include <linux/ftrace.h>
42 43
43#include <asm/pgtable.h> 44#include <asm/pgtable.h>
44#include <asm/system.h> 45#include <asm/system.h>
@@ -52,6 +53,7 @@
52#include <asm/ia32.h> 53#include <asm/ia32.h>
53#include <asm/idle.h> 54#include <asm/idle.h>
54#include <asm/syscalls.h> 55#include <asm/syscalls.h>
56#include <asm/ds.h>
55 57
56asmlinkage extern void ret_from_fork(void); 58asmlinkage extern void ret_from_fork(void);
57 59
@@ -235,14 +237,8 @@ void exit_thread(void)
235 t->io_bitmap_max = 0; 237 t->io_bitmap_max = 0;
236 put_cpu(); 238 put_cpu();
237 } 239 }
238#ifdef CONFIG_X86_DS 240
239 /* Free any DS contexts that have not been properly released. */ 241 ds_exit_thread(current);
240 if (unlikely(t->ds_ctx)) {
241 /* we clear debugctl to make sure DS is not used. */
242 update_debugctlmsr(0);
243 ds_free(t->ds_ctx);
244 }
245#endif /* CONFIG_X86_DS */
246} 242}
247 243
248void flush_thread(void) 244void flush_thread(void)
@@ -372,6 +368,12 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
372 if (err) 368 if (err)
373 goto out; 369 goto out;
374 } 370 }
371
372 ds_copy_thread(p, me);
373
374 clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
375 p->thread.debugctlmsr = 0;
376
375 err = 0; 377 err = 0;
376out: 378out:
377 if (err && p->thread.io_bitmap_ptr) { 379 if (err && p->thread.io_bitmap_ptr) {
@@ -470,35 +472,14 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
470 struct tss_struct *tss) 472 struct tss_struct *tss)
471{ 473{
472 struct thread_struct *prev, *next; 474 struct thread_struct *prev, *next;
473 unsigned long debugctl;
474 475
475 prev = &prev_p->thread, 476 prev = &prev_p->thread,
476 next = &next_p->thread; 477 next = &next_p->thread;
477 478
478 debugctl = prev->debugctlmsr; 479 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
479 480 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
480#ifdef CONFIG_X86_DS 481 ds_switch_to(prev_p, next_p);
481 { 482 else if (next->debugctlmsr != prev->debugctlmsr)
482 unsigned long ds_prev = 0, ds_next = 0;
483
484 if (prev->ds_ctx)
485 ds_prev = (unsigned long)prev->ds_ctx->ds;
486 if (next->ds_ctx)
487 ds_next = (unsigned long)next->ds_ctx->ds;
488
489 if (ds_next != ds_prev) {
490 /*
491 * We clear debugctl to make sure DS
492 * is not in use when we change it:
493 */
494 debugctl = 0;
495 update_debugctlmsr(0);
496 wrmsrl(MSR_IA32_DS_AREA, ds_next);
497 }
498 }
499#endif /* CONFIG_X86_DS */
500
501 if (next->debugctlmsr != debugctl)
502 update_debugctlmsr(next->debugctlmsr); 483 update_debugctlmsr(next->debugctlmsr);
503 484
504 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) { 485 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
@@ -533,14 +514,6 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
533 */ 514 */
534 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max); 515 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
535 } 516 }
536
537#ifdef CONFIG_X86_PTRACE_BTS
538 if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
539 ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
540
541 if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
542 ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
543#endif /* CONFIG_X86_PTRACE_BTS */
544} 517}
545 518
546/* 519/*
@@ -551,8 +524,9 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
551 * - could test fs/gs bitsliced 524 * - could test fs/gs bitsliced
552 * 525 *
553 * Kprobes not supported here. Set the probe on schedule instead. 526 * Kprobes not supported here. Set the probe on schedule instead.
527 * Function graph tracer not supported too.
554 */ 528 */
555struct task_struct * 529__notrace_funcgraph struct task_struct *
556__switch_to(struct task_struct *prev_p, struct task_struct *next_p) 530__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
557{ 531{
558 struct thread_struct *prev = &prev_p->thread; 532 struct thread_struct *prev = &prev_p->thread;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 0a6d8c12e10d..0a5df5f82fb9 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -581,158 +581,91 @@ static int ioperm_get(struct task_struct *target,
581} 581}
582 582
583#ifdef CONFIG_X86_PTRACE_BTS 583#ifdef CONFIG_X86_PTRACE_BTS
584/*
585 * The configuration for a particular BTS hardware implementation.
586 */
587struct bts_configuration {
588 /* the size of a BTS record in bytes; at most BTS_MAX_RECORD_SIZE */
589 unsigned char sizeof_bts;
590 /* the size of a field in the BTS record in bytes */
591 unsigned char sizeof_field;
592 /* a bitmask to enable/disable BTS in DEBUGCTL MSR */
593 unsigned long debugctl_mask;
594};
595static struct bts_configuration bts_cfg;
596
597#define BTS_MAX_RECORD_SIZE (8 * 3)
598
599
600/*
601 * Branch Trace Store (BTS) uses the following format. Different
602 * architectures vary in the size of those fields.
603 * - source linear address
604 * - destination linear address
605 * - flags
606 *
607 * Later architectures use 64bit pointers throughout, whereas earlier
608 * architectures use 32bit pointers in 32bit mode.
609 *
610 * We compute the base address for the first 8 fields based on:
611 * - the field size stored in the DS configuration
612 * - the relative field position
613 *
614 * In order to store additional information in the BTS buffer, we use
615 * a special source address to indicate that the record requires
616 * special interpretation.
617 *
618 * Netburst indicated via a bit in the flags field whether the branch
619 * was predicted; this is ignored.
620 */
621
622enum bts_field {
623 bts_from = 0,
624 bts_to,
625 bts_flags,
626
627 bts_escape = (unsigned long)-1,
628 bts_qual = bts_to,
629 bts_jiffies = bts_flags
630};
631
632static inline unsigned long bts_get(const char *base, enum bts_field field)
633{
634 base += (bts_cfg.sizeof_field * field);
635 return *(unsigned long *)base;
636}
637
638static inline void bts_set(char *base, enum bts_field field, unsigned long val)
639{
640 base += (bts_cfg.sizeof_field * field);;
641 (*(unsigned long *)base) = val;
642}
643
644/*
645 * Translate a BTS record from the raw format into the bts_struct format
646 *
647 * out (out): bts_struct interpretation
648 * raw: raw BTS record
649 */
650static void ptrace_bts_translate_record(struct bts_struct *out, const void *raw)
651{
652 memset(out, 0, sizeof(*out));
653 if (bts_get(raw, bts_from) == bts_escape) {
654 out->qualifier = bts_get(raw, bts_qual);
655 out->variant.jiffies = bts_get(raw, bts_jiffies);
656 } else {
657 out->qualifier = BTS_BRANCH;
658 out->variant.lbr.from_ip = bts_get(raw, bts_from);
659 out->variant.lbr.to_ip = bts_get(raw, bts_to);
660 }
661}
662
663static int ptrace_bts_read_record(struct task_struct *child, size_t index, 584static int ptrace_bts_read_record(struct task_struct *child, size_t index,
664 struct bts_struct __user *out) 585 struct bts_struct __user *out)
665{ 586{
666 struct bts_struct ret; 587 const struct bts_trace *trace;
667 const void *bts_record; 588 struct bts_struct bts;
668 size_t bts_index, bts_end; 589 const unsigned char *at;
669 int error; 590 int error;
670 591
671 error = ds_get_bts_end(child, &bts_end); 592 trace = ds_read_bts(child->bts);
672 if (error < 0) 593 if (!trace)
673 return error; 594 return -EPERM;
674
675 if (bts_end <= index)
676 return -EINVAL;
677 595
678 error = ds_get_bts_index(child, &bts_index); 596 at = trace->ds.top - ((index + 1) * trace->ds.size);
679 if (error < 0) 597 if ((void *)at < trace->ds.begin)
680 return error; 598 at += (trace->ds.n * trace->ds.size);
681 599
682 /* translate the ptrace bts index into the ds bts index */ 600 if (!trace->read)
683 bts_index += bts_end - (index + 1); 601 return -EOPNOTSUPP;
684 if (bts_end <= bts_index)
685 bts_index -= bts_end;
686 602
687 error = ds_access_bts(child, bts_index, &bts_record); 603 error = trace->read(child->bts, at, &bts);
688 if (error < 0) 604 if (error < 0)
689 return error; 605 return error;
690 606
691 ptrace_bts_translate_record(&ret, bts_record); 607 if (copy_to_user(out, &bts, sizeof(bts)))
692
693 if (copy_to_user(out, &ret, sizeof(ret)))
694 return -EFAULT; 608 return -EFAULT;
695 609
696 return sizeof(ret); 610 return sizeof(bts);
697} 611}
698 612
699static int ptrace_bts_drain(struct task_struct *child, 613static int ptrace_bts_drain(struct task_struct *child,
700 long size, 614 long size,
701 struct bts_struct __user *out) 615 struct bts_struct __user *out)
702{ 616{
703 struct bts_struct ret; 617 const struct bts_trace *trace;
704 const unsigned char *raw; 618 const unsigned char *at;
705 size_t end, i; 619 int error, drained = 0;
706 int error;
707 620
708 error = ds_get_bts_index(child, &end); 621 trace = ds_read_bts(child->bts);
709 if (error < 0) 622 if (!trace)
710 return error; 623 return -EPERM;
711 624
712 if (size < (end * sizeof(struct bts_struct))) 625 if (!trace->read)
626 return -EOPNOTSUPP;
627
628 if (size < (trace->ds.top - trace->ds.begin))
713 return -EIO; 629 return -EIO;
714 630
715 error = ds_access_bts(child, 0, (const void **)&raw); 631 for (at = trace->ds.begin; (void *)at < trace->ds.top;
716 if (error < 0) 632 out++, drained++, at += trace->ds.size) {
717 return error; 633 struct bts_struct bts;
634 int error;
718 635
719 for (i = 0; i < end; i++, out++, raw += bts_cfg.sizeof_bts) { 636 error = trace->read(child->bts, at, &bts);
720 ptrace_bts_translate_record(&ret, raw); 637 if (error < 0)
638 return error;
721 639
722 if (copy_to_user(out, &ret, sizeof(ret))) 640 if (copy_to_user(out, &bts, sizeof(bts)))
723 return -EFAULT; 641 return -EFAULT;
724 } 642 }
725 643
726 error = ds_clear_bts(child); 644 memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
645
646 error = ds_reset_bts(child->bts);
727 if (error < 0) 647 if (error < 0)
728 return error; 648 return error;
729 649
730 return end; 650 return drained;
731} 651}
732 652
733static void ptrace_bts_ovfl(struct task_struct *child) 653static int ptrace_bts_allocate_buffer(struct task_struct *child, size_t size)
734{ 654{
735 send_sig(child->thread.bts_ovfl_signal, child, 0); 655 child->bts_buffer = alloc_locked_buffer(size);
656 if (!child->bts_buffer)
657 return -ENOMEM;
658
659 child->bts_size = size;
660
661 return 0;
662}
663
664static void ptrace_bts_free_buffer(struct task_struct *child)
665{
666 free_locked_buffer(child->bts_buffer, child->bts_size);
667 child->bts_buffer = NULL;
668 child->bts_size = 0;
736} 669}
737 670
738static int ptrace_bts_config(struct task_struct *child, 671static int ptrace_bts_config(struct task_struct *child,
@@ -740,114 +673,86 @@ static int ptrace_bts_config(struct task_struct *child,
740 const struct ptrace_bts_config __user *ucfg) 673 const struct ptrace_bts_config __user *ucfg)
741{ 674{
742 struct ptrace_bts_config cfg; 675 struct ptrace_bts_config cfg;
743 int error = 0; 676 unsigned int flags = 0;
744
745 error = -EOPNOTSUPP;
746 if (!bts_cfg.sizeof_bts)
747 goto errout;
748 677
749 error = -EIO;
750 if (cfg_size < sizeof(cfg)) 678 if (cfg_size < sizeof(cfg))
751 goto errout; 679 return -EIO;
752 680
753 error = -EFAULT;
754 if (copy_from_user(&cfg, ucfg, sizeof(cfg))) 681 if (copy_from_user(&cfg, ucfg, sizeof(cfg)))
755 goto errout; 682 return -EFAULT;
756 683
757 error = -EINVAL; 684 if (child->bts) {
758 if ((cfg.flags & PTRACE_BTS_O_SIGNAL) && 685 ds_release_bts(child->bts);
759 !(cfg.flags & PTRACE_BTS_O_ALLOC)) 686 child->bts = NULL;
760 goto errout; 687 }
761 688
762 if (cfg.flags & PTRACE_BTS_O_ALLOC) { 689 if (cfg.flags & PTRACE_BTS_O_SIGNAL) {
763 ds_ovfl_callback_t ovfl = NULL; 690 if (!cfg.signal)
764 unsigned int sig = 0; 691 return -EINVAL;
765 692
766 /* we ignore the error in case we were not tracing child */ 693 return -EOPNOTSUPP;
767 (void)ds_release_bts(child);
768 694
769 if (cfg.flags & PTRACE_BTS_O_SIGNAL) { 695 child->thread.bts_ovfl_signal = cfg.signal;
770 if (!cfg.signal) 696 }
771 goto errout;
772 697
773 sig = cfg.signal; 698 if ((cfg.flags & PTRACE_BTS_O_ALLOC) &&
774 ovfl = ptrace_bts_ovfl; 699 (cfg.size != child->bts_size)) {
775 } 700 int error;
776 701
777 error = ds_request_bts(child, /* base = */ NULL, cfg.size, ovfl); 702 ptrace_bts_free_buffer(child);
778 if (error < 0)
779 goto errout;
780 703
781 child->thread.bts_ovfl_signal = sig; 704 error = ptrace_bts_allocate_buffer(child, cfg.size);
705 if (error < 0)
706 return error;
782 } 707 }
783 708
784 error = -EINVAL;
785 if (!child->thread.ds_ctx && cfg.flags)
786 goto errout;
787
788 if (cfg.flags & PTRACE_BTS_O_TRACE) 709 if (cfg.flags & PTRACE_BTS_O_TRACE)
789 child->thread.debugctlmsr |= bts_cfg.debugctl_mask; 710 flags |= BTS_USER;
790 else
791 child->thread.debugctlmsr &= ~bts_cfg.debugctl_mask;
792 711
793 if (cfg.flags & PTRACE_BTS_O_SCHED) 712 if (cfg.flags & PTRACE_BTS_O_SCHED)
794 set_tsk_thread_flag(child, TIF_BTS_TRACE_TS); 713 flags |= BTS_TIMESTAMPS;
795 else
796 clear_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
797 714
798 error = sizeof(cfg); 715 child->bts = ds_request_bts(child, child->bts_buffer, child->bts_size,
716 /* ovfl = */ NULL, /* th = */ (size_t)-1,
717 flags);
718 if (IS_ERR(child->bts)) {
719 int error = PTR_ERR(child->bts);
799 720
800out: 721 ptrace_bts_free_buffer(child);
801 if (child->thread.debugctlmsr) 722 child->bts = NULL;
802 set_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
803 else
804 clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
805 723
806 return error; 724 return error;
725 }
807 726
808errout: 727 return sizeof(cfg);
809 child->thread.debugctlmsr &= ~bts_cfg.debugctl_mask;
810 clear_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
811 goto out;
812} 728}
813 729
814static int ptrace_bts_status(struct task_struct *child, 730static int ptrace_bts_status(struct task_struct *child,
815 long cfg_size, 731 long cfg_size,
816 struct ptrace_bts_config __user *ucfg) 732 struct ptrace_bts_config __user *ucfg)
817{ 733{
734 const struct bts_trace *trace;
818 struct ptrace_bts_config cfg; 735 struct ptrace_bts_config cfg;
819 size_t end;
820 const void *base, *max;
821 int error;
822 736
823 if (cfg_size < sizeof(cfg)) 737 if (cfg_size < sizeof(cfg))
824 return -EIO; 738 return -EIO;
825 739
826 error = ds_get_bts_end(child, &end); 740 trace = ds_read_bts(child->bts);
827 if (error < 0) 741 if (!trace)
828 return error; 742 return -EPERM;
829
830 error = ds_access_bts(child, /* index = */ 0, &base);
831 if (error < 0)
832 return error;
833
834 error = ds_access_bts(child, /* index = */ end, &max);
835 if (error < 0)
836 return error;
837 743
838 memset(&cfg, 0, sizeof(cfg)); 744 memset(&cfg, 0, sizeof(cfg));
839 cfg.size = (max - base); 745 cfg.size = trace->ds.end - trace->ds.begin;
840 cfg.signal = child->thread.bts_ovfl_signal; 746 cfg.signal = child->thread.bts_ovfl_signal;
841 cfg.bts_size = sizeof(struct bts_struct); 747 cfg.bts_size = sizeof(struct bts_struct);
842 748
843 if (cfg.signal) 749 if (cfg.signal)
844 cfg.flags |= PTRACE_BTS_O_SIGNAL; 750 cfg.flags |= PTRACE_BTS_O_SIGNAL;
845 751
846 if (test_tsk_thread_flag(child, TIF_DEBUGCTLMSR) && 752 if (trace->ds.flags & BTS_USER)
847 child->thread.debugctlmsr & bts_cfg.debugctl_mask)
848 cfg.flags |= PTRACE_BTS_O_TRACE; 753 cfg.flags |= PTRACE_BTS_O_TRACE;
849 754
850 if (test_tsk_thread_flag(child, TIF_BTS_TRACE_TS)) 755 if (trace->ds.flags & BTS_TIMESTAMPS)
851 cfg.flags |= PTRACE_BTS_O_SCHED; 756 cfg.flags |= PTRACE_BTS_O_SCHED;
852 757
853 if (copy_to_user(ucfg, &cfg, sizeof(cfg))) 758 if (copy_to_user(ucfg, &cfg, sizeof(cfg)))
@@ -856,110 +761,77 @@ static int ptrace_bts_status(struct task_struct *child,
856 return sizeof(cfg); 761 return sizeof(cfg);
857} 762}
858 763
859static int ptrace_bts_write_record(struct task_struct *child, 764static int ptrace_bts_clear(struct task_struct *child)
860 const struct bts_struct *in)
861{ 765{
862 unsigned char bts_record[BTS_MAX_RECORD_SIZE]; 766 const struct bts_trace *trace;
863 767
864 BUG_ON(BTS_MAX_RECORD_SIZE < bts_cfg.sizeof_bts); 768 trace = ds_read_bts(child->bts);
769 if (!trace)
770 return -EPERM;
865 771
866 memset(bts_record, 0, bts_cfg.sizeof_bts); 772 memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
867 switch (in->qualifier) {
868 case BTS_INVALID:
869 break;
870 773
871 case BTS_BRANCH: 774 return ds_reset_bts(child->bts);
872 bts_set(bts_record, bts_from, in->variant.lbr.from_ip); 775}
873 bts_set(bts_record, bts_to, in->variant.lbr.to_ip);
874 break;
875 776
876 case BTS_TASK_ARRIVES: 777static int ptrace_bts_size(struct task_struct *child)
877 case BTS_TASK_DEPARTS: 778{
878 bts_set(bts_record, bts_from, bts_escape); 779 const struct bts_trace *trace;
879 bts_set(bts_record, bts_qual, in->qualifier);
880 bts_set(bts_record, bts_jiffies, in->variant.jiffies);
881 break;
882 780
883 default: 781 trace = ds_read_bts(child->bts);
884 return -EINVAL; 782 if (!trace)
885 } 783 return -EPERM;
886 784
887 /* The writing task will be the switched-to task on a context 785 return (trace->ds.top - trace->ds.begin) / trace->ds.size;
888 * switch. It needs to write into the switched-from task's BTS
889 * buffer. */
890 return ds_unchecked_write_bts(child, bts_record, bts_cfg.sizeof_bts);
891} 786}
892 787
893void ptrace_bts_take_timestamp(struct task_struct *tsk, 788static void ptrace_bts_fork(struct task_struct *tsk)
894 enum bts_qualifier qualifier)
895{ 789{
896 struct bts_struct rec = { 790 tsk->bts = NULL;
897 .qualifier = qualifier, 791 tsk->bts_buffer = NULL;
898 .variant.jiffies = jiffies_64 792 tsk->bts_size = 0;
899 }; 793 tsk->thread.bts_ovfl_signal = 0;
900
901 ptrace_bts_write_record(tsk, &rec);
902} 794}
903 795
904static const struct bts_configuration bts_cfg_netburst = { 796static void ptrace_bts_untrace(struct task_struct *child)
905 .sizeof_bts = sizeof(long) * 3, 797{
906 .sizeof_field = sizeof(long), 798 if (unlikely(child->bts)) {
907 .debugctl_mask = (1<<2)|(1<<3)|(1<<5) 799 ds_release_bts(child->bts);
908}; 800 child->bts = NULL;
801
802 /* We cannot update total_vm and locked_vm since
803 child's mm is already gone. But we can reclaim the
804 memory. */
805 kfree(child->bts_buffer);
806 child->bts_buffer = NULL;
807 child->bts_size = 0;
808 }
809}
909 810
910static const struct bts_configuration bts_cfg_pentium_m = { 811static void ptrace_bts_detach(struct task_struct *child)
911 .sizeof_bts = sizeof(long) * 3, 812{
912 .sizeof_field = sizeof(long), 813 if (unlikely(child->bts)) {
913 .debugctl_mask = (1<<6)|(1<<7) 814 ds_release_bts(child->bts);
914}; 815 child->bts = NULL;
915 816
916static const struct bts_configuration bts_cfg_core2 = { 817 ptrace_bts_free_buffer(child);
917 .sizeof_bts = 8 * 3, 818 }
918 .sizeof_field = 8, 819}
919 .debugctl_mask = (1<<6)|(1<<7)|(1<<9) 820#else
920}; 821static inline void ptrace_bts_fork(struct task_struct *tsk) {}
822static inline void ptrace_bts_detach(struct task_struct *child) {}
823static inline void ptrace_bts_untrace(struct task_struct *child) {}
824#endif /* CONFIG_X86_PTRACE_BTS */
921 825
922static inline void bts_configure(const struct bts_configuration *cfg) 826void x86_ptrace_fork(struct task_struct *child, unsigned long clone_flags)
923{ 827{
924 bts_cfg = *cfg; 828 ptrace_bts_fork(child);
925} 829}
926 830
927void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c) 831void x86_ptrace_untrace(struct task_struct *child)
928{ 832{
929 switch (c->x86) { 833 ptrace_bts_untrace(child);
930 case 0x6:
931 switch (c->x86_model) {
932 case 0xD:
933 case 0xE: /* Pentium M */
934 bts_configure(&bts_cfg_pentium_m);
935 break;
936 case 0xF: /* Core2 */
937 case 0x1C: /* Atom */
938 bts_configure(&bts_cfg_core2);
939 break;
940 default:
941 /* sorry, don't know about them */
942 break;
943 }
944 break;
945 case 0xF:
946 switch (c->x86_model) {
947 case 0x0:
948 case 0x1:
949 case 0x2: /* Netburst */
950 bts_configure(&bts_cfg_netburst);
951 break;
952 default:
953 /* sorry, don't know about them */
954 break;
955 }
956 break;
957 default:
958 /* sorry, don't know about them */
959 break;
960 }
961} 834}
962#endif /* CONFIG_X86_PTRACE_BTS */
963 835
964/* 836/*
965 * Called by kernel/ptrace.c when detaching.. 837 * Called by kernel/ptrace.c when detaching..
@@ -972,15 +844,7 @@ void ptrace_disable(struct task_struct *child)
972#ifdef TIF_SYSCALL_EMU 844#ifdef TIF_SYSCALL_EMU
973 clear_tsk_thread_flag(child, TIF_SYSCALL_EMU); 845 clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
974#endif 846#endif
975#ifdef CONFIG_X86_PTRACE_BTS 847 ptrace_bts_detach(child);
976 (void)ds_release_bts(child);
977
978 child->thread.debugctlmsr &= ~bts_cfg.debugctl_mask;
979 if (!child->thread.debugctlmsr)
980 clear_tsk_thread_flag(child, TIF_DEBUGCTLMSR);
981
982 clear_tsk_thread_flag(child, TIF_BTS_TRACE_TS);
983#endif /* CONFIG_X86_PTRACE_BTS */
984} 848}
985 849
986#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION 850#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
@@ -1112,7 +976,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1112 break; 976 break;
1113 977
1114 case PTRACE_BTS_SIZE: 978 case PTRACE_BTS_SIZE:
1115 ret = ds_get_bts_index(child, /* pos = */ NULL); 979 ret = ptrace_bts_size(child);
1116 break; 980 break;
1117 981
1118 case PTRACE_BTS_GET: 982 case PTRACE_BTS_GET:
@@ -1121,7 +985,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1121 break; 985 break;
1122 986
1123 case PTRACE_BTS_CLEAR: 987 case PTRACE_BTS_CLEAR:
1124 ret = ds_clear_bts(child); 988 ret = ptrace_bts_clear(child);
1125 break; 989 break;
1126 990
1127 case PTRACE_BTS_DRAIN: 991 case PTRACE_BTS_DRAIN:
@@ -1384,6 +1248,14 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1384 1248
1385 case PTRACE_GET_THREAD_AREA: 1249 case PTRACE_GET_THREAD_AREA:
1386 case PTRACE_SET_THREAD_AREA: 1250 case PTRACE_SET_THREAD_AREA:
1251#ifdef CONFIG_X86_PTRACE_BTS
1252 case PTRACE_BTS_CONFIG:
1253 case PTRACE_BTS_STATUS:
1254 case PTRACE_BTS_SIZE:
1255 case PTRACE_BTS_GET:
1256 case PTRACE_BTS_CLEAR:
1257 case PTRACE_BTS_DRAIN:
1258#endif /* CONFIG_X86_PTRACE_BTS */
1387 return arch_ptrace(child, request, addr, data); 1259 return arch_ptrace(child, request, addr, data);
1388 1260
1389 default: 1261 default:
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index cc5a2545dd41..61f718df6eec 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -21,6 +21,9 @@
21# include <asm/iommu.h> 21# include <asm/iommu.h>
22#endif 22#endif
23 23
24#include <mach_ipi.h>
25
26
24/* 27/*
25 * Power off function, if any 28 * Power off function, if any
26 */ 29 */
@@ -36,7 +39,10 @@ int reboot_force;
36static int reboot_cpu = -1; 39static int reboot_cpu = -1;
37#endif 40#endif
38 41
39/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] 42/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
43bool port_cf9_safe = false;
44
45/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
40 warm Don't set the cold reboot flag 46 warm Don't set the cold reboot flag
41 cold Set the cold reboot flag 47 cold Set the cold reboot flag
42 bios Reboot by jumping through the BIOS (only for X86_32) 48 bios Reboot by jumping through the BIOS (only for X86_32)
@@ -45,6 +51,7 @@ static int reboot_cpu = -1;
45 kbd Use the keyboard controller. cold reset (default) 51 kbd Use the keyboard controller. cold reset (default)
46 acpi Use the RESET_REG in the FADT 52 acpi Use the RESET_REG in the FADT
47 efi Use efi reset_system runtime service 53 efi Use efi reset_system runtime service
54 pci Use the so-called "PCI reset register", CF9
48 force Avoid anything that could hang. 55 force Avoid anything that could hang.
49 */ 56 */
50static int __init reboot_setup(char *str) 57static int __init reboot_setup(char *str)
@@ -79,6 +86,7 @@ static int __init reboot_setup(char *str)
79 case 'k': 86 case 'k':
80 case 't': 87 case 't':
81 case 'e': 88 case 'e':
89 case 'p':
82 reboot_type = *str; 90 reboot_type = *str;
83 break; 91 break;
84 92
@@ -404,12 +412,27 @@ static void native_machine_emergency_restart(void)
404 reboot_type = BOOT_KBD; 412 reboot_type = BOOT_KBD;
405 break; 413 break;
406 414
407
408 case BOOT_EFI: 415 case BOOT_EFI:
409 if (efi_enabled) 416 if (efi_enabled)
410 efi.reset_system(reboot_mode ? EFI_RESET_WARM : EFI_RESET_COLD, 417 efi.reset_system(reboot_mode ?
418 EFI_RESET_WARM :
419 EFI_RESET_COLD,
411 EFI_SUCCESS, 0, NULL); 420 EFI_SUCCESS, 0, NULL);
421 reboot_type = BOOT_KBD;
422 break;
412 423
424 case BOOT_CF9:
425 port_cf9_safe = true;
426 /* fall through */
427
428 case BOOT_CF9_COND:
429 if (port_cf9_safe) {
430 u8 cf9 = inb(0xcf9) & ~6;
431 outb(cf9|2, 0xcf9); /* Request hard reset */
432 udelay(50);
433 outb(cf9|6, 0xcf9); /* Actually do the reset */
434 udelay(50);
435 }
413 reboot_type = BOOT_KBD; 436 reboot_type = BOOT_KBD;
414 break; 437 break;
415 } 438 }
@@ -470,6 +493,11 @@ static void native_machine_restart(char *__unused)
470 493
471static void native_machine_halt(void) 494static void native_machine_halt(void)
472{ 495{
496 /* stop other cpus and apics */
497 machine_shutdown();
498
499 /* stop this cpu */
500 stop_this_cpu(NULL);
473} 501}
474 502
475static void native_machine_power_off(void) 503static void native_machine_power_off(void)
@@ -523,3 +551,95 @@ void machine_crash_shutdown(struct pt_regs *regs)
523 machine_ops.crash_shutdown(regs); 551 machine_ops.crash_shutdown(regs);
524} 552}
525#endif 553#endif
554
555
556#if defined(CONFIG_SMP)
557
558/* This keeps a track of which one is crashing cpu. */
559static int crashing_cpu;
560static nmi_shootdown_cb shootdown_callback;
561
562static atomic_t waiting_for_crash_ipi;
563
564static int crash_nmi_callback(struct notifier_block *self,
565 unsigned long val, void *data)
566{
567 int cpu;
568
569 if (val != DIE_NMI_IPI)
570 return NOTIFY_OK;
571
572 cpu = raw_smp_processor_id();
573
574 /* Don't do anything if this handler is invoked on crashing cpu.
575 * Otherwise, system will completely hang. Crashing cpu can get
576 * an NMI if system was initially booted with nmi_watchdog parameter.
577 */
578 if (cpu == crashing_cpu)
579 return NOTIFY_STOP;
580 local_irq_disable();
581
582 shootdown_callback(cpu, (struct die_args *)data);
583
584 atomic_dec(&waiting_for_crash_ipi);
585 /* Assume hlt works */
586 halt();
587 for (;;)
588 cpu_relax();
589
590 return 1;
591}
592
593static void smp_send_nmi_allbutself(void)
594{
595 cpumask_t mask = cpu_online_map;
596 cpu_clear(safe_smp_processor_id(), mask);
597 if (!cpus_empty(mask))
598 send_IPI_mask(mask, NMI_VECTOR);
599}
600
601static struct notifier_block crash_nmi_nb = {
602 .notifier_call = crash_nmi_callback,
603};
604
605/* Halt all other CPUs, calling the specified function on each of them
606 *
607 * This function can be used to halt all other CPUs on crash
608 * or emergency reboot time. The function passed as parameter
609 * will be called inside a NMI handler on all CPUs.
610 */
611void nmi_shootdown_cpus(nmi_shootdown_cb callback)
612{
613 unsigned long msecs;
614 local_irq_disable();
615
616 /* Make a note of crashing cpu. Will be used in NMI callback.*/
617 crashing_cpu = safe_smp_processor_id();
618
619 shootdown_callback = callback;
620
621 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
622 /* Would it be better to replace the trap vector here? */
623 if (register_die_notifier(&crash_nmi_nb))
624 return; /* return what? */
625 /* Ensure the new callback function is set before sending
626 * out the NMI
627 */
628 wmb();
629
630 smp_send_nmi_allbutself();
631
632 msecs = 1000; /* Wait at most a second for the other cpus to stop */
633 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
634 mdelay(1);
635 msecs--;
636 }
637
638 /* Leave the nmi callback set */
639}
640#else /* !CONFIG_SMP */
641void nmi_shootdown_cpus(nmi_shootdown_cb callback)
642{
643 /* No other CPUs to shoot down */
644}
645#endif
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index 6f50664b2ba5..a160f3119725 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -10,15 +10,12 @@
10#include <asm/page.h> 10#include <asm/page.h>
11#include <asm/kexec.h> 11#include <asm/kexec.h>
12#include <asm/processor-flags.h> 12#include <asm/processor-flags.h>
13#include <asm/pgtable.h>
14 13
15/* 14/*
16 * Must be relocatable PIC code callable as a C function 15 * Must be relocatable PIC code callable as a C function
17 */ 16 */
18 17
19#define PTR(x) (x << 2) 18#define PTR(x) (x << 2)
20#define PAGE_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
21#define PAE_PGD_ATTR (_PAGE_PRESENT)
22 19
23/* control_page + KEXEC_CONTROL_CODE_MAX_SIZE 20/* control_page + KEXEC_CONTROL_CODE_MAX_SIZE
24 * ~ control_page + PAGE_SIZE are used as data storage and stack for 21 * ~ control_page + PAGE_SIZE are used as data storage and stack for
@@ -39,7 +36,6 @@
39#define CP_PA_BACKUP_PAGES_MAP DATA(0x1c) 36#define CP_PA_BACKUP_PAGES_MAP DATA(0x1c)
40 37
41 .text 38 .text
42 .align PAGE_SIZE
43 .globl relocate_kernel 39 .globl relocate_kernel
44relocate_kernel: 40relocate_kernel:
45 /* Save the CPU context, used for jumping back */ 41 /* Save the CPU context, used for jumping back */
@@ -60,117 +56,6 @@ relocate_kernel:
60 movl %cr4, %eax 56 movl %cr4, %eax
61 movl %eax, CR4(%edi) 57 movl %eax, CR4(%edi)
62 58
63#ifdef CONFIG_X86_PAE
64 /* map the control page at its virtual address */
65
66 movl PTR(VA_PGD)(%ebp), %edi
67 movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
68 andl $0xc0000000, %eax
69 shrl $27, %eax
70 addl %edi, %eax
71
72 movl PTR(PA_PMD_0)(%ebp), %edx
73 orl $PAE_PGD_ATTR, %edx
74 movl %edx, (%eax)
75
76 movl PTR(VA_PMD_0)(%ebp), %edi
77 movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
78 andl $0x3fe00000, %eax
79 shrl $18, %eax
80 addl %edi, %eax
81
82 movl PTR(PA_PTE_0)(%ebp), %edx
83 orl $PAGE_ATTR, %edx
84 movl %edx, (%eax)
85
86 movl PTR(VA_PTE_0)(%ebp), %edi
87 movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
88 andl $0x001ff000, %eax
89 shrl $9, %eax
90 addl %edi, %eax
91
92 movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
93 orl $PAGE_ATTR, %edx
94 movl %edx, (%eax)
95
96 /* identity map the control page at its physical address */
97
98 movl PTR(VA_PGD)(%ebp), %edi
99 movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
100 andl $0xc0000000, %eax
101 shrl $27, %eax
102 addl %edi, %eax
103
104 movl PTR(PA_PMD_1)(%ebp), %edx
105 orl $PAE_PGD_ATTR, %edx
106 movl %edx, (%eax)
107
108 movl PTR(VA_PMD_1)(%ebp), %edi
109 movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
110 andl $0x3fe00000, %eax
111 shrl $18, %eax
112 addl %edi, %eax
113
114 movl PTR(PA_PTE_1)(%ebp), %edx
115 orl $PAGE_ATTR, %edx
116 movl %edx, (%eax)
117
118 movl PTR(VA_PTE_1)(%ebp), %edi
119 movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
120 andl $0x001ff000, %eax
121 shrl $9, %eax
122 addl %edi, %eax
123
124 movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
125 orl $PAGE_ATTR, %edx
126 movl %edx, (%eax)
127#else
128 /* map the control page at its virtual address */
129
130 movl PTR(VA_PGD)(%ebp), %edi
131 movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
132 andl $0xffc00000, %eax
133 shrl $20, %eax
134 addl %edi, %eax
135
136 movl PTR(PA_PTE_0)(%ebp), %edx
137 orl $PAGE_ATTR, %edx
138 movl %edx, (%eax)
139
140 movl PTR(VA_PTE_0)(%ebp), %edi
141 movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
142 andl $0x003ff000, %eax
143 shrl $10, %eax
144 addl %edi, %eax
145
146 movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
147 orl $PAGE_ATTR, %edx
148 movl %edx, (%eax)
149
150 /* identity map the control page at its physical address */
151
152 movl PTR(VA_PGD)(%ebp), %edi
153 movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
154 andl $0xffc00000, %eax
155 shrl $20, %eax
156 addl %edi, %eax
157
158 movl PTR(PA_PTE_1)(%ebp), %edx
159 orl $PAGE_ATTR, %edx
160 movl %edx, (%eax)
161
162 movl PTR(VA_PTE_1)(%ebp), %edi
163 movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
164 andl $0x003ff000, %eax
165 shrl $10, %eax
166 addl %edi, %eax
167
168 movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
169 orl $PAGE_ATTR, %edx
170 movl %edx, (%eax)
171#endif
172
173relocate_new_kernel:
174 /* read the arguments and say goodbye to the stack */ 59 /* read the arguments and say goodbye to the stack */
175 movl 20+4(%esp), %ebx /* page_list */ 60 movl 20+4(%esp), %ebx /* page_list */
176 movl 20+8(%esp), %ebp /* list of pages */ 61 movl 20+8(%esp), %ebp /* list of pages */
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 9d5674f7b6cc..08e02e8453c9 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -93,11 +93,13 @@
93#include <asm/desc.h> 93#include <asm/desc.h>
94#include <asm/dma.h> 94#include <asm/dma.h>
95#include <asm/iommu.h> 95#include <asm/iommu.h>
96#include <asm/gart.h>
96#include <asm/mmu_context.h> 97#include <asm/mmu_context.h>
97#include <asm/proto.h> 98#include <asm/proto.h>
98 99
99#include <mach_apic.h> 100#include <mach_apic.h>
100#include <asm/paravirt.h> 101#include <asm/paravirt.h>
102#include <asm/hypervisor.h>
101 103
102#include <asm/percpu.h> 104#include <asm/percpu.h>
103#include <asm/topology.h> 105#include <asm/topology.h>
@@ -448,6 +450,7 @@ static void __init reserve_early_setup_data(void)
448 * @size: Size of the crashkernel memory to reserve. 450 * @size: Size of the crashkernel memory to reserve.
449 * Returns the base address on success, and -1ULL on failure. 451 * Returns the base address on success, and -1ULL on failure.
450 */ 452 */
453static
451unsigned long long __init find_and_reserve_crashkernel(unsigned long long size) 454unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
452{ 455{
453 const unsigned long long alignment = 16<<20; /* 16M */ 456 const unsigned long long alignment = 16<<20; /* 16M */
@@ -583,161 +586,24 @@ static int __init setup_elfcorehdr(char *arg)
583early_param("elfcorehdr", setup_elfcorehdr); 586early_param("elfcorehdr", setup_elfcorehdr);
584#endif 587#endif
585 588
586static struct x86_quirks default_x86_quirks __initdata; 589static int __init default_update_genapic(void)
587
588struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
589
590/*
591 * Some BIOSes seem to corrupt the low 64k of memory during events
592 * like suspend/resume and unplugging an HDMI cable. Reserve all
593 * remaining free memory in that area and fill it with a distinct
594 * pattern.
595 */
596#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
597#define MAX_SCAN_AREAS 8
598
599static int __read_mostly memory_corruption_check = -1;
600
601static unsigned __read_mostly corruption_check_size = 64*1024;
602static unsigned __read_mostly corruption_check_period = 60; /* seconds */
603
604static struct e820entry scan_areas[MAX_SCAN_AREAS];
605static int num_scan_areas;
606
607
608static int set_corruption_check(char *arg)
609{ 590{
610 char *end; 591#ifdef CONFIG_X86_SMP
611 592# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
612 memory_corruption_check = simple_strtol(arg, &end, 10); 593 genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
613 594# endif
614 return (*end == 0) ? 0 : -EINVAL;
615}
616early_param("memory_corruption_check", set_corruption_check);
617
618static int set_corruption_check_period(char *arg)
619{
620 char *end;
621
622 corruption_check_period = simple_strtoul(arg, &end, 10);
623
624 return (*end == 0) ? 0 : -EINVAL;
625}
626early_param("memory_corruption_check_period", set_corruption_check_period);
627
628static int set_corruption_check_size(char *arg)
629{
630 char *end;
631 unsigned size;
632
633 size = memparse(arg, &end);
634
635 if (*end == '\0')
636 corruption_check_size = size;
637
638 return (size == corruption_check_size) ? 0 : -EINVAL;
639}
640early_param("memory_corruption_check_size", set_corruption_check_size);
641
642
643static void __init setup_bios_corruption_check(void)
644{
645 u64 addr = PAGE_SIZE; /* assume first page is reserved anyway */
646
647 if (memory_corruption_check == -1) {
648 memory_corruption_check =
649#ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
650 1
651#else
652 0
653#endif 595#endif
654 ;
655 }
656
657 if (corruption_check_size == 0)
658 memory_corruption_check = 0;
659
660 if (!memory_corruption_check)
661 return;
662
663 corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
664
665 while(addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
666 u64 size;
667 addr = find_e820_area_size(addr, &size, PAGE_SIZE);
668
669 if (addr == 0)
670 break;
671 596
672 if ((addr + size) > corruption_check_size) 597 return 0;
673 size = corruption_check_size - addr;
674
675 if (size == 0)
676 break;
677
678 e820_update_range(addr, size, E820_RAM, E820_RESERVED);
679 scan_areas[num_scan_areas].addr = addr;
680 scan_areas[num_scan_areas].size = size;
681 num_scan_areas++;
682
683 /* Assume we've already mapped this early memory */
684 memset(__va(addr), 0, size);
685
686 addr += size;
687 }
688
689 printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
690 num_scan_areas);
691 update_e820();
692}
693
694static struct timer_list periodic_check_timer;
695
696void check_for_bios_corruption(void)
697{
698 int i;
699 int corruption = 0;
700
701 if (!memory_corruption_check)
702 return;
703
704 for(i = 0; i < num_scan_areas; i++) {
705 unsigned long *addr = __va(scan_areas[i].addr);
706 unsigned long size = scan_areas[i].size;
707
708 for(; size; addr++, size -= sizeof(unsigned long)) {
709 if (!*addr)
710 continue;
711 printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
712 addr, __pa(addr), *addr);
713 corruption = 1;
714 *addr = 0;
715 }
716 }
717
718 WARN(corruption, KERN_ERR "Memory corruption detected in low memory\n");
719}
720
721static void periodic_check_for_corruption(unsigned long data)
722{
723 check_for_bios_corruption();
724 mod_timer(&periodic_check_timer, round_jiffies(jiffies + corruption_check_period*HZ));
725} 598}
726 599
727void start_periodic_check_for_corruption(void) 600static struct x86_quirks default_x86_quirks __initdata = {
728{ 601 .update_genapic = default_update_genapic,
729 if (!memory_corruption_check || corruption_check_period == 0) 602};
730 return;
731
732 printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
733 corruption_check_period);
734 603
735 init_timer(&periodic_check_timer); 604struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
736 periodic_check_timer.function = &periodic_check_for_corruption;
737 periodic_check_for_corruption(0);
738}
739#endif
740 605
606#ifdef CONFIG_X86_RESERVE_LOW_64K
741static int __init dmi_low_memory_corruption(const struct dmi_system_id *d) 607static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
742{ 608{
743 printk(KERN_NOTICE 609 printk(KERN_NOTICE
@@ -749,6 +615,7 @@ static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
749 615
750 return 0; 616 return 0;
751} 617}
618#endif
752 619
753/* List of systems that have known low memory corruption BIOS problems */ 620/* List of systems that have known low memory corruption BIOS problems */
754static struct dmi_system_id __initdata bad_bios_dmi_table[] = { 621static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
@@ -794,6 +661,9 @@ void __init setup_arch(char **cmdline_p)
794 printk(KERN_INFO "Command line: %s\n", boot_command_line); 661 printk(KERN_INFO "Command line: %s\n", boot_command_line);
795#endif 662#endif
796 663
664 /* VMI may relocate the fixmap; do this before touching ioremap area */
665 vmi_init();
666
797 early_cpu_init(); 667 early_cpu_init();
798 early_ioremap_init(); 668 early_ioremap_init();
799 669
@@ -880,13 +750,8 @@ void __init setup_arch(char **cmdline_p)
880 check_efer(); 750 check_efer();
881#endif 751#endif
882 752
883#if defined(CONFIG_VMI) && defined(CONFIG_X86_32) 753 /* Must be before kernel pagetables are setup */
884 /* 754 vmi_activate();
885 * Must be before kernel pagetables are setup
886 * or fixmap area is touched.
887 */
888 vmi_init();
889#endif
890 755
891 /* after early param, so could get panic from serial */ 756 /* after early param, so could get panic from serial */
892 reserve_early_setup_data(); 757 reserve_early_setup_data();
@@ -909,6 +774,12 @@ void __init setup_arch(char **cmdline_p)
909 774
910 dmi_check_system(bad_bios_dmi_table); 775 dmi_check_system(bad_bios_dmi_table);
911 776
777 /*
778 * VMware detection requires dmi to be available, so this
779 * needs to be done after dmi_scan_machine, for the BP.
780 */
781 init_hypervisor(&boot_cpu_data);
782
912#ifdef CONFIG_X86_32 783#ifdef CONFIG_X86_32
913 probe_roms(); 784 probe_roms();
914#endif 785#endif
diff --git a/arch/x86/kernel/sigframe.h b/arch/x86/kernel/sigframe.h
deleted file mode 100644
index cc673aa55ce4..000000000000
--- a/arch/x86/kernel/sigframe.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifdef CONFIG_X86_32
2struct sigframe {
3 char __user *pretcode;
4 int sig;
5 struct sigcontext sc;
6 /*
7 * fpstate is unused. fpstate is moved/allocated after
8 * retcode[] below. This movement allows to have the FP state and the
9 * future state extensions (xsave) stay together.
10 * And at the same time retaining the unused fpstate, prevents changing
11 * the offset of extramask[] in the sigframe and thus prevent any
12 * legacy application accessing/modifying it.
13 */
14 struct _fpstate fpstate_unused;
15 unsigned long extramask[_NSIG_WORDS-1];
16 char retcode[8];
17 /* fp state follows here */
18};
19
20struct rt_sigframe {
21 char __user *pretcode;
22 int sig;
23 struct siginfo __user *pinfo;
24 void __user *puc;
25 struct siginfo info;
26 struct ucontext uc;
27 char retcode[8];
28 /* fp state follows here */
29};
30#else
31struct rt_sigframe {
32 char __user *pretcode;
33 struct ucontext uc;
34 struct siginfo info;
35 /* fp state follows here */
36};
37
38int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
39 sigset_t *set, struct pt_regs *regs);
40int ia32_setup_frame(int sig, struct k_sigaction *ka,
41 sigset_t *set, struct pt_regs *regs);
42#endif
diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal.c
index d6dd057d0f22..89bb7668041d 100644
--- a/arch/x86/kernel/signal_32.c
+++ b/arch/x86/kernel/signal.c
@@ -1,36 +1,41 @@
1/* 1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds 2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
3 * 4 *
4 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson 5 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
5 * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes 6 * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes
7 * 2000-2002 x86-64 support by Andi Kleen
6 */ 8 */
7#include <linux/list.h>
8 9
9#include <linux/personality.h> 10#include <linux/sched.h>
10#include <linux/binfmts.h> 11#include <linux/mm.h>
11#include <linux/suspend.h> 12#include <linux/smp.h>
12#include <linux/kernel.h> 13#include <linux/kernel.h>
13#include <linux/ptrace.h>
14#include <linux/signal.h> 14#include <linux/signal.h>
15#include <linux/stddef.h>
16#include <linux/unistd.h>
17#include <linux/errno.h> 15#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/wait.h> 16#include <linux/wait.h>
17#include <linux/ptrace.h>
20#include <linux/tracehook.h> 18#include <linux/tracehook.h>
21#include <linux/elf.h> 19#include <linux/unistd.h>
22#include <linux/smp.h> 20#include <linux/stddef.h>
23#include <linux/mm.h> 21#include <linux/personality.h>
22#include <linux/uaccess.h>
24 23
25#include <asm/processor.h> 24#include <asm/processor.h>
26#include <asm/ucontext.h> 25#include <asm/ucontext.h>
27#include <asm/uaccess.h>
28#include <asm/i387.h> 26#include <asm/i387.h>
29#include <asm/vdso.h> 27#include <asm/vdso.h>
28
29#ifdef CONFIG_X86_64
30#include <asm/proto.h>
31#include <asm/ia32_unistd.h>
32#include <asm/mce.h>
33#endif /* CONFIG_X86_64 */
34
30#include <asm/syscall.h> 35#include <asm/syscall.h>
31#include <asm/syscalls.h> 36#include <asm/syscalls.h>
32 37
33#include "sigframe.h" 38#include <asm/sigframe.h>
34 39
35#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 40#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
36 41
@@ -45,74 +50,6 @@
45# define FIX_EFLAGS __FIX_EFLAGS 50# define FIX_EFLAGS __FIX_EFLAGS
46#endif 51#endif
47 52
48/*
49 * Atomically swap in the new signal mask, and wait for a signal.
50 */
51asmlinkage int
52sys_sigsuspend(int history0, int history1, old_sigset_t mask)
53{
54 mask &= _BLOCKABLE;
55 spin_lock_irq(&current->sighand->siglock);
56 current->saved_sigmask = current->blocked;
57 siginitset(&current->blocked, mask);
58 recalc_sigpending();
59 spin_unlock_irq(&current->sighand->siglock);
60
61 current->state = TASK_INTERRUPTIBLE;
62 schedule();
63 set_restore_sigmask();
64
65 return -ERESTARTNOHAND;
66}
67
68asmlinkage int
69sys_sigaction(int sig, const struct old_sigaction __user *act,
70 struct old_sigaction __user *oact)
71{
72 struct k_sigaction new_ka, old_ka;
73 int ret;
74
75 if (act) {
76 old_sigset_t mask;
77
78 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
79 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
80 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
81 return -EFAULT;
82
83 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
84 __get_user(mask, &act->sa_mask);
85 siginitset(&new_ka.sa.sa_mask, mask);
86 }
87
88 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
89
90 if (!ret && oact) {
91 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
92 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
93 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
94 return -EFAULT;
95
96 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
97 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
98 }
99
100 return ret;
101}
102
103asmlinkage int sys_sigaltstack(unsigned long bx)
104{
105 /*
106 * This is needed to make gcc realize it doesn't own the
107 * "struct pt_regs"
108 */
109 struct pt_regs *regs = (struct pt_regs *)&bx;
110 const stack_t __user *uss = (const stack_t __user *)bx;
111 stack_t __user *uoss = (stack_t __user *)regs->cx;
112
113 return do_sigaltstack(uss, uoss, regs->sp);
114}
115
116#define COPY(x) { \ 53#define COPY(x) { \
117 err |= __get_user(regs->x, &sc->x); \ 54 err |= __get_user(regs->x, &sc->x); \
118} 55}
@@ -123,7 +60,7 @@ asmlinkage int sys_sigaltstack(unsigned long bx)
123 regs->seg = tmp; \ 60 regs->seg = tmp; \
124} 61}
125 62
126#define COPY_SEG_STRICT(seg) { \ 63#define COPY_SEG_CPL3(seg) { \
127 unsigned short tmp; \ 64 unsigned short tmp; \
128 err |= __get_user(tmp, &sc->seg); \ 65 err |= __get_user(tmp, &sc->seg); \
129 regs->seg = tmp | 3; \ 66 regs->seg = tmp | 3; \
@@ -135,9 +72,6 @@ asmlinkage int sys_sigaltstack(unsigned long bx)
135 loadsegment(seg, tmp); \ 72 loadsegment(seg, tmp); \
136} 73}
137 74
138/*
139 * Do a signal return; undo the signal stack.
140 */
141static int 75static int
142restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, 76restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
143 unsigned long *pax) 77 unsigned long *pax)
@@ -149,14 +83,36 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
149 /* Always make any pending restarted system calls return -EINTR */ 83 /* Always make any pending restarted system calls return -EINTR */
150 current_thread_info()->restart_block.fn = do_no_restart_syscall; 84 current_thread_info()->restart_block.fn = do_no_restart_syscall;
151 85
86#ifdef CONFIG_X86_32
152 GET_SEG(gs); 87 GET_SEG(gs);
153 COPY_SEG(fs); 88 COPY_SEG(fs);
154 COPY_SEG(es); 89 COPY_SEG(es);
155 COPY_SEG(ds); 90 COPY_SEG(ds);
91#endif /* CONFIG_X86_32 */
92
156 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); 93 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
157 COPY(dx); COPY(cx); COPY(ip); 94 COPY(dx); COPY(cx); COPY(ip);
158 COPY_SEG_STRICT(cs); 95
159 COPY_SEG_STRICT(ss); 96#ifdef CONFIG_X86_64
97 COPY(r8);
98 COPY(r9);
99 COPY(r10);
100 COPY(r11);
101 COPY(r12);
102 COPY(r13);
103 COPY(r14);
104 COPY(r15);
105#endif /* CONFIG_X86_64 */
106
107#ifdef CONFIG_X86_32
108 COPY_SEG_CPL3(cs);
109 COPY_SEG_CPL3(ss);
110#else /* !CONFIG_X86_32 */
111 /* Kernel saves and restores only the CS segment register on signals,
112 * which is the bare minimum needed to allow mixed 32/64-bit code.
113 * App's signal handler can save/restore other segments if needed. */
114 COPY_SEG_CPL3(cs);
115#endif /* CONFIG_X86_32 */
160 116
161 err |= __get_user(tmpflags, &sc->flags); 117 err |= __get_user(tmpflags, &sc->flags);
162 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); 118 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
@@ -169,102 +125,24 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
169 return err; 125 return err;
170} 126}
171 127
172asmlinkage unsigned long sys_sigreturn(unsigned long __unused)
173{
174 struct sigframe __user *frame;
175 struct pt_regs *regs;
176 unsigned long ax;
177 sigset_t set;
178
179 regs = (struct pt_regs *) &__unused;
180 frame = (struct sigframe __user *)(regs->sp - 8);
181
182 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
183 goto badframe;
184 if (__get_user(set.sig[0], &frame->sc.oldmask) || (_NSIG_WORDS > 1
185 && __copy_from_user(&set.sig[1], &frame->extramask,
186 sizeof(frame->extramask))))
187 goto badframe;
188
189 sigdelsetmask(&set, ~_BLOCKABLE);
190 spin_lock_irq(&current->sighand->siglock);
191 current->blocked = set;
192 recalc_sigpending();
193 spin_unlock_irq(&current->sighand->siglock);
194
195 if (restore_sigcontext(regs, &frame->sc, &ax))
196 goto badframe;
197 return ax;
198
199badframe:
200 if (show_unhandled_signals && printk_ratelimit()) {
201 printk("%s%s[%d] bad frame in sigreturn frame:"
202 "%p ip:%lx sp:%lx oeax:%lx",
203 task_pid_nr(current) > 1 ? KERN_INFO : KERN_EMERG,
204 current->comm, task_pid_nr(current), frame, regs->ip,
205 regs->sp, regs->orig_ax);
206 print_vma_addr(" in ", regs->ip);
207 printk(KERN_CONT "\n");
208 }
209
210 force_sig(SIGSEGV, current);
211
212 return 0;
213}
214
215static long do_rt_sigreturn(struct pt_regs *regs)
216{
217 struct rt_sigframe __user *frame;
218 unsigned long ax;
219 sigset_t set;
220
221 frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
222 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
223 goto badframe;
224 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
225 goto badframe;
226
227 sigdelsetmask(&set, ~_BLOCKABLE);
228 spin_lock_irq(&current->sighand->siglock);
229 current->blocked = set;
230 recalc_sigpending();
231 spin_unlock_irq(&current->sighand->siglock);
232
233 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
234 goto badframe;
235
236 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
237 goto badframe;
238
239 return ax;
240
241badframe:
242 signal_fault(regs, frame, "rt_sigreturn");
243 return 0;
244}
245
246asmlinkage int sys_rt_sigreturn(unsigned long __unused)
247{
248 struct pt_regs *regs = (struct pt_regs *)&__unused;
249
250 return do_rt_sigreturn(regs);
251}
252
253/*
254 * Set up a signal frame.
255 */
256static int 128static int
257setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate, 129setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
258 struct pt_regs *regs, unsigned long mask) 130 struct pt_regs *regs, unsigned long mask)
259{ 131{
260 int tmp, err = 0; 132 int err = 0;
261 133
262 err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs); 134#ifdef CONFIG_X86_32
263 savesegment(gs, tmp); 135 {
264 err |= __put_user(tmp, (unsigned int __user *)&sc->gs); 136 unsigned int tmp;
265 137
138 savesegment(gs, tmp);
139 err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
140 }
141 err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs);
266 err |= __put_user(regs->es, (unsigned int __user *)&sc->es); 142 err |= __put_user(regs->es, (unsigned int __user *)&sc->es);
267 err |= __put_user(regs->ds, (unsigned int __user *)&sc->ds); 143 err |= __put_user(regs->ds, (unsigned int __user *)&sc->ds);
144#endif /* CONFIG_X86_32 */
145
268 err |= __put_user(regs->di, &sc->di); 146 err |= __put_user(regs->di, &sc->di);
269 err |= __put_user(regs->si, &sc->si); 147 err |= __put_user(regs->si, &sc->si);
270 err |= __put_user(regs->bp, &sc->bp); 148 err |= __put_user(regs->bp, &sc->bp);
@@ -273,19 +151,33 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
273 err |= __put_user(regs->dx, &sc->dx); 151 err |= __put_user(regs->dx, &sc->dx);
274 err |= __put_user(regs->cx, &sc->cx); 152 err |= __put_user(regs->cx, &sc->cx);
275 err |= __put_user(regs->ax, &sc->ax); 153 err |= __put_user(regs->ax, &sc->ax);
154#ifdef CONFIG_X86_64
155 err |= __put_user(regs->r8, &sc->r8);
156 err |= __put_user(regs->r9, &sc->r9);
157 err |= __put_user(regs->r10, &sc->r10);
158 err |= __put_user(regs->r11, &sc->r11);
159 err |= __put_user(regs->r12, &sc->r12);
160 err |= __put_user(regs->r13, &sc->r13);
161 err |= __put_user(regs->r14, &sc->r14);
162 err |= __put_user(regs->r15, &sc->r15);
163#endif /* CONFIG_X86_64 */
164
276 err |= __put_user(current->thread.trap_no, &sc->trapno); 165 err |= __put_user(current->thread.trap_no, &sc->trapno);
277 err |= __put_user(current->thread.error_code, &sc->err); 166 err |= __put_user(current->thread.error_code, &sc->err);
278 err |= __put_user(regs->ip, &sc->ip); 167 err |= __put_user(regs->ip, &sc->ip);
168#ifdef CONFIG_X86_32
279 err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs); 169 err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
280 err |= __put_user(regs->flags, &sc->flags); 170 err |= __put_user(regs->flags, &sc->flags);
281 err |= __put_user(regs->sp, &sc->sp_at_signal); 171 err |= __put_user(regs->sp, &sc->sp_at_signal);
282 err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss); 172 err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
173#else /* !CONFIG_X86_32 */
174 err |= __put_user(regs->flags, &sc->flags);
175 err |= __put_user(regs->cs, &sc->cs);
176 err |= __put_user(0, &sc->gs);
177 err |= __put_user(0, &sc->fs);
178#endif /* CONFIG_X86_32 */
283 179
284 tmp = save_i387_xstate(fpstate); 180 err |= __put_user(fpstate, &sc->fpstate);
285 if (tmp < 0)
286 err = 1;
287 else
288 err |= __put_user(tmp ? fpstate : NULL, &sc->fpstate);
289 181
290 /* non-iBCS2 extensions.. */ 182 /* non-iBCS2 extensions.. */
291 err |= __put_user(mask, &sc->oldmask); 183 err |= __put_user(mask, &sc->oldmask);
@@ -295,6 +187,32 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
295} 187}
296 188
297/* 189/*
190 * Set up a signal frame.
191 */
192#ifdef CONFIG_X86_32
193static const struct {
194 u16 poplmovl;
195 u32 val;
196 u16 int80;
197} __attribute__((packed)) retcode = {
198 0xb858, /* popl %eax; movl $..., %eax */
199 __NR_sigreturn,
200 0x80cd, /* int $0x80 */
201};
202
203static const struct {
204 u8 movl;
205 u32 val;
206 u16 int80;
207 u8 pad;
208} __attribute__((packed)) rt_retcode = {
209 0xb8, /* movl $..., %eax */
210 __NR_rt_sigreturn,
211 0x80cd, /* int $0x80 */
212 0
213};
214
215/*
298 * Determine which stack to use.. 216 * Determine which stack to use..
299 */ 217 */
300static inline void __user * 218static inline void __user *
@@ -328,6 +246,8 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
328 if (used_math()) { 246 if (used_math()) {
329 sp = sp - sig_xstate_size; 247 sp = sp - sig_xstate_size;
330 *fpstate = (struct _fpstate *) sp; 248 *fpstate = (struct _fpstate *) sp;
249 if (save_i387_xstate(*fpstate) < 0)
250 return (void __user *)-1L;
331 } 251 }
332 252
333 sp -= frame_size; 253 sp -= frame_size;
@@ -383,9 +303,7 @@ __setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
383 * reasons and because gdb uses it as a signature to notice 303 * reasons and because gdb uses it as a signature to notice
384 * signal handler stack frames. 304 * signal handler stack frames.
385 */ 305 */
386 err |= __put_user(0xb858, (short __user *)(frame->retcode+0)); 306 err |= __put_user(*((u64 *)&retcode), (u64 *)frame->retcode);
387 err |= __put_user(__NR_sigreturn, (int __user *)(frame->retcode+2));
388 err |= __put_user(0x80cd, (short __user *)(frame->retcode+6));
389 307
390 if (err) 308 if (err)
391 return -EFAULT; 309 return -EFAULT;
@@ -454,9 +372,7 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
454 * reasons and because gdb uses it as a signature to notice 372 * reasons and because gdb uses it as a signature to notice
455 * signal handler stack frames. 373 * signal handler stack frames.
456 */ 374 */
457 err |= __put_user(0xb8, (char __user *)(frame->retcode+0)); 375 err |= __put_user(*((u64 *)&rt_retcode), (u64 *)frame->retcode);
458 err |= __put_user(__NR_rt_sigreturn, (int __user *)(frame->retcode+1));
459 err |= __put_user(0x80cd, (short __user *)(frame->retcode+5));
460 376
461 if (err) 377 if (err)
462 return -EFAULT; 378 return -EFAULT;
@@ -475,23 +391,293 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
475 391
476 return 0; 392 return 0;
477} 393}
394#else /* !CONFIG_X86_32 */
395/*
396 * Determine which stack to use..
397 */
398static void __user *
399get_stack(struct k_sigaction *ka, unsigned long sp, unsigned long size)
400{
401 /* Default to using normal stack - redzone*/
402 sp -= 128;
403
404 /* This is the X/Open sanctioned signal stack switching. */
405 if (ka->sa.sa_flags & SA_ONSTACK) {
406 if (sas_ss_flags(sp) == 0)
407 sp = current->sas_ss_sp + current->sas_ss_size;
408 }
409
410 return (void __user *)round_down(sp - size, 64);
411}
412
413static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
414 sigset_t *set, struct pt_regs *regs)
415{
416 struct rt_sigframe __user *frame;
417 void __user *fp = NULL;
418 int err = 0;
419 struct task_struct *me = current;
420
421 if (used_math()) {
422 fp = get_stack(ka, regs->sp, sig_xstate_size);
423 frame = (void __user *)round_down(
424 (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;
425
426 if (save_i387_xstate(fp) < 0)
427 return -EFAULT;
428 } else
429 frame = get_stack(ka, regs->sp, sizeof(struct rt_sigframe)) - 8;
430
431 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
432 return -EFAULT;
433
434 if (ka->sa.sa_flags & SA_SIGINFO) {
435 if (copy_siginfo_to_user(&frame->info, info))
436 return -EFAULT;
437 }
438
439 /* Create the ucontext. */
440 if (cpu_has_xsave)
441 err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
442 else
443 err |= __put_user(0, &frame->uc.uc_flags);
444 err |= __put_user(0, &frame->uc.uc_link);
445 err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
446 err |= __put_user(sas_ss_flags(regs->sp),
447 &frame->uc.uc_stack.ss_flags);
448 err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
449 err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]);
450 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
451
452 /* Set up to return from userspace. If provided, use a stub
453 already in userspace. */
454 /* x86-64 should always use SA_RESTORER. */
455 if (ka->sa.sa_flags & SA_RESTORER) {
456 err |= __put_user(ka->sa.sa_restorer, &frame->pretcode);
457 } else {
458 /* could use a vstub here */
459 return -EFAULT;
460 }
461
462 if (err)
463 return -EFAULT;
464
465 /* Set up registers for signal handler */
466 regs->di = sig;
467 /* In case the signal handler was declared without prototypes */
468 regs->ax = 0;
469
470 /* This also works for non SA_SIGINFO handlers because they expect the
471 next argument after the signal number on the stack. */
472 regs->si = (unsigned long)&frame->info;
473 regs->dx = (unsigned long)&frame->uc;
474 regs->ip = (unsigned long) ka->sa.sa_handler;
475
476 regs->sp = (unsigned long)frame;
477
478 /* Set up the CS register to run signal handlers in 64-bit mode,
479 even if the handler happens to be interrupting 32-bit code. */
480 regs->cs = __USER_CS;
481
482 return 0;
483}
484#endif /* CONFIG_X86_32 */
485
486#ifdef CONFIG_X86_32
487/*
488 * Atomically swap in the new signal mask, and wait for a signal.
489 */
490asmlinkage int
491sys_sigsuspend(int history0, int history1, old_sigset_t mask)
492{
493 mask &= _BLOCKABLE;
494 spin_lock_irq(&current->sighand->siglock);
495 current->saved_sigmask = current->blocked;
496 siginitset(&current->blocked, mask);
497 recalc_sigpending();
498 spin_unlock_irq(&current->sighand->siglock);
499
500 current->state = TASK_INTERRUPTIBLE;
501 schedule();
502 set_restore_sigmask();
503
504 return -ERESTARTNOHAND;
505}
506
507asmlinkage int
508sys_sigaction(int sig, const struct old_sigaction __user *act,
509 struct old_sigaction __user *oact)
510{
511 struct k_sigaction new_ka, old_ka;
512 int ret;
513
514 if (act) {
515 old_sigset_t mask;
516
517 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
518 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
519 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
520 return -EFAULT;
521
522 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
523 __get_user(mask, &act->sa_mask);
524 siginitset(&new_ka.sa.sa_mask, mask);
525 }
526
527 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
528
529 if (!ret && oact) {
530 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
531 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
532 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
533 return -EFAULT;
534
535 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
536 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
537 }
538
539 return ret;
540}
541#endif /* CONFIG_X86_32 */
542
543#ifdef CONFIG_X86_32
544asmlinkage int sys_sigaltstack(unsigned long bx)
545{
546 /*
547 * This is needed to make gcc realize it doesn't own the
548 * "struct pt_regs"
549 */
550 struct pt_regs *regs = (struct pt_regs *)&bx;
551 const stack_t __user *uss = (const stack_t __user *)bx;
552 stack_t __user *uoss = (stack_t __user *)regs->cx;
553
554 return do_sigaltstack(uss, uoss, regs->sp);
555}
556#else /* !CONFIG_X86_32 */
557asmlinkage long
558sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
559 struct pt_regs *regs)
560{
561 return do_sigaltstack(uss, uoss, regs->sp);
562}
563#endif /* CONFIG_X86_32 */
564
565/*
566 * Do a signal return; undo the signal stack.
567 */
568#ifdef CONFIG_X86_32
569asmlinkage unsigned long sys_sigreturn(unsigned long __unused)
570{
571 struct sigframe __user *frame;
572 struct pt_regs *regs;
573 unsigned long ax;
574 sigset_t set;
575
576 regs = (struct pt_regs *) &__unused;
577 frame = (struct sigframe __user *)(regs->sp - 8);
578
579 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
580 goto badframe;
581 if (__get_user(set.sig[0], &frame->sc.oldmask) || (_NSIG_WORDS > 1
582 && __copy_from_user(&set.sig[1], &frame->extramask,
583 sizeof(frame->extramask))))
584 goto badframe;
585
586 sigdelsetmask(&set, ~_BLOCKABLE);
587 spin_lock_irq(&current->sighand->siglock);
588 current->blocked = set;
589 recalc_sigpending();
590 spin_unlock_irq(&current->sighand->siglock);
591
592 if (restore_sigcontext(regs, &frame->sc, &ax))
593 goto badframe;
594 return ax;
595
596badframe:
597 signal_fault(regs, frame, "sigreturn");
598
599 return 0;
600}
601#endif /* CONFIG_X86_32 */
602
603static long do_rt_sigreturn(struct pt_regs *regs)
604{
605 struct rt_sigframe __user *frame;
606 unsigned long ax;
607 sigset_t set;
608
609 frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
610 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
611 goto badframe;
612 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
613 goto badframe;
614
615 sigdelsetmask(&set, ~_BLOCKABLE);
616 spin_lock_irq(&current->sighand->siglock);
617 current->blocked = set;
618 recalc_sigpending();
619 spin_unlock_irq(&current->sighand->siglock);
620
621 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
622 goto badframe;
623
624 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
625 goto badframe;
626
627 return ax;
628
629badframe:
630 signal_fault(regs, frame, "rt_sigreturn");
631 return 0;
632}
633
634#ifdef CONFIG_X86_32
635asmlinkage int sys_rt_sigreturn(struct pt_regs regs)
636{
637 return do_rt_sigreturn(&regs);
638}
639#else /* !CONFIG_X86_32 */
640asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
641{
642 return do_rt_sigreturn(regs);
643}
644#endif /* CONFIG_X86_32 */
478 645
479/* 646/*
480 * OK, we're invoking a handler: 647 * OK, we're invoking a handler:
481 */ 648 */
482static int signr_convert(int sig) 649static int signr_convert(int sig)
483{ 650{
651#ifdef CONFIG_X86_32
484 struct thread_info *info = current_thread_info(); 652 struct thread_info *info = current_thread_info();
485 653
486 if (info->exec_domain && info->exec_domain->signal_invmap && sig < 32) 654 if (info->exec_domain && info->exec_domain->signal_invmap && sig < 32)
487 return info->exec_domain->signal_invmap[sig]; 655 return info->exec_domain->signal_invmap[sig];
656#endif /* CONFIG_X86_32 */
488 return sig; 657 return sig;
489} 658}
490 659
660#ifdef CONFIG_X86_32
661
491#define is_ia32 1 662#define is_ia32 1
492#define ia32_setup_frame __setup_frame 663#define ia32_setup_frame __setup_frame
493#define ia32_setup_rt_frame __setup_rt_frame 664#define ia32_setup_rt_frame __setup_rt_frame
494 665
666#else /* !CONFIG_X86_32 */
667
668#ifdef CONFIG_IA32_EMULATION
669#define is_ia32 test_thread_flag(TIF_IA32)
670#else /* !CONFIG_IA32_EMULATION */
671#define is_ia32 0
672#endif /* CONFIG_IA32_EMULATION */
673
674int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
675 sigset_t *set, struct pt_regs *regs);
676int ia32_setup_frame(int sig, struct k_sigaction *ka,
677 sigset_t *set, struct pt_regs *regs);
678
679#endif /* CONFIG_X86_32 */
680
495static int 681static int
496setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 682setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
497 sigset_t *set, struct pt_regs *regs) 683 sigset_t *set, struct pt_regs *regs)
@@ -592,7 +778,13 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
592 return 0; 778 return 0;
593} 779}
594 780
781#ifdef CONFIG_X86_32
595#define NR_restart_syscall __NR_restart_syscall 782#define NR_restart_syscall __NR_restart_syscall
783#else /* !CONFIG_X86_32 */
784#define NR_restart_syscall \
785 test_thread_flag(TIF_IA32) ? __NR_ia32_restart_syscall : __NR_restart_syscall
786#endif /* CONFIG_X86_32 */
787
596/* 788/*
597 * Note that 'init' is a special process: it doesn't get signals it doesn't 789 * Note that 'init' is a special process: it doesn't get signals it doesn't
598 * want to handle. Thus you cannot kill init even with a SIGKILL even by 790 * want to handle. Thus you cannot kill init even with a SIGKILL even by
@@ -704,8 +896,9 @@ void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
704 struct task_struct *me = current; 896 struct task_struct *me = current;
705 897
706 if (show_unhandled_signals && printk_ratelimit()) { 898 if (show_unhandled_signals && printk_ratelimit()) {
707 printk(KERN_INFO 899 printk("%s"
708 "%s[%d] bad frame in %s frame:%p ip:%lx sp:%lx orax:%lx", 900 "%s[%d] bad frame in %s frame:%p ip:%lx sp:%lx orax:%lx",
901 task_pid_nr(current) > 1 ? KERN_INFO : KERN_EMERG,
709 me->comm, me->pid, where, frame, 902 me->comm, me->pid, where, frame,
710 regs->ip, regs->sp, regs->orig_ax); 903 regs->ip, regs->sp, regs->orig_ax);
711 print_vma_addr(" in ", regs->ip); 904 print_vma_addr(" in ", regs->ip);
diff --git a/arch/x86/kernel/signal_64.c b/arch/x86/kernel/signal_64.c
deleted file mode 100644
index a5c9627f4db9..000000000000
--- a/arch/x86/kernel/signal_64.c
+++ /dev/null
@@ -1,516 +0,0 @@
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
4 *
5 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
6 * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes
7 * 2000-2002 x86-64 support by Andi Kleen
8 */
9
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
13#include <linux/kernel.h>
14#include <linux/signal.h>
15#include <linux/errno.h>
16#include <linux/wait.h>
17#include <linux/ptrace.h>
18#include <linux/tracehook.h>
19#include <linux/unistd.h>
20#include <linux/stddef.h>
21#include <linux/personality.h>
22#include <linux/compiler.h>
23#include <linux/uaccess.h>
24
25#include <asm/processor.h>
26#include <asm/ucontext.h>
27#include <asm/i387.h>
28#include <asm/proto.h>
29#include <asm/ia32_unistd.h>
30#include <asm/mce.h>
31#include <asm/syscall.h>
32#include <asm/syscalls.h>
33#include "sigframe.h"
34
35#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
36
37#define __FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \
38 X86_EFLAGS_DF | X86_EFLAGS_TF | X86_EFLAGS_SF | \
39 X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \
40 X86_EFLAGS_CF)
41
42#ifdef CONFIG_X86_32
43# define FIX_EFLAGS (__FIX_EFLAGS | X86_EFLAGS_RF)
44#else
45# define FIX_EFLAGS __FIX_EFLAGS
46#endif
47
48asmlinkage long
49sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
50 struct pt_regs *regs)
51{
52 return do_sigaltstack(uss, uoss, regs->sp);
53}
54
55#define COPY(x) { \
56 err |= __get_user(regs->x, &sc->x); \
57}
58
59#define COPY_SEG_STRICT(seg) { \
60 unsigned short tmp; \
61 err |= __get_user(tmp, &sc->seg); \
62 regs->seg = tmp | 3; \
63}
64
65/*
66 * Do a signal return; undo the signal stack.
67 */
68static int
69restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
70 unsigned long *pax)
71{
72 void __user *buf;
73 unsigned int tmpflags;
74 unsigned int err = 0;
75
76 /* Always make any pending restarted system calls return -EINTR */
77 current_thread_info()->restart_block.fn = do_no_restart_syscall;
78
79 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
80 COPY(dx); COPY(cx); COPY(ip);
81 COPY(r8);
82 COPY(r9);
83 COPY(r10);
84 COPY(r11);
85 COPY(r12);
86 COPY(r13);
87 COPY(r14);
88 COPY(r15);
89
90 /* Kernel saves and restores only the CS segment register on signals,
91 * which is the bare minimum needed to allow mixed 32/64-bit code.
92 * App's signal handler can save/restore other segments if needed. */
93 COPY_SEG_STRICT(cs);
94
95 err |= __get_user(tmpflags, &sc->flags);
96 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
97 regs->orig_ax = -1; /* disable syscall checks */
98
99 err |= __get_user(buf, &sc->fpstate);
100 err |= restore_i387_xstate(buf);
101
102 err |= __get_user(*pax, &sc->ax);
103 return err;
104}
105
106static long do_rt_sigreturn(struct pt_regs *regs)
107{
108 struct rt_sigframe __user *frame;
109 unsigned long ax;
110 sigset_t set;
111
112 frame = (struct rt_sigframe __user *)(regs->sp - sizeof(long));
113 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
114 goto badframe;
115 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
116 goto badframe;
117
118 sigdelsetmask(&set, ~_BLOCKABLE);
119 spin_lock_irq(&current->sighand->siglock);
120 current->blocked = set;
121 recalc_sigpending();
122 spin_unlock_irq(&current->sighand->siglock);
123
124 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &ax))
125 goto badframe;
126
127 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->sp) == -EFAULT)
128 goto badframe;
129
130 return ax;
131
132badframe:
133 signal_fault(regs, frame, "rt_sigreturn");
134 return 0;
135}
136
137asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
138{
139 return do_rt_sigreturn(regs);
140}
141
142/*
143 * Set up a signal frame.
144 */
145
146static inline int
147setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
148 unsigned long mask, struct task_struct *me)
149{
150 int err = 0;
151
152 err |= __put_user(regs->cs, &sc->cs);
153 err |= __put_user(0, &sc->gs);
154 err |= __put_user(0, &sc->fs);
155
156 err |= __put_user(regs->di, &sc->di);
157 err |= __put_user(regs->si, &sc->si);
158 err |= __put_user(regs->bp, &sc->bp);
159 err |= __put_user(regs->sp, &sc->sp);
160 err |= __put_user(regs->bx, &sc->bx);
161 err |= __put_user(regs->dx, &sc->dx);
162 err |= __put_user(regs->cx, &sc->cx);
163 err |= __put_user(regs->ax, &sc->ax);
164 err |= __put_user(regs->r8, &sc->r8);
165 err |= __put_user(regs->r9, &sc->r9);
166 err |= __put_user(regs->r10, &sc->r10);
167 err |= __put_user(regs->r11, &sc->r11);
168 err |= __put_user(regs->r12, &sc->r12);
169 err |= __put_user(regs->r13, &sc->r13);
170 err |= __put_user(regs->r14, &sc->r14);
171 err |= __put_user(regs->r15, &sc->r15);
172 err |= __put_user(me->thread.trap_no, &sc->trapno);
173 err |= __put_user(me->thread.error_code, &sc->err);
174 err |= __put_user(regs->ip, &sc->ip);
175 err |= __put_user(regs->flags, &sc->flags);
176 err |= __put_user(mask, &sc->oldmask);
177 err |= __put_user(me->thread.cr2, &sc->cr2);
178
179 return err;
180}
181
182/*
183 * Determine which stack to use..
184 */
185
186static void __user *
187get_stack(struct k_sigaction *ka, struct pt_regs *regs, unsigned long size)
188{
189 unsigned long sp;
190
191 /* Default to using normal stack - redzone*/
192 sp = regs->sp - 128;
193
194 /* This is the X/Open sanctioned signal stack switching. */
195 if (ka->sa.sa_flags & SA_ONSTACK) {
196 if (sas_ss_flags(sp) == 0)
197 sp = current->sas_ss_sp + current->sas_ss_size;
198 }
199
200 return (void __user *)round_down(sp - size, 64);
201}
202
203static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
204 sigset_t *set, struct pt_regs *regs)
205{
206 struct rt_sigframe __user *frame;
207 void __user *fp = NULL;
208 int err = 0;
209 struct task_struct *me = current;
210
211 if (used_math()) {
212 fp = get_stack(ka, regs, sig_xstate_size);
213 frame = (void __user *)round_down(
214 (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;
215
216 if (save_i387_xstate(fp) < 0)
217 return -EFAULT;
218 } else
219 frame = get_stack(ka, regs, sizeof(struct rt_sigframe)) - 8;
220
221 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
222 return -EFAULT;
223
224 if (ka->sa.sa_flags & SA_SIGINFO) {
225 if (copy_siginfo_to_user(&frame->info, info))
226 return -EFAULT;
227 }
228
229 /* Create the ucontext. */
230 if (cpu_has_xsave)
231 err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);
232 else
233 err |= __put_user(0, &frame->uc.uc_flags);
234 err |= __put_user(0, &frame->uc.uc_link);
235 err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
236 err |= __put_user(sas_ss_flags(regs->sp),
237 &frame->uc.uc_stack.ss_flags);
238 err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
239 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0], me);
240 err |= __put_user(fp, &frame->uc.uc_mcontext.fpstate);
241 if (sizeof(*set) == 16) {
242 __put_user(set->sig[0], &frame->uc.uc_sigmask.sig[0]);
243 __put_user(set->sig[1], &frame->uc.uc_sigmask.sig[1]);
244 } else
245 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
246
247 /* Set up to return from userspace. If provided, use a stub
248 already in userspace. */
249 /* x86-64 should always use SA_RESTORER. */
250 if (ka->sa.sa_flags & SA_RESTORER) {
251 err |= __put_user(ka->sa.sa_restorer, &frame->pretcode);
252 } else {
253 /* could use a vstub here */
254 return -EFAULT;
255 }
256
257 if (err)
258 return -EFAULT;
259
260 /* Set up registers for signal handler */
261 regs->di = sig;
262 /* In case the signal handler was declared without prototypes */
263 regs->ax = 0;
264
265 /* This also works for non SA_SIGINFO handlers because they expect the
266 next argument after the signal number on the stack. */
267 regs->si = (unsigned long)&frame->info;
268 regs->dx = (unsigned long)&frame->uc;
269 regs->ip = (unsigned long) ka->sa.sa_handler;
270
271 regs->sp = (unsigned long)frame;
272
273 /* Set up the CS register to run signal handlers in 64-bit mode,
274 even if the handler happens to be interrupting 32-bit code. */
275 regs->cs = __USER_CS;
276
277 return 0;
278}
279
280/*
281 * OK, we're invoking a handler
282 */
283static int signr_convert(int sig)
284{
285 return sig;
286}
287
288#ifdef CONFIG_IA32_EMULATION
289#define is_ia32 test_thread_flag(TIF_IA32)
290#else
291#define is_ia32 0
292#endif
293
294static int
295setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
296 sigset_t *set, struct pt_regs *regs)
297{
298 int usig = signr_convert(sig);
299 int ret;
300
301 /* Set up the stack frame */
302 if (is_ia32) {
303 if (ka->sa.sa_flags & SA_SIGINFO)
304 ret = ia32_setup_rt_frame(usig, ka, info, set, regs);
305 else
306 ret = ia32_setup_frame(usig, ka, set, regs);
307 } else
308 ret = __setup_rt_frame(sig, ka, info, set, regs);
309
310 if (ret) {
311 force_sigsegv(sig, current);
312 return -EFAULT;
313 }
314
315 return ret;
316}
317
318static int
319handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
320 sigset_t *oldset, struct pt_regs *regs)
321{
322 int ret;
323
324 /* Are we from a system call? */
325 if (syscall_get_nr(current, regs) >= 0) {
326 /* If so, check system call restarting.. */
327 switch (syscall_get_error(current, regs)) {
328 case -ERESTART_RESTARTBLOCK:
329 case -ERESTARTNOHAND:
330 regs->ax = -EINTR;
331 break;
332
333 case -ERESTARTSYS:
334 if (!(ka->sa.sa_flags & SA_RESTART)) {
335 regs->ax = -EINTR;
336 break;
337 }
338 /* fallthrough */
339 case -ERESTARTNOINTR:
340 regs->ax = regs->orig_ax;
341 regs->ip -= 2;
342 break;
343 }
344 }
345
346 /*
347 * If TF is set due to a debugger (TIF_FORCED_TF), clear the TF
348 * flag so that register information in the sigcontext is correct.
349 */
350 if (unlikely(regs->flags & X86_EFLAGS_TF) &&
351 likely(test_and_clear_thread_flag(TIF_FORCED_TF)))
352 regs->flags &= ~X86_EFLAGS_TF;
353
354 ret = setup_rt_frame(sig, ka, info, oldset, regs);
355
356 if (ret)
357 return ret;
358
359#ifdef CONFIG_X86_64
360 /*
361 * This has nothing to do with segment registers,
362 * despite the name. This magic affects uaccess.h
363 * macros' behavior. Reset it to the normal setting.
364 */
365 set_fs(USER_DS);
366#endif
367
368 /*
369 * Clear the direction flag as per the ABI for function entry.
370 */
371 regs->flags &= ~X86_EFLAGS_DF;
372
373 /*
374 * Clear TF when entering the signal handler, but
375 * notify any tracer that was single-stepping it.
376 * The tracer may want to single-step inside the
377 * handler too.
378 */
379 regs->flags &= ~X86_EFLAGS_TF;
380
381 spin_lock_irq(&current->sighand->siglock);
382 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
383 if (!(ka->sa.sa_flags & SA_NODEFER))
384 sigaddset(&current->blocked, sig);
385 recalc_sigpending();
386 spin_unlock_irq(&current->sighand->siglock);
387
388 tracehook_signal_handler(sig, info, ka, regs,
389 test_thread_flag(TIF_SINGLESTEP));
390
391 return 0;
392}
393
394#define NR_restart_syscall \
395 test_thread_flag(TIF_IA32) ? __NR_ia32_restart_syscall : __NR_restart_syscall
396/*
397 * Note that 'init' is a special process: it doesn't get signals it doesn't
398 * want to handle. Thus you cannot kill init even with a SIGKILL even by
399 * mistake.
400 */
401static void do_signal(struct pt_regs *regs)
402{
403 struct k_sigaction ka;
404 siginfo_t info;
405 int signr;
406 sigset_t *oldset;
407
408 /*
409 * We want the common case to go fast, which is why we may in certain
410 * cases get here from kernel mode. Just return without doing anything
411 * if so.
412 * X86_32: vm86 regs switched out by assembly code before reaching
413 * here, so testing against kernel CS suffices.
414 */
415 if (!user_mode(regs))
416 return;
417
418 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
419 oldset = &current->saved_sigmask;
420 else
421 oldset = &current->blocked;
422
423 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
424 if (signr > 0) {
425 /*
426 * Re-enable any watchpoints before delivering the
427 * signal to user space. The processor register will
428 * have been cleared if the watchpoint triggered
429 * inside the kernel.
430 */
431 if (current->thread.debugreg7)
432 set_debugreg(current->thread.debugreg7, 7);
433
434 /* Whee! Actually deliver the signal. */
435 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
436 /*
437 * A signal was successfully delivered; the saved
438 * sigmask will have been stored in the signal frame,
439 * and will be restored by sigreturn, so we can simply
440 * clear the TS_RESTORE_SIGMASK flag.
441 */
442 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
443 }
444 return;
445 }
446
447 /* Did we come from a system call? */
448 if (syscall_get_nr(current, regs) >= 0) {
449 /* Restart the system call - no handlers present */
450 switch (syscall_get_error(current, regs)) {
451 case -ERESTARTNOHAND:
452 case -ERESTARTSYS:
453 case -ERESTARTNOINTR:
454 regs->ax = regs->orig_ax;
455 regs->ip -= 2;
456 break;
457
458 case -ERESTART_RESTARTBLOCK:
459 regs->ax = NR_restart_syscall;
460 regs->ip -= 2;
461 break;
462 }
463 }
464
465 /*
466 * If there's no signal to deliver, we just put the saved sigmask
467 * back.
468 */
469 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
470 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
471 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
472 }
473}
474
475/*
476 * notification of userspace execution resumption
477 * - triggered by the TIF_WORK_MASK flags
478 */
479void
480do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
481{
482#if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
483 /* notify userspace of pending MCEs */
484 if (thread_info_flags & _TIF_MCE_NOTIFY)
485 mce_notify_user();
486#endif /* CONFIG_X86_64 && CONFIG_X86_MCE */
487
488 /* deal with pending signal delivery */
489 if (thread_info_flags & _TIF_SIGPENDING)
490 do_signal(regs);
491
492 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
493 clear_thread_flag(TIF_NOTIFY_RESUME);
494 tracehook_notify_resume(regs);
495 }
496
497#ifdef CONFIG_X86_32
498 clear_thread_flag(TIF_IRET);
499#endif /* CONFIG_X86_32 */
500}
501
502void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
503{
504 struct task_struct *me = current;
505
506 if (show_unhandled_signals && printk_ratelimit()) {
507 printk(KERN_INFO
508 "%s[%d] bad frame in %s frame:%p ip:%lx sp:%lx orax:%lx",
509 me->comm, me->pid, where, frame,
510 regs->ip, regs->sp, regs->orig_ax);
511 print_vma_addr(" in ", regs->ip);
512 printk(KERN_CONT "\n");
513 }
514
515 force_sig(SIGSEGV, me);
516}
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 18f9b19f5f8f..7e558db362c1 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -140,19 +140,6 @@ void native_send_call_func_ipi(cpumask_t mask)
140 send_IPI_mask(mask, CALL_FUNCTION_VECTOR); 140 send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
141} 141}
142 142
143static void stop_this_cpu(void *dummy)
144{
145 local_irq_disable();
146 /*
147 * Remove this CPU:
148 */
149 cpu_clear(smp_processor_id(), cpu_online_map);
150 disable_local_APIC();
151 if (hlt_works(smp_processor_id()))
152 for (;;) halt();
153 for (;;);
154}
155
156/* 143/*
157 * this function calls the 'stop' function on all other CPUs in the system. 144 * this function calls the 'stop' function on all other CPUs in the system.
158 */ 145 */
@@ -178,11 +165,7 @@ static void native_smp_send_stop(void)
178void smp_reschedule_interrupt(struct pt_regs *regs) 165void smp_reschedule_interrupt(struct pt_regs *regs)
179{ 166{
180 ack_APIC_irq(); 167 ack_APIC_irq();
181#ifdef CONFIG_X86_32 168 inc_irq_stat(irq_resched_count);
182 __get_cpu_var(irq_stat).irq_resched_count++;
183#else
184 add_pda(irq_resched_count, 1);
185#endif
186} 169}
187 170
188void smp_call_function_interrupt(struct pt_regs *regs) 171void smp_call_function_interrupt(struct pt_regs *regs)
@@ -190,11 +173,7 @@ void smp_call_function_interrupt(struct pt_regs *regs)
190 ack_APIC_irq(); 173 ack_APIC_irq();
191 irq_enter(); 174 irq_enter();
192 generic_smp_call_function_interrupt(); 175 generic_smp_call_function_interrupt();
193#ifdef CONFIG_X86_32 176 inc_irq_stat(irq_call_count);
194 __get_cpu_var(irq_stat).irq_call_count++;
195#else
196 add_pda(irq_call_count, 1);
197#endif
198 irq_exit(); 177 irq_exit();
199} 178}
200 179
@@ -203,11 +182,7 @@ void smp_call_function_single_interrupt(struct pt_regs *regs)
203 ack_APIC_irq(); 182 ack_APIC_irq();
204 irq_enter(); 183 irq_enter();
205 generic_smp_call_function_single_interrupt(); 184 generic_smp_call_function_single_interrupt();
206#ifdef CONFIG_X86_32 185 inc_irq_stat(irq_call_count);
207 __get_cpu_var(irq_stat).irq_call_count++;
208#else
209 add_pda(irq_call_count, 1);
210#endif
211 irq_exit(); 186 irq_exit();
212} 187}
213 188
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index d5274b6b088e..c5392058cd07 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -62,6 +62,7 @@
62#include <asm/mtrr.h> 62#include <asm/mtrr.h>
63#include <asm/vmi.h> 63#include <asm/vmi.h>
64#include <asm/genapic.h> 64#include <asm/genapic.h>
65#include <asm/setup.h>
65#include <linux/mc146818rtc.h> 66#include <linux/mc146818rtc.h>
66 67
67#include <mach_apic.h> 68#include <mach_apic.h>
@@ -281,16 +282,14 @@ static int __cpuinitdata unsafe_smp;
281/* 282/*
282 * Activate a secondary processor. 283 * Activate a secondary processor.
283 */ 284 */
284static void __cpuinit start_secondary(void *unused) 285notrace static void __cpuinit start_secondary(void *unused)
285{ 286{
286 /* 287 /*
287 * Don't put *anything* before cpu_init(), SMP booting is too 288 * Don't put *anything* before cpu_init(), SMP booting is too
288 * fragile that we want to limit the things done here to the 289 * fragile that we want to limit the things done here to the
289 * most necessary things. 290 * most necessary things.
290 */ 291 */
291#ifdef CONFIG_VMI
292 vmi_bringup(); 292 vmi_bringup();
293#endif
294 cpu_init(); 293 cpu_init();
295 preempt_disable(); 294 preempt_disable();
296 smp_callin(); 295 smp_callin();
@@ -535,7 +534,7 @@ static void impress_friends(void)
535 pr_debug("Before bogocount - setting activated=1.\n"); 534 pr_debug("Before bogocount - setting activated=1.\n");
536} 535}
537 536
538static inline void __inquire_remote_apic(int apicid) 537void __inquire_remote_apic(int apicid)
539{ 538{
540 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 }; 539 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
541 char *names[] = { "ID", "VERSION", "SPIV" }; 540 char *names[] = { "ID", "VERSION", "SPIV" };
@@ -574,14 +573,13 @@ static inline void __inquire_remote_apic(int apicid)
574 } 573 }
575} 574}
576 575
577#ifdef WAKE_SECONDARY_VIA_NMI
578/* 576/*
579 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal 577 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
580 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this 578 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
581 * won't ... remember to clear down the APIC, etc later. 579 * won't ... remember to clear down the APIC, etc later.
582 */ 580 */
583static int __devinit 581int __devinit
584wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) 582wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
585{ 583{
586 unsigned long send_status, accept_status = 0; 584 unsigned long send_status, accept_status = 0;
587 int maxlvt; 585 int maxlvt;
@@ -598,7 +596,7 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
598 * Give the other CPU some time to accept the IPI. 596 * Give the other CPU some time to accept the IPI.
599 */ 597 */
600 udelay(200); 598 udelay(200);
601 if (APIC_INTEGRATED(apic_version[phys_apicid])) { 599 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
602 maxlvt = lapic_get_maxlvt(); 600 maxlvt = lapic_get_maxlvt();
603 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ 601 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
604 apic_write(APIC_ESR, 0); 602 apic_write(APIC_ESR, 0);
@@ -613,11 +611,9 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
613 611
614 return (send_status | accept_status); 612 return (send_status | accept_status);
615} 613}
616#endif /* WAKE_SECONDARY_VIA_NMI */
617 614
618#ifdef WAKE_SECONDARY_VIA_INIT 615int __devinit
619static int __devinit 616wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
620wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
621{ 617{
622 unsigned long send_status, accept_status = 0; 618 unsigned long send_status, accept_status = 0;
623 int maxlvt, num_starts, j; 619 int maxlvt, num_starts, j;
@@ -736,7 +732,6 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
736 732
737 return (send_status | accept_status); 733 return (send_status | accept_status);
738} 734}
739#endif /* WAKE_SECONDARY_VIA_INIT */
740 735
741struct create_idle { 736struct create_idle {
742 struct work_struct work; 737 struct work_struct work;
@@ -1085,8 +1080,10 @@ static int __init smp_sanity_check(unsigned max_cpus)
1085#endif 1080#endif
1086 1081
1087 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { 1082 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1088 printk(KERN_WARNING "weird, boot CPU (#%d) not listed" 1083 printk(KERN_WARNING
1089 "by the BIOS.\n", hard_smp_processor_id()); 1084 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1085 hard_smp_processor_id());
1086
1090 physid_set(hard_smp_processor_id(), phys_cpu_present_map); 1087 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1091 } 1088 }
1092 1089
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index a03e7f6d90c3..10786af95545 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -6,6 +6,7 @@
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/stacktrace.h> 7#include <linux/stacktrace.h>
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/uaccess.h>
9#include <asm/stacktrace.h> 10#include <asm/stacktrace.h>
10 11
11static void save_stack_warning(void *data, char *msg) 12static void save_stack_warning(void *data, char *msg)
@@ -83,3 +84,66 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
83 trace->entries[trace->nr_entries++] = ULONG_MAX; 84 trace->entries[trace->nr_entries++] = ULONG_MAX;
84} 85}
85EXPORT_SYMBOL_GPL(save_stack_trace_tsk); 86EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
87
88/* Userspace stacktrace - based on kernel/trace/trace_sysprof.c */
89
90struct stack_frame {
91 const void __user *next_fp;
92 unsigned long ret_addr;
93};
94
95static int copy_stack_frame(const void __user *fp, struct stack_frame *frame)
96{
97 int ret;
98
99 if (!access_ok(VERIFY_READ, fp, sizeof(*frame)))
100 return 0;
101
102 ret = 1;
103 pagefault_disable();
104 if (__copy_from_user_inatomic(frame, fp, sizeof(*frame)))
105 ret = 0;
106 pagefault_enable();
107
108 return ret;
109}
110
111static inline void __save_stack_trace_user(struct stack_trace *trace)
112{
113 const struct pt_regs *regs = task_pt_regs(current);
114 const void __user *fp = (const void __user *)regs->bp;
115
116 if (trace->nr_entries < trace->max_entries)
117 trace->entries[trace->nr_entries++] = regs->ip;
118
119 while (trace->nr_entries < trace->max_entries) {
120 struct stack_frame frame;
121
122 frame.next_fp = NULL;
123 frame.ret_addr = 0;
124 if (!copy_stack_frame(fp, &frame))
125 break;
126 if ((unsigned long)fp < regs->sp)
127 break;
128 if (frame.ret_addr) {
129 trace->entries[trace->nr_entries++] =
130 frame.ret_addr;
131 }
132 if (fp == frame.next_fp)
133 break;
134 fp = frame.next_fp;
135 }
136}
137
138void save_stack_trace_user(struct stack_trace *trace)
139{
140 /*
141 * Trace user stack if we are not a kernel thread
142 */
143 if (current->mm) {
144 __save_stack_trace_user(trace);
145 }
146 if (trace->nr_entries < trace->max_entries)
147 trace->entries[trace->nr_entries++] = ULONG_MAX;
148}
149
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 77b400f06ea2..65309e4cb1c0 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(profile_pc);
75irqreturn_t timer_interrupt(int irq, void *dev_id) 75irqreturn_t timer_interrupt(int irq, void *dev_id)
76{ 76{
77 /* Keep nmi watchdog up to date */ 77 /* Keep nmi watchdog up to date */
78 per_cpu(irq_stat, smp_processor_id()).irq0_irqs++; 78 inc_irq_stat(irq0_irqs);
79 79
80#ifdef CONFIG_X86_IO_APIC 80#ifdef CONFIG_X86_IO_APIC
81 if (timer_ack) { 81 if (timer_ack) {
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index cb19d650c216..891e7a7c4334 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -49,9 +49,9 @@ unsigned long profile_pc(struct pt_regs *regs)
49} 49}
50EXPORT_SYMBOL(profile_pc); 50EXPORT_SYMBOL(profile_pc);
51 51
52irqreturn_t timer_interrupt(int irq, void *dev_id) 52static irqreturn_t timer_interrupt(int irq, void *dev_id)
53{ 53{
54 add_pda(irq0_irqs, 1); 54 inc_irq_stat(irq0_irqs);
55 55
56 global_clock_event->event_handler(global_clock_event); 56 global_clock_event->event_handler(global_clock_event);
57 57
@@ -80,6 +80,8 @@ unsigned long __init calibrate_cpu(void)
80 break; 80 break;
81 no_ctr_free = (i == 4); 81 no_ctr_free = (i == 4);
82 if (no_ctr_free) { 82 if (no_ctr_free) {
83 WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
84 "cpu_khz value may be incorrect.\n");
83 i = 3; 85 i = 3;
84 rdmsrl(MSR_K7_EVNTSEL3, evntsel3); 86 rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
85 wrmsrl(MSR_K7_EVNTSEL3, 0); 87 wrmsrl(MSR_K7_EVNTSEL3, 0);
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c
index f4049f3513b6..8da059f949be 100644
--- a/arch/x86/kernel/tlb_32.c
+++ b/arch/x86/kernel/tlb_32.c
@@ -34,9 +34,8 @@ static DEFINE_SPINLOCK(tlbstate_lock);
34 */ 34 */
35void leave_mm(int cpu) 35void leave_mm(int cpu)
36{ 36{
37 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) 37 BUG_ON(x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK);
38 BUG(); 38 cpu_clear(cpu, x86_read_percpu(cpu_tlbstate.active_mm)->cpu_vm_mask);
39 cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
40 load_cr3(swapper_pg_dir); 39 load_cr3(swapper_pg_dir);
41} 40}
42EXPORT_SYMBOL_GPL(leave_mm); 41EXPORT_SYMBOL_GPL(leave_mm);
@@ -104,8 +103,8 @@ void smp_invalidate_interrupt(struct pt_regs *regs)
104 * BUG(); 103 * BUG();
105 */ 104 */
106 105
107 if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) { 106 if (flush_mm == x86_read_percpu(cpu_tlbstate.active_mm)) {
108 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) { 107 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) {
109 if (flush_va == TLB_FLUSH_ALL) 108 if (flush_va == TLB_FLUSH_ALL)
110 local_flush_tlb(); 109 local_flush_tlb();
111 else 110 else
@@ -119,7 +118,7 @@ void smp_invalidate_interrupt(struct pt_regs *regs)
119 smp_mb__after_clear_bit(); 118 smp_mb__after_clear_bit();
120out: 119out:
121 put_cpu_no_resched(); 120 put_cpu_no_resched();
122 __get_cpu_var(irq_stat).irq_tlb_count++; 121 inc_irq_stat(irq_tlb_count);
123} 122}
124 123
125void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, 124void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
@@ -238,7 +237,7 @@ static void do_flush_tlb_all(void *info)
238 unsigned long cpu = smp_processor_id(); 237 unsigned long cpu = smp_processor_id();
239 238
240 __flush_tlb_all(); 239 __flush_tlb_all();
241 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY) 240 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_LAZY)
242 leave_mm(cpu); 241 leave_mm(cpu);
243} 242}
244 243
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/kernel/tlb_64.c
index 8f919ca69494..29887d7081a9 100644
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/kernel/tlb_64.c
@@ -154,7 +154,7 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
154out: 154out:
155 ack_APIC_irq(); 155 ack_APIC_irq();
156 cpu_clear(cpu, f->flush_cpumask); 156 cpu_clear(cpu, f->flush_cpumask);
157 add_pda(irq_tlb_count, 1); 157 inc_irq_stat(irq_tlb_count);
158} 158}
159 159
160void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, 160void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 04431f34fd16..6a00e5faaa74 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -566,14 +566,10 @@ static int __init uv_ptc_init(void)
566 if (!is_uv_system()) 566 if (!is_uv_system())
567 return 0; 567 return 0;
568 568
569 if (!proc_mkdir("sgi_uv", NULL))
570 return -EINVAL;
571
572 proc_uv_ptc = create_proc_entry(UV_PTC_BASENAME, 0444, NULL); 569 proc_uv_ptc = create_proc_entry(UV_PTC_BASENAME, 0444, NULL);
573 if (!proc_uv_ptc) { 570 if (!proc_uv_ptc) {
574 printk(KERN_ERR "unable to create %s proc entry\n", 571 printk(KERN_ERR "unable to create %s proc entry\n",
575 UV_PTC_BASENAME); 572 UV_PTC_BASENAME);
576 remove_proc_entry("sgi_uv", NULL);
577 return -EINVAL; 573 return -EINVAL;
578 } 574 }
579 proc_uv_ptc->proc_fops = &proc_uv_ptc_operations; 575 proc_uv_ptc->proc_fops = &proc_uv_ptc_operations;
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c
index 1106fac6024d..808031a5ba19 100644
--- a/arch/x86/kernel/trampoline.c
+++ b/arch/x86/kernel/trampoline.c
@@ -1,10 +1,26 @@
1#include <linux/io.h> 1#include <linux/io.h>
2 2
3#include <asm/trampoline.h> 3#include <asm/trampoline.h>
4#include <asm/e820.h>
4 5
5/* ready for x86_64 and x86 */ 6/* ready for x86_64 and x86 */
6unsigned char *trampoline_base = __va(TRAMPOLINE_BASE); 7unsigned char *trampoline_base = __va(TRAMPOLINE_BASE);
7 8
9void __init reserve_trampoline_memory(void)
10{
11#ifdef CONFIG_X86_32
12 /*
13 * But first pinch a few for the stack/trampoline stuff
14 * FIXME: Don't need the extra page at 4K, but need to fix
15 * trampoline before removing it. (see the GDT stuff)
16 */
17 reserve_early(PAGE_SIZE, PAGE_SIZE + PAGE_SIZE, "EX TRAMPOLINE");
18#endif
19 /* Has to be in very low memory so we can execute real-mode AP code. */
20 reserve_early(TRAMPOLINE_BASE, TRAMPOLINE_BASE + TRAMPOLINE_SIZE,
21 "TRAMPOLINE");
22}
23
8/* 24/*
9 * Currently trivial. Write the real->protected mode 25 * Currently trivial. Write the real->protected mode
10 * bootstrap into the page concerned. The caller 26 * bootstrap into the page concerned. The caller
@@ -12,7 +28,6 @@ unsigned char *trampoline_base = __va(TRAMPOLINE_BASE);
12 */ 28 */
13unsigned long setup_trampoline(void) 29unsigned long setup_trampoline(void)
14{ 30{
15 memcpy(trampoline_base, trampoline_data, 31 memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE);
16 trampoline_end - trampoline_data);
17 return virt_to_phys(trampoline_base); 32 return virt_to_phys(trampoline_base);
18} 33}
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 04d242ab0161..141907ab6e22 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -481,11 +481,7 @@ do_nmi(struct pt_regs *regs, long error_code)
481{ 481{
482 nmi_enter(); 482 nmi_enter();
483 483
484#ifdef CONFIG_X86_32 484 inc_irq_stat(__nmi_count);
485 { int cpu; cpu = smp_processor_id(); ++nmi_count(cpu); }
486#else
487 add_pda(__nmi_count, 1);
488#endif
489 485
490 if (!ignore_nmis) 486 if (!ignore_nmis)
491 default_do_nmi(regs); 487 default_do_nmi(regs);
@@ -664,7 +660,7 @@ void math_error(void __user *ip)
664{ 660{
665 struct task_struct *task; 661 struct task_struct *task;
666 siginfo_t info; 662 siginfo_t info;
667 unsigned short cwd, swd; 663 unsigned short cwd, swd, err;
668 664
669 /* 665 /*
670 * Save the info for the exception handler and clear the error. 666 * Save the info for the exception handler and clear the error.
@@ -675,7 +671,6 @@ void math_error(void __user *ip)
675 task->thread.error_code = 0; 671 task->thread.error_code = 0;
676 info.si_signo = SIGFPE; 672 info.si_signo = SIGFPE;
677 info.si_errno = 0; 673 info.si_errno = 0;
678 info.si_code = __SI_FAULT;
679 info.si_addr = ip; 674 info.si_addr = ip;
680 /* 675 /*
681 * (~cwd & swd) will mask out exceptions that are not set to unmasked 676 * (~cwd & swd) will mask out exceptions that are not set to unmasked
@@ -689,34 +684,31 @@ void math_error(void __user *ip)
689 */ 684 */
690 cwd = get_fpu_cwd(task); 685 cwd = get_fpu_cwd(task);
691 swd = get_fpu_swd(task); 686 swd = get_fpu_swd(task);
692 switch (swd & ~cwd & 0x3f) { 687
693 case 0x000: /* No unmasked exception */ 688 err = swd & ~cwd & 0x3f;
689
694#ifdef CONFIG_X86_32 690#ifdef CONFIG_X86_32
691 if (!err)
695 return; 692 return;
696#endif 693#endif
697 default: /* Multiple exceptions */ 694
698 break; 695 if (err & 0x001) { /* Invalid op */
699 case 0x001: /* Invalid Op */
700 /* 696 /*
701 * swd & 0x240 == 0x040: Stack Underflow 697 * swd & 0x240 == 0x040: Stack Underflow
702 * swd & 0x240 == 0x240: Stack Overflow 698 * swd & 0x240 == 0x240: Stack Overflow
703 * User must clear the SF bit (0x40) if set 699 * User must clear the SF bit (0x40) if set
704 */ 700 */
705 info.si_code = FPE_FLTINV; 701 info.si_code = FPE_FLTINV;
706 break; 702 } else if (err & 0x004) { /* Divide by Zero */
707 case 0x002: /* Denormalize */
708 case 0x010: /* Underflow */
709 info.si_code = FPE_FLTUND;
710 break;
711 case 0x004: /* Zero Divide */
712 info.si_code = FPE_FLTDIV; 703 info.si_code = FPE_FLTDIV;
713 break; 704 } else if (err & 0x008) { /* Overflow */
714 case 0x008: /* Overflow */
715 info.si_code = FPE_FLTOVF; 705 info.si_code = FPE_FLTOVF;
716 break; 706 } else if (err & 0x012) { /* Denormal, Underflow */
717 case 0x020: /* Precision */ 707 info.si_code = FPE_FLTUND;
708 } else if (err & 0x020) { /* Precision */
718 info.si_code = FPE_FLTRES; 709 info.si_code = FPE_FLTRES;
719 break; 710 } else {
711 info.si_code = __SI_FAULT|SI_KERNEL; /* WTF? */
720 } 712 }
721 force_sig_info(SIGFPE, &info, task); 713 force_sig_info(SIGFPE, &info, task);
722} 714}
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 424093b157d3..599e58168631 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -15,6 +15,7 @@
15#include <asm/vgtod.h> 15#include <asm/vgtod.h>
16#include <asm/time.h> 16#include <asm/time.h>
17#include <asm/delay.h> 17#include <asm/delay.h>
18#include <asm/hypervisor.h>
18 19
19unsigned int cpu_khz; /* TSC clocks / usec, not used here */ 20unsigned int cpu_khz; /* TSC clocks / usec, not used here */
20EXPORT_SYMBOL(cpu_khz); 21EXPORT_SYMBOL(cpu_khz);
@@ -31,6 +32,7 @@ static int tsc_unstable;
31 erroneous rdtsc usage on !cpu_has_tsc processors */ 32 erroneous rdtsc usage on !cpu_has_tsc processors */
32static int tsc_disabled = -1; 33static int tsc_disabled = -1;
33 34
35static int tsc_clocksource_reliable;
34/* 36/*
35 * Scheduler clock - returns current time in nanosec units. 37 * Scheduler clock - returns current time in nanosec units.
36 */ 38 */
@@ -98,6 +100,15 @@ int __init notsc_setup(char *str)
98 100
99__setup("notsc", notsc_setup); 101__setup("notsc", notsc_setup);
100 102
103static int __init tsc_setup(char *str)
104{
105 if (!strcmp(str, "reliable"))
106 tsc_clocksource_reliable = 1;
107 return 1;
108}
109
110__setup("tsc=", tsc_setup);
111
101#define MAX_RETRIES 5 112#define MAX_RETRIES 5
102#define SMI_TRESHOLD 50000 113#define SMI_TRESHOLD 50000
103 114
@@ -352,9 +363,15 @@ unsigned long native_calibrate_tsc(void)
352{ 363{
353 u64 tsc1, tsc2, delta, ref1, ref2; 364 u64 tsc1, tsc2, delta, ref1, ref2;
354 unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; 365 unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
355 unsigned long flags, latch, ms, fast_calibrate; 366 unsigned long flags, latch, ms, fast_calibrate, tsc_khz;
356 int hpet = is_hpet_enabled(), i, loopmin; 367 int hpet = is_hpet_enabled(), i, loopmin;
357 368
369 tsc_khz = get_hypervisor_tsc_freq();
370 if (tsc_khz) {
371 printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
372 return tsc_khz;
373 }
374
358 local_irq_save(flags); 375 local_irq_save(flags);
359 fast_calibrate = quick_pit_calibrate(); 376 fast_calibrate = quick_pit_calibrate();
360 local_irq_restore(flags); 377 local_irq_restore(flags);
@@ -731,24 +748,21 @@ static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
731 {} 748 {}
732}; 749};
733 750
734/* 751static void __init check_system_tsc_reliable(void)
735 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC 752{
736 */
737#ifdef CONFIG_MGEODE_LX 753#ifdef CONFIG_MGEODE_LX
738/* RTSC counts during suspend */ 754 /* RTSC counts during suspend */
739#define RTSC_SUSP 0x100 755#define RTSC_SUSP 0x100
740
741static void __init check_geode_tsc_reliable(void)
742{
743 unsigned long res_low, res_high; 756 unsigned long res_low, res_high;
744 757
745 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high); 758 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
759 /* Geode_LX - the OLPC CPU has a possibly a very reliable TSC */
746 if (res_low & RTSC_SUSP) 760 if (res_low & RTSC_SUSP)
747 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY; 761 tsc_clocksource_reliable = 1;
748}
749#else
750static inline void check_geode_tsc_reliable(void) { }
751#endif 762#endif
763 if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
764 tsc_clocksource_reliable = 1;
765}
752 766
753/* 767/*
754 * Make an educated guess if the TSC is trustworthy and synchronized 768 * Make an educated guess if the TSC is trustworthy and synchronized
@@ -783,6 +797,8 @@ static void __init init_tsc_clocksource(void)
783{ 797{
784 clocksource_tsc.mult = clocksource_khz2mult(tsc_khz, 798 clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
785 clocksource_tsc.shift); 799 clocksource_tsc.shift);
800 if (tsc_clocksource_reliable)
801 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
786 /* lower the rating if we already know its unstable: */ 802 /* lower the rating if we already know its unstable: */
787 if (check_tsc_unstable()) { 803 if (check_tsc_unstable()) {
788 clocksource_tsc.rating = 0; 804 clocksource_tsc.rating = 0;
@@ -843,7 +859,7 @@ void __init tsc_init(void)
843 if (unsynchronized_tsc()) 859 if (unsynchronized_tsc())
844 mark_tsc_unstable("TSCs unsynchronized"); 860 mark_tsc_unstable("TSCs unsynchronized");
845 861
846 check_geode_tsc_reliable(); 862 check_system_tsc_reliable();
847 init_tsc_clocksource(); 863 init_tsc_clocksource();
848} 864}
849 865
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 1c0dfbca87c1..bf36328f6ef9 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -112,6 +112,12 @@ void __cpuinit check_tsc_sync_source(int cpu)
112 if (unsynchronized_tsc()) 112 if (unsynchronized_tsc())
113 return; 113 return;
114 114
115 if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
116 printk(KERN_INFO
117 "Skipping synchronization checks as TSC is reliable.\n");
118 return;
119 }
120
115 printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:", 121 printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:",
116 smp_processor_id(), cpu); 122 smp_processor_id(), cpu);
117 123
@@ -165,7 +171,7 @@ void __cpuinit check_tsc_sync_target(void)
165{ 171{
166 int cpus = 2; 172 int cpus = 2;
167 173
168 if (unsynchronized_tsc()) 174 if (unsynchronized_tsc() || boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
169 return; 175 return;
170 176
171 /* 177 /*
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 8b6c393ab9fd..23206ba16874 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -266,109 +266,6 @@ static void vmi_nop(void)
266{ 266{
267} 267}
268 268
269#ifdef CONFIG_DEBUG_PAGE_TYPE
270
271#ifdef CONFIG_X86_PAE
272#define MAX_BOOT_PTS (2048+4+1)
273#else
274#define MAX_BOOT_PTS (1024+1)
275#endif
276
277/*
278 * During boot, mem_map is not yet available in paging_init, so stash
279 * all the boot page allocations here.
280 */
281static struct {
282 u32 pfn;
283 int type;
284} boot_page_allocations[MAX_BOOT_PTS];
285static int num_boot_page_allocations;
286static int boot_allocations_applied;
287
288void vmi_apply_boot_page_allocations(void)
289{
290 int i;
291 BUG_ON(!mem_map);
292 for (i = 0; i < num_boot_page_allocations; i++) {
293 struct page *page = pfn_to_page(boot_page_allocations[i].pfn);
294 page->type = boot_page_allocations[i].type;
295 page->type = boot_page_allocations[i].type &
296 ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
297 }
298 boot_allocations_applied = 1;
299}
300
301static void record_page_type(u32 pfn, int type)
302{
303 BUG_ON(num_boot_page_allocations >= MAX_BOOT_PTS);
304 boot_page_allocations[num_boot_page_allocations].pfn = pfn;
305 boot_page_allocations[num_boot_page_allocations].type = type;
306 num_boot_page_allocations++;
307}
308
309static void check_zeroed_page(u32 pfn, int type, struct page *page)
310{
311 u32 *ptr;
312 int i;
313 int limit = PAGE_SIZE / sizeof(int);
314
315 if (page_address(page))
316 ptr = (u32 *)page_address(page);
317 else
318 ptr = (u32 *)__va(pfn << PAGE_SHIFT);
319 /*
320 * When cloning the root in non-PAE mode, only the userspace
321 * pdes need to be zeroed.
322 */
323 if (type & VMI_PAGE_CLONE)
324 limit = KERNEL_PGD_BOUNDARY;
325 for (i = 0; i < limit; i++)
326 BUG_ON(ptr[i]);
327}
328
329/*
330 * We stash the page type into struct page so we can verify the page
331 * types are used properly.
332 */
333static void vmi_set_page_type(u32 pfn, int type)
334{
335 /* PAE can have multiple roots per page - don't track */
336 if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
337 return;
338
339 if (boot_allocations_applied) {
340 struct page *page = pfn_to_page(pfn);
341 if (type != VMI_PAGE_NORMAL)
342 BUG_ON(page->type);
343 else
344 BUG_ON(page->type == VMI_PAGE_NORMAL);
345 page->type = type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
346 if (type & VMI_PAGE_ZEROED)
347 check_zeroed_page(pfn, type, page);
348 } else {
349 record_page_type(pfn, type);
350 }
351}
352
353static void vmi_check_page_type(u32 pfn, int type)
354{
355 /* PAE can have multiple roots per page - skip checks */
356 if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
357 return;
358
359 type &= ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
360 if (boot_allocations_applied) {
361 struct page *page = pfn_to_page(pfn);
362 BUG_ON((page->type ^ type) & VMI_PAGE_PAE);
363 BUG_ON(type == VMI_PAGE_NORMAL && page->type);
364 BUG_ON((type & page->type) == 0);
365 }
366}
367#else
368#define vmi_set_page_type(p,t) do { } while (0)
369#define vmi_check_page_type(p,t) do { } while (0)
370#endif
371
372#ifdef CONFIG_HIGHPTE 269#ifdef CONFIG_HIGHPTE
373static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type) 270static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type)
374{ 271{
@@ -395,7 +292,6 @@ static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type)
395 292
396static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn) 293static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn)
397{ 294{
398 vmi_set_page_type(pfn, VMI_PAGE_L1);
399 vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0); 295 vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0);
400} 296}
401 297
@@ -406,27 +302,22 @@ static void vmi_allocate_pmd(struct mm_struct *mm, unsigned long pfn)
406 * It is called only for swapper_pg_dir, which already has 302 * It is called only for swapper_pg_dir, which already has
407 * data on it. 303 * data on it.
408 */ 304 */
409 vmi_set_page_type(pfn, VMI_PAGE_L2);
410 vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0); 305 vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0);
411} 306}
412 307
413static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count) 308static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count)
414{ 309{
415 vmi_set_page_type(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE);
416 vmi_check_page_type(clonepfn, VMI_PAGE_L2);
417 vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count); 310 vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count);
418} 311}
419 312
420static void vmi_release_pte(unsigned long pfn) 313static void vmi_release_pte(unsigned long pfn)
421{ 314{
422 vmi_ops.release_page(pfn, VMI_PAGE_L1); 315 vmi_ops.release_page(pfn, VMI_PAGE_L1);
423 vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
424} 316}
425 317
426static void vmi_release_pmd(unsigned long pfn) 318static void vmi_release_pmd(unsigned long pfn)
427{ 319{
428 vmi_ops.release_page(pfn, VMI_PAGE_L2); 320 vmi_ops.release_page(pfn, VMI_PAGE_L2);
429 vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
430} 321}
431 322
432/* 323/*
@@ -450,26 +341,22 @@ static void vmi_release_pmd(unsigned long pfn)
450 341
451static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 342static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
452{ 343{
453 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
454 vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); 344 vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
455} 345}
456 346
457static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 347static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
458{ 348{
459 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
460 vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0)); 349 vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0));
461} 350}
462 351
463static void vmi_set_pte(pte_t *ptep, pte_t pte) 352static void vmi_set_pte(pte_t *ptep, pte_t pte)
464{ 353{
465 /* XXX because of set_pmd_pte, this can be called on PT or PD layers */ 354 /* XXX because of set_pmd_pte, this can be called on PT or PD layers */
466 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE | VMI_PAGE_PD);
467 vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT); 355 vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT);
468} 356}
469 357
470static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) 358static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
471{ 359{
472 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
473 vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); 360 vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
474} 361}
475 362
@@ -477,10 +364,8 @@ static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval)
477{ 364{
478#ifdef CONFIG_X86_PAE 365#ifdef CONFIG_X86_PAE
479 const pte_t pte = { .pte = pmdval.pmd }; 366 const pte_t pte = { .pte = pmdval.pmd };
480 vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD);
481#else 367#else
482 const pte_t pte = { pmdval.pud.pgd.pgd }; 368 const pte_t pte = { pmdval.pud.pgd.pgd };
483 vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD);
484#endif 369#endif
485 vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD); 370 vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);
486} 371}
@@ -502,7 +387,6 @@ static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval)
502 387
503static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) 388static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
504{ 389{
505 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
506 vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1)); 390 vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1));
507} 391}
508 392
@@ -510,21 +394,18 @@ static void vmi_set_pud(pud_t *pudp, pud_t pudval)
510{ 394{
511 /* Um, eww */ 395 /* Um, eww */
512 const pte_t pte = { .pte = pudval.pgd.pgd }; 396 const pte_t pte = { .pte = pudval.pgd.pgd };
513 vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD);
514 vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP); 397 vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);
515} 398}
516 399
517static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 400static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
518{ 401{
519 const pte_t pte = { .pte = 0 }; 402 const pte_t pte = { .pte = 0 };
520 vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
521 vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); 403 vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
522} 404}
523 405
524static void vmi_pmd_clear(pmd_t *pmd) 406static void vmi_pmd_clear(pmd_t *pmd)
525{ 407{
526 const pte_t pte = { .pte = 0 }; 408 const pte_t pte = { .pte = 0 };
527 vmi_check_page_type(__pa(pmd) >> PAGE_SHIFT, VMI_PAGE_PMD);
528 vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD); 409 vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD);
529} 410}
530#endif 411#endif
@@ -960,8 +841,6 @@ static inline int __init activate_vmi(void)
960 841
961void __init vmi_init(void) 842void __init vmi_init(void)
962{ 843{
963 unsigned long flags;
964
965 if (!vmi_rom) 844 if (!vmi_rom)
966 probe_vmi_rom(); 845 probe_vmi_rom();
967 else 846 else
@@ -973,13 +852,21 @@ void __init vmi_init(void)
973 852
974 reserve_top_address(-vmi_rom->virtual_top); 853 reserve_top_address(-vmi_rom->virtual_top);
975 854
976 local_irq_save(flags);
977 activate_vmi();
978
979#ifdef CONFIG_X86_IO_APIC 855#ifdef CONFIG_X86_IO_APIC
980 /* This is virtual hardware; timer routing is wired correctly */ 856 /* This is virtual hardware; timer routing is wired correctly */
981 no_timer_check = 1; 857 no_timer_check = 1;
982#endif 858#endif
859}
860
861void vmi_activate(void)
862{
863 unsigned long flags;
864
865 if (!vmi_rom)
866 return;
867
868 local_irq_save(flags);
869 activate_vmi();
983 local_irq_restore(flags & X86_EFLAGS_IF); 870 local_irq_restore(flags & X86_EFLAGS_IF);
984} 871}
985 872
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index a9b8560adbc2..82c67559dde7 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -44,6 +44,7 @@ SECTIONS
44 SCHED_TEXT 44 SCHED_TEXT
45 LOCK_TEXT 45 LOCK_TEXT
46 KPROBES_TEXT 46 KPROBES_TEXT
47 IRQENTRY_TEXT
47 *(.fixup) 48 *(.fixup)
48 *(.gnu.warning) 49 *(.gnu.warning)
49 _etext = .; /* End of text section */ 50 _etext = .; /* End of text section */
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index 46e05447405b..1a614c0e6bef 100644
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
@@ -35,6 +35,7 @@ SECTIONS
35 SCHED_TEXT 35 SCHED_TEXT
36 LOCK_TEXT 36 LOCK_TEXT
37 KPROBES_TEXT 37 KPROBES_TEXT
38 IRQENTRY_TEXT
38 *(.fixup) 39 *(.fixup)
39 *(.gnu.warning) 40 *(.gnu.warning)
40 _etext = .; /* End of text section */ 41 _etext = .; /* End of text section */
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 0b8b6690a86d..44153afc9067 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -17,6 +17,9 @@
17 * want per guest time just set the kernel.vsyscall64 sysctl to 0. 17 * want per guest time just set the kernel.vsyscall64 sysctl to 0.
18 */ 18 */
19 19
20/* Disable profiling for userspace code: */
21#define DISABLE_BRANCH_PROFILING
22
20#include <linux/time.h> 23#include <linux/time.h>
21#include <linux/init.h> 24#include <linux/init.h>
22#include <linux/kernel.h> 25#include <linux/kernel.h>
@@ -128,7 +131,16 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
128 gettimeofday(tv,NULL); 131 gettimeofday(tv,NULL);
129 return; 132 return;
130 } 133 }
134
135 /*
136 * Surround the RDTSC by barriers, to make sure it's not
137 * speculated to outside the seqlock critical section and
138 * does not cause time warps:
139 */
140 rdtsc_barrier();
131 now = vread(); 141 now = vread();
142 rdtsc_barrier();
143
132 base = __vsyscall_gtod_data.clock.cycle_last; 144 base = __vsyscall_gtod_data.clock.cycle_last;
133 mask = __vsyscall_gtod_data.clock.mask; 145 mask = __vsyscall_gtod_data.clock.mask;
134 mult = __vsyscall_gtod_data.clock.mult; 146 mult = __vsyscall_gtod_data.clock.mult;
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 104c8220a383..a7ed208f81e3 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -590,7 +590,8 @@ static void __init lguest_init_IRQ(void)
590 * a straightforward 1 to 1 mapping, so force that here. */ 590 * a straightforward 1 to 1 mapping, so force that here. */
591 __get_cpu_var(vector_irq)[vector] = i; 591 __get_cpu_var(vector_irq)[vector] = i;
592 if (vector != SYSCALL_VECTOR) { 592 if (vector != SYSCALL_VECTOR) {
593 set_intr_gate(vector, interrupt[vector]); 593 set_intr_gate(vector,
594 interrupt[vector-FIRST_EXTERNAL_VECTOR]);
594 set_irq_chip_and_handler_name(i, &lguest_irq_controller, 595 set_irq_chip_and_handler_name(i, &lguest_irq_controller,
595 handle_level_irq, 596 handle_level_irq,
596 "level"); 597 "level");
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index 3c3b471ea496..3624a364b7f3 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -17,6 +17,7 @@
17#include <asm/bigsmp/apic.h> 17#include <asm/bigsmp/apic.h>
18#include <asm/bigsmp/ipi.h> 18#include <asm/bigsmp/ipi.h>
19#include <asm/mach-default/mach_mpparse.h> 19#include <asm/mach-default/mach_mpparse.h>
20#include <asm/mach-default/mach_wakecpu.h>
20 21
21static int dmi_bigsmp; /* can be set by dmi scanners */ 22static int dmi_bigsmp; /* can be set by dmi scanners */
22 23
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index 9e835a11a13a..e63a4a76d8cd 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -16,6 +16,7 @@
16#include <asm/mach-default/mach_apic.h> 16#include <asm/mach-default/mach_apic.h>
17#include <asm/mach-default/mach_ipi.h> 17#include <asm/mach-default/mach_ipi.h>
18#include <asm/mach-default/mach_mpparse.h> 18#include <asm/mach-default/mach_mpparse.h>
19#include <asm/mach-default/mach_wakecpu.h>
19 20
20/* should be called last. */ 21/* should be called last. */
21static int probe_default(void) 22static int probe_default(void)
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 28459cab3ddb..7b4e6d0d1690 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -16,7 +16,19 @@
16#include <asm/es7000/apic.h> 16#include <asm/es7000/apic.h>
17#include <asm/es7000/ipi.h> 17#include <asm/es7000/ipi.h>
18#include <asm/es7000/mpparse.h> 18#include <asm/es7000/mpparse.h>
19#include <asm/es7000/wakecpu.h> 19#include <asm/mach-default/mach_wakecpu.h>
20
21void __init es7000_update_genapic_to_cluster(void)
22{
23 genapic->target_cpus = target_cpus_cluster;
24 genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
25 genapic->int_dest_mode = INT_DEST_MODE_CLUSTER;
26 genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
27
28 genapic->init_apic_ldr = init_apic_ldr_cluster;
29
30 genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster;
31}
20 32
21static int probe_es7000(void) 33static int probe_es7000(void)
22{ 34{
diff --git a/arch/x86/mach-generic/probe.c b/arch/x86/mach-generic/probe.c
index 5a7e4619e1c4..c346d9d0226f 100644
--- a/arch/x86/mach-generic/probe.c
+++ b/arch/x86/mach-generic/probe.c
@@ -15,6 +15,7 @@
15#include <asm/mpspec.h> 15#include <asm/mpspec.h>
16#include <asm/apicdef.h> 16#include <asm/apicdef.h>
17#include <asm/genapic.h> 17#include <asm/genapic.h>
18#include <asm/setup.h>
18 19
19extern struct genapic apic_numaq; 20extern struct genapic apic_numaq;
20extern struct genapic apic_summit; 21extern struct genapic apic_summit;
@@ -57,6 +58,9 @@ static int __init parse_apic(char *arg)
57 } 58 }
58 } 59 }
59 60
61 if (x86_quirks->update_genapic)
62 x86_quirks->update_genapic();
63
60 /* Parsed again by __setup for debug/verbose */ 64 /* Parsed again by __setup for debug/verbose */
61 return 0; 65 return 0;
62} 66}
@@ -72,12 +76,15 @@ void __init generic_bigsmp_probe(void)
72 * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support 76 * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
73 */ 77 */
74 78
75 if (!cmdline_apic && genapic == &apic_default) 79 if (!cmdline_apic && genapic == &apic_default) {
76 if (apic_bigsmp.probe()) { 80 if (apic_bigsmp.probe()) {
77 genapic = &apic_bigsmp; 81 genapic = &apic_bigsmp;
82 if (x86_quirks->update_genapic)
83 x86_quirks->update_genapic();
78 printk(KERN_INFO "Overriding APIC driver with %s\n", 84 printk(KERN_INFO "Overriding APIC driver with %s\n",
79 genapic->name); 85 genapic->name);
80 } 86 }
87 }
81#endif 88#endif
82} 89}
83 90
@@ -94,6 +101,9 @@ void __init generic_apic_probe(void)
94 /* Not visible without early console */ 101 /* Not visible without early console */
95 if (!apic_probe[i]) 102 if (!apic_probe[i])
96 panic("Didn't find an APIC driver"); 103 panic("Didn't find an APIC driver");
104
105 if (x86_quirks->update_genapic)
106 x86_quirks->update_genapic();
97 } 107 }
98 printk(KERN_INFO "Using APIC driver %s\n", genapic->name); 108 printk(KERN_INFO "Using APIC driver %s\n", genapic->name);
99} 109}
@@ -108,6 +118,8 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem,
108 if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) { 118 if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) {
109 if (!cmdline_apic) { 119 if (!cmdline_apic) {
110 genapic = apic_probe[i]; 120 genapic = apic_probe[i];
121 if (x86_quirks->update_genapic)
122 x86_quirks->update_genapic();
111 printk(KERN_INFO "Switched to APIC driver `%s'.\n", 123 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
112 genapic->name); 124 genapic->name);
113 } 125 }
@@ -124,6 +136,8 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
124 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { 136 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
125 if (!cmdline_apic) { 137 if (!cmdline_apic) {
126 genapic = apic_probe[i]; 138 genapic = apic_probe[i];
139 if (x86_quirks->update_genapic)
140 x86_quirks->update_genapic();
127 printk(KERN_INFO "Switched to APIC driver `%s'.\n", 141 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
128 genapic->name); 142 genapic->name);
129 } 143 }
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 6272b5e69da6..2c6d234e0009 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -16,6 +16,7 @@
16#include <asm/summit/apic.h> 16#include <asm/summit/apic.h>
17#include <asm/summit/ipi.h> 17#include <asm/summit/ipi.h>
18#include <asm/summit/mpparse.h> 18#include <asm/summit/mpparse.h>
19#include <asm/mach-default/mach_wakecpu.h>
19 20
20static int probe_summit(void) 21static int probe_summit(void)
21{ 22{
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index fea4565ff576..d8cc96a2738f 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -8,9 +8,8 @@ obj-$(CONFIG_X86_PTDUMP) += dump_pagetables.o
8 8
9obj-$(CONFIG_HIGHMEM) += highmem_32.o 9obj-$(CONFIG_HIGHMEM) += highmem_32.o
10 10
11obj-$(CONFIG_MMIOTRACE_HOOKS) += kmmio.o
12obj-$(CONFIG_MMIOTRACE) += mmiotrace.o 11obj-$(CONFIG_MMIOTRACE) += mmiotrace.o
13mmiotrace-y := pf_in.o mmio-mod.o 12mmiotrace-y := kmmio.o pf_in.o mmio-mod.o
14obj-$(CONFIG_MMIOTRACE_TEST) += testmmiotrace.o 13obj-$(CONFIG_MMIOTRACE_TEST) += testmmiotrace.o
15 14
16obj-$(CONFIG_NUMA) += numa_$(BITS).o 15obj-$(CONFIG_NUMA) += numa_$(BITS).o
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 31e8730fa246..57ec8c86a877 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -53,7 +53,7 @@
53 53
54static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) 54static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr)
55{ 55{
56#ifdef CONFIG_MMIOTRACE_HOOKS 56#ifdef CONFIG_MMIOTRACE
57 if (unlikely(is_kmmio_active())) 57 if (unlikely(is_kmmio_active()))
58 if (kmmio_handler(regs, addr) == 1) 58 if (kmmio_handler(regs, addr) == 1)
59 return -1; 59 return -1;
@@ -393,7 +393,7 @@ static void show_fault_oops(struct pt_regs *regs, unsigned long error_code,
393 if (pte && pte_present(*pte) && !pte_exec(*pte)) 393 if (pte && pte_present(*pte) && !pte_exec(*pte))
394 printk(KERN_CRIT "kernel tried to execute " 394 printk(KERN_CRIT "kernel tried to execute "
395 "NX-protected page - exploit attempt? " 395 "NX-protected page - exploit attempt? "
396 "(uid: %d)\n", current->uid); 396 "(uid: %d)\n", current_uid());
397 } 397 }
398#endif 398#endif
399 399
@@ -413,6 +413,7 @@ static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
413 unsigned long error_code) 413 unsigned long error_code)
414{ 414{
415 unsigned long flags = oops_begin(); 415 unsigned long flags = oops_begin();
416 int sig = SIGKILL;
416 struct task_struct *tsk; 417 struct task_struct *tsk;
417 418
418 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", 419 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
@@ -423,8 +424,8 @@ static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
423 tsk->thread.trap_no = 14; 424 tsk->thread.trap_no = 14;
424 tsk->thread.error_code = error_code; 425 tsk->thread.error_code = error_code;
425 if (__die("Bad pagetable", regs, error_code)) 426 if (__die("Bad pagetable", regs, error_code))
426 regs = NULL; 427 sig = 0;
427 oops_end(flags, regs, SIGKILL); 428 oops_end(flags, regs, sig);
428} 429}
429#endif 430#endif
430 431
@@ -590,6 +591,7 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
590 int fault; 591 int fault;
591#ifdef CONFIG_X86_64 592#ifdef CONFIG_X86_64
592 unsigned long flags; 593 unsigned long flags;
594 int sig;
593#endif 595#endif
594 596
595 tsk = current; 597 tsk = current;
@@ -849,11 +851,12 @@ no_context:
849 bust_spinlocks(0); 851 bust_spinlocks(0);
850 do_exit(SIGKILL); 852 do_exit(SIGKILL);
851#else 853#else
854 sig = SIGKILL;
852 if (__die("Oops", regs, error_code)) 855 if (__die("Oops", regs, error_code))
853 regs = NULL; 856 sig = 0;
854 /* Executive summary in case the body of the oops scrolled away */ 857 /* Executive summary in case the body of the oops scrolled away */
855 printk(KERN_EMERG "CR2: %016lx\n", address); 858 printk(KERN_EMERG "CR2: %016lx\n", address);
856 oops_end(flags, regs, SIGKILL); 859 oops_end(flags, regs, sig);
857#endif 860#endif
858 861
859/* 862/*
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index c483f4242079..800e1d94c1b5 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -67,7 +67,7 @@ static unsigned long __meminitdata table_top;
67 67
68static int __initdata after_init_bootmem; 68static int __initdata after_init_bootmem;
69 69
70static __init void *alloc_low_page(unsigned long *phys) 70static __init void *alloc_low_page(void)
71{ 71{
72 unsigned long pfn = table_end++; 72 unsigned long pfn = table_end++;
73 void *adr; 73 void *adr;
@@ -77,7 +77,6 @@ static __init void *alloc_low_page(unsigned long *phys)
77 77
78 adr = __va(pfn * PAGE_SIZE); 78 adr = __va(pfn * PAGE_SIZE);
79 memset(adr, 0, PAGE_SIZE); 79 memset(adr, 0, PAGE_SIZE);
80 *phys = pfn * PAGE_SIZE;
81 return adr; 80 return adr;
82} 81}
83 82
@@ -92,16 +91,17 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
92 pmd_t *pmd_table; 91 pmd_t *pmd_table;
93 92
94#ifdef CONFIG_X86_PAE 93#ifdef CONFIG_X86_PAE
95 unsigned long phys;
96 if (!(pgd_val(*pgd) & _PAGE_PRESENT)) { 94 if (!(pgd_val(*pgd) & _PAGE_PRESENT)) {
97 if (after_init_bootmem) 95 if (after_init_bootmem)
98 pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE); 96 pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
99 else 97 else
100 pmd_table = (pmd_t *)alloc_low_page(&phys); 98 pmd_table = (pmd_t *)alloc_low_page();
101 paravirt_alloc_pmd(&init_mm, __pa(pmd_table) >> PAGE_SHIFT); 99 paravirt_alloc_pmd(&init_mm, __pa(pmd_table) >> PAGE_SHIFT);
102 set_pgd(pgd, __pgd(__pa(pmd_table) | _PAGE_PRESENT)); 100 set_pgd(pgd, __pgd(__pa(pmd_table) | _PAGE_PRESENT));
103 pud = pud_offset(pgd, 0); 101 pud = pud_offset(pgd, 0);
104 BUG_ON(pmd_table != pmd_offset(pud, 0)); 102 BUG_ON(pmd_table != pmd_offset(pud, 0));
103
104 return pmd_table;
105 } 105 }
106#endif 106#endif
107 pud = pud_offset(pgd, 0); 107 pud = pud_offset(pgd, 0);
@@ -126,10 +126,8 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
126 if (!page_table) 126 if (!page_table)
127 page_table = 127 page_table =
128 (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE); 128 (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
129 } else { 129 } else
130 unsigned long phys; 130 page_table = (pte_t *)alloc_low_page();
131 page_table = (pte_t *)alloc_low_page(&phys);
132 }
133 131
134 paravirt_alloc_pte(&init_mm, __pa(page_table) >> PAGE_SHIFT); 132 paravirt_alloc_pte(&init_mm, __pa(page_table) >> PAGE_SHIFT);
135 set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_TABLE)); 133 set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_TABLE));
@@ -969,8 +967,6 @@ void __init mem_init(void)
969 int codesize, reservedpages, datasize, initsize; 967 int codesize, reservedpages, datasize, initsize;
970 int tmp; 968 int tmp;
971 969
972 start_periodic_check_for_corruption();
973
974#ifdef CONFIG_FLATMEM 970#ifdef CONFIG_FLATMEM
975 BUG_ON(!mem_map); 971 BUG_ON(!mem_map);
976#endif 972#endif
@@ -1040,11 +1036,25 @@ void __init mem_init(void)
1040 (unsigned long)&_text, (unsigned long)&_etext, 1036 (unsigned long)&_text, (unsigned long)&_etext,
1041 ((unsigned long)&_etext - (unsigned long)&_text) >> 10); 1037 ((unsigned long)&_etext - (unsigned long)&_text) >> 10);
1042 1038
1039 /*
1040 * Check boundaries twice: Some fundamental inconsistencies can
1041 * be detected at build time already.
1042 */
1043#define __FIXADDR_TOP (-PAGE_SIZE)
1044#ifdef CONFIG_HIGHMEM
1045 BUILD_BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE > FIXADDR_START);
1046 BUILD_BUG_ON(VMALLOC_END > PKMAP_BASE);
1047#endif
1048#define high_memory (-128UL << 20)
1049 BUILD_BUG_ON(VMALLOC_START >= VMALLOC_END);
1050#undef high_memory
1051#undef __FIXADDR_TOP
1052
1043#ifdef CONFIG_HIGHMEM 1053#ifdef CONFIG_HIGHMEM
1044 BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE > FIXADDR_START); 1054 BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE > FIXADDR_START);
1045 BUG_ON(VMALLOC_END > PKMAP_BASE); 1055 BUG_ON(VMALLOC_END > PKMAP_BASE);
1046#endif 1056#endif
1047 BUG_ON(VMALLOC_START > VMALLOC_END); 1057 BUG_ON(VMALLOC_START >= VMALLOC_END);
1048 BUG_ON((unsigned long)high_memory > VMALLOC_START); 1058 BUG_ON((unsigned long)high_memory > VMALLOC_START);
1049 1059
1050 if (boot_cpu_data.wp_works_ok < 0) 1060 if (boot_cpu_data.wp_works_ok < 0)
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 9db01db6e3cd..9f7a0d24d42a 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -902,8 +902,6 @@ void __init mem_init(void)
902 long codesize, reservedpages, datasize, initsize; 902 long codesize, reservedpages, datasize, initsize;
903 unsigned long absent_pages; 903 unsigned long absent_pages;
904 904
905 start_periodic_check_for_corruption();
906
907 pci_iommu_alloc(); 905 pci_iommu_alloc();
908 906
909 /* clear_bss() already clear the empty_zero_page */ 907 /* clear_bss() already clear the empty_zero_page */
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index d4c4307ff3e0..bd85d42819e1 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -223,7 +223,8 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
223 * Check if the request spans more than any BAR in the iomem resource 223 * Check if the request spans more than any BAR in the iomem resource
224 * tree. 224 * tree.
225 */ 225 */
226 WARN_ON(iomem_map_sanity_check(phys_addr, size)); 226 WARN_ONCE(iomem_map_sanity_check(phys_addr, size),
227 KERN_INFO "Info: mapping multiple BARs. Your kernel is fine.");
227 228
228 /* 229 /*
229 * Don't allow anybody to remap normal RAM that we're using.. 230 * Don't allow anybody to remap normal RAM that we're using..
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index eb1bf000d12e..85cbd3cd3723 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -596,6 +596,242 @@ void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
596 free_memtype(addr, addr + size); 596 free_memtype(addr, addr + size);
597} 597}
598 598
599/*
600 * Internal interface to reserve a range of physical memory with prot.
601 * Reserved non RAM regions only and after successful reserve_memtype,
602 * this func also keeps identity mapping (if any) in sync with this new prot.
603 */
604static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t vma_prot)
605{
606 int is_ram = 0;
607 int id_sz, ret;
608 unsigned long flags;
609 unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK);
610
611 is_ram = pagerange_is_ram(paddr, paddr + size);
612
613 if (is_ram != 0) {
614 /*
615 * For mapping RAM pages, drivers need to call
616 * set_memory_[uc|wc|wb] directly, for reserve and free, before
617 * setting up the PTE.
618 */
619 WARN_ON_ONCE(1);
620 return 0;
621 }
622
623 ret = reserve_memtype(paddr, paddr + size, want_flags, &flags);
624 if (ret)
625 return ret;
626
627 if (flags != want_flags) {
628 free_memtype(paddr, paddr + size);
629 printk(KERN_ERR
630 "%s:%d map pfn expected mapping type %s for %Lx-%Lx, got %s\n",
631 current->comm, current->pid,
632 cattr_name(want_flags),
633 (unsigned long long)paddr,
634 (unsigned long long)(paddr + size),
635 cattr_name(flags));
636 return -EINVAL;
637 }
638
639 /* Need to keep identity mapping in sync */
640 if (paddr >= __pa(high_memory))
641 return 0;
642
643 id_sz = (__pa(high_memory) < paddr + size) ?
644 __pa(high_memory) - paddr :
645 size;
646
647 if (ioremap_change_attr((unsigned long)__va(paddr), id_sz, flags) < 0) {
648 free_memtype(paddr, paddr + size);
649 printk(KERN_ERR
650 "%s:%d reserve_pfn_range ioremap_change_attr failed %s "
651 "for %Lx-%Lx\n",
652 current->comm, current->pid,
653 cattr_name(flags),
654 (unsigned long long)paddr,
655 (unsigned long long)(paddr + size));
656 return -EINVAL;
657 }
658 return 0;
659}
660
661/*
662 * Internal interface to free a range of physical memory.
663 * Frees non RAM regions only.
664 */
665static void free_pfn_range(u64 paddr, unsigned long size)
666{
667 int is_ram;
668
669 is_ram = pagerange_is_ram(paddr, paddr + size);
670 if (is_ram == 0)
671 free_memtype(paddr, paddr + size);
672}
673
674/*
675 * track_pfn_vma_copy is called when vma that is covering the pfnmap gets
676 * copied through copy_page_range().
677 *
678 * If the vma has a linear pfn mapping for the entire range, we get the prot
679 * from pte and reserve the entire vma range with single reserve_pfn_range call.
680 * Otherwise, we reserve the entire vma range, my ging through the PTEs page
681 * by page to get physical address and protection.
682 */
683int track_pfn_vma_copy(struct vm_area_struct *vma)
684{
685 int retval = 0;
686 unsigned long i, j;
687 resource_size_t paddr;
688 unsigned long prot;
689 unsigned long vma_start = vma->vm_start;
690 unsigned long vma_end = vma->vm_end;
691 unsigned long vma_size = vma_end - vma_start;
692
693 if (!pat_enabled)
694 return 0;
695
696 if (is_linear_pfn_mapping(vma)) {
697 /*
698 * reserve the whole chunk covered by vma. We need the
699 * starting address and protection from pte.
700 */
701 if (follow_phys(vma, vma_start, 0, &prot, &paddr)) {
702 WARN_ON_ONCE(1);
703 return -EINVAL;
704 }
705 return reserve_pfn_range(paddr, vma_size, __pgprot(prot));
706 }
707
708 /* reserve entire vma page by page, using pfn and prot from pte */
709 for (i = 0; i < vma_size; i += PAGE_SIZE) {
710 if (follow_phys(vma, vma_start + i, 0, &prot, &paddr))
711 continue;
712
713 retval = reserve_pfn_range(paddr, PAGE_SIZE, __pgprot(prot));
714 if (retval)
715 goto cleanup_ret;
716 }
717 return 0;
718
719cleanup_ret:
720 /* Reserve error: Cleanup partial reservation and return error */
721 for (j = 0; j < i; j += PAGE_SIZE) {
722 if (follow_phys(vma, vma_start + j, 0, &prot, &paddr))
723 continue;
724
725 free_pfn_range(paddr, PAGE_SIZE);
726 }
727
728 return retval;
729}
730
731/*
732 * track_pfn_vma_new is called when a _new_ pfn mapping is being established
733 * for physical range indicated by pfn and size.
734 *
735 * prot is passed in as a parameter for the new mapping. If the vma has a
736 * linear pfn mapping for the entire range reserve the entire vma range with
737 * single reserve_pfn_range call.
738 * Otherwise, we look t the pfn and size and reserve only the specified range
739 * page by page.
740 *
741 * Note that this function can be called with caller trying to map only a
742 * subrange/page inside the vma.
743 */
744int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t prot,
745 unsigned long pfn, unsigned long size)
746{
747 int retval = 0;
748 unsigned long i, j;
749 resource_size_t base_paddr;
750 resource_size_t paddr;
751 unsigned long vma_start = vma->vm_start;
752 unsigned long vma_end = vma->vm_end;
753 unsigned long vma_size = vma_end - vma_start;
754
755 if (!pat_enabled)
756 return 0;
757
758 if (is_linear_pfn_mapping(vma)) {
759 /* reserve the whole chunk starting from vm_pgoff */
760 paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
761 return reserve_pfn_range(paddr, vma_size, prot);
762 }
763
764 /* reserve page by page using pfn and size */
765 base_paddr = (resource_size_t)pfn << PAGE_SHIFT;
766 for (i = 0; i < size; i += PAGE_SIZE) {
767 paddr = base_paddr + i;
768 retval = reserve_pfn_range(paddr, PAGE_SIZE, prot);
769 if (retval)
770 goto cleanup_ret;
771 }
772 return 0;
773
774cleanup_ret:
775 /* Reserve error: Cleanup partial reservation and return error */
776 for (j = 0; j < i; j += PAGE_SIZE) {
777 paddr = base_paddr + j;
778 free_pfn_range(paddr, PAGE_SIZE);
779 }
780
781 return retval;
782}
783
784/*
785 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
786 * untrack can be called for a specific region indicated by pfn and size or
787 * can be for the entire vma (in which case size can be zero).
788 */
789void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn,
790 unsigned long size)
791{
792 unsigned long i;
793 resource_size_t paddr;
794 unsigned long prot;
795 unsigned long vma_start = vma->vm_start;
796 unsigned long vma_end = vma->vm_end;
797 unsigned long vma_size = vma_end - vma_start;
798
799 if (!pat_enabled)
800 return;
801
802 if (is_linear_pfn_mapping(vma)) {
803 /* free the whole chunk starting from vm_pgoff */
804 paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
805 free_pfn_range(paddr, vma_size);
806 return;
807 }
808
809 if (size != 0 && size != vma_size) {
810 /* free page by page, using pfn and size */
811 paddr = (resource_size_t)pfn << PAGE_SHIFT;
812 for (i = 0; i < size; i += PAGE_SIZE) {
813 paddr = paddr + i;
814 free_pfn_range(paddr, PAGE_SIZE);
815 }
816 } else {
817 /* free entire vma, page by page, using the pfn from pte */
818 for (i = 0; i < vma_size; i += PAGE_SIZE) {
819 if (follow_phys(vma, vma_start + i, 0, &prot, &paddr))
820 continue;
821
822 free_pfn_range(paddr, PAGE_SIZE);
823 }
824 }
825}
826
827pgprot_t pgprot_writecombine(pgprot_t prot)
828{
829 if (pat_enabled)
830 return __pgprot(pgprot_val(prot) | _PAGE_CACHE_WC);
831 else
832 return pgprot_noncached(prot);
833}
834
599#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) 835#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
600 836
601/* get Nth element of the linked list */ 837/* get Nth element of the linked list */
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index b67732bbb85a..bb1a01f089e2 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -23,6 +23,12 @@ unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
23unsigned int pci_early_dump_regs; 23unsigned int pci_early_dump_regs;
24static int pci_bf_sort; 24static int pci_bf_sort;
25int pci_routeirq; 25int pci_routeirq;
26int noioapicquirk;
27#ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
28int noioapicreroute = 0;
29#else
30int noioapicreroute = 1;
31#endif
26int pcibios_last_bus = -1; 32int pcibios_last_bus = -1;
27unsigned long pirq_table_addr; 33unsigned long pirq_table_addr;
28struct pci_bus *pci_root_bus; 34struct pci_bus *pci_root_bus;
@@ -519,6 +525,17 @@ char * __devinit pcibios_setup(char *str)
519 } else if (!strcmp(str, "skip_isa_align")) { 525 } else if (!strcmp(str, "skip_isa_align")) {
520 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; 526 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
521 return NULL; 527 return NULL;
528 } else if (!strcmp(str, "noioapicquirk")) {
529 noioapicquirk = 1;
530 return NULL;
531 } else if (!strcmp(str, "ioapicreroute")) {
532 if (noioapicreroute != -1)
533 noioapicreroute = 0;
534 return NULL;
535 } else if (!strcmp(str, "noioapicreroute")) {
536 if (noioapicreroute != -1)
537 noioapicreroute = 1;
538 return NULL;
522 } 539 }
523 return str; 540 return str;
524} 541}
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index 9915293500fb..9a5af6c8fbe9 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -173,7 +173,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
173 173
174#undef PCI_CONF2_ADDRESS 174#undef PCI_CONF2_ADDRESS
175 175
176static struct pci_raw_ops pci_direct_conf2 = { 176struct pci_raw_ops pci_direct_conf2 = {
177 .read = pci_conf2_read, 177 .read = pci_conf2_read,
178 .write = pci_conf2_write, 178 .write = pci_conf2_write,
179}; 179};
@@ -289,6 +289,7 @@ int __init pci_direct_probe(void)
289 289
290 if (pci_check_type1()) { 290 if (pci_check_type1()) {
291 raw_pci_ops = &pci_direct_conf1; 291 raw_pci_ops = &pci_direct_conf1;
292 port_cf9_safe = true;
292 return 1; 293 return 1;
293 } 294 }
294 release_resource(region); 295 release_resource(region);
@@ -305,6 +306,7 @@ int __init pci_direct_probe(void)
305 306
306 if (pci_check_type2()) { 307 if (pci_check_type2()) {
307 raw_pci_ops = &pci_direct_conf2; 308 raw_pci_ops = &pci_direct_conf2;
309 port_cf9_safe = true;
308 return 2; 310 return 2;
309 } 311 }
310 312
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h
index 15b9cf6be729..1959018aac02 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/pci/pci.h
@@ -96,6 +96,7 @@ extern struct pci_raw_ops *raw_pci_ops;
96extern struct pci_raw_ops *raw_pci_ext_ops; 96extern struct pci_raw_ops *raw_pci_ext_ops;
97 97
98extern struct pci_raw_ops pci_direct_conf1; 98extern struct pci_raw_ops pci_direct_conf1;
99extern bool port_cf9_safe;
99 100
100/* arch_initcall level */ 101/* arch_initcall level */
101extern int pci_direct_probe(void); 102extern int pci_direct_probe(void);
diff --git a/arch/x86/scripts/strip-symbols b/arch/x86/scripts/strip-symbols
new file mode 100644
index 000000000000..a2f1ccb827c7
--- /dev/null
+++ b/arch/x86/scripts/strip-symbols
@@ -0,0 +1 @@
__cpu_vendor_dev_X86_VENDOR_*
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 1ef0f90813d6..d9d35824c56f 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -9,6 +9,9 @@
9 * Also alternative() doesn't work. 9 * Also alternative() doesn't work.
10 */ 10 */
11 11
12/* Disable profiling for userspace code: */
13#define DISABLE_BRANCH_PROFILING
14
12#include <linux/kernel.h> 15#include <linux/kernel.h>
13#include <linux/posix-timers.h> 16#include <linux/posix-timers.h>
14#include <linux/time.h> 17#include <linux/time.h>
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 513f330c5832..1241f118ab56 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -310,7 +310,7 @@ int __init sysenter_setup(void)
310} 310}
311 311
312/* Setup a VMA at program startup for the vsyscall page */ 312/* Setup a VMA at program startup for the vsyscall page */
313int arch_setup_additional_pages(struct linux_binprm *bprm, int exstack) 313int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
314{ 314{
315 struct mm_struct *mm = current->mm; 315 struct mm_struct *mm = current->mm;
316 unsigned long addr; 316 unsigned long addr;
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 257ba4a10abf..9c98cc6ba978 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -98,7 +98,7 @@ static unsigned long vdso_addr(unsigned long start, unsigned len)
98 98
99/* Setup a VMA at program startup for the vsyscall page. 99/* Setup a VMA at program startup for the vsyscall page.
100 Not called for compat tasks */ 100 Not called for compat tasks */
101int arch_setup_additional_pages(struct linux_binprm *bprm, int exstack) 101int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
102{ 102{
103 struct mm_struct *mm = current->mm; 103 struct mm_struct *mm = current->mm;
104 unsigned long addr; 104 unsigned long addr;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 5e4686d70f62..bea215230b20 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -28,6 +28,7 @@
28#include <linux/console.h> 28#include <linux/console.h>
29 29
30#include <xen/interface/xen.h> 30#include <xen/interface/xen.h>
31#include <xen/interface/version.h>
31#include <xen/interface/physdev.h> 32#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h> 33#include <xen/interface/vcpu.h>
33#include <xen/features.h> 34#include <xen/features.h>
@@ -793,7 +794,7 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
793 794
794 ret = 0; 795 ret = 0;
795 796
796 switch(msr) { 797 switch (msr) {
797#ifdef CONFIG_X86_64 798#ifdef CONFIG_X86_64
798 unsigned which; 799 unsigned which;
799 u64 base; 800 u64 base;
@@ -1453,7 +1454,7 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1453 1454
1454 ident_pte = 0; 1455 ident_pte = 0;
1455 pfn = 0; 1456 pfn = 0;
1456 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { 1457 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1457 pte_t *pte_page; 1458 pte_t *pte_page;
1458 1459
1459 /* Reuse or allocate a page of ptes */ 1460 /* Reuse or allocate a page of ptes */
@@ -1471,7 +1472,7 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1471 } 1472 }
1472 1473
1473 /* Install mappings */ 1474 /* Install mappings */
1474 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { 1475 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1475 pte_t pte; 1476 pte_t pte;
1476 1477
1477 if (pfn > max_pfn_mapped) 1478 if (pfn > max_pfn_mapped)
@@ -1485,7 +1486,7 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1485 } 1486 }
1486 } 1487 }
1487 1488
1488 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) 1489 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1489 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); 1490 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1490 1491
1491 set_page_prot(pmd, PAGE_KERNEL_RO); 1492 set_page_prot(pmd, PAGE_KERNEL_RO);
@@ -1499,7 +1500,7 @@ static void convert_pfn_mfn(void *v)
1499 1500
1500 /* All levels are converted the same way, so just treat them 1501 /* All levels are converted the same way, so just treat them
1501 as ptes. */ 1502 as ptes. */
1502 for(i = 0; i < PTRS_PER_PTE; i++) 1503 for (i = 0; i < PTRS_PER_PTE; i++)
1503 pte[i] = xen_make_pte(pte[i].pte); 1504 pte[i] = xen_make_pte(pte[i].pte);
1504} 1505}
1505 1506
@@ -1514,7 +1515,8 @@ static void convert_pfn_mfn(void *v)
1514 * of the physical mapping once some sort of allocator has been set 1515 * of the physical mapping once some sort of allocator has been set
1515 * up. 1516 * up.
1516 */ 1517 */
1517static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 1518static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1519 unsigned long max_pfn)
1518{ 1520{
1519 pud_t *l3; 1521 pud_t *l3;
1520 pmd_t *l2; 1522 pmd_t *l2;
@@ -1577,7 +1579,8 @@ static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pf
1577#else /* !CONFIG_X86_64 */ 1579#else /* !CONFIG_X86_64 */
1578static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss; 1580static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1579 1581
1580static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 1582static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1583 unsigned long max_pfn)
1581{ 1584{
1582 pmd_t *kernel_pmd; 1585 pmd_t *kernel_pmd;
1583 1586
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 636ef4caa52d..773d68d3e912 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -154,13 +154,13 @@ void xen_setup_mfn_list_list(void)
154{ 154{
155 unsigned pfn, idx; 155 unsigned pfn, idx;
156 156
157 for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) { 157 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
158 unsigned topidx = p2m_top_index(pfn); 158 unsigned topidx = p2m_top_index(pfn);
159 159
160 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]); 160 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
161 } 161 }
162 162
163 for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) { 163 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
164 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE; 164 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
165 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]); 165 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
166 } 166 }
@@ -179,7 +179,7 @@ void __init xen_build_dynamic_phys_to_machine(void)
179 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages); 179 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
180 unsigned pfn; 180 unsigned pfn;
181 181
182 for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) { 182 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
183 unsigned topidx = p2m_top_index(pfn); 183 unsigned topidx = p2m_top_index(pfn);
184 184
185 p2m_top[topidx] = &mfn_list[pfn]; 185 p2m_top[topidx] = &mfn_list[pfn];
@@ -207,7 +207,7 @@ static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
207 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL); 207 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
208 BUG_ON(p == NULL); 208 BUG_ON(p == NULL);
209 209
210 for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++) 210 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
211 p[i] = INVALID_P2M_ENTRY; 211 p[i] = INVALID_P2M_ENTRY;
212 212
213 if (cmpxchg(pp, p2m_missing, p) != p2m_missing) 213 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
@@ -407,7 +407,8 @@ out:
407 preempt_enable(); 407 preempt_enable();
408} 408}
409 409
410pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 410pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
411 unsigned long addr, pte_t *ptep)
411{ 412{
412 /* Just return the pte as-is. We preserve the bits on commit */ 413 /* Just return the pte as-is. We preserve the bits on commit */
413 return *ptep; 414 return *ptep;
@@ -878,7 +879,8 @@ static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
878 879
879 if (user_pgd) { 880 if (user_pgd) {
880 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); 881 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
881 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd))); 882 xen_do_pin(MMUEXT_PIN_L4_TABLE,
883 PFN_DOWN(__pa(user_pgd)));
882 } 884 }
883 } 885 }
884#else /* CONFIG_X86_32 */ 886#else /* CONFIG_X86_32 */
@@ -993,7 +995,8 @@ static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
993 pgd_t *user_pgd = xen_get_user_pgd(pgd); 995 pgd_t *user_pgd = xen_get_user_pgd(pgd);
994 996
995 if (user_pgd) { 997 if (user_pgd) {
996 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd))); 998 xen_do_pin(MMUEXT_UNPIN_TABLE,
999 PFN_DOWN(__pa(user_pgd)));
997 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); 1000 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
998 } 1001 }
999 } 1002 }
diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c
index 8ea8a0d0b0de..c738644b5435 100644
--- a/arch/x86/xen/multicalls.c
+++ b/arch/x86/xen/multicalls.c
@@ -154,7 +154,7 @@ void xen_mc_flush(void)
154 ret, smp_processor_id()); 154 ret, smp_processor_id());
155 dump_stack(); 155 dump_stack();
156 for (i = 0; i < b->mcidx; i++) { 156 for (i = 0; i < b->mcidx; i++) {
157 printk(" call %2d/%d: op=%lu arg=[%lx] result=%ld\n", 157 printk(KERN_DEBUG " call %2d/%d: op=%lu arg=[%lx] result=%ld\n",
158 i+1, b->mcidx, 158 i+1, b->mcidx,
159 b->debug[i].op, 159 b->debug[i].op,
160 b->debug[i].args[0], 160 b->debug[i].args[0],
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index d67901083888..15c6c68db6a2 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -28,6 +28,9 @@
28/* These are code, but not functions. Defined in entry.S */ 28/* These are code, but not functions. Defined in entry.S */
29extern const char xen_hypervisor_callback[]; 29extern const char xen_hypervisor_callback[];
30extern const char xen_failsafe_callback[]; 30extern const char xen_failsafe_callback[];
31extern void xen_sysenter_target(void);
32extern void xen_syscall_target(void);
33extern void xen_syscall32_target(void);
31 34
32 35
33/** 36/**
@@ -110,7 +113,6 @@ static __cpuinit int register_callback(unsigned type, const void *func)
110 113
111void __cpuinit xen_enable_sysenter(void) 114void __cpuinit xen_enable_sysenter(void)
112{ 115{
113 extern void xen_sysenter_target(void);
114 int ret; 116 int ret;
115 unsigned sysenter_feature; 117 unsigned sysenter_feature;
116 118
@@ -132,8 +134,6 @@ void __cpuinit xen_enable_syscall(void)
132{ 134{
133#ifdef CONFIG_X86_64 135#ifdef CONFIG_X86_64
134 int ret; 136 int ret;
135 extern void xen_syscall_target(void);
136 extern void xen_syscall32_target(void);
137 137
138 ret = register_callback(CALLBACKTYPE_syscall, xen_syscall_target); 138 ret = register_callback(CALLBACKTYPE_syscall, xen_syscall_target);
139 if (ret != 0) { 139 if (ret != 0) {
@@ -160,7 +160,8 @@ void __init xen_arch_setup(void)
160 HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_writable_pagetables); 160 HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_writable_pagetables);
161 161
162 if (!xen_feature(XENFEAT_auto_translated_physmap)) 162 if (!xen_feature(XENFEAT_auto_translated_physmap))
163 HYPERVISOR_vm_assist(VMASST_CMD_enable, VMASST_TYPE_pae_extended_cr3); 163 HYPERVISOR_vm_assist(VMASST_CMD_enable,
164 VMASST_TYPE_pae_extended_cr3);
164 165
165 if (register_callback(CALLBACKTYPE_event, xen_hypervisor_callback) || 166 if (register_callback(CALLBACKTYPE_event, xen_hypervisor_callback) ||
166 register_callback(CALLBACKTYPE_failsafe, xen_failsafe_callback)) 167 register_callback(CALLBACKTYPE_failsafe, xen_failsafe_callback))
diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c
index 11a20adc1409..64f057d89e73 100644
--- a/arch/xtensa/platforms/iss/network.c
+++ b/arch/xtensa/platforms/iss/network.c
@@ -365,7 +365,7 @@ static int tuntap_probe(struct iss_net_private *lp, int index, char *init)
365 365
366static int iss_net_rx(struct net_device *dev) 366static int iss_net_rx(struct net_device *dev)
367{ 367{
368 struct iss_net_private *lp = dev->priv; 368 struct iss_net_private *lp = netdev_priv(dev);
369 int pkt_len; 369 int pkt_len;
370 struct sk_buff *skb; 370 struct sk_buff *skb;
371 371
@@ -456,7 +456,7 @@ static void iss_net_timer(unsigned long priv)
456 456
457static int iss_net_open(struct net_device *dev) 457static int iss_net_open(struct net_device *dev)
458{ 458{
459 struct iss_net_private *lp = dev->priv; 459 struct iss_net_private *lp = netdev_priv(dev);
460 char addr[sizeof "255.255.255.255\0"]; 460 char addr[sizeof "255.255.255.255\0"];
461 int err; 461 int err;
462 462
@@ -496,7 +496,7 @@ out:
496 496
497static int iss_net_close(struct net_device *dev) 497static int iss_net_close(struct net_device *dev)
498{ 498{
499 struct iss_net_private *lp = dev->priv; 499 struct iss_net_private *lp = netdev_priv(dev);
500printk("iss_net_close!\n"); 500printk("iss_net_close!\n");
501 netif_stop_queue(dev); 501 netif_stop_queue(dev);
502 spin_lock(&lp->lock); 502 spin_lock(&lp->lock);
@@ -515,7 +515,7 @@ printk("iss_net_close!\n");
515 515
516static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev) 516static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
517{ 517{
518 struct iss_net_private *lp = dev->priv; 518 struct iss_net_private *lp = netdev_priv(dev);
519 unsigned long flags; 519 unsigned long flags;
520 int len; 520 int len;
521 521
@@ -551,7 +551,7 @@ static int iss_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
551 551
552static struct net_device_stats *iss_net_get_stats(struct net_device *dev) 552static struct net_device_stats *iss_net_get_stats(struct net_device *dev)
553{ 553{
554 struct iss_net_private *lp = dev->priv; 554 struct iss_net_private *lp = netdev_priv(dev);
555 return &lp->stats; 555 return &lp->stats;
556} 556}
557 557
@@ -578,7 +578,7 @@ static void iss_net_tx_timeout(struct net_device *dev)
578static int iss_net_set_mac(struct net_device *dev, void *addr) 578static int iss_net_set_mac(struct net_device *dev, void *addr)
579{ 579{
580#if 0 580#if 0
581 struct iss_net_private *lp = dev->priv; 581 struct iss_net_private *lp = netdev_priv(dev);
582 struct sockaddr *hwaddr = addr; 582 struct sockaddr *hwaddr = addr;
583 583
584 spin_lock(&lp->lock); 584 spin_lock(&lp->lock);
@@ -592,7 +592,7 @@ static int iss_net_set_mac(struct net_device *dev, void *addr)
592static int iss_net_change_mtu(struct net_device *dev, int new_mtu) 592static int iss_net_change_mtu(struct net_device *dev, int new_mtu)
593{ 593{
594#if 0 594#if 0
595 struct iss_net_private *lp = dev->priv; 595 struct iss_net_private *lp = netdev_priv(dev);
596 int err = 0; 596 int err = 0;
597 597
598 spin_lock(&lp->lock); 598 spin_lock(&lp->lock);
@@ -636,7 +636,7 @@ static int iss_net_configure(int index, char *init)
636 636
637 /* Initialize private element. */ 637 /* Initialize private element. */
638 638
639 lp = dev->priv; 639 lp = netdev_priv(dev);
640 *lp = ((struct iss_net_private) { 640 *lp = ((struct iss_net_private) {
641 .device_list = LIST_HEAD_INIT(lp->device_list), 641 .device_list = LIST_HEAD_INIT(lp->device_list),
642 .opened_list = LIST_HEAD_INIT(lp->opened_list), 642 .opened_list = LIST_HEAD_INIT(lp->opened_list),
@@ -660,10 +660,7 @@ static int iss_net_configure(int index, char *init)
660 660
661 printk(KERN_INFO "Netdevice %d ", index); 661 printk(KERN_INFO "Netdevice %d ", index);
662 if (lp->have_mac) 662 if (lp->have_mac)
663 printk("(%02x:%02x:%02x:%02x:%02x:%02x) ", 663 printk("(%pM) ", lp->mac);
664 lp->mac[0], lp->mac[1],
665 lp->mac[2], lp->mac[3],
666 lp->mac[4], lp->mac[5]);
667 printk(": "); 664 printk(": ");
668 665
669 /* sysfs register */ 666 /* sysfs register */