Merge branch 'master' of /usr/src/ntfs-2.6/

521 files changed, 46650 insertions, 17651 deletions

diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index 67be50b7d80a..6b2921be1909 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -55,10 +55,6 @@
 #include "proto.h"
 #include "irq_impl.h"
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 extern unsigned long wall_jiffies;      /* kernel/timer.c */
 
 static int set_rtc_mmss(unsigned long);
diff --git a/arch/arm/common/amba.c b/arch/arm/common/amba.c
index c6beb751f2a9..e1013112c354 100644
--- a/arch/arm/common/amba.c
+++ b/arch/arm/common/amba.c
@@ -10,6 +10,8 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/string.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index cbf2165476b0..ad6c89a555bb 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -33,8 +33,8 @@
 #include <asm/cacheflush.h>
 
 #undef DEBUG
-
 #undef STATS
+
 #ifdef STATS
 #define DO_STATS(X) do { X ; } while (0)
 #else
@@ -52,26 +52,31 @@ struct safe_buffer {
         int             direction;
 
         /* safe buffer info */
-        struct dma_pool *pool;
+        struct dmabounce_pool *pool;
         void            *safe;
         dma_addr_t      safe_dma_addr;
 };
 
+struct dmabounce_pool {
+        unsigned long   size;
+        struct dma_pool *pool;
+#ifdef STATS
+        unsigned long   allocs;
+#endif
+};
+
 struct dmabounce_device_info {
         struct list_head node;
 
         struct device *dev;
-        struct dma_pool *small_buffer_pool;
-        struct dma_pool *large_buffer_pool;
         struct list_head safe_buffers;
-        unsigned long small_buffer_size, large_buffer_size;
 #ifdef STATS
-        unsigned long sbp_allocs;
-        unsigned long lbp_allocs;
         unsigned long total_allocs;
         unsigned long map_op_count;
         unsigned long bounce_count;
 #endif
+        struct dmabounce_pool   small;
+        struct dmabounce_pool   large;
 };
 
 static LIST_HEAD(dmabounce_devs);
@@ -82,9 +87,9 @@ static void print_alloc_stats(struct dmabounce_device_info *device_info)
         printk(KERN_INFO
                 "%s: dmabounce: sbp: %lu, lbp: %lu, other: %lu, total: %lu\n",
                 device_info->dev->bus_id,
-                device_info->sbp_allocs, device_info->lbp_allocs,
-                device_info->total_allocs - device_info->sbp_allocs -
-                        device_info->lbp_allocs,
+                device_info->small.allocs, device_info->large.allocs,
+                device_info->total_allocs - device_info->small.allocs -
+                        device_info->large.allocs,
                 device_info->total_allocs);
 }
 #endif
@@ -106,18 +111,22 @@ find_dmabounce_dev(struct device *dev)
 /* allocate a 'safe' buffer and keep track of it */
 static inline struct safe_buffer *
 alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr,
-                        size_t size, enum dma_data_direction dir)
+                  size_t size, enum dma_data_direction dir)
 {
         struct safe_buffer *buf;
-        struct dma_pool *pool;
+        struct dmabounce_pool *pool;
         struct device *dev = device_info->dev;
-        void *safe;
-        dma_addr_t safe_dma_addr;
 
         dev_dbg(dev, "%s(ptr=%p, size=%d, dir=%d)\n",
                 __func__, ptr, size, dir);
 
-        DO_STATS ( device_info->total_allocs++ );
+        if (size <= device_info->small.size) {
+                pool = &device_info->small;
+        } else if (size <= device_info->large.size) {
+                pool = &device_info->large;
+        } else {
+                pool = NULL;
+        }
 
         buf = kmalloc(sizeof(struct safe_buffer), GFP_ATOMIC);
         if (buf == NULL) {
@@ -125,41 +134,35 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr,
                 return NULL;
         }
 
-        if (size <= device_info->small_buffer_size) {
-                pool = device_info->small_buffer_pool;
-                safe = dma_pool_alloc(pool, GFP_ATOMIC, &safe_dma_addr);
-
-                DO_STATS ( device_info->sbp_allocs++ );
-        } else if (size <= device_info->large_buffer_size) {
-                pool = device_info->large_buffer_pool;
-                safe = dma_pool_alloc(pool, GFP_ATOMIC, &safe_dma_addr);
+        buf->ptr = ptr;
+        buf->size = size;
+        buf->direction = dir;
+        buf->pool = pool;
 
-                DO_STATS ( device_info->lbp_allocs++ );
+        if (pool) {
+                buf->safe = dma_pool_alloc(pool->pool, GFP_ATOMIC,
+                                           &buf->safe_dma_addr);
         } else {
-                pool = NULL;
-                safe = dma_alloc_coherent(dev, size, &safe_dma_addr, GFP_ATOMIC);
+                buf->safe = dma_alloc_coherent(dev, size, &buf->safe_dma_addr,
+                                               GFP_ATOMIC);
         }
 
-        if (safe == NULL) {
-                dev_warn(device_info->dev,
-                        "%s: could not alloc dma memory (size=%d)\n",
-                       __func__, size);
+        if (buf->safe == NULL) {
+                dev_warn(dev,
+                         "%s: could not alloc dma memory (size=%d)\n",
+                         __func__, size);
                 kfree(buf);
                 return NULL;
         }
 
 #ifdef STATS
+        if (pool)
+                pool->allocs++;
+        device_info->total_allocs++;
         if (device_info->total_allocs % 1000 == 0)
                 print_alloc_stats(device_info);
 #endif
 
-        buf->ptr = ptr;
-        buf->size = size;
-        buf->direction = dir;
-        buf->pool = pool;
-        buf->safe = safe;
-        buf->safe_dma_addr = safe_dma_addr;
-
         list_add(&buf->node, &device_info->safe_buffers);
 
         return buf;
@@ -186,7 +189,7 @@ free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *
         list_del(&buf->node);
 
         if (buf->pool)
-                dma_pool_free(buf->pool, buf->safe, buf->safe_dma_addr);
+                dma_pool_free(buf->pool->pool, buf->safe, buf->safe_dma_addr);
         else
                 dma_free_coherent(device_info->dev, buf->size, buf->safe,
                                     buf->safe_dma_addr);
@@ -197,12 +200,10 @@ free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *
 /* ************************************************** */
 
 #ifdef STATS
-
 static void print_map_stats(struct dmabounce_device_info *device_info)
 {
-        printk(KERN_INFO
-                "%s: dmabounce: map_op_count=%lu, bounce_count=%lu\n",
-                device_info->dev->bus_id,
+        dev_info(device_info->dev,
+                "dmabounce: map_op_count=%lu, bounce_count=%lu\n",
                 device_info->map_op_count, device_info->bounce_count);
 }
 #endif
@@ -258,13 +259,13 @@ map_single(struct device *dev, void *ptr, size_t size,
                                 __func__, ptr, buf->safe, size);
                         memcpy(buf->safe, ptr, size);
                 }
-                consistent_sync(buf->safe, size, dir);
+                ptr = buf->safe;
 
                 dma_addr = buf->safe_dma_addr;
-        } else {
-                consistent_sync(ptr, size, dir);
         }
 
+        consistent_sync(ptr, size, dir);
+
         return dma_addr;
 }
 
@@ -278,7 +279,7 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
         /*
          * Trying to unmap an invalid mapping
          */
-        if (dma_addr == ~0) {
+        if (dma_mapping_error(dma_addr)) {
                 dev_err(dev, "Trying to unmap invalid mapping\n");
                 return;
         }
@@ -570,11 +571,25 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
         local_irq_restore(flags);
 }
 
+static int
+dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, const char *name,
+                    unsigned long size)
+{
+        pool->size = size;
+        DO_STATS(pool->allocs = 0);
+        pool->pool = dma_pool_create(name, dev, size,
+                                     0 /* byte alignment */,
+                                     0 /* no page-crossing issues */);
+
+        return pool->pool ? 0 : -ENOMEM;
+}
+
 int
 dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
                         unsigned long large_buffer_size)
 {
         struct dmabounce_device_info *device_info;
+        int ret;
 
         device_info = kmalloc(sizeof(struct dmabounce_device_info), GFP_ATOMIC);
         if (!device_info) {
@@ -584,45 +599,31 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
                 return -ENOMEM;
         }
 
-        device_info->small_buffer_pool =
-                dma_pool_create("small_dmabounce_pool",
-                                dev,
-                                small_buffer_size,
-                                0 /* byte alignment */,
-                                0 /* no page-crossing issues */);
-        if (!device_info->small_buffer_pool) {
-                printk(KERN_ERR
-                        "dmabounce: could not allocate small DMA pool for %s\n",
-                        dev->bus_id);
-                kfree(device_info);
-                return -ENOMEM;
+        ret = dmabounce_init_pool(&device_info->small, dev,
+                                  "small_dmabounce_pool", small_buffer_size);
+        if (ret) {
+                dev_err(dev,
+                        "dmabounce: could not allocate DMA pool for %ld byte objects\n",
+                        small_buffer_size);
+                goto err_free;
         }
 
         if (large_buffer_size) {
-                device_info->large_buffer_pool =
-                        dma_pool_create("large_dmabounce_pool",
-                                        dev,
-                                        large_buffer_size,
-                                        0 /* byte alignment */,
-                                        0 /* no page-crossing issues */);
-                if (!device_info->large_buffer_pool) {
-                printk(KERN_ERR
-                        "dmabounce: could not allocate large DMA pool for %s\n",
-                        dev->bus_id);
-                        dma_pool_destroy(device_info->small_buffer_pool);
-
-                        return -ENOMEM;
+                ret = dmabounce_init_pool(&device_info->large, dev,
+                                          "large_dmabounce_pool",
+                                          large_buffer_size);
+                if (ret) {
+                        dev_err(dev,
+                                "dmabounce: could not allocate DMA pool for %ld byte objects\n",
+                                large_buffer_size);
+                        goto err_destroy;
                 }
         }
 
         device_info->dev = dev;
-        device_info->small_buffer_size = small_buffer_size;
-        device_info->large_buffer_size = large_buffer_size;
         INIT_LIST_HEAD(&device_info->safe_buffers);
 
 #ifdef STATS
-        device_info->sbp_allocs = 0;
-        device_info->lbp_allocs = 0;
         device_info->total_allocs = 0;
         device_info->map_op_count = 0;
         device_info->bounce_count = 0;
@@ -634,6 +635,12 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
                 dev->bus_id, dev->bus->name);
 
         return 0;
+
+ err_destroy:
+        dma_pool_destroy(device_info->small.pool);
+ err_free:
+        kfree(device_info);
+        return ret;
 }
 
 void
@@ -655,10 +662,10 @@ dmabounce_unregister_dev(struct device *dev)
                 BUG();
         }
 
-        if (device_info->small_buffer_pool)
-                dma_pool_destroy(device_info->small_buffer_pool);
-        if (device_info->large_buffer_pool)
-                dma_pool_destroy(device_info->large_buffer_pool);
+        if (device_info->small.pool)
+                dma_pool_destroy(device_info->small.pool);
+        if (device_info->large.pool)
+                dma_pool_destroy(device_info->large.pool);
 
 #ifdef STATS
         print_alloc_stats(device_info);
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index e8356b76d7c6..4af0cf5f3bfb 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -12,6 +12,9 @@
  */
 
 #include <linux/device.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+
 #include <asm/io.h>
 #include <asm/hardware/scoop.h>
 
diff --git a/arch/arm/configs/ixdp2400_defconfig b/arch/arm/configs/ixdp2400_defconfig
index 678720fa2e2e..ddeb9f99d662 100644
--- a/arch/arm/configs/ixdp2400_defconfig
+++ b/arch/arm/configs/ixdp2400_defconfig
@@ -559,7 +559,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_NR_UARTS=1
 # CONFIG_SERIAL_8250_EXTENDED is not set
 
 #
diff --git a/arch/arm/configs/ixdp2800_defconfig b/arch/arm/configs/ixdp2800_defconfig
index 261e2343903b..81d3a0606f95 100644
--- a/arch/arm/configs/ixdp2800_defconfig
+++ b/arch/arm/configs/ixdp2800_defconfig
@@ -559,7 +559,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_NR_UARTS=1
 # CONFIG_SERIAL_8250_EXTENDED is not set
 
 #
diff --git a/arch/arm/kernel/arthur.c b/arch/arm/kernel/arthur.c
index a418dad6692c..0ee2e9819631 100644
--- a/arch/arm/kernel/arthur.c
+++ b/arch/arm/kernel/arthur.c
@@ -18,6 +18,7 @@
 #include <linux/stddef.h>
 #include <linux/signal.h>
 #include <linux/init.h>
+#include <linux/sched.h>
 
 #include <asm/ptrace.h>
 
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index cd99b83f14c2..9bd8609a2926 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -782,7 +782,7 @@ static int do_ptrace(int request, struct task_struct *child, long addr, long dat
         return ret;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret;
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 69449a818dcc..fc4729106a32 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -36,10 +36,6 @@
 #include <asm/thread_info.h>
 #include <asm/mach/time.h>
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 /*
  * Our system timer.
  */
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 66e5a0516f23..45e9ea6cd2a5 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -198,25 +198,16 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
         barrier();
 }
 
-DEFINE_SPINLOCK(die_lock);
-
-/*
- * This function is protected against re-entrancy.
- */
-NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
+static void __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs)
 {
-        struct task_struct *tsk = current;
+        struct task_struct *tsk = thread->task;
         static int die_counter;
 
-        console_verbose();
-        spin_lock_irq(&die_lock);
-        bust_spinlocks(1);
-
         printk("Internal error: %s: %x [#%d]\n", str, err, ++die_counter);
         print_modules();
         __show_regs(regs);
         printk("Process %s (pid: %d, stack limit = 0x%p)\n",
-                tsk->comm, tsk->pid, tsk->thread_info + 1);
+                tsk->comm, tsk->pid, thread + 1);
 
         if (!user_mode(regs) || in_interrupt()) {
                 dump_mem("Stack: ", regs->ARM_sp,
@@ -224,7 +215,21 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
                 dump_backtrace(regs, tsk);
                 dump_instr(regs);
         }
+}
 
+DEFINE_SPINLOCK(die_lock);
+
+/*
+ * This function is protected against re-entrancy.
+ */
+NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
+{
+        struct thread_info *thread = current_thread_info();
+
+        console_verbose();
+        spin_lock_irq(&die_lock);
+        bust_spinlocks(1);
+        __die(str, err, thread, regs);
         bust_spinlocks(0);
         spin_unlock_irq(&die_lock);
         do_exit(SIGSEGV);
diff --git a/arch/arm/lib/ashldi3.S b/arch/arm/lib/ashldi3.S
new file mode 100644
index 000000000000..561e20717b30
--- /dev/null
+++ b/arch/arm/lib/ashldi3.S
@@ -0,0 +1,48 @@
+/* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+
+#include <linux/linkage.h>
+
+#ifdef __ARMEB__
+#define al r1
+#define ah r0
+#else
+#define al r0
+#define ah r1
+#endif
+
+ENTRY(__ashldi3)
+
+        subs    r3, r2, #32
+        rsb     ip, r2, #32
+        movmi   ah, ah, lsl r2
+        movpl   ah, al, lsl r3
+        orrmi   ah, ah, al, lsr ip
+        mov     al, al, lsl r2
+        mov     pc, lr
+
diff --git a/arch/arm/lib/ashldi3.c b/arch/arm/lib/ashldi3.c
deleted file mode 100644
index b62875cfd8f8..000000000000
--- a/arch/arm/lib/ashldi3.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/* More subroutines needed by GCC output code on some machines.  */
-/* Compile this one with gcc.  */
-/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
-
-This file is part of GNU CC.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.  */
-
-/* As a special exception, if you link this library with other files,
-   some of which are compiled with GCC, to produce an executable,
-   this library does not by itself cause the resulting executable
-   to be covered by the GNU General Public License.
-   This exception does not however invalidate any other reasons why
-   the executable file might be covered by the GNU General Public License.
- */
-/* support functions required by the kernel. based on code from gcc-2.95.3 */
-/* I Molton     29/07/01 */
-
-#include "gcclib.h"
-
-s64 __ashldi3(s64 u, int b)
-{
-        DIunion w;
-        int bm;
-        DIunion uu;
-
-        if (b == 0)
-                return u;
-
-        uu.ll = u;
-
-        bm = (sizeof(s32) * BITS_PER_UNIT) - b;
-        if (bm <= 0) {
-                w.s.low = 0;
-                w.s.high = (u32) uu.s.low << -bm;
-        } else {
-                u32 carries = (u32) uu.s.low >> bm;
-                w.s.low = (u32) uu.s.low << b;
-                w.s.high = ((u32) uu.s.high << b) | carries;
-        }
-
-        return w.ll;
-}
diff --git a/arch/arm/lib/ashrdi3.S b/arch/arm/lib/ashrdi3.S
new file mode 100644
index 000000000000..86fb2a90c301
--- /dev/null
+++ b/arch/arm/lib/ashrdi3.S
@@ -0,0 +1,48 @@
+/* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+
+#include <linux/linkage.h>
+
+#ifdef __ARMEB__
+#define al r1
+#define ah r0
+#else
+#define al r0
+#define ah r1
+#endif
+
+ENTRY(__ashrdi3)
+
+        subs    r3, r2, #32
+        rsb     ip, r2, #32
+        movmi   al, al, lsr r2
+        movpl   al, ah, asr r3
+        orrmi   al, al, ah, lsl ip
+        mov     ah, ah, asr r2
+        mov     pc, lr
+
diff --git a/arch/arm/lib/ashrdi3.c b/arch/arm/lib/ashrdi3.c
deleted file mode 100644
index 9a8600a7543f..000000000000
--- a/arch/arm/lib/ashrdi3.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* More subroutines needed by GCC output code on some machines.  */
-/* Compile this one with gcc.  */
-/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
-
-This file is part of GNU CC.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.  */
-
-/* As a special exception, if you link this library with other files,
-   some of which are compiled with GCC, to produce an executable,
-   this library does not by itself cause the resulting executable
-   to be covered by the GNU General Public License.
-   This exception does not however invalidate any other reasons why
-   the executable file might be covered by the GNU General Public License.
- */
-/* support functions required by the kernel. based on code from gcc-2.95.3 */
-/* I Molton     29/07/01 */
-
-#include "gcclib.h"
-
-s64 __ashrdi3(s64 u, int b)
-{
-        DIunion w;
-        int bm;
-        DIunion uu;
-
-        if (b == 0)
-                return u;
-
-        uu.ll = u;
-
-        bm = (sizeof(s32) * BITS_PER_UNIT) - b;
-        if (bm <= 0) {
-                /* w.s.high = 1..1 or 0..0 */
-                w.s.high = uu.s.high >> (sizeof(s32) * BITS_PER_UNIT - 1);
-                w.s.low = uu.s.high >> -bm;
-        } else {
-                u32 carries = (u32) uu.s.high << bm;
-                w.s.high = uu.s.high >> b;
-                w.s.low = ((u32) uu.s.low >> b) | carries;
-        }
-
-        return w.ll;
-}
diff --git a/arch/arm/lib/gcclib.h b/arch/arm/lib/gcclib.h
deleted file mode 100644
index 8b6dcc656de7..000000000000
--- a/arch/arm/lib/gcclib.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* gcclib.h -- definitions for various functions 'borrowed' from gcc-2.95.3 */
-/* I Molton     29/07/01 */
-
-#include <linux/types.h>
-
-#define BITS_PER_UNIT   8
-#define SI_TYPE_SIZE    (sizeof(s32) * BITS_PER_UNIT)
-
-#ifdef __ARMEB__
-struct DIstruct {
-        s32 high, low;
-};
-#else
-struct DIstruct {
-        s32 low, high;
-};
-#endif
-
-typedef union {
-        struct DIstruct s;
-        s64 ll;
-} DIunion;
diff --git a/arch/arm/lib/lshrdi3.S b/arch/arm/lib/lshrdi3.S
new file mode 100644
index 000000000000..46c2ed19ec95
--- /dev/null
+++ b/arch/arm/lib/lshrdi3.S
@@ -0,0 +1,48 @@
+/* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
+   Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+
+#include <linux/linkage.h>
+
+#ifdef __ARMEB__
+#define al r1
+#define ah r0
+#else
+#define al r0
+#define ah r1
+#endif
+
+ENTRY(__lshrdi3)
+
+        subs    r3, r2, #32
+        rsb     ip, r2, #32
+        movmi   al, al, lsr r2
+        movpl   al, ah, lsr r3
+        orrmi   al, al, ah, lsl ip
+        mov     ah, ah, lsr r2
+        mov     pc, lr
+
diff --git a/arch/arm/lib/lshrdi3.c b/arch/arm/lib/lshrdi3.c
deleted file mode 100644
index 3681f49d2b6e..000000000000
--- a/arch/arm/lib/lshrdi3.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/* More subroutines needed by GCC output code on some machines.  */
-/* Compile this one with gcc.  */
-/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
-
-This file is part of GNU CC.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.  */
-
-/* As a special exception, if you link this library with other files,
-   some of which are compiled with GCC, to produce an executable,
-   this library does not by itself cause the resulting executable
-   to be covered by the GNU General Public License.
-   This exception does not however invalidate any other reasons why
-   the executable file might be covered by the GNU General Public License.
- */
-/* support functions required by the kernel. based on code from gcc-2.95.3 */
-/* I Molton     29/07/01 */
-
-#include "gcclib.h"
-
-s64 __lshrdi3(s64 u, int b)
-{
-        DIunion w;
-        int bm;
-        DIunion uu;
-
-        if (b == 0)
-                return u;
-
-        uu.ll = u;
-
-        bm = (sizeof(s32) * BITS_PER_UNIT) - b;
-        if (bm <= 0) {
-                w.s.high = 0;
-                w.s.low = (u32) uu.s.high >> -bm;
-        } else {
-                u32 carries = (u32) uu.s.high << bm;
-                w.s.high = (u32) uu.s.high >> b;
-                w.s.low = ((u32) uu.s.low >> b) | carries;
-        }
-
-        return w.ll;
-}
diff --git a/arch/arm/lib/muldi3.S b/arch/arm/lib/muldi3.S
new file mode 100644
index 000000000000..c7fbdf005319
--- /dev/null
+++ b/arch/arm/lib/muldi3.S
@@ -0,0 +1,44 @@
+/*
+ *  linux/arch/arm/lib/muldi3.S
+ *
+ *  Author:     Nicolas Pitre
+ *  Created:    Oct 19, 2005
+ *  Copyright:  Monta Vista Software, Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+#ifdef __ARMEB__
+#define xh r0
+#define xl r1
+#define yh r2
+#define yl r3
+#else
+#define xl r0
+#define xh r1
+#define yl r2
+#define yh r3
+#endif
+
+ENTRY(__muldi3)
+
+        mul     xh, yl, xh
+        mla     xh, xl, yh, xh
+        mov     ip, xl, asr #16
+        mov     yh, yl, asr #16
+        bic     xl, xl, ip, lsl #16
+        bic     yl, yl, yh, lsl #16
+        mla     xh, yh, ip, xh
+        mul     yh, xl, yh
+        mul     xl, yl, xl
+        mul     ip, yl, ip
+        adds    xl, xl, yh, lsl #16
+        adc     xh, xh, yh, lsr #16
+        adds    xl, xl, ip, lsl #16
+        adc     xh, xh, ip, lsr #16
+        mov     pc, lr
+
diff --git a/arch/arm/lib/muldi3.c b/arch/arm/lib/muldi3.c
deleted file mode 100644
index 0a3b93313f18..000000000000
--- a/arch/arm/lib/muldi3.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/* More subroutines needed by GCC output code on some machines.  */
-/* Compile this one with gcc.  */
-/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
-
-This file is part of GNU CC.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.  */
-
-/* As a special exception, if you link this library with other files,
-   some of which are compiled with GCC, to produce an executable,
-   this library does not by itself cause the resulting executable
-   to be covered by the GNU General Public License.
-   This exception does not however invalidate any other reasons why
-   the executable file might be covered by the GNU General Public License.
- */
-/* support functions required by the kernel. based on code from gcc-2.95.3 */
-/* I Molton     29/07/01 */
-
-#include "gcclib.h"
-
-#define umul_ppmm(xh, xl, a, b) \
-{register u32 __t0, __t1, __t2;                                     \
-  __asm__ ("%@ Inlined umul_ppmm                                        \n\
-        mov     %2, %5, lsr #16                                         \n\
-        mov     %0, %6, lsr #16                                         \n\
-        bic     %3, %5, %2, lsl #16                                     \n\
-        bic     %4, %6, %0, lsl #16                                     \n\
-        mul     %1, %3, %4                                              \n\
-        mul     %4, %2, %4                                              \n\
-        mul     %3, %0, %3                                              \n\
-        mul     %0, %2, %0                                              \n\
-        adds    %3, %4, %3                                              \n\
-        addcs   %0, %0, #65536                                          \n\
-        adds    %1, %1, %3, lsl #16                                     \n\
-        adc     %0, %0, %3, lsr #16"                                    \
-           : "=&r" ((u32) (xh)),                                    \
-             "=r" ((u32) (xl)),                                     \
-             "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
-           : "r" ((u32) (a)),                                       \
-             "r" ((u32) (b)));}
-
-#define __umulsidi3(u, v) \
-  ({DIunion __w;                                                        \
-    umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
-    __w.ll; })
-
-s64 __muldi3(s64 u, s64 v)
-{
-        DIunion w;
-        DIunion uu, vv;
-
-        uu.ll = u, vv.ll = v;
-
-        w.ll = __umulsidi3(uu.s.low, vv.s.low);
-        w.s.high += ((u32) uu.s.low * (u32) vv.s.high
-                     + (u32) uu.s.high * (u32) vv.s.low);
-
-        return w.ll;
-}
diff --git a/arch/arm/lib/ucmpdi2.S b/arch/arm/lib/ucmpdi2.S
new file mode 100644
index 000000000000..112630f93e5d
--- /dev/null
+++ b/arch/arm/lib/ucmpdi2.S
@@ -0,0 +1,35 @@
+/*
+ *  linux/arch/arm/lib/ucmpdi2.S
+ *
+ *  Author:     Nicolas Pitre
+ *  Created:    Oct 19, 2005
+ *  Copyright:  Monta Vista Software, Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+#ifdef __ARMEB__
+#define xh r0
+#define xl r1
+#define yh r2
+#define yl r3
+#else
+#define xl r0
+#define xh r1
+#define yl r2
+#define yh r3
+#endif
+
+ENTRY(__ucmpdi2)
+
+        cmp     xh, yh
+        cmpeq   xl, yl
+        movlo   r0, #0
+        moveq   r0, #1
+        movhi   r0, #2
+        mov     pc, lr
+
diff --git a/arch/arm/lib/ucmpdi2.c b/arch/arm/lib/ucmpdi2.c
deleted file mode 100644
index 57f3f2df3850..000000000000
--- a/arch/arm/lib/ucmpdi2.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/* More subroutines needed by GCC output code on some machines.  */
-/* Compile this one with gcc.  */
-/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
-
-This file is part of GNU CC.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.  */
-
-/* As a special exception, if you link this library with other files,
-   some of which are compiled with GCC, to produce an executable,
-   this library does not by itself cause the resulting executable
-   to be covered by the GNU General Public License.
-   This exception does not however invalidate any other reasons why
-   the executable file might be covered by the GNU General Public License.
- */
-/* support functions required by the kernel. based on code from gcc-2.95.3 */
-/* I Molton     29/07/01 */
-
-#include "gcclib.h"
-
-int __ucmpdi2(s64 a, s64 b)
-{
-        DIunion au, bu;
-
-        au.ll = a, bu.ll = b;
-
-        if ((u32) au.s.high < (u32) bu.s.high)
-                return 0;
-        else if ((u32) au.s.high > (u32) bu.s.high)
-                return 2;
-        if ((u32) au.s.low < (u32) bu.s.low)
-                return 0;
-        else if ((u32) au.s.low > (u32) bu.s.low)
-                return 2;
-        return 1;
-}
diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c
index cb14b0682cef..837d7f0bda4c 100644
--- a/arch/arm/mach-imx/generic.c
+++ b/arch/arm/mach-imx/generic.c
@@ -26,6 +26,8 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/string.h>
+
 #include <asm/arch/imxfb.h>
 #include <asm/hardware.h>
 #include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-integrator/clock.c b/arch/arm/mach-integrator/clock.c
index 56200594db3c..73c360685cad 100644
--- a/arch/arm/mach-integrator/clock.c
+++ b/arch/arm/mach-integrator/clock.c
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/string.h>
 
 #include <asm/semaphore.h>
 #include <asm/hardware/clock.h>
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index f368b85f0447..764ceb49470a 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -30,6 +30,7 @@
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
+#include <asm/param.h>          /* HZ */
 #include <asm/mach-types.h>
 #include <asm/hardware/amba.h>
 #include <asm/hardware/amba_kmi.h>
diff --git a/arch/arm/mach-integrator/lm.c b/arch/arm/mach-integrator/lm.c
index c5f19d160598..5b41e3a724e1 100644
--- a/arch/arm/mach-integrator/lm.c
+++ b/arch/arm/mach-integrator/lm.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/slab.h>
 
 #include <asm/arch/lm.h>
 
diff --git a/arch/arm/mach-iop3xx/iq31244-pci.c b/arch/arm/mach-iop3xx/iq31244-pci.c
index f997daa800bf..c6a973ba8fc6 100644
--- a/arch/arm/mach-iop3xx/iq31244-pci.c
+++ b/arch/arm/mach-iop3xx/iq31244-pci.c
@@ -14,6 +14,8 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-iop3xx/iq80321-pci.c b/arch/arm/mach-iop3xx/iq80321-pci.c
index 79fea3d20b66..802f6d091b75 100644
--- a/arch/arm/mach-iop3xx/iq80321-pci.c
+++ b/arch/arm/mach-iop3xx/iq80321-pci.c
@@ -14,6 +14,8 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-iop3xx/iq80331-pci.c b/arch/arm/mach-iop3xx/iq80331-pci.c
index f37a0e26b466..654e450a1311 100644
--- a/arch/arm/mach-iop3xx/iq80331-pci.c
+++ b/arch/arm/mach-iop3xx/iq80331-pci.c
@@ -13,6 +13,8 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-iop3xx/iq80332-pci.c b/arch/arm/mach-iop3xx/iq80332-pci.c
index b9807aa2aade..65951ffe4631 100644
--- a/arch/arm/mach-iop3xx/iq80332-pci.c
+++ b/arch/arm/mach-iop3xx/iq80332-pci.c
@@ -13,6 +13,8 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 60c8b9d8bb9c..656f73bbcb5a 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -33,6 +33,7 @@
 
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/irq.h>
+#include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
 #include <asm/arch/corgi.h>
@@ -224,6 +225,22 @@ static struct pxamci_platform_data corgi_mci_platform_data = {
 };
 
 
+/*
+ * Irda
+ */
+static void corgi_irda_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF)
+                GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
+        else
+                GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
+}
+
+static struct pxaficp_platform_data corgi_ficp_platform_data = {
+        .transceiver_cap  = IR_SIRMODE | IR_OFF,
+        .transceiver_mode = corgi_irda_transceiver_mode,
+};
+
 
 /*
  * USB Device Controller
@@ -269,10 +286,13 @@ static void __init corgi_init(void)
 
         corgi_ssp_set_machinfo(&corgi_ssp_machinfo);
 
+        pxa_gpio_mode(CORGI_GPIO_IR_ON | GPIO_OUT);
         pxa_gpio_mode(CORGI_GPIO_USB_PULLUP | GPIO_OUT);
         pxa_gpio_mode(CORGI_GPIO_HSYNC | GPIO_IN);
+
         pxa_set_udc_info(&udc_info);
         pxa_set_mci_info(&corgi_mci_platform_data);
+        pxa_set_ficp_info(&corgi_ficp_platform_data);
 
         scoop_num = 1;
         scoop_devs = &corgi_pcmcia_scoop[0];
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 3248bc9b9495..9c0289333301 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -23,6 +23,7 @@
 #include <linux/device.h>
 #include <linux/ioport.h>
 #include <linux/pm.h>
+#include <linux/string.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index f25638810017..6d413f6701a7 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -32,6 +32,7 @@
 #include <asm/arch/irq.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
+#include <asm/arch/irda.h>
 #include <asm/arch/poodle.h>
 #include <asm/arch/pxafb.h>
 
@@ -152,6 +153,24 @@ static struct pxamci_platform_data poodle_mci_platform_data = {
 
 
 /*
+ * Irda
+ */
+static void poodle_irda_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF) {
+                GPSR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
+        } else {
+                GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
+        }
+}
+
+static struct pxaficp_platform_data poodle_ficp_platform_data = {
+        .transceiver_cap  = IR_SIRMODE | IR_OFF,
+        .transceiver_mode = poodle_irda_transceiver_mode,
+};
+
+
+/*
  * USB Device Controller
  */
 static void poodle_udc_command(int cmd)
@@ -244,8 +263,10 @@ static void __init poodle_init(void)
 
         set_pxa_fb_info(&poodle_fb_info);
         pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT);
+        pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT);
         pxa_set_udc_info(&udc_info);
         pxa_set_mci_info(&poodle_mci_platform_data);
+        pxa_set_ficp_info(&poodle_ficp_platform_data);
 
         scoop_num = 1;
         scoop_devs = &poodle_pcmcia_scoop[0];
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index d0ab428c2d7d..b838842b6a20 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -34,6 +34,7 @@
 
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/irq.h>
+#include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
 #include <asm/arch/pxafb.h>
@@ -277,6 +278,23 @@ static struct pxamci_platform_data spitz_mci_platform_data = {
 
 
 /*
+ * Irda
+ */
+static void spitz_irda_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF)
+                set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
+        else
+                reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
+}
+
+static struct pxaficp_platform_data spitz_ficp_platform_data = {
+        .transceiver_cap  = IR_SIRMODE | IR_OFF,
+        .transceiver_mode = spitz_irda_transceiver_mode,
+};
+
+
+/*
  * Spitz PXA Framebuffer
  */
 static struct pxafb_mach_info spitz_pxafb_info __initdata = {
@@ -326,6 +344,7 @@ static void __init common_init(void)
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_mci_info(&spitz_mci_platform_data);
+        pxa_set_ficp_info(&spitz_ficp_platform_data);
         set_pxa_fb_parent(&spitzssp_device.dev);
         set_pxa_fb_info(&spitz_pxafb_info);
 }
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index f94b0fbcdcc8..83eba8b54816 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -17,6 +17,7 @@
 #include <linux/pm.h>
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
+#include <linux/sched.h>        /* just for sched_clock() - funny that */
 
 #include <asm/div64.h>
 #include <asm/hardware.h>
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 48025c2b9987..b96a2ea15d41 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/string.h>
 
 #include <asm/semaphore.h>
 #include <asm/hardware/clock.h>
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 27d041574ea7..269ce6913ee9 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -22,9 +22,7 @@
 #endif
 
 #define from_address    (0xffff8000)
-#define from_pgprot     PAGE_KERNEL
 #define to_address      (0xffffc000)
-#define to_pgprot       PAGE_KERNEL
 
 #define TOP_PTE(x)      pte_offset_kernel(top_pmd, x)
 
@@ -34,7 +32,7 @@ static DEFINE_SPINLOCK(v6_lock);
  * Copy the user page.  No aliasing to deal with so we can just
  * attack the kernel's existing mapping of these pages.
  */
-void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr)
+static void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr)
 {
         copy_page(kto, kfrom);
 }
@@ -43,7 +41,7 @@ void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long v
  * Clear the user page.  No aliasing to deal with so we can just
  * attack the kernel's existing mapping of this page.
  */
-void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
+static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
 {
         clear_page(kaddr);
 }
@@ -51,7 +49,7 @@ void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
 /*
  * Copy the page, taking account of the cache colour.
  */
-void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
+static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
 {
         unsigned int offset = CACHE_COLOUR(vaddr);
         unsigned long from, to;
@@ -72,8 +70,8 @@ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vadd
          */
         spin_lock(&v6_lock);
 
-        set_pte(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, from_pgprot));
-        set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, to_pgprot));
+        set_pte(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL));
+        set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL));
 
         from = from_address + (offset << PAGE_SHIFT);
         to   = to_address + (offset << PAGE_SHIFT);
@@ -91,7 +89,7 @@ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vadd
  * so remap the kernel page into the same cache colour as the user
  * page.
  */
-void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
+static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
 {
         unsigned int offset = CACHE_COLOUR(vaddr);
         unsigned long to = to_address + (offset << PAGE_SHIFT);
@@ -112,7 +110,7 @@ void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
          */
         spin_lock(&v6_lock);
 
-        set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, to_pgprot));
+        set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL));
         flush_tlb_kernel_page(to);
         clear_page((void *)to);
 
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 52a58b2da288..a020fe16428f 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/string.h>
 
 #include <asm/io.h>
 #include <asm/semaphore.h>
diff --git a/arch/arm26/kernel/ptrace.c b/arch/arm26/kernel/ptrace.c
index 8a52124de0e1..cf7e977d18c8 100644
--- a/arch/arm26/kernel/ptrace.c
+++ b/arch/arm26/kernel/ptrace.c
@@ -665,7 +665,7 @@ static int do_ptrace(int request, struct task_struct *child, long addr, long dat
         return ret;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret;
diff --git a/arch/arm26/kernel/time.c b/arch/arm26/kernel/time.c
index e66aedd02fad..335525339ad6 100644
--- a/arch/arm26/kernel/time.c
+++ b/arch/arm26/kernel/time.c
@@ -34,10 +34,6 @@
 #include <asm/irq.h>
 #include <asm/ioc.h>
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 extern unsigned long wall_jiffies;
 
 /* this needs a better home */
diff --git a/arch/cris/arch-v10/drivers/axisflashmap.c b/arch/cris/arch-v10/drivers/axisflashmap.c
index 11ab3836aac6..56b038c8d482 100644
--- a/arch/cris/arch-v10/drivers/axisflashmap.c
+++ b/arch/cris/arch-v10/drivers/axisflashmap.c
@@ -140,6 +140,7 @@
 #include <linux/kernel.h>
 #include <linux/config.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 
 #include <linux/mtd/concat.h>
 #include <linux/mtd/map.h>
diff --git a/arch/cris/arch-v32/drivers/axisflashmap.c b/arch/cris/arch-v32/drivers/axisflashmap.c
index 78ed52b1cdac..b679f983b90a 100644
--- a/arch/cris/arch-v32/drivers/axisflashmap.c
+++ b/arch/cris/arch-v32/drivers/axisflashmap.c
@@ -20,6 +20,7 @@
 #include <linux/kernel.h>
 #include <linux/config.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 
 #include <linux/mtd/concat.h>
 #include <linux/mtd/map.h>
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index a2d99b4aedcd..66ba8898db07 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -31,10 +31,7 @@
 #include <linux/timex.h>
 #include <linux/init.h>
 #include <linux/profile.h>
-
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
+#include <linux/sched.h>        /* just for sched_clock() - funny that */
 
 int have_rtc;  /* used to remember if we have an RTC or not */;
 
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c
index cbe03cba9f02..cb335a14a315 100644
--- a/arch/frv/kernel/ptrace.c
+++ b/arch/frv/kernel/ptrace.c
@@ -106,7 +106,7 @@ void ptrace_enable(struct task_struct *child)
         child->thread.frame0->__status |= REG__STATUS_STEP;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         unsigned long tmp;
diff --git a/arch/frv/kernel/time.c b/arch/frv/kernel/time.c
index f43b734482e3..2e9741227b73 100644
--- a/arch/frv/kernel/time.c
+++ b/arch/frv/kernel/time.c
@@ -34,9 +34,6 @@
 
 extern unsigned long wall_jiffies;
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-EXPORT_SYMBOL(jiffies_64);
-
 unsigned long __nongprelbss __clkin_clock_speed_HZ;
 unsigned long __nongprelbss __ext_bus_clock_speed_HZ;
 unsigned long __nongprelbss __res_bus_clock_speed_HZ;
diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
index 05c15e869777..a569fe4aa284 100644
--- a/arch/h8300/kernel/ptrace.c
+++ b/arch/h8300/kernel/ptrace.c
@@ -57,7 +57,7 @@ void ptrace_disable(struct task_struct *child)
         h8300_disable_trace(child);
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret;
diff --git a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c
index af8c5d2057dd..688a5100604c 100644
--- a/arch/h8300/kernel/time.c
+++ b/arch/h8300/kernel/time.c
@@ -32,10 +32,6 @@
 
 #define TICK_SIZE (tick_nsec / 1000)
 
-u64 jiffies_64;
-
-EXPORT_SYMBOL(jiffies_64);
-
 /*
  * timer_interrupt() needs to keep up the real-time clock,
  * as well as call the "do_timer()" routine every clocktick
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index d2703cda61ea..5383e5e2d9b7 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -5,7 +5,7 @@
 
 mainmenu "Linux Kernel Configuration"
 
-config X86
+config X86_32
         bool
         default y
         help
@@ -18,6 +18,10 @@ config SEMAPHORE_SLEEPERS
         bool
         default y
 
+config X86
+        bool
+        default y
+
 config MMU
         bool
         default y
@@ -151,304 +155,7 @@ config ES7000_CLUSTERED_APIC
         default y
         depends on SMP && X86_ES7000 && MPENTIUMIII
 
-if !X86_ELAN
-
-choice
-        prompt "Processor family"
-        default M686
-
-config M386
-        bool "386"
-        ---help---
-          This is the processor type of your CPU. This information is used for
-          optimizing purposes. In order to compile a kernel that can run on
-          all x86 CPU types (albeit not optimally fast), you can specify
-          "386" here.
-
-          The kernel will not necessarily run on earlier architectures than
-          the one you have chosen, e.g. a Pentium optimized kernel will run on
-          a PPro, but not necessarily on a i486.
-
-          Here are the settings recommended for greatest speed:
-          - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
-          486DLC/DLC2, UMC 486SX-S and NexGen Nx586.  Only "386" kernels
-          will run on a 386 class machine.
-          - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
-          SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
-          - "586" for generic Pentium CPUs lacking the TSC
-          (time stamp counter) register.
-          - "Pentium-Classic" for the Intel Pentium.
-          - "Pentium-MMX" for the Intel Pentium MMX.
-          - "Pentium-Pro" for the Intel Pentium Pro.
-          - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
-          - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
-          - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
-          - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
-          - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
-          - "Crusoe" for the Transmeta Crusoe series.
-          - "Efficeon" for the Transmeta Efficeon series.
-          - "Winchip-C6" for original IDT Winchip.
-          - "Winchip-2" for IDT Winchip 2.
-          - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
-          - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
-          - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
-          - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
-
-          If you don't know what to do, choose "386".
-
-config M486
-        bool "486"
-        help
-          Select this for a 486 series processor, either Intel or one of the
-          compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
-          DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
-          U5S.
-
-config M586
-        bool "586/K5/5x86/6x86/6x86MX"
-        help
-          Select this for an 586 or 686 series processor such as the AMD K5,
-          the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
-          assume the RDTSC (Read Time Stamp Counter) instruction.
-
-config M586TSC
-        bool "Pentium-Classic"
-        help
-          Select this for a Pentium Classic processor with the RDTSC (Read
-          Time Stamp Counter) instruction for benchmarking.
-
-config M586MMX
-        bool "Pentium-MMX"
-        help
-          Select this for a Pentium with the MMX graphics/multimedia
-          extended instructions.
-
-config M686
-        bool "Pentium-Pro"
-        help
-          Select this for Intel Pentium Pro chips.  This enables the use of
-          Pentium Pro extended instructions, and disables the init-time guard
-          against the f00f bug found in earlier Pentiums.
-
-config MPENTIUMII
-        bool "Pentium-II/Celeron(pre-Coppermine)"
-        help
-          Select this for Intel chips based on the Pentium-II and
-          pre-Coppermine Celeron core.  This option enables an unaligned
-          copy optimization, compiles the kernel with optimization flags
-          tailored for the chip, and applies any applicable Pentium Pro
-          optimizations.
-
-config MPENTIUMIII
-        bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
-        help
-          Select this for Intel chips based on the Pentium-III and
-          Celeron-Coppermine core.  This option enables use of some
-          extended prefetch instructions in addition to the Pentium II
-          extensions.
-
-config MPENTIUMM
-        bool "Pentium M"
-        help
-          Select this for Intel Pentium M (not Pentium-4 M)
-          notebook chips.
-
-config MPENTIUM4
-        bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
-        help
-          Select this for Intel Pentium 4 chips.  This includes the
-          Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
-          (not Pentium M) chips.  This option enables compile flags
-          optimized for the chip, uses the correct cache shift, and
-          applies any applicable Pentium III optimizations.
-
-config MK6
-        bool "K6/K6-II/K6-III"
-        help
-          Select this for an AMD K6-family processor.  Enables use of
-          some extended instructions, and passes appropriate optimization
-          flags to GCC.
-
-config MK7
-        bool "Athlon/Duron/K7"
-        help
-          Select this for an AMD Athlon K7-family processor.  Enables use of
-          some extended instructions, and passes appropriate optimization
-          flags to GCC.
-
-config MK8
-        bool "Opteron/Athlon64/Hammer/K8"
-        help
-          Select this for an AMD Opteron or Athlon64 Hammer-family processor.  Enables
-          use of some extended instructions, and passes appropriate optimization
-          flags to GCC.
-
-config MCRUSOE
-        bool "Crusoe"
-        help
-          Select this for a Transmeta Crusoe processor.  Treats the processor
-          like a 586 with TSC, and sets some GCC optimization flags (like a
-          Pentium Pro with no alignment requirements).
-
-config MEFFICEON
-        bool "Efficeon"
-        help
-          Select this for a Transmeta Efficeon processor.
-
-config MWINCHIPC6
-        bool "Winchip-C6"
-        help
-          Select this for an IDT Winchip C6 chip.  Linux and GCC
-          treat this chip as a 586TSC with some extended instructions
-          and alignment requirements.
-
-config MWINCHIP2
-        bool "Winchip-2"
-        help
-          Select this for an IDT Winchip-2.  Linux and GCC
-          treat this chip as a 586TSC with some extended instructions
-          and alignment requirements.
-
-config MWINCHIP3D
-        bool "Winchip-2A/Winchip-3"
-        help
-          Select this for an IDT Winchip-2A or 3.  Linux and GCC
-          treat this chip as a 586TSC with some extended instructions
-          and alignment reqirements.  Also enable out of order memory
-          stores for this CPU, which can increase performance of some
-          operations.
-
-config MGEODEGX1
-        bool "GeodeGX1"
-        help
-          Select this for a Geode GX1 (Cyrix MediaGX) chip.
-
-config MCYRIXIII
-        bool "CyrixIII/VIA-C3"
-        help
-          Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
-          treat this chip as a generic 586. Whilst the CPU is 686 class,
-          it lacks the cmov extension which gcc assumes is present when
-          generating 686 code.
-          Note that Nehemiah (Model 9) and above will not boot with this
-          kernel due to them lacking the 3DNow! instructions used in earlier
-          incarnations of the CPU.
-
-config MVIAC3_2
-        bool "VIA C3-2 (Nehemiah)"
-        help
-          Select this for a VIA C3 "Nehemiah". Selecting this enables usage
-          of SSE and tells gcc to treat the CPU as a 686.
-          Note, this kernel will not boot on older (pre model 9) C3s.
-
-endchoice
-
-config X86_GENERIC
-       bool "Generic x86 support"
-       help
-          Instead of just including optimizations for the selected
-          x86 variant (e.g. PII, Crusoe or Athlon), include some more
-          generic optimizations as well. This will make the kernel
-          perform better on x86 CPUs other than that selected.
-
-          This is really intended for distributors who need more
-          generic optimizations.
-
-endif
-
-#
-# Define implied options from the CPU selection here
-#
-config X86_CMPXCHG
-        bool
-        depends on !M386
-        default y
-
-config X86_XADD
-        bool
-        depends on !M386
-        default y
-
-config X86_L1_CACHE_SHIFT
-        int
-        default "7" if MPENTIUM4 || X86_GENERIC
-        default "4" if X86_ELAN || M486 || M386
-        default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
-        default "6" if MK7 || MK8 || MPENTIUMM
-
-config RWSEM_GENERIC_SPINLOCK
-        bool
-        depends on M386
-        default y
-
-config RWSEM_XCHGADD_ALGORITHM
-        bool
-        depends on !M386
-        default y
-
-config GENERIC_CALIBRATE_DELAY
-        bool
-        default y
-
-config X86_PPRO_FENCE
-        bool
-        depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
-        default y
-
-config X86_F00F_BUG
-        bool
-        depends on M586MMX || M586TSC || M586 || M486 || M386
-        default y
-
-config X86_WP_WORKS_OK
-        bool
-        depends on !M386
-        default y
-
-config X86_INVLPG
-        bool
-        depends on !M386
-        default y
-
-config X86_BSWAP
-        bool
-        depends on !M386
-        default y
-
-config X86_POPAD_OK
-        bool
-        depends on !M386
-        default y
-
-config X86_ALIGNMENT_16
-        bool
-        depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
-        default y
-
-config X86_GOOD_APIC
-        bool
-        depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
-        default y
-
-config X86_INTEL_USERCOPY
-        bool
-        depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
-        default y
-
-config X86_USE_PPRO_CHECKSUM
-        bool
-        depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON
-        default y
-
-config X86_USE_3DNOW
-        bool
-        depends on MCYRIXIII || MK7
-        default y
-
-config X86_OOSTORE
-        bool
-        depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
-        default y
+source "arch/i386/Kconfig.cpu"
 
 config HPET_TIMER
         bool "HPET Timer Support"
@@ -561,11 +268,6 @@ config X86_VISWS_APIC
         depends on X86_VISWS
         default y
 
-config X86_TSC
-        bool
-        depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1) && !X86_NUMAQ
-        default y
-
 config X86_MCE
         bool "Machine Check Exception"
         depends on !X86_VOYAGER
diff --git a/arch/i386/Kconfig.cpu b/arch/i386/Kconfig.cpu
new file mode 100644
index 000000000000..53bbb3c008ee
--- /dev/null
+++ b/arch/i386/Kconfig.cpu
@@ -0,0 +1,309 @@
+# Put here option for CPU selection and depending optimization
+if !X86_ELAN
+
+choice
+        prompt "Processor family"
+        default M686
+
+config M386
+        bool "386"
+        ---help---
+          This is the processor type of your CPU. This information is used for
+          optimizing purposes. In order to compile a kernel that can run on
+          all x86 CPU types (albeit not optimally fast), you can specify
+          "386" here.
+
+          The kernel will not necessarily run on earlier architectures than
+          the one you have chosen, e.g. a Pentium optimized kernel will run on
+          a PPro, but not necessarily on a i486.
+
+          Here are the settings recommended for greatest speed:
+          - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
+          486DLC/DLC2, UMC 486SX-S and NexGen Nx586.  Only "386" kernels
+          will run on a 386 class machine.
+          - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
+          SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
+          - "586" for generic Pentium CPUs lacking the TSC
+          (time stamp counter) register.
+          - "Pentium-Classic" for the Intel Pentium.
+          - "Pentium-MMX" for the Intel Pentium MMX.
+          - "Pentium-Pro" for the Intel Pentium Pro.
+          - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
+          - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
+          - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
+          - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
+          - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
+          - "Crusoe" for the Transmeta Crusoe series.
+          - "Efficeon" for the Transmeta Efficeon series.
+          - "Winchip-C6" for original IDT Winchip.
+          - "Winchip-2" for IDT Winchip 2.
+          - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
+          - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
+          - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
+          - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
+
+          If you don't know what to do, choose "386".
+
+config M486
+        bool "486"
+        help
+          Select this for a 486 series processor, either Intel or one of the
+          compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
+          DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
+          U5S.
+
+config M586
+        bool "586/K5/5x86/6x86/6x86MX"
+        help
+          Select this for an 586 or 686 series processor such as the AMD K5,
+          the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
+          assume the RDTSC (Read Time Stamp Counter) instruction.
+
+config M586TSC
+        bool "Pentium-Classic"
+        help
+          Select this for a Pentium Classic processor with the RDTSC (Read
+          Time Stamp Counter) instruction for benchmarking.
+
+config M586MMX
+        bool "Pentium-MMX"
+        help
+          Select this for a Pentium with the MMX graphics/multimedia
+          extended instructions.
+
+config M686
+        bool "Pentium-Pro"
+        help
+          Select this for Intel Pentium Pro chips.  This enables the use of
+          Pentium Pro extended instructions, and disables the init-time guard
+          against the f00f bug found in earlier Pentiums.
+
+config MPENTIUMII
+        bool "Pentium-II/Celeron(pre-Coppermine)"
+        help
+          Select this for Intel chips based on the Pentium-II and
+          pre-Coppermine Celeron core.  This option enables an unaligned
+          copy optimization, compiles the kernel with optimization flags
+          tailored for the chip, and applies any applicable Pentium Pro
+          optimizations.
+
+config MPENTIUMIII
+        bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
+        help
+          Select this for Intel chips based on the Pentium-III and
+          Celeron-Coppermine core.  This option enables use of some
+          extended prefetch instructions in addition to the Pentium II
+          extensions.
+
+config MPENTIUMM
+        bool "Pentium M"
+        help
+          Select this for Intel Pentium M (not Pentium-4 M)
+          notebook chips.
+
+config MPENTIUM4
+        bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
+        help
+          Select this for Intel Pentium 4 chips.  This includes the
+          Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
+          (not Pentium M) chips.  This option enables compile flags
+          optimized for the chip, uses the correct cache shift, and
+          applies any applicable Pentium III optimizations.
+
+config MK6
+        bool "K6/K6-II/K6-III"
+        help
+          Select this for an AMD K6-family processor.  Enables use of
+          some extended instructions, and passes appropriate optimization
+          flags to GCC.
+
+config MK7
+        bool "Athlon/Duron/K7"
+        help
+          Select this for an AMD Athlon K7-family processor.  Enables use of
+          some extended instructions, and passes appropriate optimization
+          flags to GCC.
+
+config MK8
+        bool "Opteron/Athlon64/Hammer/K8"
+        help
+          Select this for an AMD Opteron or Athlon64 Hammer-family processor.  Enables
+          use of some extended instructions, and passes appropriate optimization
+          flags to GCC.
+
+config MCRUSOE
+        bool "Crusoe"
+        help
+          Select this for a Transmeta Crusoe processor.  Treats the processor
+          like a 586 with TSC, and sets some GCC optimization flags (like a
+          Pentium Pro with no alignment requirements).
+
+config MEFFICEON
+        bool "Efficeon"
+        help
+          Select this for a Transmeta Efficeon processor.
+
+config MWINCHIPC6
+        bool "Winchip-C6"
+        help
+          Select this for an IDT Winchip C6 chip.  Linux and GCC
+          treat this chip as a 586TSC with some extended instructions
+          and alignment requirements.
+
+config MWINCHIP2
+        bool "Winchip-2"
+        help
+          Select this for an IDT Winchip-2.  Linux and GCC
+          treat this chip as a 586TSC with some extended instructions
+          and alignment requirements.
+
+config MWINCHIP3D
+        bool "Winchip-2A/Winchip-3"
+        help
+          Select this for an IDT Winchip-2A or 3.  Linux and GCC
+          treat this chip as a 586TSC with some extended instructions
+          and alignment reqirements.  Also enable out of order memory
+          stores for this CPU, which can increase performance of some
+          operations.
+
+config MGEODEGX1
+        bool "GeodeGX1"
+        help
+          Select this for a Geode GX1 (Cyrix MediaGX) chip.
+
+config MCYRIXIII
+        bool "CyrixIII/VIA-C3"
+        help
+          Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
+          treat this chip as a generic 586. Whilst the CPU is 686 class,
+          it lacks the cmov extension which gcc assumes is present when
+          generating 686 code.
+          Note that Nehemiah (Model 9) and above will not boot with this
+          kernel due to them lacking the 3DNow! instructions used in earlier
+          incarnations of the CPU.
+
+config MVIAC3_2
+        bool "VIA C3-2 (Nehemiah)"
+        help
+          Select this for a VIA C3 "Nehemiah". Selecting this enables usage
+          of SSE and tells gcc to treat the CPU as a 686.
+          Note, this kernel will not boot on older (pre model 9) C3s.
+
+endchoice
+
+config X86_GENERIC
+       bool "Generic x86 support"
+       help
+          Instead of just including optimizations for the selected
+          x86 variant (e.g. PII, Crusoe or Athlon), include some more
+          generic optimizations as well. This will make the kernel
+          perform better on x86 CPUs other than that selected.
+
+          This is really intended for distributors who need more
+          generic optimizations.
+
+endif
+
+#
+# Define implied options from the CPU selection here
+#
+config X86_CMPXCHG
+        bool
+        depends on !M386
+        default y
+
+config X86_XADD
+        bool
+        depends on !M386
+        default y
+
+config X86_L1_CACHE_SHIFT
+        int
+        default "7" if MPENTIUM4 || X86_GENERIC
+        default "4" if X86_ELAN || M486 || M386
+        default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
+        default "6" if MK7 || MK8 || MPENTIUMM
+
+config RWSEM_GENERIC_SPINLOCK
+        bool
+        depends on M386
+        default y
+
+config RWSEM_XCHGADD_ALGORITHM
+        bool
+        depends on !M386
+        default y
+
+config GENERIC_CALIBRATE_DELAY
+        bool
+        default y
+
+config X86_PPRO_FENCE
+        bool
+        depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
+        default y
+
+config X86_F00F_BUG
+        bool
+        depends on M586MMX || M586TSC || M586 || M486 || M386
+        default y
+
+config X86_WP_WORKS_OK
+        bool
+        depends on !M386
+        default y
+
+config X86_INVLPG
+        bool
+        depends on !M386
+        default y
+
+config X86_BSWAP
+        bool
+        depends on !M386
+        default y
+
+config X86_POPAD_OK
+        bool
+        depends on !M386
+        default y
+
+config X86_CMPXCHG64
+        bool
+        depends on !M386 && !M486
+        default y
+
+config X86_ALIGNMENT_16
+        bool
+        depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
+        default y
+
+config X86_GOOD_APIC
+        bool
+        depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
+        default y
+
+config X86_INTEL_USERCOPY
+        bool
+        depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
+        default y
+
+config X86_USE_PPRO_CHECKSUM
+        bool
+        depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON
+        default y
+
+config X86_USE_3DNOW
+        bool
+        depends on MCYRIXIII || MK7
+        default y
+
+config X86_OOSTORE
+        bool
+        depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
+        default y
+
+config X86_TSC
+        bool
+        depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1) && !X86_NUMAQ
+        default y
diff --git a/arch/i386/Makefile b/arch/i386/Makefile
index 09951990a622..d121ea18460f 100644
--- a/arch/i386/Makefile
+++ b/arch/i386/Makefile
@@ -34,35 +34,8 @@ CFLAGS += -pipe -msoft-float
 # prevent gcc from keeping the stack 16 byte aligned
 CFLAGS += $(call cc-option,-mpreferred-stack-boundary=2)
 
-align := $(cc-option-align)
-cflags-$(CONFIG_M386)           += -march=i386
-cflags-$(CONFIG_M486)           += -march=i486
-cflags-$(CONFIG_M586)           += -march=i586
-cflags-$(CONFIG_M586TSC)        += -march=i586
-cflags-$(CONFIG_M586MMX)        += $(call cc-option,-march=pentium-mmx,-march=i586)
-cflags-$(CONFIG_M686)           += -march=i686
-cflags-$(CONFIG_MPENTIUMII)     += -march=i686 $(call cc-option,-mtune=pentium2)
-cflags-$(CONFIG_MPENTIUMIII)    += -march=i686 $(call cc-option,-mtune=pentium3)
-cflags-$(CONFIG_MPENTIUMM)      += -march=i686 $(call cc-option,-mtune=pentium3)
-cflags-$(CONFIG_MPENTIUM4)      += -march=i686 $(call cc-option,-mtune=pentium4)
-cflags-$(CONFIG_MK6)            += -march=k6
-# Please note, that patches that add -march=athlon-xp and friends are pointless.
-# They make zero difference whatsosever to performance at this time.
-cflags-$(CONFIG_MK7)            += $(call cc-option,-march=athlon,-march=i686 $(align)-functions=4)
-cflags-$(CONFIG_MK8)            += $(call cc-option,-march=k8,$(call cc-option,-march=athlon,-march=i686 $(align)-functions=4))
-cflags-$(CONFIG_MCRUSOE)        += -march=i686 $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
-cflags-$(CONFIG_MEFFICEON)      += -march=i686 $(call cc-option,-mtune=pentium3) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
-cflags-$(CONFIG_MWINCHIPC6)     += $(call cc-option,-march=winchip-c6,-march=i586)
-cflags-$(CONFIG_MWINCHIP2)      += $(call cc-option,-march=winchip2,-march=i586)
-cflags-$(CONFIG_MWINCHIP3D)     += $(call cc-option,-march=winchip2,-march=i586)
-cflags-$(CONFIG_MCYRIXIII)      += $(call cc-option,-march=c3,-march=i486) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
-cflags-$(CONFIG_MVIAC3_2)       += $(call cc-option,-march=c3-2,-march=i686)
-
-# AMD Elan support
-cflags-$(CONFIG_X86_ELAN)       += -march=i486
-
-# Geode GX1 support
-cflags-$(CONFIG_MGEODEGX1)              += $(call cc-option,-march=pentium-mmx,-march=i486)
+# CPU-specific tuning. Anything which can be shared with UML should go here.
+include $(srctree)/arch/i386/Makefile.cpu
 
 # -mregparm=3 works ok on gcc-3.0 and later
 #
diff --git a/arch/i386/Makefile.cpu b/arch/i386/Makefile.cpu
new file mode 100644
index 000000000000..8e51456df23d
--- /dev/null
+++ b/arch/i386/Makefile.cpu
@@ -0,0 +1,41 @@
+# CPU tuning section - shared with UML.
+# Must change only cflags-y (or [yn]), not CFLAGS! That makes a difference for UML.
+
+#-mtune exists since gcc 3.4, and some -mcpu flavors didn't exist in gcc 2.95.
+HAS_MTUNE       := $(call cc-option-yn, -mtune=i386)
+ifeq ($(HAS_MTUNE),y)
+tune            = $(call cc-option,-mtune=$(1),)
+else
+tune            = $(call cc-option,-mcpu=$(1),)
+endif
+
+align := $(cc-option-align)
+cflags-$(CONFIG_M386)           += -march=i386
+cflags-$(CONFIG_M486)           += -march=i486
+cflags-$(CONFIG_M586)           += -march=i586
+cflags-$(CONFIG_M586TSC)        += -march=i586
+cflags-$(CONFIG_M586MMX)        += $(call cc-option,-march=pentium-mmx,-march=i586)
+cflags-$(CONFIG_M686)           += -march=i686
+cflags-$(CONFIG_MPENTIUMII)     += -march=i686 $(call tune,pentium2)
+cflags-$(CONFIG_MPENTIUMIII)    += -march=i686 $(call tune,pentium3)
+cflags-$(CONFIG_MPENTIUMM)      += -march=i686 $(call tune,pentium3)
+cflags-$(CONFIG_MPENTIUM4)      += -march=i686 $(call tune,pentium4)
+cflags-$(CONFIG_MK6)            += -march=k6
+# Please note, that patches that add -march=athlon-xp and friends are pointless.
+# They make zero difference whatsosever to performance at this time.
+cflags-$(CONFIG_MK7)            += $(call cc-option,-march=athlon,-march=i686 $(align)-functions=4)
+cflags-$(CONFIG_MK8)            += $(call cc-option,-march=k8,$(call cc-option,-march=athlon,-march=i686 $(align)-functions=4))
+cflags-$(CONFIG_MCRUSOE)        += -march=i686 $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
+cflags-$(CONFIG_MEFFICEON)      += -march=i686 $(call tune,pentium3) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
+cflags-$(CONFIG_MWINCHIPC6)     += $(call cc-option,-march=winchip-c6,-march=i586)
+cflags-$(CONFIG_MWINCHIP2)      += $(call cc-option,-march=winchip2,-march=i586)
+cflags-$(CONFIG_MWINCHIP3D)     += $(call cc-option,-march=winchip2,-march=i586)
+cflags-$(CONFIG_MCYRIXIII)      += $(call cc-option,-march=c3,-march=i486) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
+cflags-$(CONFIG_MVIAC3_2)       += $(call cc-option,-march=c3-2,-march=i686)
+
+# AMD Elan support
+cflags-$(CONFIG_X86_ELAN)       += -march=i486
+
+# Geode GX1 support
+cflags-$(CONFIG_MGEODEGX1)              += $(call cc-option,-march=pentium-mmx,-march=i486)
+
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 5546ddebec33..9204be6eedb3 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -803,6 +803,7 @@ no_apic:
 
 void __init init_apic_mappings(void)
 {
+        unsigned int orig_apicid;
         unsigned long apic_phys;
 
         /*
@@ -824,8 +825,11 @@ void __init init_apic_mappings(void)
          * Fetch the APIC ID of the BSP in case we have a
          * default configuration (or the MP table is broken).
          */
-        if (boot_cpu_physical_apicid == -1U)
-                boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
+        orig_apicid = boot_cpu_physical_apicid;
+        boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
+        if ((orig_apicid != -1U) && (orig_apicid != boot_cpu_physical_apicid))
+                printk(KERN_WARNING "Boot APIC ID in local APIC unexpected (%d vs %d)",
+                        orig_apicid, boot_cpu_physical_apicid);
 
 #ifdef CONFIG_X86_IO_APIC
         {
@@ -1046,10 +1050,11 @@ static unsigned int calibration_result;
 
 void __init setup_boot_APIC_clock(void)
 {
+        unsigned long flags;
         apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n");
         using_apic_timer = 1;
 
-        local_irq_disable();
+        local_irq_save(flags);
 
         calibration_result = calibrate_APIC_clock();
         /*
@@ -1057,7 +1062,7 @@ void __init setup_boot_APIC_clock(void)
          */
         setup_APIC_timer(calibration_result);
 
-        local_irq_enable();
+        local_irq_restore(flags);
 }
 
 void __devinit setup_secondary_APIC_clock(void)
@@ -1254,40 +1259,81 @@ fastcall void smp_error_interrupt(struct pt_regs *regs)
 }
 
 /*
- * This initializes the IO-APIC and APIC hardware if this is
- * a UP kernel.
+ * This initializes the IO-APIC and APIC hardware.
  */
-int __init APIC_init_uniprocessor (void)
+int __init APIC_init(void)
 {
-        if (enable_local_apic < 0)
-                clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
+        if (enable_local_apic < 0) {
+                printk(KERN_INFO "APIC disabled\n");
+                return -1;
+        }
 
-        if (!smp_found_config && !cpu_has_apic)
+        /* See if we have a SMP configuration or have forced enabled
+         * the local apic.
+         */
+        if (!smp_found_config && !acpi_lapic && !cpu_has_apic) {
+                enable_local_apic = -1;
                 return -1;
+        }
 
         /*
-         * Complain if the BIOS pretends there is one.
+         * Complain if the BIOS pretends there is an apic.
+         * Then get out because we don't have an a local apic.
          */
         if (!cpu_has_apic && APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
                 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
                         boot_cpu_physical_apicid);
+                printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
+                enable_local_apic = -1;
                 return -1;
         }
 
         verify_local_APIC();
 
+        /*
+         * Should not be necessary because the MP table should list the boot
+         * CPU too, but we do it for the sake of robustness anyway.
+         * Makes no sense to do this check in clustered apic mode, so skip it
+         */
+        if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
+                printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
+                                boot_cpu_physical_apicid);
+                physid_set(boot_cpu_physical_apicid, phys_cpu_present_map);
+        }
+
+        /*
+         * Switch from PIC to APIC mode.
+         */
         connect_bsp_APIC();
+        setup_local_APIC();
 
-        phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid);
+#ifdef CONFIG_X86_IO_APIC
+        /*
+         * Now start the IO-APICs
+         */
+        if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
+                setup_IO_APIC();
+#endif
+        return 0;
+}
 
-        setup_local_APIC();
+void __init APIC_late_time_init(void)
+{
+        /* Improve our loops per jiffy estimate */
+        loops_per_jiffy = ((1000 + HZ - 1)/HZ)*cpu_khz;
+        boot_cpu_data.loops_per_jiffy = loops_per_jiffy;
+        cpu_data[0].loops_per_jiffy = loops_per_jiffy;
+
+        /* setup_apic_nmi_watchdog doesn't work properly before cpu_khz is
+         * initialized.  So redo it here to ensure the boot cpu is setup
+         * properly.
+         */
+        if (nmi_watchdog == NMI_LOCAL_APIC)
+                setup_apic_nmi_watchdog();
 
 #ifdef CONFIG_X86_IO_APIC
-        if (smp_found_config)
-                if (!skip_ioapic_setup && nr_ioapics)
-                        setup_IO_APIC();
+        if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
+                IO_APIC_late_time_init();
 #endif
         setup_boot_APIC_clock();
-
-        return 0;
 }
diff --git a/arch/i386/kernel/apm.c b/arch/i386/kernel/apm.c
index d7811c4e8b50..d2ef0c2aa93e 100644
--- a/arch/i386/kernel/apm.c
+++ b/arch/i386/kernel/apm.c
@@ -597,12 +597,14 @@ static u8 apm_bios_call(u32 func, u32 ebx_in, u32 ecx_in,
         cpumask_t               cpus;
         int                     cpu;
         struct desc_struct      save_desc_40;
+        struct desc_struct      *gdt;
 
         cpus = apm_save_cpus();
         
         cpu = get_cpu();
-        save_desc_40 = per_cpu(cpu_gdt_table, cpu)[0x40 / 8];
-        per_cpu(cpu_gdt_table, cpu)[0x40 / 8] = bad_bios_desc;
+        gdt = get_cpu_gdt_table(cpu);
+        save_desc_40 = gdt[0x40 / 8];
+        gdt[0x40 / 8] = bad_bios_desc;
 
         local_save_flags(flags);
         APM_DO_CLI;
@@ -610,7 +612,7 @@ static u8 apm_bios_call(u32 func, u32 ebx_in, u32 ecx_in,
         apm_bios_call_asm(func, ebx_in, ecx_in, eax, ebx, ecx, edx, esi);
         APM_DO_RESTORE_SEGS;
         local_irq_restore(flags);
-        per_cpu(cpu_gdt_table, cpu)[0x40 / 8] = save_desc_40;
+        gdt[0x40 / 8] = save_desc_40;
         put_cpu();
         apm_restore_cpus(cpus);
         
@@ -639,13 +641,14 @@ static u8 apm_bios_call_simple(u32 func, u32 ebx_in, u32 ecx_in, u32 *eax)
         cpumask_t               cpus;
         int                     cpu;
         struct desc_struct      save_desc_40;
-
+        struct desc_struct      *gdt;
 
         cpus = apm_save_cpus();
         
         cpu = get_cpu();
-        save_desc_40 = per_cpu(cpu_gdt_table, cpu)[0x40 / 8];
-        per_cpu(cpu_gdt_table, cpu)[0x40 / 8] = bad_bios_desc;
+        gdt = get_cpu_gdt_table(cpu);
+        save_desc_40 = gdt[0x40 / 8];
+        gdt[0x40 / 8] = bad_bios_desc;
 
         local_save_flags(flags);
         APM_DO_CLI;
@@ -653,7 +656,7 @@ static u8 apm_bios_call_simple(u32 func, u32 ebx_in, u32 ecx_in, u32 *eax)
         error = apm_bios_call_simple_asm(func, ebx_in, ecx_in, eax);
         APM_DO_RESTORE_SEGS;
         local_irq_restore(flags);
-        __get_cpu_var(cpu_gdt_table)[0x40 / 8] = save_desc_40;
+        gdt[0x40 / 8] = save_desc_40;
         put_cpu();
         apm_restore_cpus(cpus);
         return error;
@@ -2295,35 +2298,36 @@ static int __init apm_init(void)
         apm_bios_entry.segment = APM_CS;
 
         for (i = 0; i < NR_CPUS; i++) {
-                set_base(per_cpu(cpu_gdt_table, i)[APM_CS >> 3],
+                struct desc_struct *gdt = get_cpu_gdt_table(i);
+                set_base(gdt[APM_CS >> 3],
                          __va((unsigned long)apm_info.bios.cseg << 4));
-                set_base(per_cpu(cpu_gdt_table, i)[APM_CS_16 >> 3],
+                set_base(gdt[APM_CS_16 >> 3],
                          __va((unsigned long)apm_info.bios.cseg_16 << 4));
-                set_base(per_cpu(cpu_gdt_table, i)[APM_DS >> 3],
+                set_base(gdt[APM_DS >> 3],
                          __va((unsigned long)apm_info.bios.dseg << 4));
 #ifndef APM_RELAX_SEGMENTS
                 if (apm_info.bios.version == 0x100) {
 #endif
                         /* For ASUS motherboard, Award BIOS rev 110 (and others?) */
-                        _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_CS >> 3], 64 * 1024 - 1);
+                        _set_limit((char *)&gdt[APM_CS >> 3], 64 * 1024 - 1);
                         /* For some unknown machine. */
-                        _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_CS_16 >> 3], 64 * 1024 - 1);
+                        _set_limit((char *)&gdt[APM_CS_16 >> 3], 64 * 1024 - 1);
                         /* For the DEC Hinote Ultra CT475 (and others?) */
-                        _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_DS >> 3], 64 * 1024 - 1);
+                        _set_limit((char *)&gdt[APM_DS >> 3], 64 * 1024 - 1);
 #ifndef APM_RELAX_SEGMENTS
                 } else {
-                        _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_CS >> 3],
+                        _set_limit((char *)&gdt[APM_CS >> 3],
                                 (apm_info.bios.cseg_len - 1) & 0xffff);
-                        _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_CS_16 >> 3],
+                        _set_limit((char *)&gdt[APM_CS_16 >> 3],
                                 (apm_info.bios.cseg_16_len - 1) & 0xffff);
-                        _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_DS >> 3],
+                        _set_limit((char *)&gdt[APM_DS >> 3],
                                 (apm_info.bios.dseg_len - 1) & 0xffff);
                       /* workaround for broken BIOSes */
                         if (apm_info.bios.cseg_len <= apm_info.bios.offset)
-                                _set_limit((char *)&per_cpu(cpu_gdt_table, i)[APM_CS >> 3], 64 * 1024 -1);
+                                _set_limit((char *)&gdt[APM_CS >> 3], 64 * 1024 -1);
                        if (apm_info.bios.dseg_len <= 0x40) { /* 0x40 * 4kB == 64kB */
                                 /* for the BIOS that assumes granularity = 1 */
-                                per_cpu(cpu_gdt_table, i)[APM_DS >> 3].b |= 0x800000;
+                                gdt[APM_DS >> 3].b |= 0x800000;
                                 printk(KERN_NOTICE "apm: we set the granularity of dseg.\n");
                         }
                 }
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 9ad43be9a01f..74145a33cb0f 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -573,6 +573,7 @@ void __devinit cpu_init(void)
         int cpu = smp_processor_id();
         struct tss_struct * t = &per_cpu(init_tss, cpu);
         struct thread_struct *thread = &current->thread;
+        struct desc_struct *gdt = get_cpu_gdt_table(cpu);
         __u32 stk16_off = (__u32)&per_cpu(cpu_16bit_stack, cpu);
 
         if (cpu_test_and_set(cpu, cpu_initialized)) {
@@ -594,24 +595,16 @@ void __devinit cpu_init(void)
          * Initialize the per-CPU GDT with the boot GDT,
          * and set up the GDT descriptor:
          */
-        memcpy(&per_cpu(cpu_gdt_table, cpu), cpu_gdt_table,
-               GDT_SIZE);
+        memcpy(gdt, cpu_gdt_table, GDT_SIZE);
 
         /* Set up GDT entry for 16bit stack */
-        *(__u64 *)&(per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_ESPFIX_SS]) |=
+        *(__u64 *)(&gdt[GDT_ENTRY_ESPFIX_SS]) |=
                 ((((__u64)stk16_off) << 16) & 0x000000ffffff0000ULL) |
                 ((((__u64)stk16_off) << 32) & 0xff00000000000000ULL) |
                 (CPU_16BIT_STACK_SIZE - 1);
 
         cpu_gdt_descr[cpu].size = GDT_SIZE - 1;
-        cpu_gdt_descr[cpu].address =
-            (unsigned long)&per_cpu(cpu_gdt_table, cpu);
-
-        /*
-         * Set up the per-thread TLS descriptor cache:
-         */
-        memcpy(thread->tls_array, &per_cpu(cpu_gdt_table, cpu),
-                GDT_ENTRY_TLS_ENTRIES * 8);
+        cpu_gdt_descr[cpu].address = (unsigned long)gdt;
 
         load_gdt(&cpu_gdt_descr[cpu]);
         load_idt(&idt_descr);
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
index 822c8ce9d1f1..caa9f7711343 100644
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -32,6 +32,7 @@
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
 #include <linux/compiler.h>
+#include <linux/sched.h>        /* current */
 #include <asm/io.h>
 #include <asm/delay.h>
 #include <asm/uaccess.h>
diff --git a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
index aa622d52c6e5..270f2188d68b 100644
--- a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
@@ -28,6 +28,7 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 #include <linux/cpumask.h>
+#include <linux/sched.h>        /* current / set_cpus_allowed() */
 
 #include <asm/processor.h> 
 #include <asm/msr.h>
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
index 58ca98fdc2ca..2d5c9adba0cd 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
@@ -32,6 +32,7 @@
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/cpumask.h>
+#include <linux/sched.h>        /* for current / set_cpus_allowed() */
 
 #include <asm/msr.h>
 #include <asm/io.h>
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
index c397b6220430..1465974256c9 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -22,6 +22,7 @@
 #include <linux/init.h>
 #include <linux/cpufreq.h>
 #include <linux/config.h>
+#include <linux/sched.h>        /* current */
 #include <linux/delay.h>
 #include <linux/compiler.h>
 
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index 9e0d5f83cb9f..4dc42a189ae5 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -3,6 +3,7 @@
  *
  *      Changes:
  *      Venkatesh Pallipadi     : Adding cache identification through cpuid(4)
+ *              Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
  */
 
 #include <linux/init.h>
@@ -10,6 +11,7 @@
 #include <linux/device.h>
 #include <linux/compiler.h>
 #include <linux/cpu.h>
+#include <linux/sched.h>
 
 #include <asm/processor.h>
 #include <asm/smp.h>
@@ -28,7 +30,7 @@ struct _cache_table
 };
 
 /* all the cache descriptor types we care about (no TLB or trace cache entries) */
-static struct _cache_table cache_table[] __devinitdata =
+static struct _cache_table cache_table[] __cpuinitdata =
 {
         { 0x06, LVL_1_INST, 8 },        /* 4-way set assoc, 32 byte line size */
         { 0x08, LVL_1_INST, 16 },       /* 4-way set assoc, 32 byte line size */
@@ -117,10 +119,9 @@ struct _cpuid4_info {
         cpumask_t shared_cpu_map;
 };
 
-#define MAX_CACHE_LEAVES                4
 static unsigned short                   num_cache_leaves;
 
-static int __devinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
+static int __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
 {
         unsigned int            eax, ebx, ecx, edx;
         union _cpuid4_leaf_eax  cache_eax;
@@ -144,23 +145,18 @@ static int __init find_num_cache_leaves(void)
 {
         unsigned int            eax, ebx, ecx, edx;
         union _cpuid4_leaf_eax  cache_eax;
-        int                     i;
-        int                     retval;
+        int                     i = -1;
 
-        retval = MAX_CACHE_LEAVES;
-        /* Do cpuid(4) loop to find out num_cache_leaves */
-        for (i = 0; i < MAX_CACHE_LEAVES; i++) {
+        do {
+                ++i;
+                /* Do cpuid(4) loop to find out num_cache_leaves */
                 cpuid_count(4, i, &eax, &ebx, &ecx, &edx);
                 cache_eax.full = eax;
-                if (cache_eax.split.type == CACHE_TYPE_NULL) {
-                        retval = i;
-                        break;
-                }
-        }
-        return retval;
+        } while (cache_eax.split.type != CACHE_TYPE_NULL);
+        return i;
 }
 
-unsigned int __devinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
+unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
 {
         unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0; /* Cache sizes */
         unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
@@ -284,13 +280,7 @@ unsigned int __devinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
                 if ( l3 )
                         printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
 
-                /*
-                 * This assumes the L3 cache is shared; it typically lives in
-                 * the northbridge.  The L1 caches are included by the L2
-                 * cache, and so should not be included for the purpose of
-                 * SMP switching weights.
-                 */
-                c->x86_cache_size = l2 ? l2 : (l1i+l1d);
+                c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
         }
 
         return l2;
@@ -301,7 +291,7 @@ static struct _cpuid4_info *cpuid4_info[NR_CPUS];
 #define CPUID4_INFO_IDX(x,y)    (&((cpuid4_info[x])[y]))
 
 #ifdef CONFIG_SMP
-static void __devinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
+static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
 {
         struct _cpuid4_info     *this_leaf;
         unsigned long num_threads_sharing;
@@ -334,7 +324,7 @@ static void free_cache_attributes(unsigned int cpu)
         cpuid4_info[cpu] = NULL;
 }
 
-static int __devinit detect_cache_attributes(unsigned int cpu)
+static int __cpuinit detect_cache_attributes(unsigned int cpu)
 {
         struct _cpuid4_info     *this_leaf;
         unsigned long           j;
@@ -511,7 +501,7 @@ static void cpuid4_cache_sysfs_exit(unsigned int cpu)
         free_cache_attributes(cpu);
 }
 
-static int __devinit cpuid4_cache_sysfs_init(unsigned int cpu)
+static int __cpuinit cpuid4_cache_sysfs_init(unsigned int cpu)
 {
 
         if (num_cache_leaves == 0)
@@ -542,7 +532,7 @@ err_out:
 }
 
 /* Add/Remove cache interface for CPU device */
-static int __devinit cache_add_dev(struct sys_device * sys_dev)
+static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
 {
         unsigned int cpu = sys_dev->id;
         unsigned long i, j;
@@ -579,7 +569,7 @@ static int __devinit cache_add_dev(struct sys_device * sys_dev)
         return retval;
 }
 
-static int __devexit cache_remove_dev(struct sys_device * sys_dev)
+static void __cpuexit cache_remove_dev(struct sys_device * sys_dev)
 {
         unsigned int cpu = sys_dev->id;
         unsigned long i;
@@ -588,24 +578,49 @@ static int __devexit cache_remove_dev(struct sys_device * sys_dev)
                 kobject_unregister(&(INDEX_KOBJECT_PTR(cpu,i)->kobj));
         kobject_unregister(cache_kobject[cpu]);
         cpuid4_cache_sysfs_exit(cpu);
-        return 0;
+        return;
+}
+
+static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
+                                        unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (unsigned long)hcpu;
+        struct sys_device *sys_dev;
+
+        sys_dev = get_cpu_sysdev(cpu);
+        switch (action) {
+        case CPU_ONLINE:
+                cache_add_dev(sys_dev);
+                break;
+        case CPU_DEAD:
+                cache_remove_dev(sys_dev);
+                break;
+        }
+        return NOTIFY_OK;
 }
 
-static struct sysdev_driver cache_sysdev_driver = {
-        .add = cache_add_dev,
-        .remove = __devexit_p(cache_remove_dev),
+static struct notifier_block cacheinfo_cpu_notifier =
+{
+    .notifier_call = cacheinfo_cpu_callback,
 };
 
-/* Register/Unregister the cpu_cache driver */
-static int __devinit cache_register_driver(void)
+static int __cpuinit cache_sysfs_init(void)
 {
+        int i;
+
         if (num_cache_leaves == 0)
                 return 0;
 
-        return sysdev_driver_register(&cpu_sysdev_class,&cache_sysdev_driver);
+        register_cpu_notifier(&cacheinfo_cpu_notifier);
+
+        for_each_online_cpu(i) {
+                cacheinfo_cpu_callback(&cacheinfo_cpu_notifier, CPU_ONLINE,
+                        (void *)(long)i);
+        }
+
+        return 0;
 }
 
-device_initcall(cache_register_driver);
+device_initcall(cache_sysfs_init);
 
 #endif
-
diff --git a/arch/i386/kernel/cpu/mcheck/p6.c b/arch/i386/kernel/cpu/mcheck/p6.c
index 3c035b8fa3d9..979b18bc95c1 100644
--- a/arch/i386/kernel/cpu/mcheck/p6.c
+++ b/arch/i386/kernel/cpu/mcheck/p6.c
@@ -102,11 +102,16 @@ void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c)
                 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
         nr_mce_banks = l & 0xff;
 
-        /* Don't enable bank 0 on intel P6 cores, it goes bang quickly. */
-        for (i=1; i<nr_mce_banks; i++) {
+        /*
+         * Following the example in IA-32 SDM Vol 3:
+         * - MC0_CTL should not be written
+         * - Status registers on all banks should be cleared on reset
+         */
+        for (i=1; i<nr_mce_banks; i++)
                 wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+
+        for (i=0; i<nr_mce_banks; i++)
                 wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
-        }
 
         set_in_cr4 (X86_CR4_MCE);
         printk (KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",
diff --git a/arch/i386/kernel/cpu/mtrr/if.c b/arch/i386/kernel/cpu/mtrr/if.c
index 1923e0aed26a..cf39e205d33c 100644
--- a/arch/i386/kernel/cpu/mtrr/if.c
+++ b/arch/i386/kernel/cpu/mtrr/if.c
@@ -149,60 +149,89 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)
         return -EINVAL;
 }
 
-static int
-mtrr_ioctl(struct inode *inode, struct file *file,
-           unsigned int cmd, unsigned long __arg)
+static long
+mtrr_ioctl(struct file *file, unsigned int cmd, unsigned long __arg)
 {
-        int err;
+        int err = 0;
         mtrr_type type;
         struct mtrr_sentry sentry;
         struct mtrr_gentry gentry;
         void __user *arg = (void __user *) __arg;
 
         switch (cmd) {
+        case MTRRIOC_ADD_ENTRY:
+        case MTRRIOC_SET_ENTRY:
+        case MTRRIOC_DEL_ENTRY:
+        case MTRRIOC_KILL_ENTRY:
+        case MTRRIOC_ADD_PAGE_ENTRY:
+        case MTRRIOC_SET_PAGE_ENTRY:
+        case MTRRIOC_DEL_PAGE_ENTRY:
+        case MTRRIOC_KILL_PAGE_ENTRY:
+                if (copy_from_user(&sentry, arg, sizeof sentry))
+                        return -EFAULT;
+                break;
+        case MTRRIOC_GET_ENTRY:
+        case MTRRIOC_GET_PAGE_ENTRY:
+                if (copy_from_user(&gentry, arg, sizeof gentry))
+                        return -EFAULT;
+                break;
+#ifdef CONFIG_COMPAT
+        case MTRRIOC32_ADD_ENTRY:
+        case MTRRIOC32_SET_ENTRY:
+        case MTRRIOC32_DEL_ENTRY:
+        case MTRRIOC32_KILL_ENTRY:
+        case MTRRIOC32_ADD_PAGE_ENTRY:
+        case MTRRIOC32_SET_PAGE_ENTRY:
+        case MTRRIOC32_DEL_PAGE_ENTRY:
+        case MTRRIOC32_KILL_PAGE_ENTRY: {
+                struct mtrr_sentry32 __user *s32 = (struct mtrr_sentry32 __user *)__arg;
+                err = get_user(sentry.base, &s32->base);
+                err |= get_user(sentry.size, &s32->size);
+                err |= get_user(sentry.type, &s32->type);
+                if (err)
+                        return err;
+                break;
+        }
+        case MTRRIOC32_GET_ENTRY:
+        case MTRRIOC32_GET_PAGE_ENTRY: {
+                struct mtrr_gentry32 __user *g32 = (struct mtrr_gentry32 __user *)__arg;
+                err = get_user(gentry.regnum, &g32->regnum);
+                err |= get_user(gentry.base, &g32->base);
+                err |= get_user(gentry.size, &g32->size);
+                err |= get_user(gentry.type, &g32->type);
+                if (err)
+                        return err;
+                break;
+        }
+#endif
+        }
+
+        switch (cmd) {
         default:
                 return -ENOTTY;
         case MTRRIOC_ADD_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err =
                     mtrr_file_add(sentry.base, sentry.size, sentry.type, 1,
                                   file, 0);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_SET_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err = mtrr_add(sentry.base, sentry.size, sentry.type, 0);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_DEL_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err = mtrr_file_del(sentry.base, sentry.size, file, 0);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_KILL_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err = mtrr_del(-1, sentry.base, sentry.size);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_GET_ENTRY:
-                if (copy_from_user(&gentry, arg, sizeof gentry))
-                        return -EFAULT;
                 if (gentry.regnum >= num_var_ranges)
                         return -EINVAL;
                 mtrr_if->get(gentry.regnum, &gentry.base, &gentry.size, &type);
@@ -217,60 +246,59 @@ mtrr_ioctl(struct inode *inode, struct file *file,
                         gentry.type = type;
                 }
 
-                if (copy_to_user(arg, &gentry, sizeof gentry))
-                        return -EFAULT;
                 break;
         case MTRRIOC_ADD_PAGE_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err =
                     mtrr_file_add(sentry.base, sentry.size, sentry.type, 1,
                                   file, 1);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_SET_PAGE_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err = mtrr_add_page(sentry.base, sentry.size, sentry.type, 0);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_DEL_PAGE_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err = mtrr_file_del(sentry.base, sentry.size, file, 1);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_KILL_PAGE_ENTRY:
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
-                if (copy_from_user(&sentry, arg, sizeof sentry))
-                        return -EFAULT;
                 err = mtrr_del_page(-1, sentry.base, sentry.size);
-                if (err < 0)
-                        return err;
                 break;
         case MTRRIOC_GET_PAGE_ENTRY:
-                if (copy_from_user(&gentry, arg, sizeof gentry))
-                        return -EFAULT;
                 if (gentry.regnum >= num_var_ranges)
                         return -EINVAL;
                 mtrr_if->get(gentry.regnum, &gentry.base, &gentry.size, &type);
                 gentry.type = type;
+                break;
+        }
+
+        if (err)
+                return err;
 
+        switch(cmd) {
+        case MTRRIOC_GET_ENTRY:
+        case MTRRIOC_GET_PAGE_ENTRY:
                 if (copy_to_user(arg, &gentry, sizeof gentry))
-                        return -EFAULT;
+                        err = -EFAULT;
+                break;
+#ifdef CONFIG_COMPAT
+        case MTRRIOC32_GET_ENTRY:
+        case MTRRIOC32_GET_PAGE_ENTRY: {
+                struct mtrr_gentry32 __user *g32 = (struct mtrr_gentry32 __user *)__arg;
+                err = put_user(gentry.base, &g32->base);
+                err |= put_user(gentry.size, &g32->size);
+                err |= put_user(gentry.regnum, &g32->regnum);
+                err |= put_user(gentry.type, &g32->type);
                 break;
         }
-        return 0;
+#endif
+        }
+        return err;
 }
 
 static int
@@ -310,7 +338,8 @@ static struct file_operations mtrr_fops = {
         .read    = seq_read,
         .llseek  = seq_lseek,
         .write   = mtrr_write,
-        .ioctl   = mtrr_ioctl,
+        .unlocked_ioctl = mtrr_ioctl,
+        .compat_ioctl = mtrr_ioctl,
         .release = mtrr_close,
 };
 
diff --git a/arch/i386/kernel/cpu/proc.c b/arch/i386/kernel/cpu/proc.c
index 8bd77d948a84..41b871ecf4b3 100644
--- a/arch/i386/kernel/cpu/proc.c
+++ b/arch/i386/kernel/cpu/proc.c
@@ -44,7 +44,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 
                 /* Intel-defined (#2) */
-                "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+                "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
diff --git a/arch/i386/kernel/crash.c b/arch/i386/kernel/crash.c
index 0248e084017c..af809ccf5fbe 100644
--- a/arch/i386/kernel/crash.c
+++ b/arch/i386/kernel/crash.c
@@ -21,7 +21,6 @@
 #include <asm/hardirq.h>
 #include <asm/nmi.h>
 #include <asm/hw_irq.h>
-#include <asm/apic.h>
 #include <mach_ipi.h>
 
 
@@ -148,7 +147,6 @@ static int crash_nmi_callback(struct pt_regs *regs, int cpu)
                 regs = &fixed_regs;
         }
         crash_save_this_cpu(regs, cpu);
-        disable_local_APIC();
         atomic_dec(&waiting_for_crash_ipi);
         /* Assume hlt works */
         halt();
@@ -188,7 +186,6 @@ static void nmi_shootdown_cpus(void)
         }
 
         /* Leave the nmi callback set */
-        disable_local_APIC();
 }
 #else
 static void nmi_shootdown_cpus(void)
@@ -213,9 +210,5 @@ void machine_crash_shutdown(struct pt_regs *regs)
         /* Make a note of crashing cpu. Will be used in NMI callback.*/
         crashing_cpu = smp_processor_id();
         nmi_shootdown_cpus();
-        lapic_shutdown();
-#if defined(CONFIG_X86_IO_APIC)
-        disable_IO_APIC();
-#endif
         crash_save_self(regs);
 }
diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c
index 323ef8ab3244..d86f24909284 100644
--- a/arch/i386/kernel/i8259.c
+++ b/arch/i386/kernel/i8259.c
@@ -435,4 +435,8 @@ void __init init_IRQ(void)
                 setup_irq(FPU_IRQ, &fpu_irq);
 
         irq_ctx_init(smp_processor_id());
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        APIC_init();
+#endif
 }
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index fb3991e8229e..5a77c52b20a9 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -46,6 +46,9 @@
 int (*ioapic_renumber_irq)(int ioapic, int irq);
 atomic_t irq_mis_count;
 
+/* Where if anywhere is the i8259 connect in external int mode */
+static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
+
 static DEFINE_SPINLOCK(ioapic_lock);
 
 /*
@@ -738,7 +741,7 @@ static int find_irq_entry(int apic, int pin, int type)
 /*
  * Find the pin to which IRQ[irq] (ISA) is connected
  */
-static int find_isa_irq_pin(int irq, int type)
+static int __init find_isa_irq_pin(int irq, int type)
 {
         int i;
 
@@ -758,6 +761,33 @@ static int find_isa_irq_pin(int irq, int type)
         return -1;
 }
 
+static int __init find_isa_irq_apic(int irq, int type)
+{
+        int i;
+
+        for (i = 0; i < mp_irq_entries; i++) {
+                int lbus = mp_irqs[i].mpc_srcbus;
+
+                if ((mp_bus_id_to_type[lbus] == MP_BUS_ISA ||
+                     mp_bus_id_to_type[lbus] == MP_BUS_EISA ||
+                     mp_bus_id_to_type[lbus] == MP_BUS_MCA ||
+                     mp_bus_id_to_type[lbus] == MP_BUS_NEC98
+                    ) &&
+                    (mp_irqs[i].mpc_irqtype == type) &&
+                    (mp_irqs[i].mpc_srcbusirq == irq))
+                        break;
+        }
+        if (i < mp_irq_entries) {
+                int apic;
+                for(apic = 0; apic < nr_ioapics; apic++) {
+                        if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic)
+                                return apic;
+                }
+        }
+
+        return -1;
+}
+
 /*
  * Find a specific PCI IRQ entry.
  * Not an __init, possibly needed by modules
@@ -1253,7 +1283,7 @@ static void __init setup_IO_APIC_irqs(void)
 /*
  * Set up the 8259A-master output pin:
  */
-static void __init setup_ExtINT_IRQ0_pin(unsigned int pin, int vector)
+static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector)
 {
         struct IO_APIC_route_entry entry;
         unsigned long flags;
@@ -1287,8 +1317,8 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int pin, int vector)
          * Add it to the IO-APIC irq-routing table:
          */
         spin_lock_irqsave(&ioapic_lock, flags);
-        io_apic_write(0, 0x11+2*pin, *(((int *)&entry)+1));
-        io_apic_write(0, 0x10+2*pin, *(((int *)&entry)+0));
+        io_apic_write(apic, 0x11+2*pin, *(((int *)&entry)+1));
+        io_apic_write(apic, 0x10+2*pin, *(((int *)&entry)+0));
         spin_unlock_irqrestore(&ioapic_lock, flags);
 
         enable_8259A_irq(0);
@@ -1595,7 +1625,8 @@ void /*__init*/ print_PIC(void)
 static void __init enable_IO_APIC(void)
 {
         union IO_APIC_reg_01 reg_01;
-        int i;
+        int i8259_apic, i8259_pin;
+        int i, apic;
         unsigned long flags;
 
         for (i = 0; i < PIN_MAP_SIZE; i++) {
@@ -1609,11 +1640,52 @@ static void __init enable_IO_APIC(void)
         /*
          * The number of IO-APIC IRQ registers (== #pins):
          */
-        for (i = 0; i < nr_ioapics; i++) {
+        for (apic = 0; apic < nr_ioapics; apic++) {
                 spin_lock_irqsave(&ioapic_lock, flags);
-                reg_01.raw = io_apic_read(i, 1);
+                reg_01.raw = io_apic_read(apic, 1);
                 spin_unlock_irqrestore(&ioapic_lock, flags);
-                nr_ioapic_registers[i] = reg_01.bits.entries+1;
+                nr_ioapic_registers[apic] = reg_01.bits.entries+1;
+        }
+        for(apic = 0; apic < nr_ioapics; apic++) {
+                int pin;
+                /* See if any of the pins is in ExtINT mode */
+                for(pin = 0; pin < nr_ioapic_registers[i]; pin++) {
+                        struct IO_APIC_route_entry entry;
+                        spin_lock_irqsave(&ioapic_lock, flags);
+                        *(((int *)&entry) + 0) = io_apic_read(apic, 0x10 + 2 * pin);
+                        *(((int *)&entry) + 1) = io_apic_read(apic, 0x11 + 2 * pin);
+                        spin_unlock_irqrestore(&ioapic_lock, flags);
+
+
+                        /* If the interrupt line is enabled and in ExtInt mode
+                         * I have found the pin where the i8259 is connected.
+                         */
+                        if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) {
+                                ioapic_i8259.apic = apic;
+                                ioapic_i8259.pin  = pin;
+                                goto found_i8259;
+                        }
+                }
+        }
+ found_i8259:
+        /* Look to see what if the MP table has reported the ExtINT */
+        /* If we could not find the appropriate pin by looking at the ioapic
+         * the i8259 probably is not connected the ioapic but give the
+         * mptable a chance anyway.
+         */
+        i8259_pin  = find_isa_irq_pin(0, mp_ExtINT);
+        i8259_apic = find_isa_irq_apic(0, mp_ExtINT);
+        /* Trust the MP table if nothing is setup in the hardware */
+        if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) {
+                printk(KERN_WARNING "ExtINT not setup in hardware but reported by MP table\n");
+                ioapic_i8259.pin  = i8259_pin;
+                ioapic_i8259.apic = i8259_apic;
+        }
+        /* Complain if the MP table and the hardware disagree */
+        if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) &&
+                (i8259_pin >= 0) && (ioapic_i8259.pin >= 0))
+        {
+                printk(KERN_WARNING "ExtINT in hardware and MP table differ\n");
         }
 
         /*
@@ -1627,7 +1699,6 @@ static void __init enable_IO_APIC(void)
  */
 void disable_IO_APIC(void)
 {
-        int pin;
         /*
          * Clear the IO-APIC before rebooting:
          */
@@ -1638,8 +1709,7 @@ void disable_IO_APIC(void)
          * Put that IOAPIC in virtual wire mode
          * so legacy interrupts can be delivered.
          */
-        pin = find_isa_irq_pin(0, mp_ExtINT);
-        if (pin != -1) {
+        if (ioapic_i8259.pin != -1) {
                 struct IO_APIC_route_entry entry;
                 unsigned long flags;
 
@@ -1650,7 +1720,7 @@ void disable_IO_APIC(void)
                 entry.polarity        = 0; /* High */
                 entry.delivery_status = 0;
                 entry.dest_mode       = 0; /* Physical */
-                entry.delivery_mode   = 7; /* ExtInt */
+                entry.delivery_mode   = dest_ExtINT; /* ExtInt */
                 entry.vector          = 0;
                 entry.dest.physical.physical_dest = 0;
 
@@ -1659,11 +1729,13 @@ void disable_IO_APIC(void)
                  * Add it to the IO-APIC irq-routing table:
                  */
                 spin_lock_irqsave(&ioapic_lock, flags);
-                io_apic_write(0, 0x11+2*pin, *(((int *)&entry)+1));
-                io_apic_write(0, 0x10+2*pin, *(((int *)&entry)+0));
+                io_apic_write(ioapic_i8259.apic, 0x11+2*ioapic_i8259.pin,
+                        *(((int *)&entry)+1));
+                io_apic_write(ioapic_i8259.apic, 0x10+2*ioapic_i8259.pin,
+                        *(((int *)&entry)+0));
                 spin_unlock_irqrestore(&ioapic_lock, flags);
         }
-        disconnect_bsp_APIC(pin != -1);
+        disconnect_bsp_APIC(ioapic_i8259.pin != -1);
 }
 
 /*
@@ -2113,20 +2185,21 @@ static void setup_nmi (void)
  */
 static inline void unlock_ExtINT_logic(void)
 {
-        int pin, i;
+        int apic, pin, i;
         struct IO_APIC_route_entry entry0, entry1;
         unsigned char save_control, save_freq_select;
         unsigned long flags;
 
-        pin = find_isa_irq_pin(8, mp_INT);
+        pin  = find_isa_irq_pin(8, mp_INT);
+        apic = find_isa_irq_apic(8, mp_INT);
         if (pin == -1)
                 return;
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        *(((int *)&entry0) + 1) = io_apic_read(0, 0x11 + 2 * pin);
-        *(((int *)&entry0) + 0) = io_apic_read(0, 0x10 + 2 * pin);
+        *(((int *)&entry0) + 1) = io_apic_read(apic, 0x11 + 2 * pin);
+        *(((int *)&entry0) + 0) = io_apic_read(apic, 0x10 + 2 * pin);
         spin_unlock_irqrestore(&ioapic_lock, flags);
-        clear_IO_APIC_pin(0, pin);
+        clear_IO_APIC_pin(apic, pin);
 
         memset(&entry1, 0, sizeof(entry1));
 
@@ -2139,8 +2212,8 @@ static inline void unlock_ExtINT_logic(void)
         entry1.vector = 0;
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        io_apic_write(0, 0x11 + 2 * pin, *(((int *)&entry1) + 1));
-        io_apic_write(0, 0x10 + 2 * pin, *(((int *)&entry1) + 0));
+        io_apic_write(apic, 0x11 + 2 * pin, *(((int *)&entry1) + 1));
+        io_apic_write(apic, 0x10 + 2 * pin, *(((int *)&entry1) + 0));
         spin_unlock_irqrestore(&ioapic_lock, flags);
 
         save_control = CMOS_READ(RTC_CONTROL);
@@ -2158,11 +2231,11 @@ static inline void unlock_ExtINT_logic(void)
 
         CMOS_WRITE(save_control, RTC_CONTROL);
         CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
-        clear_IO_APIC_pin(0, pin);
+        clear_IO_APIC_pin(apic, pin);
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        io_apic_write(0, 0x11 + 2 * pin, *(((int *)&entry0) + 1));
-        io_apic_write(0, 0x10 + 2 * pin, *(((int *)&entry0) + 0));
+        io_apic_write(apic, 0x11 + 2 * pin, *(((int *)&entry0) + 1));
+        io_apic_write(apic, 0x10 + 2 * pin, *(((int *)&entry0) + 0));
         spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
@@ -2174,7 +2247,7 @@ static inline void unlock_ExtINT_logic(void)
  */
 static inline void check_timer(void)
 {
-        int pin1, pin2;
+        int apic1, pin1, apic2, pin2;
         int vector;
 
         /*
@@ -2196,10 +2269,13 @@ static inline void check_timer(void)
         timer_ack = 1;
         enable_8259A_irq(0);
 
-        pin1 = find_isa_irq_pin(0, mp_INT);
-        pin2 = find_isa_irq_pin(0, mp_ExtINT);
+        pin1  = find_isa_irq_pin(0, mp_INT);
+        apic1 = find_isa_irq_apic(0, mp_INT);
+        pin2  = ioapic_i8259.pin;
+        apic2 = ioapic_i8259.apic;
 
-        printk(KERN_INFO "..TIMER: vector=0x%02X pin1=%d pin2=%d\n", vector, pin1, pin2);
+        printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
+                vector, apic1, pin1, apic2, pin2);
 
         if (pin1 != -1) {
                 /*
@@ -2216,8 +2292,9 @@ static inline void check_timer(void)
                                 clear_IO_APIC_pin(0, pin1);
                         return;
                 }
-                clear_IO_APIC_pin(0, pin1);
-                printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to IO-APIC\n");
+                clear_IO_APIC_pin(apic1, pin1);
+                printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to "
+                                "IO-APIC\n");
         }
 
         printk(KERN_INFO "...trying to set up timer (IRQ0) through the 8259A ... ");
@@ -2226,13 +2303,13 @@ static inline void check_timer(void)
                 /*
                  * legacy devices should be connected to IO APIC #0
                  */
-                setup_ExtINT_IRQ0_pin(pin2, vector);
+                setup_ExtINT_IRQ0_pin(apic2, pin2, vector);
                 if (timer_irq_works()) {
                         printk("works.\n");
                         if (pin1 != -1)
-                                replace_pin_at_irq(0, 0, pin1, 0, pin2);
+                                replace_pin_at_irq(0, apic1, pin1, apic2, pin2);
                         else
-                                add_pin_to_irq(0, 0, pin2);
+                                add_pin_to_irq(0, apic2, pin2);
                         if (nmi_watchdog == NMI_IO_APIC) {
                                 setup_nmi();
                         }
@@ -2241,7 +2318,7 @@ static inline void check_timer(void)
                 /*
                  * Cleanup, just in case ...
                  */
-                clear_IO_APIC_pin(0, pin2);
+                clear_IO_APIC_pin(apic2, pin2);
         }
         printk(" failed.\n");
 
@@ -2310,11 +2387,15 @@ void __init setup_IO_APIC(void)
         sync_Arb_IDs();
         setup_IO_APIC_irqs();
         init_IO_APIC_traps();
-        check_timer();
         if (!acpi_ioapic)
                 print_IO_APIC();
 }
 
+void __init IO_APIC_late_time_init(void)
+{
+        check_timer();
+}
+
 /*
  *      Called after all the initialization is done. If we didnt find any
  *      APIC bugs then we can allow the modify fast path
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c
index ce66dcc26d90..1a201a932865 100644
--- a/arch/i386/kernel/irq.c
+++ b/arch/i386/kernel/irq.c
@@ -218,7 +218,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
         if (i == 0) {
                 seq_printf(p, "           ");
-                for_each_cpu(j)
+                for_each_online_cpu(j)
                         seq_printf(p, "CPU%d       ",j);
                 seq_putc(p, '\n');
         }
@@ -232,7 +232,7 @@ int show_interrupts(struct seq_file *p, void *v)
 #ifndef CONFIG_SMP
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
-                for_each_cpu(j)
+                for_each_online_cpu(j)
                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
                 seq_printf(p, " %14s", irq_desc[i].handler->typename);
@@ -246,12 +246,12 @@ skip:
                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
         } else if (i == NR_IRQS) {
                 seq_printf(p, "NMI: ");
-                for_each_cpu(j)
+                for_each_online_cpu(j)
                         seq_printf(p, "%10u ", nmi_count(j));
                 seq_putc(p, '\n');
 #ifdef CONFIG_X86_LOCAL_APIC
                 seq_printf(p, "LOC: ");
-                for_each_cpu(j)
+                for_each_online_cpu(j)
                         seq_printf(p, "%10u ",
                                 per_cpu(irq_stat,j).apic_timer_irqs);
                 seq_putc(p, '\n');
diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index 27aabfceb67e..8f767d9aa45d 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -69,7 +69,7 @@ unsigned int def_to_bigsmp = 0;
 /* Processor that is doing the boot up */
 unsigned int boot_cpu_physical_apicid = -1U;
 /* Internal processor count */
-static unsigned int __initdata num_processors;
+static unsigned int __devinitdata num_processors;
 
 /* Bitmask of physically existing CPUs */
 physid_mask_t phys_cpu_present_map;
@@ -119,7 +119,7 @@ static int MP_valid_apicid(int apicid, int version)
 }
 #endif
 
-static void __init MP_processor_info (struct mpc_config_processor *m)
+static void __devinit MP_processor_info (struct mpc_config_processor *m)
 {
         int ver, apicid;
         physid_mask_t phys_cpu;
@@ -182,17 +182,6 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
                 boot_cpu_physical_apicid = m->mpc_apicid;
         }
 
-        if (num_processors >= NR_CPUS) {
-                printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
-                        "  Processor ignored.\n", NR_CPUS); 
-                return;
-        }
-
-        if (num_processors >= maxcpus) {
-                printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
-                        " Processor ignored.\n", maxcpus); 
-                return;
-        }
         ver = m->mpc_apicver;
 
         if (!MP_valid_apicid(apicid, ver)) {
@@ -201,11 +190,6 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
                 return;
         }
 
-        cpu_set(num_processors, cpu_possible_map);
-        num_processors++;
-        phys_cpu = apicid_to_cpu_present(apicid);
-        physids_or(phys_cpu_present_map, phys_cpu_present_map, phys_cpu);
-
         /*
          * Validate version
          */
@@ -216,6 +200,25 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
                 ver = 0x10;
         }
         apic_version[m->mpc_apicid] = ver;
+
+        phys_cpu = apicid_to_cpu_present(apicid);
+        physids_or(phys_cpu_present_map, phys_cpu_present_map, phys_cpu);
+
+        if (num_processors >= NR_CPUS) {
+                printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
+                        "  Processor ignored.\n", NR_CPUS);
+                return;
+        }
+
+        if (num_processors >= maxcpus) {
+                printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
+                        " Processor ignored.\n", maxcpus);
+                return;
+        }
+
+        cpu_set(num_processors, cpu_possible_map);
+        num_processors++;
+
         if ((num_processors > 8) &&
             APIC_XAPIC(ver) &&
             (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL))
@@ -834,7 +837,7 @@ void __init mp_register_lapic_address (
 }
 
 
-void __init mp_register_lapic (
+void __devinit mp_register_lapic (
         u8                      id, 
         u8                      enabled)
 {
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index 72515b8a1b12..d661703ac1cb 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -100,16 +100,44 @@ int nmi_active;
         (P4_CCCR_OVF_PMI0|P4_CCCR_THRESHOLD(15)|P4_CCCR_COMPLEMENT|     \
          P4_CCCR_COMPARE|P4_CCCR_REQUIRED|P4_CCCR_ESCR_SELECT(4)|P4_CCCR_ENABLE)
 
+#ifdef CONFIG_SMP
+/* The performance counters used by NMI_LOCAL_APIC don't trigger when
+ * the CPU is idle. To make sure the NMI watchdog really ticks on all
+ * CPUs during the test make them busy.
+ */
+static __init void nmi_cpu_busy(void *data)
+{
+        volatile int *endflag = data;
+        local_irq_enable();
+        /* Intentionally don't use cpu_relax here. This is
+           to make sure that the performance counter really ticks,
+           even if there is a simulator or similar that catches the
+           pause instruction. On a real HT machine this is fine because
+           all other CPUs are busy with "useless" delay loops and don't
+           care if they get somewhat less cycles. */
+        while (*endflag == 0)
+                barrier();
+}
+#endif
+
 static int __init check_nmi_watchdog(void)
 {
-        unsigned int prev_nmi_count[NR_CPUS];
+        volatile int endflag = 0;
+        unsigned int *prev_nmi_count;
         int cpu;
 
         if (nmi_watchdog == NMI_NONE)
                 return 0;
 
+        prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
+        if (!prev_nmi_count)
+                return -1;
+
         printk(KERN_INFO "Testing NMI watchdog ... ");
 
+        if (nmi_watchdog == NMI_LOCAL_APIC)
+                smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0);
+
         for (cpu = 0; cpu < NR_CPUS; cpu++)
                 prev_nmi_count[cpu] = per_cpu(irq_stat, cpu).__nmi_count;
         local_irq_enable();
@@ -123,12 +151,18 @@ static int __init check_nmi_watchdog(void)
                         continue;
 #endif
                 if (nmi_count(cpu) - prev_nmi_count[cpu] <= 5) {
-                        printk("CPU#%d: NMI appears to be stuck!\n", cpu);
+                        endflag = 1;
+                        printk("CPU#%d: NMI appears to be stuck (%d->%d)!\n",
+                                cpu,
+                                prev_nmi_count[cpu],
+                                nmi_count(cpu));
                         nmi_active = 0;
                         lapic_nmi_owner &= ~LAPIC_NMI_WATCHDOG;
+                        kfree(prev_nmi_count);
                         return -1;
                 }
         }
+        endflag = 1;
         printk("OK.\n");
 
         /* now that we know it works we can reduce NMI frequency to
@@ -136,6 +170,7 @@ static int __init check_nmi_watchdog(void)
         if (nmi_watchdog == NMI_LOCAL_APIC)
                 nmi_hz = 1;
 
+        kfree(prev_nmi_count);
         return 0;
 }
 /* This needs to happen later in boot so counters are working */
diff --git a/arch/i386/kernel/ptrace.c b/arch/i386/kernel/ptrace.c
index 7b6368bf8974..efd11f09c996 100644
--- a/arch/i386/kernel/ptrace.c
+++ b/arch/i386/kernel/ptrace.c
@@ -354,7 +354,7 @@ ptrace_set_thread_area(struct task_struct *child,
         return 0;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         struct user * dummy = NULL;
diff --git a/arch/i386/kernel/reboot_fixups.c b/arch/i386/kernel/reboot_fixups.c
index 1b183b378c2c..c9b87330aeea 100644
--- a/arch/i386/kernel/reboot_fixups.c
+++ b/arch/i386/kernel/reboot_fixups.c
@@ -44,7 +44,7 @@ void mach_reboot_fixups(void)
 
         for (i=0; i < (sizeof(fixups_table)/sizeof(fixups_table[0])); i++) {
                 cur = &(fixups_table[i]);
-                dev = pci_get_device(cur->vendor, cur->device, 0);
+                dev = pci_get_device(cur->vendor, cur->device, NULL);
                 if (!dev)
                         continue;
 
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index 9b8c8a19824d..b48ac635f3c1 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -389,14 +389,24 @@ static void __init limit_regions(unsigned long long size)
                 }
         }
         for (i = 0; i < e820.nr_map; i++) {
-                if (e820.map[i].type == E820_RAM) {
-                        current_addr = e820.map[i].addr + e820.map[i].size;
-                        if (current_addr >= size) {
-                                e820.map[i].size -= current_addr-size;
-                                e820.nr_map = i + 1;
-                                return;
-                        }
+                current_addr = e820.map[i].addr + e820.map[i].size;
+                if (current_addr < size)
+                        continue;
+
+                if (e820.map[i].type != E820_RAM)
+                        continue;
+
+                if (e820.map[i].addr >= size) {
+                        /*
+                         * This region starts past the end of the
+                         * requested size, skip it completely.
+                         */
+                        e820.nr_map = i;
+                } else {
+                        e820.nr_map = i + 1;
+                        e820.map[i].size -= current_addr - size;
                 }
+                return;
         }
 }
 
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 1fb26d0e30b6..5a2bbe0c4fff 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -87,7 +87,11 @@ EXPORT_SYMBOL(cpu_online_map);
 cpumask_t cpu_callin_map;
 cpumask_t cpu_callout_map;
 EXPORT_SYMBOL(cpu_callout_map);
+#ifdef CONFIG_HOTPLUG_CPU
+cpumask_t cpu_possible_map = CPU_MASK_ALL;
+#else
 cpumask_t cpu_possible_map;
+#endif
 EXPORT_SYMBOL(cpu_possible_map);
 static cpumask_t smp_commenced_mask;
 
@@ -1074,6 +1078,16 @@ void *xquad_portio;
 EXPORT_SYMBOL(xquad_portio);
 #endif
 
+/*
+ * Fall back to non SMP mode after errors.
+ *
+ */
+static __init void disable_smp(void)
+{
+        cpu_set(0, cpu_sibling_map[0]);
+        cpu_set(0, cpu_core_map[0]);
+}
+
 static void __init smp_boot_cpus(unsigned int max_cpus)
 {
         int apicid, cpu, bit, kicked;
@@ -1086,7 +1100,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
         printk("CPU%d: ", 0);
         print_cpu_info(&cpu_data[0]);
 
-        boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
         boot_cpu_logical_apicid = logical_smp_processor_id();
         x86_cpu_to_apicid[0] = boot_cpu_physical_apicid;
 
@@ -1098,68 +1111,27 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
         cpus_clear(cpu_core_map[0]);
         cpu_set(0, cpu_core_map[0]);
 
+        map_cpu_to_logical_apicid();
+
         /*
          * If we couldn't find an SMP configuration at boot time,
          * get out of here now!
          */
         if (!smp_found_config && !acpi_lapic) {
                 printk(KERN_NOTICE "SMP motherboard not detected.\n");
-                smpboot_clear_io_apic_irqs();
-                phys_cpu_present_map = physid_mask_of_physid(0);
-                if (APIC_init_uniprocessor())
-                        printk(KERN_NOTICE "Local APIC not detected."
-                                           " Using dummy APIC emulation.\n");
-                map_cpu_to_logical_apicid();
-                cpu_set(0, cpu_sibling_map[0]);
-                cpu_set(0, cpu_core_map[0]);
+                disable_smp();
                 return;
         }
 
         /*
-         * Should not be necessary because the MP table should list the boot
-         * CPU too, but we do it for the sake of robustness anyway.
-         * Makes no sense to do this check in clustered apic mode, so skip it
-         */
-        if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
-                printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
-                                boot_cpu_physical_apicid);
-                physid_set(hard_smp_processor_id(), phys_cpu_present_map);
-        }
-
-        /*
-         * If we couldn't find a local APIC, then get out of here now!
-         */
-        if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
-                printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
-                        boot_cpu_physical_apicid);
-                printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
-                smpboot_clear_io_apic_irqs();
-                phys_cpu_present_map = physid_mask_of_physid(0);
-                cpu_set(0, cpu_sibling_map[0]);
-                cpu_set(0, cpu_core_map[0]);
-                return;
-        }
-
-        verify_local_APIC();
-
-        /*
          * If SMP should be disabled, then really disable it!
          */
-        if (!max_cpus) {
-                smp_found_config = 0;
-                printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
-                smpboot_clear_io_apic_irqs();
-                phys_cpu_present_map = physid_mask_of_physid(0);
-                cpu_set(0, cpu_sibling_map[0]);
-                cpu_set(0, cpu_core_map[0]);
+        if (!max_cpus || (enable_local_apic < 0)) {
+                printk(KERN_INFO "SMP mode deactivated.\n");
+                disable_smp();
                 return;
         }
 
-        connect_bsp_APIC();
-        setup_local_APIC();
-        map_cpu_to_logical_apicid();
-
-
         setup_portio_remap();
 
         /*
@@ -1240,10 +1212,6 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
         cpu_set(0, cpu_sibling_map[0]);
         cpu_set(0, cpu_core_map[0]);
 
-        smpboot_setup_io_apic();
-
-        setup_boot_APIC_clock();
-
         /*
          * Synchronize the TSC with the AP
          */
diff --git a/arch/i386/kernel/srat.c b/arch/i386/kernel/srat.c
index 516bf5653b02..8de658db8146 100644
--- a/arch/i386/kernel/srat.c
+++ b/arch/i386/kernel/srat.c
@@ -327,7 +327,12 @@ int __init get_memcfg_from_srat(void)
         int tables = 0;
         int i = 0;
 
-        acpi_find_root_pointer(ACPI_PHYSICAL_ADDRESSING, rsdp_address);
+        if (ACPI_FAILURE(acpi_find_root_pointer(ACPI_PHYSICAL_ADDRESSING,
+                                                rsdp_address))) {
+                printk("%s: System description tables not found\n",
+                       __FUNCTION__);
+                goto out_err;
+        }
 
         if (rsdp_address->pointer_type == ACPI_PHYSICAL_POINTER) {
                 printk("%s: assigning address to rsdp\n", __FUNCTION__);
diff --git a/arch/i386/kernel/time.c b/arch/i386/kernel/time.c
index 2883a4d4f01f..07471bba2dc6 100644
--- a/arch/i386/kernel/time.c
+++ b/arch/i386/kernel/time.c
@@ -74,10 +74,6 @@ int pit_latch_buggy;              /* extern */
 
 #include "do_timer.h"
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 unsigned int cpu_khz;   /* Detected as we calibrate the TSC */
 EXPORT_SYMBOL(cpu_khz);
 
@@ -444,8 +440,8 @@ static int time_init_device(void)
 
 device_initcall(time_init_device);
 
-#ifdef CONFIG_HPET_TIMER
 extern void (*late_time_init)(void);
+#ifdef CONFIG_HPET_TIMER
 /* Duplicate of time_init() below, with hpet_enable part added */
 static void __init hpet_time_init(void)
 {
@@ -462,6 +458,11 @@ static void __init hpet_time_init(void)
         printk(KERN_INFO "Using %s for high-res timesource\n",cur_timer->name);
 
         time_init_hook();
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        if (enable_local_apic >= 0)
+                APIC_late_time_init();
+#endif
 }
 #endif
 
@@ -486,4 +487,9 @@ void __init time_init(void)
         printk(KERN_INFO "Using %s for high-res timesource\n",cur_timer->name);
 
         time_init_hook();
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        if (enable_local_apic >= 0)
+                late_time_init = APIC_late_time_init;
+#endif
 }
diff --git a/arch/i386/kernel/time_hpet.c b/arch/i386/kernel/time_hpet.c
index 658c0629ba6a..9caeaa315cd7 100644
--- a/arch/i386/kernel/time_hpet.c
+++ b/arch/i386/kernel/time_hpet.c
@@ -275,6 +275,7 @@ static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
 static unsigned long PIE_count;
 
 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
+static unsigned int hpet_t1_cmp; /* cached comparator register */
 
 /*
  * Timer 1 for RTC, we do not use periodic interrupt feature,
@@ -306,10 +307,12 @@ int hpet_rtc_timer_init(void)
         cnt = hpet_readl(HPET_COUNTER);
         cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
         hpet_writel(cnt, HPET_T1_CMP);
+        hpet_t1_cmp = cnt;
         local_irq_restore(flags);
 
         cfg = hpet_readl(HPET_T1_CFG);
-        cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
+        cfg &= ~HPET_TN_PERIODIC;
+        cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
         hpet_writel(cfg, HPET_T1_CFG);
 
         return 1;
@@ -319,8 +322,12 @@ static void hpet_rtc_timer_reinit(void)
 {
         unsigned int cfg, cnt;
 
-        if (!(PIE_on | AIE_on | UIE_on))
+        if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
+                cfg = hpet_readl(HPET_T1_CFG);
+                cfg &= ~HPET_TN_ENABLE;
+                hpet_writel(cfg, HPET_T1_CFG);
                 return;
+        }
 
         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
                 hpet_rtc_int_freq = PIE_freq;
@@ -328,15 +335,10 @@ static void hpet_rtc_timer_reinit(void)
                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 
         /* It is more accurate to use the comparator value than current count.*/
-        cnt = hpet_readl(HPET_T1_CMP);
+        cnt = hpet_t1_cmp;
         cnt += hpet_tick*HZ/hpet_rtc_int_freq;
         hpet_writel(cnt, HPET_T1_CMP);
-
-        cfg = hpet_readl(HPET_T1_CFG);
-        cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
-        hpet_writel(cfg, HPET_T1_CFG);
-
-        return;
+        hpet_t1_cmp = cnt;
 }
 
 /*
diff --git a/arch/i386/kernel/timers/timer_hpet.c b/arch/i386/kernel/timers/timer_hpet.c
index d973a8b681fd..be242723c339 100644
--- a/arch/i386/kernel/timers/timer_hpet.c
+++ b/arch/i386/kernel/timers/timer_hpet.c
@@ -30,23 +30,28 @@ static seqlock_t monotonic_lock = SEQLOCK_UNLOCKED;
  *  basic equation:
  *              ns = cycles / (freq / ns_per_sec)
  *              ns = cycles * (ns_per_sec / freq)
- *              ns = cycles * (10^9 / (cpu_mhz * 10^6))
- *              ns = cycles * (10^3 / cpu_mhz)
+ *              ns = cycles * (10^9 / (cpu_khz * 10^3))
+ *              ns = cycles * (10^6 / cpu_khz)
  *
  *      Then we use scaling math (suggested by george@mvista.com) to get:
- *              ns = cycles * (10^3 * SC / cpu_mhz) / SC
+ *              ns = cycles * (10^6 * SC / cpu_khz) / SC
  *              ns = cycles * cyc2ns_scale / SC
  *
  *      And since SC is a constant power of two, we can convert the div
  *  into a shift.
+ *
+ *  We can use khz divisor instead of mhz to keep a better percision, since
+ *  cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
+ *  (mathieu.desnoyers@polymtl.ca)
+ *
  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
  */
 static unsigned long cyc2ns_scale;
 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
 
-static inline void set_cyc2ns_scale(unsigned long cpu_mhz)
+static inline void set_cyc2ns_scale(unsigned long cpu_khz)
 {
-        cyc2ns_scale = (1000 << CYC2NS_SCALE_FACTOR)/cpu_mhz;
+        cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
 }
 
 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
@@ -163,7 +168,7 @@ static int __init init_hpet(char* override)
                                 printk("Detected %u.%03u MHz processor.\n",
                                         cpu_khz / 1000, cpu_khz % 1000);
                         }
-                        set_cyc2ns_scale(cpu_khz/1000);
+                        set_cyc2ns_scale(cpu_khz);
                 }
                 /* set this only when cpu_has_tsc */
                 timer_hpet.read_timer = read_timer_tsc;
diff --git a/arch/i386/kernel/timers/timer_tsc.c b/arch/i386/kernel/timers/timer_tsc.c
index 6dd470cc9f72..d395e3b42485 100644
--- a/arch/i386/kernel/timers/timer_tsc.c
+++ b/arch/i386/kernel/timers/timer_tsc.c
@@ -49,23 +49,28 @@ static seqlock_t monotonic_lock = SEQLOCK_UNLOCKED;
  *  basic equation:
  *              ns = cycles / (freq / ns_per_sec)
  *              ns = cycles * (ns_per_sec / freq)
- *              ns = cycles * (10^9 / (cpu_mhz * 10^6))
- *              ns = cycles * (10^3 / cpu_mhz)
+ *              ns = cycles * (10^9 / (cpu_khz * 10^3))
+ *              ns = cycles * (10^6 / cpu_khz)
  *
  *      Then we use scaling math (suggested by george@mvista.com) to get:
- *              ns = cycles * (10^3 * SC / cpu_mhz) / SC
+ *              ns = cycles * (10^6 * SC / cpu_khz) / SC
  *              ns = cycles * cyc2ns_scale / SC
  *
  *      And since SC is a constant power of two, we can convert the div
- *  into a shift.   
+ *  into a shift.
+ *
+ *  We can use khz divisor instead of mhz to keep a better percision, since
+ *  cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
+ *  (mathieu.desnoyers@polymtl.ca)
+ *
  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
  */
 static unsigned long cyc2ns_scale; 
 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
 
-static inline void set_cyc2ns_scale(unsigned long cpu_mhz)
+static inline void set_cyc2ns_scale(unsigned long cpu_khz)
 {
-        cyc2ns_scale = (1000 << CYC2NS_SCALE_FACTOR)/cpu_mhz;
+        cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
 }
 
 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
@@ -286,7 +291,7 @@ time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
                 if (use_tsc) {
                         if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
                                 fast_gettimeoffset_quotient = cpufreq_scale(fast_gettimeoffset_ref, freq->new, ref_freq);
-                                set_cyc2ns_scale(cpu_khz/1000);
+                                set_cyc2ns_scale(cpu_khz);
                         }
                 }
 #endif
@@ -536,7 +541,7 @@ static int __init init_tsc(char* override)
                                 printk("Detected %u.%03u MHz processor.\n",
                                         cpu_khz / 1000, cpu_khz % 1000);
                         }
-                        set_cyc2ns_scale(cpu_khz/1000);
+                        set_cyc2ns_scale(cpu_khz);
                         return 0;
                 }
         }
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index 19e90bdd84ea..c34d1bfc5161 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -488,6 +488,7 @@ fastcall void __kprobes do_general_protection(struct pt_regs * regs,
                                 tss->io_bitmap_max - thread->io_bitmap_max);
                 tss->io_bitmap_max = thread->io_bitmap_max;
                 tss->io_bitmap_base = IO_BITMAP_OFFSET;
+                tss->io_bitmap_owner = thread;
                 put_cpu();
                 return;
         }
diff --git a/arch/i386/mach-es7000/es7000.h b/arch/i386/mach-es7000/es7000.h
index 898ed905e119..f1e3204f5dec 100644
--- a/arch/i386/mach-es7000/es7000.h
+++ b/arch/i386/mach-es7000/es7000.h
@@ -24,6 +24,15 @@
  * http://www.unisys.com
  */
 
+/*
+ * ES7000 chipsets
+ */
+
+#define NON_UNISYS              0
+#define ES7000_CLASSIC          1
+#define ES7000_ZORRO            2
+
+
 #define MIP_REG                 1
 #define MIP_PSAI_REG            4
 
@@ -106,6 +115,6 @@ struct mip_reg {
 
 extern int parse_unisys_oem (char *oemptr);
 extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
-extern void setup_unisys ();
+extern void setup_unisys(void);
 extern int es7000_start_cpu(int cpu, unsigned long eip);
 extern void es7000_sw_apic(void);
diff --git a/arch/i386/mach-es7000/es7000plat.c b/arch/i386/mach-es7000/es7000plat.c
index dc6660511b07..a9ab0644f403 100644
--- a/arch/i386/mach-es7000/es7000plat.c
+++ b/arch/i386/mach-es7000/es7000plat.c
@@ -62,6 +62,9 @@ static unsigned int base;
 static int
 es7000_rename_gsi(int ioapic, int gsi)
 {
+        if (es7000_plat == ES7000_ZORRO)
+                return gsi;
+
         if (!base) {
                 int i;
                 for (i = 0; i < nr_ioapics; i++)
@@ -76,7 +79,7 @@ es7000_rename_gsi(int ioapic, int gsi)
 #endif  /* (CONFIG_X86_IO_APIC) && (CONFIG_ACPI) */
 
 void __init
-setup_unisys ()
+setup_unisys(void)
 {
         /*
          * Determine the generation of the ES7000 currently running.
@@ -86,9 +89,9 @@ setup_unisys ()
          *
          */
         if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
-                es7000_plat = 2;
+                es7000_plat = ES7000_ZORRO;
         else
-                es7000_plat = 1;
+                es7000_plat = ES7000_CLASSIC;
         ioapic_renumber_irq = es7000_rename_gsi;
 }
 
@@ -151,7 +154,7 @@ parse_unisys_oem (char *oemptr)
         }
 
         if (success < 2) {
-                es7000_plat = 0;
+                es7000_plat = NON_UNISYS;
         } else
                 setup_unisys();
         return es7000_plat;
diff --git a/arch/i386/mm/fault.c b/arch/i386/mm/fault.c
index 9edd4485b91e..cf572d9a3b6e 100644
--- a/arch/i386/mm/fault.c
+++ b/arch/i386/mm/fault.c
@@ -108,7 +108,7 @@ static inline unsigned long get_segment_eip(struct pt_regs *regs,
                 desc = (void *)desc + (seg & ~7);
         } else {
                 /* Must disable preemption while reading the GDT. */
-                desc = (u32 *)&per_cpu(cpu_gdt_table, get_cpu());
+                desc = (u32 *)get_cpu_gdt_table(get_cpu());
                 desc = (void *)desc + (seg & ~7);
         }
 
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index cddafe33ff7c..19e6f4871d1e 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -547,31 +547,48 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
         return 0;
 }
 
-static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
+static __init int via_router_probe(struct irq_router *r,
+                                struct pci_dev *router, u16 device)
 {
         /* FIXME: We should move some of the quirk fixup stuff here */
 
-        if (router->device == PCI_DEVICE_ID_VIA_82C686 &&
-                        device == PCI_DEVICE_ID_VIA_82C586_0) {
-                /* Asus k7m bios wrongly reports 82C686A as 586-compatible */
-                device = PCI_DEVICE_ID_VIA_82C686;
+        /*
+         * work arounds for some buggy BIOSes
+         */
+        if (device == PCI_DEVICE_ID_VIA_82C586_0) {
+                switch(router->device) {
+                case PCI_DEVICE_ID_VIA_82C686:
+                        /*
+                         * Asus k7m bios wrongly reports 82C686A
+                         * as 586-compatible
+                         */
+                        device = PCI_DEVICE_ID_VIA_82C686;
+                        break;
+                case PCI_DEVICE_ID_VIA_8235:
+                        /**
+                         * Asus a7v-x bios wrongly reports 8235
+                         * as 586-compatible
+                         */
+                        device = PCI_DEVICE_ID_VIA_8235;
+                        break;
+                }
         }
 
-        switch(device)
-        {
-                case PCI_DEVICE_ID_VIA_82C586_0:
-                        r->name = "VIA";
-                        r->get = pirq_via586_get;
-                        r->set = pirq_via586_set;
-                        return 1;
-                case PCI_DEVICE_ID_VIA_82C596:
-                case PCI_DEVICE_ID_VIA_82C686:
-                case PCI_DEVICE_ID_VIA_8231:
+        switch(device) {
+        case PCI_DEVICE_ID_VIA_82C586_0:
+                r->name = "VIA";
+                r->get = pirq_via586_get;
+                r->set = pirq_via586_set;
+                return 1;
+        case PCI_DEVICE_ID_VIA_82C596:
+        case PCI_DEVICE_ID_VIA_82C686:
+        case PCI_DEVICE_ID_VIA_8231:
+        case PCI_DEVICE_ID_VIA_8235:
                 /* FIXME: add new ones for 8233/5 */
-                        r->name = "VIA";
-                        r->get = pirq_via_get;
-                        r->set = pirq_via_set;
-                        return 1;
+                r->name = "VIA";
+                r->get = pirq_via_get;
+                r->set = pirq_via_set;
+                return 1;
         }
         return 0;
 }
diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index b27c5acc79d0..1f1572692e0b 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -51,16 +51,14 @@ void save_processor_state(void)
         __save_processor_state(&saved_context);
 }
 
-static void
-do_fpu_end(void)
+static void do_fpu_end(void)
 {
-        /* restore FPU regs if necessary */
-        /* Do it out of line so that gcc does not move cr0 load to some stupid place */
-        kernel_fpu_end();
-        mxcsr_feature_mask_init();
+        /*
+         * Restore FPU regs if necessary.
+         */
+        kernel_fpu_end();
 }
 
-
 static void fix_processor_context(void)
 {
         int cpu = smp_processor_id();
diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
index 3fa67ecebc83..dc282710421a 100644
--- a/arch/ia64/ia32/sys_ia32.c
+++ b/arch/ia64/ia32/sys_ia32.c
@@ -36,6 +36,7 @@
 #include <linux/uio.h>
 #include <linux/nfs_fs.h>
 #include <linux/quota.h>
+#include <linux/syscalls.h>
 #include <linux/sunrpc/svc.h>
 #include <linux/nfsd/nfsd.h>
 #include <linux/nfsd/cache.h>
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index 768c7e46957c..6ade3790ce07 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -2,6 +2,7 @@
 #include <linux/smp.h>
 #include <linux/time.h>
 #include <linux/errno.h>
+#include <linux/timex.h>
 #include <asm/io.h>
 
 /* IBM Summit (EXA) Cyclone counter code*/
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 8b8a5a45b621..5b7e736f3b49 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -32,10 +32,6 @@
 
 extern unsigned long wall_jiffies;
 
-u64 jiffies_64 __cacheline_aligned_in_smp = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 #define TIME_KEEPER_ID  0       /* smp_processor_id() of time-keeper */
 
 #ifdef CONFIG_IA64_DEBUG_IRQ
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index 85920fb8d08c..396c94218cc2 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -653,8 +653,6 @@ ENTRY(rie_handler)
         SAVE_ALL
         mvfc    r0, bpc
         ld      r1, @r0
-        seth    r0, #0xa0f0
-        st      r1, @r0
         ldi     r1, #0x20                       ; error_code
         mv      r0, sp                          ; pt_regs
         bl      do_rie_handler
diff --git a/arch/m32r/kernel/io_m32700ut.c b/arch/m32r/kernel/io_m32700ut.c
index e545b065f7e9..eda9f963c1eb 100644
--- a/arch/m32r/kernel/io_m32700ut.c
+++ b/arch/m32r/kernel/io_m32700ut.c
@@ -64,11 +64,11 @@ static inline void *__port2addr_ata(unsigned long port)
  * from 0x10000000 to 0x13ffffff on physical address.
  * The base address of LAN controller(LAN91C111) is 0x300.
  */
-#define LAN_IOSTART     0x300
-#define LAN_IOEND       0x320
+#define LAN_IOSTART     0xa0000300
+#define LAN_IOEND       0xa0000320
 static inline void *_port2addr_ne(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET + 0x10000000);
+        return (void *)(port + 0x10000000);
 }
 static inline void *_port2addr_usb(unsigned long port)
 {
diff --git a/arch/m32r/kernel/io_mappi.c b/arch/m32r/kernel/io_mappi.c
index 78033165fb5c..3c3da042fbd1 100644
--- a/arch/m32r/kernel/io_mappi.c
+++ b/arch/m32r/kernel/io_mappi.c
@@ -31,7 +31,7 @@ extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int);
 
 static inline void *_port2addr(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET);
+        return (void *)(port | (NONCACHE_OFFSET));
 }
 
 static inline void *_port2addr_ne(unsigned long port)
diff --git a/arch/m32r/kernel/io_mappi2.c b/arch/m32r/kernel/io_mappi2.c
index 5c03504bf653..df3c729cb3e0 100644
--- a/arch/m32r/kernel/io_mappi2.c
+++ b/arch/m32r/kernel/io_mappi2.c
@@ -33,12 +33,9 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
 
 static inline void *_port2addr(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET);
+        return (void *)(port | (NONCACHE_OFFSET));
 }
 
-#define LAN_IOSTART     0x300
-#define LAN_IOEND       0x320
-
 #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
 static inline void *__port2addr_ata(unsigned long port)
 {
@@ -59,15 +56,17 @@ static inline void *__port2addr_ata(unsigned long port)
 }
 #endif
 
+#define LAN_IOSTART     0xa0000300
+#define LAN_IOEND       0xa0000320
 #ifdef CONFIG_CHIP_OPSP
 static inline void *_port2addr_ne(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET + 0x10000000);
+        return (void *)(port + 0x10000000);
 }
 #else
 static inline void *_port2addr_ne(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET + 0x04000000);
+        return (void *)(port + 0x04000000);
 }
 #endif
 static inline void *_port2addr_usb(unsigned long port)
diff --git a/arch/m32r/kernel/io_mappi3.c b/arch/m32r/kernel/io_mappi3.c
index c80bde657854..6716ffea769a 100644
--- a/arch/m32r/kernel/io_mappi3.c
+++ b/arch/m32r/kernel/io_mappi3.c
@@ -36,9 +36,6 @@ static inline void *_port2addr(unsigned long port)
         return (void *)(port + NONCACHE_OFFSET);
 }
 
-#define LAN_IOSTART     0x300
-#define LAN_IOEND       0x320
-
 #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
 static inline void *__port2addr_ata(unsigned long port)
 {
@@ -59,9 +56,11 @@ static inline void *__port2addr_ata(unsigned long port)
 }
 #endif
 
+#define LAN_IOSTART     0xa0000300
+#define LAN_IOEND       0xa0000320
 static inline void *_port2addr_ne(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET + 0x10000000);
+        return (void *)(port + 0x10000000);
 }
 
 static inline void *_port2addr_usb(unsigned long port)
diff --git a/arch/m32r/kernel/io_oaks32r.c b/arch/m32r/kernel/io_oaks32r.c
index 9997dddd24d7..8be323931e4a 100644
--- a/arch/m32r/kernel/io_oaks32r.c
+++ b/arch/m32r/kernel/io_oaks32r.c
@@ -16,7 +16,7 @@
 
 static inline void *_port2addr(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET);
+        return (void *)(port | (NONCACHE_OFFSET));
 }
 
 static inline  void *_port2addr_ne(unsigned long port)
diff --git a/arch/m32r/kernel/io_opsput.c b/arch/m32r/kernel/io_opsput.c
index e34951e8156f..4793bd18e115 100644
--- a/arch/m32r/kernel/io_opsput.c
+++ b/arch/m32r/kernel/io_opsput.c
@@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
 
 static inline void *_port2addr(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET);
+        return (void *)(port | (NONCACHE_OFFSET));
 }
 
 /*
@@ -44,11 +44,11 @@ static inline void *_port2addr(unsigned long port)
  * from 0x10000000 to 0x13ffffff on physical address.
  * The base address of LAN controller(LAN91C111) is 0x300.
  */
-#define LAN_IOSTART     0x300
-#define LAN_IOEND       0x320
+#define LAN_IOSTART     0xa0000300
+#define LAN_IOEND       0xa0000320
 static inline void *_port2addr_ne(unsigned long port)
 {
-        return (void *)(port + NONCACHE_OFFSET + 0x10000000);
+        return (void *)(port + 0x10000000);
 }
 static inline void *_port2addr_usb(unsigned long port)
 {
diff --git a/arch/m32r/kernel/io_usrv.c b/arch/m32r/kernel/io_usrv.c
index 9eb161dcc104..39a379af40bc 100644
--- a/arch/m32r/kernel/io_usrv.c
+++ b/arch/m32r/kernel/io_usrv.c
@@ -47,7 +47,7 @@ static inline void *_port2addr(unsigned long port)
         else if (port >= UART1_IOSTART && port <= UART1_IOEND)
                 port = ((port - UART1_IOSTART) << 1) + UART1_REGSTART;
 #endif  /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
-        return (void *)(port + NONCACHE_OFFSET);
+        return (void *)(port | (NONCACHE_OFFSET));
 }
 
 static inline void delay(void)
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 124f7c1b775e..078d2a0e71c2 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -756,7 +756,7 @@ do_ptrace(long request, struct task_struct *child, long addr, long data)
         return ret;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret;
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c
index ec5674727e7f..f722ec8eb021 100644
--- a/arch/m32r/kernel/setup.c
+++ b/arch/m32r/kernel/setup.c
@@ -305,19 +305,19 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 
         seq_printf(m, "processor\t: %ld\n", cpu);
 
-#ifdef CONFIG_CHIP_VDEC2
+#if defined(CONFIG_CHIP_VDEC2)
         seq_printf(m, "cpu family\t: VDEC2\n"
                 "cache size\t: Unknown\n");
-#elif  CONFIG_CHIP_M32700
+#elif defined(CONFIG_CHIP_M32700)
         seq_printf(m,"cpu family\t: M32700\n"
                 "cache size\t: I-8KB/D-8KB\n");
-#elif  CONFIG_CHIP_M32102
+#elif defined(CONFIG_CHIP_M32102)
         seq_printf(m,"cpu family\t: M32102\n"
                 "cache size\t: I-8KB\n");
-#elif  CONFIG_CHIP_OPSP
+#elif defined(CONFIG_CHIP_OPSP)
         seq_printf(m,"cpu family\t: OPSP\n"
                 "cache size\t: I-8KB/D-8KB\n");
-#elif  CONFIG_CHIP_MP
+#elif defined(CONFIG_CHIP_MP)
         seq_printf(m, "cpu family\t: M32R-MP\n"
                 "cache size\t: I-xxKB/D-xxKB\n");
 #else
@@ -326,19 +326,19 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         seq_printf(m, "bogomips\t: %lu.%02lu\n",
                 c->loops_per_jiffy/(500000/HZ),
                 (c->loops_per_jiffy/(5000/HZ)) % 100);
-#ifdef CONFIG_PLAT_MAPPI
+#if defined(CONFIG_PLAT_MAPPI)
         seq_printf(m, "Machine\t\t: Mappi Evaluation board\n");
-#elif CONFIG_PLAT_MAPPI2
+#elif defined(CONFIG_PLAT_MAPPI2)
         seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n");
-#elif CONFIG_PLAT_MAPPI3
+#elif defined(CONFIG_PLAT_MAPPI3)
         seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n");
-#elif  CONFIG_PLAT_M32700UT
+#elif defined(CONFIG_PLAT_M32700UT)
         seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n");
-#elif  CONFIG_PLAT_OPSPUT
+#elif defined(CONFIG_PLAT_OPSPUT)
         seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n");
-#elif  CONFIG_PLAT_USRV
+#elif defined(CONFIG_PLAT_USRV)
         seq_printf(m, "Machine\t\t: uServer\n");
-#elif  CONFIG_PLAT_OAKS32R
+#elif defined(CONFIG_PLAT_OAKS32R)
         seq_printf(m, "Machine\t\t: OAKS32R\n");
 #else
         seq_printf(m, "Machine\t\t: Unknown\n");
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index 539c562cd54d..2ebce2063fea 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -39,10 +39,6 @@ extern void send_IPI_allbutself(int, int);
 extern void smp_local_timer_interrupt(struct pt_regs *);
 #endif
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 extern unsigned long wall_jiffies;
 #define TICK_SIZE       (tick_nsec / 1000)
 
diff --git a/arch/m32r/lib/csum_partial_copy.c b/arch/m32r/lib/csum_partial_copy.c
index ddb16a83a8ce..3d5f06145854 100644
--- a/arch/m32r/lib/csum_partial_copy.c
+++ b/arch/m32r/lib/csum_partial_copy.c
@@ -18,10 +18,10 @@
 
 #include <linux/module.h>
 #include <linux/types.h>
+#include <linux/string.h>
 
 #include <net/checksum.h>
 #include <asm/byteorder.h>
-#include <asm/string.h>
 #include <asm/uaccess.h>
 
 /*
diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c
index 8ed1b01a6a87..f7f1d2e5b90b 100644
--- a/arch/m68k/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace.c
@@ -121,7 +121,7 @@ void ptrace_disable(struct task_struct *child)
         child->thread.work.syscall_trace = 0;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         unsigned long tmp;
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 4ec95e3cb874..98e4b1adfa29 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -27,10 +27,6 @@
 #include <linux/timex.h>
 #include <linux/profile.h>
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 static inline int set_rtc_mmss(unsigned long nowtime)
 {
   if (mach_set_clock_mmss)
diff --git a/arch/m68knommu/kernel/ptrace.c b/arch/m68knommu/kernel/ptrace.c
index 9724e1cd82e5..621d7b91ccfe 100644
--- a/arch/m68knommu/kernel/ptrace.c
+++ b/arch/m68knommu/kernel/ptrace.c
@@ -101,7 +101,7 @@ void ptrace_disable(struct task_struct *child)
         put_reg(child, PT_SR, tmp);
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret;
diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c
index b17c1ecba966..b9d8abb45430 100644
--- a/arch/m68knommu/kernel/time.c
+++ b/arch/m68knommu/kernel/time.c
@@ -27,10 +27,6 @@
 
 #define TICK_SIZE (tick_nsec / 1000)
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 extern unsigned long wall_jiffies;
 
 
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 7ce34d4aa220..10d3644e3608 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -1077,8 +1077,8 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
         struct elfhdr elf;
         off_t offset = 0, dataoff;
         int limit = current->signal->rlim[RLIMIT_CORE].rlim_cur;
-        int numnote = 4;
-        struct memelfnote notes[4];
+        int numnote = 3;
+        struct memelfnote notes[3];
         struct elf_prstatus prstatus;   /* NT_PRSTATUS */
         elf_fpregset_t fpu;             /* NT_PRFPREG */
         struct elf_prpsinfo psinfo;     /* NT_PRPSINFO */
@@ -1211,20 +1211,15 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
         }
         strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
 
-        notes[2].name = "CORE";
-        notes[2].type = NT_TASKSTRUCT;
-        notes[2].datasz = sizeof(*current);
-        notes[2].data = current;
-
         /* Try to dump the FPU. */
         prstatus.pr_fpvalid = dump_fpu (regs, &fpu);
         if (!prstatus.pr_fpvalid) {
                 numnote--;
         } else {
-                notes[3].name = "CORE";
-                notes[3].type = NT_PRFPREG;
-                notes[3].datasz = sizeof(fpu);
-                notes[3].data = &fpu;
+                notes[2].name = "CORE";
+                notes[2].type = NT_PRFPREG;
+                notes[2].datasz = sizeof(fpu);
+                notes[2].data = &fpu;
         }
 
         /* Write notes phdr entry. */
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index fcceab8f2e00..f1b0f3e1f95b 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -174,7 +174,7 @@ int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
         return 0;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret;
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index a24651dfaaba..787ed541d442 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -45,10 +45,6 @@
 
 #define TICK_SIZE       (tick_nsec / 1000)
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 /*
  * forward reference
  */
diff --git a/arch/mips/sgi-ip27/ip27-berr.c b/arch/mips/sgi-ip27/ip27-berr.c
index e1829a5d3b19..07631a97670b 100644
--- a/arch/mips/sgi-ip27/ip27-berr.c
+++ b/arch/mips/sgi-ip27/ip27-berr.c
@@ -10,6 +10,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/signal.h>       /* for SIGBUS */
 
 #include <asm/module.h>
 #include <asm/sn/addrs.h>
diff --git a/arch/parisc/kernel/ioctl32.c b/arch/parisc/kernel/ioctl32.c
index 8cad8f004f00..0a331104ad56 100644
--- a/arch/parisc/kernel/ioctl32.c
+++ b/arch/parisc/kernel/ioctl32.c
@@ -561,11 +561,6 @@ IOCTL_TABLE_START
 #define DECLARES
 #include "compat_ioctl.c"
 
-/* Might be moved to compat_ioctl.h with some ifdefs... */
-COMPATIBLE_IOCTL(TIOCSTART)
-COMPATIBLE_IOCTL(TIOCSTOP)
-COMPATIBLE_IOCTL(TIOCSLTC)
-
 /* PA-specific ioctls */
 COMPATIBLE_IOCTL(PA_PERF_ON)
 COMPATIBLE_IOCTL(PA_PERF_OFF)
diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c
index f3428e5e86fb..18130c3748f3 100644
--- a/arch/parisc/kernel/ptrace.c
+++ b/arch/parisc/kernel/ptrace.c
@@ -78,7 +78,7 @@ void ptrace_disable(struct task_struct *child)
         pa_psw(child)->l = 0;
 }
 
-long sys_ptrace(long request, pid_t pid, long addr, long data)
+long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         long ret;
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index bc979e1abdec..cded25680787 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -33,10 +33,6 @@
 
 #include <linux/timex.h>
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 /* xtime and wall_jiffies keep wall-clock time */
 extern unsigned long wall_jiffies;
 
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
new file mode 100644
index 000000000000..967ecf92d6a7
--- /dev/null
+++ b/arch/powerpc/Kconfig
@@ -0,0 +1,900 @@
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+mainmenu "Linux/PowerPC Kernel Configuration"
+
+config PPC64
+        bool "64-bit kernel"
+        default n
+        help
+          This option selects whether a 32-bit or a 64-bit kernel
+          will be built.
+
+config PPC32
+        bool
+        default y if !PPC64
+
+config 64BIT
+        bool
+        default y if PPC64
+
+config PPC_MERGE
+        def_bool y
+
+config MMU
+        bool
+        default y
+
+config UID16
+        bool
+
+config GENERIC_HARDIRQS
+        bool
+        default y
+
+config RWSEM_GENERIC_SPINLOCK
+        bool
+
+config RWSEM_XCHGADD_ALGORITHM
+        bool
+        default y
+
+config GENERIC_CALIBRATE_DELAY
+        bool
+        default y
+
+config PPC
+        bool
+        default y
+
+config EARLY_PRINTK
+        bool
+        default y if PPC64
+
+config COMPAT
+        bool
+        default y if PPC64
+
+config SYSVIPC_COMPAT
+        bool
+        depends on COMPAT && SYSVIPC
+        default y
+
+# All PPC32s use generic nvram driver through ppc_md
+config GENERIC_NVRAM
+        bool
+        default y if PPC32
+
+config SCHED_NO_NO_OMIT_FRAME_POINTER
+        bool
+        default y
+
+config ARCH_MAY_HAVE_PC_FDC
+        bool
+        default y
+
+menu "Processor support"
+choice
+        prompt "Processor Type"
+        depends on PPC32
+        default 6xx
+
+config 6xx
+        bool "6xx/7xx/74xx"
+        select PPC_FPU
+        help
+          There are four families of PowerPC chips supported.  The more common
+          types (601, 603, 604, 740, 750, 7400), the Motorola embedded
+          versions (821, 823, 850, 855, 860, 52xx, 82xx, 83xx), the AMCC
+          embedded versions (403 and 405) and the high end 64 bit Power
+          processors (POWER 3, POWER4, and IBM PPC970 also known as G5).
+          
+          Unless you are building a kernel for one of the embedded processor
+          systems, 64 bit IBM RS/6000 or an Apple G5, choose 6xx.
+          Note that the kernel runs in 32-bit mode even on 64-bit chips.
+
+config PPC_52xx
+        bool "Freescale 52xx"
+        
+config PPC_82xx
+        bool "Freescale 82xx"
+
+config PPC_83xx
+        bool "Freescale 83xx"
+
+config 40x
+        bool "AMCC 40x"
+
+config 44x
+        bool "AMCC 44x"
+
+config 8xx
+        bool "Freescale 8xx"
+
+config E200
+        bool "Freescale e200"
+
+config E500
+        bool "Freescale e500"
+endchoice
+
+config POWER4_ONLY
+        bool "Optimize for POWER4"
+        depends on PPC64
+        default n
+        ---help---
+          Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
+          The resulting binary will not work on POWER3 or RS64 processors
+          when compiled with binutils 2.15 or later.
+
+config POWER3
+        bool
+        depends on PPC64
+        default y if !POWER4_ONLY
+
+config POWER4
+        depends on PPC64
+        def_bool y
+
+config PPC_FPU
+        bool
+        default y if PPC64
+
+config BOOKE
+        bool
+        depends on E200 || E500
+        default y
+
+config FSL_BOOKE
+        bool
+        depends on E200 || E500
+        default y
+
+config PTE_64BIT
+        bool
+        depends on 44x || E500
+        default y if 44x
+        default y if E500 && PHYS_64BIT
+
+config PHYS_64BIT
+        bool 'Large physical address support' if E500
+        depends on 44x || E500
+        default y if 44x
+        ---help---
+          This option enables kernel support for larger than 32-bit physical
+          addresses.  This features is not be available on all e500 cores.
+
+          If in doubt, say N here.
+
+config ALTIVEC
+        bool "AltiVec Support"
+        depends on 6xx || POWER4
+        ---help---
+          This option enables kernel support for the Altivec extensions to the
+          PowerPC processor. The kernel currently supports saving and restoring
+          altivec registers, and turning on the 'altivec enable' bit so user
+          processes can execute altivec instructions.
+
+          This option is only usefully if you have a processor that supports
+          altivec (G4, otherwise known as 74xx series), but does not have
+          any affect on a non-altivec cpu (it does, however add code to the
+          kernel).
+
+          If in doubt, say Y here.
+
+config SPE
+        bool "SPE Support"
+        depends on E200 || E500
+        ---help---
+          This option enables kernel support for the Signal Processing
+          Extensions (SPE) to the PowerPC processor. The kernel currently
+          supports saving and restoring SPE registers, and turning on the
+          'spe enable' bit so user processes can execute SPE instructions.
+
+          This option is only useful if you have a processor that supports
+          SPE (e500, otherwise known as 85xx series), but does not have any
+          effect on a non-spe cpu (it does, however add code to the kernel).
+
+          If in doubt, say Y here.
+
+config PPC_STD_MMU
+        bool
+        depends on 6xx || POWER3 || POWER4 || PPC64
+        default y
+
+config PPC_STD_MMU_32
+        def_bool y
+        depends on PPC_STD_MMU && PPC32
+
+config SMP
+        depends on PPC_STD_MMU
+        bool "Symmetric multi-processing support"
+        ---help---
+          This enables support for systems with more than one CPU. If you have
+          a system with only one CPU, say N. If you have a system with more
+          than one CPU, say Y.  Note that the kernel does not currently
+          support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
+          since they have inadequate hardware support for multiprocessor
+          operation.
+
+          If you say N here, the kernel will run on single and multiprocessor
+          machines, but will use only one CPU of a multiprocessor machine. If
+          you say Y here, the kernel will run on single-processor machines.
+          On a single-processor machine, the kernel will run faster if you say
+          N here.
+
+          If you don't know what to do here, say N.
+
+config NR_CPUS
+        int "Maximum number of CPUs (2-32)"
+        range 2 128
+        depends on SMP
+        default "32" if PPC64
+        default "4"
+
+config NOT_COHERENT_CACHE
+        bool
+        depends on 4xx || 8xx || E200
+        default y
+endmenu
+
+source "init/Kconfig"
+
+menu "Platform support"
+        depends on PPC64 || 6xx
+
+choice
+        prompt "Machine type"
+        default PPC_MULTIPLATFORM
+
+config PPC_MULTIPLATFORM
+        bool "Generic desktop/server/laptop"
+        help
+          Select this option if configuring for an IBM pSeries or
+          RS/6000 machine, an Apple machine, or a PReP, CHRP,
+          Maple or Cell-based machine.
+
+config PPC_ISERIES
+        bool "IBM Legacy iSeries"
+        depends on PPC64
+
+config EMBEDDED6xx
+        bool "Embedded 6xx/7xx/7xxx-based board"
+        depends on PPC32
+
+config APUS
+        bool "Amiga-APUS"
+        depends on PPC32 && BROKEN
+        help
+          Select APUS if configuring for a PowerUP Amiga.
+          More information is available at:
+          <http://linux-apus.sourceforge.net/>.
+endchoice
+
+config PPC_PSERIES
+        depends on PPC_MULTIPLATFORM && PPC64
+        bool "  IBM pSeries & new (POWER5-based) iSeries"
+        select PPC_I8259
+        select PPC_RTAS
+        select RTAS_ERROR_LOGGING
+        default y
+
+config PPC_CHRP
+        bool "  Common Hardware Reference Platform (CHRP) based machines"
+        depends on PPC_MULTIPLATFORM && PPC32
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
+        select PPC_RTAS
+        select PPC_MPC106
+        default y
+
+config PPC_PMAC
+        bool "  Apple PowerMac based machines"
+        depends on PPC_MULTIPLATFORM
+        select PPC_INDIRECT_PCI if PPC32
+        select PPC_MPC106 if PPC32
+        default y
+
+config PPC_PMAC64
+        bool
+        depends on PPC_PMAC && POWER4
+        select U3_DART
+        default y
+
+config PPC_PREP
+        bool "  PowerPC Reference Platform (PReP) based machines"
+        depends on PPC_MULTIPLATFORM && PPC32
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
+        default y
+
+config PPC_MAPLE
+        depends on PPC_MULTIPLATFORM && PPC64
+        bool "  Maple 970FX Evaluation Board"
+        select U3_DART
+        select MPIC_BROKEN_U3
+        default n
+        help
+          This option enables support for the Maple 970FX Evaluation Board.
+          For more informations, refer to <http://www.970eval.com>
+
+config PPC_BPA
+        bool "  Broadband Processor Architecture"
+        depends on PPC_MULTIPLATFORM && PPC64
+        select PPC_RTAS
+
+config PPC_OF
+        bool
+        depends on PPC_MULTIPLATFORM    # for now
+        default y
+
+config XICS
+        depends on PPC_PSERIES
+        bool
+        default y
+
+config U3_DART
+        bool 
+        depends on PPC_MULTIPLATFORM && PPC64
+        default n
+
+config MPIC
+        depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP
+        bool
+        default y
+
+config PPC_RTAS
+        bool
+        default n
+
+config RTAS_ERROR_LOGGING
+        bool
+        depends on PPC_RTAS
+        default n
+
+config MPIC_BROKEN_U3
+        bool
+        depends on PPC_MAPLE
+        default y
+
+config BPA_IIC
+        depends on PPC_BPA
+        bool
+        default y
+
+config IBMVIO
+        depends on PPC_PSERIES || PPC_ISERIES
+        bool
+        default y
+
+config PPC_MPC106
+        bool
+        default n
+
+source "drivers/cpufreq/Kconfig"
+
+config CPU_FREQ_PMAC
+        bool "Support for Apple PowerBooks"
+        depends on CPU_FREQ && ADB_PMU && PPC32
+        select CPU_FREQ_TABLE
+        help
+          This adds support for frequency switching on Apple PowerBooks,
+          this currently includes some models of iBook & Titanium
+          PowerBook.
+
+config PPC601_SYNC_FIX
+        bool "Workarounds for PPC601 bugs"
+        depends on 6xx && (PPC_PREP || PPC_PMAC)
+        help
+          Some versions of the PPC601 (the first PowerPC chip) have bugs which
+          mean that extra synchronization instructions are required near
+          certain instructions, typically those that make major changes to the
+          CPU state.  These extra instructions reduce performance slightly.
+          If you say N here, these extra instructions will not be included,
+          resulting in a kernel which will run faster but may not run at all
+          on some systems with the PPC601 chip.
+
+          If in doubt, say Y here.
+
+config TAU
+        bool "Thermal Management Support"
+        depends on 6xx
+        help
+          G3 and G4 processors have an on-chip temperature sensor called the
+          'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
+          temperature within 2-4 degrees Celsius. This option shows the current
+          on-die temperature in /proc/cpuinfo if the cpu supports it.
+
+          Unfortunately, on some chip revisions, this sensor is very inaccurate
+          and in some cases, does not work at all, so don't assume the cpu
+          temp is actually what /proc/cpuinfo says it is.
+
+config TAU_INT
+        bool "Interrupt driven TAU driver (DANGEROUS)"
+        depends on TAU
+        ---help---
+          The TAU supports an interrupt driven mode which causes an interrupt
+          whenever the temperature goes out of range. This is the fastest way
+          to get notified the temp has exceeded a range. With this option off,
+          a timer is used to re-check the temperature periodically.
+
+          However, on some cpus it appears that the TAU interrupt hardware
+          is buggy and can cause a situation which would lead unexplained hard
+          lockups.
+
+          Unless you are extending the TAU driver, or enjoy kernel/hardware
+          debugging, leave this option off.
+
+config TAU_AVERAGE
+        bool "Average high and low temp"
+        depends on TAU
+        ---help---
+          The TAU hardware can compare the temperature to an upper and lower
+          bound.  The default behavior is to show both the upper and lower
+          bound in /proc/cpuinfo. If the range is large, the temperature is
+          either changing a lot, or the TAU hardware is broken (likely on some
+          G4's). If the range is small (around 4 degrees), the temperature is
+          relatively stable.  If you say Y here, a single temperature value,
+          halfway between the upper and lower bounds, will be reported in
+          /proc/cpuinfo.
+
+          If in doubt, say N here.
+endmenu
+
+source arch/powerpc/platforms/embedded6xx/Kconfig
+source arch/powerpc/platforms/4xx/Kconfig
+source arch/powerpc/platforms/85xx/Kconfig
+source arch/powerpc/platforms/8xx/Kconfig
+
+menu "Kernel options"
+
+config HIGHMEM
+        bool "High memory support"
+        depends on PPC32
+
+source kernel/Kconfig.hz
+source kernel/Kconfig.preempt
+source "fs/Kconfig.binfmt"
+
+# We optimistically allocate largepages from the VM, so make the limit
+# large enough (16MB). This badly named config option is actually
+# max order + 1
+config FORCE_MAX_ZONEORDER
+        int
+        depends on PPC64
+        default "13"
+
+config MATH_EMULATION
+        bool "Math emulation"
+        depends on 4xx || 8xx || E200 || E500
+        ---help---
+          Some PowerPC chips designed for embedded applications do not have
+          a floating-point unit and therefore do not implement the
+          floating-point instructions in the PowerPC instruction set.  If you
+          say Y here, the kernel will include code to emulate a floating-point
+          unit, which will allow programs that use floating-point
+          instructions to run.
+
+config IOMMU_VMERGE
+        bool "Enable IOMMU virtual merging (EXPERIMENTAL)"
+        depends on EXPERIMENTAL && PPC64
+        default n
+        help
+          Cause IO segments sent to a device for DMA to be merged virtually
+          by the IOMMU when they happen to have been allocated contiguously.
+          This doesn't add pressure to the IOMMU allocator. However, some
+          drivers don't support getting large merged segments coming back
+          from *_map_sg(). Say Y if you know the drivers you are using are
+          properly handling this case.
+
+config HOTPLUG_CPU
+        bool "Support for enabling/disabling CPUs"
+        depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC)
+        ---help---
+          Say Y here to be able to disable and re-enable individual
+          CPUs at runtime on SMP machines.
+
+          Say N if you are unsure.
+
+config KEXEC
+        bool "kexec system call (EXPERIMENTAL)"
+        depends on PPC_MULTIPLATFORM && EXPERIMENTAL
+        help
+          kexec is a system call that implements the ability to shutdown your
+          current kernel, and to start another kernel.  It is like a reboot
+          but it is indepedent of the system firmware.   And like a reboot
+          you can start any kernel with it, not just Linux.
+
+          The name comes from the similiarity to the exec system call.
+
+          It is an ongoing process to be certain the hardware in a machine
+          is properly shutdown, so do not be surprised if this code does not
+          initially work for you.  It may help to enable device hotplugging
+          support.  As of this writing the exact hardware interface is
+          strongly in flux, so no good recommendation can be made.
+
+config EMBEDDEDBOOT
+        bool
+        depends on 8xx || 8260
+        default y
+
+config PC_KEYBOARD
+        bool "PC PS/2 style Keyboard"
+        depends on 4xx || CPM2
+
+config PPCBUG_NVRAM
+        bool "Enable reading PPCBUG NVRAM during boot" if PPLUS || LOPEC
+        default y if PPC_PREP
+
+config IRQ_ALL_CPUS
+        bool "Distribute interrupts on all CPUs by default"
+        depends on SMP && !MV64360
+        help
+          This option gives the kernel permission to distribute IRQs across
+          multiple CPUs.  Saying N here will route all IRQs to the first
+          CPU.  Generally saying Y is safe, although some problems have been
+          reported with SMP Power Macintoshes with this option enabled.
+
+source "arch/powerpc/platforms/pseries/Kconfig"
+
+config NUMA
+        bool "NUMA support"
+        depends on PPC64
+        default y if SMP && PPC_PSERIES
+
+config ARCH_SELECT_MEMORY_MODEL
+        def_bool y
+        depends on PPC64
+
+config ARCH_FLATMEM_ENABLE
+       def_bool y
+       depends on PPC64 && !NUMA
+
+config ARCH_DISCONTIGMEM_ENABLE
+        def_bool y
+        depends on SMP && PPC_PSERIES
+
+config ARCH_DISCONTIGMEM_DEFAULT
+        def_bool y
+        depends on ARCH_DISCONTIGMEM_ENABLE
+
+config ARCH_SPARSEMEM_ENABLE
+        def_bool y
+        depends on ARCH_DISCONTIGMEM_ENABLE
+
+source "mm/Kconfig"
+
+config HAVE_ARCH_EARLY_PFN_TO_NID
+        def_bool y
+        depends on NEED_MULTIPLE_NODES
+
+# Some NUMA nodes have memory ranges that span
+# other nodes.  Even though a pfn is valid and
+# between a node's start and end pfns, it may not
+# reside on that node.
+#
+# This is a relatively temporary hack that should
+# be able to go away when sparsemem is fully in
+# place
+
+config NODES_SPAN_OTHER_NODES
+        def_bool y
+        depends on NEED_MULTIPLE_NODES
+
+config SCHED_SMT
+        bool "SMT (Hyperthreading) scheduler support"
+        depends on PPC64 && SMP
+        default off
+        help
+          SMT scheduler support improves the CPU scheduler's decision making
+          when dealing with POWER5 cpus at a cost of slightly increased
+          overhead in some places. If unsure say N here.
+
+config PROC_DEVICETREE
+        bool "Support for device tree in /proc"
+        depends on PROC_FS
+        help
+          This option adds a device-tree directory under /proc which contains
+          an image of the device tree that the kernel copies from Open
+          Firmware or other boot firmware. If unsure, say Y here.
+
+source "arch/powerpc/platforms/prep/Kconfig"
+
+config CMDLINE_BOOL
+        bool "Default bootloader kernel arguments"
+        depends on !PPC_ISERIES
+
+config CMDLINE
+        string "Initial kernel command string"
+        depends on CMDLINE_BOOL
+        default "console=ttyS0,9600 console=tty0 root=/dev/sda2"
+        help
+          On some platforms, there is currently no way for the boot loader to
+          pass arguments to the kernel. For these platforms, you can supply
+          some command-line options at build time by entering them here.  In
+          most cases you will need to specify the root device here.
+
+if !44x || BROKEN
+source kernel/power/Kconfig
+endif
+
+config SECCOMP
+        bool "Enable seccomp to safely compute untrusted bytecode"
+        depends on PROC_FS
+        default y
+        help
+          This kernel feature is useful for number crunching applications
+          that may need to compute untrusted bytecode during their
+          execution. By using pipes or other transports made available to
+          the process as file descriptors supporting the read/write
+          syscalls, it's possible to isolate those applications in
+          their own address space using seccomp. Once seccomp is
+          enabled via /proc/<pid>/seccomp, it cannot be disabled
+          and the task is only allowed to execute a few safe syscalls
+          defined by each seccomp mode.
+
+          If unsure, say Y. Only embedded should say N here.
+
+endmenu
+
+config ISA_DMA_API
+        bool
+        default y
+
+menu "Bus options"
+
+config ISA
+        bool "Support for ISA-bus hardware"
+        depends on PPC_PREP || PPC_CHRP
+        select PPC_I8259
+        help
+          Find out whether you have ISA slots on your motherboard.  ISA is the
+          name of a bus system, i.e. the way the CPU talks to the other stuff
+          inside your box.  If you have an Apple machine, say N here; if you
+          have an IBM RS/6000 or pSeries machine or a PReP machine, say Y.  If
+          you have an embedded board, consult your board documentation.
+
+config GENERIC_ISA_DMA
+        bool
+        depends on PPC64 || POWER4 || 6xx && !CPM2
+        default y
+
+config PPC_I8259
+        bool
+        default y if 85xx
+        default n
+
+config PPC_INDIRECT_PCI
+        bool
+        depends on PCI
+        default y if 40x || 44x || 85xx || 83xx
+        default n
+
+config EISA
+        bool
+
+config SBUS
+        bool
+
+# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
+config MCA
+        bool
+
+config PCI
+        bool "PCI support" if 40x || CPM2 || 83xx || 85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES)
+        default y if !40x && !CPM2 && !8xx && !APUS && !83xx && !85xx
+        default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
+        default PCI_QSPAN if !4xx && !CPM2 && 8xx
+        help
+          Find out whether your system includes a PCI bus. PCI is the name of
+          a bus system, i.e. the way the CPU talks to the other stuff inside
+          your box.  If you say Y here, the kernel will include drivers and
+          infrastructure code to support PCI bus devices.
+
+config PCI_DOMAINS
+        bool
+        default PCI
+
+config MPC83xx_PCI2
+        bool "  Supprt for 2nd PCI host controller"
+        depends on PCI && MPC834x
+        default y if MPC834x_SYS
+
+config PCI_QSPAN
+        bool "QSpan PCI"
+        depends on !4xx && !CPM2 && 8xx
+        select PPC_I8259
+        help
+          Say Y here if you have a system based on a Motorola 8xx-series
+          embedded processor with a QSPAN PCI interface, otherwise say N.
+
+config PCI_8260
+        bool
+        depends on PCI && 8260
+        select PPC_INDIRECT_PCI
+        default y
+
+config 8260_PCI9
+        bool "  Enable workaround for MPC826x erratum PCI 9"
+        depends on PCI_8260 && !ADS8272
+        default y
+
+choice
+        prompt "  IDMA channel for PCI 9 workaround"
+        depends on 8260_PCI9
+
+config 8260_PCI9_IDMA1
+        bool "IDMA1"
+
+config 8260_PCI9_IDMA2
+        bool "IDMA2"
+
+config 8260_PCI9_IDMA3
+        bool "IDMA3"
+
+config 8260_PCI9_IDMA4
+        bool "IDMA4"
+
+endchoice
+
+source "drivers/pci/Kconfig"
+
+source "drivers/pcmcia/Kconfig"
+
+source "drivers/pci/hotplug/Kconfig"
+
+endmenu
+
+menu "Advanced setup"
+        depends on PPC32
+
+config ADVANCED_OPTIONS
+        bool "Prompt for advanced kernel configuration options"
+        help
+          This option will enable prompting for a variety of advanced kernel
+          configuration options.  These options can cause the kernel to not
+          work if they are set incorrectly, but can be used to optimize certain
+          aspects of kernel memory management.
+
+          Unless you know what you are doing, say N here.
+
+comment "Default settings for advanced configuration options are used"
+        depends on !ADVANCED_OPTIONS
+
+config HIGHMEM_START_BOOL
+        bool "Set high memory pool address"
+        depends on ADVANCED_OPTIONS && HIGHMEM
+        help
+          This option allows you to set the base address of the kernel virtual
+          area used to map high memory pages.  This can be useful in
+          optimizing the layout of kernel virtual memory.
+
+          Say N here unless you know what you are doing.
+
+config HIGHMEM_START
+        hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL
+        default "0xfe000000"
+
+config LOWMEM_SIZE_BOOL
+        bool "Set maximum low memory"
+        depends on ADVANCED_OPTIONS
+        help
+          This option allows you to set the maximum amount of memory which
+          will be used as "low memory", that is, memory which the kernel can
+          access directly, without having to set up a kernel virtual mapping.
+          This can be useful in optimizing the layout of kernel virtual
+          memory.
+
+          Say N here unless you know what you are doing.
+
+config LOWMEM_SIZE
+        hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
+        default "0x30000000"
+
+config KERNEL_START_BOOL
+        bool "Set custom kernel base address"
+        depends on ADVANCED_OPTIONS
+        help
+          This option allows you to set the kernel virtual address at which
+          the kernel will map low memory (the kernel image will be linked at
+          this address).  This can be useful in optimizing the virtual memory
+          layout of the system.
+
+          Say N here unless you know what you are doing.
+
+config KERNEL_START
+        hex "Virtual address of kernel base" if KERNEL_START_BOOL
+        default "0xc0000000"
+
+config TASK_SIZE_BOOL
+        bool "Set custom user task size"
+        depends on ADVANCED_OPTIONS
+        help
+          This option allows you to set the amount of virtual address space
+          allocated to user tasks.  This can be useful in optimizing the
+          virtual memory layout of the system.
+
+          Say N here unless you know what you are doing.
+
+config TASK_SIZE
+        hex "Size of user task space" if TASK_SIZE_BOOL
+        default "0x80000000"
+
+config CONSISTENT_START_BOOL
+        bool "Set custom consistent memory pool address"
+        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
+        help
+          This option allows you to set the base virtual address
+          of the the consistent memory pool.  This pool of virtual
+          memory is used to make consistent memory allocations.
+
+config CONSISTENT_START
+        hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
+        default "0xff100000" if NOT_COHERENT_CACHE
+
+config CONSISTENT_SIZE_BOOL
+        bool "Set custom consistent memory pool size"
+        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
+        help
+          This option allows you to set the size of the the
+          consistent memory pool.  This pool of virtual memory
+          is used to make consistent memory allocations.
+
+config CONSISTENT_SIZE
+        hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
+        default "0x00200000" if NOT_COHERENT_CACHE
+
+config BOOT_LOAD_BOOL
+        bool "Set the boot link/load address"
+        depends on ADVANCED_OPTIONS && !PPC_MULTIPLATFORM
+        help
+          This option allows you to set the initial load address of the zImage
+          or zImage.initrd file.  This can be useful if you are on a board
+          which has a small amount of memory.
+
+          Say N here unless you know what you are doing.
+
+config BOOT_LOAD
+        hex "Link/load address for booting" if BOOT_LOAD_BOOL
+        default "0x00400000" if 40x || 8xx || 8260
+        default "0x01000000" if 44x
+        default "0x00800000"
+
+config PIN_TLB
+        bool "Pinned Kernel TLBs (860 ONLY)"
+        depends on ADVANCED_OPTIONS && 8xx
+endmenu
+
+if PPC64
+config KERNEL_START
+        hex
+        default "0xc000000000000000"
+endif
+
+source "net/Kconfig"
+
+source "drivers/Kconfig"
+
+source "fs/Kconfig"
+
+# XXX source "arch/ppc/8xx_io/Kconfig"
+
+# XXX source "arch/ppc/8260_io/Kconfig"
+
+source "arch/powerpc/platforms/iseries/Kconfig"
+
+source "lib/Kconfig"
+
+source "arch/powerpc/oprofile/Kconfig"
+
+source "arch/powerpc/Kconfig.debug"
+
+source "security/Kconfig"
+
+config KEYS_COMPAT
+        bool
+        depends on COMPAT && KEYS
+        default y
+
+source "crypto/Kconfig"
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
new file mode 100644
index 000000000000..0baf64ec80d0
--- /dev/null
+++ b/arch/powerpc/Kconfig.debug
@@ -0,0 +1,128 @@
+menu "Kernel hacking"
+
+source "lib/Kconfig.debug"
+
+config DEBUG_STACKOVERFLOW
+        bool "Check for stack overflows"
+        depends on DEBUG_KERNEL && PPC64
+        help
+          This option will cause messages to be printed if free stack space
+          drops below a certain limit.
+
+config KPROBES
+        bool "Kprobes"
+        depends on DEBUG_KERNEL && PPC64
+        help
+          Kprobes allows you to trap at almost any kernel address and
+          execute a callback function.  register_kprobe() establishes
+          a probepoint and specifies the callback.  Kprobes is useful
+          for kernel debugging, non-intrusive instrumentation and testing.
+          If in doubt, say "N".
+
+config DEBUG_STACK_USAGE
+        bool "Stack utilization instrumentation"
+        depends on DEBUG_KERNEL && PPC64
+        help
+          Enables the display of the minimum amount of free stack which each
+          task has ever had available in the sysrq-T and sysrq-P debug output.
+
+          This option will slow down process creation somewhat.
+
+config DEBUGGER
+        bool "Enable debugger hooks"
+        depends on DEBUG_KERNEL
+        help
+          Include in-kernel hooks for kernel debuggers. Unless you are
+          intending to debug the kernel, say N here.
+
+config KGDB
+        bool "Include kgdb kernel debugger"
+        depends on DEBUGGER && (BROKEN || PPC_GEN550 || 4xx)
+        select DEBUG_INFO
+        help
+          Include in-kernel hooks for kgdb, the Linux kernel source level
+          debugger.  See <http://kgdb.sourceforge.net/> for more information.
+          Unless you are intending to debug the kernel, say N here.
+
+choice
+        prompt "Serial Port"
+        depends on KGDB
+        default KGDB_TTYS1
+
+config KGDB_TTYS0
+        bool "ttyS0"
+
+config KGDB_TTYS1
+        bool "ttyS1"
+
+config KGDB_TTYS2
+        bool "ttyS2"
+
+config KGDB_TTYS3
+        bool "ttyS3"
+
+endchoice
+
+config KGDB_CONSOLE
+        bool "Enable serial console thru kgdb port"
+        depends on KGDB && 8xx || CPM2
+        help
+          If you enable this, all serial console messages will be sent
+          over the gdb stub.
+          If unsure, say N.
+
+config XMON
+        bool "Include xmon kernel debugger"
+        depends on DEBUGGER && !PPC_ISERIES
+        help
+          Include in-kernel hooks for the xmon kernel monitor/debugger.
+          Unless you are intending to debug the kernel, say N here.
+          Make sure to enable also CONFIG_BOOTX_TEXT on Macs. Otherwise
+          nothing will appear on the screen (xmon writes directly to the
+          framebuffer memory).
+          The cmdline option 'xmon' or 'xmon=early' will drop into xmon
+          very early during boot. 'xmon=on' will just enable the xmon
+          debugger hooks.  'xmon=off' will disable the debugger hooks
+          if CONFIG_XMON_DEFAULT is set.
+
+config XMON_DEFAULT
+        bool "Enable xmon by default"
+        depends on XMON
+        help
+          xmon is normally disabled unless booted with 'xmon=on'.
+          Use 'xmon=off' to disable xmon init during runtime.
+
+config IRQSTACKS
+        bool "Use separate kernel stacks when processing interrupts"
+        depends on PPC64
+        help
+          If you say Y here the kernel will use separate kernel stacks
+          for handling hard and soft interrupts.  This can help avoid
+          overflowing the process kernel stacks.
+
+config BDI_SWITCH
+        bool "Include BDI-2000 user context switcher"
+        depends on DEBUG_KERNEL && PPC32
+        help
+          Include in-kernel support for the Abatron BDI2000 debugger.
+          Unless you are intending to debug the kernel with one of these
+          machines, say N here.
+
+config BOOTX_TEXT
+        bool "Support for early boot text console (BootX or OpenFirmware only)"
+        depends PPC_OF && !PPC_ISERIES
+        help
+          Say Y here to see progress messages from the boot firmware in text
+          mode. Requires either BootX or Open Firmware.
+
+config SERIAL_TEXT_DEBUG
+        bool "Support for early boot texts over serial port"
+        depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \
+                PPC_GEN550 || PPC_MPC52xx
+
+config PPC_OCP
+        bool
+        depends on IBM_OCP || XILINX_OCP
+        default y
+
+endmenu
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
new file mode 100644
index 000000000000..2f4cce06a7e5
--- /dev/null
+++ b/arch/powerpc/Makefile
@@ -0,0 +1,222 @@
+# This file is included by the global makefile so that you can add your own
+# architecture-specific flags and dependencies. Remember to do have actions
+# for "archclean" and "archdep" for cleaning up and making dependencies for
+# this architecture.
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1994 by Linus Torvalds
+# Changes for PPC by Gary Thomas
+# Rewritten by Cort Dougan and Paul Mackerras
+#
+
+# This must match PAGE_OFFSET in include/asm-powerpc/page.h.
+KERNELLOAD      := $(CONFIG_KERNEL_START)
+
+HAS_BIARCH      := $(call cc-option-yn, -m32)
+
+ifeq ($(CONFIG_PPC64),y)
+OLDARCH := ppc64
+SZ      := 64
+
+# Set default 32 bits cross compilers for vdso and boot wrapper
+CROSS32_COMPILE ?=
+
+CROSS32CC               := $(CROSS32_COMPILE)gcc
+CROSS32AS               := $(CROSS32_COMPILE)as
+CROSS32LD               := $(CROSS32_COMPILE)ld
+CROSS32OBJCOPY          := $(CROSS32_COMPILE)objcopy
+
+ifeq ($(HAS_BIARCH),y)
+ifeq ($(CROSS32_COMPILE),)
+CROSS32CC       := $(CC) -m32
+CROSS32AS       := $(AS) -a32
+CROSS32LD       := $(LD) -m elf32ppc
+CROSS32OBJCOPY  := $(OBJCOPY)
+endif
+endif
+
+export CROSS32CC CROSS32AS CROSS32LD CROSS32OBJCOPY
+
+new_nm := $(shell if $(NM) --help 2>&1 | grep -- '--synthetic' > /dev/null; then echo y; else echo n; fi)
+
+ifeq ($(new_nm),y)
+NM              := $(NM) --synthetic
+endif
+
+else
+OLDARCH := ppc
+SZ      := 32
+endif
+
+UTS_MACHINE := $(OLDARCH)
+
+ifeq ($(HAS_BIARCH),y)
+override AS     += -a$(SZ)
+override LD     += -m elf$(SZ)ppc
+override CC     += -m$(SZ)
+endif
+
+LDFLAGS_vmlinux := -Ttext $(KERNELLOAD) -Bstatic -e $(KERNELLOAD)
+
+# The -Iarch/$(ARCH)/include is temporary while we are merging
+CPPFLAGS        += -Iarch/$(ARCH) -Iarch/$(ARCH)/include
+AFLAGS          += -Iarch/$(ARCH)
+CFLAGS          += -Iarch/$(ARCH) -msoft-float -pipe
+CFLAGS-$(CONFIG_PPC64)  := -mminimal-toc -mtraceback=none  -mcall-aixdesc
+CFLAGS-$(CONFIG_PPC32)  := -ffixed-r2 -mmultiple
+CFLAGS          += $(CFLAGS-y)
+CPP             = $(CC) -E $(CFLAGS)
+# Temporary hack until we have migrated to asm-powerpc
+LINUXINCLUDE    += -Iarch/$(ARCH)/include
+
+CHECKFLAGS      += -m$(SZ) -D__powerpc__ -D__powerpc$(SZ)__
+
+ifeq ($(CONFIG_PPC64),y)
+GCC_VERSION     := $(call cc-version)
+GCC_BROKEN_VEC  := $(shell if [ $(GCC_VERSION) -lt 0400 ] ; then echo "y"; fi)
+
+ifeq ($(CONFIG_POWER4_ONLY),y)
+ifeq ($(CONFIG_ALTIVEC),y)
+ifeq ($(GCC_BROKEN_VEC),y)
+        CFLAGS += $(call cc-option,-mcpu=970)
+else
+        CFLAGS += $(call cc-option,-mcpu=power4)
+endif
+else
+        CFLAGS += $(call cc-option,-mcpu=power4)
+endif
+else
+        CFLAGS += $(call cc-option,-mtune=power4)
+endif
+endif
+
+# No AltiVec instruction when building kernel
+CFLAGS += $(call cc-option,-mno-altivec)
+
+# Enable unit-at-a-time mode when possible. It shrinks the
+# kernel considerably.
+CFLAGS += $(call cc-option,-funit-at-a-time)
+
+ifndef CONFIG_FSL_BOOKE
+CFLAGS          += -mstring
+endif
+
+cpu-as-$(CONFIG_PPC64BRIDGE)    += -Wa,-mppc64bridge
+cpu-as-$(CONFIG_4xx)            += -Wa,-m405
+cpu-as-$(CONFIG_6xx)            += -Wa,-maltivec
+cpu-as-$(CONFIG_POWER4)         += -Wa,-maltivec
+cpu-as-$(CONFIG_E500)           += -Wa,-me500
+cpu-as-$(CONFIG_E200)           += -Wa,-me200
+
+AFLAGS += $(cpu-as-y)
+CFLAGS += $(cpu-as-y)
+
+# Default to the common case.
+KBUILD_DEFCONFIG := common_defconfig
+
+head-y                          := arch/powerpc/kernel/head_32.o
+head-$(CONFIG_PPC64)            := arch/powerpc/kernel/head_64.o
+head-$(CONFIG_8xx)              := arch/powerpc/kernel/head_8xx.o
+head-$(CONFIG_4xx)              := arch/powerpc/kernel/head_4xx.o
+head-$(CONFIG_44x)              := arch/powerpc/kernel/head_44x.o
+head-$(CONFIG_FSL_BOOKE)        := arch/powerpc/kernel/head_fsl_booke.o
+
+head-$(CONFIG_PPC64)            += arch/powerpc/kernel/entry_64.o
+head-$(CONFIG_PPC_FPU)          += arch/powerpc/kernel/fpu.o
+
+core-y                          += arch/powerpc/kernel/ \
+                                   arch/$(OLDARCH)/kernel/ \
+                                   arch/powerpc/mm/ \
+                                   arch/powerpc/lib/ \
+                                   arch/powerpc/sysdev/ \
+                                   arch/powerpc/platforms/
+core-$(CONFIG_MATH_EMULATION)   += arch/ppc/math-emu/
+core-$(CONFIG_XMON)             += arch/powerpc/xmon/
+core-$(CONFIG_APUS)             += arch/ppc/amiga/
+drivers-$(CONFIG_8xx)           += arch/ppc/8xx_io/
+drivers-$(CONFIG_4xx)           += arch/ppc/4xx_io/
+drivers-$(CONFIG_CPM2)          += arch/ppc/8260_io/
+
+drivers-$(CONFIG_OPROFILE)      += arch/powerpc/oprofile/
+
+defaultimage-$(CONFIG_PPC32)    := uImage zImage
+defaultimage-$(CONFIG_PPC_ISERIES) := vmlinux
+defaultimage-$(CONFIG_PPC_PSERIES) := zImage
+KBUILD_IMAGE := $(defaultimage-y)
+all: $(KBUILD_IMAGE)
+
+CPPFLAGS_vmlinux.lds    := -Upowerpc
+
+# All the instructions talk about "make bzImage".
+bzImage: zImage
+
+BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
+
+.PHONY: $(BOOT_TARGETS)
+
+boot := arch/$(OLDARCH)/boot
+
+# urk
+ifeq ($(CONFIG_PPC64),y)
+$(BOOT_TARGETS): vmlinux
+        $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
+else
+$(BOOT_TARGETS): vmlinux
+        $(Q)$(MAKE) ARCH=ppc $(build)=$(boot) $@
+endif
+
+uImage: vmlinux
+        $(Q)$(MAKE) ARCH=$(OLDARCH) $(build)=$(boot)/images $(boot)/images/$@
+
+define archhelp
+  @echo '* zImage          - Compressed kernel image (arch/$(ARCH)/boot/images/zImage.*)'
+  @echo '  uImage          - Create a bootable image for U-Boot / PPCBoot'
+  @echo '  install         - Install kernel using'
+  @echo '                    (your) ~/bin/installkernel or'
+  @echo '                    (distribution) /sbin/installkernel or'
+  @echo '                    install to $$(INSTALL_PATH) and run lilo'
+  @echo '  *_defconfig     - Select default config from arch/$(ARCH)/ppc/configs'
+endef
+
+archclean:
+        $(Q)$(MAKE) $(clean)=$(boot)
+        # Temporary hack until we have migrated to asm-powerpc
+        $(Q)rm -rf arch/$(ARCH)/include
+
+archprepare: checkbin
+
+# Temporary hack until we have migrated to asm-powerpc
+include/asm: arch/$(ARCH)/include/asm
+arch/$(ARCH)/include/asm:
+        $(Q)if [ ! -d arch/$(ARCH)/include ]; then mkdir -p arch/$(ARCH)/include; fi
+        $(Q)ln -fsn $(srctree)/include/asm-$(OLDARCH) arch/$(ARCH)/include/asm
+
+# Use the file '.tmp_gas_check' for binutils tests, as gas won't output
+# to stdout and these checks are run even on install targets.
+TOUT    := .tmp_gas_check
+# Ensure this is binutils 2.12.1 (or 2.12.90.0.7) or later for altivec
+# instructions.
+# gcc-3.4 and binutils-2.14 are a fatal combination.
+GCC_VERSION     := $(call cc-version)
+
+checkbin:
+        @if test "$(GCC_VERSION)" = "0304" ; then \
+                if ! /bin/echo mftb 5 | $(AS) -v -mppc -many -o $(TOUT) >/dev/null 2>&1 ; then \
+                        echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build '; \
+                        echo 'correctly with gcc-3.4 and your version of binutils.'; \
+                        echo '*** Please upgrade your binutils or downgrade your gcc'; \
+                        false; \
+                fi ; \
+        fi
+        @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \
+                echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \
+                echo 'correctly with old versions of binutils.' ; \
+                echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
+                false ; \
+        fi
+
+CLEAN_FILES += $(TOUT)
+
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
new file mode 100644
index 000000000000..572d4f5eaacb
--- /dev/null
+++ b/arch/powerpc/kernel/Makefile
@@ -0,0 +1,56 @@
+#
+# Makefile for the linux kernel.
+#
+
+ifeq ($(CONFIG_PPC64),y)
+EXTRA_CFLAGS    += -mno-minimal-toc
+endif
+ifeq ($(CONFIG_PPC32),y)
+CFLAGS_prom_init.o      += -fPIC
+CFLAGS_btext.o          += -fPIC
+endif
+
+obj-y                           := semaphore.o cputable.o ptrace.o syscalls.o \
+                                   signal_32.o pmc.o
+obj-$(CONFIG_PPC64)             += setup_64.o binfmt_elf32.o sys_ppc32.o \
+                                   ptrace32.o systbl.o
+obj-$(CONFIG_ALTIVEC)           += vecemu.o vector.o
+obj-$(CONFIG_POWER4)            += idle_power4.o
+obj-$(CONFIG_PPC_OF)            += of_device.o
+obj-$(CONFIG_PPC_RTAS)          += rtas.o
+obj-$(CONFIG_IBMVIO)            += vio.o
+
+ifeq ($(CONFIG_PPC_MERGE),y)
+
+extra-$(CONFIG_PPC_STD_MMU)     := head_32.o
+extra-$(CONFIG_PPC64)           := head_64.o
+extra-$(CONFIG_40x)             := head_4xx.o
+extra-$(CONFIG_44x)             := head_44x.o
+extra-$(CONFIG_FSL_BOOKE)       := head_fsl_booke.o
+extra-$(CONFIG_8xx)             := head_8xx.o
+extra-y                         += vmlinux.lds
+
+obj-y                           += process.o init_task.o time.o \
+                                   prom.o traps.o setup-common.o
+obj-$(CONFIG_PPC32)             += entry_32.o setup_32.o misc_32.o systbl.o
+obj-$(CONFIG_PPC64)             += misc_64.o
+obj-$(CONFIG_PPC_OF)            += prom_init.o
+obj-$(CONFIG_MODULES)           += ppc_ksyms.o
+obj-$(CONFIG_BOOTX_TEXT)        += btext.o
+obj-$(CONFIG_6xx)               += idle_6xx.o
+
+ifeq ($(CONFIG_PPC_ISERIES),y)
+$(obj)/head_64.o: $(obj)/lparmap.s
+AFLAGS_head_64.o += -I$(obj)
+endif
+
+else
+# stuff used from here for ARCH=ppc or ARCH=ppc64
+obj-$(CONFIG_PPC64)             += traps.o process.o init_task.o time.o \
+                                   setup-common.o
+
+
+endif
+
+extra-$(CONFIG_PPC_FPU)         += fpu.o
+extra-$(CONFIG_PPC64)           += entry_64.o
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
new file mode 100644
index 000000000000..330cd783206f
--- /dev/null
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -0,0 +1,273 @@
+/*
+ * This program is used to generate definitions needed by
+ * assembly language modules.
+ *
+ * We use the technique used in the OSF Mach kernel code:
+ * generate asm statements containing #defines,
+ * compile this file to assembler, and then extract the
+ * #defines from the assembly-language output.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#ifdef CONFIG_PPC64
+#include <linux/time.h>
+#include <linux/hardirq.h>
+#else
+#include <linux/ptrace.h>
+#include <linux/suspend.h>
+#endif
+
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/rtas.h>
+#ifdef CONFIG_PPC64
+#include <asm/paca.h>
+#include <asm/lppaca.h>
+#include <asm/iSeries/HvLpEvent.h>
+#include <asm/cache.h>
+#include <asm/systemcfg.h>
+#include <asm/compat.h>
+#endif
+
+#define DEFINE(sym, val) \
+        asm volatile("\n->" #sym " %0 " #val : : "i" (val))
+
+#define BLANK() asm volatile("\n->" : : )
+
+int main(void)
+{
+        DEFINE(THREAD, offsetof(struct task_struct, thread));
+        DEFINE(MM, offsetof(struct task_struct, mm));
+#ifdef CONFIG_PPC64
+        DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
+#else
+        DEFINE(THREAD_INFO, offsetof(struct task_struct, thread_info));
+        DEFINE(PTRACE, offsetof(struct task_struct, ptrace));
+#endif /* CONFIG_PPC64 */
+
+        DEFINE(KSP, offsetof(struct thread_struct, ksp));
+        DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
+        DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
+        DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
+        DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
+#ifdef CONFIG_ALTIVEC
+        DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
+        DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
+        DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
+        DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
+#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_PPC64
+        DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
+#else /* CONFIG_PPC64 */
+        DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
+        DEFINE(LAST_SYSCALL, offsetof(struct thread_struct, last_syscall));
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+        DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
+        DEFINE(PT_PTRACED, PT_PTRACED);
+#endif
+#ifdef CONFIG_SPE
+        DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
+        DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
+        DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
+        DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
+#endif /* CONFIG_SPE */
+#endif /* CONFIG_PPC64 */
+
+        DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
+        DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
+        DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror));
+#ifdef CONFIG_PPC32
+        DEFINE(TI_TASK, offsetof(struct thread_info, task));
+        DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
+        DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
+#endif /* CONFIG_PPC32 */
+
+#ifdef CONFIG_PPC64
+        DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
+        DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
+        DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
+        DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
+        DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
+        DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
+        DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
+        DEFINE(PLATFORM_LPAR, PLATFORM_LPAR);
+
+        /* paca */
+        DEFINE(PACA_SIZE, sizeof(struct paca_struct));
+        DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
+        DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
+        DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
+        DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
+        DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
+        DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
+        DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
+        DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
+        DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
+        DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
+        DEFINE(PACAPROCENABLED, offsetof(struct paca_struct, proc_enabled));
+        DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
+        DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
+        DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
+#ifdef CONFIG_HUGETLB_PAGE
+        DEFINE(PACALOWHTLBAREAS, offsetof(struct paca_struct, context.low_htlb_areas));
+        DEFINE(PACAHIGHHTLBAREAS, offsetof(struct paca_struct, context.high_htlb_areas));
+#endif /* CONFIG_HUGETLB_PAGE */
+        DEFINE(PACADEFAULTDECR, offsetof(struct paca_struct, default_decr));
+        DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
+        DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
+        DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
+        DEFINE(PACA_EXDSI, offsetof(struct paca_struct, exdsi));
+        DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
+        DEFINE(PACALPPACA, offsetof(struct paca_struct, lppaca));
+        DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
+
+        DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
+        DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
+        DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
+        DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
+#endif /* CONFIG_PPC64 */
+
+        /* RTAS */
+        DEFINE(RTASBASE, offsetof(struct rtas_t, base));
+        DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
+
+        /* Interrupt register frame */
+        DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
+#ifndef CONFIG_PPC64
+        DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
+#else /* CONFIG_PPC64 */
+        DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
+        /* 288 = # of volatile regs, int & fp, for leaf routines */
+        /* which do not stack a frame.  See the PPC64 ABI.       */
+        DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 288);
+        /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
+        DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
+        DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
+#endif /* CONFIG_PPC64 */
+        DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
+        DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
+        DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
+        DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
+        DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
+        DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
+        DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
+        DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
+        DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
+        DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
+        DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
+        DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
+        DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
+        DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
+#ifndef CONFIG_PPC64
+        DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
+        DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
+        DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
+        DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
+        DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
+        DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
+        DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
+        DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
+        DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
+        DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
+        DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
+        DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
+        DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
+        DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
+        DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
+        DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
+        DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
+        DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
+#endif /* CONFIG_PPC64 */
+        /*
+         * Note: these symbols include _ because they overlap with special
+         * register names
+         */
+        DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
+        DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
+        DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
+        DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
+        DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
+        DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
+        DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
+        DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
+        DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
+        DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
+        DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
+#ifndef CONFIG_PPC64
+        DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
+        /*
+         * The PowerPC 400-class & Book-E processors have neither the DAR
+         * nor the DSISR SPRs. Hence, we overload them to hold the similar
+         * DEAR and ESR SPRs for such processors.  For critical interrupts
+         * we use them to hold SRR0 and SRR1.
+         */
+        DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
+        DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
+#else /* CONFIG_PPC64 */
+        DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
+
+        /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
+        DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
+        DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
+#endif /* CONFIG_PPC64 */
+
+        DEFINE(CLONE_VM, CLONE_VM);
+        DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
+
+#ifndef CONFIG_PPC64
+        DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
+#endif /* ! CONFIG_PPC64 */
+
+        /* About the CPU features table */
+        DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec));
+        DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask));
+        DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value));
+        DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
+        DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
+
+#ifndef CONFIG_PPC64
+        DEFINE(pbe_address, offsetof(struct pbe, address));
+        DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
+        DEFINE(pbe_next, offsetof(struct pbe, next));
+
+        DEFINE(TASK_SIZE, TASK_SIZE);
+        DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
+#else /* CONFIG_PPC64 */
+        /* systemcfg offsets for use by vdso */
+        DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct systemcfg, tb_orig_stamp));
+        DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct systemcfg, tb_ticks_per_sec));
+        DEFINE(CFG_TB_TO_XS, offsetof(struct systemcfg, tb_to_xs));
+        DEFINE(CFG_STAMP_XSEC, offsetof(struct systemcfg, stamp_xsec));
+        DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct systemcfg, tb_update_count));
+        DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct systemcfg, tz_minuteswest));
+        DEFINE(CFG_TZ_DSTTIME, offsetof(struct systemcfg, tz_dsttime));
+        DEFINE(CFG_SYSCALL_MAP32, offsetof(struct systemcfg, syscall_map_32));
+        DEFINE(CFG_SYSCALL_MAP64, offsetof(struct systemcfg, syscall_map_64));
+
+        /* timeval/timezone offsets for use by vdso */
+        DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
+        DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
+        DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
+        DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
+        DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
+        DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
+#endif /* CONFIG_PPC64 */
+        return 0;
+}
diff --git a/arch/ppc64/kernel/binfmt_elf32.c b/arch/powerpc/kernel/binfmt_elf32.c
index fadc699a0497..8ad6b0f33651 100644
--- a/arch/ppc64/kernel/binfmt_elf32.c
+++ b/arch/powerpc/kernel/binfmt_elf32.c
@@ -70,9 +70,6 @@ cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
         value->tv_sec = jiffies / HZ;
 }
 
-extern void start_thread32(struct pt_regs *, unsigned long, unsigned long);
-#undef start_thread
-#define start_thread start_thread32
 #define init_elf_binfmt init_elf32_binfmt
 
 #include "../../../fs/binfmt_elf.c"
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
new file mode 100644
index 000000000000..bdfba92b2b38
--- /dev/null
+++ b/arch/powerpc/kernel/btext.c
@@ -0,0 +1,853 @@
+/*
+ * Procedures for drawing on the screen early on in the boot process.
+ *
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/module.h>
+
+#include <asm/sections.h>
+#include <asm/prom.h>
+#include <asm/btext.h>
+#include <asm/prom.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/io.h>
+#include <asm/lmb.h>
+#include <asm/processor.h>
+
+#define NO_SCROLL
+
+#ifndef NO_SCROLL
+static void scrollscreen(void);
+#endif
+
+static void draw_byte(unsigned char c, long locX, long locY);
+static void draw_byte_32(unsigned char *bits, unsigned int *base, int rb);
+static void draw_byte_16(unsigned char *bits, unsigned int *base, int rb);
+static void draw_byte_8(unsigned char *bits, unsigned int *base, int rb);
+
+static int g_loc_X;
+static int g_loc_Y;
+static int g_max_loc_X;
+static int g_max_loc_Y;
+
+static int dispDeviceRowBytes;
+static int dispDeviceDepth;
+static int dispDeviceRect[4];
+static unsigned char *dispDeviceBase, *logicalDisplayBase;
+
+unsigned long disp_BAT[2] __initdata = {0, 0};
+
+#define cmapsz  (16*256)
+
+static unsigned char vga_font[cmapsz];
+
+int boot_text_mapped;
+int force_printk_to_btext = 0;
+
+#ifdef CONFIG_PPC32
+/* Calc BAT values for mapping the display and store them
+ * in disp_BAT.  Those values are then used from head.S to map
+ * the display during identify_machine() and MMU_Init()
+ *
+ * The display is mapped to virtual address 0xD0000000, rather
+ * than 1:1, because some some CHRP machines put the frame buffer
+ * in the region starting at 0xC0000000 (KERNELBASE).
+ * This mapping is temporary and will disappear as soon as the
+ * setup done by MMU_Init() is applied.
+ *
+ * For now, we align the BAT and then map 8Mb on 601 and 16Mb
+ * on other PPCs. This may cause trouble if the framebuffer
+ * is really badly aligned, but I didn't encounter this case
+ * yet.
+ */
+void __init
+btext_prepare_BAT(void)
+{
+        unsigned long vaddr = KERNELBASE + 0x10000000;
+        unsigned long addr;
+        unsigned long lowbits;
+
+        addr = (unsigned long)dispDeviceBase;
+        if (!addr) {
+                boot_text_mapped = 0;
+                return;
+        }
+        if (PVR_VER(mfspr(SPRN_PVR)) != 1) {
+                /* 603, 604, G3, G4, ... */
+                lowbits = addr & ~0xFF000000UL;
+                addr &= 0xFF000000UL;
+                disp_BAT[0] = vaddr | (BL_16M<<2) | 2;
+                disp_BAT[1] = addr | (_PAGE_NO_CACHE | _PAGE_GUARDED | BPP_RW); 
+        } else {
+                /* 601 */
+                lowbits = addr & ~0xFF800000UL;
+                addr &= 0xFF800000UL;
+                disp_BAT[0] = vaddr | (_PAGE_NO_CACHE | PP_RWXX) | 4;
+                disp_BAT[1] = addr | BL_8M | 0x40;
+        }
+        logicalDisplayBase = (void *) (vaddr + lowbits);
+}
+#endif
+
+/* This function will enable the early boot text when doing OF booting. This
+ * way, xmon output should work too
+ */
+void __init
+btext_setup_display(int width, int height, int depth, int pitch,
+                    unsigned long address)
+{
+        g_loc_X = 0;
+        g_loc_Y = 0;
+        g_max_loc_X = width / 8;
+        g_max_loc_Y = height / 16;
+        logicalDisplayBase = (unsigned char *)address;
+        dispDeviceBase = (unsigned char *)address;
+        dispDeviceRowBytes = pitch;
+        dispDeviceDepth = depth;
+        dispDeviceRect[0] = dispDeviceRect[1] = 0;
+        dispDeviceRect[2] = width;
+        dispDeviceRect[3] = height;
+        boot_text_mapped = 1;
+}
+
+/* Here's a small text engine to use during early boot
+ * or for debugging purposes
+ *
+ * todo:
+ *
+ *  - build some kind of vgacon with it to enable early printk
+ *  - move to a separate file
+ *  - add a few video driver hooks to keep in sync with display
+ *    changes.
+ */
+
+void map_boot_text(void)
+{
+        unsigned long base, offset, size;
+        unsigned char *vbase;
+
+        /* By default, we are no longer mapped */
+        boot_text_mapped = 0;
+        if (dispDeviceBase == 0)
+                return;
+        base = ((unsigned long) dispDeviceBase) & 0xFFFFF000UL;
+        offset = ((unsigned long) dispDeviceBase) - base;
+        size = dispDeviceRowBytes * dispDeviceRect[3] + offset
+                + dispDeviceRect[0];
+        vbase = __ioremap(base, size, _PAGE_NO_CACHE);
+        if (vbase == 0)
+                return;
+        logicalDisplayBase = vbase + offset;
+        boot_text_mapped = 1;
+}
+
+int btext_initialize(struct device_node *np)
+{
+        unsigned int width, height, depth, pitch;
+        unsigned long address = 0;
+        u32 *prop;
+
+        prop = (u32 *)get_property(np, "width", NULL);
+        if (prop == NULL)
+                return -EINVAL;
+        width = *prop;
+        prop = (u32 *)get_property(np, "height", NULL);
+        if (prop == NULL)
+                return -EINVAL;
+        height = *prop;
+        prop = (u32 *)get_property(np, "depth", NULL);
+        if (prop == NULL)
+                return -EINVAL;
+        depth = *prop;
+        pitch = width * ((depth + 7) / 8);
+        prop = (u32 *)get_property(np, "linebytes", NULL);
+        if (prop)
+                pitch = *prop;
+        if (pitch == 1)
+                pitch = 0x1000;
+        prop = (u32 *)get_property(np, "address", NULL);
+        if (prop)
+                address = *prop;
+
+        /* FIXME: Add support for PCI reg properties */
+
+        if (address == 0)
+                return -EINVAL;
+
+        g_loc_X = 0;
+        g_loc_Y = 0;
+        g_max_loc_X = width / 8;
+        g_max_loc_Y = height / 16;
+        logicalDisplayBase = (unsigned char *)address;
+        dispDeviceBase = (unsigned char *)address;
+        dispDeviceRowBytes = pitch;
+        dispDeviceDepth = depth;
+        dispDeviceRect[0] = dispDeviceRect[1] = 0;
+        dispDeviceRect[2] = width;
+        dispDeviceRect[3] = height;
+
+        map_boot_text();
+
+        return 0;
+}
+
+void __init init_boot_display(void)
+{
+        char *name;
+        struct device_node *np = NULL; 
+        int rc = -ENODEV;
+
+        printk("trying to initialize btext ...\n");
+
+        name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
+        if (name != NULL) {
+                np = of_find_node_by_path(name);
+                if (np != NULL) {
+                        if (strcmp(np->type, "display") != 0) {
+                                printk("boot stdout isn't a display !\n");
+                                of_node_put(np);
+                                np = NULL;
+                        }
+                }
+        }
+        if (np)
+                rc = btext_initialize(np);
+        if (rc == 0)
+                return;
+
+        for (np = NULL; (np = of_find_node_by_type(np, "display"));) {
+                if (get_property(np, "linux,opened", NULL)) {
+                        printk("trying %s ...\n", np->full_name);
+                        rc = btext_initialize(np);
+                        printk("result: %d\n", rc);
+                }
+                if (rc == 0)
+                        return;
+        }
+}
+
+/* Calc the base address of a given point (x,y) */
+static unsigned char * calc_base(int x, int y)
+{
+        unsigned char *base;
+
+        base = logicalDisplayBase;
+        if (base == 0)
+                base = dispDeviceBase;
+        base += (x + dispDeviceRect[0]) * (dispDeviceDepth >> 3);
+        base += (y + dispDeviceRect[1]) * dispDeviceRowBytes;
+        return base;
+}
+
+/* Adjust the display to a new resolution */
+void btext_update_display(unsigned long phys, int width, int height,
+                          int depth, int pitch)
+{
+        if (dispDeviceBase == 0)
+                return;
+
+        /* check it's the same frame buffer (within 256MB) */
+        if ((phys ^ (unsigned long)dispDeviceBase) & 0xf0000000)
+                return;
+
+        dispDeviceBase = (__u8 *) phys;
+        dispDeviceRect[0] = 0;
+        dispDeviceRect[1] = 0;
+        dispDeviceRect[2] = width;
+        dispDeviceRect[3] = height;
+        dispDeviceDepth = depth;
+        dispDeviceRowBytes = pitch;
+        if (boot_text_mapped) {
+                iounmap(logicalDisplayBase);
+                boot_text_mapped = 0;
+        }
+        map_boot_text();
+        g_loc_X = 0;
+        g_loc_Y = 0;
+        g_max_loc_X = width / 8;
+        g_max_loc_Y = height / 16;
+}
+EXPORT_SYMBOL(btext_update_display);
+
+void btext_clearscreen(void)
+{
+        unsigned long *base     = (unsigned long *)calc_base(0, 0);
+        unsigned long width     = ((dispDeviceRect[2] - dispDeviceRect[0]) *
+                                        (dispDeviceDepth >> 3)) >> 3;
+        int i,j;
+
+        for (i=0; i<(dispDeviceRect[3] - dispDeviceRect[1]); i++)
+        {
+                unsigned long *ptr = base;
+                for(j=width; j; --j)
+                        *(ptr++) = 0;
+                base += (dispDeviceRowBytes >> 3);
+        }
+}
+
+#ifndef NO_SCROLL
+static void scrollscreen(void)
+{
+        unsigned long *src      = (unsigned long *)calc_base(0,16);
+        unsigned long *dst      = (unsigned long *)calc_base(0,0);
+        unsigned long width     = ((dispDeviceRect[2] - dispDeviceRect[0]) *
+                                   (dispDeviceDepth >> 3)) >> 3;
+        int i,j;
+
+        for (i=0; i<(dispDeviceRect[3] - dispDeviceRect[1] - 16); i++)
+        {
+                unsigned long *src_ptr = src;
+                unsigned long *dst_ptr = dst;
+                for(j=width; j; --j)
+                        *(dst_ptr++) = *(src_ptr++);
+                src += (dispDeviceRowBytes >> 3);
+                dst += (dispDeviceRowBytes >> 3);
+        }
+        for (i=0; i<16; i++)
+        {
+                unsigned long *dst_ptr = dst;
+                for(j=width; j; --j)
+                        *(dst_ptr++) = 0;
+                dst += (dispDeviceRowBytes >> 3);
+        }
+}
+#endif /* ndef NO_SCROLL */
+
+void btext_drawchar(char c)
+{
+        int cline = 0;
+#ifdef NO_SCROLL
+        int x;
+#endif
+        if (!boot_text_mapped)
+                return;
+
+        switch (c) {
+        case '\b':
+                if (g_loc_X > 0)
+                        --g_loc_X;
+                break;
+        case '\t':
+                g_loc_X = (g_loc_X & -8) + 8;
+                break;
+        case '\r':
+                g_loc_X = 0;
+                break;
+        case '\n':
+                g_loc_X = 0;
+                g_loc_Y++;
+                cline = 1;
+                break;
+        default:
+                draw_byte(c, g_loc_X++, g_loc_Y);
+        }
+        if (g_loc_X >= g_max_loc_X) {
+                g_loc_X = 0;
+                g_loc_Y++;
+                cline = 1;
+        }
+#ifndef NO_SCROLL
+        while (g_loc_Y >= g_max_loc_Y) {
+                scrollscreen();
+                g_loc_Y--;
+        }
+#else
+        /* wrap around from bottom to top of screen so we don't
+           waste time scrolling each line.  -- paulus. */
+        if (g_loc_Y >= g_max_loc_Y)
+                g_loc_Y = 0;
+        if (cline) {
+                for (x = 0; x < g_max_loc_X; ++x)
+                        draw_byte(' ', x, g_loc_Y);
+        }
+#endif
+}
+
+void btext_drawstring(const char *c)
+{
+        if (!boot_text_mapped)
+                return;
+        while (*c)
+                btext_drawchar(*c++);
+}
+
+void btext_drawhex(unsigned long v)
+{
+        char *hex_table = "0123456789abcdef";
+
+        if (!boot_text_mapped)
+                return;
+#ifdef CONFIG_PPC64
+        btext_drawchar(hex_table[(v >> 60) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 56) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 52) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 48) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 44) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 40) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 36) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 32) & 0x0000000FUL]);
+#endif
+        btext_drawchar(hex_table[(v >> 28) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 24) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 20) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 16) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >> 12) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >>  8) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >>  4) & 0x0000000FUL]);
+        btext_drawchar(hex_table[(v >>  0) & 0x0000000FUL]);
+        btext_drawchar(' ');
+}
+
+static void draw_byte(unsigned char c, long locX, long locY)
+{
+        unsigned char *base     = calc_base(locX << 3, locY << 4);
+        unsigned char *font     = &vga_font[((unsigned int)c) * 16];
+        int rb                  = dispDeviceRowBytes;
+
+        switch(dispDeviceDepth) {
+        case 24:
+        case 32:
+                draw_byte_32(font, (unsigned int *)base, rb);
+                break;
+        case 15:
+        case 16:
+                draw_byte_16(font, (unsigned int *)base, rb);
+                break;
+        case 8:
+                draw_byte_8(font, (unsigned int *)base, rb);
+                break;
+        }
+}
+
+static unsigned int expand_bits_8[16] = {
+        0x00000000,
+        0x000000ff,
+        0x0000ff00,
+        0x0000ffff,
+        0x00ff0000,
+        0x00ff00ff,
+        0x00ffff00,
+        0x00ffffff,
+        0xff000000,
+        0xff0000ff,
+        0xff00ff00,
+        0xff00ffff,
+        0xffff0000,
+        0xffff00ff,
+        0xffffff00,
+        0xffffffff
+};
+
+static unsigned int expand_bits_16[4] = {
+        0x00000000,
+        0x0000ffff,
+        0xffff0000,
+        0xffffffff
+};
+
+
+static void draw_byte_32(unsigned char *font, unsigned int *base, int rb)
+{
+        int l, bits;
+        int fg = 0xFFFFFFFFUL;
+        int bg = 0x00000000UL;
+
+        for (l = 0; l < 16; ++l)
+        {
+                bits = *font++;
+                base[0] = (-(bits >> 7) & fg) ^ bg;
+                base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
+                base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
+                base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
+                base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
+                base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
+                base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
+                base[7] = (-(bits & 1) & fg) ^ bg;
+                base = (unsigned int *) ((char *)base + rb);
+        }
+}
+
+static void draw_byte_16(unsigned char *font, unsigned int *base, int rb)
+{
+        int l, bits;
+        int fg = 0xFFFFFFFFUL;
+        int bg = 0x00000000UL;
+        unsigned int *eb = (int *)expand_bits_16;
+
+        for (l = 0; l < 16; ++l)
+        {
+                bits = *font++;
+                base[0] = (eb[bits >> 6] & fg) ^ bg;
+                base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
+                base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
+                base[3] = (eb[bits & 3] & fg) ^ bg;
+                base = (unsigned int *) ((char *)base + rb);
+        }
+}
+
+static void draw_byte_8(unsigned char *font, unsigned int *base, int rb)
+{
+        int l, bits;
+        int fg = 0x0F0F0F0FUL;
+        int bg = 0x00000000UL;
+        unsigned int *eb = (int *)expand_bits_8;
+
+        for (l = 0; l < 16; ++l)
+        {
+                bits = *font++;
+                base[0] = (eb[bits >> 4] & fg) ^ bg;
+                base[1] = (eb[bits & 0xf] & fg) ^ bg;
+                base = (unsigned int *) ((char *)base + rb);
+        }
+}
+
+static unsigned char vga_font[cmapsz] = {
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd,
+0x99, 0x81, 0x81, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xff,
+0xdb, 0xff, 0xff, 0xc3, 0xe7, 0xff, 0xff, 0x7e, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x6c, 0xfe, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7c, 0xfe,
+0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
+0x3c, 0x3c, 0xe7, 0xe7, 0xe7, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x18, 0x3c, 0x7e, 0xff, 0xff, 0x7e, 0x18, 0x18, 0x3c,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c,
+0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc3, 0x99, 0xbd,
+0xbd, 0x99, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x1e, 0x0e,
+0x1a, 0x32, 0x78, 0xcc, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x33, 0x3f, 0x30, 0x30, 0x30,
+0x30, 0x70, 0xf0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x63,
+0x7f, 0x63, 0x63, 0x63, 0x63, 0x67, 0xe7, 0xe6, 0xc0, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x18, 0x18, 0xdb, 0x3c, 0xe7, 0x3c, 0xdb, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfe, 0xf8,
+0xf0, 0xe0, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x0e,
+0x1e, 0x3e, 0xfe, 0x3e, 0x1e, 0x0e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66,
+0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0xdb,
+0xdb, 0xdb, 0x7b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x7c, 0xc6, 0x60, 0x38, 0x6c, 0xc6, 0xc6, 0x6c, 0x38, 0x0c, 0xc6,
+0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xfe, 0xfe, 0xfe, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c,
+0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x18, 0x0c, 0xfe, 0x0c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xfe, 0x60, 0x30, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0,
+0xc0, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x24, 0x66, 0xff, 0x66, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7c, 0x7c, 0xfe, 0xfe, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xfe, 0x7c, 0x7c,
+0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6c,
+0x6c, 0xfe, 0x6c, 0x6c, 0x6c, 0xfe, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00,
+0x18, 0x18, 0x7c, 0xc6, 0xc2, 0xc0, 0x7c, 0x06, 0x06, 0x86, 0xc6, 0x7c,
+0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0xc6, 0x0c, 0x18,
+0x30, 0x60, 0xc6, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6c,
+0x6c, 0x38, 0x76, 0xdc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x30, 0x30, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x30,
+0x30, 0x30, 0x18, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x18,
+0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x3c, 0xff, 0x3c, 0x66, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e,
+0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x02, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xce, 0xde, 0xf6, 0xe6, 0xc6, 0xc6, 0x7c,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x38, 0x78, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6,
+0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0, 0xc6, 0xfe, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x7c, 0xc6, 0x06, 0x06, 0x3c, 0x06, 0x06, 0x06, 0xc6, 0x7c,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x1c, 0x3c, 0x6c, 0xcc, 0xfe,
+0x0c, 0x0c, 0x0c, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc0,
+0xc0, 0xc0, 0xfc, 0x06, 0x06, 0x06, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x38, 0x60, 0xc0, 0xc0, 0xfc, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc6, 0x06, 0x06, 0x0c, 0x18,
+0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6,
+0xc6, 0xc6, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x06, 0x06, 0x0c, 0x78,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
+0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x06,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00,
+0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60,
+0x30, 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x7c, 0xc6, 0xc6, 0x0c, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xde, 0xde,
+0xde, 0xdc, 0xc0, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38,
+0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x66, 0x66, 0x66, 0x66, 0xfc,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xc0,
+0xc0, 0xc2, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x6c,
+0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x6c, 0xf8, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xfe, 0x66, 0x62, 0x68, 0x78, 0x68, 0x60, 0x62, 0x66, 0xfe,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x66, 0x62, 0x68, 0x78, 0x68,
+0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66,
+0xc2, 0xc0, 0xc0, 0xde, 0xc6, 0xc6, 0x66, 0x3a, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x0c,
+0x0c, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xe6, 0x66, 0x66, 0x6c, 0x78, 0x78, 0x6c, 0x66, 0x66, 0xe6,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x60, 0x60, 0x60, 0x60, 0x60,
+0x60, 0x62, 0x66, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc3, 0xe7,
+0xff, 0xff, 0xdb, 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0xc6, 0xe6, 0xf6, 0xfe, 0xde, 0xce, 0xc6, 0xc6, 0xc6, 0xc6,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
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+0x18, 0x18, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37,
+0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+0x36, 0x37, 0x30, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
+0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xf7, 0x00, 0xff,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0xff, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
+0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36,
+0x36, 0xf7, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0xff, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x36, 0x36, 0x36, 0x36,
+0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x3f,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x1f, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
+0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+0x36, 0x36, 0x36, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0xf0, 0xf0, 0xf0,
+0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
+0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
+0x0f, 0x0f, 0x0f, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x76, 0xdc, 0xd8, 0xd8, 0xd8, 0xdc, 0x76, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x78, 0xcc, 0xcc, 0xcc, 0xd8, 0xcc, 0xc6, 0xc6, 0xc6, 0xcc,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc6, 0xc6, 0xc0, 0xc0, 0xc0,
+0xc0, 0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xfe, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0xfe, 0xc6, 0x60, 0x30, 0x18, 0x30, 0x60, 0xc6, 0xfe,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xd8, 0xd8,
+0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x66, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xc0, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x18, 0x3c, 0x66, 0x66,
+0x66, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
+0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0x6c, 0x6c, 0x6c, 0x6c, 0xee,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x30, 0x18, 0x0c, 0x3e, 0x66,
+0x66, 0x66, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x7e, 0xdb, 0xdb, 0xdb, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x03, 0x06, 0x7e, 0xdb, 0xdb, 0xf3, 0x7e, 0x60, 0xc0,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x30, 0x60, 0x60, 0x7c, 0x60,
+0x60, 0x60, 0x30, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c,
+0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18,
+0x18, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
+0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x00, 0x7e,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, 0x1b, 0x1b, 0x1b, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18, 0x18, 0x18, 0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7e, 0x00, 0x18, 0x18, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x00,
+0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6c, 0x6c,
+0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0c, 0x0c,
+0x0c, 0x0c, 0x0c, 0xec, 0x6c, 0x6c, 0x3c, 0x1c, 0x00, 0x00, 0x00, 0x00,
+0x00, 0xd8, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xd8, 0x30, 0x60, 0xc8, 0xf8, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00,
+};
diff --git a/arch/ppc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 6b76cf58d9e0..b91345fa0805 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1,8 +1,9 @@
 /*
- *  arch/ppc/kernel/cputable.c
- *
  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  *
+ *  Modifications for ppc64:
+ *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
+ *
  *  This program is free software; you can redistribute it and/or
  *  modify it under the terms of the GNU General Public License
  *  as published by the Free Software Foundation; either version
@@ -14,96 +15,302 @@
 #include <linux/sched.h>
 #include <linux/threads.h>
 #include <linux/init.h>
-#include <asm/cputable.h>
+#include <linux/module.h>
 
-struct cpu_spec* cur_cpu_spec[NR_CPUS];
+#include <asm/oprofile_impl.h>
+#include <asm/cputable.h>
 
-extern void __setup_cpu_601(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_603(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_604(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_750(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_750cx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_ppc970(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
+struct cpu_spec* cur_cpu_spec = NULL;
+EXPORT_SYMBOL(cur_cpu_spec);
 
-#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
-                     !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
-                     !defined(CONFIG_BOOKE))
+/* NOTE:
+ * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
+ * the responsibility of the appropriate CPU save/restore functions to
+ * eventually copy these settings over. Those save/restore aren't yet
+ * part of the cputable though. That has to be fixed for both ppc32
+ * and ppc64
+ */
+#ifdef CONFIG_PPC64
+extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
+#else
+extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
+#endif /* CONFIG_PPC32 */
+extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
 
 /* This table only contains "desktop" CPUs, it need to be filled with embedded
  * ones as well...
  */
-#define COMMON_PPC      (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
-                         PPC_FEATURE_HAS_MMU)
+#define COMMON_USER             (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
+                                 PPC_FEATURE_HAS_MMU)
+#define COMMON_USER_PPC64       (COMMON_USER | PPC_FEATURE_64)
 
-/* We only set the altivec features if the kernel was compiled with altivec
- * support
- */
-#ifdef CONFIG_ALTIVEC
-#define CPU_FTR_ALTIVEC_COMP            CPU_FTR_ALTIVEC
-#define PPC_FEATURE_ALTIVEC_COMP        PPC_FEATURE_HAS_ALTIVEC
-#else
-#define CPU_FTR_ALTIVEC_COMP            0
-#define PPC_FEATURE_ALTIVEC_COMP        0
-#endif
 
 /* We only set the spe features if the kernel was compiled with
  * spe support
  */
 #ifdef CONFIG_SPE
-#define PPC_FEATURE_SPE_COMP            PPC_FEATURE_HAS_SPE
+#define PPC_FEATURE_SPE_COMP    PPC_FEATURE_HAS_SPE
 #else
-#define PPC_FEATURE_SPE_COMP            0
+#define PPC_FEATURE_SPE_COMP    0
 #endif
 
-/* We need to mark all pages as being coherent if we're SMP or we
- * have a 74[45]x and an MPC107 host bridge.
- */
-#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
-#define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT
-#else
-#define CPU_FTR_COMMON                  0
+struct cpu_spec cpu_specs[] = {
+#ifdef CONFIG_PPC64
+        {       /* Power3 */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00400000,
+                .cpu_name               = "POWER3 (630)",
+                .cpu_features           = CPU_FTRS_POWER3,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/power3",
+                .oprofile_model         = &op_model_rs64,
 #endif
-
-/* The powersave features NAP & DOZE seems to confuse BDI when
-   debugging. So if a BDI is used, disable theses
- */
-#ifndef CONFIG_BDI_SWITCH
-#define CPU_FTR_MAYBE_CAN_DOZE  CPU_FTR_CAN_DOZE
-#define CPU_FTR_MAYBE_CAN_NAP   CPU_FTR_CAN_NAP
+        },
+        {       /* Power3+ */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00410000,
+                .cpu_name               = "POWER3 (630+)",
+                .cpu_features           = CPU_FTRS_POWER3,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/power3",
+                .oprofile_model         = &op_model_rs64,
+#endif
+        },
+        {       /* Northstar */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00330000,
+                .cpu_name               = "RS64-II (northstar)",
+                .cpu_features           = CPU_FTRS_RS64,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/rs64",
+                .oprofile_model         = &op_model_rs64,
+#endif
+        },
+        {       /* Pulsar */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00340000,
+                .cpu_name               = "RS64-III (pulsar)",
+                .cpu_features           = CPU_FTRS_RS64,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/rs64",
+                .oprofile_model         = &op_model_rs64,
+#endif
+        },
+        {       /* I-star */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00360000,
+                .cpu_name               = "RS64-III (icestar)",
+                .cpu_features           = CPU_FTRS_RS64,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/rs64",
+                .oprofile_model         = &op_model_rs64,
+#endif
+        },
+        {       /* S-star */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00370000,
+                .cpu_name               = "RS64-IV (sstar)",
+                .cpu_features           = CPU_FTRS_RS64,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/rs64",
+                .oprofile_model         = &op_model_rs64,
+#endif
+        },
+        {       /* Power4 */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00350000,
+                .cpu_name               = "POWER4 (gp)",
+                .cpu_features           = CPU_FTRS_POWER4,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/power4",
+                .oprofile_model         = &op_model_rs64,
+#endif
+        },
+        {       /* Power4+ */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00380000,
+                .cpu_name               = "POWER4+ (gq)",
+                .cpu_features           = CPU_FTRS_POWER4,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/power4",
+                .oprofile_model         = &op_model_power4,
+#endif
+        },
+        {       /* PPC970 */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00390000,
+                .cpu_name               = "PPC970",
+                .cpu_features           = CPU_FTRS_PPC970,
+                .cpu_user_features      = COMMON_USER_PPC64 |
+                        PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_ppc970,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/970",
+                .oprofile_model         = &op_model_power4,
+#endif
+        },
+#endif /* CONFIG_PPC64 */
+#if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
+        {       /* PPC970FX */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x003c0000,
+                .cpu_name               = "PPC970FX",
+#ifdef CONFIG_PPC32
+                .cpu_features           = CPU_FTRS_970_32,
 #else
-#define CPU_FTR_MAYBE_CAN_DOZE  0
-#define CPU_FTR_MAYBE_CAN_NAP   0
+                .cpu_features           = CPU_FTRS_PPC970,
 #endif
-
-struct cpu_spec cpu_specs[] = {
+                .cpu_user_features      = COMMON_USER_PPC64 |
+                        PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 8,
+                .cpu_setup              = __setup_cpu_ppc970,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/970",
+                .oprofile_model         = &op_model_power4,
+#endif
+        },
+#endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
+#ifdef CONFIG_PPC64
+        {       /* PPC970MP */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00440000,
+                .cpu_name               = "PPC970MP",
+                .cpu_features           = CPU_FTRS_PPC970,
+                .cpu_user_features      = COMMON_USER_PPC64 |
+                        PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .cpu_setup              = __setup_cpu_ppc970,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/970",
+                .oprofile_model         = &op_model_power4,
+#endif
+        },
+        {       /* Power5 */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x003a0000,
+                .cpu_name               = "POWER5 (gr)",
+                .cpu_features           = CPU_FTRS_POWER5,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .cpu_setup              = __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/power5",
+                .oprofile_model         = &op_model_power4,
+#endif
+        },
+        {       /* Power5 */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x003b0000,
+                .cpu_name               = "POWER5 (gs)",
+                .cpu_features           = CPU_FTRS_POWER5,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .cpu_setup              = __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+                .oprofile_cpu_type      = "ppc64/power5",
+                .oprofile_model         = &op_model_power4,
+#endif
+        },
+        {       /* BE DD1.x */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00700000,
+                .cpu_name               = "Cell Broadband Engine",
+                .cpu_features           = CPU_FTRS_CELL,
+                .cpu_user_features      = COMMON_USER_PPC64 |
+                        PPC_FEATURE_HAS_ALTIVEC_COMP,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .cpu_setup              = __setup_cpu_be,
+        },
+        {       /* default match */
+                .pvr_mask               = 0x00000000,
+                .pvr_value              = 0x00000000,
+                .cpu_name               = "POWER4 (compatible)",
+                .cpu_features           = CPU_FTRS_COMPATIBLE,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .cpu_setup              = __setup_cpu_power4,
+        }
+#endif  /* CONFIG_PPC64 */
+#ifdef CONFIG_PPC32
 #if CLASSIC_PPC
-        {       /* 601 */
+        {       /* 601 */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00010000,
                 .cpu_name               = "601",
-                .cpu_features           = CPU_FTR_COMMON | CPU_FTR_601 |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_601_INSTR |
+                .cpu_features           = CPU_FTRS_PPC601,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_601_INSTR |
                         PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
-                .cpu_setup              = __setup_cpu_601
         },
         {       /* 603 */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00030000,
                 .cpu_name               = "603",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_603,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603
@@ -112,10 +319,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00060000,
                 .cpu_name               = "603e",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_603,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603
@@ -124,10 +329,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00070000,
                 .cpu_name               = "603ev",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_603,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603
@@ -136,10 +339,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00040000,
                 .cpu_name               = "604",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_604,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 2,
@@ -149,10 +350,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xfffff000,
                 .pvr_value              = 0x00090000,
                 .cpu_name               = "604e",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_604,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -162,10 +361,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00090000,
                 .cpu_name               = "604r",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_604,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -175,10 +372,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x000a0000,
                 .cpu_name               = "604ev",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_604,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -188,11 +383,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x00084202,
                 .cpu_name               = "740/750",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_740_NOTAU,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -202,11 +394,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xfffffff0,
                 .pvr_value              = 0x00080100,
                 .cpu_name               = "750CX",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -216,11 +405,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xfffffff0,
                 .pvr_value              = 0x00082200,
                 .cpu_name               = "750CX",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -230,11 +416,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xfffffff0,
                 .pvr_value              = 0x00082210,
                 .cpu_name               = "750CXe",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -244,11 +427,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x00083214,
                 .cpu_name               = "750CXe",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -258,11 +438,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xfffff000,
                 .pvr_value              = 0x00083000,
                 .cpu_name               = "745/755",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -272,12 +449,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffff00,
                 .pvr_value              = 0x70000100,
                 .cpu_name               = "750FX",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
-                        CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750FX1,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -287,12 +460,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x70000200,
                 .cpu_name               = "750FX",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
-                        CPU_FTR_NO_DPM,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750FX2,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -302,12 +471,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x70000000,
                 .cpu_name               = "750FX",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
-                        CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750FX,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -317,12 +482,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x70020000,
                 .cpu_name               = "750GX",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
-                        CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_DUAL_PLL_750FX |
-                        CPU_FTR_HAS_HIGH_BATS,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_750GX,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -332,11 +493,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00080000,
                 .cpu_name               = "740/750",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_740,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -346,11 +504,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x000c1101,
                 .cpu_name               = "7400 (1.1)",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7400_NOTAU,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -360,12 +515,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x000c0000,
                 .cpu_name               = "7400",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7400,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -375,12 +526,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x800c0000,
                 .cpu_name               = "7410",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7400,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
@@ -390,12 +537,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x80000200,
                 .cpu_name               = "7450",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7450_20,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -405,14 +548,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x80000201,
                 .cpu_name               = "7450",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
-                        CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7450_21,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -422,13 +559,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80000000,
                 .cpu_name               = "7450",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7450_23,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -438,12 +570,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffff00,
                 .pvr_value              = 0x80010100,
                 .cpu_name               = "7455",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7455_1,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -453,14 +581,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x80010200,
                 .cpu_name               = "7455",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
-                        CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7455_20,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -470,14 +592,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80010000,
                 .cpu_name               = "7455",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
-                        CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7455,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -487,14 +603,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x80020100,
                 .cpu_name               = "7447/7457",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
-                        CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7447_10,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -504,14 +614,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffffff,
                 .pvr_value              = 0x80020101,
                 .cpu_name               = "7447/7457",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
-                        CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7447_10,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -521,14 +625,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80020000,
                 .cpu_name               = "7447/7457",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-                        CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
-                        CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
-                        CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7447,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -538,13 +636,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80030000,
                 .cpu_name               = "7447A",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-                        CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7447A,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -554,13 +647,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80040000,
                 .cpu_name               = "7448",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-                        CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+                .cpu_features           = CPU_FTRS_7447A,
+                .cpu_user_features      = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .num_pmcs               = 6,
@@ -570,10 +658,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0x7fff0000,
                 .pvr_value              = 0x00810000,
                 .cpu_name               = "82xx",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
-                        CPU_FTR_USE_TB,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_82XX,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603
@@ -582,10 +668,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0x7fff0000,
                 .pvr_value              = 0x00820000,
                 .cpu_name               = "G2_LE",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_G2_LE,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603
@@ -594,10 +678,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0x7fff0000,
                 .pvr_value              = 0x00830000,
                 .cpu_name               = "e300",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
-                        CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_E300,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603
@@ -606,114 +688,12 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
                 .cpu_name               = "(generic PPC)",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC,
+                .cpu_features           = CPU_FTRS_CLASSIC32,
+                .cpu_user_features      = COMMON_USER,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
-                .cpu_setup              = __setup_cpu_generic
         },
 #endif /* CLASSIC_PPC */
-#ifdef CONFIG_PPC64BRIDGE
-        {       /* Power3 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00400000,
-                .cpu_name               = "Power3 (630)",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3
-        },
-        {       /* Power3+ */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00410000,
-                .cpu_name               = "Power3 (630+)",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3
-        },
-        {       /* I-star */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00360000,
-                .cpu_name               = "I-star",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3
-        },
-        {       /* S-star */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00370000,
-                .cpu_name               = "S-star",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3
-        },
-#endif /* CONFIG_PPC64BRIDGE */
-#ifdef CONFIG_POWER4
-        {       /* Power4 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00350000,
-                .cpu_name               = "Power4",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power4
-        },
-        {       /* PPC970 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00390000,
-                .cpu_name               = "PPC970",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64 |
-                        PPC_FEATURE_ALTIVEC_COMP,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_ppc970
-        },
-        {       /* PPC970FX */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x003c0000,
-                .cpu_name               = "PPC970FX",
-                .cpu_features           = CPU_FTR_COMMON |
-                        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-                        CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP,
-                .cpu_user_features      = COMMON_PPC | PPC_FEATURE_64 |
-                        PPC_FEATURE_ALTIVEC_COMP,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_ppc970
-        },
-#endif /* CONFIG_POWER4 */
 #ifdef CONFIG_8xx
         {       /* 8xx */
                 .pvr_mask               = 0xffff0000,
@@ -721,8 +701,7 @@ struct cpu_spec	cpu_specs[] = {
                 .cpu_name               = "8xx",
                 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
                  * if the 8xx code is there.... */
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_8XX,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
@@ -733,8 +712,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffff00,
                 .pvr_value              = 0x00200200,
                 .cpu_name               = "403GC",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
@@ -743,8 +721,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffffff00,
                 .pvr_value              = 0x00201400,
                 .cpu_name               = "403GCX",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
                 .icache_bsize           = 16,
@@ -754,8 +731,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00200000,
                 .cpu_name               = "403G ??",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 16,
                 .dcache_bsize           = 16,
@@ -764,8 +740,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x40110000,
                 .cpu_name               = "405GP",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -775,8 +750,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x40130000,
                 .cpu_name               = "STB03xxx",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -786,8 +760,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x41810000,
                 .cpu_name               = "STB04xxx",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -797,8 +770,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x41610000,
                 .cpu_name               = "NP405L",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -808,8 +780,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x40B10000,
                 .cpu_name               = "NP4GS3",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -819,8 +790,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x41410000,
                 .cpu_name               = "NP405H",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -830,8 +800,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x50910000,
                 .cpu_name               = "405GPr",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -841,8 +810,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x51510000,
                 .cpu_name               = "STBx25xx",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -852,8 +820,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x41F10000,
                 .cpu_name               = "405LP",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -862,8 +829,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x20010000,
                 .cpu_name               = "Virtex-II Pro",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -873,8 +839,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x51210000,
                 .cpu_name               = "405EP",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_40X,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
                 .icache_bsize           = 32,
@@ -887,9 +852,8 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x40000850,
                 .cpu_name               = "440EP Rev. A",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
-                .cpu_user_features      = COMMON_PPC, /* 440EP has an FPU */
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER, /* 440EP has an FPU */
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
         },
@@ -897,28 +861,25 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x400008d3,
                 .cpu_name               = "440EP Rev. B",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
-                .cpu_user_features      = COMMON_PPC, /* 440EP has an FPU */
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER, /* 440EP has an FPU */
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
         },
-        {       /* 440GP Rev. B */
+        {       /* 440GP Rev. B */
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x40000440,
                 .cpu_name               = "440GP Rev. B",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
         },
-        {       /* 440GP Rev. C */
+        {       /* 440GP Rev. C */
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x40000481,
                 .cpu_name               = "440GP Rev. C",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -927,8 +888,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x50000850,
                 .cpu_name               = "440GX Rev. A",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -937,8 +897,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x50000851,
                 .cpu_name               = "440GX Rev. B",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -947,8 +906,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x50000892,
                 .cpu_name               = "440GX Rev. C",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -957,8 +915,7 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x50000894,
                 .cpu_name               = "440GX Rev. F",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
@@ -967,44 +924,42 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0xff000fff,
                 .pvr_value              = 0x53000891,
                 .cpu_name               = "440SP Rev. A",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
         },
 #endif /* CONFIG_44x */
 #ifdef CONFIG_FSL_BOOKE
-        {       /* e200z5 */
+        {       /* e200z5 */
                 .pvr_mask               = 0xfff00000,
                 .pvr_value              = 0x81000000,
                 .cpu_name               = "e200z5",
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
-                .cpu_features           = CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_E200,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
                         PPC_FEATURE_UNIFIED_CACHE,
                 .dcache_bsize           = 32,
         },
-        {       /* e200z6 */
+        {       /* e200z6 */
                 .pvr_mask               = 0xfff00000,
                 .pvr_value              = 0x81100000,
                 .cpu_name               = "e200z6",
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
-                .cpu_features           = CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_E200,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE |
                         PPC_FEATURE_UNIFIED_CACHE,
                 .dcache_bsize           = 32,
         },
-        {       /* e500 */
+        {       /* e500 */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80200000,
                 .cpu_name               = "e500",
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB,
+                .cpu_features           = CPU_FTRS_E500,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE,
@@ -1012,13 +967,12 @@ struct cpu_spec	cpu_specs[] = {
                 .dcache_bsize           = 32,
                 .num_pmcs               = 4,
         },
-        {       /* e500v2 */
+        {       /* e500v2 */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80210000,
                 .cpu_name               = "e500v2",
                 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS,
+                .cpu_features           = CPU_FTRS_E500_2,
                 .cpu_user_features      = PPC_FEATURE_32 |
                         PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
                         PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
@@ -1032,10 +986,11 @@ struct cpu_spec	cpu_specs[] = {
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
                 .cpu_name               = "(generic PPC)",
-                .cpu_features           = CPU_FTR_COMMON,
+                .cpu_features           = CPU_FTRS_GENERIC_32,
                 .cpu_user_features      = PPC_FEATURE_32,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
         }
 #endif /* !CLASSIC_PPC */
+#endif /* CONFIG_PPC32 */
 };
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
new file mode 100644
index 000000000000..2e99ae41723c
--- /dev/null
+++ b/arch/powerpc/kernel/entry_32.S
@@ -0,0 +1,1000 @@
+/*
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *  Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *  MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
+ *
+ *  This file contains the system call entry code, context switch
+ *  code, and exception/interrupt return code for PowerPC.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sys.h>
+#include <linux/threads.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/unistd.h>
+
+#undef SHOW_SYSCALLS
+#undef SHOW_SYSCALLS_TASK
+
+/*
+ * MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
+ */
+#if MSR_KERNEL >= 0x10000
+#define LOAD_MSR_KERNEL(r, x)   lis r,(x)@h; ori r,r,(x)@l
+#else
+#define LOAD_MSR_KERNEL(r, x)   li r,(x)
+#endif
+
+#ifdef CONFIG_BOOKE
+#include "head_booke.h"
+#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level)        \
+        mtspr   exc_level##_SPRG,r8;                    \
+        BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);          \
+        lwz     r0,GPR10-INT_FRAME_SIZE(r8);            \
+        stw     r0,GPR10(r11);                          \
+        lwz     r0,GPR11-INT_FRAME_SIZE(r8);            \
+        stw     r0,GPR11(r11);                          \
+        mfspr   r8,exc_level##_SPRG
+
+        .globl  mcheck_transfer_to_handler
+mcheck_transfer_to_handler:
+        TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK)
+        b       transfer_to_handler_full
+
+        .globl  debug_transfer_to_handler
+debug_transfer_to_handler:
+        TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG)
+        b       transfer_to_handler_full
+
+        .globl  crit_transfer_to_handler
+crit_transfer_to_handler:
+        TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT)
+        /* fall through */
+#endif
+
+#ifdef CONFIG_40x
+        .globl  crit_transfer_to_handler
+crit_transfer_to_handler:
+        lwz     r0,crit_r10@l(0)
+        stw     r0,GPR10(r11)
+        lwz     r0,crit_r11@l(0)
+        stw     r0,GPR11(r11)
+        /* fall through */
+#endif
+
+/*
+ * This code finishes saving the registers to the exception frame
+ * and jumps to the appropriate handler for the exception, turning
+ * on address translation.
+ * Note that we rely on the caller having set cr0.eq iff the exception
+ * occurred in kernel mode (i.e. MSR:PR = 0).
+ */
+        .globl  transfer_to_handler_full
+transfer_to_handler_full:
+        SAVE_NVGPRS(r11)
+        /* fall through */
+
+        .globl  transfer_to_handler
+transfer_to_handler:
+        stw     r2,GPR2(r11)
+        stw     r12,_NIP(r11)
+        stw     r9,_MSR(r11)
+        andi.   r2,r9,MSR_PR
+        mfctr   r12
+        mfspr   r2,SPRN_XER
+        stw     r12,_CTR(r11)
+        stw     r2,_XER(r11)
+        mfspr   r12,SPRN_SPRG3
+        addi    r2,r12,-THREAD
+        tovirt(r2,r2)                   /* set r2 to current */
+        beq     2f                      /* if from user, fix up THREAD.regs */
+        addi    r11,r1,STACK_FRAME_OVERHEAD
+        stw     r11,PT_REGS(r12)
+#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
+        /* Check to see if the dbcr0 register is set up to debug.  Use the
+           single-step bit to do this. */
+        lwz     r12,THREAD_DBCR0(r12)
+        andis.  r12,r12,DBCR0_IC@h
+        beq+    3f
+        /* From user and task is ptraced - load up global dbcr0 */
+        li      r12,-1                  /* clear all pending debug events */
+        mtspr   SPRN_DBSR,r12
+        lis     r11,global_dbcr0@ha
+        tophys(r11,r11)
+        addi    r11,r11,global_dbcr0@l
+        lwz     r12,0(r11)
+        mtspr   SPRN_DBCR0,r12
+        lwz     r12,4(r11)
+        addi    r12,r12,-1
+        stw     r12,4(r11)
+#endif
+        b       3f
+2:      /* if from kernel, check interrupted DOZE/NAP mode and
+         * check for stack overflow
+         */
+#ifdef CONFIG_6xx
+        mfspr   r11,SPRN_HID0
+        mtcr    r11
+BEGIN_FTR_SECTION
+        bt-     8,power_save_6xx_restore        /* Check DOZE */
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
+BEGIN_FTR_SECTION
+        bt-     9,power_save_6xx_restore        /* Check NAP */
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
+#endif /* CONFIG_6xx */
+        .globl transfer_to_handler_cont
+transfer_to_handler_cont:
+        lwz     r11,THREAD_INFO-THREAD(r12)
+        cmplw   r1,r11                  /* if r1 <= current->thread_info */
+        ble-    stack_ovf               /* then the kernel stack overflowed */
+3:
+        mflr    r9
+        lwz     r11,0(r9)               /* virtual address of handler */
+        lwz     r9,4(r9)                /* where to go when done */
+        FIX_SRR1(r10,r12)
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r10
+        mtlr    r9
+        SYNC
+        RFI                             /* jump to handler, enable MMU */
+
+/*
+ * On kernel stack overflow, load up an initial stack pointer
+ * and call StackOverflow(regs), which should not return.
+ */
+stack_ovf:
+        /* sometimes we use a statically-allocated stack, which is OK. */
+        lis     r11,_end@h
+        ori     r11,r11,_end@l
+        cmplw   r1,r11
+        ble     3b                      /* r1 <= &_end is OK */
+        SAVE_NVGPRS(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        lis     r1,init_thread_union@ha
+        addi    r1,r1,init_thread_union@l
+        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
+        lis     r9,StackOverflow@ha
+        addi    r9,r9,StackOverflow@l
+        LOAD_MSR_KERNEL(r10,MSR_KERNEL)
+        FIX_SRR1(r10,r12)
+        mtspr   SPRN_SRR0,r9
+        mtspr   SPRN_SRR1,r10
+        SYNC
+        RFI
+
+/*
+ * Handle a system call.
+ */
+        .stabs  "arch/powerpc/kernel/",N_SO,0,0,0f
+        .stabs  "entry_32.S",N_SO,0,0,0f
+0:
+
+_GLOBAL(DoSyscall)
+        stw     r0,THREAD+LAST_SYSCALL(r2)
+        stw     r3,ORIG_GPR3(r1)
+        li      r12,0
+        stw     r12,RESULT(r1)
+        lwz     r11,_CCR(r1)    /* Clear SO bit in CR */
+        rlwinm  r11,r11,0,4,2
+        stw     r11,_CCR(r1)
+#ifdef SHOW_SYSCALLS
+        bl      do_show_syscall
+#endif /* SHOW_SYSCALLS */
+        rlwinm  r10,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
+        li      r11,0
+        stb     r11,TI_SC_NOERR(r10)
+        lwz     r11,TI_FLAGS(r10)
+        andi.   r11,r11,_TIF_SYSCALL_T_OR_A
+        bne-    syscall_dotrace
+syscall_dotrace_cont:
+        cmplwi  0,r0,NR_syscalls
+        lis     r10,sys_call_table@h
+        ori     r10,r10,sys_call_table@l
+        slwi    r0,r0,2
+        bge-    66f
+        lwzx    r10,r10,r0      /* Fetch system call handler [ptr] */
+        mtlr    r10
+        addi    r9,r1,STACK_FRAME_OVERHEAD
+        PPC440EP_ERR42
+        blrl                    /* Call handler */
+        .globl  ret_from_syscall
+ret_from_syscall:
+#ifdef SHOW_SYSCALLS
+        bl      do_show_syscall_exit
+#endif
+        mr      r6,r3
+        li      r11,-_LAST_ERRNO
+        cmplw   0,r3,r11
+        rlwinm  r12,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
+        blt+    30f
+        lbz     r11,TI_SC_NOERR(r12)
+        cmpwi   r11,0
+        bne     30f
+        neg     r3,r3
+        lwz     r10,_CCR(r1)    /* Set SO bit in CR */
+        oris    r10,r10,0x1000
+        stw     r10,_CCR(r1)
+
+        /* disable interrupts so current_thread_info()->flags can't change */
+30:     LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
+        SYNC
+        MTMSRD(r10)
+        lwz     r9,TI_FLAGS(r12)
+        andi.   r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SIGPENDING|_TIF_NEED_RESCHED)
+        bne-    syscall_exit_work
+syscall_exit_cont:
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+        /* If the process has its own DBCR0 value, load it up.  The single
+           step bit tells us that dbcr0 should be loaded. */
+        lwz     r0,THREAD+THREAD_DBCR0(r2)
+        andis.  r10,r0,DBCR0_IC@h
+        bnel-   load_dbcr0
+#endif
+        stwcx.  r0,0,r1                 /* to clear the reservation */
+        lwz     r4,_LINK(r1)
+        lwz     r5,_CCR(r1)
+        mtlr    r4
+        mtcr    r5
+        lwz     r7,_NIP(r1)
+        lwz     r8,_MSR(r1)
+        FIX_SRR1(r8, r0)
+        lwz     r2,GPR2(r1)
+        lwz     r1,GPR1(r1)
+        mtspr   SPRN_SRR0,r7
+        mtspr   SPRN_SRR1,r8
+        SYNC
+        RFI
+
+66:     li      r3,-ENOSYS
+        b       ret_from_syscall
+
+        .globl  ret_from_fork
+ret_from_fork:
+        REST_NVGPRS(r1)
+        bl      schedule_tail
+        li      r3,0
+        b       ret_from_syscall
+
+/* Traced system call support */
+syscall_dotrace:
+        SAVE_NVGPRS(r1)
+        li      r0,0xc00
+        stw     r0,_TRAP(r1)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      do_syscall_trace_enter
+        lwz     r0,GPR0(r1)     /* Restore original registers */
+        lwz     r3,GPR3(r1)
+        lwz     r4,GPR4(r1)
+        lwz     r5,GPR5(r1)
+        lwz     r6,GPR6(r1)
+        lwz     r7,GPR7(r1)
+        lwz     r8,GPR8(r1)
+        REST_NVGPRS(r1)
+        b       syscall_dotrace_cont
+
+syscall_exit_work:
+        stw     r6,RESULT(r1)   /* Save result */
+        stw     r3,GPR3(r1)     /* Update return value */
+        andi.   r0,r9,_TIF_SYSCALL_T_OR_A
+        beq     5f
+        ori     r10,r10,MSR_EE
+        SYNC
+        MTMSRD(r10)             /* re-enable interrupts */
+        lwz     r4,_TRAP(r1)
+        andi.   r4,r4,1
+        beq     4f
+        SAVE_NVGPRS(r1)
+        li      r4,0xc00
+        stw     r4,_TRAP(r1)
+4:
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      do_syscall_trace_leave
+        REST_NVGPRS(r1)
+2:
+        lwz     r3,GPR3(r1)
+        LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
+        SYNC
+        MTMSRD(r10)             /* disable interrupts again */
+        rlwinm  r12,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
+        lwz     r9,TI_FLAGS(r12)
+5:
+        andi.   r0,r9,_TIF_NEED_RESCHED
+        bne     1f
+        lwz     r5,_MSR(r1)
+        andi.   r5,r5,MSR_PR
+        beq     syscall_exit_cont
+        andi.   r0,r9,_TIF_SIGPENDING
+        beq     syscall_exit_cont
+        b       do_user_signal
+1:
+        ori     r10,r10,MSR_EE
+        SYNC
+        MTMSRD(r10)             /* re-enable interrupts */
+        bl      schedule
+        b       2b
+
+#ifdef SHOW_SYSCALLS
+do_show_syscall:
+#ifdef SHOW_SYSCALLS_TASK
+        lis     r11,show_syscalls_task@ha
+        lwz     r11,show_syscalls_task@l(r11)
+        cmp     0,r2,r11
+        bnelr
+#endif
+        stw     r31,GPR31(r1)
+        mflr    r31
+        lis     r3,7f@ha
+        addi    r3,r3,7f@l
+        lwz     r4,GPR0(r1)
+        lwz     r5,GPR3(r1)
+        lwz     r6,GPR4(r1)
+        lwz     r7,GPR5(r1)
+        lwz     r8,GPR6(r1)
+        lwz     r9,GPR7(r1)
+        bl      printk
+        lis     r3,77f@ha
+        addi    r3,r3,77f@l
+        lwz     r4,GPR8(r1)
+        mr      r5,r2
+        bl      printk
+        lwz     r0,GPR0(r1)
+        lwz     r3,GPR3(r1)
+        lwz     r4,GPR4(r1)
+        lwz     r5,GPR5(r1)
+        lwz     r6,GPR6(r1)
+        lwz     r7,GPR7(r1)
+        lwz     r8,GPR8(r1)
+        mtlr    r31
+        lwz     r31,GPR31(r1)
+        blr
+
+do_show_syscall_exit:
+#ifdef SHOW_SYSCALLS_TASK
+        lis     r11,show_syscalls_task@ha
+        lwz     r11,show_syscalls_task@l(r11)
+        cmp     0,r2,r11
+        bnelr
+#endif
+        stw     r31,GPR31(r1)
+        mflr    r31
+        stw     r3,RESULT(r1)   /* Save result */
+        mr      r4,r3
+        lis     r3,79f@ha
+        addi    r3,r3,79f@l
+        bl      printk
+        lwz     r3,RESULT(r1)
+        mtlr    r31
+        lwz     r31,GPR31(r1)
+        blr
+
+7:      .string "syscall %d(%x, %x, %x, %x, %x, "
+77:     .string "%x), current=%p\n"
+79:     .string " -> %x\n"
+        .align  2,0
+
+#ifdef SHOW_SYSCALLS_TASK
+        .data
+        .globl  show_syscalls_task
+show_syscalls_task:
+        .long   -1
+        .text
+#endif
+#endif /* SHOW_SYSCALLS */
+
+/*
+ * The sigsuspend and rt_sigsuspend system calls can call do_signal
+ * and thus put the process into the stopped state where we might
+ * want to examine its user state with ptrace.  Therefore we need
+ * to save all the nonvolatile registers (r13 - r31) before calling
+ * the C code.
+ */
+        .globl  ppc_sigsuspend
+ppc_sigsuspend:
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        rlwinm  r0,r0,0,0,30            /* clear LSB to indicate full */
+        stw     r0,_TRAP(r1)            /* register set saved */
+        b       sys_sigsuspend
+
+        .globl  ppc_rt_sigsuspend
+ppc_rt_sigsuspend:
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        rlwinm  r0,r0,0,0,30
+        stw     r0,_TRAP(r1)
+        b       sys_rt_sigsuspend
+
+        .globl  ppc_fork
+ppc_fork:
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        rlwinm  r0,r0,0,0,30            /* clear LSB to indicate full */
+        stw     r0,_TRAP(r1)            /* register set saved */
+        b       sys_fork
+
+        .globl  ppc_vfork
+ppc_vfork:
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        rlwinm  r0,r0,0,0,30            /* clear LSB to indicate full */
+        stw     r0,_TRAP(r1)            /* register set saved */
+        b       sys_vfork
+
+        .globl  ppc_clone
+ppc_clone:
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        rlwinm  r0,r0,0,0,30            /* clear LSB to indicate full */
+        stw     r0,_TRAP(r1)            /* register set saved */
+        b       sys_clone
+
+        .globl  ppc_swapcontext
+ppc_swapcontext:
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        rlwinm  r0,r0,0,0,30            /* clear LSB to indicate full */
+        stw     r0,_TRAP(r1)            /* register set saved */
+        b       sys_swapcontext
+
+/*
+ * Top-level page fault handling.
+ * This is in assembler because if do_page_fault tells us that
+ * it is a bad kernel page fault, we want to save the non-volatile
+ * registers before calling bad_page_fault.
+ */
+        .globl  handle_page_fault
+handle_page_fault:
+        stw     r4,_DAR(r1)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      do_page_fault
+        cmpwi   r3,0
+        beq+    ret_from_except
+        SAVE_NVGPRS(r1)
+        lwz     r0,_TRAP(r1)
+        clrrwi  r0,r0,1
+        stw     r0,_TRAP(r1)
+        mr      r5,r3
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        lwz     r4,_DAR(r1)
+        bl      bad_page_fault
+        b       ret_from_except_full
+
+/*
+ * This routine switches between two different tasks.  The process
+ * state of one is saved on its kernel stack.  Then the state
+ * of the other is restored from its kernel stack.  The memory
+ * management hardware is updated to the second process's state.
+ * Finally, we can return to the second process.
+ * On entry, r3 points to the THREAD for the current task, r4
+ * points to the THREAD for the new task.
+ *
+ * This routine is always called with interrupts disabled.
+ *
+ * Note: there are two ways to get to the "going out" portion
+ * of this code; either by coming in via the entry (_switch)
+ * or via "fork" which must set up an environment equivalent
+ * to the "_switch" path.  If you change this , you'll have to
+ * change the fork code also.
+ *
+ * The code which creates the new task context is in 'copy_thread'
+ * in arch/ppc/kernel/process.c
+ */
+_GLOBAL(_switch)
+        stwu    r1,-INT_FRAME_SIZE(r1)
+        mflr    r0
+        stw     r0,INT_FRAME_SIZE+4(r1)
+        /* r3-r12 are caller saved -- Cort */
+        SAVE_NVGPRS(r1)
+        stw     r0,_NIP(r1)     /* Return to switch caller */
+        mfmsr   r11
+        li      r0,MSR_FP       /* Disable floating-point */
+#ifdef CONFIG_ALTIVEC
+BEGIN_FTR_SECTION
+        oris    r0,r0,MSR_VEC@h /* Disable altivec */
+        mfspr   r12,SPRN_VRSAVE /* save vrsave register value */
+        stw     r12,THREAD+THREAD_VRSAVE(r2)
+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+        oris    r0,r0,MSR_SPE@h  /* Disable SPE */
+        mfspr   r12,SPRN_SPEFSCR /* save spefscr register value */
+        stw     r12,THREAD+THREAD_SPEFSCR(r2)
+#endif /* CONFIG_SPE */
+        and.    r0,r0,r11       /* FP or altivec or SPE enabled? */
+        beq+    1f
+        andc    r11,r11,r0
+        MTMSRD(r11)
+        isync
+1:      stw     r11,_MSR(r1)
+        mfcr    r10
+        stw     r10,_CCR(r1)
+        stw     r1,KSP(r3)      /* Set old stack pointer */
+
+#ifdef CONFIG_SMP
+        /* We need a sync somewhere here to make sure that if the
+         * previous task gets rescheduled on another CPU, it sees all
+         * stores it has performed on this one.
+         */
+        sync
+#endif /* CONFIG_SMP */
+
+        tophys(r0,r4)
+        CLR_TOP32(r0)
+        mtspr   SPRN_SPRG3,r0   /* Update current THREAD phys addr */
+        lwz     r1,KSP(r4)      /* Load new stack pointer */
+
+        /* save the old current 'last' for return value */
+        mr      r3,r2
+        addi    r2,r4,-THREAD   /* Update current */
+
+#ifdef CONFIG_ALTIVEC
+BEGIN_FTR_SECTION
+        lwz     r0,THREAD+THREAD_VRSAVE(r2)
+        mtspr   SPRN_VRSAVE,r0          /* if G4, restore VRSAVE reg */
+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+        lwz     r0,THREAD+THREAD_SPEFSCR(r2)
+        mtspr   SPRN_SPEFSCR,r0         /* restore SPEFSCR reg */
+#endif /* CONFIG_SPE */
+
+        lwz     r0,_CCR(r1)
+        mtcrf   0xFF,r0
+        /* r3-r12 are destroyed -- Cort */
+        REST_NVGPRS(r1)
+
+        lwz     r4,_NIP(r1)     /* Return to _switch caller in new task */
+        mtlr    r4
+        addi    r1,r1,INT_FRAME_SIZE
+        blr
+
+        .globl  fast_exception_return
+fast_exception_return:
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
+        andi.   r10,r9,MSR_RI           /* check for recoverable interrupt */
+        beq     1f                      /* if not, we've got problems */
+#endif
+
+2:      REST_4GPRS(3, r11)
+        lwz     r10,_CCR(r11)
+        REST_GPR(1, r11)
+        mtcr    r10
+        lwz     r10,_LINK(r11)
+        mtlr    r10
+        REST_GPR(10, r11)
+        mtspr   SPRN_SRR1,r9
+        mtspr   SPRN_SRR0,r12
+        REST_GPR(9, r11)
+        REST_GPR(12, r11)
+        lwz     r11,GPR11(r11)
+        SYNC
+        RFI
+
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
+/* check if the exception happened in a restartable section */
+1:      lis     r3,exc_exit_restart_end@ha
+        addi    r3,r3,exc_exit_restart_end@l
+        cmplw   r12,r3
+        bge     3f
+        lis     r4,exc_exit_restart@ha
+        addi    r4,r4,exc_exit_restart@l
+        cmplw   r12,r4
+        blt     3f
+        lis     r3,fee_restarts@ha
+        tophys(r3,r3)
+        lwz     r5,fee_restarts@l(r3)
+        addi    r5,r5,1
+        stw     r5,fee_restarts@l(r3)
+        mr      r12,r4          /* restart at exc_exit_restart */
+        b       2b
+
+        .comm   fee_restarts,4
+
+/* aargh, a nonrecoverable interrupt, panic */
+/* aargh, we don't know which trap this is */
+/* but the 601 doesn't implement the RI bit, so assume it's OK */
+3:
+BEGIN_FTR_SECTION
+        b       2b
+END_FTR_SECTION_IFSET(CPU_FTR_601)
+        li      r10,-1
+        stw     r10,_TRAP(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        lis     r10,MSR_KERNEL@h
+        ori     r10,r10,MSR_KERNEL@l
+        bl      transfer_to_handler_full
+        .long   nonrecoverable_exception
+        .long   ret_from_except
+#endif
+
+        .globl  sigreturn_exit
+sigreturn_exit:
+        subi    r1,r3,STACK_FRAME_OVERHEAD
+        rlwinm  r12,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
+        lwz     r9,TI_FLAGS(r12)
+        andi.   r0,r9,_TIF_SYSCALL_T_OR_A
+        beq+    ret_from_except_full
+        bl      do_syscall_trace_leave
+        /* fall through */
+
+        .globl  ret_from_except_full
+ret_from_except_full:
+        REST_NVGPRS(r1)
+        /* fall through */
+
+        .globl  ret_from_except
+ret_from_except:
+        /* Hard-disable interrupts so that current_thread_info()->flags
+         * can't change between when we test it and when we return
+         * from the interrupt. */
+        LOAD_MSR_KERNEL(r10,MSR_KERNEL)
+        SYNC                    /* Some chip revs have problems here... */
+        MTMSRD(r10)             /* disable interrupts */
+
+        lwz     r3,_MSR(r1)     /* Returning to user mode? */
+        andi.   r0,r3,MSR_PR
+        beq     resume_kernel
+
+user_exc_return:                /* r10 contains MSR_KERNEL here */
+        /* Check current_thread_info()->flags */
+        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        lwz     r9,TI_FLAGS(r9)
+        andi.   r0,r9,(_TIF_SIGPENDING|_TIF_NEED_RESCHED)
+        bne     do_work
+
+restore_user:
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+        /* Check whether this process has its own DBCR0 value.  The single
+           step bit tells us that dbcr0 should be loaded. */
+        lwz     r0,THREAD+THREAD_DBCR0(r2)
+        andis.  r10,r0,DBCR0_IC@h
+        bnel-   load_dbcr0
+#endif
+
+#ifdef CONFIG_PREEMPT
+        b       restore
+
+/* N.B. the only way to get here is from the beq following ret_from_except. */
+resume_kernel:
+        /* check current_thread_info->preempt_count */
+        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        lwz     r0,TI_PREEMPT(r9)
+        cmpwi   0,r0,0          /* if non-zero, just restore regs and return */
+        bne     restore
+        lwz     r0,TI_FLAGS(r9)
+        andi.   r0,r0,_TIF_NEED_RESCHED
+        beq+    restore
+        andi.   r0,r3,MSR_EE    /* interrupts off? */
+        beq     restore         /* don't schedule if so */
+1:      bl      preempt_schedule_irq
+        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        lwz     r3,TI_FLAGS(r9)
+        andi.   r0,r3,_TIF_NEED_RESCHED
+        bne-    1b
+#else
+resume_kernel:
+#endif /* CONFIG_PREEMPT */
+
+        /* interrupts are hard-disabled at this point */
+restore:
+        lwz     r0,GPR0(r1)
+        lwz     r2,GPR2(r1)
+        REST_4GPRS(3, r1)
+        REST_2GPRS(7, r1)
+
+        lwz     r10,_XER(r1)
+        lwz     r11,_CTR(r1)
+        mtspr   SPRN_XER,r10
+        mtctr   r11
+
+        PPC405_ERR77(0,r1)
+        stwcx.  r0,0,r1                 /* to clear the reservation */
+
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
+        lwz     r9,_MSR(r1)
+        andi.   r10,r9,MSR_RI           /* check if this exception occurred */
+        beql    nonrecoverable          /* at a bad place (MSR:RI = 0) */
+
+        lwz     r10,_CCR(r1)
+        lwz     r11,_LINK(r1)
+        mtcrf   0xFF,r10
+        mtlr    r11
+
+        /*
+         * Once we put values in SRR0 and SRR1, we are in a state
+         * where exceptions are not recoverable, since taking an
+         * exception will trash SRR0 and SRR1.  Therefore we clear the
+         * MSR:RI bit to indicate this.  If we do take an exception,
+         * we can't return to the point of the exception but we
+         * can restart the exception exit path at the label
+         * exc_exit_restart below.  -- paulus
+         */
+        LOAD_MSR_KERNEL(r10,MSR_KERNEL & ~MSR_RI)
+        SYNC
+        MTMSRD(r10)             /* clear the RI bit */
+        .globl exc_exit_restart
+exc_exit_restart:
+        lwz     r9,_MSR(r1)
+        lwz     r12,_NIP(r1)
+        FIX_SRR1(r9,r10)
+        mtspr   SPRN_SRR0,r12
+        mtspr   SPRN_SRR1,r9
+        REST_4GPRS(9, r1)
+        lwz     r1,GPR1(r1)
+        .globl exc_exit_restart_end
+exc_exit_restart_end:
+        SYNC
+        RFI
+
+#else /* !(CONFIG_4xx || CONFIG_BOOKE) */
+        /*
+         * This is a bit different on 4xx/Book-E because it doesn't have
+         * the RI bit in the MSR.
+         * The TLB miss handler checks if we have interrupted
+         * the exception exit path and restarts it if so
+         * (well maybe one day it will... :).
+         */
+        lwz     r11,_LINK(r1)
+        mtlr    r11
+        lwz     r10,_CCR(r1)
+        mtcrf   0xff,r10
+        REST_2GPRS(9, r1)
+        .globl exc_exit_restart
+exc_exit_restart:
+        lwz     r11,_NIP(r1)
+        lwz     r12,_MSR(r1)
+exc_exit_start:
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
+        REST_2GPRS(11, r1)
+        lwz     r1,GPR1(r1)
+        .globl exc_exit_restart_end
+exc_exit_restart_end:
+        PPC405_ERR77_SYNC
+        rfi
+        b       .                       /* prevent prefetch past rfi */
+
+/*
+ * Returning from a critical interrupt in user mode doesn't need
+ * to be any different from a normal exception.  For a critical
+ * interrupt in the kernel, we just return (without checking for
+ * preemption) since the interrupt may have happened at some crucial
+ * place (e.g. inside the TLB miss handler), and because we will be
+ * running with r1 pointing into critical_stack, not the current
+ * process's kernel stack (and therefore current_thread_info() will
+ * give the wrong answer).
+ * We have to restore various SPRs that may have been in use at the
+ * time of the critical interrupt.
+ *
+ */
+#ifdef CONFIG_40x
+#define PPC_40x_TURN_OFF_MSR_DR                                             \
+        /* avoid any possible TLB misses here by turning off MSR.DR, we     \
+         * assume the instructions here are mapped by a pinned TLB entry */ \
+        li      r10,MSR_IR;                                                 \
+        mtmsr   r10;                                                        \
+        isync;                                                              \
+        tophys(r1, r1);
+#else
+#define PPC_40x_TURN_OFF_MSR_DR
+#endif
+
+#define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi)     \
+        REST_NVGPRS(r1);                                                \
+        lwz     r3,_MSR(r1);                                            \
+        andi.   r3,r3,MSR_PR;                                           \
+        LOAD_MSR_KERNEL(r10,MSR_KERNEL);                                \
+        bne     user_exc_return;                                        \
+        lwz     r0,GPR0(r1);                                            \
+        lwz     r2,GPR2(r1);                                            \
+        REST_4GPRS(3, r1);                                              \
+        REST_2GPRS(7, r1);                                              \
+        lwz     r10,_XER(r1);                                           \
+        lwz     r11,_CTR(r1);                                           \
+        mtspr   SPRN_XER,r10;                                           \
+        mtctr   r11;                                                    \
+        PPC405_ERR77(0,r1);                                             \
+        stwcx.  r0,0,r1;                /* to clear the reservation */  \
+        lwz     r11,_LINK(r1);                                          \
+        mtlr    r11;                                                    \
+        lwz     r10,_CCR(r1);                                           \
+        mtcrf   0xff,r10;                                               \
+        PPC_40x_TURN_OFF_MSR_DR;                                        \
+        lwz     r9,_DEAR(r1);                                           \
+        lwz     r10,_ESR(r1);                                           \
+        mtspr   SPRN_DEAR,r9;                                           \
+        mtspr   SPRN_ESR,r10;                                           \
+        lwz     r11,_NIP(r1);                                           \
+        lwz     r12,_MSR(r1);                                           \
+        mtspr   exc_lvl_srr0,r11;                                       \
+        mtspr   exc_lvl_srr1,r12;                                       \
+        lwz     r9,GPR9(r1);                                            \
+        lwz     r12,GPR12(r1);                                          \
+        lwz     r10,GPR10(r1);                                          \
+        lwz     r11,GPR11(r1);                                          \
+        lwz     r1,GPR1(r1);                                            \
+        PPC405_ERR77_SYNC;                                              \
+        exc_lvl_rfi;                                                    \
+        b       .;              /* prevent prefetch past exc_lvl_rfi */
+
+        .globl  ret_from_crit_exc
+ret_from_crit_exc:
+        RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
+
+#ifdef CONFIG_BOOKE
+        .globl  ret_from_debug_exc
+ret_from_debug_exc:
+        RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI)
+
+        .globl  ret_from_mcheck_exc
+ret_from_mcheck_exc:
+        RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
+#endif /* CONFIG_BOOKE */
+
+/*
+ * Load the DBCR0 value for a task that is being ptraced,
+ * having first saved away the global DBCR0.  Note that r0
+ * has the dbcr0 value to set upon entry to this.
+ */
+load_dbcr0:
+        mfmsr   r10             /* first disable debug exceptions */
+        rlwinm  r10,r10,0,~MSR_DE
+        mtmsr   r10
+        isync
+        mfspr   r10,SPRN_DBCR0
+        lis     r11,global_dbcr0@ha
+        addi    r11,r11,global_dbcr0@l
+        stw     r10,0(r11)
+        mtspr   SPRN_DBCR0,r0
+        lwz     r10,4(r11)
+        addi    r10,r10,1
+        stw     r10,4(r11)
+        li      r11,-1
+        mtspr   SPRN_DBSR,r11   /* clear all pending debug events */
+        blr
+
+        .comm   global_dbcr0,8
+#endif /* !(CONFIG_4xx || CONFIG_BOOKE) */
+
+do_work:                        /* r10 contains MSR_KERNEL here */
+        andi.   r0,r9,_TIF_NEED_RESCHED
+        beq     do_user_signal
+
+do_resched:                     /* r10 contains MSR_KERNEL here */
+        ori     r10,r10,MSR_EE
+        SYNC
+        MTMSRD(r10)             /* hard-enable interrupts */
+        bl      schedule
+recheck:
+        LOAD_MSR_KERNEL(r10,MSR_KERNEL)
+        SYNC
+        MTMSRD(r10)             /* disable interrupts */
+        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        lwz     r9,TI_FLAGS(r9)
+        andi.   r0,r9,_TIF_NEED_RESCHED
+        bne-    do_resched
+        andi.   r0,r9,_TIF_SIGPENDING
+        beq     restore_user
+do_user_signal:                 /* r10 contains MSR_KERNEL here */
+        ori     r10,r10,MSR_EE
+        SYNC
+        MTMSRD(r10)             /* hard-enable interrupts */
+        /* save r13-r31 in the exception frame, if not already done */
+        lwz     r3,_TRAP(r1)
+        andi.   r0,r3,1
+        beq     2f
+        SAVE_NVGPRS(r1)
+        rlwinm  r3,r3,0,0,30
+        stw     r3,_TRAP(r1)
+2:      li      r3,0
+        addi    r4,r1,STACK_FRAME_OVERHEAD
+        bl      do_signal
+        REST_NVGPRS(r1)
+        b       recheck
+
+/*
+ * We come here when we are at the end of handling an exception
+ * that occurred at a place where taking an exception will lose
+ * state information, such as the contents of SRR0 and SRR1.
+ */
+nonrecoverable:
+        lis     r10,exc_exit_restart_end@ha
+        addi    r10,r10,exc_exit_restart_end@l
+        cmplw   r12,r10
+        bge     3f
+        lis     r11,exc_exit_restart@ha
+        addi    r11,r11,exc_exit_restart@l
+        cmplw   r12,r11
+        blt     3f
+        lis     r10,ee_restarts@ha
+        lwz     r12,ee_restarts@l(r10)
+        addi    r12,r12,1
+        stw     r12,ee_restarts@l(r10)
+        mr      r12,r11         /* restart at exc_exit_restart */
+        blr
+3:      /* OK, we can't recover, kill this process */
+        /* but the 601 doesn't implement the RI bit, so assume it's OK */
+BEGIN_FTR_SECTION
+        blr
+END_FTR_SECTION_IFSET(CPU_FTR_601)
+        lwz     r3,_TRAP(r1)
+        andi.   r0,r3,1
+        beq     4f
+        SAVE_NVGPRS(r1)
+        rlwinm  r3,r3,0,0,30
+        stw     r3,_TRAP(r1)
+4:      addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      nonrecoverable_exception
+        /* shouldn't return */
+        b       4b
+
+        .comm   ee_restarts,4
+
+/*
+ * PROM code for specific machines follows.  Put it
+ * here so it's easy to add arch-specific sections later.
+ * -- Cort
+ */
+#ifdef CONFIG_PPC_RTAS
+/*
+ * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
+ * called with the MMU off.
+ */
+_GLOBAL(enter_rtas)
+        stwu    r1,-INT_FRAME_SIZE(r1)
+        mflr    r0
+        stw     r0,INT_FRAME_SIZE+4(r1)
+        LOADADDR(r4, rtas)
+        lis     r6,1f@ha        /* physical return address for rtas */
+        addi    r6,r6,1f@l
+        tophys(r6,r6)
+        tophys(r7,r1)
+        lwz     r8,RTASENTRY(r4)
+        lwz     r4,RTASBASE(r4)
+        mfmsr   r9
+        stw     r9,8(r1)
+        LOAD_MSR_KERNEL(r0,MSR_KERNEL)
+        SYNC                    /* disable interrupts so SRR0/1 */
+        MTMSRD(r0)              /* don't get trashed */
+        li      r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
+        mtlr    r6
+        mtspr   SPRN_SPRG2,r7
+        mtspr   SPRN_SRR0,r8
+        mtspr   SPRN_SRR1,r9
+        RFI
+1:      tophys(r9,r1)
+        lwz     r8,INT_FRAME_SIZE+4(r9) /* get return address */
+        lwz     r9,8(r9)        /* original msr value */
+        FIX_SRR1(r9,r0)
+        addi    r1,r1,INT_FRAME_SIZE
+        li      r0,0
+        mtspr   SPRN_SPRG2,r0
+        mtspr   SPRN_SRR0,r8
+        mtspr   SPRN_SRR1,r9
+        RFI                     /* return to caller */
+
+        .globl  machine_check_in_rtas
+machine_check_in_rtas:
+        twi     31,0,0
+        /* XXX load up BATs and panic */
+
+#endif /* CONFIG_PPC_RTAS */
diff --git a/arch/ppc64/kernel/entry.S b/arch/powerpc/kernel/entry_64.S
index e8c0bbf4d000..984a10630714 100644
--- a/arch/ppc64/kernel/entry.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -42,9 +42,6 @@
 .SYS_CALL_TABLE:
         .tc .sys_call_table[TC],.sys_call_table
 
-.SYS_CALL_TABLE32:
-        .tc .sys_call_table32[TC],.sys_call_table32
-
 /* This value is used to mark exception frames on the stack. */
 exception_marker:
         .tc     ID_72656773_68657265[TC],0x7265677368657265
@@ -133,7 +130,7 @@ system_call:			/* label this so stack traces look sane */
         ld      r11,.SYS_CALL_TABLE@toc(2)
         andi.   r10,r10,_TIF_32BIT
         beq     15f
-        ld      r11,.SYS_CALL_TABLE32@toc(2)
+        addi    r11,r11,8       /* use 32-bit syscall entries */
         clrldi  r3,r3,32
         clrldi  r4,r4,32
         clrldi  r5,r5,32
@@ -141,7 +138,7 @@ system_call:			/* label this so stack traces look sane */
         clrldi  r7,r7,32
         clrldi  r8,r8,32
 15:
-        slwi    r0,r0,3
+        slwi    r0,r0,4
         ldx     r10,r11,r0      /* Fetch system call handler [ptr] */
         mtctr   r10
         bctrl                   /* Call handler */
@@ -191,8 +188,8 @@ syscall_exit_trace_cont:
         ld      r1,GPR1(r1)
         mtlr    r4
         mtcr    r5
-        mtspr   SRR0,r7
-        mtspr   SRR1,r8
+        mtspr   SPRN_SRR0,r7
+        mtspr   SPRN_SRR1,r8
         rfid
         b       .       /* prevent speculative execution */
 
@@ -265,7 +262,7 @@ _GLOBAL(save_nvgprs)
  */
 _GLOBAL(ppc32_sigsuspend)
         bl      .save_nvgprs
-        bl      .sys32_sigsuspend
+        bl      .compat_sys_sigsuspend
         b       70f
 
 _GLOBAL(ppc64_rt_sigsuspend)
@@ -275,7 +272,7 @@ _GLOBAL(ppc64_rt_sigsuspend)
 
 _GLOBAL(ppc32_rt_sigsuspend)
         bl      .save_nvgprs
-        bl      .sys32_rt_sigsuspend
+        bl      .compat_sys_rt_sigsuspend
 70:     cmpdi   0,r3,0
         /* If it returned an error, we need to return via syscall_exit to set
            the SO bit in cr0 and potentially stop for ptrace. */
@@ -310,7 +307,7 @@ _GLOBAL(ppc_clone)
 
 _GLOBAL(ppc32_swapcontext)
         bl      .save_nvgprs
-        bl      .sys32_swapcontext
+        bl      .compat_sys_swapcontext
         b       80f
         
 _GLOBAL(ppc64_swapcontext)
@@ -319,11 +316,11 @@ _GLOBAL(ppc64_swapcontext)
         b       80f
 
 _GLOBAL(ppc32_sigreturn)
-        bl      .sys32_sigreturn
+        bl      .compat_sys_sigreturn
         b       80f
 
 _GLOBAL(ppc32_rt_sigreturn)
-        bl      .sys32_rt_sigreturn
+        bl      .compat_sys_rt_sigreturn
         b       80f
 
 _GLOBAL(ppc64_rt_sigreturn)
@@ -531,7 +528,7 @@ restore:
         mtctr   r3
         mtlr    r0
         ld      r3,_XER(r1)
-        mtspr   XER,r3
+        mtspr   SPRN_XER,r3
 
         REST_8GPRS(5, r1)
 
@@ -543,12 +540,12 @@ restore:
         mtmsrd  r0,1
 
         ld      r0,_MSR(r1)
-        mtspr   SRR1,r0
+        mtspr   SPRN_SRR1,r0
 
         ld      r2,_CCR(r1)
         mtcrf   0xFF,r2
         ld      r2,_NIP(r1)
-        mtspr   SRR0,r2
+        mtspr   SPRN_SRR0,r2
 
         ld      r0,GPR0(r1)
         ld      r2,GPR2(r1)
@@ -643,7 +640,7 @@ _GLOBAL(enter_rtas)
         std     r4,_CCR(r1)
         mfctr   r5
         std     r5,_CTR(r1)
-        mfspr   r6,XER
+        mfspr   r6,SPRN_XER
         std     r6,_XER(r1)
         mfdar   r7
         std     r7,_DAR(r1)
@@ -697,14 +694,14 @@ _GLOBAL(enter_rtas)
         ld      r5,RTASENTRY(r4)        /* get the rtas->entry value */
         ld      r4,RTASBASE(r4)         /* get the rtas->base value */
         
-        mtspr   SRR0,r5
-        mtspr   SRR1,r6
+        mtspr   SPRN_SRR0,r5
+        mtspr   SPRN_SRR1,r6
         rfid
         b       .       /* prevent speculative execution */
 
 _STATIC(rtas_return_loc)
         /* relocation is off at this point */
-        mfspr   r4,SPRG3                /* Get PACA */
+        mfspr   r4,SPRN_SPRG3           /* Get PACA */
         SET_REG_TO_CONST(r5, KERNELBASE)
         sub     r4,r4,r5                /* RELOC the PACA base pointer */
 
@@ -718,8 +715,8 @@ _STATIC(rtas_return_loc)
         LOADADDR(r3,.rtas_restore_regs)
         ld      r4,PACASAVEDMSR(r4)     /* Restore our MSR */
 
-        mtspr   SRR0,r3
-        mtspr   SRR1,r4
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
         rfid
         b       .       /* prevent speculative execution */
 
@@ -730,14 +727,14 @@ _STATIC(rtas_restore_regs)
         REST_8GPRS(14, r1)              /* Restore the non-volatiles */
         REST_10GPRS(22, r1)             /* ditto */
 
-        mfspr   r13,SPRG3
+        mfspr   r13,SPRN_SPRG3
 
         ld      r4,_CCR(r1)
         mtcr    r4
         ld      r5,_CTR(r1)
         mtctr   r5
         ld      r6,_XER(r1)
-        mtspr   XER,r6
+        mtspr   SPRN_XER,r6
         ld      r7,_DAR(r1)
         mtdar   r7
         ld      r8,_DSISR(r1)
@@ -774,7 +771,7 @@ _GLOBAL(enter_prom)
         std     r4,_CCR(r1)
         mfctr   r5
         std     r5,_CTR(r1)
-        mfspr   r6,XER
+        mfspr   r6,SPRN_XER
         std     r6,_XER(r1)
         mfdar   r7
         std     r7,_DAR(r1)
@@ -827,7 +824,7 @@ _GLOBAL(enter_prom)
         ld      r5,_CTR(r1)
         mtctr   r5
         ld      r6,_XER(r1)
-        mtspr   XER,r6
+        mtspr   SPRN_XER,r6
         ld      r7,_DAR(r1)
         mtdar   r7
         ld      r8,_DSISR(r1)
diff --git a/arch/ppc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 665d7d34304c..4d6001fa1cf2 100644
--- a/arch/ppc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -10,7 +10,7 @@
  */
 
 #include <linux/config.h>
-#include <asm/processor.h>
+#include <asm/reg.h>
 #include <asm/page.h>
 #include <asm/mmu.h>
 #include <asm/pgtable.h>
@@ -27,13 +27,9 @@
  * Load up this task's FP registers from its thread_struct,
  * enable the FPU for the current task and return to the task.
  */
-        .globl  load_up_fpu
-load_up_fpu:
+_GLOBAL(load_up_fpu)
         mfmsr   r5
         ori     r5,r5,MSR_FP
-#ifdef CONFIG_PPC64BRIDGE
-        clrldi  r5,r5,1                 /* turn off 64-bit mode */
-#endif /* CONFIG_PPC64BRIDGE */
         SYNC
         MTMSRD(r5)                      /* enable use of fpu now */
         isync
@@ -43,67 +39,57 @@ load_up_fpu:
  * to another.  Instead we call giveup_fpu in switch_to.
  */
 #ifndef CONFIG_SMP
-        tophys(r6,0)                    /* get __pa constant */
-        addis   r3,r6,last_task_used_math@ha
-        lwz     r4,last_task_used_math@l(r3)
-        cmpwi   0,r4,0
+        LOADBASE(r3, last_task_used_math)
+        toreal(r3)
+        LDL     r4,OFF(last_task_used_math)(r3)
+        CMPI    0,r4,0
         beq     1f
-        add     r4,r4,r6
+        toreal(r4)
         addi    r4,r4,THREAD            /* want last_task_used_math->thread */
         SAVE_32FPRS(0, r4)
         mffs    fr0
-        stfd    fr0,THREAD_FPSCR-4(r4)
-        lwz     r5,PT_REGS(r4)
-        add     r5,r5,r6
-        lwz     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        stfd    fr0,THREAD_FPSCR(r4)
+        LDL     r5,PT_REGS(r4)
+        toreal(r5)
+        LDL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
         li      r10,MSR_FP|MSR_FE0|MSR_FE1
         andc    r4,r4,r10               /* disable FP for previous task */
-        stw     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        STL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 1:
 #endif /* CONFIG_SMP */
         /* enable use of FP after return */
+#ifdef CONFIG_PPC32
         mfspr   r5,SPRN_SPRG3           /* current task's THREAD (phys) */
         lwz     r4,THREAD_FPEXC_MODE(r5)
         ori     r9,r9,MSR_FP            /* enable FP for current */
         or      r9,r9,r4
-        lfd     fr0,THREAD_FPSCR-4(r5)
+#else
+        ld      r4,PACACURRENT(r13)
+        addi    r5,r4,THREAD            /* Get THREAD */
+        ld      r4,THREAD_FPEXC_MODE(r5)
+        ori     r12,r12,MSR_FP
+        or      r12,r12,r4
+        std     r12,_MSR(r1)
+#endif
+        lfd     fr0,THREAD_FPSCR(r5)
         mtfsf   0xff,fr0
         REST_32FPRS(0, r5)
 #ifndef CONFIG_SMP
         subi    r4,r5,THREAD
-        sub     r4,r4,r6
-        stw     r4,last_task_used_math@l(r3)
+        fromreal(r4)
+        STL     r4,OFF(last_task_used_math)(r3)
 #endif /* CONFIG_SMP */
         /* restore registers and return */
         /* we haven't used ctr or xer or lr */
         b       fast_exception_return
 
 /*
- * FP unavailable trap from kernel - print a message, but let
- * the task use FP in the kernel until it returns to user mode.
- */
-        .globl  KernelFP
-KernelFP:
-        lwz     r3,_MSR(r1)
-        ori     r3,r3,MSR_FP
-        stw     r3,_MSR(r1)             /* enable use of FP after return */
-        lis     r3,86f@h
-        ori     r3,r3,86f@l
-        mr      r4,r2                   /* current */
-        lwz     r5,_NIP(r1)
-        bl      printk
-        b       ret_from_except
-86:     .string "floating point used in kernel (task=%p, pc=%x)\n"
-        .align  4,0
-
-/*
  * giveup_fpu(tsk)
  * Disable FP for the task given as the argument,
  * and save the floating-point registers in its thread_struct.
  * Enables the FPU for use in the kernel on return.
  */
-        .globl  giveup_fpu
-giveup_fpu:
+_GLOBAL(giveup_fpu)
         mfmsr   r5
         ori     r5,r5,MSR_FP
         SYNC_601
@@ -111,23 +97,48 @@ giveup_fpu:
         MTMSRD(r5)                      /* enable use of fpu now */
         SYNC_601
         isync
-        cmpwi   0,r3,0
+        CMPI    0,r3,0
         beqlr-                          /* if no previous owner, done */
         addi    r3,r3,THREAD            /* want THREAD of task */
-        lwz     r5,PT_REGS(r3)
-        cmpwi   0,r5,0
+        LDL     r5,PT_REGS(r3)
+        CMPI    0,r5,0
         SAVE_32FPRS(0, r3)
         mffs    fr0
-        stfd    fr0,THREAD_FPSCR-4(r3)
+        stfd    fr0,THREAD_FPSCR(r3)
         beq     1f
-        lwz     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        LDL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
         li      r3,MSR_FP|MSR_FE0|MSR_FE1
         andc    r4,r4,r3                /* disable FP for previous task */
-        stw     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        STL     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
 1:
 #ifndef CONFIG_SMP
         li      r5,0
-        lis     r4,last_task_used_math@ha
-        stw     r5,last_task_used_math@l(r4)
+        LOADBASE(r4,last_task_used_math)
+        STL     r5,OFF(last_task_used_math)(r4)
 #endif /* CONFIG_SMP */
         blr
+
+/*
+ * These are used in the alignment trap handler when emulating
+ * single-precision loads and stores.
+ * We restore and save the fpscr so the task gets the same result
+ * and exceptions as if the cpu had performed the load or store.
+ */
+
+_GLOBAL(cvt_fd)
+        lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
+        mtfsf   0xff,0
+        lfs     0,0(r3)
+        stfd    0,0(r4)
+        mffs    0
+        stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
+        blr
+
+_GLOBAL(cvt_df)
+        lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
+        mtfsf   0xff,0
+        lfd     0,0(r3)
+        stfs    0,0(r4)
+        mffs    0
+        stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
+        blr
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
new file mode 100644
index 000000000000..b102e3a2415e
--- /dev/null
+++ b/arch/powerpc/kernel/head_32.S
@@ -0,0 +1,1381 @@
+/*
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *  MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  This file contains the low-level support and setup for the
+ *  PowerPC platform, including trap and interrupt dispatch.
+ *  (The PPC 8xx embedded CPUs use head_8xx.S instead.)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/cputable.h>
+#include <asm/cache.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+#ifdef CONFIG_APUS
+#include <asm/amigappc.h>
+#endif
+
+/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
+#define LOAD_BAT(n, reg, RA, RB)        \
+        /* see the comment for clear_bats() -- Cort */ \
+        li      RA,0;                   \
+        mtspr   SPRN_IBAT##n##U,RA;     \
+        mtspr   SPRN_DBAT##n##U,RA;     \
+        lwz     RA,(n*16)+0(reg);       \
+        lwz     RB,(n*16)+4(reg);       \
+        mtspr   SPRN_IBAT##n##U,RA;     \
+        mtspr   SPRN_IBAT##n##L,RB;     \
+        beq     1f;                     \
+        lwz     RA,(n*16)+8(reg);       \
+        lwz     RB,(n*16)+12(reg);      \
+        mtspr   SPRN_DBAT##n##U,RA;     \
+        mtspr   SPRN_DBAT##n##L,RB;     \
+1:
+
+        .text
+        .stabs  "arch/powerpc/kernel/",N_SO,0,0,0f
+        .stabs  "head_32.S",N_SO,0,0,0f
+0:
+        .globl  _stext
+_stext:
+
+/*
+ * _start is defined this way because the XCOFF loader in the OpenFirmware
+ * on the powermac expects the entry point to be a procedure descriptor.
+ */
+        .text
+        .globl  _start
+_start:
+        /*
+         * These are here for legacy reasons, the kernel used to
+         * need to look like a coff function entry for the pmac
+         * but we're always started by some kind of bootloader now.
+         *  -- Cort
+         */
+        nop     /* used by __secondary_hold on prep (mtx) and chrp smp */
+        nop     /* used by __secondary_hold on prep (mtx) and chrp smp */
+        nop
+
+/* PMAC
+ * Enter here with the kernel text, data and bss loaded starting at
+ * 0, running with virtual == physical mapping.
+ * r5 points to the prom entry point (the client interface handler
+ * address).  Address translation is turned on, with the prom
+ * managing the hash table.  Interrupts are disabled.  The stack
+ * pointer (r1) points to just below the end of the half-meg region
+ * from 0x380000 - 0x400000, which is mapped in already.
+ *
+ * If we are booted from MacOS via BootX, we enter with the kernel
+ * image loaded somewhere, and the following values in registers:
+ *  r3: 'BooX' (0x426f6f58)
+ *  r4: virtual address of boot_infos_t
+ *  r5: 0
+ *
+ * APUS
+ *   r3: 'APUS'
+ *   r4: physical address of memory base
+ *   Linux/m68k style BootInfo structure at &_end.
+ *
+ * PREP
+ * This is jumped to on prep systems right after the kernel is relocated
+ * to its proper place in memory by the boot loader.  The expected layout
+ * of the regs is:
+ *   r3: ptr to residual data
+ *   r4: initrd_start or if no initrd then 0
+ *   r5: initrd_end - unused if r4 is 0
+ *   r6: Start of command line string
+ *   r7: End of command line string
+ *
+ * This just gets a minimal mmu environment setup so we can call
+ * start_here() to do the real work.
+ * -- Cort
+ */
+
+        .globl  __start
+__start:
+/*
+ * We have to do any OF calls before we map ourselves to KERNELBASE,
+ * because OF may have I/O devices mapped into that area
+ * (particularly on CHRP).
+ */
+        cmpwi   0,r5,0
+        beq     1f
+        bl      prom_init
+        trap
+
+1:      mr      r31,r3                  /* save parameters */
+        mr      r30,r4
+        li      r24,0                   /* cpu # */
+
+/*
+ * early_init() does the early machine identification and does
+ * the necessary low-level setup and clears the BSS
+ *  -- Cort <cort@fsmlabs.com>
+ */
+        bl      early_init
+
+#ifdef CONFIG_APUS
+/* On APUS the __va/__pa constants need to be set to the correct
+ * values before continuing.
+ */
+        mr      r4,r30
+        bl      fix_mem_constants
+#endif /* CONFIG_APUS */
+
+/* Switch MMU off, clear BATs and flush TLB. At this point, r3 contains
+ * the physical address we are running at, returned by early_init()
+ */
+        bl      mmu_off
+__after_mmu_off:
+        bl      clear_bats
+        bl      flush_tlbs
+
+        bl      initial_bats
+
+/*
+ * Call setup_cpu for CPU 0 and initialize 6xx Idle
+ */
+        bl      reloc_offset
+        li      r24,0                   /* cpu# */
+        bl      call_setup_cpu          /* Call setup_cpu for this CPU */
+#ifdef CONFIG_6xx
+        bl      reloc_offset
+        bl      init_idle_6xx
+#endif /* CONFIG_6xx */
+
+
+#ifndef CONFIG_APUS
+/*
+ * We need to run with _start at physical address 0.
+ * On CHRP, we are loaded at 0x10000 since OF on CHRP uses
+ * the exception vectors at 0 (and therefore this copy
+ * overwrites OF's exception vectors with our own).
+ * The MMU is off at this point.
+ */
+        bl      reloc_offset
+        mr      r26,r3
+        addis   r4,r3,KERNELBASE@h      /* current address of _start */
+        cmpwi   0,r4,0                  /* are we already running at 0? */
+        bne     relocate_kernel
+#endif /* CONFIG_APUS */
+/*
+ * we now have the 1st 16M of ram mapped with the bats.
+ * prep needs the mmu to be turned on here, but pmac already has it on.
+ * this shouldn't bother the pmac since it just gets turned on again
+ * as we jump to our code at KERNELBASE. -- Cort
+ * Actually no, pmac doesn't have it on any more. BootX enters with MMU
+ * off, and in other cases, we now turn it off before changing BATs above.
+ */
+turn_on_mmu:
+        mfmsr   r0
+        ori     r0,r0,MSR_DR|MSR_IR
+        mtspr   SPRN_SRR1,r0
+        lis     r0,start_here@h
+        ori     r0,r0,start_here@l
+        mtspr   SPRN_SRR0,r0
+        SYNC
+        RFI                             /* enables MMU */
+
+/*
+ * We need __secondary_hold as a place to hold the other cpus on
+ * an SMP machine, even when we are running a UP kernel.
+ */
+        . = 0xc0                        /* for prep bootloader */
+        li      r3,1                    /* MTX only has 1 cpu */
+        .globl  __secondary_hold
+__secondary_hold:
+        /* tell the master we're here */
+        stw     r3,__secondary_hold_acknowledge@l(0)
+#ifdef CONFIG_SMP
+100:    lwz     r4,0(0)
+        /* wait until we're told to start */
+        cmpw    0,r4,r3
+        bne     100b
+        /* our cpu # was at addr 0 - go */
+        mr      r24,r3                  /* cpu # */
+        b       __secondary_start
+#else
+        b       .
+#endif /* CONFIG_SMP */
+
+        .globl  __secondary_hold_spinloop
+__secondary_hold_spinloop:
+        .long   0
+        .globl  __secondary_hold_acknowledge
+__secondary_hold_acknowledge:
+        .long   -1
+
+/*
+ * Exception entry code.  This code runs with address translation
+ * turned off, i.e. using physical addresses.
+ * We assume sprg3 has the physical address of the current
+ * task's thread_struct.
+ */
+#define EXCEPTION_PROLOG        \
+        mtspr   SPRN_SPRG0,r10; \
+        mtspr   SPRN_SPRG1,r11; \
+        mfcr    r10;            \
+        EXCEPTION_PROLOG_1;     \
+        EXCEPTION_PROLOG_2
+
+#define EXCEPTION_PROLOG_1      \
+        mfspr   r11,SPRN_SRR1;          /* check whether user or kernel */ \
+        andi.   r11,r11,MSR_PR; \
+        tophys(r11,r1);                 /* use tophys(r1) if kernel */ \
+        beq     1f;             \
+        mfspr   r11,SPRN_SPRG3; \
+        lwz     r11,THREAD_INFO-THREAD(r11);    \
+        addi    r11,r11,THREAD_SIZE;    \
+        tophys(r11,r11);        \
+1:      subi    r11,r11,INT_FRAME_SIZE  /* alloc exc. frame */
+
+
+#define EXCEPTION_PROLOG_2      \
+        CLR_TOP32(r11);         \
+        stw     r10,_CCR(r11);          /* save registers */ \
+        stw     r12,GPR12(r11); \
+        stw     r9,GPR9(r11);   \
+        mfspr   r10,SPRN_SPRG0; \
+        stw     r10,GPR10(r11); \
+        mfspr   r12,SPRN_SPRG1; \
+        stw     r12,GPR11(r11); \
+        mflr    r10;            \
+        stw     r10,_LINK(r11); \
+        mfspr   r12,SPRN_SRR0;  \
+        mfspr   r9,SPRN_SRR1;   \
+        stw     r1,GPR1(r11);   \
+        stw     r1,0(r11);      \
+        tovirt(r1,r11);                 /* set new kernel sp */ \
+        li      r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
+        MTMSRD(r10);                    /* (except for mach check in rtas) */ \
+        stw     r0,GPR0(r11);   \
+        lis     r10,0x7265;             /* put exception frame marker */ \
+        addi    r10,r10,0x6773; \
+        stw     r10,8(r11);     \
+        SAVE_4GPRS(3, r11);     \
+        SAVE_2GPRS(7, r11)
+
+/*
+ * Note: code which follows this uses cr0.eq (set if from kernel),
+ * r11, r12 (SRR0), and r9 (SRR1).
+ *
+ * Note2: once we have set r1 we are in a position to take exceptions
+ * again, and we could thus set MSR:RI at that point.
+ */
+
+/*
+ * Exception vectors.
+ */
+#define EXCEPTION(n, label, hdlr, xfer)         \
+        . = n;                                  \
+label:                                          \
+        EXCEPTION_PROLOG;                       \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;     \
+        xfer(n, hdlr)
+
+#define EXC_XFER_TEMPLATE(n, hdlr, trap, copyee, tfer, ret)     \
+        li      r10,trap;                                       \
+        stw     r10,_TRAP(r11);                                 \
+        li      r10,MSR_KERNEL;                                 \
+        copyee(r10, r9);                                        \
+        bl      tfer;                                           \
+i##n:                                                           \
+        .long   hdlr;                                           \
+        .long   ret
+
+#define COPY_EE(d, s)           rlwimi d,s,0,16,16
+#define NOCOPY(d, s)
+
+#define EXC_XFER_STD(n, hdlr)           \
+        EXC_XFER_TEMPLATE(n, hdlr, n, NOCOPY, transfer_to_handler_full, \
+                          ret_from_except_full)
+
+#define EXC_XFER_LITE(n, hdlr)          \
+        EXC_XFER_TEMPLATE(n, hdlr, n+1, NOCOPY, transfer_to_handler, \
+                          ret_from_except)
+
+#define EXC_XFER_EE(n, hdlr)            \
+        EXC_XFER_TEMPLATE(n, hdlr, n, COPY_EE, transfer_to_handler_full, \
+                          ret_from_except_full)
+
+#define EXC_XFER_EE_LITE(n, hdlr)       \
+        EXC_XFER_TEMPLATE(n, hdlr, n+1, COPY_EE, transfer_to_handler, \
+                          ret_from_except)
+
+/* System reset */
+/* core99 pmac starts the seconary here by changing the vector, and
+   putting it back to what it was (unknown_exception) when done.  */
+#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
+        . = 0x100
+        b       __secondary_start_gemini
+#else
+        EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
+#endif
+
+/* Machine check */
+/*
+ * On CHRP, this is complicated by the fact that we could get a
+ * machine check inside RTAS, and we have no guarantee that certain
+ * critical registers will have the values we expect.  The set of
+ * registers that might have bad values includes all the GPRs
+ * and all the BATs.  We indicate that we are in RTAS by putting
+ * a non-zero value, the address of the exception frame to use,
+ * in SPRG2.  The machine check handler checks SPRG2 and uses its
+ * value if it is non-zero.  If we ever needed to free up SPRG2,
+ * we could use a field in the thread_info or thread_struct instead.
+ * (Other exception handlers assume that r1 is a valid kernel stack
+ * pointer when we take an exception from supervisor mode.)
+ *      -- paulus.
+ */
+        . = 0x200
+        mtspr   SPRN_SPRG0,r10
+        mtspr   SPRN_SPRG1,r11
+        mfcr    r10
+#ifdef CONFIG_PPC_CHRP
+        mfspr   r11,SPRN_SPRG2
+        cmpwi   0,r11,0
+        bne     7f
+#endif /* CONFIG_PPC_CHRP */
+        EXCEPTION_PROLOG_1
+7:      EXCEPTION_PROLOG_2
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+#ifdef CONFIG_PPC_CHRP
+        mfspr   r4,SPRN_SPRG2
+        cmpwi   cr1,r4,0
+        bne     cr1,1f
+#endif
+        EXC_XFER_STD(0x200, machine_check_exception)
+#ifdef CONFIG_PPC_CHRP
+1:      b       machine_check_in_rtas
+#endif
+
+/* Data access exception. */
+        . = 0x300
+DataAccess:
+        EXCEPTION_PROLOG
+        mfspr   r10,SPRN_DSISR
+        andis.  r0,r10,0xa470           /* weird error? */
+        bne     1f                      /* if not, try to put a PTE */
+        mfspr   r4,SPRN_DAR             /* into the hash table */
+        rlwinm  r3,r10,32-15,21,21      /* DSISR_STORE -> _PAGE_RW */
+        bl      hash_page
+1:      stw     r10,_DSISR(r11)
+        mr      r5,r10
+        mfspr   r4,SPRN_DAR
+        EXC_XFER_EE_LITE(0x300, handle_page_fault)
+
+
+/* Instruction access exception. */
+        . = 0x400
+InstructionAccess:
+        EXCEPTION_PROLOG
+        andis.  r0,r9,0x4000            /* no pte found? */
+        beq     1f                      /* if so, try to put a PTE */
+        li      r3,0                    /* into the hash table */
+        mr      r4,r12                  /* SRR0 is fault address */
+        bl      hash_page
+1:      mr      r4,r12
+        mr      r5,r9
+        EXC_XFER_EE_LITE(0x400, handle_page_fault)
+
+/* External interrupt */
+        EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
+
+/* Alignment exception */
+        . = 0x600
+Alignment:
+        EXCEPTION_PROLOG
+        mfspr   r4,SPRN_DAR
+        stw     r4,_DAR(r11)
+        mfspr   r5,SPRN_DSISR
+        stw     r5,_DSISR(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE(0x600, alignment_exception)
+
+/* Program check exception */
+        EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
+
+/* Floating-point unavailable */
+        . = 0x800
+FPUnavailable:
+        EXCEPTION_PROLOG
+        bne     load_up_fpu             /* if from user, just load it up */
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
+
+/* Decrementer */
+        EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
+
+        EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
+
+/* System call */
+        . = 0xc00
+SystemCall:
+        EXCEPTION_PROLOG
+        EXC_XFER_EE_LITE(0xc00, DoSyscall)
+
+/* Single step - not used on 601 */
+        EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
+        EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
+
+/*
+ * The Altivec unavailable trap is at 0x0f20.  Foo.
+ * We effectively remap it to 0x3000.
+ * We include an altivec unavailable exception vector even if
+ * not configured for Altivec, so that you can't panic a
+ * non-altivec kernel running on a machine with altivec just
+ * by executing an altivec instruction.
+ */
+        . = 0xf00
+        b       Trap_0f
+
+        . = 0xf20
+        b       AltiVecUnavailable
+
+Trap_0f:
+        EXCEPTION_PROLOG
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE(0xf00, unknown_exception)
+
+/*
+ * Handle TLB miss for instruction on 603/603e.
+ * Note: we get an alternate set of r0 - r3 to use automatically.
+ */
+        . = 0x1000
+InstructionTLBMiss:
+/*
+ * r0:  stored ctr
+ * r1:  linux style pte ( later becomes ppc hardware pte )
+ * r2:  ptr to linux-style pte
+ * r3:  scratch
+ */
+        mfctr   r0
+        /* Get PTE (linux-style) and check access */
+        mfspr   r3,SPRN_IMISS
+        lis     r1,KERNELBASE@h         /* check if kernel address */
+        cmplw   0,r3,r1
+        mfspr   r2,SPRN_SPRG3
+        li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
+        lwz     r2,PGDIR(r2)
+        blt+    112f
+        lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
+        addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
+        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
+112:    tophys(r2,r2)
+        rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
+        lwz     r2,0(r2)                /* get pmd entry */
+        rlwinm. r2,r2,0,0,19            /* extract address of pte page */
+        beq-    InstructionAddressInvalid       /* return if no mapping */
+        rlwimi  r2,r3,22,20,29          /* insert next 10 bits of address */
+        lwz     r3,0(r2)                /* get linux-style pte */
+        andc.   r1,r1,r3                /* check access & ~permission */
+        bne-    InstructionAddressInvalid /* return if access not permitted */
+        ori     r3,r3,_PAGE_ACCESSED    /* set _PAGE_ACCESSED in pte */
+        /*
+         * NOTE! We are assuming this is not an SMP system, otherwise
+         * we would need to update the pte atomically with lwarx/stwcx.
+         */
+        stw     r3,0(r2)                /* update PTE (accessed bit) */
+        /* Convert linux-style PTE to low word of PPC-style PTE */
+        rlwinm  r1,r3,32-10,31,31       /* _PAGE_RW -> PP lsb */
+        rlwinm  r2,r3,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
+        and     r1,r1,r2                /* writable if _RW and _DIRTY */
+        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
+        rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
+        ori     r1,r1,0xe14             /* clear out reserved bits and M */
+        andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
+        mtspr   SPRN_RPA,r1
+        mfspr   r3,SPRN_IMISS
+        tlbli   r3
+        mfspr   r3,SPRN_SRR1            /* Need to restore CR0 */
+        mtcrf   0x80,r3
+        rfi
+InstructionAddressInvalid:
+        mfspr   r3,SPRN_SRR1
+        rlwinm  r1,r3,9,6,6     /* Get load/store bit */
+
+        addis   r1,r1,0x2000
+        mtspr   SPRN_DSISR,r1   /* (shouldn't be needed) */
+        mtctr   r0              /* Restore CTR */
+        andi.   r2,r3,0xFFFF    /* Clear upper bits of SRR1 */
+        or      r2,r2,r1
+        mtspr   SPRN_SRR1,r2
+        mfspr   r1,SPRN_IMISS   /* Get failing address */
+        rlwinm. r2,r2,0,31,31   /* Check for little endian access */
+        rlwimi  r2,r2,1,30,30   /* change 1 -> 3 */
+        xor     r1,r1,r2
+        mtspr   SPRN_DAR,r1     /* Set fault address */
+        mfmsr   r0              /* Restore "normal" registers */
+        xoris   r0,r0,MSR_TGPR>>16
+        mtcrf   0x80,r3         /* Restore CR0 */
+        mtmsr   r0
+        b       InstructionAccess
+
+/*
+ * Handle TLB miss for DATA Load operation on 603/603e
+ */
+        . = 0x1100
+DataLoadTLBMiss:
+/*
+ * r0:  stored ctr
+ * r1:  linux style pte ( later becomes ppc hardware pte )
+ * r2:  ptr to linux-style pte
+ * r3:  scratch
+ */
+        mfctr   r0
+        /* Get PTE (linux-style) and check access */
+        mfspr   r3,SPRN_DMISS
+        lis     r1,KERNELBASE@h         /* check if kernel address */
+        cmplw   0,r3,r1
+        mfspr   r2,SPRN_SPRG3
+        li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
+        lwz     r2,PGDIR(r2)
+        blt+    112f
+        lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
+        addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
+        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
+112:    tophys(r2,r2)
+        rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
+        lwz     r2,0(r2)                /* get pmd entry */
+        rlwinm. r2,r2,0,0,19            /* extract address of pte page */
+        beq-    DataAddressInvalid      /* return if no mapping */
+        rlwimi  r2,r3,22,20,29          /* insert next 10 bits of address */
+        lwz     r3,0(r2)                /* get linux-style pte */
+        andc.   r1,r1,r3                /* check access & ~permission */
+        bne-    DataAddressInvalid      /* return if access not permitted */
+        ori     r3,r3,_PAGE_ACCESSED    /* set _PAGE_ACCESSED in pte */
+        /*
+         * NOTE! We are assuming this is not an SMP system, otherwise
+         * we would need to update the pte atomically with lwarx/stwcx.
+         */
+        stw     r3,0(r2)                /* update PTE (accessed bit) */
+        /* Convert linux-style PTE to low word of PPC-style PTE */
+        rlwinm  r1,r3,32-10,31,31       /* _PAGE_RW -> PP lsb */
+        rlwinm  r2,r3,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
+        and     r1,r1,r2                /* writable if _RW and _DIRTY */
+        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
+        rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
+        ori     r1,r1,0xe14             /* clear out reserved bits and M */
+        andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
+        mtspr   SPRN_RPA,r1
+        mfspr   r3,SPRN_DMISS
+        tlbld   r3
+        mfspr   r3,SPRN_SRR1            /* Need to restore CR0 */
+        mtcrf   0x80,r3
+        rfi
+DataAddressInvalid:
+        mfspr   r3,SPRN_SRR1
+        rlwinm  r1,r3,9,6,6     /* Get load/store bit */
+        addis   r1,r1,0x2000
+        mtspr   SPRN_DSISR,r1
+        mtctr   r0              /* Restore CTR */
+        andi.   r2,r3,0xFFFF    /* Clear upper bits of SRR1 */
+        mtspr   SPRN_SRR1,r2
+        mfspr   r1,SPRN_DMISS   /* Get failing address */
+        rlwinm. r2,r2,0,31,31   /* Check for little endian access */
+        beq     20f             /* Jump if big endian */
+        xori    r1,r1,3
+20:     mtspr   SPRN_DAR,r1     /* Set fault address */
+        mfmsr   r0              /* Restore "normal" registers */
+        xoris   r0,r0,MSR_TGPR>>16
+        mtcrf   0x80,r3         /* Restore CR0 */
+        mtmsr   r0
+        b       DataAccess
+
+/*
+ * Handle TLB miss for DATA Store on 603/603e
+ */
+        . = 0x1200
+DataStoreTLBMiss:
+/*
+ * r0:  stored ctr
+ * r1:  linux style pte ( later becomes ppc hardware pte )
+ * r2:  ptr to linux-style pte
+ * r3:  scratch
+ */
+        mfctr   r0
+        /* Get PTE (linux-style) and check access */
+        mfspr   r3,SPRN_DMISS
+        lis     r1,KERNELBASE@h         /* check if kernel address */
+        cmplw   0,r3,r1
+        mfspr   r2,SPRN_SPRG3
+        li      r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
+        lwz     r2,PGDIR(r2)
+        blt+    112f
+        lis     r2,swapper_pg_dir@ha    /* if kernel address, use */
+        addi    r2,r2,swapper_pg_dir@l  /* kernel page table */
+        mfspr   r1,SPRN_SRR1            /* and MSR_PR bit from SRR1 */
+        rlwinm  r1,r1,32-12,29,29       /* shift MSR_PR to _PAGE_USER posn */
+112:    tophys(r2,r2)
+        rlwimi  r2,r3,12,20,29          /* insert top 10 bits of address */
+        lwz     r2,0(r2)                /* get pmd entry */
+        rlwinm. r2,r2,0,0,19            /* extract address of pte page */
+        beq-    DataAddressInvalid      /* return if no mapping */
+        rlwimi  r2,r3,22,20,29          /* insert next 10 bits of address */
+        lwz     r3,0(r2)                /* get linux-style pte */
+        andc.   r1,r1,r3                /* check access & ~permission */
+        bne-    DataAddressInvalid      /* return if access not permitted */
+        ori     r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY
+        /*
+         * NOTE! We are assuming this is not an SMP system, otherwise
+         * we would need to update the pte atomically with lwarx/stwcx.
+         */
+        stw     r3,0(r2)                /* update PTE (accessed/dirty bits) */
+        /* Convert linux-style PTE to low word of PPC-style PTE */
+        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
+        li      r1,0xe15                /* clear out reserved bits and M */
+        andc    r1,r3,r1                /* PP = user? 2: 0 */
+        mtspr   SPRN_RPA,r1
+        mfspr   r3,SPRN_DMISS
+        tlbld   r3
+        mfspr   r3,SPRN_SRR1            /* Need to restore CR0 */
+        mtcrf   0x80,r3
+        rfi
+
+#ifndef CONFIG_ALTIVEC
+#define altivec_assist_exception        unknown_exception
+#endif
+
+        EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
+        EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
+        EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
+        EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
+        EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
+        EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
+
+        .globl mol_trampoline
+        .set mol_trampoline, i0x2f00
+
+        . = 0x3000
+
+AltiVecUnavailable:
+        EXCEPTION_PROLOG
+#ifdef CONFIG_ALTIVEC
+        bne     load_up_altivec         /* if from user, just load it up */
+#endif /* CONFIG_ALTIVEC */
+        EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
+
+#ifdef CONFIG_ALTIVEC
+/* Note that the AltiVec support is closely modeled after the FP
+ * support.  Changes to one are likely to be applicable to the
+ * other!  */
+load_up_altivec:
+/*
+ * Disable AltiVec for the task which had AltiVec previously,
+ * and save its AltiVec registers in its thread_struct.
+ * Enables AltiVec for use in the kernel on return.
+ * On SMP we know the AltiVec units are free, since we give it up every
+ * switch.  -- Kumar
+ */
+        mfmsr   r5
+        oris    r5,r5,MSR_VEC@h
+        MTMSRD(r5)                      /* enable use of AltiVec now */
+        isync
+/*
+ * For SMP, we don't do lazy AltiVec switching because it just gets too
+ * horrendously complex, especially when a task switches from one CPU
+ * to another.  Instead we call giveup_altivec in switch_to.
+ */
+#ifndef CONFIG_SMP
+        tophys(r6,0)
+        addis   r3,r6,last_task_used_altivec@ha
+        lwz     r4,last_task_used_altivec@l(r3)
+        cmpwi   0,r4,0
+        beq     1f
+        add     r4,r4,r6
+        addi    r4,r4,THREAD    /* want THREAD of last_task_used_altivec */
+        SAVE_32VRS(0,r10,r4)
+        mfvscr  vr0
+        li      r10,THREAD_VSCR
+        stvx    vr0,r10,r4
+        lwz     r5,PT_REGS(r4)
+        add     r5,r5,r6
+        lwz     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        lis     r10,MSR_VEC@h
+        andc    r4,r4,r10       /* disable altivec for previous task */
+        stw     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#endif /* CONFIG_SMP */
+        /* enable use of AltiVec after return */
+        oris    r9,r9,MSR_VEC@h
+        mfspr   r5,SPRN_SPRG3           /* current task's THREAD (phys) */
+        li      r4,1
+        li      r10,THREAD_VSCR
+        stw     r4,THREAD_USED_VR(r5)
+        lvx     vr0,r10,r5
+        mtvscr  vr0
+        REST_32VRS(0,r10,r5)
+#ifndef CONFIG_SMP
+        subi    r4,r5,THREAD
+        sub     r4,r4,r6
+        stw     r4,last_task_used_altivec@l(r3)
+#endif /* CONFIG_SMP */
+        /* restore registers and return */
+        /* we haven't used ctr or xer or lr */
+        b       fast_exception_return
+
+/*
+ * AltiVec unavailable trap from kernel - print a message, but let
+ * the task use AltiVec in the kernel until it returns to user mode.
+ */
+KernelAltiVec:
+        lwz     r3,_MSR(r1)
+        oris    r3,r3,MSR_VEC@h
+        stw     r3,_MSR(r1)     /* enable use of AltiVec after return */
+        lis     r3,87f@h
+        ori     r3,r3,87f@l
+        mr      r4,r2           /* current */
+        lwz     r5,_NIP(r1)
+        bl      printk
+        b       ret_from_except
+87:     .string "AltiVec used in kernel  (task=%p, pc=%x)  \n"
+        .align  4,0
+
+/*
+ * giveup_altivec(tsk)
+ * Disable AltiVec for the task given as the argument,
+ * and save the AltiVec registers in its thread_struct.
+ * Enables AltiVec for use in the kernel on return.
+ */
+
+        .globl  giveup_altivec
+giveup_altivec:
+        mfmsr   r5
+        oris    r5,r5,MSR_VEC@h
+        SYNC
+        MTMSRD(r5)                      /* enable use of AltiVec now */
+        isync
+        cmpwi   0,r3,0
+        beqlr-                          /* if no previous owner, done */
+        addi    r3,r3,THREAD            /* want THREAD of task */
+        lwz     r5,PT_REGS(r3)
+        cmpwi   0,r5,0
+        SAVE_32VRS(0, r4, r3)
+        mfvscr  vr0
+        li      r4,THREAD_VSCR
+        stvx    vr0,r4,r3
+        beq     1f
+        lwz     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        lis     r3,MSR_VEC@h
+        andc    r4,r4,r3                /* disable AltiVec for previous task */
+        stw     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#ifndef CONFIG_SMP
+        li      r5,0
+        lis     r4,last_task_used_altivec@ha
+        stw     r5,last_task_used_altivec@l(r4)
+#endif /* CONFIG_SMP */
+        blr
+#endif /* CONFIG_ALTIVEC */
+
+/*
+ * This code is jumped to from the startup code to copy
+ * the kernel image to physical address 0.
+ */
+relocate_kernel:
+        addis   r9,r26,klimit@ha        /* fetch klimit */
+        lwz     r25,klimit@l(r9)
+        addis   r25,r25,-KERNELBASE@h
+        li      r3,0                    /* Destination base address */
+        li      r6,0                    /* Destination offset */
+        li      r5,0x4000               /* # bytes of memory to copy */
+        bl      copy_and_flush          /* copy the first 0x4000 bytes */
+        addi    r0,r3,4f@l              /* jump to the address of 4f */
+        mtctr   r0                      /* in copy and do the rest. */
+        bctr                            /* jump to the copy */
+4:      mr      r5,r25
+        bl      copy_and_flush          /* copy the rest */
+        b       turn_on_mmu
+
+/*
+ * Copy routine used to copy the kernel to start at physical address 0
+ * and flush and invalidate the caches as needed.
+ * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
+ * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
+ */
+_GLOBAL(copy_and_flush)
+        addi    r5,r5,-4
+        addi    r6,r6,-4
+4:      li      r0,L1_CACHE_BYTES/4
+        mtctr   r0
+3:      addi    r6,r6,4                 /* copy a cache line */
+        lwzx    r0,r6,r4
+        stwx    r0,r6,r3
+        bdnz    3b
+        dcbst   r6,r3                   /* write it to memory */
+        sync
+        icbi    r6,r3                   /* flush the icache line */
+        cmplw   0,r6,r5
+        blt     4b
+        sync                            /* additional sync needed on g4 */
+        isync
+        addi    r5,r5,4
+        addi    r6,r6,4
+        blr
+
+#ifdef CONFIG_APUS
+/*
+ * On APUS the physical base address of the kernel is not known at compile
+ * time, which means the __pa/__va constants used are incorrect. In the
+ * __init section is recorded the virtual addresses of instructions using
+ * these constants, so all that has to be done is fix these before
+ * continuing the kernel boot.
+ *
+ * r4 = The physical address of the kernel base.
+ */
+fix_mem_constants:
+        mr      r10,r4
+        addis   r10,r10,-KERNELBASE@h    /* virt_to_phys constant */
+        neg     r11,r10                  /* phys_to_virt constant */
+
+        lis     r12,__vtop_table_begin@h
+        ori     r12,r12,__vtop_table_begin@l
+        add     r12,r12,r10              /* table begin phys address */
+        lis     r13,__vtop_table_end@h
+        ori     r13,r13,__vtop_table_end@l
+        add     r13,r13,r10              /* table end phys address */
+        subi    r12,r12,4
+        subi    r13,r13,4
+1:      lwzu    r14,4(r12)               /* virt address of instruction */
+        add     r14,r14,r10              /* phys address of instruction */
+        lwz     r15,0(r14)               /* instruction, now insert top */
+        rlwimi  r15,r10,16,16,31         /* half of vp const in low half */
+        stw     r15,0(r14)               /* of instruction and restore. */
+        dcbst   r0,r14                   /* write it to memory */
+        sync
+        icbi    r0,r14                   /* flush the icache line */
+        cmpw    r12,r13
+        bne     1b
+        sync                            /* additional sync needed on g4 */
+        isync
+
+/*
+ * Map the memory where the exception handlers will
+ * be copied to when hash constants have been patched.
+ */
+#ifdef CONFIG_APUS_FAST_EXCEPT
+        lis     r8,0xfff0
+#else
+        lis     r8,0
+#endif
+        ori     r8,r8,0x2               /* 128KB, supervisor */
+        mtspr   SPRN_DBAT3U,r8
+        mtspr   SPRN_DBAT3L,r8
+
+        lis     r12,__ptov_table_begin@h
+        ori     r12,r12,__ptov_table_begin@l
+        add     r12,r12,r10              /* table begin phys address */
+        lis     r13,__ptov_table_end@h
+        ori     r13,r13,__ptov_table_end@l
+        add     r13,r13,r10              /* table end phys address */
+        subi    r12,r12,4
+        subi    r13,r13,4
+1:      lwzu    r14,4(r12)               /* virt address of instruction */
+        add     r14,r14,r10              /* phys address of instruction */
+        lwz     r15,0(r14)               /* instruction, now insert top */
+        rlwimi  r15,r11,16,16,31         /* half of pv const in low half*/
+        stw     r15,0(r14)               /* of instruction and restore. */
+        dcbst   r0,r14                   /* write it to memory */
+        sync
+        icbi    r0,r14                   /* flush the icache line */
+        cmpw    r12,r13
+        bne     1b
+
+        sync                            /* additional sync needed on g4 */
+        isync                           /* No speculative loading until now */
+        blr
+
+/***********************************************************************
+ *  Please note that on APUS the exception handlers are located at the
+ *  physical address 0xfff0000. For this reason, the exception handlers
+ *  cannot use relative branches to access the code below.
+ ***********************************************************************/
+#endif /* CONFIG_APUS */
+
+#ifdef CONFIG_SMP
+#ifdef CONFIG_GEMINI
+        .globl  __secondary_start_gemini
+__secondary_start_gemini:
+        mfspr   r4,SPRN_HID0
+        ori     r4,r4,HID0_ICFI
+        li      r3,0
+        ori     r3,r3,HID0_ICE
+        andc    r4,r4,r3
+        mtspr   SPRN_HID0,r4
+        sync
+        b       __secondary_start
+#endif /* CONFIG_GEMINI */
+
+        .globl  __secondary_start_pmac_0
+__secondary_start_pmac_0:
+        /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
+        li      r24,0
+        b       1f
+        li      r24,1
+        b       1f
+        li      r24,2
+        b       1f
+        li      r24,3
+1:
+        /* on powersurge, we come in here with IR=0 and DR=1, and DBAT 0
+           set to map the 0xf0000000 - 0xffffffff region */
+        mfmsr   r0
+        rlwinm  r0,r0,0,28,26           /* clear DR (0x10) */
+        SYNC
+        mtmsr   r0
+        isync
+
+        .globl  __secondary_start
+__secondary_start:
+        /* Copy some CPU settings from CPU 0 */
+        bl      __restore_cpu_setup
+
+        lis     r3,-KERNELBASE@h
+        mr      r4,r24
+        bl      call_setup_cpu          /* Call setup_cpu for this CPU */
+#ifdef CONFIG_6xx
+        lis     r3,-KERNELBASE@h
+        bl      init_idle_6xx
+#endif /* CONFIG_6xx */
+
+        /* get current_thread_info and current */
+        lis     r1,secondary_ti@ha
+        tophys(r1,r1)
+        lwz     r1,secondary_ti@l(r1)
+        tophys(r2,r1)
+        lwz     r2,TI_TASK(r2)
+
+        /* stack */
+        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
+        li      r0,0
+        tophys(r3,r1)
+        stw     r0,0(r3)
+
+        /* load up the MMU */
+        bl      load_up_mmu
+
+        /* ptr to phys current thread */
+        tophys(r4,r2)
+        addi    r4,r4,THREAD    /* phys address of our thread_struct */
+        CLR_TOP32(r4)
+        mtspr   SPRN_SPRG3,r4
+        li      r3,0
+        mtspr   SPRN_SPRG2,r3   /* 0 => not in RTAS */
+
+        /* enable MMU and jump to start_secondary */
+        li      r4,MSR_KERNEL
+        FIX_SRR1(r4,r5)
+        lis     r3,start_secondary@h
+        ori     r3,r3,start_secondary@l
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        SYNC
+        RFI
+#endif /* CONFIG_SMP */
+
+/*
+ * Those generic dummy functions are kept for CPUs not
+ * included in CONFIG_6xx
+ */
+#if !defined(CONFIG_6xx)
+_GLOBAL(__save_cpu_setup)
+        blr
+_GLOBAL(__restore_cpu_setup)
+        blr
+#endif /* !defined(CONFIG_6xx) */
+
+
+/*
+ * Load stuff into the MMU.  Intended to be called with
+ * IR=0 and DR=0.
+ */
+load_up_mmu:
+        sync                    /* Force all PTE updates to finish */
+        isync
+        tlbia                   /* Clear all TLB entries */
+        sync                    /* wait for tlbia/tlbie to finish */
+        TLBSYNC                 /* ... on all CPUs */
+        /* Load the SDR1 register (hash table base & size) */
+        lis     r6,_SDR1@ha
+        tophys(r6,r6)
+        lwz     r6,_SDR1@l(r6)
+        mtspr   SPRN_SDR1,r6
+        li      r0,16           /* load up segment register values */
+        mtctr   r0              /* for context 0 */
+        lis     r3,0x2000       /* Ku = 1, VSID = 0 */
+        li      r4,0
+3:      mtsrin  r3,r4
+        addi    r3,r3,0x111     /* increment VSID */
+        addis   r4,r4,0x1000    /* address of next segment */
+        bdnz    3b
+
+/* Load the BAT registers with the values set up by MMU_init.
+   MMU_init takes care of whether we're on a 601 or not. */
+        mfpvr   r3
+        srwi    r3,r3,16
+        cmpwi   r3,1
+        lis     r3,BATS@ha
+        addi    r3,r3,BATS@l
+        tophys(r3,r3)
+        LOAD_BAT(0,r3,r4,r5)
+        LOAD_BAT(1,r3,r4,r5)
+        LOAD_BAT(2,r3,r4,r5)
+        LOAD_BAT(3,r3,r4,r5)
+
+        blr
+
+/*
+ * This is where the main kernel code starts.
+ */
+start_here:
+        /* ptr to current */
+        lis     r2,init_task@h
+        ori     r2,r2,init_task@l
+        /* Set up for using our exception vectors */
+        /* ptr to phys current thread */
+        tophys(r4,r2)
+        addi    r4,r4,THREAD    /* init task's THREAD */
+        CLR_TOP32(r4)
+        mtspr   SPRN_SPRG3,r4
+        li      r3,0
+        mtspr   SPRN_SPRG2,r3   /* 0 => not in RTAS */
+
+        /* stack */
+        lis     r1,init_thread_union@ha
+        addi    r1,r1,init_thread_union@l
+        li      r0,0
+        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+/*
+ * Do early platform-specific initialization,
+ * and set up the MMU.
+ */
+        mr      r3,r31
+        mr      r4,r30
+        bl      machine_init
+        bl      MMU_init
+
+#ifdef CONFIG_APUS
+        /* Copy exception code to exception vector base on APUS. */
+        lis     r4,KERNELBASE@h
+#ifdef CONFIG_APUS_FAST_EXCEPT
+        lis     r3,0xfff0               /* Copy to 0xfff00000 */
+#else
+        lis     r3,0                    /* Copy to 0x00000000 */
+#endif
+        li      r5,0x4000               /* # bytes of memory to copy */
+        li      r6,0
+        bl      copy_and_flush          /* copy the first 0x4000 bytes */
+#endif  /* CONFIG_APUS */
+
+/*
+ * Go back to running unmapped so we can load up new values
+ * for SDR1 (hash table pointer) and the segment registers
+ * and change to using our exception vectors.
+ */
+        lis     r4,2f@h
+        ori     r4,r4,2f@l
+        tophys(r4,r4)
+        li      r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
+        FIX_SRR1(r3,r5)
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        SYNC
+        RFI
+/* Load up the kernel context */
+2:      bl      load_up_mmu
+
+#ifdef CONFIG_BDI_SWITCH
+        /* Add helper information for the Abatron bdiGDB debugger.
+         * We do this here because we know the mmu is disabled, and
+         * will be enabled for real in just a few instructions.
+         */
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        stw     r5, 0xf0(r0)    /* This much match your Abatron config */
+        lis     r6, swapper_pg_dir@h
+        ori     r6, r6, swapper_pg_dir@l
+        tophys(r5, r5)
+        stw     r6, 0(r5)
+#endif /* CONFIG_BDI_SWITCH */
+
+/* Now turn on the MMU for real! */
+        li      r4,MSR_KERNEL
+        FIX_SRR1(r4,r5)
+        lis     r3,start_kernel@h
+        ori     r3,r3,start_kernel@l
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        SYNC
+        RFI
+
+/*
+ * Set up the segment registers for a new context.
+ */
+_GLOBAL(set_context)
+        mulli   r3,r3,897       /* multiply context by skew factor */
+        rlwinm  r3,r3,4,8,27    /* VSID = (context & 0xfffff) << 4 */
+        addis   r3,r3,0x6000    /* Set Ks, Ku bits */
+        li      r0,NUM_USER_SEGMENTS
+        mtctr   r0
+
+#ifdef CONFIG_BDI_SWITCH
+        /* Context switch the PTE pointer for the Abatron BDI2000.
+         * The PGDIR is passed as second argument.
+         */
+        lis     r5, KERNELBASE@h
+        lwz     r5, 0xf0(r5)
+        stw     r4, 0x4(r5)
+#endif
+        li      r4,0
+        isync
+3:
+        mtsrin  r3,r4
+        addi    r3,r3,0x111     /* next VSID */
+        rlwinm  r3,r3,0,8,3     /* clear out any overflow from VSID field */
+        addis   r4,r4,0x1000    /* address of next segment */
+        bdnz    3b
+        sync
+        isync
+        blr
+
+/*
+ * An undocumented "feature" of 604e requires that the v bit
+ * be cleared before changing BAT values.
+ *
+ * Also, newer IBM firmware does not clear bat3 and 4 so
+ * this makes sure it's done.
+ *  -- Cort
+ */
+clear_bats:
+        li      r10,0
+        mfspr   r9,SPRN_PVR
+        rlwinm  r9,r9,16,16,31          /* r9 = 1 for 601, 4 for 604 */
+        cmpwi   r9, 1
+        beq     1f
+
+        mtspr   SPRN_DBAT0U,r10
+        mtspr   SPRN_DBAT0L,r10
+        mtspr   SPRN_DBAT1U,r10
+        mtspr   SPRN_DBAT1L,r10
+        mtspr   SPRN_DBAT2U,r10
+        mtspr   SPRN_DBAT2L,r10
+        mtspr   SPRN_DBAT3U,r10
+        mtspr   SPRN_DBAT3L,r10
+1:
+        mtspr   SPRN_IBAT0U,r10
+        mtspr   SPRN_IBAT0L,r10
+        mtspr   SPRN_IBAT1U,r10
+        mtspr   SPRN_IBAT1L,r10
+        mtspr   SPRN_IBAT2U,r10
+        mtspr   SPRN_IBAT2L,r10
+        mtspr   SPRN_IBAT3U,r10
+        mtspr   SPRN_IBAT3L,r10
+BEGIN_FTR_SECTION
+        /* Here's a tweak: at this point, CPU setup have
+         * not been called yet, so HIGH_BAT_EN may not be
+         * set in HID0 for the 745x processors. However, it
+         * seems that doesn't affect our ability to actually
+         * write to these SPRs.
+         */
+        mtspr   SPRN_DBAT4U,r10
+        mtspr   SPRN_DBAT4L,r10
+        mtspr   SPRN_DBAT5U,r10
+        mtspr   SPRN_DBAT5L,r10
+        mtspr   SPRN_DBAT6U,r10
+        mtspr   SPRN_DBAT6L,r10
+        mtspr   SPRN_DBAT7U,r10
+        mtspr   SPRN_DBAT7L,r10
+        mtspr   SPRN_IBAT4U,r10
+        mtspr   SPRN_IBAT4L,r10
+        mtspr   SPRN_IBAT5U,r10
+        mtspr   SPRN_IBAT5L,r10
+        mtspr   SPRN_IBAT6U,r10
+        mtspr   SPRN_IBAT6L,r10
+        mtspr   SPRN_IBAT7U,r10
+        mtspr   SPRN_IBAT7L,r10
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+        blr
+
+flush_tlbs:
+        lis     r10, 0x40
+1:      addic.  r10, r10, -0x1000
+        tlbie   r10
+        blt     1b
+        sync
+        blr
+
+mmu_off:
+        addi    r4, r3, __after_mmu_off - _start
+        mfmsr   r3
+        andi.   r0,r3,MSR_DR|MSR_IR             /* MMU enabled? */
+        beqlr
+        andc    r3,r3,r0
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        sync
+        RFI
+
+/*
+ * Use the first pair of BAT registers to map the 1st 16MB
+ * of RAM to KERNELBASE.  From this point on we can't safely
+ * call OF any more.
+ */
+initial_bats:
+        lis     r11,KERNELBASE@h
+        mfspr   r9,SPRN_PVR
+        rlwinm  r9,r9,16,16,31          /* r9 = 1 for 601, 4 for 604 */
+        cmpwi   0,r9,1
+        bne     4f
+        ori     r11,r11,4               /* set up BAT registers for 601 */
+        li      r8,0x7f                 /* valid, block length = 8MB */
+        oris    r9,r11,0x800000@h       /* set up BAT reg for 2nd 8M */
+        oris    r10,r8,0x800000@h       /* set up BAT reg for 2nd 8M */
+        mtspr   SPRN_IBAT0U,r11         /* N.B. 601 has valid bit in */
+        mtspr   SPRN_IBAT0L,r8          /* lower BAT register */
+        mtspr   SPRN_IBAT1U,r9
+        mtspr   SPRN_IBAT1L,r10
+        isync
+        blr
+
+4:      tophys(r8,r11)
+#ifdef CONFIG_SMP
+        ori     r8,r8,0x12              /* R/W access, M=1 */
+#else
+        ori     r8,r8,2                 /* R/W access */
+#endif /* CONFIG_SMP */
+#ifdef CONFIG_APUS
+        ori     r11,r11,BL_8M<<2|0x2    /* set up 8MB BAT registers for 604 */
+#else
+        ori     r11,r11,BL_256M<<2|0x2  /* set up BAT registers for 604 */
+#endif /* CONFIG_APUS */
+
+        mtspr   SPRN_DBAT0L,r8          /* N.B. 6xx (not 601) have valid */
+        mtspr   SPRN_DBAT0U,r11         /* bit in upper BAT register */
+        mtspr   SPRN_IBAT0L,r8
+        mtspr   SPRN_IBAT0U,r11
+        isync
+        blr
+
+
+#ifdef CONFIG_8260
+/* Jump into the system reset for the rom.
+ * We first disable the MMU, and then jump to the ROM reset address.
+ *
+ * r3 is the board info structure, r4 is the location for starting.
+ * I use this for building a small kernel that can load other kernels,
+ * rather than trying to write or rely on a rom monitor that can tftp load.
+ */
+       .globl  m8260_gorom
+m8260_gorom:
+        mfmsr   r0
+        rlwinm  r0,r0,0,17,15   /* clear MSR_EE in r0 */
+        sync
+        mtmsr   r0
+        sync
+        mfspr   r11, SPRN_HID0
+        lis     r10, 0
+        ori     r10,r10,HID0_ICE|HID0_DCE
+        andc    r11, r11, r10
+        mtspr   SPRN_HID0, r11
+        isync
+        li      r5, MSR_ME|MSR_RI
+        lis     r6,2f@h
+        addis   r6,r6,-KERNELBASE@h
+        ori     r6,r6,2f@l
+        mtspr   SPRN_SRR0,r6
+        mtspr   SPRN_SRR1,r5
+        isync
+        sync
+        rfi
+2:
+        mtlr    r4
+        blr
+#endif
+
+
+/*
+ * We put a few things here that have to be page-aligned.
+ * This stuff goes at the beginning of the data segment,
+ * which is page-aligned.
+ */
+        .data
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
+        .space  4096
+
+        .globl  swapper_pg_dir
+swapper_pg_dir:
+        .space  4096
+
+/*
+ * This space gets a copy of optional info passed to us by the bootstrap
+ * Used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+        .globl  cmd_line
+cmd_line:
+        .space  512
+
+        .globl intercept_table
+intercept_table:
+        .long 0, 0, i0x200, i0x300, i0x400, 0, i0x600, i0x700
+        .long i0x800, 0, 0, 0, 0, i0xd00, 0, 0
+        .long 0, 0, 0, i0x1300, 0, 0, 0, 0
+        .long 0, 0, 0, 0, 0, 0, 0, 0
+        .long 0, 0, 0, 0, 0, 0, 0, 0
+        .long 0, 0, 0, 0, 0, 0, 0, 0
+
+/* Room for two PTE pointers, usually the kernel and current user pointers
+ * to their respective root page table.
+ */
+abatron_pteptrs:
+        .space  8
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
new file mode 100644
index 000000000000..8b49679fad54
--- /dev/null
+++ b/arch/powerpc/kernel/head_44x.S
@@ -0,0 +1,782 @@
+/*
+ * arch/ppc/kernel/head_44x.S
+ *
+ * Kernel execution entry point code.
+ *
+ *    Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
+ *      Initial PowerPC version.
+ *    Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *      Rewritten for PReP
+ *    Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
+ *      Low-level exception handers, MMU support, and rewrite.
+ *    Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
+ *      PowerPC 8xx modifications.
+ *    Copyright (c) 1998-1999 TiVo, Inc.
+ *      PowerPC 403GCX modifications.
+ *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
+ *      PowerPC 403GCX/405GP modifications.
+ *    Copyright 2000 MontaVista Software Inc.
+ *      PPC405 modifications
+ *      PowerPC 403GCX/405GP modifications.
+ *      Author: MontaVista Software, Inc.
+ *              frank_rowand@mvista.com or source@mvista.com
+ *              debbie_chu@mvista.com
+ *    Copyright 2002-2005 MontaVista Software, Inc.
+ *      PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/ibm4xx.h>
+#include <asm/ibm44x.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include "head_booke.h"
+
+
+/* As with the other PowerPC ports, it is expected that when code
+ * execution begins here, the following registers contain valid, yet
+ * optional, information:
+ *
+ *   r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
+ *   r4 - Starting address of the init RAM disk
+ *   r5 - Ending address of the init RAM disk
+ *   r6 - Start of kernel command line string (e.g. "mem=128")
+ *   r7 - End of kernel command line string
+ *
+ */
+        .text
+_GLOBAL(_stext)
+_GLOBAL(_start)
+        /*
+         * Reserve a word at a fixed location to store the address
+         * of abatron_pteptrs
+         */
+        nop
+/*
+ * Save parameters we are passed
+ */
+        mr      r31,r3
+        mr      r30,r4
+        mr      r29,r5
+        mr      r28,r6
+        mr      r27,r7
+        li      r24,0           /* CPU number */
+
+/*
+ * Set up the initial MMU state
+ *
+ * We are still executing code at the virtual address
+ * mappings set by the firmware for the base of RAM.
+ *
+ * We first invalidate all TLB entries but the one
+ * we are running from.  We then load the KERNELBASE
+ * mappings so we can begin to use kernel addresses
+ * natively and so the interrupt vector locations are
+ * permanently pinned (necessary since Book E
+ * implementations always have translation enabled).
+ *
+ * TODO: Use the known TLB entry we are running from to
+ *       determine which physical region we are located
+ *       in.  This can be used to determine where in RAM
+ *       (on a shared CPU system) or PCI memory space
+ *       (on a DRAMless system) we are located.
+ *       For now, we assume a perfect world which means
+ *       we are located at the base of DRAM (physical 0).
+ */
+
+/*
+ * Search TLB for entry that we are currently using.
+ * Invalidate all entries but the one we are using.
+ */
+        /* Load our current PID->MMUCR TID and MSR IS->MMUCR STS */
+        mfspr   r3,SPRN_PID                     /* Get PID */
+        mfmsr   r4                              /* Get MSR */
+        andi.   r4,r4,MSR_IS@l                  /* TS=1? */
+        beq     wmmucr                          /* If not, leave STS=0 */
+        oris    r3,r3,PPC44x_MMUCR_STS@h        /* Set STS=1 */
+wmmucr: mtspr   SPRN_MMUCR,r3                   /* Put MMUCR */
+        sync
+
+        bl      invstr                          /* Find our address */
+invstr: mflr    r5                              /* Make it accessible */
+        tlbsx   r23,0,r5                        /* Find entry we are in */
+        li      r4,0                            /* Start at TLB entry 0 */
+        li      r3,0                            /* Set PAGEID inval value */
+1:      cmpw    r23,r4                          /* Is this our entry? */
+        beq     skpinv                          /* If so, skip the inval */
+        tlbwe   r3,r4,PPC44x_TLB_PAGEID         /* If not, inval the entry */
+skpinv: addi    r4,r4,1                         /* Increment */
+        cmpwi   r4,64                           /* Are we done? */
+        bne     1b                              /* If not, repeat */
+        isync                                   /* If so, context change */
+
+/*
+ * Configure and load pinned entry into TLB slot 63.
+ */
+
+        lis     r3,KERNELBASE@h         /* Load the kernel virtual address */
+        ori     r3,r3,KERNELBASE@l
+
+        /* Kernel is at the base of RAM */
+        li r4, 0                        /* Load the kernel physical address */
+
+        /* Load the kernel PID = 0 */
+        li      r0,0
+        mtspr   SPRN_PID,r0
+        sync
+
+        /* Initialize MMUCR */
+        li      r5,0
+        mtspr   SPRN_MMUCR,r5
+        sync
+
+        /* pageid fields */
+        clrrwi  r3,r3,10                /* Mask off the effective page number */
+        ori     r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M
+
+        /* xlat fields */
+        clrrwi  r4,r4,10                /* Mask off the real page number */
+                                        /* ERPN is 0 for first 4GB page */
+
+        /* attrib fields */
+        /* Added guarded bit to protect against speculative loads/stores */
+        li      r5,0
+        ori     r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G)
+
+        li      r0,63                    /* TLB slot 63 */
+
+        tlbwe   r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
+        tlbwe   r4,r0,PPC44x_TLB_XLAT   /* Load the translation fields */
+        tlbwe   r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */
+
+        /* Force context change */
+        mfmsr   r0
+        mtspr   SPRN_SRR1, r0
+        lis     r0,3f@h
+        ori     r0,r0,3f@l
+        mtspr   SPRN_SRR0,r0
+        sync
+        rfi
+
+        /* If necessary, invalidate original entry we used */
+3:      cmpwi   r23,63
+        beq     4f
+        li      r6,0
+        tlbwe   r6,r23,PPC44x_TLB_PAGEID
+        isync
+
+4:
+#ifdef CONFIG_SERIAL_TEXT_DEBUG
+        /*
+         * Add temporary UART mapping for early debug.
+         * We can map UART registers wherever we want as long as they don't
+         * interfere with other system mappings (e.g. with pinned entries).
+         * For an example of how we handle this - see ocotea.h.       --ebs
+         */
+        /* pageid fields */
+        lis     r3,UART0_IO_BASE@h
+        ori     r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K
+
+        /* xlat fields */
+        lis     r4,UART0_PHYS_IO_BASE@h         /* RPN depends on SoC */
+#ifndef CONFIG_440EP
+        ori     r4,r4,0x0001            /* ERPN is 1 for second 4GB page */
+#endif
+
+        /* attrib fields */
+        li      r5,0
+        ori     r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
+
+        li      r0,0                    /* TLB slot 0 */
+
+        tlbwe   r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
+        tlbwe   r4,r0,PPC44x_TLB_XLAT   /* Load the translation fields */
+        tlbwe   r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */
+
+        /* Force context change */
+        isync
+#endif /* CONFIG_SERIAL_TEXT_DEBUG */
+
+        /* Establish the interrupt vector offsets */
+        SET_IVOR(0,  CriticalInput);
+        SET_IVOR(1,  MachineCheck);
+        SET_IVOR(2,  DataStorage);
+        SET_IVOR(3,  InstructionStorage);
+        SET_IVOR(4,  ExternalInput);
+        SET_IVOR(5,  Alignment);
+        SET_IVOR(6,  Program);
+        SET_IVOR(7,  FloatingPointUnavailable);
+        SET_IVOR(8,  SystemCall);
+        SET_IVOR(9,  AuxillaryProcessorUnavailable);
+        SET_IVOR(10, Decrementer);
+        SET_IVOR(11, FixedIntervalTimer);
+        SET_IVOR(12, WatchdogTimer);
+        SET_IVOR(13, DataTLBError);
+        SET_IVOR(14, InstructionTLBError);
+        SET_IVOR(15, Debug);
+
+        /* Establish the interrupt vector base */
+        lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
+        mtspr   SPRN_IVPR,r4
+
+#ifdef CONFIG_440EP
+        /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
+        mfspr   r2,SPRN_CCR0
+        lis     r3,0xffef
+        ori     r3,r3,0xffff
+        and     r2,r2,r3
+        mtspr   SPRN_CCR0,r2
+        isync
+#endif
+
+        /*
+         * This is where the main kernel code starts.
+         */
+
+        /* ptr to current */
+        lis     r2,init_task@h
+        ori     r2,r2,init_task@l
+
+        /* ptr to current thread */
+        addi    r4,r2,THREAD    /* init task's THREAD */
+        mtspr   SPRN_SPRG3,r4
+
+        /* stack */
+        lis     r1,init_thread_union@h
+        ori     r1,r1,init_thread_union@l
+        li      r0,0
+        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+
+        bl      early_init
+
+/*
+ * Decide what sort of machine this is and initialize the MMU.
+ */
+        mr      r3,r31
+        mr      r4,r30
+        mr      r5,r29
+        mr      r6,r28
+        mr      r7,r27
+        bl      machine_init
+        bl      MMU_init
+
+        /* Setup PTE pointers for the Abatron bdiGDB */
+        lis     r6, swapper_pg_dir@h
+        ori     r6, r6, swapper_pg_dir@l
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        lis     r4, KERNELBASE@h
+        ori     r4, r4, KERNELBASE@l
+        stw     r5, 0(r4)       /* Save abatron_pteptrs at a fixed location */
+        stw     r6, 0(r5)
+
+        /* Let's move on */
+        lis     r4,start_kernel@h
+        ori     r4,r4,start_kernel@l
+        lis     r3,MSR_KERNEL@h
+        ori     r3,r3,MSR_KERNEL@l
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        rfi                     /* change context and jump to start_kernel */
+
+/*
+ * Interrupt vector entry code
+ *
+ * The Book E MMUs are always on so we don't need to handle
+ * interrupts in real mode as with previous PPC processors. In
+ * this case we handle interrupts in the kernel virtual address
+ * space.
+ *
+ * Interrupt vectors are dynamically placed relative to the
+ * interrupt prefix as determined by the address of interrupt_base.
+ * The interrupt vectors offsets are programmed using the labels
+ * for each interrupt vector entry.
+ *
+ * Interrupt vectors must be aligned on a 16 byte boundary.
+ * We align on a 32 byte cache line boundary for good measure.
+ */
+
+interrupt_base:
+        /* Critical Input Interrupt */
+        CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
+
+        /* Machine Check Interrupt */
+#ifdef CONFIG_440A
+        MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
+#else
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
+#endif
+
+        /* Data Storage Interrupt */
+        START_EXCEPTION(DataStorage)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+        mtspr   SPRN_SPRG4W, r12
+        mtspr   SPRN_SPRG5W, r13
+        mfcr    r11
+        mtspr   SPRN_SPRG7W, r11
+
+        /*
+         * Check if it was a store fault, if not then bail
+         * because a user tried to access a kernel or
+         * read-protected page.  Otherwise, get the
+         * offending address and handle it.
+         */
+        mfspr   r10, SPRN_ESR
+        andis.  r10, r10, ESR_ST@h
+        beq     2f
+
+        mfspr   r10, SPRN_DEAR          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        cmplw   r10, r11
+        blt+    3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+
+        mfspr   r12,SPRN_MMUCR
+        rlwinm  r12,r12,0,0,23          /* Clear TID */
+
+        b       4f
+
+        /* Get the PGD for the current thread */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+
+        /* Load PID into MMUCR TID */
+        mfspr   r12,SPRN_MMUCR          /* Get MMUCR */
+        mfspr   r13,SPRN_PID            /* Get PID */
+        rlwimi  r12,r13,0,24,31         /* Set TID */
+
+4:
+        mtspr   SPRN_MMUCR,r12
+
+        rlwinm  r12, r10, 13, 19, 29    /* Compute pgdir/pmd offset */
+        lwzx    r11, r12, r11           /* Get pgd/pmd entry */
+        rlwinm. r12, r11, 0, 0, 20      /* Extract pt base address */
+        beq     2f                      /* Bail if no table */
+
+        rlwimi  r12, r10, 23, 20, 28    /* Compute pte address */
+        lwz     r11, 4(r12)             /* Get pte entry */
+
+        andi.   r13, r11, _PAGE_RW      /* Is it writeable? */
+        beq     2f                      /* Bail if not */
+
+        /* Update 'changed'.
+        */
+        ori     r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+        stw     r11, 4(r12)             /* Update Linux page table */
+
+        li      r13, PPC44x_TLB_SR@l    /* Set SR */
+        rlwimi  r13, r11, 29, 29, 29    /* SX = _PAGE_HWEXEC */
+        rlwimi  r13, r11, 0, 30, 30     /* SW = _PAGE_RW */
+        rlwimi  r13, r11, 29, 28, 28    /* UR = _PAGE_USER */
+        rlwimi  r12, r11, 31, 26, 26    /* (_PAGE_USER>>1)->r12 */
+        rlwimi  r12, r11, 29, 30, 30    /* (_PAGE_USER>>3)->r12 */
+        and     r12, r12, r11           /* HWEXEC/RW & USER */
+        rlwimi  r13, r12, 0, 26, 26     /* UX = HWEXEC & USER */
+        rlwimi  r13, r12, 3, 27, 27     /* UW = RW & USER */
+
+        rlwimi  r11,r13,0,26,31         /* Insert static perms */
+
+        rlwinm  r11,r11,0,20,15         /* Clear U0-U3 */
+
+        /* find the TLB index that caused the fault.  It has to be here. */
+        tlbsx   r10, 0, r10
+
+        tlbwe   r11, r10, PPC44x_TLB_ATTRIB     /* Write ATTRIB */
+
+        /* Done...restore registers and get out of here.
+        */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        rfi                     /* Force context change */
+
+2:
+        /*
+         * The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       data_access
+
+        /* Instruction Storage Interrupt */
+        INSTRUCTION_STORAGE_EXCEPTION
+
+        /* External Input Interrupt */
+        EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)
+
+        /* Alignment Interrupt */
+        ALIGNMENT_EXCEPTION
+
+        /* Program Interrupt */
+        PROGRAM_EXCEPTION
+
+        /* Floating Point Unavailable Interrupt */
+#ifdef CONFIG_PPC_FPU
+        FP_UNAVAILABLE_EXCEPTION
+#else
+        EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
+#endif
+
+        /* System Call Interrupt */
+        START_EXCEPTION(SystemCall)
+        NORMAL_EXCEPTION_PROLOG
+        EXC_XFER_EE_LITE(0x0c00, DoSyscall)
+
+        /* Auxillary Processor Unavailable Interrupt */
+        EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
+
+        /* Decrementer Interrupt */
+        DECREMENTER_EXCEPTION
+
+        /* Fixed Internal Timer Interrupt */
+        /* TODO: Add FIT support */
+        EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
+
+        /* Watchdog Timer Interrupt */
+        /* TODO: Add watchdog support */
+#ifdef CONFIG_BOOKE_WDT
+        CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
+#else
+        CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
+#endif
+
+        /* Data TLB Error Interrupt */
+        START_EXCEPTION(DataTLBError)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+        mtspr   SPRN_SPRG4W, r12
+        mtspr   SPRN_SPRG5W, r13
+        mfcr    r11
+        mtspr   SPRN_SPRG7W, r11
+        mfspr   r10, SPRN_DEAR          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        cmplw   r10, r11
+        blt+    3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+
+        mfspr   r12,SPRN_MMUCR
+        rlwinm  r12,r12,0,0,23          /* Clear TID */
+
+        b       4f
+
+        /* Get the PGD for the current thread */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+
+        /* Load PID into MMUCR TID */
+        mfspr   r12,SPRN_MMUCR
+        mfspr   r13,SPRN_PID            /* Get PID */
+        rlwimi  r12,r13,0,24,31         /* Set TID */
+
+4:
+        mtspr   SPRN_MMUCR,r12
+
+        rlwinm  r12, r10, 13, 19, 29    /* Compute pgdir/pmd offset */
+        lwzx    r11, r12, r11           /* Get pgd/pmd entry */
+        rlwinm. r12, r11, 0, 0, 20      /* Extract pt base address */
+        beq     2f                      /* Bail if no table */
+
+        rlwimi  r12, r10, 23, 20, 28    /* Compute pte address */
+        lwz     r11, 4(r12)             /* Get pte entry */
+        andi.   r13, r11, _PAGE_PRESENT /* Is the page present? */
+        beq     2f                      /* Bail if not present */
+
+        ori     r11, r11, _PAGE_ACCESSED
+        stw     r11, 4(r12)
+
+         /* Jump to common tlb load */
+        b       finish_tlb_load
+
+2:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       data_access
+
+        /* Instruction TLB Error Interrupt */
+        /*
+         * Nearly the same as above, except we get our
+         * information from different registers and bailout
+         * to a different point.
+         */
+        START_EXCEPTION(InstructionTLBError)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+        mtspr   SPRN_SPRG4W, r12
+        mtspr   SPRN_SPRG5W, r13
+        mfcr    r11
+        mtspr   SPRN_SPRG7W, r11
+        mfspr   r10, SPRN_SRR0          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        cmplw   r10, r11
+        blt+    3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+
+        mfspr   r12,SPRN_MMUCR
+        rlwinm  r12,r12,0,0,23          /* Clear TID */
+
+        b       4f
+
+        /* Get the PGD for the current thread */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+
+        /* Load PID into MMUCR TID */
+        mfspr   r12,SPRN_MMUCR
+        mfspr   r13,SPRN_PID            /* Get PID */
+        rlwimi  r12,r13,0,24,31         /* Set TID */
+
+4:
+        mtspr   SPRN_MMUCR,r12
+
+        rlwinm  r12, r10, 13, 19, 29    /* Compute pgdir/pmd offset */
+        lwzx    r11, r12, r11           /* Get pgd/pmd entry */
+        rlwinm. r12, r11, 0, 0, 20      /* Extract pt base address */
+        beq     2f                      /* Bail if no table */
+
+        rlwimi  r12, r10, 23, 20, 28    /* Compute pte address */
+        lwz     r11, 4(r12)             /* Get pte entry */
+        andi.   r13, r11, _PAGE_PRESENT /* Is the page present? */
+        beq     2f                      /* Bail if not present */
+
+        ori     r11, r11, _PAGE_ACCESSED
+        stw     r11, 4(r12)
+
+        /* Jump to common TLB load point */
+        b       finish_tlb_load
+
+2:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       InstructionStorage
+
+        /* Debug Interrupt */
+        DEBUG_EXCEPTION
+
+/*
+ * Local functions
+ */
+        /*
+         * Data TLB exceptions will bail out to this point
+         * if they can't resolve the lightweight TLB fault.
+         */
+data_access:
+        NORMAL_EXCEPTION_PROLOG
+        mfspr   r5,SPRN_ESR             /* Grab the ESR, save it, pass arg3 */
+        stw     r5,_ESR(r11)
+        mfspr   r4,SPRN_DEAR            /* Grab the DEAR, save it, pass arg2 */
+        EXC_XFER_EE_LITE(0x0300, handle_page_fault)
+
+/*
+
+ * Both the instruction and data TLB miss get to this
+ * point to load the TLB.
+ *      r10 - EA of fault
+ *      r11 - available to use
+ *      r12 - Pointer to the 64-bit PTE
+ *      r13 - available to use
+ *      MMUCR - loaded with proper value when we get here
+ *      Upon exit, we reload everything and RFI.
+ */
+finish_tlb_load:
+        /*
+         * We set execute, because we don't have the granularity to
+         * properly set this at the page level (Linux problem).
+         * If shared is set, we cause a zero PID->TID load.
+         * Many of these bits are software only.  Bits we don't set
+         * here we (properly should) assume have the appropriate value.
+         */
+
+        /* Load the next available TLB index */
+        lis     r13, tlb_44x_index@ha
+        lwz     r13, tlb_44x_index@l(r13)
+        /* Load the TLB high watermark */
+        lis     r11, tlb_44x_hwater@ha
+        lwz     r11, tlb_44x_hwater@l(r11)
+
+        /* Increment, rollover, and store TLB index */
+        addi    r13, r13, 1
+        cmpw    0, r13, r11                     /* reserve entries */
+        ble     7f
+        li      r13, 0
+7:
+        /* Store the next available TLB index */
+        lis     r11, tlb_44x_index@ha
+        stw     r13, tlb_44x_index@l(r11)
+
+        lwz     r11, 0(r12)                     /* Get MS word of PTE */
+        lwz     r12, 4(r12)                     /* Get LS word of PTE */
+        rlwimi  r11, r12, 0, 0 , 19             /* Insert RPN */
+        tlbwe   r11, r13, PPC44x_TLB_XLAT       /* Write XLAT */
+
+        /*
+         * Create PAGEID. This is the faulting address,
+         * page size, and valid flag.
+         */
+        li      r11, PPC44x_TLB_VALID | PPC44x_TLB_4K
+        rlwimi  r10, r11, 0, 20, 31             /* Insert valid and page size */
+        tlbwe   r10, r13, PPC44x_TLB_PAGEID     /* Write PAGEID */
+
+        li      r10, PPC44x_TLB_SR@l            /* Set SR */
+        rlwimi  r10, r12, 0, 30, 30             /* Set SW = _PAGE_RW */
+        rlwimi  r10, r12, 29, 29, 29            /* SX = _PAGE_HWEXEC */
+        rlwimi  r10, r12, 29, 28, 28            /* UR = _PAGE_USER */
+        rlwimi  r11, r12, 31, 26, 26            /* (_PAGE_USER>>1)->r12 */
+        and     r11, r12, r11                   /* HWEXEC & USER */
+        rlwimi  r10, r11, 0, 26, 26             /* UX = HWEXEC & USER */
+
+        rlwimi  r12, r10, 0, 26, 31             /* Insert static perms */
+        rlwinm  r12, r12, 0, 20, 15             /* Clear U0-U3 */
+        tlbwe   r12, r13, PPC44x_TLB_ATTRIB     /* Write ATTRIB */
+
+        /* Done...restore registers and get out of here.
+        */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        rfi                                     /* Force context change */
+
+/*
+ * Global functions
+ */
+
+/*
+ * extern void giveup_altivec(struct task_struct *prev)
+ *
+ * The 44x core does not have an AltiVec unit.
+ */
+_GLOBAL(giveup_altivec)
+        blr
+
+/*
+ * extern void giveup_fpu(struct task_struct *prev)
+ *
+ * The 44x core does not have an FPU.
+ */
+#ifndef CONFIG_PPC_FPU
+_GLOBAL(giveup_fpu)
+        blr
+#endif
+
+/*
+ * extern void abort(void)
+ *
+ * At present, this routine just applies a system reset.
+ */
+_GLOBAL(abort)
+        mfspr   r13,SPRN_DBCR0
+        oris    r13,r13,DBCR0_RST_SYSTEM@h
+        mtspr   SPRN_DBCR0,r13
+
+_GLOBAL(set_context)
+
+#ifdef CONFIG_BDI_SWITCH
+        /* Context switch the PTE pointer for the Abatron BDI2000.
+         * The PGDIR is the second parameter.
+         */
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        stw     r4, 0x4(r5)
+#endif
+        mtspr   SPRN_PID,r3
+        isync                   /* Force context change */
+        blr
+
+/*
+ * We put a few things here that have to be page-aligned. This stuff
+ * goes at the beginning of the data segment, which is page-aligned.
+ */
+        .data
+        .align  12
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
+        .space  4096
+
+/*
+ * To support >32-bit physical addresses, we use an 8KB pgdir.
+ */
+        .globl  swapper_pg_dir
+swapper_pg_dir:
+        .space  8192
+
+/* Reserved 4k for the critical exception stack & 4k for the machine
+ * check stack per CPU for kernel mode exceptions */
+        .section .bss
+        .align 12
+exception_stack_bottom:
+        .space  BOOKE_EXCEPTION_STACK_SIZE
+        .globl  exception_stack_top
+exception_stack_top:
+
+/*
+ * This space gets a copy of optional info passed to us by the bootstrap
+ * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+        .globl  cmd_line
+cmd_line:
+        .space  512
+
+/*
+ * Room for two PTE pointers, usually the kernel and current user pointers
+ * to their respective root page table.
+ */
+abatron_pteptrs:
+        .space  8
diff --git a/arch/powerpc/kernel/head_4xx.S b/arch/powerpc/kernel/head_4xx.S
new file mode 100644
index 000000000000..2590e97f5539
--- /dev/null
+++ b/arch/powerpc/kernel/head_4xx.S
@@ -0,0 +1,1022 @@
+/*
+ *    Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
+ *      Initial PowerPC version.
+ *    Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *      Rewritten for PReP
+ *    Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
+ *      Low-level exception handers, MMU support, and rewrite.
+ *    Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
+ *      PowerPC 8xx modifications.
+ *    Copyright (c) 1998-1999 TiVo, Inc.
+ *      PowerPC 403GCX modifications.
+ *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
+ *      PowerPC 403GCX/405GP modifications.
+ *    Copyright 2000 MontaVista Software Inc.
+ *      PPC405 modifications
+ *      PowerPC 403GCX/405GP modifications.
+ *      Author: MontaVista Software, Inc.
+ *              frank_rowand@mvista.com or source@mvista.com
+ *              debbie_chu@mvista.com
+ *
+ *
+ *    Module name: head_4xx.S
+ *
+ *    Description:
+ *      Kernel execution entry point code.
+ *
+ *    This program is free software; you can redistribute it and/or
+ *    modify it under the terms of the GNU General Public License
+ *    as published by the Free Software Foundation; either version
+ *    2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/ibm4xx.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+/* As with the other PowerPC ports, it is expected that when code
+ * execution begins here, the following registers contain valid, yet
+ * optional, information:
+ *
+ *   r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
+ *   r4 - Starting address of the init RAM disk
+ *   r5 - Ending address of the init RAM disk
+ *   r6 - Start of kernel command line string (e.g. "mem=96m")
+ *   r7 - End of kernel command line string
+ *
+ * This is all going to change RSN when we add bi_recs.......  -- Dan
+ */
+        .text
+_GLOBAL(_stext)
+_GLOBAL(_start)
+
+        /* Save parameters we are passed.
+        */
+        mr      r31,r3
+        mr      r30,r4
+        mr      r29,r5
+        mr      r28,r6
+        mr      r27,r7
+
+        /* We have to turn on the MMU right away so we get cache modes
+         * set correctly.
+         */
+        bl      initial_mmu
+
+/* We now have the lower 16 Meg mapped into TLB entries, and the caches
+ * ready to work.
+ */
+turn_on_mmu:
+        lis     r0,MSR_KERNEL@h
+        ori     r0,r0,MSR_KERNEL@l
+        mtspr   SPRN_SRR1,r0
+        lis     r0,start_here@h
+        ori     r0,r0,start_here@l
+        mtspr   SPRN_SRR0,r0
+        SYNC
+        rfi                             /* enables MMU */
+        b       .                       /* prevent prefetch past rfi */
+
+/*
+ * This area is used for temporarily saving registers during the
+ * critical exception prolog.
+ */
+        . = 0xc0
+crit_save:
+_GLOBAL(crit_r10)
+        .space  4
+_GLOBAL(crit_r11)
+        .space  4
+
+/*
+ * Exception vector entry code. This code runs with address translation
+ * turned off (i.e. using physical addresses). We assume SPRG3 has the
+ * physical address of the current task thread_struct.
+ * Note that we have to have decremented r1 before we write to any fields
+ * of the exception frame, since a critical interrupt could occur at any
+ * time, and it will write to the area immediately below the current r1.
+ */
+#define NORMAL_EXCEPTION_PROLOG                                              \
+        mtspr   SPRN_SPRG0,r10;         /* save two registers to work with */\
+        mtspr   SPRN_SPRG1,r11;                                              \
+        mtspr   SPRN_SPRG2,r1;                                               \
+        mfcr    r10;                    /* save CR in r10 for now          */\
+        mfspr   r11,SPRN_SRR1;          /* check whether user or kernel    */\
+        andi.   r11,r11,MSR_PR;                                              \
+        beq     1f;                                                          \
+        mfspr   r1,SPRN_SPRG3;          /* if from user, start at top of   */\
+        lwz     r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack   */\
+        addi    r1,r1,THREAD_SIZE;                                           \
+1:      subi    r1,r1,INT_FRAME_SIZE;   /* Allocate an exception frame     */\
+        tophys(r11,r1);                                                      \
+        stw     r10,_CCR(r11);          /* save various registers          */\
+        stw     r12,GPR12(r11);                                              \
+        stw     r9,GPR9(r11);                                                \
+        mfspr   r10,SPRN_SPRG0;                                              \
+        stw     r10,GPR10(r11);                                              \
+        mfspr   r12,SPRN_SPRG1;                                              \
+        stw     r12,GPR11(r11);                                              \
+        mflr    r10;                                                         \
+        stw     r10,_LINK(r11);                                              \
+        mfspr   r10,SPRN_SPRG2;                                              \
+        mfspr   r12,SPRN_SRR0;                                               \
+        stw     r10,GPR1(r11);                                               \
+        mfspr   r9,SPRN_SRR1;                                                \
+        stw     r10,0(r11);                                                  \
+        rlwinm  r9,r9,0,14,12;          /* clear MSR_WE (necessary?)       */\
+        stw     r0,GPR0(r11);                                                \
+        SAVE_4GPRS(3, r11);                                                  \
+        SAVE_2GPRS(7, r11)
+
+/*
+ * Exception prolog for critical exceptions.  This is a little different
+ * from the normal exception prolog above since a critical exception
+ * can potentially occur at any point during normal exception processing.
+ * Thus we cannot use the same SPRG registers as the normal prolog above.
+ * Instead we use a couple of words of memory at low physical addresses.
+ * This is OK since we don't support SMP on these processors.
+ */
+#define CRITICAL_EXCEPTION_PROLOG                                            \
+        stw     r10,crit_r10@l(0);      /* save two registers to work with */\
+        stw     r11,crit_r11@l(0);                                           \
+        mfcr    r10;                    /* save CR in r10 for now          */\
+        mfspr   r11,SPRN_SRR3;          /* check whether user or kernel    */\
+        andi.   r11,r11,MSR_PR;                                              \
+        lis     r11,critical_stack_top@h;                                    \
+        ori     r11,r11,critical_stack_top@l;                                \
+        beq     1f;                                                          \
+        /* COMING FROM USER MODE */                                          \
+        mfspr   r11,SPRN_SPRG3;         /* if from user, start at top of   */\
+        lwz     r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
+        addi    r11,r11,THREAD_SIZE;                                         \
+1:      subi    r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame     */\
+        tophys(r11,r11);                                                     \
+        stw     r10,_CCR(r11);          /* save various registers          */\
+        stw     r12,GPR12(r11);                                              \
+        stw     r9,GPR9(r11);                                                \
+        mflr    r10;                                                         \
+        stw     r10,_LINK(r11);                                              \
+        mfspr   r12,SPRN_DEAR;          /* save DEAR and ESR in the frame  */\
+        stw     r12,_DEAR(r11);         /* since they may have had stuff   */\
+        mfspr   r9,SPRN_ESR;            /* in them at the point where the  */\
+        stw     r9,_ESR(r11);           /* exception was taken             */\
+        mfspr   r12,SPRN_SRR2;                                               \
+        stw     r1,GPR1(r11);                                                \
+        mfspr   r9,SPRN_SRR3;                                                \
+        stw     r1,0(r11);                                                   \
+        tovirt(r1,r11);                                                      \
+        rlwinm  r9,r9,0,14,12;          /* clear MSR_WE (necessary?)       */\
+        stw     r0,GPR0(r11);                                                \
+        SAVE_4GPRS(3, r11);                                                  \
+        SAVE_2GPRS(7, r11)
+
+        /*
+         * State at this point:
+         * r9 saved in stack frame, now saved SRR3 & ~MSR_WE
+         * r10 saved in crit_r10 and in stack frame, trashed
+         * r11 saved in crit_r11 and in stack frame,
+         *      now phys stack/exception frame pointer
+         * r12 saved in stack frame, now saved SRR2
+         * CR saved in stack frame, CR0.EQ = !SRR3.PR
+         * LR, DEAR, ESR in stack frame
+         * r1 saved in stack frame, now virt stack/excframe pointer
+         * r0, r3-r8 saved in stack frame
+         */
+
+/*
+ * Exception vectors.
+ */
+#define START_EXCEPTION(n, label)                                            \
+        . = n;                                                               \
+label:
+
+#define EXCEPTION(n, label, hdlr, xfer)                         \
+        START_EXCEPTION(n, label);                              \
+        NORMAL_EXCEPTION_PROLOG;                                \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
+        xfer(n, hdlr)
+
+#define CRITICAL_EXCEPTION(n, label, hdlr)                      \
+        START_EXCEPTION(n, label);                              \
+        CRITICAL_EXCEPTION_PROLOG;                              \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
+        EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
+                          NOCOPY, crit_transfer_to_handler,     \
+                          ret_from_crit_exc)
+
+#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret)   \
+        li      r10,trap;                                       \
+        stw     r10,_TRAP(r11);                                 \
+        lis     r10,msr@h;                                      \
+        ori     r10,r10,msr@l;                                  \
+        copyee(r10, r9);                                        \
+        bl      tfer;                                           \
+        .long   hdlr;                                           \
+        .long   ret
+
+#define COPY_EE(d, s)           rlwimi d,s,0,16,16
+#define NOCOPY(d, s)
+
+#define EXC_XFER_STD(n, hdlr)           \
+        EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
+                          ret_from_except_full)
+
+#define EXC_XFER_LITE(n, hdlr)          \
+        EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
+                          ret_from_except)
+
+#define EXC_XFER_EE(n, hdlr)            \
+        EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
+                          ret_from_except_full)
+
+#define EXC_XFER_EE_LITE(n, hdlr)       \
+        EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
+                          ret_from_except)
+
+
+/*
+ * 0x0100 - Critical Interrupt Exception
+ */
+        CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
+
+/*
+ * 0x0200 - Machine Check Exception
+ */
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
+
+/*
+ * 0x0300 - Data Storage Exception
+ * This happens for just a few reasons.  U0 set (but we don't do that),
+ * or zone protection fault (user violation, write to protected page).
+ * If this is just an update of modified status, we do that quickly
+ * and exit.  Otherwise, we call heavywight functions to do the work.
+ */
+        START_EXCEPTION(0x0300, DataStorage)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+#ifdef CONFIG_403GCX
+        stw     r12, 0(r0)
+        stw     r9, 4(r0)
+        mfcr    r11
+        mfspr   r12, SPRN_PID
+        stw     r11, 8(r0)
+        stw     r12, 12(r0)
+#else
+        mtspr   SPRN_SPRG4, r12
+        mtspr   SPRN_SPRG5, r9
+        mfcr    r11
+        mfspr   r12, SPRN_PID
+        mtspr   SPRN_SPRG7, r11
+        mtspr   SPRN_SPRG6, r12
+#endif
+
+        /* First, check if it was a zone fault (which means a user
+        * tried to access a kernel or read-protected page - always
+        * a SEGV).  All other faults here must be stores, so no
+        * need to check ESR_DST as well. */
+        mfspr   r10, SPRN_ESR
+        andis.  r10, r10, ESR_DIZ@h
+        bne     2f
+
+        mfspr   r10, SPRN_DEAR          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        cmplw   r10, r11
+        blt+    3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+        li      r9, 0
+        mtspr   SPRN_PID, r9            /* TLB will have 0 TID */
+        b       4f
+
+        /* Get the PGD for the current thread.
+         */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+4:
+        tophys(r11, r11)
+        rlwimi  r11, r10, 12, 20, 29    /* Create L1 (pgdir/pmd) address */
+        lwz     r11, 0(r11)             /* Get L1 entry */
+        rlwinm. r12, r11, 0, 0, 19      /* Extract L2 (pte) base address */
+        beq     2f                      /* Bail if no table */
+
+        rlwimi  r12, r10, 22, 20, 29    /* Compute PTE address */
+        lwz     r11, 0(r12)             /* Get Linux PTE */
+
+        andi.   r9, r11, _PAGE_RW       /* Is it writeable? */
+        beq     2f                      /* Bail if not */
+
+        /* Update 'changed'.
+        */
+        ori     r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+        stw     r11, 0(r12)             /* Update Linux page table */
+
+        /* Most of the Linux PTE is ready to load into the TLB LO.
+         * We set ZSEL, where only the LS-bit determines user access.
+         * We set execute, because we don't have the granularity to
+         * properly set this at the page level (Linux problem).
+         * If shared is set, we cause a zero PID->TID load.
+         * Many of these bits are software only.  Bits we don't set
+         * here we (properly should) assume have the appropriate value.
+         */
+        li      r12, 0x0ce2
+        andc    r11, r11, r12           /* Make sure 20, 21 are zero */
+
+        /* find the TLB index that caused the fault.  It has to be here.
+        */
+        tlbsx   r9, 0, r10
+
+        tlbwe   r11, r9, TLB_DATA               /* Load TLB LO */
+
+        /* Done...restore registers and get out of here.
+        */
+#ifdef CONFIG_403GCX
+        lwz     r12, 12(r0)
+        lwz     r11, 8(r0)
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        lwz     r9, 4(r0)
+        lwz     r12, 0(r0)
+#else
+        mfspr   r12, SPRN_SPRG6
+        mfspr   r11, SPRN_SPRG7
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        mfspr   r9, SPRN_SPRG5
+        mfspr   r12, SPRN_SPRG4
+#endif
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        PPC405_ERR77_SYNC
+        rfi                     /* Should sync shadow TLBs */
+        b       .               /* prevent prefetch past rfi */
+
+2:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+#ifdef CONFIG_403GCX
+        lwz     r12, 12(r0)
+        lwz     r11, 8(r0)
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        lwz     r9, 4(r0)
+        lwz     r12, 0(r0)
+#else
+        mfspr   r12, SPRN_SPRG6
+        mfspr   r11, SPRN_SPRG7
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        mfspr   r9, SPRN_SPRG5
+        mfspr   r12, SPRN_SPRG4
+#endif
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       DataAccess
+
+/*
+ * 0x0400 - Instruction Storage Exception
+ * This is caused by a fetch from non-execute or guarded pages.
+ */
+        START_EXCEPTION(0x0400, InstructionAccess)
+        NORMAL_EXCEPTION_PROLOG
+        mr      r4,r12                  /* Pass SRR0 as arg2 */
+        li      r5,0                    /* Pass zero as arg3 */
+        EXC_XFER_EE_LITE(0x400, handle_page_fault)
+
+/* 0x0500 - External Interrupt Exception */
+        EXCEPTION(0x0500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
+
+/* 0x0600 - Alignment Exception */
+        START_EXCEPTION(0x0600, Alignment)
+        NORMAL_EXCEPTION_PROLOG
+        mfspr   r4,SPRN_DEAR            /* Grab the DEAR and save it */
+        stw     r4,_DEAR(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE(0x600, alignment_exception)
+
+/* 0x0700 - Program Exception */
+        START_EXCEPTION(0x0700, ProgramCheck)
+        NORMAL_EXCEPTION_PROLOG
+        mfspr   r4,SPRN_ESR             /* Grab the ESR and save it */
+        stw     r4,_ESR(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_STD(0x700, program_check_exception)
+
+        EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
+
+/* 0x0C00 - System Call Exception */
+        START_EXCEPTION(0x0C00, SystemCall)
+        NORMAL_EXCEPTION_PROLOG
+        EXC_XFER_EE_LITE(0xc00, DoSyscall)
+
+        EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
+
+/* 0x1000 - Programmable Interval Timer (PIT) Exception */
+        START_EXCEPTION(0x1000, Decrementer)
+        NORMAL_EXCEPTION_PROLOG
+        lis     r0,TSR_PIS@h
+        mtspr   SPRN_TSR,r0             /* Clear the PIT exception */
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_LITE(0x1000, timer_interrupt)
+
+#if 0
+/* NOTE:
+ * FIT and WDT handlers are not implemented yet.
+ */
+
+/* 0x1010 - Fixed Interval Timer (FIT) Exception
+*/
+        STND_EXCEPTION(0x1010,  FITException,           unknown_exception)
+
+/* 0x1020 - Watchdog Timer (WDT) Exception
+*/
+#ifdef CONFIG_BOOKE_WDT
+        CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
+#else
+        CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
+#endif
+#endif
+
+/* 0x1100 - Data TLB Miss Exception
+ * As the name implies, translation is not in the MMU, so search the
+ * page tables and fix it.  The only purpose of this function is to
+ * load TLB entries from the page table if they exist.
+ */
+        START_EXCEPTION(0x1100, DTLBMiss)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+#ifdef CONFIG_403GCX
+        stw     r12, 0(r0)
+        stw     r9, 4(r0)
+        mfcr    r11
+        mfspr   r12, SPRN_PID
+        stw     r11, 8(r0)
+        stw     r12, 12(r0)
+#else
+        mtspr   SPRN_SPRG4, r12
+        mtspr   SPRN_SPRG5, r9
+        mfcr    r11
+        mfspr   r12, SPRN_PID
+        mtspr   SPRN_SPRG7, r11
+        mtspr   SPRN_SPRG6, r12
+#endif
+        mfspr   r10, SPRN_DEAR          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        cmplw   r10, r11
+        blt+    3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+        li      r9, 0
+        mtspr   SPRN_PID, r9            /* TLB will have 0 TID */
+        b       4f
+
+        /* Get the PGD for the current thread.
+         */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+4:
+        tophys(r11, r11)
+        rlwimi  r11, r10, 12, 20, 29    /* Create L1 (pgdir/pmd) address */
+        lwz     r12, 0(r11)             /* Get L1 entry */
+        andi.   r9, r12, _PMD_PRESENT   /* Check if it points to a PTE page */
+        beq     2f                      /* Bail if no table */
+
+        rlwimi  r12, r10, 22, 20, 29    /* Compute PTE address */
+        lwz     r11, 0(r12)             /* Get Linux PTE */
+        andi.   r9, r11, _PAGE_PRESENT
+        beq     5f
+
+        ori     r11, r11, _PAGE_ACCESSED
+        stw     r11, 0(r12)
+
+        /* Create TLB tag.  This is the faulting address plus a static
+         * set of bits.  These are size, valid, E, U0.
+        */
+        li      r12, 0x00c0
+        rlwimi  r10, r12, 0, 20, 31
+
+        b       finish_tlb_load
+
+2:      /* Check for possible large-page pmd entry */
+        rlwinm. r9, r12, 2, 22, 24
+        beq     5f
+
+        /* Create TLB tag.  This is the faulting address, plus a static
+         * set of bits (valid, E, U0) plus the size from the PMD.
+         */
+        ori     r9, r9, 0x40
+        rlwimi  r10, r9, 0, 20, 31
+        mr      r11, r12
+
+        b       finish_tlb_load
+
+5:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+#ifdef CONFIG_403GCX
+        lwz     r12, 12(r0)
+        lwz     r11, 8(r0)
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        lwz     r9, 4(r0)
+        lwz     r12, 0(r0)
+#else
+        mfspr   r12, SPRN_SPRG6
+        mfspr   r11, SPRN_SPRG7
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        mfspr   r9, SPRN_SPRG5
+        mfspr   r12, SPRN_SPRG4
+#endif
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       DataAccess
+
+/* 0x1200 - Instruction TLB Miss Exception
+ * Nearly the same as above, except we get our information from different
+ * registers and bailout to a different point.
+ */
+        START_EXCEPTION(0x1200, ITLBMiss)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+#ifdef CONFIG_403GCX
+        stw     r12, 0(r0)
+        stw     r9, 4(r0)
+        mfcr    r11
+        mfspr   r12, SPRN_PID
+        stw     r11, 8(r0)
+        stw     r12, 12(r0)
+#else
+        mtspr   SPRN_SPRG4, r12
+        mtspr   SPRN_SPRG5, r9
+        mfcr    r11
+        mfspr   r12, SPRN_PID
+        mtspr   SPRN_SPRG7, r11
+        mtspr   SPRN_SPRG6, r12
+#endif
+        mfspr   r10, SPRN_SRR0          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        cmplw   r10, r11
+        blt+    3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+        li      r9, 0
+        mtspr   SPRN_PID, r9            /* TLB will have 0 TID */
+        b       4f
+
+        /* Get the PGD for the current thread.
+         */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+4:
+        tophys(r11, r11)
+        rlwimi  r11, r10, 12, 20, 29    /* Create L1 (pgdir/pmd) address */
+        lwz     r12, 0(r11)             /* Get L1 entry */
+        andi.   r9, r12, _PMD_PRESENT   /* Check if it points to a PTE page */
+        beq     2f                      /* Bail if no table */
+
+        rlwimi  r12, r10, 22, 20, 29    /* Compute PTE address */
+        lwz     r11, 0(r12)             /* Get Linux PTE */
+        andi.   r9, r11, _PAGE_PRESENT
+        beq     5f
+
+        ori     r11, r11, _PAGE_ACCESSED
+        stw     r11, 0(r12)
+
+        /* Create TLB tag.  This is the faulting address plus a static
+         * set of bits.  These are size, valid, E, U0.
+        */
+        li      r12, 0x00c0
+        rlwimi  r10, r12, 0, 20, 31
+
+        b       finish_tlb_load
+
+2:      /* Check for possible large-page pmd entry */
+        rlwinm. r9, r12, 2, 22, 24
+        beq     5f
+
+        /* Create TLB tag.  This is the faulting address, plus a static
+         * set of bits (valid, E, U0) plus the size from the PMD.
+         */
+        ori     r9, r9, 0x40
+        rlwimi  r10, r9, 0, 20, 31
+        mr      r11, r12
+
+        b       finish_tlb_load
+
+5:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+#ifdef CONFIG_403GCX
+        lwz     r12, 12(r0)
+        lwz     r11, 8(r0)
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        lwz     r9, 4(r0)
+        lwz     r12, 0(r0)
+#else
+        mfspr   r12, SPRN_SPRG6
+        mfspr   r11, SPRN_SPRG7
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        mfspr   r9, SPRN_SPRG5
+        mfspr   r12, SPRN_SPRG4
+#endif
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       InstructionAccess
+
+        EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
+#ifdef CONFIG_IBM405_ERR51
+        /* 405GP errata 51 */
+        START_EXCEPTION(0x1700, Trap_17)
+        b DTLBMiss
+#else
+        EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
+#endif
+        EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
+
+/* Check for a single step debug exception while in an exception
+ * handler before state has been saved.  This is to catch the case
+ * where an instruction that we are trying to single step causes
+ * an exception (eg ITLB/DTLB miss) and thus the first instruction of
+ * the exception handler generates a single step debug exception.
+ *
+ * If we get a debug trap on the first instruction of an exception handler,
+ * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
+ * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
+ * The exception handler was handling a non-critical interrupt, so it will
+ * save (and later restore) the MSR via SPRN_SRR1, which will still have
+ * the MSR_DE bit set.
+ */
+        /* 0x2000 - Debug Exception */
+        START_EXCEPTION(0x2000, DebugTrap)
+        CRITICAL_EXCEPTION_PROLOG
+
+        /*
+         * If this is a single step or branch-taken exception in an
+         * exception entry sequence, it was probably meant to apply to
+         * the code where the exception occurred (since exception entry
+         * doesn't turn off DE automatically).  We simulate the effect
+         * of turning off DE on entry to an exception handler by turning
+         * off DE in the SRR3 value and clearing the debug status.
+         */
+        mfspr   r10,SPRN_DBSR           /* check single-step/branch taken */
+        andis.  r10,r10,DBSR_IC@h
+        beq+    2f
+
+        andi.   r10,r9,MSR_IR|MSR_PR    /* check supervisor + MMU off */
+        beq     1f                      /* branch and fix it up */
+
+        mfspr   r10,SPRN_SRR2           /* Faulting instruction address */
+        cmplwi  r10,0x2100
+        bgt+    2f                      /* address above exception vectors */
+
+        /* here it looks like we got an inappropriate debug exception. */
+1:      rlwinm  r9,r9,0,~MSR_DE         /* clear DE in the SRR3 value */
+        lis     r10,DBSR_IC@h           /* clear the IC event */
+        mtspr   SPRN_DBSR,r10
+        /* restore state and get out */
+        lwz     r10,_CCR(r11)
+        lwz     r0,GPR0(r11)
+        lwz     r1,GPR1(r11)
+        mtcrf   0x80,r10
+        mtspr   SPRN_SRR2,r12
+        mtspr   SPRN_SRR3,r9
+        lwz     r9,GPR9(r11)
+        lwz     r12,GPR12(r11)
+        lwz     r10,crit_r10@l(0)
+        lwz     r11,crit_r11@l(0)
+        PPC405_ERR77_SYNC
+        rfci
+        b       .
+
+        /* continue normal handling for a critical exception... */
+2:      mfspr   r4,SPRN_DBSR
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_TEMPLATE(DebugException, 0x2002, \
+                (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
+                NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
+
+/*
+ * The other Data TLB exceptions bail out to this point
+ * if they can't resolve the lightweight TLB fault.
+ */
+DataAccess:
+        NORMAL_EXCEPTION_PROLOG
+        mfspr   r5,SPRN_ESR             /* Grab the ESR, save it, pass arg3 */
+        stw     r5,_ESR(r11)
+        mfspr   r4,SPRN_DEAR            /* Grab the DEAR, save it, pass arg2 */
+        EXC_XFER_EE_LITE(0x300, handle_page_fault)
+
+/* Other PowerPC processors, namely those derived from the 6xx-series
+ * have vectors from 0x2100 through 0x2F00 defined, but marked as reserved.
+ * However, for the 4xx-series processors these are neither defined nor
+ * reserved.
+ */
+
+        /* Damn, I came up one instruction too many to fit into the
+         * exception space :-).  Both the instruction and data TLB
+         * miss get to this point to load the TLB.
+         *      r10 - TLB_TAG value
+         *      r11 - Linux PTE
+         *      r12, r9 - avilable to use
+         *      PID - loaded with proper value when we get here
+         *      Upon exit, we reload everything and RFI.
+         * Actually, it will fit now, but oh well.....a common place
+         * to load the TLB.
+         */
+tlb_4xx_index:
+        .long   0
+finish_tlb_load:
+        /* load the next available TLB index.
+        */
+        lwz     r9, tlb_4xx_index@l(0)
+        addi    r9, r9, 1
+        andi.   r9, r9, (PPC4XX_TLB_SIZE-1)
+        stw     r9, tlb_4xx_index@l(0)
+
+6:
+        /*
+         * Clear out the software-only bits in the PTE to generate the
+         * TLB_DATA value.  These are the bottom 2 bits of the RPM, the
+         * top 3 bits of the zone field, and M.
+         */
+        li      r12, 0x0ce2
+        andc    r11, r11, r12
+
+        tlbwe   r11, r9, TLB_DATA               /* Load TLB LO */
+        tlbwe   r10, r9, TLB_TAG                /* Load TLB HI */
+
+        /* Done...restore registers and get out of here.
+        */
+#ifdef CONFIG_403GCX
+        lwz     r12, 12(r0)
+        lwz     r11, 8(r0)
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        lwz     r9, 4(r0)
+        lwz     r12, 0(r0)
+#else
+        mfspr   r12, SPRN_SPRG6
+        mfspr   r11, SPRN_SPRG7
+        mtspr   SPRN_PID, r12
+        mtcr    r11
+        mfspr   r9, SPRN_SPRG5
+        mfspr   r12, SPRN_SPRG4
+#endif
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        PPC405_ERR77_SYNC
+        rfi                     /* Should sync shadow TLBs */
+        b       .               /* prevent prefetch past rfi */
+
+/* extern void giveup_fpu(struct task_struct *prev)
+ *
+ * The PowerPC 4xx family of processors do not have an FPU, so this just
+ * returns.
+ */
+_GLOBAL(giveup_fpu)
+        blr
+
+/* This is where the main kernel code starts.
+ */
+start_here:
+
+        /* ptr to current */
+        lis     r2,init_task@h
+        ori     r2,r2,init_task@l
+
+        /* ptr to phys current thread */
+        tophys(r4,r2)
+        addi    r4,r4,THREAD    /* init task's THREAD */
+        mtspr   SPRN_SPRG3,r4
+
+        /* stack */
+        lis     r1,init_thread_union@ha
+        addi    r1,r1,init_thread_union@l
+        li      r0,0
+        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+
+        bl      early_init      /* We have to do this with MMU on */
+
+/*
+ * Decide what sort of machine this is and initialize the MMU.
+ */
+        mr      r3,r31
+        mr      r4,r30
+        mr      r5,r29
+        mr      r6,r28
+        mr      r7,r27
+        bl      machine_init
+        bl      MMU_init
+
+/* Go back to running unmapped so we can load up new values
+ * and change to using our exception vectors.
+ * On the 4xx, all we have to do is invalidate the TLB to clear
+ * the old 16M byte TLB mappings.
+ */
+        lis     r4,2f@h
+        ori     r4,r4,2f@l
+        tophys(r4,r4)
+        lis     r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@h
+        ori     r3,r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@l
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        rfi
+        b       .               /* prevent prefetch past rfi */
+
+/* Load up the kernel context */
+2:
+        sync                    /* Flush to memory before changing TLB */
+        tlbia
+        isync                   /* Flush shadow TLBs */
+
+        /* set up the PTE pointers for the Abatron bdiGDB.
+        */
+        lis     r6, swapper_pg_dir@h
+        ori     r6, r6, swapper_pg_dir@l
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        stw     r5, 0xf0(r0)    /* Must match your Abatron config file */
+        tophys(r5,r5)
+        stw     r6, 0(r5)
+
+/* Now turn on the MMU for real! */
+        lis     r4,MSR_KERNEL@h
+        ori     r4,r4,MSR_KERNEL@l
+        lis     r3,start_kernel@h
+        ori     r3,r3,start_kernel@l
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        rfi                     /* enable MMU and jump to start_kernel */
+        b       .               /* prevent prefetch past rfi */
+
+/* Set up the initial MMU state so we can do the first level of
+ * kernel initialization.  This maps the first 16 MBytes of memory 1:1
+ * virtual to physical and more importantly sets the cache mode.
+ */
+initial_mmu:
+        tlbia                   /* Invalidate all TLB entries */
+        isync
+
+        /* We should still be executing code at physical address 0x0000xxxx
+         * at this point. However, start_here is at virtual address
+         * 0xC000xxxx. So, set up a TLB mapping to cover this once
+         * translation is enabled.
+         */
+
+        lis     r3,KERNELBASE@h         /* Load the kernel virtual address */
+        ori     r3,r3,KERNELBASE@l
+        tophys(r4,r3)                   /* Load the kernel physical address */
+
+        iccci   r0,r3                   /* Invalidate the i-cache before use */
+
+        /* Load the kernel PID.
+        */
+        li      r0,0
+        mtspr   SPRN_PID,r0
+        sync
+
+        /* Configure and load two entries into TLB slots 62 and 63.
+         * In case we are pinning TLBs, these are reserved in by the
+         * other TLB functions.  If not reserving, then it doesn't
+         * matter where they are loaded.
+         */
+        clrrwi  r4,r4,10                /* Mask off the real page number */
+        ori     r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */
+
+        clrrwi  r3,r3,10                /* Mask off the effective page number */
+        ori     r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))
+
+        li      r0,63                    /* TLB slot 63 */
+
+        tlbwe   r4,r0,TLB_DATA          /* Load the data portion of the entry */
+        tlbwe   r3,r0,TLB_TAG           /* Load the tag portion of the entry */
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(SERIAL_DEBUG_IO_BASE)
+
+        /* Load a TLB entry for the UART, so that ppc4xx_progress() can use
+         * the UARTs nice and early.  We use a 4k real==virtual mapping. */
+
+        lis     r3,SERIAL_DEBUG_IO_BASE@h
+        ori     r3,r3,SERIAL_DEBUG_IO_BASE@l
+        mr      r4,r3
+        clrrwi  r4,r4,12
+        ori     r4,r4,(TLB_WR|TLB_I|TLB_M|TLB_G)
+
+        clrrwi  r3,r3,12
+        ori     r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K))
+
+        li      r0,0                    /* TLB slot 0 */
+        tlbwe   r4,r0,TLB_DATA
+        tlbwe   r3,r0,TLB_TAG
+#endif /* CONFIG_SERIAL_DEBUG_TEXT && SERIAL_DEBUG_IO_BASE */
+
+        isync
+
+        /* Establish the exception vector base
+        */
+        lis     r4,KERNELBASE@h         /* EVPR only uses the high 16-bits */
+        tophys(r0,r4)                   /* Use the physical address */
+        mtspr   SPRN_EVPR,r0
+
+        blr
+
+_GLOBAL(abort)
+        mfspr   r13,SPRN_DBCR0
+        oris    r13,r13,DBCR0_RST_SYSTEM@h
+        mtspr   SPRN_DBCR0,r13
+
+_GLOBAL(set_context)
+
+#ifdef CONFIG_BDI_SWITCH
+        /* Context switch the PTE pointer for the Abatron BDI2000.
+         * The PGDIR is the second parameter.
+         */
+        lis     r5, KERNELBASE@h
+        lwz     r5, 0xf0(r5)
+        stw     r4, 0x4(r5)
+#endif
+        sync
+        mtspr   SPRN_PID,r3
+        isync                           /* Need an isync to flush shadow */
+                                        /* TLBs after changing PID */
+        blr
+
+/* We put a few things here that have to be page-aligned. This stuff
+ * goes at the beginning of the data segment, which is page-aligned.
+ */
+        .data
+        .align  12
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
+        .space  4096
+        .globl  swapper_pg_dir
+swapper_pg_dir:
+        .space  4096
+
+
+/* Stack for handling critical exceptions from kernel mode */
+        .section .bss
+        .align 12
+exception_stack_bottom:
+        .space  4096
+critical_stack_top:
+        .globl  exception_stack_top
+exception_stack_top:
+
+/* This space gets a copy of optional info passed to us by the bootstrap
+ * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+        .globl  cmd_line
+cmd_line:
+        .space  512
+
+/* Room for two PTE pointers, usually the kernel and current user pointers
+ * to their respective root page table.
+ */
+abatron_pteptrs:
+        .space  8
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
new file mode 100644
index 000000000000..147215a0d6c0
--- /dev/null
+++ b/arch/powerpc/kernel/head_64.S
@@ -0,0 +1,1957 @@
+/*
+ *  arch/ppc64/kernel/head.S
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *
+ *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
+ *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
+ *
+ *  This file contains the low-level support and setup for the
+ *  PowerPC-64 platform, including trap and interrupt dispatch.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/systemcfg.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/bug.h>
+#include <asm/cputable.h>
+#include <asm/setup.h>
+#include <asm/hvcall.h>
+#include <asm/iSeries/LparMap.h>
+#include <asm/thread_info.h>
+
+#ifdef CONFIG_PPC_ISERIES
+#define DO_SOFT_DISABLE
+#endif
+
+/*
+ * We layout physical memory as follows:
+ * 0x0000 - 0x00ff : Secondary processor spin code
+ * 0x0100 - 0x2fff : pSeries Interrupt prologs
+ * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
+ * 0x6000 - 0x6fff : Initial (CPU0) segment table
+ * 0x7000 - 0x7fff : FWNMI data area
+ * 0x8000 -        : Early init and support code
+ */
+
+/*
+ *   SPRG Usage
+ *
+ *   Register   Definition
+ *
+ *   SPRG0      reserved for hypervisor
+ *   SPRG1      temp - used to save gpr
+ *   SPRG2      temp - used to save gpr
+ *   SPRG3      virt addr of paca
+ */
+
+/*
+ * Entering into this code we make the following assumptions:
+ *  For pSeries:
+ *   1. The MMU is off & open firmware is running in real mode.
+ *   2. The kernel is entered at __start
+ *
+ *  For iSeries:
+ *   1. The MMU is on (as it always is for iSeries)
+ *   2. The kernel is entered at system_reset_iSeries
+ */
+
+        .text
+        .globl  _stext
+_stext:
+#ifdef CONFIG_PPC_MULTIPLATFORM
+_GLOBAL(__start)
+        /* NOP this out unconditionally */
+BEGIN_FTR_SECTION
+        b       .__start_initialization_multiplatform
+END_FTR_SECTION(0, 1)
+#endif /* CONFIG_PPC_MULTIPLATFORM */
+
+        /* Catch branch to 0 in real mode */
+        trap
+
+#ifdef CONFIG_PPC_ISERIES
+        /*
+         * At offset 0x20, there is a pointer to iSeries LPAR data.
+         * This is required by the hypervisor
+         */
+        . = 0x20
+        .llong hvReleaseData-KERNELBASE
+
+        /*
+         * At offset 0x28 and 0x30 are offsets to the mschunks_map
+         * array (used by the iSeries LPAR debugger to do translation
+         * between physical addresses and absolute addresses) and
+         * to the pidhash table (also used by the debugger)
+         */
+        .llong mschunks_map-KERNELBASE
+        .llong 0        /* pidhash-KERNELBASE SFRXXX */
+
+        /* Offset 0x38 - Pointer to start of embedded System.map */
+        .globl  embedded_sysmap_start
+embedded_sysmap_start:
+        .llong  0
+        /* Offset 0x40 - Pointer to end of embedded System.map */
+        .globl  embedded_sysmap_end
+embedded_sysmap_end:
+        .llong  0
+
+#endif /* CONFIG_PPC_ISERIES */
+
+        /* Secondary processors spin on this value until it goes to 1. */
+        .globl  __secondary_hold_spinloop
+__secondary_hold_spinloop:
+        .llong  0x0
+
+        /* Secondary processors write this value with their cpu # */
+        /* after they enter the spin loop immediately below.      */
+        .globl  __secondary_hold_acknowledge
+__secondary_hold_acknowledge:
+        .llong  0x0
+
+        . = 0x60
+/*
+ * The following code is used on pSeries to hold secondary processors
+ * in a spin loop after they have been freed from OpenFirmware, but
+ * before the bulk of the kernel has been relocated.  This code
+ * is relocated to physical address 0x60 before prom_init is run.
+ * All of it must fit below the first exception vector at 0x100.
+ */
+_GLOBAL(__secondary_hold)
+        mfmsr   r24
+        ori     r24,r24,MSR_RI
+        mtmsrd  r24                     /* RI on */
+
+        /* Grab our linux cpu number */
+        mr      r24,r3
+
+        /* Tell the master cpu we're here */
+        /* Relocation is off & we are located at an address less */
+        /* than 0x100, so only need to grab low order offset.    */
+        std     r24,__secondary_hold_acknowledge@l(0)
+        sync
+
+        /* All secondary cpus wait here until told to start. */
+100:    ld      r4,__secondary_hold_spinloop@l(0)
+        cmpdi   0,r4,1
+        bne     100b
+
+#ifdef CONFIG_HMT
+        b       .hmt_init
+#else
+#ifdef CONFIG_SMP
+        mr      r3,r24
+        b       .pSeries_secondary_smp_init
+#else
+        BUG_OPCODE
+#endif
+#endif
+
+/* This value is used to mark exception frames on the stack. */
+        .section ".toc","aw"
+exception_marker:
+        .tc     ID_72656773_68657265[TC],0x7265677368657265
+        .text
+
+/*
+ * The following macros define the code that appears as
+ * the prologue to each of the exception handlers.  They
+ * are split into two parts to allow a single kernel binary
+ * to be used for pSeries and iSeries.
+ * LOL.  One day... - paulus
+ */
+
+/*
+ * We make as much of the exception code common between native
+ * exception handlers (including pSeries LPAR) and iSeries LPAR
+ * implementations as possible.
+ */
+
+/*
+ * This is the start of the interrupt handlers for pSeries
+ * This code runs with relocation off.
+ */
+#define EX_R9           0
+#define EX_R10          8
+#define EX_R11          16
+#define EX_R12          24
+#define EX_R13          32
+#define EX_SRR0         40
+#define EX_R3           40      /* SLB miss saves R3, but not SRR0 */
+#define EX_DAR          48
+#define EX_LR           48      /* SLB miss saves LR, but not DAR */
+#define EX_DSISR        56
+#define EX_CCR          60
+
+#define EXCEPTION_PROLOG_PSERIES(area, label)                           \
+        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
+        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
+        std     r10,area+EX_R10(r13);                                   \
+        std     r11,area+EX_R11(r13);                                   \
+        std     r12,area+EX_R12(r13);                                   \
+        mfspr   r9,SPRN_SPRG1;                                          \
+        std     r9,area+EX_R13(r13);                                    \
+        mfcr    r9;                                                     \
+        clrrdi  r12,r13,32;             /* get high part of &label */   \
+        mfmsr   r10;                                                    \
+        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
+        ori     r12,r12,(label)@l;      /* virt addr of handler */      \
+        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
+        mtspr   SPRN_SRR0,r12;                                          \
+        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mtspr   SPRN_SRR1,r10;                                          \
+        rfid;                                                           \
+        b       .       /* prevent speculative execution */
+
+/*
+ * This is the start of the interrupt handlers for iSeries
+ * This code runs with relocation on.
+ */
+#define EXCEPTION_PROLOG_ISERIES_1(area)                                \
+        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
+        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
+        std     r10,area+EX_R10(r13);                                   \
+        std     r11,area+EX_R11(r13);                                   \
+        std     r12,area+EX_R12(r13);                                   \
+        mfspr   r9,SPRN_SPRG1;                                          \
+        std     r9,area+EX_R13(r13);                                    \
+        mfcr    r9
+
+#define EXCEPTION_PROLOG_ISERIES_2                                      \
+        mfmsr   r10;                                                    \
+        ld      r11,PACALPPACA+LPPACASRR0(r13);                         \
+        ld      r12,PACALPPACA+LPPACASRR1(r13);                         \
+        ori     r10,r10,MSR_RI;                                         \
+        mtmsrd  r10,1
+
+/*
+ * The common exception prolog is used for all except a few exceptions
+ * such as a segment miss on a kernel address.  We have to be prepared
+ * to take another exception from the point where we first touch the
+ * kernel stack onwards.
+ *
+ * On entry r13 points to the paca, r9-r13 are saved in the paca,
+ * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
+ * SRR1, and relocation is on.
+ */
+#define EXCEPTION_PROLOG_COMMON(n, area)                                   \
+        andi.   r10,r12,MSR_PR;         /* See if coming from user      */ \
+        mr      r10,r1;                 /* Save r1                      */ \
+        subi    r1,r1,INT_FRAME_SIZE;   /* alloc frame on kernel stack  */ \
+        beq-    1f;                                                        \
+        ld      r1,PACAKSAVE(r13);      /* kernel stack to use          */ \
+1:      cmpdi   cr1,r1,0;               /* check if r1 is in userspace  */ \
+        bge-    cr1,bad_stack;          /* abort if it is               */ \
+        std     r9,_CCR(r1);            /* save CR in stackframe        */ \
+        std     r11,_NIP(r1);           /* save SRR0 in stackframe      */ \
+        std     r12,_MSR(r1);           /* save SRR1 in stackframe      */ \
+        std     r10,0(r1);              /* make stack chain pointer     */ \
+        std     r0,GPR0(r1);            /* save r0 in stackframe        */ \
+        std     r10,GPR1(r1);           /* save r1 in stackframe        */ \
+        std     r2,GPR2(r1);            /* save r2 in stackframe        */ \
+        SAVE_4GPRS(3, r1);              /* save r3 - r6 in stackframe   */ \
+        SAVE_2GPRS(7, r1);              /* save r7, r8 in stackframe    */ \
+        ld      r9,area+EX_R9(r13);     /* move r9, r10 to stackframe   */ \
+        ld      r10,area+EX_R10(r13);                                      \
+        std     r9,GPR9(r1);                                               \
+        std     r10,GPR10(r1);                                             \
+        ld      r9,area+EX_R11(r13);    /* move r11 - r13 to stackframe */ \
+        ld      r10,area+EX_R12(r13);                                      \
+        ld      r11,area+EX_R13(r13);                                      \
+        std     r9,GPR11(r1);                                              \
+        std     r10,GPR12(r1);                                             \
+        std     r11,GPR13(r1);                                             \
+        ld      r2,PACATOC(r13);        /* get kernel TOC into r2       */ \
+        mflr    r9;                     /* save LR in stackframe        */ \
+        std     r9,_LINK(r1);                                              \
+        mfctr   r10;                    /* save CTR in stackframe       */ \
+        std     r10,_CTR(r1);                                              \
+        mfspr   r11,SPRN_XER;           /* save XER in stackframe       */ \
+        std     r11,_XER(r1);                                              \
+        li      r9,(n)+1;                                                  \
+        std     r9,_TRAP(r1);           /* set trap number              */ \
+        li      r10,0;                                                     \
+        ld      r11,exception_marker@toc(r2);                              \
+        std     r10,RESULT(r1);         /* clear regs->result           */ \
+        std     r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame      */
+
+/*
+ * Exception vectors.
+ */
+#define STD_EXCEPTION_PSERIES(n, label)                 \
+        . = n;                                          \
+        .globl label##_pSeries;                         \
+label##_pSeries:                                        \
+        HMT_MEDIUM;                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
+        RUNLATCH_ON(r13);                               \
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+
+#define STD_EXCEPTION_ISERIES(n, label, area)           \
+        .globl label##_iSeries;                         \
+label##_iSeries:                                        \
+        HMT_MEDIUM;                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
+        RUNLATCH_ON(r13);                               \
+        EXCEPTION_PROLOG_ISERIES_1(area);               \
+        EXCEPTION_PROLOG_ISERIES_2;                     \
+        b       label##_common
+
+#define MASKABLE_EXCEPTION_ISERIES(n, label)                            \
+        .globl label##_iSeries;                                         \
+label##_iSeries:                                                        \
+        HMT_MEDIUM;                                                     \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
+        RUNLATCH_ON(r13);                                               \
+        EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN);                         \
+        lbz     r10,PACAPROCENABLED(r13);                               \
+        cmpwi   0,r10,0;                                                \
+        beq-    label##_iSeries_masked;                                 \
+        EXCEPTION_PROLOG_ISERIES_2;                                     \
+        b       label##_common;                                         \
+
+#ifdef DO_SOFT_DISABLE
+#define DISABLE_INTS                            \
+        lbz     r10,PACAPROCENABLED(r13);       \
+        li      r11,0;                          \
+        std     r10,SOFTE(r1);                  \
+        mfmsr   r10;                            \
+        stb     r11,PACAPROCENABLED(r13);       \
+        ori     r10,r10,MSR_EE;                 \
+        mtmsrd  r10,1
+
+#define ENABLE_INTS                             \
+        lbz     r10,PACAPROCENABLED(r13);       \
+        mfmsr   r11;                            \
+        std     r10,SOFTE(r1);                  \
+        ori     r11,r11,MSR_EE;                 \
+        mtmsrd  r11,1
+
+#else   /* hard enable/disable interrupts */
+#define DISABLE_INTS
+
+#define ENABLE_INTS                             \
+        ld      r12,_MSR(r1);                   \
+        mfmsr   r11;                            \
+        rlwimi  r11,r12,0,MSR_EE;               \
+        mtmsrd  r11,1
+
+#endif
+
+#define STD_EXCEPTION_COMMON(trap, label, hdlr)         \
+        .align  7;                                      \
+        .globl label##_common;                          \
+label##_common:                                         \
+        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
+        DISABLE_INTS;                                   \
+        bl      .save_nvgprs;                           \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
+        bl      hdlr;                                   \
+        b       .ret_from_except
+
+#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr)    \
+        .align  7;                                      \
+        .globl label##_common;                          \
+label##_common:                                         \
+        EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);      \
+        DISABLE_INTS;                                   \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;             \
+        bl      hdlr;                                   \
+        b       .ret_from_except_lite
+
+/*
+ * Start of pSeries system interrupt routines
+ */
+        . = 0x100
+        .globl __start_interrupts
+__start_interrupts:
+
+        STD_EXCEPTION_PSERIES(0x100, system_reset)
+
+        . = 0x200
+_machine_check_pSeries:
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        RUNLATCH_ON(r13)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
+
+        . = 0x300
+        .globl data_access_pSeries
+data_access_pSeries:
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13
+BEGIN_FTR_SECTION
+        mtspr   SPRN_SPRG2,r12
+        mfspr   r13,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
+        srdi    r13,r13,60
+        rlwimi  r13,r12,16,0x20
+        mfcr    r12
+        cmpwi   r13,0x2c
+        beq     .do_stab_bolted_pSeries
+        mtcrf   0x80,r12
+        mfspr   r12,SPRN_SPRG2
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
+
+        . = 0x380
+        .globl data_access_slb_pSeries
+data_access_slb_pSeries:
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13
+        RUNLATCH_ON(r13)
+        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
+        std     r9,PACA_EXSLB+EX_R9(r13)        /* save r9 - r12 */
+        std     r10,PACA_EXSLB+EX_R10(r13)
+        std     r11,PACA_EXSLB+EX_R11(r13)
+        std     r12,PACA_EXSLB+EX_R12(r13)
+        std     r3,PACA_EXSLB+EX_R3(r13)
+        mfspr   r9,SPRN_SPRG1
+        std     r9,PACA_EXSLB+EX_R13(r13)
+        mfcr    r9
+        mfspr   r12,SPRN_SRR1           /* and SRR1 */
+        mfspr   r3,SPRN_DAR
+        b       .do_slb_miss            /* Rel. branch works in real mode */
+
+        STD_EXCEPTION_PSERIES(0x400, instruction_access)
+
+        . = 0x480
+        .globl instruction_access_slb_pSeries
+instruction_access_slb_pSeries:
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13
+        RUNLATCH_ON(r13)
+        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
+        std     r9,PACA_EXSLB+EX_R9(r13)        /* save r9 - r12 */
+        std     r10,PACA_EXSLB+EX_R10(r13)
+        std     r11,PACA_EXSLB+EX_R11(r13)
+        std     r12,PACA_EXSLB+EX_R12(r13)
+        std     r3,PACA_EXSLB+EX_R3(r13)
+        mfspr   r9,SPRN_SPRG1
+        std     r9,PACA_EXSLB+EX_R13(r13)
+        mfcr    r9
+        mfspr   r12,SPRN_SRR1           /* and SRR1 */
+        mfspr   r3,SPRN_SRR0                    /* SRR0 is faulting address */
+        b       .do_slb_miss            /* Rel. branch works in real mode */
+
+        STD_EXCEPTION_PSERIES(0x500, hardware_interrupt)
+        STD_EXCEPTION_PSERIES(0x600, alignment)
+        STD_EXCEPTION_PSERIES(0x700, program_check)
+        STD_EXCEPTION_PSERIES(0x800, fp_unavailable)
+        STD_EXCEPTION_PSERIES(0x900, decrementer)
+        STD_EXCEPTION_PSERIES(0xa00, trap_0a)
+        STD_EXCEPTION_PSERIES(0xb00, trap_0b)
+
+        . = 0xc00
+        .globl  system_call_pSeries
+system_call_pSeries:
+        HMT_MEDIUM
+        RUNLATCH_ON(r9)
+        mr      r9,r13
+        mfmsr   r10
+        mfspr   r13,SPRN_SPRG3
+        mfspr   r11,SPRN_SRR0
+        clrrdi  r12,r13,32
+        oris    r12,r12,system_call_common@h
+        ori     r12,r12,system_call_common@l
+        mtspr   SPRN_SRR0,r12
+        ori     r10,r10,MSR_IR|MSR_DR|MSR_RI
+        mfspr   r12,SPRN_SRR1
+        mtspr   SPRN_SRR1,r10
+        rfid
+        b       .       /* prevent speculative execution */
+
+        STD_EXCEPTION_PSERIES(0xd00, single_step)
+        STD_EXCEPTION_PSERIES(0xe00, trap_0e)
+
+        /* We need to deal with the Altivec unavailable exception
+         * here which is at 0xf20, thus in the middle of the
+         * prolog code of the PerformanceMonitor one. A little
+         * trickery is thus necessary
+         */
+        . = 0xf00
+        b       performance_monitor_pSeries
+
+        STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable)
+
+        STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
+        STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
+
+        . = 0x3000
+
+/*** pSeries interrupt support ***/
+
+        /* moved from 0xf00 */
+        STD_EXCEPTION_PSERIES(., performance_monitor)
+
+        .align  7
+_GLOBAL(do_stab_bolted_pSeries)
+        mtcrf   0x80,r12
+        mfspr   r12,SPRN_SPRG2
+        EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
+
+/*
+ * Vectors for the FWNMI option.  Share common code.
+ */
+        .globl system_reset_fwnmi
+system_reset_fwnmi:
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        RUNLATCH_ON(r13)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
+
+        .globl machine_check_fwnmi
+machine_check_fwnmi:
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        RUNLATCH_ON(r13)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
+
+#ifdef CONFIG_PPC_ISERIES
+/***  ISeries-LPAR interrupt handlers ***/
+
+        STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
+
+        .globl data_access_iSeries
+data_access_iSeries:
+        mtspr   SPRN_SPRG1,r13
+BEGIN_FTR_SECTION
+        mtspr   SPRN_SPRG2,r12
+        mfspr   r13,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
+        srdi    r13,r13,60
+        rlwimi  r13,r12,16,0x20
+        mfcr    r12
+        cmpwi   r13,0x2c
+        beq     .do_stab_bolted_iSeries
+        mtcrf   0x80,r12
+        mfspr   r12,SPRN_SPRG2
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+        EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
+        EXCEPTION_PROLOG_ISERIES_2
+        b       data_access_common
+
+.do_stab_bolted_iSeries:
+        mtcrf   0x80,r12
+        mfspr   r12,SPRN_SPRG2
+        EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
+        EXCEPTION_PROLOG_ISERIES_2
+        b       .do_stab_bolted
+
+        .globl  data_access_slb_iSeries
+data_access_slb_iSeries:
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
+        std     r3,PACA_EXSLB+EX_R3(r13)
+        ld      r12,PACALPPACA+LPPACASRR1(r13)
+        mfspr   r3,SPRN_DAR
+        b       .do_slb_miss
+
+        STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
+
+        .globl  instruction_access_slb_iSeries
+instruction_access_slb_iSeries:
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
+        std     r3,PACA_EXSLB+EX_R3(r13)
+        ld      r12,PACALPPACA+LPPACASRR1(r13)
+        ld      r3,PACALPPACA+LPPACASRR0(r13)
+        b       .do_slb_miss
+
+        MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
+        STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
+        MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
+        STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
+
+        .globl  system_call_iSeries
+system_call_iSeries:
+        mr      r9,r13
+        mfspr   r13,SPRN_SPRG3
+        EXCEPTION_PROLOG_ISERIES_2
+        b       system_call_common
+
+        STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
+        STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
+
+        .globl system_reset_iSeries
+system_reset_iSeries:
+        mfspr   r13,SPRN_SPRG3          /* Get paca address */
+        mfmsr   r24
+        ori     r24,r24,MSR_RI
+        mtmsrd  r24                     /* RI on */
+        lhz     r24,PACAPACAINDEX(r13)  /* Get processor # */
+        cmpwi   0,r24,0                 /* Are we processor 0? */
+        beq     .__start_initialization_iSeries /* Start up the first processor */
+        mfspr   r4,SPRN_CTRLF
+        li      r5,CTRL_RUNLATCH        /* Turn off the run light */
+        andc    r4,r4,r5
+        mtspr   SPRN_CTRLT,r4
+
+1:
+        HMT_LOW
+#ifdef CONFIG_SMP
+        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
+                                         * should start */
+        sync
+        LOADADDR(r3,current_set)
+        sldi    r28,r24,3               /* get current_set[cpu#] */
+        ldx     r3,r3,r28
+        addi    r1,r3,THREAD_SIZE
+        subi    r1,r1,STACK_FRAME_OVERHEAD
+
+        cmpwi   0,r23,0
+        beq     iSeries_secondary_smp_loop      /* Loop until told to go */
+        bne     .__secondary_start              /* Loop until told to go */
+iSeries_secondary_smp_loop:
+        /* Let the Hypervisor know we are alive */
+        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
+        lis     r3,0x8002
+        rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
+#else /* CONFIG_SMP */
+        /* Yield the processor.  This is required for non-SMP kernels
+                which are running on multi-threaded machines. */
+        lis     r3,0x8000
+        rldicr  r3,r3,32,15             /* r3 = (r3 << 32) & 0xffff000000000000 */
+        addi    r3,r3,18                /* r3 = 0x8000000000000012 which is "yield" */
+        li      r4,0                    /* "yield timed" */
+        li      r5,-1                   /* "yield forever" */
+#endif /* CONFIG_SMP */
+        li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
+        sc                              /* Invoke the hypervisor via a system call */
+        mfspr   r13,SPRN_SPRG3          /* Put r13 back ???? */
+        b       1b                      /* If SMP not configured, secondaries
+                                         * loop forever */
+
+        .globl decrementer_iSeries_masked
+decrementer_iSeries_masked:
+        li      r11,1
+        stb     r11,PACALPPACA+LPPACADECRINT(r13)
+        lwz     r12,PACADEFAULTDECR(r13)
+        mtspr   SPRN_DEC,r12
+        /* fall through */
+
+        .globl hardware_interrupt_iSeries_masked
+hardware_interrupt_iSeries_masked:
+        mtcrf   0x80,r9         /* Restore regs */
+        ld      r11,PACALPPACA+LPPACASRR0(r13)
+        ld      r12,PACALPPACA+LPPACASRR1(r13)
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
+        ld      r9,PACA_EXGEN+EX_R9(r13)
+        ld      r10,PACA_EXGEN+EX_R10(r13)
+        ld      r11,PACA_EXGEN+EX_R11(r13)
+        ld      r12,PACA_EXGEN+EX_R12(r13)
+        ld      r13,PACA_EXGEN+EX_R13(r13)
+        rfid
+        b       .       /* prevent speculative execution */
+#endif /* CONFIG_PPC_ISERIES */
+
+/*** Common interrupt handlers ***/
+
+        STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
+
+        /*
+         * Machine check is different because we use a different
+         * save area: PACA_EXMC instead of PACA_EXGEN.
+         */
+        .align  7
+        .globl machine_check_common
+machine_check_common:
+        EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
+        DISABLE_INTS
+        bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .machine_check_exception
+        b       .ret_from_except
+
+        STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt)
+        STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
+        STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
+        STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
+        STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
+        STD_EXCEPTION_COMMON(0xf00, performance_monitor, .performance_monitor_exception)
+        STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
+#ifdef CONFIG_ALTIVEC
+        STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
+#else
+        STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
+#endif
+
+/*
+ * Here we have detected that the kernel stack pointer is bad.
+ * R9 contains the saved CR, r13 points to the paca,
+ * r10 contains the (bad) kernel stack pointer,
+ * r11 and r12 contain the saved SRR0 and SRR1.
+ * We switch to using an emergency stack, save the registers there,
+ * and call kernel_bad_stack(), which panics.
+ */
+bad_stack:
+        ld      r1,PACAEMERGSP(r13)
+        subi    r1,r1,64+INT_FRAME_SIZE
+        std     r9,_CCR(r1)
+        std     r10,GPR1(r1)
+        std     r11,_NIP(r1)
+        std     r12,_MSR(r1)
+        mfspr   r11,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
+        std     r11,_DAR(r1)
+        std     r12,_DSISR(r1)
+        mflr    r10
+        mfctr   r11
+        mfxer   r12
+        std     r10,_LINK(r1)
+        std     r11,_CTR(r1)
+        std     r12,_XER(r1)
+        SAVE_GPR(0,r1)
+        SAVE_GPR(2,r1)
+        SAVE_4GPRS(3,r1)
+        SAVE_2GPRS(7,r1)
+        SAVE_10GPRS(12,r1)
+        SAVE_10GPRS(22,r1)
+        addi    r11,r1,INT_FRAME_SIZE
+        std     r11,0(r1)
+        li      r12,0
+        std     r12,0(r11)
+        ld      r2,PACATOC(r13)
+1:      addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .kernel_bad_stack
+        b       1b
+
+/*
+ * Return from an exception with minimal checks.
+ * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
+ * If interrupts have been enabled, or anything has been
+ * done that might have changed the scheduling status of
+ * any task or sent any task a signal, you should use
+ * ret_from_except or ret_from_except_lite instead of this.
+ */
+        .globl  fast_exception_return
+fast_exception_return:
+        ld      r12,_MSR(r1)
+        ld      r11,_NIP(r1)
+        andi.   r3,r12,MSR_RI           /* check if RI is set */
+        beq-    unrecov_fer
+        ld      r3,_CCR(r1)
+        ld      r4,_LINK(r1)
+        ld      r5,_CTR(r1)
+        ld      r6,_XER(r1)
+        mtcr    r3
+        mtlr    r4
+        mtctr   r5
+        mtxer   r6
+        REST_GPR(0, r1)
+        REST_8GPRS(2, r1)
+
+        mfmsr   r10
+        clrrdi  r10,r10,2               /* clear RI (LE is 0 already) */
+        mtmsrd  r10,1
+
+        mtspr   SPRN_SRR1,r12
+        mtspr   SPRN_SRR0,r11
+        REST_4GPRS(10, r1)
+        ld      r1,GPR1(r1)
+        rfid
+        b       .       /* prevent speculative execution */
+
+unrecov_fer:
+        bl      .save_nvgprs
+1:      addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .unrecoverable_exception
+        b       1b
+
+/*
+ * Here r13 points to the paca, r9 contains the saved CR,
+ * SRR0 and SRR1 are saved in r11 and r12,
+ * r9 - r13 are saved in paca->exgen.
+ */
+        .align  7
+        .globl data_access_common
+data_access_common:
+        RUNLATCH_ON(r10)                /* It wont fit in the 0x300 handler */
+        mfspr   r10,SPRN_DAR
+        std     r10,PACA_EXGEN+EX_DAR(r13)
+        mfspr   r10,SPRN_DSISR
+        stw     r10,PACA_EXGEN+EX_DSISR(r13)
+        EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
+        ld      r3,PACA_EXGEN+EX_DAR(r13)
+        lwz     r4,PACA_EXGEN+EX_DSISR(r13)
+        li      r5,0x300
+        b       .do_hash_page           /* Try to handle as hpte fault */
+
+        .align  7
+        .globl instruction_access_common
+instruction_access_common:
+        EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
+        ld      r3,_NIP(r1)
+        andis.  r4,r12,0x5820
+        li      r5,0x400
+        b       .do_hash_page           /* Try to handle as hpte fault */
+
+        .align  7
+        .globl hardware_interrupt_common
+        .globl hardware_interrupt_entry
+hardware_interrupt_common:
+        EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
+hardware_interrupt_entry:
+        DISABLE_INTS
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .do_IRQ
+        b       .ret_from_except_lite
+
+        .align  7
+        .globl alignment_common
+alignment_common:
+        mfspr   r10,SPRN_DAR
+        std     r10,PACA_EXGEN+EX_DAR(r13)
+        mfspr   r10,SPRN_DSISR
+        stw     r10,PACA_EXGEN+EX_DSISR(r13)
+        EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
+        ld      r3,PACA_EXGEN+EX_DAR(r13)
+        lwz     r4,PACA_EXGEN+EX_DSISR(r13)
+        std     r3,_DAR(r1)
+        std     r4,_DSISR(r1)
+        bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        ENABLE_INTS
+        bl      .alignment_exception
+        b       .ret_from_except
+
+        .align  7
+        .globl program_check_common
+program_check_common:
+        EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
+        bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        ENABLE_INTS
+        bl      .program_check_exception
+        b       .ret_from_except
+
+        .align  7
+        .globl fp_unavailable_common
+fp_unavailable_common:
+        EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
+        bne     .load_up_fpu            /* if from user, just load it up */
+        bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        ENABLE_INTS
+        bl      .kernel_fp_unavailable_exception
+        BUG_OPCODE
+
+        .align  7
+        .globl altivec_unavailable_common
+altivec_unavailable_common:
+        EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
+#ifdef CONFIG_ALTIVEC
+BEGIN_FTR_SECTION
+        bne     .load_up_altivec        /* if from user, just load it up */
+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+#endif
+        bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        ENABLE_INTS
+        bl      .altivec_unavailable_exception
+        b       .ret_from_except
+
+#ifdef CONFIG_ALTIVEC
+/*
+ * load_up_altivec(unused, unused, tsk)
+ * Disable VMX for the task which had it previously,
+ * and save its vector registers in its thread_struct.
+ * Enables the VMX for use in the kernel on return.
+ * On SMP we know the VMX is free, since we give it up every
+ * switch (ie, no lazy save of the vector registers).
+ * On entry: r13 == 'current' && last_task_used_altivec != 'current'
+ */
+_STATIC(load_up_altivec)
+        mfmsr   r5                      /* grab the current MSR */
+        oris    r5,r5,MSR_VEC@h
+        mtmsrd  r5                      /* enable use of VMX now */
+        isync
+
+/*
+ * For SMP, we don't do lazy VMX switching because it just gets too
+ * horrendously complex, especially when a task switches from one CPU
+ * to another.  Instead we call giveup_altvec in switch_to.
+ * VRSAVE isn't dealt with here, that is done in the normal context
+ * switch code. Note that we could rely on vrsave value to eventually
+ * avoid saving all of the VREGs here...
+ */
+#ifndef CONFIG_SMP
+        ld      r3,last_task_used_altivec@got(r2)
+        ld      r4,0(r3)
+        cmpdi   0,r4,0
+        beq     1f
+        /* Save VMX state to last_task_used_altivec's THREAD struct */
+        addi    r4,r4,THREAD
+        SAVE_32VRS(0,r5,r4)
+        mfvscr  vr0
+        li      r10,THREAD_VSCR
+        stvx    vr0,r10,r4
+        /* Disable VMX for last_task_used_altivec */
+        ld      r5,PT_REGS(r4)
+        ld      r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        lis     r6,MSR_VEC@h
+        andc    r4,r4,r6
+        std     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#endif /* CONFIG_SMP */
+        /* Hack: if we get an altivec unavailable trap with VRSAVE
+         * set to all zeros, we assume this is a broken application
+         * that fails to set it properly, and thus we switch it to
+         * all 1's
+         */
+        mfspr   r4,SPRN_VRSAVE
+        cmpdi   0,r4,0
+        bne+    1f
+        li      r4,-1
+        mtspr   SPRN_VRSAVE,r4
+1:
+        /* enable use of VMX after return */
+        ld      r4,PACACURRENT(r13)
+        addi    r5,r4,THREAD            /* Get THREAD */
+        oris    r12,r12,MSR_VEC@h
+        std     r12,_MSR(r1)
+        li      r4,1
+        li      r10,THREAD_VSCR
+        stw     r4,THREAD_USED_VR(r5)
+        lvx     vr0,r10,r5
+        mtvscr  vr0
+        REST_32VRS(0,r4,r5)
+#ifndef CONFIG_SMP
+        /* Update last_task_used_math to 'current' */
+        subi    r4,r5,THREAD            /* Back to 'current' */
+        std     r4,0(r3)
+#endif /* CONFIG_SMP */
+        /* restore registers and return */
+        b       fast_exception_return
+#endif /* CONFIG_ALTIVEC */
+
+/*
+ * Hash table stuff
+ */
+        .align  7
+_GLOBAL(do_hash_page)
+        std     r3,_DAR(r1)
+        std     r4,_DSISR(r1)
+
+        andis.  r0,r4,0xa450            /* weird error? */
+        bne-    .handle_page_fault      /* if not, try to insert a HPTE */
+BEGIN_FTR_SECTION
+        andis.  r0,r4,0x0020            /* Is it a segment table fault? */
+        bne-    .do_ste_alloc           /* If so handle it */
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+
+        /*
+         * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
+         * accessing a userspace segment (even from the kernel). We assume
+         * kernel addresses always have the high bit set.
+         */
+        rlwinm  r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
+        rotldi  r0,r3,15                /* Move high bit into MSR_PR posn */
+        orc     r0,r12,r0               /* MSR_PR | ~high_bit */
+        rlwimi  r4,r0,32-13,30,30       /* becomes _PAGE_USER access bit */
+        ori     r4,r4,1                 /* add _PAGE_PRESENT */
+        rlwimi  r4,r5,22+2,31-2,31-2    /* Set _PAGE_EXEC if trap is 0x400 */
+
+        /*
+         * On iSeries, we soft-disable interrupts here, then
+         * hard-enable interrupts so that the hash_page code can spin on
+         * the hash_table_lock without problems on a shared processor.
+         */
+        DISABLE_INTS
+
+        /*
+         * r3 contains the faulting address
+         * r4 contains the required access permissions
+         * r5 contains the trap number
+         *
+         * at return r3 = 0 for success
+         */
+        bl      .hash_page              /* build HPTE if possible */
+        cmpdi   r3,0                    /* see if hash_page succeeded */
+
+#ifdef DO_SOFT_DISABLE
+        /*
+         * If we had interrupts soft-enabled at the point where the
+         * DSI/ISI occurred, and an interrupt came in during hash_page,
+         * handle it now.
+         * We jump to ret_from_except_lite rather than fast_exception_return
+         * because ret_from_except_lite will check for and handle pending
+         * interrupts if necessary.
+         */
+        beq     .ret_from_except_lite
+        /* For a hash failure, we don't bother re-enabling interrupts */
+        ble-    12f
+
+        /*
+         * hash_page couldn't handle it, set soft interrupt enable back
+         * to what it was before the trap.  Note that .local_irq_restore
+         * handles any interrupts pending at this point.
+         */
+        ld      r3,SOFTE(r1)
+        bl      .local_irq_restore
+        b       11f
+#else
+        beq     fast_exception_return   /* Return from exception on success */
+        ble-    12f                     /* Failure return from hash_page */
+
+        /* fall through */
+#endif
+
+/* Here we have a page fault that hash_page can't handle. */
+_GLOBAL(handle_page_fault)
+        ENABLE_INTS
+11:     ld      r4,_DAR(r1)
+        ld      r5,_DSISR(r1)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .do_page_fault
+        cmpdi   r3,0
+        beq+    .ret_from_except_lite
+        bl      .save_nvgprs
+        mr      r5,r3
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        lwz     r4,_DAR(r1)
+        bl      .bad_page_fault
+        b       .ret_from_except
+
+/* We have a page fault that hash_page could handle but HV refused
+ * the PTE insertion
+ */
+12:     bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        lwz     r4,_DAR(r1)
+        bl      .low_hash_fault
+        b       .ret_from_except
+
+        /* here we have a segment miss */
+_GLOBAL(do_ste_alloc)
+        bl      .ste_allocate           /* try to insert stab entry */
+        cmpdi   r3,0
+        beq+    fast_exception_return
+        b       .handle_page_fault
+
+/*
+ * r13 points to the PACA, r9 contains the saved CR,
+ * r11 and r12 contain the saved SRR0 and SRR1.
+ * r9 - r13 are saved in paca->exslb.
+ * We assume we aren't going to take any exceptions during this procedure.
+ * We assume (DAR >> 60) == 0xc.
+ */
+        .align  7
+_GLOBAL(do_stab_bolted)
+        stw     r9,PACA_EXSLB+EX_CCR(r13)       /* save CR in exc. frame */
+        std     r11,PACA_EXSLB+EX_SRR0(r13)     /* save SRR0 in exc. frame */
+
+        /* Hash to the primary group */
+        ld      r10,PACASTABVIRT(r13)
+        mfspr   r11,SPRN_DAR
+        srdi    r11,r11,28
+        rldimi  r10,r11,7,52    /* r10 = first ste of the group */
+
+        /* Calculate VSID */
+        /* This is a kernel address, so protovsid = ESID */
+        ASM_VSID_SCRAMBLE(r11, r9)
+        rldic   r9,r11,12,16    /* r9 = vsid << 12 */
+
+        /* Search the primary group for a free entry */
+1:      ld      r11,0(r10)      /* Test valid bit of the current ste    */
+        andi.   r11,r11,0x80
+        beq     2f
+        addi    r10,r10,16
+        andi.   r11,r10,0x70
+        bne     1b
+
+        /* Stick for only searching the primary group for now.          */
+        /* At least for now, we use a very simple random castout scheme */
+        /* Use the TB as a random number ;  OR in 1 to avoid entry 0    */
+        mftb    r11
+        rldic   r11,r11,4,57    /* r11 = (r11 << 4) & 0x70 */
+        ori     r11,r11,0x10
+
+        /* r10 currently points to an ste one past the group of interest */
+        /* make it point to the randomly selected entry                 */
+        subi    r10,r10,128
+        or      r10,r10,r11     /* r10 is the entry to invalidate       */
+
+        isync                   /* mark the entry invalid               */
+        ld      r11,0(r10)
+        rldicl  r11,r11,56,1    /* clear the valid bit */
+        rotldi  r11,r11,8
+        std     r11,0(r10)
+        sync
+
+        clrrdi  r11,r11,28      /* Get the esid part of the ste         */
+        slbie   r11
+
+2:      std     r9,8(r10)       /* Store the vsid part of the ste       */
+        eieio
+
+        mfspr   r11,SPRN_DAR            /* Get the new esid                     */
+        clrrdi  r11,r11,28      /* Permits a full 32b of ESID           */
+        ori     r11,r11,0x90    /* Turn on valid and kp                 */
+        std     r11,0(r10)      /* Put new entry back into the stab     */
+
+        sync
+
+        /* All done -- return from exception. */
+        lwz     r9,PACA_EXSLB+EX_CCR(r13)       /* get saved CR */
+        ld      r11,PACA_EXSLB+EX_SRR0(r13)     /* get saved SRR0 */
+
+        andi.   r10,r12,MSR_RI
+        beq-    unrecov_slb
+
+        mtcrf   0x80,r9                 /* restore CR */
+
+        mfmsr   r10
+        clrrdi  r10,r10,2
+        mtmsrd  r10,1
+
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
+        ld      r9,PACA_EXSLB+EX_R9(r13)
+        ld      r10,PACA_EXSLB+EX_R10(r13)
+        ld      r11,PACA_EXSLB+EX_R11(r13)
+        ld      r12,PACA_EXSLB+EX_R12(r13)
+        ld      r13,PACA_EXSLB+EX_R13(r13)
+        rfid
+        b       .       /* prevent speculative execution */
+
+/*
+ * r13 points to the PACA, r9 contains the saved CR,
+ * r11 and r12 contain the saved SRR0 and SRR1.
+ * r3 has the faulting address
+ * r9 - r13 are saved in paca->exslb.
+ * r3 is saved in paca->slb_r3
+ * We assume we aren't going to take any exceptions during this procedure.
+ */
+_GLOBAL(do_slb_miss)
+        mflr    r10
+
+        stw     r9,PACA_EXSLB+EX_CCR(r13)       /* save CR in exc. frame */
+        std     r10,PACA_EXSLB+EX_LR(r13)       /* save LR */
+
+        bl      .slb_allocate                   /* handle it */
+
+        /* All done -- return from exception. */
+
+        ld      r10,PACA_EXSLB+EX_LR(r13)
+        ld      r3,PACA_EXSLB+EX_R3(r13)
+        lwz     r9,PACA_EXSLB+EX_CCR(r13)       /* get saved CR */
+#ifdef CONFIG_PPC_ISERIES
+        ld      r11,PACALPPACA+LPPACASRR0(r13)  /* get SRR0 value */
+#endif /* CONFIG_PPC_ISERIES */
+
+        mtlr    r10
+
+        andi.   r10,r12,MSR_RI  /* check for unrecoverable exception */
+        beq-    unrecov_slb
+
+.machine        push
+.machine        "power4"
+        mtcrf   0x80,r9
+        mtcrf   0x01,r9         /* slb_allocate uses cr0 and cr7 */
+.machine        pop
+
+#ifdef CONFIG_PPC_ISERIES
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
+#endif /* CONFIG_PPC_ISERIES */
+        ld      r9,PACA_EXSLB+EX_R9(r13)
+        ld      r10,PACA_EXSLB+EX_R10(r13)
+        ld      r11,PACA_EXSLB+EX_R11(r13)
+        ld      r12,PACA_EXSLB+EX_R12(r13)
+        ld      r13,PACA_EXSLB+EX_R13(r13)
+        rfid
+        b       .       /* prevent speculative execution */
+
+unrecov_slb:
+        EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
+        DISABLE_INTS
+        bl      .save_nvgprs
+1:      addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .unrecoverable_exception
+        b       1b
+
+/*
+ * Space for CPU0's segment table.
+ *
+ * On iSeries, the hypervisor must fill in at least one entry before
+ * we get control (with relocate on).  The address is give to the hv
+ * as a page number (see xLparMap in lpardata.c), so this must be at a
+ * fixed address (the linker can't compute (u64)&initial_stab >>
+ * PAGE_SHIFT).
+ */
+        . = STAB0_PHYS_ADDR     /* 0x6000 */
+        .globl initial_stab
+initial_stab:
+        .space  4096
+
+/*
+ * Data area reserved for FWNMI option.
+ * This address (0x7000) is fixed by the RPA.
+ */
+        .= 0x7000
+        .globl fwnmi_data_area
+fwnmi_data_area:
+
+        /* iSeries does not use the FWNMI stuff, so it is safe to put
+         * this here, even if we later allow kernels that will boot on
+         * both pSeries and iSeries */
+#ifdef CONFIG_PPC_ISERIES
+        . = LPARMAP_PHYS
+#include "lparmap.s"
+/*
+ * This ".text" is here for old compilers that generate a trailing
+ * .note section when compiling .c files to .s
+ */
+        .text
+#endif /* CONFIG_PPC_ISERIES */
+
+        . = 0x8000
+
+/*
+ * On pSeries, secondary processors spin in the following code.
+ * At entry, r3 = this processor's number (physical cpu id)
+ */
+_GLOBAL(pSeries_secondary_smp_init)
+        mr      r24,r3
+        
+        /* turn on 64-bit mode */
+        bl      .enable_64b_mode
+        isync
+
+        /* Copy some CPU settings from CPU 0 */
+        bl      .__restore_cpu_setup
+
+        /* Set up a paca value for this processor. Since we have the
+         * physical cpu id in r24, we need to search the pacas to find
+         * which logical id maps to our physical one.
+         */
+        LOADADDR(r13, paca)             /* Get base vaddr of paca array  */
+        li      r5,0                    /* logical cpu id                */
+1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
+        cmpw    r6,r24                  /* Compare to our id             */
+        beq     2f
+        addi    r13,r13,PACA_SIZE       /* Loop to next PACA on miss     */
+        addi    r5,r5,1
+        cmpwi   r5,NR_CPUS
+        blt     1b
+
+        mr      r3,r24                  /* not found, copy phys to r3    */
+        b       .kexec_wait             /* next kernel might do better   */
+
+2:      mtspr   SPRN_SPRG3,r13          /* Save vaddr of paca in SPRG3   */
+        /* From now on, r24 is expected to be logical cpuid */
+        mr      r24,r5
+3:      HMT_LOW
+        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
+                                        /* start.                        */
+        sync
+
+        /* Create a temp kernel stack for use before relocation is on.  */
+        ld      r1,PACAEMERGSP(r13)
+        subi    r1,r1,STACK_FRAME_OVERHEAD
+
+        cmpwi   0,r23,0
+#ifdef CONFIG_SMP
+        bne     .__secondary_start
+#endif
+        b       3b                      /* Loop until told to go         */
+
+#ifdef CONFIG_PPC_ISERIES
+_STATIC(__start_initialization_iSeries)
+        /* Clear out the BSS */
+        LOADADDR(r11,__bss_stop)
+        LOADADDR(r8,__bss_start)
+        sub     r11,r11,r8              /* bss size                     */
+        addi    r11,r11,7               /* round up to an even double word */
+        rldicl. r11,r11,61,3            /* shift right by 3             */
+        beq     4f
+        addi    r8,r8,-8
+        li      r0,0
+        mtctr   r11                     /* zero this many doublewords   */
+3:      stdu    r0,8(r8)
+        bdnz    3b
+4:
+        LOADADDR(r1,init_thread_union)
+        addi    r1,r1,THREAD_SIZE
+        li      r0,0
+        stdu    r0,-STACK_FRAME_OVERHEAD(r1)
+
+        LOADADDR(r3,cpu_specs)
+        LOADADDR(r4,cur_cpu_spec)
+        li      r5,0
+        bl      .identify_cpu
+
+        LOADADDR(r2,__toc_start)
+        addi    r2,r2,0x4000
+        addi    r2,r2,0x4000
+
+        bl      .iSeries_early_setup
+        bl      .early_setup
+
+        /* relocation is on at this point */
+
+        b       .start_here_common
+#endif /* CONFIG_PPC_ISERIES */
+
+#ifdef CONFIG_PPC_MULTIPLATFORM
+
+_STATIC(__mmu_off)
+        mfmsr   r3
+        andi.   r0,r3,MSR_IR|MSR_DR
+        beqlr
+        andc    r3,r3,r0
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        sync
+        rfid
+        b       .       /* prevent speculative execution */
+
+
+/*
+ * Here is our main kernel entry point. We support currently 2 kind of entries
+ * depending on the value of r5.
+ *
+ *   r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
+ *                 in r3...r7
+ *   
+ *   r5 == NULL -> kexec style entry. r3 is a physical pointer to the
+ *                 DT block, r4 is a physical pointer to the kernel itself
+ *
+ */
+_GLOBAL(__start_initialization_multiplatform)
+        /*
+         * Are we booted from a PROM Of-type client-interface ?
+         */
+        cmpldi  cr0,r5,0
+        bne     .__boot_from_prom               /* yes -> prom */
+
+        /* Save parameters */
+        mr      r31,r3
+        mr      r30,r4
+
+        /* Make sure we are running in 64 bits mode */
+        bl      .enable_64b_mode
+
+        /* Setup some critical 970 SPRs before switching MMU off */
+        bl      .__970_cpu_preinit
+
+        /* cpu # */
+        li      r24,0
+
+        /* Switch off MMU if not already */
+        LOADADDR(r4, .__after_prom_start - KERNELBASE)
+        add     r4,r4,r30
+        bl      .__mmu_off
+        b       .__after_prom_start
+
+_STATIC(__boot_from_prom)
+        /* Save parameters */
+        mr      r31,r3
+        mr      r30,r4
+        mr      r29,r5
+        mr      r28,r6
+        mr      r27,r7
+
+        /* Make sure we are running in 64 bits mode */
+        bl      .enable_64b_mode
+
+        /* put a relocation offset into r3 */
+        bl      .reloc_offset
+
+        LOADADDR(r2,__toc_start)
+        addi    r2,r2,0x4000
+        addi    r2,r2,0x4000
+
+        /* Relocate the TOC from a virt addr to a real addr */
+        add     r2,r2,r3
+
+        /* Restore parameters */
+        mr      r3,r31
+        mr      r4,r30
+        mr      r5,r29
+        mr      r6,r28
+        mr      r7,r27
+
+        /* Do all of the interaction with OF client interface */
+        bl      .prom_init
+        /* We never return */
+        trap
+
+/*
+ * At this point, r3 contains the physical address we are running at,
+ * returned by prom_init()
+ */
+_STATIC(__after_prom_start)
+
+/*
+ * We need to run with __start at physical address 0.
+ * This will leave some code in the first 256B of
+ * real memory, which are reserved for software use.
+ * The remainder of the first page is loaded with the fixed
+ * interrupt vectors.  The next two pages are filled with
+ * unknown exception placeholders.
+ *
+ * Note: This process overwrites the OF exception vectors.
+ *      r26 == relocation offset
+ *      r27 == KERNELBASE
+ */
+        bl      .reloc_offset
+        mr      r26,r3
+        SET_REG_TO_CONST(r27,KERNELBASE)
+
+        li      r3,0                    /* target addr */
+
+        // XXX FIXME: Use phys returned by OF (r30)
+        add     r4,r27,r26              /* source addr                   */
+                                        /* current address of _start     */
+                                        /*   i.e. where we are running   */
+                                        /*      the source addr          */
+
+        LOADADDR(r5,copy_to_here)       /* # bytes of memory to copy     */
+        sub     r5,r5,r27
+
+        li      r6,0x100                /* Start offset, the first 0x100 */
+                                        /* bytes were copied earlier.    */
+
+        bl      .copy_and_flush         /* copy the first n bytes        */
+                                        /* this includes the code being  */
+                                        /* executed here.                */
+
+        LOADADDR(r0, 4f)                /* Jump to the copy of this code */
+        mtctr   r0                      /* that we just made/relocated   */
+        bctr
+
+4:      LOADADDR(r5,klimit)
+        add     r5,r5,r26
+        ld      r5,0(r5)                /* get the value of klimit */
+        sub     r5,r5,r27
+        bl      .copy_and_flush         /* copy the rest */
+        b       .start_here_multiplatform
+
+#endif /* CONFIG_PPC_MULTIPLATFORM */
+
+/*
+ * Copy routine used to copy the kernel to start at physical address 0
+ * and flush and invalidate the caches as needed.
+ * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
+ * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
+ *
+ * Note: this routine *only* clobbers r0, r6 and lr
+ */
+_GLOBAL(copy_and_flush)
+        addi    r5,r5,-8
+        addi    r6,r6,-8
+4:      li      r0,16                   /* Use the least common         */
+                                        /* denominator cache line       */
+                                        /* size.  This results in       */
+                                        /* extra cache line flushes     */
+                                        /* but operation is correct.    */
+                                        /* Can't get cache line size    */
+                                        /* from NACA as it is being     */
+                                        /* moved too.                   */
+
+        mtctr   r0                      /* put # words/line in ctr      */
+3:      addi    r6,r6,8                 /* copy a cache line            */
+        ldx     r0,r6,r4
+        stdx    r0,r6,r3
+        bdnz    3b
+        dcbst   r6,r3                   /* write it to memory           */
+        sync
+        icbi    r6,r3                   /* flush the icache line        */
+        cmpld   0,r6,r5
+        blt     4b
+        sync
+        addi    r5,r5,8
+        addi    r6,r6,8
+        blr
+
+.align 8
+copy_to_here:
+
+#ifdef CONFIG_SMP
+#ifdef CONFIG_PPC_PMAC
+/*
+ * On PowerMac, secondary processors starts from the reset vector, which
+ * is temporarily turned into a call to one of the functions below.
+ */
+        .section ".text";
+        .align 2 ;
+
+        .globl  __secondary_start_pmac_0
+__secondary_start_pmac_0:
+        /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
+        li      r24,0
+        b       1f
+        li      r24,1
+        b       1f
+        li      r24,2
+        b       1f
+        li      r24,3
+1:
+        
+_GLOBAL(pmac_secondary_start)
+        /* turn on 64-bit mode */
+        bl      .enable_64b_mode
+        isync
+
+        /* Copy some CPU settings from CPU 0 */
+        bl      .__restore_cpu_setup
+
+        /* pSeries do that early though I don't think we really need it */
+        mfmsr   r3
+        ori     r3,r3,MSR_RI
+        mtmsrd  r3                      /* RI on */
+
+        /* Set up a paca value for this processor. */
+        LOADADDR(r4, paca)               /* Get base vaddr of paca array        */
+        mulli   r13,r24,PACA_SIZE        /* Calculate vaddr of right paca */
+        add     r13,r13,r4              /* for this processor.          */
+        mtspr   SPRN_SPRG3,r13           /* Save vaddr of paca in SPRG3 */
+
+        /* Create a temp kernel stack for use before relocation is on.  */
+        ld      r1,PACAEMERGSP(r13)
+        subi    r1,r1,STACK_FRAME_OVERHEAD
+
+        b       .__secondary_start
+
+#endif /* CONFIG_PPC_PMAC */
+
+/*
+ * This function is called after the master CPU has released the
+ * secondary processors.  The execution environment is relocation off.
+ * The paca for this processor has the following fields initialized at
+ * this point:
+ *   1. Processor number
+ *   2. Segment table pointer (virtual address)
+ * On entry the following are set:
+ *   r1 = stack pointer.  vaddr for iSeries, raddr (temp stack) for pSeries
+ *   r24   = cpu# (in Linux terms)
+ *   r13   = paca virtual address
+ *   SPRG3 = paca virtual address
+ */
+_GLOBAL(__secondary_start)
+
+        HMT_MEDIUM                      /* Set thread priority to MEDIUM */
+
+        ld      r2,PACATOC(r13)
+        li      r6,0
+        stb     r6,PACAPROCENABLED(r13)
+
+#ifndef CONFIG_PPC_ISERIES
+        /* Initialize the page table pointer register. */
+        LOADADDR(r6,_SDR1)
+        ld      r6,0(r6)                /* get the value of _SDR1        */
+        mtspr   SPRN_SDR1,r6                    /* set the htab location         */
+#endif
+        /* Initialize the first segment table (or SLB) entry             */
+        ld      r3,PACASTABVIRT(r13)    /* get addr of segment table     */
+        bl      .stab_initialize
+
+        /* Initialize the kernel stack.  Just a repeat for iSeries.      */
+        LOADADDR(r3,current_set)
+        sldi    r28,r24,3               /* get current_set[cpu#]         */
+        ldx     r1,r3,r28
+        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
+        std     r1,PACAKSAVE(r13)
+
+        ld      r3,PACASTABREAL(r13)    /* get raddr of segment table    */
+        ori     r4,r3,1                 /* turn on valid bit             */
+
+#ifdef CONFIG_PPC_ISERIES
+        li      r0,-1                   /* hypervisor call */
+        li      r3,1
+        sldi    r3,r3,63                /* 0x8000000000000000 */
+        ori     r3,r3,4                 /* 0x8000000000000004 */
+        sc                              /* HvCall_setASR */
+#else
+        /* set the ASR */
+        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg         */
+        ld      r3,0(r3)
+        lwz     r3,PLATFORM(r3)         /* r3 = platform flags           */
+        andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
+        beq     98f                     /* branch if result is 0  */
+        mfspr   r3,SPRN_PVR
+        srwi    r3,r3,16
+        cmpwi   r3,0x37                 /* SStar  */
+        beq     97f
+        cmpwi   r3,0x36                 /* IStar  */
+        beq     97f
+        cmpwi   r3,0x34                 /* Pulsar */
+        bne     98f
+97:     li      r3,H_SET_ASR            /* hcall = H_SET_ASR */
+        HVSC                            /* Invoking hcall */
+        b       99f
+98:                                     /* !(rpa hypervisor) || !(star)  */
+        mtasr   r4                      /* set the stab location         */
+99:
+#endif
+        li      r7,0
+        mtlr    r7
+
+        /* enable MMU and jump to start_secondary */
+        LOADADDR(r3,.start_secondary_prolog)
+        SET_REG_TO_CONST(r4, MSR_KERNEL)
+#ifdef DO_SOFT_DISABLE
+        ori     r4,r4,MSR_EE
+#endif
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        rfid
+        b       .       /* prevent speculative execution */
+
+/* 
+ * Running with relocation on at this point.  All we want to do is
+ * zero the stack back-chain pointer before going into C code.
+ */
+_GLOBAL(start_secondary_prolog)
+        li      r3,0
+        std     r3,0(r1)                /* Zero the stack frame pointer */
+        bl      .start_secondary
+#endif
+
+/*
+ * This subroutine clobbers r11 and r12
+ */
+_GLOBAL(enable_64b_mode)
+        mfmsr   r11                     /* grab the current MSR */
+        li      r12,1
+        rldicr  r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
+        or      r11,r11,r12
+        li      r12,1
+        rldicr  r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
+        or      r11,r11,r12
+        mtmsrd  r11
+        isync
+        blr
+
+#ifdef CONFIG_PPC_MULTIPLATFORM
+/*
+ * This is where the main kernel code starts.
+ */
+_STATIC(start_here_multiplatform)
+        /* get a new offset, now that the kernel has moved. */
+        bl      .reloc_offset
+        mr      r26,r3
+
+        /* Clear out the BSS. It may have been done in prom_init,
+         * already but that's irrelevant since prom_init will soon
+         * be detached from the kernel completely. Besides, we need
+         * to clear it now for kexec-style entry.
+         */
+        LOADADDR(r11,__bss_stop)
+        LOADADDR(r8,__bss_start)
+        sub     r11,r11,r8              /* bss size                     */
+        addi    r11,r11,7               /* round up to an even double word */
+        rldicl. r11,r11,61,3            /* shift right by 3             */
+        beq     4f
+        addi    r8,r8,-8
+        li      r0,0
+        mtctr   r11                     /* zero this many doublewords   */
+3:      stdu    r0,8(r8)
+        bdnz    3b
+4:
+
+        mfmsr   r6
+        ori     r6,r6,MSR_RI
+        mtmsrd  r6                      /* RI on */
+
+#ifdef CONFIG_HMT
+        /* Start up the second thread on cpu 0 */
+        mfspr   r3,SPRN_PVR
+        srwi    r3,r3,16
+        cmpwi   r3,0x34                 /* Pulsar  */
+        beq     90f
+        cmpwi   r3,0x36                 /* Icestar */
+        beq     90f
+        cmpwi   r3,0x37                 /* SStar   */
+        beq     90f
+        b       91f                     /* HMT not supported */
+90:     li      r3,0
+        bl      .hmt_start_secondary
+91:
+#endif
+
+        /* The following gets the stack and TOC set up with the regs */
+        /* pointing to the real addr of the kernel stack.  This is   */
+        /* all done to support the C function call below which sets  */
+        /* up the htab.  This is done because we have relocated the  */
+        /* kernel but are still running in real mode. */
+
+        LOADADDR(r3,init_thread_union)
+        add     r3,r3,r26
+
+        /* set up a stack pointer (physical address) */
+        addi    r1,r3,THREAD_SIZE
+        li      r0,0
+        stdu    r0,-STACK_FRAME_OVERHEAD(r1)
+
+        /* set up the TOC (physical address) */
+        LOADADDR(r2,__toc_start)
+        addi    r2,r2,0x4000
+        addi    r2,r2,0x4000
+        add     r2,r2,r26
+
+        LOADADDR(r3,cpu_specs)
+        add     r3,r3,r26
+        LOADADDR(r4,cur_cpu_spec)
+        add     r4,r4,r26
+        mr      r5,r26
+        bl      .identify_cpu
+
+        /* Save some low level config HIDs of CPU0 to be copied to
+         * other CPUs later on, or used for suspend/resume
+         */
+        bl      .__save_cpu_setup
+        sync
+
+        /* Setup a valid physical PACA pointer in SPRG3 for early_setup
+         * note that boot_cpuid can always be 0 nowadays since there is
+         * nowhere it can be initialized differently before we reach this
+         * code
+         */
+        LOADADDR(r27, boot_cpuid)
+        add     r27,r27,r26
+        lwz     r27,0(r27)
+
+        LOADADDR(r24, paca)             /* Get base vaddr of paca array  */
+        mulli   r13,r27,PACA_SIZE       /* Calculate vaddr of right paca */
+        add     r13,r13,r24             /* for this processor.           */
+        add     r13,r13,r26             /* convert to physical addr      */
+        mtspr   SPRN_SPRG3,r13          /* PPPBBB: Temp... -Peter */
+        
+        /* Do very early kernel initializations, including initial hash table,
+         * stab and slb setup before we turn on relocation.     */
+
+        /* Restore parameters passed from prom_init/kexec */
+        mr      r3,r31
+        bl      .early_setup
+
+        /* set the ASR */
+        ld      r3,PACASTABREAL(r13)
+        ori     r4,r3,1                 /* turn on valid bit             */
+        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
+        ld      r3,0(r3)
+        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
+        andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
+        beq     98f                     /* branch if result is 0  */
+        mfspr   r3,SPRN_PVR
+        srwi    r3,r3,16
+        cmpwi   r3,0x37                 /* SStar */
+        beq     97f
+        cmpwi   r3,0x36                 /* IStar  */
+        beq     97f
+        cmpwi   r3,0x34                 /* Pulsar */
+        bne     98f
+97:     li      r3,H_SET_ASR            /* hcall = H_SET_ASR */
+        HVSC                            /* Invoking hcall */
+        b       99f
+98:                                     /* !(rpa hypervisor) || !(star) */
+        mtasr   r4                      /* set the stab location        */
+99:
+        /* Set SDR1 (hash table pointer) */
+        ld      r3,systemcfg@got(r2)    /* r3 = ptr to systemcfg */
+        ld      r3,0(r3)
+        lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
+        /* Test if bit 0 is set (LPAR bit) */
+        andi.   r3,r3,PLATFORM_LPAR
+        bne     98f                     /* branch if result is !0  */
+        LOADADDR(r6,_SDR1)              /* Only if NOT LPAR */
+        add     r6,r6,r26
+        ld      r6,0(r6)                /* get the value of _SDR1 */
+        mtspr   SPRN_SDR1,r6                    /* set the htab location  */
+98: 
+        LOADADDR(r3,.start_here_common)
+        SET_REG_TO_CONST(r4, MSR_KERNEL)
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        rfid
+        b       .       /* prevent speculative execution */
+#endif /* CONFIG_PPC_MULTIPLATFORM */
+        
+        /* This is where all platforms converge execution */
+_STATIC(start_here_common)
+        /* relocation is on at this point */
+
+        /* The following code sets up the SP and TOC now that we are */
+        /* running with translation enabled. */
+
+        LOADADDR(r3,init_thread_union)
+
+        /* set up the stack */
+        addi    r1,r3,THREAD_SIZE
+        li      r0,0
+        stdu    r0,-STACK_FRAME_OVERHEAD(r1)
+
+        /* Apply the CPUs-specific fixups (nop out sections not relevant
+         * to this CPU
+         */
+        li      r3,0
+        bl      .do_cpu_ftr_fixups
+
+        LOADADDR(r26, boot_cpuid)
+        lwz     r26,0(r26)
+
+        LOADADDR(r24, paca)             /* Get base vaddr of paca array  */
+        mulli   r13,r26,PACA_SIZE       /* Calculate vaddr of right paca */
+        add     r13,r13,r24             /* for this processor.           */
+        mtspr   SPRN_SPRG3,r13
+
+        /* ptr to current */
+        LOADADDR(r4,init_task)
+        std     r4,PACACURRENT(r13)
+
+        /* Load the TOC */
+        ld      r2,PACATOC(r13)
+        std     r1,PACAKSAVE(r13)
+
+        bl      .setup_system
+
+        /* Load up the kernel context */
+5:
+#ifdef DO_SOFT_DISABLE
+        li      r5,0
+        stb     r5,PACAPROCENABLED(r13) /* Soft Disabled */
+        mfmsr   r5
+        ori     r5,r5,MSR_EE            /* Hard Enabled */
+        mtmsrd  r5
+#endif
+
+        bl .start_kernel
+
+_GLOBAL(hmt_init)
+#ifdef CONFIG_HMT
+        LOADADDR(r5, hmt_thread_data)
+        mfspr   r7,SPRN_PVR
+        srwi    r7,r7,16
+        cmpwi   r7,0x34                 /* Pulsar  */
+        beq     90f
+        cmpwi   r7,0x36                 /* Icestar */
+        beq     91f
+        cmpwi   r7,0x37                 /* SStar   */
+        beq     91f
+        b       101f
+90:     mfspr   r6,SPRN_PIR
+        andi.   r6,r6,0x1f
+        b       92f
+91:     mfspr   r6,SPRN_PIR
+        andi.   r6,r6,0x3ff
+92:     sldi    r4,r24,3
+        stwx    r6,r5,r4
+        bl      .hmt_start_secondary
+        b       101f
+
+__hmt_secondary_hold:
+        LOADADDR(r5, hmt_thread_data)
+        clrldi  r5,r5,4
+        li      r7,0
+        mfspr   r6,SPRN_PIR
+        mfspr   r8,SPRN_PVR
+        srwi    r8,r8,16
+        cmpwi   r8,0x34
+        bne     93f
+        andi.   r6,r6,0x1f
+        b       103f
+93:     andi.   r6,r6,0x3f
+
+103:    lwzx    r8,r5,r7
+        cmpw    r8,r6
+        beq     104f
+        addi    r7,r7,8
+        b       103b
+
+104:    addi    r7,r7,4
+        lwzx    r9,r5,r7
+        mr      r24,r9
+101:
+#endif
+        mr      r3,r24
+        b       .pSeries_secondary_smp_init
+
+#ifdef CONFIG_HMT
+_GLOBAL(hmt_start_secondary)
+        LOADADDR(r4,__hmt_secondary_hold)
+        clrldi  r4,r4,4
+        mtspr   SPRN_NIADORM, r4
+        mfspr   r4, SPRN_MSRDORM
+        li      r5, -65
+        and     r4, r4, r5
+        mtspr   SPRN_MSRDORM, r4
+        lis     r4,0xffef
+        ori     r4,r4,0x7403
+        mtspr   SPRN_TSC, r4
+        li      r4,0x1f4
+        mtspr   SPRN_TST, r4
+        mfspr   r4, SPRN_HID0
+        ori     r4, r4, 0x1
+        mtspr   SPRN_HID0, r4
+        mfspr   r4, SPRN_CTRLF
+        oris    r4, r4, 0x40
+        mtspr   SPRN_CTRLT, r4
+        blr
+#endif
+
+#if defined(CONFIG_KEXEC) || defined(CONFIG_SMP)
+_GLOBAL(smp_release_cpus)
+        /* All secondary cpus are spinning on a common
+         * spinloop, release them all now so they can start
+         * to spin on their individual paca spinloops.
+         * For non SMP kernels, the secondary cpus never
+         * get out of the common spinloop.
+         * XXX This does nothing useful on iSeries, secondaries are
+         * already waiting on their paca.
+         */
+        li      r3,1
+        LOADADDR(r5,__secondary_hold_spinloop)
+        std     r3,0(r5)
+        sync
+        blr
+#endif /* CONFIG_SMP */
+
+
+/*
+ * We put a few things here that have to be page-aligned.
+ * This stuff goes at the beginning of the bss, which is page-aligned.
+ */
+        .section ".bss"
+
+        .align  PAGE_SHIFT
+
+        .globl  empty_zero_page
+empty_zero_page:
+        .space  PAGE_SIZE
+
+        .globl  swapper_pg_dir
+swapper_pg_dir:
+        .space  PAGE_SIZE
+
+/*
+ * This space gets a copy of optional info passed to us by the bootstrap
+ * Used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+        .globl  cmd_line
+cmd_line:
+        .space  COMMAND_LINE_SIZE
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
new file mode 100644
index 000000000000..bc6d1ac55235
--- /dev/null
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -0,0 +1,860 @@
+/*
+ *  arch/ppc/kernel/except_8xx.S
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *  MPC8xx modifications by Dan Malek
+ *    Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
+ *
+ *  This file contains low-level support and setup for PowerPC 8xx
+ *  embedded processors, including trap and interrupt dispatch.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/cache.h>
+#include <asm/pgtable.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+/* Macro to make the code more readable. */
+#ifdef CONFIG_8xx_CPU6
+#define DO_8xx_CPU6(val, reg)   \
+        li      reg, val;       \
+        stw     reg, 12(r0);    \
+        lwz     reg, 12(r0);
+#else
+#define DO_8xx_CPU6(val, reg)
+#endif
+        .text
+        .globl  _stext
+_stext:
+        .text
+        .globl  _start
+_start:
+
+/* MPC8xx
+ * This port was done on an MBX board with an 860.  Right now I only
+ * support an ELF compressed (zImage) boot from EPPC-Bug because the
+ * code there loads up some registers before calling us:
+ *   r3: ptr to board info data
+ *   r4: initrd_start or if no initrd then 0
+ *   r5: initrd_end - unused if r4 is 0
+ *   r6: Start of command line string
+ *   r7: End of command line string
+ *
+ * I decided to use conditional compilation instead of checking PVR and
+ * adding more processor specific branches around code I don't need.
+ * Since this is an embedded processor, I also appreciate any memory
+ * savings I can get.
+ *
+ * The MPC8xx does not have any BATs, but it supports large page sizes.
+ * We first initialize the MMU to support 8M byte pages, then load one
+ * entry into each of the instruction and data TLBs to map the first
+ * 8M 1:1.  I also mapped an additional I/O space 1:1 so we can get to
+ * the "internal" processor registers before MMU_init is called.
+ *
+ * The TLB code currently contains a major hack.  Since I use the condition
+ * code register, I have to save and restore it.  I am out of registers, so
+ * I just store it in memory location 0 (the TLB handlers are not reentrant).
+ * To avoid making any decisions, I need to use the "segment" valid bit
+ * in the first level table, but that would require many changes to the
+ * Linux page directory/table functions that I don't want to do right now.
+ *
+ * I used to use SPRG2 for a temporary register in the TLB handler, but it
+ * has since been put to other uses.  I now use a hack to save a register
+ * and the CCR at memory location 0.....Someday I'll fix this.....
+ *      -- Dan
+ */
+        .globl  __start
+__start:
+        mr      r31,r3                  /* save parameters */
+        mr      r30,r4
+        mr      r29,r5
+        mr      r28,r6
+        mr      r27,r7
+
+        /* We have to turn on the MMU right away so we get cache modes
+         * set correctly.
+         */
+        bl      initial_mmu
+
+/* We now have the lower 8 Meg mapped into TLB entries, and the caches
+ * ready to work.
+ */
+
+turn_on_mmu:
+        mfmsr   r0
+        ori     r0,r0,MSR_DR|MSR_IR
+        mtspr   SPRN_SRR1,r0
+        lis     r0,start_here@h
+        ori     r0,r0,start_here@l
+        mtspr   SPRN_SRR0,r0
+        SYNC
+        rfi                             /* enables MMU */
+
+/*
+ * Exception entry code.  This code runs with address translation
+ * turned off, i.e. using physical addresses.
+ * We assume sprg3 has the physical address of the current
+ * task's thread_struct.
+ */
+#define EXCEPTION_PROLOG        \
+        mtspr   SPRN_SPRG0,r10; \
+        mtspr   SPRN_SPRG1,r11; \
+        mfcr    r10;            \
+        EXCEPTION_PROLOG_1;     \
+        EXCEPTION_PROLOG_2
+
+#define EXCEPTION_PROLOG_1      \
+        mfspr   r11,SPRN_SRR1;          /* check whether user or kernel */ \
+        andi.   r11,r11,MSR_PR; \
+        tophys(r11,r1);                 /* use tophys(r1) if kernel */ \
+        beq     1f;             \
+        mfspr   r11,SPRN_SPRG3; \
+        lwz     r11,THREAD_INFO-THREAD(r11);    \
+        addi    r11,r11,THREAD_SIZE;    \
+        tophys(r11,r11);        \
+1:      subi    r11,r11,INT_FRAME_SIZE  /* alloc exc. frame */
+
+
+#define EXCEPTION_PROLOG_2      \
+        CLR_TOP32(r11);         \
+        stw     r10,_CCR(r11);          /* save registers */ \
+        stw     r12,GPR12(r11); \
+        stw     r9,GPR9(r11);   \
+        mfspr   r10,SPRN_SPRG0; \
+        stw     r10,GPR10(r11); \
+        mfspr   r12,SPRN_SPRG1; \
+        stw     r12,GPR11(r11); \
+        mflr    r10;            \
+        stw     r10,_LINK(r11); \
+        mfspr   r12,SPRN_SRR0;  \
+        mfspr   r9,SPRN_SRR1;   \
+        stw     r1,GPR1(r11);   \
+        stw     r1,0(r11);      \
+        tovirt(r1,r11);                 /* set new kernel sp */ \
+        li      r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
+        MTMSRD(r10);                    /* (except for mach check in rtas) */ \
+        stw     r0,GPR0(r11);   \
+        SAVE_4GPRS(3, r11);     \
+        SAVE_2GPRS(7, r11)
+
+/*
+ * Note: code which follows this uses cr0.eq (set if from kernel),
+ * r11, r12 (SRR0), and r9 (SRR1).
+ *
+ * Note2: once we have set r1 we are in a position to take exceptions
+ * again, and we could thus set MSR:RI at that point.
+ */
+
+/*
+ * Exception vectors.
+ */
+#define EXCEPTION(n, label, hdlr, xfer)         \
+        . = n;                                  \
+label:                                          \
+        EXCEPTION_PROLOG;                       \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;     \
+        xfer(n, hdlr)
+
+#define EXC_XFER_TEMPLATE(n, hdlr, trap, copyee, tfer, ret)     \
+        li      r10,trap;                                       \
+        stw     r10,_TRAP(r11);                                 \
+        li      r10,MSR_KERNEL;                                 \
+        copyee(r10, r9);                                        \
+        bl      tfer;                                           \
+i##n:                                                           \
+        .long   hdlr;                                           \
+        .long   ret
+
+#define COPY_EE(d, s)           rlwimi d,s,0,16,16
+#define NOCOPY(d, s)
+
+#define EXC_XFER_STD(n, hdlr)           \
+        EXC_XFER_TEMPLATE(n, hdlr, n, NOCOPY, transfer_to_handler_full, \
+                          ret_from_except_full)
+
+#define EXC_XFER_LITE(n, hdlr)          \
+        EXC_XFER_TEMPLATE(n, hdlr, n+1, NOCOPY, transfer_to_handler, \
+                          ret_from_except)
+
+#define EXC_XFER_EE(n, hdlr)            \
+        EXC_XFER_TEMPLATE(n, hdlr, n, COPY_EE, transfer_to_handler_full, \
+                          ret_from_except_full)
+
+#define EXC_XFER_EE_LITE(n, hdlr)       \
+        EXC_XFER_TEMPLATE(n, hdlr, n+1, COPY_EE, transfer_to_handler, \
+                          ret_from_except)
+
+/* System reset */
+        EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
+
+/* Machine check */
+        . = 0x200
+MachineCheck:
+        EXCEPTION_PROLOG
+        mfspr r4,SPRN_DAR
+        stw r4,_DAR(r11)
+        mfspr r5,SPRN_DSISR
+        stw r5,_DSISR(r11)
+        addi r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_STD(0x200, machine_check_exception)
+
+/* Data access exception.
+ * This is "never generated" by the MPC8xx.  We jump to it for other
+ * translation errors.
+ */
+        . = 0x300
+DataAccess:
+        EXCEPTION_PROLOG
+        mfspr   r10,SPRN_DSISR
+        stw     r10,_DSISR(r11)
+        mr      r5,r10
+        mfspr   r4,SPRN_DAR
+        EXC_XFER_EE_LITE(0x300, handle_page_fault)
+
+/* Instruction access exception.
+ * This is "never generated" by the MPC8xx.  We jump to it for other
+ * translation errors.
+ */
+        . = 0x400
+InstructionAccess:
+        EXCEPTION_PROLOG
+        mr      r4,r12
+        mr      r5,r9
+        EXC_XFER_EE_LITE(0x400, handle_page_fault)
+
+/* External interrupt */
+        EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
+
+/* Alignment exception */
+        . = 0x600
+Alignment:
+        EXCEPTION_PROLOG
+        mfspr   r4,SPRN_DAR
+        stw     r4,_DAR(r11)
+        mfspr   r5,SPRN_DSISR
+        stw     r5,_DSISR(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE(0x600, alignment_exception)
+
+/* Program check exception */
+        EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
+
+/* No FPU on MPC8xx.  This exception is not supposed to happen.
+*/
+        EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
+
+/* Decrementer */
+        EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
+
+        EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
+
+/* System call */
+        . = 0xc00
+SystemCall:
+        EXCEPTION_PROLOG
+        EXC_XFER_EE_LITE(0xc00, DoSyscall)
+
+/* Single step - not used on 601 */
+        EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
+        EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
+
+/* On the MPC8xx, this is a software emulation interrupt.  It occurs
+ * for all unimplemented and illegal instructions.
+ */
+        EXCEPTION(0x1000, SoftEmu, SoftwareEmulation, EXC_XFER_STD)
+
+        . = 0x1100
+/*
+ * For the MPC8xx, this is a software tablewalk to load the instruction
+ * TLB.  It is modelled after the example in the Motorola manual.  The task
+ * switch loads the M_TWB register with the pointer to the first level table.
+ * If we discover there is no second level table (value is zero) or if there
+ * is an invalid pte, we load that into the TLB, which causes another fault
+ * into the TLB Error interrupt where we can handle such problems.
+ * We have to use the MD_xxx registers for the tablewalk because the
+ * equivalent MI_xxx registers only perform the attribute functions.
+ */
+InstructionTLBMiss:
+#ifdef CONFIG_8xx_CPU6
+        stw     r3, 8(r0)
+#endif
+        DO_8xx_CPU6(0x3f80, r3)
+        mtspr   SPRN_M_TW, r10  /* Save a couple of working registers */
+        mfcr    r10
+        stw     r10, 0(r0)
+        stw     r11, 4(r0)
+        mfspr   r10, SPRN_SRR0  /* Get effective address of fault */
+        DO_8xx_CPU6(0x3780, r3)
+        mtspr   SPRN_MD_EPN, r10        /* Have to use MD_EPN for walk, MI_EPN can't */
+        mfspr   r10, SPRN_M_TWB /* Get level 1 table entry address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        andi.   r11, r10, 0x0800        /* Address >= 0x80000000 */
+        beq     3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+        rlwimi  r10, r11, 0, 2, 19
+3:
+        lwz     r11, 0(r10)     /* Get the level 1 entry */
+        rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
+        beq     2f              /* If zero, don't try to find a pte */
+
+        /* We have a pte table, so load the MI_TWC with the attributes
+         * for this "segment."
+         */
+        ori     r11,r11,1               /* Set valid bit */
+        DO_8xx_CPU6(0x2b80, r3)
+        mtspr   SPRN_MI_TWC, r11        /* Set segment attributes */
+        DO_8xx_CPU6(0x3b80, r3)
+        mtspr   SPRN_MD_TWC, r11        /* Load pte table base address */
+        mfspr   r11, SPRN_MD_TWC        /* ....and get the pte address */
+        lwz     r10, 0(r11)     /* Get the pte */
+
+        ori     r10, r10, _PAGE_ACCESSED
+        stw     r10, 0(r11)
+
+        /* The Linux PTE won't go exactly into the MMU TLB.
+         * Software indicator bits 21, 22 and 28 must be clear.
+         * Software indicator bits 24, 25, 26, and 27 must be
+         * set.  All other Linux PTE bits control the behavior
+         * of the MMU.
+         */
+2:      li      r11, 0x00f0
+        rlwimi  r10, r11, 0, 24, 28     /* Set 24-27, clear 28 */
+        DO_8xx_CPU6(0x2d80, r3)
+        mtspr   SPRN_MI_RPN, r10        /* Update TLB entry */
+
+        mfspr   r10, SPRN_M_TW  /* Restore registers */
+        lwz     r11, 0(r0)
+        mtcr    r11
+        lwz     r11, 4(r0)
+#ifdef CONFIG_8xx_CPU6
+        lwz     r3, 8(r0)
+#endif
+        rfi
+
+        . = 0x1200
+DataStoreTLBMiss:
+#ifdef CONFIG_8xx_CPU6
+        stw     r3, 8(r0)
+#endif
+        DO_8xx_CPU6(0x3f80, r3)
+        mtspr   SPRN_M_TW, r10  /* Save a couple of working registers */
+        mfcr    r10
+        stw     r10, 0(r0)
+        stw     r11, 4(r0)
+        mfspr   r10, SPRN_M_TWB /* Get level 1 table entry address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        andi.   r11, r10, 0x0800
+        beq     3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+        rlwimi  r10, r11, 0, 2, 19
+3:
+        lwz     r11, 0(r10)     /* Get the level 1 entry */
+        rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
+        beq     2f              /* If zero, don't try to find a pte */
+
+        /* We have a pte table, so load fetch the pte from the table.
+         */
+        ori     r11, r11, 1     /* Set valid bit in physical L2 page */
+        DO_8xx_CPU6(0x3b80, r3)
+        mtspr   SPRN_MD_TWC, r11        /* Load pte table base address */
+        mfspr   r10, SPRN_MD_TWC        /* ....and get the pte address */
+        lwz     r10, 0(r10)     /* Get the pte */
+
+        /* Insert the Guarded flag into the TWC from the Linux PTE.
+         * It is bit 27 of both the Linux PTE and the TWC (at least
+         * I got that right :-).  It will be better when we can put
+         * this into the Linux pgd/pmd and load it in the operation
+         * above.
+         */
+        rlwimi  r11, r10, 0, 27, 27
+        DO_8xx_CPU6(0x3b80, r3)
+        mtspr   SPRN_MD_TWC, r11
+
+        mfspr   r11, SPRN_MD_TWC        /* get the pte address again */
+        ori     r10, r10, _PAGE_ACCESSED
+        stw     r10, 0(r11)
+
+        /* The Linux PTE won't go exactly into the MMU TLB.
+         * Software indicator bits 21, 22 and 28 must be clear.
+         * Software indicator bits 24, 25, 26, and 27 must be
+         * set.  All other Linux PTE bits control the behavior
+         * of the MMU.
+         */
+2:      li      r11, 0x00f0
+        rlwimi  r10, r11, 0, 24, 28     /* Set 24-27, clear 28 */
+        DO_8xx_CPU6(0x3d80, r3)
+        mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
+
+        mfspr   r10, SPRN_M_TW  /* Restore registers */
+        lwz     r11, 0(r0)
+        mtcr    r11
+        lwz     r11, 4(r0)
+#ifdef CONFIG_8xx_CPU6
+        lwz     r3, 8(r0)
+#endif
+        rfi
+
+/* This is an instruction TLB error on the MPC8xx.  This could be due
+ * to many reasons, such as executing guarded memory or illegal instruction
+ * addresses.  There is nothing to do but handle a big time error fault.
+ */
+        . = 0x1300
+InstructionTLBError:
+        b       InstructionAccess
+
+/* This is the data TLB error on the MPC8xx.  This could be due to
+ * many reasons, including a dirty update to a pte.  We can catch that
+ * one here, but anything else is an error.  First, we track down the
+ * Linux pte.  If it is valid, write access is allowed, but the
+ * page dirty bit is not set, we will set it and reload the TLB.  For
+ * any other case, we bail out to a higher level function that can
+ * handle it.
+ */
+        . = 0x1400
+DataTLBError:
+#ifdef CONFIG_8xx_CPU6
+        stw     r3, 8(r0)
+#endif
+        DO_8xx_CPU6(0x3f80, r3)
+        mtspr   SPRN_M_TW, r10  /* Save a couple of working registers */
+        mfcr    r10
+        stw     r10, 0(r0)
+        stw     r11, 4(r0)
+
+        /* First, make sure this was a store operation.
+        */
+        mfspr   r10, SPRN_DSISR
+        andis.  r11, r10, 0x0200        /* If set, indicates store op */
+        beq     2f
+
+        /* The EA of a data TLB miss is automatically stored in the MD_EPN
+         * register.  The EA of a data TLB error is automatically stored in
+         * the DAR, but not the MD_EPN register.  We must copy the 20 most
+         * significant bits of the EA from the DAR to MD_EPN before we
+         * start walking the page tables.  We also need to copy the CASID
+         * value from the M_CASID register.
+         * Addendum:  The EA of a data TLB error is _supposed_ to be stored
+         * in DAR, but it seems that this doesn't happen in some cases, such
+         * as when the error is due to a dcbi instruction to a page with a
+         * TLB that doesn't have the changed bit set.  In such cases, there
+         * does not appear to be any way  to recover the EA of the error
+         * since it is neither in DAR nor MD_EPN.  As a workaround, the
+         * _PAGE_HWWRITE bit is set for all kernel data pages when the PTEs
+         * are initialized in mapin_ram().  This will avoid the problem,
+         * assuming we only use the dcbi instruction on kernel addresses.
+         */
+        mfspr   r10, SPRN_DAR
+        rlwinm  r11, r10, 0, 0, 19
+        ori     r11, r11, MD_EVALID
+        mfspr   r10, SPRN_M_CASID
+        rlwimi  r11, r10, 0, 28, 31
+        DO_8xx_CPU6(0x3780, r3)
+        mtspr   SPRN_MD_EPN, r11
+
+        mfspr   r10, SPRN_M_TWB /* Get level 1 table entry address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        andi.   r11, r10, 0x0800
+        beq     3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+        rlwimi  r10, r11, 0, 2, 19
+3:
+        lwz     r11, 0(r10)     /* Get the level 1 entry */
+        rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
+        beq     2f              /* If zero, bail */
+
+        /* We have a pte table, so fetch the pte from the table.
+         */
+        ori     r11, r11, 1             /* Set valid bit in physical L2 page */
+        DO_8xx_CPU6(0x3b80, r3)
+        mtspr   SPRN_MD_TWC, r11                /* Load pte table base address */
+        mfspr   r11, SPRN_MD_TWC                /* ....and get the pte address */
+        lwz     r10, 0(r11)             /* Get the pte */
+
+        andi.   r11, r10, _PAGE_RW      /* Is it writeable? */
+        beq     2f                      /* Bail out if not */
+
+        /* Update 'changed', among others.
+        */
+        ori     r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+        mfspr   r11, SPRN_MD_TWC                /* Get pte address again */
+        stw     r10, 0(r11)             /* and update pte in table */
+
+        /* The Linux PTE won't go exactly into the MMU TLB.
+         * Software indicator bits 21, 22 and 28 must be clear.
+         * Software indicator bits 24, 25, 26, and 27 must be
+         * set.  All other Linux PTE bits control the behavior
+         * of the MMU.
+         */
+        li      r11, 0x00f0
+        rlwimi  r10, r11, 0, 24, 28     /* Set 24-27, clear 28 */
+        DO_8xx_CPU6(0x3d80, r3)
+        mtspr   SPRN_MD_RPN, r10        /* Update TLB entry */
+
+        mfspr   r10, SPRN_M_TW  /* Restore registers */
+        lwz     r11, 0(r0)
+        mtcr    r11
+        lwz     r11, 4(r0)
+#ifdef CONFIG_8xx_CPU6
+        lwz     r3, 8(r0)
+#endif
+        rfi
+2:
+        mfspr   r10, SPRN_M_TW  /* Restore registers */
+        lwz     r11, 0(r0)
+        mtcr    r11
+        lwz     r11, 4(r0)
+#ifdef CONFIG_8xx_CPU6
+        lwz     r3, 8(r0)
+#endif
+        b       DataAccess
+
+        EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
+
+/* On the MPC8xx, these next four traps are used for development
+ * support of breakpoints and such.  Someday I will get around to
+ * using them.
+ */
+        EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
+
+        . = 0x2000
+
+        .globl  giveup_fpu
+giveup_fpu:
+        blr
+
+/*
+ * This is where the main kernel code starts.
+ */
+start_here:
+        /* ptr to current */
+        lis     r2,init_task@h
+        ori     r2,r2,init_task@l
+
+        /* ptr to phys current thread */
+        tophys(r4,r2)
+        addi    r4,r4,THREAD    /* init task's THREAD */
+        mtspr   SPRN_SPRG3,r4
+        li      r3,0
+        mtspr   SPRN_SPRG2,r3   /* 0 => r1 has kernel sp */
+
+        /* stack */
+        lis     r1,init_thread_union@ha
+        addi    r1,r1,init_thread_union@l
+        li      r0,0
+        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+
+        bl      early_init      /* We have to do this with MMU on */
+
+/*
+ * Decide what sort of machine this is and initialize the MMU.
+ */
+        mr      r3,r31
+        mr      r4,r30
+        mr      r5,r29
+        mr      r6,r28
+        mr      r7,r27
+        bl      machine_init
+        bl      MMU_init
+
+/*
+ * Go back to running unmapped so we can load up new values
+ * and change to using our exception vectors.
+ * On the 8xx, all we have to do is invalidate the TLB to clear
+ * the old 8M byte TLB mappings and load the page table base register.
+ */
+        /* The right way to do this would be to track it down through
+         * init's THREAD like the context switch code does, but this is
+         * easier......until someone changes init's static structures.
+         */
+        lis     r6, swapper_pg_dir@h
+        ori     r6, r6, swapper_pg_dir@l
+        tophys(r6,r6)
+#ifdef CONFIG_8xx_CPU6
+        lis     r4, cpu6_errata_word@h
+        ori     r4, r4, cpu6_errata_word@l
+        li      r3, 0x3980
+        stw     r3, 12(r4)
+        lwz     r3, 12(r4)
+#endif
+        mtspr   SPRN_M_TWB, r6
+        lis     r4,2f@h
+        ori     r4,r4,2f@l
+        tophys(r4,r4)
+        li      r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        rfi
+/* Load up the kernel context */
+2:
+        SYNC                    /* Force all PTE updates to finish */
+        tlbia                   /* Clear all TLB entries */
+        sync                    /* wait for tlbia/tlbie to finish */
+        TLBSYNC                 /* ... on all CPUs */
+
+        /* set up the PTE pointers for the Abatron bdiGDB.
+        */
+        tovirt(r6,r6)
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        stw     r5, 0xf0(r0)    /* Must match your Abatron config file */
+        tophys(r5,r5)
+        stw     r6, 0(r5)
+
+/* Now turn on the MMU for real! */
+        li      r4,MSR_KERNEL
+        lis     r3,start_kernel@h
+        ori     r3,r3,start_kernel@l
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
+        rfi                     /* enable MMU and jump to start_kernel */
+
+/* Set up the initial MMU state so we can do the first level of
+ * kernel initialization.  This maps the first 8 MBytes of memory 1:1
+ * virtual to physical.  Also, set the cache mode since that is defined
+ * by TLB entries and perform any additional mapping (like of the IMMR).
+ * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel,
+ * 24 Mbytes of data, and the 8M IMMR space.  Anything not covered by
+ * these mappings is mapped by page tables.
+ */
+initial_mmu:
+        tlbia                   /* Invalidate all TLB entries */
+#ifdef CONFIG_PIN_TLB
+        lis     r8, MI_RSV4I@h
+        ori     r8, r8, 0x1c00
+#else
+        li      r8, 0
+#endif
+        mtspr   SPRN_MI_CTR, r8 /* Set instruction MMU control */
+
+#ifdef CONFIG_PIN_TLB
+        lis     r10, (MD_RSV4I | MD_RESETVAL)@h
+        ori     r10, r10, 0x1c00
+        mr      r8, r10
+#else
+        lis     r10, MD_RESETVAL@h
+#endif
+#ifndef CONFIG_8xx_COPYBACK
+        oris    r10, r10, MD_WTDEF@h
+#endif
+        mtspr   SPRN_MD_CTR, r10        /* Set data TLB control */
+
+        /* Now map the lower 8 Meg into the TLBs.  For this quick hack,
+         * we can load the instruction and data TLB registers with the
+         * same values.
+         */
+        lis     r8, KERNELBASE@h        /* Create vaddr for TLB */
+        ori     r8, r8, MI_EVALID       /* Mark it valid */
+        mtspr   SPRN_MI_EPN, r8
+        mtspr   SPRN_MD_EPN, r8
+        li      r8, MI_PS8MEG           /* Set 8M byte page */
+        ori     r8, r8, MI_SVALID       /* Make it valid */
+        mtspr   SPRN_MI_TWC, r8
+        mtspr   SPRN_MD_TWC, r8
+        li      r8, MI_BOOTINIT         /* Create RPN for address 0 */
+        mtspr   SPRN_MI_RPN, r8         /* Store TLB entry */
+        mtspr   SPRN_MD_RPN, r8
+        lis     r8, MI_Kp@h             /* Set the protection mode */
+        mtspr   SPRN_MI_AP, r8
+        mtspr   SPRN_MD_AP, r8
+
+        /* Map another 8 MByte at the IMMR to get the processor
+         * internal registers (among other things).
+         */
+#ifdef CONFIG_PIN_TLB
+        addi    r10, r10, 0x0100
+        mtspr   SPRN_MD_CTR, r10
+#endif
+        mfspr   r9, 638                 /* Get current IMMR */
+        andis.  r9, r9, 0xff80          /* Get 8Mbyte boundary */
+
+        mr      r8, r9                  /* Create vaddr for TLB */
+        ori     r8, r8, MD_EVALID       /* Mark it valid */
+        mtspr   SPRN_MD_EPN, r8
+        li      r8, MD_PS8MEG           /* Set 8M byte page */
+        ori     r8, r8, MD_SVALID       /* Make it valid */
+        mtspr   SPRN_MD_TWC, r8
+        mr      r8, r9                  /* Create paddr for TLB */
+        ori     r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */
+        mtspr   SPRN_MD_RPN, r8
+
+#ifdef CONFIG_PIN_TLB
+        /* Map two more 8M kernel data pages.
+        */
+        addi    r10, r10, 0x0100
+        mtspr   SPRN_MD_CTR, r10
+
+        lis     r8, KERNELBASE@h        /* Create vaddr for TLB */
+        addis   r8, r8, 0x0080          /* Add 8M */
+        ori     r8, r8, MI_EVALID       /* Mark it valid */
+        mtspr   SPRN_MD_EPN, r8
+        li      r9, MI_PS8MEG           /* Set 8M byte page */
+        ori     r9, r9, MI_SVALID       /* Make it valid */
+        mtspr   SPRN_MD_TWC, r9
+        li      r11, MI_BOOTINIT        /* Create RPN for address 0 */
+        addis   r11, r11, 0x0080        /* Add 8M */
+        mtspr   SPRN_MD_RPN, r8
+
+        addis   r8, r8, 0x0080          /* Add 8M */
+        mtspr   SPRN_MD_EPN, r8
+        mtspr   SPRN_MD_TWC, r9
+        addis   r11, r11, 0x0080        /* Add 8M */
+        mtspr   SPRN_MD_RPN, r8
+#endif
+
+        /* Since the cache is enabled according to the information we
+         * just loaded into the TLB, invalidate and enable the caches here.
+         * We should probably check/set other modes....later.
+         */
+        lis     r8, IDC_INVALL@h
+        mtspr   SPRN_IC_CST, r8
+        mtspr   SPRN_DC_CST, r8
+        lis     r8, IDC_ENABLE@h
+        mtspr   SPRN_IC_CST, r8
+#ifdef CONFIG_8xx_COPYBACK
+        mtspr   SPRN_DC_CST, r8
+#else
+        /* For a debug option, I left this here to easily enable
+         * the write through cache mode
+         */
+        lis     r8, DC_SFWT@h
+        mtspr   SPRN_DC_CST, r8
+        lis     r8, IDC_ENABLE@h
+        mtspr   SPRN_DC_CST, r8
+#endif
+        blr
+
+
+/*
+ * Set up to use a given MMU context.
+ * r3 is context number, r4 is PGD pointer.
+ *
+ * We place the physical address of the new task page directory loaded
+ * into the MMU base register, and set the ASID compare register with
+ * the new "context."
+ */
+_GLOBAL(set_context)
+
+#ifdef CONFIG_BDI_SWITCH
+        /* Context switch the PTE pointer for the Abatron BDI2000.
+         * The PGDIR is passed as second argument.
+         */
+        lis     r5, KERNELBASE@h
+        lwz     r5, 0xf0(r5)
+        stw     r4, 0x4(r5)
+#endif
+
+#ifdef CONFIG_8xx_CPU6
+        lis     r6, cpu6_errata_word@h
+        ori     r6, r6, cpu6_errata_word@l
+        tophys  (r4, r4)
+        li      r7, 0x3980
+        stw     r7, 12(r6)
+        lwz     r7, 12(r6)
+        mtspr   SPRN_M_TWB, r4               /* Update MMU base address */
+        li      r7, 0x3380
+        stw     r7, 12(r6)
+        lwz     r7, 12(r6)
+        mtspr   SPRN_M_CASID, r3             /* Update context */
+#else
+        mtspr   SPRN_M_CASID,r3         /* Update context */
+        tophys  (r4, r4)
+        mtspr   SPRN_M_TWB, r4          /* and pgd */
+#endif
+        SYNC
+        blr
+
+#ifdef CONFIG_8xx_CPU6
+/* It's here because it is unique to the 8xx.
+ * It is important we get called with interrupts disabled.  I used to
+ * do that, but it appears that all code that calls this already had
+ * interrupt disabled.
+ */
+        .globl  set_dec_cpu6
+set_dec_cpu6:
+        lis     r7, cpu6_errata_word@h
+        ori     r7, r7, cpu6_errata_word@l
+        li      r4, 0x2c00
+        stw     r4, 8(r7)
+        lwz     r4, 8(r7)
+        mtspr   22, r3          /* Update Decrementer */
+        SYNC
+        blr
+#endif
+
+/*
+ * We put a few things here that have to be page-aligned.
+ * This stuff goes at the beginning of the data segment,
+ * which is page-aligned.
+ */
+        .data
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
+        .space  4096
+
+        .globl  swapper_pg_dir
+swapper_pg_dir:
+        .space  4096
+
+/*
+ * This space gets a copy of optional info passed to us by the bootstrap
+ * Used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+        .globl  cmd_line
+cmd_line:
+        .space  512
+
+/* Room for two PTE table poiners, usually the kernel and current user
+ * pointer to their respective root page table (pgdir).
+ */
+abatron_pteptrs:
+        .space  8
+
+#ifdef CONFIG_8xx_CPU6
+        .globl  cpu6_errata_word
+cpu6_errata_word:
+        .space  16
+#endif
+
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
new file mode 100644
index 000000000000..5063c603fad4
--- /dev/null
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -0,0 +1,1063 @@
+/*
+ * arch/ppc/kernel/head_fsl_booke.S
+ *
+ * Kernel execution entry point code.
+ *
+ *    Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
+ *      Initial PowerPC version.
+ *    Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *      Rewritten for PReP
+ *    Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
+ *      Low-level exception handers, MMU support, and rewrite.
+ *    Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
+ *      PowerPC 8xx modifications.
+ *    Copyright (c) 1998-1999 TiVo, Inc.
+ *      PowerPC 403GCX modifications.
+ *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
+ *      PowerPC 403GCX/405GP modifications.
+ *    Copyright 2000 MontaVista Software Inc.
+ *      PPC405 modifications
+ *      PowerPC 403GCX/405GP modifications.
+ *      Author: MontaVista Software, Inc.
+ *              frank_rowand@mvista.com or source@mvista.com
+ *              debbie_chu@mvista.com
+ *    Copyright 2002-2004 MontaVista Software, Inc.
+ *      PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
+ *    Copyright 2004 Freescale Semiconductor, Inc
+ *      PowerPC e500 modifications, Kumar Gala <kumar.gala@freescale.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include "head_booke.h"
+
+/* As with the other PowerPC ports, it is expected that when code
+ * execution begins here, the following registers contain valid, yet
+ * optional, information:
+ *
+ *   r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
+ *   r4 - Starting address of the init RAM disk
+ *   r5 - Ending address of the init RAM disk
+ *   r6 - Start of kernel command line string (e.g. "mem=128")
+ *   r7 - End of kernel command line string
+ *
+ */
+        .text
+_GLOBAL(_stext)
+_GLOBAL(_start)
+        /*
+         * Reserve a word at a fixed location to store the address
+         * of abatron_pteptrs
+         */
+        nop
+/*
+ * Save parameters we are passed
+ */
+        mr      r31,r3
+        mr      r30,r4
+        mr      r29,r5
+        mr      r28,r6
+        mr      r27,r7
+        li      r24,0           /* CPU number */
+
+/* We try to not make any assumptions about how the boot loader
+ * setup or used the TLBs.  We invalidate all mappings from the
+ * boot loader and load a single entry in TLB1[0] to map the
+ * first 16M of kernel memory.  Any boot info passed from the
+ * bootloader needs to live in this first 16M.
+ *
+ * Requirement on bootloader:
+ *  - The page we're executing in needs to reside in TLB1 and
+ *    have IPROT=1.  If not an invalidate broadcast could
+ *    evict the entry we're currently executing in.
+ *
+ *  r3 = Index of TLB1 were executing in
+ *  r4 = Current MSR[IS]
+ *  r5 = Index of TLB1 temp mapping
+ *
+ * Later in mapin_ram we will correctly map lowmem, and resize TLB1[0]
+ * if needed
+ */
+
+/* 1. Find the index of the entry we're executing in */
+        bl      invstr                          /* Find our address */
+invstr: mflr    r6                              /* Make it accessible */
+        mfmsr   r7
+        rlwinm  r4,r7,27,31,31                  /* extract MSR[IS] */
+        mfspr   r7, SPRN_PID0
+        slwi    r7,r7,16
+        or      r7,r7,r4
+        mtspr   SPRN_MAS6,r7
+        tlbsx   0,r6                            /* search MSR[IS], SPID=PID0 */
+#ifndef CONFIG_E200
+        mfspr   r7,SPRN_MAS1
+        andis.  r7,r7,MAS1_VALID@h
+        bne     match_TLB
+        mfspr   r7,SPRN_PID1
+        slwi    r7,r7,16
+        or      r7,r7,r4
+        mtspr   SPRN_MAS6,r7
+        tlbsx   0,r6                            /* search MSR[IS], SPID=PID1 */
+        mfspr   r7,SPRN_MAS1
+        andis.  r7,r7,MAS1_VALID@h
+        bne     match_TLB
+        mfspr   r7, SPRN_PID2
+        slwi    r7,r7,16
+        or      r7,r7,r4
+        mtspr   SPRN_MAS6,r7
+        tlbsx   0,r6                            /* Fall through, we had to match */
+#endif
+match_TLB:
+        mfspr   r7,SPRN_MAS0
+        rlwinm  r3,r7,16,20,31                  /* Extract MAS0(Entry) */
+
+        mfspr   r7,SPRN_MAS1                    /* Insure IPROT set */
+        oris    r7,r7,MAS1_IPROT@h
+        mtspr   SPRN_MAS1,r7
+        tlbwe
+
+/* 2. Invalidate all entries except the entry we're executing in */
+        mfspr   r9,SPRN_TLB1CFG
+        andi.   r9,r9,0xfff
+        li      r6,0                            /* Set Entry counter to 0 */
+1:      lis     r7,0x1000                       /* Set MAS0(TLBSEL) = 1 */
+        rlwimi  r7,r6,16,4,15                   /* Setup MAS0 = TLBSEL | ESEL(r6) */
+        mtspr   SPRN_MAS0,r7
+        tlbre
+        mfspr   r7,SPRN_MAS1
+        rlwinm  r7,r7,0,2,31                    /* Clear MAS1 Valid and IPROT */
+        cmpw    r3,r6
+        beq     skpinv                          /* Dont update the current execution TLB */
+        mtspr   SPRN_MAS1,r7
+        tlbwe
+        isync
+skpinv: addi    r6,r6,1                         /* Increment */
+        cmpw    r6,r9                           /* Are we done? */
+        bne     1b                              /* If not, repeat */
+
+        /* Invalidate TLB0 */
+        li      r6,0x04
+        tlbivax 0,r6
+#ifdef CONFIG_SMP
+        tlbsync
+#endif
+        /* Invalidate TLB1 */
+        li      r6,0x0c
+        tlbivax 0,r6
+#ifdef CONFIG_SMP
+        tlbsync
+#endif
+        msync
+
+/* 3. Setup a temp mapping and jump to it */
+        andi.   r5, r3, 0x1     /* Find an entry not used and is non-zero */
+        addi    r5, r5, 0x1
+        lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
+        rlwimi  r7,r3,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r3) */
+        mtspr   SPRN_MAS0,r7
+        tlbre
+
+        /* Just modify the entry ID and EPN for the temp mapping */
+        lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
+        rlwimi  r7,r5,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r5) */
+        mtspr   SPRN_MAS0,r7
+        xori    r6,r4,1         /* Setup TMP mapping in the other Address space */
+        slwi    r6,r6,12
+        oris    r6,r6,(MAS1_VALID|MAS1_IPROT)@h
+        ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
+        mtspr   SPRN_MAS1,r6
+        mfspr   r6,SPRN_MAS2
+        li      r7,0            /* temp EPN = 0 */
+        rlwimi  r7,r6,0,20,31
+        mtspr   SPRN_MAS2,r7
+        tlbwe
+
+        xori    r6,r4,1
+        slwi    r6,r6,5         /* setup new context with other address space */
+        bl      1f              /* Find our address */
+1:      mflr    r9
+        rlwimi  r7,r9,0,20,31
+        addi    r7,r7,24
+        mtspr   SPRN_SRR0,r7
+        mtspr   SPRN_SRR1,r6
+        rfi
+
+/* 4. Clear out PIDs & Search info */
+        li      r6,0
+        mtspr   SPRN_PID0,r6
+#ifndef CONFIG_E200
+        mtspr   SPRN_PID1,r6
+        mtspr   SPRN_PID2,r6
+#endif
+        mtspr   SPRN_MAS6,r6
+
+/* 5. Invalidate mapping we started in */
+        lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
+        rlwimi  r7,r3,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r3) */
+        mtspr   SPRN_MAS0,r7
+        tlbre
+        li      r6,0
+        mtspr   SPRN_MAS1,r6
+        tlbwe
+        /* Invalidate TLB1 */
+        li      r9,0x0c
+        tlbivax 0,r9
+#ifdef CONFIG_SMP
+        tlbsync
+#endif
+        msync
+
+/* 6. Setup KERNELBASE mapping in TLB1[0] */
+        lis     r6,0x1000               /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
+        mtspr   SPRN_MAS0,r6
+        lis     r6,(MAS1_VALID|MAS1_IPROT)@h
+        ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l
+        mtspr   SPRN_MAS1,r6
+        li      r7,0
+        lis     r6,KERNELBASE@h
+        ori     r6,r6,KERNELBASE@l
+        rlwimi  r6,r7,0,20,31
+        mtspr   SPRN_MAS2,r6
+        li      r7,(MAS3_SX|MAS3_SW|MAS3_SR)
+        mtspr   SPRN_MAS3,r7
+        tlbwe
+
+/* 7. Jump to KERNELBASE mapping */
+        lis     r7,MSR_KERNEL@h
+        ori     r7,r7,MSR_KERNEL@l
+        bl      1f                      /* Find our address */
+1:      mflr    r9
+        rlwimi  r6,r9,0,20,31
+        addi    r6,r6,24
+        mtspr   SPRN_SRR0,r6
+        mtspr   SPRN_SRR1,r7
+        rfi                             /* start execution out of TLB1[0] entry */
+
+/* 8. Clear out the temp mapping */
+        lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
+        rlwimi  r7,r5,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r5) */
+        mtspr   SPRN_MAS0,r7
+        tlbre
+        mtspr   SPRN_MAS1,r8
+        tlbwe
+        /* Invalidate TLB1 */
+        li      r9,0x0c
+        tlbivax 0,r9
+#ifdef CONFIG_SMP
+        tlbsync
+#endif
+        msync
+
+        /* Establish the interrupt vector offsets */
+        SET_IVOR(0,  CriticalInput);
+        SET_IVOR(1,  MachineCheck);
+        SET_IVOR(2,  DataStorage);
+        SET_IVOR(3,  InstructionStorage);
+        SET_IVOR(4,  ExternalInput);
+        SET_IVOR(5,  Alignment);
+        SET_IVOR(6,  Program);
+        SET_IVOR(7,  FloatingPointUnavailable);
+        SET_IVOR(8,  SystemCall);
+        SET_IVOR(9,  AuxillaryProcessorUnavailable);
+        SET_IVOR(10, Decrementer);
+        SET_IVOR(11, FixedIntervalTimer);
+        SET_IVOR(12, WatchdogTimer);
+        SET_IVOR(13, DataTLBError);
+        SET_IVOR(14, InstructionTLBError);
+        SET_IVOR(15, Debug);
+        SET_IVOR(32, SPEUnavailable);
+        SET_IVOR(33, SPEFloatingPointData);
+        SET_IVOR(34, SPEFloatingPointRound);
+#ifndef CONFIG_E200
+        SET_IVOR(35, PerformanceMonitor);
+#endif
+
+        /* Establish the interrupt vector base */
+        lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
+        mtspr   SPRN_IVPR,r4
+
+        /* Setup the defaults for TLB entries */
+        li      r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
+#ifdef CONFIG_E200
+        oris    r2,r2,MAS4_TLBSELD(1)@h
+#endif
+        mtspr   SPRN_MAS4, r2
+
+#if 0
+        /* Enable DOZE */
+        mfspr   r2,SPRN_HID0
+        oris    r2,r2,HID0_DOZE@h
+        mtspr   SPRN_HID0, r2
+#endif
+#ifdef CONFIG_E200
+        /* enable dedicated debug exception handling resources (Debug APU) */
+        mfspr   r2,SPRN_HID0
+        ori     r2,r2,HID0_DAPUEN@l
+        mtspr   SPRN_HID0,r2
+#endif
+
+#if !defined(CONFIG_BDI_SWITCH)
+        /*
+         * The Abatron BDI JTAG debugger does not tolerate others
+         * mucking with the debug registers.
+         */
+        lis     r2,DBCR0_IDM@h
+        mtspr   SPRN_DBCR0,r2
+        /* clear any residual debug events */
+        li      r2,-1
+        mtspr   SPRN_DBSR,r2
+#endif
+
+        /*
+         * This is where the main kernel code starts.
+         */
+
+        /* ptr to current */
+        lis     r2,init_task@h
+        ori     r2,r2,init_task@l
+
+        /* ptr to current thread */
+        addi    r4,r2,THREAD    /* init task's THREAD */
+        mtspr   SPRN_SPRG3,r4
+
+        /* stack */
+        lis     r1,init_thread_union@h
+        ori     r1,r1,init_thread_union@l
+        li      r0,0
+        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+
+        bl      early_init
+
+        mfspr   r3,SPRN_TLB1CFG
+        andi.   r3,r3,0xfff
+        lis     r4,num_tlbcam_entries@ha
+        stw     r3,num_tlbcam_entries@l(r4)
+/*
+ * Decide what sort of machine this is and initialize the MMU.
+ */
+        mr      r3,r31
+        mr      r4,r30
+        mr      r5,r29
+        mr      r6,r28
+        mr      r7,r27
+        bl      machine_init
+        bl      MMU_init
+
+        /* Setup PTE pointers for the Abatron bdiGDB */
+        lis     r6, swapper_pg_dir@h
+        ori     r6, r6, swapper_pg_dir@l
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        lis     r4, KERNELBASE@h
+        ori     r4, r4, KERNELBASE@l
+        stw     r5, 0(r4)       /* Save abatron_pteptrs at a fixed location */
+        stw     r6, 0(r5)
+
+        /* Let's move on */
+        lis     r4,start_kernel@h
+        ori     r4,r4,start_kernel@l
+        lis     r3,MSR_KERNEL@h
+        ori     r3,r3,MSR_KERNEL@l
+        mtspr   SPRN_SRR0,r4
+        mtspr   SPRN_SRR1,r3
+        rfi                     /* change context and jump to start_kernel */
+
+/* Macros to hide the PTE size differences
+ *
+ * FIND_PTE -- walks the page tables given EA & pgdir pointer
+ *   r10 -- EA of fault
+ *   r11 -- PGDIR pointer
+ *   r12 -- free
+ *   label 2: is the bailout case
+ *
+ * if we find the pte (fall through):
+ *   r11 is low pte word
+ *   r12 is pointer to the pte
+ */
+#ifdef CONFIG_PTE_64BIT
+#define PTE_FLAGS_OFFSET        4
+#define FIND_PTE        \
+        rlwinm  r12, r10, 13, 19, 29;   /* Compute pgdir/pmd offset */  \
+        lwzx    r11, r12, r11;          /* Get pgd/pmd entry */         \
+        rlwinm. r12, r11, 0, 0, 20;     /* Extract pt base address */   \
+        beq     2f;                     /* Bail if no table */          \
+        rlwimi  r12, r10, 23, 20, 28;   /* Compute pte address */       \
+        lwz     r11, 4(r12);            /* Get pte entry */
+#else
+#define PTE_FLAGS_OFFSET        0
+#define FIND_PTE        \
+        rlwimi  r11, r10, 12, 20, 29;   /* Create L1 (pgdir/pmd) address */     \
+        lwz     r11, 0(r11);            /* Get L1 entry */                      \
+        rlwinm. r12, r11, 0, 0, 19;     /* Extract L2 (pte) base address */     \
+        beq     2f;                     /* Bail if no table */                  \
+        rlwimi  r12, r10, 22, 20, 29;   /* Compute PTE address */               \
+        lwz     r11, 0(r12);            /* Get Linux PTE */
+#endif
+
+/*
+ * Interrupt vector entry code
+ *
+ * The Book E MMUs are always on so we don't need to handle
+ * interrupts in real mode as with previous PPC processors. In
+ * this case we handle interrupts in the kernel virtual address
+ * space.
+ *
+ * Interrupt vectors are dynamically placed relative to the
+ * interrupt prefix as determined by the address of interrupt_base.
+ * The interrupt vectors offsets are programmed using the labels
+ * for each interrupt vector entry.
+ *
+ * Interrupt vectors must be aligned on a 16 byte boundary.
+ * We align on a 32 byte cache line boundary for good measure.
+ */
+
+interrupt_base:
+        /* Critical Input Interrupt */
+        CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
+
+        /* Machine Check Interrupt */
+#ifdef CONFIG_E200
+        /* no RFMCI, MCSRRs on E200 */
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
+#else
+        MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
+#endif
+
+        /* Data Storage Interrupt */
+        START_EXCEPTION(DataStorage)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+        mtspr   SPRN_SPRG4W, r12
+        mtspr   SPRN_SPRG5W, r13
+        mfcr    r11
+        mtspr   SPRN_SPRG7W, r11
+
+        /*
+         * Check if it was a store fault, if not then bail
+         * because a user tried to access a kernel or
+         * read-protected page.  Otherwise, get the
+         * offending address and handle it.
+         */
+        mfspr   r10, SPRN_ESR
+        andis.  r10, r10, ESR_ST@h
+        beq     2f
+
+        mfspr   r10, SPRN_DEAR          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        ori     r11, r11, TASK_SIZE@l
+        cmplw   0, r10, r11
+        bge     2f
+
+        /* Get the PGD for the current thread */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+4:
+        FIND_PTE
+
+        /* Are _PAGE_USER & _PAGE_RW set & _PAGE_HWWRITE not? */
+        andi.   r13, r11, _PAGE_RW|_PAGE_USER|_PAGE_HWWRITE
+        cmpwi   0, r13, _PAGE_RW|_PAGE_USER
+        bne     2f                      /* Bail if not */
+
+        /* Update 'changed'. */
+        ori     r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+        stw     r11, PTE_FLAGS_OFFSET(r12) /* Update Linux page table */
+
+        /* MAS2 not updated as the entry does exist in the tlb, this
+           fault taken to detect state transition (eg: COW -> DIRTY)
+         */
+        andi.   r11, r11, _PAGE_HWEXEC
+        rlwimi  r11, r11, 31, 27, 27    /* SX <- _PAGE_HWEXEC */
+        ori     r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */
+
+        /* update search PID in MAS6, AS = 0 */
+        mfspr   r12, SPRN_PID0
+        slwi    r12, r12, 16
+        mtspr   SPRN_MAS6, r12
+
+        /* find the TLB index that caused the fault.  It has to be here. */
+        tlbsx   0, r10
+
+        /* only update the perm bits, assume the RPN is fine */
+        mfspr   r12, SPRN_MAS3
+        rlwimi  r12, r11, 0, 20, 31
+        mtspr   SPRN_MAS3,r12
+        tlbwe
+
+        /* Done...restore registers and get out of here.  */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        rfi                     /* Force context change */
+
+2:
+        /*
+         * The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       data_access
+
+        /* Instruction Storage Interrupt */
+        INSTRUCTION_STORAGE_EXCEPTION
+
+        /* External Input Interrupt */
+        EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)
+
+        /* Alignment Interrupt */
+        ALIGNMENT_EXCEPTION
+
+        /* Program Interrupt */
+        PROGRAM_EXCEPTION
+
+        /* Floating Point Unavailable Interrupt */
+#ifdef CONFIG_PPC_FPU
+        FP_UNAVAILABLE_EXCEPTION
+#else
+#ifdef CONFIG_E200
+        /* E200 treats 'normal' floating point instructions as FP Unavail exception */
+        EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
+#else
+        EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
+#endif
+#endif
+
+        /* System Call Interrupt */
+        START_EXCEPTION(SystemCall)
+        NORMAL_EXCEPTION_PROLOG
+        EXC_XFER_EE_LITE(0x0c00, DoSyscall)
+
+        /* Auxillary Processor Unavailable Interrupt */
+        EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
+
+        /* Decrementer Interrupt */
+        DECREMENTER_EXCEPTION
+
+        /* Fixed Internal Timer Interrupt */
+        /* TODO: Add FIT support */
+        EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
+
+        /* Watchdog Timer Interrupt */
+#ifdef CONFIG_BOOKE_WDT
+        CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
+#else
+        CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
+#endif
+
+        /* Data TLB Error Interrupt */
+        START_EXCEPTION(DataTLBError)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+        mtspr   SPRN_SPRG4W, r12
+        mtspr   SPRN_SPRG5W, r13
+        mfcr    r11
+        mtspr   SPRN_SPRG7W, r11
+        mfspr   r10, SPRN_DEAR          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        ori     r11, r11, TASK_SIZE@l
+        cmplw   5, r10, r11
+        blt     5, 3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+
+        mfspr   r12,SPRN_MAS1           /* Set TID to 0 */
+        rlwinm  r12,r12,0,16,1
+        mtspr   SPRN_MAS1,r12
+
+        b       4f
+
+        /* Get the PGD for the current thread */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+
+4:
+        FIND_PTE
+        andi.   r13, r11, _PAGE_PRESENT /* Is the page present? */
+        beq     2f                      /* Bail if not present */
+
+#ifdef CONFIG_PTE_64BIT
+        lwz     r13, 0(r12)
+#endif
+        ori     r11, r11, _PAGE_ACCESSED
+        stw     r11, PTE_FLAGS_OFFSET(r12)
+
+         /* Jump to common tlb load */
+        b       finish_tlb_load
+2:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       data_access
+
+        /* Instruction TLB Error Interrupt */
+        /*
+         * Nearly the same as above, except we get our
+         * information from different registers and bailout
+         * to a different point.
+         */
+        START_EXCEPTION(InstructionTLBError)
+        mtspr   SPRN_SPRG0, r10         /* Save some working registers */
+        mtspr   SPRN_SPRG1, r11
+        mtspr   SPRN_SPRG4W, r12
+        mtspr   SPRN_SPRG5W, r13
+        mfcr    r11
+        mtspr   SPRN_SPRG7W, r11
+        mfspr   r10, SPRN_SRR0          /* Get faulting address */
+
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        lis     r11, TASK_SIZE@h
+        ori     r11, r11, TASK_SIZE@l
+        cmplw   5, r10, r11
+        blt     5, 3f
+        lis     r11, swapper_pg_dir@h
+        ori     r11, r11, swapper_pg_dir@l
+
+        mfspr   r12,SPRN_MAS1           /* Set TID to 0 */
+        rlwinm  r12,r12,0,16,1
+        mtspr   SPRN_MAS1,r12
+
+        b       4f
+
+        /* Get the PGD for the current thread */
+3:
+        mfspr   r11,SPRN_SPRG3
+        lwz     r11,PGDIR(r11)
+
+4:
+        FIND_PTE
+        andi.   r13, r11, _PAGE_PRESENT /* Is the page present? */
+        beq     2f                      /* Bail if not present */
+
+#ifdef CONFIG_PTE_64BIT
+        lwz     r13, 0(r12)
+#endif
+        ori     r11, r11, _PAGE_ACCESSED
+        stw     r11, PTE_FLAGS_OFFSET(r12)
+
+        /* Jump to common TLB load point */
+        b       finish_tlb_load
+
+2:
+        /* The bailout.  Restore registers to pre-exception conditions
+         * and call the heavyweights to help us out.
+         */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        b       InstructionStorage
+
+#ifdef CONFIG_SPE
+        /* SPE Unavailable */
+        START_EXCEPTION(SPEUnavailable)
+        NORMAL_EXCEPTION_PROLOG
+        bne     load_up_spe
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE_LITE(0x2010, KernelSPE)
+#else
+        EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
+#endif /* CONFIG_SPE */
+
+        /* SPE Floating Point Data */
+#ifdef CONFIG_SPE
+        EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
+#else
+        EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
+#endif /* CONFIG_SPE */
+
+        /* SPE Floating Point Round */
+        EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
+
+        /* Performance Monitor */
+        EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
+
+
+        /* Debug Interrupt */
+        DEBUG_EXCEPTION
+
+/*
+ * Local functions
+ */
+
+        /*
+         * Data TLB exceptions will bail out to this point
+         * if they can't resolve the lightweight TLB fault.
+         */
+data_access:
+        NORMAL_EXCEPTION_PROLOG
+        mfspr   r5,SPRN_ESR             /* Grab the ESR, save it, pass arg3 */
+        stw     r5,_ESR(r11)
+        mfspr   r4,SPRN_DEAR            /* Grab the DEAR, save it, pass arg2 */
+        andis.  r10,r5,(ESR_ILK|ESR_DLK)@h
+        bne     1f
+        EXC_XFER_EE_LITE(0x0300, handle_page_fault)
+1:
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        EXC_XFER_EE_LITE(0x0300, CacheLockingException)
+
+/*
+
+ * Both the instruction and data TLB miss get to this
+ * point to load the TLB.
+ *      r10 - EA of fault
+ *      r11 - TLB (info from Linux PTE)
+ *      r12, r13 - available to use
+ *      CR5 - results of addr < TASK_SIZE
+ *      MAS0, MAS1 - loaded with proper value when we get here
+ *      MAS2, MAS3 - will need additional info from Linux PTE
+ *      Upon exit, we reload everything and RFI.
+ */
+finish_tlb_load:
+        /*
+         * We set execute, because we don't have the granularity to
+         * properly set this at the page level (Linux problem).
+         * Many of these bits are software only.  Bits we don't set
+         * here we (properly should) assume have the appropriate value.
+         */
+
+        mfspr   r12, SPRN_MAS2
+#ifdef CONFIG_PTE_64BIT
+        rlwimi  r12, r11, 26, 24, 31    /* extract ...WIMGE from pte */
+#else
+        rlwimi  r12, r11, 26, 27, 31    /* extract WIMGE from pte */
+#endif
+        mtspr   SPRN_MAS2, r12
+
+        bge     5, 1f
+
+        /* is user addr */
+        andi.   r12, r11, (_PAGE_USER | _PAGE_HWWRITE | _PAGE_HWEXEC)
+        andi.   r10, r11, _PAGE_USER    /* Test for _PAGE_USER */
+        srwi    r10, r12, 1
+        or      r12, r12, r10   /* Copy user perms into supervisor */
+        iseleq  r12, 0, r12
+        b       2f
+
+        /* is kernel addr */
+1:      rlwinm  r12, r11, 31, 29, 29    /* Extract _PAGE_HWWRITE into SW */
+        ori     r12, r12, (MAS3_SX | MAS3_SR)
+
+#ifdef CONFIG_PTE_64BIT
+2:      rlwimi  r12, r13, 24, 0, 7      /* grab RPN[32:39] */
+        rlwimi  r12, r11, 24, 8, 19     /* grab RPN[40:51] */
+        mtspr   SPRN_MAS3, r12
+BEGIN_FTR_SECTION
+        srwi    r10, r13, 8             /* grab RPN[8:31] */
+        mtspr   SPRN_MAS7, r10
+END_FTR_SECTION_IFSET(CPU_FTR_BIG_PHYS)
+#else
+2:      rlwimi  r11, r12, 0, 20, 31     /* Extract RPN from PTE and merge with perms */
+        mtspr   SPRN_MAS3, r11
+#endif
+#ifdef CONFIG_E200
+        /* Round robin TLB1 entries assignment */
+        mfspr   r12, SPRN_MAS0
+
+        /* Extract TLB1CFG(NENTRY) */
+        mfspr   r11, SPRN_TLB1CFG
+        andi.   r11, r11, 0xfff
+
+        /* Extract MAS0(NV) */
+        andi.   r13, r12, 0xfff
+        addi    r13, r13, 1
+        cmpw    0, r13, r11
+        addi    r12, r12, 1
+
+        /* check if we need to wrap */
+        blt     7f
+
+        /* wrap back to first free tlbcam entry */
+        lis     r13, tlbcam_index@ha
+        lwz     r13, tlbcam_index@l(r13)
+        rlwimi  r12, r13, 0, 20, 31
+7:
+        mtspr   SPRN_MAS0,r12
+#endif /* CONFIG_E200 */
+
+        tlbwe
+
+        /* Done...restore registers and get out of here.  */
+        mfspr   r11, SPRN_SPRG7R
+        mtcr    r11
+        mfspr   r13, SPRN_SPRG5R
+        mfspr   r12, SPRN_SPRG4R
+        mfspr   r11, SPRN_SPRG1
+        mfspr   r10, SPRN_SPRG0
+        rfi                                     /* Force context change */
+
+#ifdef CONFIG_SPE
+/* Note that the SPE support is closely modeled after the AltiVec
+ * support.  Changes to one are likely to be applicable to the
+ * other!  */
+load_up_spe:
+/*
+ * Disable SPE for the task which had SPE previously,
+ * and save its SPE registers in its thread_struct.
+ * Enables SPE for use in the kernel on return.
+ * On SMP we know the SPE units are free, since we give it up every
+ * switch.  -- Kumar
+ */
+        mfmsr   r5
+        oris    r5,r5,MSR_SPE@h
+        mtmsr   r5                      /* enable use of SPE now */
+        isync
+/*
+ * For SMP, we don't do lazy SPE switching because it just gets too
+ * horrendously complex, especially when a task switches from one CPU
+ * to another.  Instead we call giveup_spe in switch_to.
+ */
+#ifndef CONFIG_SMP
+        lis     r3,last_task_used_spe@ha
+        lwz     r4,last_task_used_spe@l(r3)
+        cmpi    0,r4,0
+        beq     1f
+        addi    r4,r4,THREAD    /* want THREAD of last_task_used_spe */
+        SAVE_32EVRS(0,r10,r4)
+        evxor   evr10, evr10, evr10     /* clear out evr10 */
+        evmwumiaa evr10, evr10, evr10   /* evr10 <- ACC = 0 * 0 + ACC */
+        li      r5,THREAD_ACC
+        evstddx evr10, r4, r5           /* save off accumulator */
+        lwz     r5,PT_REGS(r4)
+        lwz     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        lis     r10,MSR_SPE@h
+        andc    r4,r4,r10       /* disable SPE for previous task */
+        stw     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#endif /* CONFIG_SMP */
+        /* enable use of SPE after return */
+        oris    r9,r9,MSR_SPE@h
+        mfspr   r5,SPRN_SPRG3           /* current task's THREAD (phys) */
+        li      r4,1
+        li      r10,THREAD_ACC
+        stw     r4,THREAD_USED_SPE(r5)
+        evlddx  evr4,r10,r5
+        evmra   evr4,evr4
+        REST_32EVRS(0,r10,r5)
+#ifndef CONFIG_SMP
+        subi    r4,r5,THREAD
+        stw     r4,last_task_used_spe@l(r3)
+#endif /* CONFIG_SMP */
+        /* restore registers and return */
+2:      REST_4GPRS(3, r11)
+        lwz     r10,_CCR(r11)
+        REST_GPR(1, r11)
+        mtcr    r10
+        lwz     r10,_LINK(r11)
+        mtlr    r10
+        REST_GPR(10, r11)
+        mtspr   SPRN_SRR1,r9
+        mtspr   SPRN_SRR0,r12
+        REST_GPR(9, r11)
+        REST_GPR(12, r11)
+        lwz     r11,GPR11(r11)
+        SYNC
+        rfi
+
+/*
+ * SPE unavailable trap from kernel - print a message, but let
+ * the task use SPE in the kernel until it returns to user mode.
+ */
+KernelSPE:
+        lwz     r3,_MSR(r1)
+        oris    r3,r3,MSR_SPE@h
+        stw     r3,_MSR(r1)     /* enable use of SPE after return */
+        lis     r3,87f@h
+        ori     r3,r3,87f@l
+        mr      r4,r2           /* current */
+        lwz     r5,_NIP(r1)
+        bl      printk
+        b       ret_from_except
+87:     .string "SPE used in kernel  (task=%p, pc=%x)  \n"
+        .align  4,0
+
+#endif /* CONFIG_SPE */
+
+/*
+ * Global functions
+ */
+
+/*
+ * extern void loadcam_entry(unsigned int index)
+ *
+ * Load TLBCAM[index] entry in to the L2 CAM MMU
+ */
+_GLOBAL(loadcam_entry)
+        lis     r4,TLBCAM@ha
+        addi    r4,r4,TLBCAM@l
+        mulli   r5,r3,20
+        add     r3,r5,r4
+        lwz     r4,0(r3)
+        mtspr   SPRN_MAS0,r4
+        lwz     r4,4(r3)
+        mtspr   SPRN_MAS1,r4
+        lwz     r4,8(r3)
+        mtspr   SPRN_MAS2,r4
+        lwz     r4,12(r3)
+        mtspr   SPRN_MAS3,r4
+        tlbwe
+        isync
+        blr
+
+/*
+ * extern void giveup_altivec(struct task_struct *prev)
+ *
+ * The e500 core does not have an AltiVec unit.
+ */
+_GLOBAL(giveup_altivec)
+        blr
+
+#ifdef CONFIG_SPE
+/*
+ * extern void giveup_spe(struct task_struct *prev)
+ *
+ */
+_GLOBAL(giveup_spe)
+        mfmsr   r5
+        oris    r5,r5,MSR_SPE@h
+        SYNC
+        mtmsr   r5                      /* enable use of SPE now */
+        isync
+        cmpi    0,r3,0
+        beqlr-                          /* if no previous owner, done */
+        addi    r3,r3,THREAD            /* want THREAD of task */
+        lwz     r5,PT_REGS(r3)
+        cmpi    0,r5,0
+        SAVE_32EVRS(0, r4, r3)
+        evxor   evr6, evr6, evr6        /* clear out evr6 */
+        evmwumiaa evr6, evr6, evr6      /* evr6 <- ACC = 0 * 0 + ACC */
+        li      r4,THREAD_ACC
+        evstddx evr6, r4, r3            /* save off accumulator */
+        mfspr   r6,SPRN_SPEFSCR
+        stw     r6,THREAD_SPEFSCR(r3)   /* save spefscr register value */
+        beq     1f
+        lwz     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        lis     r3,MSR_SPE@h
+        andc    r4,r4,r3                /* disable SPE for previous task */
+        stw     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#ifndef CONFIG_SMP
+        li      r5,0
+        lis     r4,last_task_used_spe@ha
+        stw     r5,last_task_used_spe@l(r4)
+#endif /* CONFIG_SMP */
+        blr
+#endif /* CONFIG_SPE */
+
+/*
+ * extern void giveup_fpu(struct task_struct *prev)
+ *
+ * Not all FSL Book-E cores have an FPU
+ */
+#ifndef CONFIG_PPC_FPU
+_GLOBAL(giveup_fpu)
+        blr
+#endif
+
+/*
+ * extern void abort(void)
+ *
+ * At present, this routine just applies a system reset.
+ */
+_GLOBAL(abort)
+        li      r13,0
+        mtspr   SPRN_DBCR0,r13          /* disable all debug events */
+        mfmsr   r13
+        ori     r13,r13,MSR_DE@l        /* Enable Debug Events */
+        mtmsr   r13
+        mfspr   r13,SPRN_DBCR0
+        lis     r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
+        mtspr   SPRN_DBCR0,r13
+
+_GLOBAL(set_context)
+
+#ifdef CONFIG_BDI_SWITCH
+        /* Context switch the PTE pointer for the Abatron BDI2000.
+         * The PGDIR is the second parameter.
+         */
+        lis     r5, abatron_pteptrs@h
+        ori     r5, r5, abatron_pteptrs@l
+        stw     r4, 0x4(r5)
+#endif
+        mtspr   SPRN_PID,r3
+        isync                   /* Force context change */
+        blr
+
+/*
+ * We put a few things here that have to be page-aligned. This stuff
+ * goes at the beginning of the data segment, which is page-aligned.
+ */
+        .data
+        .align  12
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
+        .space  4096
+        .globl  swapper_pg_dir
+swapper_pg_dir:
+        .space  4096
+
+/* Reserved 4k for the critical exception stack & 4k for the machine
+ * check stack per CPU for kernel mode exceptions */
+        .section .bss
+        .align 12
+exception_stack_bottom:
+        .space  BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
+        .globl  exception_stack_top
+exception_stack_top:
+
+/*
+ * This space gets a copy of optional info passed to us by the bootstrap
+ * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+        .globl  cmd_line
+cmd_line:
+        .space  512
+
+/*
+ * Room for two PTE pointers, usually the kernel and current user pointers
+ * to their respective root page table.
+ */
+abatron_pteptrs:
+        .space  8
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
new file mode 100644
index 000000000000..444fdcc769f1
--- /dev/null
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -0,0 +1,233 @@
+/*
+ *  This file contains the power_save function for 6xx & 7xxx CPUs
+ *  rewritten in assembler
+ *
+ *  Warning ! This code assumes that if your machine has a 750fx
+ *  it will have PLL 1 set to low speed mode (used during NAP/DOZE).
+ *  if this is not the case some additional changes will have to
+ *  be done to check a runtime var (a bit like powersave-nap)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+#undef DEBUG
+
+        .text
+
+/*
+ * Init idle, called at early CPU setup time from head.S for each CPU
+ * Make sure no rest of NAP mode remains in HID0, save default
+ * values for some CPU specific registers. Called with r24
+ * containing CPU number and r3 reloc offset
+ */
+_GLOBAL(init_idle_6xx)
+BEGIN_FTR_SECTION
+        mfspr   r4,SPRN_HID0
+        rlwinm  r4,r4,0,10,8    /* Clear NAP */
+        mtspr   SPRN_HID0, r4
+        b       1f
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
+        blr
+1:
+        slwi    r5,r24,2
+        add     r5,r5,r3
+BEGIN_FTR_SECTION
+        mfspr   r4,SPRN_MSSCR0
+        addis   r6,r5, nap_save_msscr0@ha
+        stw     r4,nap_save_msscr0@l(r6)
+END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)
+BEGIN_FTR_SECTION
+        mfspr   r4,SPRN_HID1
+        addis   r6,r5,nap_save_hid1@ha
+        stw     r4,nap_save_hid1@l(r6)
+END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
+        blr
+
+/*
+ * Here is the power_save_6xx function. This could eventually be
+ * split into several functions & changing the function pointer
+ * depending on the various features.
+ */
+_GLOBAL(ppc6xx_idle)
+        /* Check if we can nap or doze, put HID0 mask in r3
+         */
+        lis     r3, 0
+BEGIN_FTR_SECTION
+        lis     r3,HID0_DOZE@h
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
+BEGIN_FTR_SECTION
+        /* We must dynamically check for the NAP feature as it
+         * can be cleared by CPU init after the fixups are done
+         */
+        lis     r4,cur_cpu_spec@ha
+        lwz     r4,cur_cpu_spec@l(r4)
+        lwz     r4,CPU_SPEC_FEATURES(r4)
+        andi.   r0,r4,CPU_FTR_CAN_NAP
+        beq     1f
+        /* Now check if user or arch enabled NAP mode */
+        lis     r4,powersave_nap@ha
+        lwz     r4,powersave_nap@l(r4)
+        cmpwi   0,r4,0
+        beq     1f
+        lis     r3,HID0_NAP@h
+1:      
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
+        cmpwi   0,r3,0
+        beqlr
+
+        /* Clear MSR:EE */
+        mfmsr   r7
+        rlwinm  r0,r7,0,17,15
+        mtmsr   r0
+
+        /* Check current_thread_info()->flags */
+        rlwinm  r4,r1,0,0,18
+        lwz     r4,TI_FLAGS(r4)
+        andi.   r0,r4,_TIF_NEED_RESCHED
+        beq     1f
+        mtmsr   r7      /* out of line this ? */
+        blr
+1:      
+        /* Some pre-nap cleanups needed on some CPUs */
+        andis.  r0,r3,HID0_NAP@h
+        beq     2f
+BEGIN_FTR_SECTION
+        /* Disable L2 prefetch on some 745x and try to ensure
+         * L2 prefetch engines are idle. As explained by errata
+         * text, we can't be sure they are, we just hope very hard
+         * that well be enough (sic !). At least I noticed Apple
+         * doesn't even bother doing the dcbf's here...
+         */
+        mfspr   r4,SPRN_MSSCR0
+        rlwinm  r4,r4,0,0,29
+        sync
+        mtspr   SPRN_MSSCR0,r4
+        sync
+        isync
+        lis     r4,KERNELBASE@h
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)
+#ifdef DEBUG
+        lis     r6,nap_enter_count@ha
+        lwz     r4,nap_enter_count@l(r6)
+        addi    r4,r4,1
+        stw     r4,nap_enter_count@l(r6)
+#endif  
+2:
+BEGIN_FTR_SECTION
+        /* Go to low speed mode on some 750FX */
+        lis     r4,powersave_lowspeed@ha
+        lwz     r4,powersave_lowspeed@l(r4)
+        cmpwi   0,r4,0
+        beq     1f
+        mfspr   r4,SPRN_HID1
+        oris    r4,r4,0x0001
+        mtspr   SPRN_HID1,r4
+1:      
+END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
+
+        /* Go to NAP or DOZE now */     
+        mfspr   r4,SPRN_HID0
+        lis     r5,(HID0_NAP|HID0_SLEEP)@h
+BEGIN_FTR_SECTION
+        oris    r5,r5,HID0_DOZE@h
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
+        andc    r4,r4,r5
+        or      r4,r4,r3
+BEGIN_FTR_SECTION
+        oris    r4,r4,HID0_DPM@h        /* that should be done once for all  */
+END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
+        mtspr   SPRN_HID0,r4
+BEGIN_FTR_SECTION
+        DSSALL
+        sync
+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+        ori     r7,r7,MSR_EE /* Could be ommited (already set) */
+        oris    r7,r7,MSR_POW@h
+        sync
+        isync
+        mtmsr   r7
+        isync
+        sync
+        blr
+        
+/*
+ * Return from NAP/DOZE mode, restore some CPU specific registers,
+ * we are called with DR/IR still off and r2 containing physical
+ * address of current.
+ */
+_GLOBAL(power_save_6xx_restore)
+        mfspr   r11,SPRN_HID0
+        rlwinm. r11,r11,0,10,8  /* Clear NAP & copy NAP bit !state to cr1 EQ */
+        cror    4*cr1+eq,4*cr0+eq,4*cr0+eq
+BEGIN_FTR_SECTION
+        rlwinm  r11,r11,0,9,7   /* Clear DOZE */
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
+        mtspr   SPRN_HID0, r11
+
+#ifdef DEBUG
+        beq     cr1,1f
+        lis     r11,(nap_return_count-KERNELBASE)@ha
+        lwz     r9,nap_return_count@l(r11)
+        addi    r9,r9,1
+        stw     r9,nap_return_count@l(r11)
+1:
+#endif
+        
+        rlwinm  r9,r1,0,0,18
+        tophys(r9,r9)
+        lwz     r11,TI_CPU(r9)
+        slwi    r11,r11,2
+        /* Todo make sure all these are in the same page
+         * and load r22 (@ha part + CPU offset) only once
+         */
+BEGIN_FTR_SECTION
+        beq     cr1,1f
+        addis   r9,r11,(nap_save_msscr0-KERNELBASE)@ha
+        lwz     r9,nap_save_msscr0@l(r9)
+        mtspr   SPRN_MSSCR0, r9
+        sync
+        isync
+1:
+END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)
+BEGIN_FTR_SECTION
+        addis   r9,r11,(nap_save_hid1-KERNELBASE)@ha
+        lwz     r9,nap_save_hid1@l(r9)
+        mtspr   SPRN_HID1, r9
+END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
+        b       transfer_to_handler_cont
+
+        .data
+
+_GLOBAL(nap_save_msscr0)
+        .space  4*NR_CPUS
+
+_GLOBAL(nap_save_hid1)
+        .space  4*NR_CPUS
+
+_GLOBAL(powersave_nap)
+        .long   0
+_GLOBAL(powersave_lowspeed)
+        .long   0
+
+#ifdef DEBUG
+_GLOBAL(nap_enter_count)
+        .space  4
+_GLOBAL(nap_return_count)
+        .space  4
+#endif
diff --git a/arch/ppc64/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index ca02afe2a795..1494e2f177f7 100644
--- a/arch/ppc64/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -39,13 +39,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
          * can be cleared by CPU init after the fixups are done
          */
         LOADBASE(r3,cur_cpu_spec)
-        ld      r4,cur_cpu_spec@l(r3)
+        ld      r4,OFF(cur_cpu_spec)(r3)
         ld      r4,CPU_SPEC_FEATURES(r4)
         andi.   r0,r4,CPU_FTR_CAN_NAP
         beqlr
         /* Now check if user or arch enabled NAP mode */
         LOADBASE(r3,powersave_nap)
-        lwz     r4,powersave_nap@l(r3)
+        lwz     r4,OFF(powersave_nap)(r3)
         cmpwi   0,r4,0
         beqlr
 
@@ -63,8 +63,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
         beq     1f
         mtmsrd  r7      /* out of line this ? */
         blr
-1:      
-        /* Go to NAP now */     
+1:
+        /* Go to NAP now */
 BEGIN_FTR_SECTION
         DSSALL
         sync
@@ -76,4 +76,3 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         isync
         sync
         blr
-        
diff --git a/arch/ppc64/kernel/init_task.c b/arch/powerpc/kernel/init_task.c
index 941043ae040f..941043ae040f 100644
--- a/arch/ppc64/kernel/init_task.c
+++ b/arch/powerpc/kernel/init_task.c
diff --git a/arch/ppc64/kernel/lparmap.c b/arch/powerpc/kernel/lparmap.c
index b81de286df5e..b81de286df5e 100644
--- a/arch/ppc64/kernel/lparmap.c
+++ b/arch/powerpc/kernel/lparmap.c
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
new file mode 100644
index 000000000000..3bedb532aed9
--- /dev/null
+++ b/arch/powerpc/kernel/misc_32.S
@@ -0,0 +1,1037 @@
+/*
+ * This file contains miscellaneous low-level functions.
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/sys.h>
+#include <asm/unistd.h>
+#include <asm/errno.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/cache.h>
+#include <asm/cputable.h>
+#include <asm/mmu.h>
+#include <asm/ppc_asm.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+
+        .text
+
+        .align  5
+_GLOBAL(__delay)
+        cmpwi   0,r3,0
+        mtctr   r3
+        beqlr
+1:      bdnz    1b
+        blr
+
+/*
+ * This returns the high 64 bits of the product of two 64-bit numbers.
+ */
+_GLOBAL(mulhdu)
+        cmpwi   r6,0
+        cmpwi   cr1,r3,0
+        mr      r10,r4
+        mulhwu  r4,r4,r5
+        beq     1f
+        mulhwu  r0,r10,r6
+        mullw   r7,r10,r5
+        addc    r7,r0,r7
+        addze   r4,r4
+1:      beqlr   cr1             /* all done if high part of A is 0 */
+        mr      r10,r3
+        mullw   r9,r3,r5
+        mulhwu  r3,r3,r5
+        beq     2f
+        mullw   r0,r10,r6
+        mulhwu  r8,r10,r6
+        addc    r7,r0,r7
+        adde    r4,r4,r8
+        addze   r3,r3
+2:      addc    r4,r4,r9
+        addze   r3,r3
+        blr
+
+/*
+ * Returns (address we're running at) - (address we were linked at)
+ * for use before the text and data are mapped to KERNELBASE.
+ */
+_GLOBAL(reloc_offset)
+        mflr    r0
+        bl      1f
+1:      mflr    r3
+        LOADADDR(r4,1b)
+        subf    r3,r4,r3
+        mtlr    r0
+        blr
+
+/*
+ * add_reloc_offset(x) returns x + reloc_offset().
+ */
+_GLOBAL(add_reloc_offset)
+        mflr    r0
+        bl      1f
+1:      mflr    r5
+        LOADADDR(r4,1b)
+        subf    r5,r4,r5
+        add     r3,r3,r5
+        mtlr    r0
+        blr
+
+/*
+ * sub_reloc_offset(x) returns x - reloc_offset().
+ */
+_GLOBAL(sub_reloc_offset)
+        mflr    r0
+        bl      1f
+1:      mflr    r5
+        lis     r4,1b@ha
+        addi    r4,r4,1b@l
+        subf    r5,r4,r5
+        subf    r3,r5,r3
+        mtlr    r0
+        blr
+
+/*
+ * reloc_got2 runs through the .got2 section adding an offset
+ * to each entry.
+ */
+_GLOBAL(reloc_got2)
+        mflr    r11
+        lis     r7,__got2_start@ha
+        addi    r7,r7,__got2_start@l
+        lis     r8,__got2_end@ha
+        addi    r8,r8,__got2_end@l
+        subf    r8,r7,r8
+        srwi.   r8,r8,2
+        beqlr
+        mtctr   r8
+        bl      1f
+1:      mflr    r0
+        lis     r4,1b@ha
+        addi    r4,r4,1b@l
+        subf    r0,r4,r0
+        add     r7,r0,r7
+2:      lwz     r0,0(r7)
+        add     r0,r0,r3
+        stw     r0,0(r7)
+        addi    r7,r7,4
+        bdnz    2b
+        mtlr    r11
+        blr
+
+/*
+ * identify_cpu,
+ * called with r3 = data offset and r4 = CPU number
+ * doesn't change r3
+ */
+_GLOBAL(identify_cpu)
+        addis   r8,r3,cpu_specs@ha
+        addi    r8,r8,cpu_specs@l
+        mfpvr   r7
+1:
+        lwz     r5,CPU_SPEC_PVR_MASK(r8)
+        and     r5,r5,r7
+        lwz     r6,CPU_SPEC_PVR_VALUE(r8)
+        cmplw   0,r6,r5
+        beq     1f
+        addi    r8,r8,CPU_SPEC_ENTRY_SIZE
+        b       1b
+1:
+        addis   r6,r3,cur_cpu_spec@ha
+        addi    r6,r6,cur_cpu_spec@l
+        sub     r8,r8,r3
+        stw     r8,0(r6)
+        blr
+
+/*
+ * do_cpu_ftr_fixups - goes through the list of CPU feature fixups
+ * and writes nop's over sections of code that don't apply for this cpu.
+ * r3 = data offset (not changed)
+ */
+_GLOBAL(do_cpu_ftr_fixups)
+        /* Get CPU 0 features */
+        addis   r6,r3,cur_cpu_spec@ha
+        addi    r6,r6,cur_cpu_spec@l
+        lwz     r4,0(r6)
+        add     r4,r4,r3
+        lwz     r4,CPU_SPEC_FEATURES(r4)
+
+        /* Get the fixup table */
+        addis   r6,r3,__start___ftr_fixup@ha
+        addi    r6,r6,__start___ftr_fixup@l
+        addis   r7,r3,__stop___ftr_fixup@ha
+        addi    r7,r7,__stop___ftr_fixup@l
+
+        /* Do the fixup */
+1:      cmplw   0,r6,r7
+        bgelr
+        addi    r6,r6,16
+        lwz     r8,-16(r6)      /* mask */
+        and     r8,r8,r4
+        lwz     r9,-12(r6)      /* value */
+        cmplw   0,r8,r9
+        beq     1b
+        lwz     r8,-8(r6)       /* section begin */
+        lwz     r9,-4(r6)       /* section end */
+        subf.   r9,r8,r9
+        beq     1b
+        /* write nops over the section of code */
+        /* todo: if large section, add a branch at the start of it */
+        srwi    r9,r9,2
+        mtctr   r9
+        add     r8,r8,r3
+        lis     r0,0x60000000@h /* nop */
+3:      stw     r0,0(r8)
+        andi.   r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
+        beq     2f
+        dcbst   0,r8            /* suboptimal, but simpler */
+        sync
+        icbi    0,r8
+2:      addi    r8,r8,4
+        bdnz    3b
+        sync                    /* additional sync needed on g4 */
+        isync
+        b       1b
+
+/*
+ * call_setup_cpu - call the setup_cpu function for this cpu
+ * r3 = data offset, r24 = cpu number
+ *
+ * Setup function is called with:
+ *   r3 = data offset
+ *   r4 = ptr to CPU spec (relocated)
+ */
+_GLOBAL(call_setup_cpu)
+        addis   r4,r3,cur_cpu_spec@ha
+        addi    r4,r4,cur_cpu_spec@l
+        lwz     r4,0(r4)
+        add     r4,r4,r3
+        lwz     r5,CPU_SPEC_SETUP(r4)
+        cmpi    0,r5,0
+        add     r5,r5,r3
+        beqlr
+        mtctr   r5
+        bctr
+
+#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
+
+/* This gets called by via-pmu.c to switch the PLL selection
+ * on 750fx CPU. This function should really be moved to some
+ * other place (as most of the cpufreq code in via-pmu
+ */
+_GLOBAL(low_choose_750fx_pll)
+        /* Clear MSR:EE */
+        mfmsr   r7
+        rlwinm  r0,r7,0,17,15
+        mtmsr   r0
+
+        /* If switching to PLL1, disable HID0:BTIC */
+        cmplwi  cr0,r3,0
+        beq     1f
+        mfspr   r5,SPRN_HID0
+        rlwinm  r5,r5,0,27,25
+        sync
+        mtspr   SPRN_HID0,r5
+        isync
+        sync
+
+1:
+        /* Calc new HID1 value */
+        mfspr   r4,SPRN_HID1    /* Build a HID1:PS bit from parameter */
+        rlwinm  r5,r3,16,15,15  /* Clear out HID1:PS from value read */
+        rlwinm  r4,r4,0,16,14   /* Could have I used rlwimi here ? */
+        or      r4,r4,r5
+        mtspr   SPRN_HID1,r4
+
+        /* Store new HID1 image */
+        rlwinm  r6,r1,0,0,18
+        lwz     r6,TI_CPU(r6)
+        slwi    r6,r6,2
+        addis   r6,r6,nap_save_hid1@ha
+        stw     r4,nap_save_hid1@l(r6)
+
+        /* If switching to PLL0, enable HID0:BTIC */
+        cmplwi  cr0,r3,0
+        bne     1f
+        mfspr   r5,SPRN_HID0
+        ori     r5,r5,HID0_BTIC
+        sync
+        mtspr   SPRN_HID0,r5
+        isync
+        sync
+
+1:
+        /* Return */
+        mtmsr   r7
+        blr
+
+_GLOBAL(low_choose_7447a_dfs)
+        /* Clear MSR:EE */
+        mfmsr   r7
+        rlwinm  r0,r7,0,17,15
+        mtmsr   r0
+        
+        /* Calc new HID1 value */
+        mfspr   r4,SPRN_HID1
+        insrwi  r4,r3,1,9       /* insert parameter into bit 9 */
+        sync
+        mtspr   SPRN_HID1,r4
+        sync
+        isync
+
+        /* Return */
+        mtmsr   r7
+        blr
+
+#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
+
+/*
+ * complement mask on the msr then "or" some values on.
+ *     _nmask_and_or_msr(nmask, value_to_or)
+ */
+_GLOBAL(_nmask_and_or_msr)
+        mfmsr   r0              /* Get current msr */
+        andc    r0,r0,r3        /* And off the bits set in r3 (first parm) */
+        or      r0,r0,r4        /* Or on the bits in r4 (second parm) */
+        SYNC                    /* Some chip revs have problems here... */
+        mtmsr   r0              /* Update machine state */
+        isync
+        blr                     /* Done */
+
+
+/*
+ * Flush MMU TLB
+ */
+_GLOBAL(_tlbia)
+#if defined(CONFIG_40x)
+        sync                    /* Flush to memory before changing mapping */
+        tlbia
+        isync                   /* Flush shadow TLB */
+#elif defined(CONFIG_44x)
+        li      r3,0
+        sync
+
+        /* Load high watermark */
+        lis     r4,tlb_44x_hwater@ha
+        lwz     r5,tlb_44x_hwater@l(r4)
+
+1:      tlbwe   r3,r3,PPC44x_TLB_PAGEID
+        addi    r3,r3,1
+        cmpw    0,r3,r5
+        ble     1b
+
+        isync
+#elif defined(CONFIG_FSL_BOOKE)
+        /* Invalidate all entries in TLB0 */
+        li      r3, 0x04
+        tlbivax 0,3
+        /* Invalidate all entries in TLB1 */
+        li      r3, 0x0c
+        tlbivax 0,3
+        /* Invalidate all entries in TLB2 */
+        li      r3, 0x14
+        tlbivax 0,3
+        /* Invalidate all entries in TLB3 */
+        li      r3, 0x1c
+        tlbivax 0,3
+        msync
+#ifdef CONFIG_SMP
+        tlbsync
+#endif /* CONFIG_SMP */
+#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
+#if defined(CONFIG_SMP)
+        rlwinm  r8,r1,0,0,18
+        lwz     r8,TI_CPU(r8)
+        oris    r8,r8,10
+        mfmsr   r10
+        SYNC
+        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
+        rlwinm  r0,r0,0,28,26           /* clear DR */
+        mtmsr   r0
+        SYNC_601
+        isync
+        lis     r9,mmu_hash_lock@h
+        ori     r9,r9,mmu_hash_lock@l
+        tophys(r9,r9)
+10:     lwarx   r7,0,r9
+        cmpwi   0,r7,0
+        bne-    10b
+        stwcx.  r8,0,r9
+        bne-    10b
+        sync
+        tlbia
+        sync
+        TLBSYNC
+        li      r0,0
+        stw     r0,0(r9)                /* clear mmu_hash_lock */
+        mtmsr   r10
+        SYNC_601
+        isync
+#else /* CONFIG_SMP */
+        sync
+        tlbia
+        sync
+#endif /* CONFIG_SMP */
+#endif /* ! defined(CONFIG_40x) */
+        blr
+
+/*
+ * Flush MMU TLB for a particular address
+ */
+_GLOBAL(_tlbie)
+#if defined(CONFIG_40x)
+        tlbsx.  r3, 0, r3
+        bne     10f
+        sync
+        /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
+         * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate
+         * the TLB entry. */
+        tlbwe   r3, r3, TLB_TAG
+        isync
+10:
+#elif defined(CONFIG_44x)
+        mfspr   r4,SPRN_MMUCR
+        mfspr   r5,SPRN_PID                     /* Get PID */
+        rlwimi  r4,r5,0,24,31                   /* Set TID */
+        mtspr   SPRN_MMUCR,r4
+
+        tlbsx.  r3, 0, r3
+        bne     10f
+        sync
+        /* There are only 64 TLB entries, so r3 < 64,
+         * which means bit 22, is clear.  Since 22 is
+         * the V bit in the TLB_PAGEID, loading this
+         * value will invalidate the TLB entry.
+         */
+        tlbwe   r3, r3, PPC44x_TLB_PAGEID
+        isync
+10:
+#elif defined(CONFIG_FSL_BOOKE)
+        rlwinm  r4, r3, 0, 0, 19
+        ori     r5, r4, 0x08    /* TLBSEL = 1 */
+        ori     r6, r4, 0x10    /* TLBSEL = 2 */
+        ori     r7, r4, 0x18    /* TLBSEL = 3 */
+        tlbivax 0, r4
+        tlbivax 0, r5
+        tlbivax 0, r6
+        tlbivax 0, r7
+        msync
+#if defined(CONFIG_SMP)
+        tlbsync
+#endif /* CONFIG_SMP */
+#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
+#if defined(CONFIG_SMP)
+        rlwinm  r8,r1,0,0,18
+        lwz     r8,TI_CPU(r8)
+        oris    r8,r8,11
+        mfmsr   r10
+        SYNC
+        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
+        rlwinm  r0,r0,0,28,26           /* clear DR */
+        mtmsr   r0
+        SYNC_601
+        isync
+        lis     r9,mmu_hash_lock@h
+        ori     r9,r9,mmu_hash_lock@l
+        tophys(r9,r9)
+10:     lwarx   r7,0,r9
+        cmpwi   0,r7,0
+        bne-    10b
+        stwcx.  r8,0,r9
+        bne-    10b
+        eieio
+        tlbie   r3
+        sync
+        TLBSYNC
+        li      r0,0
+        stw     r0,0(r9)                /* clear mmu_hash_lock */
+        mtmsr   r10
+        SYNC_601
+        isync
+#else /* CONFIG_SMP */
+        tlbie   r3
+        sync
+#endif /* CONFIG_SMP */
+#endif /* ! CONFIG_40x */
+        blr
+
+/*
+ * Flush instruction cache.
+ * This is a no-op on the 601.
+ */
+_GLOBAL(flush_instruction_cache)
+#if defined(CONFIG_8xx)
+        isync
+        lis     r5, IDC_INVALL@h
+        mtspr   SPRN_IC_CST, r5
+#elif defined(CONFIG_4xx)
+#ifdef CONFIG_403GCX
+        li      r3, 512
+        mtctr   r3
+        lis     r4, KERNELBASE@h
+1:      iccci   0, r4
+        addi    r4, r4, 16
+        bdnz    1b
+#else
+        lis     r3, KERNELBASE@h
+        iccci   0,r3
+#endif
+#elif CONFIG_FSL_BOOKE
+BEGIN_FTR_SECTION
+        mfspr   r3,SPRN_L1CSR0
+        ori     r3,r3,L1CSR0_CFI|L1CSR0_CLFC
+        /* msync; isync recommended here */
+        mtspr   SPRN_L1CSR0,r3
+        isync
+        blr
+END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+        mfspr   r3,SPRN_L1CSR1
+        ori     r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
+        mtspr   SPRN_L1CSR1,r3
+#else
+        mfspr   r3,SPRN_PVR
+        rlwinm  r3,r3,16,16,31
+        cmpwi   0,r3,1
+        beqlr                   /* for 601, do nothing */
+        /* 603/604 processor - use invalidate-all bit in HID0 */
+        mfspr   r3,SPRN_HID0
+        ori     r3,r3,HID0_ICFI
+        mtspr   SPRN_HID0,r3
+#endif /* CONFIG_8xx/4xx */
+        isync
+        blr
+
+/*
+ * Write any modified data cache blocks out to memory
+ * and invalidate the corresponding instruction cache blocks.
+ * This is a no-op on the 601.
+ *
+ * flush_icache_range(unsigned long start, unsigned long stop)
+ */
+_GLOBAL(flush_icache_range)
+BEGIN_FTR_SECTION
+        blr                             /* for 601, do nothing */
+END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+        li      r5,L1_CACHE_BYTES-1
+        andc    r3,r3,r5
+        subf    r4,r3,r4
+        add     r4,r4,r5
+        srwi.   r4,r4,L1_CACHE_SHIFT
+        beqlr
+        mtctr   r4
+        mr      r6,r3
+1:      dcbst   0,r3
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    1b
+        sync                            /* wait for dcbst's to get to ram */
+        mtctr   r4
+2:      icbi    0,r6
+        addi    r6,r6,L1_CACHE_BYTES
+        bdnz    2b
+        sync                            /* additional sync needed on g4 */
+        isync
+        blr
+/*
+ * Write any modified data cache blocks out to memory.
+ * Does not invalidate the corresponding cache lines (especially for
+ * any corresponding instruction cache).
+ *
+ * clean_dcache_range(unsigned long start, unsigned long stop)
+ */
+_GLOBAL(clean_dcache_range)
+        li      r5,L1_CACHE_BYTES-1
+        andc    r3,r3,r5
+        subf    r4,r3,r4
+        add     r4,r4,r5
+        srwi.   r4,r4,L1_CACHE_SHIFT
+        beqlr
+        mtctr   r4
+
+1:      dcbst   0,r3
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    1b
+        sync                            /* wait for dcbst's to get to ram */
+        blr
+
+/*
+ * Write any modified data cache blocks out to memory and invalidate them.
+ * Does not invalidate the corresponding instruction cache blocks.
+ *
+ * flush_dcache_range(unsigned long start, unsigned long stop)
+ */
+_GLOBAL(flush_dcache_range)
+        li      r5,L1_CACHE_BYTES-1
+        andc    r3,r3,r5
+        subf    r4,r3,r4
+        add     r4,r4,r5
+        srwi.   r4,r4,L1_CACHE_SHIFT
+        beqlr
+        mtctr   r4
+
+1:      dcbf    0,r3
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    1b
+        sync                            /* wait for dcbst's to get to ram */
+        blr
+
+/*
+ * Like above, but invalidate the D-cache.  This is used by the 8xx
+ * to invalidate the cache so the PPC core doesn't get stale data
+ * from the CPM (no cache snooping here :-).
+ *
+ * invalidate_dcache_range(unsigned long start, unsigned long stop)
+ */
+_GLOBAL(invalidate_dcache_range)
+        li      r5,L1_CACHE_BYTES-1
+        andc    r3,r3,r5
+        subf    r4,r3,r4
+        add     r4,r4,r5
+        srwi.   r4,r4,L1_CACHE_SHIFT
+        beqlr
+        mtctr   r4
+
+1:      dcbi    0,r3
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    1b
+        sync                            /* wait for dcbi's to get to ram */
+        blr
+
+#ifdef CONFIG_NOT_COHERENT_CACHE
+/*
+ * 40x cores have 8K or 16K dcache and 32 byte line size.
+ * 44x has a 32K dcache and 32 byte line size.
+ * 8xx has 1, 2, 4, 8K variants.
+ * For now, cover the worst case of the 44x.
+ * Must be called with external interrupts disabled.
+ */
+#define CACHE_NWAYS     64
+#define CACHE_NLINES    16
+
+_GLOBAL(flush_dcache_all)
+        li      r4, (2 * CACHE_NWAYS * CACHE_NLINES)
+        mtctr   r4
+        lis     r5, KERNELBASE@h
+1:      lwz     r3, 0(r5)               /* Load one word from every line */
+        addi    r5, r5, L1_CACHE_BYTES
+        bdnz    1b
+        blr
+#endif /* CONFIG_NOT_COHERENT_CACHE */
+
+/*
+ * Flush a particular page from the data cache to RAM.
+ * Note: this is necessary because the instruction cache does *not*
+ * snoop from the data cache.
+ * This is a no-op on the 601 which has a unified cache.
+ *
+ *      void __flush_dcache_icache(void *page)
+ */
+_GLOBAL(__flush_dcache_icache)
+BEGIN_FTR_SECTION
+        blr                                     /* for 601, do nothing */
+END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+        rlwinm  r3,r3,0,0,19                    /* Get page base address */
+        li      r4,4096/L1_CACHE_BYTES  /* Number of lines in a page */
+        mtctr   r4
+        mr      r6,r3
+0:      dcbst   0,r3                            /* Write line to ram */
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    0b
+        sync
+        mtctr   r4
+1:      icbi    0,r6
+        addi    r6,r6,L1_CACHE_BYTES
+        bdnz    1b
+        sync
+        isync
+        blr
+
+/*
+ * Flush a particular page from the data cache to RAM, identified
+ * by its physical address.  We turn off the MMU so we can just use
+ * the physical address (this may be a highmem page without a kernel
+ * mapping).
+ *
+ *      void __flush_dcache_icache_phys(unsigned long physaddr)
+ */
+_GLOBAL(__flush_dcache_icache_phys)
+BEGIN_FTR_SECTION
+        blr                                     /* for 601, do nothing */
+END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
+        mfmsr   r10
+        rlwinm  r0,r10,0,28,26                  /* clear DR */
+        mtmsr   r0
+        isync
+        rlwinm  r3,r3,0,0,19                    /* Get page base address */
+        li      r4,4096/L1_CACHE_BYTES  /* Number of lines in a page */
+        mtctr   r4
+        mr      r6,r3
+0:      dcbst   0,r3                            /* Write line to ram */
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    0b
+        sync
+        mtctr   r4
+1:      icbi    0,r6
+        addi    r6,r6,L1_CACHE_BYTES
+        bdnz    1b
+        sync
+        mtmsr   r10                             /* restore DR */
+        isync
+        blr
+
+/*
+ * Clear pages using the dcbz instruction, which doesn't cause any
+ * memory traffic (except to write out any cache lines which get
+ * displaced).  This only works on cacheable memory.
+ *
+ * void clear_pages(void *page, int order) ;
+ */
+_GLOBAL(clear_pages)
+        li      r0,4096/L1_CACHE_BYTES
+        slw     r0,r0,r4
+        mtctr   r0
+#ifdef CONFIG_8xx
+        li      r4, 0
+1:      stw     r4, 0(r3)
+        stw     r4, 4(r3)
+        stw     r4, 8(r3)
+        stw     r4, 12(r3)
+#else
+1:      dcbz    0,r3
+#endif
+        addi    r3,r3,L1_CACHE_BYTES
+        bdnz    1b
+        blr
+
+/*
+ * Copy a whole page.  We use the dcbz instruction on the destination
+ * to reduce memory traffic (it eliminates the unnecessary reads of
+ * the destination into cache).  This requires that the destination
+ * is cacheable.
+ */
+#define COPY_16_BYTES           \
+        lwz     r6,4(r4);       \
+        lwz     r7,8(r4);       \
+        lwz     r8,12(r4);      \
+        lwzu    r9,16(r4);      \
+        stw     r6,4(r3);       \
+        stw     r7,8(r3);       \
+        stw     r8,12(r3);      \
+        stwu    r9,16(r3)
+
+_GLOBAL(copy_page)
+        addi    r3,r3,-4
+        addi    r4,r4,-4
+
+#ifdef CONFIG_8xx
+        /* don't use prefetch on 8xx */
+        li      r0,4096/L1_CACHE_BYTES
+        mtctr   r0
+1:      COPY_16_BYTES
+        bdnz    1b
+        blr
+
+#else   /* not 8xx, we can prefetch */
+        li      r5,4
+
+#if MAX_COPY_PREFETCH > 1
+        li      r0,MAX_COPY_PREFETCH
+        li      r11,4
+        mtctr   r0
+11:     dcbt    r11,r4
+        addi    r11,r11,L1_CACHE_BYTES
+        bdnz    11b
+#else /* MAX_COPY_PREFETCH == 1 */
+        dcbt    r5,r4
+        li      r11,L1_CACHE_BYTES+4
+#endif /* MAX_COPY_PREFETCH */
+        li      r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
+        crclr   4*cr0+eq
+2:
+        mtctr   r0
+1:
+        dcbt    r11,r4
+        dcbz    r5,r3
+        COPY_16_BYTES
+#if L1_CACHE_BYTES >= 32
+        COPY_16_BYTES
+#if L1_CACHE_BYTES >= 64
+        COPY_16_BYTES
+        COPY_16_BYTES
+#if L1_CACHE_BYTES >= 128
+        COPY_16_BYTES
+        COPY_16_BYTES
+        COPY_16_BYTES
+        COPY_16_BYTES
+#endif
+#endif
+#endif
+        bdnz    1b
+        beqlr
+        crnot   4*cr0+eq,4*cr0+eq
+        li      r0,MAX_COPY_PREFETCH
+        li      r11,4
+        b       2b
+#endif  /* CONFIG_8xx */
+
+/*
+ * void atomic_clear_mask(atomic_t mask, atomic_t *addr)
+ * void atomic_set_mask(atomic_t mask, atomic_t *addr);
+ */
+_GLOBAL(atomic_clear_mask)
+10:     lwarx   r5,0,r4
+        andc    r5,r5,r3
+        PPC405_ERR77(0,r4)
+        stwcx.  r5,0,r4
+        bne-    10b
+        blr
+_GLOBAL(atomic_set_mask)
+10:     lwarx   r5,0,r4
+        or      r5,r5,r3
+        PPC405_ERR77(0,r4)
+        stwcx.  r5,0,r4
+        bne-    10b
+        blr
+
+/*
+ * I/O string operations
+ *
+ * insb(port, buf, len)
+ * outsb(port, buf, len)
+ * insw(port, buf, len)
+ * outsw(port, buf, len)
+ * insl(port, buf, len)
+ * outsl(port, buf, len)
+ * insw_ns(port, buf, len)
+ * outsw_ns(port, buf, len)
+ * insl_ns(port, buf, len)
+ * outsl_ns(port, buf, len)
+ *
+ * The *_ns versions don't do byte-swapping.
+ */
+_GLOBAL(_insb)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,1
+        blelr-
+00:     lbz     r5,0(r3)
+        eieio
+        stbu    r5,1(r4)
+        bdnz    00b
+        blr
+
+_GLOBAL(_outsb)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,1
+        blelr-
+00:     lbzu    r5,1(r4)
+        stb     r5,0(r3)
+        eieio
+        bdnz    00b
+        blr
+
+_GLOBAL(_insw)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhbrx   r5,0,r3
+        eieio
+        sthu    r5,2(r4)
+        bdnz    00b
+        blr
+
+_GLOBAL(_outsw)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhzu    r5,2(r4)
+        eieio
+        sthbrx  r5,0,r3
+        bdnz    00b
+        blr
+
+_GLOBAL(_insl)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwbrx   r5,0,r3
+        eieio
+        stwu    r5,4(r4)
+        bdnz    00b
+        blr
+
+_GLOBAL(_outsl)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwzu    r5,4(r4)
+        stwbrx  r5,0,r3
+        eieio
+        bdnz    00b
+        blr
+
+_GLOBAL(__ide_mm_insw)
+_GLOBAL(_insw_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhz     r5,0(r3)
+        eieio
+        sthu    r5,2(r4)
+        bdnz    00b
+        blr
+
+_GLOBAL(__ide_mm_outsw)
+_GLOBAL(_outsw_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhzu    r5,2(r4)
+        sth     r5,0(r3)
+        eieio
+        bdnz    00b
+        blr
+
+_GLOBAL(__ide_mm_insl)
+_GLOBAL(_insl_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwz     r5,0(r3)
+        eieio
+        stwu    r5,4(r4)
+        bdnz    00b
+        blr
+
+_GLOBAL(__ide_mm_outsl)
+_GLOBAL(_outsl_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwzu    r5,4(r4)
+        stw     r5,0(r3)
+        eieio
+        bdnz    00b
+        blr
+
+/*
+ * Extended precision shifts.
+ *
+ * Updated to be valid for shift counts from 0 to 63 inclusive.
+ * -- Gabriel
+ *
+ * R3/R4 has 64 bit value
+ * R5    has shift count
+ * result in R3/R4
+ *
+ *  ashrdi3: arithmetic right shift (sign propagation)  
+ *  lshrdi3: logical right shift
+ *  ashldi3: left shift
+ */
+_GLOBAL(__ashrdi3)
+        subfic  r6,r5,32
+        srw     r4,r4,r5        # LSW = count > 31 ? 0 : LSW >> count
+        addi    r7,r5,32        # could be xori, or addi with -32
+        slw     r6,r3,r6        # t1 = count > 31 ? 0 : MSW << (32-count)
+        rlwinm  r8,r7,0,32      # t3 = (count < 32) ? 32 : 0
+        sraw    r7,r3,r7        # t2 = MSW >> (count-32)
+        or      r4,r4,r6        # LSW |= t1
+        slw     r7,r7,r8        # t2 = (count < 32) ? 0 : t2
+        sraw    r3,r3,r5        # MSW = MSW >> count
+        or      r4,r4,r7        # LSW |= t2
+        blr
+
+_GLOBAL(__ashldi3)
+        subfic  r6,r5,32
+        slw     r3,r3,r5        # MSW = count > 31 ? 0 : MSW << count
+        addi    r7,r5,32        # could be xori, or addi with -32
+        srw     r6,r4,r6        # t1 = count > 31 ? 0 : LSW >> (32-count)
+        slw     r7,r4,r7        # t2 = count < 32 ? 0 : LSW << (count-32)
+        or      r3,r3,r6        # MSW |= t1
+        slw     r4,r4,r5        # LSW = LSW << count
+        or      r3,r3,r7        # MSW |= t2
+        blr
+
+_GLOBAL(__lshrdi3)
+        subfic  r6,r5,32
+        srw     r4,r4,r5        # LSW = count > 31 ? 0 : LSW >> count
+        addi    r7,r5,32        # could be xori, or addi with -32
+        slw     r6,r3,r6        # t1 = count > 31 ? 0 : MSW << (32-count)
+        srw     r7,r3,r7        # t2 = count < 32 ? 0 : MSW >> (count-32)
+        or      r4,r4,r6        # LSW |= t1
+        srw     r3,r3,r5        # MSW = MSW >> count
+        or      r4,r4,r7        # LSW |= t2
+        blr
+
+_GLOBAL(abs)
+        srawi   r4,r3,31
+        xor     r3,r3,r4
+        sub     r3,r3,r4
+        blr
+
+_GLOBAL(_get_SP)
+        mr      r3,r1           /* Close enough */
+        blr
+
+/*
+ * Create a kernel thread
+ *   kernel_thread(fn, arg, flags)
+ */
+_GLOBAL(kernel_thread)
+        stwu    r1,-16(r1)
+        stw     r30,8(r1)
+        stw     r31,12(r1)
+        mr      r30,r3          /* function */
+        mr      r31,r4          /* argument */
+        ori     r3,r5,CLONE_VM  /* flags */
+        oris    r3,r3,CLONE_UNTRACED>>16
+        li      r4,0            /* new sp (unused) */
+        li      r0,__NR_clone
+        sc
+        cmpwi   0,r3,0          /* parent or child? */
+        bne     1f              /* return if parent */
+        li      r0,0            /* make top-level stack frame */
+        stwu    r0,-16(r1)
+        mtlr    r30             /* fn addr in lr */
+        mr      r3,r31          /* load arg and call fn */
+        PPC440EP_ERR42
+        blrl
+        li      r0,__NR_exit    /* exit if function returns */
+        li      r3,0
+        sc
+1:      lwz     r30,8(r1)
+        lwz     r31,12(r1)
+        addi    r1,r1,16
+        blr
+
+_GLOBAL(execve)
+        li      r0,__NR_execve
+        sc
+        bnslr
+        neg     r3,r3
+        blr
+
+/*
+ * This routine is just here to keep GCC happy - sigh...
+ */
+_GLOBAL(__main)
+        blr
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
new file mode 100644
index 000000000000..b3e95ff0dba0
--- /dev/null
+++ b/arch/powerpc/kernel/misc_64.S
@@ -0,0 +1,880 @@
+/*
+ *  arch/powerpc/kernel/misc64.S
+ *
+ * This file contains miscellaneous low-level functions.
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
+ * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) 
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/sys.h>
+#include <asm/unistd.h>
+#include <asm/errno.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/cache.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+
+        .text
+
+/*
+ * Returns (address we are running at) - (address we were linked at)
+ * for use before the text and data are mapped to KERNELBASE.
+ */
+
+_GLOBAL(reloc_offset)
+        mflr    r0
+        bl      1f
+1:      mflr    r3
+        LOADADDR(r4,1b)
+        subf    r3,r4,r3
+        mtlr    r0
+        blr
+
+/*
+ * add_reloc_offset(x) returns x + reloc_offset().
+ */
+_GLOBAL(add_reloc_offset)
+        mflr    r0
+        bl      1f
+1:      mflr    r5
+        LOADADDR(r4,1b)
+        subf    r5,r4,r5
+        add     r3,r3,r5
+        mtlr    r0
+        blr
+
+_GLOBAL(get_msr)
+        mfmsr   r3
+        blr
+
+_GLOBAL(get_dar)
+        mfdar   r3
+        blr
+
+_GLOBAL(get_srr0)
+        mfsrr0  r3
+        blr
+
+_GLOBAL(get_srr1)
+        mfsrr1  r3
+        blr
+        
+_GLOBAL(get_sp)
+        mr      r3,r1
+        blr
+
+#ifdef CONFIG_IRQSTACKS
+_GLOBAL(call_do_softirq)
+        mflr    r0
+        std     r0,16(r1)
+        stdu    r1,THREAD_SIZE-112(r3)
+        mr      r1,r3
+        bl      .__do_softirq
+        ld      r1,0(r1)
+        ld      r0,16(r1)
+        mtlr    r0
+        blr
+
+_GLOBAL(call_handle_IRQ_event)
+        mflr    r0
+        std     r0,16(r1)
+        stdu    r1,THREAD_SIZE-112(r6)
+        mr      r1,r6
+        bl      .handle_IRQ_event
+        ld      r1,0(r1)
+        ld      r0,16(r1)
+        mtlr    r0
+        blr
+#endif /* CONFIG_IRQSTACKS */
+
+        /*
+ * To be called by C code which needs to do some operations with MMU
+ * disabled. Note that interrupts have to be disabled by the caller
+ * prior to calling us. The code called _MUST_ be in the RMO of course
+ * and part of the linear mapping as we don't attempt to translate the
+ * stack pointer at all. The function is called with the stack switched
+ * to this CPU emergency stack
+ *
+ * prototype is void *call_with_mmu_off(void *func, void *data);
+ *
+ * the called function is expected to be of the form
+ *
+ * void *called(void *data); 
+ */
+_GLOBAL(call_with_mmu_off)
+        mflr    r0                      /* get link, save it on stackframe */
+        std     r0,16(r1)
+        mr      r1,r5                   /* save old stack ptr */
+        ld      r1,PACAEMERGSP(r13)     /* get emerg. stack */
+        subi    r1,r1,STACK_FRAME_OVERHEAD
+        std     r0,16(r1)               /* save link on emerg. stack */
+        std     r5,0(r1)                /* save old stack ptr in backchain */
+        ld      r3,0(r3)                /* get to real function ptr (assume same TOC) */
+        bl      2f                      /* we need LR to return, continue at label 2 */
+
+        ld      r0,16(r1)               /* we return here from the call, get LR and */
+        ld      r1,0(r1)                /* .. old stack ptr */
+        mtspr   SPRN_SRR0,r0            /* and get back to virtual mode with these */
+        mfmsr   r4
+        ori     r4,r4,MSR_IR|MSR_DR
+        mtspr   SPRN_SRR1,r4
+        rfid
+
+2:      mtspr   SPRN_SRR0,r3            /* coming from above, enter real mode */
+        mr      r3,r4                   /* get parameter */
+        mfmsr   r0
+        ori     r0,r0,MSR_IR|MSR_DR
+        xori    r0,r0,MSR_IR|MSR_DR
+        mtspr   SPRN_SRR1,r0
+        rfid
+
+
+        .section        ".toc","aw"
+PPC64_CACHES:
+        .tc             ppc64_caches[TC],ppc64_caches
+        .section        ".text"
+
+/*
+ * Write any modified data cache blocks out to memory
+ * and invalidate the corresponding instruction cache blocks.
+ *
+ * flush_icache_range(unsigned long start, unsigned long stop)
+ *
+ *   flush all bytes from start through stop-1 inclusive
+ */
+
+_KPROBE(__flush_icache_range)
+
+/*
+ * Flush the data cache to memory 
+ * 
+ * Different systems have different cache line sizes
+ * and in some cases i-cache and d-cache line sizes differ from
+ * each other.
+ */
+        ld      r10,PPC64_CACHES@toc(r2)
+        lwz     r7,DCACHEL1LINESIZE(r10)/* Get cache line size */
+        addi    r5,r7,-1
+        andc    r6,r3,r5                /* round low to line bdy */
+        subf    r8,r6,r4                /* compute length */
+        add     r8,r8,r5                /* ensure we get enough */
+        lwz     r9,DCACHEL1LOGLINESIZE(r10)     /* Get log-2 of cache line size */
+        srw.    r8,r8,r9                /* compute line count */
+        beqlr                           /* nothing to do? */
+        mtctr   r8
+1:      dcbst   0,r6
+        add     r6,r6,r7
+        bdnz    1b
+        sync
+
+/* Now invalidate the instruction cache */
+        
+        lwz     r7,ICACHEL1LINESIZE(r10)        /* Get Icache line size */
+        addi    r5,r7,-1
+        andc    r6,r3,r5                /* round low to line bdy */
+        subf    r8,r6,r4                /* compute length */
+        add     r8,r8,r5
+        lwz     r9,ICACHEL1LOGLINESIZE(r10)     /* Get log-2 of Icache line size */
+        srw.    r8,r8,r9                /* compute line count */
+        beqlr                           /* nothing to do? */
+        mtctr   r8
+2:      icbi    0,r6
+        add     r6,r6,r7
+        bdnz    2b
+        isync
+        blr
+        .previous .text
+/*
+ * Like above, but only do the D-cache.
+ *
+ * flush_dcache_range(unsigned long start, unsigned long stop)
+ *
+ *    flush all bytes from start to stop-1 inclusive
+ */
+_GLOBAL(flush_dcache_range)
+
+/*
+ * Flush the data cache to memory 
+ * 
+ * Different systems have different cache line sizes
+ */
+        ld      r10,PPC64_CACHES@toc(r2)
+        lwz     r7,DCACHEL1LINESIZE(r10)        /* Get dcache line size */
+        addi    r5,r7,-1
+        andc    r6,r3,r5                /* round low to line bdy */
+        subf    r8,r6,r4                /* compute length */
+        add     r8,r8,r5                /* ensure we get enough */
+        lwz     r9,DCACHEL1LOGLINESIZE(r10)     /* Get log-2 of dcache line size */
+        srw.    r8,r8,r9                /* compute line count */
+        beqlr                           /* nothing to do? */
+        mtctr   r8
+0:      dcbst   0,r6
+        add     r6,r6,r7
+        bdnz    0b
+        sync
+        blr
+
+/*
+ * Like above, but works on non-mapped physical addresses.
+ * Use only for non-LPAR setups ! It also assumes real mode
+ * is cacheable. Used for flushing out the DART before using
+ * it as uncacheable memory 
+ *
+ * flush_dcache_phys_range(unsigned long start, unsigned long stop)
+ *
+ *    flush all bytes from start to stop-1 inclusive
+ */
+_GLOBAL(flush_dcache_phys_range)
+        ld      r10,PPC64_CACHES@toc(r2)
+        lwz     r7,DCACHEL1LINESIZE(r10)        /* Get dcache line size */
+        addi    r5,r7,-1
+        andc    r6,r3,r5                /* round low to line bdy */
+        subf    r8,r6,r4                /* compute length */
+        add     r8,r8,r5                /* ensure we get enough */
+        lwz     r9,DCACHEL1LOGLINESIZE(r10)     /* Get log-2 of dcache line size */
+        srw.    r8,r8,r9                /* compute line count */
+        beqlr                           /* nothing to do? */
+        mfmsr   r5                      /* Disable MMU Data Relocation */
+        ori     r0,r5,MSR_DR
+        xori    r0,r0,MSR_DR
+        sync
+        mtmsr   r0
+        sync
+        isync
+        mtctr   r8
+0:      dcbst   0,r6
+        add     r6,r6,r7
+        bdnz    0b
+        sync
+        isync
+        mtmsr   r5                      /* Re-enable MMU Data Relocation */
+        sync
+        isync
+        blr
+
+_GLOBAL(flush_inval_dcache_range)
+        ld      r10,PPC64_CACHES@toc(r2)
+        lwz     r7,DCACHEL1LINESIZE(r10)        /* Get dcache line size */
+        addi    r5,r7,-1
+        andc    r6,r3,r5                /* round low to line bdy */
+        subf    r8,r6,r4                /* compute length */
+        add     r8,r8,r5                /* ensure we get enough */
+        lwz     r9,DCACHEL1LOGLINESIZE(r10)/* Get log-2 of dcache line size */
+        srw.    r8,r8,r9                /* compute line count */
+        beqlr                           /* nothing to do? */
+        sync
+        isync
+        mtctr   r8
+0:      dcbf    0,r6
+        add     r6,r6,r7
+        bdnz    0b
+        sync
+        isync
+        blr
+
+
+/*
+ * Flush a particular page from the data cache to RAM.
+ * Note: this is necessary because the instruction cache does *not*
+ * snoop from the data cache.
+ *
+ *      void __flush_dcache_icache(void *page)
+ */
+_GLOBAL(__flush_dcache_icache)
+/*
+ * Flush the data cache to memory 
+ * 
+ * Different systems have different cache line sizes
+ */
+
+/* Flush the dcache */
+        ld      r7,PPC64_CACHES@toc(r2)
+        clrrdi  r3,r3,PAGE_SHIFT                    /* Page align */
+        lwz     r4,DCACHEL1LINESPERPAGE(r7)     /* Get # dcache lines per page */
+        lwz     r5,DCACHEL1LINESIZE(r7)         /* Get dcache line size */
+        mr      r6,r3
+        mtctr   r4
+0:      dcbst   0,r6
+        add     r6,r6,r5
+        bdnz    0b
+        sync
+
+/* Now invalidate the icache */ 
+
+        lwz     r4,ICACHEL1LINESPERPAGE(r7)     /* Get # icache lines per page */
+        lwz     r5,ICACHEL1LINESIZE(r7)         /* Get icache line size */
+        mtctr   r4
+1:      icbi    0,r3
+        add     r3,r3,r5
+        bdnz    1b
+        isync
+        blr
+        
+/*
+ * I/O string operations
+ *
+ * insb(port, buf, len)
+ * outsb(port, buf, len)
+ * insw(port, buf, len)
+ * outsw(port, buf, len)
+ * insl(port, buf, len)
+ * outsl(port, buf, len)
+ * insw_ns(port, buf, len)
+ * outsw_ns(port, buf, len)
+ * insl_ns(port, buf, len)
+ * outsl_ns(port, buf, len)
+ *
+ * The *_ns versions don't do byte-swapping.
+ */
+_GLOBAL(_insb)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,1
+        blelr-
+00:     lbz     r5,0(r3)
+        eieio
+        stbu    r5,1(r4)
+        bdnz    00b
+        twi     0,r5,0
+        isync
+        blr
+
+_GLOBAL(_outsb)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,1
+        blelr-
+00:     lbzu    r5,1(r4)
+        stb     r5,0(r3)
+        bdnz    00b
+        sync
+        blr     
+
+_GLOBAL(_insw)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhbrx   r5,0,r3
+        eieio
+        sthu    r5,2(r4)
+        bdnz    00b
+        twi     0,r5,0
+        isync
+        blr
+
+_GLOBAL(_outsw)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhzu    r5,2(r4)
+        sthbrx  r5,0,r3 
+        bdnz    00b
+        sync
+        blr     
+
+_GLOBAL(_insl)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwbrx   r5,0,r3
+        eieio
+        stwu    r5,4(r4)
+        bdnz    00b
+        twi     0,r5,0
+        isync
+        blr
+
+_GLOBAL(_outsl)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwzu    r5,4(r4)
+        stwbrx  r5,0,r3
+        bdnz    00b
+        sync
+        blr     
+
+/* _GLOBAL(ide_insw) now in drivers/ide/ide-iops.c */
+_GLOBAL(_insw_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhz     r5,0(r3)
+        eieio
+        sthu    r5,2(r4)
+        bdnz    00b
+        twi     0,r5,0
+        isync
+        blr
+
+/* _GLOBAL(ide_outsw) now in drivers/ide/ide-iops.c */
+_GLOBAL(_outsw_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,2
+        blelr-
+00:     lhzu    r5,2(r4)
+        sth     r5,0(r3)
+        bdnz    00b
+        sync
+        blr     
+
+_GLOBAL(_insl_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwz     r5,0(r3)
+        eieio
+        stwu    r5,4(r4)
+        bdnz    00b
+        twi     0,r5,0
+        isync
+        blr
+
+_GLOBAL(_outsl_ns)
+        cmpwi   0,r5,0
+        mtctr   r5
+        subi    r4,r4,4
+        blelr-
+00:     lwzu    r5,4(r4)
+        stw     r5,0(r3)
+        bdnz    00b
+        sync
+        blr     
+
+/*
+ * identify_cpu and calls setup_cpu
+ * In:  r3 = base of the cpu_specs array
+ *      r4 = address of cur_cpu_spec
+ *      r5 = relocation offset
+ */
+_GLOBAL(identify_cpu)
+        mfpvr   r7
+1:
+        lwz     r8,CPU_SPEC_PVR_MASK(r3)
+        and     r8,r8,r7
+        lwz     r9,CPU_SPEC_PVR_VALUE(r3)
+        cmplw   0,r9,r8
+        beq     1f
+        addi    r3,r3,CPU_SPEC_ENTRY_SIZE
+        b       1b
+1:
+        sub     r0,r3,r5
+        std     r0,0(r4)
+        ld      r4,CPU_SPEC_SETUP(r3)
+        add     r4,r4,r5
+        ld      r4,0(r4)
+        add     r4,r4,r5
+        mtctr   r4
+        /* Calling convention for cpu setup is r3=offset, r4=cur_cpu_spec */
+        mr      r4,r3
+        mr      r3,r5
+        bctr
+
+/*
+ * do_cpu_ftr_fixups - goes through the list of CPU feature fixups
+ * and writes nop's over sections of code that don't apply for this cpu.
+ * r3 = data offset (not changed)
+ */
+_GLOBAL(do_cpu_ftr_fixups)
+        /* Get CPU 0 features */
+        LOADADDR(r6,cur_cpu_spec)
+        sub     r6,r6,r3
+        ld      r4,0(r6)
+        sub     r4,r4,r3
+        ld      r4,CPU_SPEC_FEATURES(r4)
+        /* Get the fixup table */
+        LOADADDR(r6,__start___ftr_fixup)
+        sub     r6,r6,r3
+        LOADADDR(r7,__stop___ftr_fixup)
+        sub     r7,r7,r3
+        /* Do the fixup */
+1:      cmpld   r6,r7
+        bgelr
+        addi    r6,r6,32
+        ld      r8,-32(r6)      /* mask */
+        and     r8,r8,r4
+        ld      r9,-24(r6)      /* value */
+        cmpld   r8,r9
+        beq     1b
+        ld      r8,-16(r6)      /* section begin */
+        ld      r9,-8(r6)       /* section end */
+        subf.   r9,r8,r9
+        beq     1b
+        /* write nops over the section of code */
+        /* todo: if large section, add a branch at the start of it */
+        srwi    r9,r9,2
+        mtctr   r9
+        sub     r8,r8,r3
+        lis     r0,0x60000000@h /* nop */
+3:      stw     r0,0(r8)
+        andi.   r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
+        beq     2f
+        dcbst   0,r8            /* suboptimal, but simpler */
+        sync
+        icbi    0,r8
+2:      addi    r8,r8,4
+        bdnz    3b
+        sync                    /* additional sync needed on g4 */
+        isync
+        b       1b
+
+#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
+/*
+ * Do an IO access in real mode
+ */
+_GLOBAL(real_readb)
+        mfmsr   r7
+        ori     r0,r7,MSR_DR
+        xori    r0,r0,MSR_DR
+        sync
+        mtmsrd  r0
+        sync
+        isync
+        mfspr   r6,SPRN_HID4
+        rldicl  r5,r6,32,0
+        ori     r5,r5,0x100
+        rldicl  r5,r5,32,0
+        sync
+        mtspr   SPRN_HID4,r5
+        isync
+        slbia
+        isync
+        lbz     r3,0(r3)
+        sync
+        mtspr   SPRN_HID4,r6
+        isync
+        slbia
+        isync
+        mtmsrd  r7
+        sync
+        isync
+        blr
+
+        /*
+ * Do an IO access in real mode
+ */
+_GLOBAL(real_writeb)
+        mfmsr   r7
+        ori     r0,r7,MSR_DR
+        xori    r0,r0,MSR_DR
+        sync
+        mtmsrd  r0
+        sync
+        isync
+        mfspr   r6,SPRN_HID4
+        rldicl  r5,r6,32,0
+        ori     r5,r5,0x100
+        rldicl  r5,r5,32,0
+        sync
+        mtspr   SPRN_HID4,r5
+        isync
+        slbia
+        isync
+        stb     r3,0(r4)
+        sync
+        mtspr   SPRN_HID4,r6
+        isync
+        slbia
+        isync
+        mtmsrd  r7
+        sync
+        isync
+        blr
+#endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */
+
+/*
+ * Create a kernel thread
+ *   kernel_thread(fn, arg, flags)
+ */
+_GLOBAL(kernel_thread)
+        std     r29,-24(r1)
+        std     r30,-16(r1)
+        stdu    r1,-STACK_FRAME_OVERHEAD(r1)
+        mr      r29,r3
+        mr      r30,r4
+        ori     r3,r5,CLONE_VM  /* flags */
+        oris    r3,r3,(CLONE_UNTRACED>>16)
+        li      r4,0            /* new sp (unused) */
+        li      r0,__NR_clone
+        sc
+        cmpdi   0,r3,0          /* parent or child? */
+        bne     1f              /* return if parent */
+        li      r0,0
+        stdu    r0,-STACK_FRAME_OVERHEAD(r1)
+        ld      r2,8(r29)
+        ld      r29,0(r29)
+        mtlr    r29              /* fn addr in lr */
+        mr      r3,r30          /* load arg and call fn */
+        blrl
+        li      r0,__NR_exit    /* exit after child exits */
+        li      r3,0
+        sc
+1:      addi    r1,r1,STACK_FRAME_OVERHEAD      
+        ld      r29,-24(r1)
+        ld      r30,-16(r1)
+        blr
+
+/*
+ * disable_kernel_fp()
+ * Disable the FPU.
+ */
+_GLOBAL(disable_kernel_fp)
+        mfmsr   r3
+        rldicl  r0,r3,(63-MSR_FP_LG),1
+        rldicl  r3,r0,(MSR_FP_LG+1),0
+        mtmsrd  r3                      /* disable use of fpu now */
+        isync
+        blr
+
+#ifdef CONFIG_ALTIVEC
+
+#if 0 /* this has no callers for now */
+/*
+ * disable_kernel_altivec()
+ * Disable the VMX.
+ */
+_GLOBAL(disable_kernel_altivec)
+        mfmsr   r3
+        rldicl  r0,r3,(63-MSR_VEC_LG),1
+        rldicl  r3,r0,(MSR_VEC_LG+1),0
+        mtmsrd  r3                      /* disable use of VMX now */
+        isync
+        blr
+#endif /* 0 */
+
+/*
+ * giveup_altivec(tsk)
+ * Disable VMX for the task given as the argument,
+ * and save the vector registers in its thread_struct.
+ * Enables the VMX for use in the kernel on return.
+ */
+_GLOBAL(giveup_altivec)
+        mfmsr   r5
+        oris    r5,r5,MSR_VEC@h
+        mtmsrd  r5                      /* enable use of VMX now */
+        isync
+        cmpdi   0,r3,0
+        beqlr-                          /* if no previous owner, done */
+        addi    r3,r3,THREAD            /* want THREAD of task */
+        ld      r5,PT_REGS(r3)
+        cmpdi   0,r5,0
+        SAVE_32VRS(0,r4,r3)
+        mfvscr  vr0
+        li      r4,THREAD_VSCR
+        stvx    vr0,r4,r3
+        beq     1f
+        ld      r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+        lis     r3,MSR_VEC@h
+        andc    r4,r4,r3                /* disable FP for previous task */
+        std     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#ifndef CONFIG_SMP
+        li      r5,0
+        ld      r4,last_task_used_altivec@got(r2)
+        std     r5,0(r4)
+#endif /* CONFIG_SMP */
+        blr
+
+#endif /* CONFIG_ALTIVEC */
+
+_GLOBAL(__setup_cpu_power3)
+        blr
+
+_GLOBAL(execve)
+        li      r0,__NR_execve
+        sc
+        bnslr
+        neg     r3,r3
+        blr
+
+/* kexec_wait(phys_cpu)
+ *
+ * wait for the flag to change, indicating this kernel is going away but
+ * the slave code for the next one is at addresses 0 to 100.
+ *
+ * This is used by all slaves.
+ *
+ * Physical (hardware) cpu id should be in r3.
+ */
+_GLOBAL(kexec_wait)
+        bl      1f
+1:      mflr    r5
+        addi    r5,r5,kexec_flag-1b
+
+99:     HMT_LOW
+#ifdef CONFIG_KEXEC             /* use no memory without kexec */
+        lwz     r4,0(r5)
+        cmpwi   0,r4,0
+        bnea    0x60
+#endif
+        b       99b
+
+/* this can be in text because we won't change it until we are
+ * running in real anyways
+ */
+kexec_flag:
+        .long   0
+
+
+#ifdef CONFIG_KEXEC
+
+/* kexec_smp_wait(void)
+ *
+ * call with interrupts off
+ * note: this is a terminal routine, it does not save lr
+ *
+ * get phys id from paca
+ * set paca id to -1 to say we got here
+ * switch to real mode
+ * join other cpus in kexec_wait(phys_id)
+ */
+_GLOBAL(kexec_smp_wait)
+        lhz     r3,PACAHWCPUID(r13)
+        li      r4,-1
+        sth     r4,PACAHWCPUID(r13)     /* let others know we left */
+        bl      real_mode
+        b       .kexec_wait
+
+/*
+ * switch to real mode (turn mmu off)
+ * we use the early kernel trick that the hardware ignores bits
+ * 0 and 1 (big endian) of the effective address in real mode
+ *
+ * don't overwrite r3 here, it is live for kexec_wait above.
+ */
+real_mode:      /* assume normal blr return */
+1:      li      r9,MSR_RI
+        li      r10,MSR_DR|MSR_IR
+        mflr    r11             /* return address to SRR0 */
+        mfmsr   r12
+        andc    r9,r12,r9
+        andc    r10,r12,r10
+
+        mtmsrd  r9,1
+        mtspr   SPRN_SRR1,r10
+        mtspr   SPRN_SRR0,r11
+        rfid
+
+
+/*
+ * kexec_sequence(newstack, start, image, control, clear_all())
+ *
+ * does the grungy work with stack switching and real mode switches
+ * also does simple calls to other code
+ */
+
+_GLOBAL(kexec_sequence)
+        mflr    r0
+        std     r0,16(r1)
+
+        /* switch stacks to newstack -- &kexec_stack.stack */
+        stdu    r1,THREAD_SIZE-112(r3)
+        mr      r1,r3
+
+        li      r0,0
+        std     r0,16(r1)
+
+        /* save regs for local vars on new stack.
+         * yes, we won't go back, but ...
+         */
+        std     r31,-8(r1)
+        std     r30,-16(r1)
+        std     r29,-24(r1)
+        std     r28,-32(r1)
+        std     r27,-40(r1)
+        std     r26,-48(r1)
+        std     r25,-56(r1)
+
+        stdu    r1,-112-64(r1)
+
+        /* save args into preserved regs */
+        mr      r31,r3                  /* newstack (both) */
+        mr      r30,r4                  /* start (real) */
+        mr      r29,r5                  /* image (virt) */
+        mr      r28,r6                  /* control, unused */
+        mr      r27,r7                  /* clear_all() fn desc */
+        mr      r26,r8                  /* spare */
+        lhz     r25,PACAHWCPUID(r13)    /* get our phys cpu from paca */
+
+        /* disable interrupts, we are overwriting kernel data next */
+        mfmsr   r3
+        rlwinm  r3,r3,0,17,15
+        mtmsrd  r3,1
+
+        /* copy dest pages, flush whole dest image */
+        mr      r3,r29
+        bl      .kexec_copy_flush       /* (image) */
+
+        /* turn off mmu */
+        bl      real_mode
+
+        /* clear out hardware hash page table and tlb */
+        ld      r5,0(r27)               /* deref function descriptor */
+        mtctr   r5
+        bctrl                           /* ppc_md.hash_clear_all(void); */
+
+/*
+ *   kexec image calling is:
+ *      the first 0x100 bytes of the entry point are copied to 0
+ *
+ *      all slaves branch to slave = 0x60 (absolute)
+ *              slave(phys_cpu_id);
+ *
+ *      master goes to start = entry point
+ *              start(phys_cpu_id, start, 0);
+ *
+ *
+ *   a wrapper is needed to call existing kernels, here is an approximate
+ *   description of one method:
+ *
+ * v2: (2.6.10)
+ *   start will be near the boot_block (maybe 0x100 bytes before it?)
+ *   it will have a 0x60, which will b to boot_block, where it will wait
+ *   and 0 will store phys into struct boot-block and load r3 from there,
+ *   copy kernel 0-0x100 and tell slaves to back down to 0x60 again
+ *
+ * v1: (2.6.9)
+ *    boot block will have all cpus scanning device tree to see if they
+ *    are the boot cpu ?????
+ *    other device tree differences (prop sizes, va vs pa, etc)...
+ */
+
+        /* copy  0x100 bytes starting at start to 0 */
+        li      r3,0
+        mr      r4,r30
+        li      r5,0x100
+        li      r6,0
+        bl      .copy_and_flush /* (dest, src, copy limit, start offset) */
+1:      /* assume normal blr return */
+
+        /* release other cpus to the new kernel secondary start at 0x60 */
+        mflr    r5
+        li      r6,1
+        stw     r6,kexec_flag-1b(5)
+        mr      r3,r25  # my phys cpu
+        mr      r4,r30  # start, aka phys mem offset
+        mtlr    4
+        li      r5,0
+        blr     /* image->start(physid, image->start, 0); */
+#endif /* CONFIG_KEXEC */
diff --git a/arch/ppc64/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index 9f200f0f2ad5..7065e40e2f42 100644
--- a/arch/ppc64/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -4,6 +4,8 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
+#include <linux/slab.h>
+
 #include <asm/errno.h>
 #include <asm/of_device.h>
 
@@ -184,6 +186,7 @@ void of_release_dev(struct device *dev)
         struct of_device *ofdev;
 
         ofdev = to_of_device(dev);
+        of_node_put(ofdev->node);
         kfree(ofdev);
 }
 
@@ -244,7 +247,7 @@ struct of_device* of_platform_device_create(struct device_node *np,
                 return NULL;
         memset(dev, 0, sizeof(*dev));
 
-        dev->node = np;
+        dev->node = of_node_get(np);
         dev->dma_mask = 0xffffffffUL;
         dev->dev.dma_mask = &dev->dma_mask;
         dev->dev.parent = parent;
@@ -261,7 +264,6 @@ struct of_device* of_platform_device_create(struct device_node *np,
         return dev;
 }
 
-
 EXPORT_SYMBOL(of_match_device);
 EXPORT_SYMBOL(of_platform_bus_type);
 EXPORT_SYMBOL(of_register_driver);
diff --git a/arch/ppc64/kernel/pmc.c b/arch/powerpc/kernel/pmc.c
index 63d9481c3ec2..2d333cc84082 100644
--- a/arch/ppc64/kernel/pmc.c
+++ b/arch/powerpc/kernel/pmc.c
@@ -1,7 +1,10 @@
 /*
- *  linux/arch/ppc64/kernel/pmc.c
+ *  arch/powerpc/kernel/pmc.c
  *
  *  Copyright (C) 2004 David Gibson, IBM Corporation.
+ *  Includes code formerly from arch/ppc/kernel/perfmon.c:
+ *    Author: Andy Fleming
+ *    Copyright (c) 2004 Freescale Semiconductor, Inc
  *
  *  This program is free software; you can redistribute it and/or
  *  modify it under the terms of the GNU General Public License
@@ -17,6 +20,20 @@
 #include <asm/processor.h>
 #include <asm/pmc.h>
 
+#if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
+static void dummy_perf(struct pt_regs *regs)
+{
+        unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
+
+        pmgc0 &= ~PMGC0_PMIE;
+        mtpmr(PMRN_PMGC0, pmgc0);
+}
+#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
+
+#ifndef MMCR0_PMAO
+#define MMCR0_PMAO      0
+#endif
+
 /* Ensure exceptions are disabled */
 static void dummy_perf(struct pt_regs *regs)
 {
@@ -25,6 +42,11 @@ static void dummy_perf(struct pt_regs *regs)
         mmcr0 &= ~(MMCR0_PMXE|MMCR0_PMAO);
         mtspr(SPRN_MMCR0, mmcr0);
 }
+#else
+static void dummy_perf(struct pt_regs *regs)
+{
+}
+#endif
 
 static DEFINE_SPINLOCK(pmc_owner_lock);
 static void *pmc_owner_caller; /* mostly for debugging */
@@ -66,11 +88,12 @@ void release_pmc_hardware(void)
 }
 EXPORT_SYMBOL_GPL(release_pmc_hardware);
 
+#ifdef CONFIG_PPC64
 void power4_enable_pmcs(void)
 {
         unsigned long hid0;
 
-        hid0 = mfspr(HID0);
+        hid0 = mfspr(SPRN_HID0);
         hid0 |= 1UL << (63 - 20);
 
         /* POWER4 requires the following sequence */
@@ -83,6 +106,7 @@ void power4_enable_pmcs(void)
                 "mfspr     %0, %1\n"
                 "mfspr     %0, %1\n"
                 "mfspr     %0, %1\n"
-                "isync" : "=&r" (hid0) : "i" (HID0), "0" (hid0):
+                "isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
                 "memory");
 }
+#endif /* CONFIG_PPC64 */
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
new file mode 100644
index 000000000000..8bc540337ba0
--- /dev/null
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -0,0 +1,273 @@
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/threads.h>
+#include <linux/smp.h>
+#include <linux/sched.h>
+#include <linux/elfcore.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/tty.h>
+#include <linux/vt_kern.h>
+#include <linux/nvram.h>
+#include <linux/console.h>
+#include <linux/irq.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/ide.h>
+#include <linux/bitops.h>
+
+#include <asm/page.h>
+#include <asm/semaphore.h>
+#include <asm/processor.h>
+#include <asm/uaccess.h>
+#include <asm/io.h>
+#include <asm/ide.h>
+#include <asm/atomic.h>
+#include <asm/checksum.h>
+#include <asm/pgtable.h>
+#include <asm/tlbflush.h>
+#include <linux/adb.h>
+#include <linux/cuda.h>
+#include <linux/pmu.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/pci-bridge.h>
+#include <asm/irq.h>
+#include <asm/pmac_feature.h>
+#include <asm/dma.h>
+#include <asm/machdep.h>
+#include <asm/hw_irq.h>
+#include <asm/nvram.h>
+#include <asm/mmu_context.h>
+#include <asm/backlight.h>
+#include <asm/time.h>
+#include <asm/cputable.h>
+#include <asm/btext.h>
+#include <asm/div64.h>
+
+#ifdef  CONFIG_8xx
+#include <asm/commproc.h>
+#endif
+
+#ifdef CONFIG_PPC32
+extern void transfer_to_handler(void);
+extern void do_IRQ(struct pt_regs *regs);
+extern void machine_check_exception(struct pt_regs *regs);
+extern void alignment_exception(struct pt_regs *regs);
+extern void program_check_exception(struct pt_regs *regs);
+extern void single_step_exception(struct pt_regs *regs);
+extern int do_signal(sigset_t *, struct pt_regs *);
+extern int pmac_newworld;
+extern int sys_sigreturn(struct pt_regs *regs);
+
+EXPORT_SYMBOL(clear_pages);
+EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
+EXPORT_SYMBOL(DMA_MODE_READ);
+EXPORT_SYMBOL(DMA_MODE_WRITE);
+EXPORT_SYMBOL(__div64_32);
+
+EXPORT_SYMBOL(do_signal);
+EXPORT_SYMBOL(transfer_to_handler);
+EXPORT_SYMBOL(do_IRQ);
+EXPORT_SYMBOL(machine_check_exception);
+EXPORT_SYMBOL(alignment_exception);
+EXPORT_SYMBOL(program_check_exception);
+EXPORT_SYMBOL(single_step_exception);
+EXPORT_SYMBOL(sys_sigreturn);
+#endif
+
+#if defined(CONFIG_PPC_PREP)
+EXPORT_SYMBOL(_prep_type);
+EXPORT_SYMBOL(ucSystemType);
+#endif
+
+#if !defined(__INLINE_BITOPS)
+EXPORT_SYMBOL(set_bit);
+EXPORT_SYMBOL(clear_bit);
+EXPORT_SYMBOL(change_bit);
+EXPORT_SYMBOL(test_and_set_bit);
+EXPORT_SYMBOL(test_and_clear_bit);
+EXPORT_SYMBOL(test_and_change_bit);
+#endif /* __INLINE_BITOPS */
+
+EXPORT_SYMBOL(strcpy);
+EXPORT_SYMBOL(strncpy);
+EXPORT_SYMBOL(strcat);
+EXPORT_SYMBOL(strncat);
+EXPORT_SYMBOL(strchr);
+EXPORT_SYMBOL(strrchr);
+EXPORT_SYMBOL(strpbrk);
+EXPORT_SYMBOL(strstr);
+EXPORT_SYMBOL(strlen);
+EXPORT_SYMBOL(strnlen);
+EXPORT_SYMBOL(strcmp);
+EXPORT_SYMBOL(strncmp);
+EXPORT_SYMBOL(strcasecmp);
+
+EXPORT_SYMBOL(csum_partial);
+EXPORT_SYMBOL(csum_partial_copy_generic);
+EXPORT_SYMBOL(ip_fast_csum);
+EXPORT_SYMBOL(csum_tcpudp_magic);
+
+EXPORT_SYMBOL(__copy_tofrom_user);
+EXPORT_SYMBOL(__clear_user);
+EXPORT_SYMBOL(__strncpy_from_user);
+EXPORT_SYMBOL(__strnlen_user);
+
+EXPORT_SYMBOL(_insb);
+EXPORT_SYMBOL(_outsb);
+EXPORT_SYMBOL(_insw);
+EXPORT_SYMBOL(_outsw);
+EXPORT_SYMBOL(_insl);
+EXPORT_SYMBOL(_outsl);
+EXPORT_SYMBOL(_insw_ns);
+EXPORT_SYMBOL(_outsw_ns);
+EXPORT_SYMBOL(_insl_ns);
+EXPORT_SYMBOL(_outsl_ns);
+EXPORT_SYMBOL(ioremap);
+#ifdef CONFIG_44x
+EXPORT_SYMBOL(ioremap64);
+#endif
+EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(iounmap);
+#ifdef CONFIG_PPC32
+EXPORT_SYMBOL(ioremap_bot);     /* aka VMALLOC_END */
+#endif
+
+#if defined(CONFIG_PPC32) && (defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE))
+EXPORT_SYMBOL(ppc_ide_md);
+#endif
+
+#if defined(CONFIG_PCI) && defined(CONFIG_PPC32)
+EXPORT_SYMBOL(isa_io_base);
+EXPORT_SYMBOL(isa_mem_base);
+EXPORT_SYMBOL(pci_dram_offset);
+EXPORT_SYMBOL(pci_alloc_consistent);
+EXPORT_SYMBOL(pci_free_consistent);
+EXPORT_SYMBOL(pci_bus_io_base);
+EXPORT_SYMBOL(pci_bus_io_base_phys);
+EXPORT_SYMBOL(pci_bus_mem_base_phys);
+EXPORT_SYMBOL(pci_bus_to_hose);
+EXPORT_SYMBOL(pci_resource_to_bus);
+EXPORT_SYMBOL(pci_phys_to_bus);
+EXPORT_SYMBOL(pci_bus_to_phys);
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_NOT_COHERENT_CACHE
+EXPORT_SYMBOL(flush_dcache_all);
+#endif
+
+EXPORT_SYMBOL(start_thread);
+EXPORT_SYMBOL(kernel_thread);
+
+EXPORT_SYMBOL(giveup_fpu);
+#ifdef CONFIG_ALTIVEC
+EXPORT_SYMBOL(giveup_altivec);
+#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+EXPORT_SYMBOL(giveup_spe);
+#endif /* CONFIG_SPE */
+
+#ifdef CONFIG_PPC64
+EXPORT_SYMBOL(__flush_icache_range);
+#else
+EXPORT_SYMBOL(flush_instruction_cache);
+EXPORT_SYMBOL(flush_icache_range);
+EXPORT_SYMBOL(flush_tlb_kernel_range);
+EXPORT_SYMBOL(flush_tlb_page);
+EXPORT_SYMBOL(_tlbie);
+#endif
+EXPORT_SYMBOL(flush_dcache_range);
+
+#ifdef CONFIG_SMP
+EXPORT_SYMBOL(smp_call_function);
+#ifdef CONFIG_PPC32
+EXPORT_SYMBOL(smp_hw_index);
+#endif
+#endif
+
+#ifdef CONFIG_ADB
+EXPORT_SYMBOL(adb_request);
+EXPORT_SYMBOL(adb_register);
+EXPORT_SYMBOL(adb_unregister);
+EXPORT_SYMBOL(adb_poll);
+EXPORT_SYMBOL(adb_try_handler_change);
+#endif /* CONFIG_ADB */
+#ifdef CONFIG_ADB_CUDA
+EXPORT_SYMBOL(cuda_request);
+EXPORT_SYMBOL(cuda_poll);
+#endif /* CONFIG_ADB_CUDA */
+#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_PPC32)
+EXPORT_SYMBOL(_machine);
+#endif
+#ifdef CONFIG_PPC_PMAC
+EXPORT_SYMBOL(sys_ctrler);
+#endif
+#ifdef CONFIG_VT
+EXPORT_SYMBOL(kd_mksound);
+#endif
+EXPORT_SYMBOL(to_tm);
+
+#ifdef CONFIG_PPC32
+long long __ashrdi3(long long, int);
+long long __ashldi3(long long, int);
+long long __lshrdi3(long long, int);
+EXPORT_SYMBOL(__ashrdi3);
+EXPORT_SYMBOL(__ashldi3);
+EXPORT_SYMBOL(__lshrdi3);
+#endif
+
+EXPORT_SYMBOL(memcpy);
+EXPORT_SYMBOL(memset);
+EXPORT_SYMBOL(memmove);
+EXPORT_SYMBOL(memscan);
+EXPORT_SYMBOL(memcmp);
+EXPORT_SYMBOL(memchr);
+
+#if defined(CONFIG_FB_VGA16_MODULE)
+EXPORT_SYMBOL(screen_info);
+#endif
+
+#ifdef CONFIG_PPC32
+EXPORT_SYMBOL(__delay);
+EXPORT_SYMBOL(timer_interrupt);
+EXPORT_SYMBOL(irq_desc);
+EXPORT_SYMBOL(tb_ticks_per_jiffy);
+EXPORT_SYMBOL(console_drivers);
+EXPORT_SYMBOL(cacheable_memcpy);
+#endif
+
+EXPORT_SYMBOL(__up);
+EXPORT_SYMBOL(__down);
+EXPORT_SYMBOL(__down_interruptible);
+
+#ifdef  CONFIG_8xx
+EXPORT_SYMBOL(cpm_install_handler);
+EXPORT_SYMBOL(cpm_free_handler);
+#endif /* CONFIG_8xx */
+#if defined(CONFIG_8xx) || defined(CONFIG_40x) || defined(CONFIG_85xx) ||\
+        defined(CONFIG_83xx)
+EXPORT_SYMBOL(__res);
+#endif
+
+#ifdef CONFIG_PPC32
+EXPORT_SYMBOL(next_mmu_context);
+EXPORT_SYMBOL(set_context);
+#endif
+
+#ifdef CONFIG_PPC_STD_MMU_32
+extern long mol_trampoline;
+EXPORT_SYMBOL(mol_trampoline); /* For MOL */
+EXPORT_SYMBOL(flush_hash_pages); /* For MOL */
+EXPORT_SYMBOL_GPL(__handle_mm_fault); /* For MOL */
+#ifdef CONFIG_SMP
+extern int mmu_hash_lock;
+EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
+#endif /* CONFIG_SMP */
+extern long *intercept_table;
+EXPORT_SYMBOL(intercept_table);
+#endif /* CONFIG_PPC_STD_MMU_32 */
+#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
+EXPORT_SYMBOL(__mtdcr);
+EXPORT_SYMBOL(__mfdcr);
+#endif
diff --git a/arch/ppc64/kernel/process.c b/arch/powerpc/kernel/process.c
index 887005358eb1..8f85dabe4df3 100644
--- a/arch/ppc64/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/ppc64/kernel/process.c
+ *  arch/ppc/kernel/process.c
  *
  *  Derived from "arch/i386/kernel/process.c"
  *    Copyright (C) 1995  Linus Torvalds
@@ -7,7 +7,7 @@
  *  Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
  *  Paul Mackerras (paulus@cs.anu.edu.au)
  *
- *  PowerPC version 
+ *  PowerPC version
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  *
  *  This program is free software; you can redistribute it and/or
@@ -17,7 +17,6 @@
  */
 
 #include <linux/config.h>
-#include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
@@ -26,15 +25,17 @@
 #include <linux/smp_lock.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
+#include <linux/ptrace.h>
 #include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/elf.h>
 #include <linux/init.h>
-#include <linux/init_task.h>
 #include <linux/prctl.h>
-#include <linux/ptrace.h>
+#include <linux/init_task.h>
+#include <linux/module.h>
 #include <linux/kallsyms.h>
-#include <linux/interrupt.h>
+#include <linux/mqueue.h>
+#include <linux/hardirq.h>
 #include <linux/utsname.h>
 #include <linux/kprobes.h>
 
@@ -44,21 +45,19 @@
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
-#include <asm/mmu_context.h>
 #include <asm/prom.h>
-#include <asm/ppcdebug.h>
-#include <asm/machdep.h>
-#include <asm/iSeries/HvCallHpt.h>
-#include <asm/cputable.h>
+#ifdef CONFIG_PPC64
 #include <asm/firmware.h>
-#include <asm/sections.h>
-#include <asm/tlbflush.h>
-#include <asm/time.h>
 #include <asm/plpar_wrappers.h>
+#include <asm/time.h>
+#endif
+
+extern unsigned long _get_SP(void);
 
 #ifndef CONFIG_SMP
 struct task_struct *last_task_used_math = NULL;
 struct task_struct *last_task_used_altivec = NULL;
+struct task_struct *last_task_used_spe = NULL;
 #endif
 
 /*
@@ -121,7 +120,6 @@ int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
 }
 
 #ifdef CONFIG_ALTIVEC
-
 void enable_kernel_altivec(void)
 {
         WARN_ON(preemptible());
@@ -130,7 +128,7 @@ void enable_kernel_altivec(void)
         if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
                 giveup_altivec(current);
         else
-                giveup_altivec(NULL);   /* just enables FP for kernel */
+                giveup_altivec(NULL);   /* just enable AltiVec for kernel - force */
 #else
         giveup_altivec(last_task_used_altivec);
 #endif /* CONFIG_SMP */
@@ -161,9 +159,48 @@ int dump_task_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs)
         memcpy(vrregs, &current->thread.vr[0], sizeof(*vrregs));
         return 1;
 }
-
 #endif /* CONFIG_ALTIVEC */
 
+#ifdef CONFIG_SPE
+
+void enable_kernel_spe(void)
+{
+        WARN_ON(preemptible());
+
+#ifdef CONFIG_SMP
+        if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
+                giveup_spe(current);
+        else
+                giveup_spe(NULL);       /* just enable SPE for kernel - force */
+#else
+        giveup_spe(last_task_used_spe);
+#endif /* __SMP __ */
+}
+EXPORT_SYMBOL(enable_kernel_spe);
+
+void flush_spe_to_thread(struct task_struct *tsk)
+{
+        if (tsk->thread.regs) {
+                preempt_disable();
+                if (tsk->thread.regs->msr & MSR_SPE) {
+#ifdef CONFIG_SMP
+                        BUG_ON(tsk != current);
+#endif
+                        giveup_spe(current);
+                }
+                preempt_enable();
+        }
+}
+
+int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
+{
+        flush_spe_to_thread(current);
+        /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
+        memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
+        return 1;
+}
+#endif /* CONFIG_SPE */
+
 static void set_dabr_spr(unsigned long val)
 {
         mtspr(SPRN_DABR, val);
@@ -173,24 +210,27 @@ int set_dabr(unsigned long dabr)
 {
         int ret = 0;
 
+#ifdef CONFIG_PPC64
         if (firmware_has_feature(FW_FEATURE_XDABR)) {
                 /* We want to catch accesses from kernel and userspace */
                 unsigned long flags = H_DABRX_KERNEL|H_DABRX_USER;
                 ret = plpar_set_xdabr(dabr, flags);
         } else if (firmware_has_feature(FW_FEATURE_DABR)) {
                 ret = plpar_set_dabr(dabr);
-        } else {
+        } else
+#endif
                 set_dabr_spr(dabr);
-        }
 
         return ret;
 }
 
+#ifdef CONFIG_PPC64
 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
 static DEFINE_PER_CPU(unsigned long, current_dabr);
+#endif
 
 struct task_struct *__switch_to(struct task_struct *prev,
-                                struct task_struct *new)
+        struct task_struct *new)
 {
         struct thread_struct *new_thread, *old_thread;
         unsigned long flags;
@@ -200,7 +240,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
         /* avoid complexity of lazy save/restore of fpu
          * by just saving it every time we switch out if
          * this task used the fpu during the last quantum.
-         * 
+         *
          * If it tries to use the fpu again, it'll trap and
          * reload its fp regs.  So we don't have to do a restore
          * every switch, just a save.
@@ -209,31 +249,65 @@ struct task_struct *__switch_to(struct task_struct *prev,
         if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
                 giveup_fpu(prev);
 #ifdef CONFIG_ALTIVEC
+        /*
+         * If the previous thread used altivec in the last quantum
+         * (thus changing altivec regs) then save them.
+         * We used to check the VRSAVE register but not all apps
+         * set it, so we don't rely on it now (and in fact we need
+         * to save & restore VSCR even if VRSAVE == 0).  -- paulus
+         *
+         * On SMP we always save/restore altivec regs just to avoid the
+         * complexity of changing processors.
+         *  -- Cort
+         */
         if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
                 giveup_altivec(prev);
 #endif /* CONFIG_ALTIVEC */
-#endif /* CONFIG_SMP */
+#ifdef CONFIG_SPE
+        /*
+         * If the previous thread used spe in the last quantum
+         * (thus changing spe regs) then save them.
+         *
+         * On SMP we always save/restore spe regs just to avoid the
+         * complexity of changing processors.
+         */
+        if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
+                giveup_spe(prev);
+#endif /* CONFIG_SPE */
 
-#if defined(CONFIG_ALTIVEC) && !defined(CONFIG_SMP)
+#else  /* CONFIG_SMP */
+#ifdef CONFIG_ALTIVEC
         /* Avoid the trap.  On smp this this never happens since
          * we don't set last_task_used_altivec -- Cort
          */
         if (new->thread.regs && last_task_used_altivec == new)
                 new->thread.regs->msr |= MSR_VEC;
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+        /* Avoid the trap.  On smp this this never happens since
+         * we don't set last_task_used_spe
+         */
+        if (new->thread.regs && last_task_used_spe == new)
+                new->thread.regs->msr |= MSR_SPE;
+#endif /* CONFIG_SPE */
 
+#endif /* CONFIG_SMP */
+
+#ifdef CONFIG_PPC64     /* for now */
         if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) {
                 set_dabr(new->thread.dabr);
                 __get_cpu_var(current_dabr) = new->thread.dabr;
         }
 
         flush_tlb_pending();
+#endif
 
         new_thread = &new->thread;
         old_thread = &current->thread;
 
-        /* Collect purr utilization data per process and per processor
-         * wise purr is nothing but processor time base
+#ifdef CONFIG_PPC64
+        /*
+         * Collect processor utilization data per process
          */
         if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
                 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
@@ -243,6 +317,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
                 old_thread->accum_tb += (current_tb - start_tb);
                 new_thread->start_tb = current_tb;
         }
+#endif
 
         local_irq_save(flags);
         last = _switch(old_thread, new_thread);
@@ -254,6 +329,13 @@ struct task_struct *__switch_to(struct task_struct *prev,
 
 static int instructions_to_print = 16;
 
+#ifdef CONFIG_PPC64
+#define BAD_PC(pc)      ((REGION_ID(pc) != KERNEL_REGION_ID) && \
+                         (REGION_ID(pc) != VMALLOC_REGION_ID))
+#else
+#define BAD_PC(pc)      ((pc) < KERNELBASE)
+#endif
+
 static void show_instructions(struct pt_regs *regs)
 {
         int i;
@@ -268,9 +350,7 @@ static void show_instructions(struct pt_regs *regs)
                 if (!(i % 8))
                         printk("\n");
 
-                if (((REGION_ID(pc) != KERNEL_REGION_ID) &&
-                     (REGION_ID(pc) != VMALLOC_REGION_ID)) ||
-                     __get_user(instr, (unsigned int *)pc)) {
+                if (BAD_PC(pc) || __get_user(instr, (unsigned int *)pc)) {
                         printk("XXXXXXXX ");
                 } else {
                         if (regs->nip == pc)
@@ -285,50 +365,82 @@ static void show_instructions(struct pt_regs *regs)
         printk("\n");
 }
 
+static struct regbit {
+        unsigned long bit;
+        const char *name;
+} msr_bits[] = {
+        {MSR_EE,        "EE"},
+        {MSR_PR,        "PR"},
+        {MSR_FP,        "FP"},
+        {MSR_ME,        "ME"},
+        {MSR_IR,        "IR"},
+        {MSR_DR,        "DR"},
+        {0,             NULL}
+};
+
+static void printbits(unsigned long val, struct regbit *bits)
+{
+        const char *sep = "";
+
+        printk("<");
+        for (; bits->bit; ++bits)
+                if (val & bits->bit) {
+                        printk("%s%s", sep, bits->name);
+                        sep = ",";
+                }
+        printk(">");
+}
+
+#ifdef CONFIG_PPC64
+#define REG             "%016lX"
+#define REGS_PER_LINE   4
+#define LAST_VOLATILE   13
+#else
+#define REG             "%08lX"
+#define REGS_PER_LINE   8
+#define LAST_VOLATILE   12
+#endif
+
 void show_regs(struct pt_regs * regs)
 {
-        int i;
-        unsigned long trap;
+        int i, trap;
 
-        printk("NIP: %016lX XER: %08X LR: %016lX CTR: %016lX\n",
-               regs->nip, (unsigned int)regs->xer, regs->link, regs->ctr);
+        printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
+               regs->nip, regs->link, regs->ctr);
         printk("REGS: %p TRAP: %04lx   %s  (%s)\n",
                regs, regs->trap, print_tainted(), system_utsname.release);
-        printk("MSR: %016lx EE: %01x PR: %01x FP: %01x ME: %01x "
-               "IR/DR: %01x%01x CR: %08X\n",
-               regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
-               regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
-               regs->msr&MSR_IR ? 1 : 0,
-               regs->msr&MSR_DR ? 1 : 0,
-               (unsigned int)regs->ccr);
+        printk("MSR: "REG" ", regs->msr);
+        printbits(regs->msr, msr_bits);
+        printk("  CR: %08lX  XER: %08lX\n", regs->ccr, regs->xer);
         trap = TRAP(regs);
-        printk("DAR: %016lx DSISR: %016lx\n", regs->dar, regs->dsisr);
-        printk("TASK: %p[%d] '%s' THREAD: %p",
+        if (trap == 0x300 || trap == 0x600)
+                printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
+        printk("TASK = %p[%d] '%s' THREAD: %p",
                current, current->pid, current->comm, current->thread_info);
 
 #ifdef CONFIG_SMP
         printk(" CPU: %d", smp_processor_id());
 #endif /* CONFIG_SMP */
 
-        for (i = 0; i < 32; i++) {
-                if ((i % 4) == 0) {
+        for (i = 0;  i < 32;  i++) {
+                if ((i % REGS_PER_LINE) == 0)
                         printk("\n" KERN_INFO "GPR%02d: ", i);
-                }
-
-                printk("%016lX ", regs->gpr[i]);
-                if (i == 13 && !FULL_REGS(regs))
+                printk(REG " ", regs->gpr[i]);
+                if (i == LAST_VOLATILE && !FULL_REGS(regs))
                         break;
         }
         printk("\n");
+#ifdef CONFIG_KALLSYMS
         /*
          * Lookup NIP late so we have the best change of getting the
          * above info out without failing
          */
-        printk("NIP [%016lx] ", regs->nip);
+        printk("NIP ["REG"] ", regs->nip);
         print_symbol("%s\n", regs->nip);
-        printk("LR [%016lx] ", regs->link);
+        printk("LR ["REG"] ", regs->link);
         print_symbol("%s\n", regs->link);
-        show_stack(current, (unsigned long *)regs->gpr[1]);
+#endif
+        show_stack(current, (unsigned long *) regs->gpr[1]);
         if (!user_mode(regs))
                 show_instructions(regs);
 }
@@ -344,16 +456,22 @@ void exit_thread(void)
         if (last_task_used_altivec == current)
                 last_task_used_altivec = NULL;
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+        if (last_task_used_spe == current)
+                last_task_used_spe = NULL;
+#endif
 #endif /* CONFIG_SMP */
 }
 
 void flush_thread(void)
 {
+#ifdef CONFIG_PPC64
         struct thread_info *t = current_thread_info();
 
-        kprobe_flush_task(current);
         if (t->flags & _TIF_ABI_PENDING)
                 t->flags ^= (_TIF_ABI_PENDING | _TIF_32BIT);
+#endif
+        kprobe_flush_task(current);
 
 #ifndef CONFIG_SMP
         if (last_task_used_math == current)
@@ -362,12 +480,18 @@ void flush_thread(void)
         if (last_task_used_altivec == current)
                 last_task_used_altivec = NULL;
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+        if (last_task_used_spe == current)
+                last_task_used_spe = NULL;
+#endif
 #endif /* CONFIG_SMP */
 
+#ifdef CONFIG_PPC64     /* for now */
         if (current->thread.dabr) {
                 current->thread.dabr = 0;
                 set_dabr(0);
         }
+#endif
 }
 
 void
@@ -375,7 +499,6 @@ release_thread(struct task_struct *t)
 {
 }
 
-
 /*
  * This gets called before we allocate a new thread and copy
  * the current task into it.
@@ -384,36 +507,44 @@ void prepare_to_copy(struct task_struct *tsk)
 {
         flush_fp_to_thread(current);
         flush_altivec_to_thread(current);
+        flush_spe_to_thread(current);
 }
 
 /*
  * Copy a thread..
  */
-int
-copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
-            unsigned long unused, struct task_struct *p, struct pt_regs *regs)
+int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
+                unsigned long unused, struct task_struct *p,
+                struct pt_regs *regs)
 {
         struct pt_regs *childregs, *kregs;
         extern void ret_from_fork(void);
         unsigned long sp = (unsigned long)p->thread_info + THREAD_SIZE;
 
+        CHECK_FULL_REGS(regs);
         /* Copy registers */
         sp -= sizeof(struct pt_regs);
         childregs = (struct pt_regs *) sp;
         *childregs = *regs;
         if ((childregs->msr & MSR_PR) == 0) {
-                /* for kernel thread, set stackptr in new task */
+                /* for kernel thread, set `current' and stackptr in new task */
                 childregs->gpr[1] = sp + sizeof(struct pt_regs);
-                p->thread.regs = NULL;  /* no user register state */
+#ifdef CONFIG_PPC32
+                childregs->gpr[2] = (unsigned long) p;
+#else
                 clear_ti_thread_flag(p->thread_info, TIF_32BIT);
+#endif
+                p->thread.regs = NULL;  /* no user register state */
         } else {
                 childregs->gpr[1] = usp;
                 p->thread.regs = childregs;
                 if (clone_flags & CLONE_SETTLS) {
-                        if (test_thread_flag(TIF_32BIT))
-                                childregs->gpr[2] = childregs->gpr[6];
-                        else
+#ifdef CONFIG_PPC64
+                        if (!test_thread_flag(TIF_32BIT))
                                 childregs->gpr[13] = childregs->gpr[6];
+                        else
+#endif
+                                childregs->gpr[2] = childregs->gpr[6];
                 }
         }
         childregs->gpr[3] = 0;  /* Result from fork() */
@@ -431,6 +562,8 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
         kregs = (struct pt_regs *) sp;
         sp -= STACK_FRAME_OVERHEAD;
         p->thread.ksp = sp;
+
+#ifdef CONFIG_PPC64
         if (cpu_has_feature(CPU_FTR_SLB)) {
                 unsigned long sp_vsid = get_kernel_vsid(sp);
 
@@ -449,6 +582,10 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
          * function.
          */
         kregs->nip = *((unsigned long *)ret_from_fork);
+#else
+        kregs->nip = (unsigned long)ret_from_fork;
+        p->thread.last_syscall = -1;
+#endif
 
         return 0;
 }
@@ -456,30 +593,17 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
 /*
  * Set up a thread for executing a new program
  */
-void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp)
+void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
 {
-        unsigned long entry, toc, load_addr = regs->gpr[2];
+#ifdef CONFIG_PPC64
+        unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
+#endif
 
-        /* fdptr is a relocated pointer to the function descriptor for
-         * the elf _start routine.  The first entry in the function
-         * descriptor is the entry address of _start and the second
-         * entry is the TOC value we need to use.
-         */
         set_fs(USER_DS);
-        __get_user(entry, (unsigned long __user *)fdptr);
-        __get_user(toc, (unsigned long __user *)fdptr+1);
-
-        /* Check whether the e_entry function descriptor entries
-         * need to be relocated before we can use them.
-         */
-        if (load_addr != 0) {
-                entry += load_addr;
-                toc   += load_addr;
-        }
 
         /*
          * If we exec out of a kernel thread then thread.regs will not be
-         * set. Do it now.
+         * set.  Do it now.
          */
         if (!current->thread.regs) {
                 unsigned long childregs = (unsigned long)current->thread_info +
@@ -488,36 +612,101 @@ void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp)
                 current->thread.regs = (struct pt_regs *)childregs;
         }
 
-        regs->nip = entry;
+        memset(regs->gpr, 0, sizeof(regs->gpr));
+        regs->ctr = 0;
+        regs->link = 0;
+        regs->xer = 0;
+        regs->ccr = 0;
         regs->gpr[1] = sp;
-        regs->gpr[2] = toc;
-        regs->msr = MSR_USER64;
+
+#ifdef CONFIG_PPC32
+        regs->mq = 0;
+        regs->nip = start;
+        regs->msr = MSR_USER;
+#else
+        if (!test_thread_flag(TIF_32BIT)) {
+                unsigned long entry, toc;
+
+                /* start is a relocated pointer to the function descriptor for
+                 * the elf _start routine.  The first entry in the function
+                 * descriptor is the entry address of _start and the second
+                 * entry is the TOC value we need to use.
+                 */
+                __get_user(entry, (unsigned long __user *)start);
+                __get_user(toc, (unsigned long __user *)start+1);
+
+                /* Check whether the e_entry function descriptor entries
+                 * need to be relocated before we can use them.
+                 */
+                if (load_addr != 0) {
+                        entry += load_addr;
+                        toc   += load_addr;
+                }
+                regs->nip = entry;
+                regs->gpr[2] = toc;
+                regs->msr = MSR_USER64;
+        } else {
+                regs->nip = start;
+                regs->gpr[2] = 0;
+                regs->msr = MSR_USER32;
+        }
+#endif
+
 #ifndef CONFIG_SMP
         if (last_task_used_math == current)
-                last_task_used_math = 0;
-#endif /* CONFIG_SMP */
-        memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
-        current->thread.fpscr = 0;
+                last_task_used_math = NULL;
 #ifdef CONFIG_ALTIVEC
-#ifndef CONFIG_SMP
         if (last_task_used_altivec == current)
-                last_task_used_altivec = 0;
+                last_task_used_altivec = NULL;
+#endif
+#ifdef CONFIG_SPE
+        if (last_task_used_spe == current)
+                last_task_used_spe = NULL;
+#endif
 #endif /* CONFIG_SMP */
+        memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
+        current->thread.fpscr.val = 0;
+#ifdef CONFIG_ALTIVEC
         memset(current->thread.vr, 0, sizeof(current->thread.vr));
-        current->thread.vscr.u[0] = 0;
-        current->thread.vscr.u[1] = 0;
-        current->thread.vscr.u[2] = 0;
+        memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
         current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
         current->thread.vrsave = 0;
         current->thread.used_vr = 0;
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_SPE
+        memset(current->thread.evr, 0, sizeof(current->thread.evr));
+        current->thread.acc = 0;
+        current->thread.spefscr = 0;
+        current->thread.used_spe = 0;
+#endif /* CONFIG_SPE */
 }
-EXPORT_SYMBOL(start_thread);
+
+#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
+                | PR_FP_EXC_RES | PR_FP_EXC_INV)
 
 int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
 {
         struct pt_regs *regs = tsk->thread.regs;
 
+        /* This is a bit hairy.  If we are an SPE enabled  processor
+         * (have embedded fp) we store the IEEE exception enable flags in
+         * fpexc_mode.  fpexc_mode is also used for setting FP exception
+         * mode (asyn, precise, disabled) for 'Classic' FP. */
+        if (val & PR_FP_EXC_SW_ENABLE) {
+#ifdef CONFIG_SPE
+                tsk->thread.fpexc_mode = val &
+                        (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
+                return 0;
+#else
+                return -EINVAL;
+#endif
+        }
+
+        /* on a CONFIG_SPE this does not hurt us.  The bits that
+         * __pack_fe01 use do not overlap with bits used for
+         * PR_FP_EXC_SW_ENABLE.  Additionally, the MSR[FE0,FE1] bits
+         * on CONFIG_SPE implementations are reserved so writing to
+         * them does not change anything */
         if (val > PR_FP_EXC_PRECISE)
                 return -EINVAL;
         tsk->thread.fpexc_mode = __pack_fe01(val);
@@ -531,38 +720,41 @@ int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
 {
         unsigned int val;
 
-        val = __unpack_fe01(tsk->thread.fpexc_mode);
+        if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
+#ifdef CONFIG_SPE
+                val = tsk->thread.fpexc_mode;
+#else
+                return -EINVAL;
+#endif
+        else
+                val = __unpack_fe01(tsk->thread.fpexc_mode);
         return put_user(val, (unsigned int __user *) adr);
 }
 
-int sys_clone(unsigned long clone_flags, unsigned long p2, unsigned long p3,
-              unsigned long p4, unsigned long p5, unsigned long p6,
+#define TRUNC_PTR(x)    ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
+
+int sys_clone(unsigned long clone_flags, unsigned long usp,
+              int __user *parent_tidp, void __user *child_threadptr,
+              int __user *child_tidp, int p6,
               struct pt_regs *regs)
 {
-        unsigned long parent_tidptr = 0;
-        unsigned long child_tidptr = 0;
-
-        if (p2 == 0)
-                p2 = regs->gpr[1];      /* stack pointer for child */
-
-        if (clone_flags & (CLONE_PARENT_SETTID | CLONE_CHILD_SETTID |
-                           CLONE_CHILD_CLEARTID)) {
-                parent_tidptr = p3;
-                child_tidptr = p5;
-                if (test_thread_flag(TIF_32BIT)) {
-                        parent_tidptr &= 0xffffffff;
-                        child_tidptr &= 0xffffffff;
-                }
+        CHECK_FULL_REGS(regs);
+        if (usp == 0)
+                usp = regs->gpr[1];     /* stack pointer for child */
+#ifdef CONFIG_PPC64
+        if (test_thread_flag(TIF_32BIT)) {
+                parent_tidp = TRUNC_PTR(parent_tidp);
+                child_tidp = TRUNC_PTR(child_tidp);
         }
-
-        return do_fork(clone_flags, p2, regs, 0,
-                    (int __user *)parent_tidptr, (int __user *)child_tidptr);
+#endif
+        return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
 }
 
 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
              unsigned long p4, unsigned long p5, unsigned long p6,
              struct pt_regs *regs)
 {
+        CHECK_FULL_REGS(regs);
         return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
 }
 
@@ -570,8 +762,9 @@ int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
               unsigned long p4, unsigned long p5, unsigned long p6,
               struct pt_regs *regs)
 {
-        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1], regs, 0,
-                    NULL, NULL);
+        CHECK_FULL_REGS(regs);
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
+                        regs, 0, NULL, NULL);
 }
 
 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
@@ -579,30 +772,27 @@ int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
                struct pt_regs *regs)
 {
         int error;
-        char * filename;
-        
+        char *filename;
+
         filename = getname((char __user *) a0);
         error = PTR_ERR(filename);
         if (IS_ERR(filename))
                 goto out;
         flush_fp_to_thread(current);
         flush_altivec_to_thread(current);
+        flush_spe_to_thread(current);
         error = do_execve(filename, (char __user * __user *) a1,
-                                    (char __user * __user *) a2, regs);
-  
+                          (char __user * __user *) a2, regs);
         if (error == 0) {
                 task_lock(current);
                 current->ptrace &= ~PT_DTRACE;
                 task_unlock(current);
         }
         putname(filename);
-
 out:
         return error;
 }
 
-static int kstack_depth_to_print = 64;
-
 static int validate_sp(unsigned long sp, struct task_struct *p,
                        unsigned long nbytes)
 {
@@ -627,6 +817,20 @@ static int validate_sp(unsigned long sp, struct task_struct *p,
         return 0;
 }
 
+#ifdef CONFIG_PPC64
+#define MIN_STACK_FRAME 112     /* same as STACK_FRAME_OVERHEAD, in fact */
+#define FRAME_LR_SAVE   2
+#define INT_FRAME_SIZE  (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD + 288)
+#define REGS_MARKER     0x7265677368657265ul
+#define FRAME_MARKER    12
+#else
+#define MIN_STACK_FRAME 16
+#define FRAME_LR_SAVE   1
+#define INT_FRAME_SIZE  (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
+#define REGS_MARKER     0x72656773ul
+#define FRAME_MARKER    2
+#endif
+
 unsigned long get_wchan(struct task_struct *p)
 {
         unsigned long ip, sp;
@@ -636,15 +840,15 @@ unsigned long get_wchan(struct task_struct *p)
                 return 0;
 
         sp = p->thread.ksp;
-        if (!validate_sp(sp, p, 112))
+        if (!validate_sp(sp, p, MIN_STACK_FRAME))
                 return 0;
 
         do {
                 sp = *(unsigned long *)sp;
-                if (!validate_sp(sp, p, 112))
+                if (!validate_sp(sp, p, MIN_STACK_FRAME))
                         return 0;
                 if (count > 0) {
-                        ip = *(unsigned long *)(sp + 16);
+                        ip = ((unsigned long *)sp)[FRAME_LR_SAVE];
                         if (!in_sched_functions(ip))
                                 return ip;
                 }
@@ -653,33 +857,35 @@ unsigned long get_wchan(struct task_struct *p)
 }
 EXPORT_SYMBOL(get_wchan);
 
-void show_stack(struct task_struct *p, unsigned long *_sp)
+static int kstack_depth_to_print = 64;
+
+void show_stack(struct task_struct *tsk, unsigned long *stack)
 {
-        unsigned long ip, newsp, lr;
+        unsigned long sp, ip, lr, newsp;
         int count = 0;
-        unsigned long sp = (unsigned long)_sp;
         int firstframe = 1;
 
+        sp = (unsigned long) stack;
+        if (tsk == NULL)
+                tsk = current;
         if (sp == 0) {
-                if (p) {
-                        sp = p->thread.ksp;
-                } else {
-                        sp = __get_SP();
-                        p = current;
-                }
+                if (tsk == current)
+                        asm("mr %0,1" : "=r" (sp));
+                else
+                        sp = tsk->thread.ksp;
         }
 
         lr = 0;
         printk("Call Trace:\n");
         do {
-                if (!validate_sp(sp, p, 112))
+                if (!validate_sp(sp, tsk, MIN_STACK_FRAME))
                         return;
 
-                _sp = (unsigned long *) sp;
-                newsp = _sp[0];
-                ip = _sp[2];
+                stack = (unsigned long *) sp;
+                newsp = stack[0];
+                ip = stack[FRAME_LR_SAVE];
                 if (!firstframe || ip != lr) {
-                        printk("[%016lx] [%016lx] ", sp, ip);
+                        printk("["REG"] ["REG"] ", sp, ip);
                         print_symbol("%s", ip);
                         if (firstframe)
                                 printk(" (unreliable)");
@@ -691,8 +897,8 @@ void show_stack(struct task_struct *p, unsigned long *_sp)
                  * See if this is an exception frame.
                  * We look for the "regshere" marker in the current frame.
                  */
-                if (validate_sp(sp, p, sizeof(struct pt_regs) + 400)
-                    && _sp[12] == 0x7265677368657265ul) {
+                if (validate_sp(sp, tsk, INT_FRAME_SIZE)
+                    && stack[FRAME_MARKER] == REGS_MARKER) {
                         struct pt_regs *regs = (struct pt_regs *)
                                 (sp + STACK_FRAME_OVERHEAD);
                         printk("--- Exception: %lx", regs->trap);
@@ -708,6 +914,6 @@ void show_stack(struct task_struct *p, unsigned long *_sp)
 
 void dump_stack(void)
 {
-        show_stack(current, (unsigned long *)__get_SP());
+        show_stack(current, NULL);
 }
 EXPORT_SYMBOL(dump_stack);
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
new file mode 100644
index 000000000000..2eccd0e159e3
--- /dev/null
+++ b/arch/powerpc/kernel/prom.c
@@ -0,0 +1,2170 @@
+/*
+ * Procedures for creating, accessing and interpreting the device tree.
+ *
+ * Paul Mackerras       August 1996.
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ * 
+ *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
+ *    {engebret|bergner}@us.ibm.com 
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include <stdarg.h>
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/threads.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/stringify.h>
+#include <linux/delay.h>
+#include <linux/initrd.h>
+#include <linux/bitops.h>
+#include <linux/module.h>
+
+#include <asm/prom.h>
+#include <asm/rtas.h>
+#include <asm/lmb.h>
+#include <asm/page.h>
+#include <asm/processor.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/system.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/pci.h>
+#include <asm/iommu.h>
+#include <asm/btext.h>
+#include <asm/sections.h>
+#include <asm/machdep.h>
+#include <asm/pSeries_reconfig.h>
+#include <asm/pci-bridge.h>
+#ifdef CONFIG_PPC64
+#include <asm/systemcfg.h>
+#endif
+
+#ifdef DEBUG
+#define DBG(fmt...) printk(KERN_ERR fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+struct pci_reg_property {
+        struct pci_address addr;
+        u32 size_hi;
+        u32 size_lo;
+};
+
+struct isa_reg_property {
+        u32 space;
+        u32 address;
+        u32 size;
+};
+
+
+typedef int interpret_func(struct device_node *, unsigned long *,
+                           int, int, int);
+
+extern struct rtas_t rtas;
+extern struct lmb lmb;
+extern unsigned long klimit;
+
+static int __initdata dt_root_addr_cells;
+static int __initdata dt_root_size_cells;
+
+#ifdef CONFIG_PPC64
+static int __initdata iommu_is_off;
+int __initdata iommu_force_on;
+unsigned long tce_alloc_start, tce_alloc_end;
+#endif
+
+typedef u32 cell_t;
+
+#if 0
+static struct boot_param_header *initial_boot_params __initdata;
+#else
+struct boot_param_header *initial_boot_params;
+#endif
+
+static struct device_node *allnodes = NULL;
+
+/* use when traversing tree through the allnext, child, sibling,
+ * or parent members of struct device_node.
+ */
+static DEFINE_RWLOCK(devtree_lock);
+
+/* export that to outside world */
+struct device_node *of_chosen;
+
+struct device_node *dflt_interrupt_controller;
+int num_interrupt_controllers;
+
+/*
+ * Wrapper for allocating memory for various data that needs to be
+ * attached to device nodes as they are processed at boot or when
+ * added to the device tree later (e.g. DLPAR).  At boot there is
+ * already a region reserved so we just increment *mem_start by size;
+ * otherwise we call kmalloc.
+ */
+static void * prom_alloc(unsigned long size, unsigned long *mem_start)
+{
+        unsigned long tmp;
+
+        if (!mem_start)
+                return kmalloc(size, GFP_KERNEL);
+
+        tmp = *mem_start;
+        *mem_start += size;
+        return (void *)tmp;
+}
+
+/*
+ * Find the device_node with a given phandle.
+ */
+static struct device_node * find_phandle(phandle ph)
+{
+        struct device_node *np;
+
+        for (np = allnodes; np != 0; np = np->allnext)
+                if (np->linux_phandle == ph)
+                        return np;
+        return NULL;
+}
+
+/*
+ * Find the interrupt parent of a node.
+ */
+static struct device_node * __devinit intr_parent(struct device_node *p)
+{
+        phandle *parp;
+
+        parp = (phandle *) get_property(p, "interrupt-parent", NULL);
+        if (parp == NULL)
+                return p->parent;
+        p = find_phandle(*parp);
+        if (p != NULL)
+                return p;
+        /*
+         * On a powermac booted with BootX, we don't get to know the
+         * phandles for any nodes, so find_phandle will return NULL.
+         * Fortunately these machines only have one interrupt controller
+         * so there isn't in fact any ambiguity.  -- paulus
+         */
+        if (num_interrupt_controllers == 1)
+                p = dflt_interrupt_controller;
+        return p;
+}
+
+/*
+ * Find out the size of each entry of the interrupts property
+ * for a node.
+ */
+int __devinit prom_n_intr_cells(struct device_node *np)
+{
+        struct device_node *p;
+        unsigned int *icp;
+
+        for (p = np; (p = intr_parent(p)) != NULL; ) {
+                icp = (unsigned int *)
+                        get_property(p, "#interrupt-cells", NULL);
+                if (icp != NULL)
+                        return *icp;
+                if (get_property(p, "interrupt-controller", NULL) != NULL
+                    || get_property(p, "interrupt-map", NULL) != NULL) {
+                        printk("oops, node %s doesn't have #interrupt-cells\n",
+                               p->full_name);
+                        return 1;
+                }
+        }
+#ifdef DEBUG_IRQ
+        printk("prom_n_intr_cells failed for %s\n", np->full_name);
+#endif
+        return 1;
+}
+
+/*
+ * Map an interrupt from a device up to the platform interrupt
+ * descriptor.
+ */
+static int __devinit map_interrupt(unsigned int **irq, struct device_node **ictrler,
+                                   struct device_node *np, unsigned int *ints,
+                                   int nintrc)
+{
+        struct device_node *p, *ipar;
+        unsigned int *imap, *imask, *ip;
+        int i, imaplen, match;
+        int newintrc = 0, newaddrc = 0;
+        unsigned int *reg;
+        int naddrc;
+
+        reg = (unsigned int *) get_property(np, "reg", NULL);
+        naddrc = prom_n_addr_cells(np);
+        p = intr_parent(np);
+        while (p != NULL) {
+                if (get_property(p, "interrupt-controller", NULL) != NULL)
+                        /* this node is an interrupt controller, stop here */
+                        break;
+                imap = (unsigned int *)
+                        get_property(p, "interrupt-map", &imaplen);
+                if (imap == NULL) {
+                        p = intr_parent(p);
+                        continue;
+                }
+                imask = (unsigned int *)
+                        get_property(p, "interrupt-map-mask", NULL);
+                if (imask == NULL) {
+                        printk("oops, %s has interrupt-map but no mask\n",
+                               p->full_name);
+                        return 0;
+                }
+                imaplen /= sizeof(unsigned int);
+                match = 0;
+                ipar = NULL;
+                while (imaplen > 0 && !match) {
+                        /* check the child-interrupt field */
+                        match = 1;
+                        for (i = 0; i < naddrc && match; ++i)
+                                match = ((reg[i] ^ imap[i]) & imask[i]) == 0;
+                        for (; i < naddrc + nintrc && match; ++i)
+                                match = ((ints[i-naddrc] ^ imap[i]) & imask[i]) == 0;
+                        imap += naddrc + nintrc;
+                        imaplen -= naddrc + nintrc;
+                        /* grab the interrupt parent */
+                        ipar = find_phandle((phandle) *imap++);
+                        --imaplen;
+                        if (ipar == NULL && num_interrupt_controllers == 1)
+                                /* cope with BootX not giving us phandles */
+                                ipar = dflt_interrupt_controller;
+                        if (ipar == NULL) {
+                                printk("oops, no int parent %x in map of %s\n",
+                                       imap[-1], p->full_name);
+                                return 0;
+                        }
+                        /* find the parent's # addr and intr cells */
+                        ip = (unsigned int *)
+                                get_property(ipar, "#interrupt-cells", NULL);
+                        if (ip == NULL) {
+                                printk("oops, no #interrupt-cells on %s\n",
+                                       ipar->full_name);
+                                return 0;
+                        }
+                        newintrc = *ip;
+                        ip = (unsigned int *)
+                                get_property(ipar, "#address-cells", NULL);
+                        newaddrc = (ip == NULL)? 0: *ip;
+                        imap += newaddrc + newintrc;
+                        imaplen -= newaddrc + newintrc;
+                }
+                if (imaplen < 0) {
+                        printk("oops, error decoding int-map on %s, len=%d\n",
+                               p->full_name, imaplen);
+                        return 0;
+                }
+                if (!match) {
+#ifdef DEBUG_IRQ
+                        printk("oops, no match in %s int-map for %s\n",
+                               p->full_name, np->full_name);
+#endif
+                        return 0;
+                }
+                p = ipar;
+                naddrc = newaddrc;
+                nintrc = newintrc;
+                ints = imap - nintrc;
+                reg = ints - naddrc;
+        }
+        if (p == NULL) {
+#ifdef DEBUG_IRQ
+                printk("hmmm, int tree for %s doesn't have ctrler\n",
+                       np->full_name);
+#endif
+                return 0;
+        }
+        *irq = ints;
+        *ictrler = p;
+        return nintrc;
+}
+
+static unsigned char map_isa_senses[4] = {
+        IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE,
+        IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE,
+        IRQ_SENSE_EDGE  | IRQ_POLARITY_NEGATIVE,
+        IRQ_SENSE_EDGE  | IRQ_POLARITY_POSITIVE
+};
+
+static unsigned char map_mpic_senses[4] = {
+        IRQ_SENSE_EDGE  | IRQ_POLARITY_POSITIVE,
+        IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE,
+        /* 2 seems to be used for the 8259 cascade... */
+        IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE,
+        IRQ_SENSE_EDGE  | IRQ_POLARITY_NEGATIVE,
+};
+
+static int __devinit finish_node_interrupts(struct device_node *np,
+                                            unsigned long *mem_start,
+                                            int measure_only)
+{
+        unsigned int *ints;
+        int intlen, intrcells, intrcount;
+        int i, j, n, sense;
+        unsigned int *irq, virq;
+        struct device_node *ic;
+
+        if (num_interrupt_controllers == 0) {
+                /*
+                 * Old machines just have a list of interrupt numbers
+                 * and no interrupt-controller nodes.
+                 */
+                ints = (unsigned int *) get_property(np, "AAPL,interrupts",
+                                                     &intlen);
+                /* XXX old interpret_pci_props looked in parent too */
+                /* XXX old interpret_macio_props looked for interrupts
+                   before AAPL,interrupts */
+                if (ints == NULL)
+                        ints = (unsigned int *) get_property(np, "interrupts",
+                                                             &intlen);
+                if (ints == NULL)
+                        return 0;
+
+                np->n_intrs = intlen / sizeof(unsigned int);
+                np->intrs = prom_alloc(np->n_intrs * sizeof(np->intrs[0]),
+                                       mem_start);
+                if (!np->intrs)
+                        return -ENOMEM;
+                if (measure_only)
+                        return 0;
+
+                for (i = 0; i < np->n_intrs; ++i) {
+                        np->intrs[i].line = *ints++;
+                        np->intrs[i].sense = IRQ_SENSE_LEVEL
+                                | IRQ_POLARITY_NEGATIVE;
+                }
+                return 0;
+        }
+
+        ints = (unsigned int *) get_property(np, "interrupts", &intlen);
+        if (ints == NULL)
+                return 0;
+        intrcells = prom_n_intr_cells(np);
+        intlen /= intrcells * sizeof(unsigned int);
+
+        np->intrs = prom_alloc(intlen * sizeof(*(np->intrs)), mem_start);
+        if (!np->intrs)
+                return -ENOMEM;
+
+        if (measure_only)
+                return 0;
+
+        intrcount = 0;
+        for (i = 0; i < intlen; ++i, ints += intrcells) {
+                n = map_interrupt(&irq, &ic, np, ints, intrcells);
+                if (n <= 0)
+                        continue;
+
+                /* don't map IRQ numbers under a cascaded 8259 controller */
+                if (ic && device_is_compatible(ic, "chrp,iic")) {
+                        np->intrs[intrcount].line = irq[0];
+                        sense = (n > 1)? (irq[1] & 3): 3;
+                        np->intrs[intrcount].sense = map_isa_senses[sense];
+                } else {
+                        virq = virt_irq_create_mapping(irq[0]);
+#ifdef CONFIG_PPC64
+                        if (virq == NO_IRQ) {
+                                printk(KERN_CRIT "Could not allocate interrupt"
+                                       " number for %s\n", np->full_name);
+                                continue;
+                        }
+#endif
+                        np->intrs[intrcount].line = irq_offset_up(virq);
+                        sense = (n > 1)? (irq[1] & 3): 1;
+                        np->intrs[intrcount].sense = map_mpic_senses[sense];
+                }
+
+#ifdef CONFIG_PPC64
+                /* We offset irq numbers for the u3 MPIC by 128 in PowerMac */
+                if (systemcfg->platform == PLATFORM_POWERMAC && ic && ic->parent) {
+                        char *name = get_property(ic->parent, "name", NULL);
+                        if (name && !strcmp(name, "u3"))
+                                np->intrs[intrcount].line += 128;
+                        else if (!(name && !strcmp(name, "mac-io")))
+                                /* ignore other cascaded controllers, such as
+                                   the k2-sata-root */
+                                break;
+                }
+#endif
+                if (n > 2) {
+                        printk("hmmm, got %d intr cells for %s:", n,
+                               np->full_name);
+                        for (j = 0; j < n; ++j)
+                                printk(" %d", irq[j]);
+                        printk("\n");
+                }
+                ++intrcount;
+        }
+        np->n_intrs = intrcount;
+
+        return 0;
+}
+
+static int __devinit interpret_pci_props(struct device_node *np,
+                                         unsigned long *mem_start,
+                                         int naddrc, int nsizec,
+                                         int measure_only)
+{
+        struct address_range *adr;
+        struct pci_reg_property *pci_addrs;
+        int i, l, n_addrs;
+
+        pci_addrs = (struct pci_reg_property *)
+                get_property(np, "assigned-addresses", &l);
+        if (!pci_addrs)
+                return 0;
+
+        n_addrs = l / sizeof(*pci_addrs);
+
+        adr = prom_alloc(n_addrs * sizeof(*adr), mem_start);
+        if (!adr)
+                return -ENOMEM;
+
+        if (measure_only)
+                return 0;
+
+        np->addrs = adr;
+        np->n_addrs = n_addrs;
+
+        for (i = 0; i < n_addrs; i++) {
+                adr[i].space = pci_addrs[i].addr.a_hi;
+                adr[i].address = pci_addrs[i].addr.a_lo |
+                        ((u64)pci_addrs[i].addr.a_mid << 32);
+                adr[i].size = pci_addrs[i].size_lo;
+        }
+
+        return 0;
+}
+
+static int __init interpret_dbdma_props(struct device_node *np,
+                                        unsigned long *mem_start,
+                                        int naddrc, int nsizec,
+                                        int measure_only)
+{
+        struct reg_property32 *rp;
+        struct address_range *adr;
+        unsigned long base_address;
+        int i, l;
+        struct device_node *db;
+
+        base_address = 0;
+        if (!measure_only) {
+                for (db = np->parent; db != NULL; db = db->parent) {
+                        if (!strcmp(db->type, "dbdma") && db->n_addrs != 0) {
+                                base_address = db->addrs[0].address;
+                                break;
+                        }
+                }
+        }
+
+        rp = (struct reg_property32 *) get_property(np, "reg", &l);
+        if (rp != 0 && l >= sizeof(struct reg_property32)) {
+                i = 0;
+                adr = (struct address_range *) (*mem_start);
+                while ((l -= sizeof(struct reg_property32)) >= 0) {
+                        if (!measure_only) {
+                                adr[i].space = 2;
+                                adr[i].address = rp[i].address + base_address;
+                                adr[i].size = rp[i].size;
+                        }
+                        ++i;
+                }
+                np->addrs = adr;
+                np->n_addrs = i;
+                (*mem_start) += i * sizeof(struct address_range);
+        }
+
+        return 0;
+}
+
+static int __init interpret_macio_props(struct device_node *np,
+                                        unsigned long *mem_start,
+                                        int naddrc, int nsizec,
+                                        int measure_only)
+{
+        struct reg_property32 *rp;
+        struct address_range *adr;
+        unsigned long base_address;
+        int i, l;
+        struct device_node *db;
+
+        base_address = 0;
+        if (!measure_only) {
+                for (db = np->parent; db != NULL; db = db->parent) {
+                        if (!strcmp(db->type, "mac-io") && db->n_addrs != 0) {
+                                base_address = db->addrs[0].address;
+                                break;
+                        }
+                }
+        }
+
+        rp = (struct reg_property32 *) get_property(np, "reg", &l);
+        if (rp != 0 && l >= sizeof(struct reg_property32)) {
+                i = 0;
+                adr = (struct address_range *) (*mem_start);
+                while ((l -= sizeof(struct reg_property32)) >= 0) {
+                        if (!measure_only) {
+                                adr[i].space = 2;
+                                adr[i].address = rp[i].address + base_address;
+                                adr[i].size = rp[i].size;
+                        }
+                        ++i;
+                }
+                np->addrs = adr;
+                np->n_addrs = i;
+                (*mem_start) += i * sizeof(struct address_range);
+        }
+
+        return 0;
+}
+
+static int __init interpret_isa_props(struct device_node *np,
+                                      unsigned long *mem_start,
+                                      int naddrc, int nsizec,
+                                      int measure_only)
+{
+        struct isa_reg_property *rp;
+        struct address_range *adr;
+        int i, l;
+
+        rp = (struct isa_reg_property *) get_property(np, "reg", &l);
+        if (rp != 0 && l >= sizeof(struct isa_reg_property)) {
+                i = 0;
+                adr = (struct address_range *) (*mem_start);
+                while ((l -= sizeof(struct isa_reg_property)) >= 0) {
+                        if (!measure_only) {
+                                adr[i].space = rp[i].space;
+                                adr[i].address = rp[i].address;
+                                adr[i].size = rp[i].size;
+                        }
+                        ++i;
+                }
+                np->addrs = adr;
+                np->n_addrs = i;
+                (*mem_start) += i * sizeof(struct address_range);
+        }
+
+        return 0;
+}
+
+static int __init interpret_root_props(struct device_node *np,
+                                       unsigned long *mem_start,
+                                       int naddrc, int nsizec,
+                                       int measure_only)
+{
+        struct address_range *adr;
+        int i, l;
+        unsigned int *rp;
+        int rpsize = (naddrc + nsizec) * sizeof(unsigned int);
+
+        rp = (unsigned int *) get_property(np, "reg", &l);
+        if (rp != 0 && l >= rpsize) {
+                i = 0;
+                adr = (struct address_range *) (*mem_start);
+                while ((l -= rpsize) >= 0) {
+                        if (!measure_only) {
+                                adr[i].space = 0;
+                                adr[i].address = rp[naddrc - 1];
+                                adr[i].size = rp[naddrc + nsizec - 1];
+                        }
+                        ++i;
+                        rp += naddrc + nsizec;
+                }
+                np->addrs = adr;
+                np->n_addrs = i;
+                (*mem_start) += i * sizeof(struct address_range);
+        }
+
+        return 0;
+}
+
+static int __devinit finish_node(struct device_node *np,
+                                 unsigned long *mem_start,
+                                 interpret_func *ifunc,
+                                 int naddrc, int nsizec,
+                                 int measure_only)
+{
+        struct device_node *child;
+        int *ip, rc = 0;
+
+        /* get the device addresses and interrupts */
+        if (ifunc != NULL)
+                rc = ifunc(np, mem_start, naddrc, nsizec, measure_only);
+        if (rc)
+                goto out;
+
+        rc = finish_node_interrupts(np, mem_start, measure_only);
+        if (rc)
+                goto out;
+
+        /* Look for #address-cells and #size-cells properties. */
+        ip = (int *) get_property(np, "#address-cells", NULL);
+        if (ip != NULL)
+                naddrc = *ip;
+        ip = (int *) get_property(np, "#size-cells", NULL);
+        if (ip != NULL)
+                nsizec = *ip;
+
+        if (!strcmp(np->name, "device-tree") || np->parent == NULL)
+                ifunc = interpret_root_props;
+        else if (np->type == 0)
+                ifunc = NULL;
+        else if (!strcmp(np->type, "pci") || !strcmp(np->type, "vci"))
+                ifunc = interpret_pci_props;
+        else if (!strcmp(np->type, "dbdma"))
+                ifunc = interpret_dbdma_props;
+        else if (!strcmp(np->type, "mac-io") || ifunc == interpret_macio_props)
+                ifunc = interpret_macio_props;
+        else if (!strcmp(np->type, "isa"))
+                ifunc = interpret_isa_props;
+        else if (!strcmp(np->name, "uni-n") || !strcmp(np->name, "u3"))
+                ifunc = interpret_root_props;
+        else if (!((ifunc == interpret_dbdma_props
+                    || ifunc == interpret_macio_props)
+                   && (!strcmp(np->type, "escc")
+                       || !strcmp(np->type, "media-bay"))))
+                ifunc = NULL;
+
+        for (child = np->child; child != NULL; child = child->sibling) {
+                rc = finish_node(child, mem_start, ifunc,
+                                 naddrc, nsizec, measure_only);
+                if (rc)
+                        goto out;
+        }
+out:
+        return rc;
+}
+
+static void __init scan_interrupt_controllers(void)
+{
+        struct device_node *np;
+        int n = 0;
+        char *name, *ic;
+        int iclen;
+
+        for (np = allnodes; np != NULL; np = np->allnext) {
+                ic = get_property(np, "interrupt-controller", &iclen);
+                name = get_property(np, "name", NULL);
+                /* checking iclen makes sure we don't get a false
+                   match on /chosen.interrupt_controller */
+                if ((name != NULL
+                     && strcmp(name, "interrupt-controller") == 0)
+                    || (ic != NULL && iclen == 0
+                        && strcmp(name, "AppleKiwi"))) {
+                        if (n == 0)
+                                dflt_interrupt_controller = np;
+                        ++n;
+                }
+        }
+        num_interrupt_controllers = n;
+}
+
+/**
+ * finish_device_tree is called once things are running normally
+ * (i.e. with text and data mapped to the address they were linked at).
+ * It traverses the device tree and fills in some of the additional,
+ * fields in each node like {n_}addrs and {n_}intrs, the virt interrupt
+ * mapping is also initialized at this point.
+ */
+void __init finish_device_tree(void)
+{
+        unsigned long start, end, size = 0;
+
+        DBG(" -> finish_device_tree\n");
+
+#ifdef CONFIG_PPC64
+        /* Initialize virtual IRQ map */
+        virt_irq_init();
+#endif
+        scan_interrupt_controllers();
+
+        /*
+         * Finish device-tree (pre-parsing some properties etc...)
+         * We do this in 2 passes. One with "measure_only" set, which
+         * will only measure the amount of memory needed, then we can
+         * allocate that memory, and call finish_node again. However,
+         * we must be careful as most routines will fail nowadays when
+         * prom_alloc() returns 0, so we must make sure our first pass
+         * doesn't start at 0. We pre-initialize size to 16 for that
+         * reason and then remove those additional 16 bytes
+         */
+        size = 16;
+        finish_node(allnodes, &size, NULL, 0, 0, 1);
+        size -= 16;
+        end = start = (unsigned long) __va(lmb_alloc(size, 128));
+        finish_node(allnodes, &end, NULL, 0, 0, 0);
+        BUG_ON(end != start + size);
+
+        DBG(" <- finish_device_tree\n");
+}
+
+static inline char *find_flat_dt_string(u32 offset)
+{
+        return ((char *)initial_boot_params) +
+                initial_boot_params->off_dt_strings + offset;
+}
+
+/**
+ * This function is used to scan the flattened device-tree, it is
+ * used to extract the memory informations at boot before we can
+ * unflatten the tree
+ */
+static int __init scan_flat_dt(int (*it)(unsigned long node,
+                                         const char *uname, int depth,
+                                         void *data),
+                               void *data)
+{
+        unsigned long p = ((unsigned long)initial_boot_params) +
+                initial_boot_params->off_dt_struct;
+        int rc = 0;
+        int depth = -1;
+
+        do {
+                u32 tag = *((u32 *)p);
+                char *pathp;
+                
+                p += 4;
+                if (tag == OF_DT_END_NODE) {
+                        depth --;
+                        continue;
+                }
+                if (tag == OF_DT_NOP)
+                        continue;
+                if (tag == OF_DT_END)
+                        break;
+                if (tag == OF_DT_PROP) {
+                        u32 sz = *((u32 *)p);
+                        p += 8;
+                        if (initial_boot_params->version < 0x10)
+                                p = _ALIGN(p, sz >= 8 ? 8 : 4);
+                        p += sz;
+                        p = _ALIGN(p, 4);
+                        continue;
+                }
+                if (tag != OF_DT_BEGIN_NODE) {
+                        printk(KERN_WARNING "Invalid tag %x scanning flattened"
+                               " device tree !\n", tag);
+                        return -EINVAL;
+                }
+                depth++;
+                pathp = (char *)p;
+                p = _ALIGN(p + strlen(pathp) + 1, 4);
+                if ((*pathp) == '/') {
+                        char *lp, *np;
+                        for (lp = NULL, np = pathp; *np; np++)
+                                if ((*np) == '/')
+                                        lp = np+1;
+                        if (lp != NULL)
+                                pathp = lp;
+                }
+                rc = it(p, pathp, depth, data);
+                if (rc != 0)
+                        break;          
+        } while(1);
+
+        return rc;
+}
+
+/**
+ * This  function can be used within scan_flattened_dt callback to get
+ * access to properties
+ */
+static void* __init get_flat_dt_prop(unsigned long node, const char *name,
+                                     unsigned long *size)
+{
+        unsigned long p = node;
+
+        do {
+                u32 tag = *((u32 *)p);
+                u32 sz, noff;
+                const char *nstr;
+
+                p += 4;
+                if (tag == OF_DT_NOP)
+                        continue;
+                if (tag != OF_DT_PROP)
+                        return NULL;
+
+                sz = *((u32 *)p);
+                noff = *((u32 *)(p + 4));
+                p += 8;
+                if (initial_boot_params->version < 0x10)
+                        p = _ALIGN(p, sz >= 8 ? 8 : 4);
+
+                nstr = find_flat_dt_string(noff);
+                if (nstr == NULL) {
+                        printk(KERN_WARNING "Can't find property index"
+                               " name !\n");
+                        return NULL;
+                }
+                if (strcmp(name, nstr) == 0) {
+                        if (size)
+                                *size = sz;
+                        return (void *)p;
+                }
+                p += sz;
+                p = _ALIGN(p, 4);
+        } while(1);
+}
+
+static void *__init unflatten_dt_alloc(unsigned long *mem, unsigned long size,
+                                       unsigned long align)
+{
+        void *res;
+
+        *mem = _ALIGN(*mem, align);
+        res = (void *)*mem;
+        *mem += size;
+
+        return res;
+}
+
+static unsigned long __init unflatten_dt_node(unsigned long mem,
+                                              unsigned long *p,
+                                              struct device_node *dad,
+                                              struct device_node ***allnextpp,
+                                              unsigned long fpsize)
+{
+        struct device_node *np;
+        struct property *pp, **prev_pp = NULL;
+        char *pathp;
+        u32 tag;
+        unsigned int l, allocl;
+        int has_name = 0;
+        int new_format = 0;
+
+        tag = *((u32 *)(*p));
+        if (tag != OF_DT_BEGIN_NODE) {
+                printk("Weird tag at start of node: %x\n", tag);
+                return mem;
+        }
+        *p += 4;
+        pathp = (char *)*p;
+        l = allocl = strlen(pathp) + 1;
+        *p = _ALIGN(*p + l, 4);
+
+        /* version 0x10 has a more compact unit name here instead of the full
+         * path. we accumulate the full path size using "fpsize", we'll rebuild
+         * it later. We detect this because the first character of the name is
+         * not '/'.
+         */
+        if ((*pathp) != '/') {
+                new_format = 1;
+                if (fpsize == 0) {
+                        /* root node: special case. fpsize accounts for path
+                         * plus terminating zero. root node only has '/', so
+                         * fpsize should be 2, but we want to avoid the first
+                         * level nodes to have two '/' so we use fpsize 1 here
+                         */
+                        fpsize = 1;
+                        allocl = 2;
+                } else {
+                        /* account for '/' and path size minus terminal 0
+                         * already in 'l'
+                         */
+                        fpsize += l;
+                        allocl = fpsize;
+                }
+        }
+
+
+        np = unflatten_dt_alloc(&mem, sizeof(struct device_node) + allocl,
+                                __alignof__(struct device_node));
+        if (allnextpp) {
+                memset(np, 0, sizeof(*np));
+                np->full_name = ((char*)np) + sizeof(struct device_node);
+                if (new_format) {
+                        char *p = np->full_name;
+                        /* rebuild full path for new format */
+                        if (dad && dad->parent) {
+                                strcpy(p, dad->full_name);
+#ifdef DEBUG
+                                if ((strlen(p) + l + 1) != allocl) {
+                                        DBG("%s: p: %d, l: %d, a: %d\n",
+                                            pathp, strlen(p), l, allocl);
+                                }
+#endif
+                                p += strlen(p);
+                        }
+                        *(p++) = '/';
+                        memcpy(p, pathp, l);
+                } else
+                        memcpy(np->full_name, pathp, l);
+                prev_pp = &np->properties;
+                **allnextpp = np;
+                *allnextpp = &np->allnext;
+                if (dad != NULL) {
+                        np->parent = dad;
+                        /* we temporarily use the next field as `last_child'*/
+                        if (dad->next == 0)
+                                dad->child = np;
+                        else
+                                dad->next->sibling = np;
+                        dad->next = np;
+                }
+                kref_init(&np->kref);
+        }
+        while(1) {
+                u32 sz, noff;
+                char *pname;
+
+                tag = *((u32 *)(*p));
+                if (tag == OF_DT_NOP) {
+                        *p += 4;
+                        continue;
+                }
+                if (tag != OF_DT_PROP)
+                        break;
+                *p += 4;
+                sz = *((u32 *)(*p));
+                noff = *((u32 *)((*p) + 4));
+                *p += 8;
+                if (initial_boot_params->version < 0x10)
+                        *p = _ALIGN(*p, sz >= 8 ? 8 : 4);
+
+                pname = find_flat_dt_string(noff);
+                if (pname == NULL) {
+                        printk("Can't find property name in list !\n");
+                        break;
+                }
+                if (strcmp(pname, "name") == 0)
+                        has_name = 1;
+                l = strlen(pname) + 1;
+                pp = unflatten_dt_alloc(&mem, sizeof(struct property),
+                                        __alignof__(struct property));
+                if (allnextpp) {
+                        if (strcmp(pname, "linux,phandle") == 0) {
+                                np->node = *((u32 *)*p);
+                                if (np->linux_phandle == 0)
+                                        np->linux_phandle = np->node;
+                        }
+                        if (strcmp(pname, "ibm,phandle") == 0)
+                                np->linux_phandle = *((u32 *)*p);
+                        pp->name = pname;
+                        pp->length = sz;
+                        pp->value = (void *)*p;
+                        *prev_pp = pp;
+                        prev_pp = &pp->next;
+                }
+                *p = _ALIGN((*p) + sz, 4);
+        }
+        /* with version 0x10 we may not have the name property, recreate
+         * it here from the unit name if absent
+         */
+        if (!has_name) {
+                char *p = pathp, *ps = pathp, *pa = NULL;
+                int sz;
+
+                while (*p) {
+                        if ((*p) == '@')
+                                pa = p;
+                        if ((*p) == '/')
+                                ps = p + 1;
+                        p++;
+                }
+                if (pa < ps)
+                        pa = p;
+                sz = (pa - ps) + 1;
+                pp = unflatten_dt_alloc(&mem, sizeof(struct property) + sz,
+                                        __alignof__(struct property));
+                if (allnextpp) {
+                        pp->name = "name";
+                        pp->length = sz;
+                        pp->value = (unsigned char *)(pp + 1);
+                        *prev_pp = pp;
+                        prev_pp = &pp->next;
+                        memcpy(pp->value, ps, sz - 1);
+                        ((char *)pp->value)[sz - 1] = 0;
+                        DBG("fixed up name for %s -> %s\n", pathp, pp->value);
+                }
+        }
+        if (allnextpp) {
+                *prev_pp = NULL;
+                np->name = get_property(np, "name", NULL);
+                np->type = get_property(np, "device_type", NULL);
+
+                if (!np->name)
+                        np->name = "<NULL>";
+                if (!np->type)
+                        np->type = "<NULL>";
+        }
+        while (tag == OF_DT_BEGIN_NODE) {
+                mem = unflatten_dt_node(mem, p, np, allnextpp, fpsize);
+                tag = *((u32 *)(*p));
+        }
+        if (tag != OF_DT_END_NODE) {
+                printk("Weird tag at end of node: %x\n", tag);
+                return mem;
+        }
+        *p += 4;
+        return mem;
+}
+
+
+/**
+ * unflattens the device-tree passed by the firmware, creating the
+ * tree of struct device_node. It also fills the "name" and "type"
+ * pointers of the nodes so the normal device-tree walking functions
+ * can be used (this used to be done by finish_device_tree)
+ */
+void __init unflatten_device_tree(void)
+{
+        unsigned long start, mem, size;
+        struct device_node **allnextp = &allnodes;
+        char *p = NULL;
+        int l = 0;
+
+        DBG(" -> unflatten_device_tree()\n");
+
+        /* First pass, scan for size */
+        start = ((unsigned long)initial_boot_params) +
+                initial_boot_params->off_dt_struct;
+        size = unflatten_dt_node(0, &start, NULL, NULL, 0);
+        size = (size | 3) + 1;
+
+        DBG("  size is %lx, allocating...\n", size);
+
+        /* Allocate memory for the expanded device tree */
+        mem = lmb_alloc(size + 4, __alignof__(struct device_node));
+        if (!mem) {
+                DBG("Couldn't allocate memory with lmb_alloc()!\n");
+                panic("Couldn't allocate memory with lmb_alloc()!\n");
+        }
+        mem = (unsigned long) __va(mem);
+
+        ((u32 *)mem)[size / 4] = 0xdeadbeef;
+
+        DBG("  unflattening %lx...\n", mem);
+
+        /* Second pass, do actual unflattening */
+        start = ((unsigned long)initial_boot_params) +
+                initial_boot_params->off_dt_struct;
+        unflatten_dt_node(mem, &start, NULL, &allnextp, 0);
+        if (*((u32 *)start) != OF_DT_END)
+                printk(KERN_WARNING "Weird tag at end of tree: %08x\n", *((u32 *)start));
+        if (((u32 *)mem)[size / 4] != 0xdeadbeef)
+                printk(KERN_WARNING "End of tree marker overwritten: %08x\n",
+                       ((u32 *)mem)[size / 4] );
+        *allnextp = NULL;
+
+        /* Get pointer to OF "/chosen" node for use everywhere */
+        of_chosen = of_find_node_by_path("/chosen");
+        if (of_chosen == NULL)
+                of_chosen = of_find_node_by_path("/chosen@0");
+
+        /* Retreive command line */
+        if (of_chosen != NULL) {
+                p = (char *)get_property(of_chosen, "bootargs", &l);
+                if (p != NULL && l > 0)
+                        strlcpy(cmd_line, p, min(l, COMMAND_LINE_SIZE));
+        }
+#ifdef CONFIG_CMDLINE
+        if (l == 0 || (l == 1 && (*p) == 0))
+                strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
+#endif /* CONFIG_CMDLINE */
+
+        DBG("Command line is: %s\n", cmd_line);
+
+        DBG(" <- unflatten_device_tree()\n");
+}
+
+
+static int __init early_init_dt_scan_cpus(unsigned long node,
+                                          const char *uname, int depth, void *data)
+{
+        char *type = get_flat_dt_prop(node, "device_type", NULL);
+        u32 *prop;
+        unsigned long size = 0;
+
+        /* We are scanning "cpu" nodes only */
+        if (type == NULL || strcmp(type, "cpu") != 0)
+                return 0;
+
+#ifdef CONFIG_PPC_PSERIES
+        /* On LPAR, look for the first ibm,pft-size property for the  hash table size
+         */
+        if (systemcfg->platform == PLATFORM_PSERIES_LPAR && ppc64_pft_size == 0) {
+                u32 *pft_size;
+                pft_size = get_flat_dt_prop(node, "ibm,pft-size", NULL);
+                if (pft_size != NULL) {
+                        /* pft_size[0] is the NUMA CEC cookie */
+                        ppc64_pft_size = pft_size[1];
+                }
+        }
+#endif
+
+        boot_cpuid = 0;
+        boot_cpuid_phys = 0;
+        if (initial_boot_params && initial_boot_params->version >= 2) {
+                /* version 2 of the kexec param format adds the phys cpuid
+                 * of booted proc.
+                 */
+                boot_cpuid_phys = initial_boot_params->boot_cpuid_phys;
+        } else {
+                /* Check if it's the boot-cpu, set it's hw index now */
+                if (get_flat_dt_prop(node, "linux,boot-cpu", NULL) != NULL) {
+                        prop = get_flat_dt_prop(node, "reg", NULL);
+                        if (prop != NULL)
+                                boot_cpuid_phys = *prop;
+                }
+        }
+        set_hard_smp_processor_id(0, boot_cpuid_phys);
+
+#ifdef CONFIG_ALTIVEC
+        /* Check if we have a VMX and eventually update CPU features */
+        prop = (u32 *)get_flat_dt_prop(node, "ibm,vmx", &size);
+        if (prop && (*prop) > 0) {
+                cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
+                cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
+        }
+
+        /* Same goes for Apple's "altivec" property */
+        prop = (u32 *)get_flat_dt_prop(node, "altivec", NULL);
+        if (prop) {
+                cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
+                cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
+        }
+#endif /* CONFIG_ALTIVEC */
+
+#ifdef CONFIG_PPC_PSERIES
+        /*
+         * Check for an SMT capable CPU and set the CPU feature. We do
+         * this by looking at the size of the ibm,ppc-interrupt-server#s
+         * property
+         */
+        prop = (u32 *)get_flat_dt_prop(node, "ibm,ppc-interrupt-server#s",
+                                       &size);
+        cur_cpu_spec->cpu_features &= ~CPU_FTR_SMT;
+        if (prop && ((size / sizeof(u32)) > 1))
+                cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
+#endif
+
+        return 0;
+}
+
+static int __init early_init_dt_scan_chosen(unsigned long node,
+                                            const char *uname, int depth, void *data)
+{
+        u32 *prop;
+        unsigned long *lprop;
+
+        DBG("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
+
+        if (depth != 1 ||
+            (strcmp(uname, "chosen") != 0 && strcmp(uname, "chosen@0") != 0))
+                return 0;
+
+        /* get platform type */
+        prop = (u32 *)get_flat_dt_prop(node, "linux,platform", NULL);
+        if (prop == NULL)
+                return 0;
+#ifdef CONFIG_PPC64
+        systemcfg->platform = *prop;
+#else
+#ifdef CONFIG_PPC_MULTIPLATFORM
+        _machine = *prop;
+#endif
+#endif
+
+#ifdef CONFIG_PPC64
+        /* check if iommu is forced on or off */
+        if (get_flat_dt_prop(node, "linux,iommu-off", NULL) != NULL)
+                iommu_is_off = 1;
+        if (get_flat_dt_prop(node, "linux,iommu-force-on", NULL) != NULL)
+                iommu_force_on = 1;
+#endif
+
+        lprop = get_flat_dt_prop(node, "linux,memory-limit", NULL);
+        if (lprop)
+                memory_limit = *lprop;
+
+#ifdef CONFIG_PPC64
+        lprop = get_flat_dt_prop(node, "linux,tce-alloc-start", NULL);
+        if (lprop)
+                tce_alloc_start = *lprop;
+        lprop = get_flat_dt_prop(node, "linux,tce-alloc-end", NULL);
+        if (lprop)
+                tce_alloc_end = *lprop;
+#endif
+
+#ifdef CONFIG_PPC_RTAS
+        /* To help early debugging via the front panel, we retreive a minimal
+         * set of RTAS infos now if available
+         */
+        {
+                u64 *basep, *entryp;
+
+                basep = get_flat_dt_prop(node, "linux,rtas-base", NULL);
+                entryp = get_flat_dt_prop(node, "linux,rtas-entry", NULL);
+                prop = get_flat_dt_prop(node, "linux,rtas-size", NULL);
+                if (basep && entryp && prop) {
+                        rtas.base = *basep;
+                        rtas.entry = *entryp;
+                        rtas.size = *prop;
+                }
+        }
+#endif /* CONFIG_PPC_RTAS */
+
+        /* break now */
+        return 1;
+}
+
+static int __init early_init_dt_scan_root(unsigned long node,
+                                          const char *uname, int depth, void *data)
+{
+        u32 *prop;
+
+        if (depth != 0)
+                return 0;
+
+        prop = get_flat_dt_prop(node, "#size-cells", NULL);
+        dt_root_size_cells = (prop == NULL) ? 1 : *prop;
+        DBG("dt_root_size_cells = %x\n", dt_root_size_cells);
+
+        prop = get_flat_dt_prop(node, "#address-cells", NULL);
+        dt_root_addr_cells = (prop == NULL) ? 2 : *prop;
+        DBG("dt_root_addr_cells = %x\n", dt_root_addr_cells);
+        
+        /* break now */
+        return 1;
+}
+
+static unsigned long __init dt_mem_next_cell(int s, cell_t **cellp)
+{
+        cell_t *p = *cellp;
+        unsigned long r;
+
+        /* Ignore more than 2 cells */
+        while (s > sizeof(unsigned long) / 4) {
+                p++;
+                s--;
+        }
+        r = *p++;
+#ifdef CONFIG_PPC64
+        if (s > 1) {
+                r <<= 32;
+                r |= *(p++);
+                s--;
+        }
+#endif
+
+        *cellp = p;
+        return r;
+}
+
+
+static int __init early_init_dt_scan_memory(unsigned long node,
+                                            const char *uname, int depth, void *data)
+{
+        char *type = get_flat_dt_prop(node, "device_type", NULL);
+        cell_t *reg, *endp;
+        unsigned long l;
+
+        /* We are scanning "memory" nodes only */
+        if (type == NULL || strcmp(type, "memory") != 0)
+                return 0;
+
+        reg = (cell_t *)get_flat_dt_prop(node, "reg", &l);
+        if (reg == NULL)
+                return 0;
+
+        endp = reg + (l / sizeof(cell_t));
+
+        DBG("memory scan node %s ..., reg size %ld, data: %x %x %x %x, ...\n",
+            uname, l, reg[0], reg[1], reg[2], reg[3]);
+
+        while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
+                unsigned long base, size;
+
+                base = dt_mem_next_cell(dt_root_addr_cells, &reg);
+                size = dt_mem_next_cell(dt_root_size_cells, &reg);
+
+                if (size == 0)
+                        continue;
+                DBG(" - %lx ,  %lx\n", base, size);
+#ifdef CONFIG_PPC64
+                if (iommu_is_off) {
+                        if (base >= 0x80000000ul)
+                                continue;
+                        if ((base + size) > 0x80000000ul)
+                                size = 0x80000000ul - base;
+                }
+#endif
+                lmb_add(base, size);
+        }
+        return 0;
+}
+
+static void __init early_reserve_mem(void)
+{
+        unsigned long base, size;
+        unsigned long *reserve_map;
+
+        reserve_map = (unsigned long *)(((unsigned long)initial_boot_params) +
+                                        initial_boot_params->off_mem_rsvmap);
+        while (1) {
+                base = *(reserve_map++);
+                size = *(reserve_map++);
+                if (size == 0)
+                        break;
+                DBG("reserving: %lx -> %lx\n", base, size);
+                lmb_reserve(base, size);
+        }
+
+#if 0
+        DBG("memory reserved, lmbs :\n");
+        lmb_dump_all();
+#endif
+}
+
+void __init early_init_devtree(void *params)
+{
+        DBG(" -> early_init_devtree()\n");
+
+        /* Setup flat device-tree pointer */
+        initial_boot_params = params;
+
+        /* Retrieve various informations from the /chosen node of the
+         * device-tree, including the platform type, initrd location and
+         * size, TCE reserve, and more ...
+         */
+        scan_flat_dt(early_init_dt_scan_chosen, NULL);
+
+        /* Scan memory nodes and rebuild LMBs */
+        lmb_init();
+        scan_flat_dt(early_init_dt_scan_root, NULL);
+        scan_flat_dt(early_init_dt_scan_memory, NULL);
+        lmb_enforce_memory_limit(memory_limit);
+        lmb_analyze();
+#ifdef CONFIG_PPC64
+        systemcfg->physicalMemorySize = lmb_phys_mem_size();
+#endif
+        lmb_reserve(0, __pa(klimit));
+
+        DBG("Phys. mem: %lx\n", lmb_phys_mem_size());
+
+        /* Reserve LMB regions used by kernel, initrd, dt, etc... */
+        early_reserve_mem();
+
+        DBG("Scanning CPUs ...\n");
+
+        /* Retreive hash table size from flattened tree plus other
+         * CPU related informations (altivec support, boot CPU ID, ...)
+         */
+        scan_flat_dt(early_init_dt_scan_cpus, NULL);
+
+        DBG(" <- early_init_devtree()\n");
+}
+
+#undef printk
+
+int
+prom_n_addr_cells(struct device_node* np)
+{
+        int* ip;
+        do {
+                if (np->parent)
+                        np = np->parent;
+                ip = (int *) get_property(np, "#address-cells", NULL);
+                if (ip != NULL)
+                        return *ip;
+        } while (np->parent);
+        /* No #address-cells property for the root node, default to 1 */
+        return 1;
+}
+
+int
+prom_n_size_cells(struct device_node* np)
+{
+        int* ip;
+        do {
+                if (np->parent)
+                        np = np->parent;
+                ip = (int *) get_property(np, "#size-cells", NULL);
+                if (ip != NULL)
+                        return *ip;
+        } while (np->parent);
+        /* No #size-cells property for the root node, default to 1 */
+        return 1;
+}
+
+/**
+ * Work out the sense (active-low level / active-high edge)
+ * of each interrupt from the device tree.
+ */
+void __init prom_get_irq_senses(unsigned char *senses, int off, int max)
+{
+        struct device_node *np;
+        int i, j;
+
+        /* default to level-triggered */
+        memset(senses, IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE, max - off);
+
+        for (np = allnodes; np != 0; np = np->allnext) {
+                for (j = 0; j < np->n_intrs; j++) {
+                        i = np->intrs[j].line;
+                        if (i >= off && i < max)
+                                senses[i-off] = np->intrs[j].sense;
+                }
+        }
+}
+
+/**
+ * Construct and return a list of the device_nodes with a given name.
+ */
+struct device_node *find_devices(const char *name)
+{
+        struct device_node *head, **prevp, *np;
+
+        prevp = &head;
+        for (np = allnodes; np != 0; np = np->allnext) {
+                if (np->name != 0 && strcasecmp(np->name, name) == 0) {
+                        *prevp = np;
+                        prevp = &np->next;
+                }
+        }
+        *prevp = NULL;
+        return head;
+}
+EXPORT_SYMBOL(find_devices);
+
+/**
+ * Construct and return a list of the device_nodes with a given type.
+ */
+struct device_node *find_type_devices(const char *type)
+{
+        struct device_node *head, **prevp, *np;
+
+        prevp = &head;
+        for (np = allnodes; np != 0; np = np->allnext) {
+                if (np->type != 0 && strcasecmp(np->type, type) == 0) {
+                        *prevp = np;
+                        prevp = &np->next;
+                }
+        }
+        *prevp = NULL;
+        return head;
+}
+EXPORT_SYMBOL(find_type_devices);
+
+/**
+ * Returns all nodes linked together
+ */
+struct device_node *find_all_nodes(void)
+{
+        struct device_node *head, **prevp, *np;
+
+        prevp = &head;
+        for (np = allnodes; np != 0; np = np->allnext) {
+                *prevp = np;
+                prevp = &np->next;
+        }
+        *prevp = NULL;
+        return head;
+}
+EXPORT_SYMBOL(find_all_nodes);
+
+/** Checks if the given "compat" string matches one of the strings in
+ * the device's "compatible" property
+ */
+int device_is_compatible(struct device_node *device, const char *compat)
+{
+        const char* cp;
+        int cplen, l;
+
+        cp = (char *) get_property(device, "compatible", &cplen);
+        if (cp == NULL)
+                return 0;
+        while (cplen > 0) {
+                if (strncasecmp(cp, compat, strlen(compat)) == 0)
+                        return 1;
+                l = strlen(cp) + 1;
+                cp += l;
+                cplen -= l;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(device_is_compatible);
+
+
+/**
+ * Indicates whether the root node has a given value in its
+ * compatible property.
+ */
+int machine_is_compatible(const char *compat)
+{
+        struct device_node *root;
+        int rc = 0;
+
+        root = of_find_node_by_path("/");
+        if (root) {
+                rc = device_is_compatible(root, compat);
+                of_node_put(root);
+        }
+        return rc;
+}
+EXPORT_SYMBOL(machine_is_compatible);
+
+/**
+ * Construct and return a list of the device_nodes with a given type
+ * and compatible property.
+ */
+struct device_node *find_compatible_devices(const char *type,
+                                            const char *compat)
+{
+        struct device_node *head, **prevp, *np;
+
+        prevp = &head;
+        for (np = allnodes; np != 0; np = np->allnext) {
+                if (type != NULL
+                    && !(np->type != 0 && strcasecmp(np->type, type) == 0))
+                        continue;
+                if (device_is_compatible(np, compat)) {
+                        *prevp = np;
+                        prevp = &np->next;
+                }
+        }
+        *prevp = NULL;
+        return head;
+}
+EXPORT_SYMBOL(find_compatible_devices);
+
+/**
+ * Find the device_node with a given full_name.
+ */
+struct device_node *find_path_device(const char *path)
+{
+        struct device_node *np;
+
+        for (np = allnodes; np != 0; np = np->allnext)
+                if (np->full_name != 0 && strcasecmp(np->full_name, path) == 0)
+                        return np;
+        return NULL;
+}
+EXPORT_SYMBOL(find_path_device);
+
+/*******
+ *
+ * New implementation of the OF "find" APIs, return a refcounted
+ * object, call of_node_put() when done.  The device tree and list
+ * are protected by a rw_lock.
+ *
+ * Note that property management will need some locking as well,
+ * this isn't dealt with yet.
+ *
+ *******/
+
+/**
+ *      of_find_node_by_name - Find a node by its "name" property
+ *      @from:  The node to start searching from or NULL, the node
+ *              you pass will not be searched, only the next one
+ *              will; typically, you pass what the previous call
+ *              returned. of_node_put() will be called on it
+ *      @name:  The name string to match against
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_find_node_by_name(struct device_node *from,
+        const char *name)
+{
+        struct device_node *np;
+
+        read_lock(&devtree_lock);
+        np = from ? from->allnext : allnodes;
+        for (; np != 0; np = np->allnext)
+                if (np->name != 0 && strcasecmp(np->name, name) == 0
+                    && of_node_get(np))
+                        break;
+        if (from)
+                of_node_put(from);
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_find_node_by_name);
+
+/**
+ *      of_find_node_by_type - Find a node by its "device_type" property
+ *      @from:  The node to start searching from or NULL, the node
+ *              you pass will not be searched, only the next one
+ *              will; typically, you pass what the previous call
+ *              returned. of_node_put() will be called on it
+ *      @name:  The type string to match against
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_find_node_by_type(struct device_node *from,
+        const char *type)
+{
+        struct device_node *np;
+
+        read_lock(&devtree_lock);
+        np = from ? from->allnext : allnodes;
+        for (; np != 0; np = np->allnext)
+                if (np->type != 0 && strcasecmp(np->type, type) == 0
+                    && of_node_get(np))
+                        break;
+        if (from)
+                of_node_put(from);
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_find_node_by_type);
+
+/**
+ *      of_find_compatible_node - Find a node based on type and one of the
+ *                                tokens in its "compatible" property
+ *      @from:          The node to start searching from or NULL, the node
+ *                      you pass will not be searched, only the next one
+ *                      will; typically, you pass what the previous call
+ *                      returned. of_node_put() will be called on it
+ *      @type:          The type string to match "device_type" or NULL to ignore
+ *      @compatible:    The string to match to one of the tokens in the device
+ *                      "compatible" list.
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_find_compatible_node(struct device_node *from,
+        const char *type, const char *compatible)
+{
+        struct device_node *np;
+
+        read_lock(&devtree_lock);
+        np = from ? from->allnext : allnodes;
+        for (; np != 0; np = np->allnext) {
+                if (type != NULL
+                    && !(np->type != 0 && strcasecmp(np->type, type) == 0))
+                        continue;
+                if (device_is_compatible(np, compatible) && of_node_get(np))
+                        break;
+        }
+        if (from)
+                of_node_put(from);
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_find_compatible_node);
+
+/**
+ *      of_find_node_by_path - Find a node matching a full OF path
+ *      @path:  The full path to match
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_find_node_by_path(const char *path)
+{
+        struct device_node *np = allnodes;
+
+        read_lock(&devtree_lock);
+        for (; np != 0; np = np->allnext) {
+                if (np->full_name != 0 && strcasecmp(np->full_name, path) == 0
+                    && of_node_get(np))
+                        break;
+        }
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_find_node_by_path);
+
+/**
+ *      of_find_node_by_phandle - Find a node given a phandle
+ *      @handle:        phandle of the node to find
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_find_node_by_phandle(phandle handle)
+{
+        struct device_node *np;
+
+        read_lock(&devtree_lock);
+        for (np = allnodes; np != 0; np = np->allnext)
+                if (np->linux_phandle == handle)
+                        break;
+        if (np)
+                of_node_get(np);
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_find_node_by_phandle);
+
+/**
+ *      of_find_all_nodes - Get next node in global list
+ *      @prev:  Previous node or NULL to start iteration
+ *              of_node_put() will be called on it
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_find_all_nodes(struct device_node *prev)
+{
+        struct device_node *np;
+
+        read_lock(&devtree_lock);
+        np = prev ? prev->allnext : allnodes;
+        for (; np != 0; np = np->allnext)
+                if (of_node_get(np))
+                        break;
+        if (prev)
+                of_node_put(prev);
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_find_all_nodes);
+
+/**
+ *      of_get_parent - Get a node's parent if any
+ *      @node:  Node to get parent
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_get_parent(const struct device_node *node)
+{
+        struct device_node *np;
+
+        if (!node)
+                return NULL;
+
+        read_lock(&devtree_lock);
+        np = of_node_get(node->parent);
+        read_unlock(&devtree_lock);
+        return np;
+}
+EXPORT_SYMBOL(of_get_parent);
+
+/**
+ *      of_get_next_child - Iterate a node childs
+ *      @node:  parent node
+ *      @prev:  previous child of the parent node, or NULL to get first
+ *
+ *      Returns a node pointer with refcount incremented, use
+ *      of_node_put() on it when done.
+ */
+struct device_node *of_get_next_child(const struct device_node *node,
+        struct device_node *prev)
+{
+        struct device_node *next;
+
+        read_lock(&devtree_lock);
+        next = prev ? prev->sibling : node->child;
+        for (; next != 0; next = next->sibling)
+                if (of_node_get(next))
+                        break;
+        if (prev)
+                of_node_put(prev);
+        read_unlock(&devtree_lock);
+        return next;
+}
+EXPORT_SYMBOL(of_get_next_child);
+
+/**
+ *      of_node_get - Increment refcount of a node
+ *      @node:  Node to inc refcount, NULL is supported to
+ *              simplify writing of callers
+ *
+ *      Returns node.
+ */
+struct device_node *of_node_get(struct device_node *node)
+{
+        if (node)
+                kref_get(&node->kref);
+        return node;
+}
+EXPORT_SYMBOL(of_node_get);
+
+static inline struct device_node * kref_to_device_node(struct kref *kref)
+{
+        return container_of(kref, struct device_node, kref);
+}
+
+/**
+ *      of_node_release - release a dynamically allocated node
+ *      @kref:  kref element of the node to be released
+ *
+ *      In of_node_put() this function is passed to kref_put()
+ *      as the destructor.
+ */
+static void of_node_release(struct kref *kref)
+{
+        struct device_node *node = kref_to_device_node(kref);
+        struct property *prop = node->properties;
+
+        if (!OF_IS_DYNAMIC(node))
+                return;
+        while (prop) {
+                struct property *next = prop->next;
+                kfree(prop->name);
+                kfree(prop->value);
+                kfree(prop);
+                prop = next;
+        }
+        kfree(node->intrs);
+        kfree(node->addrs);
+        kfree(node->full_name);
+        kfree(node->data);
+        kfree(node);
+}
+
+/**
+ *      of_node_put - Decrement refcount of a node
+ *      @node:  Node to dec refcount, NULL is supported to
+ *              simplify writing of callers
+ *
+ */
+void of_node_put(struct device_node *node)
+{
+        if (node)
+                kref_put(&node->kref, of_node_release);
+}
+EXPORT_SYMBOL(of_node_put);
+
+/*
+ * Plug a device node into the tree and global list.
+ */
+void of_attach_node(struct device_node *np)
+{
+        write_lock(&devtree_lock);
+        np->sibling = np->parent->child;
+        np->allnext = allnodes;
+        np->parent->child = np;
+        allnodes = np;
+        write_unlock(&devtree_lock);
+}
+
+/*
+ * "Unplug" a node from the device tree.  The caller must hold
+ * a reference to the node.  The memory associated with the node
+ * is not freed until its refcount goes to zero.
+ */
+void of_detach_node(const struct device_node *np)
+{
+        struct device_node *parent;
+
+        write_lock(&devtree_lock);
+
+        parent = np->parent;
+
+        if (allnodes == np)
+                allnodes = np->allnext;
+        else {
+                struct device_node *prev;
+                for (prev = allnodes;
+                     prev->allnext != np;
+                     prev = prev->allnext)
+                        ;
+                prev->allnext = np->allnext;
+        }
+
+        if (parent->child == np)
+                parent->child = np->sibling;
+        else {
+                struct device_node *prevsib;
+                for (prevsib = np->parent->child;
+                     prevsib->sibling != np;
+                     prevsib = prevsib->sibling)
+                        ;
+                prevsib->sibling = np->sibling;
+        }
+
+        write_unlock(&devtree_lock);
+}
+
+#ifdef CONFIG_PPC_PSERIES
+/*
+ * Fix up the uninitialized fields in a new device node:
+ * name, type, n_addrs, addrs, n_intrs, intrs, and pci-specific fields
+ *
+ * A lot of boot-time code is duplicated here, because functions such
+ * as finish_node_interrupts, interpret_pci_props, etc. cannot use the
+ * slab allocator.
+ *
+ * This should probably be split up into smaller chunks.
+ */
+
+static int of_finish_dynamic_node(struct device_node *node,
+                                  unsigned long *unused1, int unused2,
+                                  int unused3, int unused4)
+{
+        struct device_node *parent = of_get_parent(node);
+        int err = 0;
+        phandle *ibm_phandle;
+
+        node->name = get_property(node, "name", NULL);
+        node->type = get_property(node, "device_type", NULL);
+
+        if (!parent) {
+                err = -ENODEV;
+                goto out;
+        }
+
+        /* We don't support that function on PowerMac, at least
+         * not yet
+         */
+        if (systemcfg->platform == PLATFORM_POWERMAC)
+                return -ENODEV;
+
+        /* fix up new node's linux_phandle field */
+        if ((ibm_phandle = (unsigned int *)get_property(node, "ibm,phandle", NULL)))
+                node->linux_phandle = *ibm_phandle;
+
+out:
+        of_node_put(parent);
+        return err;
+}
+
+static int prom_reconfig_notifier(struct notifier_block *nb,
+                                  unsigned long action, void *node)
+{
+        int err;
+
+        switch (action) {
+        case PSERIES_RECONFIG_ADD:
+                err = finish_node(node, NULL, of_finish_dynamic_node, 0, 0, 0);
+                if (err < 0) {
+                        printk(KERN_ERR "finish_node returned %d\n", err);
+                        err = NOTIFY_BAD;
+                }
+                break;
+        default:
+                err = NOTIFY_DONE;
+                break;
+        }
+        return err;
+}
+
+static struct notifier_block prom_reconfig_nb = {
+        .notifier_call = prom_reconfig_notifier,
+        .priority = 10, /* This one needs to run first */
+};
+
+static int __init prom_reconfig_setup(void)
+{
+        return pSeries_reconfig_notifier_register(&prom_reconfig_nb);
+}
+__initcall(prom_reconfig_setup);
+#endif
+
+/*
+ * Find a property with a given name for a given node
+ * and return the value.
+ */
+unsigned char *get_property(struct device_node *np, const char *name,
+                            int *lenp)
+{
+        struct property *pp;
+
+        for (pp = np->properties; pp != 0; pp = pp->next)
+                if (strcmp(pp->name, name) == 0) {
+                        if (lenp != 0)
+                                *lenp = pp->length;
+                        return pp->value;
+                }
+        return NULL;
+}
+EXPORT_SYMBOL(get_property);
+
+/*
+ * Add a property to a node
+ */
+void prom_add_property(struct device_node* np, struct property* prop)
+{
+        struct property **next = &np->properties;
+
+        prop->next = NULL;      
+        while (*next)
+                next = &(*next)->next;
+        *next = prop;
+}
+
+/* I quickly hacked that one, check against spec ! */
+static inline unsigned long
+bus_space_to_resource_flags(unsigned int bus_space)
+{
+        u8 space = (bus_space >> 24) & 0xf;
+        if (space == 0)
+                space = 0x02;
+        if (space == 0x02)
+                return IORESOURCE_MEM;
+        else if (space == 0x01)
+                return IORESOURCE_IO;
+        else {
+                printk(KERN_WARNING "prom.c: bus_space_to_resource_flags(), space: %x\n",
+                        bus_space);
+                return 0;
+        }
+}
+
+#ifdef CONFIG_PCI
+static struct resource *find_parent_pci_resource(struct pci_dev* pdev,
+                                                 struct address_range *range)
+{
+        unsigned long mask;
+        int i;
+
+        /* Check this one */
+        mask = bus_space_to_resource_flags(range->space);
+        for (i=0; i<DEVICE_COUNT_RESOURCE; i++) {
+                if ((pdev->resource[i].flags & mask) == mask &&
+                        pdev->resource[i].start <= range->address &&
+                        pdev->resource[i].end > range->address) {
+                                if ((range->address + range->size - 1) > pdev->resource[i].end) {
+                                        /* Add better message */
+                                        printk(KERN_WARNING "PCI/OF resource overlap !\n");
+                                        return NULL;
+                                }
+                                break;
+                        }
+        }
+        if (i == DEVICE_COUNT_RESOURCE)
+                return NULL;
+        return &pdev->resource[i];
+}
+
+/*
+ * Request an OF device resource. Currently handles child of PCI devices,
+ * or other nodes attached to the root node. Ultimately, put some
+ * link to resources in the OF node.
+ */
+struct resource *request_OF_resource(struct device_node* node, int index,
+                                     const char* name_postfix)
+{
+        struct pci_dev* pcidev;
+        u8 pci_bus, pci_devfn;
+        unsigned long iomask;
+        struct device_node* nd;
+        struct resource* parent;
+        struct resource *res = NULL;
+        int nlen, plen;
+
+        if (index >= node->n_addrs)
+                goto fail;
+
+        /* Sanity check on bus space */
+        iomask = bus_space_to_resource_flags(node->addrs[index].space);
+        if (iomask & IORESOURCE_MEM)
+                parent = &iomem_resource;
+        else if (iomask & IORESOURCE_IO)
+                parent = &ioport_resource;
+        else
+                goto fail;
+
+        /* Find a PCI parent if any */
+        nd = node;
+        pcidev = NULL;
+        while (nd) {
+                if (!pci_device_from_OF_node(nd, &pci_bus, &pci_devfn))
+                        pcidev = pci_find_slot(pci_bus, pci_devfn);
+                if (pcidev) break;
+                nd = nd->parent;
+        }
+        if (pcidev)
+                parent = find_parent_pci_resource(pcidev, &node->addrs[index]);
+        if (!parent) {
+                printk(KERN_WARNING "request_OF_resource(%s), parent not found\n",
+                        node->name);
+                goto fail;
+        }
+
+        res = __request_region(parent, node->addrs[index].address,
+                               node->addrs[index].size, NULL);
+        if (!res)
+                goto fail;
+        nlen = strlen(node->name);
+        plen = name_postfix ? strlen(name_postfix) : 0;
+        res->name = (const char *)kmalloc(nlen+plen+1, GFP_KERNEL);
+        if (res->name) {
+                strcpy((char *)res->name, node->name);
+                if (plen)
+                        strcpy((char *)res->name+nlen, name_postfix);
+        }
+        return res;
+fail:
+        return NULL;
+}
+EXPORT_SYMBOL(request_OF_resource);
+
+int release_OF_resource(struct device_node *node, int index)
+{
+        struct pci_dev* pcidev;
+        u8 pci_bus, pci_devfn;
+        unsigned long iomask, start, end;
+        struct device_node* nd;
+        struct resource* parent;
+        struct resource *res = NULL;
+
+        if (index >= node->n_addrs)
+                return -EINVAL;
+
+        /* Sanity check on bus space */
+        iomask = bus_space_to_resource_flags(node->addrs[index].space);
+        if (iomask & IORESOURCE_MEM)
+                parent = &iomem_resource;
+        else if (iomask & IORESOURCE_IO)
+                parent = &ioport_resource;
+        else
+                return -EINVAL;
+
+        /* Find a PCI parent if any */
+        nd = node;
+        pcidev = NULL;
+        while(nd) {
+                if (!pci_device_from_OF_node(nd, &pci_bus, &pci_devfn))
+                        pcidev = pci_find_slot(pci_bus, pci_devfn);
+                if (pcidev) break;
+                nd = nd->parent;
+        }
+        if (pcidev)
+                parent = find_parent_pci_resource(pcidev, &node->addrs[index]);
+        if (!parent) {
+                printk(KERN_WARNING "release_OF_resource(%s), parent not found\n",
+                        node->name);
+                return -ENODEV;
+        }
+
+        /* Find us in the parent and its childs */
+        res = parent->child;
+        start = node->addrs[index].address;
+        end = start + node->addrs[index].size - 1;
+        while (res) {
+                if (res->start == start && res->end == end &&
+                    (res->flags & IORESOURCE_BUSY))
+                        break;
+                if (res->start <= start && res->end >= end)
+                        res = res->child;
+                else
+                        res = res->sibling;
+        }
+        if (!res)
+                return -ENODEV;
+
+        if (res->name) {
+                kfree(res->name);
+                res->name = NULL;
+        }
+        release_resource(res);
+        kfree(res);
+
+        return 0;
+}
+EXPORT_SYMBOL(release_OF_resource);
+#endif /* CONFIG_PCI */
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
new file mode 100644
index 000000000000..9750b3cd8ecd
--- /dev/null
+++ b/arch/powerpc/kernel/prom_init.c
@@ -0,0 +1,2109 @@
+/*
+ * Procedures for interfacing to Open Firmware.
+ *
+ * Paul Mackerras       August 1996.
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ * 
+ *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
+ *    {engebret|bergner}@us.ibm.com 
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG_PROM
+
+#include <stdarg.h>
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/threads.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/proc_fs.h>
+#include <linux/stringify.h>
+#include <linux/delay.h>
+#include <linux/initrd.h>
+#include <linux/bitops.h>
+#include <asm/prom.h>
+#include <asm/rtas.h>
+#include <asm/page.h>
+#include <asm/processor.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/system.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/pci.h>
+#include <asm/iommu.h>
+#include <asm/btext.h>
+#include <asm/sections.h>
+#include <asm/machdep.h>
+
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+#include <linux/linux_logo.h>
+extern const struct linux_logo logo_linux_clut224;
+#endif
+
+/*
+ * Properties whose value is longer than this get excluded from our
+ * copy of the device tree. This value does need to be big enough to
+ * ensure that we don't lose things like the interrupt-map property
+ * on a PCI-PCI bridge.
+ */
+#define MAX_PROPERTY_LENGTH     (1UL * 1024 * 1024)
+
+/*
+ * Eventually bump that one up
+ */
+#define DEVTREE_CHUNK_SIZE      0x100000
+
+/*
+ * This is the size of the local memory reserve map that gets copied
+ * into the boot params passed to the kernel. That size is totally
+ * flexible as the kernel just reads the list until it encounters an
+ * entry with size 0, so it can be changed without breaking binary
+ * compatibility
+ */
+#define MEM_RESERVE_MAP_SIZE    8
+
+/*
+ * prom_init() is called very early on, before the kernel text
+ * and data have been mapped to KERNELBASE.  At this point the code
+ * is running at whatever address it has been loaded at.
+ * On ppc32 we compile with -mrelocatable, which means that references
+ * to extern and static variables get relocated automatically.
+ * On ppc64 we have to relocate the references explicitly with
+ * RELOC.  (Note that strings count as static variables.)
+ *
+ * Because OF may have mapped I/O devices into the area starting at
+ * KERNELBASE, particularly on CHRP machines, we can't safely call
+ * OF once the kernel has been mapped to KERNELBASE.  Therefore all
+ * OF calls must be done within prom_init().
+ *
+ * ADDR is used in calls to call_prom.  The 4th and following
+ * arguments to call_prom should be 32-bit values.
+ * On ppc64, 64 bit values are truncated to 32 bits (and
+ * fortunately don't get interpreted as two arguments).
+ */
+#ifdef CONFIG_PPC64
+#define RELOC(x)        (*PTRRELOC(&(x)))
+#define ADDR(x)         (u32) add_reloc_offset((unsigned long)(x))
+#else
+#define RELOC(x)        (x)
+#define ADDR(x)         (u32) (x)
+#endif
+
+#define PROM_BUG() do {                                         \
+        prom_printf("kernel BUG at %s line 0x%x!\n",            \
+                    RELOC(__FILE__), __LINE__);                 \
+        __asm__ __volatile__(".long " BUG_ILLEGAL_INSTR);       \
+} while (0)
+
+#ifdef DEBUG_PROM
+#define prom_debug(x...)        prom_printf(x)
+#else
+#define prom_debug(x...)
+#endif
+
+#ifdef CONFIG_PPC32
+#define PLATFORM_POWERMAC       _MACH_Pmac
+#define PLATFORM_CHRP           _MACH_chrp
+#endif
+
+
+typedef u32 prom_arg_t;
+
+struct prom_args {
+        u32 service;
+        u32 nargs;
+        u32 nret;
+        prom_arg_t args[10];
+};
+
+struct prom_t {
+        ihandle root;
+        ihandle chosen;
+        int cpu;
+        ihandle stdout;
+        ihandle mmumap;
+};
+
+struct mem_map_entry {
+        unsigned long   base;
+        unsigned long   size;
+};
+
+typedef u32 cell_t;
+
+extern void __start(unsigned long r3, unsigned long r4, unsigned long r5);
+
+#ifdef CONFIG_PPC64
+extern int enter_prom(struct prom_args *args, unsigned long entry);
+#else
+static inline int enter_prom(struct prom_args *args, unsigned long entry)
+{
+        return ((int (*)(struct prom_args *))entry)(args);
+}
+#endif
+
+extern void copy_and_flush(unsigned long dest, unsigned long src,
+                           unsigned long size, unsigned long offset);
+
+/* prom structure */
+static struct prom_t __initdata prom;
+
+static unsigned long prom_entry __initdata;
+
+#define PROM_SCRATCH_SIZE 256
+
+static char __initdata of_stdout_device[256];
+static char __initdata prom_scratch[PROM_SCRATCH_SIZE];
+
+static unsigned long __initdata dt_header_start;
+static unsigned long __initdata dt_struct_start, dt_struct_end;
+static unsigned long __initdata dt_string_start, dt_string_end;
+
+static unsigned long __initdata prom_initrd_start, prom_initrd_end;
+
+#ifdef CONFIG_PPC64
+static int __initdata iommu_force_on;
+static int __initdata ppc64_iommu_off;
+static unsigned long __initdata prom_tce_alloc_start;
+static unsigned long __initdata prom_tce_alloc_end;
+#endif
+
+static int __initdata of_platform;
+
+static char __initdata prom_cmd_line[COMMAND_LINE_SIZE];
+
+static unsigned long __initdata prom_memory_limit;
+
+static unsigned long __initdata alloc_top;
+static unsigned long __initdata alloc_top_high;
+static unsigned long __initdata alloc_bottom;
+static unsigned long __initdata rmo_top;
+static unsigned long __initdata ram_top;
+
+static struct mem_map_entry __initdata mem_reserve_map[MEM_RESERVE_MAP_SIZE];
+static int __initdata mem_reserve_cnt;
+
+static cell_t __initdata regbuf[1024];
+
+
+#define MAX_CPU_THREADS 2
+
+/* TO GO */
+#ifdef CONFIG_HMT
+struct {
+        unsigned int pir;
+        unsigned int threadid;
+} hmt_thread_data[NR_CPUS];
+#endif /* CONFIG_HMT */
+
+/*
+ * Error results ... some OF calls will return "-1" on error, some
+ * will return 0, some will return either. To simplify, here are
+ * macros to use with any ihandle or phandle return value to check if
+ * it is valid
+ */
+
+#define PROM_ERROR              (-1u)
+#define PHANDLE_VALID(p)        ((p) != 0 && (p) != PROM_ERROR)
+#define IHANDLE_VALID(i)        ((i) != 0 && (i) != PROM_ERROR)
+
+
+/* This is the one and *ONLY* place where we actually call open
+ * firmware.
+ */
+
+static int __init call_prom(const char *service, int nargs, int nret, ...)
+{
+        int i;
+        struct prom_args args;
+        va_list list;
+
+        args.service = ADDR(service);
+        args.nargs = nargs;
+        args.nret = nret;
+
+        va_start(list, nret);
+        for (i = 0; i < nargs; i++)
+                args.args[i] = va_arg(list, prom_arg_t);
+        va_end(list);
+
+        for (i = 0; i < nret; i++)
+                args.args[nargs+i] = 0;
+
+        if (enter_prom(&args, RELOC(prom_entry)) < 0)
+                return PROM_ERROR;
+
+        return (nret > 0) ? args.args[nargs] : 0;
+}
+
+static int __init call_prom_ret(const char *service, int nargs, int nret,
+                                prom_arg_t *rets, ...)
+{
+        int i;
+        struct prom_args args;
+        va_list list;
+
+        args.service = ADDR(service);
+        args.nargs = nargs;
+        args.nret = nret;
+
+        va_start(list, rets);
+        for (i = 0; i < nargs; i++)
+                args.args[i] = va_arg(list, prom_arg_t);
+        va_end(list);
+
+        for (i = 0; i < nret; i++)
+                rets[nargs+i] = 0;
+
+        if (enter_prom(&args, RELOC(prom_entry)) < 0)
+                return PROM_ERROR;
+
+        if (rets != NULL)
+                for (i = 1; i < nret; ++i)
+                        rets[i-1] = args.args[nargs+i];
+
+        return (nret > 0) ? args.args[nargs] : 0;
+}
+
+
+static void __init prom_print(const char *msg)
+{
+        const char *p, *q;
+        struct prom_t *_prom = &RELOC(prom);
+
+        if (_prom->stdout == 0)
+                return;
+
+        for (p = msg; *p != 0; p = q) {
+                for (q = p; *q != 0 && *q != '\n'; ++q)
+                        ;
+                if (q > p)
+                        call_prom("write", 3, 1, _prom->stdout, p, q - p);
+                if (*q == 0)
+                        break;
+                ++q;
+                call_prom("write", 3, 1, _prom->stdout, ADDR("\r\n"), 2);
+        }
+}
+
+
+static void __init prom_print_hex(unsigned long val)
+{
+        int i, nibbles = sizeof(val)*2;
+        char buf[sizeof(val)*2+1];
+        struct prom_t *_prom = &RELOC(prom);
+
+        for (i = nibbles-1;  i >= 0;  i--) {
+                buf[i] = (val & 0xf) + '0';
+                if (buf[i] > '9')
+                        buf[i] += ('a'-'0'-10);
+                val >>= 4;
+        }
+        buf[nibbles] = '\0';
+        call_prom("write", 3, 1, _prom->stdout, buf, nibbles);
+}
+
+
+static void __init prom_printf(const char *format, ...)
+{
+        const char *p, *q, *s;
+        va_list args;
+        unsigned long v;
+        struct prom_t *_prom = &RELOC(prom);
+
+        va_start(args, format);
+#ifdef CONFIG_PPC64
+        format = PTRRELOC(format);
+#endif
+        for (p = format; *p != 0; p = q) {
+                for (q = p; *q != 0 && *q != '\n' && *q != '%'; ++q)
+                        ;
+                if (q > p)
+                        call_prom("write", 3, 1, _prom->stdout, p, q - p);
+                if (*q == 0)
+                        break;
+                if (*q == '\n') {
+                        ++q;
+                        call_prom("write", 3, 1, _prom->stdout,
+                                  ADDR("\r\n"), 2);
+                        continue;
+                }
+                ++q;
+                if (*q == 0)
+                        break;
+                switch (*q) {
+                case 's':
+                        ++q;
+                        s = va_arg(args, const char *);
+                        prom_print(s);
+                        break;
+                case 'x':
+                        ++q;
+                        v = va_arg(args, unsigned long);
+                        prom_print_hex(v);
+                        break;
+                }
+        }
+}
+
+
+static unsigned int __init prom_claim(unsigned long virt, unsigned long size,
+                                unsigned long align)
+{
+        int ret;
+        struct prom_t *_prom = &RELOC(prom);
+
+        ret = call_prom("claim", 3, 1, (prom_arg_t)virt, (prom_arg_t)size,
+                        (prom_arg_t)align);
+        if (ret != -1 && _prom->mmumap != 0)
+                /* old pmacs need us to map as well */
+                call_prom("call-method", 6, 1,
+                          ADDR("map"), _prom->mmumap, 0, size, virt, virt);
+        return ret;
+}
+
+static void __init __attribute__((noreturn)) prom_panic(const char *reason)
+{
+#ifdef CONFIG_PPC64
+        reason = PTRRELOC(reason);
+#endif
+        prom_print(reason);
+        /* ToDo: should put up an SRC here on p/iSeries */
+        call_prom("exit", 0, 0);
+
+        for (;;)                        /* should never get here */
+                ;
+}
+
+
+static int __init prom_next_node(phandle *nodep)
+{
+        phandle node;
+
+        if ((node = *nodep) != 0
+            && (*nodep = call_prom("child", 1, 1, node)) != 0)
+                return 1;
+        if ((*nodep = call_prom("peer", 1, 1, node)) != 0)
+                return 1;
+        for (;;) {
+                if ((node = call_prom("parent", 1, 1, node)) == 0)
+                        return 0;
+                if ((*nodep = call_prom("peer", 1, 1, node)) != 0)
+                        return 1;
+        }
+}
+
+static int __init prom_getprop(phandle node, const char *pname,
+                               void *value, size_t valuelen)
+{
+        return call_prom("getprop", 4, 1, node, ADDR(pname),
+                         (u32)(unsigned long) value, (u32) valuelen);
+}
+
+static int __init prom_getproplen(phandle node, const char *pname)
+{
+        return call_prom("getproplen", 2, 1, node, ADDR(pname));
+}
+
+static int __init prom_setprop(phandle node, const char *pname,
+                               void *value, size_t valuelen)
+{
+        return call_prom("setprop", 4, 1, node, ADDR(pname),
+                         (u32)(unsigned long) value, (u32) valuelen);
+}
+
+/* We can't use the standard versions because of RELOC headaches. */
+#define isxdigit(c)     (('0' <= (c) && (c) <= '9') \
+                         || ('a' <= (c) && (c) <= 'f') \
+                         || ('A' <= (c) && (c) <= 'F'))
+
+#define isdigit(c)      ('0' <= (c) && (c) <= '9')
+#define islower(c)      ('a' <= (c) && (c) <= 'z')
+#define toupper(c)      (islower(c) ? ((c) - 'a' + 'A') : (c))
+
+unsigned long prom_strtoul(const char *cp, const char **endp)
+{
+        unsigned long result = 0, base = 10, value;
+
+        if (*cp == '0') {
+                base = 8;
+                cp++;
+                if (toupper(*cp) == 'X') {
+                        cp++;
+                        base = 16;
+                }
+        }
+
+        while (isxdigit(*cp) &&
+               (value = isdigit(*cp) ? *cp - '0' : toupper(*cp) - 'A' + 10) < base) {
+                result = result * base + value;
+                cp++;
+        }
+
+        if (endp)
+                *endp = cp;
+
+        return result;
+}
+
+unsigned long prom_memparse(const char *ptr, const char **retptr)
+{
+        unsigned long ret = prom_strtoul(ptr, retptr);
+        int shift = 0;
+
+        /*
+         * We can't use a switch here because GCC *may* generate a
+         * jump table which won't work, because we're not running at
+         * the address we're linked at.
+         */
+        if ('G' == **retptr || 'g' == **retptr)
+                shift = 30;
+
+        if ('M' == **retptr || 'm' == **retptr)
+                shift = 20;
+
+        if ('K' == **retptr || 'k' == **retptr)
+                shift = 10;
+
+        if (shift) {
+                ret <<= shift;
+                (*retptr)++;
+        }
+
+        return ret;
+}
+
+/*
+ * Early parsing of the command line passed to the kernel, used for
+ * "mem=x" and the options that affect the iommu
+ */
+static void __init early_cmdline_parse(void)
+{
+        struct prom_t *_prom = &RELOC(prom);
+        char *opt, *p;
+        int l = 0;
+
+        RELOC(prom_cmd_line[0]) = 0;
+        p = RELOC(prom_cmd_line);
+        if ((long)_prom->chosen > 0)
+                l = prom_getprop(_prom->chosen, "bootargs", p, COMMAND_LINE_SIZE-1);
+#ifdef CONFIG_CMDLINE
+        if (l == 0) /* dbl check */
+                strlcpy(RELOC(prom_cmd_line),
+                        RELOC(CONFIG_CMDLINE), sizeof(prom_cmd_line));
+#endif /* CONFIG_CMDLINE */
+        prom_printf("command line: %s\n", RELOC(prom_cmd_line));
+
+#ifdef CONFIG_PPC64
+        opt = strstr(RELOC(prom_cmd_line), RELOC("iommu="));
+        if (opt) {
+                prom_printf("iommu opt is: %s\n", opt);
+                opt += 6;
+                while (*opt && *opt == ' ')
+                        opt++;
+                if (!strncmp(opt, RELOC("off"), 3))
+                        RELOC(ppc64_iommu_off) = 1;
+                else if (!strncmp(opt, RELOC("force"), 5))
+                        RELOC(iommu_force_on) = 1;
+        }
+#endif
+
+        opt = strstr(RELOC(prom_cmd_line), RELOC("mem="));
+        if (opt) {
+                opt += 4;
+                RELOC(prom_memory_limit) = prom_memparse(opt, (const char **)&opt);
+#ifdef CONFIG_PPC64
+                /* Align to 16 MB == size of ppc64 large page */
+                RELOC(prom_memory_limit) = ALIGN(RELOC(prom_memory_limit), 0x1000000);
+#endif
+        }
+}
+
+#ifdef CONFIG_PPC_PSERIES
+/*
+ * To tell the firmware what our capabilities are, we have to pass
+ * it a fake 32-bit ELF header containing a couple of PT_NOTE sections
+ * that contain structures that contain the actual values.
+ */
+static struct fake_elf {
+        Elf32_Ehdr      elfhdr;
+        Elf32_Phdr      phdr[2];
+        struct chrpnote {
+                u32     namesz;
+                u32     descsz;
+                u32     type;
+                char    name[8];        /* "PowerPC" */
+                struct chrpdesc {
+                        u32     real_mode;
+                        u32     real_base;
+                        u32     real_size;
+                        u32     virt_base;
+                        u32     virt_size;
+                        u32     load_base;
+                } chrpdesc;
+        } chrpnote;
+        struct rpanote {
+                u32     namesz;
+                u32     descsz;
+                u32     type;
+                char    name[24];       /* "IBM,RPA-Client-Config" */
+                struct rpadesc {
+                        u32     lpar_affinity;
+                        u32     min_rmo_size;
+                        u32     min_rmo_percent;
+                        u32     max_pft_size;
+                        u32     splpar;
+                        u32     min_load;
+                        u32     new_mem_def;
+                        u32     ignore_me;
+                } rpadesc;
+        } rpanote;
+} fake_elf = {
+        .elfhdr = {
+                .e_ident = { 0x7f, 'E', 'L', 'F',
+                             ELFCLASS32, ELFDATA2MSB, EV_CURRENT },
+                .e_type = ET_EXEC,      /* yeah right */
+                .e_machine = EM_PPC,
+                .e_version = EV_CURRENT,
+                .e_phoff = offsetof(struct fake_elf, phdr),
+                .e_phentsize = sizeof(Elf32_Phdr),
+                .e_phnum = 2
+        },
+        .phdr = {
+                [0] = {
+                        .p_type = PT_NOTE,
+                        .p_offset = offsetof(struct fake_elf, chrpnote),
+                        .p_filesz = sizeof(struct chrpnote)
+                }, [1] = {
+                        .p_type = PT_NOTE,
+                        .p_offset = offsetof(struct fake_elf, rpanote),
+                        .p_filesz = sizeof(struct rpanote)
+                }
+        },
+        .chrpnote = {
+                .namesz = sizeof("PowerPC"),
+                .descsz = sizeof(struct chrpdesc),
+                .type = 0x1275,
+                .name = "PowerPC",
+                .chrpdesc = {
+                        .real_mode = ~0U,       /* ~0 means "don't care" */
+                        .real_base = ~0U,
+                        .real_size = ~0U,
+                        .virt_base = ~0U,
+                        .virt_size = ~0U,
+                        .load_base = ~0U
+                },
+        },
+        .rpanote = {
+                .namesz = sizeof("IBM,RPA-Client-Config"),
+                .descsz = sizeof(struct rpadesc),
+                .type = 0x12759999,
+                .name = "IBM,RPA-Client-Config",
+                .rpadesc = {
+                        .lpar_affinity = 0,
+                        .min_rmo_size = 64,     /* in megabytes */
+                        .min_rmo_percent = 0,
+                        .max_pft_size = 48,     /* 2^48 bytes max PFT size */
+                        .splpar = 1,
+                        .min_load = ~0U,
+                        .new_mem_def = 0
+                }
+        }
+};
+
+static void __init prom_send_capabilities(void)
+{
+        ihandle elfloader;
+
+        elfloader = call_prom("open", 1, 1, ADDR("/packages/elf-loader"));
+        if (elfloader == 0) {
+                prom_printf("couldn't open /packages/elf-loader\n");
+                return;
+        }
+        call_prom("call-method", 3, 1, ADDR("process-elf-header"),
+                        elfloader, ADDR(&fake_elf));
+        call_prom("close", 1, 0, elfloader);
+}
+#endif
+
+/*
+ * Memory allocation strategy... our layout is normally:
+ *
+ *  at 14Mb or more we have vmlinux, then a gap and initrd.  In some
+ *  rare cases, initrd might end up being before the kernel though.
+ *  We assume this won't override the final kernel at 0, we have no
+ *  provision to handle that in this version, but it should hopefully
+ *  never happen.
+ *
+ *  alloc_top is set to the top of RMO, eventually shrink down if the
+ *  TCEs overlap
+ *
+ *  alloc_bottom is set to the top of kernel/initrd
+ *
+ *  from there, allocations are done this way : rtas is allocated
+ *  topmost, and the device-tree is allocated from the bottom. We try
+ *  to grow the device-tree allocation as we progress. If we can't,
+ *  then we fail, we don't currently have a facility to restart
+ *  elsewhere, but that shouldn't be necessary.
+ *
+ *  Note that calls to reserve_mem have to be done explicitly, memory
+ *  allocated with either alloc_up or alloc_down isn't automatically
+ *  reserved.
+ */
+
+
+/*
+ * Allocates memory in the RMO upward from the kernel/initrd
+ *
+ * When align is 0, this is a special case, it means to allocate in place
+ * at the current location of alloc_bottom or fail (that is basically
+ * extending the previous allocation). Used for the device-tree flattening
+ */
+static unsigned long __init alloc_up(unsigned long size, unsigned long align)
+{
+        unsigned long base = RELOC(alloc_bottom);
+        unsigned long addr = 0;
+
+        if (align)
+                base = _ALIGN_UP(base, align);
+        prom_debug("alloc_up(%x, %x)\n", size, align);
+        if (RELOC(ram_top) == 0)
+                prom_panic("alloc_up() called with mem not initialized\n");
+
+        if (align)
+                base = _ALIGN_UP(RELOC(alloc_bottom), align);
+        else
+                base = RELOC(alloc_bottom);
+
+        for(; (base + size) <= RELOC(alloc_top); 
+            base = _ALIGN_UP(base + 0x100000, align)) {
+                prom_debug("    trying: 0x%x\n\r", base);
+                addr = (unsigned long)prom_claim(base, size, 0);
+                if (addr != PROM_ERROR && addr != 0)
+                        break;
+                addr = 0;
+                if (align == 0)
+                        break;
+        }
+        if (addr == 0)
+                return 0;
+        RELOC(alloc_bottom) = addr;
+
+        prom_debug(" -> %x\n", addr);
+        prom_debug("  alloc_bottom : %x\n", RELOC(alloc_bottom));
+        prom_debug("  alloc_top    : %x\n", RELOC(alloc_top));
+        prom_debug("  alloc_top_hi : %x\n", RELOC(alloc_top_high));
+        prom_debug("  rmo_top      : %x\n", RELOC(rmo_top));
+        prom_debug("  ram_top      : %x\n", RELOC(ram_top));
+
+        return addr;
+}
+
+/*
+ * Allocates memory downward, either from top of RMO, or if highmem
+ * is set, from the top of RAM.  Note that this one doesn't handle
+ * failures.  It does claim memory if highmem is not set.
+ */
+static unsigned long __init alloc_down(unsigned long size, unsigned long align,
+                                       int highmem)
+{
+        unsigned long base, addr = 0;
+
+        prom_debug("alloc_down(%x, %x, %s)\n", size, align,
+                   highmem ? RELOC("(high)") : RELOC("(low)"));
+        if (RELOC(ram_top) == 0)
+                prom_panic("alloc_down() called with mem not initialized\n");
+
+        if (highmem) {
+                /* Carve out storage for the TCE table. */
+                addr = _ALIGN_DOWN(RELOC(alloc_top_high) - size, align);
+                if (addr <= RELOC(alloc_bottom))
+                        return 0;
+                /* Will we bump into the RMO ? If yes, check out that we
+                 * didn't overlap existing allocations there, if we did,
+                 * we are dead, we must be the first in town !
+                 */
+                if (addr < RELOC(rmo_top)) {
+                        /* Good, we are first */
+                        if (RELOC(alloc_top) == RELOC(rmo_top))
+                                RELOC(alloc_top) = RELOC(rmo_top) = addr;
+                        else
+                                return 0;
+                }
+                RELOC(alloc_top_high) = addr;
+                goto bail;
+        }
+
+        base = _ALIGN_DOWN(RELOC(alloc_top) - size, align);
+        for (; base > RELOC(alloc_bottom);
+             base = _ALIGN_DOWN(base - 0x100000, align))  {
+                prom_debug("    trying: 0x%x\n\r", base);
+                addr = (unsigned long)prom_claim(base, size, 0);
+                if (addr != PROM_ERROR && addr != 0)
+                        break;
+                addr = 0;
+        }
+        if (addr == 0)
+                return 0;
+        RELOC(alloc_top) = addr;
+
+ bail:
+        prom_debug(" -> %x\n", addr);
+        prom_debug("  alloc_bottom : %x\n", RELOC(alloc_bottom));
+        prom_debug("  alloc_top    : %x\n", RELOC(alloc_top));
+        prom_debug("  alloc_top_hi : %x\n", RELOC(alloc_top_high));
+        prom_debug("  rmo_top      : %x\n", RELOC(rmo_top));
+        prom_debug("  ram_top      : %x\n", RELOC(ram_top));
+
+        return addr;
+}
+
+/*
+ * Parse a "reg" cell
+ */
+static unsigned long __init prom_next_cell(int s, cell_t **cellp)
+{
+        cell_t *p = *cellp;
+        unsigned long r = 0;
+
+        /* Ignore more than 2 cells */
+        while (s > sizeof(unsigned long) / 4) {
+                p++;
+                s--;
+        }
+        r = *p++;
+#ifdef CONFIG_PPC64
+        if (s > 1) {
+                r <<= 32;
+                r |= *(p++);
+        }
+#endif
+        *cellp = p;
+        return r;
+}
+
+/*
+ * Very dumb function for adding to the memory reserve list, but
+ * we don't need anything smarter at this point
+ *
+ * XXX Eventually check for collisions.  They should NEVER happen.
+ * If problems seem to show up, it would be a good start to track
+ * them down.
+ */
+static void reserve_mem(unsigned long base, unsigned long size)
+{
+        unsigned long top = base + size;
+        unsigned long cnt = RELOC(mem_reserve_cnt);
+
+        if (size == 0)
+                return;
+
+        /* We need to always keep one empty entry so that we
+         * have our terminator with "size" set to 0 since we are
+         * dumb and just copy this entire array to the boot params
+         */
+        base = _ALIGN_DOWN(base, PAGE_SIZE);
+        top = _ALIGN_UP(top, PAGE_SIZE);
+        size = top - base;
+
+        if (cnt >= (MEM_RESERVE_MAP_SIZE - 1))
+                prom_panic("Memory reserve map exhausted !\n");
+        RELOC(mem_reserve_map)[cnt].base = base;
+        RELOC(mem_reserve_map)[cnt].size = size;
+        RELOC(mem_reserve_cnt) = cnt + 1;
+}
+
+/*
+ * Initialize memory allocation mecanism, parse "memory" nodes and
+ * obtain that way the top of memory and RMO to setup out local allocator
+ */
+static void __init prom_init_mem(void)
+{
+        phandle node;
+        char *path, type[64];
+        unsigned int plen;
+        cell_t *p, *endp;
+        struct prom_t *_prom = &RELOC(prom);
+        u32 rac, rsc;
+
+        /*
+         * We iterate the memory nodes to find
+         * 1) top of RMO (first node)
+         * 2) top of memory
+         */
+        rac = 2;
+        prom_getprop(_prom->root, "#address-cells", &rac, sizeof(rac));
+        rsc = 1;
+        prom_getprop(_prom->root, "#size-cells", &rsc, sizeof(rsc));
+        prom_debug("root_addr_cells: %x\n", (unsigned long) rac);
+        prom_debug("root_size_cells: %x\n", (unsigned long) rsc);
+
+        prom_debug("scanning memory:\n");
+        path = RELOC(prom_scratch);
+
+        for (node = 0; prom_next_node(&node); ) {
+                type[0] = 0;
+                prom_getprop(node, "device_type", type, sizeof(type));
+
+                if (type[0] == 0) {
+                        /*
+                         * CHRP Longtrail machines have no device_type
+                         * on the memory node, so check the name instead...
+                         */
+                        prom_getprop(node, "name", type, sizeof(type));
+                }
+                if (strcmp(type, RELOC("memory")))
+                        continue;
+
+                plen = prom_getprop(node, "reg", RELOC(regbuf), sizeof(regbuf));
+                if (plen > sizeof(regbuf)) {
+                        prom_printf("memory node too large for buffer !\n");
+                        plen = sizeof(regbuf);
+                }
+                p = RELOC(regbuf);
+                endp = p + (plen / sizeof(cell_t));
+
+#ifdef DEBUG_PROM
+                memset(path, 0, PROM_SCRATCH_SIZE);
+                call_prom("package-to-path", 3, 1, node, path, PROM_SCRATCH_SIZE-1);
+                prom_debug("  node %s :\n", path);
+#endif /* DEBUG_PROM */
+
+                while ((endp - p) >= (rac + rsc)) {
+                        unsigned long base, size;
+
+                        base = prom_next_cell(rac, &p);
+                        size = prom_next_cell(rsc, &p);
+
+                        if (size == 0)
+                                continue;
+                        prom_debug("    %x %x\n", base, size);
+                        if (base == 0)
+                                RELOC(rmo_top) = size;
+                        if ((base + size) > RELOC(ram_top))
+                                RELOC(ram_top) = base + size;
+                }
+        }
+
+        RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000);
+
+        /* Check if we have an initrd after the kernel, if we do move our bottom
+         * point to after it
+         */
+        if (RELOC(prom_initrd_start)) {
+                if (RELOC(prom_initrd_end) > RELOC(alloc_bottom))
+                        RELOC(alloc_bottom) = PAGE_ALIGN(RELOC(prom_initrd_end));
+        }
+
+        /*
+         * If prom_memory_limit is set we reduce the upper limits *except* for
+         * alloc_top_high. This must be the real top of RAM so we can put
+         * TCE's up there.
+         */
+
+        RELOC(alloc_top_high) = RELOC(ram_top);
+
+        if (RELOC(prom_memory_limit)) {
+                if (RELOC(prom_memory_limit) <= RELOC(alloc_bottom)) {
+                        prom_printf("Ignoring mem=%x <= alloc_bottom.\n",
+                                RELOC(prom_memory_limit));
+                        RELOC(prom_memory_limit) = 0;
+                } else if (RELOC(prom_memory_limit) >= RELOC(ram_top)) {
+                        prom_printf("Ignoring mem=%x >= ram_top.\n",
+                                RELOC(prom_memory_limit));
+                        RELOC(prom_memory_limit) = 0;
+                } else {
+                        RELOC(ram_top) = RELOC(prom_memory_limit);
+                        RELOC(rmo_top) = min(RELOC(rmo_top), RELOC(prom_memory_limit));
+                }
+        }
+
+        /*
+         * Setup our top alloc point, that is top of RMO or top of
+         * segment 0 when running non-LPAR.
+         * Some RS64 machines have buggy firmware where claims up at
+         * 1GB fail.  Cap at 768MB as a workaround.
+         * Since 768MB is plenty of room, and we need to cap to something
+         * reasonable on 32-bit, cap at 768MB on all machines.
+         */
+        if (!RELOC(rmo_top))
+                RELOC(rmo_top) = RELOC(ram_top);
+        RELOC(rmo_top) = min(0x30000000ul, RELOC(rmo_top));
+        RELOC(alloc_top) = RELOC(rmo_top);
+
+        prom_printf("memory layout at init:\n");
+        prom_printf("  memory_limit : %x (16 MB aligned)\n", RELOC(prom_memory_limit));
+        prom_printf("  alloc_bottom : %x\n", RELOC(alloc_bottom));
+        prom_printf("  alloc_top    : %x\n", RELOC(alloc_top));
+        prom_printf("  alloc_top_hi : %x\n", RELOC(alloc_top_high));
+        prom_printf("  rmo_top      : %x\n", RELOC(rmo_top));
+        prom_printf("  ram_top      : %x\n", RELOC(ram_top));
+}
+
+
+/*
+ * Allocate room for and instantiate RTAS
+ */
+static void __init prom_instantiate_rtas(void)
+{
+        phandle rtas_node;
+        ihandle rtas_inst;
+        u32 base, entry = 0;
+        u32 size = 0;
+
+        prom_debug("prom_instantiate_rtas: start...\n");
+
+        rtas_node = call_prom("finddevice", 1, 1, ADDR("/rtas"));
+        prom_debug("rtas_node: %x\n", rtas_node);
+        if (!PHANDLE_VALID(rtas_node))
+                return;
+
+        prom_getprop(rtas_node, "rtas-size", &size, sizeof(size));
+        if (size == 0)
+                return;
+
+        base = alloc_down(size, PAGE_SIZE, 0);
+        if (base == 0) {
+                prom_printf("RTAS allocation failed !\n");
+                return;
+        }
+
+        rtas_inst = call_prom("open", 1, 1, ADDR("/rtas"));
+        if (!IHANDLE_VALID(rtas_inst)) {
+                prom_printf("opening rtas package failed");
+                return;
+        }
+
+        prom_printf("instantiating rtas at 0x%x ...", base);
+
+        if (call_prom_ret("call-method", 3, 2, &entry,
+                          ADDR("instantiate-rtas"),
+                          rtas_inst, base) == PROM_ERROR
+            || entry == 0) {
+                prom_printf(" failed\n");
+                return;
+        }
+        prom_printf(" done\n");
+
+        reserve_mem(base, size);
+
+        prom_setprop(rtas_node, "linux,rtas-base", &base, sizeof(base));
+        prom_setprop(rtas_node, "linux,rtas-entry", &entry, sizeof(entry));
+
+        prom_debug("rtas base     = 0x%x\n", base);
+        prom_debug("rtas entry    = 0x%x\n", entry);
+        prom_debug("rtas size     = 0x%x\n", (long)size);
+
+        prom_debug("prom_instantiate_rtas: end...\n");
+}
+
+#ifdef CONFIG_PPC64
+/*
+ * Allocate room for and initialize TCE tables
+ */
+static void __init prom_initialize_tce_table(void)
+{
+        phandle node;
+        ihandle phb_node;
+        char compatible[64], type[64], model[64];
+        char *path = RELOC(prom_scratch);
+        u64 base, align;
+        u32 minalign, minsize;
+        u64 tce_entry, *tce_entryp;
+        u64 local_alloc_top, local_alloc_bottom;
+        u64 i;
+
+        if (RELOC(ppc64_iommu_off))
+                return;
+
+        prom_debug("starting prom_initialize_tce_table\n");
+
+        /* Cache current top of allocs so we reserve a single block */
+        local_alloc_top = RELOC(alloc_top_high);
+        local_alloc_bottom = local_alloc_top;
+
+        /* Search all nodes looking for PHBs. */
+        for (node = 0; prom_next_node(&node); ) {
+                compatible[0] = 0;
+                type[0] = 0;
+                model[0] = 0;
+                prom_getprop(node, "compatible",
+                             compatible, sizeof(compatible));
+                prom_getprop(node, "device_type", type, sizeof(type));
+                prom_getprop(node, "model", model, sizeof(model));
+
+                if ((type[0] == 0) || (strstr(type, RELOC("pci")) == NULL))
+                        continue;
+
+                /* Keep the old logic in tack to avoid regression. */
+                if (compatible[0] != 0) {
+                        if ((strstr(compatible, RELOC("python")) == NULL) &&
+                            (strstr(compatible, RELOC("Speedwagon")) == NULL) &&
+                            (strstr(compatible, RELOC("Winnipeg")) == NULL))
+                                continue;
+                } else if (model[0] != 0) {
+                        if ((strstr(model, RELOC("ython")) == NULL) &&
+                            (strstr(model, RELOC("peedwagon")) == NULL) &&
+                            (strstr(model, RELOC("innipeg")) == NULL))
+                                continue;
+                }
+
+                if (prom_getprop(node, "tce-table-minalign", &minalign,
+                                 sizeof(minalign)) == PROM_ERROR)
+                        minalign = 0;
+                if (prom_getprop(node, "tce-table-minsize", &minsize,
+                                 sizeof(minsize)) == PROM_ERROR)
+                        minsize = 4UL << 20;
+
+                /*
+                 * Even though we read what OF wants, we just set the table
+                 * size to 4 MB.  This is enough to map 2GB of PCI DMA space.
+                 * By doing this, we avoid the pitfalls of trying to DMA to
+                 * MMIO space and the DMA alias hole.
+                 *
+                 * On POWER4, firmware sets the TCE region by assuming
+                 * each TCE table is 8MB. Using this memory for anything
+                 * else will impact performance, so we always allocate 8MB.
+                 * Anton
+                 */
+                if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p))
+                        minsize = 8UL << 20;
+                else
+                        minsize = 4UL << 20;
+
+                /* Align to the greater of the align or size */
+                align = max(minalign, minsize);
+                base = alloc_down(minsize, align, 1);
+                if (base == 0)
+                        prom_panic("ERROR, cannot find space for TCE table.\n");
+                if (base < local_alloc_bottom)
+                        local_alloc_bottom = base;
+
+                /* Save away the TCE table attributes for later use. */
+                prom_setprop(node, "linux,tce-base", &base, sizeof(base));
+                prom_setprop(node, "linux,tce-size", &minsize, sizeof(minsize));
+
+                /* It seems OF doesn't null-terminate the path :-( */
+                memset(path, 0, sizeof(path));
+                /* Call OF to setup the TCE hardware */
+                if (call_prom("package-to-path", 3, 1, node,
+                              path, PROM_SCRATCH_SIZE-1) == PROM_ERROR) {
+                        prom_printf("package-to-path failed\n");
+                }
+
+                prom_debug("TCE table: %s\n", path);
+                prom_debug("\tnode = 0x%x\n", node);
+                prom_debug("\tbase = 0x%x\n", base);
+                prom_debug("\tsize = 0x%x\n", minsize);
+
+                /* Initialize the table to have a one-to-one mapping
+                 * over the allocated size.
+                 */
+                tce_entryp = (unsigned long *)base;
+                for (i = 0; i < (minsize >> 3) ;tce_entryp++, i++) {
+                        tce_entry = (i << PAGE_SHIFT);
+                        tce_entry |= 0x3;
+                        *tce_entryp = tce_entry;
+                }
+
+                prom_printf("opening PHB %s", path);
+                phb_node = call_prom("open", 1, 1, path);
+                if (phb_node == 0)
+                        prom_printf("... failed\n");
+                else
+                        prom_printf("... done\n");
+
+                call_prom("call-method", 6, 0, ADDR("set-64-bit-addressing"),
+                          phb_node, -1, minsize,
+                          (u32) base, (u32) (base >> 32));
+                call_prom("close", 1, 0, phb_node);
+        }
+
+        reserve_mem(local_alloc_bottom, local_alloc_top - local_alloc_bottom);
+
+        if (RELOC(prom_memory_limit)) {
+                /*
+                 * We align the start to a 16MB boundary so we can map
+                 * the TCE area using large pages if possible.
+                 * The end should be the top of RAM so no need to align it.
+                 */
+                RELOC(prom_tce_alloc_start) = _ALIGN_DOWN(local_alloc_bottom,
+                                                          0x1000000);
+                RELOC(prom_tce_alloc_end) = local_alloc_top;
+        }
+
+        /* Flag the first invalid entry */
+        prom_debug("ending prom_initialize_tce_table\n");
+}
+#endif
+
+/*
+ * With CHRP SMP we need to use the OF to start the other processors.
+ * We can't wait until smp_boot_cpus (the OF is trashed by then)
+ * so we have to put the processors into a holding pattern controlled
+ * by the kernel (not OF) before we destroy the OF.
+ *
+ * This uses a chunk of low memory, puts some holding pattern
+ * code there and sends the other processors off to there until
+ * smp_boot_cpus tells them to do something.  The holding pattern
+ * checks that address until its cpu # is there, when it is that
+ * cpu jumps to __secondary_start().  smp_boot_cpus() takes care
+ * of setting those values.
+ *
+ * We also use physical address 0x4 here to tell when a cpu
+ * is in its holding pattern code.
+ *
+ * -- Cort
+ */
+extern void __secondary_hold(void);
+extern unsigned long __secondary_hold_spinloop;
+extern unsigned long __secondary_hold_acknowledge;
+
+/*
+ * We want to reference the copy of __secondary_hold_* in the
+ * 0 - 0x100 address range
+ */
+#define LOW_ADDR(x)     (((unsigned long) &(x)) & 0xff)
+
+static void __init prom_hold_cpus(void)
+{
+        unsigned long i;
+        unsigned int reg;
+        phandle node;
+        char type[64];
+        int cpuid = 0;
+        unsigned int interrupt_server[MAX_CPU_THREADS];
+        unsigned int cpu_threads, hw_cpu_num;
+        int propsize;
+        struct prom_t *_prom = &RELOC(prom);
+        unsigned long *spinloop
+                = (void *) LOW_ADDR(__secondary_hold_spinloop);
+        unsigned long *acknowledge
+                = (void *) LOW_ADDR(__secondary_hold_acknowledge);
+#ifdef CONFIG_PPC64
+        /* __secondary_hold is actually a descriptor, not the text address */
+        unsigned long secondary_hold
+                = __pa(*PTRRELOC((unsigned long *)__secondary_hold));
+#else
+        unsigned long secondary_hold = LOW_ADDR(__secondary_hold);
+#endif
+
+        prom_debug("prom_hold_cpus: start...\n");
+        prom_debug("    1) spinloop       = 0x%x\n", (unsigned long)spinloop);
+        prom_debug("    1) *spinloop      = 0x%x\n", *spinloop);
+        prom_debug("    1) acknowledge    = 0x%x\n",
+                   (unsigned long)acknowledge);
+        prom_debug("    1) *acknowledge   = 0x%x\n", *acknowledge);
+        prom_debug("    1) secondary_hold = 0x%x\n", secondary_hold);
+
+        /* Set the common spinloop variable, so all of the secondary cpus
+         * will block when they are awakened from their OF spinloop.
+         * This must occur for both SMP and non SMP kernels, since OF will
+         * be trashed when we move the kernel.
+         */
+        *spinloop = 0;
+
+#ifdef CONFIG_HMT
+        for (i = 0; i < NR_CPUS; i++)
+                RELOC(hmt_thread_data)[i].pir = 0xdeadbeef;
+#endif
+        /* look for cpus */
+        for (node = 0; prom_next_node(&node); ) {
+                type[0] = 0;
+                prom_getprop(node, "device_type", type, sizeof(type));
+                if (strcmp(type, RELOC("cpu")) != 0)
+                        continue;
+
+                /* Skip non-configured cpus. */
+                if (prom_getprop(node, "status", type, sizeof(type)) > 0)
+                        if (strcmp(type, RELOC("okay")) != 0)
+                                continue;
+
+                reg = -1;
+                prom_getprop(node, "reg", &reg, sizeof(reg));
+
+                prom_debug("\ncpuid        = 0x%x\n", cpuid);
+                prom_debug("cpu hw idx   = 0x%x\n", reg);
+
+                /* Init the acknowledge var which will be reset by
+                 * the secondary cpu when it awakens from its OF
+                 * spinloop.
+                 */
+                *acknowledge = (unsigned long)-1;
+
+                propsize = prom_getprop(node, "ibm,ppc-interrupt-server#s",
+                                        &interrupt_server,
+                                        sizeof(interrupt_server));
+                if (propsize < 0) {
+                        /* no property.  old hardware has no SMT */
+                        cpu_threads = 1;
+                        interrupt_server[0] = reg; /* fake it with phys id */
+                } else {
+                        /* We have a threaded processor */
+                        cpu_threads = propsize / sizeof(u32);
+                        if (cpu_threads > MAX_CPU_THREADS) {
+                                prom_printf("SMT: too many threads!\n"
+                                            "SMT: found %x, max is %x\n",
+                                            cpu_threads, MAX_CPU_THREADS);
+                                cpu_threads = 1; /* ToDo: panic? */
+                        }
+                }
+
+                hw_cpu_num = interrupt_server[0];
+                if (hw_cpu_num != _prom->cpu) {
+                        /* Primary Thread of non-boot cpu */
+                        prom_printf("%x : starting cpu hw idx %x... ", cpuid, reg);
+                        call_prom("start-cpu", 3, 0, node,
+                                  secondary_hold, reg);
+
+                        for (i = 0; (i < 100000000) && 
+                             (*acknowledge == ((unsigned long)-1)); i++ )
+                                mb();
+
+                        if (*acknowledge == reg)
+                                prom_printf("done\n");
+                        else
+                                prom_printf("failed: %x\n", *acknowledge);
+                }
+#ifdef CONFIG_SMP
+                else
+                        prom_printf("%x : boot cpu     %x\n", cpuid, reg);
+#endif /* CONFIG_SMP */
+
+                /* Reserve cpu #s for secondary threads.   They start later. */
+                cpuid += cpu_threads;
+        }
+#ifdef CONFIG_HMT
+        /* Only enable HMT on processors that provide support. */
+        if (__is_processor(PV_PULSAR) || 
+            __is_processor(PV_ICESTAR) ||
+            __is_processor(PV_SSTAR)) {
+                prom_printf("    starting secondary threads\n");
+
+                for (i = 0; i < NR_CPUS; i += 2) {
+                        if (!cpu_online(i))
+                                continue;
+
+                        if (i == 0) {
+                                unsigned long pir = mfspr(SPRN_PIR);
+                                if (__is_processor(PV_PULSAR)) {
+                                        RELOC(hmt_thread_data)[i].pir = 
+                                                pir & 0x1f;
+                                } else {
+                                        RELOC(hmt_thread_data)[i].pir = 
+                                                pir & 0x3ff;
+                                }
+                        }
+                }
+        } else {
+                prom_printf("Processor is not HMT capable\n");
+        }
+#endif
+
+        if (cpuid > NR_CPUS)
+                prom_printf("WARNING: maximum CPUs (" __stringify(NR_CPUS)
+                            ") exceeded: ignoring extras\n");
+
+        prom_debug("prom_hold_cpus: end...\n");
+}
+
+
+static void __init prom_init_client_services(unsigned long pp)
+{
+        struct prom_t *_prom = &RELOC(prom);
+
+        /* Get a handle to the prom entry point before anything else */
+        RELOC(prom_entry) = pp;
+
+        /* get a handle for the stdout device */
+        _prom->chosen = call_prom("finddevice", 1, 1, ADDR("/chosen"));
+        if (!PHANDLE_VALID(_prom->chosen))
+                prom_panic("cannot find chosen"); /* msg won't be printed :( */
+
+        /* get device tree root */
+        _prom->root = call_prom("finddevice", 1, 1, ADDR("/"));
+        if (!PHANDLE_VALID(_prom->root))
+                prom_panic("cannot find device tree root"); /* msg won't be printed :( */
+
+        _prom->mmumap = 0;
+}
+
+#ifdef CONFIG_PPC32
+/*
+ * For really old powermacs, we need to map things we claim.
+ * For that, we need the ihandle of the mmu.
+ */
+static void __init prom_find_mmu(void)
+{
+        struct prom_t *_prom = &RELOC(prom);
+        phandle oprom;
+        char version[64];
+
+        oprom = call_prom("finddevice", 1, 1, ADDR("/openprom"));
+        if (!PHANDLE_VALID(oprom))
+                return;
+        if (prom_getprop(oprom, "model", version, sizeof(version)) <= 0)
+                return;
+        version[sizeof(version) - 1] = 0;
+        prom_printf("OF version is '%s'\n", version);
+        /* XXX might need to add other versions here */
+        if (strcmp(version, "Open Firmware, 1.0.5") != 0)
+                return;
+        prom_getprop(_prom->chosen, "mmu", &_prom->mmumap,
+                     sizeof(_prom->mmumap));
+}
+#else
+#define prom_find_mmu()
+#endif
+
+static void __init prom_init_stdout(void)
+{
+        struct prom_t *_prom = &RELOC(prom);
+        char *path = RELOC(of_stdout_device);
+        char type[16];
+        u32 val;
+
+        if (prom_getprop(_prom->chosen, "stdout", &val, sizeof(val)) <= 0)
+                prom_panic("cannot find stdout");
+
+        _prom->stdout = val;
+
+        /* Get the full OF pathname of the stdout device */
+        memset(path, 0, 256);
+        call_prom("instance-to-path", 3, 1, _prom->stdout, path, 255);
+        val = call_prom("instance-to-package", 1, 1, _prom->stdout);
+        prom_setprop(_prom->chosen, "linux,stdout-package", &val, sizeof(val));
+        prom_printf("OF stdout device is: %s\n", RELOC(of_stdout_device));
+        prom_setprop(_prom->chosen, "linux,stdout-path",
+                     RELOC(of_stdout_device), strlen(RELOC(of_stdout_device))+1);
+
+        /* If it's a display, note it */
+        memset(type, 0, sizeof(type));
+        prom_getprop(val, "device_type", type, sizeof(type));
+        if (strcmp(type, RELOC("display")) == 0)
+                prom_setprop(val, "linux,boot-display", NULL, 0);
+}
+
+static void __init prom_close_stdin(void)
+{
+        struct prom_t *_prom = &RELOC(prom);
+        ihandle val;
+
+        if (prom_getprop(_prom->chosen, "stdin", &val, sizeof(val)) > 0)
+                call_prom("close", 1, 0, val);
+}
+
+static int __init prom_find_machine_type(void)
+{
+        struct prom_t *_prom = &RELOC(prom);
+        char compat[256];
+        int len, i = 0;
+        phandle rtas;
+
+        len = prom_getprop(_prom->root, "compatible",
+                           compat, sizeof(compat)-1);
+        if (len > 0) {
+                compat[len] = 0;
+                while (i < len) {
+                        char *p = &compat[i];
+                        int sl = strlen(p);
+                        if (sl == 0)
+                                break;
+                        if (strstr(p, RELOC("Power Macintosh")) ||
+                            strstr(p, RELOC("MacRISC")))
+                                return PLATFORM_POWERMAC;
+#ifdef CONFIG_PPC64
+                        if (strstr(p, RELOC("Momentum,Maple")))
+                                return PLATFORM_MAPLE;
+#endif
+                        i += sl + 1;
+                }
+        }
+#ifdef CONFIG_PPC64
+        /* Default to pSeries. We need to know if we are running LPAR */
+        rtas = call_prom("finddevice", 1, 1, ADDR("/rtas"));
+        if (PHANDLE_VALID(rtas)) {
+                int x = prom_getproplen(rtas, "ibm,hypertas-functions");
+                if (x != PROM_ERROR) {
+                        prom_printf("Hypertas detected, assuming LPAR !\n");
+                        return PLATFORM_PSERIES_LPAR;
+                }
+        }
+        return PLATFORM_PSERIES;
+#else
+        return PLATFORM_CHRP;
+#endif
+}
+
+static int __init prom_set_color(ihandle ih, int i, int r, int g, int b)
+{
+        return call_prom("call-method", 6, 1, ADDR("color!"), ih, i, b, g, r);
+}
+
+/*
+ * If we have a display that we don't know how to drive,
+ * we will want to try to execute OF's open method for it
+ * later.  However, OF will probably fall over if we do that
+ * we've taken over the MMU.
+ * So we check whether we will need to open the display,
+ * and if so, open it now.
+ */
+static void __init prom_check_displays(void)
+{
+        char type[16], *path;
+        phandle node;
+        ihandle ih;
+        int i;
+
+        static unsigned char default_colors[] = {
+                0x00, 0x00, 0x00,
+                0x00, 0x00, 0xaa,
+                0x00, 0xaa, 0x00,
+                0x00, 0xaa, 0xaa,
+                0xaa, 0x00, 0x00,
+                0xaa, 0x00, 0xaa,
+                0xaa, 0xaa, 0x00,
+                0xaa, 0xaa, 0xaa,
+                0x55, 0x55, 0x55,
+                0x55, 0x55, 0xff,
+                0x55, 0xff, 0x55,
+                0x55, 0xff, 0xff,
+                0xff, 0x55, 0x55,
+                0xff, 0x55, 0xff,
+                0xff, 0xff, 0x55,
+                0xff, 0xff, 0xff
+        };
+        const unsigned char *clut;
+
+        prom_printf("Looking for displays\n");
+        for (node = 0; prom_next_node(&node); ) {
+                memset(type, 0, sizeof(type));
+                prom_getprop(node, "device_type", type, sizeof(type));
+                if (strcmp(type, RELOC("display")) != 0)
+                        continue;
+
+                /* It seems OF doesn't null-terminate the path :-( */
+                path = RELOC(prom_scratch);
+                memset(path, 0, PROM_SCRATCH_SIZE);
+
+                /*
+                 * leave some room at the end of the path for appending extra
+                 * arguments
+                 */
+                if (call_prom("package-to-path", 3, 1, node, path,
+                              PROM_SCRATCH_SIZE-10) == PROM_ERROR)
+                        continue;
+                prom_printf("found display   : %s, opening ... ", path);
+                
+                ih = call_prom("open", 1, 1, path);
+                if (ih == 0) {
+                        prom_printf("failed\n");
+                        continue;
+                }
+
+                /* Success */
+                prom_printf("done\n");
+                prom_setprop(node, "linux,opened", NULL, 0);
+
+                /* Setup a usable color table when the appropriate
+                 * method is available. Should update this to set-colors */
+                clut = RELOC(default_colors);
+                for (i = 0; i < 32; i++, clut += 3)
+                        if (prom_set_color(ih, i, clut[0], clut[1],
+                                           clut[2]) != 0)
+                                break;
+
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+                clut = PTRRELOC(RELOC(logo_linux_clut224.clut));
+                for (i = 0; i < RELOC(logo_linux_clut224.clutsize); i++, clut += 3)
+                        if (prom_set_color(ih, i + 32, clut[0], clut[1],
+                                           clut[2]) != 0)
+                                break;
+#endif /* CONFIG_LOGO_LINUX_CLUT224 */
+        }
+}
+
+
+/* Return (relocated) pointer to this much memory: moves initrd if reqd. */
+static void __init *make_room(unsigned long *mem_start, unsigned long *mem_end,
+                              unsigned long needed, unsigned long align)
+{
+        void *ret;
+
+        *mem_start = _ALIGN(*mem_start, align);
+        while ((*mem_start + needed) > *mem_end) {
+                unsigned long room, chunk;
+
+                prom_debug("Chunk exhausted, claiming more at %x...\n",
+                           RELOC(alloc_bottom));
+                room = RELOC(alloc_top) - RELOC(alloc_bottom);
+                if (room > DEVTREE_CHUNK_SIZE)
+                        room = DEVTREE_CHUNK_SIZE;
+                if (room < PAGE_SIZE)
+                        prom_panic("No memory for flatten_device_tree (no room)");
+                chunk = alloc_up(room, 0);
+                if (chunk == 0)
+                        prom_panic("No memory for flatten_device_tree (claim failed)");
+                *mem_end = RELOC(alloc_top);
+        }
+
+        ret = (void *)*mem_start;
+        *mem_start += needed;
+
+        return ret;
+}
+
+#define dt_push_token(token, mem_start, mem_end) \
+        do { *((u32 *)make_room(mem_start, mem_end, 4, 4)) = token; } while(0)
+
+static unsigned long __init dt_find_string(char *str)
+{
+        char *s, *os;
+
+        s = os = (char *)RELOC(dt_string_start);
+        s += 4;
+        while (s <  (char *)RELOC(dt_string_end)) {
+                if (strcmp(s, str) == 0)
+                        return s - os;
+                s += strlen(s) + 1;
+        }
+        return 0;
+}
+
+/*
+ * The Open Firmware 1275 specification states properties must be 31 bytes or
+ * less, however not all firmwares obey this. Make it 64 bytes to be safe.
+ */
+#define MAX_PROPERTY_NAME 64
+
+static void __init scan_dt_build_strings(phandle node,
+                                         unsigned long *mem_start,
+                                         unsigned long *mem_end)
+{
+        char *prev_name, *namep, *sstart;
+        unsigned long soff;
+        phandle child;
+
+        sstart =  (char *)RELOC(dt_string_start);
+
+        /* get and store all property names */
+        prev_name = RELOC("");
+        for (;;) {
+                /* 64 is max len of name including nul. */
+                namep = make_room(mem_start, mem_end, MAX_PROPERTY_NAME, 1);
+                if (call_prom("nextprop", 3, 1, node, prev_name, namep) != 1) {
+                        /* No more nodes: unwind alloc */
+                        *mem_start = (unsigned long)namep;
+                        break;
+                }
+
+                /* skip "name" */
+                if (strcmp(namep, RELOC("name")) == 0) {
+                        *mem_start = (unsigned long)namep;
+                        prev_name = RELOC("name");
+                        continue;
+                }
+                /* get/create string entry */
+                soff = dt_find_string(namep);
+                if (soff != 0) {
+                        *mem_start = (unsigned long)namep;
+                        namep = sstart + soff;
+                } else {
+                        /* Trim off some if we can */
+                        *mem_start = (unsigned long)namep + strlen(namep) + 1;
+                        RELOC(dt_string_end) = *mem_start;
+                }
+                prev_name = namep;
+        }
+
+        /* do all our children */
+        child = call_prom("child", 1, 1, node);
+        while (child != 0) {
+                scan_dt_build_strings(child, mem_start, mem_end);
+                child = call_prom("peer", 1, 1, child);
+        }
+}
+
+static void __init scan_dt_build_struct(phandle node, unsigned long *mem_start,
+                                        unsigned long *mem_end)
+{
+        phandle child;
+        char *namep, *prev_name, *sstart, *p, *ep, *lp, *path;
+        unsigned long soff;
+        unsigned char *valp;
+        static char pname[MAX_PROPERTY_NAME];
+        int l, room;
+
+        dt_push_token(OF_DT_BEGIN_NODE, mem_start, mem_end);
+
+        /* get the node's full name */
+        namep = (char *)*mem_start;
+        room = *mem_end - *mem_start;
+        if (room > 255)
+                room = 255;
+        l = call_prom("package-to-path", 3, 1, node, namep, room);
+        if (l >= 0) {
+                /* Didn't fit?  Get more room. */
+                if (l >= room) {
+                        if (l >= *mem_end - *mem_start)
+                                namep = make_room(mem_start, mem_end, l+1, 1);
+                        call_prom("package-to-path", 3, 1, node, namep, l);
+                }
+                namep[l] = '\0';
+
+                /* Fixup an Apple bug where they have bogus \0 chars in the
+                 * middle of the path in some properties, and extract
+                 * the unit name (everything after the last '/').
+                 */
+                for (lp = p = namep, ep = namep + l; p < ep; p++) {
+                        if (*p == '/')
+                                lp = namep;
+                        else if (*p != 0)
+                                *lp++ = *p;
+                }
+                *lp = 0;
+                *mem_start = _ALIGN((unsigned long)lp + 1, 4);
+        }
+
+        /* get it again for debugging */
+        path = RELOC(prom_scratch);
+        memset(path, 0, PROM_SCRATCH_SIZE);
+        call_prom("package-to-path", 3, 1, node, path, PROM_SCRATCH_SIZE-1);
+
+        /* get and store all properties */
+        prev_name = RELOC("");
+        sstart = (char *)RELOC(dt_string_start);
+        for (;;) {
+                if (call_prom("nextprop", 3, 1, node, prev_name,
+                              RELOC(pname)) != 1)
+                        break;
+
+                /* skip "name" */
+                if (strcmp(RELOC(pname), RELOC("name")) == 0) {
+                        prev_name = RELOC("name");
+                        continue;
+                }
+
+                /* find string offset */
+                soff = dt_find_string(RELOC(pname));
+                if (soff == 0) {
+                        prom_printf("WARNING: Can't find string index for"
+                                    " <%s>, node %s\n", RELOC(pname), path);
+                        break;
+                }
+                prev_name = sstart + soff;
+
+                /* get length */
+                l = call_prom("getproplen", 2, 1, node, RELOC(pname));
+
+                /* sanity checks */
+                if (l == PROM_ERROR)
+                        continue;
+                if (l > MAX_PROPERTY_LENGTH) {
+                        prom_printf("WARNING: ignoring large property ");
+                        /* It seems OF doesn't null-terminate the path :-( */
+                        prom_printf("[%s] ", path);
+                        prom_printf("%s length 0x%x\n", RELOC(pname), l);
+                        continue;
+                }
+
+                /* push property head */
+                dt_push_token(OF_DT_PROP, mem_start, mem_end);
+                dt_push_token(l, mem_start, mem_end);
+                dt_push_token(soff, mem_start, mem_end);
+
+                /* push property content */
+                valp = make_room(mem_start, mem_end, l, 4);
+                call_prom("getprop", 4, 1, node, RELOC(pname), valp, l);
+                *mem_start = _ALIGN(*mem_start, 4);
+        }
+
+        /* Add a "linux,phandle" property. */
+        soff = dt_find_string(RELOC("linux,phandle"));
+        if (soff == 0)
+                prom_printf("WARNING: Can't find string index for"
+                            " <linux-phandle> node %s\n", path);
+        else {
+                dt_push_token(OF_DT_PROP, mem_start, mem_end);
+                dt_push_token(4, mem_start, mem_end);
+                dt_push_token(soff, mem_start, mem_end);
+                valp = make_room(mem_start, mem_end, 4, 4);
+                *(u32 *)valp = node;
+        }
+
+        /* do all our children */
+        child = call_prom("child", 1, 1, node);
+        while (child != 0) {
+                scan_dt_build_struct(child, mem_start, mem_end);
+                child = call_prom("peer", 1, 1, child);
+        }
+
+        dt_push_token(OF_DT_END_NODE, mem_start, mem_end);
+}
+
+static void __init flatten_device_tree(void)
+{
+        phandle root;
+        unsigned long mem_start, mem_end, room;
+        struct boot_param_header *hdr;
+        struct prom_t *_prom = &RELOC(prom);
+        char *namep;
+        u64 *rsvmap;
+
+        /*
+         * Check how much room we have between alloc top & bottom (+/- a
+         * few pages), crop to 4Mb, as this is our "chuck" size
+         */
+        room = RELOC(alloc_top) - RELOC(alloc_bottom) - 0x4000;
+        if (room > DEVTREE_CHUNK_SIZE)
+                room = DEVTREE_CHUNK_SIZE;
+        prom_debug("starting device tree allocs at %x\n", RELOC(alloc_bottom));
+
+        /* Now try to claim that */
+        mem_start = (unsigned long)alloc_up(room, PAGE_SIZE);
+        if (mem_start == 0)
+                prom_panic("Can't allocate initial device-tree chunk\n");
+        mem_end = RELOC(alloc_top);
+
+        /* Get root of tree */
+        root = call_prom("peer", 1, 1, (phandle)0);
+        if (root == (phandle)0)
+                prom_panic ("couldn't get device tree root\n");
+
+        /* Build header and make room for mem rsv map */ 
+        mem_start = _ALIGN(mem_start, 4);
+        hdr = make_room(&mem_start, &mem_end,
+                        sizeof(struct boot_param_header), 4);
+        RELOC(dt_header_start) = (unsigned long)hdr;
+        rsvmap = make_room(&mem_start, &mem_end, sizeof(mem_reserve_map), 8);
+
+        /* Start of strings */
+        mem_start = PAGE_ALIGN(mem_start);
+        RELOC(dt_string_start) = mem_start;
+        mem_start += 4; /* hole */
+
+        /* Add "linux,phandle" in there, we'll need it */
+        namep = make_room(&mem_start, &mem_end, 16, 1);
+        strcpy(namep, RELOC("linux,phandle"));
+        mem_start = (unsigned long)namep + strlen(namep) + 1;
+
+        /* Build string array */
+        prom_printf("Building dt strings...\n"); 
+        scan_dt_build_strings(root, &mem_start, &mem_end);
+        RELOC(dt_string_end) = mem_start;
+
+        /* Build structure */
+        mem_start = PAGE_ALIGN(mem_start);
+        RELOC(dt_struct_start) = mem_start;
+        prom_printf("Building dt structure...\n"); 
+        scan_dt_build_struct(root, &mem_start, &mem_end);
+        dt_push_token(OF_DT_END, &mem_start, &mem_end);
+        RELOC(dt_struct_end) = PAGE_ALIGN(mem_start);
+
+        /* Finish header */
+        hdr->boot_cpuid_phys = _prom->cpu;
+        hdr->magic = OF_DT_HEADER;
+        hdr->totalsize = RELOC(dt_struct_end) - RELOC(dt_header_start);
+        hdr->off_dt_struct = RELOC(dt_struct_start) - RELOC(dt_header_start);
+        hdr->off_dt_strings = RELOC(dt_string_start) - RELOC(dt_header_start);
+        hdr->dt_strings_size = RELOC(dt_string_end) - RELOC(dt_string_start);
+        hdr->off_mem_rsvmap = ((unsigned long)rsvmap) - RELOC(dt_header_start);
+        hdr->version = OF_DT_VERSION;
+        /* Version 16 is not backward compatible */
+        hdr->last_comp_version = 0x10;
+
+        /* Reserve the whole thing and copy the reserve map in, we
+         * also bump mem_reserve_cnt to cause further reservations to
+         * fail since it's too late.
+         */
+        reserve_mem(RELOC(dt_header_start), hdr->totalsize);
+        memcpy(rsvmap, RELOC(mem_reserve_map), sizeof(mem_reserve_map));
+
+#ifdef DEBUG_PROM
+        {
+                int i;
+                prom_printf("reserved memory map:\n");
+                for (i = 0; i < RELOC(mem_reserve_cnt); i++)
+                        prom_printf("  %x - %x\n",
+                                    RELOC(mem_reserve_map)[i].base,
+                                    RELOC(mem_reserve_map)[i].size);
+        }
+#endif
+        RELOC(mem_reserve_cnt) = MEM_RESERVE_MAP_SIZE;
+
+        prom_printf("Device tree strings 0x%x -> 0x%x\n",
+                    RELOC(dt_string_start), RELOC(dt_string_end)); 
+        prom_printf("Device tree struct  0x%x -> 0x%x\n",
+                    RELOC(dt_struct_start), RELOC(dt_struct_end));
+
+}
+
+
+static void __init fixup_device_tree(void)
+{
+#if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
+        phandle u3, i2c, mpic;
+        u32 u3_rev;
+        u32 interrupts[2];
+        u32 parent;
+
+        /* Some G5s have a missing interrupt definition, fix it up here */
+        u3 = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000"));
+        if (!PHANDLE_VALID(u3))
+                return;
+        i2c = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000/i2c@f8001000"));
+        if (!PHANDLE_VALID(i2c))
+                return;
+        mpic = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000/mpic@f8040000"));
+        if (!PHANDLE_VALID(mpic))
+                return;
+
+        /* check if proper rev of u3 */
+        if (prom_getprop(u3, "device-rev", &u3_rev, sizeof(u3_rev))
+            == PROM_ERROR)
+                return;
+        if (u3_rev != 0x35 && u3_rev != 0x37)
+                return;
+        /* does it need fixup ? */
+        if (prom_getproplen(i2c, "interrupts") > 0)
+                return;
+
+        prom_printf("fixing up bogus interrupts for u3 i2c...\n");
+
+        /* interrupt on this revision of u3 is number 0 and level */
+        interrupts[0] = 0;
+        interrupts[1] = 1;
+        prom_setprop(i2c, "interrupts", &interrupts, sizeof(interrupts));
+        parent = (u32)mpic;
+        prom_setprop(i2c, "interrupt-parent", &parent, sizeof(parent));
+#endif
+}
+
+
+static void __init prom_find_boot_cpu(void)
+{
+        struct prom_t *_prom = &RELOC(prom);
+        u32 getprop_rval;
+        ihandle prom_cpu;
+        phandle cpu_pkg;
+
+        _prom->cpu = 0;
+        if (prom_getprop(_prom->chosen, "cpu", &prom_cpu, sizeof(prom_cpu)) <= 0)
+                return;
+
+        cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu);
+
+        prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval));
+        _prom->cpu = getprop_rval;
+
+        prom_debug("Booting CPU hw index = 0x%x\n", _prom->cpu);
+}
+
+static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
+{
+#ifdef CONFIG_BLK_DEV_INITRD
+        struct prom_t *_prom = &RELOC(prom);
+
+        if (r3 && r4 && r4 != 0xdeadbeef) {
+                unsigned long val;
+
+                RELOC(prom_initrd_start) = (r3 >= KERNELBASE) ? __pa(r3) : r3;
+                RELOC(prom_initrd_end) = RELOC(prom_initrd_start) + r4;
+
+                val = RELOC(prom_initrd_start);
+                prom_setprop(_prom->chosen, "linux,initrd-start", &val,
+                             sizeof(val));
+                val = RELOC(prom_initrd_end);
+                prom_setprop(_prom->chosen, "linux,initrd-end", &val,
+                             sizeof(val));
+
+                reserve_mem(RELOC(prom_initrd_start),
+                            RELOC(prom_initrd_end) - RELOC(prom_initrd_start));
+
+                prom_debug("initrd_start=0x%x\n", RELOC(prom_initrd_start));
+                prom_debug("initrd_end=0x%x\n", RELOC(prom_initrd_end));
+        }
+#endif /* CONFIG_BLK_DEV_INITRD */
+}
+
+/*
+ * We enter here early on, when the Open Firmware prom is still
+ * handling exceptions and the MMU hash table for us.
+ */
+
+unsigned long __init prom_init(unsigned long r3, unsigned long r4,
+                               unsigned long pp,
+                               unsigned long r6, unsigned long r7)
+{       
+        struct prom_t *_prom;
+        unsigned long hdr;
+        u32 getprop_rval;
+        unsigned long offset = reloc_offset();
+
+#ifdef CONFIG_PPC32
+        reloc_got2(offset);
+#endif
+
+        _prom = &RELOC(prom);
+
+        /*
+         * First zero the BSS
+         */
+        memset(&RELOC(__bss_start), 0, __bss_stop - __bss_start);
+
+        /*
+         * Init interface to Open Firmware, get some node references,
+         * like /chosen
+         */
+        prom_init_client_services(pp);
+
+        /*
+         * Init prom stdout device
+         */
+        prom_init_stdout();
+
+        /*
+         * See if this OF is old enough that we need to do explicit maps
+         */
+        prom_find_mmu();
+
+        /*
+         * Check for an initrd
+         */
+        prom_check_initrd(r3, r4);
+
+        /*
+         * Get default machine type. At this point, we do not differentiate
+         * between pSeries SMP and pSeries LPAR
+         */
+        RELOC(of_platform) = prom_find_machine_type();
+        getprop_rval = RELOC(of_platform);
+        prom_setprop(_prom->chosen, "linux,platform",
+                     &getprop_rval, sizeof(getprop_rval));
+
+#ifdef CONFIG_PPC_PSERIES
+        /*
+         * On pSeries, inform the firmware about our capabilities
+         */
+        if (RELOC(of_platform) & PLATFORM_PSERIES)
+                prom_send_capabilities();
+#endif
+
+        /*
+         * On pSeries and BPA, copy the CPU hold code
+         */
+        if (RELOC(of_platform) != PLATFORM_POWERMAC)
+                copy_and_flush(0, KERNELBASE + offset, 0x100, 0);
+
+        /*
+         * Do early parsing of command line
+         */
+        early_cmdline_parse();
+
+        /*
+         * Initialize memory management within prom_init
+         */
+        prom_init_mem();
+
+        /*
+         * Determine which cpu is actually running right _now_
+         */
+        prom_find_boot_cpu();
+
+        /* 
+         * Initialize display devices
+         */
+        prom_check_displays();
+
+#ifdef CONFIG_PPC64
+        /*
+         * Initialize IOMMU (TCE tables) on pSeries. Do that before anything else
+         * that uses the allocator, we need to make sure we get the top of memory
+         * available for us here...
+         */
+        if (RELOC(of_platform) == PLATFORM_PSERIES)
+                prom_initialize_tce_table();
+#endif
+
+        /*
+         * On non-powermacs, try to instantiate RTAS and puts all CPUs
+         * in spin-loops. PowerMacs don't have a working RTAS and use
+         * a different way to spin CPUs
+         */
+        if (RELOC(of_platform) != PLATFORM_POWERMAC) {
+                prom_instantiate_rtas();
+                prom_hold_cpus();
+        }
+
+        /*
+         * Fill in some infos for use by the kernel later on
+         */
+        if (RELOC(prom_memory_limit))
+                prom_setprop(_prom->chosen, "linux,memory-limit",
+                             &RELOC(prom_memory_limit),
+                             sizeof(prom_memory_limit));
+#ifdef CONFIG_PPC64
+        if (RELOC(ppc64_iommu_off))
+                prom_setprop(_prom->chosen, "linux,iommu-off", NULL, 0);
+
+        if (RELOC(iommu_force_on))
+                prom_setprop(_prom->chosen, "linux,iommu-force-on", NULL, 0);
+
+        if (RELOC(prom_tce_alloc_start)) {
+                prom_setprop(_prom->chosen, "linux,tce-alloc-start",
+                             &RELOC(prom_tce_alloc_start),
+                             sizeof(prom_tce_alloc_start));
+                prom_setprop(_prom->chosen, "linux,tce-alloc-end",
+                             &RELOC(prom_tce_alloc_end),
+                             sizeof(prom_tce_alloc_end));
+        }
+#endif
+
+        /*
+         * Fixup any known bugs in the device-tree
+         */
+        fixup_device_tree();
+
+        /*
+         * Now finally create the flattened device-tree
+         */
+        prom_printf("copying OF device tree ...\n");
+        flatten_device_tree();
+
+        /* in case stdin is USB and still active on IBM machines... */
+        prom_close_stdin();
+
+        /*
+         * Call OF "quiesce" method to shut down pending DMA's from
+         * devices etc...
+         */
+        prom_printf("Calling quiesce ...\n");
+        call_prom("quiesce", 0, 0);
+
+        /*
+         * And finally, call the kernel passing it the flattened device
+         * tree and NULL as r5, thus triggering the new entry point which
+         * is common to us and kexec
+         */
+        hdr = RELOC(dt_header_start);
+        prom_printf("returning from prom_init\n");
+        prom_debug("->dt_header_start=0x%x\n", hdr);
+
+#ifdef CONFIG_PPC32
+        reloc_got2(-offset);
+#endif
+
+        __start(hdr, KERNELBASE + offset, 0);
+
+        return 0;
+}
diff --git a/arch/ppc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index e7aee4108dea..568ea335d616 100644
--- a/arch/ppc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1,6 +1,4 @@
 /*
- *  arch/ppc/kernel/ptrace.c
- *
  *  PowerPC version
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  *
@@ -10,13 +8,14 @@
  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
  *
  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
- * and Paul Mackerras (paulus@linuxcare.com.au).
+ * and Paul Mackerras (paulus@samba.org).
  *
  * This file is subject to the terms and conditions of the GNU General
  * Public License.  See the file README.legal in the main directory of
  * this archive for more details.
  */
 
+#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
@@ -29,13 +28,19 @@
 #include <linux/signal.h>
 #include <linux/seccomp.h>
 #include <linux/audit.h>
+#ifdef CONFIG_PPC32
 #include <linux/module.h>
+#endif
 
 #include <asm/uaccess.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
+#ifdef CONFIG_PPC64
+#include <asm/ptrace-common.h>
+#endif
 
+#ifdef CONFIG_PPC32
 /*
  * Set of msr bits that gdb can change on behalf of a process.
  */
@@ -44,12 +49,14 @@
 #else
 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 #endif
+#endif /* CONFIG_PPC32 */
 
 /*
  * does not yet catch signals sent when the child dies.
  * in exit.c or in signal.c.
  */
 
+#ifdef CONFIG_PPC32
 /*
  * Get contents of register REGNO in task TASK.
  */
@@ -228,6 +235,7 @@ clear_single_step(struct task_struct *task)
 #endif
         }
 }
+#endif /* CONFIG_PPC32 */
 
 /*
  * Called by kernel/ptrace.c when detaching..
@@ -240,7 +248,7 @@ void ptrace_disable(struct task_struct *child)
         clear_single_step(child);
 }
 
-int sys_ptrace(long request, long pid, long addr, long data)
+long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret = -EPERM;
@@ -296,25 +304,28 @@ int sys_ptrace(long request, long pid, long addr, long data)
         }
 
         /* read the word at location addr in the USER area. */
-        /* XXX this will need fixing for 64-bit */
         case PTRACE_PEEKUSR: {
                 unsigned long index, tmp;
 
                 ret = -EIO;
                 /* convert to index and check */
+#ifdef CONFIG_PPC32
                 index = (unsigned long) addr >> 2;
-                if ((addr & 3) || index > PT_FPSCR
-                    || child->thread.regs == NULL)
+                if ((addr & 3) || (index > PT_FPSCR)
+                    || (child->thread.regs == NULL))
+#else
+                index = (unsigned long) addr >> 3;
+                if ((addr & 7) || (index > PT_FPSCR))
+#endif
                         break;
 
+#ifdef CONFIG_PPC32
                 CHECK_FULL_REGS(child->thread.regs);
+#endif
                 if (index < PT_FPR0) {
                         tmp = get_reg(child, (int) index);
                 } else {
-                        preempt_disable();
-                        if (child->thread.regs->msr & MSR_FP)
-                                giveup_fpu(child);
-                        preempt_enable();
+                        flush_fp_to_thread(child);
                         tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
                 }
                 ret = put_user(tmp,(unsigned long __user *) data);
@@ -325,7 +336,8 @@ int sys_ptrace(long request, long pid, long addr, long data)
         case PTRACE_POKETEXT: /* write the word at location addr. */
         case PTRACE_POKEDATA:
                 ret = 0;
-                if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
+                if (access_process_vm(child, addr, &data, sizeof(data), 1)
+                                == sizeof(data))
                         break;
                 ret = -EIO;
                 break;
@@ -336,21 +348,25 @@ int sys_ptrace(long request, long pid, long addr, long data)
 
                 ret = -EIO;
                 /* convert to index and check */
+#ifdef CONFIG_PPC32
                 index = (unsigned long) addr >> 2;
-                if ((addr & 3) || index > PT_FPSCR
-                    || child->thread.regs == NULL)
+                if ((addr & 3) || (index > PT_FPSCR)
+                    || (child->thread.regs == NULL))
+#else
+                index = (unsigned long) addr >> 3;
+                if ((addr & 7) || (index > PT_FPSCR))
+#endif
                         break;
 
+#ifdef CONFIG_PPC32
                 CHECK_FULL_REGS(child->thread.regs);
+#endif
                 if (index == PT_ORIG_R3)
                         break;
                 if (index < PT_FPR0) {
                         ret = put_reg(child, index, data);
                 } else {
-                        preempt_disable();
-                        if (child->thread.regs->msr & MSR_FP)
-                                giveup_fpu(child);
-                        preempt_enable();
+                        flush_fp_to_thread(child);
                         ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
                         ret = 0;
                 }
@@ -362,11 +378,10 @@ int sys_ptrace(long request, long pid, long addr, long data)
                 ret = -EIO;
                 if (!valid_signal(data))
                         break;
-                if (request == PTRACE_SYSCALL) {
+                if (request == PTRACE_SYSCALL)
                         set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                } else {
+                else
                         clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                }
                 child->exit_code = data;
                 /* make sure the single step bit is not set. */
                 clear_single_step(child);
@@ -404,28 +419,102 @@ int sys_ptrace(long request, long pid, long addr, long data)
                 break;
         }
 
+#ifdef CONFIG_PPC64
+        case PTRACE_GET_DEBUGREG: {
+                ret = -EINVAL;
+                /* We only support one DABR and no IABRS at the moment */
+                if (addr > 0)
+                        break;
+                ret = put_user(child->thread.dabr,
+                               (unsigned long __user *)data);
+                break;
+        }
+
+        case PTRACE_SET_DEBUGREG:
+                ret = ptrace_set_debugreg(child, addr, data);
+                break;
+#endif
+
         case PTRACE_DETACH:
                 ret = ptrace_detach(child, data);
                 break;
 
+#ifdef CONFIG_PPC64
+        case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
+                int i;
+                unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
+                unsigned long __user *tmp = (unsigned long __user *)addr;
+
+                for (i = 0; i < 32; i++) {
+                        ret = put_user(*reg, tmp);
+                        if (ret)
+                                break;
+                        reg++;
+                        tmp++;
+                }
+                break;
+        }
+
+        case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
+                int i;
+                unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
+                unsigned long __user *tmp = (unsigned long __user *)addr;
+
+                for (i = 0; i < 32; i++) {
+                        ret = get_user(*reg, tmp);
+                        if (ret)
+                                break;
+                        reg++;
+                        tmp++;
+                }
+                break;
+        }
+
+        case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */
+                int i;
+                unsigned long *reg = &((unsigned long *)child->thread.fpr)[0];
+                unsigned long __user *tmp = (unsigned long __user *)addr;
+
+                flush_fp_to_thread(child);
+
+                for (i = 0; i < 32; i++) {
+                        ret = put_user(*reg, tmp);
+                        if (ret)
+                                break;
+                        reg++;
+                        tmp++;
+                }
+                break;
+        }
+
+        case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */
+                int i;
+                unsigned long *reg = &((unsigned long *)child->thread.fpr)[0];
+                unsigned long __user *tmp = (unsigned long __user *)addr;
+
+                flush_fp_to_thread(child);
+
+                for (i = 0; i < 32; i++) {
+                        ret = get_user(*reg, tmp);
+                        if (ret)
+                                break;
+                        reg++;
+                        tmp++;
+                }
+                break;
+        }
+#endif /* CONFIG_PPC64 */
+
 #ifdef CONFIG_ALTIVEC
         case PTRACE_GETVRREGS:
                 /* Get the child altivec register state. */
-                preempt_disable();
-                if (child->thread.regs->msr & MSR_VEC)
-                        giveup_altivec(child);
-                preempt_enable();
+                flush_altivec_to_thread(child);
                 ret = get_vrregs((unsigned long __user *)data, child);
                 break;
 
         case PTRACE_SETVRREGS:
                 /* Set the child altivec register state. */
-                /* this is to clear the MSR_VEC bit to force a reload
-                 * of register state from memory */
-                preempt_disable();
-                if (child->thread.regs->msr & MSR_VEC)
-                        giveup_altivec(child);
-                preempt_enable();
+                flush_altivec_to_thread(child);
                 ret = set_vrregs(child, (unsigned long __user *)data);
                 break;
 #endif
@@ -478,12 +567,21 @@ static void do_syscall_trace(void)
 
 void do_syscall_trace_enter(struct pt_regs *regs)
 {
+#ifdef CONFIG_PPC64
+        secure_computing(regs->gpr[0]);
+#endif
+
         if (test_thread_flag(TIF_SYSCALL_TRACE)
             && (current->ptrace & PT_PTRACED))
                 do_syscall_trace();
 
         if (unlikely(current->audit_context))
-                audit_syscall_entry(current, AUDIT_ARCH_PPC,
+                audit_syscall_entry(current,
+#ifdef CONFIG_PPC32
+                                    AUDIT_ARCH_PPC,
+#else
+                                    test_thread_flag(TIF_32BIT)?AUDIT_ARCH_PPC:AUDIT_ARCH_PPC64,
+#endif
                                     regs->gpr[0],
                                     regs->gpr[3], regs->gpr[4],
                                     regs->gpr[5], regs->gpr[6]);
@@ -491,17 +589,25 @@ void do_syscall_trace_enter(struct pt_regs *regs)
 
 void do_syscall_trace_leave(struct pt_regs *regs)
 {
+#ifdef CONFIG_PPC32
         secure_computing(regs->gpr[0]);
+#endif
 
         if (unlikely(current->audit_context))
                 audit_syscall_exit(current,
                                    (regs->ccr&0x1000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
                                    regs->result);
 
-        if ((test_thread_flag(TIF_SYSCALL_TRACE))
+        if ((test_thread_flag(TIF_SYSCALL_TRACE)
+#ifdef CONFIG_PPC64
+             || test_thread_flag(TIF_SINGLESTEP)
+#endif
+             )
             && (current->ptrace & PT_PTRACED))
                 do_syscall_trace();
 }
 
+#ifdef CONFIG_PPC32
 EXPORT_SYMBOL(do_syscall_trace_enter);
 EXPORT_SYMBOL(do_syscall_trace_leave);
+#endif
diff --git a/arch/ppc64/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index fb8c22d6084a..91eb952e0293 100644
--- a/arch/ppc64/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/ppc64/kernel/ptrace32.c
+ * ptrace for 32-bit processes running on a 64-bit kernel.
  *
  *  PowerPC version
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
@@ -10,10 +10,10 @@
  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
  *
  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
- * and Paul Mackerras (paulus@linuxcare.com.au).
+ * and Paul Mackerras (paulus@samba.org).
  *
  * This file is subject to the terms and conditions of the GNU General
- * Public License.  See the file README.legal in the main directory of
+ * Public License.  See the file COPYING in the main directory of
  * this archive for more details.
  */
 
@@ -40,7 +40,8 @@
  * in exit.c or in signal.c.
  */
 
-int sys32_ptrace(long request, long pid, unsigned long addr, unsigned long data)
+long compat_sys_ptrace(int request, int pid, unsigned long addr,
+                       unsigned long data)
 {
         struct task_struct *child;
         int ret = -EPERM;
diff --git a/arch/ppc64/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 5e8eb33b8e54..4d22eeeeb91d 100644
--- a/arch/ppc64/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -25,28 +25,29 @@
 #include <asm/page.h>
 #include <asm/param.h>
 #include <asm/system.h>
-#include <asm/abs_addr.h>
-#include <asm/udbg.h>
 #include <asm/delay.h>
 #include <asm/uaccess.h>
+#include <asm/lmb.h>
+#ifdef CONFIG_PPC64
 #include <asm/systemcfg.h>
+#endif
 
-struct flash_block_list_header rtas_firmware_flash_list = {0, NULL};
-
-struct rtas_t rtas = { 
+struct rtas_t rtas = {
         .lock = SPIN_LOCK_UNLOCKED
 };
 
 EXPORT_SYMBOL(rtas);
 
-char rtas_err_buf[RTAS_ERROR_LOG_MAX];
-
 DEFINE_SPINLOCK(rtas_data_buf_lock);
-char rtas_data_buf[RTAS_DATA_BUF_SIZE]__page_aligned;
+char rtas_data_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned;
 unsigned long rtas_rmo_buf;
 
-void
-call_rtas_display_status(unsigned char c)
+/*
+ * call_rtas_display_status and call_rtas_display_status_delay
+ * are designed only for very early low-level debugging, which
+ * is why the token is hard-coded to 10.
+ */
+void call_rtas_display_status(unsigned char c)
 {
         struct rtas_args *args = &rtas.args;
         unsigned long s;
@@ -66,8 +67,7 @@ call_rtas_display_status(unsigned char c)
         spin_unlock_irqrestore(&rtas.lock, s);
 }
 
-void
-call_rtas_display_status_delay(unsigned char c)
+void call_rtas_display_status_delay(unsigned char c)
 {
         static int pending_newline = 0;  /* did last write end with unprinted newline? */
         static int width = 16;
@@ -91,8 +91,7 @@ call_rtas_display_status_delay(unsigned char c)
         }
 }
 
-void
-rtas_progress(char *s, unsigned short hex)
+void rtas_progress(char *s, unsigned short hex)
 {
         struct device_node *root;
         int width, *p;
@@ -208,18 +207,16 @@ rtas_progress(char *s, unsigned short hex)
         spin_unlock(&progress_lock);
 }
 
-int
-rtas_token(const char *service)
+int rtas_token(const char *service)
 {
         int *tokp;
-        if (rtas.dev == NULL) {
-                PPCDBG(PPCDBG_RTAS,"\tNo rtas device in device-tree...\n");
+        if (rtas.dev == NULL)
                 return RTAS_UNKNOWN_SERVICE;
-        }
         tokp = (int *) get_property(rtas.dev, service, NULL);
         return tokp ? *tokp : RTAS_UNKNOWN_SERVICE;
 }
 
+#ifdef CONFIG_RTAS_ERROR_LOGGING
 /*
  * Return the firmware-specified size of the error log buffer
  *  for all rtas calls that require an error buffer argument.
@@ -234,31 +231,38 @@ int rtas_get_error_log_max(void)
         rtas_error_log_max = rtas_token ("rtas-error-log-max");
         if ((rtas_error_log_max == RTAS_UNKNOWN_SERVICE) ||
             (rtas_error_log_max > RTAS_ERROR_LOG_MAX)) {
-                printk (KERN_WARNING "RTAS: bad log buffer size %d\n", rtas_error_log_max);
+                printk (KERN_WARNING "RTAS: bad log buffer size %d\n",
+                        rtas_error_log_max);
                 rtas_error_log_max = RTAS_ERROR_LOG_MAX;
         }
         return rtas_error_log_max;
 }
+EXPORT_SYMBOL(rtas_get_error_log_max);
 
 
+char rtas_err_buf[RTAS_ERROR_LOG_MAX];
+int rtas_last_error_token;
+
 /** Return a copy of the detailed error text associated with the
  *  most recent failed call to rtas.  Because the error text
  *  might go stale if there are any other intervening rtas calls,
  *  this routine must be called atomically with whatever produced
  *  the error (i.e. with rtas.lock still held from the previous call).
  */
-static int
-__fetch_rtas_last_error(void)
+static char *__fetch_rtas_last_error(char *altbuf)
 {
         struct rtas_args err_args, save_args;
         u32 bufsz;
+        char *buf = NULL;
+
+        if (rtas_last_error_token == -1)
+                return NULL;
 
         bufsz = rtas_get_error_log_max();
 
-        err_args.token = rtas_token("rtas-last-error");
+        err_args.token = rtas_last_error_token;
         err_args.nargs = 2;
         err_args.nret = 1;
-
         err_args.args[0] = (rtas_arg_t)__pa(rtas_err_buf);
         err_args.args[1] = bufsz;
         err_args.args[2] = 0;
@@ -271,23 +275,38 @@ __fetch_rtas_last_error(void)
         err_args = rtas.args;
         rtas.args = save_args;
 
-        return err_args.args[2];
+        /* Log the error in the unlikely case that there was one. */
+        if (unlikely(err_args.args[2] == 0)) {
+                if (altbuf) {
+                        buf = altbuf;
+                } else {
+                        buf = rtas_err_buf;
+                        if (mem_init_done)
+                                buf = kmalloc(RTAS_ERROR_LOG_MAX, GFP_ATOMIC);
+                }
+                if (buf)
+                        memcpy(buf, rtas_err_buf, RTAS_ERROR_LOG_MAX);
+        }
+
+        return buf;
 }
 
+#define get_errorlog_buffer()   kmalloc(RTAS_ERROR_LOG_MAX, GFP_KERNEL)
+
+#else /* CONFIG_RTAS_ERROR_LOGGING */
+#define __fetch_rtas_last_error(x)      NULL
+#define get_errorlog_buffer()           NULL
+#endif
+
 int rtas_call(int token, int nargs, int nret, int *outputs, ...)
 {
         va_list list;
-        int i, logit = 0;
+        int i;
         unsigned long s;
         struct rtas_args *rtas_args;
-        char * buff_copy = NULL;
+        char *buff_copy = NULL;
         int ret;
 
-        PPCDBG(PPCDBG_RTAS, "Entering rtas_call\n");
-        PPCDBG(PPCDBG_RTAS, "\ttoken    = 0x%x\n", token);
-        PPCDBG(PPCDBG_RTAS, "\tnargs    = %d\n", nargs);
-        PPCDBG(PPCDBG_RTAS, "\tnret     = %d\n", nret);
-        PPCDBG(PPCDBG_RTAS, "\t&outputs = 0x%lx\n", outputs);
         if (token == RTAS_UNKNOWN_SERVICE)
                 return -1;
 
@@ -300,46 +319,25 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
         rtas_args->nret  = nret;
         rtas_args->rets  = (rtas_arg_t *)&(rtas_args->args[nargs]);
         va_start(list, outputs);
-        for (i = 0; i < nargs; ++i) {
+        for (i = 0; i < nargs; ++i)
                 rtas_args->args[i] = va_arg(list, rtas_arg_t);
-                PPCDBG(PPCDBG_RTAS, "\tnarg[%d] = 0x%x\n", i, rtas_args->args[i]);
-        }
         va_end(list);
 
         for (i = 0; i < nret; ++i)
                 rtas_args->rets[i] = 0;
 
-        PPCDBG(PPCDBG_RTAS, "\tentering rtas with 0x%lx\n",
-                __pa(rtas_args));
         enter_rtas(__pa(rtas_args));
-        PPCDBG(PPCDBG_RTAS, "\treturned from rtas ...\n");
 
         /* A -1 return code indicates that the last command couldn't
            be completed due to a hardware error. */
         if (rtas_args->rets[0] == -1)
-                logit = (__fetch_rtas_last_error() == 0);
-
-        ifppcdebug(PPCDBG_RTAS) {
-                for(i=0; i < nret ;i++)
-                        udbg_printf("\tnret[%d] = 0x%lx\n", i, (ulong)rtas_args->rets[i]);
-        }
+                buff_copy = __fetch_rtas_last_error(NULL);
 
         if (nret > 1 && outputs != NULL)
                 for (i = 0; i < nret-1; ++i)
                         outputs[i] = rtas_args->rets[i+1];
         ret = (nret > 0)? rtas_args->rets[0]: 0;
 
-        /* Log the error in the unlikely case that there was one. */
-        if (unlikely(logit)) {
-                buff_copy = rtas_err_buf;
-                if (mem_init_done) {
-                        buff_copy = kmalloc(RTAS_ERROR_LOG_MAX, GFP_ATOMIC);
-                        if (buff_copy)
-                                memcpy(buff_copy, rtas_err_buf,
-                                       RTAS_ERROR_LOG_MAX);
-                }
-        }
-
         /* Gotta do something different here, use global lock for now... */
         spin_unlock_irqrestore(&rtas.lock, s);
 
@@ -354,8 +352,7 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
 /* Given an RTAS status code of 990n compute the hinted delay of 10^n
  * (last digit) milliseconds.  For now we bound at n=5 (100 sec).
  */
-unsigned int
-rtas_extended_busy_delay_time(int status)
+unsigned int rtas_extended_busy_delay_time(int status)
 {
         int order = status - 9900;
         unsigned long ms;
@@ -366,7 +363,7 @@ rtas_extended_busy_delay_time(int status)
                 order = 5;      /* bound */
 
         /* Use microseconds for reasonable accuracy */
-        for (ms=1; order > 0; order--)
+        for (ms = 1; order > 0; order--)
                 ms *= 10;
 
         return ms; 
@@ -493,112 +490,23 @@ int rtas_set_indicator(int indicator, int index, int new_value)
         return rc;
 }
 
-#define FLASH_BLOCK_LIST_VERSION (1UL)
-static void
-rtas_flash_firmware(void)
-{
-        unsigned long image_size;
-        struct flash_block_list *f, *next, *flist;
-        unsigned long rtas_block_list;
-        int i, status, update_token;
-
-        update_token = rtas_token("ibm,update-flash-64-and-reboot");
-        if (update_token == RTAS_UNKNOWN_SERVICE) {
-                printk(KERN_ALERT "FLASH: ibm,update-flash-64-and-reboot is not available -- not a service partition?\n");
-                printk(KERN_ALERT "FLASH: firmware will not be flashed\n");
-                return;
-        }
-
-        /* NOTE: the "first" block list is a global var with no data
-         * blocks in the kernel data segment.  We do this because
-         * we want to ensure this block_list addr is under 4GB.
-         */
-        rtas_firmware_flash_list.num_blocks = 0;
-        flist = (struct flash_block_list *)&rtas_firmware_flash_list;
-        rtas_block_list = virt_to_abs(flist);
-        if (rtas_block_list >= 4UL*1024*1024*1024) {
-                printk(KERN_ALERT "FLASH: kernel bug...flash list header addr above 4GB\n");
-                return;
-        }
-
-        printk(KERN_ALERT "FLASH: preparing saved firmware image for flash\n");
-        /* Update the block_list in place. */
-        image_size = 0;
-        for (f = flist; f; f = next) {
-                /* Translate data addrs to absolute */
-                for (i = 0; i < f->num_blocks; i++) {
-                        f->blocks[i].data = (char *)virt_to_abs(f->blocks[i].data);
-                        image_size += f->blocks[i].length;
-                }
-                next = f->next;
-                /* Don't translate NULL pointer for last entry */
-                if (f->next)
-                        f->next = (struct flash_block_list *)virt_to_abs(f->next);
-                else
-                        f->next = NULL;
-                /* make num_blocks into the version/length field */
-                f->num_blocks = (FLASH_BLOCK_LIST_VERSION << 56) | ((f->num_blocks+1)*16);
-        }
-
-        printk(KERN_ALERT "FLASH: flash image is %ld bytes\n", image_size);
-        printk(KERN_ALERT "FLASH: performing flash and reboot\n");
-        rtas_progress("Flashing        \n", 0x0);
-        rtas_progress("Please Wait...  ", 0x0);
-        printk(KERN_ALERT "FLASH: this will take several minutes.  Do not power off!\n");
-        status = rtas_call(update_token, 1, 1, NULL, rtas_block_list);
-        switch (status) {       /* should only get "bad" status */
-            case 0:
-                printk(KERN_ALERT "FLASH: success\n");
-                break;
-            case -1:
-                printk(KERN_ALERT "FLASH: hardware error.  Firmware may not be not flashed\n");
-                break;
-            case -3:
-                printk(KERN_ALERT "FLASH: image is corrupt or not correct for this platform.  Firmware not flashed\n");
-                break;
-            case -4:
-                printk(KERN_ALERT "FLASH: flash failed when partially complete.  System may not reboot\n");
-                break;
-            default:
-                printk(KERN_ALERT "FLASH: unknown flash return code %d\n", status);
-                break;
-        }
-}
-
-void rtas_flash_bypass_warning(void)
-{
-        printk(KERN_ALERT "FLASH: firmware flash requires a reboot\n");
-        printk(KERN_ALERT "FLASH: the firmware image will NOT be flashed\n");
-}
-
-
-void
-rtas_restart(char *cmd)
+void rtas_restart(char *cmd)
 {
-        if (rtas_firmware_flash_list.next)
-                rtas_flash_firmware();
-
         printk("RTAS system-reboot returned %d\n",
                rtas_call(rtas_token("system-reboot"), 0, 1, NULL));
         for (;;);
 }
 
-void
-rtas_power_off(void)
+void rtas_power_off(void)
 {
-        if (rtas_firmware_flash_list.next)
-                rtas_flash_bypass_warning();
         /* allow power on only with power button press */
         printk("RTAS power-off returned %d\n",
                rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1));
         for (;;);
 }
 
-void
-rtas_halt(void)
+void rtas_halt(void)
 {
-        if (rtas_firmware_flash_list.next)
-                rtas_flash_bypass_warning();
         rtas_power_off();
 }
 
@@ -631,9 +539,8 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
 {
         struct rtas_args args;
         unsigned long flags;
-        char * buff_copy;
+        char *buff_copy, *errbuf = NULL;
         int nargs;
-        int err_rc = 0;
 
         if (!capable(CAP_SYS_ADMIN))
                 return -EPERM;
@@ -652,7 +559,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
                            nargs * sizeof(rtas_arg_t)) != 0)
                 return -EFAULT;
 
-        buff_copy = kmalloc(RTAS_ERROR_LOG_MAX, GFP_KERNEL);
+        buff_copy = get_errorlog_buffer();
 
         spin_lock_irqsave(&rtas.lock, flags);
 
@@ -664,19 +571,14 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
 
         /* A -1 return code indicates that the last command couldn't
            be completed due to a hardware error. */
-        if (args.rets[0] == -1) {
-                err_rc = __fetch_rtas_last_error();
-                if ((err_rc == 0) && buff_copy) {
-                        memcpy(buff_copy, rtas_err_buf, RTAS_ERROR_LOG_MAX);
-                }
-        }
+        if (args.rets[0] == -1)
+                errbuf = __fetch_rtas_last_error(buff_copy);
 
         spin_unlock_irqrestore(&rtas.lock, flags);
 
         if (buff_copy) {
-                if ((args.rets[0] == -1) && (err_rc == 0)) {
-                        log_error(buff_copy, ERR_TYPE_RTAS_LOG, 0);
-                }
+                if (errbuf)
+                        log_error(errbuf, ERR_TYPE_RTAS_LOG, 0);
                 kfree(buff_copy);
         }
 
@@ -689,6 +591,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
         return 0;
 }
 
+#ifdef CONFIG_SMP
 /* This version can't take the spinlock, because it never returns */
 
 struct rtas_args rtas_stop_self_args = {
@@ -713,6 +616,7 @@ void rtas_stop_self(void)
 
         panic("Alas, I survived.\n");
 }
+#endif
 
 /*
  * Call early during boot, before mem init or bootmem, to retreive the RTAS
@@ -721,6 +625,8 @@ void rtas_stop_self(void)
  */
 void __init rtas_initialize(void)
 {
+        unsigned long rtas_region = RTAS_INSTANTIATE_MAX;
+
         /* Get RTAS dev node and fill up our "rtas" structure with infos
          * about it.
          */
@@ -742,26 +648,27 @@ void __init rtas_initialize(void)
                 } else
                         rtas.dev = NULL;
         }
+        if (!rtas.dev)
+                return;
+
         /* If RTAS was found, allocate the RMO buffer for it and look for
          * the stop-self token if any
          */
-        if (rtas.dev) {
-                unsigned long rtas_region = RTAS_INSTANTIATE_MAX;
-                if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
-                        rtas_region = min(lmb.rmo_size, RTAS_INSTANTIATE_MAX);
-
-                rtas_rmo_buf = lmb_alloc_base(RTAS_RMOBUF_MAX, PAGE_SIZE,
-                                                        rtas_region);
+#ifdef CONFIG_PPC64
+        if (systemcfg->platform == PLATFORM_PSERIES_LPAR)
+                rtas_region = min(lmb.rmo_size, RTAS_INSTANTIATE_MAX);
+#endif
+        rtas_rmo_buf = lmb_alloc_base(RTAS_RMOBUF_MAX, PAGE_SIZE, rtas_region);
 
 #ifdef CONFIG_HOTPLUG_CPU
-                rtas_stop_self_args.token = rtas_token("stop-self");
+        rtas_stop_self_args.token = rtas_token("stop-self");
 #endif /* CONFIG_HOTPLUG_CPU */
-        }
-
+#ifdef CONFIG_RTAS_ERROR_LOGGING
+        rtas_last_error_token = rtas_token("rtas-last-error");
+#endif
 }
 
 
-EXPORT_SYMBOL(rtas_firmware_flash_list);
 EXPORT_SYMBOL(rtas_token);
 EXPORT_SYMBOL(rtas_call);
 EXPORT_SYMBOL(rtas_data_buf);
@@ -771,4 +678,3 @@ EXPORT_SYMBOL(rtas_get_sensor);
 EXPORT_SYMBOL(rtas_get_power_level);
 EXPORT_SYMBOL(rtas_set_power_level);
 EXPORT_SYMBOL(rtas_set_indicator);
-EXPORT_SYMBOL(rtas_get_error_log_max);
diff --git a/arch/powerpc/kernel/semaphore.c b/arch/powerpc/kernel/semaphore.c
new file mode 100644
index 000000000000..2f8c3c951394
--- /dev/null
+++ b/arch/powerpc/kernel/semaphore.c
@@ -0,0 +1,135 @@
+/*
+ * PowerPC-specific semaphore code.
+ *
+ * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * April 2001 - Reworked by Paul Mackerras <paulus@samba.org>
+ * to eliminate the SMP races in the old version between the updates
+ * of `count' and `waking'.  Now we use negative `count' values to
+ * indicate that some process(es) are waiting for the semaphore.
+ */
+
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/module.h>
+
+#include <asm/atomic.h>
+#include <asm/semaphore.h>
+#include <asm/errno.h>
+
+/*
+ * Atomically update sem->count.
+ * This does the equivalent of the following:
+ *
+ *      old_count = sem->count;
+ *      tmp = MAX(old_count, 0) + incr;
+ *      sem->count = tmp;
+ *      return old_count;
+ */
+static inline int __sem_update_count(struct semaphore *sem, int incr)
+{
+        int old_count, tmp;
+
+        __asm__ __volatile__("\n"
+"1:     lwarx   %0,0,%3\n"
+"       srawi   %1,%0,31\n"
+"       andc    %1,%0,%1\n"
+"       add     %1,%1,%4\n"
+        PPC405_ERR77(0,%3)
+"       stwcx.  %1,0,%3\n"
+"       bne     1b"
+        : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
+        : "r" (&sem->count), "r" (incr), "m" (sem->count)
+        : "cc");
+
+        return old_count;
+}
+
+void __up(struct semaphore *sem)
+{
+        /*
+         * Note that we incremented count in up() before we came here,
+         * but that was ineffective since the result was <= 0, and
+         * any negative value of count is equivalent to 0.
+         * This ends up setting count to 1, unless count is now > 0
+         * (i.e. because some other cpu has called up() in the meantime),
+         * in which case we just increment count.
+         */
+        __sem_update_count(sem, 1);
+        wake_up(&sem->wait);
+}
+EXPORT_SYMBOL(__up);
+
+/*
+ * Note that when we come in to __down or __down_interruptible,
+ * we have already decremented count, but that decrement was
+ * ineffective since the result was < 0, and any negative value
+ * of count is equivalent to 0.
+ * Thus it is only when we decrement count from some value > 0
+ * that we have actually got the semaphore.
+ */
+void __sched __down(struct semaphore *sem)
+{
+        struct task_struct *tsk = current;
+        DECLARE_WAITQUEUE(wait, tsk);
+
+        __set_task_state(tsk, TASK_UNINTERRUPTIBLE);
+        add_wait_queue_exclusive(&sem->wait, &wait);
+
+        /*
+         * Try to get the semaphore.  If the count is > 0, then we've
+         * got the semaphore; we decrement count and exit the loop.
+         * If the count is 0 or negative, we set it to -1, indicating
+         * that we are asleep, and then sleep.
+         */
+        while (__sem_update_count(sem, -1) <= 0) {
+                schedule();
+                set_task_state(tsk, TASK_UNINTERRUPTIBLE);
+        }
+        remove_wait_queue(&sem->wait, &wait);
+        __set_task_state(tsk, TASK_RUNNING);
+
+        /*
+         * If there are any more sleepers, wake one of them up so
+         * that it can either get the semaphore, or set count to -1
+         * indicating that there are still processes sleeping.
+         */
+        wake_up(&sem->wait);
+}
+EXPORT_SYMBOL(__down);
+
+int __sched __down_interruptible(struct semaphore * sem)
+{
+        int retval = 0;
+        struct task_struct *tsk = current;
+        DECLARE_WAITQUEUE(wait, tsk);
+
+        __set_task_state(tsk, TASK_INTERRUPTIBLE);
+        add_wait_queue_exclusive(&sem->wait, &wait);
+
+        while (__sem_update_count(sem, -1) <= 0) {
+                if (signal_pending(current)) {
+                        /*
+                         * A signal is pending - give up trying.
+                         * Set sem->count to 0 if it is negative,
+                         * since we are no longer sleeping.
+                         */
+                        __sem_update_count(sem, 0);
+                        retval = -EINTR;
+                        break;
+                }
+                schedule();
+                set_task_state(tsk, TASK_INTERRUPTIBLE);
+        }
+        remove_wait_queue(&sem->wait, &wait);
+        __set_task_state(tsk, TASK_RUNNING);
+
+        wake_up(&sem->wait);
+        return retval;
+}
+EXPORT_SYMBOL(__down_interruptible);
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
new file mode 100644
index 000000000000..1292460fcde2
--- /dev/null
+++ b/arch/powerpc/kernel/setup-common.c
@@ -0,0 +1,410 @@
+/*
+ * Common boot and setup code for both 32-bit and 64-bit.
+ * Extracted from arch/powerpc/kernel/setup_64.c.
+ *
+ * Copyright (C) 2001 PPC64 Team, IBM Corp
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/reboot.h>
+#include <linux/delay.h>
+#include <linux/initrd.h>
+#include <linux/ide.h>
+#include <linux/seq_file.h>
+#include <linux/ioport.h>
+#include <linux/console.h>
+#include <linux/utsname.h>
+#include <linux/tty.h>
+#include <linux/root_dev.h>
+#include <linux/notifier.h>
+#include <linux/cpu.h>
+#include <linux/unistd.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/processor.h>
+#include <asm/pgtable.h>
+#include <asm/smp.h>
+#include <asm/elf.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/cputable.h>
+#include <asm/sections.h>
+#include <asm/btext.h>
+#include <asm/nvram.h>
+#include <asm/setup.h>
+#include <asm/system.h>
+#include <asm/rtas.h>
+#include <asm/iommu.h>
+#include <asm/serial.h>
+#include <asm/cache.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/lmb.h>
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) udbg_printf(fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+/*
+ * This still seems to be needed... -- paulus
+ */ 
+struct screen_info screen_info = {
+        .orig_x = 0,
+        .orig_y = 25,
+        .orig_video_cols = 80,
+        .orig_video_lines = 25,
+        .orig_video_isVGA = 1,
+        .orig_video_points = 16
+};
+
+#ifdef __DO_IRQ_CANON
+/* XXX should go elsewhere eventually */
+int ppc_do_canonicalize_irqs;
+EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
+#endif
+
+/* also used by kexec */
+void machine_shutdown(void)
+{
+        if (ppc_md.nvram_sync)
+                ppc_md.nvram_sync();
+}
+
+void machine_restart(char *cmd)
+{
+        machine_shutdown();
+        ppc_md.restart(cmd);
+#ifdef CONFIG_SMP
+        smp_send_stop();
+#endif
+        printk(KERN_EMERG "System Halted, OK to turn off power\n");
+        local_irq_disable();
+        while (1) ;
+}
+
+void machine_power_off(void)
+{
+        machine_shutdown();
+        ppc_md.power_off();
+#ifdef CONFIG_SMP
+        smp_send_stop();
+#endif
+        printk(KERN_EMERG "System Halted, OK to turn off power\n");
+        local_irq_disable();
+        while (1) ;
+}
+/* Used by the G5 thermal driver */
+EXPORT_SYMBOL_GPL(machine_power_off);
+
+void (*pm_power_off)(void) = machine_power_off;
+EXPORT_SYMBOL_GPL(pm_power_off);
+
+void machine_halt(void)
+{
+        machine_shutdown();
+        ppc_md.halt();
+#ifdef CONFIG_SMP
+        smp_send_stop();
+#endif
+        printk(KERN_EMERG "System Halted, OK to turn off power\n");
+        local_irq_disable();
+        while (1) ;
+}
+
+
+#ifdef CONFIG_TAU
+extern u32 cpu_temp(unsigned long cpu);
+extern u32 cpu_temp_both(unsigned long cpu);
+#endif /* CONFIG_TAU */
+
+#ifdef CONFIG_SMP
+DEFINE_PER_CPU(unsigned int, pvr);
+#endif
+
+static int show_cpuinfo(struct seq_file *m, void *v)
+{
+        unsigned long cpu_id = (unsigned long)v - 1;
+        unsigned int pvr;
+        unsigned short maj;
+        unsigned short min;
+
+        if (cpu_id == NR_CPUS) {
+#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
+                unsigned long bogosum = 0;
+                int i;
+                for (i = 0; i < NR_CPUS; ++i)
+                        if (cpu_online(i))
+                                bogosum += loops_per_jiffy;
+                seq_printf(m, "total bogomips\t: %lu.%02lu\n",
+                           bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
+#endif /* CONFIG_SMP && CONFIG_PPC32 */
+                seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
+
+                if (ppc_md.show_cpuinfo != NULL)
+                        ppc_md.show_cpuinfo(m);
+
+                return 0;
+        }
+
+        /* We only show online cpus: disable preempt (overzealous, I
+         * knew) to prevent cpu going down. */
+        preempt_disable();
+        if (!cpu_online(cpu_id)) {
+                preempt_enable();
+                return 0;
+        }
+
+#ifdef CONFIG_SMP
+#ifdef CONFIG_PPC64     /* XXX for now */
+        pvr = per_cpu(pvr, cpu_id);
+#else
+        pvr = cpu_data[cpu_id].pvr;
+#endif
+#else
+        pvr = mfspr(SPRN_PVR);
+#endif
+        maj = (pvr >> 8) & 0xFF;
+        min = pvr & 0xFF;
+
+        seq_printf(m, "processor\t: %lu\n", cpu_id);
+        seq_printf(m, "cpu\t\t: ");
+
+        if (cur_cpu_spec->pvr_mask)
+                seq_printf(m, "%s", cur_cpu_spec->cpu_name);
+        else
+                seq_printf(m, "unknown (%08x)", pvr);
+
+#ifdef CONFIG_ALTIVEC
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                seq_printf(m, ", altivec supported");
+#endif /* CONFIG_ALTIVEC */
+
+        seq_printf(m, "\n");
+
+#ifdef CONFIG_TAU
+        if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
+#ifdef CONFIG_TAU_AVERAGE
+                /* more straightforward, but potentially misleading */
+                seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
+                           cpu_temp(i));
+#else
+                /* show the actual temp sensor range */
+                u32 temp;
+                temp = cpu_temp_both(i);
+                seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
+                           temp & 0xff, temp >> 16);
+#endif
+        }
+#endif /* CONFIG_TAU */
+
+        /*
+         * Assume here that all clock rates are the same in a
+         * smp system.  -- Cort
+         */
+        if (ppc_proc_freq)
+                seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
+                           ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
+
+        if (ppc_md.show_percpuinfo != NULL)
+                ppc_md.show_percpuinfo(m, cpu_id);
+
+        /* If we are a Freescale core do a simple check so
+         * we dont have to keep adding cases in the future */
+        if (PVR_VER(pvr) & 0x8000) {
+                maj = PVR_MAJ(pvr);
+                min = PVR_MIN(pvr);
+        } else {
+                switch (PVR_VER(pvr)) {
+                        case 0x0020:    /* 403 family */
+                                maj = PVR_MAJ(pvr) + 1;
+                                min = PVR_MIN(pvr);
+                                break;
+                        case 0x1008:    /* 740P/750P ?? */
+                                maj = ((pvr >> 8) & 0xFF) - 1;
+                                min = pvr & 0xFF;
+                                break;
+                        default:
+                                maj = (pvr >> 8) & 0xFF;
+                                min = pvr & 0xFF;
+                                break;
+                }
+        }
+
+        seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
+                   maj, min, PVR_VER(pvr), PVR_REV(pvr));
+
+#ifdef CONFIG_PPC32
+        seq_printf(m, "bogomips\t: %lu.%02lu\n",
+                   loops_per_jiffy / (500000/HZ),
+                   (loops_per_jiffy / (5000/HZ)) % 100);
+#endif
+
+#ifdef CONFIG_SMP
+        seq_printf(m, "\n");
+#endif
+
+        preempt_enable();
+        return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+        unsigned long i = *pos;
+
+        return i <= NR_CPUS ? (void *)(i + 1) : NULL;
+}
+
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+        ++*pos;
+        return c_start(m, pos);
+}
+
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+
+struct seq_operations cpuinfo_op = {
+        .start =c_start,
+        .next = c_next,
+        .stop = c_stop,
+        .show = show_cpuinfo,
+};
+
+#ifdef CONFIG_PPC_MULTIPLATFORM
+static int __init set_preferred_console(void)
+{
+        struct device_node *prom_stdout = NULL;
+        char *name;
+        u32 *spd;
+        int offset = 0;
+
+        DBG(" -> set_preferred_console()\n");
+
+        /* The user has requested a console so this is already set up. */
+        if (strstr(saved_command_line, "console=")) {
+                DBG(" console was specified !\n");
+                return -EBUSY;
+        }
+
+        if (!of_chosen) {
+                DBG(" of_chosen is NULL !\n");
+                return -ENODEV;
+        }
+        /* We are getting a weird phandle from OF ... */
+        /* ... So use the full path instead */
+        name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
+        if (name == NULL) {
+                DBG(" no linux,stdout-path !\n");
+                return -ENODEV;
+        }
+        prom_stdout = of_find_node_by_path(name);
+        if (!prom_stdout) {
+                DBG(" can't find stdout package %s !\n", name);
+                return -ENODEV;
+        }       
+        DBG("stdout is %s\n", prom_stdout->full_name);
+
+        name = (char *)get_property(prom_stdout, "name", NULL);
+        if (!name) {
+                DBG(" stdout package has no name !\n");
+                goto not_found;
+        }
+        spd = (u32 *)get_property(prom_stdout, "current-speed", NULL);
+
+        if (0)
+                ;
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+        else if (strcmp(name, "serial") == 0) {
+                int i;
+                u32 *reg = (u32 *)get_property(prom_stdout, "reg", &i);
+                if (i > 8) {
+                        switch (reg[1]) {
+                                case 0x3f8:
+                                        offset = 0;
+                                        break;
+                                case 0x2f8:
+                                        offset = 1;
+                                        break;
+                                case 0x898:
+                                        offset = 2;
+                                        break;
+                                case 0x890:
+                                        offset = 3;
+                                        break;
+                                default:
+                                        /* We dont recognise the serial port */
+                                        goto not_found;
+                        }
+                }
+        }
+#endif /* CONFIG_SERIAL_8250_CONSOLE */
+#ifdef CONFIG_PPC_PSERIES
+        else if (strcmp(name, "vty") == 0) {
+                u32 *reg = (u32 *)get_property(prom_stdout, "reg", NULL);
+                char *compat = (char *)get_property(prom_stdout, "compatible", NULL);
+
+                if (reg && compat && (strcmp(compat, "hvterm-protocol") == 0)) {
+                        /* Host Virtual Serial Interface */
+                        switch (reg[0]) {
+                                case 0x30000000:
+                                        offset = 0;
+                                        break;
+                                case 0x30000001:
+                                        offset = 1;
+                                        break;
+                                default:
+                                        goto not_found;
+                        }
+                        of_node_put(prom_stdout);
+                        DBG("Found hvsi console at offset %d\n", offset);
+                        return add_preferred_console("hvsi", offset, NULL);
+                } else {
+                        /* pSeries LPAR virtual console */
+                        of_node_put(prom_stdout);
+                        DBG("Found hvc console\n");
+                        return add_preferred_console("hvc", 0, NULL);
+                }
+        }
+#endif /* CONFIG_PPC_PSERIES */
+#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
+        else if (strcmp(name, "ch-a") == 0)
+                offset = 0;
+        else if (strcmp(name, "ch-b") == 0)
+                offset = 1;
+#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
+        else
+                goto not_found;
+        of_node_put(prom_stdout);
+
+        DBG("Found serial console at ttyS%d\n", offset);
+
+        if (spd) {
+                static char __initdata opt[16];
+                sprintf(opt, "%d", *spd);
+                return add_preferred_console("ttyS", offset, opt);
+        } else
+                return add_preferred_console("ttyS", offset, NULL);
+
+ not_found:
+        DBG("No preferred console found !\n");
+        of_node_put(prom_stdout);
+        return -ENODEV;
+}
+console_initcall(set_preferred_console);
+#endif /* CONFIG_PPC_MULTIPLATFORM */
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
new file mode 100644
index 000000000000..9680ae99b084
--- /dev/null
+++ b/arch/powerpc/kernel/setup_32.c
@@ -0,0 +1,372 @@
+/*
+ * Common prep/pmac/chrp boot and setup code.
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/reboot.h>
+#include <linux/delay.h>
+#include <linux/initrd.h>
+#include <linux/ide.h>
+#include <linux/tty.h>
+#include <linux/bootmem.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/cpu.h>
+#include <linux/console.h>
+
+#include <asm/residual.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/processor.h>
+#include <asm/pgtable.h>
+#include <asm/setup.h>
+#include <asm/amigappc.h>
+#include <asm/smp.h>
+#include <asm/elf.h>
+#include <asm/cputable.h>
+#include <asm/bootx.h>
+#include <asm/btext.h>
+#include <asm/machdep.h>
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/pmac_feature.h>
+#include <asm/sections.h>
+#include <asm/nvram.h>
+#include <asm/xmon.h>
+#include <asm/time.h>
+
+#define DBG(fmt...)
+
+#if defined CONFIG_KGDB
+#include <asm/kgdb.h>
+#endif
+
+extern void platform_init(void);
+extern void bootx_init(unsigned long r4, unsigned long phys);
+
+extern void ppc6xx_idle(void);
+extern void power4_idle(void);
+
+boot_infos_t *boot_infos;
+struct ide_machdep_calls ppc_ide_md;
+
+/* XXX should go elsewhere */
+int __irq_offset_value;
+EXPORT_SYMBOL(__irq_offset_value);
+
+int boot_cpuid;
+EXPORT_SYMBOL_GPL(boot_cpuid);
+int boot_cpuid_phys;
+
+unsigned long ISA_DMA_THRESHOLD;
+unsigned int DMA_MODE_READ;
+unsigned int DMA_MODE_WRITE;
+
+int have_of = 1;
+
+#ifdef CONFIG_PPC_MULTIPLATFORM
+int _machine = 0;
+
+extern void prep_init(void);
+extern void pmac_init(void);
+extern void chrp_init(void);
+
+dev_t boot_dev;
+#endif /* CONFIG_PPC_MULTIPLATFORM */
+
+#ifdef CONFIG_MAGIC_SYSRQ
+unsigned long SYSRQ_KEY = 0x54;
+#endif /* CONFIG_MAGIC_SYSRQ */
+
+#ifdef CONFIG_VGA_CONSOLE
+unsigned long vgacon_remap_base;
+#endif
+
+struct machdep_calls ppc_md;
+EXPORT_SYMBOL(ppc_md);
+
+/*
+ * These are used in binfmt_elf.c to put aux entries on the stack
+ * for each elf executable being started.
+ */
+int dcache_bsize;
+int icache_bsize;
+int ucache_bsize;
+
+/*
+ * We're called here very early in the boot.  We determine the machine
+ * type and call the appropriate low-level setup functions.
+ *  -- Cort <cort@fsmlabs.com>
+ *
+ * Note that the kernel may be running at an address which is different
+ * from the address that it was linked at, so we must use RELOC/PTRRELOC
+ * to access static data (including strings).  -- paulus
+ */
+unsigned long __init early_init(unsigned long dt_ptr)
+{
+        unsigned long offset = reloc_offset();
+
+        /* First zero the BSS -- use memset_io, some platforms don't have
+         * caches on yet */
+        memset_io(PTRRELOC(&__bss_start), 0, _end - __bss_start);
+
+        /*
+         * Identify the CPU type and fix up code sections
+         * that depend on which cpu we have.
+         */
+        identify_cpu(offset, 0);
+        do_cpu_ftr_fixups(offset);
+
+        return KERNELBASE + offset;
+}
+
+#ifdef CONFIG_PPC_MULTIPLATFORM
+/*
+ * The PPC_MULTIPLATFORM version of platform_init...
+ */
+void __init platform_init(void)
+{
+        /* if we didn't get any bootinfo telling us what we are... */
+        if (_machine == 0) {
+                /* prep boot loader tells us if we're prep or not */
+                if ( *(unsigned long *)(KERNELBASE) == (0xdeadc0de) )
+                        _machine = _MACH_prep;
+        }
+
+#ifdef CONFIG_PPC_PREP
+        /* not much more to do here, if prep */
+        if (_machine == _MACH_prep) {
+                prep_init();
+                return;
+        }
+#endif
+
+#ifdef CONFIG_ADB
+        if (strstr(cmd_line, "adb_sync")) {
+                extern int __adb_probe_sync;
+                __adb_probe_sync = 1;
+        }
+#endif /* CONFIG_ADB */
+
+        switch (_machine) {
+#ifdef CONFIG_PPC_PMAC
+        case _MACH_Pmac:
+                pmac_init();
+                break;
+#endif
+#ifdef CONFIG_PPC_CHRP
+        case _MACH_chrp:
+                chrp_init();
+                break;
+#endif
+        }
+}
+#endif
+
+/*
+ * Find out what kind of machine we're on and save any data we need
+ * from the early boot process (devtree is copied on pmac by prom_init()).
+ * This is called very early on the boot process, after a minimal
+ * MMU environment has been set up but before MMU_init is called.
+ */
+void __init machine_init(unsigned long dt_ptr, unsigned long phys)
+{
+        early_init_devtree(__va(dt_ptr));
+
+#ifdef CONFIG_CMDLINE
+        strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
+#endif /* CONFIG_CMDLINE */
+
+        platform_init();
+
+#ifdef CONFIG_6xx
+        ppc_md.power_save = ppc6xx_idle;
+#endif
+
+        if (ppc_md.progress)
+                ppc_md.progress("id mach(): done", 0x200);
+}
+
+#ifdef CONFIG_BOOKE_WDT
+/* Checks wdt=x and wdt_period=xx command-line option */
+int __init early_parse_wdt(char *p)
+{
+        if (p && strncmp(p, "0", 1) != 0)
+               booke_wdt_enabled = 1;
+
+        return 0;
+}
+early_param("wdt", early_parse_wdt);
+
+int __init early_parse_wdt_period (char *p)
+{
+        if (p)
+                booke_wdt_period = simple_strtoul(p, NULL, 0);
+
+        return 0;
+}
+early_param("wdt_period", early_parse_wdt_period);
+#endif  /* CONFIG_BOOKE_WDT */
+
+/* Checks "l2cr=xxxx" command-line option */
+int __init ppc_setup_l2cr(char *str)
+{
+        if (cpu_has_feature(CPU_FTR_L2CR)) {
+                unsigned long val = simple_strtoul(str, NULL, 0);
+                printk(KERN_INFO "l2cr set to %lx\n", val);
+                _set_L2CR(0);           /* force invalidate by disable cache */
+                _set_L2CR(val);         /* and enable it */
+        }
+        return 1;
+}
+__setup("l2cr=", ppc_setup_l2cr);
+
+#ifdef CONFIG_GENERIC_NVRAM
+
+/* Generic nvram hooks used by drivers/char/gen_nvram.c */
+unsigned char nvram_read_byte(int addr)
+{
+        if (ppc_md.nvram_read_val)
+                return ppc_md.nvram_read_val(addr);
+        return 0xff;
+}
+EXPORT_SYMBOL(nvram_read_byte);
+
+void nvram_write_byte(unsigned char val, int addr)
+{
+        if (ppc_md.nvram_write_val)
+                ppc_md.nvram_write_val(addr, val);
+}
+EXPORT_SYMBOL(nvram_write_byte);
+
+void nvram_sync(void)
+{
+        if (ppc_md.nvram_sync)
+                ppc_md.nvram_sync();
+}
+EXPORT_SYMBOL(nvram_sync);
+
+#endif /* CONFIG_NVRAM */
+
+static struct cpu cpu_devices[NR_CPUS];
+
+int __init ppc_init(void)
+{
+        int i;
+
+        /* clear the progress line */
+        if ( ppc_md.progress ) ppc_md.progress("             ", 0xffff);
+
+        /* register CPU devices */
+        for (i = 0; i < NR_CPUS; i++)
+                if (cpu_possible(i))
+                        register_cpu(&cpu_devices[i], i, NULL);
+
+        /* call platform init */
+        if (ppc_md.init != NULL) {
+                ppc_md.init();
+        }
+        return 0;
+}
+
+arch_initcall(ppc_init);
+
+/* Warning, IO base is not yet inited */
+void __init setup_arch(char **cmdline_p)
+{
+        extern char *klimit;
+        extern void do_init_bootmem(void);
+
+        /* so udelay does something sensible, assume <= 1000 bogomips */
+        loops_per_jiffy = 500000000 / HZ;
+
+        unflatten_device_tree();
+        finish_device_tree();
+
+#ifdef CONFIG_BOOTX_TEXT
+        init_boot_display();
+#endif
+
+#ifdef CONFIG_PPC_PMAC
+        /* This could be called "early setup arch", it must be done
+         * now because xmon need it
+         */
+        if (_machine == _MACH_Pmac)
+                pmac_feature_init();    /* New cool way */
+#endif
+
+#ifdef CONFIG_XMON
+        xmon_map_scc();
+        if (strstr(cmd_line, "xmon")) {
+                xmon_init(1);
+                debugger(NULL);
+        }
+#endif /* CONFIG_XMON */
+        if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab);
+
+#if defined(CONFIG_KGDB)
+        if (ppc_md.kgdb_map_scc)
+                ppc_md.kgdb_map_scc();
+        set_debug_traps();
+        if (strstr(cmd_line, "gdb")) {
+                if (ppc_md.progress)
+                        ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
+                printk("kgdb breakpoint activated\n");
+                breakpoint();
+        }
+#endif
+
+        /*
+         * Set cache line size based on type of cpu as a default.
+         * Systems with OF can look in the properties on the cpu node(s)
+         * for a possibly more accurate value.
+         */
+        if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
+                dcache_bsize = cur_cpu_spec->dcache_bsize;
+                icache_bsize = cur_cpu_spec->icache_bsize;
+                ucache_bsize = 0;
+        } else
+                ucache_bsize = dcache_bsize = icache_bsize
+                        = cur_cpu_spec->dcache_bsize;
+
+        /* reboot on panic */
+        panic_timeout = 180;
+
+        init_mm.start_code = PAGE_OFFSET;
+        init_mm.end_code = (unsigned long) _etext;
+        init_mm.end_data = (unsigned long) _edata;
+        init_mm.brk = (unsigned long) klimit;
+
+        /* Save unparsed command line copy for /proc/cmdline */
+        strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
+        *cmdline_p = cmd_line;
+
+        parse_early_param();
+
+        /* set up the bootmem stuff with available memory */
+        do_init_bootmem();
+        if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
+
+#ifdef CONFIG_PPC_OCP
+        /* Initialize OCP device list */
+        ocp_early_init();
+        if ( ppc_md.progress ) ppc_md.progress("ocp: exit", 0x3eab);
+#endif
+
+#ifdef CONFIG_DUMMY_CONSOLE
+        conswitchp = &dummy_con;
+#endif
+
+        ppc_md.setup_arch();
+        if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
+
+        paging_init();
+
+        /* this is for modules since _machine can be a define -- Cort */
+        ppc_md.ppc_machine = _machine;
+}
diff --git a/arch/ppc64/kernel/setup.c b/arch/powerpc/kernel/setup_64.c
index 5ac48bd64891..40c48100bf1b 100644
--- a/arch/ppc64/kernel/setup.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -37,7 +37,6 @@
 #include <asm/prom.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
-#include <asm/bootinfo.h>
 #include <asm/smp.h>
 #include <asm/elf.h>
 #include <asm/machdep.h>
@@ -58,6 +57,9 @@
 #include <asm/mmu.h>
 #include <asm/lmb.h>
 #include <asm/iSeries/ItLpNaca.h>
+#include <asm/firmware.h>
+#include <asm/systemcfg.h>
+#include <asm/xmon.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -136,24 +138,7 @@ static struct notifier_block ppc64_panic_block = {
         .priority = INT_MIN /* may not return; must be done last */
 };
 
-/*
- * Perhaps we can put the pmac screen_info[] here
- * on pmac as well so we don't need the ifdef's.
- * Until we get multiple-console support in here
- * that is.  -- Cort
- * Maybe tie it to serial consoles, since this is really what
- * these processors use on existing boards.  -- Dan
- */ 
-struct screen_info screen_info = {
-        .orig_x = 0,
-        .orig_y = 25,
-        .orig_video_cols = 80,
-        .orig_video_lines = 25,
-        .orig_video_isVGA = 1,
-        .orig_video_points = 16
-};
-
-#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_SMP)
+#ifdef CONFIG_SMP
 
 static int smt_enabled_cmdline;
 
@@ -306,15 +291,13 @@ static void __init setup_cpu_maps(void)
 
         systemcfg->processorCount = num_present_cpus();
 }
-#endif /* defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_SMP) */
-
-
-#ifdef CONFIG_PPC_MULTIPLATFORM
+#endif /* CONFIG_SMP */
 
 extern struct machdep_calls pSeries_md;
 extern struct machdep_calls pmac_md;
 extern struct machdep_calls maple_md;
 extern struct machdep_calls bpa_md;
+extern struct machdep_calls iseries_md;
 
 /* Ultimately, stuff them in an elf section like initcalls... */
 static struct machdep_calls __initdata *machines[] = {
@@ -330,6 +313,9 @@ static struct machdep_calls __initdata *machines[] = {
 #ifdef CONFIG_PPC_BPA
         &bpa_md,
 #endif
+#ifdef CONFIG_PPC_ISERIES
+        &iseries_md,
+#endif
         NULL
 };
 
@@ -401,7 +387,8 @@ void __init early_setup(unsigned long dt_ptr)
         /*
          * Initialize stab / SLB management
          */
-        stab_initialize(lpaca->stab_real);
+        if (!firmware_has_feature(FW_FEATURE_ISERIES))
+                stab_initialize(lpaca->stab_real);
 
         /*
          * Initialize the MMU Hash table and create the linear mapping
@@ -532,8 +519,6 @@ static void __init check_for_initrd(void)
 #endif /* CONFIG_BLK_DEV_INITRD */
 }
 
-#endif /* CONFIG_PPC_MULTIPLATFORM */
-
 /*
  * Do some initial setup of the system.  The parameters are those which 
  * were passed in from the bootloader.
@@ -542,14 +527,6 @@ void __init setup_system(void)
 {
         DBG(" -> setup_system()\n");
 
-#ifdef CONFIG_PPC_ISERIES
-        /* pSeries systems are identified in prom.c via OF. */
-        if (itLpNaca.xLparInstalled == 1)
-                systemcfg->platform = PLATFORM_ISERIES_LPAR;
-
-        ppc_md.init_early();
-#else /* CONFIG_PPC_ISERIES */
-
         /*
          * Unflatten the device-tree passed by prom_init or kexec
          */
@@ -592,6 +569,10 @@ void __init setup_system(void)
          */
         finish_device_tree();
 
+#ifdef CONFIG_BOOTX_TEXT
+        init_boot_display();
+#endif
+
         /*
          * Initialize xmon
          */
@@ -607,9 +588,8 @@ void __init setup_system(void)
         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 
         parse_early_param();
-#endif /* !CONFIG_PPC_ISERIES */
 
-#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES)
+#ifdef CONFIG_SMP
         /*
          * iSeries has already initialized the cpu maps at this point.
          */
@@ -619,7 +599,7 @@ void __init setup_system(void)
          * we can map physical -> logical CPU ids
          */
         smp_release_cpus();
-#endif /* defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES) */
+#endif
 
         printk("Starting Linux PPC64 %s\n", system_utsname.version);
 
@@ -644,51 +624,6 @@ void __init setup_system(void)
         DBG(" <- setup_system()\n");
 }
 
-/* also used by kexec */
-void machine_shutdown(void)
-{
-        if (ppc_md.nvram_sync)
-                ppc_md.nvram_sync();
-}
-
-void machine_restart(char *cmd)
-{
-        machine_shutdown();
-        ppc_md.restart(cmd);
-#ifdef CONFIG_SMP
-        smp_send_stop();
-#endif
-        printk(KERN_EMERG "System Halted, OK to turn off power\n");
-        local_irq_disable();
-        while (1) ;
-}
-
-void machine_power_off(void)
-{
-        machine_shutdown();
-        ppc_md.power_off();
-#ifdef CONFIG_SMP
-        smp_send_stop();
-#endif
-        printk(KERN_EMERG "System Halted, OK to turn off power\n");
-        local_irq_disable();
-        while (1) ;
-}
-/* Used by the G5 thermal driver */
-EXPORT_SYMBOL_GPL(machine_power_off);
-
-void machine_halt(void)
-{
-        machine_shutdown();
-        ppc_md.halt();
-#ifdef CONFIG_SMP
-        smp_send_stop();
-#endif
-        printk(KERN_EMERG "System Halted, OK to turn off power\n");
-        local_irq_disable();
-        while (1) ;
-}
-
 static int ppc64_panic_event(struct notifier_block *this,
                              unsigned long event, void *ptr)
 {
@@ -696,99 +631,6 @@ static int ppc64_panic_event(struct notifier_block *this,
         return NOTIFY_DONE;
 }
 
-
-#ifdef CONFIG_SMP
-DEFINE_PER_CPU(unsigned int, pvr);
-#endif
-
-static int show_cpuinfo(struct seq_file *m, void *v)
-{
-        unsigned long cpu_id = (unsigned long)v - 1;
-        unsigned int pvr;
-        unsigned short maj;
-        unsigned short min;
-
-        if (cpu_id == NR_CPUS) {
-                seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
-
-                if (ppc_md.get_cpuinfo != NULL)
-                        ppc_md.get_cpuinfo(m);
-
-                return 0;
-        }
-
-        /* We only show online cpus: disable preempt (overzealous, I
-         * knew) to prevent cpu going down. */
-        preempt_disable();
-        if (!cpu_online(cpu_id)) {
-                preempt_enable();
-                return 0;
-        }
-
-#ifdef CONFIG_SMP
-        pvr = per_cpu(pvr, cpu_id);
-#else
-        pvr = mfspr(SPRN_PVR);
-#endif
-        maj = (pvr >> 8) & 0xFF;
-        min = pvr & 0xFF;
-
-        seq_printf(m, "processor\t: %lu\n", cpu_id);
-        seq_printf(m, "cpu\t\t: ");
-
-        if (cur_cpu_spec->pvr_mask)
-                seq_printf(m, "%s", cur_cpu_spec->cpu_name);
-        else
-                seq_printf(m, "unknown (%08x)", pvr);
-
-#ifdef CONFIG_ALTIVEC
-        if (cpu_has_feature(CPU_FTR_ALTIVEC))
-                seq_printf(m, ", altivec supported");
-#endif /* CONFIG_ALTIVEC */
-
-        seq_printf(m, "\n");
-
-        /*
-         * Assume here that all clock rates are the same in a
-         * smp system.  -- Cort
-         */
-        seq_printf(m, "clock\t\t: %lu.%06luMHz\n", ppc_proc_freq / 1000000,
-                   ppc_proc_freq % 1000000);
-
-        seq_printf(m, "revision\t: %hd.%hd\n\n", maj, min);
-
-        preempt_enable();
-        return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
-        return *pos <= NR_CPUS ? (void *)((*pos)+1) : NULL;
-}
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
-        ++*pos;
-        return c_start(m, pos);
-}
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-struct seq_operations cpuinfo_op = {
-        .start =c_start,
-        .next = c_next,
-        .stop = c_stop,
-        .show = show_cpuinfo,
-};
-
-/*
- * These three variables are used to save values passed to us by prom_init()
- * via the device tree. The TCE variables are needed because with a memory_limit
- * in force we may need to explicitly map the TCE are at the top of RAM.
- */
-unsigned long memory_limit;
-unsigned long tce_alloc_start;
-unsigned long tce_alloc_end;
-
 #ifdef CONFIG_PPC_ISERIES
 /*
  * On iSeries we just parse the mem=X option from the command line.
@@ -806,130 +648,6 @@ static int __init early_parsemem(char *p)
 early_param("mem", early_parsemem);
 #endif /* CONFIG_PPC_ISERIES */
 
-#ifdef CONFIG_PPC_MULTIPLATFORM
-static int __init set_preferred_console(void)
-{
-        struct device_node *prom_stdout = NULL;
-        char *name;
-        u32 *spd;
-        int offset = 0;
-
-        DBG(" -> set_preferred_console()\n");
-
-        /* The user has requested a console so this is already set up. */
-        if (strstr(saved_command_line, "console=")) {
-                DBG(" console was specified !\n");
-                return -EBUSY;
-        }
-
-        if (!of_chosen) {
-                DBG(" of_chosen is NULL !\n");
-                return -ENODEV;
-        }
-        /* We are getting a weird phandle from OF ... */
-        /* ... So use the full path instead */
-        name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
-        if (name == NULL) {
-                DBG(" no linux,stdout-path !\n");
-                return -ENODEV;
-        }
-        prom_stdout = of_find_node_by_path(name);
-        if (!prom_stdout) {
-                DBG(" can't find stdout package %s !\n", name);
-                return -ENODEV;
-        }       
-        DBG("stdout is %s\n", prom_stdout->full_name);
-
-        name = (char *)get_property(prom_stdout, "name", NULL);
-        if (!name) {
-                DBG(" stdout package has no name !\n");
-                goto not_found;
-        }
-        spd = (u32 *)get_property(prom_stdout, "current-speed", NULL);
-
-        if (0)
-                ;
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-        else if (strcmp(name, "serial") == 0) {
-                int i;
-                u32 *reg = (u32 *)get_property(prom_stdout, "reg", &i);
-                if (i > 8) {
-                        switch (reg[1]) {
-                                case 0x3f8:
-                                        offset = 0;
-                                        break;
-                                case 0x2f8:
-                                        offset = 1;
-                                        break;
-                                case 0x898:
-                                        offset = 2;
-                                        break;
-                                case 0x890:
-                                        offset = 3;
-                                        break;
-                                default:
-                                        /* We dont recognise the serial port */
-                                        goto not_found;
-                        }
-                }
-        }
-#endif /* CONFIG_SERIAL_8250_CONSOLE */
-#ifdef CONFIG_PPC_PSERIES
-        else if (strcmp(name, "vty") == 0) {
-                u32 *reg = (u32 *)get_property(prom_stdout, "reg", NULL);
-                char *compat = (char *)get_property(prom_stdout, "compatible", NULL);
-
-                if (reg && compat && (strcmp(compat, "hvterm-protocol") == 0)) {
-                        /* Host Virtual Serial Interface */
-                        int offset;
-                        switch (reg[0]) {
-                                case 0x30000000:
-                                        offset = 0;
-                                        break;
-                                case 0x30000001:
-                                        offset = 1;
-                                        break;
-                                default:
-                                        goto not_found;
-                        }
-                        of_node_put(prom_stdout);
-                        DBG("Found hvsi console at offset %d\n", offset);
-                        return add_preferred_console("hvsi", offset, NULL);
-                } else {
-                        /* pSeries LPAR virtual console */
-                        of_node_put(prom_stdout);
-                        DBG("Found hvc console\n");
-                        return add_preferred_console("hvc", 0, NULL);
-                }
-        }
-#endif /* CONFIG_PPC_PSERIES */
-#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
-        else if (strcmp(name, "ch-a") == 0)
-                offset = 0;
-        else if (strcmp(name, "ch-b") == 0)
-                offset = 1;
-#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
-        else
-                goto not_found;
-        of_node_put(prom_stdout);
-
-        DBG("Found serial console at ttyS%d\n", offset);
-
-        if (spd) {
-                static char __initdata opt[16];
-                sprintf(opt, "%d", *spd);
-                return add_preferred_console("ttyS", offset, opt);
-        } else
-                return add_preferred_console("ttyS", offset, NULL);
-
- not_found:
-        DBG("No preferred console found !\n");
-        of_node_put(prom_stdout);
-        return -ENODEV;
-}
-console_initcall(set_preferred_console);
-#endif /* CONFIG_PPC_MULTIPLATFORM */
-
 #ifdef CONFIG_IRQSTACKS
 static void __init irqstack_early_init(void)
 {
@@ -983,23 +701,22 @@ void __init setup_syscall_map(void)
 {
         unsigned int i, count64 = 0, count32 = 0;
         extern unsigned long *sys_call_table;
-        extern unsigned long *sys_call_table32;
         extern unsigned long sys_ni_syscall;
 
 
         for (i = 0; i < __NR_syscalls; i++) {
-                if (sys_call_table[i] == sys_ni_syscall)
-                        continue;
-                count64++;
-                systemcfg->syscall_map_64[i >> 5] |= 0x80000000UL >> (i & 0x1f);
-        }
-        for (i = 0; i < __NR_syscalls; i++) {
-                if (sys_call_table32[i] == sys_ni_syscall)
-                        continue;
-                count32++;
-                systemcfg->syscall_map_32[i >> 5] |= 0x80000000UL >> (i & 0x1f);
+                if (sys_call_table[i*2] != sys_ni_syscall) {
+                        count64++;
+                        systemcfg->syscall_map_64[i >> 5] |=
+                                0x80000000UL >> (i & 0x1f);
+                }
+                if (sys_call_table[i*2+1] != sys_ni_syscall) {
+                        count32++;
+                        systemcfg->syscall_map_32[i >> 5] |=
+                                0x80000000UL >> (i & 0x1f);
+                }
         }
-        printk(KERN_INFO "Syscall map setup, %d 32 bits and %d 64 bits syscalls\n",
+        printk(KERN_INFO "Syscall map setup, %d 32-bit and %d 64-bit syscalls\n",
                count32, count64);
 }
 
@@ -1047,6 +764,10 @@ void __init setup_arch(char **cmdline_p)
         /* initialize the syscall map in systemcfg */
         setup_syscall_map();
 
+#ifdef CONFIG_DUMMY_CONSOLE
+        conswitchp = &dummy_con;
+#endif
+
         ppc_md.setup_arch();
 
         /* Use the default idle loop if the platform hasn't provided one. */
@@ -1091,15 +812,6 @@ void ppc64_terminate_msg(unsigned int src, const char *msg)
         printk("[terminate]%04x %s\n", src, msg);
 }
 
-/* This should only be called on processor 0 during calibrate decr */
-void __init setup_default_decr(void)
-{
-        struct paca_struct *lpaca = get_paca();
-
-        lpaca->default_decr = tb_ticks_per_jiffy;
-        lpaca->next_jiffy_update_tb = get_tb() + tb_ticks_per_jiffy;
-}
-
 #ifndef CONFIG_PPC_ISERIES
 /*
  * This function can be used by platforms to "find" legacy serial ports.
diff --git a/arch/ppc64/kernel/signal32.c b/arch/powerpc/kernel/signal_32.c
index a8b7a5a56bb4..444c3e81884c 100644
--- a/arch/ppc64/kernel/signal32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -1,56 +1,353 @@
 /*
- * signal32.c: Support 32bit signal syscalls.
+ * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
  *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  * Copyright (C) 2001 IBM
  * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
  *
- * These routines maintain argument size conversion between 32bit and 64bit
- * environment.
+ *  Derived from "arch/i386/kernel/signal.c"
+ *    Copyright (C) 1991, 1992 Linus Torvalds
+ *    1997-11-28  Modified for POSIX.1b signals by Richard Henderson
  *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
  */
 
 #include <linux/config.h>
 #include <linux/sched.h>
-#include <linux/mm.h> 
+#include <linux/mm.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/kernel.h>
 #include <linux/signal.h>
-#include <linux/syscalls.h>
 #include <linux/errno.h>
 #include <linux/elf.h>
+#ifdef CONFIG_PPC64
+#include <linux/syscalls.h>
 #include <linux/compat.h>
 #include <linux/ptrace.h>
-#include <asm/ppc32.h>
+#else
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/stddef.h>
+#include <linux/tty.h>
+#include <linux/binfmts.h>
+#include <linux/suspend.h>
+#endif
+
 #include <asm/uaccess.h>
+#include <asm/cacheflush.h>
+#ifdef CONFIG_PPC64
+#include <asm/ppc32.h>
 #include <asm/ppcdebug.h>
 #include <asm/unistd.h>
-#include <asm/cacheflush.h>
 #include <asm/vdso.h>
+#else
+#include <asm/ucontext.h>
+#include <asm/pgtable.h>
+#endif
 
-#define DEBUG_SIG 0
+#undef DEBUG_SIG
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
-#define GP_REGS_SIZE32  min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
+#ifdef CONFIG_PPC64
+#define do_signal       do_signal32
+#define sys_sigsuspend  compat_sys_sigsuspend
+#define sys_rt_sigsuspend       compat_sys_rt_sigsuspend
+#define sys_rt_sigreturn        compat_sys_rt_sigreturn
+#define sys_sigaction   compat_sys_sigaction
+#define sys_swapcontext compat_sys_swapcontext
+#define sys_sigreturn   compat_sys_sigreturn
+
+#define old_sigaction   old_sigaction32
+#define sigcontext      sigcontext32
+#define mcontext        mcontext32
+#define ucontext        ucontext32
+
+/*
+ * Returning 0 means we return to userspace via
+ * ret_from_except and thus restore all user
+ * registers from *regs.  This is what we need
+ * to do when a signal has been delivered.
+ */
+#define sigreturn_exit(regs)    return 0
+
+#define GP_REGS_SIZE    min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
+#undef __SIGNAL_FRAMESIZE
+#define __SIGNAL_FRAMESIZE      __SIGNAL_FRAMESIZE32
+#undef ELF_NVRREG
+#define ELF_NVRREG      ELF_NVRREG32
+
+/*
+ * Functions for flipping sigsets (thanks to brain dead generic
+ * implementation that makes things simple for little endian only)
+ */
+static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
+{
+        compat_sigset_t cset;
+
+        switch (_NSIG_WORDS) {
+        case 4: cset.sig[5] = set->sig[3] & 0xffffffffull;
+                cset.sig[7] = set->sig[3] >> 32;
+        case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
+                cset.sig[5] = set->sig[2] >> 32;
+        case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
+                cset.sig[3] = set->sig[1] >> 32;
+        case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
+                cset.sig[1] = set->sig[0] >> 32;
+        }
+        return copy_to_user(uset, &cset, sizeof(*uset));
+}
+
+static inline int get_sigset_t(sigset_t *set,
+                               const compat_sigset_t __user *uset)
+{
+        compat_sigset_t s32;
+
+        if (copy_from_user(&s32, uset, sizeof(*uset)))
+                return -EFAULT;
+
+        /*
+         * Swap the 2 words of the 64-bit sigset_t (they are stored
+         * in the "wrong" endian in 32-bit user storage).
+         */
+        switch (_NSIG_WORDS) {
+        case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
+        case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
+        case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
+        case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
+        }
+        return 0;
+}
+
+static inline int get_old_sigaction(struct k_sigaction *new_ka,
+                struct old_sigaction __user *act)
+{
+        compat_old_sigset_t mask;
+        compat_uptr_t handler, restorer;
+
+        if (get_user(handler, &act->sa_handler) ||
+            __get_user(restorer, &act->sa_restorer) ||
+            __get_user(new_ka->sa.sa_flags, &act->sa_flags) ||
+            __get_user(mask, &act->sa_mask))
+                return -EFAULT;
+        new_ka->sa.sa_handler = compat_ptr(handler);
+        new_ka->sa.sa_restorer = compat_ptr(restorer);
+        siginitset(&new_ka->sa.sa_mask, mask);
+        return 0;
+}
+
+static inline compat_uptr_t to_user_ptr(void *kp)
+{
+        return (compat_uptr_t)(u64)kp;
+}
+
+#define from_user_ptr(p)        compat_ptr(p)
+
+static inline int save_general_regs(struct pt_regs *regs,
+                struct mcontext __user *frame)
+{
+        elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
+        int i;
+
+        for (i = 0; i <= PT_RESULT; i ++)
+                if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
+                        return -EFAULT;
+        return 0;
+}
+
+static inline int restore_general_regs(struct pt_regs *regs,
+                struct mcontext __user *sr)
+{
+        elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
+        int i;
+
+        for (i = 0; i <= PT_RESULT; i++) {
+                if ((i == PT_MSR) || (i == PT_SOFTE))
+                        continue;
+                if (__get_user(gregs[i], &sr->mc_gregs[i]))
+                        return -EFAULT;
+        }
+        return 0;
+}
+
+#else /* CONFIG_PPC64 */
+
+extern void sigreturn_exit(struct pt_regs *);
+
+#define GP_REGS_SIZE    min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
+
+static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
+{
+        return copy_to_user(uset, set, sizeof(*uset));
+}
+
+static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
+{
+        return copy_from_user(set, uset, sizeof(*uset));
+}
+
+static inline int get_old_sigaction(struct k_sigaction *new_ka,
+                struct old_sigaction __user *act)
+{
+        old_sigset_t mask;
+
+        if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+                        __get_user(new_ka->sa.sa_handler, &act->sa_handler) ||
+                        __get_user(new_ka->sa.sa_restorer, &act->sa_restorer))
+                return -EFAULT;
+        __get_user(new_ka->sa.sa_flags, &act->sa_flags);
+        __get_user(mask, &act->sa_mask);
+        siginitset(&new_ka->sa.sa_mask, mask);
+        return 0;
+}
+
+#define to_user_ptr(p)          (p)
+#define from_user_ptr(p)        (p)
+
+static inline int save_general_regs(struct pt_regs *regs,
+                struct mcontext __user *frame)
+{
+        return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
+}
+
+static inline int restore_general_regs(struct pt_regs *regs,
+                struct mcontext __user *sr)
+{
+        /* copy up to but not including MSR */
+        if (__copy_from_user(regs, &sr->mc_gregs,
+                                PT_MSR * sizeof(elf_greg_t)))
+                return -EFAULT;
+        /* copy from orig_r3 (the word after the MSR) up to the end */
+        if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
+                                GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
+                return -EFAULT;
+        return 0;
+}
+
+#endif /* CONFIG_PPC64 */
+
+int do_signal(sigset_t *oldset, struct pt_regs *regs);
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+long sys_sigsuspend(old_sigset_t mask, int p2, int p3, int p4, int p6, int p7,
+               struct pt_regs *regs)
+{
+        sigset_t saveset;
+
+        mask &= _BLOCKABLE;
+        spin_lock_irq(&current->sighand->siglock);
+        saveset = current->blocked;
+        siginitset(&current->blocked, mask);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        regs->result = -EINTR;
+        regs->gpr[3] = EINTR;
+        regs->ccr |= 0x10000000;
+        while (1) {
+                current->state = TASK_INTERRUPTIBLE;
+                schedule();
+                if (do_signal(&saveset, regs))
+                        sigreturn_exit(regs);
+        }
+}
+
+long sys_rt_sigsuspend(
+#ifdef CONFIG_PPC64
+                compat_sigset_t __user *unewset,
+#else
+                sigset_t __user *unewset,
+#endif
+                size_t sigsetsize, int p3, int p4,
+                int p6, int p7, struct pt_regs *regs)
+{
+        sigset_t saveset, newset;
+
+        /* XXX: Don't preclude handling different sized sigset_t's.  */
+        if (sigsetsize != sizeof(sigset_t))
+                return -EINVAL;
+
+        if (get_sigset_t(&newset, unewset))
+                return -EFAULT;
+        sigdelsetmask(&newset, ~_BLOCKABLE);
+
+        spin_lock_irq(&current->sighand->siglock);
+        saveset = current->blocked;
+        current->blocked = newset;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        regs->result = -EINTR;
+        regs->gpr[3] = EINTR;
+        regs->ccr |= 0x10000000;
+        while (1) {
+                current->state = TASK_INTERRUPTIBLE;
+                schedule();
+                if (do_signal(&saveset, regs))
+                        sigreturn_exit(regs);
+        }
+}
+
+#ifdef CONFIG_PPC32
+long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, int r5,
+                int r6, int r7, int r8, struct pt_regs *regs)
+{
+        return do_sigaltstack(uss, uoss, regs->gpr[1]);
+}
+#endif
+
+long sys_sigaction(int sig, struct old_sigaction __user *act,
+                struct old_sigaction __user *oact)
+{
+        struct k_sigaction new_ka, old_ka;
+        int ret;
+
+#ifdef CONFIG_PPC64
+        if (sig < 0)
+                sig = -sig;
+#endif
+
+        if (act) {
+                if (get_old_sigaction(&new_ka, act))
+                        return -EFAULT;
+        }
+
+        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+        if (!ret && oact) {
+                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+                    __put_user(to_user_ptr(old_ka.sa.sa_handler),
+                            &oact->sa_handler) ||
+                    __put_user(to_user_ptr(old_ka.sa.sa_restorer),
+                            &oact->sa_restorer) ||
+                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
+                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
+                        return -EFAULT;
+        }
+
+        return ret;
+}
 
 /*
  * When we have signals to deliver, we set up on the
  * user stack, going down from the original stack pointer:
- *      a sigregs32 struct
- *      a sigcontext32 struct
- *      a gap of __SIGNAL_FRAMESIZE32 bytes
+ *      a sigregs struct
+ *      a sigcontext struct
+ *      a gap of __SIGNAL_FRAMESIZE bytes
  *
  * Each of these things must be a multiple of 16 bytes in size.
  *
  */
-struct sigregs32 {
-        struct mcontext32       mctx;           /* all the register values */
+struct sigregs {
+        struct mcontext mctx;           /* all the register values */
         /*
          * Programs using the rs6000/xcoff abi can save up to 19 gp
          * regs and 18 fp regs below sp before decrementing it.
@@ -64,17 +361,21 @@ struct sigregs32 {
 /*
  *  When we have rt signals to deliver, we set up on the
  *  user stack, going down from the original stack pointer:
- *      one rt_sigframe32 struct (siginfo + ucontext + ABI gap)
- *      a gap of __SIGNAL_FRAMESIZE32+16 bytes
- *  (the +16 is to get the siginfo and ucontext32 in the same
+ *      one rt_sigframe struct (siginfo + ucontext + ABI gap)
+ *      a gap of __SIGNAL_FRAMESIZE+16 bytes
+ *  (the +16 is to get the siginfo and ucontext in the same
  *  positions as in older kernels).
  *
  *  Each of these things must be a multiple of 16 bytes in size.
  *
  */
-struct rt_sigframe32 {
-        compat_siginfo_t        info;
-        struct ucontext32       uc;
+struct rt_sigframe {
+#ifdef CONFIG_PPC64
+        compat_siginfo_t info;
+#else
+        struct siginfo info;
+#endif
+        struct ucontext uc;
         /*
          * Programs using the rs6000/xcoff abi can save up to 19 gp
          * regs and 18 fp regs below sp before decrementing it.
@@ -82,76 +383,34 @@ struct rt_sigframe32 {
         int                     abigap[56];
 };
 
-
-/*
- * Common utility functions used by signal and context support
- *
- */
-
-/*
- * Restore the user process's signal mask
- * (implemented in signal.c)
- */
-extern void restore_sigmask(sigset_t *set);
-
-/*
- * Functions for flipping sigsets (thanks to brain dead generic
- * implementation that makes things simple for little endian only
- */
-static inline void compat_from_sigset(compat_sigset_t *compat, sigset_t *set)
-{
-        switch (_NSIG_WORDS) {
-        case 4: compat->sig[5] = set->sig[3] & 0xffffffffull ;
-                compat->sig[7] = set->sig[3] >> 32; 
-        case 3: compat->sig[4] = set->sig[2] & 0xffffffffull ;
-                compat->sig[5] = set->sig[2] >> 32; 
-        case 2: compat->sig[2] = set->sig[1] & 0xffffffffull ;
-                compat->sig[3] = set->sig[1] >> 32; 
-        case 1: compat->sig[0] = set->sig[0] & 0xffffffffull ;
-                compat->sig[1] = set->sig[0] >> 32; 
-        }
-}
-
-static inline void sigset_from_compat(sigset_t *set, compat_sigset_t *compat)
-{
-        switch (_NSIG_WORDS) {
-        case 4: set->sig[3] = compat->sig[6] | (((long)compat->sig[7]) << 32);
-        case 3: set->sig[2] = compat->sig[4] | (((long)compat->sig[5]) << 32);
-        case 2: set->sig[1] = compat->sig[2] | (((long)compat->sig[3]) << 32);
-        case 1: set->sig[0] = compat->sig[0] | (((long)compat->sig[1]) << 32);
-        }
-}
-
-
 /*
  * Save the current user registers on the user stack.
- * We only save the altivec registers if the process has used
- * altivec instructions at some point.
+ * We only save the altivec/spe registers if the process has used
+ * altivec/spe instructions at some point.
  */
-static int save_user_regs(struct pt_regs *regs, struct mcontext32 __user *frame, int sigret)
+static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
+                int sigret)
 {
-        elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
-        int i, err = 0;
-
+#ifdef CONFIG_PPC32
+        CHECK_FULL_REGS(regs);
+#endif
         /* Make sure floating point registers are stored in regs */
         flush_fp_to_thread(current);
 
         /* save general and floating-point registers */
-        for (i = 0; i <= PT_RESULT; i ++)
-                err |= __put_user((unsigned int)gregs[i], &frame->mc_gregs[i]);
-        err |= __copy_to_user(&frame->mc_fregs, current->thread.fpr,
-                              ELF_NFPREG * sizeof(double));
-        if (err)
+        if (save_general_regs(regs, frame) ||
+            __copy_to_user(&frame->mc_fregs, current->thread.fpr,
+                    ELF_NFPREG * sizeof(double)))
                 return 1;
 
-        current->thread.fpscr = 0;      /* turn off all fp exceptions */
+        current->thread.fpscr.val = 0;  /* turn off all fp exceptions */
 
 #ifdef CONFIG_ALTIVEC
         /* save altivec registers */
         if (current->thread.used_vr) {
                 flush_altivec_to_thread(current);
                 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
-                                   ELF_NVRREG32 * sizeof(vector128)))
+                                   ELF_NVRREG * sizeof(vector128)))
                         return 1;
                 /* set MSR_VEC in the saved MSR value to indicate that
                    frame->mc_vregs contains valid data */
@@ -169,6 +428,25 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext32 __user *frame,
                 return 1;
 #endif /* CONFIG_ALTIVEC */
 
+#ifdef CONFIG_SPE
+        /* save spe registers */
+        if (current->thread.used_spe) {
+                flush_spe_to_thread(current);
+                if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
+                                   ELF_NEVRREG * sizeof(u32)))
+                        return 1;
+                /* set MSR_SPE in the saved MSR value to indicate that
+                   frame->mc_vregs contains valid data */
+                if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR]))
+                        return 1;
+        }
+        /* else assert((regs->msr & MSR_SPE) == 0) */
+
+        /* We always copy to/from spefscr */
+        if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
+                return 1;
+#endif /* CONFIG_SPE */
+
         if (sigret) {
                 /* Set up the sigreturn trampoline: li r0,sigret; sc */
                 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
@@ -186,13 +464,11 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext32 __user *frame,
  * (except for MSR).
  */
 static long restore_user_regs(struct pt_regs *regs,
-                              struct mcontext32 __user *sr, int sig)
+                              struct mcontext __user *sr, int sig)
 {
-        elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
-        int i;
-        long err = 0;
+        long err;
         unsigned int save_r2 = 0;
-#ifdef CONFIG_ALTIVEC
+#if defined(CONFIG_ALTIVEC) || defined(CONFIG_SPE)
         unsigned long msr;
 #endif
 
@@ -202,11 +478,7 @@ static long restore_user_regs(struct pt_regs *regs,
          */
         if (!sig)
                 save_r2 = (unsigned int)regs->gpr[2];
-        for (i = 0; i <= PT_RESULT; i++) {
-                if ((i == PT_MSR) || (i == PT_SOFTE))
-                        continue;
-                err |= __get_user(gregs[i], &sr->mc_gregs[i]);
-        }
+        err = restore_general_regs(regs, sr);
         if (!sig)
                 regs->gpr[2] = (unsigned long) save_r2;
         if (err)
@@ -229,135 +501,51 @@ static long restore_user_regs(struct pt_regs *regs,
                                      sizeof(sr->mc_vregs)))
                         return 1;
         } else if (current->thread.used_vr)
-                memset(current->thread.vr, 0, ELF_NVRREG32 * sizeof(vector128));
+                memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
 
         /* Always get VRSAVE back */
         if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
                 return 1;
 #endif /* CONFIG_ALTIVEC */
 
+#ifdef CONFIG_SPE
+        /* force the process to reload the spe registers from
+           current->thread when it next does spe instructions */
+        regs->msr &= ~MSR_SPE;
+        if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_SPE) != 0) {
+                /* restore spe registers from the stack */
+                if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
+                                     ELF_NEVRREG * sizeof(u32)))
+                        return 1;
+        } else if (current->thread.used_spe)
+                memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
+
+        /* Always get SPEFSCR back */
+        if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
+                return 1;
+#endif /* CONFIG_SPE */
+
 #ifndef CONFIG_SMP
         preempt_disable();
         if (last_task_used_math == current)
                 last_task_used_math = NULL;
         if (last_task_used_altivec == current)
                 last_task_used_altivec = NULL;
+#ifdef CONFIG_SPE
+        if (last_task_used_spe == current)
+                last_task_used_spe = NULL;
+#endif
         preempt_enable();
 #endif
         return 0;
 }
 
-
-/*
- *  Start of nonRT signal support
- *
- *     sigset_t is 32 bits for non-rt signals
- *
- *  System Calls
- *       sigaction                sys32_sigaction
- *       sigreturn                sys32_sigreturn
- *
- *  Note sigsuspend has no special 32 bit routine - uses the 64 bit routine
- *
- *  Other routines
- *        setup_frame32
- */
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-long sys32_sigsuspend(old_sigset_t mask, int p2, int p3, int p4, int p6, int p7,
-               struct pt_regs *regs)
-{
-        sigset_t saveset;
-
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
-        saveset = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        regs->result = -EINTR;
-        regs->gpr[3] = EINTR;
-        regs->ccr |= 0x10000000;
-        while (1) {
-                current->state = TASK_INTERRUPTIBLE;
-                schedule();
-                if (do_signal32(&saveset, regs))
-                        /*
-                         * Returning 0 means we return to userspace via
-                         * ret_from_except and thus restore all user
-                         * registers from *regs.  This is what we need
-                         * to do when a signal has been delivered.
-                         */
-                        return 0;
-        }
-}
-
-long sys32_sigaction(int sig, struct old_sigaction32 __user *act,
-                struct old_sigaction32 __user *oact)
-{
-        struct k_sigaction new_ka, old_ka;
-        int ret;
-        
-        if (sig < 0)
-                sig = -sig;
-
-        if (act) {
-                compat_old_sigset_t mask;
-                compat_uptr_t handler, restorer;
-
-                if (get_user(handler, &act->sa_handler) ||
-                    __get_user(restorer, &act->sa_restorer) ||
-                    __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
-                    __get_user(mask, &act->sa_mask))
-                        return -EFAULT;
-                new_ka.sa.sa_handler = compat_ptr(handler);
-                new_ka.sa.sa_restorer = compat_ptr(restorer);
-                siginitset(&new_ka.sa.sa_mask, mask);
-        }
-
-        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-        if (!ret && oact) {
-                if (put_user((long)old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user((long)old_ka.sa.sa_restorer, &oact->sa_restorer) ||
-                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
-                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
-                        return -EFAULT;
-        }
-
-        return ret;
-}
-
-
-
-/*
- *  Start of RT signal support
- *
- *     sigset_t is 64 bits for rt signals
- *
- *  System Calls
- *       sigaction                sys32_rt_sigaction
- *       sigpending               sys32_rt_sigpending
- *       sigprocmask              sys32_rt_sigprocmask
- *       sigreturn                sys32_rt_sigreturn
- *       sigqueueinfo             sys32_rt_sigqueueinfo
- *       sigsuspend               sys32_rt_sigsuspend
- *
- *  Other routines
- *        setup_rt_frame32
- *        copy_siginfo_to_user32
- *        siginfo32to64
- */
-
-
-long sys32_rt_sigaction(int sig, const struct sigaction32 __user *act,
+#ifdef CONFIG_PPC64
+long compat_sys_rt_sigaction(int sig, const struct sigaction32 __user *act,
                 struct sigaction32 __user *oact, size_t sigsetsize)
 {
         struct k_sigaction new_ka, old_ka;
         int ret;
-        compat_sigset_t set32;
 
         /* XXX: Don't preclude handling different sized sigset_t's.  */
         if (sigsetsize != sizeof(compat_sigset_t))
@@ -368,9 +556,7 @@ long sys32_rt_sigaction(int sig, const struct sigaction32 __user *act,
 
                 ret = get_user(handler, &act->sa_handler);
                 new_ka.sa.sa_handler = compat_ptr(handler);
-                ret |= __copy_from_user(&set32, &act->sa_mask,
-                                        sizeof(compat_sigset_t));
-                sigset_from_compat(&new_ka.sa.sa_mask, &set32);
+                ret |= get_sigset_t(&new_ka.sa.sa_mask, &act->sa_mask);
                 ret |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
                 if (ret)
                         return -EFAULT;
@@ -378,10 +564,8 @@ long sys32_rt_sigaction(int sig, const struct sigaction32 __user *act,
 
         ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
         if (!ret && oact) {
-                compat_from_sigset(&set32, &old_ka.sa.sa_mask);
                 ret = put_user((long)old_ka.sa.sa_handler, &oact->sa_handler);
-                ret |= __copy_to_user(&oact->sa_mask, &set32,
-                                      sizeof(compat_sigset_t));
+                ret |= put_sigset_t(&oact->sa_mask, &old_ka.sa.sa_mask);
                 ret |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
         }
         return ret;
@@ -394,41 +578,37 @@ long sys32_rt_sigaction(int sig, const struct sigaction32 __user *act,
  * of a signed int (msr in 32-bit mode) and the register representation
  * of a signed int (msr in 64-bit mode) is performed.
  */
-long sys32_rt_sigprocmask(u32 how, compat_sigset_t __user *set,
+long compat_sys_rt_sigprocmask(u32 how, compat_sigset_t __user *set,
                 compat_sigset_t __user *oset, size_t sigsetsize)
 {
         sigset_t s;
         sigset_t __user *up;
-        compat_sigset_t s32;
         int ret;
         mm_segment_t old_fs = get_fs();
 
         if (set) {
-                if (copy_from_user (&s32, set, sizeof(compat_sigset_t)))
-                        return -EFAULT;    
-                sigset_from_compat(&s, &s32);
+                if (get_sigset_t(&s, set))
+                        return -EFAULT;
         }
-        
+
         set_fs(KERNEL_DS);
         /* This is valid because of the set_fs() */
         up = (sigset_t __user *) &s;
         ret = sys_rt_sigprocmask((int)how, set ? up : NULL, oset ? up : NULL,
-                                 sigsetsize); 
+                                 sigsetsize);
         set_fs(old_fs);
         if (ret)
                 return ret;
         if (oset) {
-                compat_from_sigset(&s32, &s);
-                if (copy_to_user (oset, &s32, sizeof(compat_sigset_t)))
+                if (put_sigset_t(oset, &s))
                         return -EFAULT;
         }
         return 0;
 }
 
-long sys32_rt_sigpending(compat_sigset_t __user *set, compat_size_t sigsetsize)
+long compat_sys_rt_sigpending(compat_sigset_t __user *set, compat_size_t sigsetsize)
 {
         sigset_t s;
-        compat_sigset_t s32;
         int ret;
         mm_segment_t old_fs = get_fs();
 
@@ -437,8 +617,7 @@ long sys32_rt_sigpending(compat_sigset_t __user *set, compat_size_t sigsetsize)
         ret = sys_rt_sigpending((sigset_t __user *) &s, sigsetsize);
         set_fs(old_fs);
         if (!ret) {
-                compat_from_sigset(&s32, &s);
-                if (copy_to_user (set, &s32, sizeof(compat_sigset_t)))
+                if (put_sigset_t(set, &s))
                         return -EFAULT;
         }
         return ret;
@@ -500,6 +679,8 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *d, siginfo_t *s)
         return err;
 }
 
+#define copy_siginfo_to_user    copy_siginfo_to_user32
+
 /*
  * Note: it is necessary to treat pid and sig as unsigned ints, with the
  * corresponding cast to a signed int to insure that the proper conversion
@@ -507,12 +688,12 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *d, siginfo_t *s)
  * (msr in 32-bit mode) and the register representation of a signed int
  * (msr in 64-bit mode) is performed.
  */
-long sys32_rt_sigqueueinfo(u32 pid, u32 sig, compat_siginfo_t __user *uinfo)
+long compat_sys_rt_sigqueueinfo(u32 pid, u32 sig, compat_siginfo_t __user *uinfo)
 {
         siginfo_t info;
         int ret;
         mm_segment_t old_fs = get_fs();
-        
+
         if (copy_from_user (&info, uinfo, 3*sizeof(int)) ||
             copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE32))
                 return -EFAULT;
@@ -522,58 +703,14 @@ long sys32_rt_sigqueueinfo(u32 pid, u32 sig, compat_siginfo_t __user *uinfo)
         set_fs (old_fs);
         return ret;
 }
-
-int sys32_rt_sigsuspend(compat_sigset_t __user * unewset, size_t sigsetsize, int p3,
-                int p4, int p6, int p7, struct pt_regs *regs)
-{
-        sigset_t saveset, newset;
-        compat_sigset_t s32;
-
-        /* XXX: Don't preclude handling different sized sigset_t's.  */
-        if (sigsetsize != sizeof(sigset_t))
-                return -EINVAL;
-
-        if (copy_from_user(&s32, unewset, sizeof(s32)))
-                return -EFAULT;
-
-        /*
-         * Swap the 2 words of the 64-bit sigset_t (they are stored
-         * in the "wrong" endian in 32-bit user storage).
-         */
-        sigset_from_compat(&newset, &s32);
-
-        sigdelsetmask(&newset, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        saveset = current->blocked;
-        current->blocked = newset;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        regs->result = -EINTR;
-        regs->gpr[3] = EINTR;
-        regs->ccr |= 0x10000000;
-        while (1) {
-                current->state = TASK_INTERRUPTIBLE;
-                schedule();
-                if (do_signal32(&saveset, regs))
-                        /*
-                         * Returning 0 means we return to userspace via
-                         * ret_from_except and thus restore all user
-                         * registers from *regs.  This is what we need
-                         * to do when a signal has been delivered.
-                         */
-                        return 0;
-        }
-}
-
 /*
  *  Start Alternate signal stack support
  *
  *  System Calls
- *       sigaltatck               sys32_sigaltstack
+ *       sigaltatck               compat_sys_sigaltstack
  */
 
-int sys32_sigaltstack(u32 __new, u32 __old, int r5,
+int compat_sys_sigaltstack(u32 __new, u32 __old, int r5,
                       int r6, int r7, int r8, struct pt_regs *regs)
 {
         stack_32_t __user * newstack = (stack_32_t __user *)(long) __new;
@@ -615,76 +752,94 @@ int sys32_sigaltstack(u32 __new, u32 __old, int r5,
                 return -EFAULT;
         return ret;
 }
+#endif /* CONFIG_PPC64 */
+
 
+/*
+ * Restore the user process's signal mask
+ */
+#ifdef CONFIG_PPC64
+extern void restore_sigmask(sigset_t *set);
+#else /* CONFIG_PPC64 */
+static void restore_sigmask(sigset_t *set)
+{
+        sigdelsetmask(set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = *set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+}
+#endif
 
 /*
  * Set up a signal frame for a "real-time" signal handler
  * (one which gets siginfo).
  */
-static int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
-                              siginfo_t *info, sigset_t *oldset,
-                              struct pt_regs * regs, unsigned long newsp)
+static int handle_rt_signal(unsigned long sig, struct k_sigaction *ka,
+                siginfo_t *info, sigset_t *oldset,
+                struct pt_regs *regs, unsigned long newsp)
 {
-        struct rt_sigframe32 __user *rt_sf;
-        struct mcontext32 __user *frame;
+        struct rt_sigframe __user *rt_sf;
+        struct mcontext __user *frame;
         unsigned long origsp = newsp;
-        compat_sigset_t c_oldset;
 
         /* Set up Signal Frame */
         /* Put a Real Time Context onto stack */
         newsp -= sizeof(*rt_sf);
-        rt_sf = (struct rt_sigframe32 __user *)newsp;
+        rt_sf = (struct rt_sigframe __user *)newsp;
 
         /* create a stack frame for the caller of the handler */
-        newsp -= __SIGNAL_FRAMESIZE32 + 16;
+        newsp -= __SIGNAL_FRAMESIZE + 16;
 
         if (!access_ok(VERIFY_WRITE, (void __user *)newsp, origsp - newsp))
                 goto badframe;
 
-        compat_from_sigset(&c_oldset, oldset);
-
         /* Put the siginfo & fill in most of the ucontext */
-        if (copy_siginfo_to_user32(&rt_sf->info, info)
+        if (copy_siginfo_to_user(&rt_sf->info, info)
             || __put_user(0, &rt_sf->uc.uc_flags)
             || __put_user(0, &rt_sf->uc.uc_link)
             || __put_user(current->sas_ss_sp, &rt_sf->uc.uc_stack.ss_sp)
             || __put_user(sas_ss_flags(regs->gpr[1]),
                           &rt_sf->uc.uc_stack.ss_flags)
             || __put_user(current->sas_ss_size, &rt_sf->uc.uc_stack.ss_size)
-            || __put_user((u32)(u64)&rt_sf->uc.uc_mcontext, &rt_sf->uc.uc_regs)
-            || __copy_to_user(&rt_sf->uc.uc_sigmask, &c_oldset, sizeof(c_oldset)))
+            || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
+                    &rt_sf->uc.uc_regs)
+            || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
                 goto badframe;
 
         /* Save user registers on the stack */
         frame = &rt_sf->uc.uc_mcontext;
-        if (put_user(regs->gpr[1], (u32 __user *)newsp))
-                goto badframe;
-
+#ifdef CONFIG_PPC64
         if (vdso32_rt_sigtramp && current->thread.vdso_base) {
                 if (save_user_regs(regs, frame, 0))
                         goto badframe;
                 regs->link = current->thread.vdso_base + vdso32_rt_sigtramp;
-        } else {
+        } else
+#endif
+        {
                 if (save_user_regs(regs, frame, __NR_rt_sigreturn))
                         goto badframe;
                 regs->link = (unsigned long) frame->tramp;
         }
-        regs->gpr[1] = (unsigned long) newsp;
+        if (put_user(regs->gpr[1], (u32 __user *)newsp))
+                goto badframe;
+        regs->gpr[1] = newsp;
         regs->gpr[3] = sig;
         regs->gpr[4] = (unsigned long) &rt_sf->info;
         regs->gpr[5] = (unsigned long) &rt_sf->uc;
         regs->gpr[6] = (unsigned long) rt_sf;
         regs->nip = (unsigned long) ka->sa.sa_handler;
         regs->trap = 0;
+#ifdef CONFIG_PPC64
         regs->result = 0;
 
         if (test_thread_flag(TIF_SINGLESTEP))
                 ptrace_notify(SIGTRAP);
-
+#endif
         return 1;
 
 badframe:
-#if DEBUG_SIG
+#ifdef DEBUG_SIG
         printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
                regs, frame, newsp);
 #endif
@@ -692,46 +847,50 @@ badframe:
         return 0;
 }
 
-static long do_setcontext32(struct ucontext32 __user *ucp, struct pt_regs *regs, int sig)
+static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
 {
-        compat_sigset_t c_set;
         sigset_t set;
-        u32 mcp;
+        struct mcontext __user *mcp;
+
+        if (get_sigset_t(&set, &ucp->uc_sigmask))
+                return -EFAULT;
+#ifdef CONFIG_PPC64
+        {
+                u32 cmcp;
 
-        if (__copy_from_user(&c_set, &ucp->uc_sigmask, sizeof(c_set))
-            || __get_user(mcp, &ucp->uc_regs))
+                if (__get_user(cmcp, &ucp->uc_regs))
+                        return -EFAULT;
+                mcp = (struct mcontext __user *)(u64)cmcp;
+        }
+#else
+        if (__get_user(mcp, &ucp->uc_regs))
                 return -EFAULT;
-        sigset_from_compat(&set, &c_set);
+#endif
         restore_sigmask(&set);
-        if (restore_user_regs(regs, (struct mcontext32 __user *)(u64)mcp, sig))
+        if (restore_user_regs(regs, mcp, sig))
                 return -EFAULT;
 
         return 0;
 }
 
-/*
- * Handle {get,set,swap}_context operations for 32 bits processes
- */
-
-long sys32_swapcontext(struct ucontext32 __user *old_ctx,
-                       struct ucontext32 __user *new_ctx,
+long sys_swapcontext(struct ucontext __user *old_ctx,
+                       struct ucontext __user *new_ctx,
                        int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
 {
         unsigned char tmp;
-        compat_sigset_t c_set;
 
         /* Context size is for future use. Right now, we only make sure
          * we are passed something we understand
          */
-        if (ctx_size < sizeof(struct ucontext32))
+        if (ctx_size < sizeof(struct ucontext))
                 return -EINVAL;
 
         if (old_ctx != NULL) {
-                compat_from_sigset(&c_set, &current->blocked);
                 if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx))
                     || save_user_regs(regs, &old_ctx->uc_mcontext, 0)
-                    || __copy_to_user(&old_ctx->uc_sigmask, &c_set, sizeof(c_set))
-                    || __put_user((u32)(u64)&old_ctx->uc_mcontext, &old_ctx->uc_regs))
+                    || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
+                    || __put_user(to_user_ptr(&old_ctx->uc_mcontext),
+                            &old_ctx->uc_regs))
                         return -EFAULT;
         }
         if (new_ctx == NULL)
@@ -752,27 +911,26 @@ long sys32_swapcontext(struct ucontext32 __user *old_ctx,
          * or if another thread unmaps the region containing the context.
          * We kill the task with a SIGSEGV in this situation.
          */
-        if (do_setcontext32(new_ctx, regs, 0))
+        if (do_setcontext(new_ctx, regs, 0))
                 do_exit(SIGSEGV);
-
+        sigreturn_exit(regs);
+        /* doesn't actually return back to here */
         return 0;
 }
 
-long sys32_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
+long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
                      struct pt_regs *regs)
 {
-        struct rt_sigframe32 __user *rt_sf;
-        int ret;
-
+        struct rt_sigframe __user *rt_sf;
 
         /* Always make any pending restarted system calls return -EINTR */
         current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
-        rt_sf = (struct rt_sigframe32 __user *)
-                (regs->gpr[1] + __SIGNAL_FRAMESIZE32 + 16);
+        rt_sf = (struct rt_sigframe __user *)
+                (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
         if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
                 goto bad;
-        if (do_setcontext32(&rt_sf->uc, regs, 1))
+        if (do_setcontext(&rt_sf->uc, regs, 1))
                 goto bad;
 
         /*
@@ -781,62 +939,165 @@ long sys32_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
          * signal return.  But other architectures do this and we have
          * always done it up until now so it is probably better not to
          * change it.  -- paulus
-         * We use the sys32_ version that does the 32/64 bits conversion
+         */
+#ifdef CONFIG_PPC64
+        /*
+         * We use the compat_sys_ version that does the 32/64 bits conversion
          * and takes userland pointer directly. What about error checking ?
          * nobody does any...
          */
-        sys32_sigaltstack((u32)(u64)&rt_sf->uc.uc_stack, 0, 0, 0, 0, 0, regs);
-
-        ret = regs->result;
-
-        return ret;
+        compat_sys_sigaltstack((u32)(u64)&rt_sf->uc.uc_stack, 0, 0, 0, 0, 0, regs);
+        return (int)regs->result;
+#else
+        do_sigaltstack(&rt_sf->uc.uc_stack, NULL, regs->gpr[1]);
+        sigreturn_exit(regs);           /* doesn't return here */
+        return 0;
+#endif
 
  bad:
         force_sig(SIGSEGV, current);
         return 0;
 }
 
+#ifdef CONFIG_PPC32
+int sys_debug_setcontext(struct ucontext __user *ctx,
+                         int ndbg, struct sig_dbg_op __user *dbg,
+                         int r6, int r7, int r8,
+                         struct pt_regs *regs)
+{
+        struct sig_dbg_op op;
+        int i;
+        unsigned long new_msr = regs->msr;
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+        unsigned long new_dbcr0 = current->thread.dbcr0;
+#endif
+
+        for (i=0; i<ndbg; i++) {
+                if (__copy_from_user(&op, dbg, sizeof(op)))
+                        return -EFAULT;
+                switch (op.dbg_type) {
+                case SIG_DBG_SINGLE_STEPPING:
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+                        if (op.dbg_value) {
+                                new_msr |= MSR_DE;
+                                new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
+                        } else {
+                                new_msr &= ~MSR_DE;
+                                new_dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
+                        }
+#else
+                        if (op.dbg_value)
+                                new_msr |= MSR_SE;
+                        else
+                                new_msr &= ~MSR_SE;
+#endif
+                        break;
+                case SIG_DBG_BRANCH_TRACING:
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+                        return -EINVAL;
+#else
+                        if (op.dbg_value)
+                                new_msr |= MSR_BE;
+                        else
+                                new_msr &= ~MSR_BE;
+#endif
+                        break;
+
+                default:
+                        return -EINVAL;
+                }
+        }
+
+        /* We wait until here to actually install the values in the
+           registers so if we fail in the above loop, it will not
+           affect the contents of these registers.  After this point,
+           failure is a problem, anyway, and it's very unlikely unless
+           the user is really doing something wrong. */
+        regs->msr = new_msr;
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+        current->thread.dbcr0 = new_dbcr0;
+#endif
+
+        /*
+         * If we get a fault copying the context into the kernel's
+         * image of the user's registers, we can't just return -EFAULT
+         * because the user's registers will be corrupted.  For instance
+         * the NIP value may have been updated but not some of the
+         * other registers.  Given that we have done the access_ok
+         * and successfully read the first and last bytes of the region
+         * above, this should only happen in an out-of-memory situation
+         * or if another thread unmaps the region containing the context.
+         * We kill the task with a SIGSEGV in this situation.
+         */
+        if (do_setcontext(ctx, regs, 1)) {
+                force_sig(SIGSEGV, current);
+                goto out;
+        }
+
+        /*
+         * It's not clear whether or why it is desirable to save the
+         * sigaltstack setting on signal delivery and restore it on
+         * signal return.  But other architectures do this and we have
+         * always done it up until now so it is probably better not to
+         * change it.  -- paulus
+         */
+        do_sigaltstack(&ctx->uc_stack, NULL, regs->gpr[1]);
+
+        sigreturn_exit(regs);
+        /* doesn't actually return back to here */
+
+ out:
+        return 0;
+}
+#endif
 
 /*
  * OK, we're invoking a handler
  */
-static int handle_signal32(unsigned long sig, struct k_sigaction *ka,
-                            siginfo_t *info, sigset_t *oldset,
-                            struct pt_regs * regs, unsigned long newsp)
+static int handle_signal(unsigned long sig, struct k_sigaction *ka,
+                siginfo_t *info, sigset_t *oldset, struct pt_regs *regs,
+                unsigned long newsp)
 {
-        struct sigcontext32 __user *sc;
-        struct sigregs32 __user *frame;
+        struct sigcontext __user *sc;
+        struct sigregs __user *frame;
         unsigned long origsp = newsp;
 
         /* Set up Signal Frame */
-        newsp -= sizeof(struct sigregs32);
-        frame = (struct sigregs32 __user *) newsp;
+        newsp -= sizeof(struct sigregs);
+        frame = (struct sigregs __user *) newsp;
 
         /* Put a sigcontext on the stack */
         newsp -= sizeof(*sc);
-        sc = (struct sigcontext32 __user *) newsp;
+        sc = (struct sigcontext __user *) newsp;
 
         /* create a stack frame for the caller of the handler */
-        newsp -= __SIGNAL_FRAMESIZE32;
+        newsp -= __SIGNAL_FRAMESIZE;
 
         if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp))
                 goto badframe;
 
 #if _NSIG != 64
-#error "Please adjust handle_signal32()"
+#error "Please adjust handle_signal()"
 #endif
-        if (__put_user((u32)(u64)ka->sa.sa_handler, &sc->handler)
+        if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler)
             || __put_user(oldset->sig[0], &sc->oldmask)
+#ifdef CONFIG_PPC64
             || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
-            || __put_user((u32)(u64)frame, &sc->regs)
+#else
+            || __put_user(oldset->sig[1], &sc->_unused[3])
+#endif
+            || __put_user(to_user_ptr(frame), &sc->regs)
             || __put_user(sig, &sc->signal))
                 goto badframe;
 
+#ifdef CONFIG_PPC64
         if (vdso32_sigtramp && current->thread.vdso_base) {
                 if (save_user_regs(regs, &frame->mctx, 0))
                         goto badframe;
                 regs->link = current->thread.vdso_base + vdso32_sigtramp;
-        } else {
+        } else
+#endif
+        {
                 if (save_user_regs(regs, &frame->mctx, __NR_sigreturn))
                         goto badframe;
                 regs->link = (unsigned long) frame->mctx.tramp;
@@ -844,22 +1105,24 @@ static int handle_signal32(unsigned long sig, struct k_sigaction *ka,
 
         if (put_user(regs->gpr[1], (u32 __user *)newsp))
                 goto badframe;
-        regs->gpr[1] = (unsigned long) newsp;
+        regs->gpr[1] = newsp;
         regs->gpr[3] = sig;
         regs->gpr[4] = (unsigned long) sc;
         regs->nip = (unsigned long) ka->sa.sa_handler;
         regs->trap = 0;
+#ifdef CONFIG_PPC64
         regs->result = 0;
 
         if (test_thread_flag(TIF_SINGLESTEP))
                 ptrace_notify(SIGTRAP);
+#endif
 
         return 1;
 
 badframe:
-#if DEBUG_SIG
-        printk("badframe in handle_signal, regs=%p frame=%x newsp=%x\n",
-               regs, frame, *newspp);
+#ifdef DEBUG_SIG
+        printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
+               regs, frame, newsp);
 #endif
         force_sigsegv(sig, current);
         return 0;
@@ -868,65 +1131,69 @@ badframe:
 /*
  * Do a signal return; undo the signal stack.
  */
-long sys32_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
+long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
                        struct pt_regs *regs)
 {
-        struct sigcontext32 __user *sc;
-        struct sigcontext32 sigctx;
-        struct mcontext32 __user *sr;
+        struct sigcontext __user *sc;
+        struct sigcontext sigctx;
+        struct mcontext __user *sr;
         sigset_t set;
-        int ret;
 
         /* Always make any pending restarted system calls return -EINTR */
         current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
-        sc = (struct sigcontext32 __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE32);
+        sc = (struct sigcontext __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
         if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
                 goto badframe;
 
+#ifdef CONFIG_PPC64
         /*
          * Note that PPC32 puts the upper 32 bits of the sigmask in the
          * unused part of the signal stackframe
          */
         set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
+#else
+        set.sig[0] = sigctx.oldmask;
+        set.sig[1] = sigctx._unused[3];
+#endif
         restore_sigmask(&set);
 
-        sr = (struct mcontext32 __user *)(u64)sigctx.regs;
+        sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
         if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
             || restore_user_regs(regs, sr, 1))
                 goto badframe;
 
-        ret = regs->result;
-        return ret;
+#ifdef CONFIG_PPC64
+        return (int)regs->result;
+#else
+        sigreturn_exit(regs);           /* doesn't return */
+        return 0;
+#endif
 
 badframe:
         force_sig(SIGSEGV, current);
         return 0;
 }
 
-
-
-/*
- *  Start of do_signal32 routine
- *
- *   This routine gets control when a pending signal needs to be processed
- *     in the 32 bit target thread -
- *
- *   It handles both rt and non-rt signals
- */
-
 /*
  * Note that 'init' is a special process: it doesn't get signals it doesn't
  * want to handle. Thus you cannot kill init even with a SIGKILL even by
  * mistake.
  */
-
-int do_signal32(sigset_t *oldset, struct pt_regs *regs)
+int do_signal(sigset_t *oldset, struct pt_regs *regs)
 {
         siginfo_t info;
+        struct k_sigaction ka;
         unsigned int frame, newsp;
         int signr, ret;
-        struct k_sigaction ka;
+
+#ifdef CONFIG_PPC32
+        if (try_to_freeze()) {
+                signr = 0;
+                if (!signal_pending(current))
+                        goto no_signal;
+        }
+#endif
 
         if (!oldset)
                 oldset = &current->blocked;
@@ -934,7 +1201,9 @@ int do_signal32(sigset_t *oldset, struct pt_regs *regs)
         newsp = frame = 0;
 
         signr = get_signal_to_deliver(&info, &ka, regs, NULL);
-
+#ifdef CONFIG_PPC32
+no_signal:
+#endif
         if (TRAP(regs) == 0x0C00                /* System Call! */
             && regs->ccr & 0x10000000           /* error signalled */
             && ((ret = regs->gpr[3]) == ERESTARTSYS
@@ -964,12 +1233,13 @@ int do_signal32(sigset_t *oldset, struct pt_regs *regs)
                 return 0;               /* no signals delivered */
 
         if ((ka.sa.sa_flags & SA_ONSTACK) && current->sas_ss_size
-            && (!on_sig_stack(regs->gpr[1])))
-                newsp = (current->sas_ss_sp + current->sas_ss_size);
+            && !on_sig_stack(regs->gpr[1]))
+                newsp = current->sas_ss_sp + current->sas_ss_size;
         else
                 newsp = regs->gpr[1];
         newsp &= ~0xfUL;
 
+#ifdef CONFIG_PPC64
         /*
          * Reenable the DABR before delivering the signal to
          * user space. The DABR will have been cleared if it
@@ -977,12 +1247,13 @@ int do_signal32(sigset_t *oldset, struct pt_regs *regs)
          */
         if (current->thread.dabr)
                 set_dabr(current->thread.dabr);
+#endif
 
         /* Whee!  Actually deliver the signal.  */
         if (ka.sa.sa_flags & SA_SIGINFO)
-                ret = handle_rt_signal32(signr, &ka, &info, oldset, regs, newsp);
+                ret = handle_rt_signal(signr, &ka, &info, oldset, regs, newsp);
         else
-                ret = handle_signal32(signr, &ka, &info, oldset, regs, newsp);
+                ret = handle_signal(signr, &ka, &info, oldset, regs, newsp);
 
         if (ret) {
                 spin_lock_irq(&current->sighand->siglock);
diff --git a/arch/ppc64/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index e93c13458910..a8210ed5c686 100644
--- a/arch/ppc64/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -53,8 +53,7 @@
 #include <asm/time.h>
 #include <asm/mmu_context.h>
 #include <asm/systemcfg.h>
-
-#include "pci.h"
+#include <asm/ppc-pci.h>
 
 /* readdir & getdents */
 #define NAME_OFFSET(de) ((int) ((de)->d_name - (char __user *) (de)))
@@ -114,96 +113,6 @@ out:
         return error;
 }
 
-struct linux_dirent32 {
-        u32             d_ino;
-        u32             d_off;
-        unsigned short  d_reclen;
-        char            d_name[1];
-};
-
-struct getdents_callback32 {
-        struct linux_dirent32 __user * current_dir;
-        struct linux_dirent32 __user * previous;
-        int count;
-        int error;
-};
-
-static int filldir(void * __buf, const char * name, int namlen, off_t offset,
-                   ino_t ino, unsigned int d_type)
-{
-        struct linux_dirent32 __user * dirent;
-        struct getdents_callback32 * buf = (struct getdents_callback32 *) __buf;
-        int reclen = ROUND_UP(NAME_OFFSET(dirent) + namlen + 2);
-
-        buf->error = -EINVAL;   /* only used if we fail.. */
-        if (reclen > buf->count)
-                return -EINVAL;
-        dirent = buf->previous;
-        if (dirent) {
-                if (__put_user(offset, &dirent->d_off))
-                        goto efault;
-        }
-        dirent = buf->current_dir;
-        if (__put_user(ino, &dirent->d_ino))
-                goto efault;
-        if (__put_user(reclen, &dirent->d_reclen))
-                goto efault;
-        if (copy_to_user(dirent->d_name, name, namlen))
-                goto efault;
-        if (__put_user(0, dirent->d_name + namlen))
-                goto efault;
-        if (__put_user(d_type, (char __user *) dirent + reclen - 1))
-                goto efault;
-        buf->previous = dirent;
-        dirent = (void __user *)dirent + reclen;
-        buf->current_dir = dirent;
-        buf->count -= reclen;
-        return 0;
-efault:
-        buf->error = -EFAULT;
-        return -EFAULT;
-}
-
-asmlinkage long sys32_getdents(unsigned int fd, struct linux_dirent32 __user *dirent,
-                    unsigned int count)
-{
-        struct file * file;
-        struct linux_dirent32 __user * lastdirent;
-        struct getdents_callback32 buf;
-        int error;
-
-        error = -EFAULT;
-        if (!access_ok(VERIFY_WRITE, dirent, count))
-                goto out;
-
-        error = -EBADF;
-        file = fget(fd);
-        if (!file)
-                goto out;
-
-        buf.current_dir = dirent;
-        buf.previous = NULL;
-        buf.count = count;
-        buf.error = 0;
-
-        error = vfs_readdir(file, (filldir_t)filldir, &buf);
-        if (error < 0)
-                goto out_putf;
-        error = buf.error;
-        lastdirent = buf.previous;
-        if (lastdirent) {
-                if (put_user(file->f_pos, &lastdirent->d_off))
-                        error = -EFAULT;
-                else
-                        error = count - buf.count;
-        }
-
-out_putf:
-        fput(file);
-out:
-        return error;
-}
-
 asmlinkage long ppc32_select(u32 n, compat_ulong_t __user *inp,
                 compat_ulong_t __user *outp, compat_ulong_t __user *exp,
                 compat_uptr_t tvp_x)
@@ -248,7 +157,7 @@ int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sysfs(u32 option, u32 arg1, u32 arg2)
+asmlinkage long compat_sys_sysfs(u32 option, u32 arg1, u32 arg2)
 {
         return sys_sysfs((int)option, arg1, arg2);
 }
@@ -270,7 +179,7 @@ struct timex32 {
 extern int do_adjtimex(struct timex *);
 extern void ppc_adjtimex(void);
 
-asmlinkage long sys32_adjtimex(struct timex32 __user *utp)
+asmlinkage long compat_sys_adjtimex(struct timex32 __user *utp)
 {
         struct timex txc;
         int ret;
@@ -329,7 +238,7 @@ asmlinkage long sys32_adjtimex(struct timex32 __user *utp)
         return ret;
 }
 
-asmlinkage long sys32_pause(void)
+asmlinkage long compat_sys_pause(void)
 {
         current->state = TASK_INTERRUPTIBLE;
         schedule();
@@ -375,7 +284,7 @@ struct sysinfo32 {
         char _f[20-2*sizeof(int)-sizeof(int)];
 };
 
-asmlinkage long sys32_sysinfo(struct sysinfo32 __user *info)
+asmlinkage long compat_sys_sysinfo(struct sysinfo32 __user *info)
 {
         struct sysinfo s;
         int ret, err;
@@ -432,7 +341,7 @@ asmlinkage long sys32_sysinfo(struct sysinfo32 __user *info)
    sorts of things, like timeval and itimerval.  */
 extern struct timezone sys_tz;
 
-asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
+asmlinkage long compat_sys_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
 {
         if (tv) {
                 struct timeval ktv;
@@ -450,7 +359,7 @@ asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv, struct time
 
 
 
-asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
+asmlinkage long compat_sys_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
 {
         struct timespec kts;
         struct timezone ktz;
@@ -468,7 +377,7 @@ asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv, struct time
 }
 
 #ifdef CONFIG_SYSVIPC
-long sys32_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr,
+long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr,
                u32 fifth)
 {
         int version;
@@ -539,7 +448,7 @@ long sys32_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr,
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sendfile(u32 out_fd, u32 in_fd, compat_off_t __user * offset, u32 count)
+asmlinkage long compat_sys_sendfile(u32 out_fd, u32 in_fd, compat_off_t __user * offset, u32 count)
 {
         mm_segment_t old_fs = get_fs();
         int ret;
@@ -561,7 +470,7 @@ asmlinkage long sys32_sendfile(u32 out_fd, u32 in_fd, compat_off_t __user * offs
         return ret;
 }
 
-asmlinkage int sys32_sendfile64(int out_fd, int in_fd, compat_loff_t __user *offset, s32 count)
+asmlinkage int compat_sys_sendfile64(int out_fd, int in_fd, compat_loff_t __user *offset, s32 count)
 {
         mm_segment_t old_fs = get_fs();
         int ret;
@@ -583,7 +492,7 @@ asmlinkage int sys32_sendfile64(int out_fd, int in_fd, compat_loff_t __user *off
         return ret;
 }
 
-long sys32_execve(unsigned long a0, unsigned long a1, unsigned long a2,
+long compat_sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
                   unsigned long a3, unsigned long a4, unsigned long a5,
                   struct pt_regs *regs)
 {
@@ -610,58 +519,12 @@ out:
         return error;
 }
 
-/* Set up a thread for executing a new program. */
-void start_thread32(struct pt_regs* regs, unsigned long nip, unsigned long sp)
-{
-        set_fs(USER_DS);
-
-        /*
-         * If we exec out of a kernel thread then thread.regs will not be
-         * set. Do it now.
-         */
-        if (!current->thread.regs) {
-                unsigned long childregs = (unsigned long)current->thread_info +
-                                                THREAD_SIZE;
-                childregs -= sizeof(struct pt_regs);
-                current->thread.regs = (struct pt_regs *)childregs;
-        }
-
-        /*
-         * ELF_PLAT_INIT already clears all registers but it also sets r2.
-         * So just clear r2 here.
-         */
-        regs->gpr[2] = 0;
-
-        regs->nip = nip;
-        regs->gpr[1] = sp;
-        regs->msr = MSR_USER32;
-#ifndef CONFIG_SMP
-        if (last_task_used_math == current)
-                last_task_used_math = 0;
-#endif /* CONFIG_SMP */
-        current->thread.fpscr = 0;
-        memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
-#ifdef CONFIG_ALTIVEC
-#ifndef CONFIG_SMP
-        if (last_task_used_altivec == current)
-                last_task_used_altivec = 0;
-#endif /* CONFIG_SMP */
-        memset(current->thread.vr, 0, sizeof(current->thread.vr));
-        current->thread.vscr.u[0] = 0;
-        current->thread.vscr.u[1] = 0;
-        current->thread.vscr.u[2] = 0;
-        current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
-        current->thread.vrsave = 0;
-        current->thread.used_vr = 0;
-#endif /* CONFIG_ALTIVEC */
-}
-
 /* Note: it is necessary to treat option as an unsigned int, 
  * with the corresponding cast to a signed int to insure that the 
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_prctl(u32 option, u32 arg2, u32 arg3, u32 arg4, u32 arg5)
+asmlinkage long compat_sys_prctl(u32 option, u32 arg2, u32 arg3, u32 arg4, u32 arg5)
 {
         return sys_prctl((int)option,
                          (unsigned long) arg2,
@@ -675,7 +538,7 @@ asmlinkage long sys32_prctl(u32 option, u32 arg2, u32 arg3, u32 arg4, u32 arg5)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_rr_get_interval(u32 pid, struct compat_timespec __user *interval)
+asmlinkage long compat_sys_sched_rr_get_interval(u32 pid, struct compat_timespec __user *interval)
 {
         struct timespec t;
         int ret;
@@ -690,7 +553,7 @@ asmlinkage long sys32_sched_rr_get_interval(u32 pid, struct compat_timespec __us
         return ret;
 }
 
-asmlinkage int sys32_pciconfig_read(u32 bus, u32 dfn, u32 off, u32 len, u32 ubuf)
+asmlinkage int compat_sys_pciconfig_read(u32 bus, u32 dfn, u32 off, u32 len, u32 ubuf)
 {
         return sys_pciconfig_read((unsigned long) bus,
                                   (unsigned long) dfn,
@@ -699,7 +562,7 @@ asmlinkage int sys32_pciconfig_read(u32 bus, u32 dfn, u32 off, u32 len, u32 ubuf
                                   compat_ptr(ubuf));
 }
 
-asmlinkage int sys32_pciconfig_write(u32 bus, u32 dfn, u32 off, u32 len, u32 ubuf)
+asmlinkage int compat_sys_pciconfig_write(u32 bus, u32 dfn, u32 off, u32 len, u32 ubuf)
 {
         return sys_pciconfig_write((unsigned long) bus,
                                    (unsigned long) dfn,
@@ -708,7 +571,7 @@ asmlinkage int sys32_pciconfig_write(u32 bus, u32 dfn, u32 off, u32 len, u32 ubu
                                    compat_ptr(ubuf));
 }
 
-asmlinkage int sys32_pciconfig_iobase(u32 which, u32 in_bus, u32 in_devfn)
+asmlinkage int compat_sys_pciconfig_iobase(u32 which, u32 in_bus, u32 in_devfn)
 {
         return sys_pciconfig_iobase(which, in_bus, in_devfn);
 }
@@ -719,7 +582,7 @@ asmlinkage int sys32_pciconfig_iobase(u32 which, u32 in_bus, u32 in_devfn)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_access(const char __user * filename, u32 mode)
+asmlinkage long compat_sys_access(const char __user * filename, u32 mode)
 {
         return sys_access(filename, (int)mode);
 }
@@ -730,7 +593,7 @@ asmlinkage long sys32_access(const char __user * filename, u32 mode)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_creat(const char __user * pathname, u32 mode)
+asmlinkage long compat_sys_creat(const char __user * pathname, u32 mode)
 {
         return sys_creat(pathname, (int)mode);
 }
@@ -741,7 +604,7 @@ asmlinkage long sys32_creat(const char __user * pathname, u32 mode)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_waitpid(u32 pid, unsigned int __user * stat_addr, u32 options)
+asmlinkage long compat_sys_waitpid(u32 pid, unsigned int __user * stat_addr, u32 options)
 {
         return sys_waitpid((int)pid, stat_addr, (int)options);
 }
@@ -752,7 +615,7 @@ asmlinkage long sys32_waitpid(u32 pid, unsigned int __user * stat_addr, u32 opti
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_getgroups(u32 gidsetsize, gid_t __user *grouplist)
+asmlinkage long compat_sys_getgroups(u32 gidsetsize, gid_t __user *grouplist)
 {
         return sys_getgroups((int)gidsetsize, grouplist);
 }
@@ -763,7 +626,7 @@ asmlinkage long sys32_getgroups(u32 gidsetsize, gid_t __user *grouplist)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_getpgid(u32 pid)
+asmlinkage long compat_sys_getpgid(u32 pid)
 {
         return sys_getpgid((int)pid);
 }
@@ -775,7 +638,7 @@ asmlinkage long sys32_getpgid(u32 pid)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_getsid(u32 pid)
+asmlinkage long compat_sys_getsid(u32 pid)
 {
         return sys_getsid((int)pid);
 }
@@ -786,7 +649,7 @@ asmlinkage long sys32_getsid(u32 pid)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_kill(u32 pid, u32 sig)
+asmlinkage long compat_sys_kill(u32 pid, u32 sig)
 {
         return sys_kill((int)pid, (int)sig);
 }
@@ -797,12 +660,12 @@ asmlinkage long sys32_kill(u32 pid, u32 sig)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_mkdir(const char __user * pathname, u32 mode)
+asmlinkage long compat_sys_mkdir(const char __user * pathname, u32 mode)
 {
         return sys_mkdir(pathname, (int)mode);
 }
 
-long sys32_nice(u32 increment)
+long compat_sys_nice(u32 increment)
 {
         /* sign extend increment */
         return sys_nice((int)increment);
@@ -819,7 +682,7 @@ off_t ppc32_lseek(unsigned int fd, u32 offset, unsigned int origin)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_readlink(const char __user * path, char __user * buf, u32 bufsiz)
+asmlinkage long compat_sys_readlink(const char __user * path, char __user * buf, u32 bufsiz)
 {
         return sys_readlink(path, buf, (int)bufsiz);
 }
@@ -829,7 +692,7 @@ asmlinkage long sys32_readlink(const char __user * path, char __user * buf, u32
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_get_priority_max(u32 policy)
+asmlinkage long compat_sys_sched_get_priority_max(u32 policy)
 {
         return sys_sched_get_priority_max((int)policy);
 }
@@ -840,7 +703,7 @@ asmlinkage long sys32_sched_get_priority_max(u32 policy)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_get_priority_min(u32 policy)
+asmlinkage long compat_sys_sched_get_priority_min(u32 policy)
 {
         return sys_sched_get_priority_min((int)policy);
 }
@@ -851,7 +714,7 @@ asmlinkage long sys32_sched_get_priority_min(u32 policy)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_getparam(u32 pid, struct sched_param __user *param)
+asmlinkage long compat_sys_sched_getparam(u32 pid, struct sched_param __user *param)
 {
         return sys_sched_getparam((int)pid, param);
 }
@@ -862,7 +725,7 @@ asmlinkage long sys32_sched_getparam(u32 pid, struct sched_param __user *param)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_getscheduler(u32 pid)
+asmlinkage long compat_sys_sched_getscheduler(u32 pid)
 {
         return sys_sched_getscheduler((int)pid);
 }
@@ -873,7 +736,7 @@ asmlinkage long sys32_sched_getscheduler(u32 pid)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_setparam(u32 pid, struct sched_param __user *param)
+asmlinkage long compat_sys_sched_setparam(u32 pid, struct sched_param __user *param)
 {
         return sys_sched_setparam((int)pid, param);
 }
@@ -884,7 +747,7 @@ asmlinkage long sys32_sched_setparam(u32 pid, struct sched_param __user *param)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_sched_setscheduler(u32 pid, u32 policy, struct sched_param __user *param)
+asmlinkage long compat_sys_sched_setscheduler(u32 pid, u32 policy, struct sched_param __user *param)
 {
         return sys_sched_setscheduler((int)pid, (int)policy, param);
 }
@@ -895,7 +758,7 @@ asmlinkage long sys32_sched_setscheduler(u32 pid, u32 policy, struct sched_param
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_setdomainname(char __user *name, u32 len)
+asmlinkage long compat_sys_setdomainname(char __user *name, u32 len)
 {
         return sys_setdomainname(name, (int)len);
 }
@@ -906,13 +769,13 @@ asmlinkage long sys32_setdomainname(char __user *name, u32 len)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_setgroups(u32 gidsetsize, gid_t __user *grouplist)
+asmlinkage long compat_sys_setgroups(u32 gidsetsize, gid_t __user *grouplist)
 {
         return sys_setgroups((int)gidsetsize, grouplist);
 }
 
 
-asmlinkage long sys32_sethostname(char __user *name, u32 len)
+asmlinkage long compat_sys_sethostname(char __user *name, u32 len)
 {
         /* sign extend len */
         return sys_sethostname(name, (int)len);
@@ -924,30 +787,30 @@ asmlinkage long sys32_sethostname(char __user *name, u32 len)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_setpgid(u32 pid, u32 pgid)
+asmlinkage long compat_sys_setpgid(u32 pid, u32 pgid)
 {
         return sys_setpgid((int)pid, (int)pgid);
 }
 
-long sys32_getpriority(u32 which, u32 who)
+long compat_sys_getpriority(u32 which, u32 who)
 {
         /* sign extend which and who */
         return sys_getpriority((int)which, (int)who);
 }
 
-long sys32_setpriority(u32 which, u32 who, u32 niceval)
+long compat_sys_setpriority(u32 which, u32 who, u32 niceval)
 {
         /* sign extend which, who and niceval */
         return sys_setpriority((int)which, (int)who, (int)niceval);
 }
 
-long sys32_ioprio_get(u32 which, u32 who)
+long compat_sys_ioprio_get(u32 which, u32 who)
 {
         /* sign extend which and who */
         return sys_ioprio_get((int)which, (int)who);
 }
 
-long sys32_ioprio_set(u32 which, u32 who, u32 ioprio)
+long compat_sys_ioprio_set(u32 which, u32 who, u32 ioprio)
 {
         /* sign extend which, who and ioprio */
         return sys_ioprio_set((int)which, (int)who, (int)ioprio);
@@ -958,12 +821,12 @@ long sys32_ioprio_set(u32 which, u32 who, u32 ioprio)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_ssetmask(u32 newmask)
+asmlinkage long compat_sys_ssetmask(u32 newmask)
 {
         return sys_ssetmask((int) newmask);
 }
 
-asmlinkage long sys32_syslog(u32 type, char __user * buf, u32 len)
+asmlinkage long compat_sys_syslog(u32 type, char __user * buf, u32 len)
 {
         /* sign extend len */
         return sys_syslog(type, buf, (int)len);
@@ -975,7 +838,7 @@ asmlinkage long sys32_syslog(u32 type, char __user * buf, u32 len)
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
  * and the register representation of a signed int (msr in 64-bit mode) is performed.
  */
-asmlinkage long sys32_umask(u32 mask)
+asmlinkage long compat_sys_umask(u32 mask)
 {
         return sys_umask((int)mask);
 }
@@ -991,7 +854,7 @@ struct __sysctl_args32 {
         u32 __unused[4];
 };
 
-asmlinkage long sys32_sysctl(struct __sysctl_args32 __user *args)
+asmlinkage long compat_sys_sysctl(struct __sysctl_args32 __user *args)
 {
         struct __sysctl_args32 tmp;
         int error;
@@ -1032,55 +895,7 @@ asmlinkage long sys32_sysctl(struct __sysctl_args32 __user *args)
 }
 #endif
 
-asmlinkage int sys32_uname(struct old_utsname __user * name)
-{
-        int err = 0;
-        
-        down_read(&uts_sem);
-        if (copy_to_user(name, &system_utsname, sizeof(*name)))
-                err = -EFAULT;
-        up_read(&uts_sem);
-        if (!err && personality(current->personality) == PER_LINUX32) {
-                /* change "ppc64" to "ppc" */
-                if (__put_user(0, name->machine + 3)
-                    || __put_user(0, name->machine + 4))
-                        err = -EFAULT;
-        }
-        return err;
-}
-
-asmlinkage int sys32_olduname(struct oldold_utsname __user * name)
-{
-        int error;
-
-        if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
-                return -EFAULT;
-  
-        down_read(&uts_sem);
-        error = __copy_to_user(&name->sysname,&system_utsname.sysname,__OLD_UTS_LEN);
-        error |= __put_user(0,name->sysname+__OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename,&system_utsname.nodename,__OLD_UTS_LEN);
-        error |= __put_user(0,name->nodename+__OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release,&system_utsname.release,__OLD_UTS_LEN);
-        error |= __put_user(0,name->release+__OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version,&system_utsname.version,__OLD_UTS_LEN);
-        error |= __put_user(0,name->version+__OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine,&system_utsname.machine,__OLD_UTS_LEN);
-        error |= __put_user(0,name->machine+__OLD_UTS_LEN);
-        if (personality(current->personality) == PER_LINUX32) {
-                /* change "ppc64" to "ppc" */
-                error |= __put_user(0, name->machine + 3);
-                error |= __put_user(0, name->machine + 4);
-        }
-        
-        up_read(&uts_sem);
-
-        error = error ? -EFAULT : 0;
-        
-        return error;
-}
-
-unsigned long sys32_mmap2(unsigned long addr, size_t len,
+unsigned long compat_sys_mmap2(unsigned long addr, size_t len,
                           unsigned long prot, unsigned long flags,
                           unsigned long fd, unsigned long pgoff)
 {
@@ -1088,29 +903,7 @@ unsigned long sys32_mmap2(unsigned long addr, size_t len,
         return sys_mmap(addr, len, prot, flags, fd, pgoff << 12);
 }
 
-int get_compat_timeval(struct timeval *tv, struct compat_timeval __user *ctv)
-{
-        return (!access_ok(VERIFY_READ, ctv, sizeof(*ctv)) ||
-                __get_user(tv->tv_sec, &ctv->tv_sec) ||
-                __get_user(tv->tv_usec, &ctv->tv_usec)) ? -EFAULT : 0;
-}
-
-asmlinkage long sys32_utimes(char __user *filename, struct compat_timeval __user *tvs)
-{
-        struct timeval ktvs[2], *ptr;
-
-        ptr = NULL;
-        if (tvs) {
-                if (get_compat_timeval(&ktvs[0], &tvs[0]) ||
-                    get_compat_timeval(&ktvs[1], &tvs[1]))
-                        return -EFAULT;
-                ptr = ktvs;
-        }
-
-        return do_utimes(filename, ptr);
-}
-
-long sys32_tgkill(u32 tgid, u32 pid, int sig)
+long compat_sys_tgkill(u32 tgid, u32 pid, int sig)
 {
         /* sign extend tgid, pid */
         return sys_tgkill((int)tgid, (int)pid, sig);
@@ -1121,30 +914,30 @@ long sys32_tgkill(u32 tgid, u32 pid, int sig)
  * The 32 bit ABI passes long longs in an odd even register pair.
  */
 
-compat_ssize_t sys32_pread64(unsigned int fd, char __user *ubuf, compat_size_t count,
+compat_ssize_t compat_sys_pread64(unsigned int fd, char __user *ubuf, compat_size_t count,
                              u32 reg6, u32 poshi, u32 poslo)
 {
         return sys_pread64(fd, ubuf, count, ((loff_t)poshi << 32) | poslo);
 }
 
-compat_ssize_t sys32_pwrite64(unsigned int fd, char __user *ubuf, compat_size_t count,
+compat_ssize_t compat_sys_pwrite64(unsigned int fd, char __user *ubuf, compat_size_t count,
                               u32 reg6, u32 poshi, u32 poslo)
 {
         return sys_pwrite64(fd, ubuf, count, ((loff_t)poshi << 32) | poslo);
 }
 
-compat_ssize_t sys32_readahead(int fd, u32 r4, u32 offhi, u32 offlo, u32 count)
+compat_ssize_t compat_sys_readahead(int fd, u32 r4, u32 offhi, u32 offlo, u32 count)
 {
         return sys_readahead(fd, ((loff_t)offhi << 32) | offlo, count);
 }
 
-asmlinkage int sys32_truncate64(const char __user * path, u32 reg4,
+asmlinkage int compat_sys_truncate64(const char __user * path, u32 reg4,
                                 unsigned long high, unsigned long low)
 {
         return sys_truncate(path, (high << 32) | low);
 }
 
-asmlinkage int sys32_ftruncate64(unsigned int fd, u32 reg4, unsigned long high,
+asmlinkage int compat_sys_ftruncate64(unsigned int fd, u32 reg4, unsigned long high,
                                  unsigned long low)
 {
         return sys_ftruncate(fd, (high << 32) | low);
@@ -1164,13 +957,6 @@ long ppc32_fadvise64(int fd, u32 unused, u32 offset_high, u32 offset_low,
                              advice);
 }
 
-long ppc32_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
-                        u32 len_high, u32 len_low)
-{
-        return sys_fadvise64(fd, (u64)offset_high << 32 | offset_low,
-                             (u64)len_high << 32 | len_low, advice);
-}
-
 long ppc32_timer_create(clockid_t clock,
                         struct compat_sigevent __user *ev32,
                         timer_t __user *timer_id)
@@ -1203,7 +989,7 @@ long ppc32_timer_create(clockid_t clock,
         return err;
 }
 
-asmlinkage long sys32_add_key(const char __user *_type,
+asmlinkage long compat_sys_add_key(const char __user *_type,
                               const char __user *_description,
                               const void __user *_payload,
                               u32 plen,
@@ -1212,7 +998,7 @@ asmlinkage long sys32_add_key(const char __user *_type,
         return sys_add_key(_type, _description, _payload, plen, ringid);
 }
 
-asmlinkage long sys32_request_key(const char __user *_type,
+asmlinkage long compat_sys_request_key(const char __user *_type,
                                   const char __user *_description,
                                   const char __user *_callout_info,
                                   u32 destringid)
diff --git a/arch/ppc64/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index 05f16633bd2c..f72ced11212d 100644
--- a/arch/ppc64/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -1,7 +1,6 @@
 /*
- * linux/arch/ppc64/kernel/sys_ppc.c
+ *  Implementation of various system calls for Linux/PowerPC
  *
- *  PowerPC version 
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  *
  * Derived from "arch/i386/kernel/sys_i386.c"
@@ -52,9 +51,8 @@ extern unsigned long wall_jiffies;
  *
  * This is really horribly ugly.
  */
-asmlinkage int 
-sys_ipc (uint call, int first, unsigned long second, long third,
-         void __user *ptr, long fifth)
+int sys_ipc(uint call, int first, unsigned long second, long third,
+            void __user *ptr, long fifth)
 {
         int version, ret;
 
@@ -88,7 +86,7 @@ sys_ipc (uint call, int first, unsigned long second, long third,
         }
         case MSGSND:
                 ret = sys_msgsnd(first, (struct msgbuf __user *)ptr,
-                                  (size_t)second, third);
+                                 (size_t)second, third);
                 break;
         case MSGRCV:
                 switch (version) {
@@ -113,41 +111,29 @@ sys_ipc (uint call, int first, unsigned long second, long third,
                 }
                 break;
         case MSGGET:
-                ret = sys_msgget ((key_t)first, (int)second);
+                ret = sys_msgget((key_t)first, (int)second);
                 break;
         case MSGCTL:
                 ret = sys_msgctl(first, (int)second,
                                   (struct msqid_ds __user *)ptr);
                 break;
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *) ptr,
-                                        (int)second, &raddr);
-                        if (ret)
-                                break;
-                        ret = put_user (raddr, (ulong __user *) third);
-                        break;
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        ret = -EINVAL;
-                        if (!segment_eq(get_fs(), get_ds()))
-                                break;
-                        ret = do_shmat(first, (char __user *)ptr,
-                                        (int)second, (ulong *)third);
+        case SHMAT: {
+                ulong raddr;
+                ret = do_shmat(first, (char __user *)ptr, (int)second, &raddr);
+                if (ret)
                         break;
-                }
+                ret = put_user(raddr, (ulong __user *) third);
                 break;
-        case SHMDT: 
-                ret = sys_shmdt ((char __user *)ptr);
+        }
+        case SHMDT:
+                ret = sys_shmdt((char __user *)ptr);
                 break;
         case SHMGET:
-                ret = sys_shmget (first, (size_t)second, third);
+                ret = sys_shmget(first, (size_t)second, third);
                 break;
         case SHMCTL:
                 ret = sys_shmctl(first, (int)second,
-                                  (struct shmid_ds __user *)ptr);
+                                 (struct shmid_ds __user *)ptr);
                 break;
         }
 
@@ -158,43 +144,89 @@ sys_ipc (uint call, int first, unsigned long second, long third,
  * sys_pipe() is the normal C calling standard for creating
  * a pipe. It's not the way unix traditionally does this, though.
  */
-asmlinkage int sys_pipe(int __user *fildes)
+int sys_pipe(int __user *fildes)
 {
         int fd[2];
         int error;
-        
+
         error = do_pipe(fd);
         if (!error) {
                 if (copy_to_user(fildes, fd, 2*sizeof(int)))
                         error = -EFAULT;
         }
-        
         return error;
 }
 
-unsigned long sys_mmap(unsigned long addr, size_t len,
-                       unsigned long prot, unsigned long flags,
-                       unsigned long fd, off_t offset)
+static inline unsigned long do_mmap2(unsigned long addr, size_t len,
+                        unsigned long prot, unsigned long flags,
+                        unsigned long fd, unsigned long off, int shift)
 {
         struct file * file = NULL;
-        unsigned long ret = -EBADF;
+        unsigned long ret = -EINVAL;
 
+        if (shift) {
+                if (off & ((1 << shift) - 1))
+                        goto out;
+                off >>= shift;
+        }
+                
+        ret = -EBADF;
         if (!(flags & MAP_ANONYMOUS)) {
                 if (!(file = fget(fd)))
                         goto out;
         }
 
         flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
+
         down_write(&current->mm->mmap_sem);
-        ret = do_mmap(file, addr, len, prot, flags, offset);
+        ret = do_mmap_pgoff(file, addr, len, prot, flags, off);
         up_write(&current->mm->mmap_sem);
         if (file)
                 fput(file);
-
 out:
         return ret;
 }
 
+unsigned long sys_mmap2(unsigned long addr, size_t len,
+                        unsigned long prot, unsigned long flags,
+                        unsigned long fd, unsigned long pgoff)
+{
+        return do_mmap2(addr, len, prot, flags, fd, pgoff, PAGE_SHIFT-12);
+}
+
+unsigned long sys_mmap(unsigned long addr, size_t len,
+                       unsigned long prot, unsigned long flags,
+                       unsigned long fd, off_t offset)
+{
+        return do_mmap2(addr, len, prot, flags, fd, offset, PAGE_SHIFT);
+}
+
+#ifdef CONFIG_PPC32
+/*
+ * Due to some executables calling the wrong select we sometimes
+ * get wrong args.  This determines how the args are being passed
+ * (a single ptr to them all args passed) then calls
+ * sys_select() with the appropriate args. -- Cort
+ */
+int
+ppc_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timeval __user *tvp)
+{
+        if ( (unsigned long)n >= 4096 )
+        {
+                unsigned long __user *buffer = (unsigned long __user *)n;
+                if (!access_ok(VERIFY_READ, buffer, 5*sizeof(unsigned long))
+                    || __get_user(n, buffer)
+                    || __get_user(inp, ((fd_set __user * __user *)(buffer+1)))
+                    || __get_user(outp, ((fd_set  __user * __user *)(buffer+2)))
+                    || __get_user(exp, ((fd_set  __user * __user *)(buffer+3)))
+                    || __get_user(tvp, ((struct timeval  __user * __user *)(buffer+4))))
+                        return -EFAULT;
+        }
+        return sys_select(n, inp, outp, exp, tvp);
+}
+#endif
+
+#ifdef CONFIG_PPC64
 long ppc64_personality(unsigned long personality)
 {
         long ret;
@@ -207,8 +239,25 @@ long ppc64_personality(unsigned long personality)
                 ret = PER_LINUX;
         return ret;
 }
+#endif
+
+#ifdef CONFIG_PPC64
+#define OVERRIDE_MACHINE    (personality(current->personality) == PER_LINUX32)
+#else
+#define OVERRIDE_MACHINE    0
+#endif
+
+static inline int override_machine(char *mach)
+{
+        if (OVERRIDE_MACHINE) {
+                /* change ppc64 to ppc */
+                if (__put_user(0, mach+3) || __put_user(0, mach+4))
+                        return -EFAULT;
+        }
+        return 0;
+}
 
-long ppc64_newuname(struct new_utsname __user * name)
+long ppc_newuname(struct new_utsname __user * name)
 {
         int err = 0;
 
@@ -216,16 +265,54 @@ long ppc64_newuname(struct new_utsname __user * name)
         if (copy_to_user(name, &system_utsname, sizeof(*name)))
                 err = -EFAULT;
         up_read(&uts_sem);
-        if (!err && personality(current->personality) == PER_LINUX32) {
-                /* change ppc64 to ppc */
-                if (__put_user(0, name->machine + 3)
-                    || __put_user(0, name->machine + 4))
-                        err = -EFAULT;
-        }
+        if (!err)
+                err = override_machine(name->machine);
         return err;
 }
 
-asmlinkage time_t sys64_time(time_t __user * tloc)
+int sys_uname(struct old_utsname __user *name)
+{
+        int err = 0;
+        
+        down_read(&uts_sem);
+        if (copy_to_user(name, &system_utsname, sizeof(*name)))
+                err = -EFAULT;
+        up_read(&uts_sem);
+        if (!err)
+                err = override_machine(name->machine);
+        return err;
+}
+
+int sys_olduname(struct oldold_utsname __user *name)
+{
+        int error;
+
+        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
+                return -EFAULT;
+  
+        down_read(&uts_sem);
+        error = __copy_to_user(&name->sysname, &system_utsname.sysname,
+                               __OLD_UTS_LEN);
+        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->nodename, &system_utsname.nodename,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->release, &system_utsname.release,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->release + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->version, &system_utsname.version,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->version + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->machine, &system_utsname.machine,
+                                __OLD_UTS_LEN);
+        error |= override_machine(name->machine);
+        up_read(&uts_sem);
+
+        return error? -EFAULT: 0;
+}
+
+#ifdef CONFIG_PPC64
+time_t sys64_time(time_t __user * tloc)
 {
         time_t secs;
         time_t usecs;
@@ -247,6 +334,14 @@ asmlinkage time_t sys64_time(time_t __user * tloc)
 
         return secs;
 }
+#endif
+
+long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
+                      u32 len_high, u32 len_low)
+{
+        return sys_fadvise64(fd, (u64)offset_high << 32 | offset_low,
+                             (u64)len_high << 32 | len_low, advice);
+}
 
 void do_show_syscall(unsigned long r3, unsigned long r4, unsigned long r5,
                      unsigned long r6, unsigned long r7, unsigned long r8,
diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S
new file mode 100644
index 000000000000..65eaea91b499
--- /dev/null
+++ b/arch/powerpc/kernel/systbl.S
@@ -0,0 +1,321 @@
+/*
+ * This file contains the table of syscall-handling functions.
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ *
+ * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
+ * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) 
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/ppc_asm.h>
+
+#ifdef CONFIG_PPC64
+#define SYSCALL(func)           .llong  .sys_##func,.sys_##func
+#define COMPAT_SYS(func)        .llong  .sys_##func,.compat_sys_##func
+#define PPC_SYS(func)           .llong  .ppc_##func,.ppc_##func
+#define OLDSYS(func)            .llong  .sys_ni_syscall,.sys_ni_syscall
+#define SYS32ONLY(func)         .llong  .sys_ni_syscall,.compat_sys_##func
+#define SYSX(f, f3264, f32)     .llong  .f,.f3264
+#else
+#define SYSCALL(func)           .long   sys_##func
+#define COMPAT_SYS(func)        .long   sys_##func
+#define PPC_SYS(func)           .long   ppc_##func
+#define OLDSYS(func)            .long   sys_##func
+#define SYS32ONLY(func)         .long   sys_##func
+#define SYSX(f, f3264, f32)     .long   f32
+#endif
+
+#ifdef CONFIG_PPC64
+#define sys_sigpending  sys_ni_syscall
+#define sys_old_getrlimit sys_ni_syscall
+#else
+#define ppc_rtas        sys_ni_syscall
+#endif
+
+_GLOBAL(sys_call_table)
+SYSCALL(restart_syscall)
+SYSCALL(exit)
+PPC_SYS(fork)
+SYSCALL(read)
+SYSCALL(write)
+COMPAT_SYS(open)
+SYSCALL(close)
+COMPAT_SYS(waitpid)
+COMPAT_SYS(creat)
+SYSCALL(link)
+SYSCALL(unlink)
+COMPAT_SYS(execve)
+SYSCALL(chdir)
+SYSX(sys64_time,compat_sys_time,sys_time)
+SYSCALL(mknod)
+SYSCALL(chmod)
+SYSCALL(lchown)
+SYSCALL(ni_syscall)
+OLDSYS(stat)
+SYSX(sys_lseek,ppc32_lseek,sys_lseek)
+SYSCALL(getpid)
+COMPAT_SYS(mount)
+SYSX(sys_ni_syscall,sys_oldumount,sys_oldumount)
+SYSCALL(setuid)
+SYSCALL(getuid)
+COMPAT_SYS(stime)
+COMPAT_SYS(ptrace)
+SYSCALL(alarm)
+OLDSYS(fstat)
+COMPAT_SYS(pause)
+COMPAT_SYS(utime)
+SYSCALL(ni_syscall)
+SYSCALL(ni_syscall)
+COMPAT_SYS(access)
+COMPAT_SYS(nice)
+SYSCALL(ni_syscall)
+SYSCALL(sync)
+COMPAT_SYS(kill)
+SYSCALL(rename)
+COMPAT_SYS(mkdir)
+SYSCALL(rmdir)
+SYSCALL(dup)
+SYSCALL(pipe)
+COMPAT_SYS(times)
+SYSCALL(ni_syscall)
+SYSCALL(brk)
+SYSCALL(setgid)
+SYSCALL(getgid)
+SYSCALL(signal)
+SYSCALL(geteuid)
+SYSCALL(getegid)
+SYSCALL(acct)
+SYSCALL(umount)
+SYSCALL(ni_syscall)
+COMPAT_SYS(ioctl)
+COMPAT_SYS(fcntl)
+SYSCALL(ni_syscall)
+COMPAT_SYS(setpgid)
+SYSCALL(ni_syscall)
+SYSX(sys_ni_syscall,sys_olduname, sys_olduname)
+COMPAT_SYS(umask)
+SYSCALL(chroot)
+SYSCALL(ustat)
+SYSCALL(dup2)
+SYSCALL(getppid)
+SYSCALL(getpgrp)
+SYSCALL(setsid)
+SYS32ONLY(sigaction)
+SYSCALL(sgetmask)
+COMPAT_SYS(ssetmask)
+SYSCALL(setreuid)
+SYSCALL(setregid)
+SYSX(sys_ni_syscall,ppc32_sigsuspend,ppc_sigsuspend)
+COMPAT_SYS(sigpending)
+COMPAT_SYS(sethostname)
+COMPAT_SYS(setrlimit)
+COMPAT_SYS(old_getrlimit)
+COMPAT_SYS(getrusage)
+COMPAT_SYS(gettimeofday)
+COMPAT_SYS(settimeofday)
+COMPAT_SYS(getgroups)
+COMPAT_SYS(setgroups)
+SYSX(sys_ni_syscall,sys_ni_syscall,ppc_select)
+SYSCALL(symlink)
+OLDSYS(lstat)
+COMPAT_SYS(readlink)
+SYSCALL(uselib)
+SYSCALL(swapon)
+SYSCALL(reboot)
+SYSX(sys_ni_syscall,old32_readdir,old_readdir)
+SYSCALL(mmap)
+SYSCALL(munmap)
+SYSCALL(truncate)
+SYSCALL(ftruncate)
+SYSCALL(fchmod)
+SYSCALL(fchown)
+COMPAT_SYS(getpriority)
+COMPAT_SYS(setpriority)
+SYSCALL(ni_syscall)
+COMPAT_SYS(statfs)
+COMPAT_SYS(fstatfs)
+SYSCALL(ni_syscall)
+COMPAT_SYS(socketcall)
+COMPAT_SYS(syslog)
+COMPAT_SYS(setitimer)
+COMPAT_SYS(getitimer)
+COMPAT_SYS(newstat)
+COMPAT_SYS(newlstat)
+COMPAT_SYS(newfstat)
+SYSX(sys_ni_syscall,sys_uname,sys_uname)
+SYSCALL(ni_syscall)
+SYSCALL(vhangup)
+SYSCALL(ni_syscall)
+SYSCALL(ni_syscall)
+COMPAT_SYS(wait4)
+SYSCALL(swapoff)
+COMPAT_SYS(sysinfo)
+COMPAT_SYS(ipc)
+SYSCALL(fsync)
+SYSX(sys_ni_syscall,ppc32_sigreturn,sys_sigreturn)
+PPC_SYS(clone)
+COMPAT_SYS(setdomainname)
+PPC_SYS(newuname)
+SYSCALL(ni_syscall)
+COMPAT_SYS(adjtimex)
+SYSCALL(mprotect)
+SYSX(sys_ni_syscall,compat_sys_sigprocmask,sys_sigprocmask)
+SYSCALL(ni_syscall)
+SYSCALL(init_module)
+SYSCALL(delete_module)
+SYSCALL(ni_syscall)
+SYSCALL(quotactl)
+COMPAT_SYS(getpgid)
+SYSCALL(fchdir)
+SYSCALL(bdflush)
+COMPAT_SYS(sysfs)
+SYSX(ppc64_personality,ppc64_personality,sys_personality)
+SYSCALL(ni_syscall)
+SYSCALL(setfsuid)
+SYSCALL(setfsgid)
+SYSCALL(llseek)
+COMPAT_SYS(getdents)
+SYSX(sys_select,ppc32_select,ppc_select)
+SYSCALL(flock)
+SYSCALL(msync)
+COMPAT_SYS(readv)
+COMPAT_SYS(writev)
+COMPAT_SYS(getsid)
+SYSCALL(fdatasync)
+COMPAT_SYS(sysctl)
+SYSCALL(mlock)
+SYSCALL(munlock)
+SYSCALL(mlockall)
+SYSCALL(munlockall)
+COMPAT_SYS(sched_setparam)
+COMPAT_SYS(sched_getparam)
+COMPAT_SYS(sched_setscheduler)
+COMPAT_SYS(sched_getscheduler)
+SYSCALL(sched_yield)
+COMPAT_SYS(sched_get_priority_max)
+COMPAT_SYS(sched_get_priority_min)
+COMPAT_SYS(sched_rr_get_interval)
+COMPAT_SYS(nanosleep)
+SYSCALL(mremap)
+SYSCALL(setresuid)
+SYSCALL(getresuid)
+SYSCALL(ni_syscall)
+SYSCALL(poll)
+COMPAT_SYS(nfsservctl)
+SYSCALL(setresgid)
+SYSCALL(getresgid)
+COMPAT_SYS(prctl)
+SYSX(ppc64_rt_sigreturn,ppc32_rt_sigreturn,sys_rt_sigreturn)
+COMPAT_SYS(rt_sigaction)
+COMPAT_SYS(rt_sigprocmask)
+COMPAT_SYS(rt_sigpending)
+COMPAT_SYS(rt_sigtimedwait)
+COMPAT_SYS(rt_sigqueueinfo)
+SYSX(ppc64_rt_sigsuspend,ppc32_rt_sigsuspend,ppc_rt_sigsuspend)
+COMPAT_SYS(pread64)
+COMPAT_SYS(pwrite64)
+SYSCALL(chown)
+SYSCALL(getcwd)
+SYSCALL(capget)
+SYSCALL(capset)
+COMPAT_SYS(sigaltstack)
+SYSX(sys_sendfile64,compat_sys_sendfile,sys_sendfile)
+SYSCALL(ni_syscall)
+SYSCALL(ni_syscall)
+PPC_SYS(vfork)
+COMPAT_SYS(getrlimit)
+COMPAT_SYS(readahead)
+SYS32ONLY(mmap2)
+SYS32ONLY(truncate64)
+SYS32ONLY(ftruncate64)
+SYSX(sys_ni_syscall,sys_stat64,sys_stat64)
+SYSX(sys_ni_syscall,sys_lstat64,sys_lstat64)
+SYSX(sys_ni_syscall,sys_fstat64,sys_fstat64)
+COMPAT_SYS(pciconfig_read)
+COMPAT_SYS(pciconfig_write)
+COMPAT_SYS(pciconfig_iobase)
+SYSCALL(ni_syscall)
+SYSCALL(getdents64)
+SYSCALL(pivot_root)
+SYSX(sys_ni_syscall,compat_sys_fcntl64,sys_fcntl64)
+SYSCALL(madvise)
+SYSCALL(mincore)
+SYSCALL(gettid)
+SYSCALL(tkill)
+SYSCALL(setxattr)
+SYSCALL(lsetxattr)
+SYSCALL(fsetxattr)
+SYSCALL(getxattr)
+SYSCALL(lgetxattr)
+SYSCALL(fgetxattr)
+SYSCALL(listxattr)
+SYSCALL(llistxattr)
+SYSCALL(flistxattr)
+SYSCALL(removexattr)
+SYSCALL(lremovexattr)
+SYSCALL(fremovexattr)
+COMPAT_SYS(futex)
+COMPAT_SYS(sched_setaffinity)
+COMPAT_SYS(sched_getaffinity)
+SYSCALL(ni_syscall)
+SYSCALL(ni_syscall)
+SYS32ONLY(sendfile64)
+COMPAT_SYS(io_setup)
+SYSCALL(io_destroy)
+COMPAT_SYS(io_getevents)
+COMPAT_SYS(io_submit)
+SYSCALL(io_cancel)
+SYSCALL(set_tid_address)
+SYSX(sys_fadvise64,ppc32_fadvise64,sys_fadvise64)
+SYSCALL(exit_group)
+SYSX(sys_lookup_dcookie,ppc32_lookup_dcookie,sys_lookup_dcookie)
+SYSCALL(epoll_create)
+SYSCALL(epoll_ctl)
+SYSCALL(epoll_wait)
+SYSCALL(remap_file_pages)
+SYSX(sys_timer_create,ppc32_timer_create,sys_timer_create)
+COMPAT_SYS(timer_settime)
+COMPAT_SYS(timer_gettime)
+SYSCALL(timer_getoverrun)
+SYSCALL(timer_delete)
+COMPAT_SYS(clock_settime)
+COMPAT_SYS(clock_gettime)
+COMPAT_SYS(clock_getres)
+COMPAT_SYS(clock_nanosleep)
+SYSX(ppc64_swapcontext,ppc32_swapcontext,ppc_swapcontext)
+COMPAT_SYS(tgkill)
+COMPAT_SYS(utimes)
+COMPAT_SYS(statfs64)
+COMPAT_SYS(fstatfs64)
+SYSX(sys_ni_syscall, ppc_fadvise64_64, ppc_fadvise64_64)
+PPC_SYS(rtas)
+OLDSYS(debug_setcontext)
+SYSCALL(ni_syscall)
+SYSCALL(ni_syscall)
+COMPAT_SYS(mbind)
+COMPAT_SYS(get_mempolicy)
+COMPAT_SYS(set_mempolicy)
+COMPAT_SYS(mq_open)
+SYSCALL(mq_unlink)
+COMPAT_SYS(mq_timedsend)
+COMPAT_SYS(mq_timedreceive)
+COMPAT_SYS(mq_notify)
+COMPAT_SYS(mq_getsetattr)
+COMPAT_SYS(kexec_load)
+COMPAT_SYS(add_key)
+COMPAT_SYS(request_key)
+COMPAT_SYS(keyctl)
+COMPAT_SYS(waitid)
+COMPAT_SYS(ioprio_set)
+COMPAT_SYS(ioprio_get)
+SYSCALL(inotify_init)
+SYSCALL(inotify_add_watch)
+SYSCALL(inotify_rm_watch)
diff --git a/arch/ppc64/kernel/time.c b/arch/powerpc/kernel/time.c
index b56c6a324e17..23436b6c1881 100644
--- a/arch/ppc64/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -1,5 +1,4 @@
 /*
- * 
  * Common time routines among all ppc machines.
  *
  * Written by Cort Dougan (cort@cs.nmt.edu) to merge
@@ -44,33 +43,32 @@
 #include <linux/interrupt.h>
 #include <linux/timex.h>
 #include <linux/kernel_stat.h>
-#include <linux/mc146818rtc.h>
 #include <linux/time.h>
 #include <linux/init.h>
 #include <linux/profile.h>
 #include <linux/cpu.h>
 #include <linux/security.h>
+#include <linux/percpu.h>
+#include <linux/rtc.h>
 
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/nvram.h>
 #include <asm/cache.h>
 #include <asm/machdep.h>
-#ifdef CONFIG_PPC_ISERIES
-#include <asm/iSeries/ItLpQueue.h>
-#include <asm/iSeries/HvCallXm.h>
-#endif
 #include <asm/uaccess.h>
 #include <asm/time.h>
-#include <asm/ppcdebug.h>
 #include <asm/prom.h>
-#include <asm/sections.h>
+#include <asm/irq.h>
+#include <asm/div64.h>
+#ifdef CONFIG_PPC64
 #include <asm/systemcfg.h>
 #include <asm/firmware.h>
-
-u64 jiffies_64 __cacheline_aligned_in_smp = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
+#endif
+#ifdef CONFIG_PPC_ISERIES
+#include <asm/iSeries/ItLpQueue.h>
+#include <asm/iSeries/HvCallXm.h>
+#endif
 
 /* keep track of when we need to update the rtc */
 time_t last_rtc_update;
@@ -81,27 +79,37 @@ unsigned long iSeries_recal_tb = 0;
 static unsigned long first_settimeofday = 1;
 #endif
 
+/* The decrementer counts down by 128 every 128ns on a 601. */
+#define DECREMENTER_COUNT_601   (1000000000 / HZ)
+
 #define XSEC_PER_SEC (1024*1024)
 
+#ifdef CONFIG_PPC64
+#define SCALE_XSEC(xsec, max)   (((xsec) * max) / XSEC_PER_SEC)
+#else
+/* compute ((xsec << 12) * max) >> 32 */
+#define SCALE_XSEC(xsec, max)   mulhwu((xsec) << 12, max)
+#endif
+
 unsigned long tb_ticks_per_jiffy;
 unsigned long tb_ticks_per_usec = 100; /* sane default */
 EXPORT_SYMBOL(tb_ticks_per_usec);
 unsigned long tb_ticks_per_sec;
-unsigned long tb_to_xs;
-unsigned      tb_to_us;
+u64 tb_to_xs;
+unsigned tb_to_us;
 unsigned long processor_freq;
 DEFINE_SPINLOCK(rtc_lock);
 EXPORT_SYMBOL_GPL(rtc_lock);
 
-unsigned long tb_to_ns_scale;
-unsigned long tb_to_ns_shift;
+u64 tb_to_ns_scale;
+unsigned tb_to_ns_shift;
 
 struct gettimeofday_struct do_gtod;
 
 extern unsigned long wall_jiffies;
-extern int smp_tb_synchronized;
 
 extern struct timezone sys_tz;
+static long timezone_offset;
 
 void ppc_adjtimex(void);
 
@@ -110,6 +118,20 @@ static unsigned adjusting_time = 0;
 unsigned long ppc_proc_freq;
 unsigned long ppc_tb_freq;
 
+#ifdef CONFIG_PPC32     /* XXX for now */
+#define boot_cpuid      0
+#endif
+
+u64 tb_last_jiffy __cacheline_aligned_in_smp;
+unsigned long tb_last_stamp;
+
+/*
+ * Note that on ppc32 this only stores the bottom 32 bits of
+ * the timebase value, but that's enough to tell when a jiffy
+ * has passed.
+ */
+DEFINE_PER_CPU(unsigned long, last_jiffy);
+
 static __inline__ void timer_check_rtc(void)
 {
         /*
@@ -128,31 +150,31 @@ static __inline__ void timer_check_rtc(void)
          * We should have an rtc call that only sets the minutes and
          * seconds like on Intel to avoid problems with non UTC clocks.
          */
-        if (ntp_synced() &&
-             xtime.tv_sec - last_rtc_update >= 659 &&
-             abs((xtime.tv_nsec/1000) - (1000000-1000000/HZ)) < 500000/HZ &&
-             jiffies - wall_jiffies == 1) {
-            struct rtc_time tm;
-            to_tm(xtime.tv_sec+1, &tm);
-            tm.tm_year -= 1900;
-            tm.tm_mon -= 1;
-            if (ppc_md.set_rtc_time(&tm) == 0)
-                last_rtc_update = xtime.tv_sec+1;
-            else
-                /* Try again one minute later */
-                last_rtc_update += 60;
+        if (ppc_md.set_rtc_time && ntp_synced() &&
+            xtime.tv_sec - last_rtc_update >= 659 &&
+            abs((xtime.tv_nsec/1000) - (1000000-1000000/HZ)) < 500000/HZ &&
+            jiffies - wall_jiffies == 1) {
+                struct rtc_time tm;
+                to_tm(xtime.tv_sec + 1 + timezone_offset, &tm);
+                tm.tm_year -= 1900;
+                tm.tm_mon -= 1;
+                if (ppc_md.set_rtc_time(&tm) == 0)
+                        last_rtc_update = xtime.tv_sec + 1;
+                else
+                        /* Try again one minute later */
+                        last_rtc_update += 60;
         }
 }
 
 /*
  * This version of gettimeofday has microsecond resolution.
  */
-static inline void __do_gettimeofday(struct timeval *tv, unsigned long tb_val)
+static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val)
 {
-        unsigned long sec, usec, tb_ticks;
-        unsigned long xsec, tb_xsec;
-        struct gettimeofday_vars * temp_varp;
-        unsigned long temp_tb_to_xs, temp_stamp_xsec;
+        unsigned long sec, usec;
+        u64 tb_ticks, xsec;
+        struct gettimeofday_vars *temp_varp;
+        u64 temp_tb_to_xs, temp_stamp_xsec;
 
         /*
          * These calculations are faster (gets rid of divides)
@@ -164,11 +186,10 @@ static inline void __do_gettimeofday(struct timeval *tv, unsigned long tb_val)
         tb_ticks = tb_val - temp_varp->tb_orig_stamp;
         temp_tb_to_xs = temp_varp->tb_to_xs;
         temp_stamp_xsec = temp_varp->stamp_xsec;
-        tb_xsec = mulhdu( tb_ticks, temp_tb_to_xs );
-        xsec = temp_stamp_xsec + tb_xsec;
+        xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs);
         sec = xsec / XSEC_PER_SEC;
-        xsec -= sec * XSEC_PER_SEC;
-        usec = (xsec * USEC_PER_SEC)/XSEC_PER_SEC;
+        usec = (unsigned long)xsec & (XSEC_PER_SEC - 1);
+        usec = SCALE_XSEC(usec, 1000000);
 
         tv->tv_sec = sec;
         tv->tv_usec = usec;
@@ -176,6 +197,26 @@ static inline void __do_gettimeofday(struct timeval *tv, unsigned long tb_val)
 
 void do_gettimeofday(struct timeval *tv)
 {
+        if (__USE_RTC()) {
+                /* do this the old way */
+                unsigned long flags, seq;
+                unsigned int sec, nsec, usec, lost;
+
+                do {
+                        seq = read_seqbegin_irqsave(&xtime_lock, flags);
+                        sec = xtime.tv_sec;
+                        nsec = xtime.tv_nsec + tb_ticks_since(tb_last_stamp);
+                        lost = jiffies - wall_jiffies;
+                } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
+                usec = nsec / 1000 + lost * (1000000 / HZ);
+                while (usec >= 1000000) {
+                        usec -= 1000000;
+                        ++sec;
+                }
+                tv->tv_sec = sec;
+                tv->tv_usec = usec;
+                return;
+        }
         __do_gettimeofday(tv, get_tb());
 }
 
@@ -185,6 +226,8 @@ EXPORT_SYMBOL(do_gettimeofday);
 
 static inline void timer_sync_xtime(unsigned long cur_tb)
 {
+#ifdef CONFIG_PPC64
+        /* why do we do this? */
         struct timeval my_tv;
 
         __do_gettimeofday(&my_tv, cur_tb);
@@ -193,47 +236,76 @@ static inline void timer_sync_xtime(unsigned long cur_tb)
                 xtime.tv_sec = my_tv.tv_sec;
                 xtime.tv_nsec = my_tv.tv_usec * 1000;
         }
+#endif
 }
 
 /*
- * When the timebase - tb_orig_stamp gets too big, we do a manipulation
- * between tb_orig_stamp and stamp_xsec. The goal here is to keep the
- * difference tb - tb_orig_stamp small enough to always fit inside a
- * 32 bits number. This is a requirement of our fast 32 bits userland
- * implementation in the vdso. If we "miss" a call to this function
- * (interrupt latency, CPU locked in a spinlock, ...) and we end up
- * with a too big difference, then the vdso will fallback to calling
- * the syscall
+ * There are two copies of tb_to_xs and stamp_xsec so that no
+ * lock is needed to access and use these values in
+ * do_gettimeofday.  We alternate the copies and as long as a
+ * reasonable time elapses between changes, there will never
+ * be inconsistent values.  ntpd has a minimum of one minute
+ * between updates.
  */
-static __inline__ void timer_recalc_offset(unsigned long cur_tb)
+static inline void update_gtod(u64 new_tb_stamp, u64 new_stamp_xsec,
+                               u64 new_tb_to_xs)
 {
-        struct gettimeofday_vars * temp_varp;
         unsigned temp_idx;
-        unsigned long offset, new_stamp_xsec, new_tb_orig_stamp;
-
-        if (((cur_tb - do_gtod.varp->tb_orig_stamp) & 0x80000000u) == 0)
-                return;
+        struct gettimeofday_vars *temp_varp;
 
         temp_idx = (do_gtod.var_idx == 0);
         temp_varp = &do_gtod.vars[temp_idx];
 
-        new_tb_orig_stamp = cur_tb;
-        offset = new_tb_orig_stamp - do_gtod.varp->tb_orig_stamp;
-        new_stamp_xsec = do_gtod.varp->stamp_xsec + mulhdu(offset, do_gtod.varp->tb_to_xs);
-
-        temp_varp->tb_to_xs = do_gtod.varp->tb_to_xs;
-        temp_varp->tb_orig_stamp = new_tb_orig_stamp;
+        temp_varp->tb_to_xs = new_tb_to_xs;
+        temp_varp->tb_orig_stamp = new_tb_stamp;
         temp_varp->stamp_xsec = new_stamp_xsec;
         smp_mb();
         do_gtod.varp = temp_varp;
         do_gtod.var_idx = temp_idx;
 
+#ifdef CONFIG_PPC64
+        /*
+         * tb_update_count is used to allow the userspace gettimeofday code
+         * to assure itself that it sees a consistent view of the tb_to_xs and
+         * stamp_xsec variables.  It reads the tb_update_count, then reads
+         * tb_to_xs and stamp_xsec and then reads tb_update_count again.  If
+         * the two values of tb_update_count match and are even then the
+         * tb_to_xs and stamp_xsec values are consistent.  If not, then it
+         * loops back and reads them again until this criteria is met.
+         */
         ++(systemcfg->tb_update_count);
         smp_wmb();
-        systemcfg->tb_orig_stamp = new_tb_orig_stamp;
+        systemcfg->tb_orig_stamp = new_tb_stamp;
         systemcfg->stamp_xsec = new_stamp_xsec;
+        systemcfg->tb_to_xs = new_tb_to_xs;
         smp_wmb();
         ++(systemcfg->tb_update_count);
+#endif
+}
+
+/*
+ * When the timebase - tb_orig_stamp gets too big, we do a manipulation
+ * between tb_orig_stamp and stamp_xsec. The goal here is to keep the
+ * difference tb - tb_orig_stamp small enough to always fit inside a
+ * 32 bits number. This is a requirement of our fast 32 bits userland
+ * implementation in the vdso. If we "miss" a call to this function
+ * (interrupt latency, CPU locked in a spinlock, ...) and we end up
+ * with a too big difference, then the vdso will fallback to calling
+ * the syscall
+ */
+static __inline__ void timer_recalc_offset(u64 cur_tb)
+{
+        unsigned long offset;
+        u64 new_stamp_xsec;
+
+        if (__USE_RTC())
+                return;
+        offset = cur_tb - do_gtod.varp->tb_orig_stamp;
+        if ((offset & 0x80000000u) == 0)
+                return;
+        new_stamp_xsec = do_gtod.varp->stamp_xsec
+                + mulhdu(offset, do_gtod.varp->tb_to_xs);
+        update_gtod(cur_tb, new_stamp_xsec, do_gtod.varp->tb_to_xs);
 }
 
 #ifdef CONFIG_SMP
@@ -313,26 +385,37 @@ static void iSeries_tb_recal(void)
  * call will not be needed)
  */
 
-unsigned long tb_last_stamp __cacheline_aligned_in_smp;
-
 /*
  * timer_interrupt - gets called when the decrementer overflows,
  * with interrupts disabled.
  */
-int timer_interrupt(struct pt_regs * regs)
+void timer_interrupt(struct pt_regs * regs)
 {
         int next_dec;
-        unsigned long cur_tb;
-        struct paca_struct *lpaca = get_paca();
-        unsigned long cpu = smp_processor_id();
+        int cpu = smp_processor_id();
+        unsigned long ticks;
+
+#ifdef CONFIG_PPC32
+        if (atomic_read(&ppc_n_lost_interrupts) != 0)
+                do_IRQ(regs);
+#endif
 
         irq_enter();
 
         profile_tick(CPU_PROFILING, regs);
 
-        lpaca->lppaca.int_dword.fields.decr_int = 0;
+#ifdef CONFIG_PPC_ISERIES
+        get_paca()->lppaca.int_dword.fields.decr_int = 0;
+#endif
+
+        while ((ticks = tb_ticks_since(per_cpu(last_jiffy, cpu)))
+               >= tb_ticks_per_jiffy) {
+                /* Update last_jiffy */
+                per_cpu(last_jiffy, cpu) += tb_ticks_per_jiffy;
+                /* Handle RTCL overflow on 601 */
+                if (__USE_RTC() && per_cpu(last_jiffy, cpu) >= 1000000000)
+                        per_cpu(last_jiffy, cpu) -= 1000000000;
 
-        while (lpaca->next_jiffy_update_tb <= (cur_tb = get_tb())) {
                 /*
                  * We cannot disable the decrementer, so in the period
                  * between this cpu's being marked offline in cpu_online_map
@@ -342,27 +425,27 @@ int timer_interrupt(struct pt_regs * regs)
                  */
                 if (!cpu_is_offline(cpu))
                         update_process_times(user_mode(regs));
+
                 /*
                  * No need to check whether cpu is offline here; boot_cpuid
                  * should have been fixed up by now.
                  */
-                if (cpu == boot_cpuid) {
-                        write_seqlock(&xtime_lock);
-                        tb_last_stamp = lpaca->next_jiffy_update_tb;
-                        timer_recalc_offset(lpaca->next_jiffy_update_tb);
-                        do_timer(regs);
-                        timer_sync_xtime(lpaca->next_jiffy_update_tb);
-                        timer_check_rtc();
-                        write_sequnlock(&xtime_lock);
-                        if ( adjusting_time && (time_adjust == 0) )
-                                ppc_adjtimex();
-                }
-                lpaca->next_jiffy_update_tb += tb_ticks_per_jiffy;
+                if (cpu != boot_cpuid)
+                        continue;
+
+                write_seqlock(&xtime_lock);
+                tb_last_jiffy += tb_ticks_per_jiffy;
+                tb_last_stamp = per_cpu(last_jiffy, cpu);
+                timer_recalc_offset(tb_last_jiffy);
+                do_timer(regs);
+                timer_sync_xtime(tb_last_jiffy);
+                timer_check_rtc();
+                write_sequnlock(&xtime_lock);
+                if (adjusting_time && (time_adjust == 0))
+                        ppc_adjtimex();
         }
         
-        next_dec = lpaca->next_jiffy_update_tb - cur_tb;
-        if (next_dec > lpaca->default_decr)
-                next_dec = lpaca->default_decr;
+        next_dec = tb_ticks_per_jiffy - ticks;
         set_dec(next_dec);
 
 #ifdef CONFIG_PPC_ISERIES
@@ -370,17 +453,47 @@ int timer_interrupt(struct pt_regs * regs)
                 process_hvlpevents(regs);
 #endif
 
+#ifdef CONFIG_PPC64
         /* collect purr register values often, for accurate calculations */
         if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
                 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
                 cu->current_tb = mfspr(SPRN_PURR);
         }
+#endif
 
         irq_exit();
+}
+
+void wakeup_decrementer(void)
+{
+        int i;
 
-        return 1;
+        set_dec(tb_ticks_per_jiffy);
+        /*
+         * We don't expect this to be called on a machine with a 601,
+         * so using get_tbl is fine.
+         */
+        tb_last_stamp = tb_last_jiffy = get_tb();
+        for_each_cpu(i)
+                per_cpu(last_jiffy, i) = tb_last_stamp;
 }
 
+#ifdef CONFIG_SMP
+void __init smp_space_timers(unsigned int max_cpus)
+{
+        int i;
+        unsigned long offset = tb_ticks_per_jiffy / max_cpus;
+        unsigned long previous_tb = per_cpu(last_jiffy, boot_cpuid);
+
+        for_each_cpu(i) {
+                if (i != boot_cpuid) {
+                        previous_tb += offset;
+                        per_cpu(last_jiffy, i) = previous_tb;
+                }
+        }
+}
+#endif
+
 /*
  * Scheduler clock - returns current time in nanosec units.
  *
@@ -390,6 +503,8 @@ int timer_interrupt(struct pt_regs * regs)
  */
 unsigned long long sched_clock(void)
 {
+        if (__USE_RTC())
+                return get_rtc();
         return mulhdu(get_tb(), tb_to_ns_scale) << tb_to_ns_shift;
 }
 
@@ -398,31 +513,31 @@ int do_settimeofday(struct timespec *tv)
         time_t wtm_sec, new_sec = tv->tv_sec;
         long wtm_nsec, new_nsec = tv->tv_nsec;
         unsigned long flags;
-        unsigned long delta_xsec;
         long int tb_delta;
-        unsigned long new_xsec;
+        u64 new_xsec, tb_delta_xs;
 
         if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
                 return -EINVAL;
 
         write_seqlock_irqsave(&xtime_lock, flags);
-        /* Updating the RTC is not the job of this code. If the time is
-         * stepped under NTP, the RTC will be update after STA_UNSYNC
-         * is cleared. Tool like clock/hwclock either copy the RTC
+
+        /*
+         * Updating the RTC is not the job of this code. If the time is
+         * stepped under NTP, the RTC will be updated after STA_UNSYNC
+         * is cleared.  Tools like clock/hwclock either copy the RTC
          * to the system time, in which case there is no point in writing
          * to the RTC again, or write to the RTC but then they don't call
          * settimeofday to perform this operation.
          */
 #ifdef CONFIG_PPC_ISERIES
-        if ( first_settimeofday ) {
+        if (first_settimeofday) {
                 iSeries_tb_recal();
                 first_settimeofday = 0;
         }
 #endif
         tb_delta = tb_ticks_since(tb_last_stamp);
         tb_delta += (jiffies - wall_jiffies) * tb_ticks_per_jiffy;
-
-        new_nsec -= tb_delta / tb_ticks_per_usec / 1000;
+        tb_delta_xs = mulhdu(tb_delta, do_gtod.varp->tb_to_xs);
 
         wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - new_sec);
         wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - new_nsec);
@@ -437,28 +552,18 @@ int do_settimeofday(struct timespec *tv)
 
         ntp_clear();
 
-        delta_xsec = mulhdu( (tb_last_stamp-do_gtod.varp->tb_orig_stamp),
-                             do_gtod.varp->tb_to_xs );
-
-        new_xsec = (new_nsec * XSEC_PER_SEC) / NSEC_PER_SEC;
-        new_xsec += new_sec * XSEC_PER_SEC;
-        if ( new_xsec > delta_xsec ) {
-                do_gtod.varp->stamp_xsec = new_xsec - delta_xsec;
-                systemcfg->stamp_xsec = new_xsec - delta_xsec;
-        }
-        else {
-                /* This is only for the case where the user is setting the time
-                 * way back to a time such that the boot time would have been
-                 * before 1970 ... eg. we booted ten days ago, and we are setting
-                 * the time to Jan 5, 1970 */
-                do_gtod.varp->stamp_xsec = new_xsec;
-                do_gtod.varp->tb_orig_stamp = tb_last_stamp;
-                systemcfg->stamp_xsec = new_xsec;
-                systemcfg->tb_orig_stamp = tb_last_stamp;
+        new_xsec = 0;
+        if (new_nsec != 0) {
+                new_xsec = (u64)new_nsec * XSEC_PER_SEC;
+                do_div(new_xsec, NSEC_PER_SEC);
         }
+        new_xsec += (u64)new_sec * XSEC_PER_SEC - tb_delta_xs;
+        update_gtod(tb_last_jiffy, new_xsec, do_gtod.varp->tb_to_xs);
 
+#ifdef CONFIG_PPC64
         systemcfg->tz_minuteswest = sys_tz.tz_minuteswest;
         systemcfg->tz_dsttime = sys_tz.tz_dsttime;
+#endif
 
         write_sequnlock_irqrestore(&xtime_lock, flags);
         clock_was_set();
@@ -467,11 +572,9 @@ int do_settimeofday(struct timespec *tv)
 
 EXPORT_SYMBOL(do_settimeofday);
 
-#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_MAPLE) || defined(CONFIG_PPC_BPA)
 void __init generic_calibrate_decr(void)
 {
         struct device_node *cpu;
-        struct div_result divres;
         unsigned int *fp;
         int node_found;
 
@@ -505,37 +608,74 @@ void __init generic_calibrate_decr(void)
                         ppc_proc_freq = *fp;
                 }
         }
+#ifdef CONFIG_BOOKE
+        /* Set the time base to zero */
+        mtspr(SPRN_TBWL, 0);
+        mtspr(SPRN_TBWU, 0);
+
+        /* Clear any pending timer interrupts */
+        mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
+
+        /* Enable decrementer interrupt */
+        mtspr(SPRN_TCR, TCR_DIE);
+#endif
         if (!node_found)
                 printk(KERN_ERR "WARNING: Estimating processor frequency "
                                 "(not found)\n");
 
         of_node_put(cpu);
+}
 
-        printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
-               ppc_tb_freq/1000000, ppc_tb_freq%1000000);
-        printk(KERN_INFO "time_init: processor frequency   = %lu.%.6lu MHz\n",
-               ppc_proc_freq/1000000, ppc_proc_freq%1000000);
-
-        tb_ticks_per_jiffy = ppc_tb_freq / HZ;
-        tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
-        tb_ticks_per_usec = ppc_tb_freq / 1000000;
-        tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
-        div128_by_32(1024*1024, 0, tb_ticks_per_sec, &divres);
-        tb_to_xs = divres.result_low;
+unsigned long get_boot_time(void)
+{
+        struct rtc_time tm;
 
-        setup_default_decr();
+        if (ppc_md.get_boot_time)
+                return ppc_md.get_boot_time();
+        if (!ppc_md.get_rtc_time)
+                return 0;
+        ppc_md.get_rtc_time(&tm);
+        return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
+                      tm.tm_hour, tm.tm_min, tm.tm_sec);
 }
-#endif
 
+/* This function is only called on the boot processor */
 void __init time_init(void)
 {
-        /* This function is only called on the boot processor */
         unsigned long flags;
-        struct rtc_time tm;
+        unsigned long tm = 0;
         struct div_result res;
-        unsigned long scale, shift;
+        u64 scale;
+        unsigned shift;
+
+        if (ppc_md.time_init != NULL)
+                timezone_offset = ppc_md.time_init();
+
+        if (__USE_RTC()) {
+                /* 601 processor: dec counts down by 128 every 128ns */
+                ppc_tb_freq = 1000000000;
+                tb_last_stamp = get_rtcl();
+                tb_last_jiffy = tb_last_stamp;
+        } else {
+                /* Normal PowerPC with timebase register */
+                ppc_md.calibrate_decr();
+                printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
+                       ppc_tb_freq / 1000000, ppc_tb_freq % 1000000);
+                printk(KERN_INFO "time_init: processor frequency   = %lu.%.6lu MHz\n",
+                       ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
+                tb_last_stamp = tb_last_jiffy = get_tb();
+        }
+
+        tb_ticks_per_jiffy = ppc_tb_freq / HZ;
+        tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
+        tb_ticks_per_usec = ppc_tb_freq / 1000000;
+        tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
+        div128_by_32(1024*1024, 0, tb_ticks_per_sec, &res);
+        tb_to_xs = res.result_low;
 
-        ppc_md.calibrate_decr();
+#ifdef CONFIG_PPC64
+        get_paca()->default_decr = tb_ticks_per_jiffy;
+#endif
 
         /*
          * Compute scale factor for sched_clock.
@@ -559,29 +699,36 @@ void __init time_init(void)
 #ifdef CONFIG_PPC_ISERIES
         if (!piranha_simulator)
 #endif
-                ppc_md.get_boot_time(&tm);
+                tm = get_boot_time();
 
         write_seqlock_irqsave(&xtime_lock, flags);
-        xtime.tv_sec = mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
-                              tm.tm_hour, tm.tm_min, tm.tm_sec);
-        tb_last_stamp = get_tb();
+        xtime.tv_sec = tm;
+        xtime.tv_nsec = 0;
         do_gtod.varp = &do_gtod.vars[0];
         do_gtod.var_idx = 0;
-        do_gtod.varp->tb_orig_stamp = tb_last_stamp;
-        get_paca()->next_jiffy_update_tb = tb_last_stamp + tb_ticks_per_jiffy;
-        do_gtod.varp->stamp_xsec = xtime.tv_sec * XSEC_PER_SEC;
+        do_gtod.varp->tb_orig_stamp = tb_last_jiffy;
+        __get_cpu_var(last_jiffy) = tb_last_stamp;
+        do_gtod.varp->stamp_xsec = (u64) xtime.tv_sec * XSEC_PER_SEC;
         do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
         do_gtod.varp->tb_to_xs = tb_to_xs;
         do_gtod.tb_to_us = tb_to_us;
-        systemcfg->tb_orig_stamp = tb_last_stamp;
+#ifdef CONFIG_PPC64
+        systemcfg->tb_orig_stamp = tb_last_jiffy;
         systemcfg->tb_update_count = 0;
         systemcfg->tb_ticks_per_sec = tb_ticks_per_sec;
         systemcfg->stamp_xsec = xtime.tv_sec * XSEC_PER_SEC;
         systemcfg->tb_to_xs = tb_to_xs;
+#endif
 
         time_freq = 0;
 
-        xtime.tv_nsec = 0;
+        /* If platform provided a timezone (pmac), we correct the time */
+        if (timezone_offset) {
+                sys_tz.tz_minuteswest = -timezone_offset / 60;
+                sys_tz.tz_dsttime = 0;
+                xtime.tv_sec -= timezone_offset;
+        }
+
         last_rtc_update = xtime.tv_sec;
         set_normalized_timespec(&wall_to_monotonic,
                                 -xtime.tv_sec, -xtime.tv_nsec);
@@ -604,25 +751,28 @@ void __init time_init(void)
 
 void ppc_adjtimex(void)
 {
-        unsigned long den, new_tb_ticks_per_sec, tb_ticks, old_xsec, new_tb_to_xs, new_xsec, new_stamp_xsec;
+#ifdef CONFIG_PPC64
+        unsigned long den, new_tb_ticks_per_sec, tb_ticks, old_xsec,
+                new_tb_to_xs, new_xsec, new_stamp_xsec;
         unsigned long tb_ticks_per_sec_delta;
         long delta_freq, ltemp;
         struct div_result divres; 
         unsigned long flags;
-        struct gettimeofday_vars * temp_varp;
-        unsigned temp_idx;
         long singleshot_ppm = 0;
 
-        /* Compute parts per million frequency adjustment to accomplish the time adjustment
-           implied by time_offset to be applied over the elapsed time indicated by time_constant.
-           Use SHIFT_USEC to get it into the same units as time_freq. */
+        /*
+         * Compute parts per million frequency adjustment to
+         * accomplish the time adjustment implied by time_offset to be
+         * applied over the elapsed time indicated by time_constant.
+         * Use SHIFT_USEC to get it into the same units as
+         * time_freq.
+         */
         if ( time_offset < 0 ) {
                 ltemp = -time_offset;
                 ltemp <<= SHIFT_USEC - SHIFT_UPDATE;
                 ltemp >>= SHIFT_KG + time_constant;
                 ltemp = -ltemp;
-        }
-        else {
+        } else {
                 ltemp = time_offset;
                 ltemp <<= SHIFT_USEC - SHIFT_UPDATE;
                 ltemp >>= SHIFT_KG + time_constant;
@@ -639,7 +789,10 @@ void ppc_adjtimex(void)
         
                 adjusting_time = 1;
                 
-                /* Compute parts per million frequency adjustment to match time_adjust */
+                /*
+                 * Compute parts per million frequency adjustment
+                 * to match time_adjust
+                 */
                 singleshot_ppm = tickadj * HZ;  
                 /*
                  * The adjustment should be tickadj*HZ to match the code in
@@ -647,7 +800,7 @@ void ppc_adjtimex(void)
                  * large. 3/4 of tickadj*HZ seems about right
                  */
                 singleshot_ppm -= singleshot_ppm / 4;
-                /* Use SHIFT_USEC to get it into the same units as time_freq */ 
+                /* Use SHIFT_USEC to get it into the same units as time_freq */
                 singleshot_ppm <<= SHIFT_USEC;
                 if ( time_adjust < 0 )
                         singleshot_ppm = -singleshot_ppm;
@@ -663,7 +816,10 @@ void ppc_adjtimex(void)
         /* Add up all of the frequency adjustments */
         delta_freq = time_freq + ltemp + singleshot_ppm;
         
-        /* Compute a new value for tb_ticks_per_sec based on the frequency adjustment */
+        /*
+         * Compute a new value for tb_ticks_per_sec based on
+         * the frequency adjustment
+         */
         den = 1000000 * (1 << (SHIFT_USEC - 8));
         if ( delta_freq < 0 ) {
                 tb_ticks_per_sec_delta = ( tb_ticks_per_sec * ( (-delta_freq) >> (SHIFT_USEC - 8))) / den;
@@ -678,61 +834,37 @@ void ppc_adjtimex(void)
         printk("ppc_adjtimex: ltemp = %ld, time_freq = %ld, singleshot_ppm = %ld\n", ltemp, time_freq, singleshot_ppm);
         printk("ppc_adjtimex: tb_ticks_per_sec - base = %ld  new = %ld\n", tb_ticks_per_sec, new_tb_ticks_per_sec);
 #endif
-                                
-        /* Compute a new value of tb_to_xs (used to convert tb to microseconds and a new value of 
-           stamp_xsec which is the time (in 1/2^20 second units) corresponding to tb_orig_stamp.  This 
-           new value of stamp_xsec compensates for the change in frequency (implied by the new tb_to_xs)
-           which guarantees that the current time remains the same */ 
+
+        /*
+         * Compute a new value of tb_to_xs (used to convert tb to
+         * microseconds) and a new value of stamp_xsec which is the
+         * time (in 1/2^20 second units) corresponding to
+         * tb_orig_stamp.  This new value of stamp_xsec compensates
+         * for the change in frequency (implied by the new tb_to_xs)
+         * which guarantees that the current time remains the same.
+         */
         write_seqlock_irqsave( &xtime_lock, flags );
         tb_ticks = get_tb() - do_gtod.varp->tb_orig_stamp;
-        div128_by_32( 1024*1024, 0, new_tb_ticks_per_sec, &divres );
+        div128_by_32(1024*1024, 0, new_tb_ticks_per_sec, &divres);
         new_tb_to_xs = divres.result_low;
-        new_xsec = mulhdu( tb_ticks, new_tb_to_xs );
+        new_xsec = mulhdu(tb_ticks, new_tb_to_xs);
 
-        old_xsec = mulhdu( tb_ticks, do_gtod.varp->tb_to_xs );
+        old_xsec = mulhdu(tb_ticks, do_gtod.varp->tb_to_xs);
         new_stamp_xsec = do_gtod.varp->stamp_xsec + old_xsec - new_xsec;
 
-        /* There are two copies of tb_to_xs and stamp_xsec so that no lock is needed to access and use these
-           values in do_gettimeofday.  We alternate the copies and as long as a reasonable time elapses between
-           changes, there will never be inconsistent values.  ntpd has a minimum of one minute between updates */
-
-        temp_idx = (do_gtod.var_idx == 0);
-        temp_varp = &do_gtod.vars[temp_idx];
-
-        temp_varp->tb_to_xs = new_tb_to_xs;
-        temp_varp->stamp_xsec = new_stamp_xsec;
-        temp_varp->tb_orig_stamp = do_gtod.varp->tb_orig_stamp;
-        smp_mb();
-        do_gtod.varp = temp_varp;
-        do_gtod.var_idx = temp_idx;
-
-        /*
-         * tb_update_count is used to allow the problem state gettimeofday code
-         * to assure itself that it sees a consistent view of the tb_to_xs and
-         * stamp_xsec variables.  It reads the tb_update_count, then reads
-         * tb_to_xs and stamp_xsec and then reads tb_update_count again.  If
-         * the two values of tb_update_count match and are even then the
-         * tb_to_xs and stamp_xsec values are consistent.  If not, then it
-         * loops back and reads them again until this criteria is met.
-         */
-        ++(systemcfg->tb_update_count);
-        smp_wmb();
-        systemcfg->tb_to_xs = new_tb_to_xs;
-        systemcfg->stamp_xsec = new_stamp_xsec;
-        smp_wmb();
-        ++(systemcfg->tb_update_count);
+        update_gtod(do_gtod.varp->tb_orig_stamp, new_stamp_xsec, new_tb_to_xs);
 
         write_sequnlock_irqrestore( &xtime_lock, flags );
-
+#endif /* CONFIG_PPC64 */
 }
 
 
-#define TICK_SIZE tick
 #define FEBRUARY        2
 #define STARTOFTIME     1970
 #define SECDAY          86400L
 #define SECYR           (SECDAY * 365)
-#define leapyear(year)          ((year) % 4 == 0)
+#define leapyear(year)          ((year) % 4 == 0 && \
+                                 ((year) % 100 != 0 || (year) % 400 == 0))
 #define days_in_year(a)         (leapyear(a) ? 366 : 365)
 #define days_in_month(a)        (month_days[(a) - 1])
 
@@ -750,37 +882,25 @@ void GregorianDay(struct rtc_time * tm)
         int day;
         int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
 
-        lastYear=tm->tm_year-1;
+        lastYear = tm->tm_year - 1;
 
         /*
          * Number of leap corrections to apply up to end of last year
          */
-        leapsToDate = lastYear/4 - lastYear/100 + lastYear/400;
+        leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
 
         /*
          * This year is a leap year if it is divisible by 4 except when it is
          * divisible by 100 unless it is divisible by 400
          *
-         * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 will be
+         * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
          */
-        if((tm->tm_year%4==0) &&
-           ((tm->tm_year%100!=0) || (tm->tm_year%400==0)) &&
-           (tm->tm_mon>2))
-        {
-                /*
-                 * We are past Feb. 29 in a leap year
-                 */
-                day=1;
-        }
-        else
-        {
-                day=0;
-        }
+        day = tm->tm_mon > 2 && leapyear(tm->tm_year);
 
         day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
                    tm->tm_mday;
 
-        tm->tm_wday=day%7;
+        tm->tm_wday = day % 7;
 }
 
 void to_tm(int tim, struct rtc_time * tm)
@@ -826,14 +946,16 @@ void to_tm(int tim, struct rtc_time * tm)
  * oscillators and the precision with which the timebase frequency
  * is measured but does not harm.
  */
-unsigned mulhwu_scale_factor(unsigned inscale, unsigned outscale) {
+unsigned mulhwu_scale_factor(unsigned inscale, unsigned outscale)
+{
         unsigned mlt=0, tmp, err;
         /* No concern for performance, it's done once: use a stupid
          * but safe and compact method to find the multiplier.
          */
   
         for (tmp = 1U<<31; tmp != 0; tmp >>= 1) {
-                if (mulhwu(inscale, mlt|tmp) < outscale) mlt|=tmp;
+                if (mulhwu(inscale, mlt|tmp) < outscale)
+                        mlt |= tmp;
         }
   
         /* We might still be off by 1 for the best approximation.
@@ -843,39 +965,41 @@ unsigned mulhwu_scale_factor(unsigned inscale, unsigned outscale) {
          * some might have been forgotten in the test however.
          */
   
-        err = inscale*(mlt+1);
-        if (err <= inscale/2) mlt++;
+        err = inscale * (mlt+1);
+        if (err <= inscale/2)
+                mlt++;
         return mlt;
-  }
+}
 
 /*
  * Divide a 128-bit dividend by a 32-bit divisor, leaving a 128 bit
  * result.
  */
-
-void div128_by_32( unsigned long dividend_high, unsigned long dividend_low,
-                   unsigned divisor, struct div_result *dr )
+void div128_by_32(u64 dividend_high, u64 dividend_low,
+                  unsigned divisor, struct div_result *dr)
 {
-        unsigned long a,b,c,d, w,x,y,z, ra,rb,rc;
+        unsigned long a, b, c, d;
+        unsigned long w, x, y, z;
+        u64 ra, rb, rc;
 
         a = dividend_high >> 32;
         b = dividend_high & 0xffffffff;
         c = dividend_low >> 32;
         d = dividend_low & 0xffffffff;
 
-        w = a/divisor;
-        ra = (a - (w * divisor)) << 32;
+        w = a / divisor;
+        ra = ((u64)(a - (w * divisor)) << 32) + b;
 
-        x = (ra + b)/divisor;
-        rb = ((ra + b) - (x * divisor)) << 32;
+        rb = ((u64) do_div(ra, divisor) << 32) + c;
+        x = ra;
 
-        y = (rb + c)/divisor;
-        rc = ((rb + c) - (y * divisor)) << 32;
+        rc = ((u64) do_div(rb, divisor) << 32) + d;
+        y = rb;
 
-        z = (rc + d)/divisor;
+        do_div(rc, divisor);
+        z = rc;
 
-        dr->result_high = (w << 32) + x;
-        dr->result_low  = (y << 32) + z;
+        dr->result_high = ((u64)w << 32) + x;
+        dr->result_low  = ((u64)y << 32) + z;
 
 }
-
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
new file mode 100644
index 000000000000..5d638ecddbd0
--- /dev/null
+++ b/arch/powerpc/kernel/traps.c
@@ -0,0 +1,1101 @@
+/*
+ *  Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ *  Modified by Cort Dougan (cort@cs.nmt.edu)
+ *  and Paul Mackerras (paulus@samba.org)
+ */
+
+/*
+ * This file handles the architecture-dependent parts of hardware exceptions
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/a.out.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/prctl.h>
+#include <linux/delay.h>
+#include <linux/kprobes.h>
+
+#include <asm/kdebug.h>
+#include <asm/pgtable.h>
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/rtas.h>
+#include <asm/xmon.h>
+#include <asm/pmc.h>
+#ifdef CONFIG_PPC32
+#include <asm/reg.h>
+#endif
+#ifdef CONFIG_PMAC_BACKLIGHT
+#include <asm/backlight.h>
+#endif
+#ifdef CONFIG_PPC64
+#include <asm/firmware.h>
+#include <asm/processor.h>
+#include <asm/systemcfg.h>
+#endif
+
+#ifdef CONFIG_PPC64     /* XXX */
+#define _IO_BASE        pci_io_base
+#endif
+
+#ifdef CONFIG_DEBUGGER
+int (*__debugger)(struct pt_regs *regs);
+int (*__debugger_ipi)(struct pt_regs *regs);
+int (*__debugger_bpt)(struct pt_regs *regs);
+int (*__debugger_sstep)(struct pt_regs *regs);
+int (*__debugger_iabr_match)(struct pt_regs *regs);
+int (*__debugger_dabr_match)(struct pt_regs *regs);
+int (*__debugger_fault_handler)(struct pt_regs *regs);
+
+EXPORT_SYMBOL(__debugger);
+EXPORT_SYMBOL(__debugger_ipi);
+EXPORT_SYMBOL(__debugger_bpt);
+EXPORT_SYMBOL(__debugger_sstep);
+EXPORT_SYMBOL(__debugger_iabr_match);
+EXPORT_SYMBOL(__debugger_dabr_match);
+EXPORT_SYMBOL(__debugger_fault_handler);
+#endif
+
+struct notifier_block *powerpc_die_chain;
+static DEFINE_SPINLOCK(die_notifier_lock);
+
+int register_die_notifier(struct notifier_block *nb)
+{
+        int err = 0;
+        unsigned long flags;
+
+        spin_lock_irqsave(&die_notifier_lock, flags);
+        err = notifier_chain_register(&powerpc_die_chain, nb);
+        spin_unlock_irqrestore(&die_notifier_lock, flags);
+        return err;
+}
+
+/*
+ * Trap & Exception support
+ */
+
+static DEFINE_SPINLOCK(die_lock);
+
+int die(const char *str, struct pt_regs *regs, long err)
+{
+        static int die_counter;
+        int nl = 0;
+
+        if (debugger(regs))
+                return 1;
+
+        console_verbose();
+        spin_lock_irq(&die_lock);
+        bust_spinlocks(1);
+#ifdef CONFIG_PMAC_BACKLIGHT
+        if (_machine == _MACH_Pmac) {
+                set_backlight_enable(1);
+                set_backlight_level(BACKLIGHT_MAX);
+        }
+#endif
+        printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
+#ifdef CONFIG_PREEMPT
+        printk("PREEMPT ");
+        nl = 1;
+#endif
+#ifdef CONFIG_SMP
+        printk("SMP NR_CPUS=%d ", NR_CPUS);
+        nl = 1;
+#endif
+#ifdef CONFIG_DEBUG_PAGEALLOC
+        printk("DEBUG_PAGEALLOC ");
+        nl = 1;
+#endif
+#ifdef CONFIG_NUMA
+        printk("NUMA ");
+        nl = 1;
+#endif
+#ifdef CONFIG_PPC64
+        switch (systemcfg->platform) {
+        case PLATFORM_PSERIES:
+                printk("PSERIES ");
+                nl = 1;
+                break;
+        case PLATFORM_PSERIES_LPAR:
+                printk("PSERIES LPAR ");
+                nl = 1;
+                break;
+        case PLATFORM_ISERIES_LPAR:
+                printk("ISERIES LPAR ");
+                nl = 1;
+                break;
+        case PLATFORM_POWERMAC:
+                printk("POWERMAC ");
+                nl = 1;
+                break;
+        case PLATFORM_BPA:
+                printk("BPA ");
+                nl = 1;
+                break;
+        }
+#endif
+        if (nl)
+                printk("\n");
+        print_modules();
+        show_regs(regs);
+        bust_spinlocks(0);
+        spin_unlock_irq(&die_lock);
+
+        if (in_interrupt())
+                panic("Fatal exception in interrupt");
+
+        if (panic_on_oops) {
+#ifdef CONFIG_PPC64
+                printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
+                ssleep(5);
+#endif
+                panic("Fatal exception");
+        }
+        do_exit(err);
+
+        return 0;
+}
+
+void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
+{
+        siginfo_t info;
+
+        if (!user_mode(regs)) {
+                if (die("Exception in kernel mode", regs, signr))
+                        return;
+        }
+
+        memset(&info, 0, sizeof(info));
+        info.si_signo = signr;
+        info.si_code = code;
+        info.si_addr = (void __user *) addr;
+        force_sig_info(signr, &info, current);
+
+        /*
+         * Init gets no signals that it doesn't have a handler for.
+         * That's all very well, but if it has caused a synchronous
+         * exception and we ignore the resulting signal, it will just
+         * generate the same exception over and over again and we get
+         * nowhere.  Better to kill it and let the kernel panic.
+         */
+        if (current->pid == 1) {
+                __sighandler_t handler;
+
+                spin_lock_irq(&current->sighand->siglock);
+                handler = current->sighand->action[signr-1].sa.sa_handler;
+                spin_unlock_irq(&current->sighand->siglock);
+                if (handler == SIG_DFL) {
+                        /* init has generated a synchronous exception
+                           and it doesn't have a handler for the signal */
+                        printk(KERN_CRIT "init has generated signal %d "
+                               "but has no handler for it\n", signr);
+                        do_exit(signr);
+                }
+        }
+}
+
+#ifdef CONFIG_PPC64
+void system_reset_exception(struct pt_regs *regs)
+{
+        /* See if any machine dependent calls */
+        if (ppc_md.system_reset_exception)
+                ppc_md.system_reset_exception(regs);
+
+        die("System Reset", regs, SIGABRT);
+
+        /* Must die if the interrupt is not recoverable */
+        if (!(regs->msr & MSR_RI))
+                panic("Unrecoverable System Reset");
+
+        /* What should we do here? We could issue a shutdown or hard reset. */
+}
+#endif
+
+/*
+ * I/O accesses can cause machine checks on powermacs.
+ * Check if the NIP corresponds to the address of a sync
+ * instruction for which there is an entry in the exception
+ * table.
+ * Note that the 601 only takes a machine check on TEA
+ * (transfer error ack) signal assertion, and does not
+ * set any of the top 16 bits of SRR1.
+ *  -- paulus.
+ */
+static inline int check_io_access(struct pt_regs *regs)
+{
+#ifdef CONFIG_PPC_PMAC
+        unsigned long msr = regs->msr;
+        const struct exception_table_entry *entry;
+        unsigned int *nip = (unsigned int *)regs->nip;
+
+        if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
+            && (entry = search_exception_tables(regs->nip)) != NULL) {
+                /*
+                 * Check that it's a sync instruction, or somewhere
+                 * in the twi; isync; nop sequence that inb/inw/inl uses.
+                 * As the address is in the exception table
+                 * we should be able to read the instr there.
+                 * For the debug message, we look at the preceding
+                 * load or store.
+                 */
+                if (*nip == 0x60000000)         /* nop */
+                        nip -= 2;
+                else if (*nip == 0x4c00012c)    /* isync */
+                        --nip;
+                if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
+                        /* sync or twi */
+                        unsigned int rb;
+
+                        --nip;
+                        rb = (*nip >> 11) & 0x1f;
+                        printk(KERN_DEBUG "%s bad port %lx at %p\n",
+                               (*nip & 0x100)? "OUT to": "IN from",
+                               regs->gpr[rb] - _IO_BASE, nip);
+                        regs->msr |= MSR_RI;
+                        regs->nip = entry->fixup;
+                        return 1;
+                }
+        }
+#endif /* CONFIG_PPC_PMAC */
+        return 0;
+}
+
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+/* On 4xx, the reason for the machine check or program exception
+   is in the ESR. */
+#define get_reason(regs)        ((regs)->dsisr)
+#ifndef CONFIG_FSL_BOOKE
+#define get_mc_reason(regs)     ((regs)->dsisr)
+#else
+#define get_mc_reason(regs)     (mfspr(SPRN_MCSR))
+#endif
+#define REASON_FP               ESR_FP
+#define REASON_ILLEGAL          (ESR_PIL | ESR_PUO)
+#define REASON_PRIVILEGED       ESR_PPR
+#define REASON_TRAP             ESR_PTR
+
+/* single-step stuff */
+#define single_stepping(regs)   (current->thread.dbcr0 & DBCR0_IC)
+#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
+
+#else
+/* On non-4xx, the reason for the machine check or program
+   exception is in the MSR. */
+#define get_reason(regs)        ((regs)->msr)
+#define get_mc_reason(regs)     ((regs)->msr)
+#define REASON_FP               0x100000
+#define REASON_ILLEGAL          0x80000
+#define REASON_PRIVILEGED       0x40000
+#define REASON_TRAP             0x20000
+
+#define single_stepping(regs)   ((regs)->msr & MSR_SE)
+#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
+#endif
+
+/*
+ * This is "fall-back" implementation for configurations
+ * which don't provide platform-specific machine check info
+ */
+void __attribute__ ((weak))
+platform_machine_check(struct pt_regs *regs)
+{
+}
+
+void machine_check_exception(struct pt_regs *regs)
+{
+#ifdef CONFIG_PPC64
+        int recover = 0;
+
+        /* See if any machine dependent calls */
+        if (ppc_md.machine_check_exception)
+                recover = ppc_md.machine_check_exception(regs);
+
+        if (recover)
+                return;
+#else
+        unsigned long reason = get_mc_reason(regs);
+
+        if (user_mode(regs)) {
+                regs->msr |= MSR_RI;
+                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
+                return;
+        }
+
+#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
+        /* the qspan pci read routines can cause machine checks -- Cort */
+        bad_page_fault(regs, regs->dar, SIGBUS);
+        return;
+#endif
+
+        if (debugger_fault_handler(regs)) {
+                regs->msr |= MSR_RI;
+                return;
+        }
+
+        if (check_io_access(regs))
+                return;
+
+#if defined(CONFIG_4xx) && !defined(CONFIG_440A)
+        if (reason & ESR_IMCP) {
+                printk("Instruction");
+                mtspr(SPRN_ESR, reason & ~ESR_IMCP);
+        } else
+                printk("Data");
+        printk(" machine check in kernel mode.\n");
+#elif defined(CONFIG_440A)
+        printk("Machine check in kernel mode.\n");
+        if (reason & ESR_IMCP){
+                printk("Instruction Synchronous Machine Check exception\n");
+                mtspr(SPRN_ESR, reason & ~ESR_IMCP);
+        }
+        else {
+                u32 mcsr = mfspr(SPRN_MCSR);
+                if (mcsr & MCSR_IB)
+                        printk("Instruction Read PLB Error\n");
+                if (mcsr & MCSR_DRB)
+                        printk("Data Read PLB Error\n");
+                if (mcsr & MCSR_DWB)
+                        printk("Data Write PLB Error\n");
+                if (mcsr & MCSR_TLBP)
+                        printk("TLB Parity Error\n");
+                if (mcsr & MCSR_ICP){
+                        flush_instruction_cache();
+                        printk("I-Cache Parity Error\n");
+                }
+                if (mcsr & MCSR_DCSP)
+                        printk("D-Cache Search Parity Error\n");
+                if (mcsr & MCSR_DCFP)
+                        printk("D-Cache Flush Parity Error\n");
+                if (mcsr & MCSR_IMPE)
+                        printk("Machine Check exception is imprecise\n");
+
+                /* Clear MCSR */
+                mtspr(SPRN_MCSR, mcsr);
+        }
+#elif defined (CONFIG_E500)
+        printk("Machine check in kernel mode.\n");
+        printk("Caused by (from MCSR=%lx): ", reason);
+
+        if (reason & MCSR_MCP)
+                printk("Machine Check Signal\n");
+        if (reason & MCSR_ICPERR)
+                printk("Instruction Cache Parity Error\n");
+        if (reason & MCSR_DCP_PERR)
+                printk("Data Cache Push Parity Error\n");
+        if (reason & MCSR_DCPERR)
+                printk("Data Cache Parity Error\n");
+        if (reason & MCSR_GL_CI)
+                printk("Guarded Load or Cache-Inhibited stwcx.\n");
+        if (reason & MCSR_BUS_IAERR)
+                printk("Bus - Instruction Address Error\n");
+        if (reason & MCSR_BUS_RAERR)
+                printk("Bus - Read Address Error\n");
+        if (reason & MCSR_BUS_WAERR)
+                printk("Bus - Write Address Error\n");
+        if (reason & MCSR_BUS_IBERR)
+                printk("Bus - Instruction Data Error\n");
+        if (reason & MCSR_BUS_RBERR)
+                printk("Bus - Read Data Bus Error\n");
+        if (reason & MCSR_BUS_WBERR)
+                printk("Bus - Read Data Bus Error\n");
+        if (reason & MCSR_BUS_IPERR)
+                printk("Bus - Instruction Parity Error\n");
+        if (reason & MCSR_BUS_RPERR)
+                printk("Bus - Read Parity Error\n");
+#elif defined (CONFIG_E200)
+        printk("Machine check in kernel mode.\n");
+        printk("Caused by (from MCSR=%lx): ", reason);
+
+        if (reason & MCSR_MCP)
+                printk("Machine Check Signal\n");
+        if (reason & MCSR_CP_PERR)
+                printk("Cache Push Parity Error\n");
+        if (reason & MCSR_CPERR)
+                printk("Cache Parity Error\n");
+        if (reason & MCSR_EXCP_ERR)
+                printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
+        if (reason & MCSR_BUS_IRERR)
+                printk("Bus - Read Bus Error on instruction fetch\n");
+        if (reason & MCSR_BUS_DRERR)
+                printk("Bus - Read Bus Error on data load\n");
+        if (reason & MCSR_BUS_WRERR)
+                printk("Bus - Write Bus Error on buffered store or cache line push\n");
+#else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
+        printk("Machine check in kernel mode.\n");
+        printk("Caused by (from SRR1=%lx): ", reason);
+        switch (reason & 0x601F0000) {
+        case 0x80000:
+                printk("Machine check signal\n");
+                break;
+        case 0:         /* for 601 */
+        case 0x40000:
+        case 0x140000:  /* 7450 MSS error and TEA */
+                printk("Transfer error ack signal\n");
+                break;
+        case 0x20000:
+                printk("Data parity error signal\n");
+                break;
+        case 0x10000:
+                printk("Address parity error signal\n");
+                break;
+        case 0x20000000:
+                printk("L1 Data Cache error\n");
+                break;
+        case 0x40000000:
+                printk("L1 Instruction Cache error\n");
+                break;
+        case 0x00100000:
+                printk("L2 data cache parity error\n");
+                break;
+        default:
+                printk("Unknown values in msr\n");
+        }
+#endif /* CONFIG_4xx */
+
+        /*
+         * Optional platform-provided routine to print out
+         * additional info, e.g. bus error registers.
+         */
+        platform_machine_check(regs);
+#endif /* CONFIG_PPC64 */
+
+        if (debugger_fault_handler(regs))
+                return;
+        die("Machine check", regs, SIGBUS);
+
+        /* Must die if the interrupt is not recoverable */
+        if (!(regs->msr & MSR_RI))
+                panic("Unrecoverable Machine check");
+}
+
+void SMIException(struct pt_regs *regs)
+{
+        die("System Management Interrupt", regs, SIGABRT);
+}
+
+void unknown_exception(struct pt_regs *regs)
+{
+        printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
+               regs->nip, regs->msr, regs->trap);
+
+        _exception(SIGTRAP, regs, 0, 0);
+}
+
+void instruction_breakpoint_exception(struct pt_regs *regs)
+{
+        if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
+                                        5, SIGTRAP) == NOTIFY_STOP)
+                return;
+        if (debugger_iabr_match(regs))
+                return;
+        _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
+}
+
+void RunModeException(struct pt_regs *regs)
+{
+        _exception(SIGTRAP, regs, 0, 0);
+}
+
+void __kprobes single_step_exception(struct pt_regs *regs)
+{
+        regs->msr &= ~(MSR_SE | MSR_BE);  /* Turn off 'trace' bits */
+
+        if (notify_die(DIE_SSTEP, "single_step", regs, 5,
+                                        5, SIGTRAP) == NOTIFY_STOP)
+                return;
+        if (debugger_sstep(regs))
+                return;
+
+        _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
+}
+
+/*
+ * After we have successfully emulated an instruction, we have to
+ * check if the instruction was being single-stepped, and if so,
+ * pretend we got a single-step exception.  This was pointed out
+ * by Kumar Gala.  -- paulus
+ */
+static void emulate_single_step(struct pt_regs *regs)
+{
+        if (single_stepping(regs)) {
+                clear_single_step(regs);
+                _exception(SIGTRAP, regs, TRAP_TRACE, 0);
+        }
+}
+
+static void parse_fpe(struct pt_regs *regs)
+{
+        int code = 0;
+        unsigned long fpscr;
+
+        flush_fp_to_thread(current);
+
+        fpscr = current->thread.fpscr.val;
+
+        /* Invalid operation */
+        if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
+                code = FPE_FLTINV;
+
+        /* Overflow */
+        else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
+                code = FPE_FLTOVF;
+
+        /* Underflow */
+        else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
+                code = FPE_FLTUND;
+
+        /* Divide by zero */
+        else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
+                code = FPE_FLTDIV;
+
+        /* Inexact result */
+        else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
+                code = FPE_FLTRES;
+
+        _exception(SIGFPE, regs, code, regs->nip);
+}
+
+/*
+ * Illegal instruction emulation support.  Originally written to
+ * provide the PVR to user applications using the mfspr rd, PVR.
+ * Return non-zero if we can't emulate, or -EFAULT if the associated
+ * memory access caused an access fault.  Return zero on success.
+ *
+ * There are a couple of ways to do this, either "decode" the instruction
+ * or directly match lots of bits.  In this case, matching lots of
+ * bits is faster and easier.
+ *
+ */
+#define INST_MFSPR_PVR          0x7c1f42a6
+#define INST_MFSPR_PVR_MASK     0xfc1fffff
+
+#define INST_DCBA               0x7c0005ec
+#define INST_DCBA_MASK          0x7c0007fe
+
+#define INST_MCRXR              0x7c000400
+#define INST_MCRXR_MASK         0x7c0007fe
+
+#define INST_STRING             0x7c00042a
+#define INST_STRING_MASK        0x7c0007fe
+#define INST_STRING_GEN_MASK    0x7c00067e
+#define INST_LSWI               0x7c0004aa
+#define INST_LSWX               0x7c00042a
+#define INST_STSWI              0x7c0005aa
+#define INST_STSWX              0x7c00052a
+
+static int emulate_string_inst(struct pt_regs *regs, u32 instword)
+{
+        u8 rT = (instword >> 21) & 0x1f;
+        u8 rA = (instword >> 16) & 0x1f;
+        u8 NB_RB = (instword >> 11) & 0x1f;
+        u32 num_bytes;
+        unsigned long EA;
+        int pos = 0;
+
+        /* Early out if we are an invalid form of lswx */
+        if ((instword & INST_STRING_MASK) == INST_LSWX)
+                if ((rT == rA) || (rT == NB_RB))
+                        return -EINVAL;
+
+        EA = (rA == 0) ? 0 : regs->gpr[rA];
+
+        switch (instword & INST_STRING_MASK) {
+                case INST_LSWX:
+                case INST_STSWX:
+                        EA += NB_RB;
+                        num_bytes = regs->xer & 0x7f;
+                        break;
+                case INST_LSWI:
+                case INST_STSWI:
+                        num_bytes = (NB_RB == 0) ? 32 : NB_RB;
+                        break;
+                default:
+                        return -EINVAL;
+        }
+
+        while (num_bytes != 0)
+        {
+                u8 val;
+                u32 shift = 8 * (3 - (pos & 0x3));
+
+                switch ((instword & INST_STRING_MASK)) {
+                        case INST_LSWX:
+                        case INST_LSWI:
+                                if (get_user(val, (u8 __user *)EA))
+                                        return -EFAULT;
+                                /* first time updating this reg,
+                                 * zero it out */
+                                if (pos == 0)
+                                        regs->gpr[rT] = 0;
+                                regs->gpr[rT] |= val << shift;
+                                break;
+                        case INST_STSWI:
+                        case INST_STSWX:
+                                val = regs->gpr[rT] >> shift;
+                                if (put_user(val, (u8 __user *)EA))
+                                        return -EFAULT;
+                                break;
+                }
+                /* move EA to next address */
+                EA += 1;
+                num_bytes--;
+
+                /* manage our position within the register */
+                if (++pos == 4) {
+                        pos = 0;
+                        if (++rT == 32)
+                                rT = 0;
+                }
+        }
+
+        return 0;
+}
+
+static int emulate_instruction(struct pt_regs *regs)
+{
+        u32 instword;
+        u32 rd;
+
+        if (!user_mode(regs))
+                return -EINVAL;
+        CHECK_FULL_REGS(regs);
+
+        if (get_user(instword, (u32 __user *)(regs->nip)))
+                return -EFAULT;
+
+        /* Emulate the mfspr rD, PVR. */
+        if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
+                rd = (instword >> 21) & 0x1f;
+                regs->gpr[rd] = mfspr(SPRN_PVR);
+                return 0;
+        }
+
+        /* Emulating the dcba insn is just a no-op.  */
+        if ((instword & INST_DCBA_MASK) == INST_DCBA)
+                return 0;
+
+        /* Emulate the mcrxr insn.  */
+        if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
+                int shift = (instword >> 21) & 0x1c;
+                unsigned long msk = 0xf0000000UL >> shift;
+
+                regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
+                regs->xer &= ~0xf0000000UL;
+                return 0;
+        }
+
+        /* Emulate load/store string insn. */
+        if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
+                return emulate_string_inst(regs, instword);
+
+        return -EINVAL;
+}
+
+/*
+ * Look through the list of trap instructions that are used for BUG(),
+ * BUG_ON() and WARN_ON() and see if we hit one.  At this point we know
+ * that the exception was caused by a trap instruction of some kind.
+ * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
+ * otherwise.
+ */
+extern struct bug_entry __start___bug_table[], __stop___bug_table[];
+
+#ifndef CONFIG_MODULES
+#define module_find_bug(x)      NULL
+#endif
+
+struct bug_entry *find_bug(unsigned long bugaddr)
+{
+        struct bug_entry *bug;
+
+        for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
+                if (bugaddr == bug->bug_addr)
+                        return bug;
+        return module_find_bug(bugaddr);
+}
+
+static int check_bug_trap(struct pt_regs *regs)
+{
+        struct bug_entry *bug;
+        unsigned long addr;
+
+        if (regs->msr & MSR_PR)
+                return 0;       /* not in kernel */
+        addr = regs->nip;       /* address of trap instruction */
+        if (addr < PAGE_OFFSET)
+                return 0;
+        bug = find_bug(regs->nip);
+        if (bug == NULL)
+                return 0;
+        if (bug->line & BUG_WARNING_TRAP) {
+                /* this is a WARN_ON rather than BUG/BUG_ON */
+#ifdef CONFIG_XMON
+                xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
+                       bug->function, bug->file,
+                       bug->line & ~BUG_WARNING_TRAP);
+#endif /* CONFIG_XMON */                
+                printk(KERN_ERR "Badness in %s at %s:%d\n",
+                       bug->function, bug->file,
+                       bug->line & ~BUG_WARNING_TRAP);
+                dump_stack();
+                return 1;
+        }
+#ifdef CONFIG_XMON
+        xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
+               bug->function, bug->file, bug->line);
+        xmon(regs);
+#endif /* CONFIG_XMON */
+        printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
+               bug->function, bug->file, bug->line);
+
+        return 0;
+}
+
+void __kprobes program_check_exception(struct pt_regs *regs)
+{
+        unsigned int reason = get_reason(regs);
+        extern int do_mathemu(struct pt_regs *regs);
+
+#ifdef CONFIG_MATH_EMULATION
+        /* (reason & REASON_ILLEGAL) would be the obvious thing here,
+         * but there seems to be a hardware bug on the 405GP (RevD)
+         * that means ESR is sometimes set incorrectly - either to
+         * ESR_DST (!?) or 0.  In the process of chasing this with the
+         * hardware people - not sure if it can happen on any illegal
+         * instruction or only on FP instructions, whether there is a
+         * pattern to occurences etc. -dgibson 31/Mar/2003 */
+        if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
+                emulate_single_step(regs);
+                return;
+        }
+#endif /* CONFIG_MATH_EMULATION */
+
+        if (reason & REASON_FP) {
+                /* IEEE FP exception */
+                parse_fpe(regs);
+                return;
+        }
+        if (reason & REASON_TRAP) {
+                /* trap exception */
+                if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
+                                == NOTIFY_STOP)
+                        return;
+                if (debugger_bpt(regs))
+                        return;
+                if (check_bug_trap(regs)) {
+                        regs->nip += 4;
+                        return;
+                }
+                _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
+                return;
+        }
+
+        /* Try to emulate it if we should. */
+        if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
+                switch (emulate_instruction(regs)) {
+                case 0:
+                        regs->nip += 4;
+                        emulate_single_step(regs);
+                        return;
+                case -EFAULT:
+                        _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
+                        return;
+                }
+        }
+
+        if (reason & REASON_PRIVILEGED)
+                _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
+        else
+                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
+}
+
+void alignment_exception(struct pt_regs *regs)
+{
+        int fixed;
+
+        fixed = fix_alignment(regs);
+
+        if (fixed == 1) {
+                regs->nip += 4; /* skip over emulated instruction */
+                emulate_single_step(regs);
+                return;
+        }
+
+        /* Operand address was bad */
+        if (fixed == -EFAULT) {
+                if (user_mode(regs))
+                        _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
+                else
+                        /* Search exception table */
+                        bad_page_fault(regs, regs->dar, SIGSEGV);
+                return;
+        }
+        _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
+}
+
+void StackOverflow(struct pt_regs *regs)
+{
+        printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
+               current, regs->gpr[1]);
+        debugger(regs);
+        show_regs(regs);
+        panic("kernel stack overflow");
+}
+
+void nonrecoverable_exception(struct pt_regs *regs)
+{
+        printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
+               regs->nip, regs->msr);
+        debugger(regs);
+        die("nonrecoverable exception", regs, SIGKILL);
+}
+
+void trace_syscall(struct pt_regs *regs)
+{
+        printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld    %s\n",
+               current, current->pid, regs->nip, regs->link, regs->gpr[0],
+               regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
+}
+
+void kernel_fp_unavailable_exception(struct pt_regs *regs)
+{
+        printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
+                          "%lx at %lx\n", regs->trap, regs->nip);
+        die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
+}
+
+void altivec_unavailable_exception(struct pt_regs *regs)
+{
+#if !defined(CONFIG_ALTIVEC)
+        if (user_mode(regs)) {
+                /* A user program has executed an altivec instruction,
+                   but this kernel doesn't support altivec. */
+                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
+                return;
+        }
+#endif
+        printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
+                        "%lx at %lx\n", regs->trap, regs->nip);
+        die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
+}
+
+#ifdef CONFIG_PPC64
+extern perf_irq_t perf_irq;
+#endif
+
+#if defined(CONFIG_PPC64) || defined(CONFIG_E500)
+void performance_monitor_exception(struct pt_regs *regs)
+{
+        perf_irq(regs);
+}
+#endif
+
+#ifdef CONFIG_8xx
+void SoftwareEmulation(struct pt_regs *regs)
+{
+        extern int do_mathemu(struct pt_regs *);
+        extern int Soft_emulate_8xx(struct pt_regs *);
+        int errcode;
+
+        CHECK_FULL_REGS(regs);
+
+        if (!user_mode(regs)) {
+                debugger(regs);
+                die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
+        }
+
+#ifdef CONFIG_MATH_EMULATION
+        errcode = do_mathemu(regs);
+#else
+        errcode = Soft_emulate_8xx(regs);
+#endif
+        if (errcode) {
+                if (errcode > 0)
+                        _exception(SIGFPE, regs, 0, 0);
+                else if (errcode == -EFAULT)
+                        _exception(SIGSEGV, regs, 0, 0);
+                else
+                        _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
+        } else
+                emulate_single_step(regs);
+}
+#endif /* CONFIG_8xx */
+
+#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
+
+void DebugException(struct pt_regs *regs, unsigned long debug_status)
+{
+        if (debug_status & DBSR_IC) {   /* instruction completion */
+                regs->msr &= ~MSR_DE;
+                if (user_mode(regs)) {
+                        current->thread.dbcr0 &= ~DBCR0_IC;
+                } else {
+                        /* Disable instruction completion */
+                        mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
+                        /* Clear the instruction completion event */
+                        mtspr(SPRN_DBSR, DBSR_IC);
+                        if (debugger_sstep(regs))
+                                return;
+                }
+                _exception(SIGTRAP, regs, TRAP_TRACE, 0);
+        }
+}
+#endif /* CONFIG_4xx || CONFIG_BOOKE */
+
+#if !defined(CONFIG_TAU_INT)
+void TAUException(struct pt_regs *regs)
+{
+        printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx    %s\n",
+               regs->nip, regs->msr, regs->trap, print_tainted());
+}
+#endif /* CONFIG_INT_TAU */
+
+#ifdef CONFIG_ALTIVEC
+void altivec_assist_exception(struct pt_regs *regs)
+{
+        int err;
+
+        if (!user_mode(regs)) {
+                printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
+                       " at %lx\n", regs->nip);
+                die("Kernel VMX/Altivec assist exception", regs, SIGILL);
+        }
+
+        flush_altivec_to_thread(current);
+
+        err = emulate_altivec(regs);
+        if (err == 0) {
+                regs->nip += 4;         /* skip emulated instruction */
+                emulate_single_step(regs);
+                return;
+        }
+
+        if (err == -EFAULT) {
+                /* got an error reading the instruction */
+                _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
+        } else {
+                /* didn't recognize the instruction */
+                /* XXX quick hack for now: set the non-Java bit in the VSCR */
+                if (printk_ratelimit())
+                        printk(KERN_ERR "Unrecognized altivec instruction "
+                               "in %s at %lx\n", current->comm, regs->nip);
+                current->thread.vscr.u[3] |= 0x10000;
+        }
+}
+#endif /* CONFIG_ALTIVEC */
+
+#ifdef CONFIG_FSL_BOOKE
+void CacheLockingException(struct pt_regs *regs, unsigned long address,
+                           unsigned long error_code)
+{
+        /* We treat cache locking instructions from the user
+         * as priv ops, in the future we could try to do
+         * something smarter
+         */
+        if (error_code & (ESR_DLK|ESR_ILK))
+                _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
+        return;
+}
+#endif /* CONFIG_FSL_BOOKE */
+
+#ifdef CONFIG_SPE
+void SPEFloatingPointException(struct pt_regs *regs)
+{
+        unsigned long spefscr;
+        int fpexc_mode;
+        int code = 0;
+
+        spefscr = current->thread.spefscr;
+        fpexc_mode = current->thread.fpexc_mode;
+
+        /* Hardware does not neccessarily set sticky
+         * underflow/overflow/invalid flags */
+        if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
+                code = FPE_FLTOVF;
+                spefscr |= SPEFSCR_FOVFS;
+        }
+        else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
+                code = FPE_FLTUND;
+                spefscr |= SPEFSCR_FUNFS;
+        }
+        else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
+                code = FPE_FLTDIV;
+        else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
+                code = FPE_FLTINV;
+                spefscr |= SPEFSCR_FINVS;
+        }
+        else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
+                code = FPE_FLTRES;
+
+        current->thread.spefscr = spefscr;
+
+        _exception(SIGFPE, regs, code, regs->nip);
+        return;
+}
+#endif
+
+/*
+ * We enter here if we get an unrecoverable exception, that is, one
+ * that happened at a point where the RI (recoverable interrupt) bit
+ * in the MSR is 0.  This indicates that SRR0/1 are live, and that
+ * we therefore lost state by taking this exception.
+ */
+void unrecoverable_exception(struct pt_regs *regs)
+{
+        printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
+               regs->trap, regs->nip);
+        die("Unrecoverable exception", regs, SIGABRT);
+}
+
+#ifdef CONFIG_BOOKE_WDT
+/*
+ * Default handler for a Watchdog exception,
+ * spins until a reboot occurs
+ */
+void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
+{
+        /* Generic WatchdogHandler, implement your own */
+        mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
+        return;
+}
+
+void WatchdogException(struct pt_regs *regs)
+{
+        printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
+        WatchdogHandler(regs);
+}
+#endif
+
+/*
+ * We enter here if we discover during exception entry that we are
+ * running in supervisor mode with a userspace value in the stack pointer.
+ */
+void kernel_bad_stack(struct pt_regs *regs)
+{
+        printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
+               regs->gpr[1], regs->nip);
+        die("Bad kernel stack pointer", regs, SIGABRT);
+}
+
+void __init trap_init(void)
+{
+}
diff --git a/arch/ppc/kernel/vecemu.c b/arch/powerpc/kernel/vecemu.c
index 604d0947cb20..604d0947cb20 100644
--- a/arch/ppc/kernel/vecemu.c
+++ b/arch/powerpc/kernel/vecemu.c
diff --git a/arch/ppc64/kernel/vector.S b/arch/powerpc/kernel/vector.S
index b79d33e4001e..66b3d03c5fa5 100644
--- a/arch/ppc64/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -1,11 +1,26 @@
+#include <linux/config.h>
 #include <asm/ppc_asm.h>
-#include <asm/processor.h>
+#include <asm/reg.h>
 
 /*
  * The routines below are in assembler so we can closely control the
  * usage of floating-point registers.  These routines must be called
  * with preempt disabled.
  */
+#ifdef CONFIG_PPC32
+        .data
+fpzero:
+        .long   0
+fpone:
+        .long   0x3f800000      /* 1.0 in single-precision FP */
+fphalf:
+        .long   0x3f000000      /* 0.5 in single-precision FP */
+
+#define LDCONST(fr, name)       \
+        lis     r11,name@ha;    \
+        lfs     fr,name@l(r11)
+#else
+
         .section ".toc","aw"
 fpzero:
         .tc     FD_0_0[TC],0
@@ -14,32 +29,42 @@ fpone:
 fphalf:
         .tc     FD_3fe00000_0[TC],0x3fe0000000000000    /* 0.5 */
 
+#define LDCONST(fr, name)       \
+        lfd     fr,name@toc(r2)
+#endif
+
         .text
 /*
  * Internal routine to enable floating point and set FPSCR to 0.
  * Don't call it from C; it doesn't use the normal calling convention.
  */
 fpenable:
+#ifdef CONFIG_PPC32
+        stwu    r1,-64(r1)
+#else
+        stdu    r1,-64(r1)
+#endif
         mfmsr   r10
         ori     r11,r10,MSR_FP
         mtmsr   r11
         isync
-        stfd    fr31,-8(r1)
-        stfd    fr0,-16(r1)
-        stfd    fr1,-24(r1)
+        stfd    fr0,24(r1)
+        stfd    fr1,16(r1)
+        stfd    fr31,8(r1)
+        LDCONST(fr1, fpzero)
         mffs    fr31
-        lfd     fr1,fpzero@toc(r2)
         mtfsf   0xff,fr1
         blr
 
 fpdisable:
         mtlr    r12
         mtfsf   0xff,fr31
-        lfd     fr1,-24(r1)
-        lfd     fr0,-16(r1)
-        lfd     fr31,-8(r1)
+        lfd     fr31,8(r1)
+        lfd     fr1,16(r1)
+        lfd     fr0,24(r1)
         mtmsr   r10
         isync
+        addi    r1,r1,64
         blr
 
 /*
@@ -82,7 +107,7 @@ _GLOBAL(vsubfp)
 _GLOBAL(vmaddfp)
         mflr    r12
         bl      fpenable
-        stfd    fr2,-32(r1)
+        stfd    fr2,32(r1)
         li      r0,4
         mtctr   r0
         li      r7,0
@@ -93,7 +118,7 @@ _GLOBAL(vmaddfp)
         stfsx   fr0,r3,r7
         addi    r7,r7,4
         bdnz    1b
-        lfd     fr2,-32(r1)
+        lfd     fr2,32(r1)
         b       fpdisable
 
 /*
@@ -102,7 +127,7 @@ _GLOBAL(vmaddfp)
 _GLOBAL(vnmsubfp)
         mflr    r12
         bl      fpenable
-        stfd    fr2,-32(r1)
+        stfd    fr2,32(r1)
         li      r0,4
         mtctr   r0
         li      r7,0
@@ -113,7 +138,7 @@ _GLOBAL(vnmsubfp)
         stfsx   fr0,r3,r7
         addi    r7,r7,4
         bdnz    1b
-        lfd     fr2,-32(r1)
+        lfd     fr2,32(r1)
         b       fpdisable
 
 /*
@@ -124,7 +149,7 @@ _GLOBAL(vrefp)
         mflr    r12
         bl      fpenable
         li      r0,4
-        lfd     fr1,fpone@toc(r2)
+        LDCONST(fr1, fpone)
         mtctr   r0
         li      r6,0
 1:      lfsx    fr0,r4,r6
@@ -143,13 +168,13 @@ _GLOBAL(vrefp)
 _GLOBAL(vrsqrtefp)
         mflr    r12
         bl      fpenable
-        stfd    fr2,-32(r1)
-        stfd    fr3,-40(r1)
-        stfd    fr4,-48(r1)
-        stfd    fr5,-56(r1)
+        stfd    fr2,32(r1)
+        stfd    fr3,40(r1)
+        stfd    fr4,48(r1)
+        stfd    fr5,56(r1)
         li      r0,4
-        lfd     fr4,fpone@toc(r2)
-        lfd     fr5,fphalf@toc(r2)
+        LDCONST(fr4, fpone)
+        LDCONST(fr5, fphalf)
         mtctr   r0
         li      r6,0
 1:      lfsx    fr0,r4,r6
@@ -165,8 +190,8 @@ _GLOBAL(vrsqrtefp)
         stfsx   fr1,r3,r6
         addi    r6,r6,4
         bdnz    1b
-        lfd     fr5,-56(r1)
-        lfd     fr4,-48(r1)
-        lfd     fr3,-40(r1)
-        lfd     fr2,-32(r1)
+        lfd     fr5,56(r1)
+        lfd     fr4,48(r1)
+        lfd     fr3,40(r1)
+        lfd     fr2,32(r1)
         b       fpdisable
diff --git a/arch/ppc64/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 0e555b7a6587..97082a4203ad 100644
--- a/arch/ppc64/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -69,6 +69,16 @@ static int vio_bus_remove(struct device *dev)
         return 1;
 }
 
+/* convert from struct device to struct vio_dev and pass to driver. */
+static void vio_bus_shutdown(struct device *dev)
+{
+        struct vio_dev *viodev = to_vio_dev(dev);
+        struct vio_driver *viodrv = to_vio_driver(dev->driver);
+
+        if (viodrv->shutdown)
+                viodrv->shutdown(viodev);
+}
+
 /**
  * vio_register_driver: - Register a new vio driver
  * @drv:        The vio_driver structure to be registered.
@@ -76,13 +86,13 @@ static int vio_bus_remove(struct device *dev)
 int vio_register_driver(struct vio_driver *viodrv)
 {
         printk(KERN_DEBUG "%s: driver %s registering\n", __FUNCTION__,
-                viodrv->name);
+                viodrv->driver.name);
 
         /* fill in 'struct driver' fields */
-        viodrv->driver.name = viodrv->name;
         viodrv->driver.bus = &vio_bus_type;
         viodrv->driver.probe = vio_bus_probe;
         viodrv->driver.remove = vio_bus_remove;
+        viodrv->driver.shutdown = vio_bus_shutdown;
 
         return driver_register(&viodrv->driver);
 }
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
new file mode 100644
index 000000000000..d4dfcfbce272
--- /dev/null
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -0,0 +1,279 @@
+#include <linux/config.h>
+#ifdef CONFIG_PPC64
+#include <asm/page.h>
+#else
+#define PAGE_SIZE       4096
+#endif
+#include <asm-generic/vmlinux.lds.h>
+
+#ifdef CONFIG_PPC64
+OUTPUT_ARCH(powerpc:common64)
+jiffies = jiffies_64;
+#else
+OUTPUT_ARCH(powerpc:common)
+jiffies = jiffies_64 + 4;
+#endif
+SECTIONS
+{
+  /* Sections to be discarded. */
+  /DISCARD/ : {
+    *(.exitcall.exit)
+    *(.exit.data)
+  }
+
+
+  /* Read-only sections, merged into text segment: */
+#ifdef CONFIG_PPC32
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)           }
+  .dynsym        : { *(.dynsym)         }
+  .dynstr        : { *(.dynstr)         }
+  .rel.text      : { *(.rel.text)               }
+  .rela.text     : { *(.rela.text)      }
+  .rel.data      : { *(.rel.data)               }
+  .rela.data     : { *(.rela.data)      }
+  .rel.rodata    : { *(.rel.rodata)     }
+  .rela.rodata   : { *(.rela.rodata)    }
+  .rel.got       : { *(.rel.got)                }
+  .rela.got      : { *(.rela.got)               }
+  .rel.ctors     : { *(.rel.ctors)      }
+  .rela.ctors    : { *(.rela.ctors)     }
+  .rel.dtors     : { *(.rel.dtors)      }
+  .rela.dtors    : { *(.rela.dtors)     }
+  .rel.bss       : { *(.rel.bss)                }
+  .rela.bss      : { *(.rela.bss)               }
+  .rel.plt       : { *(.rel.plt)                }
+  .rela.plt      : { *(.rela.plt)               }
+/*  .init          : { *(.init) } =0*/
+  .plt : { *(.plt) }
+#endif
+  .text : {
+    *(.text .text.*)
+    SCHED_TEXT
+    LOCK_TEXT
+    KPROBES_TEXT
+    *(.fixup)
+#ifdef CONFIG_PPC32
+    *(.got1)
+    __got2_start = .;
+    *(.got2)
+    __got2_end = .;
+#else
+    . = ALIGN(PAGE_SIZE);
+    _etext = .;
+#endif
+  }
+#ifdef CONFIG_PPC32
+  _etext = .;
+  PROVIDE (etext = .);
+
+  RODATA
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  .fixup   : { *(.fixup) }
+#endif
+
+        __ex_table : {
+                __start___ex_table = .;
+                *(__ex_table)
+                __stop___ex_table = .;
+        }
+
+        __bug_table : {
+                __start___bug_table = .;
+                *(__bug_table)
+                __stop___bug_table = .;
+        }
+
+#ifdef CONFIG_PPC64
+        __ftr_fixup : {
+                __start___ftr_fixup = .;
+                *(__ftr_fixup)
+                __stop___ftr_fixup = .;
+        }
+
+  RODATA
+#endif
+
+#ifdef CONFIG_PPC32
+  /* Read-write section, merged into data segment: */
+  . = ALIGN(PAGE_SIZE);
+  _sdata = .;
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.got.plt) *(.got)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+
+  . = ALIGN(PAGE_SIZE);
+  __nosave_begin = .;
+  .data_nosave : { *(.data.nosave) }
+  . = ALIGN(PAGE_SIZE);
+  __nosave_end = .;
+
+  . = ALIGN(32);
+  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = ALIGN(8192);
+  .data.init_task : { *(.data.init_task) }
+#endif
+
+  /* will be freed after init */
+  . = ALIGN(PAGE_SIZE);
+  __init_begin = .;
+  .init.text : {
+        _sinittext = .;
+        *(.init.text)
+        _einittext = .;
+  }
+#ifdef CONFIG_PPC32
+  /* .exit.text is discarded at runtime, not link time,
+     to deal with references from __bug_table */
+  .exit.text : { *(.exit.text) }
+#endif
+  .init.data : {
+    *(.init.data);
+    __vtop_table_begin = .;
+    *(.vtop_fixup);
+    __vtop_table_end = .;
+    __ptov_table_begin = .;
+    *(.ptov_fixup);
+    __ptov_table_end = .;
+  }
+
+  . = ALIGN(16);
+  .init.setup : {
+    __setup_start = .;
+    *(.init.setup)
+    __setup_end = .;
+  }
+
+  .initcall.init : {
+        __initcall_start = .;
+        *(.initcall1.init)
+        *(.initcall2.init)
+        *(.initcall3.init)
+        *(.initcall4.init)
+        *(.initcall5.init)
+        *(.initcall6.init)
+        *(.initcall7.init)
+        __initcall_end = .;
+  }
+
+  .con_initcall.init : {
+    __con_initcall_start = .;
+    *(.con_initcall.init)
+    __con_initcall_end = .;
+  }
+
+  SECURITY_INIT
+
+#ifdef CONFIG_PPC32
+  __start___ftr_fixup = .;
+  __ftr_fixup : { *(__ftr_fixup) }
+  __stop___ftr_fixup = .;
+#else
+  . = ALIGN(PAGE_SIZE);
+  .init.ramfs : {
+    __initramfs_start = .;
+    *(.init.ramfs)
+    __initramfs_end = .;
+  }
+#endif
+
+#ifdef CONFIG_PPC32
+  . = ALIGN(32);
+#endif
+  .data.percpu : {
+    __per_cpu_start = .;
+    *(.data.percpu)
+    __per_cpu_end = .;
+  }
+
+ . = ALIGN(PAGE_SIZE);
+#ifdef CONFIG_PPC64
+ . = ALIGN(16384);
+ __init_end = .;
+ /* freed after init ends here */
+
+ /* Read/write sections */
+ . = ALIGN(PAGE_SIZE);
+ . = ALIGN(16384);
+ _sdata = .;
+ /* The initial task and kernel stack */
+ .data.init_task : {
+      *(.data.init_task)
+      }
+
+ . = ALIGN(PAGE_SIZE);
+ .data.page_aligned : {
+      *(.data.page_aligned)
+      }
+
+ .data.cacheline_aligned : {
+      *(.data.cacheline_aligned)
+      }
+
+ .data : {
+      *(.data .data.rel* .toc1)
+      *(.branch_lt)
+      }
+
+ .opd : {
+      *(.opd)
+      }
+
+ .got : {
+      __toc_start = .;
+      *(.got)
+      *(.toc)
+      . = ALIGN(PAGE_SIZE);
+      _edata = .;
+      }
+
+  . = ALIGN(PAGE_SIZE);
+#else
+  __initramfs_start = .;
+  .init.ramfs : {
+    *(.init.ramfs)
+  }
+  __initramfs_end = .;
+
+  . = ALIGN(4096);
+  __init_end = .;
+
+  . = ALIGN(4096);
+  _sextratext = .;
+  _eextratext = .;
+
+  __bss_start = .;
+#endif
+
+  .bss : {
+    __bss_start = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  __bss_stop = .;
+  }
+
+#ifdef CONFIG_PPC64
+  . = ALIGN(PAGE_SIZE);
+#endif
+  _end = . ;
+#ifdef CONFIG_PPC32
+  PROVIDE (end = .);
+#endif
+}
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
new file mode 100644
index 000000000000..e6b2be3bcec1
--- /dev/null
+++ b/arch/powerpc/lib/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile for ppc-specific library files..
+#
+
+ifeq ($(CONFIG_PPC_MERGE),y)
+obj-y                   := string.o
+endif
+
+obj-y                   += strcase.o
+obj-$(CONFIG_PPC32)     += div64.o copy_32.o checksum_32.o
+obj-$(CONFIG_PPC64)     += checksum_64.o copypage_64.o copyuser_64.o \
+                           memcpy_64.o usercopy_64.o mem_64.o
+obj-$(CONFIG_PPC_ISERIES) += e2a.o
+obj-$(CONFIG_XMON)      += sstep.o
+
+ifeq ($(CONFIG_PPC64),y)
+obj-$(CONFIG_SMP)       += locks.o
+obj-$(CONFIG_DEBUG_KERNEL) += sstep.o
+endif
diff --git a/arch/powerpc/lib/checksum_32.S b/arch/powerpc/lib/checksum_32.S
new file mode 100644
index 000000000000..7874e8a80455
--- /dev/null
+++ b/arch/powerpc/lib/checksum_32.S
@@ -0,0 +1,225 @@
+/*
+ * This file contains assembly-language implementations
+ * of IP-style 1's complement checksum routines.
+ *      
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ * Severely hacked about by Paul Mackerras (paulus@cs.anu.edu.au).
+ */
+
+#include <linux/sys.h>
+#include <asm/processor.h>
+#include <asm/errno.h>
+#include <asm/ppc_asm.h>
+
+        .text
+
+/*
+ * ip_fast_csum(buf, len) -- Optimized for IP header
+ * len is in words and is always >= 5.
+ */
+_GLOBAL(ip_fast_csum)
+        lwz     r0,0(r3)
+        lwzu    r5,4(r3)
+        addic.  r4,r4,-2
+        addc    r0,r0,r5
+        mtctr   r4
+        blelr-
+1:      lwzu    r4,4(r3)
+        adde    r0,r0,r4
+        bdnz    1b
+        addze   r0,r0           /* add in final carry */
+        rlwinm  r3,r0,16,0,31   /* fold two halves together */
+        add     r3,r0,r3
+        not     r3,r3
+        srwi    r3,r3,16
+        blr
+
+/*
+ * Compute checksum of TCP or UDP pseudo-header:
+ *   csum_tcpudp_magic(saddr, daddr, len, proto, sum)
+ */     
+_GLOBAL(csum_tcpudp_magic)
+        rlwimi  r5,r6,16,0,15   /* put proto in upper half of len */
+        addc    r0,r3,r4        /* add 4 32-bit words together */
+        adde    r0,r0,r5
+        adde    r0,r0,r7
+        addze   r0,r0           /* add in final carry */
+        rlwinm  r3,r0,16,0,31   /* fold two halves together */
+        add     r3,r0,r3
+        not     r3,r3
+        srwi    r3,r3,16
+        blr
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * csum_partial(buff, len, sum)
+ */
+_GLOBAL(csum_partial)
+        addic   r0,r5,0
+        subi    r3,r3,4
+        srwi.   r6,r4,2
+        beq     3f              /* if we're doing < 4 bytes */
+        andi.   r5,r3,2         /* Align buffer to longword boundary */
+        beq+    1f
+        lhz     r5,4(r3)        /* do 2 bytes to get aligned */
+        addi    r3,r3,2
+        subi    r4,r4,2
+        addc    r0,r0,r5
+        srwi.   r6,r4,2         /* # words to do */
+        beq     3f
+1:      mtctr   r6
+2:      lwzu    r5,4(r3)        /* the bdnz has zero overhead, so it should */
+        adde    r0,r0,r5        /* be unnecessary to unroll this loop */
+        bdnz    2b
+        andi.   r4,r4,3
+3:      cmpwi   0,r4,2
+        blt+    4f
+        lhz     r5,4(r3)
+        addi    r3,r3,2
+        subi    r4,r4,2
+        adde    r0,r0,r5
+4:      cmpwi   0,r4,1
+        bne+    5f
+        lbz     r5,4(r3)
+        slwi    r5,r5,8         /* Upper byte of word */
+        adde    r0,r0,r5
+5:      addze   r3,r0           /* add in final carry */
+        blr
+
+/*
+ * Computes the checksum of a memory block at src, length len,
+ * and adds in "sum" (32-bit), while copying the block to dst.
+ * If an access exception occurs on src or dst, it stores -EFAULT
+ * to *src_err or *dst_err respectively, and (for an error on
+ * src) zeroes the rest of dst.
+ *
+ * csum_partial_copy_generic(src, dst, len, sum, src_err, dst_err)
+ */
+_GLOBAL(csum_partial_copy_generic)
+        addic   r0,r6,0
+        subi    r3,r3,4
+        subi    r4,r4,4
+        srwi.   r6,r5,2
+        beq     3f              /* if we're doing < 4 bytes */
+        andi.   r9,r4,2         /* Align dst to longword boundary */
+        beq+    1f
+81:     lhz     r6,4(r3)        /* do 2 bytes to get aligned */
+        addi    r3,r3,2
+        subi    r5,r5,2
+91:     sth     r6,4(r4)
+        addi    r4,r4,2
+        addc    r0,r0,r6
+        srwi.   r6,r5,2         /* # words to do */
+        beq     3f
+1:      srwi.   r6,r5,4         /* # groups of 4 words to do */
+        beq     10f
+        mtctr   r6
+71:     lwz     r6,4(r3)
+72:     lwz     r9,8(r3)
+73:     lwz     r10,12(r3)
+74:     lwzu    r11,16(r3)
+        adde    r0,r0,r6
+75:     stw     r6,4(r4)
+        adde    r0,r0,r9
+76:     stw     r9,8(r4)
+        adde    r0,r0,r10
+77:     stw     r10,12(r4)
+        adde    r0,r0,r11
+78:     stwu    r11,16(r4)
+        bdnz    71b
+10:     rlwinm. r6,r5,30,30,31  /* # words left to do */
+        beq     13f
+        mtctr   r6
+82:     lwzu    r9,4(r3)
+92:     stwu    r9,4(r4)
+        adde    r0,r0,r9
+        bdnz    82b
+13:     andi.   r5,r5,3
+3:      cmpwi   0,r5,2
+        blt+    4f
+83:     lhz     r6,4(r3)
+        addi    r3,r3,2
+        subi    r5,r5,2
+93:     sth     r6,4(r4)
+        addi    r4,r4,2
+        adde    r0,r0,r6
+4:      cmpwi   0,r5,1
+        bne+    5f
+84:     lbz     r6,4(r3)
+94:     stb     r6,4(r4)
+        slwi    r6,r6,8         /* Upper byte of word */
+        adde    r0,r0,r6
+5:      addze   r3,r0           /* add in final carry */
+        blr
+
+/* These shouldn't go in the fixup section, since that would
+   cause the ex_table addresses to get out of order. */
+
+src_error_4:
+        mfctr   r6              /* update # bytes remaining from ctr */
+        rlwimi  r5,r6,4,0,27
+        b       79f
+src_error_1:
+        li      r6,0
+        subi    r5,r5,2
+95:     sth     r6,4(r4)
+        addi    r4,r4,2
+79:     srwi.   r6,r5,2
+        beq     3f
+        mtctr   r6
+src_error_2:
+        li      r6,0
+96:     stwu    r6,4(r4)
+        bdnz    96b
+3:      andi.   r5,r5,3
+        beq     src_error
+src_error_3:
+        li      r6,0
+        mtctr   r5
+        addi    r4,r4,3
+97:     stbu    r6,1(r4)
+        bdnz    97b
+src_error:
+        cmpwi   0,r7,0
+        beq     1f
+        li      r6,-EFAULT
+        stw     r6,0(r7)
+1:      addze   r3,r0
+        blr
+
+dst_error:
+        cmpwi   0,r8,0
+        beq     1f
+        li      r6,-EFAULT
+        stw     r6,0(r8)
+1:      addze   r3,r0
+        blr
+
+.section __ex_table,"a"
+        .long   81b,src_error_1
+        .long   91b,dst_error
+        .long   71b,src_error_4
+        .long   72b,src_error_4
+        .long   73b,src_error_4
+        .long   74b,src_error_4
+        .long   75b,dst_error
+        .long   76b,dst_error
+        .long   77b,dst_error
+        .long   78b,dst_error
+        .long   82b,src_error_2
+        .long   92b,dst_error
+        .long   83b,src_error_3
+        .long   93b,dst_error
+        .long   84b,src_error_3
+        .long   94b,dst_error
+        .long   95b,dst_error
+        .long   96b,dst_error
+        .long   97b,dst_error
diff --git a/arch/ppc64/lib/checksum.S b/arch/powerpc/lib/checksum_64.S
index ef96c6c58efc..ef96c6c58efc 100644
--- a/arch/ppc64/lib/checksum.S
+++ b/arch/powerpc/lib/checksum_64.S
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S
new file mode 100644
index 000000000000..bee51414812e
--- /dev/null
+++ b/arch/powerpc/lib/copy_32.S
@@ -0,0 +1,543 @@
+/*
+ * Memory copy functions for 32-bit PowerPC.
+ *
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/cache.h>
+#include <asm/errno.h>
+#include <asm/ppc_asm.h>
+
+#define COPY_16_BYTES           \
+        lwz     r7,4(r4);       \
+        lwz     r8,8(r4);       \
+        lwz     r9,12(r4);      \
+        lwzu    r10,16(r4);     \
+        stw     r7,4(r6);       \
+        stw     r8,8(r6);       \
+        stw     r9,12(r6);      \
+        stwu    r10,16(r6)
+
+#define COPY_16_BYTES_WITHEX(n) \
+8 ## n ## 0:                    \
+        lwz     r7,4(r4);       \
+8 ## n ## 1:                    \
+        lwz     r8,8(r4);       \
+8 ## n ## 2:                    \
+        lwz     r9,12(r4);      \
+8 ## n ## 3:                    \
+        lwzu    r10,16(r4);     \
+8 ## n ## 4:                    \
+        stw     r7,4(r6);       \
+8 ## n ## 5:                    \
+        stw     r8,8(r6);       \
+8 ## n ## 6:                    \
+        stw     r9,12(r6);      \
+8 ## n ## 7:                    \
+        stwu    r10,16(r6)
+
+#define COPY_16_BYTES_EXCODE(n)                 \
+9 ## n ## 0:                                    \
+        addi    r5,r5,-(16 * n);                \
+        b       104f;                           \
+9 ## n ## 1:                                    \
+        addi    r5,r5,-(16 * n);                \
+        b       105f;                           \
+.section __ex_table,"a";                        \
+        .align  2;                              \
+        .long   8 ## n ## 0b,9 ## n ## 0b;      \
+        .long   8 ## n ## 1b,9 ## n ## 0b;      \
+        .long   8 ## n ## 2b,9 ## n ## 0b;      \
+        .long   8 ## n ## 3b,9 ## n ## 0b;      \
+        .long   8 ## n ## 4b,9 ## n ## 1b;      \
+        .long   8 ## n ## 5b,9 ## n ## 1b;      \
+        .long   8 ## n ## 6b,9 ## n ## 1b;      \
+        .long   8 ## n ## 7b,9 ## n ## 1b;      \
+        .text
+
+        .text
+        .stabs  "arch/powerpc/lib/",N_SO,0,0,0f
+        .stabs  "copy32.S",N_SO,0,0,0f
+0:
+
+CACHELINE_BYTES = L1_CACHE_BYTES
+LG_CACHELINE_BYTES = L1_CACHE_SHIFT
+CACHELINE_MASK = (L1_CACHE_BYTES-1)
+
+/*
+ * Use dcbz on the complete cache lines in the destination
+ * to set them to zero.  This requires that the destination
+ * area is cacheable.  -- paulus
+ */
+_GLOBAL(cacheable_memzero)
+        mr      r5,r4
+        li      r4,0
+        addi    r6,r3,-4
+        cmplwi  0,r5,4
+        blt     7f
+        stwu    r4,4(r6)
+        beqlr
+        andi.   r0,r6,3
+        add     r5,r0,r5
+        subf    r6,r0,r6
+        clrlwi  r7,r6,32-LG_CACHELINE_BYTES
+        add     r8,r7,r5
+        srwi    r9,r8,LG_CACHELINE_BYTES
+        addic.  r9,r9,-1        /* total number of complete cachelines */
+        ble     2f
+        xori    r0,r7,CACHELINE_MASK & ~3
+        srwi.   r0,r0,2
+        beq     3f
+        mtctr   r0
+4:      stwu    r4,4(r6)
+        bdnz    4b
+3:      mtctr   r9
+        li      r7,4
+#if !defined(CONFIG_8xx)
+10:     dcbz    r7,r6
+#else
+10:     stw     r4, 4(r6)
+        stw     r4, 8(r6)
+        stw     r4, 12(r6)
+        stw     r4, 16(r6)
+#if CACHE_LINE_SIZE >= 32
+        stw     r4, 20(r6)
+        stw     r4, 24(r6)
+        stw     r4, 28(r6)
+        stw     r4, 32(r6)
+#endif /* CACHE_LINE_SIZE */
+#endif
+        addi    r6,r6,CACHELINE_BYTES
+        bdnz    10b
+        clrlwi  r5,r8,32-LG_CACHELINE_BYTES
+        addi    r5,r5,4
+2:      srwi    r0,r5,2
+        mtctr   r0
+        bdz     6f
+1:      stwu    r4,4(r6)
+        bdnz    1b
+6:      andi.   r5,r5,3
+7:      cmpwi   0,r5,0
+        beqlr
+        mtctr   r5
+        addi    r6,r6,3
+8:      stbu    r4,1(r6)
+        bdnz    8b
+        blr
+
+_GLOBAL(memset)
+        rlwimi  r4,r4,8,16,23
+        rlwimi  r4,r4,16,0,15
+        addi    r6,r3,-4
+        cmplwi  0,r5,4
+        blt     7f
+        stwu    r4,4(r6)
+        beqlr
+        andi.   r0,r6,3
+        add     r5,r0,r5
+        subf    r6,r0,r6
+        srwi    r0,r5,2
+        mtctr   r0
+        bdz     6f
+1:      stwu    r4,4(r6)
+        bdnz    1b
+6:      andi.   r5,r5,3
+7:      cmpwi   0,r5,0
+        beqlr
+        mtctr   r5
+        addi    r6,r6,3
+8:      stbu    r4,1(r6)
+        bdnz    8b
+        blr
+
+/*
+ * This version uses dcbz on the complete cache lines in the
+ * destination area to reduce memory traffic.  This requires that
+ * the destination area is cacheable.
+ * We only use this version if the source and dest don't overlap.
+ * -- paulus.
+ */
+_GLOBAL(cacheable_memcpy)
+        add     r7,r3,r5                /* test if the src & dst overlap */
+        add     r8,r4,r5
+        cmplw   0,r4,r7
+        cmplw   1,r3,r8
+        crand   0,0,4                   /* cr0.lt &= cr1.lt */
+        blt     memcpy                  /* if regions overlap */
+
+        addi    r4,r4,-4
+        addi    r6,r3,-4
+        neg     r0,r3
+        andi.   r0,r0,CACHELINE_MASK    /* # bytes to start of cache line */
+        beq     58f
+
+        cmplw   0,r5,r0                 /* is this more than total to do? */
+        blt     63f                     /* if not much to do */
+        andi.   r8,r0,3                 /* get it word-aligned first */
+        subf    r5,r0,r5
+        mtctr   r8
+        beq+    61f
+70:     lbz     r9,4(r4)                /* do some bytes */
+        stb     r9,4(r6)
+        addi    r4,r4,1
+        addi    r6,r6,1
+        bdnz    70b
+61:     srwi.   r0,r0,2
+        mtctr   r0
+        beq     58f
+72:     lwzu    r9,4(r4)                /* do some words */
+        stwu    r9,4(r6)
+        bdnz    72b
+
+58:     srwi.   r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
+        clrlwi  r5,r5,32-LG_CACHELINE_BYTES
+        li      r11,4
+        mtctr   r0
+        beq     63f
+53:
+#if !defined(CONFIG_8xx)
+        dcbz    r11,r6
+#endif
+        COPY_16_BYTES
+#if L1_CACHE_BYTES >= 32
+        COPY_16_BYTES
+#if L1_CACHE_BYTES >= 64
+        COPY_16_BYTES
+        COPY_16_BYTES
+#if L1_CACHE_BYTES >= 128
+        COPY_16_BYTES
+        COPY_16_BYTES
+        COPY_16_BYTES
+        COPY_16_BYTES
+#endif
+#endif
+#endif
+        bdnz    53b
+
+63:     srwi.   r0,r5,2
+        mtctr   r0
+        beq     64f
+30:     lwzu    r0,4(r4)
+        stwu    r0,4(r6)
+        bdnz    30b
+
+64:     andi.   r0,r5,3
+        mtctr   r0
+        beq+    65f
+40:     lbz     r0,4(r4)
+        stb     r0,4(r6)
+        addi    r4,r4,1
+        addi    r6,r6,1
+        bdnz    40b
+65:     blr
+
+_GLOBAL(memmove)
+        cmplw   0,r3,r4
+        bgt     backwards_memcpy
+        /* fall through */
+
+_GLOBAL(memcpy)
+        srwi.   r7,r5,3
+        addi    r6,r3,-4
+        addi    r4,r4,-4
+        beq     2f                      /* if less than 8 bytes to do */
+        andi.   r0,r6,3                 /* get dest word aligned */
+        mtctr   r7
+        bne     5f
+1:      lwz     r7,4(r4)
+        lwzu    r8,8(r4)
+        stw     r7,4(r6)
+        stwu    r8,8(r6)
+        bdnz    1b
+        andi.   r5,r5,7
+2:      cmplwi  0,r5,4
+        blt     3f
+        lwzu    r0,4(r4)
+        addi    r5,r5,-4
+        stwu    r0,4(r6)
+3:      cmpwi   0,r5,0
+        beqlr
+        mtctr   r5
+        addi    r4,r4,3
+        addi    r6,r6,3
+4:      lbzu    r0,1(r4)
+        stbu    r0,1(r6)
+        bdnz    4b
+        blr
+5:      subfic  r0,r0,4
+        mtctr   r0
+6:      lbz     r7,4(r4)
+        addi    r4,r4,1
+        stb     r7,4(r6)
+        addi    r6,r6,1
+        bdnz    6b
+        subf    r5,r0,r5
+        rlwinm. r7,r5,32-3,3,31
+        beq     2b
+        mtctr   r7
+        b       1b
+
+_GLOBAL(backwards_memcpy)
+        rlwinm. r7,r5,32-3,3,31         /* r0 = r5 >> 3 */
+        add     r6,r3,r5
+        add     r4,r4,r5
+        beq     2f
+        andi.   r0,r6,3
+        mtctr   r7
+        bne     5f
+1:      lwz     r7,-4(r4)
+        lwzu    r8,-8(r4)
+        stw     r7,-4(r6)
+        stwu    r8,-8(r6)
+        bdnz    1b
+        andi.   r5,r5,7
+2:      cmplwi  0,r5,4
+        blt     3f
+        lwzu    r0,-4(r4)
+        subi    r5,r5,4
+        stwu    r0,-4(r6)
+3:      cmpwi   0,r5,0
+        beqlr
+        mtctr   r5
+4:      lbzu    r0,-1(r4)
+        stbu    r0,-1(r6)
+        bdnz    4b
+        blr
+5:      mtctr   r0
+6:      lbzu    r7,-1(r4)
+        stbu    r7,-1(r6)
+        bdnz    6b
+        subf    r5,r0,r5
+        rlwinm. r7,r5,32-3,3,31
+        beq     2b
+        mtctr   r7
+        b       1b
+
+_GLOBAL(__copy_tofrom_user)
+        addi    r4,r4,-4
+        addi    r6,r3,-4
+        neg     r0,r3
+        andi.   r0,r0,CACHELINE_MASK    /* # bytes to start of cache line */
+        beq     58f
+
+        cmplw   0,r5,r0                 /* is this more than total to do? */
+        blt     63f                     /* if not much to do */
+        andi.   r8,r0,3                 /* get it word-aligned first */
+        mtctr   r8
+        beq+    61f
+70:     lbz     r9,4(r4)                /* do some bytes */
+71:     stb     r9,4(r6)
+        addi    r4,r4,1
+        addi    r6,r6,1
+        bdnz    70b
+61:     subf    r5,r0,r5
+        srwi.   r0,r0,2
+        mtctr   r0
+        beq     58f
+72:     lwzu    r9,4(r4)                /* do some words */
+73:     stwu    r9,4(r6)
+        bdnz    72b
+
+        .section __ex_table,"a"
+        .align  2
+        .long   70b,100f
+        .long   71b,101f
+        .long   72b,102f
+        .long   73b,103f
+        .text
+
+58:     srwi.   r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
+        clrlwi  r5,r5,32-LG_CACHELINE_BYTES
+        li      r11,4
+        beq     63f
+
+#ifdef CONFIG_8xx
+        /* Don't use prefetch on 8xx */
+        mtctr   r0
+        li      r0,0
+53:     COPY_16_BYTES_WITHEX(0)
+        bdnz    53b
+
+#else /* not CONFIG_8xx */
+        /* Here we decide how far ahead to prefetch the source */
+        li      r3,4
+        cmpwi   r0,1
+        li      r7,0
+        ble     114f
+        li      r7,1
+#if MAX_COPY_PREFETCH > 1
+        /* Heuristically, for large transfers we prefetch
+           MAX_COPY_PREFETCH cachelines ahead.  For small transfers
+           we prefetch 1 cacheline ahead. */
+        cmpwi   r0,MAX_COPY_PREFETCH
+        ble     112f
+        li      r7,MAX_COPY_PREFETCH
+112:    mtctr   r7
+111:    dcbt    r3,r4
+        addi    r3,r3,CACHELINE_BYTES
+        bdnz    111b
+#else
+        dcbt    r3,r4
+        addi    r3,r3,CACHELINE_BYTES
+#endif /* MAX_COPY_PREFETCH > 1 */
+
+114:    subf    r8,r7,r0
+        mr      r0,r7
+        mtctr   r8
+
+53:     dcbt    r3,r4
+54:     dcbz    r11,r6
+        .section __ex_table,"a"
+        .align  2
+        .long   54b,105f
+        .text
+/* the main body of the cacheline loop */
+        COPY_16_BYTES_WITHEX(0)
+#if L1_CACHE_BYTES >= 32
+        COPY_16_BYTES_WITHEX(1)
+#if L1_CACHE_BYTES >= 64
+        COPY_16_BYTES_WITHEX(2)
+        COPY_16_BYTES_WITHEX(3)
+#if L1_CACHE_BYTES >= 128
+        COPY_16_BYTES_WITHEX(4)
+        COPY_16_BYTES_WITHEX(5)
+        COPY_16_BYTES_WITHEX(6)
+        COPY_16_BYTES_WITHEX(7)
+#endif
+#endif
+#endif
+        bdnz    53b
+        cmpwi   r0,0
+        li      r3,4
+        li      r7,0
+        bne     114b
+#endif /* CONFIG_8xx */
+
+63:     srwi.   r0,r5,2
+        mtctr   r0
+        beq     64f
+30:     lwzu    r0,4(r4)
+31:     stwu    r0,4(r6)
+        bdnz    30b
+
+64:     andi.   r0,r5,3
+        mtctr   r0
+        beq+    65f
+40:     lbz     r0,4(r4)
+41:     stb     r0,4(r6)
+        addi    r4,r4,1
+        addi    r6,r6,1
+        bdnz    40b
+65:     li      r3,0
+        blr
+
+/* read fault, initial single-byte copy */
+100:    li      r9,0
+        b       90f
+/* write fault, initial single-byte copy */
+101:    li      r9,1
+90:     subf    r5,r8,r5
+        li      r3,0
+        b       99f
+/* read fault, initial word copy */
+102:    li      r9,0
+        b       91f
+/* write fault, initial word copy */
+103:    li      r9,1
+91:     li      r3,2
+        b       99f
+
+/*
+ * this stuff handles faults in the cacheline loop and branches to either
+ * 104f (if in read part) or 105f (if in write part), after updating r5
+ */
+        COPY_16_BYTES_EXCODE(0)
+#if L1_CACHE_BYTES >= 32
+        COPY_16_BYTES_EXCODE(1)
+#if L1_CACHE_BYTES >= 64
+        COPY_16_BYTES_EXCODE(2)
+        COPY_16_BYTES_EXCODE(3)
+#if L1_CACHE_BYTES >= 128
+        COPY_16_BYTES_EXCODE(4)
+        COPY_16_BYTES_EXCODE(5)
+        COPY_16_BYTES_EXCODE(6)
+        COPY_16_BYTES_EXCODE(7)
+#endif
+#endif
+#endif
+
+/* read fault in cacheline loop */
+104:    li      r9,0
+        b       92f
+/* fault on dcbz (effectively a write fault) */
+/* or write fault in cacheline loop */
+105:    li      r9,1
+92:     li      r3,LG_CACHELINE_BYTES
+        mfctr   r8
+        add     r0,r0,r8
+        b       106f
+/* read fault in final word loop */
+108:    li      r9,0
+        b       93f
+/* write fault in final word loop */
+109:    li      r9,1
+93:     andi.   r5,r5,3
+        li      r3,2
+        b       99f
+/* read fault in final byte loop */
+110:    li      r9,0
+        b       94f
+/* write fault in final byte loop */
+111:    li      r9,1
+94:     li      r5,0
+        li      r3,0
+/*
+ * At this stage the number of bytes not copied is
+ * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
+ */
+99:     mfctr   r0
+106:    slw     r3,r0,r3
+        add.    r3,r3,r5
+        beq     120f                    /* shouldn't happen */
+        cmpwi   0,r9,0
+        bne     120f
+/* for a read fault, first try to continue the copy one byte at a time */
+        mtctr   r3
+130:    lbz     r0,4(r4)
+131:    stb     r0,4(r6)
+        addi    r4,r4,1
+        addi    r6,r6,1
+        bdnz    130b
+/* then clear out the destination: r3 bytes starting at 4(r6) */
+132:    mfctr   r3
+        srwi.   r0,r3,2
+        li      r9,0
+        mtctr   r0
+        beq     113f
+112:    stwu    r9,4(r6)
+        bdnz    112b
+113:    andi.   r0,r3,3
+        mtctr   r0
+        beq     120f
+114:    stb     r9,4(r6)
+        addi    r6,r6,1
+        bdnz    114b
+120:    blr
+
+        .section __ex_table,"a"
+        .align  2
+        .long   30b,108b
+        .long   31b,109b
+        .long   40b,110b
+        .long   41b,111b
+        .long   130b,132b
+        .long   131b,120b
+        .long   112b,120b
+        .long   114b,120b
+        .text
diff --git a/arch/ppc64/lib/copypage.S b/arch/powerpc/lib/copypage_64.S
index 733d61618bbf..733d61618bbf 100644
--- a/arch/ppc64/lib/copypage.S
+++ b/arch/powerpc/lib/copypage_64.S
diff --git a/arch/ppc64/lib/copyuser.S b/arch/powerpc/lib/copyuser_64.S
index a0b3fbbd6fb1..a0b3fbbd6fb1 100644
--- a/arch/ppc64/lib/copyuser.S
+++ b/arch/powerpc/lib/copyuser_64.S
diff --git a/arch/powerpc/lib/div64.S b/arch/powerpc/lib/div64.S
new file mode 100644
index 000000000000..83d9832fd919
--- /dev/null
+++ b/arch/powerpc/lib/div64.S
@@ -0,0 +1,59 @@
+/*
+ * Divide a 64-bit unsigned number by a 32-bit unsigned number.
+ * This routine assumes that the top 32 bits of the dividend are
+ * non-zero to start with.
+ * On entry, r3 points to the dividend, which get overwritten with
+ * the 64-bit quotient, and r4 contains the divisor.
+ * On exit, r3 contains the remainder.
+ *
+ * Copyright (C) 2002 Paul Mackerras, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <asm/ppc_asm.h>
+#include <asm/processor.h>
+
+_GLOBAL(__div64_32)
+        lwz     r5,0(r3)        # get the dividend into r5/r6
+        lwz     r6,4(r3)
+        cmplw   r5,r4
+        li      r7,0
+        li      r8,0
+        blt     1f
+        divwu   r7,r5,r4        # if dividend.hi >= divisor,
+        mullw   r0,r7,r4        # quotient.hi = dividend.hi / divisor
+        subf.   r5,r0,r5        # dividend.hi %= divisor
+        beq     3f
+1:      mr      r11,r5          # here dividend.hi != 0
+        andis.  r0,r5,0xc000
+        bne     2f
+        cntlzw  r0,r5           # we are shifting the dividend right
+        li      r10,-1          # to make it < 2^32, and shifting
+        srw     r10,r10,r0      # the divisor right the same amount,
+        addc    r9,r4,r10       # rounding up (so the estimate cannot
+        andc    r11,r6,r10      # ever be too large, only too small)
+        andc    r9,r9,r10
+        addze   r9,r9
+        or      r11,r5,r11
+        rotlw   r9,r9,r0
+        rotlw   r11,r11,r0
+        divwu   r11,r11,r9      # then we divide the shifted quantities
+2:      mullw   r10,r11,r4      # to get an estimate of the quotient,
+        mulhwu  r9,r11,r4       # multiply the estimate by the divisor,
+        subfc   r6,r10,r6       # take the product from the divisor,
+        add     r8,r8,r11       # and add the estimate to the accumulated
+        subfe.  r5,r9,r5        # quotient
+        bne     1b
+3:      cmplw   r6,r4
+        blt     4f
+        divwu   r0,r6,r4        # perform the remaining 32-bit division
+        mullw   r10,r0,r4       # and get the remainder
+        add     r8,r8,r0
+        subf    r6,r10,r6
+4:      stw     r7,0(r3)        # return the quotient in *r3
+        stw     r8,4(r3)
+        mr      r3,r6           # return the remainder in r3
+        blr
diff --git a/arch/ppc64/lib/e2a.c b/arch/powerpc/lib/e2a.c
index d2b834887920..d2b834887920 100644
--- a/arch/ppc64/lib/e2a.c
+++ b/arch/powerpc/lib/e2a.c
diff --git a/arch/ppc64/lib/locks.c b/arch/powerpc/lib/locks.c
index 033643ab69e0..3794715b2972 100644
--- a/arch/ppc64/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -17,11 +17,12 @@
 #include <linux/spinlock.h>
 #include <linux/module.h>
 #include <linux/stringify.h>
-#include <asm/hvcall.h>
-#include <asm/iSeries/HvCall.h>
+#include <linux/smp.h>
 
 /* waiting for a spinlock... */
 #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES)
+#include <asm/hvcall.h>
+#include <asm/iSeries/HvCall.h>
 
 void __spin_yield(raw_spinlock_t *lock)
 {
diff --git a/arch/powerpc/lib/mem_64.S b/arch/powerpc/lib/mem_64.S
new file mode 100644
index 000000000000..68df20283ff5
--- /dev/null
+++ b/arch/powerpc/lib/mem_64.S
@@ -0,0 +1,119 @@
+/*
+ * String handling functions for PowerPC.
+ *
+ * Copyright (C) 1996 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <asm/processor.h>
+#include <asm/errno.h>
+#include <asm/ppc_asm.h>
+
+_GLOBAL(memset)
+        neg     r0,r3
+        rlwimi  r4,r4,8,16,23
+        andi.   r0,r0,7                 /* # bytes to be 8-byte aligned */
+        rlwimi  r4,r4,16,0,15
+        cmplw   cr1,r5,r0               /* do we get that far? */
+        rldimi  r4,r4,32,0
+        mtcrf   1,r0
+        mr      r6,r3
+        blt     cr1,8f
+        beq+    3f                      /* if already 8-byte aligned */
+        subf    r5,r0,r5
+        bf      31,1f
+        stb     r4,0(r6)
+        addi    r6,r6,1
+1:      bf      30,2f
+        sth     r4,0(r6)
+        addi    r6,r6,2
+2:      bf      29,3f
+        stw     r4,0(r6)
+        addi    r6,r6,4
+3:      srdi.   r0,r5,6
+        clrldi  r5,r5,58
+        mtctr   r0
+        beq     5f
+4:      std     r4,0(r6)
+        std     r4,8(r6)
+        std     r4,16(r6)
+        std     r4,24(r6)
+        std     r4,32(r6)
+        std     r4,40(r6)
+        std     r4,48(r6)
+        std     r4,56(r6)
+        addi    r6,r6,64
+        bdnz    4b
+5:      srwi.   r0,r5,3
+        clrlwi  r5,r5,29
+        mtcrf   1,r0
+        beq     8f
+        bf      29,6f
+        std     r4,0(r6)
+        std     r4,8(r6)
+        std     r4,16(r6)
+        std     r4,24(r6)
+        addi    r6,r6,32
+6:      bf      30,7f
+        std     r4,0(r6)
+        std     r4,8(r6)
+        addi    r6,r6,16
+7:      bf      31,8f
+        std     r4,0(r6)
+        addi    r6,r6,8
+8:      cmpwi   r5,0
+        mtcrf   1,r5
+        beqlr+
+        bf      29,9f
+        stw     r4,0(r6)
+        addi    r6,r6,4
+9:      bf      30,10f
+        sth     r4,0(r6)
+        addi    r6,r6,2
+10:     bflr    31
+        stb     r4,0(r6)
+        blr
+
+_GLOBAL(memmove)
+        cmplw   0,r3,r4
+        bgt     .backwards_memcpy
+        b       .memcpy
+
+_GLOBAL(backwards_memcpy)
+        rlwinm. r7,r5,32-3,3,31         /* r0 = r5 >> 3 */
+        add     r6,r3,r5
+        add     r4,r4,r5
+        beq     2f
+        andi.   r0,r6,3
+        mtctr   r7
+        bne     5f
+1:      lwz     r7,-4(r4)
+        lwzu    r8,-8(r4)
+        stw     r7,-4(r6)
+        stwu    r8,-8(r6)
+        bdnz    1b
+        andi.   r5,r5,7
+2:      cmplwi  0,r5,4
+        blt     3f
+        lwzu    r0,-4(r4)
+        subi    r5,r5,4
+        stwu    r0,-4(r6)
+3:      cmpwi   0,r5,0
+        beqlr
+        mtctr   r5
+4:      lbzu    r0,-1(r4)
+        stbu    r0,-1(r6)
+        bdnz    4b
+        blr
+5:      mtctr   r0
+6:      lbzu    r7,-1(r4)
+        stbu    r7,-1(r6)
+        bdnz    6b
+        subf    r5,r0,r5
+        rlwinm. r7,r5,32-3,3,31
+        beq     2b
+        mtctr   r7
+        b       1b
diff --git a/arch/ppc64/lib/memcpy.S b/arch/powerpc/lib/memcpy_64.S
index 9ccacdf5bcb9..9ccacdf5bcb9 100644
--- a/arch/ppc64/lib/memcpy.S
+++ b/arch/powerpc/lib/memcpy_64.S
diff --git a/arch/powerpc/lib/rheap.c b/arch/powerpc/lib/rheap.c
new file mode 100644
index 000000000000..42c5de2c898f
--- /dev/null
+++ b/arch/powerpc/lib/rheap.c
@@ -0,0 +1,693 @@
+/*
+ * arch/ppc/syslib/rheap.c
+ *
+ * A Remote Heap.  Remote means that we don't touch the memory that the
+ * heap points to. Normal heap implementations use the memory they manage
+ * to place their list. We cannot do that because the memory we manage may
+ * have special properties, for example it is uncachable or of different
+ * endianess.
+ *
+ * Author: Pantelis Antoniou <panto@intracom.gr>
+ *
+ * 2004 (c) INTRACOM S.A. Greece. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+
+#include <asm/rheap.h>
+
+/*
+ * Fixup a list_head, needed when copying lists.  If the pointers fall
+ * between s and e, apply the delta.  This assumes that
+ * sizeof(struct list_head *) == sizeof(unsigned long *).
+ */
+static inline void fixup(unsigned long s, unsigned long e, int d,
+                         struct list_head *l)
+{
+        unsigned long *pp;
+
+        pp = (unsigned long *)&l->next;
+        if (*pp >= s && *pp < e)
+                *pp += d;
+
+        pp = (unsigned long *)&l->prev;
+        if (*pp >= s && *pp < e)
+                *pp += d;
+}
+
+/* Grow the allocated blocks */
+static int grow(rh_info_t * info, int max_blocks)
+{
+        rh_block_t *block, *blk;
+        int i, new_blocks;
+        int delta;
+        unsigned long blks, blke;
+
+        if (max_blocks <= info->max_blocks)
+                return -EINVAL;
+
+        new_blocks = max_blocks - info->max_blocks;
+
+        block = kmalloc(sizeof(rh_block_t) * max_blocks, GFP_KERNEL);
+        if (block == NULL)
+                return -ENOMEM;
+
+        if (info->max_blocks > 0) {
+
+                /* copy old block area */
+                memcpy(block, info->block,
+                       sizeof(rh_block_t) * info->max_blocks);
+
+                delta = (char *)block - (char *)info->block;
+
+                /* and fixup list pointers */
+                blks = (unsigned long)info->block;
+                blke = (unsigned long)(info->block + info->max_blocks);
+
+                for (i = 0, blk = block; i < info->max_blocks; i++, blk++)
+                        fixup(blks, blke, delta, &blk->list);
+
+                fixup(blks, blke, delta, &info->empty_list);
+                fixup(blks, blke, delta, &info->free_list);
+                fixup(blks, blke, delta, &info->taken_list);
+
+                /* free the old allocated memory */
+                if ((info->flags & RHIF_STATIC_BLOCK) == 0)
+                        kfree(info->block);
+        }
+
+        info->block = block;
+        info->empty_slots += new_blocks;
+        info->max_blocks = max_blocks;
+        info->flags &= ~RHIF_STATIC_BLOCK;
+
+        /* add all new blocks to the free list */
+        for (i = 0, blk = block + info->max_blocks; i < new_blocks; i++, blk++)
+                list_add(&blk->list, &info->empty_list);
+
+        return 0;
+}
+
+/*
+ * Assure at least the required amount of empty slots.  If this function
+ * causes a grow in the block area then all pointers kept to the block
+ * area are invalid!
+ */
+static int assure_empty(rh_info_t * info, int slots)
+{
+        int max_blocks;
+
+        /* This function is not meant to be used to grow uncontrollably */
+        if (slots >= 4)
+                return -EINVAL;
+
+        /* Enough space */
+        if (info->empty_slots >= slots)
+                return 0;
+
+        /* Next 16 sized block */
+        max_blocks = ((info->max_blocks + slots) + 15) & ~15;
+
+        return grow(info, max_blocks);
+}
+
+static rh_block_t *get_slot(rh_info_t * info)
+{
+        rh_block_t *blk;
+
+        /* If no more free slots, and failure to extend. */
+        /* XXX: You should have called assure_empty before */
+        if (info->empty_slots == 0) {
+                printk(KERN_ERR "rh: out of slots; crash is imminent.\n");
+                return NULL;
+        }
+
+        /* Get empty slot to use */
+        blk = list_entry(info->empty_list.next, rh_block_t, list);
+        list_del_init(&blk->list);
+        info->empty_slots--;
+
+        /* Initialize */
+        blk->start = NULL;
+        blk->size = 0;
+        blk->owner = NULL;
+
+        return blk;
+}
+
+static inline void release_slot(rh_info_t * info, rh_block_t * blk)
+{
+        list_add(&blk->list, &info->empty_list);
+        info->empty_slots++;
+}
+
+static void attach_free_block(rh_info_t * info, rh_block_t * blkn)
+{
+        rh_block_t *blk;
+        rh_block_t *before;
+        rh_block_t *after;
+        rh_block_t *next;
+        int size;
+        unsigned long s, e, bs, be;
+        struct list_head *l;
+
+        /* We assume that they are aligned properly */
+        size = blkn->size;
+        s = (unsigned long)blkn->start;
+        e = s + size;
+
+        /* Find the blocks immediately before and after the given one
+         * (if any) */
+        before = NULL;
+        after = NULL;
+        next = NULL;
+
+        list_for_each(l, &info->free_list) {
+                blk = list_entry(l, rh_block_t, list);
+
+                bs = (unsigned long)blk->start;
+                be = bs + blk->size;
+
+                if (next == NULL && s >= bs)
+                        next = blk;
+
+                if (be == s)
+                        before = blk;
+
+                if (e == bs)
+                        after = blk;
+
+                /* If both are not null, break now */
+                if (before != NULL && after != NULL)
+                        break;
+        }
+
+        /* Now check if they are really adjacent */
+        if (before != NULL && s != (unsigned long)before->start + before->size)
+                before = NULL;
+
+        if (after != NULL && e != (unsigned long)after->start)
+                after = NULL;
+
+        /* No coalescing; list insert and return */
+        if (before == NULL && after == NULL) {
+
+                if (next != NULL)
+                        list_add(&blkn->list, &next->list);
+                else
+                        list_add(&blkn->list, &info->free_list);
+
+                return;
+        }
+
+        /* We don't need it anymore */
+        release_slot(info, blkn);
+
+        /* Grow the before block */
+        if (before != NULL && after == NULL) {
+                before->size += size;
+                return;
+        }
+
+        /* Grow the after block backwards */
+        if (before == NULL && after != NULL) {
+                after->start = (int8_t *)after->start - size;
+                after->size += size;
+                return;
+        }
+
+        /* Grow the before block, and release the after block */
+        before->size += size + after->size;
+        list_del(&after->list);
+        release_slot(info, after);
+}
+
+static void attach_taken_block(rh_info_t * info, rh_block_t * blkn)
+{
+        rh_block_t *blk;
+        struct list_head *l;
+
+        /* Find the block immediately before the given one (if any) */
+        list_for_each(l, &info->taken_list) {
+                blk = list_entry(l, rh_block_t, list);
+                if (blk->start > blkn->start) {
+                        list_add_tail(&blkn->list, &blk->list);
+                        return;
+                }
+        }
+
+        list_add_tail(&blkn->list, &info->taken_list);
+}
+
+/*
+ * Create a remote heap dynamically.  Note that no memory for the blocks
+ * are allocated.  It will upon the first allocation
+ */
+rh_info_t *rh_create(unsigned int alignment)
+{
+        rh_info_t *info;
+
+        /* Alignment must be a power of two */
+        if ((alignment & (alignment - 1)) != 0)
+                return ERR_PTR(-EINVAL);
+
+        info = kmalloc(sizeof(*info), GFP_KERNEL);
+        if (info == NULL)
+                return ERR_PTR(-ENOMEM);
+
+        info->alignment = alignment;
+
+        /* Initially everything as empty */
+        info->block = NULL;
+        info->max_blocks = 0;
+        info->empty_slots = 0;
+        info->flags = 0;
+
+        INIT_LIST_HEAD(&info->empty_list);
+        INIT_LIST_HEAD(&info->free_list);
+        INIT_LIST_HEAD(&info->taken_list);
+
+        return info;
+}
+
+/*
+ * Destroy a dynamically created remote heap.  Deallocate only if the areas
+ * are not static
+ */
+void rh_destroy(rh_info_t * info)
+{
+        if ((info->flags & RHIF_STATIC_BLOCK) == 0 && info->block != NULL)
+                kfree(info->block);
+
+        if ((info->flags & RHIF_STATIC_INFO) == 0)
+                kfree(info);
+}
+
+/*
+ * Initialize in place a remote heap info block.  This is needed to support
+ * operation very early in the startup of the kernel, when it is not yet safe
+ * to call kmalloc.
+ */
+void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks,
+             rh_block_t * block)
+{
+        int i;
+        rh_block_t *blk;
+
+        /* Alignment must be a power of two */
+        if ((alignment & (alignment - 1)) != 0)
+                return;
+
+        info->alignment = alignment;
+
+        /* Initially everything as empty */
+        info->block = block;
+        info->max_blocks = max_blocks;
+        info->empty_slots = max_blocks;
+        info->flags = RHIF_STATIC_INFO | RHIF_STATIC_BLOCK;
+
+        INIT_LIST_HEAD(&info->empty_list);
+        INIT_LIST_HEAD(&info->free_list);
+        INIT_LIST_HEAD(&info->taken_list);
+
+        /* Add all new blocks to the free list */
+        for (i = 0, blk = block; i < max_blocks; i++, blk++)
+                list_add(&blk->list, &info->empty_list);
+}
+
+/* Attach a free memory region, coalesces regions if adjuscent */
+int rh_attach_region(rh_info_t * info, void *start, int size)
+{
+        rh_block_t *blk;
+        unsigned long s, e, m;
+        int r;
+
+        /* The region must be aligned */
+        s = (unsigned long)start;
+        e = s + size;
+        m = info->alignment - 1;
+
+        /* Round start up */
+        s = (s + m) & ~m;
+
+        /* Round end down */
+        e = e & ~m;
+
+        /* Take final values */
+        start = (void *)s;
+        size = (int)(e - s);
+
+        /* Grow the blocks, if needed */
+        r = assure_empty(info, 1);
+        if (r < 0)
+                return r;
+
+        blk = get_slot(info);
+        blk->start = start;
+        blk->size = size;
+        blk->owner = NULL;
+
+        attach_free_block(info, blk);
+
+        return 0;
+}
+
+/* Detatch given address range, splits free block if needed. */
+void *rh_detach_region(rh_info_t * info, void *start, int size)
+{
+        struct list_head *l;
+        rh_block_t *blk, *newblk;
+        unsigned long s, e, m, bs, be;
+
+        /* Validate size */
+        if (size <= 0)
+                return ERR_PTR(-EINVAL);
+
+        /* The region must be aligned */
+        s = (unsigned long)start;
+        e = s + size;
+        m = info->alignment - 1;
+
+        /* Round start up */
+        s = (s + m) & ~m;
+
+        /* Round end down */
+        e = e & ~m;
+
+        if (assure_empty(info, 1) < 0)
+                return ERR_PTR(-ENOMEM);
+
+        blk = NULL;
+        list_for_each(l, &info->free_list) {
+                blk = list_entry(l, rh_block_t, list);
+                /* The range must lie entirely inside one free block */
+                bs = (unsigned long)blk->start;
+                be = (unsigned long)blk->start + blk->size;
+                if (s >= bs && e <= be)
+                        break;
+                blk = NULL;
+        }
+
+        if (blk == NULL)
+                return ERR_PTR(-ENOMEM);
+
+        /* Perfect fit */
+        if (bs == s && be == e) {
+                /* Delete from free list, release slot */
+                list_del(&blk->list);
+                release_slot(info, blk);
+                return (void *)s;
+        }
+
+        /* blk still in free list, with updated start and/or size */
+        if (bs == s || be == e) {
+                if (bs == s)
+                        blk->start = (int8_t *)blk->start + size;
+                blk->size -= size;
+
+        } else {
+                /* The front free fragment */
+                blk->size = s - bs;
+
+                /* the back free fragment */
+                newblk = get_slot(info);
+                newblk->start = (void *)e;
+                newblk->size = be - e;
+
+                list_add(&newblk->list, &blk->list);
+        }
+
+        return (void *)s;
+}
+
+void *rh_alloc(rh_info_t * info, int size, const char *owner)
+{
+        struct list_head *l;
+        rh_block_t *blk;
+        rh_block_t *newblk;
+        void *start;
+
+        /* Validate size */
+        if (size <= 0)
+                return ERR_PTR(-EINVAL);
+
+        /* Align to configured alignment */
+        size = (size + (info->alignment - 1)) & ~(info->alignment - 1);
+
+        if (assure_empty(info, 1) < 0)
+                return ERR_PTR(-ENOMEM);
+
+        blk = NULL;
+        list_for_each(l, &info->free_list) {
+                blk = list_entry(l, rh_block_t, list);
+                if (size <= blk->size)
+                        break;
+                blk = NULL;
+        }
+
+        if (blk == NULL)
+                return ERR_PTR(-ENOMEM);
+
+        /* Just fits */
+        if (blk->size == size) {
+                /* Move from free list to taken list */
+                list_del(&blk->list);
+                blk->owner = owner;
+                start = blk->start;
+
+                attach_taken_block(info, blk);
+
+                return start;
+        }
+
+        newblk = get_slot(info);
+        newblk->start = blk->start;
+        newblk->size = size;
+        newblk->owner = owner;
+
+        /* blk still in free list, with updated start, size */
+        blk->start = (int8_t *)blk->start + size;
+        blk->size -= size;
+
+        start = newblk->start;
+
+        attach_taken_block(info, newblk);
+
+        return start;
+}
+
+/* allocate at precisely the given address */
+void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
+{
+        struct list_head *l;
+        rh_block_t *blk, *newblk1, *newblk2;
+        unsigned long s, e, m, bs, be;
+
+        /* Validate size */
+        if (size <= 0)
+                return ERR_PTR(-EINVAL);
+
+        /* The region must be aligned */
+        s = (unsigned long)start;
+        e = s + size;
+        m = info->alignment - 1;
+
+        /* Round start up */
+        s = (s + m) & ~m;
+
+        /* Round end down */
+        e = e & ~m;
+
+        if (assure_empty(info, 2) < 0)
+                return ERR_PTR(-ENOMEM);
+
+        blk = NULL;
+        list_for_each(l, &info->free_list) {
+                blk = list_entry(l, rh_block_t, list);
+                /* The range must lie entirely inside one free block */
+                bs = (unsigned long)blk->start;
+                be = (unsigned long)blk->start + blk->size;
+                if (s >= bs && e <= be)
+                        break;
+        }
+
+        if (blk == NULL)
+                return ERR_PTR(-ENOMEM);
+
+        /* Perfect fit */
+        if (bs == s && be == e) {
+                /* Move from free list to taken list */
+                list_del(&blk->list);
+                blk->owner = owner;
+
+                start = blk->start;
+                attach_taken_block(info, blk);
+
+                return start;
+
+        }
+
+        /* blk still in free list, with updated start and/or size */
+        if (bs == s || be == e) {
+                if (bs == s)
+                        blk->start = (int8_t *)blk->start + size;
+                blk->size -= size;
+
+        } else {
+                /* The front free fragment */
+                blk->size = s - bs;
+
+                /* The back free fragment */
+                newblk2 = get_slot(info);
+                newblk2->start = (void *)e;
+                newblk2->size = be - e;
+
+                list_add(&newblk2->list, &blk->list);
+        }
+
+        newblk1 = get_slot(info);
+        newblk1->start = (void *)s;
+        newblk1->size = e - s;
+        newblk1->owner = owner;
+
+        start = newblk1->start;
+        attach_taken_block(info, newblk1);
+
+        return start;
+}
+
+int rh_free(rh_info_t * info, void *start)
+{
+        rh_block_t *blk, *blk2;
+        struct list_head *l;
+        int size;
+
+        /* Linear search for block */
+        blk = NULL;
+        list_for_each(l, &info->taken_list) {
+                blk2 = list_entry(l, rh_block_t, list);
+                if (start < blk2->start)
+                        break;
+                blk = blk2;
+        }
+
+        if (blk == NULL || start > (blk->start + blk->size))
+                return -EINVAL;
+
+        /* Remove from taken list */
+        list_del(&blk->list);
+
+        /* Get size of freed block */
+        size = blk->size;
+        attach_free_block(info, blk);
+
+        return size;
+}
+
+int rh_get_stats(rh_info_t * info, int what, int max_stats, rh_stats_t * stats)
+{
+        rh_block_t *blk;
+        struct list_head *l;
+        struct list_head *h;
+        int nr;
+
+        switch (what) {
+
+        case RHGS_FREE:
+                h = &info->free_list;
+                break;
+
+        case RHGS_TAKEN:
+                h = &info->taken_list;
+                break;
+
+        default:
+                return -EINVAL;
+        }
+
+        /* Linear search for block */
+        nr = 0;
+        list_for_each(l, h) {
+                blk = list_entry(l, rh_block_t, list);
+                if (stats != NULL && nr < max_stats) {
+                        stats->start = blk->start;
+                        stats->size = blk->size;
+                        stats->owner = blk->owner;
+                        stats++;
+                }
+                nr++;
+        }
+
+        return nr;
+}
+
+int rh_set_owner(rh_info_t * info, void *start, const char *owner)
+{
+        rh_block_t *blk, *blk2;
+        struct list_head *l;
+        int size;
+
+        /* Linear search for block */
+        blk = NULL;
+        list_for_each(l, &info->taken_list) {
+                blk2 = list_entry(l, rh_block_t, list);
+                if (start < blk2->start)
+                        break;
+                blk = blk2;
+        }
+
+        if (blk == NULL || start > (blk->start + blk->size))
+                return -EINVAL;
+
+        blk->owner = owner;
+        size = blk->size;
+
+        return size;
+}
+
+void rh_dump(rh_info_t * info)
+{
+        static rh_stats_t st[32];       /* XXX maximum 32 blocks */
+        int maxnr;
+        int i, nr;
+
+        maxnr = sizeof(st) / sizeof(st[0]);
+
+        printk(KERN_INFO
+               "info @0x%p (%d slots empty / %d max)\n",
+               info, info->empty_slots, info->max_blocks);
+
+        printk(KERN_INFO "  Free:\n");
+        nr = rh_get_stats(info, RHGS_FREE, maxnr, st);
+        if (nr > maxnr)
+                nr = maxnr;
+        for (i = 0; i < nr; i++)
+                printk(KERN_INFO
+                       "    0x%p-0x%p (%u)\n",
+                       st[i].start, (int8_t *) st[i].start + st[i].size,
+                       st[i].size);
+        printk(KERN_INFO "\n");
+
+        printk(KERN_INFO "  Taken:\n");
+        nr = rh_get_stats(info, RHGS_TAKEN, maxnr, st);
+        if (nr > maxnr)
+                nr = maxnr;
+        for (i = 0; i < nr; i++)
+                printk(KERN_INFO
+                       "    0x%p-0x%p (%u) %s\n",
+                       st[i].start, (int8_t *) st[i].start + st[i].size,
+                       st[i].size, st[i].owner != NULL ? st[i].owner : "");
+        printk(KERN_INFO "\n");
+}
+
+void rh_dump_blk(rh_info_t * info, rh_block_t * blk)
+{
+        printk(KERN_INFO
+               "blk @0x%p: 0x%p-0x%p (%u)\n",
+               blk, blk->start, (int8_t *) blk->start + blk->size, blk->size);
+}
diff --git a/arch/ppc64/lib/sstep.c b/arch/powerpc/lib/sstep.c
index e79123d1485c..666c2aa55016 100644
--- a/arch/ppc64/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -10,13 +10,18 @@
  */
 #include <linux/kernel.h>
 #include <linux/ptrace.h>
+#include <linux/config.h>
 #include <asm/sstep.h>
 #include <asm/processor.h>
 
 extern char system_call_common[];
 
+#ifdef CONFIG_PPC64
 /* Bits in SRR1 that are copied from MSR */
 #define MSR_MASK        0xffffffff87c0ffff
+#else
+#define MSR_MASK        0x87c0ffff
+#endif
 
 /*
  * Determine whether a conditional branch instruction would branch.
@@ -66,6 +71,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
                 if (branch_taken(instr, regs))
                         regs->nip = imm;
                 return 1;
+#ifdef CONFIG_PPC64
         case 17:        /* sc */
                 /*
                  * N.B. this uses knowledge about how the syscall
@@ -79,6 +85,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
                 regs->nip = (unsigned long) &system_call_common;
                 regs->msr = MSR_KERNEL;
                 return 1;
+#endif
         case 18:        /* b */
                 imm = instr & 0x03fffffc;
                 if (imm & 0x02000000)
@@ -121,6 +128,15 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
                         if ((regs->msr & MSR_SF) == 0)
                                 regs->nip &= 0xffffffffUL;
                         return 1;
+                case 0x124:     /* mtmsr */
+                        imm = regs->gpr[rd];
+                        if ((imm & MSR_RI) == 0)
+                                /* can't step mtmsr that would clear MSR_RI */
+                                return -1;
+                        regs->msr = imm;
+                        regs->nip += 4;
+                        return 1;
+#ifdef CONFIG_PPC64
                 case 0x164:     /* mtmsrd */
                         /* only MSR_EE and MSR_RI get changed if bit 15 set */
                         /* mtmsrd doesn't change MSR_HV and MSR_ME */
@@ -135,6 +151,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
                         if ((imm & MSR_SF) == 0)
                                 regs->nip &= 0xffffffffUL;
                         return 1;
+#endif
                 }
         }
         return 0;
diff --git a/arch/ppc64/lib/strcase.c b/arch/powerpc/lib/strcase.c
index e84f243368c0..36b521091bbc 100644
--- a/arch/ppc64/lib/strcase.c
+++ b/arch/powerpc/lib/strcase.c
@@ -1,11 +1,3 @@
-/*
- * c 2001 PPC 64 Team, IBM Corp
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- */
 #include <linux/ctype.h>
 
 int strcasecmp(const char *s1, const char *s2)
diff --git a/arch/powerpc/lib/string.S b/arch/powerpc/lib/string.S
new file mode 100644
index 000000000000..b9ca84ed8927
--- /dev/null
+++ b/arch/powerpc/lib/string.S
@@ -0,0 +1,198 @@
+/*
+ * String handling functions for PowerPC.
+ *
+ * Copyright (C) 1996 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/errno.h>
+#include <asm/ppc_asm.h>
+
+        .section __ex_table,"a"
+#ifdef CONFIG_PPC64
+        .align  3
+#define EXTBL   .llong
+#else
+        .align  2
+#define EXTBL   .long
+#endif
+        .text
+        
+_GLOBAL(strcpy)
+        addi    r5,r3,-1
+        addi    r4,r4,-1
+1:      lbzu    r0,1(r4)
+        cmpwi   0,r0,0
+        stbu    r0,1(r5)
+        bne     1b
+        blr
+
+/* This clears out any unused part of the destination buffer,
+   just as the libc version does.  -- paulus */
+_GLOBAL(strncpy)
+        cmpwi   0,r5,0
+        beqlr
+        mtctr   r5
+        addi    r6,r3,-1
+        addi    r4,r4,-1
+1:      lbzu    r0,1(r4)
+        cmpwi   0,r0,0
+        stbu    r0,1(r6)
+        bdnzf   2,1b            /* dec ctr, branch if ctr != 0 && !cr0.eq */
+        bnelr                   /* if we didn't hit a null char, we're done */
+        mfctr   r5
+        cmpwi   0,r5,0          /* any space left in destination buffer? */
+        beqlr                   /* we know r0 == 0 here */
+2:      stbu    r0,1(r6)        /* clear it out if so */
+        bdnz    2b
+        blr
+
+_GLOBAL(strcat)
+        addi    r5,r3,-1
+        addi    r4,r4,-1
+1:      lbzu    r0,1(r5)
+        cmpwi   0,r0,0
+        bne     1b
+        addi    r5,r5,-1
+1:      lbzu    r0,1(r4)
+        cmpwi   0,r0,0
+        stbu    r0,1(r5)
+        bne     1b
+        blr
+
+_GLOBAL(strcmp)
+        addi    r5,r3,-1
+        addi    r4,r4,-1
+1:      lbzu    r3,1(r5)
+        cmpwi   1,r3,0
+        lbzu    r0,1(r4)
+        subf.   r3,r0,r3
+        beqlr   1
+        beq     1b
+        blr
+
+_GLOBAL(strlen)
+        addi    r4,r3,-1
+1:      lbzu    r0,1(r4)
+        cmpwi   0,r0,0
+        bne     1b
+        subf    r3,r3,r4
+        blr
+
+_GLOBAL(memcmp)
+        cmpwi   0,r5,0
+        ble-    2f
+        mtctr   r5
+        addi    r6,r3,-1
+        addi    r4,r4,-1
+1:      lbzu    r3,1(r6)
+        lbzu    r0,1(r4)
+        subf.   r3,r0,r3
+        bdnzt   2,1b
+        blr
+2:      li      r3,0
+        blr
+
+_GLOBAL(memchr)
+        cmpwi   0,r5,0
+        ble-    2f
+        mtctr   r5
+        addi    r3,r3,-1
+1:      lbzu    r0,1(r3)
+        cmpw    0,r0,r4
+        bdnzf   2,1b
+        beqlr
+2:      li      r3,0
+        blr
+
+_GLOBAL(__clear_user)
+        addi    r6,r3,-4
+        li      r3,0
+        li      r5,0
+        cmplwi  0,r4,4
+        blt     7f
+        /* clear a single word */
+11:     stwu    r5,4(r6)
+        beqlr
+        /* clear word sized chunks */
+        andi.   r0,r6,3
+        add     r4,r0,r4
+        subf    r6,r0,r6
+        srwi    r0,r4,2
+        andi.   r4,r4,3
+        mtctr   r0
+        bdz     7f
+1:      stwu    r5,4(r6)
+        bdnz    1b
+        /* clear byte sized chunks */
+7:      cmpwi   0,r4,0
+        beqlr
+        mtctr   r4
+        addi    r6,r6,3
+8:      stbu    r5,1(r6)
+        bdnz    8b
+        blr
+90:     mr      r3,r4
+        blr
+91:     mfctr   r3
+        slwi    r3,r3,2
+        add     r3,r3,r4
+        blr
+92:     mfctr   r3
+        blr
+
+        .section __ex_table,"a"
+        EXTBL   11b,90b
+        EXTBL   1b,91b
+        EXTBL   8b,92b
+        .text
+
+_GLOBAL(__strncpy_from_user)
+        addi    r6,r3,-1
+        addi    r4,r4,-1
+        cmpwi   0,r5,0
+        beq     2f
+        mtctr   r5
+1:      lbzu    r0,1(r4)
+        cmpwi   0,r0,0
+        stbu    r0,1(r6)
+        bdnzf   2,1b            /* dec ctr, branch if ctr != 0 && !cr0.eq */
+        beq     3f
+2:      addi    r6,r6,1
+3:      subf    r3,r3,r6
+        blr
+99:     li      r3,-EFAULT
+        blr
+
+        .section __ex_table,"a"
+        EXTBL   1b,99b
+        .text
+
+/* r3 = str, r4 = len (> 0), r5 = top (highest addr) */
+_GLOBAL(__strnlen_user)
+        addi    r7,r3,-1
+        subf    r6,r7,r5        /* top+1 - str */
+        cmplw   0,r4,r6
+        bge     0f
+        mr      r6,r4
+0:      mtctr   r6              /* ctr = min(len, top - str) */
+1:      lbzu    r0,1(r7)        /* get next byte */
+        cmpwi   0,r0,0
+        bdnzf   2,1b            /* loop if --ctr != 0 && byte != 0 */
+        addi    r7,r7,1
+        subf    r3,r3,r7        /* number of bytes we have looked at */
+        beqlr                   /* return if we found a 0 byte */
+        cmpw    0,r3,r4         /* did we look at all len bytes? */
+        blt     99f             /* if not, must have hit top */
+        addi    r3,r4,1         /* return len + 1 to indicate no null found */
+        blr
+99:     li      r3,0            /* bad address, return 0 */
+        blr
+
+        .section __ex_table,"a"
+        EXTBL   1b,99b
diff --git a/arch/ppc64/lib/usercopy.c b/arch/powerpc/lib/usercopy_64.c
index 5eea6f3c1e03..5eea6f3c1e03 100644
--- a/arch/ppc64/lib/usercopy.c
+++ b/arch/powerpc/lib/usercopy_64.c
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
new file mode 100644
index 000000000000..3d79ce281b67
--- /dev/null
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -0,0 +1,120 @@
+/*
+ * Modifications by Matt Porter (mporter@mvista.com) to support
+ * PPC44x Book E processors.
+ *
+ * This file contains the routines for initializing the MMU
+ * on the 4xx series of chips.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/stddef.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/highmem.h>
+
+#include <asm/pgalloc.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/uaccess.h>
+#include <asm/smp.h>
+#include <asm/bootx.h>
+#include <asm/machdep.h>
+#include <asm/setup.h>
+
+#include "mmu_decl.h"
+
+extern char etext[], _stext[];
+
+/* Used by the 44x TLB replacement exception handler.
+ * Just needed it declared someplace.
+ */
+unsigned int tlb_44x_index = 0;
+unsigned int tlb_44x_hwater = 62;
+
+/*
+ * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
+ */
+static void __init
+ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
+{
+        unsigned long attrib = 0;
+
+        __asm__ __volatile__("\
+        clrrwi  %2,%2,10\n\
+        ori     %2,%2,%4\n\
+        clrrwi  %1,%1,10\n\
+        li      %0,0\n\
+        ori     %0,%0,%5\n\
+        tlbwe   %2,%3,%6\n\
+        tlbwe   %1,%3,%7\n\
+        tlbwe   %0,%3,%8"
+        :
+        : "r" (attrib), "r" (phys), "r" (virt), "r" (slot),
+          "i" (PPC44x_TLB_VALID | PPC44x_TLB_256M),
+          "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
+          "i" (PPC44x_TLB_PAGEID),
+          "i" (PPC44x_TLB_XLAT),
+          "i" (PPC44x_TLB_ATTRIB));
+}
+
+/*
+ * MMU_init_hw does the chip-specific initialization of the MMU hardware.
+ */
+void __init MMU_init_hw(void)
+{
+        flush_instruction_cache();
+}
+
+unsigned long __init mmu_mapin_ram(void)
+{
+        unsigned int pinned_tlbs = 1;
+        int i;
+
+        /* Determine number of entries necessary to cover lowmem */
+        pinned_tlbs = (unsigned int)
+                (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT);
+
+        /* Write upper watermark to save location */
+        tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
+
+        /* If necessary, set additional pinned TLBs */
+        if (pinned_tlbs > 1)
+                for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
+                        unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
+                        ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
+                }
+
+        return total_lowmem;
+}
diff --git a/arch/powerpc/mm/4xx_mmu.c b/arch/powerpc/mm/4xx_mmu.c
new file mode 100644
index 000000000000..b7bcbc232f39
--- /dev/null
+++ b/arch/powerpc/mm/4xx_mmu.c
@@ -0,0 +1,141 @@
+/*
+ * This file contains the routines for initializing the MMU
+ * on the 4xx series of chips.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/stddef.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/highmem.h>
+
+#include <asm/pgalloc.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/uaccess.h>
+#include <asm/smp.h>
+#include <asm/bootx.h>
+#include <asm/machdep.h>
+#include <asm/setup.h>
+#include "mmu_decl.h"
+
+extern int __map_without_ltlbs;
+/*
+ * MMU_init_hw does the chip-specific initialization of the MMU hardware.
+ */
+void __init MMU_init_hw(void)
+{
+        /*
+         * The Zone Protection Register (ZPR) defines how protection will
+         * be applied to every page which is a member of a given zone. At
+         * present, we utilize only two of the 4xx's zones.
+         * The zone index bits (of ZSEL) in the PTE are used for software
+         * indicators, except the LSB.  For user access, zone 1 is used,
+         * for kernel access, zone 0 is used.  We set all but zone 1
+         * to zero, allowing only kernel access as indicated in the PTE.
+         * For zone 1, we set a 01 binary (a value of 10 will not work)
+         * to allow user access as indicated in the PTE.  This also allows
+         * kernel access as indicated in the PTE.
+         */
+
+        mtspr(SPRN_ZPR, 0x10000000);
+
+        flush_instruction_cache();
+
+        /*
+         * Set up the real-mode cache parameters for the exception vector
+         * handlers (which are run in real-mode).
+         */
+
+        mtspr(SPRN_DCWR, 0x00000000);   /* All caching is write-back */
+
+        /*
+         * Cache instruction and data space where the exception
+         * vectors and the kernel live in real-mode.
+         */
+
+        mtspr(SPRN_DCCR, 0xF0000000);   /* 512 MB of data space at 0x0. */
+        mtspr(SPRN_ICCR, 0xF0000000);   /* 512 MB of instr. space at 0x0. */
+}
+
+#define LARGE_PAGE_SIZE_16M     (1<<24)
+#define LARGE_PAGE_SIZE_4M      (1<<22)
+
+unsigned long __init mmu_mapin_ram(void)
+{
+        unsigned long v, s;
+        phys_addr_t p;
+
+        v = KERNELBASE;
+        p = PPC_MEMSTART;
+        s = 0;
+
+        if (__map_without_ltlbs) {
+                return s;
+        }
+
+        while (s <= (total_lowmem - LARGE_PAGE_SIZE_16M)) {
+                pmd_t *pmdp;
+                unsigned long val = p | _PMD_SIZE_16M | _PAGE_HWEXEC | _PAGE_HWWRITE;
+
+                spin_lock(&init_mm.page_table_lock);
+                pmdp = pmd_offset(pgd_offset_k(v), v);
+                pmd_val(*pmdp++) = val;
+                pmd_val(*pmdp++) = val;
+                pmd_val(*pmdp++) = val;
+                pmd_val(*pmdp++) = val;
+                spin_unlock(&init_mm.page_table_lock);
+
+                v += LARGE_PAGE_SIZE_16M;
+                p += LARGE_PAGE_SIZE_16M;
+                s += LARGE_PAGE_SIZE_16M;
+        }
+
+        while (s <= (total_lowmem - LARGE_PAGE_SIZE_4M)) {
+                pmd_t *pmdp;
+                unsigned long val = p | _PMD_SIZE_4M | _PAGE_HWEXEC | _PAGE_HWWRITE;
+
+                spin_lock(&init_mm.page_table_lock);
+                pmdp = pmd_offset(pgd_offset_k(v), v);
+                pmd_val(*pmdp) = val;
+                spin_unlock(&init_mm.page_table_lock);
+
+                v += LARGE_PAGE_SIZE_4M;
+                p += LARGE_PAGE_SIZE_4M;
+                s += LARGE_PAGE_SIZE_4M;
+        }
+
+        return s;
+}
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
new file mode 100644
index 000000000000..93441e7a2921
--- /dev/null
+++ b/arch/powerpc/mm/Makefile
@@ -0,0 +1,21 @@
+#
+# Makefile for the linux ppc-specific parts of the memory manager.
+#
+
+ifeq ($(CONFIG_PPC64),y)
+EXTRA_CFLAGS    += -mno-minimal-toc
+endif
+
+obj-y                           := fault.o mem.o lmb.o
+obj-$(CONFIG_PPC32)             += init_32.o pgtable_32.o mmu_context_32.o
+hash-$(CONFIG_PPC_MULTIPLATFORM) := hash_native_64.o
+obj-$(CONFIG_PPC64)             += init_64.o pgtable_64.o mmu_context_64.o \
+                                   hash_utils_64.o hash_low_64.o tlb_64.o \
+                                   slb_low.o slb.o stab.o mmap.o imalloc.o \
+                                   $(hash-y)
+obj-$(CONFIG_PPC_STD_MMU_32)    += ppc_mmu_32.o hash_low_32.o tlb_32.o
+obj-$(CONFIG_40x)               += 4xx_mmu.o
+obj-$(CONFIG_44x)               += 44x_mmu.o
+obj-$(CONFIG_FSL_BOOKE)         += fsl_booke_mmu.o
+obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o
+obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
diff --git a/arch/ppc64/mm/fault.c b/arch/powerpc/mm/fault.c
index be3f25cf3e9f..841d8b6323a8 100644
--- a/arch/ppc64/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -1,7 +1,7 @@
 /*
  *  arch/ppc/mm/fault.c
  *
- *  PowerPC version 
+ *  PowerPC version
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  *
  *  Derived from "arch/i386/mm/fault.c"
@@ -24,10 +24,11 @@
 #include <linux/errno.h>
 #include <linux/string.h>
 #include <linux/types.h>
+#include <linux/ptrace.h>
 #include <linux/mman.h>
 #include <linux/mm.h>
 #include <linux/interrupt.h>
-#include <linux/smp_lock.h>
+#include <linux/highmem.h>
 #include <linux/module.h>
 #include <linux/kprobes.h>
 
@@ -37,6 +38,7 @@
 #include <asm/mmu_context.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
+#include <asm/tlbflush.h>
 #include <asm/kdebug.h>
 #include <asm/siginfo.h>
 
@@ -78,6 +80,7 @@ static int store_updates_sp(struct pt_regs *regs)
         return 0;
 }
 
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
 static void do_dabr(struct pt_regs *regs, unsigned long error_code)
 {
         siginfo_t info;
@@ -99,12 +102,18 @@ static void do_dabr(struct pt_regs *regs, unsigned long error_code)
         info.si_addr = (void __user *)regs->nip;
         force_sig_info(SIGTRAP, &info, current);
 }
+#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/
 
 /*
- * The error_code parameter is
+ * For 600- and 800-family processors, the error_code parameter is DSISR
+ * for a data fault, SRR1 for an instruction fault. For 400-family processors
+ * the error_code parameter is ESR for a data fault, 0 for an instruction
+ * fault.
+ * For 64-bit processors, the error_code parameter is
  *  - DSISR for a non-SLB data access fault,
  *  - SRR1 & 0x08000000 for a non-SLB instruction access fault
  *  - 0 any SLB fault.
+ *
  * The return value is 0 if the fault was handled, or the signal
  * number if this is a kernel fault that can't be handled here.
  */
@@ -114,12 +123,25 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
         struct vm_area_struct * vma;
         struct mm_struct *mm = current->mm;
         siginfo_t info;
-        unsigned long code = SEGV_MAPERR;
-        unsigned long is_write = error_code & DSISR_ISSTORE;
-        unsigned long trap = TRAP(regs);
-        unsigned long is_exec = trap == 0x400;
+        int code = SEGV_MAPERR;
+        int is_write = 0;
+        int trap = TRAP(regs);
+        int is_exec = trap == 0x400;
 
-        BUG_ON((trap == 0x380) || (trap == 0x480));
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
+        /*
+         * Fortunately the bit assignments in SRR1 for an instruction
+         * fault and DSISR for a data fault are mostly the same for the
+         * bits we are interested in.  But there are some bits which
+         * indicate errors in DSISR but can validly be set in SRR1.
+         */
+        if (trap == 0x400)
+                error_code &= 0x48200000;
+        else
+                is_write = error_code & DSISR_ISSTORE;
+#else
+        is_write = error_code & ESR_DST;
+#endif /* CONFIG_4xx || CONFIG_BOOKE */
 
         if (notify_die(DIE_PAGE_FAULT, "page_fault", regs, error_code,
                                 11, SIGSEGV) == NOTIFY_STOP)
@@ -134,10 +156,13 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
         if (!user_mode(regs) && (address >= TASK_SIZE))
                 return SIGSEGV;
 
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
         if (error_code & DSISR_DABRMATCH) {
+                /* DABR match */
                 do_dabr(regs, error_code);
                 return 0;
         }
+#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/
 
         if (in_atomic() || mm == NULL) {
                 if (!user_mode(regs))
@@ -176,10 +201,8 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
         vma = find_vma(mm, address);
         if (!vma)
                 goto bad_area;
-
-        if (vma->vm_start <= address) {
+        if (vma->vm_start <= address)
                 goto good_area;
-        }
         if (!(vma->vm_flags & VM_GROWSDOWN))
                 goto bad_area;
 
@@ -214,35 +237,76 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
                     && (!user_mode(regs) || !store_updates_sp(regs)))
                         goto bad_area;
         }
-
         if (expand_stack(vma, address))
                 goto bad_area;
 
 good_area:
         code = SEGV_ACCERR;
+#if defined(CONFIG_6xx)
+        if (error_code & 0x95700000)
+                /* an error such as lwarx to I/O controller space,
+                   address matching DABR, eciwx, etc. */
+                goto bad_area;
+#endif /* CONFIG_6xx */
+#if defined(CONFIG_8xx)
+        /* The MPC8xx seems to always set 0x80000000, which is
+         * "undefined".  Of those that can be set, this is the only
+         * one which seems bad.
+         */
+        if (error_code & 0x10000000)
+                /* Guarded storage error. */
+                goto bad_area;
+#endif /* CONFIG_8xx */
 
         if (is_exec) {
+#ifdef CONFIG_PPC64
                 /* protection fault */
                 if (error_code & DSISR_PROTFAULT)
                         goto bad_area;
                 if (!(vma->vm_flags & VM_EXEC))
                         goto bad_area;
+#endif
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
+                pte_t *ptep;
+
+                /* Since 4xx/Book-E supports per-page execute permission,
+                 * we lazily flush dcache to icache. */
+                ptep = NULL;
+                if (get_pteptr(mm, address, &ptep) && pte_present(*ptep)) {
+                        struct page *page = pte_page(*ptep);
+
+                        if (! test_bit(PG_arch_1, &page->flags)) {
+                                flush_dcache_icache_page(page);
+                                set_bit(PG_arch_1, &page->flags);
+                        }
+                        pte_update(ptep, 0, _PAGE_HWEXEC);
+                        _tlbie(address);
+                        pte_unmap(ptep);
+                        up_read(&mm->mmap_sem);
+                        return 0;
+                }
+                if (ptep != NULL)
+                        pte_unmap(ptep);
+#endif
         /* a write */
         } else if (is_write) {
                 if (!(vma->vm_flags & VM_WRITE))
                         goto bad_area;
         /* a read */
         } else {
-                if (!(vma->vm_flags & VM_READ))
+                /* protection fault */
+                if (error_code & 0x08000000)
+                        goto bad_area;
+                if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
                         goto bad_area;
         }
 
- survive:
         /*
          * If for any reason at all we couldn't handle the fault,
          * make sure we exit gracefully rather than endlessly redo
          * the fault.
          */
+ survive:
         switch (handle_mm_fault(mm, vma, address, is_write)) {
 
         case VM_FAULT_MINOR:
@@ -268,15 +332,11 @@ bad_area:
 bad_area_nosemaphore:
         /* User mode accesses cause a SIGSEGV */
         if (user_mode(regs)) {
-                info.si_signo = SIGSEGV;
-                info.si_errno = 0;
-                info.si_code = code;
-                info.si_addr = (void __user *) address;
-                force_sig_info(SIGSEGV, &info, current);
+                _exception(SIGSEGV, regs, code, address);
                 return 0;
         }
 
-        if (trap == 0x400 && (error_code & DSISR_PROTFAULT)
+        if (is_exec && (error_code & DSISR_PROTFAULT)
             && printk_ratelimit())
                 printk(KERN_CRIT "kernel tried to execute NX-protected"
                        " page (%lx) - exploit attempt? (uid: %d)\n",
@@ -315,8 +375,8 @@ do_sigbus:
 
 /*
  * bad_page_fault is called when we have a bad access from the kernel.
- * It is called from do_page_fault above and from some of the procedures
- * in traps.c.
+ * It is called from the DSI and ISI handlers in head.S and from some
+ * of the procedures in traps.c.
  */
 void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
 {
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
new file mode 100644
index 000000000000..af9ca0eb6d55
--- /dev/null
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -0,0 +1,237 @@
+/*
+ * Modifications by Kumar Gala (kumar.gala@freescale.com) to support
+ * E500 Book E processors.
+ *
+ * Copyright 2004 Freescale Semiconductor, Inc
+ *
+ * This file contains the routines for initializing the MMU
+ * on the 4xx series of chips.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/stddef.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/highmem.h>
+
+#include <asm/pgalloc.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/uaccess.h>
+#include <asm/smp.h>
+#include <asm/bootx.h>
+#include <asm/machdep.h>
+#include <asm/setup.h>
+
+extern void loadcam_entry(unsigned int index);
+unsigned int tlbcam_index;
+unsigned int num_tlbcam_entries;
+static unsigned long __cam0, __cam1, __cam2;
+extern unsigned long total_lowmem;
+extern unsigned long __max_low_memory;
+#define MAX_LOW_MEM     CONFIG_LOWMEM_SIZE
+
+#define NUM_TLBCAMS     (16)
+
+struct tlbcam {
+        u32     MAS0;
+        u32     MAS1;
+        u32     MAS2;
+        u32     MAS3;
+        u32     MAS7;
+} TLBCAM[NUM_TLBCAMS];
+
+struct tlbcamrange {
+        unsigned long start;
+        unsigned long limit;
+        phys_addr_t phys;
+} tlbcam_addrs[NUM_TLBCAMS];
+
+extern unsigned int tlbcam_index;
+
+/*
+ * Return PA for this VA if it is mapped by a CAM, or 0
+ */
+unsigned long v_mapped_by_tlbcam(unsigned long va)
+{
+        int b;
+        for (b = 0; b < tlbcam_index; ++b)
+                if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
+                        return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
+        return 0;
+}
+
+/*
+ * Return VA for a given PA or 0 if not mapped
+ */
+unsigned long p_mapped_by_tlbcam(unsigned long pa)
+{
+        int b;
+        for (b = 0; b < tlbcam_index; ++b)
+                if (pa >= tlbcam_addrs[b].phys
+                    && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
+                              +tlbcam_addrs[b].phys)
+                        return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
+        return 0;
+}
+
+/*
+ * Set up one of the I/D BAT (block address translation) register pairs.
+ * The parameters are not checked; in particular size must be a power
+ * of 4 between 4k and 256M.
+ */
+void settlbcam(int index, unsigned long virt, phys_addr_t phys,
+                unsigned int size, int flags, unsigned int pid)
+{
+        unsigned int tsize, lz;
+
+        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
+        tsize = (21 - lz) / 2;
+
+#ifdef CONFIG_SMP
+        if ((flags & _PAGE_NO_CACHE) == 0)
+                flags |= _PAGE_COHERENT;
+#endif
+
+        TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
+        TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
+        TLBCAM[index].MAS2 = virt & PAGE_MASK;
+
+        TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
+        TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
+        TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
+        TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
+        TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
+
+        TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
+        TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
+
+#ifndef CONFIG_KGDB /* want user access for breakpoints */
+        if (flags & _PAGE_USER) {
+           TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
+           TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
+        }
+#else
+        TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
+        TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
+#endif
+
+        tlbcam_addrs[index].start = virt;
+        tlbcam_addrs[index].limit = virt + size - 1;
+        tlbcam_addrs[index].phys = phys;
+
+        loadcam_entry(index);
+}
+
+void invalidate_tlbcam_entry(int index)
+{
+        TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
+        TLBCAM[index].MAS1 = ~MAS1_VALID;
+
+        loadcam_entry(index);
+}
+
+void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
+                unsigned long cam2)
+{
+        settlbcam(0, KERNELBASE, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
+        tlbcam_index++;
+        if (cam1) {
+                tlbcam_index++;
+                settlbcam(1, KERNELBASE+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0);
+        }
+        if (cam2) {
+                tlbcam_index++;
+                settlbcam(2, KERNELBASE+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0);
+        }
+}
+
+/*
+ * MMU_init_hw does the chip-specific initialization of the MMU hardware.
+ */
+void __init MMU_init_hw(void)
+{
+        flush_instruction_cache();
+}
+
+unsigned long __init mmu_mapin_ram(void)
+{
+        cam_mapin_ram(__cam0, __cam1, __cam2);
+
+        return __cam0 + __cam1 + __cam2;
+}
+
+
+void __init
+adjust_total_lowmem(void)
+{
+        unsigned long max_low_mem = MAX_LOW_MEM;
+        unsigned long cam_max = 0x10000000;
+        unsigned long ram;
+
+        /* adjust CAM size to max_low_mem */
+        if (max_low_mem < cam_max)
+                cam_max = max_low_mem;
+
+        /* adjust lowmem size to max_low_mem */
+        if (max_low_mem < total_lowmem)
+                ram = max_low_mem;
+        else
+                ram = total_lowmem;
+
+        /* Calculate CAM values */
+        __cam0 = 1UL << 2 * (__ilog2(ram) / 2);
+        if (__cam0 > cam_max)
+                __cam0 = cam_max;
+        ram -= __cam0;
+        if (ram) {
+                __cam1 = 1UL << 2 * (__ilog2(ram) / 2);
+                if (__cam1 > cam_max)
+                        __cam1 = cam_max;
+                ram -= __cam1;
+        }
+        if (ram) {
+                __cam2 = 1UL << 2 * (__ilog2(ram) / 2);
+                if (__cam2 > cam_max)
+                        __cam2 = cam_max;
+                ram -= __cam2;
+        }
+
+        printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
+                        " CAM2=%ldMb residual: %ldMb\n",
+                        __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
+                        (total_lowmem - __cam0 - __cam1 - __cam2) >> 20);
+        __max_low_memory = max_low_mem = __cam0 + __cam1 + __cam2;
+}
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
new file mode 100644
index 000000000000..12ccd7155bac
--- /dev/null
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -0,0 +1,618 @@
+/*
+ *  arch/ppc/kernel/hashtable.S
+ *
+ *  $Id: hashtable.S,v 1.6 1999/10/08 01:56:15 paulus Exp $
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
+ *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *  Adapted for Power Macintosh by Paul Mackerras.
+ *  Low-level exception handlers and MMU support
+ *  rewritten by Paul Mackerras.
+ *    Copyright (C) 1996 Paul Mackerras.
+ *
+ *  This file contains low-level assembler routines for managing
+ *  the PowerPC MMU hash table.  (PPC 8xx processors don't use a
+ *  hash table, so this file is not used on them.)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/cputable.h>
+#include <asm/ppc_asm.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+
+#ifdef CONFIG_SMP
+        .comm   mmu_hash_lock,4
+#endif /* CONFIG_SMP */
+
+/*
+ * Sync CPUs with hash_page taking & releasing the hash
+ * table lock
+ */
+#ifdef CONFIG_SMP
+        .text
+_GLOBAL(hash_page_sync)
+        lis     r8,mmu_hash_lock@h
+        ori     r8,r8,mmu_hash_lock@l
+        lis     r0,0x0fff
+        b       10f
+11:     lwz     r6,0(r8)
+        cmpwi   0,r6,0
+        bne     11b
+10:     lwarx   r6,0,r8
+        cmpwi   0,r6,0
+        bne-    11b
+        stwcx.  r0,0,r8
+        bne-    10b
+        isync
+        eieio
+        li      r0,0
+        stw     r0,0(r8)
+        blr     
+#endif
+
+/*
+ * Load a PTE into the hash table, if possible.
+ * The address is in r4, and r3 contains an access flag:
+ * _PAGE_RW (0x400) if a write.
+ * r9 contains the SRR1 value, from which we use the MSR_PR bit.
+ * SPRG3 contains the physical address of the current task's thread.
+ *
+ * Returns to the caller if the access is illegal or there is no
+ * mapping for the address.  Otherwise it places an appropriate PTE
+ * in the hash table and returns from the exception.
+ * Uses r0, r3 - r8, ctr, lr.
+ */
+        .text
+_GLOBAL(hash_page)
+#ifdef CONFIG_PPC64BRIDGE
+        mfmsr   r0
+        clrldi  r0,r0,1         /* make sure it's in 32-bit mode */
+        MTMSRD(r0)
+        isync
+#endif
+        tophys(r7,0)                    /* gets -KERNELBASE into r7 */
+#ifdef CONFIG_SMP
+        addis   r8,r7,mmu_hash_lock@h
+        ori     r8,r8,mmu_hash_lock@l
+        lis     r0,0x0fff
+        b       10f
+11:     lwz     r6,0(r8)
+        cmpwi   0,r6,0
+        bne     11b
+10:     lwarx   r6,0,r8
+        cmpwi   0,r6,0
+        bne-    11b
+        stwcx.  r0,0,r8
+        bne-    10b
+        isync
+#endif
+        /* Get PTE (linux-style) and check access */
+        lis     r0,KERNELBASE@h         /* check if kernel address */
+        cmplw   0,r4,r0
+        mfspr   r8,SPRN_SPRG3           /* current task's THREAD (phys) */
+        ori     r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */
+        lwz     r5,PGDIR(r8)            /* virt page-table root */
+        blt+    112f                    /* assume user more likely */
+        lis     r5,swapper_pg_dir@ha    /* if kernel address, use */
+        addi    r5,r5,swapper_pg_dir@l  /* kernel page table */
+        rlwimi  r3,r9,32-12,29,29       /* MSR_PR -> _PAGE_USER */
+112:    add     r5,r5,r7                /* convert to phys addr */
+        rlwimi  r5,r4,12,20,29          /* insert top 10 bits of address */
+        lwz     r8,0(r5)                /* get pmd entry */
+        rlwinm. r8,r8,0,0,19            /* extract address of pte page */
+#ifdef CONFIG_SMP
+        beq-    hash_page_out           /* return if no mapping */
+#else
+        /* XXX it seems like the 601 will give a machine fault on the
+           rfi if its alignment is wrong (bottom 4 bits of address are
+           8 or 0xc) and we have had a not-taken conditional branch
+           to the address following the rfi. */
+        beqlr-
+#endif
+        rlwimi  r8,r4,22,20,29          /* insert next 10 bits of address */
+        rlwinm  r0,r3,32-3,24,24        /* _PAGE_RW access -> _PAGE_DIRTY */
+        ori     r0,r0,_PAGE_ACCESSED|_PAGE_HASHPTE
+
+        /*
+         * Update the linux PTE atomically.  We do the lwarx up-front
+         * because almost always, there won't be a permission violation
+         * and there won't already be an HPTE, and thus we will have
+         * to update the PTE to set _PAGE_HASHPTE.  -- paulus.
+         */
+retry:
+        lwarx   r6,0,r8                 /* get linux-style pte */
+        andc.   r5,r3,r6                /* check access & ~permission */
+#ifdef CONFIG_SMP
+        bne-    hash_page_out           /* return if access not permitted */
+#else
+        bnelr-
+#endif
+        or      r5,r0,r6                /* set accessed/dirty bits */
+        stwcx.  r5,0,r8                 /* attempt to update PTE */
+        bne-    retry                   /* retry if someone got there first */
+
+        mfsrin  r3,r4                   /* get segment reg for segment */
+        mfctr   r0
+        stw     r0,_CTR(r11)
+        bl      create_hpte             /* add the hash table entry */
+
+#ifdef CONFIG_SMP
+        eieio
+        addis   r8,r7,mmu_hash_lock@ha
+        li      r0,0
+        stw     r0,mmu_hash_lock@l(r8)
+#endif
+
+        /* Return from the exception */
+        lwz     r5,_CTR(r11)
+        mtctr   r5
+        lwz     r0,GPR0(r11)
+        lwz     r7,GPR7(r11)
+        lwz     r8,GPR8(r11)
+        b       fast_exception_return
+
+#ifdef CONFIG_SMP
+hash_page_out:
+        eieio
+        addis   r8,r7,mmu_hash_lock@ha
+        li      r0,0
+        stw     r0,mmu_hash_lock@l(r8)
+        blr
+#endif /* CONFIG_SMP */
+
+/*
+ * Add an entry for a particular page to the hash table.
+ *
+ * add_hash_page(unsigned context, unsigned long va, unsigned long pmdval)
+ *
+ * We assume any necessary modifications to the pte (e.g. setting
+ * the accessed bit) have already been done and that there is actually
+ * a hash table in use (i.e. we're not on a 603).
+ */
+_GLOBAL(add_hash_page)
+        mflr    r0
+        stw     r0,4(r1)
+
+        /* Convert context and va to VSID */
+        mulli   r3,r3,897*16            /* multiply context by context skew */
+        rlwinm  r0,r4,4,28,31           /* get ESID (top 4 bits of va) */
+        mulli   r0,r0,0x111             /* multiply by ESID skew */
+        add     r3,r3,r0                /* note create_hpte trims to 24 bits */
+
+#ifdef CONFIG_SMP
+        rlwinm  r8,r1,0,0,18            /* use cpu number to make tag */
+        lwz     r8,TI_CPU(r8)           /* to go in mmu_hash_lock */
+        oris    r8,r8,12
+#endif /* CONFIG_SMP */
+
+        /*
+         * We disable interrupts here, even on UP, because we don't
+         * want to race with hash_page, and because we want the
+         * _PAGE_HASHPTE bit to be a reliable indication of whether
+         * the HPTE exists (or at least whether one did once).
+         * We also turn off the MMU for data accesses so that we
+         * we can't take a hash table miss (assuming the code is
+         * covered by a BAT).  -- paulus
+         */
+        mfmsr   r10
+        SYNC
+        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
+        rlwinm  r0,r0,0,28,26           /* clear MSR_DR */
+        mtmsr   r0
+        SYNC_601
+        isync
+
+        tophys(r7,0)
+
+#ifdef CONFIG_SMP
+        addis   r9,r7,mmu_hash_lock@ha
+        addi    r9,r9,mmu_hash_lock@l
+10:     lwarx   r0,0,r9                 /* take the mmu_hash_lock */
+        cmpi    0,r0,0
+        bne-    11f
+        stwcx.  r8,0,r9
+        beq+    12f
+11:     lwz     r0,0(r9)
+        cmpi    0,r0,0
+        beq     10b
+        b       11b
+12:     isync
+#endif
+
+        /*
+         * Fetch the linux pte and test and set _PAGE_HASHPTE atomically.
+         * If _PAGE_HASHPTE was already set, we don't replace the existing
+         * HPTE, so we just unlock and return.
+         */
+        mr      r8,r5
+        rlwimi  r8,r4,22,20,29
+1:      lwarx   r6,0,r8
+        andi.   r0,r6,_PAGE_HASHPTE
+        bne     9f                      /* if HASHPTE already set, done */
+        ori     r5,r6,_PAGE_HASHPTE
+        stwcx.  r5,0,r8
+        bne-    1b
+
+        bl      create_hpte
+
+9:
+#ifdef CONFIG_SMP
+        eieio
+        li      r0,0
+        stw     r0,0(r9)                /* clear mmu_hash_lock */
+#endif
+
+        /* reenable interrupts and DR */
+        mtmsr   r10
+        SYNC_601
+        isync
+
+        lwz     r0,4(r1)
+        mtlr    r0
+        blr
+
+/*
+ * This routine adds a hardware PTE to the hash table.
+ * It is designed to be called with the MMU either on or off.
+ * r3 contains the VSID, r4 contains the virtual address,
+ * r5 contains the linux PTE, r6 contains the old value of the
+ * linux PTE (before setting _PAGE_HASHPTE) and r7 contains the
+ * offset to be added to addresses (0 if the MMU is on,
+ * -KERNELBASE if it is off).
+ * On SMP, the caller should have the mmu_hash_lock held.
+ * We assume that the caller has (or will) set the _PAGE_HASHPTE
+ * bit in the linux PTE in memory.  The value passed in r6 should
+ * be the old linux PTE value; if it doesn't have _PAGE_HASHPTE set
+ * this routine will skip the search for an existing HPTE.
+ * This procedure modifies r0, r3 - r6, r8, cr0.
+ *  -- paulus.
+ *
+ * For speed, 4 of the instructions get patched once the size and
+ * physical address of the hash table are known.  These definitions
+ * of Hash_base and Hash_bits below are just an example.
+ */
+Hash_base = 0xc0180000
+Hash_bits = 12                          /* e.g. 256kB hash table */
+Hash_msk = (((1 << Hash_bits) - 1) * 64)
+
+#ifndef CONFIG_PPC64BRIDGE
+/* defines for the PTE format for 32-bit PPCs */
+#define PTE_SIZE        8
+#define PTEG_SIZE       64
+#define LG_PTEG_SIZE    6
+#define LDPTEu          lwzu
+#define STPTE           stw
+#define CMPPTE          cmpw
+#define PTE_H           0x40
+#define PTE_V           0x80000000
+#define TST_V(r)        rlwinm. r,r,0,0,0
+#define SET_V(r)        oris r,r,PTE_V@h
+#define CLR_V(r,t)      rlwinm r,r,0,1,31
+
+#else
+/* defines for the PTE format for 64-bit PPCs */
+#define PTE_SIZE        16
+#define PTEG_SIZE       128
+#define LG_PTEG_SIZE    7
+#define LDPTEu          ldu
+#define STPTE           std
+#define CMPPTE          cmpd
+#define PTE_H           2
+#define PTE_V           1
+#define TST_V(r)        andi. r,r,PTE_V
+#define SET_V(r)        ori r,r,PTE_V
+#define CLR_V(r,t)      li t,PTE_V; andc r,r,t
+#endif /* CONFIG_PPC64BRIDGE */
+
+#define HASH_LEFT       31-(LG_PTEG_SIZE+Hash_bits-1)
+#define HASH_RIGHT      31-LG_PTEG_SIZE
+
+_GLOBAL(create_hpte)
+        /* Convert linux-style PTE (r5) to low word of PPC-style PTE (r8) */
+        rlwinm  r8,r5,32-10,31,31       /* _PAGE_RW -> PP lsb */
+        rlwinm  r0,r5,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
+        and     r8,r8,r0                /* writable if _RW & _DIRTY */
+        rlwimi  r5,r5,32-1,30,30        /* _PAGE_USER -> PP msb */
+        rlwimi  r5,r5,32-2,31,31        /* _PAGE_USER -> PP lsb */
+        ori     r8,r8,0xe14             /* clear out reserved bits and M */
+        andc    r8,r5,r8                /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+        ori     r8,r8,_PAGE_COHERENT    /* set M (coherence required) */
+END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
+
+        /* Construct the high word of the PPC-style PTE (r5) */
+#ifndef CONFIG_PPC64BRIDGE
+        rlwinm  r5,r3,7,1,24            /* put VSID in 0x7fffff80 bits */
+        rlwimi  r5,r4,10,26,31          /* put in API (abbrev page index) */
+#else /* CONFIG_PPC64BRIDGE */
+        clrlwi  r3,r3,8                 /* reduce vsid to 24 bits */
+        sldi    r5,r3,12                /* shift vsid into position */
+        rlwimi  r5,r4,16,20,24          /* put in API (abbrev page index) */
+#endif /* CONFIG_PPC64BRIDGE */
+        SET_V(r5)                       /* set V (valid) bit */
+
+        /* Get the address of the primary PTE group in the hash table (r3) */
+_GLOBAL(hash_page_patch_A)
+        addis   r0,r7,Hash_base@h       /* base address of hash table */
+        rlwimi  r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT    /* VSID -> hash */
+        rlwinm  r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
+        xor     r3,r3,r0                /* make primary hash */
+        li      r0,8                    /* PTEs/group */
+
+        /*
+         * Test the _PAGE_HASHPTE bit in the old linux PTE, and skip the search
+         * if it is clear, meaning that the HPTE isn't there already...
+         */
+        andi.   r6,r6,_PAGE_HASHPTE
+        beq+    10f                     /* no PTE: go look for an empty slot */
+        tlbie   r4
+
+        addis   r4,r7,htab_hash_searches@ha
+        lwz     r6,htab_hash_searches@l(r4)
+        addi    r6,r6,1                 /* count how many searches we do */
+        stw     r6,htab_hash_searches@l(r4)
+
+        /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
+        mtctr   r0
+        addi    r4,r3,-PTE_SIZE
+1:      LDPTEu  r6,PTE_SIZE(r4)         /* get next PTE */
+        CMPPTE  0,r6,r5
+        bdnzf   2,1b                    /* loop while ctr != 0 && !cr0.eq */
+        beq+    found_slot
+
+        /* Search the secondary PTEG for a matching PTE */
+        ori     r5,r5,PTE_H             /* set H (secondary hash) bit */
+_GLOBAL(hash_page_patch_B)
+        xoris   r4,r3,Hash_msk>>16      /* compute secondary hash */
+        xori    r4,r4,(-PTEG_SIZE & 0xffff)
+        addi    r4,r4,-PTE_SIZE
+        mtctr   r0
+2:      LDPTEu  r6,PTE_SIZE(r4)
+        CMPPTE  0,r6,r5
+        bdnzf   2,2b
+        beq+    found_slot
+        xori    r5,r5,PTE_H             /* clear H bit again */
+
+        /* Search the primary PTEG for an empty slot */
+10:     mtctr   r0
+        addi    r4,r3,-PTE_SIZE         /* search primary PTEG */
+1:      LDPTEu  r6,PTE_SIZE(r4)         /* get next PTE */
+        TST_V(r6)                       /* test valid bit */
+        bdnzf   2,1b                    /* loop while ctr != 0 && !cr0.eq */
+        beq+    found_empty
+
+        /* update counter of times that the primary PTEG is full */
+        addis   r4,r7,primary_pteg_full@ha
+        lwz     r6,primary_pteg_full@l(r4)
+        addi    r6,r6,1
+        stw     r6,primary_pteg_full@l(r4)
+
+        /* Search the secondary PTEG for an empty slot */
+        ori     r5,r5,PTE_H             /* set H (secondary hash) bit */
+_GLOBAL(hash_page_patch_C)
+        xoris   r4,r3,Hash_msk>>16      /* compute secondary hash */
+        xori    r4,r4,(-PTEG_SIZE & 0xffff)
+        addi    r4,r4,-PTE_SIZE
+        mtctr   r0
+2:      LDPTEu  r6,PTE_SIZE(r4)
+        TST_V(r6)
+        bdnzf   2,2b
+        beq+    found_empty
+        xori    r5,r5,PTE_H             /* clear H bit again */
+
+        /*
+         * Choose an arbitrary slot in the primary PTEG to overwrite.
+         * Since both the primary and secondary PTEGs are full, and we
+         * have no information that the PTEs in the primary PTEG are
+         * more important or useful than those in the secondary PTEG,
+         * and we know there is a definite (although small) speed
+         * advantage to putting the PTE in the primary PTEG, we always
+         * put the PTE in the primary PTEG.
+         */
+        addis   r4,r7,next_slot@ha
+        lwz     r6,next_slot@l(r4)
+        addi    r6,r6,PTE_SIZE
+        andi.   r6,r6,7*PTE_SIZE
+        stw     r6,next_slot@l(r4)
+        add     r4,r3,r6
+
+#ifndef CONFIG_SMP
+        /* Store PTE in PTEG */
+found_empty:
+        STPTE   r5,0(r4)
+found_slot:
+        STPTE   r8,PTE_SIZE/2(r4)
+
+#else /* CONFIG_SMP */
+/*
+ * Between the tlbie above and updating the hash table entry below,
+ * another CPU could read the hash table entry and put it in its TLB.
+ * There are 3 cases:
+ * 1. using an empty slot
+ * 2. updating an earlier entry to change permissions (i.e. enable write)
+ * 3. taking over the PTE for an unrelated address
+ *
+ * In each case it doesn't really matter if the other CPUs have the old
+ * PTE in their TLB.  So we don't need to bother with another tlbie here,
+ * which is convenient as we've overwritten the register that had the
+ * address. :-)  The tlbie above is mainly to make sure that this CPU comes
+ * and gets the new PTE from the hash table.
+ *
+ * We do however have to make sure that the PTE is never in an invalid
+ * state with the V bit set.
+ */
+found_empty:
+found_slot:
+        CLR_V(r5,r0)            /* clear V (valid) bit in PTE */
+        STPTE   r5,0(r4)
+        sync
+        TLBSYNC
+        STPTE   r8,PTE_SIZE/2(r4) /* put in correct RPN, WIMG, PP bits */
+        sync
+        SET_V(r5)
+        STPTE   r5,0(r4)        /* finally set V bit in PTE */
+#endif /* CONFIG_SMP */
+
+        sync            /* make sure pte updates get to memory */
+        blr
+
+        .comm   next_slot,4
+        .comm   primary_pteg_full,4
+        .comm   htab_hash_searches,4
+
+/*
+ * Flush the entry for a particular page from the hash table.
+ *
+ * flush_hash_pages(unsigned context, unsigned long va, unsigned long pmdval,
+ *                  int count)
+ *
+ * We assume that there is a hash table in use (Hash != 0).
+ */
+_GLOBAL(flush_hash_pages)
+        tophys(r7,0)
+
+        /*
+         * We disable interrupts here, even on UP, because we want
+         * the _PAGE_HASHPTE bit to be a reliable indication of
+         * whether the HPTE exists (or at least whether one did once).
+         * We also turn off the MMU for data accesses so that we
+         * we can't take a hash table miss (assuming the code is
+         * covered by a BAT).  -- paulus
+         */
+        mfmsr   r10
+        SYNC
+        rlwinm  r0,r10,0,17,15          /* clear bit 16 (MSR_EE) */
+        rlwinm  r0,r0,0,28,26           /* clear MSR_DR */
+        mtmsr   r0
+        SYNC_601
+        isync
+
+        /* First find a PTE in the range that has _PAGE_HASHPTE set */
+        rlwimi  r5,r4,22,20,29
+1:      lwz     r0,0(r5)
+        cmpwi   cr1,r6,1
+        andi.   r0,r0,_PAGE_HASHPTE
+        bne     2f
+        ble     cr1,19f
+        addi    r4,r4,0x1000
+        addi    r5,r5,4
+        addi    r6,r6,-1
+        b       1b
+
+        /* Convert context and va to VSID */
+2:      mulli   r3,r3,897*16            /* multiply context by context skew */
+        rlwinm  r0,r4,4,28,31           /* get ESID (top 4 bits of va) */
+        mulli   r0,r0,0x111             /* multiply by ESID skew */
+        add     r3,r3,r0                /* note code below trims to 24 bits */
+
+        /* Construct the high word of the PPC-style PTE (r11) */
+#ifndef CONFIG_PPC64BRIDGE
+        rlwinm  r11,r3,7,1,24           /* put VSID in 0x7fffff80 bits */
+        rlwimi  r11,r4,10,26,31         /* put in API (abbrev page index) */
+#else /* CONFIG_PPC64BRIDGE */
+        clrlwi  r3,r3,8                 /* reduce vsid to 24 bits */
+        sldi    r11,r3,12               /* shift vsid into position */
+        rlwimi  r11,r4,16,20,24         /* put in API (abbrev page index) */
+#endif /* CONFIG_PPC64BRIDGE */
+        SET_V(r11)                      /* set V (valid) bit */
+
+#ifdef CONFIG_SMP
+        addis   r9,r7,mmu_hash_lock@ha
+        addi    r9,r9,mmu_hash_lock@l
+        rlwinm  r8,r1,0,0,18
+        add     r8,r8,r7
+        lwz     r8,TI_CPU(r8)
+        oris    r8,r8,9
+10:     lwarx   r0,0,r9
+        cmpi    0,r0,0
+        bne-    11f
+        stwcx.  r8,0,r9
+        beq+    12f
+11:     lwz     r0,0(r9)
+        cmpi    0,r0,0
+        beq     10b
+        b       11b
+12:     isync
+#endif
+
+        /*
+         * Check the _PAGE_HASHPTE bit in the linux PTE.  If it is
+         * already clear, we're done (for this pte).  If not,
+         * clear it (atomically) and proceed.  -- paulus.
+         */
+33:     lwarx   r8,0,r5                 /* fetch the pte */
+        andi.   r0,r8,_PAGE_HASHPTE
+        beq     8f                      /* done if HASHPTE is already clear */
+        rlwinm  r8,r8,0,31,29           /* clear HASHPTE bit */
+        stwcx.  r8,0,r5                 /* update the pte */
+        bne-    33b
+
+        /* Get the address of the primary PTE group in the hash table (r3) */
+_GLOBAL(flush_hash_patch_A)
+        addis   r8,r7,Hash_base@h       /* base address of hash table */
+        rlwimi  r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT    /* VSID -> hash */
+        rlwinm  r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
+        xor     r8,r0,r8                /* make primary hash */
+
+        /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
+        li      r0,8                    /* PTEs/group */
+        mtctr   r0
+        addi    r12,r8,-PTE_SIZE
+1:      LDPTEu  r0,PTE_SIZE(r12)        /* get next PTE */
+        CMPPTE  0,r0,r11
+        bdnzf   2,1b                    /* loop while ctr != 0 && !cr0.eq */
+        beq+    3f
+
+        /* Search the secondary PTEG for a matching PTE */
+        ori     r11,r11,PTE_H           /* set H (secondary hash) bit */
+        li      r0,8                    /* PTEs/group */
+_GLOBAL(flush_hash_patch_B)
+        xoris   r12,r8,Hash_msk>>16     /* compute secondary hash */
+        xori    r12,r12,(-PTEG_SIZE & 0xffff)
+        addi    r12,r12,-PTE_SIZE
+        mtctr   r0
+2:      LDPTEu  r0,PTE_SIZE(r12)
+        CMPPTE  0,r0,r11
+        bdnzf   2,2b
+        xori    r11,r11,PTE_H           /* clear H again */
+        bne-    4f                      /* should rarely fail to find it */
+
+3:      li      r0,0
+        STPTE   r0,0(r12)               /* invalidate entry */
+4:      sync
+        tlbie   r4                      /* in hw tlb too */
+        sync
+
+8:      ble     cr1,9f                  /* if all ptes checked */
+81:     addi    r6,r6,-1
+        addi    r5,r5,4                 /* advance to next pte */
+        addi    r4,r4,0x1000
+        lwz     r0,0(r5)                /* check next pte */
+        cmpwi   cr1,r6,1
+        andi.   r0,r0,_PAGE_HASHPTE
+        bne     33b
+        bgt     cr1,81b
+
+9:
+#ifdef CONFIG_SMP
+        TLBSYNC
+        li      r0,0
+        stw     r0,0(r9)                /* clear mmu_hash_lock */
+#endif
+
+19:     mtmsr   r10
+        SYNC_601
+        isync
+        blr
diff --git a/arch/ppc64/mm/hash_low.S b/arch/powerpc/mm/hash_low_64.S
index ee5a5d36bfa8..d6ed9102eeea 100644
--- a/arch/ppc64/mm/hash_low.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -10,7 +10,7 @@
  * described in the kernel's COPYING file.
  */
 
-#include <asm/processor.h>
+#include <asm/reg.h>
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
 #include <asm/page.h>
diff --git a/arch/ppc64/mm/hash_native.c b/arch/powerpc/mm/hash_native_64.c
index bfd385b7713c..174d14576c28 100644
--- a/arch/ppc64/mm/hash_native.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -335,10 +335,9 @@ static void native_hpte_clear(void)
         local_irq_restore(flags);
 }
 
-static void native_flush_hash_range(unsigned long context,
-                                    unsigned long number, int local)
+static void native_flush_hash_range(unsigned long number, int local)
 {
-        unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn;
+        unsigned long va, vpn, hash, secondary, slot, flags, avpn;
         int i, j;
         hpte_t *hptep;
         unsigned long hpte_v;
@@ -349,13 +348,7 @@ static void native_flush_hash_range(unsigned long context,
 
         j = 0;
         for (i = 0; i < number; i++) {
-                if (batch->addr[i] < KERNELBASE)
-                        vsid = get_vsid(context, batch->addr[i]);
-                else
-                        vsid = get_kernel_vsid(batch->addr[i]);
-
-                va = (vsid << 28) | (batch->addr[i] & 0x0fffffff);
-                batch->vaddr[j] = va;
+                va = batch->vaddr[j];
                 if (large)
                         vpn = va >> HPAGE_SHIFT;
                 else
diff --git a/arch/ppc64/mm/hash_utils.c b/arch/powerpc/mm/hash_utils_64.c
index 09475c8edf7c..6e9e05cce02c 100644
--- a/arch/ppc64/mm/hash_utils.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -78,7 +78,7 @@ extern unsigned long dart_tablebase;
 hpte_t *htab_address;
 unsigned long htab_hash_mask;
 
-extern unsigned long _SDR1;
+unsigned long _SDR1;
 
 #define KB (1024)
 #define MB (1024*KB)
@@ -90,7 +90,6 @@ static inline void loop_forever(void)
                 ;
 }
 
-#ifdef CONFIG_PPC_MULTIPLATFORM
 static inline void create_pte_mapping(unsigned long start, unsigned long end,
                                       unsigned long mode, int large)
 {
@@ -111,7 +110,7 @@ static inline void create_pte_mapping(unsigned long start, unsigned long end,
                 unsigned long vpn, hash, hpteg;
                 unsigned long vsid = get_kernel_vsid(addr);
                 unsigned long va = (vsid << 28) | (addr & 0xfffffff);
-                int ret;
+                int ret = -1;
 
                 if (large)
                         vpn = va >> HPAGE_SHIFT;
@@ -129,16 +128,25 @@ static inline void create_pte_mapping(unsigned long start, unsigned long end,
 
                 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
 
+#ifdef CONFIG_PPC_ISERIES
+                if (systemcfg->platform & PLATFORM_ISERIES_LPAR)
+                        ret = iSeries_hpte_bolt_or_insert(hpteg, va,
+                                virt_to_abs(addr) >> PAGE_SHIFT,
+                                vflags, tmp_mode);
+                else
+#endif
 #ifdef CONFIG_PPC_PSERIES
                 if (systemcfg->platform & PLATFORM_LPAR)
                         ret = pSeries_lpar_hpte_insert(hpteg, va,
                                 virt_to_abs(addr) >> PAGE_SHIFT,
                                 vflags, tmp_mode);
                 else
-#endif /* CONFIG_PPC_PSERIES */
+#endif
+#ifdef CONFIG_PPC_MULTIPLATFORM
                         ret = native_hpte_insert(hpteg, va,
                                 virt_to_abs(addr) >> PAGE_SHIFT,
                                 vflags, tmp_mode);
+#endif
 
                 if (ret == -1) {
                         ppc64_terminate_msg(0x20, "create_pte_mapping");
@@ -147,6 +155,27 @@ static inline void create_pte_mapping(unsigned long start, unsigned long end,
         }
 }
 
+static unsigned long get_hashtable_size(void)
+{
+        unsigned long rnd_mem_size, pteg_count;
+
+        /* If hash size wasn't obtained in prom.c, we calculate it now based on
+         * the total RAM size
+         */
+        if (ppc64_pft_size)
+                return 1UL << ppc64_pft_size;
+
+        /* round mem_size up to next power of 2 */
+        rnd_mem_size = 1UL << __ilog2(systemcfg->physicalMemorySize);
+        if (rnd_mem_size < systemcfg->physicalMemorySize)
+                rnd_mem_size <<= 1;
+
+        /* # pages / 2 */
+        pteg_count = max(rnd_mem_size >> (12 + 1), 1UL << 11);
+
+        return pteg_count << 7;
+}
+
 void __init htab_initialize(void)
 {
         unsigned long table, htab_size_bytes;
@@ -162,7 +191,7 @@ void __init htab_initialize(void)
          * Calculate the required size of the htab.  We want the number of
          * PTEGs to equal one half the number of real pages.
          */ 
-        htab_size_bytes = 1UL << ppc64_pft_size;
+        htab_size_bytes = get_hashtable_size();
         pteg_count = htab_size_bytes >> 7;
 
         /* For debug, make the HTAB 1/8 as big as it normally would be. */
@@ -261,7 +290,6 @@ void __init htab_initialize(void)
 }
 #undef KB
 #undef MB
-#endif /* CONFIG_PPC_MULTIPLATFORM */
 
 /*
  * Called by asm hashtable.S for doing lazy icache flush
@@ -355,18 +383,11 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
         return ret;
 }
 
-void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
-                     int local)
+void flush_hash_page(unsigned long va, pte_t pte, int local)
 {
-        unsigned long vsid, vpn, va, hash, secondary, slot;
+        unsigned long vpn, hash, secondary, slot;
         unsigned long huge = pte_huge(pte);
 
-        if (ea < KERNELBASE)
-                vsid = get_vsid(context, ea);
-        else
-                vsid = get_kernel_vsid(ea);
-
-        va = (vsid << 28) | (ea & 0x0fffffff);
         if (huge)
                 vpn = va >> HPAGE_SHIFT;
         else
@@ -381,17 +402,17 @@ void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
         ppc_md.hpte_invalidate(slot, va, huge, local);
 }
 
-void flush_hash_range(unsigned long context, unsigned long number, int local)
+void flush_hash_range(unsigned long number, int local)
 {
         if (ppc_md.flush_hash_range) {
-                ppc_md.flush_hash_range(context, number, local);
+                ppc_md.flush_hash_range(number, local);
         } else {
                 int i;
-                struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
+                struct ppc64_tlb_batch *batch =
+                        &__get_cpu_var(ppc64_tlb_batch);
 
                 for (i = 0; i < number; i++)
-                        flush_hash_page(context, batch->addr[i], batch->pte[i],
-                                        local);
+                        flush_hash_page(batch->vaddr[i], batch->pte[i], local);
         }
 }
 
diff --git a/arch/ppc64/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 0ea0994ed974..0ea0994ed974 100644
--- a/arch/ppc64/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
diff --git a/arch/ppc64/mm/imalloc.c b/arch/powerpc/mm/imalloc.c
index f4ca29cf5364..f4ca29cf5364 100644
--- a/arch/ppc64/mm/imalloc.c
+++ b/arch/powerpc/mm/imalloc.c
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
new file mode 100644
index 000000000000..4612a79dfb6e
--- /dev/null
+++ b/arch/powerpc/mm/init_32.c
@@ -0,0 +1,254 @@
+/*
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *  PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/initrd.h>
+#include <linux/pagemap.h>
+
+#include <asm/pgalloc.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/btext.h>
+#include <asm/tlb.h>
+#include <asm/prom.h>
+#include <asm/lmb.h>
+#include <asm/sections.h>
+
+#include "mmu_decl.h"
+
+#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
+/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */
+#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - KERNELBASE))
+#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
+#endif
+#endif
+#define MAX_LOW_MEM     CONFIG_LOWMEM_SIZE
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+unsigned long total_memory;
+unsigned long total_lowmem;
+
+unsigned long ppc_memstart;
+unsigned long ppc_memoffset = PAGE_OFFSET;
+
+int boot_mapsize;
+#ifdef CONFIG_PPC_PMAC
+unsigned long agp_special_page;
+EXPORT_SYMBOL(agp_special_page);
+#endif
+
+#ifdef CONFIG_HIGHMEM
+pte_t *kmap_pte;
+pgprot_t kmap_prot;
+
+EXPORT_SYMBOL(kmap_prot);
+EXPORT_SYMBOL(kmap_pte);
+#endif
+
+void MMU_init(void);
+
+/* XXX should be in current.h  -- paulus */
+extern struct task_struct *current_set[NR_CPUS];
+
+char *klimit = _end;
+struct device_node *memory_node;
+
+extern int init_bootmem_done;
+
+/*
+ * this tells the system to map all of ram with the segregs
+ * (i.e. page tables) instead of the bats.
+ * -- Cort
+ */
+int __map_without_bats;
+int __map_without_ltlbs;
+
+/* max amount of low RAM to map in */
+unsigned long __max_low_memory = MAX_LOW_MEM;
+
+/*
+ * limit of what is accessible with initial MMU setup -
+ * 256MB usually, but only 16MB on 601.
+ */
+unsigned long __initial_memory_limit = 0x10000000;
+
+/*
+ * Check for command-line options that affect what MMU_init will do.
+ */
+void MMU_setup(void)
+{
+        /* Check for nobats option (used in mapin_ram). */
+        if (strstr(cmd_line, "nobats")) {
+                __map_without_bats = 1;
+        }
+
+        if (strstr(cmd_line, "noltlbs")) {
+                __map_without_ltlbs = 1;
+        }
+}
+
+/*
+ * MMU_init sets up the basic memory mappings for the kernel,
+ * including both RAM and possibly some I/O regions,
+ * and sets up the page tables and the MMU hardware ready to go.
+ */
+void __init MMU_init(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("MMU:enter", 0x111);
+
+        /* 601 can only access 16MB at the moment */
+        if (PVR_VER(mfspr(SPRN_PVR)) == 1)
+                __initial_memory_limit = 0x01000000;
+
+        /* parse args from command line */
+        MMU_setup();
+
+        if (lmb.memory.cnt > 1) {
+                lmb.memory.cnt = 1;
+                lmb_analyze();
+                printk(KERN_WARNING "Only using first contiguous memory region");
+        }
+
+        total_memory = lmb_end_of_DRAM();
+        total_lowmem = total_memory;
+
+#ifdef CONFIG_FSL_BOOKE
+        /* Freescale Book-E parts expect lowmem to be mapped by fixed TLB
+         * entries, so we need to adjust lowmem to match the amount we can map
+         * in the fixed entries */
+        adjust_total_lowmem();
+#endif /* CONFIG_FSL_BOOKE */
+
+        if (total_lowmem > __max_low_memory) {
+                total_lowmem = __max_low_memory;
+#ifndef CONFIG_HIGHMEM
+                total_memory = total_lowmem;
+                lmb_enforce_memory_limit(total_lowmem);
+                lmb_analyze();
+#endif /* CONFIG_HIGHMEM */
+        }
+
+        /* Initialize the MMU hardware */
+        if (ppc_md.progress)
+                ppc_md.progress("MMU:hw init", 0x300);
+        MMU_init_hw();
+
+        /* Map in all of RAM starting at KERNELBASE */
+        if (ppc_md.progress)
+                ppc_md.progress("MMU:mapin", 0x301);
+        mapin_ram();
+
+#ifdef CONFIG_HIGHMEM
+        ioremap_base = PKMAP_BASE;
+#else
+        ioremap_base = 0xfe000000UL;    /* for now, could be 0xfffff000 */
+#endif /* CONFIG_HIGHMEM */
+        ioremap_bot = ioremap_base;
+
+        /* Map in I/O resources */
+        if (ppc_md.progress)
+                ppc_md.progress("MMU:setio", 0x302);
+        if (ppc_md.setup_io_mappings)
+                ppc_md.setup_io_mappings();
+
+        /* Initialize the context management stuff */
+        mmu_context_init();
+
+        if (ppc_md.progress)
+                ppc_md.progress("MMU:exit", 0x211);
+}
+
+/* This is only called until mem_init is done. */
+void __init *early_get_page(void)
+{
+        void *p;
+
+        if (init_bootmem_done) {
+                p = alloc_bootmem_pages(PAGE_SIZE);
+        } else {
+                p = __va(lmb_alloc_base(PAGE_SIZE, PAGE_SIZE,
+                                        __initial_memory_limit));
+        }
+        return p;
+}
+
+/* Free up now-unused memory */
+static void free_sec(unsigned long start, unsigned long end, const char *name)
+{
+        unsigned long cnt = 0;
+
+        while (start < end) {
+                ClearPageReserved(virt_to_page(start));
+                set_page_count(virt_to_page(start), 1);
+                free_page(start);
+                cnt++;
+                start += PAGE_SIZE;
+        }
+        if (cnt) {
+                printk(" %ldk %s", cnt << (PAGE_SHIFT - 10), name);
+                totalram_pages += cnt;
+        }
+}
+
+void free_initmem(void)
+{
+#define FREESEC(TYPE) \
+        free_sec((unsigned long)(&__ ## TYPE ## _begin), \
+                 (unsigned long)(&__ ## TYPE ## _end), \
+                 #TYPE);
+
+        printk ("Freeing unused kernel memory:");
+        FREESEC(init);
+        printk("\n");
+        ppc_md.progress = NULL;
+#undef FREESEC
+}
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+        if (start < end)
+                printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
+        for (; start < end; start += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(start));
+                set_page_count(virt_to_page(start), 1);
+                free_page(start);
+                totalram_pages++;
+        }
+}
+#endif
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
new file mode 100644
index 000000000000..b0fc822ec29f
--- /dev/null
+++ b/arch/powerpc/mm/init_64.c
@@ -0,0 +1,223 @@
+/*
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  Dave Engebretsen <engebret@us.ibm.com>
+ *      Rework for PPC64 port.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/stddef.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/idr.h>
+#include <linux/nodemask.h>
+#include <linux/module.h>
+
+#include <asm/pgalloc.h>
+#include <asm/page.h>
+#include <asm/prom.h>
+#include <asm/lmb.h>
+#include <asm/rtas.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/uaccess.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/tlb.h>
+#include <asm/eeh.h>
+#include <asm/processor.h>
+#include <asm/mmzone.h>
+#include <asm/cputable.h>
+#include <asm/ppcdebug.h>
+#include <asm/sections.h>
+#include <asm/system.h>
+#include <asm/iommu.h>
+#include <asm/abs_addr.h>
+#include <asm/vdso.h>
+#include <asm/imalloc.h>
+
+#if PGTABLE_RANGE > USER_VSID_RANGE
+#warning Limited user VSID range means pagetable space is wasted
+#endif
+
+#if (TASK_SIZE_USER64 < PGTABLE_RANGE) && (TASK_SIZE_USER64 < USER_VSID_RANGE)
+#warning TASK_SIZE is smaller than it needs to be.
+#endif
+
+unsigned long klimit = (unsigned long)_end;
+
+/* max amount of RAM to use */
+unsigned long __max_memory;
+
+/* info on what we think the IO hole is */
+unsigned long   io_hole_start;
+unsigned long   io_hole_size;
+
+/*
+ * Do very early mm setup.
+ */
+void __init mm_init_ppc64(void)
+{
+#ifndef CONFIG_PPC_ISERIES
+        unsigned long i;
+#endif
+
+        ppc64_boot_msg(0x100, "MM Init");
+
+        /* This is the story of the IO hole... please, keep seated,
+         * unfortunately, we are out of oxygen masks at the moment.
+         * So we need some rough way to tell where your big IO hole
+         * is. On pmac, it's between 2G and 4G, on POWER3, it's around
+         * that area as well, on POWER4 we don't have one, etc...
+         * We need that as a "hint" when sizing the TCE table on POWER3
+         * So far, the simplest way that seem work well enough for us it
+         * to just assume that the first discontinuity in our physical
+         * RAM layout is the IO hole. That may not be correct in the future
+         * (and isn't on iSeries but then we don't care ;)
+         */
+
+#ifndef CONFIG_PPC_ISERIES
+        for (i = 1; i < lmb.memory.cnt; i++) {
+                unsigned long base, prevbase, prevsize;
+
+                prevbase = lmb.memory.region[i-1].base;
+                prevsize = lmb.memory.region[i-1].size;
+                base = lmb.memory.region[i].base;
+                if (base > (prevbase + prevsize)) {
+                        io_hole_start = prevbase + prevsize;
+                        io_hole_size = base  - (prevbase + prevsize);
+                        break;
+                }
+        }
+#endif /* CONFIG_PPC_ISERIES */
+        if (io_hole_start)
+                printk("IO Hole assumed to be %lx -> %lx\n",
+                       io_hole_start, io_hole_start + io_hole_size - 1);
+
+        ppc64_boot_msg(0x100, "MM Init Done");
+}
+
+void free_initmem(void)
+{
+        unsigned long addr;
+
+        addr = (unsigned long)__init_begin;
+        for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) {
+                memset((void *)addr, 0xcc, PAGE_SIZE);
+                ClearPageReserved(virt_to_page(addr));
+                set_page_count(virt_to_page(addr), 1);
+                free_page(addr);
+                totalram_pages++;
+        }
+        printk ("Freeing unused kernel memory: %luk freed\n",
+                ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10);
+}
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+        if (start < end)
+                printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
+        for (; start < end; start += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(start));
+                set_page_count(virt_to_page(start), 1);
+                free_page(start);
+                totalram_pages++;
+        }
+}
+#endif
+
+static struct kcore_list kcore_vmem;
+
+static int __init setup_kcore(void)
+{
+        int i;
+
+        for (i=0; i < lmb.memory.cnt; i++) {
+                unsigned long base, size;
+                struct kcore_list *kcore_mem;
+
+                base = lmb.memory.region[i].base;
+                size = lmb.memory.region[i].size;
+
+                /* GFP_ATOMIC to avoid might_sleep warnings during boot */
+                kcore_mem = kmalloc(sizeof(struct kcore_list), GFP_ATOMIC);
+                if (!kcore_mem)
+                        panic("mem_init: kmalloc failed\n");
+
+                kclist_add(kcore_mem, __va(base), size);
+        }
+
+        kclist_add(&kcore_vmem, (void *)VMALLOC_START, VMALLOC_END-VMALLOC_START);
+
+        return 0;
+}
+module_init(setup_kcore);
+
+static void zero_ctor(void *addr, kmem_cache_t *cache, unsigned long flags)
+{
+        memset(addr, 0, kmem_cache_size(cache));
+}
+
+static const int pgtable_cache_size[2] = {
+        PTE_TABLE_SIZE, PMD_TABLE_SIZE
+};
+static const char *pgtable_cache_name[ARRAY_SIZE(pgtable_cache_size)] = {
+        "pgd_pte_cache", "pud_pmd_cache",
+};
+
+kmem_cache_t *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)];
+
+void pgtable_cache_init(void)
+{
+        int i;
+
+        BUILD_BUG_ON(PTE_TABLE_SIZE != pgtable_cache_size[PTE_CACHE_NUM]);
+        BUILD_BUG_ON(PMD_TABLE_SIZE != pgtable_cache_size[PMD_CACHE_NUM]);
+        BUILD_BUG_ON(PUD_TABLE_SIZE != pgtable_cache_size[PUD_CACHE_NUM]);
+        BUILD_BUG_ON(PGD_TABLE_SIZE != pgtable_cache_size[PGD_CACHE_NUM]);
+
+        for (i = 0; i < ARRAY_SIZE(pgtable_cache_size); i++) {
+                int size = pgtable_cache_size[i];
+                const char *name = pgtable_cache_name[i];
+
+                pgtable_cache[i] = kmem_cache_create(name,
+                                                     size, size,
+                                                     SLAB_HWCACHE_ALIGN
+                                                     | SLAB_MUST_HWCACHE_ALIGN,
+                                                     zero_ctor,
+                                                     NULL);
+                if (! pgtable_cache[i])
+                        panic("pgtable_cache_init(): could not create %s!\n",
+                              name);
+        }
+}
diff --git a/arch/ppc64/kernel/lmb.c b/arch/powerpc/mm/lmb.c
index 5adaca2ddc9d..9b5aa6808eb8 100644
--- a/arch/ppc64/kernel/lmb.c
+++ b/arch/powerpc/mm/lmb.c
@@ -1,5 +1,5 @@
 /*
- * Procedures for interfacing to Open Firmware.
+ * Procedures for maintaining information about logical memory blocks.
  *
  * Peter Bergner, IBM Corp.     June 2001.
  * Copyright (C) 2001 Peter Bergner.
@@ -18,7 +18,9 @@
 #include <asm/page.h>
 #include <asm/prom.h>
 #include <asm/lmb.h>
-#include <asm/abs_addr.h>
+#ifdef CONFIG_PPC32
+#include "mmu_decl.h"           /* for __max_low_memory */
+#endif
 
 struct lmb lmb;
 
@@ -54,16 +56,14 @@ void lmb_dump_all(void)
 #endif /* DEBUG */
 }
 
-static unsigned long __init
-lmb_addrs_overlap(unsigned long base1, unsigned long size1,
-                  unsigned long base2, unsigned long size2)
+static unsigned long __init lmb_addrs_overlap(unsigned long base1,
+                unsigned long size1, unsigned long base2, unsigned long size2)
 {
         return ((base1 < (base2+size2)) && (base2 < (base1+size1)));
 }
 
-static long __init
-lmb_addrs_adjacent(unsigned long base1, unsigned long size1,
-                   unsigned long base2, unsigned long size2)
+static long __init lmb_addrs_adjacent(unsigned long base1, unsigned long size1,
+                unsigned long base2, unsigned long size2)
 {
         if (base2 == base1 + size1)
                 return 1;
@@ -73,8 +73,8 @@ lmb_addrs_adjacent(unsigned long base1, unsigned long size1,
         return 0;
 }
 
-static long __init
-lmb_regions_adjacent(struct lmb_region *rgn, unsigned long r1, unsigned long r2)
+static long __init lmb_regions_adjacent(struct lmb_region *rgn,
+                unsigned long r1, unsigned long r2)
 {
         unsigned long base1 = rgn->region[r1].base;
         unsigned long size1 = rgn->region[r1].size;
@@ -85,8 +85,8 @@ lmb_regions_adjacent(struct lmb_region *rgn, unsigned long r1, unsigned long r2)
 }
 
 /* Assumption: base addr of region 1 < base addr of region 2 */
-static void __init
-lmb_coalesce_regions(struct lmb_region *rgn, unsigned long r1, unsigned long r2)
+static void __init lmb_coalesce_regions(struct lmb_region *rgn,
+                unsigned long r1, unsigned long r2)
 {
         unsigned long i;
 
@@ -99,8 +99,7 @@ lmb_coalesce_regions(struct lmb_region *rgn, unsigned long r1, unsigned long r2)
 }
 
 /* This routine called with relocation disabled. */
-void __init
-lmb_init(void)
+void __init lmb_init(void)
 {
         /* Create a dummy zero size LMB which will get coalesced away later.
          * This simplifies the lmb_add() code below...
@@ -115,9 +114,8 @@ lmb_init(void)
         lmb.reserved.cnt = 1;
 }
 
-/* This routine called with relocation disabled. */
-void __init
-lmb_analyze(void)
+/* This routine may be called with relocation disabled. */
+void __init lmb_analyze(void)
 {
         int i;
 
@@ -128,8 +126,8 @@ lmb_analyze(void)
 }
 
 /* This routine called with relocation disabled. */
-static long __init
-lmb_add_region(struct lmb_region *rgn, unsigned long base, unsigned long size)
+static long __init lmb_add_region(struct lmb_region *rgn, unsigned long base,
+                                  unsigned long size)
 {
         unsigned long i, coalesced = 0;
         long adjacent;
@@ -158,18 +156,17 @@ lmb_add_region(struct lmb_region *rgn, unsigned long base, unsigned long size)
                 coalesced++;
         }
 
-        if ( coalesced ) {
+        if (coalesced)
                 return coalesced;
-        } else if ( rgn->cnt >= MAX_LMB_REGIONS ) {
+        if (rgn->cnt >= MAX_LMB_REGIONS)
                 return -1;
-        }
 
         /* Couldn't coalesce the LMB, so add it to the sorted table. */
-        for (i=rgn->cnt-1; i >= 0; i--) {
+        for (i = rgn->cnt-1; i >= 0; i--) {
                 if (base < rgn->region[i].base) {
                         rgn->region[i+1].base = rgn->region[i].base;
                         rgn->region[i+1].size = rgn->region[i].size;
-                }  else {
+                } else {
                         rgn->region[i+1].base = base;
                         rgn->region[i+1].size = size;
                         break;
@@ -180,30 +177,28 @@ lmb_add_region(struct lmb_region *rgn, unsigned long base, unsigned long size)
         return 0;
 }
 
-/* This routine called with relocation disabled. */
-long __init
-lmb_add(unsigned long base, unsigned long size)
+/* This routine may be called with relocation disabled. */
+long __init lmb_add(unsigned long base, unsigned long size)
 {
         struct lmb_region *_rgn = &(lmb.memory);
 
         /* On pSeries LPAR systems, the first LMB is our RMO region. */
-        if ( base == 0 )
+        if (base == 0)
                 lmb.rmo_size = size;
 
         return lmb_add_region(_rgn, base, size);
 
 }
 
-long __init
-lmb_reserve(unsigned long base, unsigned long size)
+long __init lmb_reserve(unsigned long base, unsigned long size)
 {
         struct lmb_region *_rgn = &(lmb.reserved);
 
         return lmb_add_region(_rgn, base, size);
 }
 
-long __init
-lmb_overlaps_region(struct lmb_region *rgn, unsigned long base, unsigned long size)
+long __init lmb_overlaps_region(struct lmb_region *rgn, unsigned long base,
+                                unsigned long size)
 {
         unsigned long i;
 
@@ -218,39 +213,44 @@ lmb_overlaps_region(struct lmb_region *rgn, unsigned long base, unsigned long si
         return (i < rgn->cnt) ? i : -1;
 }
 
-unsigned long __init
-lmb_alloc(unsigned long size, unsigned long align)
+unsigned long __init lmb_alloc(unsigned long size, unsigned long align)
 {
         return lmb_alloc_base(size, align, LMB_ALLOC_ANYWHERE);
 }
 
-unsigned long __init
-lmb_alloc_base(unsigned long size, unsigned long align, unsigned long max_addr)
+unsigned long __init lmb_alloc_base(unsigned long size, unsigned long align,
+                                    unsigned long max_addr)
 {
         long i, j;
         unsigned long base = 0;
 
-        for (i=lmb.memory.cnt-1; i >= 0; i--) {
+#ifdef CONFIG_PPC32
+        /* On 32-bit, make sure we allocate lowmem */
+        if (max_addr == LMB_ALLOC_ANYWHERE)
+                max_addr = __max_low_memory;
+#endif
+        for (i = lmb.memory.cnt-1; i >= 0; i--) {
                 unsigned long lmbbase = lmb.memory.region[i].base;
                 unsigned long lmbsize = lmb.memory.region[i].size;
 
-                if ( max_addr == LMB_ALLOC_ANYWHERE )
-                        base = _ALIGN_DOWN(lmbbase+lmbsize-size, align);
-                else if ( lmbbase < max_addr )
-                        base = _ALIGN_DOWN(min(lmbbase+lmbsize,max_addr)-size, align);
-                else
+                if (max_addr == LMB_ALLOC_ANYWHERE)
+                        base = _ALIGN_DOWN(lmbbase + lmbsize - size, align);
+                else if (lmbbase < max_addr) {
+                        base = min(lmbbase + lmbsize, max_addr);
+                        base = _ALIGN_DOWN(base - size, align);
+                } else
                         continue;
 
-                while ( (lmbbase <= base) &&
-                        ((j = lmb_overlaps_region(&lmb.reserved,base,size)) >= 0) ) {
-                        base = _ALIGN_DOWN(lmb.reserved.region[j].base-size, align);
-                }
+                while ((lmbbase <= base) &&
+                       ((j = lmb_overlaps_region(&lmb.reserved, base, size)) >= 0) )
+                        base = _ALIGN_DOWN(lmb.reserved.region[j].base - size,
+                                           align);
 
-                if ( (base != 0) && (lmbbase <= base) )
+                if ((base != 0) && (lmbbase <= base))
                         break;
         }
 
-        if ( i < 0 )
+        if (i < 0)
                 return 0;
 
         lmb_add_region(&lmb.reserved, base, size);
@@ -259,14 +259,12 @@ lmb_alloc_base(unsigned long size, unsigned long align, unsigned long max_addr)
 }
 
 /* You must call lmb_analyze() before this. */
-unsigned long __init
-lmb_phys_mem_size(void)
+unsigned long __init lmb_phys_mem_size(void)
 {
         return lmb.memory.size;
 }
 
-unsigned long __init
-lmb_end_of_DRAM(void)
+unsigned long __init lmb_end_of_DRAM(void)
 {
         int idx = lmb.memory.cnt - 1;
 
@@ -277,9 +275,8 @@ lmb_end_of_DRAM(void)
  * Truncate the lmb list to memory_limit if it's set
  * You must call lmb_analyze() after this.
  */
-void __init lmb_enforce_memory_limit(void)
+void __init lmb_enforce_memory_limit(unsigned long memory_limit)
 {
-        extern unsigned long memory_limit;
         unsigned long i, limit;
 
         if (! memory_limit)
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
new file mode 100644
index 000000000000..117b00012e14
--- /dev/null
+++ b/arch/powerpc/mm/mem.c
@@ -0,0 +1,564 @@
+/*
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *  PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/initrd.h>
+#include <linux/pagemap.h>
+
+#include <asm/pgalloc.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/btext.h>
+#include <asm/tlb.h>
+#include <asm/prom.h>
+#include <asm/lmb.h>
+#include <asm/sections.h>
+#ifdef CONFIG_PPC64
+#include <asm/vdso.h>
+#endif
+
+#include "mmu_decl.h"
+
+#ifndef CPU_FTR_COHERENT_ICACHE
+#define CPU_FTR_COHERENT_ICACHE 0       /* XXX for now */
+#define CPU_FTR_NOEXECUTE       0
+#endif
+
+int init_bootmem_done;
+int mem_init_done;
+unsigned long memory_limit;
+
+/*
+ * This is called by /dev/mem to know if a given address has to
+ * be mapped non-cacheable or not
+ */
+int page_is_ram(unsigned long pfn)
+{
+        unsigned long paddr = (pfn << PAGE_SHIFT);
+
+#ifndef CONFIG_PPC64    /* XXX for now */
+        return paddr < __pa(high_memory);
+#else
+        int i;
+        for (i=0; i < lmb.memory.cnt; i++) {
+                unsigned long base;
+
+                base = lmb.memory.region[i].base;
+
+                if ((paddr >= base) &&
+                        (paddr < (base + lmb.memory.region[i].size))) {
+                        return 1;
+                }
+        }
+
+        return 0;
+#endif
+}
+EXPORT_SYMBOL(page_is_ram);
+
+pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
+                              unsigned long size, pgprot_t vma_prot)
+{
+        if (ppc_md.phys_mem_access_prot)
+                return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
+
+        if (!page_is_ram(pfn))
+                vma_prot = __pgprot(pgprot_val(vma_prot)
+                                    | _PAGE_GUARDED | _PAGE_NO_CACHE);
+        return vma_prot;
+}
+EXPORT_SYMBOL(phys_mem_access_prot);
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+
+void online_page(struct page *page)
+{
+        ClearPageReserved(page);
+        free_cold_page(page);
+        totalram_pages++;
+        num_physpages++;
+}
+
+/*
+ * This works only for the non-NUMA case.  Later, we'll need a lookup
+ * to convert from real physical addresses to nid, that doesn't use
+ * pfn_to_nid().
+ */
+int __devinit add_memory(u64 start, u64 size)
+{
+        struct pglist_data *pgdata = NODE_DATA(0);
+        struct zone *zone;
+        unsigned long start_pfn = start >> PAGE_SHIFT;
+        unsigned long nr_pages = size >> PAGE_SHIFT;
+
+        /* this should work for most non-highmem platforms */
+        zone = pgdata->node_zones;
+
+        return __add_pages(zone, start_pfn, nr_pages);
+
+        return 0;
+}
+
+/*
+ * First pass at this code will check to determine if the remove
+ * request is within the RMO.  Do not allow removal within the RMO.
+ */
+int __devinit remove_memory(u64 start, u64 size)
+{
+        struct zone *zone;
+        unsigned long start_pfn, end_pfn, nr_pages;
+
+        start_pfn = start >> PAGE_SHIFT;
+        nr_pages = size >> PAGE_SHIFT;
+        end_pfn = start_pfn + nr_pages;
+
+        printk("%s(): Attempting to remove memoy in range "
+                        "%lx to %lx\n", __func__, start, start+size);
+        /*
+         * check for range within RMO
+         */
+        zone = page_zone(pfn_to_page(start_pfn));
+
+        printk("%s(): memory will be removed from "
+                        "the %s zone\n", __func__, zone->name);
+
+        /*
+         * not handling removing memory ranges that
+         * overlap multiple zones yet
+         */
+        if (end_pfn > (zone->zone_start_pfn + zone->spanned_pages))
+                goto overlap;
+
+        /* make sure it is NOT in RMO */
+        if ((start < lmb.rmo_size) || ((start+size) < lmb.rmo_size)) {
+                printk("%s(): range to be removed must NOT be in RMO!\n",
+                        __func__);
+                goto in_rmo;
+        }
+
+        return __remove_pages(zone, start_pfn, nr_pages);
+
+overlap:
+        printk("%s(): memory range to be removed overlaps "
+                "multiple zones!!!\n", __func__);
+in_rmo:
+        return -1;
+}
+#endif /* CONFIG_MEMORY_HOTPLUG */
+
+void show_mem(void)
+{
+        unsigned long total = 0, reserved = 0;
+        unsigned long shared = 0, cached = 0;
+        unsigned long highmem = 0;
+        struct page *page;
+        pg_data_t *pgdat;
+        unsigned long i;
+
+        printk("Mem-info:\n");
+        show_free_areas();
+        printk("Free swap:       %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
+        for_each_pgdat(pgdat) {
+                unsigned long flags;
+                pgdat_resize_lock(pgdat, &flags);
+                for (i = 0; i < pgdat->node_spanned_pages; i++) {
+                        page = pgdat_page_nr(pgdat, i);
+                        total++;
+                        if (PageHighMem(page))
+                                highmem++;
+                        if (PageReserved(page))
+                                reserved++;
+                        else if (PageSwapCache(page))
+                                cached++;
+                        else if (page_count(page))
+                                shared += page_count(page) - 1;
+                }
+                pgdat_resize_unlock(pgdat, &flags);
+        }
+        printk("%ld pages of RAM\n", total);
+#ifdef CONFIG_HIGHMEM
+        printk("%ld pages of HIGHMEM\n", highmem);
+#endif
+        printk("%ld reserved pages\n", reserved);
+        printk("%ld pages shared\n", shared);
+        printk("%ld pages swap cached\n", cached);
+}
+
+/*
+ * Initialize the bootmem system and give it all the memory we
+ * have available.  If we are using highmem, we only put the
+ * lowmem into the bootmem system.
+ */
+#ifndef CONFIG_NEED_MULTIPLE_NODES
+void __init do_init_bootmem(void)
+{
+        unsigned long i;
+        unsigned long start, bootmap_pages;
+        unsigned long total_pages;
+        int boot_mapsize;
+
+        max_pfn = total_pages = lmb_end_of_DRAM() >> PAGE_SHIFT;
+#ifdef CONFIG_HIGHMEM
+        total_pages = total_lowmem >> PAGE_SHIFT;
+#endif
+
+        /*
+         * Find an area to use for the bootmem bitmap.  Calculate the size of
+         * bitmap required as (Total Memory) / PAGE_SIZE / BITS_PER_BYTE.
+         * Add 1 additional page in case the address isn't page-aligned.
+         */
+        bootmap_pages = bootmem_bootmap_pages(total_pages);
+
+        start = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
+        BUG_ON(!start);
+
+        boot_mapsize = init_bootmem(start >> PAGE_SHIFT, total_pages);
+
+        /* Add all physical memory to the bootmem map, mark each area
+         * present.
+         */
+        for (i = 0; i < lmb.memory.cnt; i++) {
+                unsigned long base = lmb.memory.region[i].base;
+                unsigned long size = lmb_size_bytes(&lmb.memory, i);
+#ifdef CONFIG_HIGHMEM
+                if (base >= total_lowmem)
+                        continue;
+                if (base + size > total_lowmem)
+                        size = total_lowmem - base;
+#endif
+                free_bootmem(base, size);
+        }
+
+        /* reserve the sections we're already using */
+        for (i = 0; i < lmb.reserved.cnt; i++)
+                reserve_bootmem(lmb.reserved.region[i].base,
+                                lmb_size_bytes(&lmb.reserved, i));
+
+        /* XXX need to clip this if using highmem? */
+        for (i = 0; i < lmb.memory.cnt; i++)
+                memory_present(0, lmb_start_pfn(&lmb.memory, i),
+                               lmb_end_pfn(&lmb.memory, i));
+        init_bootmem_done = 1;
+}
+
+/*
+ * paging_init() sets up the page tables - in fact we've already done this.
+ */
+void __init paging_init(void)
+{
+        unsigned long zones_size[MAX_NR_ZONES];
+        unsigned long zholes_size[MAX_NR_ZONES];
+        unsigned long total_ram = lmb_phys_mem_size();
+        unsigned long top_of_ram = lmb_end_of_DRAM();
+
+#ifdef CONFIG_HIGHMEM
+        map_page(PKMAP_BASE, 0, 0);     /* XXX gross */
+        pkmap_page_table = pte_offset_kernel(pmd_offset(pgd_offset_k
+                        (PKMAP_BASE), PKMAP_BASE), PKMAP_BASE);
+        map_page(KMAP_FIX_BEGIN, 0, 0); /* XXX gross */
+        kmap_pte = pte_offset_kernel(pmd_offset(pgd_offset_k
+                        (KMAP_FIX_BEGIN), KMAP_FIX_BEGIN), KMAP_FIX_BEGIN);
+        kmap_prot = PAGE_KERNEL;
+#endif /* CONFIG_HIGHMEM */
+
+        printk(KERN_INFO "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
+               top_of_ram, total_ram);
+        printk(KERN_INFO "Memory hole size: %ldMB\n",
+               (top_of_ram - total_ram) >> 20);
+        /*
+         * All pages are DMA-able so we put them all in the DMA zone.
+         */
+        memset(zones_size, 0, sizeof(zones_size));
+        memset(zholes_size, 0, sizeof(zholes_size));
+
+        zones_size[ZONE_DMA] = top_of_ram >> PAGE_SHIFT;
+        zholes_size[ZONE_DMA] = (top_of_ram - total_ram) >> PAGE_SHIFT;
+
+#ifdef CONFIG_HIGHMEM
+        zones_size[ZONE_DMA] = total_lowmem >> PAGE_SHIFT;
+        zones_size[ZONE_HIGHMEM] = (total_memory - total_lowmem) >> PAGE_SHIFT;
+        zholes_size[ZONE_HIGHMEM] = (top_of_ram - total_ram) >> PAGE_SHIFT;
+#else
+        zones_size[ZONE_DMA] = top_of_ram >> PAGE_SHIFT;
+        zholes_size[ZONE_DMA] = (top_of_ram - total_ram) >> PAGE_SHIFT;
+#endif /* CONFIG_HIGHMEM */
+
+        free_area_init_node(0, NODE_DATA(0), zones_size,
+                            __pa(PAGE_OFFSET) >> PAGE_SHIFT, zholes_size);
+}
+#endif /* ! CONFIG_NEED_MULTIPLE_NODES */
+
+void __init mem_init(void)
+{
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+        int nid;
+#endif
+        pg_data_t *pgdat;
+        unsigned long i;
+        struct page *page;
+        unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
+
+        num_physpages = max_pfn;        /* RAM is assumed contiguous */
+        high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
+
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+        for_each_online_node(nid) {
+                if (NODE_DATA(nid)->node_spanned_pages != 0) {
+                        printk("freeing bootmem node %x\n", nid);
+                        totalram_pages +=
+                                free_all_bootmem_node(NODE_DATA(nid));
+                }
+        }
+#else
+        max_mapnr = num_physpages;
+        totalram_pages += free_all_bootmem();
+#endif
+        for_each_pgdat(pgdat) {
+                for (i = 0; i < pgdat->node_spanned_pages; i++) {
+                        page = pgdat_page_nr(pgdat, i);
+                        if (PageReserved(page))
+                                reservedpages++;
+                }
+        }
+
+        codesize = (unsigned long)&_sdata - (unsigned long)&_stext;
+        datasize = (unsigned long)&__init_begin - (unsigned long)&_sdata;
+        initsize = (unsigned long)&__init_end - (unsigned long)&__init_begin;
+        bsssize = (unsigned long)&__bss_stop - (unsigned long)&__bss_start;
+
+#ifdef CONFIG_HIGHMEM
+        {
+                unsigned long pfn, highmem_mapnr;
+
+                highmem_mapnr = total_lowmem >> PAGE_SHIFT;
+                for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
+                        struct page *page = pfn_to_page(pfn);
+
+                        ClearPageReserved(page);
+                        set_page_count(page, 1);
+                        __free_page(page);
+                        totalhigh_pages++;
+                }
+                totalram_pages += totalhigh_pages;
+                printk(KERN_INFO "High memory: %luk\n",
+                       totalhigh_pages << (PAGE_SHIFT-10));
+        }
+#endif /* CONFIG_HIGHMEM */
+
+        printk(KERN_INFO "Memory: %luk/%luk available (%luk kernel code, "
+               "%luk reserved, %luk data, %luk bss, %luk init)\n",
+                (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
+                num_physpages << (PAGE_SHIFT-10),
+                codesize >> 10,
+                reservedpages << (PAGE_SHIFT-10),
+                datasize >> 10,
+                bsssize >> 10,
+                initsize >> 10);
+
+        mem_init_done = 1;
+
+#ifdef CONFIG_PPC64
+        /* Initialize the vDSO */
+        vdso_init();
+#endif
+}
+
+/*
+ * This is called when a page has been modified by the kernel.
+ * It just marks the page as not i-cache clean.  We do the i-cache
+ * flush later when the page is given to a user process, if necessary.
+ */
+void flush_dcache_page(struct page *page)
+{
+        if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
+                return;
+        /* avoid an atomic op if possible */
+        if (test_bit(PG_arch_1, &page->flags))
+                clear_bit(PG_arch_1, &page->flags);
+}
+EXPORT_SYMBOL(flush_dcache_page);
+
+void flush_dcache_icache_page(struct page *page)
+{
+#ifdef CONFIG_BOOKE
+        void *start = kmap_atomic(page, KM_PPC_SYNC_ICACHE);
+        __flush_dcache_icache(start);
+        kunmap_atomic(start, KM_PPC_SYNC_ICACHE);
+#elif defined(CONFIG_8xx) || defined(CONFIG_PPC64)
+        /* On 8xx there is no need to kmap since highmem is not supported */
+        __flush_dcache_icache(page_address(page)); 
+#else
+        __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
+#endif
+
+}
+void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
+{
+        clear_page(page);
+
+        if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
+                return;
+        /*
+         * We shouldnt have to do this, but some versions of glibc
+         * require it (ld.so assumes zero filled pages are icache clean)
+         * - Anton
+         */
+
+        /* avoid an atomic op if possible */
+        if (test_bit(PG_arch_1, &pg->flags))
+                clear_bit(PG_arch_1, &pg->flags);
+}
+EXPORT_SYMBOL(clear_user_page);
+
+void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
+                    struct page *pg)
+{
+        copy_page(vto, vfrom);
+
+        /*
+         * We should be able to use the following optimisation, however
+         * there are two problems.
+         * Firstly a bug in some versions of binutils meant PLT sections
+         * were not marked executable.
+         * Secondly the first word in the GOT section is blrl, used
+         * to establish the GOT address. Until recently the GOT was
+         * not marked executable.
+         * - Anton
+         */
+#if 0
+        if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
+                return;
+#endif
+
+        if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
+                return;
+
+        /* avoid an atomic op if possible */
+        if (test_bit(PG_arch_1, &pg->flags))
+                clear_bit(PG_arch_1, &pg->flags);
+}
+
+void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+                             unsigned long addr, int len)
+{
+        unsigned long maddr;
+
+        maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
+        flush_icache_range(maddr, maddr + len);
+        kunmap(page);
+}
+EXPORT_SYMBOL(flush_icache_user_range);
+
+/*
+ * This is called at the end of handling a user page fault, when the
+ * fault has been handled by updating a PTE in the linux page tables.
+ * We use it to preload an HPTE into the hash table corresponding to
+ * the updated linux PTE.
+ * 
+ * This must always be called with the mm->page_table_lock held
+ */
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
+                      pte_t pte)
+{
+        /* handle i-cache coherency */
+        unsigned long pfn = pte_pfn(pte);
+#ifdef CONFIG_PPC32
+        pmd_t *pmd;
+#else
+        unsigned long vsid;
+        void *pgdir;
+        pte_t *ptep;
+        int local = 0;
+        cpumask_t tmp;
+        unsigned long flags;
+#endif
+
+        /* handle i-cache coherency */
+        if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE) &&
+            !cpu_has_feature(CPU_FTR_NOEXECUTE) &&
+            pfn_valid(pfn)) {
+                struct page *page = pfn_to_page(pfn);
+                if (!PageReserved(page)
+                    && !test_bit(PG_arch_1, &page->flags)) {
+                        if (vma->vm_mm == current->active_mm) {
+#ifdef CONFIG_8xx
+                        /* On 8xx, cache control instructions (particularly 
+                         * "dcbst" from flush_dcache_icache) fault as write 
+                         * operation if there is an unpopulated TLB entry 
+                         * for the address in question. To workaround that, 
+                         * we invalidate the TLB here, thus avoiding dcbst 
+                         * misbehaviour.
+                         */
+                                _tlbie(address);
+#endif
+                                __flush_dcache_icache((void *) address);
+                        } else
+                                flush_dcache_icache_page(page);
+                        set_bit(PG_arch_1, &page->flags);
+                }
+        }
+
+#ifdef CONFIG_PPC_STD_MMU
+        /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
+        if (!pte_young(pte) || address >= TASK_SIZE)
+                return;
+#ifdef CONFIG_PPC32
+        if (Hash == 0)
+                return;
+        pmd = pmd_offset(pgd_offset(vma->vm_mm, address), address);
+        if (!pmd_none(*pmd))
+                add_hash_page(vma->vm_mm->context, address, pmd_val(*pmd));
+#else
+        pgdir = vma->vm_mm->pgd;
+        if (pgdir == NULL)
+                return;
+
+        ptep = find_linux_pte(pgdir, address);
+        if (!ptep)
+                return;
+
+        vsid = get_vsid(vma->vm_mm->context.id, address);
+
+        local_irq_save(flags);
+        tmp = cpumask_of_cpu(smp_processor_id());
+        if (cpus_equal(vma->vm_mm->cpu_vm_mask, tmp))
+                local = 1;
+
+        __hash_page(address, 0, vsid, ptep, 0x300, local);
+        local_irq_restore(flags);
+#endif
+#endif
+}
diff --git a/arch/ppc64/mm/mmap.c b/arch/powerpc/mm/mmap.c
index fe65f522aff3..fe65f522aff3 100644
--- a/arch/ppc64/mm/mmap.c
+++ b/arch/powerpc/mm/mmap.c
diff --git a/arch/powerpc/mm/mmu_context_32.c b/arch/powerpc/mm/mmu_context_32.c
new file mode 100644
index 000000000000..a8816e0f6a86
--- /dev/null
+++ b/arch/powerpc/mm/mmu_context_32.c
@@ -0,0 +1,86 @@
+/*
+ * This file contains the routines for handling the MMU on those
+ * PowerPC implementations where the MMU substantially follows the
+ * architecture specification.  This includes the 6xx, 7xx, 7xxx,
+ * 8260, and POWER3 implementations but excludes the 8xx and 4xx.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/mmu_context.h>
+#include <asm/tlbflush.h>
+
+mm_context_t next_mmu_context;
+unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
+#ifdef FEW_CONTEXTS
+atomic_t nr_free_contexts;
+struct mm_struct *context_mm[LAST_CONTEXT+1];
+void steal_context(void);
+#endif /* FEW_CONTEXTS */
+
+/*
+ * Initialize the context management stuff.
+ */
+void __init
+mmu_context_init(void)
+{
+        /*
+         * Some processors have too few contexts to reserve one for
+         * init_mm, and require using context 0 for a normal task.
+         * Other processors reserve the use of context zero for the kernel.
+         * This code assumes FIRST_CONTEXT < 32.
+         */
+        context_map[0] = (1 << FIRST_CONTEXT) - 1;
+        next_mmu_context = FIRST_CONTEXT;
+#ifdef FEW_CONTEXTS
+        atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
+#endif /* FEW_CONTEXTS */
+}
+
+#ifdef FEW_CONTEXTS
+/*
+ * Steal a context from a task that has one at the moment.
+ * This is only used on 8xx and 4xx and we presently assume that
+ * they don't do SMP.  If they do then this will have to check
+ * whether the MM we steal is in use.
+ * We also assume that this is only used on systems that don't
+ * use an MMU hash table - this is true for 8xx and 4xx.
+ * This isn't an LRU system, it just frees up each context in
+ * turn (sort-of pseudo-random replacement :).  This would be the
+ * place to implement an LRU scheme if anyone was motivated to do it.
+ *  -- paulus
+ */
+void
+steal_context(void)
+{
+        struct mm_struct *mm;
+
+        /* free up context `next_mmu_context' */
+        /* if we shouldn't free context 0, don't... */
+        if (next_mmu_context < FIRST_CONTEXT)
+                next_mmu_context = FIRST_CONTEXT;
+        mm = context_mm[next_mmu_context];
+        flush_tlb_mm(mm);
+        destroy_context(mm);
+}
+#endif /* FEW_CONTEXTS */
diff --git a/arch/powerpc/mm/mmu_context_64.c b/arch/powerpc/mm/mmu_context_64.c
new file mode 100644
index 000000000000..714a84dd8d5d
--- /dev/null
+++ b/arch/powerpc/mm/mmu_context_64.c
@@ -0,0 +1,63 @@
+/*
+ *  MMU context allocation for 64-bit kernels.
+ *
+ *  Copyright (C) 2004 Anton Blanchard, IBM Corp. <anton@samba.org>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/spinlock.h>
+#include <linux/idr.h>
+
+#include <asm/mmu_context.h>
+
+static DEFINE_SPINLOCK(mmu_context_lock);
+static DEFINE_IDR(mmu_context_idr);
+
+int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
+{
+        int index;
+        int err;
+
+again:
+        if (!idr_pre_get(&mmu_context_idr, GFP_KERNEL))
+                return -ENOMEM;
+
+        spin_lock(&mmu_context_lock);
+        err = idr_get_new_above(&mmu_context_idr, NULL, 1, &index);
+        spin_unlock(&mmu_context_lock);
+
+        if (err == -EAGAIN)
+                goto again;
+        else if (err)
+                return err;
+
+        if (index > MAX_CONTEXT) {
+                idr_remove(&mmu_context_idr, index);
+                return -ENOMEM;
+        }
+
+        mm->context.id = index;
+
+        return 0;
+}
+
+void destroy_context(struct mm_struct *mm)
+{
+        spin_lock(&mmu_context_lock);
+        idr_remove(&mmu_context_idr, mm->context.id);
+        spin_unlock(&mmu_context_lock);
+
+        mm->context.id = NO_CONTEXT;
+}
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
new file mode 100644
index 000000000000..a4d7a327c0e5
--- /dev/null
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -0,0 +1,87 @@
+/*
+ * Declarations of procedures and variables shared between files
+ * in arch/ppc/mm/.
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+#include <asm/tlbflush.h>
+#include <asm/mmu.h>
+
+#ifdef CONFIG_PPC32
+extern void mapin_ram(void);
+extern int map_page(unsigned long va, phys_addr_t pa, int flags);
+extern void setbat(int index, unsigned long virt, unsigned long phys,
+                   unsigned int size, int flags);
+extern void settlbcam(int index, unsigned long virt, phys_addr_t phys,
+                      unsigned int size, int flags, unsigned int pid);
+extern void invalidate_tlbcam_entry(int index);
+
+extern int __map_without_bats;
+extern unsigned long ioremap_base;
+extern unsigned long ioremap_bot;
+extern unsigned int rtas_data, rtas_size;
+
+extern PTE *Hash, *Hash_end;
+extern unsigned long Hash_size, Hash_mask;
+
+extern unsigned int num_tlbcam_entries;
+#endif
+
+extern unsigned long __max_low_memory;
+extern unsigned long __initial_memory_limit;
+extern unsigned long total_memory;
+extern unsigned long total_lowmem;
+
+/* ...and now those things that may be slightly different between processor
+ * architectures.  -- Dan
+ */
+#if defined(CONFIG_8xx)
+#define flush_HPTE(X, va, pg)   _tlbie(va)
+#define MMU_init_hw()           do { } while(0)
+#define mmu_mapin_ram()         (0UL)
+
+#elif defined(CONFIG_4xx)
+#define flush_HPTE(X, va, pg)   _tlbie(va)
+extern void MMU_init_hw(void);
+extern unsigned long mmu_mapin_ram(void);
+
+#elif defined(CONFIG_FSL_BOOKE)
+#define flush_HPTE(X, va, pg)   _tlbie(va)
+extern void MMU_init_hw(void);
+extern unsigned long mmu_mapin_ram(void);
+extern void adjust_total_lowmem(void);
+
+#elif defined(CONFIG_PPC32)
+/* anything 32-bit except 4xx or 8xx */
+extern void MMU_init_hw(void);
+extern unsigned long mmu_mapin_ram(void);
+
+/* Be careful....this needs to be updated if we ever encounter 603 SMPs,
+ * which includes all new 82xx processors.  We need tlbie/tlbsync here
+ * in that case (I think). -- Dan.
+ */
+static inline void flush_HPTE(unsigned context, unsigned long va,
+                              unsigned long pdval)
+{
+        if ((Hash != 0) &&
+            cpu_has_feature(CPU_FTR_HPTE_TABLE))
+                flush_hash_pages(0, va, pdval, 1);
+        else
+                _tlbie(va);
+}
+#endif
diff --git a/arch/ppc64/mm/numa.c b/arch/powerpc/mm/numa.c
index cb864b8f2750..4035cad8d7f1 100644
--- a/arch/ppc64/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -20,6 +20,7 @@
 #include <asm/lmb.h>
 #include <asm/machdep.h>
 #include <asm/abs_addr.h>
+#include <asm/system.h>
 
 static int numa_enabled = 1;
 
@@ -300,7 +301,6 @@ static unsigned long __init numa_enforce_memory_limit(unsigned long start, unsig
          * we've already adjusted it for the limit and it takes care of
          * having memory holes below the limit.
          */
-        extern unsigned long memory_limit;
 
         if (! memory_limit)
                 return size;
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
new file mode 100644
index 000000000000..f4e5ac122615
--- /dev/null
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -0,0 +1,467 @@
+/*
+ * This file contains the routines setting up the linux page tables.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+#include <asm/pgtable.h>
+#include <asm/pgalloc.h>
+#include <asm/io.h>
+
+#include "mmu_decl.h"
+
+unsigned long ioremap_base;
+unsigned long ioremap_bot;
+int io_bat_index;
+
+#if defined(CONFIG_6xx) || defined(CONFIG_POWER3)
+#define HAVE_BATS       1
+#endif
+
+#if defined(CONFIG_FSL_BOOKE)
+#define HAVE_TLBCAM     1
+#endif
+
+extern char etext[], _stext[];
+
+#ifdef CONFIG_SMP
+extern void hash_page_sync(void);
+#endif
+
+#ifdef HAVE_BATS
+extern unsigned long v_mapped_by_bats(unsigned long va);
+extern unsigned long p_mapped_by_bats(unsigned long pa);
+void setbat(int index, unsigned long virt, unsigned long phys,
+            unsigned int size, int flags);
+
+#else /* !HAVE_BATS */
+#define v_mapped_by_bats(x)     (0UL)
+#define p_mapped_by_bats(x)     (0UL)
+#endif /* HAVE_BATS */
+
+#ifdef HAVE_TLBCAM
+extern unsigned int tlbcam_index;
+extern unsigned long v_mapped_by_tlbcam(unsigned long va);
+extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
+#else /* !HAVE_TLBCAM */
+#define v_mapped_by_tlbcam(x)   (0UL)
+#define p_mapped_by_tlbcam(x)   (0UL)
+#endif /* HAVE_TLBCAM */
+
+#ifdef CONFIG_PTE_64BIT
+/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */
+#define PGDIR_ORDER     1
+#else
+#define PGDIR_ORDER     0
+#endif
+
+pgd_t *pgd_alloc(struct mm_struct *mm)
+{
+        pgd_t *ret;
+
+        ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGDIR_ORDER);
+        return ret;
+}
+
+void pgd_free(pgd_t *pgd)
+{
+        free_pages((unsigned long)pgd, PGDIR_ORDER);
+}
+
+pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
+{
+        pte_t *pte;
+        extern int mem_init_done;
+        extern void *early_get_page(void);
+
+        if (mem_init_done) {
+                pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
+        } else {
+                pte = (pte_t *)early_get_page();
+                if (pte)
+                        clear_page(pte);
+        }
+        return pte;
+}
+
+struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
+{
+        struct page *ptepage;
+
+#ifdef CONFIG_HIGHPTE
+        gfp_t flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT;
+#else
+        gfp_t flags = GFP_KERNEL | __GFP_REPEAT;
+#endif
+
+        ptepage = alloc_pages(flags, 0);
+        if (ptepage)
+                clear_highpage(ptepage);
+        return ptepage;
+}
+
+void pte_free_kernel(pte_t *pte)
+{
+#ifdef CONFIG_SMP
+        hash_page_sync();
+#endif
+        free_page((unsigned long)pte);
+}
+
+void pte_free(struct page *ptepage)
+{
+#ifdef CONFIG_SMP
+        hash_page_sync();
+#endif
+        __free_page(ptepage);
+}
+
+#ifndef CONFIG_PHYS_64BIT
+void __iomem *
+ioremap(phys_addr_t addr, unsigned long size)
+{
+        return __ioremap(addr, size, _PAGE_NO_CACHE);
+}
+#else /* CONFIG_PHYS_64BIT */
+void __iomem *
+ioremap64(unsigned long long addr, unsigned long size)
+{
+        return __ioremap(addr, size, _PAGE_NO_CACHE);
+}
+
+void __iomem *
+ioremap(phys_addr_t addr, unsigned long size)
+{
+        phys_addr_t addr64 = fixup_bigphys_addr(addr, size);
+
+        return ioremap64(addr64, size);
+}
+#endif /* CONFIG_PHYS_64BIT */
+
+void __iomem *
+__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
+{
+        unsigned long v, i;
+        phys_addr_t p;
+        int err;
+
+        /*
+         * Choose an address to map it to.
+         * Once the vmalloc system is running, we use it.
+         * Before then, we use space going down from ioremap_base
+         * (ioremap_bot records where we're up to).
+         */
+        p = addr & PAGE_MASK;
+        size = PAGE_ALIGN(addr + size) - p;
+
+        /*
+         * If the address lies within the first 16 MB, assume it's in ISA
+         * memory space
+         */
+        if (p < 16*1024*1024)
+                p += _ISA_MEM_BASE;
+
+        /*
+         * Don't allow anybody to remap normal RAM that we're using.
+         * mem_init() sets high_memory so only do the check after that.
+         */
+        if (mem_init_done && (p < virt_to_phys(high_memory))) {
+                printk("__ioremap(): phys addr "PHYS_FMT" is RAM lr %p\n", p,
+                       __builtin_return_address(0));
+                return NULL;
+        }
+
+        if (size == 0)
+                return NULL;
+
+        /*
+         * Is it already mapped?  Perhaps overlapped by a previous
+         * BAT mapping.  If the whole area is mapped then we're done,
+         * otherwise remap it since we want to keep the virt addrs for
+         * each request contiguous.
+         *
+         * We make the assumption here that if the bottom and top
+         * of the range we want are mapped then it's mapped to the
+         * same virt address (and this is contiguous).
+         *  -- Cort
+         */
+        if ((v = p_mapped_by_bats(p)) /*&& p_mapped_by_bats(p+size-1)*/ )
+                goto out;
+
+        if ((v = p_mapped_by_tlbcam(p)))
+                goto out;
+
+        if (mem_init_done) {
+                struct vm_struct *area;
+                area = get_vm_area(size, VM_IOREMAP);
+                if (area == 0)
+                        return NULL;
+                v = (unsigned long) area->addr;
+        } else {
+                v = (ioremap_bot -= size);
+        }
+
+        if ((flags & _PAGE_PRESENT) == 0)
+                flags |= _PAGE_KERNEL;
+        if (flags & _PAGE_NO_CACHE)
+                flags |= _PAGE_GUARDED;
+
+        /*
+         * Should check if it is a candidate for a BAT mapping
+         */
+
+        err = 0;
+        for (i = 0; i < size && err == 0; i += PAGE_SIZE)
+                err = map_page(v+i, p+i, flags);
+        if (err) {
+                if (mem_init_done)
+                        vunmap((void *)v);
+                return NULL;
+        }
+
+out:
+        return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK));
+}
+
+void iounmap(volatile void __iomem *addr)
+{
+        /*
+         * If mapped by BATs then there is nothing to do.
+         * Calling vfree() generates a benign warning.
+         */
+        if (v_mapped_by_bats((unsigned long)addr)) return;
+
+        if (addr > high_memory && (unsigned long) addr < ioremap_bot)
+                vunmap((void *) (PAGE_MASK & (unsigned long)addr));
+}
+
+void __iomem *ioport_map(unsigned long port, unsigned int len)
+{
+        return (void __iomem *) (port + _IO_BASE);
+}
+
+void ioport_unmap(void __iomem *addr)
+{
+        /* Nothing to do */
+}
+EXPORT_SYMBOL(ioport_map);
+EXPORT_SYMBOL(ioport_unmap);
+
+int
+map_page(unsigned long va, phys_addr_t pa, int flags)
+{
+        pmd_t *pd;
+        pte_t *pg;
+        int err = -ENOMEM;
+
+        /* Use upper 10 bits of VA to index the first level map */
+        pd = pmd_offset(pgd_offset_k(va), va);
+        /* Use middle 10 bits of VA to index the second-level map */
+        pg = pte_alloc_kernel(pd, va);
+        if (pg != 0) {
+                err = 0;
+                set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, __pgprot(flags)));
+                if (mem_init_done)
+                        flush_HPTE(0, va, pmd_val(*pd));
+        }
+        return err;
+}
+
+/*
+ * Map in all of physical memory starting at KERNELBASE.
+ */
+void __init mapin_ram(void)
+{
+        unsigned long v, p, s, f;
+
+        s = mmu_mapin_ram();
+        v = KERNELBASE + s;
+        p = PPC_MEMSTART + s;
+        for (; s < total_lowmem; s += PAGE_SIZE) {
+                if ((char *) v >= _stext && (char *) v < etext)
+                        f = _PAGE_RAM_TEXT;
+                else
+                        f = _PAGE_RAM;
+                map_page(v, p, f);
+                v += PAGE_SIZE;
+                p += PAGE_SIZE;
+        }
+}
+
+/* is x a power of 2? */
+#define is_power_of_2(x)        ((x) != 0 && (((x) & ((x) - 1)) == 0))
+
+/* is x a power of 4? */
+#define is_power_of_4(x)        ((x) != 0 && (((x) & (x-1)) == 0) && (ffs(x) & 1))
+
+/*
+ * Set up a mapping for a block of I/O.
+ * virt, phys, size must all be page-aligned.
+ * This should only be called before ioremap is called.
+ */
+void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
+                             unsigned int size, int flags)
+{
+        int i;
+
+        if (virt > KERNELBASE && virt < ioremap_bot)
+                ioremap_bot = ioremap_base = virt;
+
+#ifdef HAVE_BATS
+        /*
+         * Use a BAT for this if possible...
+         */
+        if (io_bat_index < 2 && is_power_of_2(size)
+            && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
+                setbat(io_bat_index, virt, phys, size, flags);
+                ++io_bat_index;
+                return;
+        }
+#endif /* HAVE_BATS */
+
+#ifdef HAVE_TLBCAM
+        /*
+         * Use a CAM for this if possible...
+         */
+        if (tlbcam_index < num_tlbcam_entries && is_power_of_4(size)
+            && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
+                settlbcam(tlbcam_index, virt, phys, size, flags, 0);
+                ++tlbcam_index;
+                return;
+        }
+#endif /* HAVE_TLBCAM */
+
+        /* No BATs available, put it in the page tables. */
+        for (i = 0; i < size; i += PAGE_SIZE)
+                map_page(virt + i, phys + i, flags);
+}
+
+/* Scan the real Linux page tables and return a PTE pointer for
+ * a virtual address in a context.
+ * Returns true (1) if PTE was found, zero otherwise.  The pointer to
+ * the PTE pointer is unmodified if PTE is not found.
+ */
+int
+get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep)
+{
+        pgd_t   *pgd;
+        pmd_t   *pmd;
+        pte_t   *pte;
+        int     retval = 0;
+
+        pgd = pgd_offset(mm, addr & PAGE_MASK);
+        if (pgd) {
+                pmd = pmd_offset(pgd, addr & PAGE_MASK);
+                if (pmd_present(*pmd)) {
+                        pte = pte_offset_map(pmd, addr & PAGE_MASK);
+                        if (pte) {
+                                retval = 1;
+                                *ptep = pte;
+                                /* XXX caller needs to do pte_unmap, yuck */
+                        }
+                }
+        }
+        return(retval);
+}
+
+/* Find physical address for this virtual address.  Normally used by
+ * I/O functions, but anyone can call it.
+ */
+unsigned long iopa(unsigned long addr)
+{
+        unsigned long pa;
+
+        /* I don't know why this won't work on PMacs or CHRP.  It
+         * appears there is some bug, or there is some implicit
+         * mapping done not properly represented by BATs or in page
+         * tables.......I am actively working on resolving this, but
+         * can't hold up other stuff.  -- Dan
+         */
+        pte_t *pte;
+        struct mm_struct *mm;
+
+        /* Check the BATs */
+        pa = v_mapped_by_bats(addr);
+        if (pa)
+                return pa;
+
+        /* Allow mapping of user addresses (within the thread)
+         * for DMA if necessary.
+         */
+        if (addr < TASK_SIZE)
+                mm = current->mm;
+        else
+                mm = &init_mm;
+
+        pa = 0;
+        if (get_pteptr(mm, addr, &pte)) {
+                pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
+                pte_unmap(pte);
+        }
+
+        return(pa);
+}
+
+/* This is will find the virtual address for a physical one....
+ * Swiped from APUS, could be dangerous :-).
+ * This is only a placeholder until I really find a way to make this
+ * work.  -- Dan
+ */
+unsigned long
+mm_ptov (unsigned long paddr)
+{
+        unsigned long ret;
+#if 0
+        if (paddr < 16*1024*1024)
+                ret = ZTWO_VADDR(paddr);
+        else {
+                int i;
+
+                for (i = 0; i < kmap_chunk_count;){
+                        unsigned long phys = kmap_chunks[i++];
+                        unsigned long size = kmap_chunks[i++];
+                        unsigned long virt = kmap_chunks[i++];
+                        if (paddr >= phys
+                            && paddr < (phys + size)){
+                                ret = virt + paddr - phys;
+                                goto exit;
+                        }
+                }
+        
+                ret = (unsigned long) __va(paddr);
+        }
+exit:
+#ifdef DEBUGPV
+        printk ("PTOV(%lx)=%lx\n", paddr, ret);
+#endif
+#else
+        ret = (unsigned long)paddr + KERNELBASE;
+#endif
+        return ret;
+}
+
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
new file mode 100644
index 000000000000..b79a78206135
--- /dev/null
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -0,0 +1,347 @@
+/*
+ *  This file contains ioremap and related functions for 64-bit machines.
+ *
+ *  Derived from arch/ppc64/mm/init.c
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  Dave Engebretsen <engebret@us.ibm.com>
+ *      Rework for PPC64 port.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/stddef.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/idr.h>
+#include <linux/nodemask.h>
+#include <linux/module.h>
+
+#include <asm/pgalloc.h>
+#include <asm/page.h>
+#include <asm/prom.h>
+#include <asm/lmb.h>
+#include <asm/rtas.h>
+#include <asm/io.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/uaccess.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/tlb.h>
+#include <asm/eeh.h>
+#include <asm/processor.h>
+#include <asm/mmzone.h>
+#include <asm/cputable.h>
+#include <asm/ppcdebug.h>
+#include <asm/sections.h>
+#include <asm/system.h>
+#include <asm/iommu.h>
+#include <asm/abs_addr.h>
+#include <asm/vdso.h>
+#include <asm/imalloc.h>
+
+unsigned long ioremap_bot = IMALLOC_BASE;
+static unsigned long phbs_io_bot = PHBS_IO_BASE;
+
+#ifdef CONFIG_PPC_ISERIES
+
+void __iomem *ioremap(unsigned long addr, unsigned long size)
+{
+        return (void __iomem *)addr;
+}
+
+extern void __iomem *__ioremap(unsigned long addr, unsigned long size,
+                       unsigned long flags)
+{
+        return (void __iomem *)addr;
+}
+
+void iounmap(volatile void __iomem *addr)
+{
+        return;
+}
+
+#else
+
+/*
+ * map_io_page currently only called by __ioremap
+ * map_io_page adds an entry to the ioremap page table
+ * and adds an entry to the HPT, possibly bolting it
+ */
+static int map_io_page(unsigned long ea, unsigned long pa, int flags)
+{
+        pgd_t *pgdp;
+        pud_t *pudp;
+        pmd_t *pmdp;
+        pte_t *ptep;
+        unsigned long vsid;
+
+        if (mem_init_done) {
+                pgdp = pgd_offset_k(ea);
+                pudp = pud_alloc(&init_mm, pgdp, ea);
+                if (!pudp)
+                        return -ENOMEM;
+                pmdp = pmd_alloc(&init_mm, pudp, ea);
+                if (!pmdp)
+                        return -ENOMEM;
+                ptep = pte_alloc_kernel(pmdp, ea);
+                if (!ptep)
+                        return -ENOMEM;
+                set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
+                                                          __pgprot(flags)));
+        } else {
+                unsigned long va, vpn, hash, hpteg;
+
+                /*
+                 * If the mm subsystem is not fully up, we cannot create a
+                 * linux page table entry for this mapping.  Simply bolt an
+                 * entry in the hardware page table.
+                 */
+                vsid = get_kernel_vsid(ea);
+                va = (vsid << 28) | (ea & 0xFFFFFFF);
+                vpn = va >> PAGE_SHIFT;
+
+                hash = hpt_hash(vpn, 0);
+
+                hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
+
+                /* Panic if a pte grpup is full */
+                if (ppc_md.hpte_insert(hpteg, va, pa >> PAGE_SHIFT,
+                                       HPTE_V_BOLTED,
+                                       _PAGE_NO_CACHE|_PAGE_GUARDED|PP_RWXX)
+                    == -1) {
+                        panic("map_io_page: could not insert mapping");
+                }
+        }
+        return 0;
+}
+
+
+static void __iomem * __ioremap_com(unsigned long addr, unsigned long pa,
+                            unsigned long ea, unsigned long size,
+                            unsigned long flags)
+{
+        unsigned long i;
+
+        if ((flags & _PAGE_PRESENT) == 0)
+                flags |= pgprot_val(PAGE_KERNEL);
+
+        for (i = 0; i < size; i += PAGE_SIZE)
+                if (map_io_page(ea+i, pa+i, flags))
+                        return NULL;
+
+        return (void __iomem *) (ea + (addr & ~PAGE_MASK));
+}
+
+
+void __iomem *
+ioremap(unsigned long addr, unsigned long size)
+{
+        return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED);
+}
+
+void __iomem * __ioremap(unsigned long addr, unsigned long size,
+                         unsigned long flags)
+{
+        unsigned long pa, ea;
+        void __iomem *ret;
+
+        /*
+         * Choose an address to map it to.
+         * Once the imalloc system is running, we use it.
+         * Before that, we map using addresses going
+         * up from ioremap_bot.  imalloc will use
+         * the addresses from ioremap_bot through
+         * IMALLOC_END
+         * 
+         */
+        pa = addr & PAGE_MASK;
+        size = PAGE_ALIGN(addr + size) - pa;
+
+        if (size == 0)
+                return NULL;
+
+        if (mem_init_done) {
+                struct vm_struct *area;
+                area = im_get_free_area(size);
+                if (area == NULL)
+                        return NULL;
+                ea = (unsigned long)(area->addr);
+                ret = __ioremap_com(addr, pa, ea, size, flags);
+                if (!ret)
+                        im_free(area->addr);
+        } else {
+                ea = ioremap_bot;
+                ret = __ioremap_com(addr, pa, ea, size, flags);
+                if (ret)
+                        ioremap_bot += size;
+        }
+        return ret;
+}
+
+#define IS_PAGE_ALIGNED(_val) ((_val) == ((_val) & PAGE_MASK))
+
+int __ioremap_explicit(unsigned long pa, unsigned long ea,
+                       unsigned long size, unsigned long flags)
+{
+        struct vm_struct *area;
+        void __iomem *ret;
+        
+        /* For now, require page-aligned values for pa, ea, and size */
+        if (!IS_PAGE_ALIGNED(pa) || !IS_PAGE_ALIGNED(ea) ||
+            !IS_PAGE_ALIGNED(size)) {
+                printk(KERN_ERR "unaligned value in %s\n", __FUNCTION__);
+                return 1;
+        }
+        
+        if (!mem_init_done) {
+                /* Two things to consider in this case:
+                 * 1) No records will be kept (imalloc, etc) that the region
+                 *    has been remapped
+                 * 2) It won't be easy to iounmap() the region later (because
+                 *    of 1)
+                 */
+                ;
+        } else {
+                area = im_get_area(ea, size,
+                        IM_REGION_UNUSED|IM_REGION_SUBSET|IM_REGION_EXISTS);
+                if (area == NULL) {
+                        /* Expected when PHB-dlpar is in play */
+                        return 1;
+                }
+                if (ea != (unsigned long) area->addr) {
+                        printk(KERN_ERR "unexpected addr return from "
+                               "im_get_area\n");
+                        return 1;
+                }
+        }
+        
+        ret = __ioremap_com(pa, pa, ea, size, flags);
+        if (ret == NULL) {
+                printk(KERN_ERR "ioremap_explicit() allocation failure !\n");
+                return 1;
+        }
+        if (ret != (void *) ea) {
+                printk(KERN_ERR "__ioremap_com() returned unexpected addr\n");
+                return 1;
+        }
+
+        return 0;
+}
+
+/*  
+ * Unmap an IO region and remove it from imalloc'd list.
+ * Access to IO memory should be serialized by driver.
+ * This code is modeled after vmalloc code - unmap_vm_area()
+ *
+ * XXX  what about calls before mem_init_done (ie python_countermeasures())
+ */
+void iounmap(volatile void __iomem *token)
+{
+        void *addr;
+
+        if (!mem_init_done)
+                return;
+        
+        addr = (void *) ((unsigned long __force) token & PAGE_MASK);
+
+        im_free(addr);
+}
+
+static int iounmap_subset_regions(unsigned long addr, unsigned long size)
+{
+        struct vm_struct *area;
+
+        /* Check whether subsets of this region exist */
+        area = im_get_area(addr, size, IM_REGION_SUPERSET);
+        if (area == NULL)
+                return 1;
+
+        while (area) {
+                iounmap((void __iomem *) area->addr);
+                area = im_get_area(addr, size,
+                                IM_REGION_SUPERSET);
+        }
+
+        return 0;
+}
+
+int iounmap_explicit(volatile void __iomem *start, unsigned long size)
+{
+        struct vm_struct *area;
+        unsigned long addr;
+        int rc;
+        
+        addr = (unsigned long __force) start & PAGE_MASK;
+
+        /* Verify that the region either exists or is a subset of an existing
+         * region.  In the latter case, split the parent region to create 
+         * the exact region 
+         */
+        area = im_get_area(addr, size, 
+                            IM_REGION_EXISTS | IM_REGION_SUBSET);
+        if (area == NULL) {
+                /* Determine whether subset regions exist.  If so, unmap */
+                rc = iounmap_subset_regions(addr, size);
+                if (rc) {
+                        printk(KERN_ERR
+                               "%s() cannot unmap nonexistent range 0x%lx\n",
+                                __FUNCTION__, addr);
+                        return 1;
+                }
+        } else {
+                iounmap((void __iomem *) area->addr);
+        }
+        /*
+         * FIXME! This can't be right:
+        iounmap(area->addr);
+         * Maybe it should be "iounmap(area);"
+         */
+        return 0;
+}
+
+#endif
+
+EXPORT_SYMBOL(ioremap);
+EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(iounmap);
+
+void __iomem * reserve_phb_iospace(unsigned long size)
+{
+        void __iomem *virt_addr;
+                
+        if (phbs_io_bot >= IMALLOC_BASE) 
+                panic("reserve_phb_iospace(): phb io space overflow\n");
+                        
+        virt_addr = (void __iomem *) phbs_io_bot;
+        phbs_io_bot += size;
+
+        return virt_addr;
+}
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
new file mode 100644
index 000000000000..cef9e83cc7e9
--- /dev/null
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -0,0 +1,285 @@
+/*
+ * This file contains the routines for handling the MMU on those
+ * PowerPC implementations where the MMU substantially follows the
+ * architecture specification.  This includes the 6xx, 7xx, 7xxx,
+ * 8260, and POWER3 implementations but excludes the 8xx and 4xx.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+#include <asm/prom.h>
+#include <asm/mmu.h>
+#include <asm/machdep.h>
+#include <asm/lmb.h>
+
+#include "mmu_decl.h"
+
+PTE *Hash, *Hash_end;
+unsigned long Hash_size, Hash_mask;
+unsigned long _SDR1;
+
+union ubat {                    /* BAT register values to be loaded */
+        BAT     bat;
+#ifdef CONFIG_PPC64BRIDGE
+        u64     word[2];
+#else
+        u32     word[2];
+#endif
+} BATS[4][2];                   /* 4 pairs of IBAT, DBAT */
+
+struct batrange {               /* stores address ranges mapped by BATs */
+        unsigned long start;
+        unsigned long limit;
+        unsigned long phys;
+} bat_addrs[4];
+
+/*
+ * Return PA for this VA if it is mapped by a BAT, or 0
+ */
+unsigned long v_mapped_by_bats(unsigned long va)
+{
+        int b;
+        for (b = 0; b < 4; ++b)
+                if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
+                        return bat_addrs[b].phys + (va - bat_addrs[b].start);
+        return 0;
+}
+
+/*
+ * Return VA for a given PA or 0 if not mapped
+ */
+unsigned long p_mapped_by_bats(unsigned long pa)
+{
+        int b;
+        for (b = 0; b < 4; ++b)
+                if (pa >= bat_addrs[b].phys
+                    && pa < (bat_addrs[b].limit-bat_addrs[b].start)
+                              +bat_addrs[b].phys)
+                        return bat_addrs[b].start+(pa-bat_addrs[b].phys);
+        return 0;
+}
+
+unsigned long __init mmu_mapin_ram(void)
+{
+#ifdef CONFIG_POWER4
+        return 0;
+#else
+        unsigned long tot, bl, done;
+        unsigned long max_size = (256<<20);
+        unsigned long align;
+
+        if (__map_without_bats)
+                return 0;
+
+        /* Set up BAT2 and if necessary BAT3 to cover RAM. */
+
+        /* Make sure we don't map a block larger than the
+           smallest alignment of the physical address. */
+        /* alignment of PPC_MEMSTART */
+        align = ~(PPC_MEMSTART-1) & PPC_MEMSTART;
+        /* set BAT block size to MIN(max_size, align) */
+        if (align && align < max_size)
+                max_size = align;
+
+        tot = total_lowmem;
+        for (bl = 128<<10; bl < max_size; bl <<= 1) {
+                if (bl * 2 > tot)
+                        break;
+        }
+
+        setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
+        done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
+        if ((done < tot) && !bat_addrs[3].limit) {
+                /* use BAT3 to cover a bit more */
+                tot -= done;
+                for (bl = 128<<10; bl < max_size; bl <<= 1)
+                        if (bl * 2 > tot)
+                                break;
+                setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
+                done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
+        }
+
+        return done;
+#endif
+}
+
+/*
+ * Set up one of the I/D BAT (block address translation) register pairs.
+ * The parameters are not checked; in particular size must be a power
+ * of 2 between 128k and 256M.
+ */
+void __init setbat(int index, unsigned long virt, unsigned long phys,
+                   unsigned int size, int flags)
+{
+        unsigned int bl;
+        int wimgxpp;
+        union ubat *bat = BATS[index];
+
+        if (((flags & _PAGE_NO_CACHE) == 0) &&
+            cpu_has_feature(CPU_FTR_NEED_COHERENT))
+                flags |= _PAGE_COHERENT;
+
+        bl = (size >> 17) - 1;
+        if (PVR_VER(mfspr(SPRN_PVR)) != 1) {
+                /* 603, 604, etc. */
+                /* Do DBAT first */
+                wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
+                                   | _PAGE_COHERENT | _PAGE_GUARDED);
+                wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
+                bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
+                bat[1].word[1] = phys | wimgxpp;
+#ifndef CONFIG_KGDB /* want user access for breakpoints */
+                if (flags & _PAGE_USER)
+#endif
+                        bat[1].bat.batu.vp = 1;
+                if (flags & _PAGE_GUARDED) {
+                        /* G bit must be zero in IBATs */
+                        bat[0].word[0] = bat[0].word[1] = 0;
+                } else {
+                        /* make IBAT same as DBAT */
+                        bat[0] = bat[1];
+                }
+        } else {
+                /* 601 cpu */
+                if (bl > BL_8M)
+                        bl = BL_8M;
+                wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
+                                   | _PAGE_COHERENT);
+                wimgxpp |= (flags & _PAGE_RW)?
+                        ((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX;
+                bat->word[0] = virt | wimgxpp | 4;      /* Ks=0, Ku=1 */
+                bat->word[1] = phys | bl | 0x40;        /* V=1 */
+        }
+
+        bat_addrs[index].start = virt;
+        bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1;
+        bat_addrs[index].phys = phys;
+}
+
+/*
+ * Initialize the hash table and patch the instructions in hashtable.S.
+ */
+void __init MMU_init_hw(void)
+{
+        unsigned int hmask, mb, mb2;
+        unsigned int n_hpteg, lg_n_hpteg;
+
+        extern unsigned int hash_page_patch_A[];
+        extern unsigned int hash_page_patch_B[], hash_page_patch_C[];
+        extern unsigned int hash_page[];
+        extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
+
+        if (!cpu_has_feature(CPU_FTR_HPTE_TABLE)) {
+                /*
+                 * Put a blr (procedure return) instruction at the
+                 * start of hash_page, since we can still get DSI
+                 * exceptions on a 603.
+                 */
+                hash_page[0] = 0x4e800020;
+                flush_icache_range((unsigned long) &hash_page[0],
+                                   (unsigned long) &hash_page[1]);
+                return;
+        }
+
+        if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105);
+
+#ifdef CONFIG_PPC64BRIDGE
+#define LG_HPTEG_SIZE   7               /* 128 bytes per HPTEG */
+#define SDR1_LOW_BITS   (lg_n_hpteg - 11)
+#define MIN_N_HPTEG     2048            /* min 256kB hash table */
+#else
+#define LG_HPTEG_SIZE   6               /* 64 bytes per HPTEG */
+#define SDR1_LOW_BITS   ((n_hpteg - 1) >> 10)
+#define MIN_N_HPTEG     1024            /* min 64kB hash table */
+#endif
+
+        /*
+         * Allow 1 HPTE (1/8 HPTEG) for each page of memory.
+         * This is less than the recommended amount, but then
+         * Linux ain't AIX.
+         */
+        n_hpteg = total_memory / (PAGE_SIZE * 8);
+        if (n_hpteg < MIN_N_HPTEG)
+                n_hpteg = MIN_N_HPTEG;
+        lg_n_hpteg = __ilog2(n_hpteg);
+        if (n_hpteg & (n_hpteg - 1)) {
+                ++lg_n_hpteg;           /* round up if not power of 2 */
+                n_hpteg = 1 << lg_n_hpteg;
+        }
+        Hash_size = n_hpteg << LG_HPTEG_SIZE;
+
+        /*
+         * Find some memory for the hash table.
+         */
+        if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322);
+        Hash = __va(lmb_alloc_base(Hash_size, Hash_size,
+                                   __initial_memory_limit));
+        cacheable_memzero(Hash, Hash_size);
+        _SDR1 = __pa(Hash) | SDR1_LOW_BITS;
+
+        Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
+
+        printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
+               total_memory >> 20, Hash_size >> 10, Hash);
+
+
+        /*
+         * Patch up the instructions in hashtable.S:create_hpte
+         */
+        if ( ppc_md.progress ) ppc_md.progress("hash:patch", 0x345);
+        Hash_mask = n_hpteg - 1;
+        hmask = Hash_mask >> (16 - LG_HPTEG_SIZE);
+        mb2 = mb = 32 - LG_HPTEG_SIZE - lg_n_hpteg;
+        if (lg_n_hpteg > 16)
+                mb2 = 16 - LG_HPTEG_SIZE;
+
+        hash_page_patch_A[0] = (hash_page_patch_A[0] & ~0xffff)
+                | ((unsigned int)(Hash) >> 16);
+        hash_page_patch_A[1] = (hash_page_patch_A[1] & ~0x7c0) | (mb << 6);
+        hash_page_patch_A[2] = (hash_page_patch_A[2] & ~0x7c0) | (mb2 << 6);
+        hash_page_patch_B[0] = (hash_page_patch_B[0] & ~0xffff) | hmask;
+        hash_page_patch_C[0] = (hash_page_patch_C[0] & ~0xffff) | hmask;
+
+        /*
+         * Ensure that the locations we've patched have been written
+         * out from the data cache and invalidated in the instruction
+         * cache, on those machines with split caches.
+         */
+        flush_icache_range((unsigned long) &hash_page_patch_A[0],
+                           (unsigned long) &hash_page_patch_C[1]);
+
+        /*
+         * Patch up the instructions in hashtable.S:flush_hash_page
+         */
+        flush_hash_patch_A[0] = (flush_hash_patch_A[0] & ~0xffff)
+                | ((unsigned int)(Hash) >> 16);
+        flush_hash_patch_A[1] = (flush_hash_patch_A[1] & ~0x7c0) | (mb << 6);
+        flush_hash_patch_A[2] = (flush_hash_patch_A[2] & ~0x7c0) | (mb2 << 6);
+        flush_hash_patch_B[0] = (flush_hash_patch_B[0] & ~0xffff) | hmask;
+        flush_icache_range((unsigned long) &flush_hash_patch_A[0],
+                           (unsigned long) &flush_hash_patch_B[1]);
+
+        if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205);
+}
diff --git a/arch/ppc64/mm/slb.c b/arch/powerpc/mm/slb.c
index 0473953f6a37..0473953f6a37 100644
--- a/arch/ppc64/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
diff --git a/arch/ppc64/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index a3a03da503bc..a3a03da503bc 100644
--- a/arch/ppc64/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
diff --git a/arch/ppc64/mm/stab.c b/arch/powerpc/mm/stab.c
index 1b83f002bf27..1b83f002bf27 100644
--- a/arch/ppc64/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
diff --git a/arch/powerpc/mm/tlb_32.c b/arch/powerpc/mm/tlb_32.c
new file mode 100644
index 000000000000..6c3dc3c44c86
--- /dev/null
+++ b/arch/powerpc/mm/tlb_32.c
@@ -0,0 +1,183 @@
+/*
+ * This file contains the routines for TLB flushing.
+ * On machines where the MMU uses a hash table to store virtual to
+ * physical translations, these routines flush entries from the
+ * hash table also.
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/highmem.h>
+#include <asm/tlbflush.h>
+#include <asm/tlb.h>
+
+#include "mmu_decl.h"
+
+/*
+ * Called when unmapping pages to flush entries from the TLB/hash table.
+ */
+void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
+{
+        unsigned long ptephys;
+
+        if (Hash != 0) {
+                ptephys = __pa(ptep) & PAGE_MASK;
+                flush_hash_pages(mm->context, addr, ptephys, 1);
+        }
+}
+
+/*
+ * Called by ptep_set_access_flags, must flush on CPUs for which the
+ * DSI handler can't just "fixup" the TLB on a write fault
+ */
+void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr)
+{
+        if (Hash != 0)
+                return;
+        _tlbie(addr);
+}
+
+/*
+ * Called at the end of a mmu_gather operation to make sure the
+ * TLB flush is completely done.
+ */
+void tlb_flush(struct mmu_gather *tlb)
+{
+        if (Hash == 0) {
+                /*
+                 * 603 needs to flush the whole TLB here since
+                 * it doesn't use a hash table.
+                 */
+                _tlbia();
+        }
+}
+
+/*
+ * TLB flushing:
+ *
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(vma, start, end) flushes a range of pages
+ *  - flush_tlb_kernel_range(start, end) flushes kernel pages
+ *
+ * since the hardware hash table functions as an extension of the
+ * tlb as far as the linux tables are concerned, flush it too.
+ *    -- Cort
+ */
+
+/*
+ * 750 SMP is a Bad Idea because the 750 doesn't broadcast all
+ * the cache operations on the bus.  Hence we need to use an IPI
+ * to get the other CPU(s) to invalidate their TLBs.
+ */
+#ifdef CONFIG_SMP_750
+#define FINISH_FLUSH    smp_send_tlb_invalidate(0)
+#else
+#define FINISH_FLUSH    do { } while (0)
+#endif
+
+static void flush_range(struct mm_struct *mm, unsigned long start,
+                        unsigned long end)
+{
+        pmd_t *pmd;
+        unsigned long pmd_end;
+        int count;
+        unsigned int ctx = mm->context;
+
+        if (Hash == 0) {
+                _tlbia();
+                return;
+        }
+        start &= PAGE_MASK;
+        if (start >= end)
+                return;
+        end = (end - 1) | ~PAGE_MASK;
+        pmd = pmd_offset(pgd_offset(mm, start), start);
+        for (;;) {
+                pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1;
+                if (pmd_end > end)
+                        pmd_end = end;
+                if (!pmd_none(*pmd)) {
+                        count = ((pmd_end - start) >> PAGE_SHIFT) + 1;
+                        flush_hash_pages(ctx, start, pmd_val(*pmd), count);
+                }
+                if (pmd_end == end)
+                        break;
+                start = pmd_end + 1;
+                ++pmd;
+        }
+}
+
+/*
+ * Flush kernel TLB entries in the given range
+ */
+void flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+        flush_range(&init_mm, start, end);
+        FINISH_FLUSH;
+}
+
+/*
+ * Flush all the (user) entries for the address space described by mm.
+ */
+void flush_tlb_mm(struct mm_struct *mm)
+{
+        struct vm_area_struct *mp;
+
+        if (Hash == 0) {
+                _tlbia();
+                return;
+        }
+
+        for (mp = mm->mmap; mp != NULL; mp = mp->vm_next)
+                flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
+        FINISH_FLUSH;
+}
+
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
+{
+        struct mm_struct *mm;
+        pmd_t *pmd;
+
+        if (Hash == 0) {
+                _tlbie(vmaddr);
+                return;
+        }
+        mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm;
+        pmd = pmd_offset(pgd_offset(mm, vmaddr), vmaddr);
+        if (!pmd_none(*pmd))
+                flush_hash_pages(mm->context, vmaddr, pmd_val(*pmd), 1);
+        FINISH_FLUSH;
+}
+
+/*
+ * For each address in the range, find the pte for the address
+ * and check _PAGE_HASHPTE bit; if it is set, find and destroy
+ * the corresponding HPTE.
+ */
+void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+                     unsigned long end)
+{
+        flush_range(vma->vm_mm, start, end);
+        FINISH_FLUSH;
+}
diff --git a/arch/ppc64/mm/tlb.c b/arch/powerpc/mm/tlb_64.c
index 21fbffb23a43..09ab81a10f4f 100644
--- a/arch/ppc64/mm/tlb.c
+++ b/arch/powerpc/mm/tlb_64.c
@@ -128,12 +128,10 @@ void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
 void hpte_update(struct mm_struct *mm, unsigned long addr,
                  unsigned long pte, int wrprot)
 {
-        int i;
-        unsigned long context = 0;
         struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
+        unsigned long vsid;
+        int i;
 
-        if (REGION_ID(addr) == USER_REGION_ID)
-                context = mm->context.id;
         i = batch->index;
 
         /*
@@ -143,19 +141,21 @@ void hpte_update(struct mm_struct *mm, unsigned long addr,
          * up scanning and resetting referenced bits then our batch context
          * will change mid stream.
          */
-        if (i != 0 && (context != batch->context ||
-                       batch->large != pte_huge(pte))) {
+        if (i != 0 && (mm != batch->mm || batch->large != pte_huge(pte))) {
                 flush_tlb_pending();
                 i = 0;
         }
-
         if (i == 0) {
-                batch->context = context;
                 batch->mm = mm;
                 batch->large = pte_huge(pte);
         }
+        if (addr < KERNELBASE) {
+                vsid = get_vsid(mm->context.id, addr);
+                WARN_ON(vsid == 0);
+        } else
+                vsid = get_kernel_vsid(addr);
+        batch->vaddr[i] = (vsid << 28 ) | (addr & 0x0fffffff);
         batch->pte[i] = __pte(pte);
-        batch->addr[i] = addr;
         batch->index = ++i;
         if (i >= PPC64_TLB_BATCH_NR)
                 flush_tlb_pending();
@@ -177,10 +177,9 @@ void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
                 local = 1;
 
         if (i == 1)
-                flush_hash_page(batch->context, batch->addr[0], batch->pte[0],
-                                local);
+                flush_hash_page(batch->vaddr[0], batch->pte[0], local);
         else
-                flush_hash_range(batch->context, i, local);
+                flush_hash_range(i, local);
         batch->index = 0;
         put_cpu();
 }
diff --git a/arch/ppc/oprofile/Kconfig b/arch/powerpc/oprofile/Kconfig
index 19d37730b664..19d37730b664 100644
--- a/arch/ppc/oprofile/Kconfig
+++ b/arch/powerpc/oprofile/Kconfig
diff --git a/arch/ppc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index e2218d32a4eb..0782d0cca89c 100644
--- a/arch/ppc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -7,8 +7,5 @@ DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
                 timer_int.o )
 
 oprofile-y := $(DRIVER_OBJS) common.o
-
-ifeq ($(CONFIG_FSL_BOOKE),y)
-        oprofile-y += op_model_fsl_booke.o
-endif
-
+oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o
+oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
diff --git a/arch/ppc64/oprofile/common.c b/arch/powerpc/oprofile/common.c
index e5f572710aa0..af2c05d20ba5 100644
--- a/arch/ppc64/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -1,5 +1,9 @@
 /*
+ * PPC 64 oprofile support:
  * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
+ * PPC 32 oprofile support: (based on PPC 64 support)
+ * Copyright (C) Freescale Semiconductor, Inc 2004
+ *      Author: Andy Fleming
  *
  * Based on alpha version.
  *
@@ -10,6 +14,9 @@
  */
 
 #include <linux/oprofile.h>
+#ifndef __powerpc64__
+#include <linux/slab.h>
+#endif /* ! __powerpc64__ */
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/errno.h>
@@ -19,17 +26,21 @@
 #include <asm/cputable.h>
 #include <asm/oprofile_impl.h>
 
-static struct op_ppc64_model *model;
+static struct op_powerpc_model *model;
 
 static struct op_counter_config ctr[OP_MAX_COUNTER];
 static struct op_system_config sys;
 
+#ifndef __powerpc64__
+static char *cpu_type;
+#endif /* ! __powerpc64__ */
+
 static void op_handle_interrupt(struct pt_regs *regs)
 {
         model->handle_interrupt(regs, ctr);
 }
 
-static int op_ppc64_setup(void)
+static int op_powerpc_setup(void)
 {
         int err;
 
@@ -42,41 +53,49 @@ static int op_ppc64_setup(void)
         model->reg_setup(ctr, &sys, model->num_counters);
 
         /* Configure the registers on all cpus.  */
+#ifdef __powerpc64__
         on_each_cpu(model->cpu_setup, NULL, 0, 1);
+#else /* __powerpc64__ */
+#if 0
+        /* FIXME: Make multi-cpu work */
+        on_each_cpu(model->reg_setup, NULL, 0, 1);
+#endif
+#endif /* __powerpc64__ */
 
         return 0;
 }
 
-static void op_ppc64_shutdown(void)
+static void op_powerpc_shutdown(void)
 {
         release_pmc_hardware();
 }
 
-static void op_ppc64_cpu_start(void *dummy)
+static void op_powerpc_cpu_start(void *dummy)
 {
         model->start(ctr);
 }
 
-static int op_ppc64_start(void)
+static int op_powerpc_start(void)
 {
-        on_each_cpu(op_ppc64_cpu_start, NULL, 0, 1);
+        on_each_cpu(op_powerpc_cpu_start, NULL, 0, 1);
         return 0;
 }
 
-static inline void op_ppc64_cpu_stop(void *dummy)
+static inline void op_powerpc_cpu_stop(void *dummy)
 {
         model->stop();
 }
 
-static void op_ppc64_stop(void)
+static void op_powerpc_stop(void)
 {
-        on_each_cpu(op_ppc64_cpu_stop, NULL, 0, 1);
+        on_each_cpu(op_powerpc_cpu_stop, NULL, 0, 1);
 }
 
-static int op_ppc64_create_files(struct super_block *sb, struct dentry *root)
+static int op_powerpc_create_files(struct super_block *sb, struct dentry *root)
 {
         int i;
 
+#ifdef __powerpc64__
         /*
          * There is one mmcr0, mmcr1 and mmcra for setting the events for
          * all of the counters.
@@ -84,6 +103,7 @@ static int op_ppc64_create_files(struct super_block *sb, struct dentry *root)
         oprofilefs_create_ulong(sb, root, "mmcr0", &sys.mmcr0);
         oprofilefs_create_ulong(sb, root, "mmcr1", &sys.mmcr1);
         oprofilefs_create_ulong(sb, root, "mmcra", &sys.mmcra);
+#endif /* __powerpc64__ */
 
         for (i = 0; i < model->num_counters; ++i) {
                 struct dentry *dir;
@@ -95,44 +115,70 @@ static int op_ppc64_create_files(struct super_block *sb, struct dentry *root)
                 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
                 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
                 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
+#ifdef __powerpc64__
                 /*
                  * We dont support per counter user/kernel selection, but
                  * we leave the entries because userspace expects them
                  */
+#endif /* __powerpc64__ */
                 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
                 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
+
+#ifndef __powerpc64__
+                /* FIXME: Not sure if this is used */
+#endif /* ! __powerpc64__ */
                 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
         }
 
         oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel);
         oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user);
+#ifdef __powerpc64__
         oprofilefs_create_ulong(sb, root, "backtrace_spinlocks",
                                 &sys.backtrace_spinlocks);
+#endif /* __powerpc64__ */
 
         /* Default to tracing both kernel and user */
         sys.enable_kernel = 1;
         sys.enable_user = 1;
-
+#ifdef __powerpc64__
         /* Turn on backtracing through spinlocks by default */
         sys.backtrace_spinlocks = 1;
+#endif /* __powerpc64__ */
 
         return 0;
 }
 
 int __init oprofile_arch_init(struct oprofile_operations *ops)
 {
+#ifndef __powerpc64__
+#ifdef CONFIG_FSL_BOOKE
+        model = &op_model_fsl_booke;
+#else
+        return -ENODEV;
+#endif
+
+        cpu_type = kmalloc(32, GFP_KERNEL);
+        if (NULL == cpu_type)
+                return -ENOMEM;
+
+        sprintf(cpu_type, "ppc/%s", cur_cpu_spec->cpu_name);
+
+        model->num_counters = cur_cpu_spec->num_pmcs;
+
+        ops->cpu_type = cpu_type;
+#else /* __powerpc64__ */
         if (!cur_cpu_spec->oprofile_model || !cur_cpu_spec->oprofile_cpu_type)
                 return -ENODEV;
-
         model = cur_cpu_spec->oprofile_model;
         model->num_counters = cur_cpu_spec->num_pmcs;
 
         ops->cpu_type = cur_cpu_spec->oprofile_cpu_type;
-        ops->create_files = op_ppc64_create_files;
-        ops->setup = op_ppc64_setup;
-        ops->shutdown = op_ppc64_shutdown;
-        ops->start = op_ppc64_start;
-        ops->stop = op_ppc64_stop;
+#endif /* __powerpc64__ */
+        ops->create_files = op_powerpc_create_files;
+        ops->setup = op_powerpc_setup;
+        ops->shutdown = op_powerpc_shutdown;
+        ops->start = op_powerpc_start;
+        ops->stop = op_powerpc_stop;
 
         printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
                ops->cpu_type);
@@ -142,4 +188,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
 
 void oprofile_arch_exit(void)
 {
+#ifndef __powerpc64__
+        kfree(cpu_type);
+        cpu_type = NULL;
+#endif /* ! __powerpc64__ */
 }
diff --git a/arch/ppc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c
index fc9c859358c6..86124a94c9af 100644
--- a/arch/ppc/oprofile/op_model_fsl_booke.c
+++ b/arch/powerpc/oprofile/op_model_fsl_booke.c
@@ -24,9 +24,8 @@
 #include <asm/cputable.h>
 #include <asm/reg_booke.h>
 #include <asm/page.h>
-#include <asm/perfmon.h>
-
-#include "op_impl.h"
+#include <asm/pmc.h>
+#include <asm/oprofile_impl.h>
 
 static unsigned long reset_value[OP_MAX_COUNTER];
 
@@ -176,7 +175,7 @@ static void fsl_booke_handle_interrupt(struct pt_regs *regs,
         pmc_start_ctrs(1);
 }
 
-struct op_ppc32_model op_model_fsl_booke = {
+struct op_powerpc_model op_model_fsl_booke = {
         .reg_setup              = fsl_booke_reg_setup,
         .start                  = fsl_booke_start,
         .stop                   = fsl_booke_stop,
diff --git a/arch/ppc64/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 32b2bb5625fe..886449315847 100644
--- a/arch/ppc64/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -300,7 +300,7 @@ static void power4_handle_interrupt(struct pt_regs *regs,
         mtspr(SPRN_MMCR0, mmcr0);
 }
 
-struct op_ppc64_model op_model_power4 = {
+struct op_powerpc_model op_model_power4 = {
         .reg_setup              = power4_reg_setup,
         .cpu_setup              = power4_cpu_setup,
         .start                  = power4_start,
diff --git a/arch/ppc64/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c
index 08c5b333f5c4..e010b85996e8 100644
--- a/arch/ppc64/oprofile/op_model_rs64.c
+++ b/arch/powerpc/oprofile/op_model_rs64.c
@@ -209,7 +209,7 @@ static void rs64_handle_interrupt(struct pt_regs *regs,
         mtspr(SPRN_MMCR0, mmcr0);
 }
 
-struct op_ppc64_model op_model_rs64 = {
+struct op_powerpc_model op_model_rs64 = {
         .reg_setup              = rs64_reg_setup,
         .cpu_setup              = rs64_cpu_setup,
         .start                  = rs64_start,
diff --git a/arch/powerpc/platforms/4xx/Kconfig b/arch/powerpc/platforms/4xx/Kconfig
new file mode 100644
index 000000000000..ed39d6a3d22a
--- /dev/null
+++ b/arch/powerpc/platforms/4xx/Kconfig
@@ -0,0 +1,280 @@
+config 4xx
+        bool
+        depends on 40x || 44x
+        default y
+
+config WANT_EARLY_SERIAL
+        bool
+        select SERIAL_8250
+        default n
+
+menu "AMCC 4xx options"
+        depends on 4xx
+
+choice
+        prompt "Machine Type"
+        depends on 40x
+        default WALNUT
+
+config BUBINGA
+        bool "Bubinga"
+        select WANT_EARLY_SERIAL
+        help
+          This option enables support for the IBM 405EP evaluation board.
+
+config CPCI405
+        bool "CPCI405"
+        help
+          This option enables support for the CPCI405 board.
+
+config EP405
+        bool "EP405/EP405PC"
+        help
+          This option enables support for the EP405/EP405PC boards.
+
+config REDWOOD_5
+        bool "Redwood-5"
+        help
+          This option enables support for the IBM STB04 evaluation board.
+
+config REDWOOD_6
+        bool "Redwood-6"
+        help
+          This option enables support for the IBM STBx25xx evaluation board.
+
+config SYCAMORE
+        bool "Sycamore"
+        help
+          This option enables support for the IBM PPC405GPr evaluation board.
+
+config WALNUT
+        bool "Walnut"
+        help
+          This option enables support for the IBM PPC405GP evaluation board.
+
+config XILINX_ML300
+        bool "Xilinx-ML300"
+        help
+          This option enables support for the Xilinx ML300 evaluation board.
+
+endchoice
+
+choice
+        prompt "Machine Type"
+        depends on 44x
+        default EBONY
+
+config BAMBOO
+        bool "Bamboo"
+        select WANT_EARLY_SERIAL
+        help
+          This option enables support for the IBM PPC440EP evaluation board.
+
+config EBONY
+        bool "Ebony"
+        select WANT_EARLY_SERIAL
+        help
+          This option enables support for the IBM PPC440GP evaluation board.
+
+config LUAN
+        bool "Luan"
+        select WANT_EARLY_SERIAL
+        help
+          This option enables support for the IBM PPC440SP evaluation board.
+
+config OCOTEA
+        bool "Ocotea"
+        select WANT_EARLY_SERIAL
+        help
+          This option enables support for the IBM PPC440GX evaluation board.
+
+endchoice
+
+config EP405PC
+        bool "EP405PC Support"
+        depends on EP405
+
+
+# It's often necessary to know the specific 4xx processor type.
+# Fortunately, it is impled (so far) from the board type, so we
+# don't need to ask more redundant questions.
+config NP405H
+        bool
+        depends on ASH
+        default y
+
+config 440EP
+        bool
+        depends on BAMBOO
+        select PPC_FPU
+        default y
+
+config 440GP
+        bool
+        depends on EBONY
+        default y
+
+config 440GX
+        bool
+        depends on OCOTEA
+        default y
+
+config 440SP
+        bool
+        depends on LUAN
+        default y
+
+config 440
+        bool
+        depends on 440GP || 440SP || 440EP
+        default y
+
+config 440A
+        bool
+        depends on 440GX
+        default y
+
+config IBM440EP_ERR42
+        bool
+        depends on 440EP
+        default y
+
+# All 405-based cores up until the 405GPR and 405EP have this errata.
+config IBM405_ERR77
+        bool
+        depends on 40x && !403GCX && !405GPR && !405EP
+        default y
+
+# All 40x-based cores, up until the 405GPR and 405EP have this errata.
+config IBM405_ERR51
+        bool
+        depends on 40x && !405GPR && !405EP
+        default y
+
+config BOOKE
+        bool
+        depends on 44x
+        default y
+
+config IBM_OCP
+        bool
+        depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
+        default y
+
+config XILINX_OCP
+        bool
+        depends on XILINX_ML300
+        default y
+
+config IBM_EMAC4
+        bool
+        depends on 440GX || 440SP
+        default y
+
+config BIOS_FIXUP
+        bool
+        depends on BUBINGA || EP405 || SYCAMORE || WALNUT
+        default y
+
+# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
+config 403GCX
+        bool
+        depends OAK
+        default y
+
+config 405EP
+        bool
+        depends on BUBINGA
+        default y
+
+config 405GP
+        bool
+        depends on CPCI405 || EP405 || WALNUT
+        default y
+
+config 405GPR
+        bool
+        depends on SYCAMORE
+        default y
+
+config VIRTEX_II_PRO
+        bool
+        depends on XILINX_ML300
+        default y
+
+config STB03xxx
+        bool
+        depends on REDWOOD_5 || REDWOOD_6
+        default y
+
+config EMBEDDEDBOOT
+        bool
+        depends on EP405 || XILINX_ML300
+        default y
+
+config IBM_OPENBIOS
+        bool
+        depends on ASH || BUBINGA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
+        default y
+
+config PPC4xx_DMA
+        bool "PPC4xx DMA controller support"
+        depends on 4xx
+
+config PPC4xx_EDMA
+        bool
+        depends on !STB03xxx && PPC4xx_DMA
+        default y
+
+config PPC_GEN550
+        bool
+        depends on 4xx
+        default y
+
+choice
+        prompt "TTYS0 device and default console"
+        depends on 40x
+        default UART0_TTYS0
+
+config UART0_TTYS0
+        bool "UART0"
+
+config UART0_TTYS1
+        bool "UART1"
+
+endchoice
+
+config SERIAL_SICC
+        bool "SICC Serial port support"
+        depends on STB03xxx
+
+config UART1_DFLT_CONSOLE
+        bool
+        depends on SERIAL_SICC && UART0_TTYS1
+        default y
+
+config SERIAL_SICC_CONSOLE
+        bool
+        depends on SERIAL_SICC && UART0_TTYS1
+        default y
+endmenu
+
+
+menu "IBM 40x options"
+        depends on 40x
+
+config SERIAL_SICC
+        bool "SICC Serial port"
+        depends on STB03xxx
+
+config UART1_DFLT_CONSOLE
+        bool
+        depends on SERIAL_SICC && UART0_TTYS1
+        default y
+
+config SERIAL_SICC_CONSOLE
+        bool
+        depends on SERIAL_SICC && UART0_TTYS1
+        default y
+
+endmenu
diff --git a/arch/powerpc/platforms/4xx/Makefile b/arch/powerpc/platforms/4xx/Makefile
new file mode 100644
index 000000000000..79ff6b1e887c
--- /dev/null
+++ b/arch/powerpc/platforms/4xx/Makefile
@@ -0,0 +1 @@
+# empty makefile so make clean works
\ No newline at end of file
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
new file mode 100644
index 000000000000..c5bc2821d991
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -0,0 +1,86 @@
+config 85xx
+        bool
+        depends on E500
+        default y
+
+config PPC_INDIRECT_PCI_BE
+        bool
+        depends on 85xx
+        default y
+
+menu "Freescale 85xx options"
+        depends on E500
+
+choice
+        prompt "Machine Type"
+        depends on 85xx
+        default MPC8540_ADS
+
+config MPC8540_ADS
+        bool "Freescale MPC8540 ADS"
+        help
+          This option enables support for the MPC 8540 ADS evaluation board.
+
+config MPC8548_CDS
+        bool "Freescale MPC8548 CDS"
+        help
+          This option enablese support for the MPC8548 CDS evaluation board.
+
+config MPC8555_CDS
+        bool "Freescale MPC8555 CDS"
+        help
+          This option enablese support for the MPC8555 CDS evaluation board.
+
+config MPC8560_ADS
+        bool "Freescale MPC8560 ADS"
+        help
+          This option enables support for the MPC 8560 ADS evaluation board.
+
+config SBC8560
+        bool "WindRiver PowerQUICC III SBC8560"
+        help
+          This option enables support for the WindRiver PowerQUICC III 
+          SBC8560 board.
+
+config STX_GP3
+        bool "Silicon Turnkey Express GP3"
+        help
+          This option enables support for the Silicon Turnkey Express GP3
+          board.
+
+endchoice
+
+# It's often necessary to know the specific 85xx processor type.
+# Fortunately, it is implied (so far) from the board type, so we
+# don't need to ask more redundant questions.
+config MPC8540
+        bool
+        depends on MPC8540_ADS
+        default y
+
+config MPC8548
+        bool
+        depends on MPC8548_CDS
+        default y
+
+config MPC8555
+        bool
+        depends on MPC8555_CDS
+        default y
+
+config MPC8560
+        bool
+        depends on SBC8560 || MPC8560_ADS || STX_GP3
+        default y
+
+config 85xx_PCI2
+        bool "Supprt for 2nd PCI host controller"
+        depends on MPC8555_CDS
+        default y
+
+config PPC_GEN550
+        bool
+        depends on MPC8540 || SBC8560 || MPC8555
+        default y
+
+endmenu
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
new file mode 100644
index 000000000000..6407197ffd89
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -0,0 +1 @@
+# empty makefile so make clean works
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
new file mode 100644
index 000000000000..c8c0ba3cf8e8
--- /dev/null
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -0,0 +1,352 @@
+config FADS
+        bool
+
+choice
+        prompt "8xx Machine Type"
+        depends on 8xx
+        default RPXLITE
+
+config RPXLITE
+        bool "RPX-Lite"
+        ---help---
+          Single-board computers based around the PowerPC MPC8xx chips and
+          intended for embedded applications.  The following types are
+          supported:
+
+          RPX-Lite:
+          Embedded Planet RPX Lite. PC104 form-factor SBC based on the MPC823.
+
+          RPX-Classic:
+          Embedded Planet RPX Classic Low-fat. Credit-card-size SBC based on
+          the MPC 860
+
+          BSE-IP:
+          Bright Star Engineering ip-Engine.
+
+          TQM823L:
+          TQM850L:
+          TQM855L:
+          TQM860L:
+          MPC8xx based family of mini modules, half credit card size,
+          up to 64 MB of RAM, 8 MB Flash, (Fast) Ethernet, 2 x serial ports,
+          2 x CAN bus interface, ...
+          Manufacturer: TQ Components, www.tq-group.de
+          Date of Release: October (?) 1999
+          End of Life: not yet :-)
+          URL:
+          - module: <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>
+          - starter kit: <http://www.denx.de/PDF/STK8xxLHWM201.pdf>
+          - images: <http://www.denx.de/embedded-ppc-en.html>
+
+          FPS850L:
+          FingerPrint Sensor System (based on TQM850L)
+          Manufacturer: IKENDI AG, <http://www.ikendi.com/>
+          Date of Release: November 1999
+          End of life: end 2000 ?
+          URL: see TQM850L
+
+          IVMS8:
+          MPC860 based board used in the "Integrated Voice Mail System",
+          Small Version (8 voice channels)
+          Manufacturer: Speech Design, <http://www.speech-design.de/>
+          Date of Release: December 2000 (?)
+          End of life: -
+          URL: <http://www.speech-design.de/>
+
+          IVML24:
+          MPC860 based board used in the "Integrated Voice Mail System",
+          Large Version (24 voice channels)
+          Manufacturer: Speech Design, <http://www.speech-design.de/>
+          Date of Release: March 2001  (?)
+          End of life: -
+          URL: <http://www.speech-design.de/>
+
+          HERMES:
+          Hermes-Pro ISDN/LAN router with integrated 8 x hub
+          Manufacturer: Multidata Gesellschaft fur Datentechnik und Informatik
+          <http://www.multidata.de/>
+          Date of Release: 2000 (?)
+          End of life: -
+          URL: <http://www.multidata.de/english/products/hpro.htm>
+
+          IP860:
+          VMEBus IP (Industry Pack) carrier board with MPC860
+          Manufacturer: MicroSys GmbH, <http://www.microsys.de/>
+          Date of Release: ?
+          End of life: -
+          URL: <http://www.microsys.de/html/ip860.html>
+
+          PCU_E:
+          PCU = Peripheral Controller Unit, Extended
+          Manufacturer: Siemens AG, ICN (Information and Communication Networks)
+                <http://www.siemens.de/page/1,3771,224315-1-999_2_226207-0,00.html>
+          Date of Release: April 2001
+          End of life: August 2001
+          URL: n. a.
+
+config RPXCLASSIC
+        bool "RPX-Classic"
+        help
+          The RPX-Classic is a single-board computer based on the Motorola
+          MPC860.  It features 16MB of DRAM and a variable amount of flash,
+          I2C EEPROM, thermal monitoring, a PCMCIA slot, a DIP switch and two
+          LEDs.  Variants with Ethernet ports exist.  Say Y here to support it
+          directly.
+
+config BSEIP
+        bool "BSE-IP"
+        help
+          Say Y here to support the Bright Star Engineering ipEngine SBC.
+          This is a credit-card-sized device featuring a MPC823 processor,
+          26MB DRAM, 4MB flash, Ethernet, a 16K-gate FPGA, USB, an LCD/video
+          controller, and two RS232 ports.
+
+config MPC8XXFADS
+        bool "FADS"
+        select FADS
+
+config MPC86XADS
+        bool "MPC86XADS"
+        help
+          MPC86x Application Development System by Freescale Semiconductor.
+          The MPC86xADS is meant to serve as a platform for s/w and h/w
+          development around the MPC86X processor families.
+        select FADS
+
+config MPC885ADS
+        bool "MPC885ADS"
+        help
+          Freescale Semiconductor MPC885 Application Development System (ADS).
+          Also known as DUET.
+          The MPC885ADS is meant to serve as a platform for s/w and h/w
+          development around the MPC885 processor family.
+
+config TQM823L
+        bool "TQM823L"
+        help
+          Say Y here to support the TQM823L, one of an MPC8xx-based family of
+          mini SBCs (half credit-card size) from TQ Components first released
+          in late 1999.  Technical references are at
+          <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
+          <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
+          <http://www.denx.de/embedded-ppc-en.html>.
+
+config TQM850L
+        bool "TQM850L"
+        help
+          Say Y here to support the TQM850L, one of an MPC8xx-based family of
+          mini SBCs (half credit-card size) from TQ Components first released
+          in late 1999.  Technical references are at
+          <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
+          <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
+          <http://www.denx.de/embedded-ppc-en.html>.
+
+config TQM855L
+        bool "TQM855L"
+        help
+          Say Y here to support the TQM855L, one of an MPC8xx-based family of
+          mini SBCs (half credit-card size) from TQ Components first released
+          in late 1999.  Technical references are at
+          <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
+          <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
+          <http://www.denx.de/embedded-ppc-en.html>.
+
+config TQM860L
+        bool "TQM860L"
+        help
+          Say Y here to support the TQM860L, one of an MPC8xx-based family of
+          mini SBCs (half credit-card size) from TQ Components first released
+          in late 1999.  Technical references are at
+          <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
+          <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
+          <http://www.denx.de/embedded-ppc-en.html>.
+
+config FPS850L
+        bool "FPS850L"
+
+config IVMS8
+        bool "IVMS8"
+        help
+          Say Y here to support the Integrated Voice-Mail Small 8-channel SBC
+          from Speech Design, released March 2001.  The manufacturer's website
+          is at <http://www.speech-design.de/>.
+
+config IVML24
+        bool "IVML24"
+        help
+          Say Y here to support the Integrated Voice-Mail Large 24-channel SBC
+          from Speech Design, released March 2001.  The manufacturer's website
+          is at <http://www.speech-design.de/>.
+
+config HERMES_PRO
+        bool "HERMES"
+
+config IP860
+        bool "IP860"
+
+config LWMON
+        bool "LWMON"
+
+config PCU_E
+        bool "PCU_E"
+
+config CCM
+        bool "CCM"
+
+config LANTEC
+        bool "LANTEC"
+
+config MBX
+        bool "MBX"
+        help
+          MBX is a line of Motorola single-board computer based around the
+          MPC821 and MPC860 processors, and intended for embedded-controller
+          applications.  Say Y here to support these boards directly.
+
+config WINCEPT
+        bool "WinCept"
+        help
+          The Wincept 100/110 is a Motorola single-board computer based on the
+          MPC821 PowerPC, introduced in 1998 and designed to be used in
+          thin-client machines.  Say Y to support it directly.
+
+endchoice
+
+#
+# MPC8xx Communication options
+#
+
+menu "MPC8xx CPM Options"
+        depends on 8xx
+
+config SCC_ENET
+        bool "CPM SCC Ethernet"
+        depends on NET_ETHERNET
+        help
+          Enable Ethernet support via the Motorola MPC8xx serial
+          communications controller.
+
+choice
+        prompt "SCC used for Ethernet"
+        depends on SCC_ENET
+        default SCC1_ENET
+
+config SCC1_ENET
+        bool "SCC1"
+        help
+          Use MPC8xx serial communications controller 1 to drive Ethernet
+          (default).
+
+config SCC2_ENET
+        bool "SCC2"
+        help
+          Use MPC8xx serial communications controller 2 to drive Ethernet.
+
+config SCC3_ENET
+        bool "SCC3"
+        help
+          Use MPC8xx serial communications controller 3 to drive Ethernet.
+
+endchoice
+
+config FEC_ENET
+        bool "860T FEC Ethernet"
+        depends on NET_ETHERNET
+        help
+          Enable Ethernet support via the Fast Ethernet Controller (FCC) on
+          the Motorola MPC8260.
+
+config USE_MDIO
+        bool "Use MDIO for PHY configuration"
+        depends on FEC_ENET
+        help
+          On some boards the hardware configuration of the ethernet PHY can be
+          used without any software interaction over the MDIO interface, so
+          all MII code can be omitted. Say N here if unsure or if you don't
+          need link status reports.
+
+config  FEC_AM79C874
+        bool "Support AMD79C874 PHY"
+        depends on USE_MDIO
+
+config FEC_LXT970
+        bool "Support LXT970 PHY"
+        depends on USE_MDIO
+
+config FEC_LXT971
+        bool "Support LXT971 PHY"
+        depends on USE_MDIO
+        
+config FEC_QS6612
+        bool "Support QS6612 PHY"
+        depends on USE_MDIO
+        
+config ENET_BIG_BUFFERS
+        bool "Use Big CPM Ethernet Buffers"
+        depends on SCC_ENET || FEC_ENET
+        help
+          Allocate large buffers for MPC8xx Ethernet. Increases throughput
+          and decreases the likelihood of dropped packets, but costs memory.
+
+config HTDMSOUND
+        bool "Embedded Planet HIOX Audio"
+        depends on SOUND=y
+
+# This doesn't really belong here, but it is convenient to ask
+# 8xx specific questions.
+comment "Generic MPC8xx Options"
+
+config 8xx_COPYBACK
+        bool "Copy-Back Data Cache (else Writethrough)"
+        help
+          Saying Y here will cause the cache on an MPC8xx processor to be used
+          in Copy-Back mode.  If you say N here, it is used in Writethrough
+          mode.
+
+          If in doubt, say Y here.
+
+config 8xx_CPU6
+        bool "CPU6 Silicon Errata (860 Pre Rev. C)"
+        help
+          MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
+          require workarounds for Linux (and most other OSes to work).  If you
+          get a BUG() very early in boot, this might fix the problem.  For
+          more details read the document entitled "MPC860 Family Device Errata
+          Reference" on Motorola's website.  This option also incurs a
+          performance hit.
+
+          If in doubt, say N here.
+
+choice
+        prompt "Microcode patch selection"
+        default NO_UCODE_PATCH
+        help
+          Help not implemented yet, coming soon.
+
+config NO_UCODE_PATCH
+        bool "None"
+
+config USB_SOF_UCODE_PATCH
+        bool "USB SOF patch"
+        help
+          Help not implemented yet, coming soon.
+
+config I2C_SPI_UCODE_PATCH
+        bool "I2C/SPI relocation patch"
+        help
+          Help not implemented yet, coming soon.
+
+config I2C_SPI_SMC1_UCODE_PATCH
+        bool "I2C/SPI/SMC1 relocation patch"
+        help
+          Help not implemented yet, coming soon.
+
+endchoice
+
+config UCODE_PATCH
+        bool
+        default y
+        depends on !NO_UCODE_PATCH
+
+endmenu
+
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
new file mode 100644
index 000000000000..172c0db63504
--- /dev/null
+++ b/arch/powerpc/platforms/Makefile
@@ -0,0 +1,13 @@
+ifeq ($(CONFIG_PPC_MERGE),y)
+obj-$(CONFIG_PPC_PMAC)          += powermac/
+else
+ifeq ($(CONFIG_PPC64),y)
+obj-$(CONFIG_PPC_PMAC)          += powermac/
+endif
+endif
+obj-$(CONFIG_PPC_CHRP)          += chrp/
+obj-$(CONFIG_4xx)               += 4xx/
+obj-$(CONFIG_85xx)              += 85xx/
+obj-$(CONFIG_PPC_PSERIES)       += pseries/
+obj-$(CONFIG_PPC_ISERIES)       += iseries/
+obj-$(CONFIG_PPC_MAPLE)         += maple/
diff --git a/arch/powerpc/platforms/apus/Kconfig b/arch/powerpc/platforms/apus/Kconfig
new file mode 100644
index 000000000000..6bde3bffed86
--- /dev/null
+++ b/arch/powerpc/platforms/apus/Kconfig
@@ -0,0 +1,130 @@
+
+config AMIGA
+        bool
+        depends on APUS
+        default y
+        help
+          This option enables support for the Amiga series of computers.
+
+config ZORRO
+        bool
+        depends on APUS
+        default y
+        help
+          This enables support for the Zorro bus in the Amiga. If you have
+          expansion cards in your Amiga that conform to the Amiga
+          AutoConfig(tm) specification, say Y, otherwise N. Note that even
+          expansion cards that do not fit in the Zorro slots but fit in e.g.
+          the CPU slot may fall in this category, so you have to say Y to let
+          Linux use these.
+
+config ABSTRACT_CONSOLE
+        bool
+        depends on APUS
+        default y
+
+config APUS_FAST_EXCEPT
+        bool
+        depends on APUS
+        default y
+
+config AMIGA_PCMCIA
+        bool "Amiga 1200/600 PCMCIA support"
+        depends on APUS && EXPERIMENTAL
+        help
+          Include support in the kernel for pcmcia on Amiga 1200 and Amiga
+          600. If you intend to use pcmcia cards say Y; otherwise say N.
+
+config AMIGA_BUILTIN_SERIAL
+        tristate "Amiga builtin serial support"
+        depends on APUS
+        help
+          If you want to use your Amiga's built-in serial port in Linux,
+          answer Y.
+
+          To compile this driver as a module, choose M here.
+
+config GVPIOEXT
+        tristate "GVP IO-Extender support"
+        depends on APUS
+        help
+          If you want to use a GVP IO-Extender serial card in Linux, say Y.
+          Otherwise, say N.
+
+config GVPIOEXT_LP
+        tristate "GVP IO-Extender parallel printer support"
+        depends on GVPIOEXT
+        help
+          Say Y to enable driving a printer from the parallel port on your
+          GVP IO-Extender card, N otherwise.
+
+config GVPIOEXT_PLIP
+        tristate "GVP IO-Extender PLIP support"
+        depends on GVPIOEXT
+        help
+          Say Y to enable doing IP over the parallel port on your GVP
+          IO-Extender card, N otherwise.
+
+config MULTIFACE_III_TTY
+        tristate "Multiface Card III serial support"
+        depends on APUS
+        help
+          If you want to use a Multiface III card's serial port in Linux,
+          answer Y.
+
+          To compile this driver as a module, choose M here.
+
+config A2232
+        tristate "Commodore A2232 serial support (EXPERIMENTAL)"
+        depends on EXPERIMENTAL && APUS
+        ---help---
+          This option supports the 2232 7-port serial card shipped with the
+          Amiga 2000 and other Zorro-bus machines, dating from 1989.  At
+          a max of 19,200 bps, the ports are served by a 6551 ACIA UART chip
+          each, plus a 8520 CIA, and a master 6502 CPU and buffer as well. The
+          ports were connected with 8 pin DIN connectors on the card bracket,
+          for which 8 pin to DB25 adapters were supplied. The card also had
+          jumpers internally to toggle various pinning configurations.
+
+          This driver can be built as a module; but then "generic_serial"
+          will also be built as a module. This has to be loaded before
+          "ser_a2232". If you want to do this, answer M here.
+
+config WHIPPET_SERIAL
+        tristate "Hisoft Whippet PCMCIA serial support"
+        depends on AMIGA_PCMCIA
+        help
+          HiSoft has a web page at <http://www.hisoft.co.uk/>, but there
+          is no listing for the Whippet in their Amiga section.
+
+config APNE
+        tristate "PCMCIA NE2000 support"
+        depends on AMIGA_PCMCIA
+        help
+          If you have a PCMCIA NE2000 compatible adapter, say Y.  Otherwise,
+          say N.
+
+          To compile this driver as a module, choose M here: the
+          module will be called apne.
+
+config SERIAL_CONSOLE
+        bool "Support for serial port console"
+        depends on APUS && (AMIGA_BUILTIN_SERIAL=y || GVPIOEXT=y || MULTIFACE_III_TTY=y)
+
+config HEARTBEAT
+        bool "Use power LED as a heartbeat"
+        depends on APUS
+        help
+          Use the power-on LED on your machine as a load meter.  The exact
+          behavior is platform-dependent, but normally the flash frequency is
+          a hyperbolic function of the 5-minute load average.
+
+config PROC_HARDWARE
+        bool "/proc/hardware support"
+        depends on APUS
+
+source "drivers/zorro/Kconfig"
+
+config PCI_PERMEDIA
+        bool "PCI for Permedia2"
+        depends on !4xx && !8xx && APUS
diff --git a/arch/powerpc/platforms/chrp/Makefile b/arch/powerpc/platforms/chrp/Makefile
new file mode 100644
index 000000000000..902feb1ac431
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/Makefile
@@ -0,0 +1,4 @@
+obj-y                           += setup.o time.o pegasos_eth.o
+obj-$(CONFIG_PCI)               += pci.o
+obj-$(CONFIG_SMP)               += smp.o
+obj-$(CONFIG_NVRAM)             += nvram.o
diff --git a/arch/powerpc/platforms/chrp/chrp.h b/arch/powerpc/platforms/chrp/chrp.h
new file mode 100644
index 000000000000..3a2057fa314a
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/chrp.h
@@ -0,0 +1,12 @@
+/*
+ * Declarations of CHRP platform-specific things.
+ */
+
+extern void chrp_nvram_init(void);
+extern void chrp_get_rtc_time(struct rtc_time *);
+extern int chrp_set_rtc_time(struct rtc_time *);
+extern void chrp_calibrate_decr(void);
+extern long chrp_time_init(void);
+
+extern void chrp_find_bridges(void);
+extern void chrp_event_scan(void);
diff --git a/arch/powerpc/platforms/chrp/nvram.c b/arch/powerpc/platforms/chrp/nvram.c
new file mode 100644
index 000000000000..4ac7125aa09c
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/nvram.c
@@ -0,0 +1,84 @@
+/*
+ *  c 2001 PPC 64 Team, IBM Corp
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ *
+ * /dev/nvram driver for PPC
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <asm/uaccess.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include "chrp.h"
+
+static unsigned int nvram_size;
+static unsigned char nvram_buf[4];
+static DEFINE_SPINLOCK(nvram_lock);
+
+static unsigned char chrp_nvram_read(int addr)
+{
+        unsigned long done, flags;
+        unsigned char ret;
+
+        if (addr >= nvram_size) {
+                printk(KERN_DEBUG "%s: read addr %d > nvram_size %u\n",
+                       current->comm, addr, nvram_size);
+                return 0xff;
+        }
+        spin_lock_irqsave(&nvram_lock, flags);
+        if ((call_rtas("nvram-fetch", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
+                ret = 0xff;
+        else
+                ret = nvram_buf[0];
+        spin_unlock_irqrestore(&nvram_lock, flags);
+
+        return ret;
+}
+
+static void chrp_nvram_write(int addr, unsigned char val)
+{
+        unsigned long done, flags;
+
+        if (addr >= nvram_size) {
+                printk(KERN_DEBUG "%s: write addr %d > nvram_size %u\n",
+                       current->comm, addr, nvram_size);
+                return;
+        }
+        spin_lock_irqsave(&nvram_lock, flags);
+        nvram_buf[0] = val;
+        if ((call_rtas("nvram-store", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
+                printk(KERN_DEBUG "rtas IO error storing 0x%02x at %d", val, addr);
+        spin_unlock_irqrestore(&nvram_lock, flags);
+}
+
+void __init chrp_nvram_init(void)
+{
+        struct device_node *nvram;
+        unsigned int *nbytes_p, proplen;
+
+        nvram = of_find_node_by_type(NULL, "nvram");
+        if (nvram == NULL)
+                return;
+
+        nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen);
+        if (nbytes_p == NULL || proplen != sizeof(unsigned int))
+                return;
+
+        nvram_size = *nbytes_p;
+
+        printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size);
+        of_node_put(nvram);
+
+        ppc_md.nvram_read_val = chrp_nvram_read;
+        ppc_md.nvram_write_val = chrp_nvram_write;
+
+        return;
+}
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
new file mode 100644
index 000000000000..82c429d487f3
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -0,0 +1,310 @@
+/*
+ * CHRP pci routines.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/ide.h>
+
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/irq.h>
+#include <asm/hydra.h>
+#include <asm/prom.h>
+#include <asm/gg2.h>
+#include <asm/machdep.h>
+#include <asm/sections.h>
+#include <asm/pci-bridge.h>
+#include <asm/open_pic.h>
+#include <asm/grackle.h>
+#include <asm/rtas.h>
+
+/* LongTrail */
+void __iomem *gg2_pci_config_base;
+
+/*
+ * The VLSI Golden Gate II has only 512K of PCI configuration space, so we
+ * limit the bus number to 3 bits
+ */
+
+int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
+                           int len, u32 *val)
+{
+        volatile void __iomem *cfg_data;
+        struct pci_controller *hose = bus->sysdata;
+
+        if (bus->number > 7)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * Note: the caller has already checked that off is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
+        switch (len) {
+        case 1:
+                *val =  in_8(cfg_data);
+                break;
+        case 2:
+                *val = in_le16(cfg_data);
+                break;
+        default:
+                *val = in_le32(cfg_data);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
+                            int len, u32 val)
+{
+        volatile void __iomem *cfg_data;
+        struct pci_controller *hose = bus->sysdata;
+
+        if (bus->number > 7)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * Note: the caller has already checked that off is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
+        switch (len) {
+        case 1:
+                out_8(cfg_data, val);
+                break;
+        case 2:
+                out_le16(cfg_data, val);
+                break;
+        default:
+                out_le32(cfg_data, val);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops gg2_pci_ops =
+{
+        gg2_read_config,
+        gg2_write_config
+};
+
+/*
+ * Access functions for PCI config space using RTAS calls.
+ */
+int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                     int len, u32 *val)
+{
+        struct pci_controller *hose = bus->sysdata;
+        unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
+                | (((bus->number - hose->first_busno) & 0xff) << 16)
+                | (hose->index << 24);
+        int ret = -1;
+        int rval;
+
+        rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
+        *val = ret;
+        return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+}
+
+int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                      int len, u32 val)
+{
+        struct pci_controller *hose = bus->sysdata;
+        unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
+                | (((bus->number - hose->first_busno) & 0xff) << 16)
+                | (hose->index << 24);
+        int rval;
+
+        rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
+                         addr, len, val);
+        return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops rtas_pci_ops =
+{
+        rtas_read_config,
+        rtas_write_config
+};
+
+volatile struct Hydra __iomem *Hydra = NULL;
+
+int __init
+hydra_init(void)
+{
+        struct device_node *np;
+
+        np = find_devices("mac-io");
+        if (np == NULL || np->n_addrs == 0)
+                return 0;
+        Hydra = ioremap(np->addrs[0].address, np->addrs[0].size);
+        printk("Hydra Mac I/O at %lx\n", np->addrs[0].address);
+        printk("Hydra Feature_Control was %x",
+               in_le32(&Hydra->Feature_Control));
+        out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
+                                           HYDRA_FC_SCSI_CELL_EN |
+                                           HYDRA_FC_SCCA_ENABLE |
+                                           HYDRA_FC_SCCB_ENABLE |
+                                           HYDRA_FC_ARB_BYPASS |
+                                           HYDRA_FC_MPIC_ENABLE |
+                                           HYDRA_FC_SLOW_SCC_PCLK |
+                                           HYDRA_FC_MPIC_IS_MASTER));
+        printk(", now %x\n", in_le32(&Hydra->Feature_Control));
+        return 1;
+}
+
+void __init
+chrp_pcibios_fixup(void)
+{
+        struct pci_dev *dev = NULL;
+        struct device_node *np;
+
+        /* PCI interrupts are controlled by the OpenPIC */
+        for_each_pci_dev(dev) {
+                np = pci_device_to_OF_node(dev);
+                if ((np != 0) && (np->n_intrs > 0) && (np->intrs[0].line != 0))
+                        dev->irq = np->intrs[0].line;
+                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+        }
+}
+
+#define PRG_CL_RESET_VALID 0x00010000
+
+static void __init
+setup_python(struct pci_controller *hose, struct device_node *dev)
+{
+        u32 __iomem *reg;
+        u32 val;
+        unsigned long addr = dev->addrs[0].address;
+
+        setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010);
+
+        /* Clear the magic go-slow bit */
+        reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40);
+        val = in_be32(&reg[12]);
+        if (val & PRG_CL_RESET_VALID) {
+                out_be32(&reg[12], val & ~PRG_CL_RESET_VALID);
+                in_be32(&reg[12]);
+        }
+        iounmap(reg);
+}
+
+/* Marvell Discovery II based Pegasos 2 */
+static void __init setup_peg2(struct pci_controller *hose, struct device_node *dev)
+{
+        struct device_node *root = find_path_device("/");
+        struct device_node *rtas;
+
+        rtas = of_find_node_by_name (root, "rtas");
+        if (rtas) {
+                hose->ops = &rtas_pci_ops;
+        } else {
+                printk ("RTAS supporting Pegasos OF not found, please upgrade"
+                        " your firmware\n");
+        }
+        pci_assign_all_buses = 1;
+}
+
+void __init
+chrp_find_bridges(void)
+{
+        struct device_node *dev;
+        int *bus_range;
+        int len, index = -1;
+        struct pci_controller *hose;
+        unsigned int *dma;
+        char *model, *machine;
+        int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
+        struct device_node *root = find_path_device("/");
+
+        /*
+         * The PCI host bridge nodes on some machines don't have
+         * properties to adequately identify them, so we have to
+         * look at what sort of machine this is as well.
+         */
+        machine = get_property(root, "model", NULL);
+        if (machine != NULL) {
+                is_longtrail = strncmp(machine, "IBM,LongTrail", 13) == 0;
+                is_mot = strncmp(machine, "MOT", 3) == 0;
+                if (strncmp(machine, "Pegasos2", 8) == 0)
+                        is_pegasos = 2;
+                else if (strncmp(machine, "Pegasos", 7) == 0)
+                        is_pegasos = 1;
+        }
+        for (dev = root->child; dev != NULL; dev = dev->sibling) {
+                if (dev->type == NULL || strcmp(dev->type, "pci") != 0)
+                        continue;
+                ++index;
+                /* The GG2 bridge on the LongTrail doesn't have an address */
+                if (dev->n_addrs < 1 && !is_longtrail) {
+                        printk(KERN_WARNING "Can't use %s: no address\n",
+                               dev->full_name);
+                        continue;
+                }
+                bus_range = (int *) get_property(dev, "bus-range", &len);
+                if (bus_range == NULL || len < 2 * sizeof(int)) {
+                        printk(KERN_WARNING "Can't get bus-range for %s\n",
+                                dev->full_name);
+                        continue;
+                }
+                if (bus_range[1] == bus_range[0])
+                        printk(KERN_INFO "PCI bus %d", bus_range[0]);
+                else
+                        printk(KERN_INFO "PCI buses %d..%d",
+                               bus_range[0], bus_range[1]);
+                printk(" controlled by %s", dev->type);
+                if (dev->n_addrs > 0)
+                        printk(" at %lx", dev->addrs[0].address);
+                printk("\n");
+
+                hose = pcibios_alloc_controller();
+                if (!hose) {
+                        printk("Can't allocate PCI controller structure for %s\n",
+                                dev->full_name);
+                        continue;
+                }
+                hose->arch_data = dev;
+                hose->first_busno = bus_range[0];
+                hose->last_busno = bus_range[1];
+
+                model = get_property(dev, "model", NULL);
+                if (model == NULL)
+                        model = "<none>";
+                if (device_is_compatible(dev, "IBM,python")) {
+                        setup_python(hose, dev);
+                } else if (is_mot
+                           || strncmp(model, "Motorola, Grackle", 17) == 0) {
+                        setup_grackle(hose);
+                } else if (is_longtrail) {
+                        void __iomem *p = ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
+                        hose->ops = &gg2_pci_ops;
+                        hose->cfg_data = p;
+                        gg2_pci_config_base = p;
+                } else if (is_pegasos == 1) {
+                        setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc);
+                } else if (is_pegasos == 2) {
+                        setup_peg2(hose, dev);
+                } else {
+                        printk("No methods for %s (model %s), using RTAS\n",
+                               dev->full_name, model);
+                        hose->ops = &rtas_pci_ops;
+                }
+
+                pci_process_bridge_OF_ranges(hose, dev, index == 0);
+
+                /* check the first bridge for a property that we can
+                   use to set pci_dram_offset */
+                dma = (unsigned int *)
+                        get_property(dev, "ibm,dma-ranges", &len);
+                if (index == 0 && dma != NULL && len >= 6 * sizeof(*dma)) {
+                        pci_dram_offset = dma[2] - dma[3];
+                        printk("pci_dram_offset = %lx\n", pci_dram_offset);
+                }
+        }
+
+        /* Do not fixup interrupts from OF tree on pegasos */
+        if (is_pegasos == 0)
+                ppc_md.pcibios_fixup = chrp_pcibios_fixup;
+}
diff --git a/arch/powerpc/platforms/chrp/pegasos_eth.c b/arch/powerpc/platforms/chrp/pegasos_eth.c
new file mode 100644
index 000000000000..a9052305c35d
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/pegasos_eth.c
@@ -0,0 +1,213 @@
+/*
+ *  arch/ppc/platforms/chrp_pegasos_eth.c
+ *
+ *  Copyright (C) 2005 Sven Luther <sl@bplan-gmbh.de>
+ *  Thanks to :
+ *      Dale Farnsworth <dale@farnsworth.org>
+ *      Mark A. Greer <mgreer@mvista.com>
+ *      Nicolas DET <nd@bplan-gmbh.de>
+ *      Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ *  And anyone else who helped me on this.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/mv643xx.h>
+#include <linux/pci.h>
+
+#define PEGASOS2_MARVELL_REGBASE                (0xf1000000)
+#define PEGASOS2_MARVELL_REGSIZE                (0x00004000)
+#define PEGASOS2_SRAM_BASE                      (0xf2000000)
+#define PEGASOS2_SRAM_SIZE                      (256*1024)
+
+#define PEGASOS2_SRAM_BASE_ETH0                 (PEGASOS2_SRAM_BASE)
+#define PEGASOS2_SRAM_BASE_ETH1                 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) )
+
+
+#define PEGASOS2_SRAM_RXRING_SIZE               (PEGASOS2_SRAM_SIZE/4)
+#define PEGASOS2_SRAM_TXRING_SIZE               (PEGASOS2_SRAM_SIZE/4)
+
+#undef BE_VERBOSE
+
+static struct resource mv643xx_eth_shared_resources[] = {
+        [0] = {
+                .name   = "ethernet shared base",
+                .start  = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
+                .end    = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
+                                        MV643XX_ETH_SHARED_REGS_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device mv643xx_eth_shared_device = {
+        .name           = MV643XX_ETH_SHARED_NAME,
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(mv643xx_eth_shared_resources),
+        .resource       = mv643xx_eth_shared_resources,
+};
+
+static struct resource mv643xx_eth0_resources[] = {
+        [0] = {
+                .name   = "eth0 irq",
+                .start  = 9,
+                .end    = 9,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+
+static struct mv643xx_eth_platform_data eth0_pd = {
+        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
+        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
+        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
+
+        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
+        .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
+        .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
+};
+
+static struct platform_device eth0_device = {
+        .name           = MV643XX_ETH_NAME,
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(mv643xx_eth0_resources),
+        .resource       = mv643xx_eth0_resources,
+        .dev = {
+                .platform_data = &eth0_pd,
+        },
+};
+
+static struct resource mv643xx_eth1_resources[] = {
+        [0] = {
+                .name   = "eth1 irq",
+                .start  = 9,
+                .end    = 9,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct mv643xx_eth_platform_data eth1_pd = {
+        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
+        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
+        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
+
+        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE,
+        .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
+        .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
+};
+
+static struct platform_device eth1_device = {
+        .name           = MV643XX_ETH_NAME,
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(mv643xx_eth1_resources),
+        .resource       = mv643xx_eth1_resources,
+        .dev = {
+                .platform_data = &eth1_pd,
+        },
+};
+
+static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
+        &mv643xx_eth_shared_device,
+        &eth0_device,
+        &eth1_device,
+};
+
+/***********/
+/***********/
+#define MV_READ(offset,val)     { val = readl(mv643xx_reg_base + offset); }
+#define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset)
+
+static void __iomem *mv643xx_reg_base;
+
+static int Enable_SRAM(void)
+{
+        u32 ALong;
+
+        if (mv643xx_reg_base == NULL)
+                mv643xx_reg_base = ioremap(PEGASOS2_MARVELL_REGBASE,
+                                        PEGASOS2_MARVELL_REGSIZE);
+
+        if (mv643xx_reg_base == NULL)
+                return -ENOMEM;
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: register remapped from %p to %p\n",
+                (void *)PEGASOS2_MARVELL_REGBASE, (void *)mv643xx_reg_base);
+#endif
+
+        MV_WRITE(MV64340_SRAM_CONFIG, 0);
+
+        MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16);
+
+        MV_READ(MV64340_BASE_ADDR_ENABLE, ALong);
+        ALong &= ~(1 << 19);
+        MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong);
+
+        ALong = 0x02;
+        ALong |= PEGASOS2_SRAM_BASE & 0xffff0000;
+        MV_WRITE(MV643XX_ETH_BAR_4, ALong);
+
+        MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000);
+
+        MV_READ(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
+        ALong &= ~(1 << 4);
+        MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: register unmapped\n");
+        printk("Pegasos II/Marvell MV64361: SRAM at %p, size=%x\n", (void*) PEGASOS2_SRAM_BASE, PEGASOS2_SRAM_SIZE);
+#endif
+
+        iounmap(mv643xx_reg_base);
+        mv643xx_reg_base = NULL;
+
+        return 1;
+}
+
+
+/***********/
+/***********/
+int mv643xx_eth_add_pds(void)
+{
+        int ret = 0;
+        static struct pci_device_id pci_marvell_mv64360[] = {
+                { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64360) },
+                { }
+        };
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: init\n");
+#endif
+
+        if (pci_dev_present(pci_marvell_mv64360)) {
+                ret = platform_add_devices(mv643xx_eth_pd_devs,
+                                ARRAY_SIZE(mv643xx_eth_pd_devs));
+
+                if ( Enable_SRAM() < 0)
+                {
+                        eth0_pd.tx_sram_addr = 0;
+                        eth0_pd.tx_sram_size = 0;
+                        eth0_pd.rx_sram_addr = 0;
+                        eth0_pd.rx_sram_size = 0;
+
+                        eth1_pd.tx_sram_addr = 0;
+                        eth1_pd.tx_sram_size = 0;
+                        eth1_pd.rx_sram_addr = 0;
+                        eth1_pd.rx_sram_size = 0;
+
+#ifdef BE_VERBOSE
+                        printk("Pegasos II/Marvell MV64361: Can't enable the "
+                                "SRAM\n");
+#endif
+                }
+        }
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: init is over\n");
+#endif
+
+        return ret;
+}
+
+device_initcall(mv643xx_eth_add_pds);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
new file mode 100644
index 000000000000..ecd32d5d85f4
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -0,0 +1,522 @@
+/*
+ *  arch/ppc/platforms/setup.c
+ *
+ *  Copyright (C) 1995  Linus Torvalds
+ *  Adapted from 'alpha' version by Gary Thomas
+ *  Modified by Cort Dougan (cort@cs.nmt.edu)
+ */
+
+/*
+ * bootup setup stuff..
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/a.out.h>
+#include <linux/tty.h>
+#include <linux/major.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/version.h>
+#include <linux/adb.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/ide.h>
+#include <linux/console.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/prom.h>
+#include <asm/gg2.h>
+#include <asm/pci-bridge.h>
+#include <asm/dma.h>
+#include <asm/machdep.h>
+#include <asm/irq.h>
+#include <asm/hydra.h>
+#include <asm/sections.h>
+#include <asm/time.h>
+#include <asm/btext.h>
+#include <asm/i8259.h>
+#include <asm/mpic.h>
+#include <asm/rtas.h>
+#include <asm/xmon.h>
+
+#include "chrp.h"
+
+void rtas_indicator_progress(char *, unsigned short);
+void btext_progress(char *, unsigned short);
+
+int _chrp_type;
+EXPORT_SYMBOL(_chrp_type);
+
+struct mpic *chrp_mpic;
+
+/*
+ * XXX this should be in xmon.h, but putting it there means xmon.h
+ * has to include <linux/interrupt.h> (to get irqreturn_t), which
+ * causes all sorts of problems.  -- paulus
+ */
+extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
+
+extern unsigned long loops_per_jiffy;
+
+#ifdef CONFIG_SMP
+extern struct smp_ops_t chrp_smp_ops;
+#endif
+
+static const char *gg2_memtypes[4] = {
+        "FPM", "SDRAM", "EDO", "BEDO"
+};
+static const char *gg2_cachesizes[4] = {
+        "256 KB", "512 KB", "1 MB", "Reserved"
+};
+static const char *gg2_cachetypes[4] = {
+        "Asynchronous", "Reserved", "Flow-Through Synchronous",
+        "Pipelined Synchronous"
+};
+static const char *gg2_cachemodes[4] = {
+        "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
+};
+
+void chrp_show_cpuinfo(struct seq_file *m)
+{
+        int i, sdramen;
+        unsigned int t;
+        struct device_node *root;
+        const char *model = "";
+
+        root = find_path_device("/");
+        if (root)
+                model = get_property(root, "model", NULL);
+        seq_printf(m, "machine\t\t: CHRP %s\n", model);
+
+        /* longtrail (goldengate) stuff */
+        if (!strncmp(model, "IBM,LongTrail", 13)) {
+                /* VLSI VAS96011/12 `Golden Gate 2' */
+                /* Memory banks */
+                sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
+                           >>31) & 1;
+                for (i = 0; i < (sdramen ? 4 : 6); i++) {
+                        t = in_le32(gg2_pci_config_base+
+                                                 GG2_PCI_DRAM_BANK0+
+                                                 i*4);
+                        if (!(t & 1))
+                                continue;
+                        switch ((t>>8) & 0x1f) {
+                        case 0x1f:
+                                model = "4 MB";
+                                break;
+                        case 0x1e:
+                                model = "8 MB";
+                                break;
+                        case 0x1c:
+                                model = "16 MB";
+                                break;
+                        case 0x18:
+                                model = "32 MB";
+                                break;
+                        case 0x10:
+                                model = "64 MB";
+                                break;
+                        case 0x00:
+                                model = "128 MB";
+                                break;
+                        default:
+                                model = "Reserved";
+                                break;
+                        }
+                        seq_printf(m, "memory bank %d\t: %s %s\n", i, model,
+                                   gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
+                }
+                /* L2 cache */
+                t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
+                seq_printf(m, "board l2\t: %s %s (%s)\n",
+                           gg2_cachesizes[(t>>7) & 3],
+                           gg2_cachetypes[(t>>2) & 3],
+                           gg2_cachemodes[t & 3]);
+        }
+}
+
+/*
+ *  Fixes for the National Semiconductor PC78308VUL SuperI/O
+ *
+ *  Some versions of Open Firmware incorrectly initialize the IRQ settings
+ *  for keyboard and mouse
+ */
+static inline void __init sio_write(u8 val, u8 index)
+{
+        outb(index, 0x15c);
+        outb(val, 0x15d);
+}
+
+static inline u8 __init sio_read(u8 index)
+{
+        outb(index, 0x15c);
+        return inb(0x15d);
+}
+
+static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
+                                     u8 type)
+{
+        u8 level0, type0, active;
+
+        /* select logical device */
+        sio_write(device, 0x07);
+        active = sio_read(0x30);
+        level0 = sio_read(0x70);
+        type0 = sio_read(0x71);
+        if (level0 != level || type0 != type || !active) {
+                printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: "
+                       "remapping to level %d, type %d, active\n",
+                       name, level0, type0, !active ? "in" : "", level, type);
+                sio_write(0x01, 0x30);
+                sio_write(level, 0x70);
+                sio_write(type, 0x71);
+        }
+}
+
+static void __init sio_init(void)
+{
+        struct device_node *root;
+
+        if ((root = find_path_device("/")) &&
+            !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) {
+                /* logical device 0 (KBC/Keyboard) */
+                sio_fixup_irq("keyboard", 0, 1, 2);
+                /* select logical device 1 (KBC/Mouse) */
+                sio_fixup_irq("mouse", 1, 12, 2);
+        }
+}
+
+
+static void __init pegasos_set_l2cr(void)
+{
+        struct device_node *np;
+
+        /* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
+        if (_chrp_type != _CHRP_Pegasos)
+                return;
+
+        /* Enable L2 cache if needed */
+        np = find_type_devices("cpu");
+        if (np != NULL) {
+                unsigned int *l2cr = (unsigned int *)
+                        get_property (np, "l2cr", NULL);
+                if (l2cr == NULL) {
+                        printk ("Pegasos l2cr : no cpu l2cr property found\n");
+                        return;
+                }
+                if (!((*l2cr) & 0x80000000)) {
+                        printk ("Pegasos l2cr : L2 cache was not active, "
+                                "activating\n");
+                        _set_L2CR(0);
+                        _set_L2CR((*l2cr) | 0x80000000);
+                }
+        }
+}
+
+void __init chrp_setup_arch(void)
+{
+        struct device_node *root = find_path_device ("/");
+        char *machine = NULL;
+        struct device_node *device;
+        unsigned int *p = NULL;
+
+        /* init to some ~sane value until calibrate_delay() runs */
+        loops_per_jiffy = 50000000/HZ;
+
+        if (root)
+                machine = get_property(root, "model", NULL);
+        if (machine && strncmp(machine, "Pegasos", 7) == 0) {
+                _chrp_type = _CHRP_Pegasos;
+        } else if (machine && strncmp(machine, "IBM", 3) == 0) {
+                _chrp_type = _CHRP_IBM;
+        } else if (machine && strncmp(machine, "MOT", 3) == 0) {
+                _chrp_type = _CHRP_Motorola;
+        } else {
+                /* Let's assume it is an IBM chrp if all else fails */
+                _chrp_type = _CHRP_IBM;
+        }
+        printk("chrp type = %x\n", _chrp_type);
+
+        rtas_initialize();
+        if (rtas_token("display-character") >= 0)
+                ppc_md.progress = rtas_progress;
+
+#ifdef CONFIG_BOOTX_TEXT
+        if (ppc_md.progress == NULL && boot_text_mapped)
+                ppc_md.progress = btext_progress;
+#endif
+
+#ifdef CONFIG_BLK_DEV_INITRD
+        /* this is fine for chrp */
+        initrd_below_start_ok = 1;
+
+        if (initrd_start)
+                ROOT_DEV = Root_RAM0;
+        else
+#endif
+                ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
+
+        /* On pegasos, enable the L2 cache if not already done by OF */
+        pegasos_set_l2cr();
+
+        /* Lookup PCI host bridges */
+        chrp_find_bridges();
+
+        /*
+         *  Temporary fixes for PCI devices.
+         *  -- Geert
+         */
+        hydra_init();           /* Mac I/O */
+
+        /*
+         *  Fix the Super I/O configuration
+         */
+        sio_init();
+
+        /* Get the event scan rate for the rtas so we know how
+         * often it expects a heartbeat. -- Cort
+         */
+        device = find_devices("rtas");
+        if (device)
+                p = (unsigned int *) get_property
+                        (device, "rtas-event-scan-rate", NULL);
+        if (p && *p) {
+                ppc_md.heartbeat = chrp_event_scan;
+                ppc_md.heartbeat_reset = HZ / (*p * 30) - 1;
+                ppc_md.heartbeat_count = 1;
+                printk("RTAS Event Scan Rate: %u (%lu jiffies)\n",
+                       *p, ppc_md.heartbeat_reset);
+        }
+
+        pci_create_OF_bus_map();
+
+        /*
+         * Print the banner, then scroll down so boot progress
+         * can be printed.  -- Cort
+         */
+        if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
+}
+
+void
+chrp_event_scan(void)
+{
+        unsigned char log[1024];
+        int ret = 0;
+
+        /* XXX: we should loop until the hardware says no more error logs -- Cort */
+        rtas_call(rtas_token("event-scan"), 4, 1, &ret, 0xffffffff, 0,
+                  __pa(log), 1024);
+        ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
+}
+
+/*
+ * Finds the open-pic node and sets up the mpic driver.
+ */
+static void __init chrp_find_openpic(void)
+{
+        struct device_node *np, *root;
+        int len, i, j, irq_count;
+        int isu_size, idu_size;
+        unsigned int *iranges, *opprop = NULL;
+        int oplen = 0;
+        unsigned long opaddr;
+        int na = 1;
+        unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
+
+        np = find_type_devices("open-pic");
+        if (np == NULL)
+                return;
+        root = find_path_device("/");
+        if (root) {
+                opprop = (unsigned int *) get_property
+                        (root, "platform-open-pic", &oplen);
+                na = prom_n_addr_cells(root);
+        }
+        if (opprop && oplen >= na * sizeof(unsigned int)) {
+                opaddr = opprop[na-1];  /* assume 32-bit */
+                oplen /= na * sizeof(unsigned int);
+        } else {
+                if (np->n_addrs == 0)
+                        return;
+                opaddr = np->addrs[0].address;
+                oplen = 0;
+        }
+
+        printk(KERN_INFO "OpenPIC at %lx\n", opaddr);
+
+        irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
+        prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS - 4);
+
+        iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
+        if (iranges == NULL)
+                len = 0;        /* non-distributed mpic */
+        else
+                len /= 2 * sizeof(unsigned int);
+
+        /*
+         * The first pair of cells in interrupt-ranges refers to the
+         * IDU; subsequent pairs refer to the ISUs.
+         */
+        if (oplen < len) {
+                printk(KERN_ERR "Insufficient addresses for distributed"
+                       " OpenPIC (%d < %d)\n", np->n_addrs, len);
+                len = oplen;
+        }
+
+        isu_size = 0;
+        idu_size = 0;
+        if (len > 0 && iranges[1] != 0) {
+                printk(KERN_INFO "OpenPIC irqs %d..%d in IDU\n",
+                       iranges[0], iranges[0] + iranges[1] - 1);
+                idu_size = iranges[1];
+        }
+        if (len > 1)
+                isu_size = iranges[3];
+
+        chrp_mpic = mpic_alloc(opaddr, MPIC_PRIMARY,
+                               isu_size, NUM_ISA_INTERRUPTS, irq_count,
+                               NR_IRQS - 4, init_senses, irq_count,
+                               " MPIC    ");
+        if (chrp_mpic == NULL) {
+                printk(KERN_ERR "Failed to allocate MPIC structure\n");
+                return;
+        }
+
+        j = na - 1;
+        for (i = 1; i < len; ++i) {
+                iranges += 2;
+                j += na;
+                printk(KERN_INFO "OpenPIC irqs %d..%d in ISU at %x\n",
+                       iranges[0], iranges[0] + iranges[1] - 1,
+                       opprop[j]);
+                mpic_assign_isu(chrp_mpic, i - 1, opprop[j]);
+        }
+
+        mpic_init(chrp_mpic);
+        mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
+}
+
+#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
+static struct irqaction xmon_irqaction = {
+        .handler = xmon_irq,
+        .mask = CPU_MASK_NONE,
+        .name = "XMON break",
+};
+#endif
+
+void __init chrp_init_IRQ(void)
+{
+        struct device_node *np;
+        unsigned long chrp_int_ack = 0;
+#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
+        struct device_node *kbd;
+#endif
+
+        for (np = find_devices("pci"); np != NULL; np = np->next) {
+                unsigned int *addrp = (unsigned int *)
+                        get_property(np, "8259-interrupt-acknowledge", NULL);
+
+                if (addrp == NULL)
+                        continue;
+                chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
+                break;
+        }
+        if (np == NULL)
+                printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
+
+        chrp_find_openpic();
+
+        i8259_init(chrp_int_ack, 0);
+
+        if (_chrp_type == _CHRP_Pegasos)
+                ppc_md.get_irq        = i8259_irq;
+        else
+                ppc_md.get_irq        = mpic_get_irq;
+
+#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
+        /* see if there is a keyboard in the device tree
+           with a parent of type "adb" */
+        for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next)
+                if (kbd->parent && kbd->parent->type
+                    && strcmp(kbd->parent->type, "adb") == 0)
+                        break;
+        if (kbd)
+                setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction);
+#endif
+}
+
+void __init
+chrp_init2(void)
+{
+#ifdef CONFIG_NVRAM
+        chrp_nvram_init();
+#endif
+
+        request_region(0x20,0x20,"pic1");
+        request_region(0xa0,0x20,"pic2");
+        request_region(0x00,0x20,"dma1");
+        request_region(0x40,0x20,"timer");
+        request_region(0x80,0x10,"dma page reg");
+        request_region(0xc0,0x20,"dma2");
+
+        if (ppc_md.progress)
+                ppc_md.progress("  Have fun!    ", 0x7777);
+}
+
+void __init chrp_init(void)
+{
+        ISA_DMA_THRESHOLD = ~0L;
+        DMA_MODE_READ = 0x44;
+        DMA_MODE_WRITE = 0x48;
+        isa_io_base = CHRP_ISA_IO_BASE;         /* default value */
+        ppc_do_canonicalize_irqs = 1;
+
+        /* Assume we have an 8259... */
+        __irq_offset_value = NUM_ISA_INTERRUPTS;
+
+        ppc_md.setup_arch     = chrp_setup_arch;
+        ppc_md.show_cpuinfo   = chrp_show_cpuinfo;
+
+        ppc_md.init_IRQ       = chrp_init_IRQ;
+        ppc_md.init           = chrp_init2;
+
+        ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
+
+        ppc_md.restart        = rtas_restart;
+        ppc_md.power_off      = rtas_power_off;
+        ppc_md.halt           = rtas_halt;
+
+        ppc_md.time_init      = chrp_time_init;
+        ppc_md.set_rtc_time   = chrp_set_rtc_time;
+        ppc_md.get_rtc_time   = chrp_get_rtc_time;
+        ppc_md.calibrate_decr = chrp_calibrate_decr;
+
+#ifdef CONFIG_SMP
+        smp_ops = &chrp_smp_ops;
+#endif /* CONFIG_SMP */
+}
+
+#ifdef CONFIG_BOOTX_TEXT
+void
+btext_progress(char *s, unsigned short hex)
+{
+        btext_drawstring(s);
+        btext_drawstring("\n");
+}
+#endif /* CONFIG_BOOTX_TEXT */
diff --git a/arch/powerpc/platforms/chrp/smp.c b/arch/powerpc/platforms/chrp/smp.c
new file mode 100644
index 000000000000..31ee49c25014
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/smp.c
@@ -0,0 +1,122 @@
+/*
+ * Smp support for CHRP machines.
+ *
+ * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
+ * deal of code from the sparc and intel versions.
+ *
+ * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+
+#include <asm/ptrace.h>
+#include <asm/atomic.h>
+#include <asm/irq.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/smp.h>
+#include <asm/residual.h>
+#include <asm/time.h>
+#include <asm/open_pic.h>
+#include <asm/machdep.h>
+#include <asm/smp.h>
+#include <asm/mpic.h>
+
+extern unsigned long smp_chrp_cpu_nr;
+
+static int __init smp_chrp_probe(void)
+{
+        struct device_node *cpus = NULL;
+        unsigned int *reg;
+        int reglen;
+        int ncpus = 0;
+        int cpuid;
+        unsigned int phys;
+
+        /* Count CPUs in the device-tree */
+        cpuid = 1;      /* the boot cpu is logical cpu 0 */
+        while ((cpus = of_find_node_by_type(cpus, "cpu")) != NULL) {
+                phys = ncpus;
+                reg = (unsigned int *) get_property(cpus, "reg", &reglen);
+                if (reg && reglen >= sizeof(unsigned int))
+                        /* hmmm, not having a reg property would be bad */
+                        phys = *reg;
+                if (phys != boot_cpuid_phys) {
+                        set_hard_smp_processor_id(cpuid, phys);
+                        ++cpuid;
+                }
+                ++ncpus;
+        }
+
+        printk(KERN_INFO "CHRP SMP probe found %d cpus\n", ncpus);
+
+        /* Nothing more to do if less than 2 of them */
+        if (ncpus <= 1)
+                return 1;
+
+        mpic_request_ipis();
+
+        return ncpus;
+}
+
+static void __devinit smp_chrp_kick_cpu(int nr)
+{
+        *(unsigned long *)KERNELBASE = nr;
+        asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
+}
+
+static void __devinit smp_chrp_setup_cpu(int cpu_nr)
+{
+        mpic_setup_this_cpu();
+}
+
+static DEFINE_SPINLOCK(timebase_lock);
+static unsigned int timebase_upper = 0, timebase_lower = 0;
+
+void __devinit smp_chrp_give_timebase(void)
+{
+        spin_lock(&timebase_lock);
+        rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
+        timebase_upper = get_tbu();
+        timebase_lower = get_tbl();
+        spin_unlock(&timebase_lock);
+
+        while (timebase_upper || timebase_lower)
+                barrier();
+        rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
+}
+
+void __devinit smp_chrp_take_timebase(void)
+{
+        while (!(timebase_upper || timebase_lower))
+                barrier();
+        spin_lock(&timebase_lock);
+        set_tb(timebase_upper, timebase_lower);
+        timebase_upper = 0;
+        timebase_lower = 0;
+        spin_unlock(&timebase_lock);
+        printk("CPU %i taken timebase\n", smp_processor_id());
+}
+
+/* CHRP with openpic */
+struct smp_ops_t chrp_smp_ops = {
+        .message_pass = smp_mpic_message_pass,
+        .probe = smp_chrp_probe,
+        .kick_cpu = smp_chrp_kick_cpu,
+        .setup_cpu = smp_chrp_setup_cpu,
+        .give_timebase = smp_chrp_give_timebase,
+        .take_timebase = smp_chrp_take_timebase,
+};
diff --git a/arch/powerpc/platforms/chrp/time.c b/arch/powerpc/platforms/chrp/time.c
new file mode 100644
index 000000000000..9e53535ddb82
--- /dev/null
+++ b/arch/powerpc/platforms/chrp/time.c
@@ -0,0 +1,188 @@
+/*
+ *  arch/ppc/platforms/chrp_time.c
+ *
+ *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
+ *
+ * Adapted for PowerPC (PReP) by Gary Thomas
+ * Modified by Cort Dougan (cort@cs.nmt.edu).
+ * Copied and modified from arch/i386/kernel/time.c
+ *
+ */
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <linux/kernel_stat.h>
+#include <linux/mc146818rtc.h>
+#include <linux/init.h>
+#include <linux/bcd.h>
+
+#include <asm/io.h>
+#include <asm/nvram.h>
+#include <asm/prom.h>
+#include <asm/sections.h>
+#include <asm/time.h>
+
+extern spinlock_t rtc_lock;
+
+static int nvram_as1 = NVRAM_AS1;
+static int nvram_as0 = NVRAM_AS0;
+static int nvram_data = NVRAM_DATA;
+
+long __init chrp_time_init(void)
+{
+        struct device_node *rtcs;
+        int base;
+
+        rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
+        if (rtcs == NULL)
+                rtcs = find_compatible_devices("rtc", "ds1385-rtc");
+        if (rtcs == NULL || rtcs->addrs == NULL)
+                return 0;
+        base = rtcs->addrs[0].address;
+        nvram_as1 = 0;
+        nvram_as0 = base;
+        nvram_data = base + 1;
+
+        return 0;
+}
+
+int chrp_cmos_clock_read(int addr)
+{
+        if (nvram_as1 != 0)
+                outb(addr>>8, nvram_as1);
+        outb(addr, nvram_as0);
+        return (inb(nvram_data));
+}
+
+void chrp_cmos_clock_write(unsigned long val, int addr)
+{
+        if (nvram_as1 != 0)
+                outb(addr>>8, nvram_as1);
+        outb(addr, nvram_as0);
+        outb(val, nvram_data);
+        return;
+}
+
+/*
+ * Set the hardware clock. -- Cort
+ */
+int chrp_set_rtc_time(struct rtc_time *tmarg)
+{
+        unsigned char save_control, save_freq_select;
+        struct rtc_time tm = *tmarg;
+
+        spin_lock(&rtc_lock);
+
+        save_control = chrp_cmos_clock_read(RTC_CONTROL); /* tell the clock it's being set */
+
+        chrp_cmos_clock_write((save_control|RTC_SET), RTC_CONTROL);
+
+        save_freq_select = chrp_cmos_clock_read(RTC_FREQ_SELECT); /* stop and reset prescaler */
+
+        chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
+
+        tm.tm_year -= 1900;
+        if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
+                BIN_TO_BCD(tm.tm_sec);
+                BIN_TO_BCD(tm.tm_min);
+                BIN_TO_BCD(tm.tm_hour);
+                BIN_TO_BCD(tm.tm_mon);
+                BIN_TO_BCD(tm.tm_mday);
+                BIN_TO_BCD(tm.tm_year);
+        }
+        chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS);
+        chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES);
+        chrp_cmos_clock_write(tm.tm_hour,RTC_HOURS);
+        chrp_cmos_clock_write(tm.tm_mon,RTC_MONTH);
+        chrp_cmos_clock_write(tm.tm_mday,RTC_DAY_OF_MONTH);
+        chrp_cmos_clock_write(tm.tm_year,RTC_YEAR);
+
+        /* The following flags have to be released exactly in this order,
+         * otherwise the DS12887 (popular MC146818A clone with integrated
+         * battery and quartz) will not reset the oscillator and will not
+         * update precisely 500 ms later. You won't find this mentioned in
+         * the Dallas Semiconductor data sheets, but who believes data
+         * sheets anyway ...                           -- Markus Kuhn
+         */
+        chrp_cmos_clock_write(save_control, RTC_CONTROL);
+        chrp_cmos_clock_write(save_freq_select, RTC_FREQ_SELECT);
+
+        spin_unlock(&rtc_lock);
+        return 0;
+}
+
+void chrp_get_rtc_time(struct rtc_time *tm)
+{
+        unsigned int year, mon, day, hour, min, sec;
+        int uip, i;
+
+        /* The Linux interpretation of the CMOS clock register contents:
+         * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
+         * RTC registers show the second which has precisely just started.
+         * Let's hope other operating systems interpret the RTC the same way.
+         */
+
+        /* Since the UIP flag is set for about 2.2 ms and the clock
+         * is typically written with a precision of 1 jiffy, trying
+         * to obtain a precision better than a few milliseconds is
+         * an illusion. Only consistency is interesting, this also
+         * allows to use the routine for /dev/rtc without a potential
+         * 1 second kernel busy loop triggered by any reader of /dev/rtc.
+         */
+
+        for ( i = 0; i<1000000; i++) {
+                uip = chrp_cmos_clock_read(RTC_FREQ_SELECT);
+                sec = chrp_cmos_clock_read(RTC_SECONDS);
+                min = chrp_cmos_clock_read(RTC_MINUTES);
+                hour = chrp_cmos_clock_read(RTC_HOURS);
+                day = chrp_cmos_clock_read(RTC_DAY_OF_MONTH);
+                mon = chrp_cmos_clock_read(RTC_MONTH);
+                year = chrp_cmos_clock_read(RTC_YEAR);
+                uip |= chrp_cmos_clock_read(RTC_FREQ_SELECT);
+                if ((uip & RTC_UIP)==0) break;
+        }
+
+        if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
+                BCD_TO_BIN(sec);
+                BCD_TO_BIN(min);
+                BCD_TO_BIN(hour);
+                BCD_TO_BIN(day);
+                BCD_TO_BIN(mon);
+                BCD_TO_BIN(year);
+        }
+        if ((year += 1900) < 1970)
+                year += 100;
+        tm->tm_sec = sec;
+        tm->tm_min = min;
+        tm->tm_hour = hour;
+        tm->tm_mday = day;
+        tm->tm_mon = mon;
+        tm->tm_year = year;
+}
+
+
+void __init chrp_calibrate_decr(void)
+{
+        struct device_node *cpu;
+        unsigned int freq, *fp;
+
+        /*
+         * The cpu node should have a timebase-frequency property
+         * to tell us the rate at which the decrementer counts.
+         */
+        freq = 16666000;                /* hardcoded default */
+        cpu = find_type_devices("cpu");
+        if (cpu != 0) {
+                fp = (unsigned int *)
+                        get_property(cpu, "timebase-frequency", NULL);
+                if (fp != 0)
+                        freq = *fp;
+        }
+        ppc_tb_freq = freq;
+}
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
new file mode 100644
index 000000000000..81250090f98d
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -0,0 +1,318 @@
+choice
+        prompt "Machine Type"
+        depends on EMBEDDED6xx
+
+config KATANA
+        bool "Artesyn-Katana"
+        help
+          Select KATANA if configuring an Artesyn KATANA 750i or 3750
+          cPCI board.
+
+config WILLOW
+        bool "Cogent-Willow"
+
+config CPCI690
+        bool "Force-CPCI690"
+        help
+          Select CPCI690 if configuring a Force CPCI690 cPCI board.
+
+config POWERPMC250
+        bool "Force-PowerPMC250"
+
+config CHESTNUT
+        bool "IBM 750FX Eval board or 750GX Eval board"
+        help
+          Select CHESTNUT if configuring an IBM 750FX Eval Board or a
+          IBM 750GX Eval board.
+
+config SPRUCE
+        bool "IBM-Spruce"
+        select PPC_INDIRECT_PCI
+
+config HDPU
+        bool "Sky-HDPU"
+        help
+          Select HDPU if configuring a Sky Computers Compute Blade.
+
+config HDPU_FEATURES
+        depends HDPU
+        tristate "HDPU-Features"
+        help
+          Select to enable HDPU enhanced features.
+
+config EV64260
+        bool "Marvell-EV64260BP"
+        help
+          Select EV64260 if configuring a Marvell (formerly Galileo)
+          EV64260BP Evaluation platform.
+
+config LOPEC
+        bool "Motorola-LoPEC"
+        select PPC_I8259
+
+config MVME5100
+        bool "Motorola-MVME5100"
+        select PPC_INDIRECT_PCI
+
+config PPLUS
+        bool "Motorola-PowerPlus"
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
+
+config PRPMC750
+        bool "Motorola-PrPMC750"
+        select PPC_INDIRECT_PCI
+
+config PRPMC800
+        bool "Motorola-PrPMC800"
+        select PPC_INDIRECT_PCI
+
+config SANDPOINT
+        bool "Motorola-Sandpoint"
+        select PPC_I8259
+        help
+          Select SANDPOINT if configuring for a Motorola Sandpoint X3
+          (any flavor).
+
+config RADSTONE_PPC7D
+        bool "Radstone Technology PPC7D board"
+        select PPC_I8259
+
+config PAL4
+        bool "SBS-Palomar4"
+
+config GEMINI
+        bool "Synergy-Gemini"
+        select PPC_INDIRECT_PCI
+        depends on BROKEN
+        help
+          Select Gemini if configuring for a Synergy Microsystems' Gemini
+          series Single Board Computer.  More information is available at:
+          <http://www.synergymicro.com/PressRel/97_10_15.html>.
+
+config EST8260
+        bool "EST8260"
+        ---help---
+          The EST8260 is a single-board computer manufactured by Wind River
+          Systems, Inc. (formerly Embedded Support Tools Corp.) and based on
+          the MPC8260.  Wind River Systems has a website at
+          <http://www.windriver.com/>, but the EST8260 cannot be found on it
+          and has probably been discontinued or rebadged.
+
+config SBC82xx
+        bool "SBC82xx"
+        ---help---
+          SBC PowerQUICC II, single-board computer with MPC82xx CPU
+          Manufacturer: Wind River Systems, Inc.
+          Date of Release: May 2003
+          End of Life: -
+          URL: <http://www.windriver.com/>
+
+config SBS8260
+        bool "SBS8260"
+
+config RPX8260
+        bool "RPXSUPER"
+
+config TQM8260
+        bool "TQM8260"
+        ---help---
+          MPC8260 based module, little larger than credit card,
+          up to 128 MB global + 64 MB local RAM, 32 MB Flash,
+          32 kB EEPROM, 256 kB L@ Cache, 10baseT + 100baseT Ethernet,
+          2 x serial ports, ...
+          Manufacturer: TQ Components, www.tq-group.de
+          Date of Release: June 2001
+          End of Life: not yet :-)
+          URL: <http://www.denx.de/PDF/TQM82xx_SPEC_Rev005.pdf>
+
+config ADS8272
+        bool "ADS8272"
+
+config PQ2FADS
+        bool "Freescale-PQ2FADS"
+        help
+          Select PQ2FADS if you wish to configure for a Freescale
+          PQ2FADS board (-VR or -ZU).
+
+config LITE5200
+        bool "Freescale LITE5200 / (IceCube)"
+        select PPC_MPC52xx
+        help
+          Support for the LITE5200 dev board for the MPC5200 from Freescale.
+          This is for the LITE5200 version 2.0 board. Don't know if it changes
+          much but it's only been tested on this board version. I think this
+          board is also known as IceCube.
+
+config MPC834x_SYS
+        bool "Freescale MPC834x SYS"
+        help
+          This option enables support for the MPC 834x SYS evaluation board.
+
+          Be aware that PCI buses can only function when SYS board is plugged
+          into the PIB (Platform IO Board) board from Freescale which provide
+          3 PCI slots.  The PIBs PCI initialization is the bootloader's
+          responsiblilty.
+
+config EV64360
+        bool "Marvell-EV64360BP"
+        help
+          Select EV64360 if configuring a Marvell EV64360BP Evaluation
+          platform.
+endchoice
+
+config PQ2ADS
+        bool
+        depends on ADS8272
+        default y
+
+config TQM8xxL
+        bool
+        depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
+        default y
+
+config PPC_MPC52xx
+        bool
+
+config 8260
+        bool "CPM2 Support" if WILLOW
+        depends on 6xx
+        default y if TQM8260 || RPX8260 || EST8260 || SBS8260 || SBC82xx || PQ2FADS
+        help
+          The MPC8260 is a typical embedded CPU made by Motorola.  Selecting
+          this option means that you wish to build a kernel for a machine with
+          an 8260 class CPU.
+
+config 8272
+        bool
+        depends on 6xx
+        default y if ADS8272
+        select 8260
+        help
+          The MPC8272 CPM has a different internal dpram setup than other CPM2
+          devices
+
+config 83xx
+        bool
+        default y if MPC834x_SYS
+
+config MPC834x
+        bool
+        default y if MPC834x_SYS
+
+config CPM2
+        bool
+        depends on 8260 || MPC8560 || MPC8555
+        default y
+        help
+          The CPM2 (Communications Processor Module) is a coprocessor on
+          embedded CPUs made by Motorola.  Selecting this option means that
+          you wish to build a kernel for a machine with a CPM2 coprocessor
+          on it (826x, 827x, 8560).
+
+config PPC_GEN550
+        bool
+        depends on SANDPOINT || SPRUCE || PPLUS || \
+                PRPMC750 || PRPMC800 || LOPEC || \
+                (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \
+                83xx
+        default y
+
+config FORCE
+        bool
+        depends on 6xx && POWERPMC250
+        default y
+
+config GT64260
+        bool
+        depends on EV64260 || CPCI690
+        default y
+
+config MV64360          # Really MV64360 & MV64460
+        bool
+        depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU || EV64360
+        default y
+
+config MV64X60
+        bool
+        depends on (GT64260 || MV64360)
+        select PPC_INDIRECT_PCI
+        default y
+
+menu "Set bridge options"
+        depends on MV64X60
+
+config NOT_COHERENT_CACHE
+        bool "Turn off Cache Coherency"
+        default n
+        help
+          Some 64x60 bridges lock up when trying to enforce cache coherency.
+          When this option is selected, cache coherency will be turned off.
+          Note that this can cause other problems (e.g., stale data being
+          speculatively loaded via a cached mapping).  Use at your own risk.
+
+config MV64X60_BASE
+        hex "Set bridge base used by firmware"
+        default "0xf1000000"
+        help
+          A firmware can leave the base address of the bridge's registers at
+          a non-standard location.  If so, set this value to reflect the
+          address of that non-standard location.
+
+config MV64X60_NEW_BASE
+        hex "Set bridge base used by kernel"
+        default "0xf1000000"
+        help
+          If the current base address of the bridge's registers is not where
+          you want it, set this value to the address that you want it moved to.
+
+endmenu
+
+config NONMONARCH_SUPPORT
+        bool "Enable Non-Monarch Support"
+        depends on PRPMC800
+
+config HARRIER
+        bool
+        depends on PRPMC800
+        default y
+
+config EPIC_SERIAL_MODE
+        bool
+        depends on 6xx && (LOPEC || SANDPOINT)
+        default y
+
+config MPC10X_BRIDGE
+        bool
+        depends on POWERPMC250 || LOPEC || SANDPOINT
+        select PPC_INDIRECT_PCI
+        default y
+
+config MPC10X_OPENPIC
+        bool
+        depends on POWERPMC250 || LOPEC || SANDPOINT
+        default y
+
+config MPC10X_STORE_GATHERING
+        bool "Enable MPC10x store gathering"
+        depends on MPC10X_BRIDGE
+
+config SANDPOINT_ENABLE_UART1
+        bool "Enable DUART mode on Sandpoint"
+        depends on SANDPOINT
+        help
+          If this option is enabled then the MPC824x processor will run
+          in DUART mode instead of UART mode.
+
+config HARRIER_STORE_GATHERING
+        bool "Enable Harrier store gathering"
+        depends on HARRIER
+
+config MVME5100_IPMC761_PRESENT
+        bool "MVME5100 configured with an IPMC761"
+        depends on MVME5100
+        select PPC_I8259
+
+config SPRUCE_BAUD_33M
+        bool "Spruce baud clock support"
+        depends on SPRUCE
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
new file mode 100644
index 000000000000..3d957a30c8c2
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -0,0 +1,31 @@
+
+menu "iSeries device drivers"
+        depends on PPC_ISERIES
+
+config VIOCONS
+        tristate "iSeries Virtual Console Support"
+
+config VIODASD
+        tristate "iSeries Virtual I/O disk support"
+        help
+          If you are running on an iSeries system and you want to use
+          virtual disks created and managed by OS/400, say Y.
+
+config VIOCD
+        tristate "iSeries Virtual I/O CD support"
+        help
+          If you are running Linux on an IBM iSeries system and you want to
+          read a CD drive owned by OS/400, say Y here.
+
+config VIOTAPE
+        tristate "iSeries Virtual Tape Support"
+        help
+          If you are running Linux on an iSeries system and you want Linux
+          to read and/or write a tape drive owned by OS/400, say Y here.
+
+endmenu
+
+config VIOPATH
+        bool
+        depends on VIOCONS || VIODASD || VIOCD || VIOTAPE || VETH
+        default y
diff --git a/arch/powerpc/platforms/iseries/Makefile b/arch/powerpc/platforms/iseries/Makefile
new file mode 100644
index 000000000000..127b465308be
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/Makefile
@@ -0,0 +1,9 @@
+EXTRA_CFLAGS    += -mno-minimal-toc
+
+obj-y += hvlog.o hvlpconfig.o lpardata.o setup.o mf.o lpevents.o \
+        hvcall.o proc.o htab.o iommu.o misc.o
+obj-$(CONFIG_PCI) += pci.o irq.o vpdinfo.o
+obj-$(CONFIG_IBMVIO) += vio.o
+obj-$(CONFIG_SMP) += smp.o
+obj-$(CONFIG_VIOPATH) += viopath.o
+obj-$(CONFIG_MODULES) += ksyms.o
diff --git a/arch/powerpc/platforms/iseries/call_hpt.h b/arch/powerpc/platforms/iseries/call_hpt.h
new file mode 100644
index 000000000000..321f3bb7a8f5
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/call_hpt.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _PLATFORMS_ISERIES_CALL_HPT_H
+#define _PLATFORMS_ISERIES_CALL_HPT_H
+
+/*
+ * This file contains the "hypervisor call" interface which is used to
+ * drive the hypervisor from the OS.
+ */
+
+#include <asm/iSeries/HvCallSc.h>
+#include <asm/iSeries/HvTypes.h>
+#include <asm/mmu.h>
+
+#define HvCallHptGetHptAddress          HvCallHpt +  0
+#define HvCallHptGetHptPages            HvCallHpt +  1
+#define HvCallHptSetPp                  HvCallHpt +  5
+#define HvCallHptSetSwBits              HvCallHpt +  6
+#define HvCallHptUpdate                 HvCallHpt +  7
+#define HvCallHptInvalidateNoSyncICache HvCallHpt +  8
+#define HvCallHptGet                    HvCallHpt + 11
+#define HvCallHptFindNextValid          HvCallHpt + 12
+#define HvCallHptFindValid              HvCallHpt + 13
+#define HvCallHptAddValidate            HvCallHpt + 16
+#define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18
+
+
+static inline u64 HvCallHpt_getHptAddress(void)
+{
+        return HvCall0(HvCallHptGetHptAddress);
+}
+
+static inline u64 HvCallHpt_getHptPages(void)
+{
+        return HvCall0(HvCallHptGetHptPages);
+}
+
+static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value)
+{
+        HvCall2(HvCallHptSetPp, hpteIndex, value);
+}
+
+static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff)
+{
+        HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff);
+}
+
+static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex)
+{
+        HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
+}
+
+static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson,
+                u8 bitsoff)
+{
+        u64 compressedStatus;
+
+        compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet,
+                        hpteIndex, bitson, bitsoff, 1);
+        HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex);
+        return compressedStatus;
+}
+
+static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn)
+{
+        return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
+}
+
+static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex,
+                u8 bitson, u8 bitsoff)
+{
+        return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
+                        bitson, bitsoff);
+}
+
+static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex)
+{
+        HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
+}
+
+static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte)
+{
+        HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r);
+}
+
+#endif /* _PLATFORMS_ISERIES_CALL_HPT_H */
diff --git a/arch/powerpc/platforms/iseries/call_pci.h b/arch/powerpc/platforms/iseries/call_pci.h
new file mode 100644
index 000000000000..a86e065b9577
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/call_pci.h
@@ -0,0 +1,290 @@
+/*
+ * Provides the Hypervisor PCI calls for iSeries Linux Parition.
+ * Copyright (C) 2001  <Wayne G Holm> <IBM Corporation>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the:
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330,
+ * Boston, MA  02111-1307  USA
+ *
+ * Change Activity:
+ *   Created, Jan 9, 2001
+ */
+
+#ifndef _PLATFORMS_ISERIES_CALL_PCI_H
+#define _PLATFORMS_ISERIES_CALL_PCI_H
+
+#include <asm/iSeries/HvCallSc.h>
+#include <asm/iSeries/HvTypes.h>
+
+/*
+ * DSA == Direct Select Address
+ * this struct must be 64 bits in total
+ */
+struct HvCallPci_DsaAddr {
+        u16             busNumber;              /* PHB index? */
+        u8              subBusNumber;           /* PCI bus number? */
+        u8              deviceId;               /* device and function? */
+        u8              barNumber;
+        u8              reserved[3];
+};
+
+union HvDsaMap {
+        u64     DsaAddr;
+        struct HvCallPci_DsaAddr Dsa;
+};
+
+struct HvCallPci_LoadReturn {
+        u64             rc;
+        u64             value;
+};
+
+enum HvCallPci_DeviceType {
+        HvCallPci_NodeDevice    = 1,
+        HvCallPci_SpDevice      = 2,
+        HvCallPci_IopDevice     = 3,
+        HvCallPci_BridgeDevice  = 4,
+        HvCallPci_MultiFunctionDevice = 5,
+        HvCallPci_IoaDevice     = 6
+};
+
+
+struct HvCallPci_DeviceInfo {
+        u32     deviceType;             /* See DeviceType enum for values */
+};
+
+struct HvCallPci_BusUnitInfo {
+        u32     sizeReturned;           /* length of data returned */
+        u32     deviceType;             /* see DeviceType enum for values */
+};
+
+struct HvCallPci_BridgeInfo {
+        struct HvCallPci_BusUnitInfo busUnitInfo;  /* Generic bus unit info */
+        u8              subBusNumber;   /* Bus number of secondary bus */
+        u8              maxAgents;      /* Max idsels on secondary bus */
+        u8              maxSubBusNumber; /* Max Sub Bus */
+        u8              logicalSlotNumber; /* Logical Slot Number for IOA */
+};
+
+
+/*
+ * Maximum BusUnitInfo buffer size.  Provided for clients so
+ * they can allocate a buffer big enough for any type of bus
+ * unit.  Increase as needed.
+ */
+enum {HvCallPci_MaxBusUnitInfoSize = 128};
+
+struct HvCallPci_BarParms {
+        u64             vaddr;
+        u64             raddr;
+        u64             size;
+        u64             protectStart;
+        u64             protectEnd;
+        u64             relocationOffset;
+        u64             pciAddress;
+        u64             reserved[3];
+};
+
+enum HvCallPci_VpdType {
+        HvCallPci_BusVpd        = 1,
+        HvCallPci_BusAdapterVpd = 2
+};
+
+#define HvCallPciConfigLoad8            HvCallPci + 0
+#define HvCallPciConfigLoad16           HvCallPci + 1
+#define HvCallPciConfigLoad32           HvCallPci + 2
+#define HvCallPciConfigStore8           HvCallPci + 3
+#define HvCallPciConfigStore16          HvCallPci + 4
+#define HvCallPciConfigStore32          HvCallPci + 5
+#define HvCallPciEoi                    HvCallPci + 16
+#define HvCallPciGetBarParms            HvCallPci + 18
+#define HvCallPciMaskFisr               HvCallPci + 20
+#define HvCallPciUnmaskFisr             HvCallPci + 21
+#define HvCallPciSetSlotReset           HvCallPci + 25
+#define HvCallPciGetDeviceInfo          HvCallPci + 27
+#define HvCallPciGetCardVpd             HvCallPci + 28
+#define HvCallPciBarLoad8               HvCallPci + 40
+#define HvCallPciBarLoad16              HvCallPci + 41
+#define HvCallPciBarLoad32              HvCallPci + 42
+#define HvCallPciBarLoad64              HvCallPci + 43
+#define HvCallPciBarStore8              HvCallPci + 44
+#define HvCallPciBarStore16             HvCallPci + 45
+#define HvCallPciBarStore32             HvCallPci + 46
+#define HvCallPciBarStore64             HvCallPci + 47
+#define HvCallPciMaskInterrupts         HvCallPci + 48
+#define HvCallPciUnmaskInterrupts       HvCallPci + 49
+#define HvCallPciGetBusUnitInfo         HvCallPci + 50
+
+static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
+                u8 deviceId, u32 offset, u16 *value)
+{
+        struct HvCallPci_DsaAddr dsa;
+        struct HvCallPci_LoadReturn retVal;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumber;
+        dsa.subBusNumber = subBusNumber;
+        dsa.deviceId = deviceId;
+
+        HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
+
+        *value = retVal.value;
+
+        return retVal.rc;
+}
+
+static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
+                u8 deviceId, u32 offset, u8 value)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumber;
+        dsa.subBusNumber = subBusNumber;
+        dsa.deviceId = deviceId;
+
+        return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
+}
+
+static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm)
+{
+        struct HvCallPci_DsaAddr dsa;
+        struct HvCallPci_LoadReturn retVal;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+
+        HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
+
+        return retVal.rc;
+}
+
+static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+        dsa.barNumber = barNumberParm;
+
+        return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
+}
+
+static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm, u64 fisrMask)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+
+        return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
+}
+
+static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm, u64 fisrMask)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+
+        return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
+}
+
+static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
+                u8 deviceNumberParm, u64 parms, u32 sizeofParms)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceNumberParm << 4;
+
+        return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
+}
+
+static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm, u64 interruptMask)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+
+        return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
+}
+
+static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm, u64 interruptMask)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+
+        return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
+}
+
+static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
+                u8 deviceIdParm, u64 parms, u32 sizeofParms)
+{
+        struct HvCallPci_DsaAddr dsa;
+
+        *((u64*)&dsa) = 0;
+
+        dsa.busNumber = busNumberParm;
+        dsa.subBusNumber = subBusParm;
+        dsa.deviceId = deviceIdParm;
+
+        return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
+                        sizeofParms);
+}
+
+static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
+                u16 sizeParm)
+{
+        u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
+                        sizeParm, HvCallPci_BusVpd);
+        if (xRc == -1)
+                return -1;
+        else
+                return xRc & 0xFFFF;
+}
+
+#endif /* _PLATFORMS_ISERIES_CALL_PCI_H */
diff --git a/arch/powerpc/platforms/iseries/call_sm.h b/arch/powerpc/platforms/iseries/call_sm.h
new file mode 100644
index 000000000000..ef223166cf22
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/call_sm.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ISERIES_CALL_SM_H
+#define _ISERIES_CALL_SM_H
+
+/*
+ * This file contains the "hypervisor call" interface which is used to
+ * drive the hypervisor from the OS.
+ */
+
+#include <asm/iSeries/HvCallSc.h>
+#include <asm/iSeries/HvTypes.h>
+
+#define HvCallSmGet64BitsOfAccessMap    HvCallSm  + 11
+
+static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex,
+                u64 indexIntoBitMap)
+{
+        return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap);
+}
+
+#endif /* _ISERIES_CALL_SM_H */
diff --git a/arch/ppc64/kernel/iSeries_htab.c b/arch/powerpc/platforms/iseries/htab.c
index 073b76661747..b3c6c3374ca6 100644
--- a/arch/ppc64/kernel/iSeries_htab.c
+++ b/arch/powerpc/platforms/iseries/htab.c
@@ -1,10 +1,10 @@
 /*
  * iSeries hashtable management.
- *      Derived from pSeries_htab.c
+ *      Derived from pSeries_htab.c
  *
  * SMP scalability work:
  *    Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
- * 
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
@@ -14,11 +14,13 @@
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
 #include <asm/mmu_context.h>
-#include <asm/iSeries/HvCallHpt.h>
 #include <asm/abs_addr.h>
 #include <linux/spinlock.h>
 
-static spinlock_t iSeries_hlocks[64] __cacheline_aligned_in_smp = { [0 ... 63] = SPIN_LOCK_UNLOCKED};
+#include "call_hpt.h"
+
+static spinlock_t iSeries_hlocks[64] __cacheline_aligned_in_smp =
+        { [0 ... 63] = SPIN_LOCK_UNLOCKED};
 
 /*
  * Very primitive algorithm for picking up a lock
@@ -84,6 +86,25 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
         return (secondary << 3) | (slot & 7);
 }
 
+long iSeries_hpte_bolt_or_insert(unsigned long hpte_group,
+                unsigned long va, unsigned long prpn, unsigned long vflags,
+                unsigned long rflags)
+{
+        long slot;
+        hpte_t lhpte;
+
+        slot = HvCallHpt_findValid(&lhpte, va >> PAGE_SHIFT);
+
+        if (lhpte.v & HPTE_V_VALID) {
+                /* Bolt the existing HPTE */
+                HvCallHpt_setSwBits(slot, 0x10, 0);
+                HvCallHpt_setPp(slot, PP_RWXX);
+                return 0;
+        }
+
+        return iSeries_hpte_insert(hpte_group, va, prpn, vflags, rflags);
+}
+
 static unsigned long iSeries_hpte_getword0(unsigned long slot)
 {
         hpte_t hpte;
@@ -107,7 +128,7 @@ static long iSeries_hpte_remove(unsigned long hpte_group)
                 hpte_v = iSeries_hpte_getword0(hpte_group + slot_offset);
 
                 if (! (hpte_v & HPTE_V_BOLTED)) {
-                        HvCallHpt_invalidateSetSwBitsGet(hpte_group + 
+                        HvCallHpt_invalidateSetSwBitsGet(hpte_group +
                                                          slot_offset, 0, 0);
                         iSeries_hunlock(hpte_group);
                         return i;
@@ -124,9 +145,9 @@ static long iSeries_hpte_remove(unsigned long hpte_group)
 
 /*
  * The HyperVisor expects the "flags" argument in this form:
- *      bits  0..59 : reserved
- *      bit      60 : N
- *      bits 61..63 : PP2,PP1,PP0
+ *      bits  0..59 : reserved
+ *      bit      60 : N
+ *      bits 61..63 : PP2,PP1,PP0
  */
 static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
                                   unsigned long va, int large, int local)
@@ -152,7 +173,7 @@ static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
 }
 
 /*
- * Functions used to find the PTE for a particular virtual address. 
+ * Functions used to find the PTE for a particular virtual address.
  * Only used during boot when bolting pages.
  *
  * Input : vpn      : virtual page number
@@ -170,7 +191,7 @@ static long iSeries_hpte_find(unsigned long vpn)
          * 0x00000000xxxxxxxx : Entry found in primary group, slot x
          * 0x80000000xxxxxxxx : Entry found in secondary group, slot x
          */
-        slot = HvCallHpt_findValid(&hpte, vpn); 
+        slot = HvCallHpt_findValid(&hpte, vpn);
         if (hpte.v & HPTE_V_VALID) {
                 if (slot < 0) {
                         slot &= 0x7fffffffffffffff;
@@ -197,7 +218,7 @@ static void iSeries_hpte_updateboltedpp(unsigned long newpp, unsigned long ea)
         vsid = get_kernel_vsid(ea);
         va = (vsid << 28) | (ea & 0x0fffffff);
         vpn = va >> PAGE_SHIFT;
-        slot = iSeries_hpte_find(vpn); 
+        slot = iSeries_hpte_find(vpn);
         if (slot == -1)
                 panic("updateboltedpp: Could not find page to bolt\n");
         HvCallHpt_setPp(slot, newpp);
@@ -215,7 +236,7 @@ static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va,
         iSeries_hlock(slot);
 
         hpte_v = iSeries_hpte_getword0(slot);
-        
+
         if ((HPTE_V_AVPN_VAL(hpte_v) == avpn) && (hpte_v & HPTE_V_VALID))
                 HvCallHpt_invalidateSetSwBitsGet(slot, 0, 0);
 
@@ -230,7 +251,7 @@ void hpte_init_iSeries(void)
         ppc_md.hpte_updatepp    = iSeries_hpte_updatepp;
         ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp;
         ppc_md.hpte_insert      = iSeries_hpte_insert;
-        ppc_md.hpte_remove      = iSeries_hpte_remove;
+        ppc_md.hpte_remove      = iSeries_hpte_remove;
 
         htab_finish_init();
 }
diff --git a/arch/ppc64/kernel/hvCall.S b/arch/powerpc/platforms/iseries/hvcall.S
index 4c699eab1b95..07ae6ad5f49f 100644
--- a/arch/ppc64/kernel/hvCall.S
+++ b/arch/powerpc/platforms/iseries/hvcall.S
@@ -1,7 +1,4 @@
 /*
- * arch/ppc64/kernel/hvCall.S
- *
- *
  * This file contains the code to perform calls to the
  * iSeries LPAR hypervisor
  *
@@ -13,15 +10,16 @@
 
 #include <asm/ppc_asm.h>
 #include <asm/processor.h>
+#include <asm/ptrace.h>         /* XXX for STACK_FRAME_OVERHEAD */
 
         .text
 
-/* 
+/*
  * Hypervisor call
- * 
+ *
  * Invoke the iSeries hypervisor via the System Call instruction
  * Parameters are passed to this routine in registers r3 - r10
- * 
+ *
  * r3 contains the HV function to be called
  * r4-r10 contain the operands to the hypervisor function
  *
@@ -41,11 +39,11 @@ _GLOBAL(HvCall7)
         mfcr    r0
         std     r0,-8(r1)
         stdu    r1,-(STACK_FRAME_OVERHEAD+16)(r1)
-        
+
         /* r0 = 0xffffffffffffffff indicates a hypervisor call */
-        
+
         li      r0,-1
-        
+
         /* Invoke the hypervisor */
 
         sc
@@ -55,7 +53,7 @@ _GLOBAL(HvCall7)
         mtcrf   0xff,r0
 
         /*  return to caller, return value in r3 */
-        
+
         blr
 
 _GLOBAL(HvCall0Ret16)
@@ -92,7 +90,5 @@ _GLOBAL(HvCall7Ret16)
         ld      r0,-8(r1)
         mtcrf   0xff,r0
         ld      r31,-16(r1)
-        
-        blr
-
 
+        blr
diff --git a/arch/ppc64/kernel/HvCall.c b/arch/powerpc/platforms/iseries/hvlog.c
index b772e65b57a2..f61e2e9ac9ec 100644
--- a/arch/ppc64/kernel/HvCall.c
+++ b/arch/powerpc/platforms/iseries/hvlog.c
@@ -1,5 +1,4 @@
 /*
- * HvCall.c
  * Copyright (C) 2001  Mike Corrigan IBM Corporation
  * 
  * This program is free software; you can redistribute it and/or modify
diff --git a/arch/ppc64/kernel/HvLpConfig.c b/arch/powerpc/platforms/iseries/hvlpconfig.c
index cb1d6473203c..dc28621aea0d 100644
--- a/arch/ppc64/kernel/HvLpConfig.c
+++ b/arch/powerpc/platforms/iseries/hvlpconfig.c
@@ -1,5 +1,4 @@
 /*
- * HvLpConfig.c
  * Copyright (C) 2001  Kyle A. Lucke, IBM Corporation
  * 
  * This program is free software; you can redistribute it and/or modify
diff --git a/arch/ppc64/kernel/iSeries_iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index f8ff1bb054dc..1db26d8be640 100644
--- a/arch/ppc64/kernel/iSeries_iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -1,6 +1,4 @@
 /*
- * arch/ppc64/kernel/iSeries_iommu.c
- *
  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
  *
  * Rewrite, cleanup:
@@ -30,9 +28,11 @@
 #include <linux/list.h>
 
 #include <asm/iommu.h>
+#include <asm/tce.h>
 #include <asm/machdep.h>
+#include <asm/abs_addr.h>
+#include <asm/pci-bridge.h>
 #include <asm/iSeries/HvCallXm.h>
-#include <asm/iSeries/iSeries_pci.h>
 
 extern struct list_head iSeries_Global_Device_List;
 
@@ -90,15 +90,16 @@ static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
  */
 static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
 {
-        struct iSeries_Device_Node *dp;
-
-        list_for_each_entry(dp, &iSeries_Global_Device_List, Device_List) {
-                if ((dp->iommu_table != NULL) &&
-                    (dp->iommu_table->it_type == TCE_PCI) &&
-                    (dp->iommu_table->it_offset == tbl->it_offset) &&
-                    (dp->iommu_table->it_index == tbl->it_index) &&
-                    (dp->iommu_table->it_size == tbl->it_size))
-                        return dp->iommu_table;
+        struct pci_dn *pdn;
+
+        list_for_each_entry(pdn, &iSeries_Global_Device_List, Device_List) {
+                struct iommu_table *it = pdn->iommu_table;
+                if ((it != NULL) &&
+                    (it->it_type == TCE_PCI) &&
+                    (it->it_offset == tbl->it_offset) &&
+                    (it->it_index == tbl->it_index) &&
+                    (it->it_size == tbl->it_size))
+                        return it;
         }
         return NULL;
 }
@@ -112,7 +113,7 @@ static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
  * 2. TCE table per Bus.
  * 3. TCE Table per IOA.
  */
-static void iommu_table_getparms(struct iSeries_Device_Node* dn,
+static void iommu_table_getparms(struct pci_dn *pdn,
                                  struct iommu_table* tbl)
 {
         struct iommu_table_cb *parms;
@@ -123,11 +124,11 @@ static void iommu_table_getparms(struct iSeries_Device_Node* dn,
 
         memset(parms, 0, sizeof(*parms));
 
-        parms->itc_busno = ISERIES_BUS(dn);
-        parms->itc_slotno = dn->LogicalSlot;
+        parms->itc_busno = pdn->busno;
+        parms->itc_slotno = pdn->LogicalSlot;
         parms->itc_virtbus = 0;
 
-        HvCallXm_getTceTableParms(ISERIES_HV_ADDR(parms));
+        HvCallXm_getTceTableParms(iseries_hv_addr(parms));
 
         if (parms->itc_size == 0)
                 panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
@@ -144,18 +145,19 @@ static void iommu_table_getparms(struct iSeries_Device_Node* dn,
 }
 
 
-void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn)
+void iommu_devnode_init_iSeries(struct device_node *dn)
 {
         struct iommu_table *tbl;
+        struct pci_dn *pdn = PCI_DN(dn);
 
         tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
 
-        iommu_table_getparms(dn, tbl);
+        iommu_table_getparms(pdn, tbl);
 
         /* Look for existing tce table */
-        dn->iommu_table = iommu_table_find(tbl);
-        if (dn->iommu_table == NULL)
-                dn->iommu_table = iommu_init_table(tbl);
+        pdn->iommu_table = iommu_table_find(tbl);
+        if (pdn->iommu_table == NULL)
+                pdn->iommu_table = iommu_init_table(tbl);
         else
                 kfree(tbl);
 }
diff --git a/arch/powerpc/platforms/iseries/ipl_parms.h b/arch/powerpc/platforms/iseries/ipl_parms.h
new file mode 100644
index 000000000000..77c135ddbf1b
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/ipl_parms.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ISERIES_IPL_PARMS_H
+#define _ISERIES_IPL_PARMS_H
+
+/*
+ *      This struct maps the IPL Parameters DMA'd from the SP.
+ *
+ * Warning:
+ *      This data must map in exactly 64 bytes and match the architecture for
+ *      the IPL parms
+ */
+
+#include <asm/types.h>
+
+struct ItIplParmsReal {
+        u8      xFormat;                // Defines format of IplParms   x00-x00
+        u8      xRsvd01:6;              // Reserved                     x01-x01
+        u8      xAlternateSearch:1;     // Alternate search indicator   ...
+        u8      xUaSupplied:1;          // UA Supplied on programmed IPL...
+        u8      xLsUaFormat;            // Format byte for UA           x02-x02
+        u8      xRsvd02;                // Reserved                     x03-x03
+        u32     xLsUa;                  // LS UA                        x04-x07
+        u32     xUnusedLsLid;           // First OS LID to load         x08-x0B
+        u16     xLsBusNumber;           // LS Bus Number                x0C-x0D
+        u8      xLsCardAdr;             // LS Card Address              x0E-x0E
+        u8      xLsBoardAdr;            // LS Board Address             x0F-x0F
+        u32     xRsvd03;                // Reserved                     x10-x13
+        u8      xSpcnPresent:1;         // SPCN present                 x14-x14
+        u8      xCpmPresent:1;          // CPM present                  ...
+        u8      xRsvd04:6;              // Reserved                     ...
+        u8      xRsvd05:4;              // Reserved                     x15-x15
+        u8      xKeyLock:4;             // Keylock setting              ...
+        u8      xRsvd06:6;              // Reserved                     x16-x16
+        u8      xIplMode:2;             // Ipl mode (A|B|C|D)           ...
+        u8      xHwIplType;             // Fast v slow v slow EC HW IPL x17-x17
+        u16     xCpmEnabledIpl:1;       // CPM in effect when IPL initiatedx18-x19
+        u16     xPowerOnResetIpl:1;     // Indicate POR condition       ...
+        u16     xMainStorePreserved:1;  // Main Storage is preserved    ...
+        u16     xRsvd07:13;             // Reserved                     ...
+        u16     xIplSource:16;          // Ipl source                   x1A-x1B
+        u8      xIplReason:8;           // Reason for this IPL          x1C-x1C
+        u8      xRsvd08;                // Reserved                     x1D-x1D
+        u16     xRsvd09;                // Reserved                     x1E-x1F
+        u16     xSysBoxType;            // System Box Type              x20-x21
+        u16     xSysProcType;           // System Processor Type        x22-x23
+        u32     xRsvd10;                // Reserved                     x24-x27
+        u64     xRsvd11;                // Reserved                     x28-x2F
+        u64     xRsvd12;                // Reserved                     x30-x37
+        u64     xRsvd13;                // Reserved                     x38-x3F
+};
+
+extern struct ItIplParmsReal    xItIplParmsReal;
+
+#endif /* _ISERIES_IPL_PARMS_H */
diff --git a/arch/ppc64/kernel/iSeries_irq.c b/arch/powerpc/platforms/iseries/irq.c
index 77376c1bd611..937ac99b9d33 100644
--- a/arch/ppc64/kernel/iSeries_irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -38,9 +38,10 @@
 #include <asm/ppcdebug.h>
 #include <asm/iSeries/HvTypes.h>
 #include <asm/iSeries/HvLpEvent.h>
-#include <asm/iSeries/HvCallPci.h>
 #include <asm/iSeries/HvCallXm.h>
-#include <asm/iSeries/iSeries_irq.h>
+
+#include "irq.h"
+#include "call_pci.h"
 
 /* This maps virtual irq numbers to real irqs */
 unsigned int virt_irq_to_real_map[NR_IRQS];
@@ -351,3 +352,15 @@ int __init iSeries_allocate_IRQ(HvBusNumber busNumber,
         irq_desc[virtirq].handler = &iSeries_IRQ_handler;
         return virtirq;
 }
+
+int virt_irq_create_mapping(unsigned int real_irq)
+{
+        BUG(); /* Don't call this on iSeries, yet */
+
+        return 0;
+}
+
+void virt_irq_init(void)
+{
+        return;
+}
diff --git a/arch/powerpc/platforms/iseries/irq.h b/arch/powerpc/platforms/iseries/irq.h
new file mode 100644
index 000000000000..5f643f16ecc0
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/irq.h
@@ -0,0 +1,8 @@
+#ifndef _ISERIES_IRQ_H
+#define _ISERIES_IRQ_H
+
+extern void iSeries_init_IRQ(void);
+extern int  iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
+extern void iSeries_activate_IRQs(void);
+
+#endif /* _ISERIES_IRQ_H */
diff --git a/arch/powerpc/platforms/iseries/ksyms.c b/arch/powerpc/platforms/iseries/ksyms.c
new file mode 100644
index 000000000000..f271b3539721
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/ksyms.c
@@ -0,0 +1,27 @@
+/*
+ * (C) 2001-2005 PPC 64 Team, IBM Corp
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+#include <linux/module.h>
+
+#include <asm/hw_irq.h>
+#include <asm/iSeries/HvCallSc.h>
+
+EXPORT_SYMBOL(HvCall0);
+EXPORT_SYMBOL(HvCall1);
+EXPORT_SYMBOL(HvCall2);
+EXPORT_SYMBOL(HvCall3);
+EXPORT_SYMBOL(HvCall4);
+EXPORT_SYMBOL(HvCall5);
+EXPORT_SYMBOL(HvCall6);
+EXPORT_SYMBOL(HvCall7);
+
+#ifdef CONFIG_SMP
+EXPORT_SYMBOL(local_get_flags);
+EXPORT_SYMBOL(local_irq_disable);
+EXPORT_SYMBOL(local_irq_restore);
+#endif
diff --git a/arch/ppc64/kernel/LparData.c b/arch/powerpc/platforms/iseries/lpardata.c
index 0a9c23ca2f0c..ed2ffee6f731 100644
--- a/arch/ppc64/kernel/LparData.c
+++ b/arch/powerpc/platforms/iseries/lpardata.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * Copyright 2001 Mike Corrigan, IBM Corp
  *
  * This program is free software; you can redistribute it and/or
@@ -19,18 +19,18 @@
 #include <asm/lppaca.h>
 #include <asm/iSeries/ItLpRegSave.h>
 #include <asm/paca.h>
-#include <asm/iSeries/HvReleaseData.h>
 #include <asm/iSeries/LparMap.h>
-#include <asm/iSeries/ItVpdAreas.h>
-#include <asm/iSeries/ItIplParmsReal.h>
 #include <asm/iSeries/ItExtVpdPanel.h>
 #include <asm/iSeries/ItLpQueue.h>
-#include <asm/iSeries/IoHriProcessorVpd.h>
-#include <asm/iSeries/ItSpCommArea.h>
 
+#include "vpd_areas.h"
+#include "spcomm_area.h"
+#include "ipl_parms.h"
+#include "processor_vpd.h"
+#include "release_data.h"
 
-/* The HvReleaseData is the root of the information shared between 
- * the hypervisor and Linux.  
+/* The HvReleaseData is the root of the information shared between
+ * the hypervisor and Linux.
  */
 struct HvReleaseData hvReleaseData = {
         .xDesc = 0xc8a5d9c4,    /* "HvRD" ebcdic */
@@ -79,7 +79,7 @@ extern void trap_0e_iSeries(void);
 extern void performance_monitor_iSeries(void);
 extern void data_access_slb_iSeries(void);
 extern void instruction_access_slb_iSeries(void);
-        
+
 struct ItLpNaca itLpNaca = {
         .xDesc = 0xd397d581,            /* "LpNa" ebcdic */
         .xSize = 0x0400,                /* size of ItLpNaca */
@@ -106,7 +106,7 @@ struct ItLpNaca itLpNaca = {
         .xLoadAreaChunks = 0,           /* chunks for load area */
         .xPaseSysCallCRMask = 0,        /* PASE mask */
         .xSlicSegmentTablePtr = 0,      /* seg table */
-        .xOldLpQueue = { 0 },           /* Old LP Queue */
+        .xOldLpQueue = { 0 },           /* Old LP Queue */
         .xInterruptHdlr = {
                 (u64)system_reset_iSeries,      /* 0x100 System Reset */
                 (u64)machine_check_iSeries,     /* 0x200 Machine Check */
@@ -134,7 +134,7 @@ struct ItLpNaca itLpNaca = {
 EXPORT_SYMBOL(itLpNaca);
 
 /* May be filled in by the hypervisor so cannot end up in the BSS */
-struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data"))); 
+struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data")));
 
 /* May be filled in by the hypervisor so cannot end up in the BSS */
 struct ItExtVpdPanel xItExtVpdPanel __attribute__((__section__(".data")));
@@ -151,7 +151,7 @@ struct IoHriProcessorVpd xIoHriProcessorVpd[maxPhysicalProcessors] = {
                 .xPVR = 0x3600
         }
 };
-        
+
 /* Space for Main Store Vpd 27,200 bytes */
 /* May be filled in by the hypervisor so cannot end up in the BSS */
 u64    xMsVpd[3400] __attribute__((__section__(".data")));
@@ -197,7 +197,7 @@ struct ItVpdAreas itVpdAreas = {
                 26992,                  /*       7 length of MS VPD */
                 0,                      /*       8 */
                 sizeof(struct ItLpNaca),/*       9 length of LP Naca */
-                0,                      /*      10 */
+                0,                      /*      10 */
                 256,                    /*      11 length of Recovery Log Buf */
                 sizeof(struct SpCommArea), /*   12 length of SP Comm Area */
                 0,0,0,                  /* 13 - 15 */
@@ -207,7 +207,7 @@ struct ItVpdAreas itVpdAreas = {
                 0,0                     /* 24 - 25 */
                 },
         .xSlicVpdAdrs = {                       /* VPD addresses */
-                0,0,0,                  /*       0 -  2 */
+                0,0,0,                  /*       0 -  2 */
                 &xItExtVpdPanel,        /*       3 Extended VPD */
                 &paca[0],               /*       4 first Paca */
                 0,                      /*       5 */
diff --git a/arch/ppc64/kernel/ItLpQueue.c b/arch/powerpc/platforms/iseries/lpevents.c
index 4231861288a3..54c7753dbe05 100644
--- a/arch/ppc64/kernel/ItLpQueue.c
+++ b/arch/powerpc/platforms/iseries/lpevents.c
@@ -1,5 +1,4 @@
 /*
- * ItLpQueue.c
  * Copyright (C) 2001 Mike Corrigan  IBM Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -14,11 +13,14 @@
 #include <linux/bootmem.h>
 #include <linux/seq_file.h>
 #include <linux/proc_fs.h>
+#include <linux/module.h>
+
 #include <asm/system.h>
 #include <asm/paca.h>
 #include <asm/iSeries/ItLpQueue.h>
 #include <asm/iSeries/HvLpEvent.h>
 #include <asm/iSeries/HvCallEvent.h>
+#include <asm/iSeries/ItLpNaca.h>
 
 /*
  * The LpQueue is used to pass event data from the hypervisor to
@@ -43,7 +45,8 @@ static char *event_types[HvLpEvent_Type_NumTypes] = {
 };
 
 /* Array of LpEvent handler functions */
-extern LpEventHandler lpEventHandler[HvLpEvent_Type_NumTypes];
+static LpEventHandler lpEventHandler[HvLpEvent_Type_NumTypes];
+static unsigned lpEventHandlerPaths[HvLpEvent_Type_NumTypes];
 
 static struct HvLpEvent * get_next_hvlpevent(void)
 {
@@ -181,11 +184,7 @@ void setup_hvlpevent_queue(void)
 {
         void *eventStack;
 
-        /*
-         * Allocate a page for the Event Stack. The Hypervisor needs the
-         * absolute real address, so we subtract out the KERNELBASE and add
-         * in the absolute real address of the kernel load area.
-         */
+        /* Allocate a page for the Event Stack. */
         eventStack = alloc_bootmem_pages(LpEventStackSize);
         memset(eventStack, 0, LpEventStackSize);
 
@@ -199,6 +198,70 @@ void setup_hvlpevent_queue(void)
         hvlpevent_queue.xIndex = 0;
 }
 
+/* Register a handler for an LpEvent type */
+int HvLpEvent_registerHandler(HvLpEvent_Type eventType, LpEventHandler handler)
+{
+        if (eventType < HvLpEvent_Type_NumTypes) {
+                lpEventHandler[eventType] = handler;
+                return 0;
+        }
+        return 1;
+}
+EXPORT_SYMBOL(HvLpEvent_registerHandler);
+
+int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType)
+{
+        might_sleep();
+
+        if (eventType < HvLpEvent_Type_NumTypes) {
+                if (!lpEventHandlerPaths[eventType]) {
+                        lpEventHandler[eventType] = NULL;
+                        /*
+                         * We now sleep until all other CPUs have scheduled.
+                         * This ensures that the deletion is seen by all
+                         * other CPUs, and that the deleted handler isn't
+                         * still running on another CPU when we return.
+                         */
+                        synchronize_rcu();
+                        return 0;
+                }
+        }
+        return 1;
+}
+EXPORT_SYMBOL(HvLpEvent_unregisterHandler);
+
+/*
+ * lpIndex is the partition index of the target partition.
+ * needed only for VirtualIo, VirtualLan and SessionMgr.  Zero
+ * indicates to use our partition index - for the other types.
+ */
+int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex)
+{
+        if ((eventType < HvLpEvent_Type_NumTypes) &&
+                        lpEventHandler[eventType]) {
+                if (lpIndex == 0)
+                        lpIndex = itLpNaca.xLpIndex;
+                HvCallEvent_openLpEventPath(lpIndex, eventType);
+                ++lpEventHandlerPaths[eventType];
+                return 0;
+        }
+        return 1;
+}
+
+int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex)
+{
+        if ((eventType < HvLpEvent_Type_NumTypes) &&
+                        lpEventHandler[eventType] &&
+                        lpEventHandlerPaths[eventType]) {
+                if (lpIndex == 0)
+                        lpIndex = itLpNaca.xLpIndex;
+                HvCallEvent_closeLpEventPath(lpIndex, eventType);
+                --lpEventHandlerPaths[eventType];
+                return 0;
+        }
+        return 1;
+}
+
 static int proc_lpevents_show(struct seq_file *m, void *v)
 {
         int cpu, i;
diff --git a/arch/powerpc/platforms/iseries/main_store.h b/arch/powerpc/platforms/iseries/main_store.h
new file mode 100644
index 000000000000..74f6889f834f
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/main_store.h
@@ -0,0 +1,165 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#ifndef _ISERIES_MAIN_STORE_H
+#define _ISERIES_MAIN_STORE_H
+
+/* Main Store Vpd for Condor,iStar,sStar */
+struct IoHriMainStoreSegment4 {
+        u8      msArea0Exists:1;
+        u8      msArea1Exists:1;
+        u8      msArea2Exists:1;
+        u8      msArea3Exists:1;
+        u8      reserved1:4;
+        u8      reserved2;
+
+        u8      msArea0Functional:1;
+        u8      msArea1Functional:1;
+        u8      msArea2Functional:1;
+        u8      msArea3Functional:1;
+        u8      reserved3:4;
+        u8      reserved4;
+
+        u32     totalMainStore;
+
+        u64     msArea0Ptr;
+        u64     msArea1Ptr;
+        u64     msArea2Ptr;
+        u64     msArea3Ptr;
+
+        u32     cardProductionLevel;
+
+        u32     msAdrHole;
+
+        u8      msArea0HasRiserVpd:1;
+        u8      msArea1HasRiserVpd:1;
+        u8      msArea2HasRiserVpd:1;
+        u8      msArea3HasRiserVpd:1;
+        u8      reserved5:4;
+        u8      reserved6;
+        u16     reserved7;
+
+        u8      reserved8[28];
+
+        u64     nonInterleavedBlocksStartAdr;
+        u64     nonInterleavedBlocksEndAdr;
+};
+
+/* Main Store VPD for Power4 */
+struct IoHriMainStoreChipInfo1 {
+        u32     chipMfgID       __attribute((packed));
+        char    chipECLevel[4]  __attribute((packed));
+};
+
+struct IoHriMainStoreVpdIdData {
+        char    typeNumber[4];
+        char    modelNumber[4];
+        char    partNumber[12];
+        char    serialNumber[12];
+};
+
+struct IoHriMainStoreVpdFruData {
+        char    fruLabel[8]     __attribute((packed));
+        u8      numberOfSlots   __attribute((packed));
+        u8      pluggingType    __attribute((packed));
+        u16     slotMapIndex    __attribute((packed));
+};
+
+struct IoHriMainStoreAdrRangeBlock {
+        void    *blockStart      __attribute((packed));
+        void    *blockEnd        __attribute((packed));
+        u32     blockProcChipId __attribute((packed));
+};
+
+#define MaxAreaAdrRangeBlocks 4
+
+struct IoHriMainStoreArea4 {
+        u32     msVpdFormat                     __attribute((packed));
+        u8      containedVpdType                __attribute((packed));
+        u8      reserved1                       __attribute((packed));
+        u16     reserved2                       __attribute((packed));
+
+        u64     msExists                        __attribute((packed));
+        u64     msFunctional                    __attribute((packed));
+
+        u32     memorySize                      __attribute((packed));
+        u32     procNodeId                      __attribute((packed));
+
+        u32     numAdrRangeBlocks               __attribute((packed));
+        struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks]        __attribute((packed));
+
+        struct IoHriMainStoreChipInfo1  chipInfo0       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo1       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo2       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo3       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo4       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo5       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo6       __attribute((packed));
+        struct IoHriMainStoreChipInfo1  chipInfo7       __attribute((packed));
+
+        void    *msRamAreaArray                 __attribute((packed));
+        u32     msRamAreaArrayNumEntries        __attribute((packed));
+        u32     msRamAreaArrayEntrySize         __attribute((packed));
+
+        u32     numaDimmExists                  __attribute((packed));
+        u32     numaDimmFunctional              __attribute((packed));
+        void    *numaDimmArray                  __attribute((packed));
+        u32     numaDimmArrayNumEntries         __attribute((packed));
+        u32     numaDimmArrayEntrySize          __attribute((packed));
+
+        struct IoHriMainStoreVpdIdData idData   __attribute((packed));
+
+        u64     powerData                       __attribute((packed));
+        u64     cardAssemblyPartNum             __attribute((packed));
+        u64     chipSerialNum                   __attribute((packed));
+
+        u64     reserved3                       __attribute((packed));
+        char    reserved4[16]                   __attribute((packed));
+
+        struct IoHriMainStoreVpdFruData fruData __attribute((packed));
+
+        u8      vpdPortNum                      __attribute((packed));
+        u8      reserved5                       __attribute((packed));
+        u8      frameId                         __attribute((packed));
+        u8      rackUnit                        __attribute((packed));
+        char    asciiKeywordVpd[256]            __attribute((packed));
+        u32     reserved6                       __attribute((packed));
+};
+
+
+struct IoHriMainStoreSegment5 {
+        u16     reserved1;
+        u8      reserved2;
+        u8      msVpdFormat;
+
+        u32     totalMainStore;
+        u64     maxConfiguredMsAdr;
+
+        struct IoHriMainStoreArea4      *msAreaArray;
+        u32     msAreaArrayNumEntries;
+        u32     msAreaArrayEntrySize;
+
+        u32     msAreaExists;
+        u32     msAreaFunctional;
+
+        u64     reserved3;
+};
+
+extern u64      xMsVpd[];
+
+#endif  /* _ISERIES_MAIN_STORE_H */
diff --git a/arch/ppc64/kernel/mf.c b/arch/powerpc/platforms/iseries/mf.c
index ef4a338ebd01..e5de31aa0015 100644
--- a/arch/ppc64/kernel/mf.c
+++ b/arch/powerpc/platforms/iseries/mf.c
@@ -1,29 +1,28 @@
 /*
-  * mf.c
-  * Copyright (C) 2001 Troy D. Armstrong  IBM Corporation
-  * Copyright (C) 2004-2005 Stephen Rothwell  IBM Corporation
-  *
-  * This modules exists as an interface between a Linux secondary partition
-  * running on an iSeries and the primary partition's Virtual Service
-  * Processor (VSP) object.  The VSP has final authority over powering on/off
-  * all partitions in the iSeries.  It also provides miscellaneous low-level
-  * machine facility type operations.
-  *
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-  * the Free Software Foundation; either version 2 of the License, or
-  * (at your option) any later version.
-  *
-  * This program is distributed in the hope that it will be useful,
-  * but WITHOUT ANY WARRANTY; without even the implied warranty of
-  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  * GNU General Public License for more details.
-  *
-  * You should have received a copy of the GNU General Public License
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
-  */
+ * Copyright (C) 2001 Troy D. Armstrong  IBM Corporation
+ * Copyright (C) 2004-2005 Stephen Rothwell  IBM Corporation
+ *
+ * This modules exists as an interface between a Linux secondary partition
+ * running on an iSeries and the primary partition's Virtual Service
+ * Processor (VSP) object.  The VSP has final authority over powering on/off
+ * all partitions in the iSeries.  It also provides miscellaneous low-level
+ * machine facility type operations.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
 
 #include <linux/types.h>
 #include <linux/errno.h>
@@ -33,15 +32,21 @@
 #include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/bcd.h>
+#include <linux/rtc.h>
 
 #include <asm/time.h>
 #include <asm/uaccess.h>
 #include <asm/paca.h>
+#include <asm/abs_addr.h>
 #include <asm/iSeries/vio.h>
 #include <asm/iSeries/mf.h>
 #include <asm/iSeries/HvLpConfig.h>
 #include <asm/iSeries/ItLpQueue.h>
 
+#include "setup.h"
+
+extern int piranha_simulator;
+
 /*
  * This is the structure layout for the Machine Facilites LPAR event
  * flows.
@@ -1061,10 +1066,10 @@ static void mf_getSrcHistory(char *buffer, int size)
         ev->event.data.vsp_cmd.lp_index = HvLpConfig_getLpIndex();
         ev->event.data.vsp_cmd.result_code = 0xFF;
         ev->event.data.vsp_cmd.reserved = 0;
-        ev->event.data.vsp_cmd.sub_data.page[0] = ISERIES_HV_ADDR(pages[0]);
-        ev->event.data.vsp_cmd.sub_data.page[1] = ISERIES_HV_ADDR(pages[1]);
-        ev->event.data.vsp_cmd.sub_data.page[2] = ISERIES_HV_ADDR(pages[2]);
-        ev->event.data.vsp_cmd.sub_data.page[3] = ISERIES_HV_ADDR(pages[3]);
+        ev->event.data.vsp_cmd.sub_data.page[0] = iseries_hv_addr(pages[0]);
+        ev->event.data.vsp_cmd.sub_data.page[1] = iseries_hv_addr(pages[1]);
+        ev->event.data.vsp_cmd.sub_data.page[2] = iseries_hv_addr(pages[2]);
+        ev->event.data.vsp_cmd.sub_data.page[3] = iseries_hv_addr(pages[3]);
         mb();
         if (signal_event(ev) != 0)
                 return;
@@ -1279,3 +1284,38 @@ static int __init mf_proc_init(void)
 __initcall(mf_proc_init);
 
 #endif /* CONFIG_PROC_FS */
+
+/*
+ * Get the RTC from the virtual service processor
+ * This requires flowing LpEvents to the primary partition
+ */
+void iSeries_get_rtc_time(struct rtc_time *rtc_tm)
+{
+        if (piranha_simulator)
+                return;
+
+        mf_get_rtc(rtc_tm);
+        rtc_tm->tm_mon--;
+}
+
+/*
+ * Set the RTC in the virtual service processor
+ * This requires flowing LpEvents to the primary partition
+ */
+int iSeries_set_rtc_time(struct rtc_time *tm)
+{
+        mf_set_rtc(tm);
+        return 0;
+}
+
+unsigned long iSeries_get_boot_time(void)
+{
+        struct rtc_time tm;
+
+        if (piranha_simulator)
+                return 0;
+
+        mf_get_boot_rtc(&tm);
+        return mktime(tm.tm_year + 1900, tm.tm_mon, tm.tm_mday,
+                      tm.tm_hour, tm.tm_min, tm.tm_sec);
+}
diff --git a/arch/powerpc/platforms/iseries/misc.S b/arch/powerpc/platforms/iseries/misc.S
new file mode 100644
index 000000000000..09f14522e176
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/misc.S
@@ -0,0 +1,55 @@
+/*
+ * This file contains miscellaneous low-level functions.
+ *    Copyright (C) 1995-2005 IBM Corp
+ *
+ * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
+ * and Paul Mackerras.
+ * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
+ * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/processor.h>
+#include <asm/asm-offsets.h>
+
+        .text
+
+/* unsigned long local_save_flags(void) */
+_GLOBAL(local_get_flags)
+        lbz     r3,PACAPROCENABLED(r13)
+        blr
+
+/* unsigned long local_irq_disable(void) */
+_GLOBAL(local_irq_disable)
+        lbz     r3,PACAPROCENABLED(r13)
+        li      r4,0
+        stb     r4,PACAPROCENABLED(r13)
+        blr                     /* Done */
+
+/* void local_irq_restore(unsigned long flags) */
+_GLOBAL(local_irq_restore)
+        lbz     r5,PACAPROCENABLED(r13)
+         /* Check if things are setup the way we want _already_. */
+        cmpw    0,r3,r5
+        beqlr
+        /* are we enabling interrupts? */
+        cmpdi   0,r3,0
+        stb     r3,PACAPROCENABLED(r13)
+        beqlr
+        /* Check pending interrupts */
+        /*   A decrementer, IPI or PMC interrupt may have occurred
+         *   while we were in the hypervisor (which enables) */
+        ld      r4,PACALPPACA+LPPACAANYINT(r13)
+        cmpdi   r4,0
+        beqlr
+
+        /*
+         * Handle pending interrupts in interrupt context
+         */
+        li      r0,0x5555
+        sc
+        blr
diff --git a/arch/ppc64/kernel/iSeries_pci.c b/arch/powerpc/platforms/iseries/pci.c
index fbc273c32bcc..959e59fd9c11 100644
--- a/arch/ppc64/kernel/iSeries_pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -1,28 +1,26 @@
 /*
- * iSeries_pci.c
- *
  * Copyright (C) 2001 Allan Trautman, IBM Corporation
  *
  * iSeries specific routines for PCI.
- * 
+ *
  * Based on code from pci.c and iSeries_pci.c 32bit
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  */
 #include <linux/kernel.h>
-#include <linux/list.h> 
+#include <linux/list.h>
 #include <linux/string.h>
 #include <linux/init.h>
 #include <linux/module.h>
@@ -36,21 +34,23 @@
 #include <asm/pci-bridge.h>
 #include <asm/ppcdebug.h>
 #include <asm/iommu.h>
+#include <asm/abs_addr.h>
 
-#include <asm/iSeries/HvCallPci.h>
 #include <asm/iSeries/HvCallXm.h>
-#include <asm/iSeries/iSeries_irq.h>
-#include <asm/iSeries/iSeries_pci.h>
 #include <asm/iSeries/mf.h>
 
+#include <asm/ppc-pci.h>
+
+#include "irq.h"
 #include "pci.h"
+#include "call_pci.h"
 
 extern unsigned long io_page_mask;
 
 /*
- * Forward declares of prototypes. 
+ * Forward declares of prototypes.
  */
-static struct iSeries_Device_Node *find_Device_Node(int bus, int devfn);
+static struct device_node *find_Device_Node(int bus, int devfn);
 static void scan_PHB_slots(struct pci_controller *Phb);
 static void scan_EADS_bridge(HvBusNumber Bus, HvSubBusNumber SubBus, int IdSel);
 static int scan_bridge_slot(HvBusNumber Bus, struct HvCallPci_BridgeInfo *Info);
@@ -68,7 +68,7 @@ static long Pci_Cfg_Write_Count;
 #endif
 static long Pci_Error_Count;
 
-static int Pci_Retry_Max = 3;   /* Only retry 3 times  */       
+static int Pci_Retry_Max = 3;   /* Only retry 3 times  */
 static int Pci_Error_Flag = 1;  /* Set Retry Error on. */
 
 static struct pci_ops iSeries_pci_ops;
@@ -87,7 +87,7 @@ static long current_iomm_table_entry;
 /*
  * Lookup Tables.
  */
-static struct iSeries_Device_Node **iomm_table;
+static struct device_node **iomm_table;
 static u8 *iobar_table;
 
 /*
@@ -179,7 +179,7 @@ static void allocate_device_bars(struct pci_dev *dev)
         for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num) {
                 bar_res = &dev->resource[bar_num];
                 iomm_table_allocate_entry(dev, bar_num);
-        }
+        }
 }
 
 /*
@@ -201,29 +201,31 @@ static void pci_Log_Error(char *Error_Text, int Bus, int SubBus,
 /*
  * build_device_node(u16 Bus, int SubBus, u8 DevFn)
  */
-static struct iSeries_Device_Node *build_device_node(HvBusNumber Bus,
+static struct device_node *build_device_node(HvBusNumber Bus,
                 HvSubBusNumber SubBus, int AgentId, int Function)
 {
-        struct iSeries_Device_Node *node;
+        struct device_node *node;
+        struct pci_dn *pdn;
 
         PPCDBG(PPCDBG_BUSWALK,
                         "-build_device_node 0x%02X.%02X.%02X Function: %02X\n",
                         Bus, SubBus, AgentId, Function);
 
-        node = kmalloc(sizeof(struct iSeries_Device_Node), GFP_KERNEL);
+        node = kmalloc(sizeof(struct device_node), GFP_KERNEL);
         if (node == NULL)
                 return NULL;
-
-        memset(node, 0, sizeof(struct iSeries_Device_Node));
-        list_add_tail(&node->Device_List, &iSeries_Global_Device_List);
-#if 0
-        node->DsaAddr = ((u64)Bus << 48) + ((u64)SubBus << 40) + ((u64)0x10 << 32);
-#endif
-        node->DsaAddr.DsaAddr = 0;
-        node->DsaAddr.Dsa.busNumber = Bus;
-        node->DsaAddr.Dsa.subBusNumber = SubBus;
-        node->DsaAddr.Dsa.deviceId = 0x10;
-        node->DevFn = PCI_DEVFN(ISERIES_ENCODE_DEVICE(AgentId), Function);
+        memset(node, 0, sizeof(struct device_node));
+        pdn = kzalloc(sizeof(*pdn), GFP_KERNEL);
+        if (pdn == NULL) {
+                kfree(node);
+                return NULL;
+        }
+        node->data = pdn;
+        pdn->node = node;
+        list_add_tail(&pdn->Device_List, &iSeries_Global_Device_List);
+        pdn->busno = Bus;
+        pdn->bussubno = SubBus;
+        pdn->devfn = PCI_DEVFN(ISERIES_ENCODE_DEVICE(AgentId), Function);
         return node;
 }
 
@@ -278,28 +280,28 @@ unsigned long __init find_and_init_phbs(void)
 
 /*
  * iSeries_pcibios_init
- *  
+ *
  * Chance to initialize and structures or variable before PCI Bus walk.
  */
 void iSeries_pcibios_init(void)
 {
-        PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_init Entry.\n"); 
+        PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_init Entry.\n");
         iomm_table_initialize();
         find_and_init_phbs();
         io_page_mask = -1;
-        PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_init Exit.\n"); 
+        PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_init Exit.\n");
 }
 
 /*
- * iSeries_pci_final_fixup(void)  
+ * iSeries_pci_final_fixup(void)
  */
 void __init iSeries_pci_final_fixup(void)
 {
         struct pci_dev *pdev = NULL;
-        struct iSeries_Device_Node *node;
-        int DeviceCount = 0;
+        struct device_node *node;
+        int DeviceCount = 0;
 
-        PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_fixup Entry.\n"); 
+        PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_fixup Entry.\n");
 
         /* Fix up at the device node and pci_dev relationship */
         mf_display_src(0xC9000100);
@@ -313,7 +315,7 @@ void __init iSeries_pci_final_fixup(void)
                 if (node != NULL) {
                         ++DeviceCount;
                         pdev->sysdata = (void *)node;
-                        node->PciDev = pdev;
+                        PCI_DN(node)->pcidev = pdev;
                         PPCDBG(PPCDBG_BUSWALK,
                                         "pdev 0x%p <==> DevNode 0x%p\n",
                                         pdev, node);
@@ -323,7 +325,7 @@ void __init iSeries_pci_final_fixup(void)
                 } else
                         printk("PCI: Device Tree not found for 0x%016lX\n",
                                         (unsigned long)pdev);
-                pdev->irq = node->Irq;
+                pdev->irq = PCI_DN(node)->Irq;
         }
         iSeries_activate_IRQs();
         mf_display_src(0xC9000200);
@@ -332,24 +334,24 @@ void __init iSeries_pci_final_fixup(void)
 void pcibios_fixup_bus(struct pci_bus *PciBus)
 {
         PPCDBG(PPCDBG_BUSWALK, "iSeries_pcibios_fixup_bus(0x%04X) Entry.\n",
-                        PciBus->number); 
+                        PciBus->number);
 }
 
 void pcibios_fixup_resources(struct pci_dev *pdev)
 {
         PPCDBG(PPCDBG_BUSWALK, "fixup_resources pdev %p\n", pdev);
-}   
+}
 
 /*
- * Loop through each node function to find usable EADs bridges.  
+ * Loop through each node function to find usable EADs bridges.
  */
 static void scan_PHB_slots(struct pci_controller *Phb)
 {
         struct HvCallPci_DeviceInfo *DevInfo;
-        HvBusNumber bus = Phb->local_number;    /* System Bus */        
+        HvBusNumber bus = Phb->local_number;    /* System Bus */
         const HvSubBusNumber SubBus = 0;        /* EADs is always 0. */
         int HvRc = 0;
-        int IdSel;      
+        int IdSel;
         const int MaxAgents = 8;
 
         DevInfo = (struct HvCallPci_DeviceInfo*)
@@ -358,11 +360,11 @@ static void scan_PHB_slots(struct pci_controller *Phb)
                 return;
 
         /*
-         * Probe for EADs Bridges      
+         * Probe for EADs Bridges
          */
         for (IdSel = 1; IdSel < MaxAgents; ++IdSel) {
-                HvRc = HvCallPci_getDeviceInfo(bus, SubBus, IdSel,
-                                ISERIES_HV_ADDR(DevInfo),
+                HvRc = HvCallPci_getDeviceInfo(bus, SubBus, IdSel,
+                                iseries_hv_addr(DevInfo),
                                 sizeof(struct HvCallPci_DeviceInfo));
                 if (HvRc == 0) {
                         if (DevInfo->deviceType == HvCallPci_NodeDevice)
@@ -393,19 +395,19 @@ static void scan_EADS_bridge(HvBusNumber bus, HvSubBusNumber SubBus,
 
         /* Note: hvSubBus and irq is always be 0 at this level! */
         for (Function = 0; Function < 8; ++Function) {
-                AgentId = ISERIES_PCI_AGENTID(IdSel, Function);
+                AgentId = ISERIES_PCI_AGENTID(IdSel, Function);
                 HvRc = HvCallXm_connectBusUnit(bus, SubBus, AgentId, 0);
-                if (HvRc == 0) {
+                if (HvRc == 0) {
                         printk("found device at bus %d idsel %d func %d (AgentId %x)\n",
                                bus, IdSel, Function, AgentId);
-                        /*  Connect EADs: 0x18.00.12 = 0x00 */
+                        /*  Connect EADs: 0x18.00.12 = 0x00 */
                         PPCDBG(PPCDBG_BUSWALK,
                                         "PCI:Connect EADs: 0x%02X.%02X.%02X\n",
                                         bus, SubBus, AgentId);
-                        HvRc = HvCallPci_getBusUnitInfo(bus, SubBus, AgentId,
-                                        ISERIES_HV_ADDR(BridgeInfo),
+                        HvRc = HvCallPci_getBusUnitInfo(bus, SubBus, AgentId,
+                                        iseries_hv_addr(BridgeInfo),
                                         sizeof(struct HvCallPci_BridgeInfo));
-                        if (HvRc == 0) {
+                        if (HvRc == 0) {
                                 printk("bridge info: type %x subbus %x maxAgents %x maxsubbus %x logslot %x\n",
                                         BridgeInfo->busUnitInfo.deviceType,
                                         BridgeInfo->subBusNumber,
@@ -428,7 +430,7 @@ static void scan_EADS_bridge(HvBusNumber bus, HvSubBusNumber SubBus,
                                         printk("PCI: Invalid Bridge Configuration(0x%02X)",
                                                 BridgeInfo->busUnitInfo.deviceType);
                         }
-                } else if (HvRc != 0x000B)
+                } else if (HvRc != 0x000B)
                         pci_Log_Error("EADs Connect",
                                         bus, SubBus, AgentId, HvRc);
         }
@@ -441,7 +443,7 @@ static void scan_EADS_bridge(HvBusNumber bus, HvSubBusNumber SubBus,
 static int scan_bridge_slot(HvBusNumber Bus,
                 struct HvCallPci_BridgeInfo *BridgeInfo)
 {
-        struct iSeries_Device_Node *node;
+        struct device_node *node;
         HvSubBusNumber SubBus = BridgeInfo->subBusNumber;
         u16 VendorId = 0;
         int HvRc = 0;
@@ -451,16 +453,16 @@ static int scan_bridge_slot(HvBusNumber Bus,
         HvAgentId EADsIdSel = ISERIES_PCI_AGENTID(IdSel, Function);
 
         /* iSeries_allocate_IRQ.: 0x18.00.12(0xA3) */
-        Irq = iSeries_allocate_IRQ(Bus, 0, EADsIdSel);
+        Irq = iSeries_allocate_IRQ(Bus, 0, EADsIdSel);
         PPCDBG(PPCDBG_BUSWALK,
                 "PCI:- allocate and assign IRQ 0x%02X.%02X.%02X = 0x%02X\n",
                 Bus, 0, EADsIdSel, Irq);
 
         /*
-         * Connect all functions of any device found.  
+         * Connect all functions of any device found.
          */
-        for (IdSel = 1; IdSel <= BridgeInfo->maxAgents; ++IdSel) {
-                for (Function = 0; Function < 8; ++Function) {
+        for (IdSel = 1; IdSel <= BridgeInfo->maxAgents; ++IdSel) {
+                for (Function = 0; Function < 8; ++Function) {
                         HvAgentId AgentId = ISERIES_PCI_AGENTID(IdSel, Function);
                         HvRc = HvCallXm_connectBusUnit(Bus, SubBus,
                                         AgentId, Irq);
@@ -484,15 +486,15 @@ static int scan_bridge_slot(HvBusNumber Bus,
                                "PCI:- FoundDevice: 0x%02X.%02X.%02X = 0x%04X, irq %d\n",
                                Bus, SubBus, AgentId, VendorId, Irq);
                         HvRc = HvCallPci_configStore8(Bus, SubBus, AgentId,
-                                                      PCI_INTERRUPT_LINE, Irq);  
+                                                      PCI_INTERRUPT_LINE, Irq);
                         if (HvRc != 0)
                                 pci_Log_Error("PciCfgStore Irq Failed!",
                                               Bus, SubBus, AgentId, HvRc);
 
                         ++DeviceCount;
                         node = build_device_node(Bus, SubBus, EADsIdSel, Function);
-                        node->Irq = Irq;
-                        node->LogicalSlot = BridgeInfo->logicalSlotNumber;
+                        PCI_DN(node)->Irq = Irq;
+                        PCI_DN(node)->LogicalSlot = BridgeInfo->logicalSlotNumber;
 
                 } /* for (Function = 0; Function < 8; ++Function) */
         } /* for (IdSel = 1; IdSel <= MaxAgents; ++IdSel) */
@@ -542,16 +544,13 @@ EXPORT_SYMBOL(iSeries_memcpy_fromio);
 /*
  * Look down the chain to find the matching Device Device
  */
-static struct iSeries_Device_Node *find_Device_Node(int bus, int devfn)
+static struct device_node *find_Device_Node(int bus, int devfn)
 {
-        struct list_head *pos;
+        struct pci_dn *pdn;
 
-        list_for_each(pos, &iSeries_Global_Device_List) {
-                struct iSeries_Device_Node *node =
-                        list_entry(pos, struct iSeries_Device_Node, Device_List);
-
-                if ((bus == ISERIES_BUS(node)) && (devfn == node->DevFn))
-                        return node;
+        list_for_each_entry(pdn, &iSeries_Global_Device_List, Device_List) {
+                if ((bus == pdn->busno) && (devfn == pdn->devfn))
+                        return pdn->node;
         }
         return NULL;
 }
@@ -562,12 +561,12 @@ static struct iSeries_Device_Node *find_Device_Node(int bus, int devfn)
  * Sanity Check Node PciDev to passed pci_dev
  * If none is found, returns a NULL which the client must handle.
  */
-static struct iSeries_Device_Node *get_Device_Node(struct pci_dev *pdev)
+static struct device_node *get_Device_Node(struct pci_dev *pdev)
 {
-        struct iSeries_Device_Node *node;
+        struct device_node *node;
 
         node = pdev->sysdata;
-        if (node == NULL || node->PciDev != pdev)
+        if (node == NULL || PCI_DN(node)->pcidev != pdev)
                 node = find_Device_Node(pdev->bus->number, pdev->devfn);
         return node;
 }
@@ -595,7 +594,7 @@ static u64 hv_cfg_write_func[4] = {
 static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
                 int offset, int size, u32 *val)
 {
-        struct iSeries_Device_Node *node = find_Device_Node(bus->number, devfn);
+        struct device_node *node = find_Device_Node(bus->number, devfn);
         u64 fn;
         struct HvCallPci_LoadReturn ret;
 
@@ -607,7 +606,7 @@ static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
         }
 
         fn = hv_cfg_read_func[(size - 1) & 3];
-        HvCall3Ret16(fn, &ret, node->DsaAddr.DsaAddr, offset, 0);
+        HvCall3Ret16(fn, &ret, iseries_ds_addr(node), offset, 0);
 
         if (ret.rc != 0) {
                 *val = ~0;
@@ -625,7 +624,7 @@ static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
                 int offset, int size, u32 val)
 {
-        struct iSeries_Device_Node *node = find_Device_Node(bus->number, devfn);
+        struct device_node *node = find_Device_Node(bus->number, devfn);
         u64 fn;
         u64 ret;
 
@@ -635,7 +634,7 @@ static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
                 return PCIBIOS_BAD_REGISTER_NUMBER;
 
         fn = hv_cfg_write_func[(size - 1) & 3];
-        ret = HvCall4(fn, node->DsaAddr.DsaAddr, offset, val, 0);
+        ret = HvCall4(fn, iseries_ds_addr(node), offset, val, 0);
 
         if (ret != 0)
                 return PCIBIOS_DEVICE_NOT_FOUND;
@@ -657,14 +656,16 @@ static struct pci_ops iSeries_pci_ops = {
  * PCI: Device 23.90 ReadL Retry( 1)
  * PCI: Device 23.90 ReadL Retry Successful(1)
  */
-static int CheckReturnCode(char *TextHdr, struct iSeries_Device_Node *DevNode,
+static int CheckReturnCode(char *TextHdr, struct device_node *DevNode,
                 int *retry, u64 ret)
 {
         if (ret != 0)  {
+                struct pci_dn *pdn = PCI_DN(DevNode);
+
                 ++Pci_Error_Count;
                 (*retry)++;
                 printk("PCI: %s: Device 0x%04X:%02X  I/O Error(%2d): 0x%04X\n",
-                                TextHdr, DevNode->DsaAddr.Dsa.busNumber, DevNode->DevFn,
+                                TextHdr, pdn->busno, pdn->devfn,
                                 *retry, (int)ret);
                 /*
                  * Bump the retry and check for retry count exceeded.
@@ -687,14 +688,14 @@ static int CheckReturnCode(char *TextHdr, struct iSeries_Device_Node *DevNode,
  * Note: Make sure the passed variable end up on the stack to avoid
  * the exposure of being device global.
  */
-static inline struct iSeries_Device_Node *xlate_iomm_address(
+static inline struct device_node *xlate_iomm_address(
                 const volatile void __iomem *IoAddress,
                 u64 *dsaptr, u64 *BarOffsetPtr)
 {
         unsigned long OrigIoAddr;
         unsigned long BaseIoAddr;
         unsigned long TableIndex;
-        struct iSeries_Device_Node *DevNode;
+        struct device_node *DevNode;
 
         OrigIoAddr = (unsigned long __force)IoAddress;
         if ((OrigIoAddr < BASE_IO_MEMORY) || (OrigIoAddr >= max_io_memory))
@@ -705,7 +706,7 @@ static inline struct iSeries_Device_Node *xlate_iomm_address(
 
         if (DevNode != NULL) {
                 int barnum = iobar_table[TableIndex];
-                *dsaptr = DevNode->DsaAddr.DsaAddr | (barnum << 24);
+                *dsaptr = iseries_ds_addr(DevNode) | (barnum << 24);
                 *BarOffsetPtr = BaseIoAddr % IOMM_TABLE_ENTRY_SIZE;
         } else
                 panic("PCI: Invalid PCI IoAddress detected!\n");
@@ -727,7 +728,7 @@ u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
         u64 dsa;
         int retry = 0;
         struct HvCallPci_LoadReturn ret;
-        struct iSeries_Device_Node *DevNode =
+        struct device_node *DevNode =
                 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
 
         if (DevNode == NULL) {
@@ -757,7 +758,7 @@ u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
         u64 dsa;
         int retry = 0;
         struct HvCallPci_LoadReturn ret;
-        struct iSeries_Device_Node *DevNode =
+        struct device_node *DevNode =
                 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
 
         if (DevNode == NULL) {
@@ -788,7 +789,7 @@ u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
         u64 dsa;
         int retry = 0;
         struct HvCallPci_LoadReturn ret;
-        struct iSeries_Device_Node *DevNode =
+        struct device_node *DevNode =
                 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
 
         if (DevNode == NULL) {
@@ -826,7 +827,7 @@ void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
         u64 dsa;
         int retry = 0;
         u64 rc;
-        struct iSeries_Device_Node *DevNode =
+        struct device_node *DevNode =
                 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
 
         if (DevNode == NULL) {
@@ -854,7 +855,7 @@ void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
         u64 dsa;
         int retry = 0;
         u64 rc;
-        struct iSeries_Device_Node *DevNode =
+        struct device_node *DevNode =
                 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
 
         if (DevNode == NULL) {
@@ -882,7 +883,7 @@ void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
         u64 dsa;
         int retry = 0;
         u64 rc;
-        struct iSeries_Device_Node *DevNode =
+        struct device_node *DevNode =
                 xlate_iomm_address(IoAddress, &dsa, &BarOffset);
 
         if (DevNode == NULL) {
diff --git a/arch/powerpc/platforms/iseries/pci.h b/arch/powerpc/platforms/iseries/pci.h
new file mode 100644
index 000000000000..33a8489fde54
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/pci.h
@@ -0,0 +1,63 @@
+#ifndef _PLATFORMS_ISERIES_PCI_H
+#define _PLATFORMS_ISERIES_PCI_H
+
+/*
+ * Created by Allan Trautman on Tue Feb 20, 2001.
+ *
+ * Define some useful macros for the iSeries pci routines.
+ * Copyright (C) 2001  Allan H Trautman, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the:
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330,
+ * Boston, MA  02111-1307  USA
+ *
+ * Change Activity:
+ *   Created Feb 20, 2001
+ *   Added device reset, March 22, 2001
+ *   Ported to ppc64, May 25, 2001
+ * End Change Activity
+ */
+
+#include <asm/pci-bridge.h>
+
+struct pci_dev;                         /* For Forward Reference */
+
+/*
+ * Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
+ * For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
+ */
+
+#define ISERIES_PCI_AGENTID(idsel, func)        \
+        (((idsel & 0x0F) << 4) | (func & 0x07))
+#define ISERIES_ENCODE_DEVICE(agentid)          \
+        ((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07))
+
+#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus)          ((subbus >> 5) & 0x7)
+#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus)        ((subbus >> 2) & 0x7)
+
+/*
+ * Generate a Direct Select Address for the Hypervisor
+ */
+static inline u64 iseries_ds_addr(struct device_node *node)
+{
+        struct pci_dn *pdn = PCI_DN(node);
+
+        return ((u64)pdn->busno << 48) + ((u64)pdn->bussubno << 40)
+                        + ((u64)0x10 << 32);
+}
+
+extern void     iSeries_Device_Information(struct pci_dev*, int);
+
+#endif /* _PLATFORMS_ISERIES_PCI_H */
diff --git a/arch/ppc64/kernel/iSeries_proc.c b/arch/powerpc/platforms/iseries/proc.c
index 0fe3116eba29..6f1929cac66b 100644
--- a/arch/ppc64/kernel/iSeries_proc.c
+++ b/arch/powerpc/platforms/iseries/proc.c
@@ -1,5 +1,4 @@
 /*
- * iSeries_proc.c
  * Copyright (C) 2001  Kyle A. Lucke IBM Corporation
  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen IBM Corporation
  *
@@ -27,8 +26,9 @@
 #include <asm/lppaca.h>
 #include <asm/iSeries/ItLpQueue.h>
 #include <asm/iSeries/HvCallXm.h>
-#include <asm/iSeries/IoHriMainStore.h>
-#include <asm/iSeries/IoHriProcessorVpd.h>
+
+#include "processor_vpd.h"
+#include "main_store.h"
 
 static int __init iseries_proc_create(void)
 {
@@ -68,12 +68,15 @@ static int proc_titantod_show(struct seq_file *m, void *v)
                 unsigned long tb_ticks = (tb0 - startTb);
                 unsigned long titan_jiffies = titan_usec / (1000000/HZ);
                 unsigned long titan_jiff_usec = titan_jiffies * (1000000/HZ);
-                unsigned long titan_jiff_rem_usec = titan_usec - titan_jiff_usec;
+                unsigned long titan_jiff_rem_usec =
+                        titan_usec - titan_jiff_usec;
                 unsigned long tb_jiffies = tb_ticks / tb_ticks_per_jiffy;
                 unsigned long tb_jiff_ticks = tb_jiffies * tb_ticks_per_jiffy;
                 unsigned long tb_jiff_rem_ticks = tb_ticks - tb_jiff_ticks;
-                unsigned long tb_jiff_rem_usec = tb_jiff_rem_ticks / tb_ticks_per_usec;
-                unsigned long new_tb_ticks_per_jiffy = (tb_ticks * (1000000/HZ))/titan_usec;
+                unsigned long tb_jiff_rem_usec =
+                        tb_jiff_rem_ticks / tb_ticks_per_usec;
+                unsigned long new_tb_ticks_per_jiffy =
+                        (tb_ticks * (1000000/HZ))/titan_usec;
 
                 seq_printf(m, "  titan elapsed = %lu uSec\n", titan_usec);
                 seq_printf(m, "  tb elapsed    = %lu ticks\n", tb_ticks);
diff --git a/arch/powerpc/platforms/iseries/processor_vpd.h b/arch/powerpc/platforms/iseries/processor_vpd.h
new file mode 100644
index 000000000000..7ac5d0d0dbfa
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/processor_vpd.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ISERIES_PROCESSOR_VPD_H
+#define _ISERIES_PROCESSOR_VPD_H
+
+#include <asm/types.h>
+
+/*
+ * This struct maps Processor Vpd that is DMAd to SLIC by CSP
+ */
+struct IoHriProcessorVpd {
+        u8      xFormat;                // VPD format indicator         x00-x00
+        u8      xProcStatus:8;          // Processor State              x01-x01
+        u8      xSecondaryThreadCount;  // Secondary thread cnt         x02-x02
+        u8      xSrcType:1;             // Src Type                     x03-x03
+        u8      xSrcSoft:1;             // Src stay soft                ...
+        u8      xSrcParable:1;          // Src parable                  ...
+        u8      xRsvd1:5;               // Reserved                     ...
+        u16     xHvPhysicalProcIndex;   // Hypervisor physical proc index04-x05
+        u16     xRsvd2;                 // Reserved                     x06-x07
+        u32     xHwNodeId;              // Hardware node id             x08-x0B
+        u32     xHwProcId;              // Hardware processor id        x0C-x0F
+
+        u32     xTypeNum;               // Card Type/CCIN number        x10-x13
+        u32     xModelNum;              // Model/Feature number         x14-x17
+        u64     xSerialNum;             // Serial number                x18-x1F
+        char    xPartNum[12];           // Book Part or FPU number      x20-x2B
+        char    xMfgID[4];              // Manufacturing ID             x2C-x2F
+
+        u32     xProcFreq;              // Processor Frequency          x30-x33
+        u32     xTimeBaseFreq;          // Time Base Frequency          x34-x37
+
+        u32     xChipEcLevel;           // Chip EC Levels               x38-x3B
+        u32     xProcIdReg;             // PIR SPR value                x3C-x3F
+        u32     xPVR;                   // PVR value                    x40-x43
+        u8      xRsvd3[12];             // Reserved                     x44-x4F
+
+        u32     xInstCacheSize;         // Instruction cache size in KB x50-x53
+        u32     xInstBlockSize;         // Instruction cache block size x54-x57
+        u32     xDataCacheOperandSize;  // Data cache operand size      x58-x5B
+        u32     xInstCacheOperandSize;  // Inst cache operand size      x5C-x5F
+
+        u32     xDataL1CacheSizeKB;     // L1 data cache size in KB     x60-x63
+        u32     xDataL1CacheLineSize;   // L1 data cache block size     x64-x67
+        u64     xRsvd4;                 // Reserved                     x68-x6F
+
+        u32     xDataL2CacheSizeKB;     // L2 data cache size in KB     x70-x73
+        u32     xDataL2CacheLineSize;   // L2 data cache block size     x74-x77
+        u64     xRsvd5;                 // Reserved                     x78-x7F
+
+        u32     xDataL3CacheSizeKB;     // L3 data cache size in KB     x80-x83
+        u32     xDataL3CacheLineSize;   // L3 data cache block size     x84-x87
+        u64     xRsvd6;                 // Reserved                     x88-x8F
+
+        u64     xFruLabel;              // Card Location Label          x90-x97
+        u8      xSlotsOnCard;           // Slots on card (0=no slots)   x98-x98
+        u8      xPartLocFlag;           // Location flag (0-pluggable 1-imbedded) x99-x99
+        u16     xSlotMapIndex;          // Index in slot map table      x9A-x9B
+        u8      xSmartCardPortNo;       // Smart card port number       x9C-x9C
+        u8      xRsvd7;                 // Reserved                     x9D-x9D
+        u16     xFrameIdAndRackUnit;    // Frame ID and rack unit adr   x9E-x9F
+
+        u8      xRsvd8[24];             // Reserved                     xA0-xB7
+
+        char    xProcSrc[72];           // CSP format SRC               xB8-xFF
+};
+
+extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
+
+#endif /* _ISERIES_PROCESSOR_VPD_H */
diff --git a/arch/powerpc/platforms/iseries/release_data.h b/arch/powerpc/platforms/iseries/release_data.h
new file mode 100644
index 000000000000..c68b9c3e5caf
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/release_data.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ISERIES_RELEASE_DATA_H
+#define _ISERIES_RELEASE_DATA_H
+
+/*
+ * This control block contains the critical information about the
+ * release so that it can be changed in the future (ie, the virtual
+ * address of the OS's NACA).
+ */
+#include <asm/types.h>
+#include <asm/naca.h>
+
+/*
+ * When we IPL a secondary partition, we will check if if the
+ * secondary xMinPlicVrmIndex > the primary xVrmIndex.
+ * If it is then this tells PLIC that this secondary is not
+ * supported running on this "old" of a level of PLIC.
+ *
+ * Likewise, we will compare the primary xMinSlicVrmIndex to
+ * the secondary xVrmIndex.
+ * If the primary xMinSlicVrmDelta > secondary xVrmDelta then we
+ * know that this PLIC does not support running an OS "that old".
+ */
+
+#define HVREL_TAGSINACTIVE      0x8000
+#define HVREL_32BIT             0x4000
+#define HVREL_NOSHAREDPROCS     0x2000
+#define HVREL_NOHMT             0x1000
+
+struct HvReleaseData {
+        u32     xDesc;          /* Descriptor "HvRD" ebcdic     x00-x03 */
+        u16     xSize;          /* Size of this control block   x04-x05 */
+        u16     xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */
+        struct  naca_struct     *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */
+        u32     xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */
+        u32     xRsvd1;         /* Reserved                     x14-x17 */
+        u16     xFlags;
+        u16     xVrmIndex;      /* VRM Index of OS image        x1A-x1B */
+        u16     xMinSupportedPlicVrmIndex; /* Min PLIC level  (soft) x1C-x1D */
+        u16     xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */
+        char    xVrmName[12];   /* Displayable name             x20-x2B */
+        char    xRsvd3[20];     /* Reserved                     x2C-x3F */
+};
+
+extern struct HvReleaseData     hvReleaseData;
+
+#endif /* _ISERIES_RELEASE_DATA_H */
diff --git a/arch/ppc64/kernel/iSeries_setup.c b/arch/powerpc/platforms/iseries/setup.c
index 3ffefbbc6623..1544c6f10a38 100644
--- a/arch/ppc64/kernel/iSeries_setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -2,8 +2,6 @@
  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  *
- *    Module name: iSeries_setup.c
- *
  *    Description:
  *      Architecture- / platform-specific boot-time initialization code for
  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
@@ -42,26 +40,27 @@
 #include <asm/firmware.h>
 
 #include <asm/time.h>
-#include "iSeries_setup.h"
 #include <asm/naca.h>
 #include <asm/paca.h>
 #include <asm/cache.h>
 #include <asm/sections.h>
 #include <asm/abs_addr.h>
-#include <asm/iSeries/HvCallHpt.h>
 #include <asm/iSeries/HvLpConfig.h>
 #include <asm/iSeries/HvCallEvent.h>
-#include <asm/iSeries/HvCallSm.h>
 #include <asm/iSeries/HvCallXm.h>
 #include <asm/iSeries/ItLpQueue.h>
-#include <asm/iSeries/IoHriMainStore.h>
 #include <asm/iSeries/mf.h>
 #include <asm/iSeries/HvLpEvent.h>
-#include <asm/iSeries/iSeries_irq.h>
-#include <asm/iSeries/IoHriProcessorVpd.h>
-#include <asm/iSeries/ItVpdAreas.h>
 #include <asm/iSeries/LparMap.h>
 
+#include "setup.h"
+#include "irq.h"
+#include "vpd_areas.h"
+#include "processor_vpd.h"
+#include "main_store.h"
+#include "call_sm.h"
+#include "call_hpt.h"
+
 extern void hvlog(char *fmt, ...);
 
 #ifdef DEBUG
@@ -74,8 +73,8 @@ extern void hvlog(char *fmt, ...);
 extern void ppcdbg_initialize(void);
 
 static void build_iSeries_Memory_Map(void);
-static void setup_iSeries_cache_sizes(void);
-static void iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr);
+static void iseries_shared_idle(void);
+static void iseries_dedicated_idle(void);
 #ifdef CONFIG_PCI
 extern void iSeries_pci_final_fixup(void);
 #else
@@ -83,14 +82,6 @@ static void iSeries_pci_final_fixup(void) { }
 #endif
 
 /* Global Variables */
-static unsigned long procFreqHz;
-static unsigned long procFreqMhz;
-static unsigned long procFreqMhzHundreths;
-
-static unsigned long tbFreqHz;
-static unsigned long tbFreqMhz;
-static unsigned long tbFreqMhzHundreths;
-
 int piranha_simulator;
 
 extern int rd_size;             /* Defined in drivers/block/rd.c */
@@ -311,14 +302,14 @@ static void __init iSeries_get_cmdline(void)
 
 static void __init iSeries_init_early(void)
 {
-        extern unsigned long memory_limit;
-
         DBG(" -> iSeries_init_early()\n");
 
         ppc64_firmware_features = FW_FEATURE_ISERIES;
 
         ppcdbg_initialize();
 
+        ppc64_interrupt_controller = IC_ISERIES;
+
 #if defined(CONFIG_BLK_DEV_INITRD)
         /*
          * If the init RAM disk has been configured and there is
@@ -341,12 +332,6 @@ static void __init iSeries_init_early(void)
         iSeries_recal_titan = HvCallXm_loadTod();
 
         /*
-         * Cache sizes must be initialized before hpte_init_iSeries is called
-         * as the later need them for flush_icache_range()
-         */
-        setup_iSeries_cache_sizes();
-
-        /*
          * Initialize the hash table management pointers
          */
         hpte_init_iSeries();
@@ -356,12 +341,6 @@ static void __init iSeries_init_early(void)
          */
         iommu_init_early_iSeries();
 
-        /*
-         * Initialize the table which translate Linux physical addresses to
-         * AS/400 absolute addresses
-         */
-        build_iSeries_Memory_Map();
-
         iSeries_get_cmdline();
 
         /* Save unparsed command line copy for /proc/cmdline */
@@ -379,14 +358,6 @@ static void __init iSeries_init_early(void)
                 }
         }
 
-        /* Bolt kernel mappings for all of memory (or just a bit if we've got a limit) */
-        iSeries_bolt_kernel(0, systemcfg->physicalMemorySize);
-
-        lmb_init();
-        lmb_add(0, systemcfg->physicalMemorySize);
-        lmb_analyze();
-        lmb_reserve(0, __pa(klimit));
-
         /* Initialize machine-dependency vectors */
 #ifdef CONFIG_SMP
         smp_init_iSeries();
@@ -457,7 +428,6 @@ static void __init build_iSeries_Memory_Map(void)
         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
         u32 nextPhysChunk;
         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
-        u32 num_ptegs;
         u32 totalChunks,moreChunks;
         u32 currChunk, thisChunk, absChunk;
         u32 currDword;
@@ -520,10 +490,7 @@ static void __init build_iSeries_Memory_Map(void)
         printk("HPT absolute addr = %016lx, size = %dK\n",
                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 
-        /* Fill in the hashed page table hash mask */
-        num_ptegs = hptSizePages *
-                (PAGE_SIZE / (sizeof(hpte_t) * HPTES_PER_GROUP));
-        htab_hash_mask = num_ptegs - 1;
+        ppc64_pft_size = __ilog2(hptSizePages * PAGE_SIZE);
 
         /*
          * The actual hashed page table is in the hypervisor,
@@ -592,144 +559,33 @@ static void __init build_iSeries_Memory_Map(void)
 }
 
 /*
- * Set up the variables that describe the cache line sizes
- * for this machine.
- */
-static void __init setup_iSeries_cache_sizes(void)
-{
-        unsigned int i, n;
-        unsigned int procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
-
-        systemcfg->icache_size =
-        ppc64_caches.isize = xIoHriProcessorVpd[procIx].xInstCacheSize * 1024;
-        systemcfg->icache_line_size =
-        ppc64_caches.iline_size =
-                xIoHriProcessorVpd[procIx].xInstCacheOperandSize;
-        systemcfg->dcache_size =
-        ppc64_caches.dsize =
-                xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024;
-        systemcfg->dcache_line_size =
-        ppc64_caches.dline_size =
-                xIoHriProcessorVpd[procIx].xDataCacheOperandSize;
-        ppc64_caches.ilines_per_page = PAGE_SIZE / ppc64_caches.iline_size;
-        ppc64_caches.dlines_per_page = PAGE_SIZE / ppc64_caches.dline_size;
-
-        i = ppc64_caches.iline_size;
-        n = 0;
-        while ((i = (i / 2)))
-                ++n;
-        ppc64_caches.log_iline_size = n;
-
-        i = ppc64_caches.dline_size;
-        n = 0;
-        while ((i = (i / 2)))
-                ++n;
-        ppc64_caches.log_dline_size = n;
-
-        printk("D-cache line size = %d\n",
-                        (unsigned int)ppc64_caches.dline_size);
-        printk("I-cache line size = %d\n",
-                        (unsigned int)ppc64_caches.iline_size);
-}
-
-/*
- * Create a pte. Used during initialization only.
- */
-static void iSeries_make_pte(unsigned long va, unsigned long pa,
-                             int mode)
-{
-        hpte_t local_hpte, rhpte;
-        unsigned long hash, vpn;
-        long slot;
-
-        vpn = va >> PAGE_SHIFT;
-        hash = hpt_hash(vpn, 0);
-
-        local_hpte.r = pa | mode;
-        local_hpte.v = ((va >> 23) << HPTE_V_AVPN_SHIFT)
-                | HPTE_V_BOLTED | HPTE_V_VALID;
-
-        slot = HvCallHpt_findValid(&rhpte, vpn);
-        if (slot < 0) {
-                /* Must find space in primary group */
-                panic("hash_page: hpte already exists\n");
-        }
-        HvCallHpt_addValidate(slot, 0, &local_hpte);
-}
-
-/*
- * Bolt the kernel addr space into the HPT
- */
-static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr)
-{
-        unsigned long pa;
-        unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
-        hpte_t hpte;
-
-        for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) {
-                unsigned long ea = (unsigned long)__va(pa);
-                unsigned long vsid = get_kernel_vsid(ea);
-                unsigned long va = (vsid << 28) | (pa & 0xfffffff);
-                unsigned long vpn = va >> PAGE_SHIFT;
-                unsigned long slot = HvCallHpt_findValid(&hpte, vpn);
-
-                /* Make non-kernel text non-executable */
-                if (!in_kernel_text(ea))
-                        mode_rw |= HW_NO_EXEC;
-
-                if (hpte.v & HPTE_V_VALID) {
-                        /* HPTE exists, so just bolt it */
-                        HvCallHpt_setSwBits(slot, 0x10, 0);
-                        /* And make sure the pp bits are correct */
-                        HvCallHpt_setPp(slot, PP_RWXX);
-                } else
-                        /* No HPTE exists, so create a new bolted one */
-                        iSeries_make_pte(va, phys_to_abs(pa), mode_rw);
-        }
-}
-
-/*
  * Document me.
  */
 static void __init iSeries_setup_arch(void)
 {
         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
 
-        /* Add an eye catcher and the systemcfg layout version number */
-        strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64");
-        systemcfg->version.major = SYSTEMCFG_MAJOR;
-        systemcfg->version.minor = SYSTEMCFG_MINOR;
+        if (get_paca()->lppaca.shared_proc) {
+                ppc_md.idle_loop = iseries_shared_idle;
+                printk(KERN_INFO "Using shared processor idle loop\n");
+        } else {
+                ppc_md.idle_loop = iseries_dedicated_idle;
+                printk(KERN_INFO "Using dedicated idle loop\n");
+        }
 
         /* Setup the Lp Event Queue */
         setup_hvlpevent_queue();
 
-        /* Compute processor frequency */
-        procFreqHz = ((1UL << 34) * 1000000) /
-                        xIoHriProcessorVpd[procIx].xProcFreq;
-        procFreqMhz = procFreqHz / 1000000;
-        procFreqMhzHundreths = (procFreqHz / 10000) - (procFreqMhz * 100);
-        ppc_proc_freq = procFreqHz;
-
-        /* Compute time base frequency */
-        tbFreqHz = ((1UL << 32) * 1000000) /
-                xIoHriProcessorVpd[procIx].xTimeBaseFreq;
-        tbFreqMhz = tbFreqHz / 1000000;
-        tbFreqMhzHundreths = (tbFreqHz / 10000) - (tbFreqMhz * 100);
-        ppc_tb_freq = tbFreqHz;
-
         printk("Max  logical processors = %d\n",
                         itVpdAreas.xSlicMaxLogicalProcs);
         printk("Max physical processors = %d\n",
                         itVpdAreas.xSlicMaxPhysicalProcs);
-        printk("Processor frequency = %lu.%02lu\n", procFreqMhz,
-                        procFreqMhzHundreths);
-        printk("Time base frequency = %lu.%02lu\n", tbFreqMhz,
-                        tbFreqMhzHundreths);
+
         systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
         printk("Processor version = %x\n", systemcfg->processor);
 }
 
-static void iSeries_get_cpuinfo(struct seq_file *m)
+static void iSeries_show_cpuinfo(struct seq_file *m)
 {
         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 }
@@ -768,49 +624,6 @@ static void iSeries_halt(void)
         mf_power_off();
 }
 
-/*
- * void __init iSeries_calibrate_decr()
- *
- * Description:
- *   This routine retrieves the internal processor frequency from the VPD,
- *   and sets up the kernel timer decrementer based on that value.
- *
- */
-static void __init iSeries_calibrate_decr(void)
-{
-        unsigned long   cyclesPerUsec;
-        struct div_result divres;
-
-        /* Compute decrementer (and TB) frequency in cycles/sec */
-        cyclesPerUsec = ppc_tb_freq / 1000000;
-
-        /*
-         * Set the amount to refresh the decrementer by.  This
-         * is the number of decrementer ticks it takes for
-         * 1/HZ seconds.
-         */
-        tb_ticks_per_jiffy = ppc_tb_freq / HZ;
-
-#if 0
-        /* TEST CODE FOR ADJTIME */
-        tb_ticks_per_jiffy += tb_ticks_per_jiffy / 5000;
-        /* END OF TEST CODE */
-#endif
-
-        /*
-         * tb_ticks_per_sec = freq; would give better accuracy
-         * but tb_ticks_per_sec = tb_ticks_per_jiffy*HZ; assures
-         * that jiffies (and xtime) will match the time returned
-         * by do_gettimeofday.
-         */
-        tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
-        tb_ticks_per_usec = cyclesPerUsec;
-        tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
-        div128_by_32(1024 * 1024, 0, tb_ticks_per_sec, &divres);
-        tb_to_xs = divres.result_low;
-        setup_default_decr();
-}
-
 static void __init iSeries_progress(char * st, unsigned short code)
 {
         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
@@ -878,7 +691,7 @@ static void yield_shared_processor(void)
         process_iSeries_events();
 }
 
-static int iseries_shared_idle(void)
+static void iseries_shared_idle(void)
 {
         while (1) {
                 while (!need_resched() && !hvlpevent_is_pending()) {
@@ -900,11 +713,9 @@ static int iseries_shared_idle(void)
 
                 schedule();
         }
-
-        return 0;
 }
 
-static int iseries_dedicated_idle(void)
+static void iseries_dedicated_idle(void)
 {
         long oldval;
 
@@ -934,44 +745,252 @@ static int iseries_dedicated_idle(void)
                 ppc64_runlatch_on();
                 schedule();
         }
-
-        return 0;
 }
 
 #ifndef CONFIG_PCI
 void __init iSeries_init_IRQ(void) { }
 #endif
 
-void __init iSeries_early_setup(void)
+static int __init iseries_probe(int platform)
 {
-        iSeries_fixup_klimit();
+        return PLATFORM_ISERIES_LPAR == platform;
+}
 
-        ppc_md.setup_arch = iSeries_setup_arch;
-        ppc_md.get_cpuinfo = iSeries_get_cpuinfo;
-        ppc_md.init_IRQ = iSeries_init_IRQ;
-        ppc_md.get_irq = iSeries_get_irq;
-        ppc_md.init_early = iSeries_init_early,
+struct machdep_calls __initdata iseries_md = {
+        .setup_arch     = iSeries_setup_arch,
+        .show_cpuinfo   = iSeries_show_cpuinfo,
+        .init_IRQ       = iSeries_init_IRQ,
+        .get_irq        = iSeries_get_irq,
+        .init_early     = iSeries_init_early,
+        .pcibios_fixup  = iSeries_pci_final_fixup,
+        .restart        = iSeries_restart,
+        .power_off      = iSeries_power_off,
+        .halt           = iSeries_halt,
+        .get_boot_time  = iSeries_get_boot_time,
+        .set_rtc_time   = iSeries_set_rtc_time,
+        .get_rtc_time   = iSeries_get_rtc_time,
+        .calibrate_decr = generic_calibrate_decr,
+        .progress       = iSeries_progress,
+        .probe          = iseries_probe,
+        /* XXX Implement enable_pmcs for iSeries */
+};
 
-        ppc_md.pcibios_fixup  = iSeries_pci_final_fixup;
+struct blob {
+        unsigned char data[PAGE_SIZE];
+        unsigned long next;
+};
 
-        ppc_md.restart = iSeries_restart;
-        ppc_md.power_off = iSeries_power_off;
-        ppc_md.halt = iSeries_halt;
+struct iseries_flat_dt {
+        struct boot_param_header header;
+        u64 reserve_map[2];
+        struct blob dt;
+        struct blob strings;
+};
 
-        ppc_md.get_boot_time = iSeries_get_boot_time;
-        ppc_md.set_rtc_time = iSeries_set_rtc_time;
-        ppc_md.get_rtc_time = iSeries_get_rtc_time;
-        ppc_md.calibrate_decr = iSeries_calibrate_decr;
-        ppc_md.progress = iSeries_progress;
+struct iseries_flat_dt iseries_dt;
 
-        /* XXX Implement enable_pmcs for iSeries */
+void dt_init(struct iseries_flat_dt *dt)
+{
+        dt->header.off_mem_rsvmap =
+                offsetof(struct iseries_flat_dt, reserve_map);
+        dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
+        dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
+        dt->header.totalsize = sizeof(struct iseries_flat_dt);
+        dt->header.dt_strings_size = sizeof(struct blob);
 
-        if (get_paca()->lppaca.shared_proc) {
-                ppc_md.idle_loop = iseries_shared_idle;
-                printk(KERN_INFO "Using shared processor idle loop\n");
-        } else {
-                ppc_md.idle_loop = iseries_dedicated_idle;
-                printk(KERN_INFO "Using dedicated idle loop\n");
+        /* There is no notion of hardware cpu id on iSeries */
+        dt->header.boot_cpuid_phys = smp_processor_id();
+
+        dt->dt.next = (unsigned long)&dt->dt.data;
+        dt->strings.next = (unsigned long)&dt->strings.data;
+
+        dt->header.magic = OF_DT_HEADER;
+        dt->header.version = 0x10;
+        dt->header.last_comp_version = 0x10;
+
+        dt->reserve_map[0] = 0;
+        dt->reserve_map[1] = 0;
+}
+
+void dt_check_blob(struct blob *b)
+{
+        if (b->next >= (unsigned long)&b->next) {
+                DBG("Ran out of space in flat device tree blob!\n");
+                BUG();
         }
 }
 
+void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
+{
+        *((u32*)dt->dt.next) = value;
+        dt->dt.next += sizeof(u32);
+
+        dt_check_blob(&dt->dt);
+}
+
+void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
+{
+        *((u64*)dt->dt.next) = value;
+        dt->dt.next += sizeof(u64);
+
+        dt_check_blob(&dt->dt);
+}
+
+unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
+{
+        unsigned long start = blob->next - (unsigned long)blob->data;
+
+        memcpy((char *)blob->next, data, len);
+        blob->next = _ALIGN(blob->next + len, 4);
+
+        dt_check_blob(blob);
+
+        return start;
+}
+
+void dt_start_node(struct iseries_flat_dt *dt, char *name)
+{
+        dt_push_u32(dt, OF_DT_BEGIN_NODE);
+        dt_push_bytes(&dt->dt, name, strlen(name) + 1);
+}
+
+#define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
+
+void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
+{
+        unsigned long offset;
+
+        dt_push_u32(dt, OF_DT_PROP);
+
+        /* Length of the data */
+        dt_push_u32(dt, len);
+
+        /* Put the property name in the string blob. */
+        offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
+
+        /* The offset of the properties name in the string blob. */
+        dt_push_u32(dt, (u32)offset);
+
+        /* The actual data. */
+        dt_push_bytes(&dt->dt, data, len);
+}
+
+void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
+{
+        dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
+}
+
+void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
+{
+        dt_prop(dt, name, (char *)&data, sizeof(u32));
+}
+
+void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
+{
+        dt_prop(dt, name, (char *)&data, sizeof(u64));
+}
+
+void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
+{
+        dt_prop(dt, name, (char *)data, sizeof(u64) * n);
+}
+
+void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
+{
+        dt_prop(dt, name, NULL, 0);
+}
+
+void dt_cpus(struct iseries_flat_dt *dt)
+{
+        unsigned char buf[32];
+        unsigned char *p;
+        unsigned int i, index;
+        struct IoHriProcessorVpd *d;
+
+        /* yuck */
+        snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
+        p = strchr(buf, ' ');
+        if (!p) p = buf + strlen(buf);
+
+        dt_start_node(dt, "cpus");
+        dt_prop_u32(dt, "#address-cells", 1);
+        dt_prop_u32(dt, "#size-cells", 0);
+
+        for (i = 0; i < NR_CPUS; i++) {
+                if (paca[i].lppaca.dyn_proc_status >= 2)
+                        continue;
+
+                snprintf(p, 32 - (p - buf), "@%d", i);
+                dt_start_node(dt, buf);
+
+                dt_prop_str(dt, "device_type", "cpu");
+
+                index = paca[i].lppaca.dyn_hv_phys_proc_index;
+                d = &xIoHriProcessorVpd[index];
+
+                dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
+                dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
+
+                dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
+                dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
+
+                /* magic conversions to Hz copied from old code */
+                dt_prop_u32(dt, "clock-frequency",
+                        ((1UL << 34) * 1000000) / d->xProcFreq);
+                dt_prop_u32(dt, "timebase-frequency",
+                        ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
+
+                dt_prop_u32(dt, "reg", i);
+
+                dt_end_node(dt);
+        }
+
+        dt_end_node(dt);
+}
+
+void build_flat_dt(struct iseries_flat_dt *dt)
+{
+        u64 tmp[2];
+
+        dt_init(dt);
+
+        dt_start_node(dt, "");
+
+        dt_prop_u32(dt, "#address-cells", 2);
+        dt_prop_u32(dt, "#size-cells", 2);
+
+        /* /memory */
+        dt_start_node(dt, "memory@0");
+        dt_prop_str(dt, "name", "memory");
+        dt_prop_str(dt, "device_type", "memory");
+        tmp[0] = 0;
+        tmp[1] = systemcfg->physicalMemorySize;
+        dt_prop_u64_list(dt, "reg", tmp, 2);
+        dt_end_node(dt);
+
+        /* /chosen */
+        dt_start_node(dt, "chosen");
+        dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
+        dt_end_node(dt);
+
+        dt_cpus(dt);
+
+        dt_end_node(dt);
+
+        dt_push_u32(dt, OF_DT_END);
+}
+
+void * __init iSeries_early_setup(void)
+{
+        iSeries_fixup_klimit();
+
+        /*
+         * Initialize the table which translate Linux physical addresses to
+         * AS/400 absolute addresses
+         */
+        build_iSeries_Memory_Map();
+
+        build_flat_dt(&iseries_dt);
+
+        return (void *) __pa(&iseries_dt);
+}
diff --git a/arch/ppc64/kernel/iSeries_setup.h b/arch/powerpc/platforms/iseries/setup.h
index c6eb29a245ac..5213044ec411 100644
--- a/arch/ppc64/kernel/iSeries_setup.h
+++ b/arch/powerpc/platforms/iseries/setup.h
@@ -2,8 +2,6 @@
  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  *
- *    Module name: as400_setup.h
- *
  *    Description:
  *      Architecture- / platform-specific boot-time initialization code for
  *      the IBM AS/400 LPAR. Adapted from original code by Grant Erickson and
@@ -19,7 +17,7 @@
 #ifndef __ISERIES_SETUP_H__
 #define __ISERIES_SETUP_H__
 
-extern void iSeries_get_boot_time(struct rtc_time *tm);
+extern unsigned long iSeries_get_boot_time(void);
 extern int iSeries_set_rtc_time(struct rtc_time *tm);
 extern void iSeries_get_rtc_time(struct rtc_time *tm);
 
diff --git a/arch/ppc64/kernel/iSeries_smp.c b/arch/powerpc/platforms/iseries/smp.c
index f74386e31638..f720916682f6 100644
--- a/arch/ppc64/kernel/iSeries_smp.c
+++ b/arch/powerpc/platforms/iseries/smp.c
@@ -47,17 +47,17 @@
 
 static unsigned long iSeries_smp_message[NR_CPUS];
 
-void iSeries_smp_message_recv( struct pt_regs * regs )
+void iSeries_smp_message_recv(struct pt_regs *regs)
 {
         int cpu = smp_processor_id();
         int msg;
 
-        if ( num_online_cpus() < 2 )
+        if (num_online_cpus() < 2)
                 return;
 
-        for ( msg = 0; msg < 4; ++msg )
-                if ( test_and_clear_bit( msg, &iSeries_smp_message[cpu] ) )
-                        smp_message_recv( msg, regs );
+        for (msg = 0; msg < 4; msg++)
+                if (test_and_clear_bit(msg, &iSeries_smp_message[cpu]))
+                        smp_message_recv(msg, regs);
 }
 
 static inline void smp_iSeries_do_message(int cpu, int msg)
@@ -74,48 +74,22 @@ static void smp_iSeries_message_pass(int target, int msg)
                 smp_iSeries_do_message(target, msg);
         else {
                 for_each_online_cpu(i) {
-                        if (target == MSG_ALL_BUT_SELF
-                            && i == smp_processor_id())
+                        if ((target == MSG_ALL_BUT_SELF) &&
+                                        (i == smp_processor_id()))
                                 continue;
                         smp_iSeries_do_message(i, msg);
                 }
         }
 }
 
-static int smp_iSeries_numProcs(void)
-{
-        unsigned np, i;
-
-        np = 0;
-        for (i=0; i < NR_CPUS; ++i) {
-                if (paca[i].lppaca.dyn_proc_status < 2) {
-                        cpu_set(i, cpu_possible_map);
-                        cpu_set(i, cpu_present_map);
-                        cpu_set(i, cpu_sibling_map[i]);
-                        ++np;
-                }
-        }
-        return np;
-}
-
 static int smp_iSeries_probe(void)
 {
-        unsigned i;
-        unsigned np = 0;
-
-        for (i=0; i < NR_CPUS; ++i) {
-                if (paca[i].lppaca.dyn_proc_status < 2) {
-                        /*paca[i].active = 1;*/
-                        ++np;
-                }
-        }
-
-        return np;
+        return cpus_weight(cpu_possible_map);
 }
 
 static void smp_iSeries_kick_cpu(int nr)
 {
-        BUG_ON(nr < 0 || nr >= NR_CPUS);
+        BUG_ON((nr < 0) || (nr >= NR_CPUS));
 
         /* Verify that our partition has a processor nr */
         if (paca[nr].lppaca.dyn_proc_status >= 2)
@@ -144,6 +118,4 @@ static struct smp_ops_t iSeries_smp_ops = {
 void __init smp_init_iSeries(void)
 {
         smp_ops = &iSeries_smp_ops;
-        systemcfg->processorCount       = smp_iSeries_numProcs();
 }
-
diff --git a/arch/powerpc/platforms/iseries/spcomm_area.h b/arch/powerpc/platforms/iseries/spcomm_area.h
new file mode 100644
index 000000000000..6e3b685115c9
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/spcomm_area.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#ifndef _ISERIES_SPCOMM_AREA_H
+#define _ISERIES_SPCOMM_AREA_H
+
+
+struct SpCommArea {
+        u32     xDesc;                  // Descriptor (only in new formats)     000-003
+        u8      xFormat;                // Format (only in new formats)         004-004
+        u8      xRsvd1[11];             // Reserved                             005-00F
+        u64     xRawTbAtIplStart;       // Raw HW TB value when IPL is started  010-017
+        u64     xRawTodAtIplStart;      // Raw HW TOD value when IPL is started 018-01F
+        u64     xBcdTimeAtIplStart;     // BCD time when IPL is started         020-027
+        u64     xBcdTimeAtOsStart;      // BCD time when OS passed control      028-02F
+        u8      xRsvd2[80];             // Reserved                             030-07F
+};
+
+extern struct SpCommArea xSpCommArea;
+
+#endif /* _ISERIES_SPCOMM_AREA_H */
diff --git a/arch/ppc64/kernel/iSeries_vio.c b/arch/powerpc/platforms/iseries/vio.c
index 6b754b0c8344..c0f7d2e9153f 100644
--- a/arch/ppc64/kernel/iSeries_vio.c
+++ b/arch/powerpc/platforms/iseries/vio.c
@@ -14,6 +14,7 @@
 
 #include <asm/vio.h>
 #include <asm/iommu.h>
+#include <asm/tce.h>
 #include <asm/abs_addr.h>
 #include <asm/page.h>
 #include <asm/iSeries/vio.h>
diff --git a/arch/ppc64/kernel/viopath.c b/arch/powerpc/platforms/iseries/viopath.c
index 2a6c4f01c45e..c0c767bd37f1 100644
--- a/arch/ppc64/kernel/viopath.c
+++ b/arch/powerpc/platforms/iseries/viopath.c
@@ -1,5 +1,4 @@
 /* -*- linux-c -*-
- *  arch/ppc64/kernel/viopath.c
  *
  *  iSeries Virtual I/O Message Path code
  *
@@ -7,7 +6,7 @@
  *           Ryan Arnold <ryanarn@us.ibm.com>
  *           Colin Devilbiss <devilbis@us.ibm.com>
  *
- * (C) Copyright 2000-2003 IBM Corporation
+ * (C) Copyright 2000-2005 IBM Corporation
  *
  * This code is used by the iSeries virtual disk, cd,
  * tape, and console to communicate with OS/400 in another
diff --git a/arch/powerpc/platforms/iseries/vpd_areas.h b/arch/powerpc/platforms/iseries/vpd_areas.h
new file mode 100644
index 000000000000..601e6dd860ed
--- /dev/null
+++ b/arch/powerpc/platforms/iseries/vpd_areas.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2001  Mike Corrigan IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ISERIES_VPD_AREAS_H
+#define _ISERIES_VPD_AREAS_H
+
+/*
+ * This file defines the address and length of all of the VPD area passed to
+ * the OS from PLIC (most of which start from the SP).
+ */
+
+#include <asm/types.h>
+
+/* VPD Entry index is carved in stone - cannot be changed (easily). */
+#define ItVpdCecVpd                             0
+#define ItVpdDynamicSpace                       1
+#define ItVpdExtVpd                             2
+#define ItVpdExtVpdOnPanel                      3
+#define ItVpdFirstPaca                          4
+#define ItVpdIoVpd                              5
+#define ItVpdIplParms                           6
+#define ItVpdMsVpd                              7
+#define ItVpdPanelVpd                           8
+#define ItVpdLpNaca                             9
+#define ItVpdBackplaneAndMaybeClockCardVpd      10
+#define ItVpdRecoveryLogBuffer                  11
+#define ItVpdSpCommArea                         12
+#define ItVpdSpLogBuffer                        13
+#define ItVpdSpLogBufferSave                    14
+#define ItVpdSpCardVpd                          15
+#define ItVpdFirstProcVpd                       16
+#define ItVpdApModelVpd                         17
+#define ItVpdClockCardVpd                       18
+#define ItVpdBusExtCardVpd                      19
+#define ItVpdProcCapacityVpd                    20
+#define ItVpdInteractiveCapacityVpd             21
+#define ItVpdFirstSlotLabel                     22
+#define ItVpdFirstLpQueue                       23
+#define ItVpdFirstL3CacheVpd                    24
+#define ItVpdFirstProcFruVpd                    25
+
+#define ItVpdMaxEntries                         26
+
+#define ItDmaMaxEntries                         10
+
+#define ItVpdAreasMaxSlotLabels                 192
+
+
+struct ItVpdAreas {
+        u32     xSlicDesc;              // Descriptor                   000-003
+        u16     xSlicSize;              // Size of this control block   004-005
+        u16     xPlicAdjustVpdLens:1;   // Flag to indicate new interface006-007
+        u16     xRsvd1:15;              // Reserved bits                ...
+        u16     xSlicVpdEntries;        // Number of VPD entries        008-009
+        u16     xSlicDmaEntries;        // Number of DMA entries        00A-00B
+        u16     xSlicMaxLogicalProcs;   // Maximum logical processors   00C-00D
+        u16     xSlicMaxPhysicalProcs;  // Maximum physical processors  00E-00F
+        u16     xSlicDmaToksOffset;     // Offset into this of array    010-011
+        u16     xSlicVpdAdrsOffset;     // Offset into this of array    012-013
+        u16     xSlicDmaLensOffset;     // Offset into this of array    014-015
+        u16     xSlicVpdLensOffset;     // Offset into this of array    016-017
+        u16     xSlicMaxSlotLabels;     // Maximum number of slot labels018-019
+        u16     xSlicMaxLpQueues;       // Maximum number of LP Queues  01A-01B
+        u8      xRsvd2[4];              // Reserved                     01C-01F
+        u64     xRsvd3[12];             // Reserved                     020-07F
+        u32     xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths   080-0A7
+        u32     xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens    0A8-0CF
+        u32     xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths   0D0-12F
+        void    *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers  130-1EF
+};
+
+extern struct ItVpdAreas        itVpdAreas;
+
+#endif /* _ISERIES_VPD_AREAS_H */
diff --git a/arch/ppc64/kernel/iSeries_VpdInfo.c b/arch/powerpc/platforms/iseries/vpdinfo.c
index 5d921792571f..9c318849dee7 100644
--- a/arch/ppc64/kernel/iSeries_VpdInfo.c
+++ b/arch/powerpc/platforms/iseries/vpdinfo.c
@@ -1,6 +1,4 @@
 /*
- * File iSeries_vpdInfo.c created by Allan Trautman on Fri Feb  2 2001.
- *
  * This code gets the card location of the hardware
  * Copyright (C) 2001  <Allan H Trautman> <IBM Corp>
  * Copyright (C) 2005  Stephen Rothwel, IBM Corp
@@ -29,12 +27,15 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/pci.h>
+
 #include <asm/types.h>
 #include <asm/resource.h>
-
-#include <asm/iSeries/HvCallPci.h>
+#include <asm/abs_addr.h>
+#include <asm/pci-bridge.h>
 #include <asm/iSeries/HvTypes.h>
-#include <asm/iSeries/iSeries_pci.h>
+
+#include "pci.h"
+#include "call_pci.h"
 
 /*
  * Size of Bus VPD data
@@ -214,7 +215,7 @@ static void __init iSeries_Get_Location_Code(u16 bus, HvAgentId agent,
                 printk("PCI: Bus VPD Buffer allocation failure.\n");
                 return;
         }
-        BusVpdLen = HvCallPci_getBusVpd(bus, ISERIES_HV_ADDR(BusVpdPtr),
+        BusVpdLen = HvCallPci_getBusVpd(bus, iseries_hv_addr(BusVpdPtr),
                                         BUS_VPDSIZE);
         if (BusVpdLen == 0) {
                 printk("PCI: Bus VPD Buffer zero length.\n");
@@ -242,7 +243,8 @@ out_free:
  */
 void __init iSeries_Device_Information(struct pci_dev *PciDev, int count)
 {
-        struct iSeries_Device_Node *DevNode = PciDev->sysdata;
+        struct device_node *DevNode = PciDev->sysdata;
+        struct pci_dn *pdn;
         u16 bus;
         u8 frame;
         char card[4];
@@ -255,8 +257,9 @@ void __init iSeries_Device_Information(struct pci_dev *PciDev, int count)
                 return;
         }
 
-        bus = ISERIES_BUS(DevNode);
-        subbus = ISERIES_SUBBUS(DevNode);
+        pdn = PCI_DN(DevNode);
+        bus = pdn->busno;
+        subbus = pdn->bussubno;
         agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
                         ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
         iSeries_Get_Location_Code(bus, agent, &frame, card);
diff --git a/arch/powerpc/platforms/maple/Makefile b/arch/powerpc/platforms/maple/Makefile
new file mode 100644
index 000000000000..1be1a993c5f5
--- /dev/null
+++ b/arch/powerpc/platforms/maple/Makefile
@@ -0,0 +1 @@
+obj-y   += setup.o pci.o time.o
diff --git a/arch/powerpc/platforms/maple/maple.h b/arch/powerpc/platforms/maple/maple.h
new file mode 100644
index 000000000000..0657c579b840
--- /dev/null
+++ b/arch/powerpc/platforms/maple/maple.h
@@ -0,0 +1,12 @@
+/*
+ * Declarations for maple-specific code.
+ *
+ * Maple is the name of a PPC970 evaluation board.
+ */
+extern int maple_set_rtc_time(struct rtc_time *tm);
+extern void maple_get_rtc_time(struct rtc_time *tm);
+extern unsigned long maple_get_boot_time(void);
+extern void maple_calibrate_decr(void);
+extern void maple_pci_init(void);
+extern void maple_pcibios_fixup(void);
+extern int maple_pci_get_legacy_ide_irq(struct pci_dev *dev, int channel);
diff --git a/arch/ppc64/kernel/maple_pci.c b/arch/powerpc/platforms/maple/pci.c
index 1d297e0edfc0..340c21caeae2 100644
--- a/arch/ppc64/kernel/maple_pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -23,8 +23,9 @@
 #include <asm/pci-bridge.h>
 #include <asm/machdep.h>
 #include <asm/iommu.h>
+#include <asm/ppc-pci.h>
 
-#include "pci.h"
+#include "maple.h"
 
 #ifdef DEBUG
 #define DBG(x...) printk(x)
@@ -276,7 +277,7 @@ static void __init setup_u3_agp(struct pci_controller* hose)
 {
         /* On G5, we move AGP up to high bus number so we don't need
          * to reassign bus numbers for HT. If we ever have P2P bridges
-         * on AGP, we'll have to move pci_assign_all_busses to the
+         * on AGP, we'll have to move pci_assign_all_buses to the
          * pci_controller structure so we enable it for AGP and not for
          * HT childs.
          * We hard code the address because of the different size of
@@ -360,7 +361,7 @@ static int __init add_bridge(struct device_node *dev)
 
         /* Interpret the "ranges" property */
         /* This also maps the I/O region and sets isa_io/mem_base */
-        pci_process_bridge_OF_ranges(hose, dev);
+        pci_process_bridge_OF_ranges(hose, dev, primary);
         pci_setup_phb_io(hose, primary);
 
         /* Fixup "bus-range" OF property */
diff --git a/arch/ppc64/kernel/maple_setup.c b/arch/powerpc/platforms/maple/setup.c
index fc0567498a3a..7ece8983a105 100644
--- a/arch/ppc64/kernel/maple_setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -1,5 +1,5 @@
 /*
- *  arch/ppc64/kernel/maple_setup.c
+ *  Maple (970 eval board) setup code
  *
  *  (c) Copyright 2004 Benjamin Herrenschmidt (benh@kernel.crashing.org),
  *                     IBM Corp. 
@@ -59,8 +59,10 @@
 #include <asm/time.h>
 #include <asm/of_device.h>
 #include <asm/lmb.h>
+#include <asm/mpic.h>
+#include <asm/udbg.h>
 
-#include "mpic.h"
+#include "maple.h"
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -68,13 +70,6 @@
 #define DBG(fmt...)
 #endif
 
-extern int maple_set_rtc_time(struct rtc_time *tm);
-extern void maple_get_rtc_time(struct rtc_time *tm);
-extern void maple_get_boot_time(struct rtc_time *tm);
-extern void maple_calibrate_decr(void);
-extern void maple_pci_init(void);
-extern void maple_pcibios_fixup(void);
-extern int maple_pci_get_legacy_ide_irq(struct pci_dev *dev, int channel);
 extern void generic_find_legacy_serial_ports(u64 *physport,
                 unsigned int *default_speed);
 
diff --git a/arch/ppc64/kernel/maple_time.c b/arch/powerpc/platforms/maple/time.c
index d65210abcd03..40fc07a8e606 100644
--- a/arch/ppc64/kernel/maple_time.c
+++ b/arch/powerpc/platforms/maple/time.c
@@ -36,6 +36,8 @@
 #include <asm/machdep.h>
 #include <asm/time.h>
 
+#include "maple.h"
+
 #ifdef DEBUG
 #define DBG(x...) printk(x)
 #else
@@ -156,8 +158,9 @@ int maple_set_rtc_time(struct rtc_time *tm)
         return 0;
 }
 
-void __init maple_get_boot_time(struct rtc_time *tm)
+unsigned long __init maple_get_boot_time(void)
 {
+        struct rtc_time tm;
         struct device_node *rtcs;
 
         rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
@@ -170,6 +173,8 @@ void __init maple_get_boot_time(struct rtc_time *tm)
                        "legacy address (0x%x)\n", maple_rtc_addr);
         }
         
-        maple_get_rtc_time(tm);
+        maple_get_rtc_time(&tm);
+        return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
+                      tm.tm_hour, tm.tm_min, tm.tm_sec);
 }
 
diff --git a/arch/powerpc/platforms/powermac/Makefile b/arch/powerpc/platforms/powermac/Makefile
new file mode 100644
index 000000000000..4369676f1d54
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/Makefile
@@ -0,0 +1,8 @@
+obj-y                           += pic.o setup.o time.o feature.o pci.o \
+                                   sleep.o low_i2c.o cache.o
+obj-$(CONFIG_PMAC_BACKLIGHT)    += backlight.o
+obj-$(CONFIG_CPU_FREQ_PMAC)     += cpufreq.o
+obj-$(CONFIG_NVRAM)             += nvram.o
+# ppc64 pmac doesn't define CONFIG_NVRAM but needs nvram stuff
+obj-$(CONFIG_PPC64)             += nvram.o
+obj-$(CONFIG_SMP)               += smp.o
diff --git a/arch/powerpc/platforms/powermac/backlight.c b/arch/powerpc/platforms/powermac/backlight.c
new file mode 100644
index 000000000000..8be2f7d071f0
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/backlight.c
@@ -0,0 +1,202 @@
+/*
+ * Miscellaneous procedures for dealing with the PowerMac hardware.
+ * Contains support for the backlight.
+ *
+ *   Copyright (C) 2000 Benjamin Herrenschmidt
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/stddef.h>
+#include <linux/reboot.h>
+#include <linux/nvram.h>
+#include <linux/console.h>
+#include <asm/sections.h>
+#include <asm/ptrace.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/nvram.h>
+#include <asm/backlight.h>
+
+#include <linux/adb.h>
+#include <linux/pmu.h>
+
+static struct backlight_controller *backlighter;
+static void* backlighter_data;
+static int backlight_autosave;
+static int backlight_level = BACKLIGHT_MAX;
+static int backlight_enabled = 1;
+static int backlight_req_level = -1;
+static int backlight_req_enable = -1;
+
+static void backlight_callback(void *);
+static DECLARE_WORK(backlight_work, backlight_callback, NULL);
+
+void register_backlight_controller(struct backlight_controller *ctrler,
+                                          void *data, char *type)
+{
+        struct device_node* bk_node;
+        char *prop;
+        int valid = 0;
+
+        /* There's already a matching controller, bail out */
+        if (backlighter != NULL)
+                return;
+
+        bk_node = find_devices("backlight");
+
+#ifdef CONFIG_ADB_PMU
+        /* Special case for the old PowerBook since I can't test on it */
+        backlight_autosave = machine_is_compatible("AAPL,3400/2400")
+                || machine_is_compatible("AAPL,3500");
+        if ((backlight_autosave
+             || machine_is_compatible("AAPL,PowerBook1998")
+             || machine_is_compatible("PowerBook1,1"))
+            && !strcmp(type, "pmu"))
+                valid = 1;
+#endif
+        if (bk_node) {
+                prop = get_property(bk_node, "backlight-control", NULL);
+                if (prop && !strncmp(prop, type, strlen(type)))
+                        valid = 1;
+        }
+        if (!valid)
+                return;
+        backlighter = ctrler;
+        backlighter_data = data;
+
+        if (bk_node && !backlight_autosave)
+                prop = get_property(bk_node, "bklt", NULL);
+        else
+                prop = NULL;
+        if (prop) {
+                backlight_level = ((*prop)+1) >> 1;
+                if (backlight_level > BACKLIGHT_MAX)
+                        backlight_level = BACKLIGHT_MAX;
+        }
+
+#ifdef CONFIG_ADB_PMU
+        if (backlight_autosave) {
+                struct adb_request req;
+                pmu_request(&req, NULL, 2, 0xd9, 0);
+                while (!req.complete)
+                        pmu_poll();
+                backlight_level = req.reply[0] >> 4;
+        }
+#endif
+        acquire_console_sem();
+        if (!backlighter->set_enable(1, backlight_level, data))
+                backlight_enabled = 1;
+        release_console_sem();
+
+        printk(KERN_INFO "Registered \"%s\" backlight controller,"
+               "level: %d/15\n", type, backlight_level);
+}
+EXPORT_SYMBOL(register_backlight_controller);
+
+void unregister_backlight_controller(struct backlight_controller
+                                            *ctrler, void *data)
+{
+        /* We keep the current backlight level (for now) */
+        if (ctrler == backlighter && data == backlighter_data)
+                backlighter = NULL;
+}
+EXPORT_SYMBOL(unregister_backlight_controller);
+
+static int __set_backlight_enable(int enable)
+{
+        int rc;
+
+        if (!backlighter)
+                return -ENODEV;
+        acquire_console_sem();
+        rc = backlighter->set_enable(enable, backlight_level,
+                                     backlighter_data);
+        if (!rc)
+                backlight_enabled = enable;
+        release_console_sem();
+        return rc;
+}
+int set_backlight_enable(int enable)
+{
+        if (!backlighter)
+                return -ENODEV;
+        backlight_req_enable = enable;
+        schedule_work(&backlight_work);
+        return 0;
+}
+
+EXPORT_SYMBOL(set_backlight_enable);
+
+int get_backlight_enable(void)
+{
+        if (!backlighter)
+                return -ENODEV;
+        return backlight_enabled;
+}
+EXPORT_SYMBOL(get_backlight_enable);
+
+static int __set_backlight_level(int level)
+{
+        int rc = 0;
+
+        if (!backlighter)
+                return -ENODEV;
+        if (level < BACKLIGHT_MIN)
+                level = BACKLIGHT_OFF;
+        if (level > BACKLIGHT_MAX)
+                level = BACKLIGHT_MAX;
+        acquire_console_sem();
+        if (backlight_enabled)
+                rc = backlighter->set_level(level, backlighter_data);
+        if (!rc)
+                backlight_level = level;
+        release_console_sem();
+        if (!rc && !backlight_autosave) {
+                level <<=1;
+                if (level & 0x10)
+                        level |= 0x01;
+                // -- todo: save to property "bklt"
+        }
+        return rc;
+}
+int set_backlight_level(int level)
+{
+        if (!backlighter)
+                return -ENODEV;
+        backlight_req_level = level;
+        schedule_work(&backlight_work);
+        return 0;
+}
+
+EXPORT_SYMBOL(set_backlight_level);
+
+int get_backlight_level(void)
+{
+        if (!backlighter)
+                return -ENODEV;
+        return backlight_level;
+}
+EXPORT_SYMBOL(get_backlight_level);
+
+static void backlight_callback(void *dummy)
+{
+        int level, enable;
+
+        do {
+                level = backlight_req_level;
+                enable = backlight_req_enable;
+                mb();
+
+                if (level >= 0)
+                        __set_backlight_level(level);
+                if (enable >= 0)
+                        __set_backlight_enable(enable);
+        } while(cmpxchg(&backlight_req_level, level, -1) != level ||
+                cmpxchg(&backlight_req_enable, enable, -1) != enable);
+}
diff --git a/arch/powerpc/platforms/powermac/cache.S b/arch/powerpc/platforms/powermac/cache.S
new file mode 100644
index 000000000000..fb977de6b704
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/cache.S
@@ -0,0 +1,359 @@
+/*
+ * This file contains low-level cache management functions
+ * used for sleep and CPU speed changes on Apple machines.
+ * (In fact the only thing that is Apple-specific is that we assume
+ * that we can read from ROM at physical address 0xfff00000.)
+ *
+ *    Copyright (C) 2004 Paul Mackerras (paulus@samba.org) and
+ *                       Benjamin Herrenschmidt (benh@kernel.crashing.org)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/ppc_asm.h>
+#include <asm/cputable.h>
+
+/*
+ * Flush and disable all data caches (dL1, L2, L3). This is used
+ * when going to sleep, when doing a PMU based cpufreq transition,
+ * or when "offlining" a CPU on SMP machines. This code is over
+ * paranoid, but I've had enough issues with various CPU revs and
+ * bugs that I decided it was worth beeing over cautious
+ */
+
+_GLOBAL(flush_disable_caches)
+#ifndef CONFIG_6xx
+        blr
+#else
+BEGIN_FTR_SECTION
+        b       flush_disable_745x
+END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
+BEGIN_FTR_SECTION
+        b       flush_disable_75x
+END_FTR_SECTION_IFSET(CPU_FTR_L2CR)
+        b       __flush_disable_L1
+
+/* This is the code for G3 and 74[01]0 */
+flush_disable_75x:
+        mflr    r10
+
+        /* Turn off EE and DR in MSR */
+        mfmsr   r11
+        rlwinm  r0,r11,0,~MSR_EE
+        rlwinm  r0,r0,0,~MSR_DR
+        sync
+        mtmsr   r0
+        isync
+
+        /* Stop DST streams */
+BEGIN_FTR_SECTION
+        DSSALL
+        sync
+END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+
+        /* Stop DPM */
+        mfspr   r8,SPRN_HID0            /* Save SPRN_HID0 in r8 */
+        rlwinm  r4,r8,0,12,10           /* Turn off HID0[DPM] */
+        sync
+        mtspr   SPRN_HID0,r4            /* Disable DPM */
+        sync
+
+        /* Disp-flush L1. We have a weird problem here that I never
+         * totally figured out. On 750FX, using the ROM for the flush
+         * results in a non-working flush. We use that workaround for
+         * now until I finally understand what's going on. --BenH
+         */
+
+        /* ROM base by default */
+        lis     r4,0xfff0
+        mfpvr   r3
+        srwi    r3,r3,16
+        cmplwi  cr0,r3,0x7000
+        bne+    1f
+        /* RAM base on 750FX */
+        li      r4,0
+1:      li      r4,0x4000
+        mtctr   r4
+1:      lwz     r0,0(r4)
+        addi    r4,r4,32
+        bdnz    1b
+        sync
+        isync
+
+        /* Disable / invalidate / enable L1 data */
+        mfspr   r3,SPRN_HID0
+        rlwinm  r3,r3,0,~(HID0_DCE | HID0_ICE)
+        mtspr   SPRN_HID0,r3
+        sync
+        isync
+        ori     r3,r3,(HID0_DCE|HID0_DCI|HID0_ICE|HID0_ICFI)
+        sync
+        isync
+        mtspr   SPRN_HID0,r3
+        xori    r3,r3,(HID0_DCI|HID0_ICFI)
+        mtspr   SPRN_HID0,r3
+        sync
+
+        /* Get the current enable bit of the L2CR into r4 */
+        mfspr   r5,SPRN_L2CR
+        /* Set to data-only (pre-745x bit) */
+        oris    r3,r5,L2CR_L2DO@h
+        b       2f
+        /* When disabling L2, code must be in L1 */
+        .balign 32
+1:      mtspr   SPRN_L2CR,r3
+3:      sync
+        isync
+        b       1f
+2:      b       3f
+3:      sync
+        isync
+        b       1b
+1:      /* disp-flush L2. The interesting thing here is that the L2 can be
+         * up to 2Mb ... so using the ROM, we'll end up wrapping back to memory
+         * but that is probbaly fine. We disp-flush over 4Mb to be safe
+         */
+        lis     r4,2
+        mtctr   r4
+        lis     r4,0xfff0
+1:      lwz     r0,0(r4)
+        addi    r4,r4,32
+        bdnz    1b
+        sync
+        isync
+        lis     r4,2
+        mtctr   r4
+        lis     r4,0xfff0
+1:      dcbf    0,r4
+        addi    r4,r4,32
+        bdnz    1b
+        sync
+        isync
+
+        /* now disable L2 */
+        rlwinm  r5,r5,0,~L2CR_L2E
+        b       2f
+        /* When disabling L2, code must be in L1 */
+        .balign 32
+1:      mtspr   SPRN_L2CR,r5
+3:      sync
+        isync
+        b       1f
+2:      b       3f
+3:      sync
+        isync
+        b       1b
+1:      sync
+        isync
+        /* Invalidate L2. This is pre-745x, we clear the L2I bit ourselves */
+        oris    r4,r5,L2CR_L2I@h
+        mtspr   SPRN_L2CR,r4
+        sync
+        isync
+
+        /* Wait for the invalidation to complete */
+1:      mfspr   r3,SPRN_L2CR
+        rlwinm. r0,r3,0,31,31
+        bne     1b
+
+        /* Clear L2I */
+        xoris   r4,r4,L2CR_L2I@h
+        sync
+        mtspr   SPRN_L2CR,r4
+        sync
+
+        /* now disable the L1 data cache */
+        mfspr   r0,SPRN_HID0
+        rlwinm  r0,r0,0,~(HID0_DCE|HID0_ICE)
+        mtspr   SPRN_HID0,r0
+        sync
+        isync
+
+        /* Restore HID0[DPM] to whatever it was before */
+        sync
+        mfspr   r0,SPRN_HID0
+        rlwimi  r0,r8,0,11,11           /* Turn back HID0[DPM] */
+        mtspr   SPRN_HID0,r0
+        sync
+
+        /* restore DR and EE */
+        sync
+        mtmsr   r11
+        isync
+
+        mtlr    r10
+        blr
+
+/* This code is for 745x processors */
+flush_disable_745x:
+        /* Turn off EE and DR in MSR */
+        mfmsr   r11
+        rlwinm  r0,r11,0,~MSR_EE
+        rlwinm  r0,r0,0,~MSR_DR
+        sync
+        mtmsr   r0
+        isync
+
+        /* Stop prefetch streams */
+        DSSALL
+        sync
+
+        /* Disable L2 prefetching */
+        mfspr   r0,SPRN_MSSCR0
+        rlwinm  r0,r0,0,0,29
+        mtspr   SPRN_MSSCR0,r0
+        sync
+        isync
+        lis     r4,0
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+        dcbf    0,r4
+
+        /* Due to a bug with the HW flush on some CPU revs, we occasionally
+         * experience data corruption. I'm adding a displacement flush along
+         * with a dcbf loop over a few Mb to "help". The problem isn't totally
+         * fixed by this in theory, but at least, in practice, I couldn't reproduce
+         * it even with a big hammer...
+         */
+
+        lis     r4,0x0002
+        mtctr   r4
+        li      r4,0
+1:
+        lwz     r0,0(r4)
+        addi    r4,r4,32                /* Go to start of next cache line */
+        bdnz    1b
+        isync
+
+        /* Now, flush the first 4MB of memory */
+        lis     r4,0x0002
+        mtctr   r4
+        li      r4,0
+        sync
+1:
+        dcbf    0,r4
+        addi    r4,r4,32                /* Go to start of next cache line */
+        bdnz    1b
+
+        /* Flush and disable the L1 data cache */
+        mfspr   r6,SPRN_LDSTCR
+        lis     r3,0xfff0       /* read from ROM for displacement flush */
+        li      r4,0xfe         /* start with only way 0 unlocked */
+        li      r5,128          /* 128 lines in each way */
+1:      mtctr   r5
+        rlwimi  r6,r4,0,24,31
+        mtspr   SPRN_LDSTCR,r6
+        sync
+        isync
+2:      lwz     r0,0(r3)        /* touch each cache line */
+        addi    r3,r3,32
+        bdnz    2b
+        rlwinm  r4,r4,1,24,30   /* move on to the next way */
+        ori     r4,r4,1
+        cmpwi   r4,0xff         /* all done? */
+        bne     1b
+        /* now unlock the L1 data cache */
+        li      r4,0
+        rlwimi  r6,r4,0,24,31
+        sync
+        mtspr   SPRN_LDSTCR,r6
+        sync
+        isync
+
+        /* Flush the L2 cache using the hardware assist */
+        mfspr   r3,SPRN_L2CR
+        cmpwi   r3,0            /* check if it is enabled first */
+        bge     4f
+        oris    r0,r3,(L2CR_L2IO_745x|L2CR_L2DO_745x)@h
+        b       2f
+        /* When disabling/locking L2, code must be in L1 */
+        .balign 32
+1:      mtspr   SPRN_L2CR,r0    /* lock the L2 cache */
+3:      sync
+        isync
+        b       1f
+2:      b       3f
+3:      sync
+        isync
+        b       1b
+1:      sync
+        isync
+        ori     r0,r3,L2CR_L2HWF_745x
+        sync
+        mtspr   SPRN_L2CR,r0    /* set the hardware flush bit */
+3:      mfspr   r0,SPRN_L2CR    /* wait for it to go to 0 */
+        andi.   r0,r0,L2CR_L2HWF_745x
+        bne     3b
+        sync
+        rlwinm  r3,r3,0,~L2CR_L2E
+        b       2f
+        /* When disabling L2, code must be in L1 */
+        .balign 32
+1:      mtspr   SPRN_L2CR,r3    /* disable the L2 cache */
+3:      sync
+        isync
+        b       1f
+2:      b       3f
+3:      sync
+        isync
+        b       1b
+1:      sync
+        isync
+        oris    r4,r3,L2CR_L2I@h
+        mtspr   SPRN_L2CR,r4
+        sync
+        isync
+1:      mfspr   r4,SPRN_L2CR
+        andis.  r0,r4,L2CR_L2I@h
+        bne     1b
+        sync
+
+BEGIN_FTR_SECTION
+        /* Flush the L3 cache using the hardware assist */
+4:      mfspr   r3,SPRN_L3CR
+        cmpwi   r3,0            /* check if it is enabled */
+        bge     6f
+        oris    r0,r3,L3CR_L3IO@h
+        ori     r0,r0,L3CR_L3DO
+        sync
+        mtspr   SPRN_L3CR,r0    /* lock the L3 cache */
+        sync
+        isync
+        ori     r0,r0,L3CR_L3HWF
+        sync
+        mtspr   SPRN_L3CR,r0    /* set the hardware flush bit */
+5:      mfspr   r0,SPRN_L3CR    /* wait for it to go to zero */
+        andi.   r0,r0,L3CR_L3HWF
+        bne     5b
+        rlwinm  r3,r3,0,~L3CR_L3E
+        sync
+        mtspr   SPRN_L3CR,r3    /* disable the L3 cache */
+        sync
+        ori     r4,r3,L3CR_L3I
+        mtspr   SPRN_L3CR,r4
+1:      mfspr   r4,SPRN_L3CR
+        andi.   r0,r4,L3CR_L3I
+        bne     1b
+        sync
+END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
+
+6:      mfspr   r0,SPRN_HID0    /* now disable the L1 data cache */
+        rlwinm  r0,r0,0,~HID0_DCE
+        mtspr   SPRN_HID0,r0
+        sync
+        isync
+        mtmsr   r11             /* restore DR and EE */
+        isync
+        blr
+#endif  /* CONFIG_6xx */
diff --git a/arch/powerpc/platforms/powermac/cpufreq.c b/arch/powerpc/platforms/powermac/cpufreq.c
new file mode 100644
index 000000000000..c47f8b69725c
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/cpufreq.c
@@ -0,0 +1,726 @@
+/*
+ *  arch/ppc/platforms/pmac_cpufreq.c
+ *
+ *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * TODO: Need a big cleanup here. Basically, we need to have different
+ * cpufreq_driver structures for the different type of HW instead of the
+ * current mess. We also need to better deal with the detection of the
+ * type of machine.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/adb.h>
+#include <linux/pmu.h>
+#include <linux/slab.h>
+#include <linux/cpufreq.h>
+#include <linux/init.h>
+#include <linux/sysdev.h>
+#include <linux/i2c.h>
+#include <linux/hardirq.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/irq.h>
+#include <asm/pmac_feature.h>
+#include <asm/mmu_context.h>
+#include <asm/sections.h>
+#include <asm/cputable.h>
+#include <asm/time.h>
+#include <asm/system.h>
+#include <asm/mpic.h>
+#include <asm/keylargo.h>
+
+/* WARNING !!! This will cause calibrate_delay() to be called,
+ * but this is an __init function ! So you MUST go edit
+ * init/main.c to make it non-init before enabling DEBUG_FREQ
+ */
+#undef DEBUG_FREQ
+
+/*
+ * There is a problem with the core cpufreq code on SMP kernels,
+ * it won't recalculate the Bogomips properly
+ */
+#ifdef CONFIG_SMP
+#warning "WARNING, CPUFREQ not recommended on SMP kernels"
+#endif
+
+extern void low_choose_7447a_dfs(int dfs);
+extern void low_choose_750fx_pll(int pll);
+extern void low_sleep_handler(void);
+
+/*
+ * Currently, PowerMac cpufreq supports only high & low frequencies
+ * that are set by the firmware
+ */
+static unsigned int low_freq;
+static unsigned int hi_freq;
+static unsigned int cur_freq;
+static unsigned int sleep_freq;
+
+/*
+ * Different models uses different mecanisms to switch the frequency
+ */
+static int (*set_speed_proc)(int low_speed);
+static unsigned int (*get_speed_proc)(void);
+
+/*
+ * Some definitions used by the various speedprocs
+ */
+static u32 voltage_gpio;
+static u32 frequency_gpio;
+static u32 slew_done_gpio;
+static int no_schedule;
+static int has_cpu_l2lve;
+static int is_pmu_based;
+
+/* There are only two frequency states for each processor. Values
+ * are in kHz for the time being.
+ */
+#define CPUFREQ_HIGH                  0
+#define CPUFREQ_LOW                   1
+
+static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
+        {CPUFREQ_HIGH,          0},
+        {CPUFREQ_LOW,           0},
+        {0,                     CPUFREQ_TABLE_END},
+};
+
+static struct freq_attr* pmac_cpu_freqs_attr[] = {
+        &cpufreq_freq_attr_scaling_available_freqs,
+        NULL,
+};
+
+static inline void local_delay(unsigned long ms)
+{
+        if (no_schedule)
+                mdelay(ms);
+        else
+                msleep(ms);
+}
+
+#ifdef DEBUG_FREQ
+static inline void debug_calc_bogomips(void)
+{
+        /* This will cause a recalc of bogomips and display the
+         * result. We backup/restore the value to avoid affecting the
+         * core cpufreq framework's own calculation.
+         */
+        extern void calibrate_delay(void);
+
+        unsigned long save_lpj = loops_per_jiffy;
+        calibrate_delay();
+        loops_per_jiffy = save_lpj;
+}
+#endif /* DEBUG_FREQ */
+
+/* Switch CPU speed under 750FX CPU control
+ */
+static int cpu_750fx_cpu_speed(int low_speed)
+{
+        u32 hid2;
+
+        if (low_speed == 0) {
+                /* ramping up, set voltage first */
+                pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
+                /* Make sure we sleep for at least 1ms */
+                local_delay(10);
+
+                /* tweak L2 for high voltage */
+                if (has_cpu_l2lve) {
+                        hid2 = mfspr(SPRN_HID2);
+                        hid2 &= ~0x2000;
+                        mtspr(SPRN_HID2, hid2);
+                }
+        }
+#ifdef CONFIG_6xx
+        low_choose_750fx_pll(low_speed);
+#endif
+        if (low_speed == 1) {
+                /* tweak L2 for low voltage */
+                if (has_cpu_l2lve) {
+                        hid2 = mfspr(SPRN_HID2);
+                        hid2 |= 0x2000;
+                        mtspr(SPRN_HID2, hid2);
+                }
+
+                /* ramping down, set voltage last */
+                pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
+                local_delay(10);
+        }
+
+        return 0;
+}
+
+static unsigned int cpu_750fx_get_cpu_speed(void)
+{
+        if (mfspr(SPRN_HID1) & HID1_PS)
+                return low_freq;
+        else
+                return hi_freq;
+}
+
+/* Switch CPU speed using DFS */
+static int dfs_set_cpu_speed(int low_speed)
+{
+        if (low_speed == 0) {
+                /* ramping up, set voltage first */
+                pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
+                /* Make sure we sleep for at least 1ms */
+                local_delay(1);
+        }
+
+        /* set frequency */
+#ifdef CONFIG_6xx
+        low_choose_7447a_dfs(low_speed);
+#endif
+        udelay(100);
+
+        if (low_speed == 1) {
+                /* ramping down, set voltage last */
+                pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
+                local_delay(1);
+        }
+
+        return 0;
+}
+
+static unsigned int dfs_get_cpu_speed(void)
+{
+        if (mfspr(SPRN_HID1) & HID1_DFS)
+                return low_freq;
+        else
+                return hi_freq;
+}
+
+
+/* Switch CPU speed using slewing GPIOs
+ */
+static int gpios_set_cpu_speed(int low_speed)
+{
+        int gpio, timeout = 0;
+
+        /* If ramping up, set voltage first */
+        if (low_speed == 0) {
+                pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
+                /* Delay is way too big but it's ok, we schedule */
+                local_delay(10);
+        }
+
+        /* Set frequency */
+        gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
+        if (low_speed == ((gpio & 0x01) == 0))
+                goto skip;
+
+        pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
+                          low_speed ? 0x04 : 0x05);
+        udelay(200);
+        do {
+                if (++timeout > 100)
+                        break;
+                local_delay(1);
+                gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
+        } while((gpio & 0x02) == 0);
+ skip:
+        /* If ramping down, set voltage last */
+        if (low_speed == 1) {
+                pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
+                /* Delay is way too big but it's ok, we schedule */
+                local_delay(10);
+        }
+
+#ifdef DEBUG_FREQ
+        debug_calc_bogomips();
+#endif
+
+        return 0;
+}
+
+/* Switch CPU speed under PMU control
+ */
+static int pmu_set_cpu_speed(int low_speed)
+{
+        struct adb_request req;
+        unsigned long save_l2cr;
+        unsigned long save_l3cr;
+        unsigned int pic_prio;
+        unsigned long flags;
+
+        preempt_disable();
+
+#ifdef DEBUG_FREQ
+        printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
+#endif
+        pmu_suspend();
+
+        /* Disable all interrupt sources on openpic */
+        pic_prio = mpic_cpu_get_priority();
+        mpic_cpu_set_priority(0xf);
+
+        /* Make sure the decrementer won't interrupt us */
+        asm volatile("mtdec %0" : : "r" (0x7fffffff));
+        /* Make sure any pending DEC interrupt occuring while we did
+         * the above didn't re-enable the DEC */
+        mb();
+        asm volatile("mtdec %0" : : "r" (0x7fffffff));
+
+        /* We can now disable MSR_EE */
+        local_irq_save(flags);
+
+        /* Giveup the FPU & vec */
+        enable_kernel_fp();
+
+#ifdef CONFIG_ALTIVEC
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+                enable_kernel_altivec();
+#endif /* CONFIG_ALTIVEC */
+
+        /* Save & disable L2 and L3 caches */
+        save_l3cr = _get_L3CR();        /* (returns -1 if not available) */
+        save_l2cr = _get_L2CR();        /* (returns -1 if not available) */
+
+        /* Send the new speed command. My assumption is that this command
+         * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
+         */
+        pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
+        while (!req.complete)
+                pmu_poll();
+
+        /* Prepare the northbridge for the speed transition */
+        pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
+
+        /* Call low level code to backup CPU state and recover from
+         * hardware reset
+         */
+        low_sleep_handler();
+
+        /* Restore the northbridge */
+        pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
+
+        /* Restore L2 cache */
+        if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
+                _set_L2CR(save_l2cr);
+        /* Restore L3 cache */
+        if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
+                _set_L3CR(save_l3cr);
+
+        /* Restore userland MMU context */
+        set_context(current->active_mm->context, current->active_mm->pgd);
+
+#ifdef DEBUG_FREQ
+        printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
+#endif
+
+        /* Restore low level PMU operations */
+        pmu_unlock();
+
+        /* Restore decrementer */
+        wakeup_decrementer();
+
+        /* Restore interrupts */
+        mpic_cpu_set_priority(pic_prio);
+
+        /* Let interrupts flow again ... */
+        local_irq_restore(flags);
+
+#ifdef DEBUG_FREQ
+        debug_calc_bogomips();
+#endif
+
+        pmu_resume();
+
+        preempt_enable();
+
+        return 0;
+}
+
+static int do_set_cpu_speed(int speed_mode, int notify)
+{
+        struct cpufreq_freqs freqs;
+        unsigned long l3cr;
+        static unsigned long prev_l3cr;
+
+        freqs.old = cur_freq;
+        freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
+        freqs.cpu = smp_processor_id();
+
+        if (freqs.old == freqs.new)
+                return 0;
+
+        if (notify)
+                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+        if (speed_mode == CPUFREQ_LOW &&
+            cpu_has_feature(CPU_FTR_L3CR)) {
+                l3cr = _get_L3CR();
+                if (l3cr & L3CR_L3E) {
+                        prev_l3cr = l3cr;
+                        _set_L3CR(0);
+                }
+        }
+        set_speed_proc(speed_mode == CPUFREQ_LOW);
+        if (speed_mode == CPUFREQ_HIGH &&
+            cpu_has_feature(CPU_FTR_L3CR)) {
+                l3cr = _get_L3CR();
+                if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
+                        _set_L3CR(prev_l3cr);
+        }
+        if (notify)
+                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+        cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
+
+        return 0;
+}
+
+static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
+{
+        return cur_freq;
+}
+
+static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
+{
+        return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
+}
+
+static int pmac_cpufreq_target( struct cpufreq_policy *policy,
+                                        unsigned int target_freq,
+                                        unsigned int relation)
+{
+        unsigned int    newstate = 0;
+
+        if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
+                        target_freq, relation, &newstate))
+                return -EINVAL;
+
+        return do_set_cpu_speed(newstate, 1);
+}
+
+unsigned int pmac_get_one_cpufreq(int i)
+{
+        /* Supports only one CPU for now */
+        return (i == 0) ? cur_freq : 0;
+}
+
+static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+        if (policy->cpu != 0)
+                return -ENODEV;
+
+        policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+        policy->cpuinfo.transition_latency      = CPUFREQ_ETERNAL;
+        policy->cur = cur_freq;
+
+        cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
+        return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
+}
+
+static u32 read_gpio(struct device_node *np)
+{
+        u32 *reg = (u32 *)get_property(np, "reg", NULL);
+        u32 offset;
+
+        if (reg == NULL)
+                return 0;
+        /* That works for all keylargos but shall be fixed properly
+         * some day... The problem is that it seems we can't rely
+         * on the "reg" property of the GPIO nodes, they are either
+         * relative to the base of KeyLargo or to the base of the
+         * GPIO space, and the device-tree doesn't help.
+         */
+        offset = *reg;
+        if (offset < KEYLARGO_GPIO_LEVELS0)
+                offset += KEYLARGO_GPIO_LEVELS0;
+        return offset;
+}
+
+static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
+{
+        /* Ok, this could be made a bit smarter, but let's be robust for now. We
+         * always force a speed change to high speed before sleep, to make sure
+         * we have appropriate voltage and/or bus speed for the wakeup process,
+         * and to make sure our loops_per_jiffies are "good enough", that is will
+         * not cause too short delays if we sleep in low speed and wake in high
+         * speed..
+         */
+        no_schedule = 1;
+        sleep_freq = cur_freq;
+        if (cur_freq == low_freq && !is_pmu_based)
+                do_set_cpu_speed(CPUFREQ_HIGH, 0);
+        return 0;
+}
+
+static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
+{
+        /* If we resume, first check if we have a get() function */
+        if (get_speed_proc)
+                cur_freq = get_speed_proc();
+        else
+                cur_freq = 0;
+
+        /* We don't, hrm... we don't really know our speed here, best
+         * is that we force a switch to whatever it was, which is
+         * probably high speed due to our suspend() routine
+         */
+        do_set_cpu_speed(sleep_freq == low_freq ?
+                         CPUFREQ_LOW : CPUFREQ_HIGH, 0);
+
+        no_schedule = 0;
+        return 0;
+}
+
+static struct cpufreq_driver pmac_cpufreq_driver = {
+        .verify         = pmac_cpufreq_verify,
+        .target         = pmac_cpufreq_target,
+        .get            = pmac_cpufreq_get_speed,
+        .init           = pmac_cpufreq_cpu_init,
+        .suspend        = pmac_cpufreq_suspend,
+        .resume         = pmac_cpufreq_resume,
+        .flags          = CPUFREQ_PM_NO_WARN,
+        .attr           = pmac_cpu_freqs_attr,
+        .name           = "powermac",
+        .owner          = THIS_MODULE,
+};
+
+
+static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
+{
+        struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
+                                                                "voltage-gpio");
+        struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
+                                                                "frequency-gpio");
+        struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
+                                                                     "slewing-done");
+        u32 *value;
+
+        /*
+         * Check to see if it's GPIO driven or PMU only
+         *
+         * The way we extract the GPIO address is slightly hackish, but it
+         * works well enough for now. We need to abstract the whole GPIO
+         * stuff sooner or later anyway
+         */
+
+        if (volt_gpio_np)
+                voltage_gpio = read_gpio(volt_gpio_np);
+        if (freq_gpio_np)
+                frequency_gpio = read_gpio(freq_gpio_np);
+        if (slew_done_gpio_np)
+                slew_done_gpio = read_gpio(slew_done_gpio_np);
+
+        /* If we use the frequency GPIOs, calculate the min/max speeds based
+         * on the bus frequencies
+         */
+        if (frequency_gpio && slew_done_gpio) {
+                int lenp, rc;
+                u32 *freqs, *ratio;
+
+                freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
+                lenp /= sizeof(u32);
+                if (freqs == NULL || lenp != 2) {
+                        printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
+                        return 1;
+                }
+                ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
+                if (ratio == NULL) {
+                        printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
+                        return 1;
+                }
+
+                /* Get the min/max bus frequencies */
+                low_freq = min(freqs[0], freqs[1]);
+                hi_freq = max(freqs[0], freqs[1]);
+
+                /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
+                 * frequency, it claims it to be around 84Mhz on some models while
+                 * it appears to be approx. 101Mhz on all. Let's hack around here...
+                 * fortunately, we don't need to be too precise
+                 */
+                if (low_freq < 98000000)
+                        low_freq = 101000000;
+                        
+                /* Convert those to CPU core clocks */
+                low_freq = (low_freq * (*ratio)) / 2000;
+                hi_freq = (hi_freq * (*ratio)) / 2000;
+
+                /* Now we get the frequencies, we read the GPIO to see what is out current
+                 * speed
+                 */
+                rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
+                cur_freq = (rc & 0x01) ? hi_freq : low_freq;
+
+                set_speed_proc = gpios_set_cpu_speed;
+                return 1;
+        }
+
+        /* If we use the PMU, look for the min & max frequencies in the
+         * device-tree
+         */
+        value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
+        if (!value)
+                return 1;
+        low_freq = (*value) / 1000;
+        /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
+         * here */
+        if (low_freq < 100000)
+                low_freq *= 10;
+
+        value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
+        if (!value)
+                return 1;
+        hi_freq = (*value) / 1000;
+        set_speed_proc = pmu_set_cpu_speed;
+        is_pmu_based = 1;
+
+        return 0;
+}
+
+static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
+{
+        struct device_node *volt_gpio_np;
+
+        if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
+                return 1;
+
+        volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
+        if (volt_gpio_np)
+                voltage_gpio = read_gpio(volt_gpio_np);
+        if (!voltage_gpio){
+                printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
+                return 1;
+        }
+
+        /* OF only reports the high frequency */
+        hi_freq = cur_freq;
+        low_freq = cur_freq/2;
+
+        /* Read actual frequency from CPU */
+        cur_freq = dfs_get_cpu_speed();
+        set_speed_proc = dfs_set_cpu_speed;
+        get_speed_proc = dfs_get_cpu_speed;
+
+        return 0;
+}
+
+static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
+{
+        struct device_node *volt_gpio_np;
+        u32 pvr, *value;
+
+        if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
+                return 1;
+
+        hi_freq = cur_freq;
+        value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
+        if (!value)
+                return 1;
+        low_freq = (*value) / 1000;
+
+        volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
+        if (volt_gpio_np)
+                voltage_gpio = read_gpio(volt_gpio_np);
+
+        pvr = mfspr(SPRN_PVR);
+        has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
+
+        set_speed_proc = cpu_750fx_cpu_speed;
+        get_speed_proc = cpu_750fx_get_cpu_speed;
+        cur_freq = cpu_750fx_get_cpu_speed();
+
+        return 0;
+}
+
+/* Currently, we support the following machines:
+ *
+ *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
+ *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
+ *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
+ *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
+ *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
+ *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
+ *  - Recent MacRISC3 laptops
+ *  - All new machines with 7447A CPUs
+ */
+static int __init pmac_cpufreq_setup(void)
+{
+        struct device_node      *cpunode;
+        u32                     *value;
+
+        if (strstr(cmd_line, "nocpufreq"))
+                return 0;
+
+        /* Assume only one CPU */
+        cpunode = find_type_devices("cpu");
+        if (!cpunode)
+                goto out;
+
+        /* Get current cpu clock freq */
+        value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
+        if (!value)
+                goto out;
+        cur_freq = (*value) / 1000;
+
+        /*  Check for 7447A based MacRISC3 */
+        if (machine_is_compatible("MacRISC3") &&
+            get_property(cpunode, "dynamic-power-step", NULL) &&
+            PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
+                pmac_cpufreq_init_7447A(cpunode);
+        /* Check for other MacRISC3 machines */
+        } else if (machine_is_compatible("PowerBook3,4") ||
+                   machine_is_compatible("PowerBook3,5") ||
+                   machine_is_compatible("MacRISC3")) {
+                pmac_cpufreq_init_MacRISC3(cpunode);
+        /* Else check for iBook2 500/600 */
+        } else if (machine_is_compatible("PowerBook4,1")) {
+                hi_freq = cur_freq;
+                low_freq = 400000;
+                set_speed_proc = pmu_set_cpu_speed;
+                is_pmu_based = 1;
+        }
+        /* Else check for TiPb 550 */
+        else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
+                hi_freq = cur_freq;
+                low_freq = 500000;
+                set_speed_proc = pmu_set_cpu_speed;
+                is_pmu_based = 1;
+        }
+        /* Else check for TiPb 400 & 500 */
+        else if (machine_is_compatible("PowerBook3,2")) {
+                /* We only know about the 400 MHz and the 500Mhz model
+                 * they both have 300 MHz as low frequency
+                 */
+                if (cur_freq < 350000 || cur_freq > 550000)
+                        goto out;
+                hi_freq = cur_freq;
+                low_freq = 300000;
+                set_speed_proc = pmu_set_cpu_speed;
+                is_pmu_based = 1;
+        }
+        /* Else check for 750FX */
+        else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
+                pmac_cpufreq_init_750FX(cpunode);
+out:
+        if (set_speed_proc == NULL)
+                return -ENODEV;
+
+        pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
+        pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
+
+        printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
+        printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
+               low_freq/1000, hi_freq/1000, cur_freq/1000);
+
+        return cpufreq_register_driver(&pmac_cpufreq_driver);
+}
+
+module_init(pmac_cpufreq_setup);
+
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
new file mode 100644
index 000000000000..10f1d942c661
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -0,0 +1,3063 @@
+/*
+ *  arch/ppc/platforms/pmac_feature.c
+ *
+ *  Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
+ *                          Ben. Herrenschmidt (benh@kernel.crashing.org)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ *  TODO:
+ *
+ *   - Replace mdelay with some schedule loop if possible
+ *   - Shorten some obfuscated delays on some routines (like modem
+ *     power)
+ *   - Refcount some clocks (see darwin)
+ *   - Split split split...
+ *
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/adb.h>
+#include <linux/pmu.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#include <asm/sections.h>
+#include <asm/errno.h>
+#include <asm/ohare.h>
+#include <asm/heathrow.h>
+#include <asm/keylargo.h>
+#include <asm/uninorth.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/pmac_feature.h>
+#include <asm/dbdma.h>
+#include <asm/pci-bridge.h>
+#include <asm/pmac_low_i2c.h>
+
+#undef DEBUG_FEATURE
+
+#ifdef DEBUG_FEATURE
+#define DBG(fmt...) printk(KERN_DEBUG fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+#ifdef CONFIG_6xx
+extern int powersave_lowspeed;
+#endif
+
+extern int powersave_nap;
+extern struct device_node *k2_skiplist[2];
+
+
+/*
+ * We use a single global lock to protect accesses. Each driver has
+ * to take care of its own locking
+ */
+static DEFINE_SPINLOCK(feature_lock);
+
+#define LOCK(flags)     spin_lock_irqsave(&feature_lock, flags);
+#define UNLOCK(flags)   spin_unlock_irqrestore(&feature_lock, flags);
+
+
+/*
+ * Instance of some macio stuffs
+ */
+struct macio_chip macio_chips[MAX_MACIO_CHIPS];
+
+struct macio_chip *macio_find(struct device_node *child, int type)
+{
+        while(child) {
+                int     i;
+
+                for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
+                        if (child == macio_chips[i].of_node &&
+                            (!type || macio_chips[i].type == type))
+                                return &macio_chips[i];
+                child = child->parent;
+        }
+        return NULL;
+}
+EXPORT_SYMBOL_GPL(macio_find);
+
+static const char *macio_names[] =
+{
+        "Unknown",
+        "Grand Central",
+        "OHare",
+        "OHareII",
+        "Heathrow",
+        "Gatwick",
+        "Paddington",
+        "Keylargo",
+        "Pangea",
+        "Intrepid",
+        "K2"
+};
+
+
+
+/*
+ * Uninorth reg. access. Note that Uni-N regs are big endian
+ */
+
+#define UN_REG(r)       (uninorth_base + ((r) >> 2))
+#define UN_IN(r)        (in_be32(UN_REG(r)))
+#define UN_OUT(r,v)     (out_be32(UN_REG(r), (v)))
+#define UN_BIS(r,v)     (UN_OUT((r), UN_IN(r) | (v)))
+#define UN_BIC(r,v)     (UN_OUT((r), UN_IN(r) & ~(v)))
+
+static struct device_node *uninorth_node;
+static u32 __iomem *uninorth_base;
+static u32 uninorth_rev;
+static int uninorth_u3;
+static void __iomem *u3_ht;
+
+/*
+ * For each motherboard family, we have a table of functions pointers
+ * that handle the various features.
+ */
+
+typedef long (*feature_call)(struct device_node *node, long param, long value);
+
+struct feature_table_entry {
+        unsigned int    selector;
+        feature_call    function;
+};
+
+struct pmac_mb_def
+{
+        const char*                     model_string;
+        const char*                     model_name;
+        int                             model_id;
+        struct feature_table_entry*     features;
+        unsigned long                   board_flags;
+};
+static struct pmac_mb_def pmac_mb;
+
+/*
+ * Here are the chip specific feature functions
+ */
+
+static inline int simple_feature_tweak(struct device_node *node, int type,
+                                       int reg, u32 mask, int value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+
+        macio = macio_find(node, type);
+        if (!macio)
+                return -ENODEV;
+        LOCK(flags);
+        if (value)
+                MACIO_BIS(reg, mask);
+        else
+                MACIO_BIC(reg, mask);
+        (void)MACIO_IN32(reg);
+        UNLOCK(flags);
+
+        return 0;
+}
+
+#ifndef CONFIG_POWER4
+
+static long ohare_htw_scc_enable(struct device_node *node, long param,
+                                 long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           chan_mask;
+        unsigned long           fcr;
+        unsigned long           flags;
+        int                     htw, trans;
+        unsigned long           rmask;
+
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+        if (!strcmp(node->name, "ch-a"))
+                chan_mask = MACIO_FLAG_SCCA_ON;
+        else if (!strcmp(node->name, "ch-b"))
+                chan_mask = MACIO_FLAG_SCCB_ON;
+        else
+                return -ENODEV;
+
+        htw = (macio->type == macio_heathrow || macio->type == macio_paddington
+                || macio->type == macio_gatwick);
+        /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
+        trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
+                 pmac_mb.model_id != PMAC_TYPE_YIKES);
+        if (value) {
+#ifdef CONFIG_ADB_PMU
+                if ((param & 0xfff) == PMAC_SCC_IRDA)
+                        pmu_enable_irled(1);
+#endif /* CONFIG_ADB_PMU */
+                LOCK(flags);
+                fcr = MACIO_IN32(OHARE_FCR);
+                /* Check if scc cell need enabling */
+                if (!(fcr & OH_SCC_ENABLE)) {
+                        fcr |= OH_SCC_ENABLE;
+                        if (htw) {
+                                /* Side effect: this will also power up the
+                                 * modem, but it's too messy to figure out on which
+                                 * ports this controls the tranceiver and on which
+                                 * it controls the modem
+                                 */
+                                if (trans)
+                                        fcr &= ~HRW_SCC_TRANS_EN_N;
+                                MACIO_OUT32(OHARE_FCR, fcr);
+                                fcr |= (rmask = HRW_RESET_SCC);
+                                MACIO_OUT32(OHARE_FCR, fcr);
+                        } else {
+                                fcr |= (rmask = OH_SCC_RESET);
+                                MACIO_OUT32(OHARE_FCR, fcr);
+                        }
+                        UNLOCK(flags);
+                        (void)MACIO_IN32(OHARE_FCR);
+                        mdelay(15);
+                        LOCK(flags);
+                        fcr &= ~rmask;
+                        MACIO_OUT32(OHARE_FCR, fcr);
+                }
+                if (chan_mask & MACIO_FLAG_SCCA_ON)
+                        fcr |= OH_SCCA_IO;
+                if (chan_mask & MACIO_FLAG_SCCB_ON)
+                        fcr |= OH_SCCB_IO;
+                MACIO_OUT32(OHARE_FCR, fcr);
+                macio->flags |= chan_mask;
+                UNLOCK(flags);
+                if (param & PMAC_SCC_FLAG_XMON)
+                        macio->flags |= MACIO_FLAG_SCC_LOCKED;
+        } else {
+                if (macio->flags & MACIO_FLAG_SCC_LOCKED)
+                        return -EPERM;
+                LOCK(flags);
+                fcr = MACIO_IN32(OHARE_FCR);
+                if (chan_mask & MACIO_FLAG_SCCA_ON)
+                        fcr &= ~OH_SCCA_IO;
+                if (chan_mask & MACIO_FLAG_SCCB_ON)
+                        fcr &= ~OH_SCCB_IO;
+                MACIO_OUT32(OHARE_FCR, fcr);
+                if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
+                        fcr &= ~OH_SCC_ENABLE;
+                        if (htw && trans)
+                                fcr |= HRW_SCC_TRANS_EN_N;
+                        MACIO_OUT32(OHARE_FCR, fcr);
+                }
+                macio->flags &= ~(chan_mask);
+                UNLOCK(flags);
+                mdelay(10);
+#ifdef CONFIG_ADB_PMU
+                if ((param & 0xfff) == PMAC_SCC_IRDA)
+                        pmu_enable_irled(0);
+#endif /* CONFIG_ADB_PMU */
+        }
+        return 0;
+}
+
+static long ohare_floppy_enable(struct device_node *node, long param,
+                                long value)
+{
+        return simple_feature_tweak(node, macio_ohare,
+                OHARE_FCR, OH_FLOPPY_ENABLE, value);
+}
+
+static long ohare_mesh_enable(struct device_node *node, long param, long value)
+{
+        return simple_feature_tweak(node, macio_ohare,
+                OHARE_FCR, OH_MESH_ENABLE, value);
+}
+
+static long ohare_ide_enable(struct device_node *node, long param, long value)
+{
+        switch(param) {
+        case 0:
+                /* For some reason, setting the bit in set_initial_features()
+                 * doesn't stick. I'm still investigating... --BenH.
+                 */
+                if (value)
+                        simple_feature_tweak(node, macio_ohare,
+                                OHARE_FCR, OH_IOBUS_ENABLE, 1);
+                return simple_feature_tweak(node, macio_ohare,
+                        OHARE_FCR, OH_IDE0_ENABLE, value);
+        case 1:
+                return simple_feature_tweak(node, macio_ohare,
+                        OHARE_FCR, OH_BAY_IDE_ENABLE, value);
+        default:
+                return -ENODEV;
+        }
+}
+
+static long ohare_ide_reset(struct device_node *node, long param, long value)
+{
+        switch(param) {
+        case 0:
+                return simple_feature_tweak(node, macio_ohare,
+                        OHARE_FCR, OH_IDE0_RESET_N, !value);
+        case 1:
+                return simple_feature_tweak(node, macio_ohare,
+                        OHARE_FCR, OH_IDE1_RESET_N, !value);
+        default:
+                return -ENODEV;
+        }
+}
+
+static long ohare_sleep_state(struct device_node *node, long param, long value)
+{
+        struct macio_chip*      macio = &macio_chips[0];
+
+        if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
+                return -EPERM;
+        if (value == 1) {
+                MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
+        } else if (value == 0) {
+                MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
+        }
+
+        return 0;
+}
+
+static long heathrow_modem_enable(struct device_node *node, long param,
+                                  long value)
+{
+        struct macio_chip*      macio;
+        u8                      gpio;
+        unsigned long           flags;
+
+        macio = macio_find(node, macio_unknown);
+        if (!macio)
+                return -ENODEV;
+        gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
+        if (!value) {
+                LOCK(flags);
+                MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
+                UNLOCK(flags);
+                (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
+                mdelay(250);
+        }
+        if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
+            pmac_mb.model_id != PMAC_TYPE_YIKES) {
+                LOCK(flags);
+                if (value)
+                        MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
+                else
+                        MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
+                UNLOCK(flags);
+                (void)MACIO_IN32(HEATHROW_FCR);
+                mdelay(250);
+        }
+        if (value) {
+                LOCK(flags);
+                MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
+                (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250); LOCK(flags);
+                MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
+                (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250); LOCK(flags);
+                MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
+                (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250);
+        }
+        return 0;
+}
+
+static long heathrow_floppy_enable(struct device_node *node, long param,
+                                   long value)
+{
+        return simple_feature_tweak(node, macio_unknown,
+                HEATHROW_FCR,
+                HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
+                value);
+}
+
+static long heathrow_mesh_enable(struct device_node *node, long param,
+                                 long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+
+        macio = macio_find(node, macio_unknown);
+        if (!macio)
+                return -ENODEV;
+        LOCK(flags);
+        /* Set clear mesh cell enable */
+        if (value)
+                MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
+        else
+                MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
+        (void)MACIO_IN32(HEATHROW_FCR);
+        udelay(10);
+        /* Set/Clear termination power */
+        if (value)
+                MACIO_BIC(HEATHROW_MBCR, 0x04000000);
+        else
+                MACIO_BIS(HEATHROW_MBCR, 0x04000000);
+        (void)MACIO_IN32(HEATHROW_MBCR);
+        udelay(10);
+        UNLOCK(flags);
+
+        return 0;
+}
+
+static long heathrow_ide_enable(struct device_node *node, long param,
+                                long value)
+{
+        switch(param) {
+        case 0:
+                return simple_feature_tweak(node, macio_unknown,
+                        HEATHROW_FCR, HRW_IDE0_ENABLE, value);
+        case 1:
+                return simple_feature_tweak(node, macio_unknown,
+                        HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
+        default:
+                return -ENODEV;
+        }
+}
+
+static long heathrow_ide_reset(struct device_node *node, long param,
+                               long value)
+{
+        switch(param) {
+        case 0:
+                return simple_feature_tweak(node, macio_unknown,
+                        HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
+        case 1:
+                return simple_feature_tweak(node, macio_unknown,
+                        HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
+        default:
+                return -ENODEV;
+        }
+}
+
+static long heathrow_bmac_enable(struct device_node *node, long param,
+                                 long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+        if (value) {
+                LOCK(flags);
+                MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
+                MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
+                UNLOCK(flags);
+                (void)MACIO_IN32(HEATHROW_FCR);
+                mdelay(10);
+                LOCK(flags);
+                MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
+                UNLOCK(flags);
+                (void)MACIO_IN32(HEATHROW_FCR);
+                mdelay(10);
+        } else {
+                LOCK(flags);
+                MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
+                UNLOCK(flags);
+        }
+        return 0;
+}
+
+static long heathrow_sound_enable(struct device_node *node, long param,
+                                  long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+
+        /* B&W G3 and Yikes don't support that properly (the
+         * sound appear to never come back after beeing shut down).
+         */
+        if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
+            pmac_mb.model_id == PMAC_TYPE_YIKES)
+                return 0;
+
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+        if (value) {
+                LOCK(flags);
+                MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
+                MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
+                UNLOCK(flags);
+                (void)MACIO_IN32(HEATHROW_FCR);
+        } else {
+                LOCK(flags);
+                MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
+                MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
+                UNLOCK(flags);
+        }
+        return 0;
+}
+
+static u32 save_fcr[6];
+static u32 save_mbcr;
+static u32 save_gpio_levels[2];
+static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
+static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
+static u32 save_unin_clock_ctl;
+static struct dbdma_regs save_dbdma[13];
+static struct dbdma_regs save_alt_dbdma[13];
+
+static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
+{
+        int i;
+
+        /* Save state & config of DBDMA channels */
+        for (i = 0; i < 13; i++) {
+                volatile struct dbdma_regs __iomem * chan = (void __iomem *)
+                        (macio->base + ((0x8000+i*0x100)>>2));
+                save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
+                save[i].cmdptr = in_le32(&chan->cmdptr);
+                save[i].intr_sel = in_le32(&chan->intr_sel);
+                save[i].br_sel = in_le32(&chan->br_sel);
+                save[i].wait_sel = in_le32(&chan->wait_sel);
+        }
+}
+
+static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
+{
+        int i;
+
+        /* Save state & config of DBDMA channels */
+        for (i = 0; i < 13; i++) {
+                volatile struct dbdma_regs __iomem * chan = (void __iomem *)
+                        (macio->base + ((0x8000+i*0x100)>>2));
+                out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
+                while (in_le32(&chan->status) & ACTIVE)
+                        mb();
+                out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
+                out_le32(&chan->cmdptr, save[i].cmdptr);
+                out_le32(&chan->intr_sel, save[i].intr_sel);
+                out_le32(&chan->br_sel, save[i].br_sel);
+                out_le32(&chan->wait_sel, save[i].wait_sel);
+        }
+}
+
+static void heathrow_sleep(struct macio_chip *macio, int secondary)
+{
+        if (secondary) {
+                dbdma_save(macio, save_alt_dbdma);
+                save_fcr[2] = MACIO_IN32(0x38);
+                save_fcr[3] = MACIO_IN32(0x3c);
+        } else {
+                dbdma_save(macio, save_dbdma);
+                save_fcr[0] = MACIO_IN32(0x38);
+                save_fcr[1] = MACIO_IN32(0x3c);
+                save_mbcr = MACIO_IN32(0x34);
+                /* Make sure sound is shut down */
+                MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
+                MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
+                /* This seems to be necessary as well or the fan
+                 * keeps coming up and battery drains fast */
+                MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
+                MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
+                /* Make sure eth is down even if module or sleep
+                 * won't work properly */
+                MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
+        }
+        /* Make sure modem is shut down */
+        MACIO_OUT8(HRW_GPIO_MODEM_RESET,
+                MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
+        MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
+        MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
+
+        /* Let things settle */
+        (void)MACIO_IN32(HEATHROW_FCR);
+}
+
+static void heathrow_wakeup(struct macio_chip *macio, int secondary)
+{
+        if (secondary) {
+                MACIO_OUT32(0x38, save_fcr[2]);
+                (void)MACIO_IN32(0x38);
+                mdelay(1);
+                MACIO_OUT32(0x3c, save_fcr[3]);
+                (void)MACIO_IN32(0x38);
+                mdelay(10);
+                dbdma_restore(macio, save_alt_dbdma);
+        } else {
+                MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
+                (void)MACIO_IN32(0x38);
+                mdelay(1);
+                MACIO_OUT32(0x3c, save_fcr[1]);
+                (void)MACIO_IN32(0x38);
+                mdelay(1);
+                MACIO_OUT32(0x34, save_mbcr);
+                (void)MACIO_IN32(0x38);
+                mdelay(10);
+                dbdma_restore(macio, save_dbdma);
+        }
+}
+
+static long heathrow_sleep_state(struct device_node *node, long param,
+                                 long value)
+{
+        if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
+                return -EPERM;
+        if (value == 1) {
+                if (macio_chips[1].type == macio_gatwick)
+                        heathrow_sleep(&macio_chips[0], 1);
+                heathrow_sleep(&macio_chips[0], 0);
+        } else if (value == 0) {
+                heathrow_wakeup(&macio_chips[0], 0);
+                if (macio_chips[1].type == macio_gatwick)
+                        heathrow_wakeup(&macio_chips[0], 1);
+        }
+        return 0;
+}
+
+static long core99_scc_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+        unsigned long           chan_mask;
+        u32                     fcr;
+
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+        if (!strcmp(node->name, "ch-a"))
+                chan_mask = MACIO_FLAG_SCCA_ON;
+        else if (!strcmp(node->name, "ch-b"))
+                chan_mask = MACIO_FLAG_SCCB_ON;
+        else
+                return -ENODEV;
+
+        if (value) {
+                int need_reset_scc = 0;
+                int need_reset_irda = 0;
+
+                LOCK(flags);
+                fcr = MACIO_IN32(KEYLARGO_FCR0);
+                /* Check if scc cell need enabling */
+                if (!(fcr & KL0_SCC_CELL_ENABLE)) {
+                        fcr |= KL0_SCC_CELL_ENABLE;
+                        need_reset_scc = 1;
+                }
+                if (chan_mask & MACIO_FLAG_SCCA_ON) {
+                        fcr |= KL0_SCCA_ENABLE;
+                        /* Don't enable line drivers for I2S modem */
+                        if ((param & 0xfff) == PMAC_SCC_I2S1)
+                                fcr &= ~KL0_SCC_A_INTF_ENABLE;
+                        else
+                                fcr |= KL0_SCC_A_INTF_ENABLE;
+                }
+                if (chan_mask & MACIO_FLAG_SCCB_ON) {
+                        fcr |= KL0_SCCB_ENABLE;
+                        /* Perform irda specific inits */
+                        if ((param & 0xfff) == PMAC_SCC_IRDA) {
+                                fcr &= ~KL0_SCC_B_INTF_ENABLE;
+                                fcr |= KL0_IRDA_ENABLE;
+                                fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
+                                fcr |= KL0_IRDA_SOURCE1_SEL;
+                                fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
+                                fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
+                                need_reset_irda = 1;
+                        } else
+                                fcr |= KL0_SCC_B_INTF_ENABLE;
+                }
+                MACIO_OUT32(KEYLARGO_FCR0, fcr);
+                macio->flags |= chan_mask;
+                if (need_reset_scc)  {
+                        MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                        UNLOCK(flags);
+                        mdelay(15);
+                        LOCK(flags);
+                        MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
+                }
+                if (need_reset_irda)  {
+                        MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                        UNLOCK(flags);
+                        mdelay(15);
+                        LOCK(flags);
+                        MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
+                }
+                UNLOCK(flags);
+                if (param & PMAC_SCC_FLAG_XMON)
+                        macio->flags |= MACIO_FLAG_SCC_LOCKED;
+        } else {
+                if (macio->flags & MACIO_FLAG_SCC_LOCKED)
+                        return -EPERM;
+                LOCK(flags);
+                fcr = MACIO_IN32(KEYLARGO_FCR0);
+                if (chan_mask & MACIO_FLAG_SCCA_ON)
+                        fcr &= ~KL0_SCCA_ENABLE;
+                if (chan_mask & MACIO_FLAG_SCCB_ON) {
+                        fcr &= ~KL0_SCCB_ENABLE;
+                        /* Perform irda specific clears */
+                        if ((param & 0xfff) == PMAC_SCC_IRDA) {
+                                fcr &= ~KL0_IRDA_ENABLE;
+                                fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
+                                fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
+                                fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
+                        }
+                }
+                MACIO_OUT32(KEYLARGO_FCR0, fcr);
+                if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
+                        fcr &= ~KL0_SCC_CELL_ENABLE;
+                        MACIO_OUT32(KEYLARGO_FCR0, fcr);
+                }
+                macio->flags &= ~(chan_mask);
+                UNLOCK(flags);
+                mdelay(10);
+        }
+        return 0;
+}
+
+static long
+core99_modem_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip*      macio;
+        u8                      gpio;
+        unsigned long           flags;
+
+        /* Hack for internal USB modem */
+        if (node == NULL) {
+                if (macio_chips[0].type != macio_keylargo)
+                        return -ENODEV;
+                node = macio_chips[0].of_node;
+        }
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+        gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
+        gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
+        gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
+
+        if (!value) {
+                LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
+                UNLOCK(flags);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                mdelay(250);
+        }
+        LOCK(flags);
+        if (value) {
+                MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
+                UNLOCK(flags);
+                (void)MACIO_IN32(KEYLARGO_FCR2);
+                mdelay(250);
+        } else {
+                MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
+                UNLOCK(flags);
+        }
+        if (value) {
+                LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250); LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250); LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250);
+        }
+        return 0;
+}
+
+static long
+pangea_modem_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip*      macio;
+        u8                      gpio;
+        unsigned long           flags;
+
+        /* Hack for internal USB modem */
+        if (node == NULL) {
+                if (macio_chips[0].type != macio_pangea &&
+                    macio_chips[0].type != macio_intrepid)
+                        return -ENODEV;
+                node = macio_chips[0].of_node;
+        }
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+        gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
+        gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
+        gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
+
+        if (!value) {
+                LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
+                UNLOCK(flags);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                mdelay(250);
+        }
+        LOCK(flags);
+        if (value) {
+                MACIO_OUT8(KL_GPIO_MODEM_POWER,
+                        KEYLARGO_GPIO_OUTPUT_ENABLE);
+                UNLOCK(flags);
+                (void)MACIO_IN32(KEYLARGO_FCR2);
+                mdelay(250);
+        } else {
+                MACIO_OUT8(KL_GPIO_MODEM_POWER,
+                        KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
+                UNLOCK(flags);
+        }
+        if (value) {
+                LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250); LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250); LOCK(flags);
+                MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
+                (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
+                UNLOCK(flags); mdelay(250);
+        }
+        return 0;
+}
+
+static long
+core99_ata100_enable(struct device_node *node, long value)
+{
+        unsigned long flags;
+        struct pci_dev *pdev = NULL;
+        u8 pbus, pid;
+
+        if (uninorth_rev < 0x24)
+                return -ENODEV;
+
+        LOCK(flags);
+        if (value)
+                UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
+        else
+                UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
+        (void)UN_IN(UNI_N_CLOCK_CNTL);
+        UNLOCK(flags);
+        udelay(20);
+
+        if (value) {
+                if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
+                        pdev = pci_find_slot(pbus, pid);
+                if (pdev == NULL)
+                        return 0;
+                pci_enable_device(pdev);
+                pci_set_master(pdev);
+        }
+        return 0;
+}
+
+static long
+core99_ide_enable(struct device_node *node, long param, long value)
+{
+        /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
+         * based ata-100
+         */
+        switch(param) {
+            case 0:
+                return simple_feature_tweak(node, macio_unknown,
+                        KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
+            case 1:
+                return simple_feature_tweak(node, macio_unknown,
+                        KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
+            case 2:
+                return simple_feature_tweak(node, macio_unknown,
+                        KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
+            case 3:
+                return core99_ata100_enable(node, value);
+            default:
+                return -ENODEV;
+        }
+}
+
+static long
+core99_ide_reset(struct device_node *node, long param, long value)
+{
+        switch(param) {
+            case 0:
+                return simple_feature_tweak(node, macio_unknown,
+                        KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
+            case 1:
+                return simple_feature_tweak(node, macio_unknown,
+                        KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
+            case 2:
+                return simple_feature_tweak(node, macio_unknown,
+                        KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
+            default:
+                return -ENODEV;
+        }
+}
+
+static long
+core99_gmac_enable(struct device_node *node, long param, long value)
+{
+        unsigned long flags;
+
+        LOCK(flags);
+        if (value)
+                UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
+        else
+                UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
+        (void)UN_IN(UNI_N_CLOCK_CNTL);
+        UNLOCK(flags);
+        udelay(20);
+
+        return 0;
+}
+
+static long
+core99_gmac_phy_reset(struct device_node *node, long param, long value)
+{
+        unsigned long flags;
+        struct macio_chip *macio;
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo && macio->type != macio_pangea &&
+            macio->type != macio_intrepid)
+                return -ENODEV;
+
+        LOCK(flags);
+        MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
+        (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
+        UNLOCK(flags);
+        mdelay(10);
+        LOCK(flags);
+        MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
+                KEYLARGO_GPIO_OUTOUT_DATA);
+        UNLOCK(flags);
+        mdelay(10);
+
+        return 0;
+}
+
+static long
+core99_sound_chip_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+
+        /* Do a better probe code, screamer G4 desktops &
+         * iMacs can do that too, add a recalibrate  in
+         * the driver as well
+         */
+        if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
+            pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
+                LOCK(flags);
+                if (value)
+                        MACIO_OUT8(KL_GPIO_SOUND_POWER,
+                                KEYLARGO_GPIO_OUTPUT_ENABLE |
+                                KEYLARGO_GPIO_OUTOUT_DATA);
+                else
+                        MACIO_OUT8(KL_GPIO_SOUND_POWER,
+                                KEYLARGO_GPIO_OUTPUT_ENABLE);
+                (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
+                UNLOCK(flags);
+        }
+        return 0;
+}
+
+static long
+core99_airport_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip*      macio;
+        unsigned long           flags;
+        int                     state;
+
+        macio = macio_find(node, 0);
+        if (!macio)
+                return -ENODEV;
+
+        /* Hint: we allow passing of macio itself for the sake of the
+         * sleep code
+         */
+        if (node != macio->of_node &&
+            (!node->parent || node->parent != macio->of_node))
+                return -ENODEV;
+        state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
+        if (value == state)
+                return 0;
+        if (value) {
+                /* This code is a reproduction of OF enable-cardslot
+                 * and init-wireless methods, slightly hacked until
+                 * I got it working.
+                 */
+                LOCK(flags);
+                MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
+                (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
+                UNLOCK(flags);
+                mdelay(10);
+                LOCK(flags);
+                MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
+                (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
+                UNLOCK(flags);
+
+                mdelay(10);
+
+                LOCK(flags);
+                MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
+                (void)MACIO_IN32(KEYLARGO_FCR2);
+                udelay(10);
+                MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
+                (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
+                udelay(10);
+                MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
+                (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
+                udelay(10);
+                MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
+                (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
+                udelay(10);
+                MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
+                (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
+                udelay(10);
+                MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
+                (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
+                UNLOCK(flags);
+                udelay(10);
+                MACIO_OUT32(0x1c000, 0);
+                mdelay(1);
+                MACIO_OUT8(0x1a3e0, 0x41);
+                (void)MACIO_IN8(0x1a3e0);
+                udelay(10);
+                LOCK(flags);
+                MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
+                (void)MACIO_IN32(KEYLARGO_FCR2);
+                UNLOCK(flags);
+                mdelay(100);
+
+                macio->flags |= MACIO_FLAG_AIRPORT_ON;
+        } else {
+                LOCK(flags);
+                MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
+                (void)MACIO_IN32(KEYLARGO_FCR2);
+                MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
+                MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
+                MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
+                MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
+                MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
+                (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
+                UNLOCK(flags);
+
+                macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
+        }
+        return 0;
+}
+
+#ifdef CONFIG_SMP
+static long
+core99_reset_cpu(struct device_node *node, long param, long value)
+{
+        unsigned int reset_io = 0;
+        unsigned long flags;
+        struct macio_chip *macio;
+        struct device_node *np;
+        const int dflt_reset_lines[] = {        KL_GPIO_RESET_CPU0,
+                                                KL_GPIO_RESET_CPU1,
+                                                KL_GPIO_RESET_CPU2,
+                                                KL_GPIO_RESET_CPU3 };
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo)
+                return -ENODEV;
+
+        np = find_path_device("/cpus");
+        if (np == NULL)
+                return -ENODEV;
+        for (np = np->child; np != NULL; np = np->sibling) {
+                u32 *num = (u32 *)get_property(np, "reg", NULL);
+                u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
+                if (num == NULL || rst == NULL)
+                        continue;
+                if (param == *num) {
+                        reset_io = *rst;
+                        break;
+                }
+        }
+        if (np == NULL || reset_io == 0)
+                reset_io = dflt_reset_lines[param];
+
+        LOCK(flags);
+        MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
+        (void)MACIO_IN8(reset_io);
+        udelay(1);
+        MACIO_OUT8(reset_io, 0);
+        (void)MACIO_IN8(reset_io);
+        UNLOCK(flags);
+
+        return 0;
+}
+#endif /* CONFIG_SMP */
+
+static long
+core99_usb_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip *macio;
+        unsigned long flags;
+        char *prop;
+        int number;
+        u32 reg;
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo && macio->type != macio_pangea &&
+            macio->type != macio_intrepid)
+                return -ENODEV;
+
+        prop = (char *)get_property(node, "AAPL,clock-id", NULL);
+        if (!prop)
+                return -ENODEV;
+        if (strncmp(prop, "usb0u048", 8) == 0)
+                number = 0;
+        else if (strncmp(prop, "usb1u148", 8) == 0)
+                number = 2;
+        else if (strncmp(prop, "usb2u248", 8) == 0)
+                number = 4;
+        else
+                return -ENODEV;
+
+        /* Sorry for the brute-force locking, but this is only used during
+         * sleep and the timing seem to be critical
+         */
+        LOCK(flags);
+        if (value) {
+                /* Turn ON */
+                if (number == 0) {
+                        MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                        UNLOCK(flags);
+                        mdelay(1);
+                        LOCK(flags);
+                        MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
+                } else if (number == 2) {
+                        MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
+                        UNLOCK(flags);
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                        mdelay(1);
+                        LOCK(flags);
+                        MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
+                } else if (number == 4) {
+                        MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
+                        UNLOCK(flags);
+                        (void)MACIO_IN32(KEYLARGO_FCR1);
+                        mdelay(1);
+                        LOCK(flags);
+                        MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
+                }
+                if (number < 4) {
+                        reg = MACIO_IN32(KEYLARGO_FCR4);
+                        reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
+                                KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
+                        reg &=  ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
+                                KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
+                        MACIO_OUT32(KEYLARGO_FCR4, reg);
+                        (void)MACIO_IN32(KEYLARGO_FCR4);
+                        udelay(10);
+                } else {
+                        reg = MACIO_IN32(KEYLARGO_FCR3);
+                        reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
+                                KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
+                        reg &=  ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
+                                KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
+                        MACIO_OUT32(KEYLARGO_FCR3, reg);
+                        (void)MACIO_IN32(KEYLARGO_FCR3);
+                        udelay(10);
+                }
+                if (macio->type == macio_intrepid) {
+                        /* wait for clock stopped bits to clear */
+                        u32 test0 = 0, test1 = 0;
+                        u32 status0, status1;
+                        int timeout = 1000;
+
+                        UNLOCK(flags);
+                        switch (number) {
+                        case 0:
+                                test0 = UNI_N_CLOCK_STOPPED_USB0;
+                                test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
+                                break;
+                        case 2:
+                                test0 = UNI_N_CLOCK_STOPPED_USB1;
+                                test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
+                                break;
+                        case 4:
+                                test0 = UNI_N_CLOCK_STOPPED_USB2;
+                                test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
+                                break;
+                        }
+                        do {
+                                if (--timeout <= 0) {
+                                        printk(KERN_ERR "core99_usb_enable: "
+                                               "Timeout waiting for clocks\n");
+                                        break;
+                                }
+                                mdelay(1);
+                                status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
+                                status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
+                        } while ((status0 & test0) | (status1 & test1));
+                        LOCK(flags);
+                }
+        } else {
+                /* Turn OFF */
+                if (number < 4) {
+                        reg = MACIO_IN32(KEYLARGO_FCR4);
+                        reg |=  KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
+                                KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
+                        reg |=  KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
+                                KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
+                        MACIO_OUT32(KEYLARGO_FCR4, reg);
+                        (void)MACIO_IN32(KEYLARGO_FCR4);
+                        udelay(1);
+                } else {
+                        reg = MACIO_IN32(KEYLARGO_FCR3);
+                        reg |=  KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
+                                KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
+                        reg |=  KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
+                                KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
+                        MACIO_OUT32(KEYLARGO_FCR3, reg);
+                        (void)MACIO_IN32(KEYLARGO_FCR3);
+                        udelay(1);
+                }
+                if (number == 0) {
+                        if (macio->type != macio_intrepid)
+                                MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                        udelay(1);
+                        MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                } else if (number == 2) {
+                        if (macio->type != macio_intrepid)
+                                MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                        udelay(1);
+                        MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
+                        (void)MACIO_IN32(KEYLARGO_FCR0);
+                } else if (number == 4) {
+                        udelay(1);
+                        MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
+                        (void)MACIO_IN32(KEYLARGO_FCR1);
+                }
+                udelay(1);
+        }
+        UNLOCK(flags);
+
+        return 0;
+}
+
+static long
+core99_firewire_enable(struct device_node *node, long param, long value)
+{
+        unsigned long flags;
+        struct macio_chip *macio;
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo && macio->type != macio_pangea &&
+            macio->type != macio_intrepid)
+                return -ENODEV;
+        if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
+                return -ENODEV;
+
+        LOCK(flags);
+        if (value) {
+                UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
+                (void)UN_IN(UNI_N_CLOCK_CNTL);
+        } else {
+                UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
+                (void)UN_IN(UNI_N_CLOCK_CNTL);
+        }
+        UNLOCK(flags);
+        mdelay(1);
+
+        return 0;
+}
+
+static long
+core99_firewire_cable_power(struct device_node *node, long param, long value)
+{
+        unsigned long flags;
+        struct macio_chip *macio;
+
+        /* Trick: we allow NULL node */
+        if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
+                return -ENODEV;
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo && macio->type != macio_pangea &&
+            macio->type != macio_intrepid)
+                return -ENODEV;
+        if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
+                return -ENODEV;
+
+        LOCK(flags);
+        if (value) {
+                MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
+                MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
+                udelay(10);
+        } else {
+                MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
+                MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
+        }
+        UNLOCK(flags);
+        mdelay(1);
+
+        return 0;
+}
+
+static long
+intrepid_aack_delay_enable(struct device_node *node, long param, long value)
+{
+        unsigned long flags;
+
+        if (uninorth_rev < 0xd2)
+                return -ENODEV;
+
+        LOCK(flags);
+        if (param)
+                UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
+        else
+                UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
+        UNLOCK(flags);
+
+        return 0;
+}
+
+
+#endif /* CONFIG_POWER4 */
+
+static long
+core99_read_gpio(struct device_node *node, long param, long value)
+{
+        struct macio_chip *macio = &macio_chips[0];
+
+        return MACIO_IN8(param);
+}
+
+
+static long
+core99_write_gpio(struct device_node *node, long param, long value)
+{
+        struct macio_chip *macio = &macio_chips[0];
+
+        MACIO_OUT8(param, (u8)(value & 0xff));
+        return 0;
+}
+
+#ifdef CONFIG_POWER4
+static long g5_gmac_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip *macio = &macio_chips[0];
+        unsigned long flags;
+
+        if (node == NULL)
+                return -ENODEV;
+
+        LOCK(flags);
+        if (value) {
+                MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
+                mb();
+                k2_skiplist[0] = NULL;
+        } else {
+                k2_skiplist[0] = node;
+                mb();
+                MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
+        }
+        
+        UNLOCK(flags);
+        mdelay(1);
+
+        return 0;
+}
+
+static long g5_fw_enable(struct device_node *node, long param, long value)
+{
+        struct macio_chip *macio = &macio_chips[0];
+        unsigned long flags;
+
+        if (node == NULL)
+                return -ENODEV;
+
+        LOCK(flags);
+        if (value) {
+                MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
+                mb();
+                k2_skiplist[1] = NULL;
+        } else {
+                k2_skiplist[1] = node;
+                mb();
+                MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
+        }
+        
+        UNLOCK(flags);
+        mdelay(1);
+
+        return 0;
+}
+
+static long g5_mpic_enable(struct device_node *node, long param, long value)
+{
+        unsigned long flags;
+
+        if (node->parent == NULL || strcmp(node->parent->name, "u3"))
+                return 0;
+
+        LOCK(flags);
+        UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
+        UNLOCK(flags);
+
+        return 0;
+}
+
+static long g5_eth_phy_reset(struct device_node *node, long param, long value)
+{
+        struct macio_chip *macio = &macio_chips[0];
+        struct device_node *phy;
+        int need_reset;
+
+        /*
+         * We must not reset the combo PHYs, only the BCM5221 found in
+         * the iMac G5.
+         */
+        phy = of_get_next_child(node, NULL);
+        if (!phy)
+                return -ENODEV;
+        need_reset = device_is_compatible(phy, "B5221");
+        of_node_put(phy);
+        if (!need_reset)
+                return 0;
+
+        /* PHY reset is GPIO 29, not in device-tree unfortunately */
+        MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
+                   KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
+        /* Thankfully, this is now always called at a time when we can
+         * schedule by sungem.
+         */
+        msleep(10);
+        MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
+
+        return 0;
+}
+
+static long g5_i2s_enable(struct device_node *node, long param, long value)
+{
+        /* Very crude implementation for now */
+        struct macio_chip *macio = &macio_chips[0];
+        unsigned long flags;
+
+        if (value == 0)
+                return 0; /* don't disable yet */
+
+        LOCK(flags);
+        MACIO_BIS(KEYLARGO_FCR3, KL3_CLK45_ENABLE | KL3_CLK49_ENABLE |
+                  KL3_I2S0_CLK18_ENABLE);
+        udelay(10);
+        MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_I2S0_CELL_ENABLE |
+                  K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE);
+        udelay(10);
+        MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_I2S0_RESET);
+        UNLOCK(flags);
+        udelay(10);
+
+        return 0;
+}
+
+
+#ifdef CONFIG_SMP
+static long g5_reset_cpu(struct device_node *node, long param, long value)
+{
+        unsigned int reset_io = 0;
+        unsigned long flags;
+        struct macio_chip *macio;
+        struct device_node *np;
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo2)
+                return -ENODEV;
+
+        np = find_path_device("/cpus");
+        if (np == NULL)
+                return -ENODEV;
+        for (np = np->child; np != NULL; np = np->sibling) {
+                u32 *num = (u32 *)get_property(np, "reg", NULL);
+                u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);
+                if (num == NULL || rst == NULL)
+                        continue;
+                if (param == *num) {
+                        reset_io = *rst;
+                        break;
+                }
+        }
+        if (np == NULL || reset_io == 0)
+                return -ENODEV;
+
+        LOCK(flags);
+        MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
+        (void)MACIO_IN8(reset_io);
+        udelay(1);
+        MACIO_OUT8(reset_io, 0);
+        (void)MACIO_IN8(reset_io);
+        UNLOCK(flags);
+
+        return 0;
+}
+#endif /* CONFIG_SMP */
+
+/*
+ * This can be called from pmac_smp so isn't static
+ *
+ * This takes the second CPU off the bus on dual CPU machines
+ * running UP
+ */
+void g5_phy_disable_cpu1(void)
+{
+        UN_OUT(U3_API_PHY_CONFIG_1, 0);
+}
+#endif /* CONFIG_POWER4 */
+
+#ifndef CONFIG_POWER4
+
+static void
+keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
+{
+        u32 temp;
+
+        if (sleep_mode) {
+                mdelay(1);
+                MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
+                (void)MACIO_IN32(KEYLARGO_FCR0);
+                mdelay(1);
+        }
+
+        MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
+                                KL0_SCC_CELL_ENABLE |
+                                KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
+                                KL0_IRDA_CLK19_ENABLE);
+
+        MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
+        MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
+
+        MACIO_BIC(KEYLARGO_FCR1,
+                KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
+                KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
+                KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
+                KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
+                KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
+                KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
+                KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
+                KL1_UIDE_ENABLE);
+
+        MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
+        MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
+
+        temp = MACIO_IN32(KEYLARGO_FCR3);
+        if (macio->rev >= 2) {
+                temp |= KL3_SHUTDOWN_PLL2X;
+                if (sleep_mode)
+                        temp |= KL3_SHUTDOWN_PLL_TOTAL;
+        }
+
+        temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
+                KL3_SHUTDOWN_PLLKW35;
+        if (sleep_mode)
+                temp |= KL3_SHUTDOWN_PLLKW12;
+        temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
+                | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
+        if (sleep_mode)
+                temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
+        MACIO_OUT32(KEYLARGO_FCR3, temp);
+
+        /* Flush posted writes & wait a bit */
+        (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
+}
+
+static void
+pangea_shutdown(struct macio_chip *macio, int sleep_mode)
+{
+        u32 temp;
+
+        MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
+                                KL0_SCC_CELL_ENABLE |
+                                KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
+
+        MACIO_BIC(KEYLARGO_FCR1,
+                KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
+                KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
+                KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
+                KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
+                KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
+                KL1_UIDE_ENABLE);
+        if (pmac_mb.board_flags & PMAC_MB_MOBILE)
+                MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
+
+        MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
+
+        temp = MACIO_IN32(KEYLARGO_FCR3);
+        temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
+                KL3_SHUTDOWN_PLLKW35;
+        temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
+                | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
+        if (sleep_mode)
+                temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
+        MACIO_OUT32(KEYLARGO_FCR3, temp);
+
+        /* Flush posted writes & wait a bit */
+        (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
+}
+
+static void
+intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
+{
+        u32 temp;
+
+        MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
+                  KL0_SCC_CELL_ENABLE);
+
+        MACIO_BIC(KEYLARGO_FCR1,
+                  /*KL1_USB2_CELL_ENABLE |*/
+                KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
+                KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
+                KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
+        if (pmac_mb.board_flags & PMAC_MB_MOBILE)
+                MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
+
+        temp = MACIO_IN32(KEYLARGO_FCR3);
+        temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
+                  KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
+        if (sleep_mode)
+                temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
+        MACIO_OUT32(KEYLARGO_FCR3, temp);
+
+        /* Flush posted writes & wait a bit */
+        (void)MACIO_IN32(KEYLARGO_FCR0);
+        mdelay(10);
+}
+
+
+void pmac_tweak_clock_spreading(int enable)
+{
+        struct macio_chip *macio = &macio_chips[0];
+
+        /* Hack for doing clock spreading on some machines PowerBooks and
+         * iBooks. This implements the "platform-do-clockspreading" OF
+         * property as decoded manually on various models. For safety, we also
+         * check the product ID in the device-tree in cases we'll whack the i2c
+         * chip to make reasonably sure we won't set wrong values in there
+         *
+         * Of course, ultimately, we have to implement a real parser for
+         * the platform-do-* stuff...
+         */
+
+        if (macio->type == macio_intrepid) {
+                if (enable)
+                        UN_OUT(UNI_N_CLOCK_SPREADING, 2);
+                else
+                        UN_OUT(UNI_N_CLOCK_SPREADING, 0);
+                mdelay(40);
+        }
+
+        while (machine_is_compatible("PowerBook5,2") ||
+               machine_is_compatible("PowerBook5,3") ||
+               machine_is_compatible("PowerBook6,2") ||
+               machine_is_compatible("PowerBook6,3")) {
+                struct device_node *ui2c = of_find_node_by_type(NULL, "i2c");
+                struct device_node *dt = of_find_node_by_name(NULL, "device-tree");
+                u8 buffer[9];
+                u32 *productID;
+                int i, rc, changed = 0;
+
+                if (dt == NULL)
+                        break;
+                productID = (u32 *)get_property(dt, "pid#", NULL);
+                if (productID == NULL)
+                        break;
+                while(ui2c) {
+                        struct device_node *p = of_get_parent(ui2c);
+                        if (p && !strcmp(p->name, "uni-n"))
+                                break;
+                        ui2c = of_find_node_by_type(ui2c, "i2c");
+                }
+                if (ui2c == NULL)
+                        break;
+                DBG("Trying to bump clock speed for PID: %08x...\n", *productID);
+                rc = pmac_low_i2c_open(ui2c, 1);
+                if (rc != 0)
+                        break;
+                pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);
+                rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);
+                DBG("read result: %d,", rc);
+                if (rc != 0) {
+                        pmac_low_i2c_close(ui2c);
+                        break;
+                }
+                for (i=0; i<9; i++)
+                        DBG(" %02x", buffer[i]);
+                DBG("\n");
+
+                switch(*productID) {
+                case 0x1182:    /* AlBook 12" rev 2 */
+                case 0x1183:    /* iBook G4 12" */
+                        buffer[0] = (buffer[0] & 0x8f) | 0x70;
+                        buffer[2] = (buffer[2] & 0x7f) | 0x00;
+                        buffer[5] = (buffer[5] & 0x80) | 0x31;
+                        buffer[6] = (buffer[6] & 0x40) | 0xb0;
+                        buffer[7] = (buffer[7] & 0x00) | (enable ? 0xc0 : 0xba);
+                        buffer[8] = (buffer[8] & 0x00) | 0x30;
+                        changed = 1;
+                        break;
+                case 0x3142:    /* AlBook 15" (ATI M10) */
+                case 0x3143:    /* AlBook 17" (ATI M10) */
+                        buffer[0] = (buffer[0] & 0xaf) | 0x50;
+                        buffer[2] = (buffer[2] & 0x7f) | 0x00;
+                        buffer[5] = (buffer[5] & 0x80) | 0x31;
+                        buffer[6] = (buffer[6] & 0x40) | 0xb0;
+                        buffer[7] = (buffer[7] & 0x00) | (enable ? 0xd0 : 0xc0);
+                        buffer[8] = (buffer[8] & 0x00) | 0x30;
+                        changed = 1;
+                        break;
+                default:
+                        DBG("i2c-hwclock: Machine model not handled\n");
+                        break;
+                }
+                if (!changed) {
+                        pmac_low_i2c_close(ui2c);
+                        break;
+                }
+                pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub);
+                rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9);
+                DBG("write result: %d,", rc);
+                pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);
+                rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);
+                DBG("read result: %d,", rc);
+                if (rc != 0) {
+                        pmac_low_i2c_close(ui2c);
+                        break;
+                }
+                for (i=0; i<9; i++)
+                        DBG(" %02x", buffer[i]);
+                pmac_low_i2c_close(ui2c);
+                break;
+        }
+}
+
+
+static int
+core99_sleep(void)
+{
+        struct macio_chip *macio;
+        int i;
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo && macio->type != macio_pangea &&
+            macio->type != macio_intrepid)
+                return -ENODEV;
+
+        /* We power off the wireless slot in case it was not done
+         * by the driver. We don't power it on automatically however
+         */
+        if (macio->flags & MACIO_FLAG_AIRPORT_ON)
+                core99_airport_enable(macio->of_node, 0, 0);
+
+        /* We power off the FW cable. Should be done by the driver... */
+        if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
+                core99_firewire_enable(NULL, 0, 0);
+                core99_firewire_cable_power(NULL, 0, 0);
+        }
+
+        /* We make sure int. modem is off (in case driver lost it) */
+        if (macio->type == macio_keylargo)
+                core99_modem_enable(macio->of_node, 0, 0);
+        else
+                pangea_modem_enable(macio->of_node, 0, 0);
+
+        /* We make sure the sound is off as well */
+        core99_sound_chip_enable(macio->of_node, 0, 0);
+
+        /*
+         * Save various bits of KeyLargo
+         */
+
+        /* Save the state of the various GPIOs */
+        save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
+        save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
+        for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
+                save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
+        for (i=0; i<KEYLARGO_GPIO_CNT; i++)
+                save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
+
+        /* Save the FCRs */
+        if (macio->type == macio_keylargo)
+                save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
+        save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
+        save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
+        save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
+        save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
+        save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
+        if (macio->type == macio_pangea || macio->type == macio_intrepid)
+                save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
+
+        /* Save state & config of DBDMA channels */
+        dbdma_save(macio, save_dbdma);
+
+        /*
+         * Turn off as much as we can
+         */
+        if (macio->type == macio_pangea)
+                pangea_shutdown(macio, 1);
+        else if (macio->type == macio_intrepid)
+                intrepid_shutdown(macio, 1);
+        else if (macio->type == macio_keylargo)
+                keylargo_shutdown(macio, 1);
+
+        /*
+         * Put the host bridge to sleep
+         */
+
+        save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
+        /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
+         * enabled !
+         */
+        UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
+               ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
+        udelay(100);
+        UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
+        UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
+        mdelay(10);
+
+        /*
+         * FIXME: A bit of black magic with OpenPIC (don't ask me why)
+         */
+        if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
+                MACIO_BIS(0x506e0, 0x00400000);
+                MACIO_BIS(0x506e0, 0x80000000);
+        }
+        return 0;
+}
+
+static int
+core99_wake_up(void)
+{
+        struct macio_chip *macio;
+        int i;
+
+        macio = &macio_chips[0];
+        if (macio->type != macio_keylargo && macio->type != macio_pangea &&
+            macio->type != macio_intrepid)
+                return -ENODEV;
+
+        /*
+         * Wakeup the host bridge
+         */
+        UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
+        udelay(10);
+        UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
+        udelay(10);
+
+        /*
+         * Restore KeyLargo
+         */
+
+        if (macio->type == macio_keylargo) {
+                MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
+                (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
+        }
+        MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
+        (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
+        MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
+        (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
+        MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
+        (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
+        MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
+        (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
+        MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
+        (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
+        if (macio->type == macio_pangea || macio->type == macio_intrepid) {
+                MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
+                (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
+        }
+
+        dbdma_restore(macio, save_dbdma);
+
+        MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
+        MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
+        for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
+                MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
+        for (i=0; i<KEYLARGO_GPIO_CNT; i++)
+                MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
+
+        /* FIXME more black magic with OpenPIC ... */
+        if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
+                MACIO_BIC(0x506e0, 0x00400000);
+                MACIO_BIC(0x506e0, 0x80000000);
+        }
+
+        UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
+        udelay(100);
+
+        return 0;
+}
+
+static long
+core99_sleep_state(struct device_node *node, long param, long value)
+{
+        /* Param == 1 means to enter the "fake sleep" mode that is
+         * used for CPU speed switch
+         */
+        if (param == 1) {
+                if (value == 1) {
+                        UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
+                        UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
+                } else {
+                        UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
+                        udelay(10);
+                        UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
+                        udelay(10);
+                }
+                return 0;
+        }
+        if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
+                return -EPERM;
+
+        if (value == 1)
+                return core99_sleep();
+        else if (value == 0)
+                return core99_wake_up();
+        return 0;
+}
+
+#endif /* CONFIG_POWER4 */
+
+static long
+generic_dev_can_wake(struct device_node *node, long param, long value)
+{
+        /* Todo: eventually check we are really dealing with on-board
+         * video device ...
+         */
+
+        if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
+                pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
+        return 0;
+}
+
+static long generic_get_mb_info(struct device_node *node, long param, long value)
+{
+        switch(param) {
+                case PMAC_MB_INFO_MODEL:
+                        return pmac_mb.model_id;
+                case PMAC_MB_INFO_FLAGS:
+                        return pmac_mb.board_flags;
+                case PMAC_MB_INFO_NAME:
+                        /* hack hack hack... but should work */
+                        *((const char **)value) = pmac_mb.model_name;
+                        return 0;
+        }
+        return -EINVAL;
+}
+
+
+/*
+ * Table definitions
+ */
+
+/* Used on any machine
+ */
+static struct feature_table_entry any_features[] = {
+        { PMAC_FTR_GET_MB_INFO,         generic_get_mb_info },
+        { PMAC_FTR_DEVICE_CAN_WAKE,     generic_dev_can_wake },
+        { 0, NULL }
+};
+
+#ifndef CONFIG_POWER4
+
+/* OHare based motherboards. Currently, we only use these on the
+ * 2400,3400 and 3500 series powerbooks. Some older desktops seem
+ * to have issues with turning on/off those asic cells
+ */
+static struct feature_table_entry ohare_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
+        { PMAC_FTR_SWIM3_ENABLE,        ohare_floppy_enable },
+        { PMAC_FTR_MESH_ENABLE,         ohare_mesh_enable },
+        { PMAC_FTR_IDE_ENABLE,          ohare_ide_enable},
+        { PMAC_FTR_IDE_RESET,           ohare_ide_reset},
+        { PMAC_FTR_SLEEP_STATE,         ohare_sleep_state },
+        { 0, NULL }
+};
+
+/* Heathrow desktop machines (Beige G3).
+ * Separated as some features couldn't be properly tested
+ * and the serial port control bits appear to confuse it.
+ */
+static struct feature_table_entry heathrow_desktop_features[] = {
+        { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
+        { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
+        { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
+        { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
+        { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
+        { 0, NULL }
+};
+
+/* Heathrow based laptop, that is the Wallstreet and mainstreet
+ * powerbooks.
+ */
+static struct feature_table_entry heathrow_laptop_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
+        { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
+        { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
+        { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
+        { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
+        { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
+        { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
+        { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
+        { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
+        { 0, NULL }
+};
+
+/* Paddington based machines
+ * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
+ */
+static struct feature_table_entry paddington_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
+        { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
+        { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
+        { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
+        { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
+        { PMAC_FTR_IDE_RESET,           heathrow_ide_reset },
+        { PMAC_FTR_BMAC_ENABLE,         heathrow_bmac_enable },
+        { PMAC_FTR_SOUND_CHIP_ENABLE,   heathrow_sound_enable },
+        { PMAC_FTR_SLEEP_STATE,         heathrow_sleep_state },
+        { 0, NULL }
+};
+
+/* Core99 & MacRISC 2 machines (all machines released since the
+ * iBook (included), that is all AGP machines, except pangea
+ * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
+ * used on iBook2 & iMac "flow power".
+ */
+static struct feature_table_entry core99_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
+        { PMAC_FTR_MODEM_ENABLE,        core99_modem_enable },
+        { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
+        { PMAC_FTR_IDE_RESET,           core99_ide_reset },
+        { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
+        { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
+        { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
+        { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
+        { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
+        { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
+        { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
+        { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
+#ifdef CONFIG_SMP
+        { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
+#endif /* CONFIG_SMP */
+        { PMAC_FTR_READ_GPIO,           core99_read_gpio },
+        { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
+        { 0, NULL }
+};
+
+/* RackMac
+ */
+static struct feature_table_entry rackmac_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
+        { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
+        { PMAC_FTR_IDE_RESET,           core99_ide_reset },
+        { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
+        { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
+        { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
+        { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
+        { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
+        { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
+#ifdef CONFIG_SMP
+        { PMAC_FTR_RESET_CPU,           core99_reset_cpu },
+#endif /* CONFIG_SMP */
+        { PMAC_FTR_READ_GPIO,           core99_read_gpio },
+        { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
+        { 0, NULL }
+};
+
+/* Pangea features
+ */
+static struct feature_table_entry pangea_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
+        { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
+        { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
+        { PMAC_FTR_IDE_RESET,           core99_ide_reset },
+        { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
+        { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
+        { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
+        { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
+        { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
+        { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
+        { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
+        { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
+        { PMAC_FTR_READ_GPIO,           core99_read_gpio },
+        { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
+        { 0, NULL }
+};
+
+/* Intrepid features
+ */
+static struct feature_table_entry intrepid_features[] = {
+        { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
+        { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
+        { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
+        { PMAC_FTR_IDE_RESET,           core99_ide_reset },
+        { PMAC_FTR_GMAC_ENABLE,         core99_gmac_enable },
+        { PMAC_FTR_GMAC_PHY_RESET,      core99_gmac_phy_reset },
+        { PMAC_FTR_SOUND_CHIP_ENABLE,   core99_sound_chip_enable },
+        { PMAC_FTR_AIRPORT_ENABLE,      core99_airport_enable },
+        { PMAC_FTR_USB_ENABLE,          core99_usb_enable },
+        { PMAC_FTR_1394_ENABLE,         core99_firewire_enable },
+        { PMAC_FTR_1394_CABLE_POWER,    core99_firewire_cable_power },
+        { PMAC_FTR_SLEEP_STATE,         core99_sleep_state },
+        { PMAC_FTR_READ_GPIO,           core99_read_gpio },
+        { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
+        { PMAC_FTR_AACK_DELAY_ENABLE,   intrepid_aack_delay_enable },
+        { 0, NULL }
+};
+
+#else /* CONFIG_POWER4 */
+
+/* G5 features
+ */
+static struct feature_table_entry g5_features[] = {
+        { PMAC_FTR_GMAC_ENABLE,         g5_gmac_enable },
+        { PMAC_FTR_1394_ENABLE,         g5_fw_enable },
+        { PMAC_FTR_ENABLE_MPIC,         g5_mpic_enable },
+        { PMAC_FTR_GMAC_PHY_RESET,      g5_eth_phy_reset },
+        { PMAC_FTR_SOUND_CHIP_ENABLE,   g5_i2s_enable },
+#ifdef CONFIG_SMP
+        { PMAC_FTR_RESET_CPU,           g5_reset_cpu },
+#endif /* CONFIG_SMP */
+        { PMAC_FTR_READ_GPIO,           core99_read_gpio },
+        { PMAC_FTR_WRITE_GPIO,          core99_write_gpio },
+        { 0, NULL }
+};
+
+#endif /* CONFIG_POWER4 */
+
+static struct pmac_mb_def pmac_mb_defs[] = {
+#ifndef CONFIG_POWER4
+        /*
+         * Desktops
+         */
+
+        {       "AAPL,8500",                    "PowerMac 8500/8600",
+                PMAC_TYPE_PSURGE,               NULL,
+                0
+        },
+        {       "AAPL,9500",                    "PowerMac 9500/9600",
+                PMAC_TYPE_PSURGE,               NULL,
+                0
+        },
+        {       "AAPL,7200",                    "PowerMac 7200",
+                PMAC_TYPE_PSURGE,               NULL,
+                0
+        },
+        {       "AAPL,7300",                    "PowerMac 7200/7300",
+                PMAC_TYPE_PSURGE,               NULL,
+                0
+        },
+        {       "AAPL,7500",                    "PowerMac 7500",
+                PMAC_TYPE_PSURGE,               NULL,
+                0
+        },
+        {       "AAPL,ShinerESB",               "Apple Network Server",
+                PMAC_TYPE_ANS,                  NULL,
+                0
+        },
+        {       "AAPL,e407",                    "Alchemy",
+                PMAC_TYPE_ALCHEMY,              NULL,
+                0
+        },
+        {       "AAPL,e411",                    "Gazelle",
+                PMAC_TYPE_GAZELLE,              NULL,
+                0
+        },
+        {       "AAPL,Gossamer",                "PowerMac G3 (Gossamer)",
+                PMAC_TYPE_GOSSAMER,             heathrow_desktop_features,
+                0
+        },
+        {       "AAPL,PowerMac G3",             "PowerMac G3 (Silk)",
+                PMAC_TYPE_SILK,                 heathrow_desktop_features,
+                0
+        },
+        {       "PowerMac1,1",                  "Blue&White G3",
+                PMAC_TYPE_YOSEMITE,             paddington_features,
+                0
+        },
+        {       "PowerMac1,2",                  "PowerMac G4 PCI Graphics",
+                PMAC_TYPE_YIKES,                paddington_features,
+                0
+        },
+        {       "PowerMac2,1",                  "iMac FireWire",
+                PMAC_TYPE_FW_IMAC,              core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+        },
+        {       "PowerMac2,2",                  "iMac FireWire",
+                PMAC_TYPE_FW_IMAC,              core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+        },
+        {       "PowerMac3,1",                  "PowerMac G4 AGP Graphics",
+                PMAC_TYPE_SAWTOOTH,             core99_features,
+                PMAC_MB_OLD_CORE99
+        },
+        {       "PowerMac3,2",                  "PowerMac G4 AGP Graphics",
+                PMAC_TYPE_SAWTOOTH,             core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+        },
+        {       "PowerMac3,3",                  "PowerMac G4 AGP Graphics",
+                PMAC_TYPE_SAWTOOTH,             core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+        },
+        {       "PowerMac3,4",                  "PowerMac G4 Silver",
+                PMAC_TYPE_QUICKSILVER,          core99_features,
+                PMAC_MB_MAY_SLEEP
+        },
+        {       "PowerMac3,5",                  "PowerMac G4 Silver",
+                PMAC_TYPE_QUICKSILVER,          core99_features,
+                PMAC_MB_MAY_SLEEP
+        },
+        {       "PowerMac3,6",                  "PowerMac G4 Windtunnel",
+                PMAC_TYPE_WINDTUNNEL,           core99_features,
+                PMAC_MB_MAY_SLEEP,
+        },
+        {       "PowerMac4,1",                  "iMac \"Flower Power\"",
+                PMAC_TYPE_PANGEA_IMAC,          pangea_features,
+                PMAC_MB_MAY_SLEEP
+        },
+        {       "PowerMac4,2",                  "Flat panel iMac",
+                PMAC_TYPE_FLAT_PANEL_IMAC,      pangea_features,
+                PMAC_MB_CAN_SLEEP
+        },
+        {       "PowerMac4,4",                  "eMac",
+                PMAC_TYPE_EMAC,                 core99_features,
+                PMAC_MB_MAY_SLEEP
+        },
+        {       "PowerMac5,1",                  "PowerMac G4 Cube",
+                PMAC_TYPE_CUBE,                 core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
+        },
+        {       "PowerMac6,1",                  "Flat panel iMac",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP,
+        },
+        {       "PowerMac6,3",                  "Flat panel iMac",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP,
+        },
+        {       "PowerMac6,4",                  "eMac",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP,
+        },
+        {       "PowerMac10,1",                 "Mac mini",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
+        },
+        {       "iMac,1",                       "iMac (first generation)",
+                PMAC_TYPE_ORIG_IMAC,            paddington_features,
+                0
+        },
+
+        /*
+         * Xserve's
+         */
+
+        {       "RackMac1,1",                   "XServe",
+                PMAC_TYPE_RACKMAC,              rackmac_features,
+                0,
+        },
+        {       "RackMac1,2",                   "XServe rev. 2",
+                PMAC_TYPE_RACKMAC,              rackmac_features,
+                0,
+        },
+
+        /*
+         * Laptops
+         */
+
+        {       "AAPL,3400/2400",               "PowerBook 3400",
+                PMAC_TYPE_HOOPER,               ohare_features,
+                PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+        },
+        {       "AAPL,3500",                    "PowerBook 3500",
+                PMAC_TYPE_KANGA,                ohare_features,
+                PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+        },
+        {       "AAPL,PowerBook1998",           "PowerBook Wallstreet",
+                PMAC_TYPE_WALLSTREET,           heathrow_laptop_features,
+                PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+        },
+        {       "PowerBook1,1",                 "PowerBook 101 (Lombard)",
+                PMAC_TYPE_101_PBOOK,            paddington_features,
+                PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
+        },
+        {       "PowerBook2,1",                 "iBook (first generation)",
+                PMAC_TYPE_ORIG_IBOOK,           core99_features,
+                PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
+        },
+        {       "PowerBook2,2",                 "iBook FireWire",
+                PMAC_TYPE_FW_IBOOK,             core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
+                PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
+        },
+        {       "PowerBook3,1",                 "PowerBook Pismo",
+                PMAC_TYPE_PISMO,                core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
+                PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
+        },
+        {       "PowerBook3,2",                 "PowerBook Titanium",
+                PMAC_TYPE_TITANIUM,             core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook3,3",                 "PowerBook Titanium II",
+                PMAC_TYPE_TITANIUM2,            core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook3,4",                 "PowerBook Titanium III",
+                PMAC_TYPE_TITANIUM3,            core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook3,5",                 "PowerBook Titanium IV",
+                PMAC_TYPE_TITANIUM4,            core99_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook4,1",                 "iBook 2",
+                PMAC_TYPE_IBOOK2,               pangea_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook4,2",                 "iBook 2",
+                PMAC_TYPE_IBOOK2,               pangea_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook4,3",                 "iBook 2 rev. 2",
+                PMAC_TYPE_IBOOK2,               pangea_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
+        },
+        {       "PowerBook5,1",                 "PowerBook G4 17\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook5,2",                 "PowerBook G4 15\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook5,3",                 "PowerBook G4 17\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook5,4",                 "PowerBook G4 15\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook5,5",                 "PowerBook G4 17\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook5,6",                 "PowerBook G4 15\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook5,7",                 "PowerBook G4 17\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,1",                 "PowerBook G4 12\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,2",                 "PowerBook G4",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,3",                 "iBook G4",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,4",                 "PowerBook G4 12\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,5",                 "iBook G4",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,7",                 "iBook G4",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+        {       "PowerBook6,8",                 "PowerBook G4 12\"",
+                PMAC_TYPE_UNKNOWN_INTREPID,     intrepid_features,
+                PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
+        },
+#else /* CONFIG_POWER4 */
+        {       "PowerMac7,2",                  "PowerMac G5",
+                PMAC_TYPE_POWERMAC_G5,          g5_features,
+                0,
+        },
+#ifdef CONFIG_PPC64
+        {       "PowerMac7,3",                  "PowerMac G5",
+                PMAC_TYPE_POWERMAC_G5,          g5_features,
+                0,
+        },
+        {       "PowerMac8,1",                  "iMac G5",
+                PMAC_TYPE_IMAC_G5,              g5_features,
+                0,
+        },
+        {       "PowerMac9,1",                  "PowerMac G5",
+                PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
+                0,
+        },
+        {       "RackMac3,1",                   "XServe G5",
+                PMAC_TYPE_XSERVE_G5,            g5_features,
+                0,
+        },
+#endif /* CONFIG_PPC64 */
+#endif /* CONFIG_POWER4 */
+};
+
+/*
+ * The toplevel feature_call callback
+ */
+long pmac_do_feature_call(unsigned int selector, ...)
+{
+        struct device_node *node;
+        long param, value;
+        int i;
+        feature_call func = NULL;
+        va_list args;
+
+        if (pmac_mb.features)
+                for (i=0; pmac_mb.features[i].function; i++)
+                        if (pmac_mb.features[i].selector == selector) {
+                                func = pmac_mb.features[i].function;
+                                break;
+                        }
+        if (!func)
+                for (i=0; any_features[i].function; i++)
+                        if (any_features[i].selector == selector) {
+                                func = any_features[i].function;
+                                break;
+                        }
+        if (!func)
+                return -ENODEV;
+
+        va_start(args, selector);
+        node = (struct device_node*)va_arg(args, void*);
+        param = va_arg(args, long);
+        value = va_arg(args, long);
+        va_end(args);
+
+        return func(node, param, value);
+}
+
+static int __init probe_motherboard(void)
+{
+        int i;
+        struct macio_chip *macio = &macio_chips[0];
+        const char *model = NULL;
+        struct device_node *dt;
+
+        /* Lookup known motherboard type in device-tree. First try an
+         * exact match on the "model" property, then try a "compatible"
+         * match is none is found.
+         */
+        dt = find_devices("device-tree");
+        if (dt != NULL)
+                model = (const char *) get_property(dt, "model", NULL);
+        for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
+            if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
+                pmac_mb = pmac_mb_defs[i];
+                goto found;
+            }
+        }
+        for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
+            if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
+                pmac_mb = pmac_mb_defs[i];
+                goto found;
+            }
+        }
+
+        /* Fallback to selection depending on mac-io chip type */
+        switch(macio->type) {
+#ifndef CONFIG_POWER4
+            case macio_grand_central:
+                pmac_mb.model_id = PMAC_TYPE_PSURGE;
+                pmac_mb.model_name = "Unknown PowerSurge";
+                break;
+            case macio_ohare:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
+                pmac_mb.model_name = "Unknown OHare-based";
+                break;
+            case macio_heathrow:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
+                pmac_mb.model_name = "Unknown Heathrow-based";
+                pmac_mb.features = heathrow_desktop_features;
+                break;
+            case macio_paddington:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
+                pmac_mb.model_name = "Unknown Paddington-based";
+                pmac_mb.features = paddington_features;
+                break;
+            case macio_keylargo:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
+                pmac_mb.model_name = "Unknown Keylargo-based";
+                pmac_mb.features = core99_features;
+                break;
+            case macio_pangea:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
+                pmac_mb.model_name = "Unknown Pangea-based";
+                pmac_mb.features = pangea_features;
+                break;
+            case macio_intrepid:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
+                pmac_mb.model_name = "Unknown Intrepid-based";
+                pmac_mb.features = intrepid_features;
+                break;
+#else /* CONFIG_POWER4 */
+        case macio_keylargo2:
+                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
+                pmac_mb.model_name = "Unknown K2-based";
+                pmac_mb.features = g5_features;
+                break;
+#endif /* CONFIG_POWER4 */
+        default:
+                return -ENODEV;
+        }
+found:
+#ifndef CONFIG_POWER4
+        /* Fixup Hooper vs. Comet */
+        if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
+                u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
+                if (!mach_id_ptr)
+                        return -ENODEV;
+                /* Here, I used to disable the media-bay on comet. It
+                 * appears this is wrong, the floppy connector is actually
+                 * a kind of media-bay and works with the current driver.
+                 */
+                if (__raw_readl(mach_id_ptr) & 0x20000000UL)
+                        pmac_mb.model_id = PMAC_TYPE_COMET;
+                iounmap(mach_id_ptr);
+        }
+#endif /* CONFIG_POWER4 */
+
+#ifdef CONFIG_6xx
+        /* Set default value of powersave_nap on machines that support it.
+         * It appears that uninorth rev 3 has a problem with it, we don't
+         * enable it on those. In theory, the flush-on-lock property is
+         * supposed to be set when not supported, but I'm not very confident
+         * that all Apple OF revs did it properly, I do it the paranoid way.
+         */
+        while (uninorth_base && uninorth_rev > 3) {
+                struct device_node *np = find_path_device("/cpus");
+                if (!np || !np->child) {
+                        printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
+                        break;
+                }
+                np = np->child;
+                /* Nap mode not supported on SMP */
+                if (np->sibling)
+                        break;
+                /* Nap mode not supported if flush-on-lock property is present */
+                if (get_property(np, "flush-on-lock", NULL))
+                        break;
+                powersave_nap = 1;
+                printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
+                break;
+        }
+
+        /* On CPUs that support it (750FX), lowspeed by default during
+         * NAP mode
+         */
+        powersave_lowspeed = 1;
+#endif /* CONFIG_6xx */
+#ifdef CONFIG_POWER4
+        powersave_nap = 1;
+#endif
+        /* Check for "mobile" machine */
+        if (model && (strncmp(model, "PowerBook", 9) == 0
+                   || strncmp(model, "iBook", 5) == 0))
+                pmac_mb.board_flags |= PMAC_MB_MOBILE;
+
+
+        printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
+        return 0;
+}
+
+/* Initialize the Core99 UniNorth host bridge and memory controller
+ */
+static void __init probe_uninorth(void)
+{
+        unsigned long actrl;
+
+        /* Locate core99 Uni-N */
+        uninorth_node = of_find_node_by_name(NULL, "uni-n");
+        /* Locate G5 u3 */
+        if (uninorth_node == NULL) {
+                uninorth_node = of_find_node_by_name(NULL, "u3");
+                uninorth_u3 = 1;
+        }
+        if (uninorth_node && uninorth_node->n_addrs > 0) {
+                unsigned long address = uninorth_node->addrs[0].address;
+                uninorth_base = ioremap(address, 0x40000);
+                uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
+                if (uninorth_u3)
+                        u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
+        } else
+                uninorth_node = NULL;
+
+        if (!uninorth_node)
+                return;
+
+        printk(KERN_INFO "Found %s memory controller & host bridge, revision: %d\n",
+               uninorth_u3 ? "U3" : "UniNorth", uninorth_rev);
+        printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
+
+        /* Set the arbitrer QAck delay according to what Apple does
+         */
+        if (uninorth_rev < 0x11) {
+                actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
+                actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
+                        UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
+                UN_OUT(UNI_N_ARB_CTRL, actrl);
+        }
+
+        /* Some more magic as done by them in recent MacOS X on UniNorth
+         * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
+         * memory timeout
+         */
+        if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0)
+                UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
+}
+
+static void __init probe_one_macio(const char *name, const char *compat, int type)
+{
+        struct device_node*     node;
+        int                     i;
+        volatile u32 __iomem *  base;
+        u32*                    revp;
+
+        node = find_devices(name);
+        if (!node || !node->n_addrs)
+                return;
+        if (compat)
+                do {
+                        if (device_is_compatible(node, compat))
+                                break;
+                        node = node->next;
+                } while (node);
+        if (!node)
+                return;
+        for(i=0; i<MAX_MACIO_CHIPS; i++) {
+                if (!macio_chips[i].of_node)
+                        break;
+                if (macio_chips[i].of_node == node)
+                        return;
+        }
+        if (i >= MAX_MACIO_CHIPS) {
+                printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
+                printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
+                return;
+        }
+        base = ioremap(node->addrs[0].address, node->addrs[0].size);
+        if (!base) {
+                printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
+                return;
+        }
+        if (type == macio_keylargo) {
+                u32 *did = (u32 *)get_property(node, "device-id", NULL);
+                if (*did == 0x00000025)
+                        type = macio_pangea;
+                if (*did == 0x0000003e)
+                        type = macio_intrepid;
+        }
+        macio_chips[i].of_node  = node;
+        macio_chips[i].type     = type;
+        macio_chips[i].base     = base;
+        macio_chips[i].flags    = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
+        macio_chips[i].name     = macio_names[type];
+        revp = (u32 *)get_property(node, "revision-id", NULL);
+        if (revp)
+                macio_chips[i].rev = *revp;
+        printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
+                macio_names[type], macio_chips[i].rev, macio_chips[i].base);
+}
+
+static int __init
+probe_macios(void)
+{
+        /* Warning, ordering is important */
+        probe_one_macio("gc", NULL, macio_grand_central);
+        probe_one_macio("ohare", NULL, macio_ohare);
+        probe_one_macio("pci106b,7", NULL, macio_ohareII);
+        probe_one_macio("mac-io", "keylargo", macio_keylargo);
+        probe_one_macio("mac-io", "paddington", macio_paddington);
+        probe_one_macio("mac-io", "gatwick", macio_gatwick);
+        probe_one_macio("mac-io", "heathrow", macio_heathrow);
+        probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
+
+        /* Make sure the "main" macio chip appear first */
+        if (macio_chips[0].type == macio_gatwick
+            && macio_chips[1].type == macio_heathrow) {
+                struct macio_chip temp = macio_chips[0];
+                macio_chips[0] = macio_chips[1];
+                macio_chips[1] = temp;
+        }
+        if (macio_chips[0].type == macio_ohareII
+            && macio_chips[1].type == macio_ohare) {
+                struct macio_chip temp = macio_chips[0];
+                macio_chips[0] = macio_chips[1];
+                macio_chips[1] = temp;
+        }
+        macio_chips[0].lbus.index = 0;
+        macio_chips[1].lbus.index = 1;
+
+        return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
+}
+
+static void __init
+initial_serial_shutdown(struct device_node *np)
+{
+        int len;
+        struct slot_names_prop {
+                int     count;
+                char    name[1];
+        } *slots;
+        char *conn;
+        int port_type = PMAC_SCC_ASYNC;
+        int modem = 0;
+
+        slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
+        conn = get_property(np, "AAPL,connector", &len);
+        if (conn && (strcmp(conn, "infrared") == 0))
+                port_type = PMAC_SCC_IRDA;
+        else if (device_is_compatible(np, "cobalt"))
+                modem = 1;
+        else if (slots && slots->count > 0) {
+                if (strcmp(slots->name, "IrDA") == 0)
+                        port_type = PMAC_SCC_IRDA;
+                else if (strcmp(slots->name, "Modem") == 0)
+                        modem = 1;
+        }
+        if (modem)
+                pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
+        pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
+}
+
+static void __init
+set_initial_features(void)
+{
+        struct device_node *np;
+
+        /* That hack appears to be necessary for some StarMax motherboards
+         * but I'm not too sure it was audited for side-effects on other
+         * ohare based machines...
+         * Since I still have difficulties figuring the right way to
+         * differenciate them all and since that hack was there for a long
+         * time, I'll keep it around
+         */
+        if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
+                struct macio_chip *macio = &macio_chips[0];
+                MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
+        } else if (macio_chips[0].type == macio_ohare) {
+                struct macio_chip *macio = &macio_chips[0];
+                MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
+        } else if (macio_chips[1].type == macio_ohare) {
+                struct macio_chip *macio = &macio_chips[1];
+                MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
+        }
+
+#ifdef CONFIG_POWER4
+        if (macio_chips[0].type == macio_keylargo2) {
+#ifndef CONFIG_SMP
+                /* On SMP machines running UP, we have the second CPU eating
+                 * bus cycles. We need to take it off the bus. This is done
+                 * from pmac_smp for SMP kernels running on one CPU
+                 */
+                np = of_find_node_by_type(NULL, "cpu");
+                if (np != NULL)
+                        np = of_find_node_by_type(np, "cpu");
+                if (np != NULL) {
+                        g5_phy_disable_cpu1();
+                        of_node_put(np);
+                }
+#endif /* CONFIG_SMP */
+                /* Enable GMAC for now for PCI probing. It will be disabled
+                 * later on after PCI probe
+                 */
+                np = of_find_node_by_name(NULL, "ethernet");
+                while(np) {
+                        if (device_is_compatible(np, "K2-GMAC"))
+                                g5_gmac_enable(np, 0, 1);
+                        np = of_find_node_by_name(np, "ethernet");
+                }
+
+                /* Enable FW before PCI probe. Will be disabled later on
+                 * Note: We should have a batter way to check that we are
+                 * dealing with uninorth internal cell and not a PCI cell
+                 * on the external PCI. The code below works though.
+                 */
+                np = of_find_node_by_name(NULL, "firewire");
+                while(np) {
+                        if (device_is_compatible(np, "pci106b,5811")) {
+                                macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
+                                g5_fw_enable(np, 0, 1);
+                        }
+                        np = of_find_node_by_name(np, "firewire");
+                }
+        }
+#else /* CONFIG_POWER4 */
+
+        if (macio_chips[0].type == macio_keylargo ||
+            macio_chips[0].type == macio_pangea ||
+            macio_chips[0].type == macio_intrepid) {
+                /* Enable GMAC for now for PCI probing. It will be disabled
+                 * later on after PCI probe
+                 */
+                np = of_find_node_by_name(NULL, "ethernet");
+                while(np) {
+                        if (np->parent
+                            && device_is_compatible(np->parent, "uni-north")
+                            && device_is_compatible(np, "gmac"))
+                                core99_gmac_enable(np, 0, 1);
+                        np = of_find_node_by_name(np, "ethernet");
+                }
+
+                /* Enable FW before PCI probe. Will be disabled later on
+                 * Note: We should have a batter way to check that we are
+                 * dealing with uninorth internal cell and not a PCI cell
+                 * on the external PCI. The code below works though.
+                 */
+                np = of_find_node_by_name(NULL, "firewire");
+                while(np) {
+                        if (np->parent
+                            && device_is_compatible(np->parent, "uni-north")
+                            && (device_is_compatible(np, "pci106b,18") ||
+                                device_is_compatible(np, "pci106b,30") ||
+                                device_is_compatible(np, "pci11c1,5811"))) {
+                                macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
+                                core99_firewire_enable(np, 0, 1);
+                        }
+                        np = of_find_node_by_name(np, "firewire");
+                }
+
+                /* Enable ATA-100 before PCI probe. */
+                np = of_find_node_by_name(NULL, "ata-6");
+                while(np) {
+                        if (np->parent
+                            && device_is_compatible(np->parent, "uni-north")
+                            && device_is_compatible(np, "kauai-ata")) {
+                                core99_ata100_enable(np, 1);
+                        }
+                        np = of_find_node_by_name(np, "ata-6");
+                }
+
+                /* Switch airport off */
+                np = find_devices("radio");
+                while(np) {
+                        if (np && np->parent == macio_chips[0].of_node) {
+                                macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
+                                core99_airport_enable(np, 0, 0);
+                        }
+                        np = np->next;
+                }
+        }
+
+        /* On all machines that support sound PM, switch sound off */
+        if (macio_chips[0].of_node)
+                pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
+                        macio_chips[0].of_node, 0, 0);
+
+        /* While on some desktop G3s, we turn it back on */
+        if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
+                && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
+                    pmac_mb.model_id == PMAC_TYPE_SILK)) {
+                struct macio_chip *macio = &macio_chips[0];
+                MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
+                MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
+        }
+
+        /* Some machine models need the clock chip to be properly setup for
+         * clock spreading now. This should be a platform function but we
+         * don't do these at the moment
+         */
+        pmac_tweak_clock_spreading(1);
+
+#endif /* CONFIG_POWER4 */
+
+        /* On all machines, switch modem & serial ports off */
+        np = find_devices("ch-a");
+        while(np) {
+                initial_serial_shutdown(np);
+                np = np->next;
+        }
+        np = find_devices("ch-b");
+        while(np) {
+                initial_serial_shutdown(np);
+                np = np->next;
+        }
+}
+
+void __init
+pmac_feature_init(void)
+{
+        /* Detect the UniNorth memory controller */
+        probe_uninorth();
+
+        /* Probe mac-io controllers */
+        if (probe_macios()) {
+                printk(KERN_WARNING "No mac-io chip found\n");
+                return;
+        }
+
+        /* Setup low-level i2c stuffs */
+        pmac_init_low_i2c();
+
+        /* Probe machine type */
+        if (probe_motherboard())
+                printk(KERN_WARNING "Unknown PowerMac !\n");
+
+        /* Set some initial features (turn off some chips that will
+         * be later turned on)
+         */
+        set_initial_features();
+}
+
+int __init pmac_feature_late_init(void)
+{
+#if 0
+        struct device_node *np;
+
+        /* Request some resources late */
+        if (uninorth_node)
+                request_OF_resource(uninorth_node, 0, NULL);
+        np = find_devices("hammerhead");
+        if (np)
+                request_OF_resource(np, 0, NULL);
+        np = find_devices("interrupt-controller");
+        if (np)
+                request_OF_resource(np, 0, NULL);
+#endif
+        return 0;
+}
+
+device_initcall(pmac_feature_late_init);
+
+#if 0
+static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
+{
+        int     freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
+        int     bits[8] = { 8,16,0,32,2,4,0,0 };
+        int     freq = (frq >> 8) & 0xf;
+
+        if (freqs[freq] == 0)
+                printk("%s: Unknown HT link frequency %x\n", name, freq);
+        else
+                printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
+                       name, freqs[freq],
+                       bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
+}
+
+void __init pmac_check_ht_link(void)
+{
+        u32     ufreq, freq, ucfg, cfg;
+        struct device_node *pcix_node;
+        u8      px_bus, px_devfn;
+        struct pci_controller *px_hose;
+
+        (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
+        ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
+        ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
+        dump_HT_speeds("U3 HyperTransport", cfg, freq);
+
+        pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
+        if (pcix_node == NULL) {
+                printk("No PCI-X bridge found\n");
+                return;
+        }
+        if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
+                printk("PCI-X bridge found but not matched to pci\n");
+                return;
+        }
+        px_hose = pci_find_hose_for_OF_device(pcix_node);
+        if (px_hose == NULL) {
+                printk("PCI-X bridge found but not matched to host\n");
+                return;
+        }       
+        early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
+        early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
+        dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
+        early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
+        early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
+        dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
+}
+#endif /* 0 */
+
+/*
+ * Early video resume hook
+ */
+
+static void (*pmac_early_vresume_proc)(void *data);
+static void *pmac_early_vresume_data;
+
+void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
+{
+        if (_machine != _MACH_Pmac)
+                return;
+        preempt_disable();
+        pmac_early_vresume_proc = proc;
+        pmac_early_vresume_data = data;
+        preempt_enable();
+}
+EXPORT_SYMBOL(pmac_set_early_video_resume);
+
+void pmac_call_early_video_resume(void)
+{
+        if (pmac_early_vresume_proc)
+                pmac_early_vresume_proc(pmac_early_vresume_data);
+}
+
+/*
+ * AGP related suspend/resume code
+ */
+
+static struct pci_dev *pmac_agp_bridge;
+static int (*pmac_agp_suspend)(struct pci_dev *bridge);
+static int (*pmac_agp_resume)(struct pci_dev *bridge);
+
+void pmac_register_agp_pm(struct pci_dev *bridge,
+                                 int (*suspend)(struct pci_dev *bridge),
+                                 int (*resume)(struct pci_dev *bridge))
+{
+        if (suspend || resume) {
+                pmac_agp_bridge = bridge;
+                pmac_agp_suspend = suspend;
+                pmac_agp_resume = resume;
+                return;
+        }
+        if (bridge != pmac_agp_bridge)
+                return;
+        pmac_agp_suspend = pmac_agp_resume = NULL;
+        return;
+}
+EXPORT_SYMBOL(pmac_register_agp_pm);
+
+void pmac_suspend_agp_for_card(struct pci_dev *dev)
+{
+        if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
+                return;
+        if (pmac_agp_bridge->bus != dev->bus)
+                return;
+        pmac_agp_suspend(pmac_agp_bridge);
+}
+EXPORT_SYMBOL(pmac_suspend_agp_for_card);
+
+void pmac_resume_agp_for_card(struct pci_dev *dev)
+{
+        if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
+                return;
+        if (pmac_agp_bridge->bus != dev->bus)
+                return;
+        pmac_agp_resume(pmac_agp_bridge);
+}
+EXPORT_SYMBOL(pmac_resume_agp_for_card);
diff --git a/arch/ppc64/kernel/pmac_low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index f3f39e8e337a..f3f39e8e337a 100644
--- a/arch/ppc64/kernel/pmac_low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
diff --git a/arch/ppc64/kernel/pmac_nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index e32a902236e3..4042e2f06ee0 100644
--- a/arch/ppc64/kernel/pmac_nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -15,10 +15,13 @@
 #include <linux/kernel.h>
 #include <linux/stddef.h>
 #include <linux/string.h>
+#include <linux/nvram.h>
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
+#include <linux/adb.h>
+#include <linux/pmu.h>
 #include <linux/bootmem.h>
 #include <linux/completion.h>
 #include <linux/spinlock.h>
@@ -72,20 +75,38 @@ struct core99_header {
 /*
  * Read and write the non-volatile RAM on PowerMacs and CHRP machines.
  */
+static int nvram_naddrs;
 static volatile unsigned char *nvram_data;
+static int is_core_99;
 static int core99_bank = 0;
+static int nvram_partitions[3];
 // XXX Turn that into a sem
 static DEFINE_SPINLOCK(nv_lock);
 
+extern int pmac_newworld;
 extern int system_running;
 
 static int (*core99_write_bank)(int bank, u8* datas);
 static int (*core99_erase_bank)(int bank);
 
-static char *nvram_image __pmacdata;
+static char *nvram_image;
 
 
-static ssize_t __pmac core99_nvram_read(char *buf, size_t count, loff_t *index)
+static unsigned char core99_nvram_read_byte(int addr)
+{
+        if (nvram_image == NULL)
+                return 0xff;
+        return nvram_image[addr];
+}
+
+static void core99_nvram_write_byte(int addr, unsigned char val)
+{
+        if (nvram_image == NULL)
+                return;
+        nvram_image[addr] = val;
+}
+
+static ssize_t core99_nvram_read(char *buf, size_t count, loff_t *index)
 {
         int i;
 
@@ -103,7 +124,7 @@ static ssize_t __pmac core99_nvram_read(char *buf, size_t count, loff_t *index)
         return count;
 }
 
-static ssize_t __pmac core99_nvram_write(char *buf, size_t count, loff_t *index)
+static ssize_t core99_nvram_write(char *buf, size_t count, loff_t *index)
 {
         int i;
 
@@ -121,14 +142,95 @@ static ssize_t __pmac core99_nvram_write(char *buf, size_t count, loff_t *index)
         return count;
 }
 
-static ssize_t __pmac core99_nvram_size(void)
+static ssize_t core99_nvram_size(void)
 {
         if (nvram_image == NULL)
                 return -ENODEV;
         return NVRAM_SIZE;
 }
 
-static u8 __pmac chrp_checksum(struct chrp_header* hdr)
+#ifdef CONFIG_PPC32
+static volatile unsigned char *nvram_addr;
+static int nvram_mult;
+
+static unsigned char direct_nvram_read_byte(int addr)
+{
+        return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]);
+}
+
+static void direct_nvram_write_byte(int addr, unsigned char val)
+{
+        out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val);
+}
+
+
+static unsigned char indirect_nvram_read_byte(int addr)
+{
+        unsigned char val;
+        unsigned long flags;
+
+        spin_lock_irqsave(&nv_lock, flags);
+        out_8(nvram_addr, addr >> 5);
+        val = in_8(&nvram_data[(addr & 0x1f) << 4]);
+        spin_unlock_irqrestore(&nv_lock, flags);
+
+        return val;
+}
+
+static void indirect_nvram_write_byte(int addr, unsigned char val)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&nv_lock, flags);
+        out_8(nvram_addr, addr >> 5);
+        out_8(&nvram_data[(addr & 0x1f) << 4], val);
+        spin_unlock_irqrestore(&nv_lock, flags);
+}
+
+
+#ifdef CONFIG_ADB_PMU
+
+static void pmu_nvram_complete(struct adb_request *req)
+{
+        if (req->arg)
+                complete((struct completion *)req->arg);
+}
+
+static unsigned char pmu_nvram_read_byte(int addr)
+{
+        struct adb_request req;
+        DECLARE_COMPLETION(req_complete); 
+        
+        req.arg = system_state == SYSTEM_RUNNING ? &req_complete : NULL;
+        if (pmu_request(&req, pmu_nvram_complete, 3, PMU_READ_NVRAM,
+                        (addr >> 8) & 0xff, addr & 0xff))
+                return 0xff;
+        if (system_state == SYSTEM_RUNNING)
+                wait_for_completion(&req_complete);
+        while (!req.complete)
+                pmu_poll();
+        return req.reply[0];
+}
+
+static void pmu_nvram_write_byte(int addr, unsigned char val)
+{
+        struct adb_request req;
+        DECLARE_COMPLETION(req_complete); 
+        
+        req.arg = system_state == SYSTEM_RUNNING ? &req_complete : NULL;
+        if (pmu_request(&req, pmu_nvram_complete, 4, PMU_WRITE_NVRAM,
+                        (addr >> 8) & 0xff, addr & 0xff, val))
+                return;
+        if (system_state == SYSTEM_RUNNING)
+                wait_for_completion(&req_complete);
+        while (!req.complete)
+                pmu_poll();
+}
+
+#endif /* CONFIG_ADB_PMU */
+#endif /* CONFIG_PPC32 */
+
+static u8 chrp_checksum(struct chrp_header* hdr)
 {
         u8 *ptr;
         u16 sum = hdr->signature;
@@ -139,7 +241,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
         return sum;
 }
 
-static u32 __pmac core99_calc_adler(u8 *buffer)
+static u32 core99_calc_adler(u8 *buffer)
 {
         int cnt;
         u32 low, high;
@@ -161,7 +263,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
         return (high << 16) | low;
 }
 
-static u32 __pmac core99_check(u8* datas)
+static u32 core99_check(u8* datas)
 {
         struct core99_header* hdr99 = (struct core99_header*)datas;
 
@@ -180,7 +282,7 @@ static u32 __pmac core99_check(u8* datas)
         return hdr99->generation;
 }
 
-static int __pmac sm_erase_bank(int bank)
+static int sm_erase_bank(int bank)
 {
         int stat, i;
         unsigned long timeout;
@@ -194,7 +296,7 @@ static int __pmac sm_erase_bank(int bank)
         timeout = 0;
         do {
                 if (++timeout > 1000000) {
-                        printk(KERN_ERR "nvram: Sharp/Miron flash erase timeout !\n");
+                        printk(KERN_ERR "nvram: Sharp/Micron flash erase timeout !\n");
                         break;
                 }
                 out_8(base, SM_FLASH_CMD_READ_STATUS);
@@ -212,7 +314,7 @@ static int __pmac sm_erase_bank(int bank)
         return 0;
 }
 
-static int __pmac sm_write_bank(int bank, u8* datas)
+static int sm_write_bank(int bank, u8* datas)
 {
         int i, stat = 0;
         unsigned long timeout;
@@ -247,7 +349,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
         return 0;
 }
 
-static int __pmac amd_erase_bank(int bank)
+static int amd_erase_bank(int bank)
 {
         int i, stat = 0;
         unsigned long timeout;
@@ -294,7 +396,7 @@ static int __pmac amd_erase_bank(int bank)
         return 0;
 }
 
-static int __pmac amd_write_bank(int bank, u8* datas)
+static int amd_write_bank(int bank, u8* datas)
 {
         int i, stat = 0;
         unsigned long timeout;
@@ -340,12 +442,49 @@ static int __pmac amd_write_bank(int bank, u8* datas)
         return 0;
 }
 
+static void __init lookup_partitions(void)
+{
+        u8 buffer[17];
+        int i, offset;
+        struct chrp_header* hdr;
+
+        if (pmac_newworld) {
+                nvram_partitions[pmac_nvram_OF] = -1;
+                nvram_partitions[pmac_nvram_XPRAM] = -1;
+                nvram_partitions[pmac_nvram_NR] = -1;
+                hdr = (struct chrp_header *)buffer;
+
+                offset = 0;
+                buffer[16] = 0;
+                do {
+                        for (i=0;i<16;i++)
+                                buffer[i] = ppc_md.nvram_read_val(offset+i);
+                        if (!strcmp(hdr->name, "common"))
+                                nvram_partitions[pmac_nvram_OF] = offset + 0x10;
+                        if (!strcmp(hdr->name, "APL,MacOS75")) {
+                                nvram_partitions[pmac_nvram_XPRAM] = offset + 0x10;
+                                nvram_partitions[pmac_nvram_NR] = offset + 0x110;
+                        }
+                        offset += (hdr->len * 0x10);
+                } while(offset < NVRAM_SIZE);
+        } else {
+                nvram_partitions[pmac_nvram_OF] = 0x1800;
+                nvram_partitions[pmac_nvram_XPRAM] = 0x1300;
+                nvram_partitions[pmac_nvram_NR] = 0x1400;
+        }
+        DBG("nvram: OF partition at 0x%x\n", nvram_partitions[pmac_nvram_OF]);
+        DBG("nvram: XP partition at 0x%x\n", nvram_partitions[pmac_nvram_XPRAM]);
+        DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]);
+}
 
-static int __pmac core99_nvram_sync(void)
+static void core99_nvram_sync(void)
 {
         struct core99_header* hdr99;
         unsigned long flags;
 
+        if (!is_core_99 || !nvram_data || !nvram_image)
+                return;
+
         spin_lock_irqsave(&nv_lock, flags);
         if (!memcmp(nvram_image, (u8*)nvram_data + core99_bank*NVRAM_SIZE,
                 NVRAM_SIZE))
@@ -370,32 +509,28 @@ static int __pmac core99_nvram_sync(void)
  bail:
         spin_unlock_irqrestore(&nv_lock, flags);
 
-        return 0;
+#ifdef DEBUG
+        mdelay(2000);
+#endif
 }
 
-int __init pmac_nvram_init(void)
+static int __init core99_nvram_setup(struct device_node *dp)
 {
-        struct device_node *dp;
-        u32 gen_bank0, gen_bank1;
         int i;
+        u32 gen_bank0, gen_bank1;
 
-        dp = find_devices("nvram");
-        if (dp == NULL) {
-                printk(KERN_ERR "Can't find NVRAM device\n");
-                return -ENODEV;
-        }
-        if (!device_is_compatible(dp, "nvram,flash")) {
-                printk(KERN_ERR "Incompatible type of NVRAM\n");
-                return -ENXIO;
+        if (nvram_naddrs < 1) {
+                printk(KERN_ERR "nvram: no address\n");
+                return -EINVAL;
         }
-
         nvram_image = alloc_bootmem(NVRAM_SIZE);
         if (nvram_image == NULL) {
                 printk(KERN_ERR "nvram: can't allocate ram image\n");
                 return -ENOMEM;
         }
         nvram_data = ioremap(dp->addrs[0].address, NVRAM_SIZE*2);
-        
+        nvram_naddrs = 1; /* Make sure we get the correct case */
+
         DBG("nvram: Checking bank 0...\n");
 
         gen_bank0 = core99_check((u8 *)nvram_data);
@@ -408,11 +543,12 @@ int __init pmac_nvram_init(void)
         for (i=0; i<NVRAM_SIZE; i++)
                 nvram_image[i] = nvram_data[i + core99_bank*NVRAM_SIZE];
 
+        ppc_md.nvram_read_val   = core99_nvram_read_byte;
+        ppc_md.nvram_write_val  = core99_nvram_write_byte;
         ppc_md.nvram_read       = core99_nvram_read;
         ppc_md.nvram_write      = core99_nvram_write;
         ppc_md.nvram_size       = core99_nvram_size;
         ppc_md.nvram_sync       = core99_nvram_sync;
-        
         /* 
          * Maybe we could be smarter here though making an exclusive list
          * of known flash chips is a bit nasty as older OF didn't provide us
@@ -427,67 +563,81 @@ int __init pmac_nvram_init(void)
                 core99_erase_bank = sm_erase_bank;
                 core99_write_bank = sm_write_bank;
         }
-
         return 0;
 }
 
-int __pmac pmac_get_partition(int partition)
+int __init pmac_nvram_init(void)
 {
-        struct nvram_partition *part;
-        const char *name;
-        int sig;
-
-        switch(partition) {
-        case pmac_nvram_OF:
-                name = "common";
-                sig = NVRAM_SIG_SYS;
-                break;
-        case pmac_nvram_XPRAM:
-                name = "APL,MacOS75";
-                sig = NVRAM_SIG_OS;
-                break;
-        case pmac_nvram_NR:
-        default:
-                /* Oldworld stuff */
+        struct device_node *dp;
+        int err = 0;
+
+        nvram_naddrs = 0;
+
+        dp = find_devices("nvram");
+        if (dp == NULL) {
+                printk(KERN_ERR "Can't find NVRAM device\n");
                 return -ENODEV;
         }
+        nvram_naddrs = dp->n_addrs;
+        is_core_99 = device_is_compatible(dp, "nvram,flash");
+        if (is_core_99)
+                err = core99_nvram_setup(dp);
+#ifdef CONFIG_PPC32
+        else if (_machine == _MACH_chrp && nvram_naddrs == 1) {
+                nvram_data = ioremap(dp->addrs[0].address + isa_mem_base,
+                                     dp->addrs[0].size);
+                nvram_mult = 1;
+                ppc_md.nvram_read_val   = direct_nvram_read_byte;
+                ppc_md.nvram_write_val  = direct_nvram_write_byte;
+        } else if (nvram_naddrs == 1) {
+                nvram_data = ioremap(dp->addrs[0].address, dp->addrs[0].size);
+                nvram_mult = (dp->addrs[0].size + NVRAM_SIZE - 1) / NVRAM_SIZE;
+                ppc_md.nvram_read_val   = direct_nvram_read_byte;
+                ppc_md.nvram_write_val  = direct_nvram_write_byte;
+        } else if (nvram_naddrs == 2) {
+                nvram_addr = ioremap(dp->addrs[0].address, dp->addrs[0].size);
+                nvram_data = ioremap(dp->addrs[1].address, dp->addrs[1].size);
+                ppc_md.nvram_read_val   = indirect_nvram_read_byte;
+                ppc_md.nvram_write_val  = indirect_nvram_write_byte;
+        } else if (nvram_naddrs == 0 && sys_ctrler == SYS_CTRLER_PMU) {
+#ifdef CONFIG_ADB_PMU
+                nvram_naddrs = -1;
+                ppc_md.nvram_read_val   = pmu_nvram_read_byte;
+                ppc_md.nvram_write_val  = pmu_nvram_write_byte;
+#endif /* CONFIG_ADB_PMU */
+        }
+#endif
+        else {
+                printk(KERN_ERR "Incompatible type of NVRAM\n");
+                return -ENXIO;
+        }
+        lookup_partitions();
+        return err;
+}
 
-        part = nvram_find_partition(sig, name);
-        if (part == NULL)
-                return 0;
-
-        return part->index;
+int pmac_get_partition(int partition)
+{
+        return nvram_partitions[partition];
 }
 
-u8 __pmac pmac_xpram_read(int xpaddr)
+u8 pmac_xpram_read(int xpaddr)
 {
         int offset = pmac_get_partition(pmac_nvram_XPRAM);
-        loff_t index;
-        u8 buf;
-        ssize_t count;
 
         if (offset < 0 || xpaddr < 0 || xpaddr > 0x100)
                 return 0xff;
-        index = offset + xpaddr;
 
-        count = ppc_md.nvram_read(&buf, 1, &index);
-        if (count != 1)
-                return 0xff;
-        return buf;
+        return ppc_md.nvram_read_val(xpaddr + offset);
 }
 
-void __pmac pmac_xpram_write(int xpaddr, u8 data)
+void pmac_xpram_write(int xpaddr, u8 data)
 {
         int offset = pmac_get_partition(pmac_nvram_XPRAM);
-        loff_t index;
-        u8 buf;
 
         if (offset < 0 || xpaddr < 0 || xpaddr > 0x100)
                 return;
-        index = offset + xpaddr;
-        buf = data;
 
-        ppc_md.nvram_write(&buf, 1, &index);
+        ppc_md.nvram_write_val(xpaddr + offset, data);
 }
 
 EXPORT_SYMBOL(pmac_get_partition);
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
new file mode 100644
index 000000000000..8f818d092e2b
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -0,0 +1,1170 @@
+/*
+ * Support for PCI bridges found on Power Macintoshes.
+ *
+ * Copyright (C) 2003 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
+ * Copyright (C) 1997 Paul Mackerras (paulus@samba.org)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/machdep.h>
+#include <asm/pmac_feature.h>
+#include <asm/grackle.h>
+#ifdef CONFIG_PPC64
+#include <asm/iommu.h>
+#include <asm/ppc-pci.h>
+#endif
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...)
+#endif
+
+static int add_bridge(struct device_node *dev);
+
+/* XXX Could be per-controller, but I don't think we risk anything by
+ * assuming we won't have both UniNorth and Bandit */
+static int has_uninorth;
+#ifdef CONFIG_PPC64
+static struct pci_controller *u3_agp;
+static struct pci_controller *u3_ht;
+#endif /* CONFIG_PPC64 */
+
+extern u8 pci_cache_line_size;
+extern int pcibios_assign_bus_offset;
+
+struct device_node *k2_skiplist[2];
+
+/*
+ * Magic constants for enabling cache coherency in the bandit/PSX bridge.
+ */
+#define BANDIT_DEVID_2  8
+#define BANDIT_REVID    3
+
+#define BANDIT_DEVNUM   11
+#define BANDIT_MAGIC    0x50
+#define BANDIT_COHERENT 0x40
+
+static int __init fixup_one_level_bus_range(struct device_node *node, int higher)
+{
+        for (; node != 0;node = node->sibling) {
+                int * bus_range;
+                unsigned int *class_code;
+                int len;
+
+                /* For PCI<->PCI bridges or CardBus bridges, we go down */
+                class_code = (unsigned int *) get_property(node, "class-code", NULL);
+                if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
+                        (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
+                        continue;
+                bus_range = (int *) get_property(node, "bus-range", &len);
+                if (bus_range != NULL && len > 2 * sizeof(int)) {
+                        if (bus_range[1] > higher)
+                                higher = bus_range[1];
+                }
+                higher = fixup_one_level_bus_range(node->child, higher);
+        }
+        return higher;
+}
+
+/* This routine fixes the "bus-range" property of all bridges in the
+ * system since they tend to have their "last" member wrong on macs
+ *
+ * Note that the bus numbers manipulated here are OF bus numbers, they
+ * are not Linux bus numbers.
+ */
+static void __init fixup_bus_range(struct device_node *bridge)
+{
+        int * bus_range;
+        int len;
+
+        /* Lookup the "bus-range" property for the hose */
+        bus_range = (int *) get_property(bridge, "bus-range", &len);
+        if (bus_range == NULL || len < 2 * sizeof(int)) {
+                printk(KERN_WARNING "Can't get bus-range for %s\n",
+                               bridge->full_name);
+                return;
+        }
+        bus_range[1] = fixup_one_level_bus_range(bridge->child, bus_range[1]);
+}
+
+/*
+ * Apple MacRISC (U3, UniNorth, Bandit, Chaos) PCI controllers.
+ *
+ * The "Bandit" version is present in all early PCI PowerMacs,
+ * and up to the first ones using Grackle. Some machines may
+ * have 2 bandit controllers (2 PCI busses).
+ *
+ * "Chaos" is used in some "Bandit"-type machines as a bridge
+ * for the separate display bus. It is accessed the same
+ * way as bandit, but cannot be probed for devices. It therefore
+ * has its own config access functions.
+ *
+ * The "UniNorth" version is present in all Core99 machines
+ * (iBook, G4, new IMacs, and all the recent Apple machines).
+ * It contains 3 controllers in one ASIC.
+ *
+ * The U3 is the bridge used on G5 machines. It contains an
+ * AGP bus which is dealt with the old UniNorth access routines
+ * and a HyperTransport bus which uses its own set of access
+ * functions.
+ */
+
+#define MACRISC_CFA0(devfn, off)        \
+        ((1 << (unsigned long)PCI_SLOT(dev_fn)) \
+        | (((unsigned long)PCI_FUNC(dev_fn)) << 8) \
+        | (((unsigned long)(off)) & 0xFCUL))
+
+#define MACRISC_CFA1(bus, devfn, off)   \
+        ((((unsigned long)(bus)) << 16) \
+        |(((unsigned long)(devfn)) << 8) \
+        |(((unsigned long)(off)) & 0xFCUL) \
+        |1UL)
+
+static unsigned long macrisc_cfg_access(struct pci_controller* hose,
+                                               u8 bus, u8 dev_fn, u8 offset)
+{
+        unsigned int caddr;
+
+        if (bus == hose->first_busno) {
+                if (dev_fn < (11 << 3))
+                        return 0;
+                caddr = MACRISC_CFA0(dev_fn, offset);
+        } else
+                caddr = MACRISC_CFA1(bus, dev_fn, offset);
+
+        /* Uninorth will return garbage if we don't read back the value ! */
+        do {
+                out_le32(hose->cfg_addr, caddr);
+        } while (in_le32(hose->cfg_addr) != caddr);
+
+        offset &= has_uninorth ? 0x07 : 0x03;
+        return ((unsigned long)hose->cfg_data) + offset;
+}
+
+static int macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
+                                      int offset, int len, u32 *val)
+{
+        struct pci_controller *hose;
+        unsigned long addr;
+
+        hose = pci_bus_to_host(bus);
+        if (hose == NULL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
+        if (!addr)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * Note: the caller has already checked that offset is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        switch (len) {
+        case 1:
+                *val = in_8((u8 *)addr);
+                break;
+        case 2:
+                *val = in_le16((u16 *)addr);
+                break;
+        default:
+                *val = in_le32((u32 *)addr);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
+                                       int offset, int len, u32 val)
+{
+        struct pci_controller *hose;
+        unsigned long addr;
+
+        hose = pci_bus_to_host(bus);
+        if (hose == NULL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
+        if (!addr)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * Note: the caller has already checked that offset is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        switch (len) {
+        case 1:
+                out_8((u8 *)addr, val);
+                (void) in_8((u8 *)addr);
+                break;
+        case 2:
+                out_le16((u16 *)addr, val);
+                (void) in_le16((u16 *)addr);
+                break;
+        default:
+                out_le32((u32 *)addr, val);
+                (void) in_le32((u32 *)addr);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops macrisc_pci_ops =
+{
+        macrisc_read_config,
+        macrisc_write_config
+};
+
+#ifdef CONFIG_PPC32
+/*
+ * Verify that a specific (bus, dev_fn) exists on chaos
+ */
+static int
+chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
+{
+        struct device_node *np;
+        u32 *vendor, *device;
+
+        np = pci_busdev_to_OF_node(bus, devfn);
+        if (np == NULL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        vendor = (u32 *)get_property(np, "vendor-id", NULL);
+        device = (u32 *)get_property(np, "device-id", NULL);
+        if (vendor == NULL || device == NULL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        if ((*vendor == 0x106b) && (*device == 3) && (offset >= 0x10)
+            && (offset != 0x14) && (offset != 0x18) && (offset <= 0x24))
+                return PCIBIOS_BAD_REGISTER_NUMBER;
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                  int len, u32 *val)
+{
+        int result = chaos_validate_dev(bus, devfn, offset);
+        if (result == PCIBIOS_BAD_REGISTER_NUMBER)
+                *val = ~0U;
+        if (result != PCIBIOS_SUCCESSFUL)
+                return result;
+        return macrisc_read_config(bus, devfn, offset, len, val);
+}
+
+static int
+chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                   int len, u32 val)
+{
+        int result = chaos_validate_dev(bus, devfn, offset);
+        if (result != PCIBIOS_SUCCESSFUL)
+                return result;
+        return macrisc_write_config(bus, devfn, offset, len, val);
+}
+
+static struct pci_ops chaos_pci_ops =
+{
+        chaos_read_config,
+        chaos_write_config
+};
+
+static void __init setup_chaos(struct pci_controller *hose,
+                               struct reg_property *addr)
+{
+        /* assume a `chaos' bridge */
+        hose->ops = &chaos_pci_ops;
+        hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
+        hose->cfg_data = ioremap(addr->address + 0xc00000, 0x1000);
+}
+#else
+#define setup_chaos(hose, addr)
+#endif /* CONFIG_PPC32 */
+
+#ifdef CONFIG_PPC64
+/*
+ * These versions of U3 HyperTransport config space access ops do not
+ * implement self-view of the HT host yet
+ */
+
+/*
+ * This function deals with some "special cases" devices.
+ *
+ *  0 -> No special case
+ *  1 -> Skip the device but act as if the access was successfull
+ *       (return 0xff's on reads, eventually, cache config space
+ *       accesses in a later version)
+ * -1 -> Hide the device (unsuccessful acess)
+ */
+static int u3_ht_skip_device(struct pci_controller *hose,
+                             struct pci_bus *bus, unsigned int devfn)
+{
+        struct device_node *busdn, *dn;
+        int i;
+
+        /* We only allow config cycles to devices that are in OF device-tree
+         * as we are apparently having some weird things going on with some
+         * revs of K2 on recent G5s
+         */
+        if (bus->self)
+                busdn = pci_device_to_OF_node(bus->self);
+        else
+                busdn = hose->arch_data;
+        for (dn = busdn->child; dn; dn = dn->sibling)
+                if (dn->data && PCI_DN(dn)->devfn == devfn)
+                        break;
+        if (dn == NULL)
+                return -1;
+
+        /*
+         * When a device in K2 is powered down, we die on config
+         * cycle accesses. Fix that here.
+         */
+        for (i=0; i<2; i++)
+                if (k2_skiplist[i] == dn)
+                        return 1;
+
+        return 0;
+}
+
+#define U3_HT_CFA0(devfn, off)          \
+                ((((unsigned long)devfn) << 8) | offset)
+#define U3_HT_CFA1(bus, devfn, off)     \
+                (U3_HT_CFA0(devfn, off) \
+                + (((unsigned long)bus) << 16) \
+                + 0x01000000UL)
+
+static unsigned long u3_ht_cfg_access(struct pci_controller* hose,
+                                             u8 bus, u8 devfn, u8 offset)
+{
+        if (bus == hose->first_busno) {
+                /* For now, we don't self probe U3 HT bridge */
+                if (PCI_SLOT(devfn) == 0)
+                        return 0;
+                return ((unsigned long)hose->cfg_data) + U3_HT_CFA0(devfn, offset);
+        } else
+                return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset);
+}
+
+static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
+                                    int offset, int len, u32 *val)
+{
+        struct pci_controller *hose;
+        unsigned long addr;
+
+        hose = pci_bus_to_host(bus);
+        if (hose == NULL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        addr = u3_ht_cfg_access(hose, bus->number, devfn, offset);
+        if (!addr)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        switch (u3_ht_skip_device(hose, bus, devfn)) {
+        case 0:
+                break;
+        case 1:
+                switch (len) {
+                case 1:
+                        *val = 0xff; break;
+                case 2:
+                        *val = 0xffff; break;
+                default:
+                        *val = 0xfffffffful; break;
+                }
+                return PCIBIOS_SUCCESSFUL;
+        default:
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+
+        /*
+         * Note: the caller has already checked that offset is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        switch (len) {
+        case 1:
+                *val = in_8((u8 *)addr);
+                break;
+        case 2:
+                *val = in_le16((u16 *)addr);
+                break;
+        default:
+                *val = in_le32((u32 *)addr);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
+                                     int offset, int len, u32 val)
+{
+        struct pci_controller *hose;
+        unsigned long addr;
+
+        hose = pci_bus_to_host(bus);
+        if (hose == NULL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        addr = u3_ht_cfg_access(hose, bus->number, devfn, offset);
+        if (!addr)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        switch (u3_ht_skip_device(hose, bus, devfn)) {
+        case 0:
+                break;
+        case 1:
+                return PCIBIOS_SUCCESSFUL;
+        default:
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+
+        /*
+         * Note: the caller has already checked that offset is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        switch (len) {
+        case 1:
+                out_8((u8 *)addr, val);
+                (void) in_8((u8 *)addr);
+                break;
+        case 2:
+                out_le16((u16 *)addr, val);
+                (void) in_le16((u16 *)addr);
+                break;
+        default:
+                out_le32((u32 *)addr, val);
+                (void) in_le32((u32 *)addr);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops u3_ht_pci_ops =
+{
+        u3_ht_read_config,
+        u3_ht_write_config
+};
+#endif /* CONFIG_PPC64 */
+
+#ifdef CONFIG_PPC32
+/*
+ * For a bandit bridge, turn on cache coherency if necessary.
+ * N.B. we could clean this up using the hose ops directly.
+ */
+static void __init init_bandit(struct pci_controller *bp)
+{
+        unsigned int vendev, magic;
+        int rev;
+
+        /* read the word at offset 0 in config space for device 11 */
+        out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID);
+        udelay(2);
+        vendev = in_le32(bp->cfg_data);
+        if (vendev == (PCI_DEVICE_ID_APPLE_BANDIT << 16) +
+                        PCI_VENDOR_ID_APPLE) {
+                /* read the revision id */
+                out_le32(bp->cfg_addr,
+                         (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);
+                udelay(2);
+                rev = in_8(bp->cfg_data);
+                if (rev != BANDIT_REVID)
+                        printk(KERN_WARNING
+                               "Unknown revision %d for bandit\n", rev);
+        } else if (vendev != (BANDIT_DEVID_2 << 16) + PCI_VENDOR_ID_APPLE) {
+                printk(KERN_WARNING "bandit isn't? (%x)\n", vendev);
+                return;
+        }
+
+        /* read the word at offset 0x50 */
+        out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC);
+        udelay(2);
+        magic = in_le32(bp->cfg_data);
+        if ((magic & BANDIT_COHERENT) != 0)
+                return;
+        magic |= BANDIT_COHERENT;
+        udelay(2);
+        out_le32(bp->cfg_data, magic);
+        printk(KERN_INFO "Cache coherency enabled for bandit/PSX\n");
+}
+
+/*
+ * Tweak the PCI-PCI bridge chip on the blue & white G3s.
+ */
+static void __init init_p2pbridge(void)
+{
+        struct device_node *p2pbridge;
+        struct pci_controller* hose;
+        u8 bus, devfn;
+        u16 val;
+
+        /* XXX it would be better here to identify the specific
+           PCI-PCI bridge chip we have. */
+        if ((p2pbridge = find_devices("pci-bridge")) == 0
+            || p2pbridge->parent == NULL
+            || strcmp(p2pbridge->parent->name, "pci") != 0)
+                return;
+        if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) {
+                DBG("Can't find PCI infos for PCI<->PCI bridge\n");
+                return;
+        }
+        /* Warning: At this point, we have not yet renumbered all busses.
+         * So we must use OF walking to find out hose
+         */
+        hose = pci_find_hose_for_OF_device(p2pbridge);
+        if (!hose) {
+                DBG("Can't find hose for PCI<->PCI bridge\n");
+                return;
+        }
+        if (early_read_config_word(hose, bus, devfn,
+                                   PCI_BRIDGE_CONTROL, &val) < 0) {
+                printk(KERN_ERR "init_p2pbridge: couldn't read bridge control\n");
+                return;
+        }
+        val &= ~PCI_BRIDGE_CTL_MASTER_ABORT;
+        early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val);
+}
+
+/*
+ * Some Apple desktop machines have a NEC PD720100A USB2 controller
+ * on the motherboard. Open Firmware, on these, will disable the
+ * EHCI part of it so it behaves like a pair of OHCI's. This fixup
+ * code re-enables it ;)
+ */
+static void __init fixup_nec_usb2(void)
+{
+        struct device_node *nec;
+
+        for (nec = NULL; (nec = of_find_node_by_name(nec, "usb")) != NULL;) {
+                struct pci_controller *hose;
+                u32 data, *prop;
+                u8 bus, devfn;
+
+                prop = (u32 *)get_property(nec, "vendor-id", NULL);
+                if (prop == NULL)
+                        continue;
+                if (0x1033 != *prop)
+                        continue;
+                prop = (u32 *)get_property(nec, "device-id", NULL);
+                if (prop == NULL)
+                        continue;
+                if (0x0035 != *prop)
+                        continue;
+                prop = (u32 *)get_property(nec, "reg", NULL);
+                if (prop == NULL)
+                        continue;
+                devfn = (prop[0] >> 8) & 0xff;
+                bus = (prop[0] >> 16) & 0xff;
+                if (PCI_FUNC(devfn) != 0)
+                        continue;
+                hose = pci_find_hose_for_OF_device(nec);
+                if (!hose)
+                        continue;
+                early_read_config_dword(hose, bus, devfn, 0xe4, &data);
+                if (data & 1UL) {
+                        printk("Found NEC PD720100A USB2 chip with disabled EHCI, fixing up...\n");
+                        data &= ~1UL;
+                        early_write_config_dword(hose, bus, devfn, 0xe4, data);
+                        early_write_config_byte(hose, bus, devfn | 2, PCI_INTERRUPT_LINE,
+                                nec->intrs[0].line);
+                }
+        }
+}
+
+static void __init setup_bandit(struct pci_controller *hose,
+                                struct reg_property *addr)
+{
+        hose->ops = &macrisc_pci_ops;
+        hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
+        hose->cfg_data = ioremap(addr->address + 0xc00000, 0x1000);
+        init_bandit(hose);
+}
+
+static int __init setup_uninorth(struct pci_controller *hose,
+                                 struct reg_property *addr)
+{
+        pci_assign_all_buses = 1;
+        has_uninorth = 1;
+        hose->ops = &macrisc_pci_ops;
+        hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
+        hose->cfg_data = ioremap(addr->address + 0xc00000, 0x1000);
+        /* We "know" that the bridge at f2000000 has the PCI slots. */
+        return addr->address == 0xf2000000;
+}
+#endif
+
+#ifdef CONFIG_PPC64
+static void __init setup_u3_agp(struct pci_controller* hose)
+{
+        /* On G5, we move AGP up to high bus number so we don't need
+         * to reassign bus numbers for HT. If we ever have P2P bridges
+         * on AGP, we'll have to move pci_assign_all_busses to the
+         * pci_controller structure so we enable it for AGP and not for
+         * HT childs.
+         * We hard code the address because of the different size of
+         * the reg address cell, we shall fix that by killing struct
+         * reg_property and using some accessor functions instead
+         */
+        hose->first_busno = 0xf0;
+        hose->last_busno = 0xff;
+        has_uninorth = 1;
+        hose->ops = &macrisc_pci_ops;
+        hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);
+        hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);
+
+        u3_agp = hose;
+}
+
+static void __init setup_u3_ht(struct pci_controller* hose)
+{
+        struct device_node *np = (struct device_node *)hose->arch_data;
+        int i, cur;
+
+        hose->ops = &u3_ht_pci_ops;
+
+        /* We hard code the address because of the different size of
+         * the reg address cell, we shall fix that by killing struct
+         * reg_property and using some accessor functions instead
+         */
+        hose->cfg_data = (volatile unsigned char *)ioremap(0xf2000000, 0x02000000);
+
+        /*
+         * /ht node doesn't expose a "ranges" property, so we "remove" regions that
+         * have been allocated to AGP. So far, this version of the code doesn't assign
+         * any of the 0xfxxxxxxx "fine" memory regions to /ht.
+         * We need to fix that sooner or later by either parsing all child "ranges"
+         * properties or figuring out the U3 address space decoding logic and
+         * then read its configuration register (if any).
+         */
+        hose->io_base_phys = 0xf4000000;
+        hose->pci_io_size = 0x00400000;
+        hose->io_resource.name = np->full_name;
+        hose->io_resource.start = 0;
+        hose->io_resource.end = 0x003fffff;
+        hose->io_resource.flags = IORESOURCE_IO;
+        hose->pci_mem_offset = 0;
+        hose->first_busno = 0;
+        hose->last_busno = 0xef;
+        hose->mem_resources[0].name = np->full_name;
+        hose->mem_resources[0].start = 0x80000000;
+        hose->mem_resources[0].end = 0xefffffff;
+        hose->mem_resources[0].flags = IORESOURCE_MEM;
+
+        u3_ht = hose;
+
+        if (u3_agp == NULL) {
+                DBG("U3 has no AGP, using full resource range\n");
+                return;
+        }
+
+        /* We "remove" the AGP resources from the resources allocated to HT, that
+         * is we create "holes". However, that code does assumptions that so far
+         * happen to be true (cross fingers...), typically that resources in the
+         * AGP node are properly ordered
+         */
+        cur = 0;
+        for (i=0; i<3; i++) {
+                struct resource *res = &u3_agp->mem_resources[i];
+                if (res->flags != IORESOURCE_MEM)
+                        continue;
+                /* We don't care about "fine" resources */
+                if (res->start >= 0xf0000000)
+                        continue;
+                /* Check if it's just a matter of "shrinking" us in one direction */
+                if (hose->mem_resources[cur].start == res->start) {
+                        DBG("U3/HT: shrink start of %d, %08lx -> %08lx\n",
+                            cur, hose->mem_resources[cur].start, res->end + 1);
+                        hose->mem_resources[cur].start = res->end + 1;
+                        continue;
+                }
+                if (hose->mem_resources[cur].end == res->end) {
+                        DBG("U3/HT: shrink end of %d, %08lx -> %08lx\n",
+                            cur, hose->mem_resources[cur].end, res->start - 1);
+                        hose->mem_resources[cur].end = res->start - 1;
+                        continue;
+                }
+                /* No, it's not the case, we need a hole */
+                if (cur == 2) {
+                        /* not enough resources for a hole, we drop part of the range */
+                        printk(KERN_WARNING "Running out of resources for /ht host !\n");
+                        hose->mem_resources[cur].end = res->start - 1;
+                        continue;
+                }
+                cur++;
+                DBG("U3/HT: hole, %d end at %08lx, %d start at %08lx\n",
+                    cur-1, res->start - 1, cur, res->end + 1);
+                hose->mem_resources[cur].name = np->full_name;
+                hose->mem_resources[cur].flags = IORESOURCE_MEM;
+                hose->mem_resources[cur].start = res->end + 1;
+                hose->mem_resources[cur].end = hose->mem_resources[cur-1].end;
+                hose->mem_resources[cur-1].end = res->start - 1;
+        }
+}
+
+/* XXX this needs to be converged between ppc32 and ppc64... */
+static struct pci_controller * __init pcibios_alloc_controller(void)
+{
+        struct pci_controller *hose;
+
+        hose = alloc_bootmem(sizeof(struct pci_controller));
+        if (hose)
+                pci_setup_pci_controller(hose);
+        return hose;
+}
+#endif
+
+/*
+ * We assume that if we have a G3 powermac, we have one bridge called
+ * "pci" (a MPC106) and no bandit or chaos bridges, and contrariwise,
+ * if we have one or more bandit or chaos bridges, we don't have a MPC106.
+ */
+static int __init add_bridge(struct device_node *dev)
+{
+        int len;
+        struct pci_controller *hose;
+#ifdef CONFIG_PPC32
+        struct reg_property *addr;
+#endif
+        char *disp_name;
+        int *bus_range;
+        int primary = 1;
+
+        DBG("Adding PCI host bridge %s\n", dev->full_name);
+
+#ifdef CONFIG_PPC32
+        /* XXX fix this */
+        addr = (struct reg_property *) get_property(dev, "reg", &len);
+        if (addr == NULL || len < sizeof(*addr)) {
+                printk(KERN_WARNING "Can't use %s: no address\n",
+                       dev->full_name);
+                return -ENODEV;
+        }
+#endif
+        bus_range = (int *) get_property(dev, "bus-range", &len);
+        if (bus_range == NULL || len < 2 * sizeof(int)) {
+                printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
+                               dev->full_name);
+        }
+
+        hose = pcibios_alloc_controller();
+        if (!hose)
+                return -ENOMEM;
+        hose->arch_data = dev;
+        hose->first_busno = bus_range ? bus_range[0] : 0;
+        hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+        disp_name = NULL;
+#ifdef CONFIG_POWER4
+        if (device_is_compatible(dev, "u3-agp")) {
+                setup_u3_agp(hose);
+                disp_name = "U3-AGP";
+                primary = 0;
+        } else if (device_is_compatible(dev, "u3-ht")) {
+                setup_u3_ht(hose);
+                disp_name = "U3-HT";
+                primary = 1;
+        }
+        printk(KERN_INFO "Found %s PCI host bridge.  Firmware bus number: %d->%d\n",
+                disp_name, hose->first_busno, hose->last_busno);
+#else
+        if (device_is_compatible(dev, "uni-north")) {
+                primary = setup_uninorth(hose, addr);
+                disp_name = "UniNorth";
+        } else if (strcmp(dev->name, "pci") == 0) {
+                /* XXX assume this is a mpc106 (grackle) */
+                setup_grackle(hose);
+                disp_name = "Grackle (MPC106)";
+        } else if (strcmp(dev->name, "bandit") == 0) {
+                setup_bandit(hose, addr);
+                disp_name = "Bandit";
+        } else if (strcmp(dev->name, "chaos") == 0) {
+                setup_chaos(hose, addr);
+                disp_name = "Chaos";
+                primary = 0;
+        }
+        printk(KERN_INFO "Found %s PCI host bridge at 0x%08lx. Firmware bus number: %d->%d\n",
+                disp_name, addr->address, hose->first_busno, hose->last_busno);
+#endif
+        DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
+                hose, hose->cfg_addr, hose->cfg_data);
+
+        /* Interpret the "ranges" property */
+        /* This also maps the I/O region and sets isa_io/mem_base */
+        pci_process_bridge_OF_ranges(hose, dev, primary);
+
+        /* Fixup "bus-range" OF property */
+        fixup_bus_range(dev);
+
+        return 0;
+}
+
+static void __init
+pcibios_fixup_OF_interrupts(void)
+{
+        struct pci_dev* dev = NULL;
+
+        /*
+         * Open Firmware often doesn't initialize the
+         * PCI_INTERRUPT_LINE config register properly, so we
+         * should find the device node and apply the interrupt
+         * obtained from the OF device-tree
+         */
+        for_each_pci_dev(dev) {
+                struct device_node *node;
+                node = pci_device_to_OF_node(dev);
+                /* this is the node, see if it has interrupts */
+                if (node && node->n_intrs > 0)
+                        dev->irq = node->intrs[0].line;
+                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+        }
+}
+
+void __init
+pmac_pcibios_fixup(void)
+{
+        /* Fixup interrupts according to OF tree */
+        pcibios_fixup_OF_interrupts();
+}
+
+#ifdef CONFIG_PPC64
+static void __init pmac_fixup_phb_resources(void)
+{
+        struct pci_controller *hose, *tmp;
+
+        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+                printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n",
+                       hose->global_number,
+                       hose->io_resource.start, hose->io_resource.end);
+        }
+}
+#endif
+
+void __init pmac_pci_init(void)
+{
+        struct device_node *np, *root;
+        struct device_node *ht = NULL;
+
+        root = of_find_node_by_path("/");
+        if (root == NULL) {
+                printk(KERN_CRIT "pmac_pci_init: can't find root "
+                       "of device tree\n");
+                return;
+        }
+        for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {
+                if (np->name == NULL)
+                        continue;
+                if (strcmp(np->name, "bandit") == 0
+                    || strcmp(np->name, "chaos") == 0
+                    || strcmp(np->name, "pci") == 0) {
+                        if (add_bridge(np) == 0)
+                                of_node_get(np);
+                }
+                if (strcmp(np->name, "ht") == 0) {
+                        of_node_get(np);
+                        ht = np;
+                }
+        }
+        of_node_put(root);
+
+#ifdef CONFIG_PPC64
+        /* Probe HT last as it relies on the agp resources to be already
+         * setup
+         */
+        if (ht && add_bridge(ht) != 0)
+                of_node_put(ht);
+
+        /*
+         * We need to call pci_setup_phb_io for the HT bridge first
+         * so it gets the I/O port numbers starting at 0, and we
+         * need to call it for the AGP bridge after that so it gets
+         * small positive I/O port numbers.
+         */
+        if (u3_ht)
+                pci_setup_phb_io(u3_ht, 1);
+        if (u3_agp)
+                pci_setup_phb_io(u3_agp, 0);
+
+        /*
+         * On ppc64, fixup the IO resources on our host bridges as
+         * the common code does it only for children of the host bridges
+         */
+        pmac_fixup_phb_resources();
+
+        /* Setup the linkage between OF nodes and PHBs */
+        pci_devs_phb_init();
+
+        /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We
+         * assume there is no P2P bridge on the AGP bus, which should be a
+         * safe assumptions hopefully.
+         */
+        if (u3_agp) {
+                struct device_node *np = u3_agp->arch_data;
+                PCI_DN(np)->busno = 0xf0;
+                for (np = np->child; np; np = np->sibling)
+                        PCI_DN(np)->busno = 0xf0;
+        }
+
+        /* map in PCI I/O space */
+        phbs_remap_io();
+
+        /* pmac_check_ht_link(); */
+
+        /* Tell pci.c to not use the common resource allocation mechanism */
+        pci_probe_only = 1;
+
+        /* Allow all IO */
+        io_page_mask = -1;
+
+#else /* CONFIG_PPC64 */
+        init_p2pbridge();
+        fixup_nec_usb2();
+
+        /* We are still having some issues with the Xserve G4, enabling
+         * some offset between bus number and domains for now when we
+         * assign all busses should help for now
+         */
+        if (pci_assign_all_buses)
+                pcibios_assign_bus_offset = 0x10;
+#endif
+}
+
+int
+pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
+{
+        struct device_node* node;
+        int updatecfg = 0;
+        int uninorth_child;
+
+        node = pci_device_to_OF_node(dev);
+
+        /* We don't want to enable USB controllers absent from the OF tree
+         * (iBook second controller)
+         */
+        if (dev->vendor == PCI_VENDOR_ID_APPLE
+            && (dev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x10))
+            && !node) {
+                printk(KERN_INFO "Apple USB OHCI %s disabled by firmware\n",
+                       pci_name(dev));
+                return -EINVAL;
+        }
+
+        if (!node)
+                return 0;
+
+        uninorth_child = node->parent &&
+                device_is_compatible(node->parent, "uni-north");
+
+        /* Firewire & GMAC were disabled after PCI probe, the driver is
+         * claiming them, we must re-enable them now.
+         */
+        if (uninorth_child && !strcmp(node->name, "firewire") &&
+            (device_is_compatible(node, "pci106b,18") ||
+             device_is_compatible(node, "pci106b,30") ||
+             device_is_compatible(node, "pci11c1,5811"))) {
+                pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, node, 0, 1);
+                pmac_call_feature(PMAC_FTR_1394_ENABLE, node, 0, 1);
+                updatecfg = 1;
+        }
+        if (uninorth_child && !strcmp(node->name, "ethernet") &&
+            device_is_compatible(node, "gmac")) {
+                pmac_call_feature(PMAC_FTR_GMAC_ENABLE, node, 0, 1);
+                updatecfg = 1;
+        }
+
+        if (updatecfg) {
+                u16 cmd;
+
+                /*
+                 * Make sure PCI is correctly configured
+                 *
+                 * We use old pci_bios versions of the function since, by
+                 * default, gmac is not powered up, and so will be absent
+                 * from the kernel initial PCI lookup.
+                 *
+                 * Should be replaced by 2.4 new PCI mechanisms and really
+                 * register the device.
+                 */
+                pci_read_config_word(dev, PCI_COMMAND, &cmd);
+                cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
+                        | PCI_COMMAND_INVALIDATE;
+                pci_write_config_word(dev, PCI_COMMAND, cmd);
+                pci_write_config_byte(dev, PCI_LATENCY_TIMER, 16);
+                pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
+                                      L1_CACHE_BYTES >> 2);
+        }
+
+        return 0;
+}
+
+/* We power down some devices after they have been probed. They'll
+ * be powered back on later on
+ */
+void __init pmac_pcibios_after_init(void)
+{
+        struct device_node* nd;
+
+#ifdef CONFIG_BLK_DEV_IDE
+        struct pci_dev *dev = NULL;
+
+        /* OF fails to initialize IDE controllers on macs
+         * (and maybe other machines)
+         *
+         * Ideally, this should be moved to the IDE layer, but we need
+         * to check specifically with Andre Hedrick how to do it cleanly
+         * since the common IDE code seem to care about the fact that the
+         * BIOS may have disabled a controller.
+         *
+         * -- BenH
+         */
+        for_each_pci_dev(dev) {
+                if ((dev->class >> 16) == PCI_BASE_CLASS_STORAGE)
+                        pci_enable_device(dev);
+        }
+#endif /* CONFIG_BLK_DEV_IDE */
+
+        nd = find_devices("firewire");
+        while (nd) {
+                if (nd->parent && (device_is_compatible(nd, "pci106b,18") ||
+                                   device_is_compatible(nd, "pci106b,30") ||
+                                   device_is_compatible(nd, "pci11c1,5811"))
+                    && device_is_compatible(nd->parent, "uni-north")) {
+                        pmac_call_feature(PMAC_FTR_1394_ENABLE, nd, 0, 0);
+                        pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, nd, 0, 0);
+                }
+                nd = nd->next;
+        }
+        nd = find_devices("ethernet");
+        while (nd) {
+                if (nd->parent && device_is_compatible(nd, "gmac")
+                    && device_is_compatible(nd->parent, "uni-north"))
+                        pmac_call_feature(PMAC_FTR_GMAC_ENABLE, nd, 0, 0);
+                nd = nd->next;
+        }
+}
+
+#ifdef CONFIG_PPC32
+void pmac_pci_fixup_cardbus(struct pci_dev* dev)
+{
+        if (_machine != _MACH_Pmac)
+                return;
+        /*
+         * Fix the interrupt routing on the various cardbus bridges
+         * used on powerbooks
+         */
+        if (dev->vendor != PCI_VENDOR_ID_TI)
+                return;
+        if (dev->device == PCI_DEVICE_ID_TI_1130 ||
+            dev->device == PCI_DEVICE_ID_TI_1131) {
+                u8 val;
+                /* Enable PCI interrupt */
+                if (pci_read_config_byte(dev, 0x91, &val) == 0)
+                        pci_write_config_byte(dev, 0x91, val | 0x30);
+                /* Disable ISA interrupt mode */
+                if (pci_read_config_byte(dev, 0x92, &val) == 0)
+                        pci_write_config_byte(dev, 0x92, val & ~0x06);
+        }
+        if (dev->device == PCI_DEVICE_ID_TI_1210 ||
+            dev->device == PCI_DEVICE_ID_TI_1211 ||
+            dev->device == PCI_DEVICE_ID_TI_1410 ||
+            dev->device == PCI_DEVICE_ID_TI_1510) {
+                u8 val;
+                /* 0x8c == TI122X_IRQMUX, 2 says to route the INTA
+                   signal out the MFUNC0 pin */
+                if (pci_read_config_byte(dev, 0x8c, &val) == 0)
+                        pci_write_config_byte(dev, 0x8c, (val & ~0x0f) | 2);
+                /* Disable ISA interrupt mode */
+                if (pci_read_config_byte(dev, 0x92, &val) == 0)
+                        pci_write_config_byte(dev, 0x92, val & ~0x06);
+        }
+}
+
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_ANY_ID, pmac_pci_fixup_cardbus);
+
+void pmac_pci_fixup_pciata(struct pci_dev* dev)
+{
+       u8 progif = 0;
+
+       /*
+        * On PowerMacs, we try to switch any PCI ATA controller to
+        * fully native mode
+        */
+        if (_machine != _MACH_Pmac)
+                return;
+        /* Some controllers don't have the class IDE */
+        if (dev->vendor == PCI_VENDOR_ID_PROMISE)
+                switch(dev->device) {
+                case PCI_DEVICE_ID_PROMISE_20246:
+                case PCI_DEVICE_ID_PROMISE_20262:
+                case PCI_DEVICE_ID_PROMISE_20263:
+                case PCI_DEVICE_ID_PROMISE_20265:
+                case PCI_DEVICE_ID_PROMISE_20267:
+                case PCI_DEVICE_ID_PROMISE_20268:
+                case PCI_DEVICE_ID_PROMISE_20269:
+                case PCI_DEVICE_ID_PROMISE_20270:
+                case PCI_DEVICE_ID_PROMISE_20271:
+                case PCI_DEVICE_ID_PROMISE_20275:
+                case PCI_DEVICE_ID_PROMISE_20276:
+                case PCI_DEVICE_ID_PROMISE_20277:
+                        goto good;
+                }
+        /* Others, check PCI class */
+        if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
+                return;
+ good:
+        pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
+        if ((progif & 5) != 5) {
+                printk(KERN_INFO "Forcing PCI IDE into native mode: %s\n", pci_name(dev));
+                (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
+                if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
+                    (progif & 5) != 5)
+                        printk(KERN_ERR "Rewrite of PROGIF failed !\n");
+        }
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
+#endif
+
+/*
+ * Disable second function on K2-SATA, it's broken
+ * and disable IO BARs on first one
+ */
+static void fixup_k2_sata(struct pci_dev* dev)
+{
+        int i;
+        u16 cmd;
+
+        if (PCI_FUNC(dev->devfn) > 0) {
+                pci_read_config_word(dev, PCI_COMMAND, &cmd);
+                cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
+                pci_write_config_word(dev, PCI_COMMAND, cmd);
+                for (i = 0; i < 6; i++) {
+                        dev->resource[i].start = dev->resource[i].end = 0;
+                        dev->resource[i].flags = 0;
+                        pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, 0);
+                }
+        } else {
+                pci_read_config_word(dev, PCI_COMMAND, &cmd);
+                cmd &= ~PCI_COMMAND_IO;
+                pci_write_config_word(dev, PCI_COMMAND, cmd);
+                for (i = 0; i < 5; i++) {
+                        dev->resource[i].start = dev->resource[i].end = 0;
+                        dev->resource[i].flags = 0;
+                        pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, 0);
+                }
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, fixup_k2_sata);
+
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
new file mode 100644
index 000000000000..0037a8c8c81f
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -0,0 +1,678 @@
+/*
+ *  Support for the interrupt controllers found on Power Macintosh,
+ *  currently Apple's "Grand Central" interrupt controller in all
+ *  it's incarnations. OpenPIC support used on newer machines is
+ *  in a separate file
+ *
+ *  Copyright (C) 1997 Paul Mackerras (paulus@samba.org)
+ *
+ *  Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/stddef.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/sysdev.h>
+#include <linux/adb.h>
+#include <linux/pmu.h>
+#include <linux/module.h>
+
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/time.h>
+#include <asm/pmac_feature.h>
+#include <asm/mpic.h>
+
+#include "pmac.h"
+
+/*
+ * XXX this should be in xmon.h, but putting it there means xmon.h
+ * has to include <linux/interrupt.h> (to get irqreturn_t), which
+ * causes all sorts of problems.  -- paulus
+ */
+extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
+
+#ifdef CONFIG_PPC32
+struct pmac_irq_hw {
+        unsigned int    event;
+        unsigned int    enable;
+        unsigned int    ack;
+        unsigned int    level;
+};
+
+/* Default addresses */
+static volatile struct pmac_irq_hw *pmac_irq_hw[4] = {
+        (struct pmac_irq_hw *) 0xf3000020,
+        (struct pmac_irq_hw *) 0xf3000010,
+        (struct pmac_irq_hw *) 0xf4000020,
+        (struct pmac_irq_hw *) 0xf4000010,
+};
+
+#define GC_LEVEL_MASK           0x3ff00000
+#define OHARE_LEVEL_MASK        0x1ff00000
+#define HEATHROW_LEVEL_MASK     0x1ff00000
+
+static int max_irqs;
+static int max_real_irqs;
+static u32 level_mask[4];
+
+static DEFINE_SPINLOCK(pmac_pic_lock);
+
+#define GATWICK_IRQ_POOL_SIZE        10
+static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
+
+/*
+ * Mark an irq as "lost".  This is only used on the pmac
+ * since it can lose interrupts (see pmac_set_irq_mask).
+ * -- Cort
+ */
+void
+__set_lost(unsigned long irq_nr, int nokick)
+{
+        if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
+                atomic_inc(&ppc_n_lost_interrupts);
+                if (!nokick)
+                        set_dec(1);
+        }
+}
+
+static void
+pmac_mask_and_ack_irq(unsigned int irq_nr)
+{
+        unsigned long bit = 1UL << (irq_nr & 0x1f);
+        int i = irq_nr >> 5;
+        unsigned long flags;
+
+        if ((unsigned)irq_nr >= max_irqs)
+                return;
+
+        clear_bit(irq_nr, ppc_cached_irq_mask);
+        if (test_and_clear_bit(irq_nr, ppc_lost_interrupts))
+                atomic_dec(&ppc_n_lost_interrupts);
+        spin_lock_irqsave(&pmac_pic_lock, flags);
+        out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
+        out_le32(&pmac_irq_hw[i]->ack, bit);
+        do {
+                /* make sure ack gets to controller before we enable
+                   interrupts */
+                mb();
+        } while((in_le32(&pmac_irq_hw[i]->enable) & bit)
+                != (ppc_cached_irq_mask[i] & bit));
+        spin_unlock_irqrestore(&pmac_pic_lock, flags);
+}
+
+static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
+{
+        unsigned long bit = 1UL << (irq_nr & 0x1f);
+        int i = irq_nr >> 5;
+        unsigned long flags;
+
+        if ((unsigned)irq_nr >= max_irqs)
+                return;
+
+        spin_lock_irqsave(&pmac_pic_lock, flags);
+        /* enable unmasked interrupts */
+        out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
+
+        do {
+                /* make sure mask gets to controller before we
+                   return to user */
+                mb();
+        } while((in_le32(&pmac_irq_hw[i]->enable) & bit)
+                != (ppc_cached_irq_mask[i] & bit));
+
+        /*
+         * Unfortunately, setting the bit in the enable register
+         * when the device interrupt is already on *doesn't* set
+         * the bit in the flag register or request another interrupt.
+         */
+        if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level))
+                __set_lost((ulong)irq_nr, nokicklost);
+        spin_unlock_irqrestore(&pmac_pic_lock, flags);
+}
+
+/* When an irq gets requested for the first client, if it's an
+ * edge interrupt, we clear any previous one on the controller
+ */
+static unsigned int pmac_startup_irq(unsigned int irq_nr)
+{
+        unsigned long bit = 1UL << (irq_nr & 0x1f);
+        int i = irq_nr >> 5;
+
+        if ((irq_desc[irq_nr].status & IRQ_LEVEL) == 0)
+                out_le32(&pmac_irq_hw[i]->ack, bit);
+        set_bit(irq_nr, ppc_cached_irq_mask);
+        pmac_set_irq_mask(irq_nr, 0);
+
+        return 0;
+}
+
+static void pmac_mask_irq(unsigned int irq_nr)
+{
+        clear_bit(irq_nr, ppc_cached_irq_mask);
+        pmac_set_irq_mask(irq_nr, 0);
+        mb();
+}
+
+static void pmac_unmask_irq(unsigned int irq_nr)
+{
+        set_bit(irq_nr, ppc_cached_irq_mask);
+        pmac_set_irq_mask(irq_nr, 0);
+}
+
+static void pmac_end_irq(unsigned int irq_nr)
+{
+        if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
+            && irq_desc[irq_nr].action) {
+                set_bit(irq_nr, ppc_cached_irq_mask);
+                pmac_set_irq_mask(irq_nr, 1);
+        }
+}
+
+
+struct hw_interrupt_type pmac_pic = {
+        .typename       = " PMAC-PIC ",
+        .startup        = pmac_startup_irq,
+        .enable         = pmac_unmask_irq,
+        .disable        = pmac_mask_irq,
+        .ack            = pmac_mask_and_ack_irq,
+        .end            = pmac_end_irq,
+};
+
+struct hw_interrupt_type gatwick_pic = {
+        .typename       = " GATWICK  ",
+        .startup        = pmac_startup_irq,
+        .enable         = pmac_unmask_irq,
+        .disable        = pmac_mask_irq,
+        .ack            = pmac_mask_and_ack_irq,
+        .end            = pmac_end_irq,
+};
+
+static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs)
+{
+        int irq, bits;
+
+        for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) {
+                int i = irq >> 5;
+                bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
+                /* We must read level interrupts from the level register */
+                bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]);
+                bits &= ppc_cached_irq_mask[i];
+                if (bits == 0)
+                        continue;
+                irq += __ilog2(bits);
+                __do_IRQ(irq, regs);
+                return IRQ_HANDLED;
+        }
+        printk("gatwick irq not from gatwick pic\n");
+        return IRQ_NONE;
+}
+
+int
+pmac_get_irq(struct pt_regs *regs)
+{
+        int irq;
+        unsigned long bits = 0;
+
+#ifdef CONFIG_SMP
+        void psurge_smp_message_recv(struct pt_regs *);
+
+        /* IPI's are a hack on the powersurge -- Cort */
+        if ( smp_processor_id() != 0 ) {
+                psurge_smp_message_recv(regs);
+                return -2;      /* ignore, already handled */
+        }
+#endif /* CONFIG_SMP */
+        for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
+                int i = irq >> 5;
+                bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
+                /* We must read level interrupts from the level register */
+                bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]);
+                bits &= ppc_cached_irq_mask[i];
+                if (bits == 0)
+                        continue;
+                irq += __ilog2(bits);
+                break;
+        }
+
+        return irq;
+}
+
+/* This routine will fix some missing interrupt values in the device tree
+ * on the gatwick mac-io controller used by some PowerBooks
+ */
+static void __init
+pmac_fix_gatwick_interrupts(struct device_node *gw, int irq_base)
+{
+        struct device_node *node;
+        int count;
+
+        memset(gatwick_int_pool, 0, sizeof(gatwick_int_pool));
+        node = gw->child;
+        count = 0;
+        while(node)
+        {
+                /* Fix SCC */
+                if (strcasecmp(node->name, "escc") == 0)
+                        if (node->child) {
+                                if (node->child->n_intrs < 3) {
+                                        node->child->intrs = &gatwick_int_pool[count];
+                                        count += 3;
+                                }
+                                node->child->n_intrs = 3;
+                                node->child->intrs[0].line = 15+irq_base;
+                                node->child->intrs[1].line =  4+irq_base;
+                                node->child->intrs[2].line =  5+irq_base;
+                                printk(KERN_INFO "irq: fixed SCC on second controller (%d,%d,%d)\n",
+                                        node->child->intrs[0].line,
+                                        node->child->intrs[1].line,
+                                        node->child->intrs[2].line);
+                        }
+                /* Fix media-bay & left SWIM */
+                if (strcasecmp(node->name, "media-bay") == 0) {
+                        struct device_node* ya_node;
+
+                        if (node->n_intrs == 0)
+                                node->intrs = &gatwick_int_pool[count++];
+                        node->n_intrs = 1;
+                        node->intrs[0].line = 29+irq_base;
+                        printk(KERN_INFO "irq: fixed media-bay on second controller (%d)\n",
+                                        node->intrs[0].line);
+
+                        ya_node = node->child;
+                        while(ya_node)
+                        {
+                                if (strcasecmp(ya_node->name, "floppy") == 0) {
+                                        if (ya_node->n_intrs < 2) {
+                                                ya_node->intrs = &gatwick_int_pool[count];
+                                                count += 2;
+                                        }
+                                        ya_node->n_intrs = 2;
+                                        ya_node->intrs[0].line = 19+irq_base;
+                                        ya_node->intrs[1].line =  1+irq_base;
+                                        printk(KERN_INFO "irq: fixed floppy on second controller (%d,%d)\n",
+                                                ya_node->intrs[0].line, ya_node->intrs[1].line);
+                                }
+                                if (strcasecmp(ya_node->name, "ata4") == 0) {
+                                        if (ya_node->n_intrs < 2) {
+                                                ya_node->intrs = &gatwick_int_pool[count];
+                                                count += 2;
+                                        }
+                                        ya_node->n_intrs = 2;
+                                        ya_node->intrs[0].line = 14+irq_base;
+                                        ya_node->intrs[1].line =  3+irq_base;
+                                        printk(KERN_INFO "irq: fixed ide on second controller (%d,%d)\n",
+                                                ya_node->intrs[0].line, ya_node->intrs[1].line);
+                                }
+                                ya_node = ya_node->sibling;
+                        }
+                }
+                node = node->sibling;
+        }
+        if (count > 10) {
+                printk("WARNING !! Gatwick interrupt pool overflow\n");
+                printk("  GATWICK_IRQ_POOL_SIZE = %d\n", GATWICK_IRQ_POOL_SIZE);
+                printk("              requested = %d\n", count);
+        }
+}
+
+/*
+ * The PowerBook 3400/2400/3500 can have a combo ethernet/modem
+ * card which includes an ohare chip that acts as a second interrupt
+ * controller.  If we find this second ohare, set it up and fix the
+ * interrupt value in the device tree for the ethernet chip.
+ */
+static int __init enable_second_ohare(void)
+{
+        unsigned char bus, devfn;
+        unsigned short cmd;
+        unsigned long addr;
+        struct device_node *irqctrler = find_devices("pci106b,7");
+        struct device_node *ether;
+
+        if (irqctrler == NULL || irqctrler->n_addrs <= 0)
+                return -1;
+        addr = (unsigned long) ioremap(irqctrler->addrs[0].address, 0x40);
+        pmac_irq_hw[1] = (volatile struct pmac_irq_hw *)(addr + 0x20);
+        max_irqs = 64;
+        if (pci_device_from_OF_node(irqctrler, &bus, &devfn) == 0) {
+                struct pci_controller* hose = pci_find_hose_for_OF_device(irqctrler);
+                if (!hose)
+                    printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
+                else {
+                    early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
+                    cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
+                    cmd &= ~PCI_COMMAND_IO;
+                    early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
+                }
+        }
+
+        /* Fix interrupt for the modem/ethernet combo controller. The number
+           in the device tree (27) is bogus (correct for the ethernet-only
+           board but not the combo ethernet/modem board).
+           The real interrupt is 28 on the second controller -> 28+32 = 60.
+        */
+        ether = find_devices("pci1011,14");
+        if (ether && ether->n_intrs > 0) {
+                ether->intrs[0].line = 60;
+                printk(KERN_INFO "irq: Fixed ethernet IRQ to %d\n",
+                       ether->intrs[0].line);
+        }
+
+        /* Return the interrupt number of the cascade */
+        return irqctrler->intrs[0].line;
+}
+
+#ifdef CONFIG_XMON
+static struct irqaction xmon_action = {
+        .handler        = xmon_irq,
+        .flags          = 0,
+        .mask           = CPU_MASK_NONE,
+        .name           = "NMI - XMON"
+};
+#endif
+
+static struct irqaction gatwick_cascade_action = {
+        .handler        = gatwick_action,
+        .flags          = SA_INTERRUPT,
+        .mask           = CPU_MASK_NONE,
+        .name           = "cascade",
+};
+#endif /* CONFIG_PPC32 */
+
+static int pmac_u3_cascade(struct pt_regs *regs, void *data)
+{
+        return mpic_get_one_irq((struct mpic *)data, regs);
+}
+
+void __init pmac_pic_init(void)
+{
+        struct device_node *irqctrler  = NULL;
+        struct device_node *irqctrler2 = NULL;
+        struct device_node *np;
+#ifdef CONFIG_PPC32
+        int i;
+        unsigned long addr;
+        int irq_cascade = -1;
+#endif
+        struct mpic *mpic1, *mpic2;
+
+        /* We first try to detect Apple's new Core99 chipset, since mac-io
+         * is quite different on those machines and contains an IBM MPIC2.
+         */
+        np = find_type_devices("open-pic");
+        while (np) {
+                if (np->parent && !strcmp(np->parent->name, "u3"))
+                        irqctrler2 = np;
+                else
+                        irqctrler = np;
+                np = np->next;
+        }
+        if (irqctrler != NULL && irqctrler->n_addrs > 0) {
+                unsigned char senses[128];
+
+                printk(KERN_INFO "PowerMac using OpenPIC irq controller at 0x%08x\n",
+                       (unsigned int)irqctrler->addrs[0].address);
+                pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler, 0, 0);
+
+                prom_get_irq_senses(senses, 0, 128);
+                mpic1 = mpic_alloc(irqctrler->addrs[0].address,
+                                   MPIC_PRIMARY | MPIC_WANTS_RESET,
+                                   0, 0, 128, 252, senses, 128, " OpenPIC  ");
+                BUG_ON(mpic1 == NULL);
+                mpic_init(mpic1);               
+
+                if (irqctrler2 != NULL && irqctrler2->n_intrs > 0 &&
+                    irqctrler2->n_addrs > 0) {
+                        printk(KERN_INFO "Slave OpenPIC at 0x%08x hooked on IRQ %d\n",
+                               (u32)irqctrler2->addrs[0].address,
+                               irqctrler2->intrs[0].line);
+
+                        pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0);
+                        prom_get_irq_senses(senses, 128, 128 + 124);
+
+                        /* We don't need to set MPIC_BROKEN_U3 here since we don't have
+                         * hypertransport interrupts routed to it
+                         */
+                        mpic2 = mpic_alloc(irqctrler2->addrs[0].address,
+                                           MPIC_BIG_ENDIAN | MPIC_WANTS_RESET,
+                                           0, 128, 124, 0, senses, 124,
+                                           " U3-MPIC  ");
+                        BUG_ON(mpic2 == NULL);
+                        mpic_init(mpic2);
+                        mpic_setup_cascade(irqctrler2->intrs[0].line,
+                                           pmac_u3_cascade, mpic2);
+                }
+#if defined(CONFIG_XMON) && defined(CONFIG_PPC32)
+                {
+                        struct device_node* pswitch;
+                        int nmi_irq;
+
+                        pswitch = find_devices("programmer-switch");
+                        if (pswitch && pswitch->n_intrs) {
+                                nmi_irq = pswitch->intrs[0].line;
+                                mpic_irq_set_priority(nmi_irq, 9);
+                                setup_irq(nmi_irq, &xmon_action);
+                        }
+                }
+#endif  /* CONFIG_XMON */
+                return;
+        }
+        irqctrler = NULL;
+
+#ifdef CONFIG_PPC32
+        /* Get the level/edge settings, assume if it's not
+         * a Grand Central nor an OHare, then it's an Heathrow
+         * (or Paddington).
+         */
+        ppc_md.get_irq = pmac_get_irq;
+        if (find_devices("gc"))
+                level_mask[0] = GC_LEVEL_MASK;
+        else if (find_devices("ohare")) {
+                level_mask[0] = OHARE_LEVEL_MASK;
+                /* We might have a second cascaded ohare */
+                level_mask[1] = OHARE_LEVEL_MASK;
+        } else {
+                level_mask[0] = HEATHROW_LEVEL_MASK;
+                level_mask[1] = 0;
+                /* We might have a second cascaded heathrow */
+                level_mask[2] = HEATHROW_LEVEL_MASK;
+                level_mask[3] = 0;
+        }
+
+        /*
+         * G3 powermacs and 1999 G3 PowerBooks have 64 interrupts,
+         * 1998 G3 Series PowerBooks have 128,
+         * other powermacs have 32.
+         * The combo ethernet/modem card for the Powerstar powerbooks
+         * (2400/3400/3500, ohare based) has a second ohare chip
+         * effectively making a total of 64.
+         */
+        max_irqs = max_real_irqs = 32;
+        irqctrler = find_devices("mac-io");
+        if (irqctrler)
+        {
+                max_real_irqs = 64;
+                if (irqctrler->next)
+                        max_irqs = 128;
+                else
+                        max_irqs = 64;
+        }
+        for ( i = 0; i < max_real_irqs ; i++ )
+                irq_desc[i].handler = &pmac_pic;
+
+        /* get addresses of first controller */
+        if (irqctrler) {
+                if  (irqctrler->n_addrs > 0) {
+                        addr = (unsigned long)
+                                ioremap(irqctrler->addrs[0].address, 0x40);
+                        for (i = 0; i < 2; ++i)
+                                pmac_irq_hw[i] = (volatile struct pmac_irq_hw*)
+                                        (addr + (2 - i) * 0x10);
+                }
+
+                /* get addresses of second controller */
+                irqctrler = irqctrler->next;
+                if (irqctrler && irqctrler->n_addrs > 0) {
+                        addr = (unsigned long)
+                                ioremap(irqctrler->addrs[0].address, 0x40);
+                        for (i = 2; i < 4; ++i)
+                                pmac_irq_hw[i] = (volatile struct pmac_irq_hw*)
+                                        (addr + (4 - i) * 0x10);
+                        irq_cascade = irqctrler->intrs[0].line;
+                        if (device_is_compatible(irqctrler, "gatwick"))
+                                pmac_fix_gatwick_interrupts(irqctrler, max_real_irqs);
+                }
+        } else {
+                /* older powermacs have a GC (grand central) or ohare at
+                   f3000000, with interrupt control registers at f3000020. */
+                addr = (unsigned long) ioremap(0xf3000000, 0x40);
+                pmac_irq_hw[0] = (volatile struct pmac_irq_hw *) (addr + 0x20);
+        }
+
+        /* PowerBooks 3400 and 3500 can have a second controller in a second
+           ohare chip, on the combo ethernet/modem card */
+        if (machine_is_compatible("AAPL,3400/2400")
+             || machine_is_compatible("AAPL,3500"))
+                irq_cascade = enable_second_ohare();
+
+        /* disable all interrupts in all controllers */
+        for (i = 0; i * 32 < max_irqs; ++i)
+                out_le32(&pmac_irq_hw[i]->enable, 0);
+        /* mark level interrupts */
+        for (i = 0; i < max_irqs; i++)
+                if (level_mask[i >> 5] & (1UL << (i & 0x1f)))
+                        irq_desc[i].status = IRQ_LEVEL;
+
+        /* get interrupt line of secondary interrupt controller */
+        if (irq_cascade >= 0) {
+                printk(KERN_INFO "irq: secondary controller on irq %d\n",
+                        (int)irq_cascade);
+                for ( i = max_real_irqs ; i < max_irqs ; i++ )
+                        irq_desc[i].handler = &gatwick_pic;
+                setup_irq(irq_cascade, &gatwick_cascade_action);
+        }
+        printk("System has %d possible interrupts\n", max_irqs);
+        if (max_irqs != max_real_irqs)
+                printk(KERN_DEBUG "%d interrupts on main controller\n",
+                        max_real_irqs);
+
+#ifdef CONFIG_XMON
+        setup_irq(20, &xmon_action);
+#endif  /* CONFIG_XMON */
+#endif  /* CONFIG_PPC32 */
+}
+
+#ifdef CONFIG_PM
+/*
+ * These procedures are used in implementing sleep on the powerbooks.
+ * sleep_save_intrs() saves the states of all interrupt enables
+ * and disables all interrupts except for the nominated one.
+ * sleep_restore_intrs() restores the states of all interrupt enables.
+ */
+unsigned long sleep_save_mask[2];
+
+/* This used to be passed by the PMU driver but that link got
+ * broken with the new driver model. We use this tweak for now...
+ */
+static int pmacpic_find_viaint(void)
+{
+        int viaint = -1;
+
+#ifdef CONFIG_ADB_PMU
+        struct device_node *np;
+
+        if (pmu_get_model() != PMU_OHARE_BASED)
+                goto not_found;
+        np = of_find_node_by_name(NULL, "via-pmu");
+        if (np == NULL)
+                goto not_found;
+        viaint = np->intrs[0].line;
+#endif /* CONFIG_ADB_PMU */
+
+not_found:
+        return viaint;
+}
+
+static int pmacpic_suspend(struct sys_device *sysdev, pm_message_t state)
+{
+        int viaint = pmacpic_find_viaint();
+
+        sleep_save_mask[0] = ppc_cached_irq_mask[0];
+        sleep_save_mask[1] = ppc_cached_irq_mask[1];
+        ppc_cached_irq_mask[0] = 0;
+        ppc_cached_irq_mask[1] = 0;
+        if (viaint > 0)
+                set_bit(viaint, ppc_cached_irq_mask);
+        out_le32(&pmac_irq_hw[0]->enable, ppc_cached_irq_mask[0]);
+        if (max_real_irqs > 32)
+                out_le32(&pmac_irq_hw[1]->enable, ppc_cached_irq_mask[1]);
+        (void)in_le32(&pmac_irq_hw[0]->event);
+        /* make sure mask gets to controller before we return to caller */
+        mb();
+        (void)in_le32(&pmac_irq_hw[0]->enable);
+
+        return 0;
+}
+
+static int pmacpic_resume(struct sys_device *sysdev)
+{
+        int i;
+
+        out_le32(&pmac_irq_hw[0]->enable, 0);
+        if (max_real_irqs > 32)
+                out_le32(&pmac_irq_hw[1]->enable, 0);
+        mb();
+        for (i = 0; i < max_real_irqs; ++i)
+                if (test_bit(i, sleep_save_mask))
+                        pmac_unmask_irq(i);
+
+        return 0;
+}
+
+#endif /* CONFIG_PM */
+
+static struct sysdev_class pmacpic_sysclass = {
+        set_kset_name("pmac_pic"),
+};
+
+static struct sys_device device_pmacpic = {
+        .id             = 0,
+        .cls            = &pmacpic_sysclass,
+};
+
+static struct sysdev_driver driver_pmacpic = {
+#ifdef CONFIG_PM
+        .suspend        = &pmacpic_suspend,
+        .resume         = &pmacpic_resume,
+#endif /* CONFIG_PM */
+};
+
+static int __init init_pmacpic_sysfs(void)
+{
+#ifdef CONFIG_PPC32
+        if (max_irqs == 0)
+                return -ENODEV;
+#endif
+        printk(KERN_DEBUG "Registering pmac pic with sysfs...\n");
+        sysdev_class_register(&pmacpic_sysclass);
+        sysdev_register(&device_pmacpic);
+        sysdev_driver_register(&pmacpic_sysclass, &driver_pmacpic);
+        return 0;
+}
+
+subsys_initcall(init_pmacpic_sysfs);
+
diff --git a/arch/powerpc/platforms/powermac/pic.h b/arch/powerpc/platforms/powermac/pic.h
new file mode 100644
index 000000000000..664103dfeef9
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/pic.h
@@ -0,0 +1,11 @@
+#ifndef __PPC_PLATFORMS_PMAC_PIC_H
+#define __PPC_PLATFORMS_PMAC_PIC_H
+
+#include <linux/irq.h>
+
+extern struct hw_interrupt_type pmac_pic;
+
+void pmac_pic_init(void);
+int pmac_get_irq(struct pt_regs *regs);
+
+#endif /* __PPC_PLATFORMS_PMAC_PIC_H */
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h
new file mode 100644
index 000000000000..2ad25e13423e
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/pmac.h
@@ -0,0 +1,51 @@
+#ifndef __PMAC_H__
+#define __PMAC_H__
+
+#include <linux/pci.h>
+#include <linux/ide.h>
+#include <linux/irq.h>
+
+/*
+ * Declaration for the various functions exported by the
+ * pmac_* files. Mostly for use by pmac_setup
+ */
+
+struct rtc_time;
+
+extern long pmac_time_init(void);
+extern unsigned long pmac_get_boot_time(void);
+extern void pmac_get_rtc_time(struct rtc_time *);
+extern int pmac_set_rtc_time(struct rtc_time *);
+extern void pmac_read_rtc_time(void);
+extern void pmac_calibrate_decr(void);
+extern void pmac_pcibios_fixup(void);
+extern void pmac_pci_init(void);
+extern unsigned long pmac_ide_get_base(int index);
+extern void pmac_ide_init_hwif_ports(hw_regs_t *hw,
+        unsigned long data_port, unsigned long ctrl_port, int *irq);
+
+extern void pmac_nvram_update(void);
+extern unsigned char pmac_nvram_read_byte(int addr);
+extern void pmac_nvram_write_byte(int addr, unsigned char val);
+extern int pmac_pci_enable_device_hook(struct pci_dev *dev, int initial);
+extern void pmac_pcibios_after_init(void);
+extern int of_show_percpuinfo(struct seq_file *m, int i);
+
+extern void pmac_pci_init(void);
+extern void pmac_setup_pci_dma(void);
+extern void pmac_check_ht_link(void);
+
+extern void pmac_setup_smp(void);
+
+extern unsigned long pmac_ide_get_base(int index);
+extern void pmac_ide_init_hwif_ports(hw_regs_t *hw,
+        unsigned long data_port, unsigned long ctrl_port, int *irq);
+
+extern int pmac_nvram_init(void);
+
+extern struct hw_interrupt_type pmac_pic;
+
+void pmac_pic_init(void);
+int pmac_get_irq(struct pt_regs *regs);
+
+#endif /* __PMAC_H__ */
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
new file mode 100644
index 000000000000..6f62af597291
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -0,0 +1,794 @@
+/*
+ *  Powermac setup and early boot code plus other random bits.
+ *
+ *  PowerPC version
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Adapted for Power Macintosh by Paul Mackerras
+ *    Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
+ *
+ *  Derived from "arch/alpha/kernel/setup.c"
+ *    Copyright (C) 1995 Linus Torvalds
+ *
+ *  Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+/*
+ * bootup setup stuff..
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/slab.h>
+#include <linux/user.h>
+#include <linux/a.out.h>
+#include <linux/tty.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/major.h>
+#include <linux/initrd.h>
+#include <linux/vt_kern.h>
+#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/pci.h>
+#include <linux/adb.h>
+#include <linux/cuda.h>
+#include <linux/pmu.h>
+#include <linux/irq.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/bitops.h>
+#include <linux/suspend.h>
+
+#include <asm/reg.h>
+#include <asm/sections.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/io.h>
+#include <asm/pci-bridge.h>
+#include <asm/ohare.h>
+#include <asm/mediabay.h>
+#include <asm/machdep.h>
+#include <asm/dma.h>
+#include <asm/cputable.h>
+#include <asm/btext.h>
+#include <asm/pmac_feature.h>
+#include <asm/time.h>
+#include <asm/of_device.h>
+#include <asm/mmu_context.h>
+#include <asm/iommu.h>
+#include <asm/smu.h>
+#include <asm/pmc.h>
+#include <asm/mpic.h>
+
+#include "pmac.h"
+
+#undef SHOW_GATWICK_IRQS
+
+unsigned char drive_info;
+
+int ppc_override_l2cr = 0;
+int ppc_override_l2cr_value;
+int has_l2cache = 0;
+
+int pmac_newworld = 1;
+
+static int current_root_goodness = -1;
+
+extern int pmac_newworld;
+extern struct machdep_calls pmac_md;
+
+#define DEFAULT_ROOT_DEVICE Root_SDA1   /* sda1 - slightly silly choice */
+
+#ifdef CONFIG_PPC64
+#include <asm/udbg.h>
+int sccdbg;
+#endif
+
+extern void zs_kgdb_hook(int tty_num);
+
+sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
+EXPORT_SYMBOL(sys_ctrler);
+
+#ifdef CONFIG_PMAC_SMU
+unsigned long smu_cmdbuf_abs;
+EXPORT_SYMBOL(smu_cmdbuf_abs);
+#endif
+
+#ifdef CONFIG_SMP
+extern struct smp_ops_t psurge_smp_ops;
+extern struct smp_ops_t core99_smp_ops;
+#endif /* CONFIG_SMP */
+
+static void pmac_show_cpuinfo(struct seq_file *m)
+{
+        struct device_node *np;
+        char *pp;
+        int plen;
+        int mbmodel;
+        unsigned int mbflags;
+        char* mbname;
+
+        mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
+                                    PMAC_MB_INFO_MODEL, 0);
+        mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
+                                    PMAC_MB_INFO_FLAGS, 0);
+        if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
+                              (long) &mbname) != 0)
+                mbname = "Unknown";
+
+        /* find motherboard type */
+        seq_printf(m, "machine\t\t: ");
+        np = of_find_node_by_path("/");
+        if (np != NULL) {
+                pp = (char *) get_property(np, "model", NULL);
+                if (pp != NULL)
+                        seq_printf(m, "%s\n", pp);
+                else
+                        seq_printf(m, "PowerMac\n");
+                pp = (char *) get_property(np, "compatible", &plen);
+                if (pp != NULL) {
+                        seq_printf(m, "motherboard\t:");
+                        while (plen > 0) {
+                                int l = strlen(pp) + 1;
+                                seq_printf(m, " %s", pp);
+                                plen -= l;
+                                pp += l;
+                        }
+                        seq_printf(m, "\n");
+                }
+                of_node_put(np);
+        } else
+                seq_printf(m, "PowerMac\n");
+
+        /* print parsed model */
+        seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
+        seq_printf(m, "pmac flags\t: %08x\n", mbflags);
+
+        /* find l2 cache info */
+        np = of_find_node_by_name(NULL, "l2-cache");
+        if (np == NULL)
+                np = of_find_node_by_type(NULL, "cache");
+        if (np != NULL) {
+                unsigned int *ic = (unsigned int *)
+                        get_property(np, "i-cache-size", NULL);
+                unsigned int *dc = (unsigned int *)
+                        get_property(np, "d-cache-size", NULL);
+                seq_printf(m, "L2 cache\t:");
+                has_l2cache = 1;
+                if (get_property(np, "cache-unified", NULL) != 0 && dc) {
+                        seq_printf(m, " %dK unified", *dc / 1024);
+                } else {
+                        if (ic)
+                                seq_printf(m, " %dK instruction", *ic / 1024);
+                        if (dc)
+                                seq_printf(m, "%s %dK data",
+                                           (ic? " +": ""), *dc / 1024);
+                }
+                pp = get_property(np, "ram-type", NULL);
+                if (pp)
+                        seq_printf(m, " %s", pp);
+                seq_printf(m, "\n");
+                of_node_put(np);
+        }
+
+        /* Indicate newworld/oldworld */
+        seq_printf(m, "pmac-generation\t: %s\n",
+                   pmac_newworld ? "NewWorld" : "OldWorld");
+}
+
+static void pmac_show_percpuinfo(struct seq_file *m, int i)
+{
+#ifdef CONFIG_CPU_FREQ_PMAC
+        extern unsigned int pmac_get_one_cpufreq(int i);
+        unsigned int freq = pmac_get_one_cpufreq(i);
+        if (freq != 0) {
+                seq_printf(m, "clock\t\t: %dMHz\n", freq/1000);
+                return;
+        }
+#endif /* CONFIG_CPU_FREQ_PMAC */
+}
+
+#ifndef CONFIG_ADB_CUDA
+int find_via_cuda(void)
+{
+        if (!find_devices("via-cuda"))
+                return 0;
+        printk("WARNING ! Your machine is CUDA-based but your kernel\n");
+        printk("          wasn't compiled with CONFIG_ADB_CUDA option !\n");
+        return 0;
+}
+#endif
+
+#ifndef CONFIG_ADB_PMU
+int find_via_pmu(void)
+{
+        if (!find_devices("via-pmu"))
+                return 0;
+        printk("WARNING ! Your machine is PMU-based but your kernel\n");
+        printk("          wasn't compiled with CONFIG_ADB_PMU option !\n");
+        return 0;
+}
+#endif
+
+#ifndef CONFIG_PMAC_SMU
+int smu_init(void)
+{
+        /* should check and warn if SMU is present */
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_PPC32
+static volatile u32 *sysctrl_regs;
+
+static void __init ohare_init(void)
+{
+        /* this area has the CPU identification register
+           and some registers used by smp boards */
+        sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
+
+        /*
+         * Turn on the L2 cache.
+         * We assume that we have a PSX memory controller iff
+         * we have an ohare I/O controller.
+         */
+        if (find_devices("ohare") != NULL) {
+                if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
+                        if (sysctrl_regs[4] & 0x10)
+                                sysctrl_regs[4] |= 0x04000020;
+                        else
+                                sysctrl_regs[4] |= 0x04000000;
+                        if(has_l2cache)
+                                printk(KERN_INFO "Level 2 cache enabled\n");
+                }
+        }
+}
+
+static void __init l2cr_init(void)
+{
+        /* Checks "l2cr-value" property in the registry */
+        if (cpu_has_feature(CPU_FTR_L2CR)) {
+                struct device_node *np = find_devices("cpus");
+                if (np == 0)
+                        np = find_type_devices("cpu");
+                if (np != 0) {
+                        unsigned int *l2cr = (unsigned int *)
+                                get_property(np, "l2cr-value", NULL);
+                        if (l2cr != 0) {
+                                ppc_override_l2cr = 1;
+                                ppc_override_l2cr_value = *l2cr;
+                                _set_L2CR(0);
+                                _set_L2CR(ppc_override_l2cr_value);
+                        }
+                }
+        }
+
+        if (ppc_override_l2cr)
+                printk(KERN_INFO "L2CR overridden (0x%x), "
+                       "backside cache is %s\n",
+                       ppc_override_l2cr_value,
+                       (ppc_override_l2cr_value & 0x80000000)
+                                ? "enabled" : "disabled");
+}
+#endif
+
+void __init pmac_setup_arch(void)
+{
+        struct device_node *cpu, *ic;
+        int *fp;
+        unsigned long pvr;
+
+        pvr = PVR_VER(mfspr(SPRN_PVR));
+
+        /* Set loops_per_jiffy to a half-way reasonable value,
+           for use until calibrate_delay gets called. */
+        loops_per_jiffy = 50000000 / HZ;
+        cpu = of_find_node_by_type(NULL, "cpu");
+        if (cpu != NULL) {
+                fp = (int *) get_property(cpu, "clock-frequency", NULL);
+                if (fp != NULL) {
+                        if (pvr >= 0x30 && pvr < 0x80)
+                                /* PPC970 etc. */
+                                loops_per_jiffy = *fp / (3 * HZ);
+                        else if (pvr == 4 || pvr >= 8)
+                                /* 604, G3, G4 etc. */
+                                loops_per_jiffy = *fp / HZ;
+                        else
+                                /* 601, 603, etc. */
+                                loops_per_jiffy = *fp / (2 * HZ);
+                }
+                of_node_put(cpu);
+        }
+
+        /* See if newworld or oldworld */
+        for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
+                if (get_property(ic, "interrupt-controller", NULL))
+                        break;
+        pmac_newworld = (ic != NULL);
+        if (ic)
+                of_node_put(ic);
+
+        /* Lookup PCI hosts */
+        pmac_pci_init();
+
+#ifdef CONFIG_PPC32
+        ohare_init();
+        l2cr_init();
+#endif /* CONFIG_PPC32 */
+
+#ifdef CONFIG_PPC64
+        /* Probe motherboard chipset */
+        /* this is done earlier in setup_arch for 32-bit */
+        pmac_feature_init();
+
+        /* We can NAP */
+        powersave_nap = 1;
+        printk(KERN_INFO "Using native/NAP idle loop\n");
+#endif
+
+#ifdef CONFIG_KGDB
+        zs_kgdb_hook(0);
+#endif
+
+        find_via_cuda();
+        find_via_pmu();
+        smu_init();
+
+#ifdef CONFIG_NVRAM
+        pmac_nvram_init();
+#endif
+
+#ifdef CONFIG_PPC32
+#ifdef CONFIG_BLK_DEV_INITRD
+        if (initrd_start)
+                ROOT_DEV = Root_RAM0;
+        else
+#endif
+                ROOT_DEV = DEFAULT_ROOT_DEVICE;
+#endif
+
+#ifdef CONFIG_SMP
+        /* Check for Core99 */
+        if (find_devices("uni-n") || find_devices("u3"))
+                smp_ops = &core99_smp_ops;
+#ifdef CONFIG_PPC32
+        else
+                smp_ops = &psurge_smp_ops;
+#endif
+#endif /* CONFIG_SMP */
+}
+
+char *bootpath;
+char *bootdevice;
+void *boot_host;
+int boot_target;
+int boot_part;
+extern dev_t boot_dev;
+
+#ifdef CONFIG_SCSI
+void __init note_scsi_host(struct device_node *node, void *host)
+{
+        int l;
+        char *p;
+
+        l = strlen(node->full_name);
+        if (bootpath != NULL && bootdevice != NULL
+            && strncmp(node->full_name, bootdevice, l) == 0
+            && (bootdevice[l] == '/' || bootdevice[l] == 0)) {
+                boot_host = host;
+                /*
+                 * There's a bug in OF 1.0.5.  (Why am I not surprised.)
+                 * If you pass a path like scsi/sd@1:0 to canon, it returns
+                 * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0
+                 * That is, the scsi target number doesn't get preserved.
+                 * So we pick the target number out of bootpath and use that.
+                 */
+                p = strstr(bootpath, "/sd@");
+                if (p != NULL) {
+                        p += 4;
+                        boot_target = simple_strtoul(p, NULL, 10);
+                        p = strchr(p, ':');
+                        if (p != NULL)
+                                boot_part = simple_strtoul(p + 1, NULL, 10);
+                }
+        }
+}
+EXPORT_SYMBOL(note_scsi_host);
+#endif
+
+#if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
+static dev_t __init find_ide_boot(void)
+{
+        char *p;
+        int n;
+        dev_t __init pmac_find_ide_boot(char *bootdevice, int n);
+
+        if (bootdevice == NULL)
+                return 0;
+        p = strrchr(bootdevice, '/');
+        if (p == NULL)
+                return 0;
+        n = p - bootdevice;
+
+        return pmac_find_ide_boot(bootdevice, n);
+}
+#endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */
+
+static void __init find_boot_device(void)
+{
+#if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
+        boot_dev = find_ide_boot();
+#endif
+}
+
+/* TODO: Merge the suspend-to-ram with the common code !!!
+ * currently, this is a stub implementation for suspend-to-disk
+ * only
+ */
+
+#ifdef CONFIG_SOFTWARE_SUSPEND
+
+static int pmac_pm_prepare(suspend_state_t state)
+{
+        printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state);
+
+        return 0;
+}
+
+static int pmac_pm_enter(suspend_state_t state)
+{
+        printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state);
+
+        /* Giveup the lazy FPU & vec so we don't have to back them
+         * up from the low level code
+         */
+        enable_kernel_fp();
+
+#ifdef CONFIG_ALTIVEC
+        if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
+                enable_kernel_altivec();
+#endif /* CONFIG_ALTIVEC */
+
+        return 0;
+}
+
+static int pmac_pm_finish(suspend_state_t state)
+{
+        printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state);
+
+        /* Restore userland MMU context */
+        set_context(current->active_mm->context, current->active_mm->pgd);
+
+        return 0;
+}
+
+static struct pm_ops pmac_pm_ops = {
+        .pm_disk_mode   = PM_DISK_SHUTDOWN,
+        .prepare        = pmac_pm_prepare,
+        .enter          = pmac_pm_enter,
+        .finish         = pmac_pm_finish,
+};
+
+#endif /* CONFIG_SOFTWARE_SUSPEND */
+
+static int initializing = 1;
+
+static int pmac_late_init(void)
+{
+        initializing = 0;
+#ifdef CONFIG_SOFTWARE_SUSPEND
+        pm_set_ops(&pmac_pm_ops);
+#endif /* CONFIG_SOFTWARE_SUSPEND */
+        return 0;
+}
+
+late_initcall(pmac_late_init);
+
+/* can't be __init - can be called whenever a disk is first accessed */
+void note_bootable_part(dev_t dev, int part, int goodness)
+{
+        static int found_boot = 0;
+        char *p;
+
+        if (!initializing)
+                return;
+        if ((goodness <= current_root_goodness) &&
+            ROOT_DEV != DEFAULT_ROOT_DEVICE)
+                return;
+        p = strstr(saved_command_line, "root=");
+        if (p != NULL && (p == saved_command_line || p[-1] == ' '))
+                return;
+
+        if (!found_boot) {
+                find_boot_device();
+                found_boot = 1;
+        }
+        if (!boot_dev || dev == boot_dev) {
+                ROOT_DEV = dev + part;
+                boot_dev = 0;
+                current_root_goodness = goodness;
+        }
+}
+
+#ifdef CONFIG_ADB_CUDA
+static void cuda_restart(void)
+{
+        struct adb_request req;
+
+        cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
+        for (;;)
+                cuda_poll();
+}
+
+static void cuda_shutdown(void)
+{
+        struct adb_request req;
+
+        cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
+        for (;;)
+                cuda_poll();
+}
+
+#else
+#define cuda_restart()
+#define cuda_shutdown()
+#endif
+
+#ifndef CONFIG_ADB_PMU
+#define pmu_restart()
+#define pmu_shutdown()
+#endif
+
+#ifndef CONFIG_PMAC_SMU
+#define smu_restart()
+#define smu_shutdown()
+#endif
+
+static void pmac_restart(char *cmd)
+{
+        switch (sys_ctrler) {
+        case SYS_CTRLER_CUDA:
+                cuda_restart();
+                break;
+        case SYS_CTRLER_PMU:
+                pmu_restart();
+                break;
+        case SYS_CTRLER_SMU:
+                smu_restart();
+                break;
+        default: ;
+        }
+}
+
+static void pmac_power_off(void)
+{
+        switch (sys_ctrler) {
+        case SYS_CTRLER_CUDA:
+                cuda_shutdown();
+                break;
+        case SYS_CTRLER_PMU:
+                pmu_shutdown();
+                break;
+        case SYS_CTRLER_SMU:
+                smu_shutdown();
+                break;
+        default: ;
+        }
+}
+
+static void
+pmac_halt(void)
+{
+        pmac_power_off();
+}
+
+#ifdef CONFIG_PPC32
+void __init pmac_init(void)
+{
+        /* isa_io_base gets set in pmac_pci_init */
+        isa_mem_base = PMAC_ISA_MEM_BASE;
+        pci_dram_offset = PMAC_PCI_DRAM_OFFSET;
+        ISA_DMA_THRESHOLD = ~0L;
+        DMA_MODE_READ = 1;
+        DMA_MODE_WRITE = 2;
+
+        ppc_md = pmac_md;
+
+#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
+#ifdef CONFIG_BLK_DEV_IDE_PMAC
+        ppc_ide_md.ide_init_hwif        = pmac_ide_init_hwif_ports;
+        ppc_ide_md.default_io_base      = pmac_ide_get_base;
+#endif /* CONFIG_BLK_DEV_IDE_PMAC */
+#endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */
+
+        if (ppc_md.progress) ppc_md.progress("pmac_init(): exit", 0);
+
+}
+#endif
+
+/* 
+ * Early initialization.
+ */
+static void __init pmac_init_early(void)
+{
+#ifdef CONFIG_PPC64
+        /* Initialize hash table, from now on, we can take hash faults
+         * and call ioremap
+         */
+        hpte_init_native();
+
+        /* Init SCC */
+        if (strstr(cmd_line, "sccdbg")) {
+                sccdbg = 1;
+                udbg_init_scc(NULL);
+        }
+
+        /* Setup interrupt mapping options */
+        ppc64_interrupt_controller = IC_OPEN_PIC;
+
+        iommu_init_early_u3();
+#endif
+}
+
+static void __init pmac_progress(char *s, unsigned short hex)
+{
+#ifdef CONFIG_PPC64
+        if (sccdbg) {
+                udbg_puts(s);
+                udbg_puts("\n");
+                return;
+        }
+#endif
+#ifdef CONFIG_BOOTX_TEXT
+        if (boot_text_mapped) {
+                btext_drawstring(s);
+                btext_drawchar('\n');
+        }
+#endif /* CONFIG_BOOTX_TEXT */
+}
+
+/*
+ * pmac has no legacy IO, anything calling this function has to
+ * fail or bad things will happen
+ */
+static int pmac_check_legacy_ioport(unsigned int baseport)
+{
+        return -ENODEV;
+}
+
+static int __init pmac_declare_of_platform_devices(void)
+{
+        struct device_node *np, *npp;
+
+        np = find_devices("uni-n");
+        if (np) {
+                for (np = np->child; np != NULL; np = np->sibling)
+                        if (strncmp(np->name, "i2c", 3) == 0) {
+                                of_platform_device_create(np, "uni-n-i2c",
+                                                          NULL);
+                                break;
+                        }
+        }
+        np = find_devices("valkyrie");
+        if (np)
+                of_platform_device_create(np, "valkyrie", NULL);
+        np = find_devices("platinum");
+        if (np)
+                of_platform_device_create(np, "platinum", NULL);
+
+        npp = of_find_node_by_name(NULL, "u3");
+        if (npp) {
+                for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
+                        if (strncmp(np->name, "i2c", 3) == 0) {
+                                of_platform_device_create(np, "u3-i2c", NULL);
+                                of_node_put(np);
+                                break;
+                        }
+                }
+                of_node_put(npp);
+        }
+        np = of_find_node_by_type(NULL, "smu");
+        if (np) {
+                of_platform_device_create(np, "smu", NULL);
+                of_node_put(np);
+        }
+
+        return 0;
+}
+
+device_initcall(pmac_declare_of_platform_devices);
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init pmac_probe(int platform)
+{
+#ifdef CONFIG_PPC64
+        if (platform != PLATFORM_POWERMAC)
+                return 0;
+
+        /*
+         * On U3, the DART (iommu) must be allocated now since it
+         * has an impact on htab_initialize (due to the large page it
+         * occupies having to be broken up so the DART itself is not
+         * part of the cacheable linar mapping
+         */
+        alloc_u3_dart_table();
+#endif
+
+#ifdef CONFIG_PMAC_SMU
+        /*
+         * SMU based G5s need some memory below 2Gb, at least the current
+         * driver needs that. We have to allocate it now. We allocate 4k
+         * (1 small page) for now.
+         */
+        smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
+#endif /* CONFIG_PMAC_SMU */
+
+        return 1;
+}
+
+#ifdef CONFIG_PPC64
+static int pmac_probe_mode(struct pci_bus *bus)
+{
+        struct device_node *node = bus->sysdata;
+
+        /* We need to use normal PCI probing for the AGP bus,
+           since the device for the AGP bridge isn't in the tree. */
+        if (bus->self == NULL && device_is_compatible(node, "u3-agp"))
+                return PCI_PROBE_NORMAL;
+
+        return PCI_PROBE_DEVTREE;
+}
+#endif
+
+struct machdep_calls __initdata pmac_md = {
+#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
+        .cpu_die                = generic_mach_cpu_die,
+#endif
+        .probe                  = pmac_probe,
+        .setup_arch             = pmac_setup_arch,
+        .init_early             = pmac_init_early,
+        .show_cpuinfo           = pmac_show_cpuinfo,
+        .show_percpuinfo        = pmac_show_percpuinfo,
+        .init_IRQ               = pmac_pic_init,
+        .get_irq                = mpic_get_irq, /* changed later */
+        .pcibios_fixup          = pmac_pcibios_fixup,
+        .restart                = pmac_restart,
+        .power_off              = pmac_power_off,
+        .halt                   = pmac_halt,
+        .time_init              = pmac_time_init,
+        .get_boot_time          = pmac_get_boot_time,
+        .set_rtc_time           = pmac_set_rtc_time,
+        .get_rtc_time           = pmac_get_rtc_time,
+        .calibrate_decr         = pmac_calibrate_decr,
+        .feature_call           = pmac_do_feature_call,
+        .check_legacy_ioport    = pmac_check_legacy_ioport,
+        .progress               = pmac_progress,
+#ifdef CONFIG_PPC64
+        .pci_probe_mode         = pmac_probe_mode,
+        .idle_loop              = native_idle,
+        .enable_pmcs            = power4_enable_pmcs,
+#endif
+#ifdef CONFIG_PPC32
+        .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
+        .pcibios_after_init     = pmac_pcibios_after_init,
+        .phys_mem_access_prot   = pci_phys_mem_access_prot,
+#endif
+};
diff --git a/arch/powerpc/platforms/powermac/sleep.S b/arch/powerpc/platforms/powermac/sleep.S
new file mode 100644
index 000000000000..22b113d19b24
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/sleep.S
@@ -0,0 +1,396 @@
+/*
+ * This file contains sleep low-level functions for PowerBook G3.
+ *    Copyright (C) 1999 Benjamin Herrenschmidt (benh@kernel.crashing.org)
+ *    and Paul Mackerras (paulus@samba.org).
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/ppc_asm.h>
+#include <asm/cputable.h>
+#include <asm/cache.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+
+#define MAGIC   0x4c617273      /* 'Lars' */
+
+/*
+ * Structure for storing CPU registers on the stack.
+ */
+#define SL_SP           0
+#define SL_PC           4
+#define SL_MSR          8
+#define SL_SDR1         0xc
+#define SL_SPRG0        0x10    /* 4 sprg's */
+#define SL_DBAT0        0x20
+#define SL_IBAT0        0x28
+#define SL_DBAT1        0x30
+#define SL_IBAT1        0x38
+#define SL_DBAT2        0x40
+#define SL_IBAT2        0x48
+#define SL_DBAT3        0x50
+#define SL_IBAT3        0x58
+#define SL_TB           0x60
+#define SL_R2           0x68
+#define SL_CR           0x6c
+#define SL_R12          0x70    /* r12 to r31 */
+#define SL_SIZE         (SL_R12 + 80)
+
+        .section .text
+        .align  5
+
+#if defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ_PMAC)
+
+/* This gets called by via-pmu.c late during the sleep process.
+ * The PMU was already send the sleep command and will shut us down
+ * soon. We need to save all that is needed and setup the wakeup
+ * vector that will be called by the ROM on wakeup
+ */
+_GLOBAL(low_sleep_handler)
+#ifndef CONFIG_6xx
+        blr
+#else
+        mflr    r0
+        stw     r0,4(r1)
+        stwu    r1,-SL_SIZE(r1)
+        mfcr    r0
+        stw     r0,SL_CR(r1)
+        stw     r2,SL_R2(r1)
+        stmw    r12,SL_R12(r1)
+
+        /* Save MSR & SDR1 */
+        mfmsr   r4
+        stw     r4,SL_MSR(r1)
+        mfsdr1  r4
+        stw     r4,SL_SDR1(r1)
+
+        /* Get a stable timebase and save it */
+1:      mftbu   r4
+        stw     r4,SL_TB(r1)
+        mftb    r5
+        stw     r5,SL_TB+4(r1)
+        mftbu   r3
+        cmpw    r3,r4
+        bne     1b
+
+        /* Save SPRGs */
+        mfsprg  r4,0
+        stw     r4,SL_SPRG0(r1)
+        mfsprg  r4,1
+        stw     r4,SL_SPRG0+4(r1)
+        mfsprg  r4,2
+        stw     r4,SL_SPRG0+8(r1)
+        mfsprg  r4,3
+        stw     r4,SL_SPRG0+12(r1)
+
+        /* Save BATs */
+        mfdbatu r4,0
+        stw     r4,SL_DBAT0(r1)
+        mfdbatl r4,0
+        stw     r4,SL_DBAT0+4(r1)
+        mfdbatu r4,1
+        stw     r4,SL_DBAT1(r1)
+        mfdbatl r4,1
+        stw     r4,SL_DBAT1+4(r1)
+        mfdbatu r4,2
+        stw     r4,SL_DBAT2(r1)
+        mfdbatl r4,2
+        stw     r4,SL_DBAT2+4(r1)
+        mfdbatu r4,3
+        stw     r4,SL_DBAT3(r1)
+        mfdbatl r4,3
+        stw     r4,SL_DBAT3+4(r1)
+        mfibatu r4,0
+        stw     r4,SL_IBAT0(r1)
+        mfibatl r4,0
+        stw     r4,SL_IBAT0+4(r1)
+        mfibatu r4,1
+        stw     r4,SL_IBAT1(r1)
+        mfibatl r4,1
+        stw     r4,SL_IBAT1+4(r1)
+        mfibatu r4,2
+        stw     r4,SL_IBAT2(r1)
+        mfibatl r4,2
+        stw     r4,SL_IBAT2+4(r1)
+        mfibatu r4,3
+        stw     r4,SL_IBAT3(r1)
+        mfibatl r4,3
+        stw     r4,SL_IBAT3+4(r1)
+
+        /* Backup various CPU config stuffs */
+        bl      __save_cpu_setup
+
+        /* The ROM can wake us up via 2 different vectors:
+         *  - On wallstreet & lombard, we must write a magic
+         *    value 'Lars' at address 4 and a pointer to a
+         *    memory location containing the PC to resume from
+         *    at address 0.
+         *  - On Core99, we must store the wakeup vector at
+         *    address 0x80 and eventually it's parameters
+         *    at address 0x84. I've have some trouble with those
+         *    parameters however and I no longer use them.
+         */
+        lis     r5,grackle_wake_up@ha
+        addi    r5,r5,grackle_wake_up@l
+        tophys(r5,r5)
+        stw     r5,SL_PC(r1)
+        lis     r4,KERNELBASE@h
+        tophys(r5,r1)
+        addi    r5,r5,SL_PC
+        lis     r6,MAGIC@ha
+        addi    r6,r6,MAGIC@l
+        stw     r5,0(r4)
+        stw     r6,4(r4)
+        /* Setup stuffs at 0x80-0x84 for Core99 */
+        lis     r3,core99_wake_up@ha
+        addi    r3,r3,core99_wake_up@l
+        tophys(r3,r3)
+        stw     r3,0x80(r4)
+        stw     r5,0x84(r4)
+        /* Store a pointer to our backup storage into
+         * a kernel global
+         */
+        lis r3,sleep_storage@ha
+        addi r3,r3,sleep_storage@l
+        stw r5,0(r3)
+
+        .globl  low_cpu_die
+low_cpu_die:
+        /* Flush & disable all caches */
+        bl      flush_disable_caches
+
+        /* Turn off data relocation. */
+        mfmsr   r3              /* Save MSR in r7 */
+        rlwinm  r3,r3,0,28,26   /* Turn off DR bit */
+        sync
+        mtmsr   r3
+        isync
+
+BEGIN_FTR_SECTION
+        /* Flush any pending L2 data prefetches to work around HW bug */
+        sync
+        lis     r3,0xfff0
+        lwz     r0,0(r3)        /* perform cache-inhibited load to ROM */
+        sync                    /* (caches are disabled at this point) */
+END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
+
+/*
+ * Set the HID0 and MSR for sleep.
+ */
+        mfspr   r2,SPRN_HID0
+        rlwinm  r2,r2,0,10,7    /* clear doze, nap */
+        oris    r2,r2,HID0_SLEEP@h
+        sync
+        isync
+        mtspr   SPRN_HID0,r2
+        sync
+
+/* This loop puts us back to sleep in case we have a spurrious
+ * wakeup so that the host bridge properly stays asleep. The
+ * CPU will be turned off, either after a known time (about 1
+ * second) on wallstreet & lombard, or as soon as the CPU enters
+ * SLEEP mode on core99
+ */
+        mfmsr   r2
+        oris    r2,r2,MSR_POW@h
+1:      sync
+        mtmsr   r2
+        isync
+        b       1b
+
+/*
+ * Here is the resume code.
+ */
+
+
+/*
+ * Core99 machines resume here
+ * r4 has the physical address of SL_PC(sp) (unused)
+ */
+_GLOBAL(core99_wake_up)
+        /* Make sure HID0 no longer contains any sleep bit and that data cache
+         * is disabled
+         */
+        mfspr   r3,SPRN_HID0
+        rlwinm  r3,r3,0,11,7            /* clear SLEEP, NAP, DOZE bits */
+        rlwinm  3,r3,0,18,15            /* clear DCE, ICE */
+        mtspr   SPRN_HID0,r3
+        sync
+        isync
+
+        /* sanitize MSR */
+        mfmsr   r3
+        ori     r3,r3,MSR_EE|MSR_IP
+        xori    r3,r3,MSR_EE|MSR_IP
+        sync
+        isync
+        mtmsr   r3
+        sync
+        isync
+
+        /* Recover sleep storage */
+        lis     r3,sleep_storage@ha
+        addi    r3,r3,sleep_storage@l
+        tophys(r3,r3)
+        lwz     r1,0(r3)
+
+        /* Pass thru to older resume code ... */
+/*
+ * Here is the resume code for older machines.
+ * r1 has the physical address of SL_PC(sp).
+ */
+
+grackle_wake_up:
+
+        /* Restore the kernel's segment registers before
+         * we do any r1 memory access as we are not sure they
+         * are in a sane state above the first 256Mb region
+         */
+        li      r0,16           /* load up segment register values */
+        mtctr   r0              /* for context 0 */
+        lis     r3,0x2000       /* Ku = 1, VSID = 0 */
+        li      r4,0
+3:      mtsrin  r3,r4
+        addi    r3,r3,0x111     /* increment VSID */
+        addis   r4,r4,0x1000    /* address of next segment */
+        bdnz    3b
+        sync
+        isync
+
+        subi    r1,r1,SL_PC
+
+        /* Restore various CPU config stuffs */
+        bl      __restore_cpu_setup
+
+        /* Make sure all FPRs have been initialized */
+        bl      reloc_offset
+        bl      __init_fpu_registers
+
+        /* Invalidate & enable L1 cache, we don't care about
+         * whatever the ROM may have tried to write to memory
+         */
+        bl      __inval_enable_L1
+
+        /* Restore the BATs, and SDR1.  Then we can turn on the MMU. */
+        lwz     r4,SL_SDR1(r1)
+        mtsdr1  r4
+        lwz     r4,SL_SPRG0(r1)
+        mtsprg  0,r4
+        lwz     r4,SL_SPRG0+4(r1)
+        mtsprg  1,r4
+        lwz     r4,SL_SPRG0+8(r1)
+        mtsprg  2,r4
+        lwz     r4,SL_SPRG0+12(r1)
+        mtsprg  3,r4
+
+        lwz     r4,SL_DBAT0(r1)
+        mtdbatu 0,r4
+        lwz     r4,SL_DBAT0+4(r1)
+        mtdbatl 0,r4
+        lwz     r4,SL_DBAT1(r1)
+        mtdbatu 1,r4
+        lwz     r4,SL_DBAT1+4(r1)
+        mtdbatl 1,r4
+        lwz     r4,SL_DBAT2(r1)
+        mtdbatu 2,r4
+        lwz     r4,SL_DBAT2+4(r1)
+        mtdbatl 2,r4
+        lwz     r4,SL_DBAT3(r1)
+        mtdbatu 3,r4
+        lwz     r4,SL_DBAT3+4(r1)
+        mtdbatl 3,r4
+        lwz     r4,SL_IBAT0(r1)
+        mtibatu 0,r4
+        lwz     r4,SL_IBAT0+4(r1)
+        mtibatl 0,r4
+        lwz     r4,SL_IBAT1(r1)
+        mtibatu 1,r4
+        lwz     r4,SL_IBAT1+4(r1)
+        mtibatl 1,r4
+        lwz     r4,SL_IBAT2(r1)
+        mtibatu 2,r4
+        lwz     r4,SL_IBAT2+4(r1)
+        mtibatl 2,r4
+        lwz     r4,SL_IBAT3(r1)
+        mtibatu 3,r4
+        lwz     r4,SL_IBAT3+4(r1)
+        mtibatl 3,r4
+
+BEGIN_FTR_SECTION
+        li      r4,0
+        mtspr   SPRN_DBAT4U,r4
+        mtspr   SPRN_DBAT4L,r4
+        mtspr   SPRN_DBAT5U,r4
+        mtspr   SPRN_DBAT5L,r4
+        mtspr   SPRN_DBAT6U,r4
+        mtspr   SPRN_DBAT6L,r4
+        mtspr   SPRN_DBAT7U,r4
+        mtspr   SPRN_DBAT7L,r4
+        mtspr   SPRN_IBAT4U,r4
+        mtspr   SPRN_IBAT4L,r4
+        mtspr   SPRN_IBAT5U,r4
+        mtspr   SPRN_IBAT5L,r4
+        mtspr   SPRN_IBAT6U,r4
+        mtspr   SPRN_IBAT6L,r4
+        mtspr   SPRN_IBAT7U,r4
+        mtspr   SPRN_IBAT7L,r4
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
+
+        /* Flush all TLBs */
+        lis     r4,0x1000
+1:      addic.  r4,r4,-0x1000
+        tlbie   r4
+        blt     1b
+        sync
+
+        /* restore the MSR and turn on the MMU */
+        lwz     r3,SL_MSR(r1)
+        bl      turn_on_mmu
+
+        /* get back the stack pointer */
+        tovirt(r1,r1)
+
+        /* Restore TB */
+        li      r3,0
+        mttbl   r3
+        lwz     r3,SL_TB(r1)
+        lwz     r4,SL_TB+4(r1)
+        mttbu   r3
+        mttbl   r4
+
+        /* Restore the callee-saved registers and return */
+        lwz     r0,SL_CR(r1)
+        mtcr    r0
+        lwz     r2,SL_R2(r1)
+        lmw     r12,SL_R12(r1)
+        addi    r1,r1,SL_SIZE
+        lwz     r0,4(r1)
+        mtlr    r0
+        blr
+
+turn_on_mmu:
+        mflr    r4
+        tovirt(r4,r4)
+        mtsrr0  r4
+        mtsrr1  r3
+        sync
+        isync
+        rfi
+
+#endif /* defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ) */
+
+        .section .data
+        .balign L1_CACHE_BYTES
+sleep_storage:
+        .long 0
+        .balign L1_CACHE_BYTES, 0
+
+#endif /* CONFIG_6xx */
+        .section .text
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
new file mode 100644
index 000000000000..e1f9443cc872
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -0,0 +1,865 @@
+/*
+ * SMP support for power macintosh.
+ *
+ * We support both the old "powersurge" SMP architecture
+ * and the current Core99 (G4 PowerMac) machines.
+ *
+ * Note that we don't support the very first rev. of
+ * Apple/DayStar 2 CPUs board, the one with the funky
+ * watchdog. Hopefully, none of these should be there except
+ * maybe internally to Apple. I should probably still add some
+ * code to detect this card though and disable SMP. --BenH.
+ *
+ * Support Macintosh G4 SMP by Troy Benjegerdes (hozer@drgw.net)
+ * and Ben Herrenschmidt <benh@kernel.crashing.org>.
+ *
+ * Support for DayStar quad CPU cards
+ * Copyright (C) XLR8, Inc. 1994-2000
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/smp.h>
+#include <linux/smp_lock.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/hardirq.h>
+#include <linux/cpu.h>
+
+#include <asm/ptrace.h>
+#include <asm/atomic.h>
+#include <asm/irq.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/pmac_feature.h>
+#include <asm/time.h>
+#include <asm/mpic.h>
+#include <asm/cacheflush.h>
+#include <asm/keylargo.h>
+#include <asm/pmac_low_i2c.h>
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) udbg_printf(fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+extern void __secondary_start_pmac_0(void);
+
+#ifdef CONFIG_PPC32
+
+/* Sync flag for HW tb sync */
+static volatile int sec_tb_reset = 0;
+
+/*
+ * Powersurge (old powermac SMP) support.
+ */
+
+/* Addresses for powersurge registers */
+#define HAMMERHEAD_BASE         0xf8000000
+#define HHEAD_CONFIG            0x90
+#define HHEAD_SEC_INTR          0xc0
+
+/* register for interrupting the primary processor on the powersurge */
+/* N.B. this is actually the ethernet ROM! */
+#define PSURGE_PRI_INTR         0xf3019000
+
+/* register for storing the start address for the secondary processor */
+/* N.B. this is the PCI config space address register for the 1st bridge */
+#define PSURGE_START            0xf2800000
+
+/* Daystar/XLR8 4-CPU card */
+#define PSURGE_QUAD_REG_ADDR    0xf8800000
+
+#define PSURGE_QUAD_IRQ_SET     0
+#define PSURGE_QUAD_IRQ_CLR     1
+#define PSURGE_QUAD_IRQ_PRIMARY 2
+#define PSURGE_QUAD_CKSTOP_CTL  3
+#define PSURGE_QUAD_PRIMARY_ARB 4
+#define PSURGE_QUAD_BOARD_ID    6
+#define PSURGE_QUAD_WHICH_CPU   7
+#define PSURGE_QUAD_CKSTOP_RDBK 8
+#define PSURGE_QUAD_RESET_CTL   11
+
+#define PSURGE_QUAD_OUT(r, v)   (out_8(quad_base + ((r) << 4) + 4, (v)))
+#define PSURGE_QUAD_IN(r)       (in_8(quad_base + ((r) << 4) + 4) & 0x0f)
+#define PSURGE_QUAD_BIS(r, v)   (PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) | (v)))
+#define PSURGE_QUAD_BIC(r, v)   (PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) & ~(v)))
+
+/* virtual addresses for the above */
+static volatile u8 __iomem *hhead_base;
+static volatile u8 __iomem *quad_base;
+static volatile u32 __iomem *psurge_pri_intr;
+static volatile u8 __iomem *psurge_sec_intr;
+static volatile u32 __iomem *psurge_start;
+
+/* values for psurge_type */
+#define PSURGE_NONE             -1
+#define PSURGE_DUAL             0
+#define PSURGE_QUAD_OKEE        1
+#define PSURGE_QUAD_COTTON      2
+#define PSURGE_QUAD_ICEGRASS    3
+
+/* what sort of powersurge board we have */
+static int psurge_type = PSURGE_NONE;
+
+/*
+ * Set and clear IPIs for powersurge.
+ */
+static inline void psurge_set_ipi(int cpu)
+{
+        if (psurge_type == PSURGE_NONE)
+                return;
+        if (cpu == 0)
+                in_be32(psurge_pri_intr);
+        else if (psurge_type == PSURGE_DUAL)
+                out_8(psurge_sec_intr, 0);
+        else
+                PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_SET, 1 << cpu);
+}
+
+static inline void psurge_clr_ipi(int cpu)
+{
+        if (cpu > 0) {
+                switch(psurge_type) {
+                case PSURGE_DUAL:
+                        out_8(psurge_sec_intr, ~0);
+                case PSURGE_NONE:
+                        break;
+                default:
+                        PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_CLR, 1 << cpu);
+                }
+        }
+}
+
+/*
+ * On powersurge (old SMP powermac architecture) we don't have
+ * separate IPIs for separate messages like openpic does.  Instead
+ * we have a bitmap for each processor, where a 1 bit means that
+ * the corresponding message is pending for that processor.
+ * Ideally each cpu's entry would be in a different cache line.
+ *  -- paulus.
+ */
+static unsigned long psurge_smp_message[NR_CPUS];
+
+void psurge_smp_message_recv(struct pt_regs *regs)
+{
+        int cpu = smp_processor_id();
+        int msg;
+
+        /* clear interrupt */
+        psurge_clr_ipi(cpu);
+
+        if (num_online_cpus() < 2)
+                return;
+
+        /* make sure there is a message there */
+        for (msg = 0; msg < 4; msg++)
+                if (test_and_clear_bit(msg, &psurge_smp_message[cpu]))
+                        smp_message_recv(msg, regs);
+}
+
+irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
+{
+        psurge_smp_message_recv(regs);
+        return IRQ_HANDLED;
+}
+
+static void smp_psurge_message_pass(int target, int msg)
+{
+        int i;
+
+        if (num_online_cpus() < 2)
+                return;
+
+        for (i = 0; i < NR_CPUS; i++) {
+                if (!cpu_online(i))
+                        continue;
+                if (target == MSG_ALL
+                    || (target == MSG_ALL_BUT_SELF && i != smp_processor_id())
+                    || target == i) {
+                        set_bit(msg, &psurge_smp_message[i]);
+                        psurge_set_ipi(i);
+                }
+        }
+}
+
+/*
+ * Determine a quad card presence. We read the board ID register, we
+ * force the data bus to change to something else, and we read it again.
+ * It it's stable, then the register probably exist (ugh !)
+ */
+static int __init psurge_quad_probe(void)
+{
+        int type;
+        unsigned int i;
+
+        type = PSURGE_QUAD_IN(PSURGE_QUAD_BOARD_ID);
+        if (type < PSURGE_QUAD_OKEE || type > PSURGE_QUAD_ICEGRASS
+            || type != PSURGE_QUAD_IN(PSURGE_QUAD_BOARD_ID))
+                return PSURGE_DUAL;
+
+        /* looks OK, try a slightly more rigorous test */
+        /* bogus is not necessarily cacheline-aligned,
+           though I don't suppose that really matters.  -- paulus */
+        for (i = 0; i < 100; i++) {
+                volatile u32 bogus[8];
+                bogus[(0+i)%8] = 0x00000000;
+                bogus[(1+i)%8] = 0x55555555;
+                bogus[(2+i)%8] = 0xFFFFFFFF;
+                bogus[(3+i)%8] = 0xAAAAAAAA;
+                bogus[(4+i)%8] = 0x33333333;
+                bogus[(5+i)%8] = 0xCCCCCCCC;
+                bogus[(6+i)%8] = 0xCCCCCCCC;
+                bogus[(7+i)%8] = 0x33333333;
+                wmb();
+                asm volatile("dcbf 0,%0" : : "r" (bogus) : "memory");
+                mb();
+                if (type != PSURGE_QUAD_IN(PSURGE_QUAD_BOARD_ID))
+                        return PSURGE_DUAL;
+        }
+        return type;
+}
+
+static void __init psurge_quad_init(void)
+{
+        int procbits;
+
+        if (ppc_md.progress) ppc_md.progress("psurge_quad_init", 0x351);
+        procbits = ~PSURGE_QUAD_IN(PSURGE_QUAD_WHICH_CPU);
+        if (psurge_type == PSURGE_QUAD_ICEGRASS)
+                PSURGE_QUAD_BIS(PSURGE_QUAD_RESET_CTL, procbits);
+        else
+                PSURGE_QUAD_BIC(PSURGE_QUAD_CKSTOP_CTL, procbits);
+        mdelay(33);
+        out_8(psurge_sec_intr, ~0);
+        PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_CLR, procbits);
+        PSURGE_QUAD_BIS(PSURGE_QUAD_RESET_CTL, procbits);
+        if (psurge_type != PSURGE_QUAD_ICEGRASS)
+                PSURGE_QUAD_BIS(PSURGE_QUAD_CKSTOP_CTL, procbits);
+        PSURGE_QUAD_BIC(PSURGE_QUAD_PRIMARY_ARB, procbits);
+        mdelay(33);
+        PSURGE_QUAD_BIC(PSURGE_QUAD_RESET_CTL, procbits);
+        mdelay(33);
+        PSURGE_QUAD_BIS(PSURGE_QUAD_PRIMARY_ARB, procbits);
+        mdelay(33);
+}
+
+static int __init smp_psurge_probe(void)
+{
+        int i, ncpus;
+
+        /* We don't do SMP on the PPC601 -- paulus */
+        if (PVR_VER(mfspr(SPRN_PVR)) == 1)
+                return 1;
+
+        /*
+         * The powersurge cpu board can be used in the generation
+         * of powermacs that have a socket for an upgradeable cpu card,
+         * including the 7500, 8500, 9500, 9600.
+         * The device tree doesn't tell you if you have 2 cpus because
+         * OF doesn't know anything about the 2nd processor.
+         * Instead we look for magic bits in magic registers,
+         * in the hammerhead memory controller in the case of the
+         * dual-cpu powersurge board.  -- paulus.
+         */
+        if (find_devices("hammerhead") == NULL)
+                return 1;
+
+        hhead_base = ioremap(HAMMERHEAD_BASE, 0x800);
+        quad_base = ioremap(PSURGE_QUAD_REG_ADDR, 1024);
+        psurge_sec_intr = hhead_base + HHEAD_SEC_INTR;
+
+        psurge_type = psurge_quad_probe();
+        if (psurge_type != PSURGE_DUAL) {
+                psurge_quad_init();
+                /* All released cards using this HW design have 4 CPUs */
+                ncpus = 4;
+        } else {
+                iounmap(quad_base);
+                if ((in_8(hhead_base + HHEAD_CONFIG) & 0x02) == 0) {
+                        /* not a dual-cpu card */
+                        iounmap(hhead_base);
+                        psurge_type = PSURGE_NONE;
+                        return 1;
+                }
+                ncpus = 2;
+        }
+
+        psurge_start = ioremap(PSURGE_START, 4);
+        psurge_pri_intr = ioremap(PSURGE_PRI_INTR, 4);
+
+        /* this is not actually strictly necessary -- paulus. */
+        for (i = 1; i < ncpus; ++i)
+                smp_hw_index[i] = i;
+
+        if (ppc_md.progress) ppc_md.progress("smp_psurge_probe - done", 0x352);
+
+        return ncpus;
+}
+
+static void __init smp_psurge_kick_cpu(int nr)
+{
+        unsigned long start = __pa(__secondary_start_pmac_0) + nr * 8;
+        unsigned long a;
+
+        /* may need to flush here if secondary bats aren't setup */
+        for (a = KERNELBASE; a < KERNELBASE + 0x800000; a += 32)
+                asm volatile("dcbf 0,%0" : : "r" (a) : "memory");
+        asm volatile("sync");
+
+        if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu", 0x353);
+
+        out_be32(psurge_start, start);
+        mb();
+
+        psurge_set_ipi(nr);
+        udelay(10);
+        psurge_clr_ipi(nr);
+
+        if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu - done", 0x354);
+}
+
+/*
+ * With the dual-cpu powersurge board, the decrementers and timebases
+ * of both cpus are frozen after the secondary cpu is started up,
+ * until we give the secondary cpu another interrupt.  This routine
+ * uses this to get the timebases synchronized.
+ *  -- paulus.
+ */
+static void __init psurge_dual_sync_tb(int cpu_nr)
+{
+        int t;
+
+        set_dec(tb_ticks_per_jiffy);
+        set_tb(0, 0);
+        last_jiffy_stamp(cpu_nr) = 0;
+
+        if (cpu_nr > 0) {
+                mb();
+                sec_tb_reset = 1;
+                return;
+        }
+
+        /* wait for the secondary to have reset its TB before proceeding */
+        for (t = 10000000; t > 0 && !sec_tb_reset; --t)
+                ;
+
+        /* now interrupt the secondary, starting both TBs */
+        psurge_set_ipi(1);
+
+        smp_tb_synchronized = 1;
+}
+
+static struct irqaction psurge_irqaction = {
+        .handler = psurge_primary_intr,
+        .flags = SA_INTERRUPT,
+        .mask = CPU_MASK_NONE,
+        .name = "primary IPI",
+};
+
+static void __init smp_psurge_setup_cpu(int cpu_nr)
+{
+
+        if (cpu_nr == 0) {
+                /* If we failed to start the second CPU, we should still
+                 * send it an IPI to start the timebase & DEC or we might
+                 * have them stuck.
+                 */
+                if (num_online_cpus() < 2) {
+                        if (psurge_type == PSURGE_DUAL)
+                                psurge_set_ipi(1);
+                        return;
+                }
+                /* reset the entry point so if we get another intr we won't
+                 * try to startup again */
+                out_be32(psurge_start, 0x100);
+                if (setup_irq(30, &psurge_irqaction))
+                        printk(KERN_ERR "Couldn't get primary IPI interrupt");
+        }
+
+        if (psurge_type == PSURGE_DUAL)
+                psurge_dual_sync_tb(cpu_nr);
+}
+
+void __init smp_psurge_take_timebase(void)
+{
+        /* Dummy implementation */
+}
+
+void __init smp_psurge_give_timebase(void)
+{
+        /* Dummy implementation */
+}
+
+/* PowerSurge-style Macs */
+struct smp_ops_t psurge_smp_ops = {
+        .message_pass   = smp_psurge_message_pass,
+        .probe          = smp_psurge_probe,
+        .kick_cpu       = smp_psurge_kick_cpu,
+        .setup_cpu      = smp_psurge_setup_cpu,
+        .give_timebase  = smp_psurge_give_timebase,
+        .take_timebase  = smp_psurge_take_timebase,
+};
+#endif /* CONFIG_PPC32 - actually powersurge support */
+
+#ifdef CONFIG_PPC64
+/*
+ * G5s enable/disable the timebase via an i2c-connected clock chip.
+ */
+static struct device_node *pmac_tb_clock_chip_host;
+static u8 pmac_tb_pulsar_addr;
+static void (*pmac_tb_freeze)(int freeze);
+static DEFINE_SPINLOCK(timebase_lock);
+static unsigned long timebase;
+
+static void smp_core99_cypress_tb_freeze(int freeze)
+{
+        u8 data;
+        int rc;
+
+        /* Strangely, the device-tree says address is 0xd2, but darwin
+         * accesses 0xd0 ...
+         */
+        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_combined);
+        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
+                               0xd0 | pmac_low_i2c_read,
+                               0x81, &data, 1);
+        if (rc != 0)
+                goto bail;
+
+        data = (data & 0xf3) | (freeze ? 0x00 : 0x0c);
+
+        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_stdsub);
+        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
+                               0xd0 | pmac_low_i2c_write,
+                               0x81, &data, 1);
+
+ bail:
+        if (rc != 0) {
+                printk("Cypress Timebase %s rc: %d\n",
+                       freeze ? "freeze" : "unfreeze", rc);
+                panic("Timebase freeze failed !\n");
+        }
+}
+
+
+static void smp_core99_pulsar_tb_freeze(int freeze)
+{
+        u8 data;
+        int rc;
+
+        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_combined);
+        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
+                               pmac_tb_pulsar_addr | pmac_low_i2c_read,
+                               0x2e, &data, 1);
+        if (rc != 0)
+                goto bail;
+
+        data = (data & 0x88) | (freeze ? 0x11 : 0x22);
+
+        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_stdsub);
+        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
+                               pmac_tb_pulsar_addr | pmac_low_i2c_write,
+                               0x2e, &data, 1);
+ bail:
+        if (rc != 0) {
+                printk(KERN_ERR "Pulsar Timebase %s rc: %d\n",
+                       freeze ? "freeze" : "unfreeze", rc);
+                panic("Timebase freeze failed !\n");
+        }
+}
+
+
+static void smp_core99_give_timebase(void)
+{
+        /* Open i2c bus for synchronous access */
+        if (pmac_low_i2c_open(pmac_tb_clock_chip_host, 0))
+                panic("Can't open i2c for TB sync !\n");
+
+        spin_lock(&timebase_lock);
+        (*pmac_tb_freeze)(1);
+        mb();
+        timebase = get_tb();
+        spin_unlock(&timebase_lock);
+
+        while (timebase)
+                barrier();
+
+        spin_lock(&timebase_lock);
+        (*pmac_tb_freeze)(0);
+        spin_unlock(&timebase_lock);
+
+        /* Close i2c bus */
+        pmac_low_i2c_close(pmac_tb_clock_chip_host);
+}
+
+
+static void __devinit smp_core99_take_timebase(void)
+{
+        while (!timebase)
+                barrier();
+        spin_lock(&timebase_lock);
+        set_tb(timebase >> 32, timebase & 0xffffffff);
+        timebase = 0;
+        spin_unlock(&timebase_lock);
+}
+
+static void __init smp_core99_setup(int ncpus)
+{
+        struct device_node *cc = NULL;  
+        struct device_node *p;
+        u32 *reg;
+        int ok;
+
+        /* HW sync only on these platforms */
+        if (!machine_is_compatible("PowerMac7,2") &&
+            !machine_is_compatible("PowerMac7,3") &&
+            !machine_is_compatible("RackMac3,1"))
+                return;
+
+        /* Look for the clock chip */
+        while ((cc = of_find_node_by_name(cc, "i2c-hwclock")) != NULL) {
+                p = of_get_parent(cc);
+                ok = p && device_is_compatible(p, "uni-n-i2c");
+                of_node_put(p);
+                if (!ok)
+                        continue;
+
+                reg = (u32 *)get_property(cc, "reg", NULL);
+                if (reg == NULL)
+                        continue;
+
+                switch (*reg) {
+                case 0xd2:
+                        if (device_is_compatible(cc, "pulsar-legacy-slewing")) {
+                                pmac_tb_freeze = smp_core99_pulsar_tb_freeze;
+                                pmac_tb_pulsar_addr = 0xd2;
+                                printk(KERN_INFO "Timebase clock is Pulsar chip\n");
+                        } else if (device_is_compatible(cc, "cy28508")) {
+                                pmac_tb_freeze = smp_core99_cypress_tb_freeze;
+                                printk(KERN_INFO "Timebase clock is Cypress chip\n");
+                        }
+                        break;
+                case 0xd4:
+                        pmac_tb_freeze = smp_core99_pulsar_tb_freeze;
+                        pmac_tb_pulsar_addr = 0xd4;
+                        printk(KERN_INFO "Timebase clock is Pulsar chip\n");
+                        break;
+                }
+                if (pmac_tb_freeze != NULL) {
+                        pmac_tb_clock_chip_host = of_get_parent(cc);
+                        of_node_put(cc);
+                        break;
+                }
+        }
+        if (pmac_tb_freeze == NULL) {
+                smp_ops->give_timebase = smp_generic_give_timebase;
+                smp_ops->take_timebase = smp_generic_take_timebase;
+        }
+}
+
+/* nothing to do here, caches are already set up by service processor */
+static inline void __devinit core99_init_caches(int cpu)
+{
+}
+
+#else /* CONFIG_PPC64 */
+
+/*
+ * SMP G4 powermacs use a GPIO to enable/disable the timebase.
+ */
+
+static unsigned int core99_tb_gpio;     /* Timebase freeze GPIO */
+
+static unsigned int pri_tb_hi, pri_tb_lo;
+static unsigned int pri_tb_stamp;
+
+/* not __init, called in sleep/wakeup code */
+void smp_core99_give_timebase(void)
+{
+        unsigned long flags;
+        unsigned int t;
+
+        /* wait for the secondary to be in take_timebase */
+        for (t = 100000; t > 0 && !sec_tb_reset; --t)
+                udelay(10);
+        if (!sec_tb_reset) {
+                printk(KERN_WARNING "Timeout waiting sync on second CPU\n");
+                return;
+        }
+
+        /* freeze the timebase and read it */
+        /* disable interrupts so the timebase is disabled for the
+           shortest possible time */
+        local_irq_save(flags);
+        pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, core99_tb_gpio, 4);
+        pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, core99_tb_gpio, 0);
+        mb();
+        pri_tb_hi = get_tbu();
+        pri_tb_lo = get_tbl();
+        pri_tb_stamp = last_jiffy_stamp(smp_processor_id());
+        mb();
+
+        /* tell the secondary we're ready */
+        sec_tb_reset = 2;
+        mb();
+
+        /* wait for the secondary to have taken it */
+        for (t = 100000; t > 0 && sec_tb_reset; --t)
+                udelay(10);
+        if (sec_tb_reset)
+                printk(KERN_WARNING "Timeout waiting sync(2) on second CPU\n");
+        else
+                smp_tb_synchronized = 1;
+
+        /* Now, restart the timebase by leaving the GPIO to an open collector */
+        pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, core99_tb_gpio, 0);
+        pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, core99_tb_gpio, 0);
+        local_irq_restore(flags);
+}
+
+/* not __init, called in sleep/wakeup code */
+void smp_core99_take_timebase(void)
+{
+        unsigned long flags;
+
+        /* tell the primary we're here */
+        sec_tb_reset = 1;
+        mb();
+
+        /* wait for the primary to set pri_tb_hi/lo */
+        while (sec_tb_reset < 2)
+                mb();
+
+        /* set our stuff the same as the primary */
+        local_irq_save(flags);
+        set_dec(1);
+        set_tb(pri_tb_hi, pri_tb_lo);
+        last_jiffy_stamp(smp_processor_id()) = pri_tb_stamp;
+        mb();
+
+        /* tell the primary we're done */
+        sec_tb_reset = 0;
+        mb();
+        local_irq_restore(flags);
+}
+
+/* L2 and L3 cache settings to pass from CPU0 to CPU1 on G4 cpus */
+volatile static long int core99_l2_cache;
+volatile static long int core99_l3_cache;
+
+static void __devinit core99_init_caches(int cpu)
+{
+        if (!cpu_has_feature(CPU_FTR_L2CR))
+                return;
+
+        if (cpu == 0) {
+                core99_l2_cache = _get_L2CR();
+                printk("CPU0: L2CR is %lx\n", core99_l2_cache);
+        } else {
+                printk("CPU%d: L2CR was %lx\n", cpu, _get_L2CR());
+                _set_L2CR(0);
+                _set_L2CR(core99_l2_cache);
+                printk("CPU%d: L2CR set to %lx\n", cpu, core99_l2_cache);
+        }
+
+        if (!cpu_has_feature(CPU_FTR_L3CR))
+                return;
+
+        if (cpu == 0){
+                core99_l3_cache = _get_L3CR();
+                printk("CPU0: L3CR is %lx\n", core99_l3_cache);
+        } else {
+                printk("CPU%d: L3CR was %lx\n", cpu, _get_L3CR());
+                _set_L3CR(0);
+                _set_L3CR(core99_l3_cache);
+                printk("CPU%d: L3CR set to %lx\n", cpu, core99_l3_cache);
+        }
+}
+
+static void __init smp_core99_setup(int ncpus)
+{
+        struct device_node *cpu;
+        u32 *tbprop = NULL;
+        int i;
+
+        core99_tb_gpio = KL_GPIO_TB_ENABLE;     /* default value */
+        cpu = of_find_node_by_type(NULL, "cpu");
+        if (cpu != NULL) {
+                tbprop = (u32 *)get_property(cpu, "timebase-enable", NULL);
+                if (tbprop)
+                        core99_tb_gpio = *tbprop;
+                of_node_put(cpu);
+        }
+
+        /* XXX should get this from reg properties */
+        for (i = 1; i < ncpus; ++i)
+                smp_hw_index[i] = i;
+        powersave_nap = 0;
+}
+#endif
+
+static int __init smp_core99_probe(void)
+{
+        struct device_node *cpus;
+        int ncpus = 0;
+
+        if (ppc_md.progress) ppc_md.progress("smp_core99_probe", 0x345);
+
+        /* Count CPUs in the device-tree */
+        for (cpus = NULL; (cpus = of_find_node_by_type(cpus, "cpu")) != NULL;)
+                ++ncpus;
+
+        printk(KERN_INFO "PowerMac SMP probe found %d cpus\n", ncpus);
+
+        /* Nothing more to do if less than 2 of them */
+        if (ncpus <= 1)
+                return 1;
+
+        smp_core99_setup(ncpus);
+        mpic_request_ipis();
+        core99_init_caches(0);
+
+        return ncpus;
+}
+
+static void __devinit smp_core99_kick_cpu(int nr)
+{
+        unsigned int save_vector;
+        unsigned long new_vector;
+        unsigned long flags;
+        volatile unsigned int *vector
+                 = ((volatile unsigned int *)(KERNELBASE+0x100));
+
+        if (nr < 0 || nr > 3)
+                return;
+        if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu", 0x346);
+
+        local_irq_save(flags);
+        local_irq_disable();
+
+        /* Save reset vector */
+        save_vector = *vector;
+
+        /* Setup fake reset vector that does    
+         *   b __secondary_start_pmac_0 + nr*8 - KERNELBASE
+         */
+        new_vector = (unsigned long) __secondary_start_pmac_0 + nr * 8;
+        *vector = 0x48000002 + new_vector - KERNELBASE;
+
+        /* flush data cache and inval instruction cache */
+        flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
+
+        /* Put some life in our friend */
+        pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0);
+
+        /* FIXME: We wait a bit for the CPU to take the exception, I should
+         * instead wait for the entry code to set something for me. Well,
+         * ideally, all that crap will be done in prom.c and the CPU left
+         * in a RAM-based wait loop like CHRP.
+         */
+        mdelay(1);
+
+        /* Restore our exception vector */
+        *vector = save_vector;
+        flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
+
+        local_irq_restore(flags);
+        if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
+}
+
+static void __devinit smp_core99_setup_cpu(int cpu_nr)
+{
+        /* Setup L2/L3 */
+        if (cpu_nr != 0)
+                core99_init_caches(cpu_nr);
+
+        /* Setup openpic */
+        mpic_setup_this_cpu();
+
+        if (cpu_nr == 0) {
+#ifdef CONFIG_POWER4
+                extern void g5_phy_disable_cpu1(void);
+
+                /* If we didn't start the second CPU, we must take
+                 * it off the bus
+                 */
+                if (machine_is_compatible("MacRISC4") &&
+                    num_online_cpus() < 2)              
+                        g5_phy_disable_cpu1();
+#endif /* CONFIG_POWER4 */
+                if (ppc_md.progress) ppc_md.progress("core99_setup_cpu 0 done", 0x349);
+        }
+}
+
+
+/* Core99 Macs (dual G4s and G5s) */
+struct smp_ops_t core99_smp_ops = {
+        .message_pass   = smp_mpic_message_pass,
+        .probe          = smp_core99_probe,
+        .kick_cpu       = smp_core99_kick_cpu,
+        .setup_cpu      = smp_core99_setup_cpu,
+        .give_timebase  = smp_core99_give_timebase,
+        .take_timebase  = smp_core99_take_timebase,
+};
+
+#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
+
+int __cpu_disable(void)
+{
+        cpu_clear(smp_processor_id(), cpu_online_map);
+
+        /* XXX reset cpu affinity here */
+        mpic_cpu_set_priority(0xf);
+        asm volatile("mtdec %0" : : "r" (0x7fffffff));
+        mb();
+        udelay(20);
+        asm volatile("mtdec %0" : : "r" (0x7fffffff));
+        return 0;
+}
+
+extern void low_cpu_die(void) __attribute__((noreturn)); /* in sleep.S */
+static int cpu_dead[NR_CPUS];
+
+void cpu_die(void)
+{
+        local_irq_disable();
+        cpu_dead[smp_processor_id()] = 1;
+        mb();
+        low_cpu_die();
+}
+
+void __cpu_die(unsigned int cpu)
+{
+        int timeout;
+
+        timeout = 1000;
+        while (!cpu_dead[cpu]) {
+                if (--timeout == 0) {
+                        printk("CPU %u refused to die!\n", cpu);
+                        break;
+                }
+                msleep(1);
+        }
+        cpu_callin_map[cpu] = 0;
+        cpu_dead[cpu] = 0;
+}
+
+#endif
diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c
new file mode 100644
index 000000000000..5947b21a8588
--- /dev/null
+++ b/arch/powerpc/platforms/powermac/time.c
@@ -0,0 +1,360 @@
+/*
+ * Support for periodic interrupts (100 per second) and for getting
+ * the current time from the RTC on Power Macintoshes.
+ *
+ * We use the decrementer register for our periodic interrupts.
+ *
+ * Paul Mackerras       August 1996.
+ * Copyright (C) 1996 Paul Mackerras.
+ * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
+ *
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/adb.h>
+#include <linux/cuda.h>
+#include <linux/pmu.h>
+#include <linux/interrupt.h>
+#include <linux/hardirq.h>
+#include <linux/rtc.h>
+
+#include <asm/sections.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/nvram.h>
+#include <asm/smu.h>
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...)
+#endif
+
+/* Apparently the RTC stores seconds since 1 Jan 1904 */
+#define RTC_OFFSET      2082844800
+
+/*
+ * Calibrate the decrementer frequency with the VIA timer 1.
+ */
+#define VIA_TIMER_FREQ_6        4700000 /* time 1 frequency * 6 */
+
+/* VIA registers */
+#define RS              0x200           /* skip between registers */
+#define T1CL            (4*RS)          /* Timer 1 ctr/latch (low 8 bits) */
+#define T1CH            (5*RS)          /* Timer 1 counter (high 8 bits) */
+#define T1LL            (6*RS)          /* Timer 1 latch (low 8 bits) */
+#define T1LH            (7*RS)          /* Timer 1 latch (high 8 bits) */
+#define ACR             (11*RS)         /* Auxiliary control register */
+#define IFR             (13*RS)         /* Interrupt flag register */
+
+/* Bits in ACR */
+#define T1MODE          0xc0            /* Timer 1 mode */
+#define T1MODE_CONT     0x40            /*  continuous interrupts */
+
+/* Bits in IFR and IER */
+#define T1_INT          0x40            /* Timer 1 interrupt */
+
+long __init pmac_time_init(void)
+{
+        s32 delta = 0;
+#ifdef CONFIG_NVRAM
+        int dst;
+        
+        delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
+        delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
+        delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
+        if (delta & 0x00800000UL)
+                delta |= 0xFF000000UL;
+        dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
+        printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
+                dst ? "on" : "off");
+#endif
+        return delta;
+}
+
+static void to_rtc_time(unsigned long now, struct rtc_time *tm)
+{
+        to_tm(now, tm);
+        tm->tm_year -= 1900;
+        tm->tm_mon -= 1;
+}
+
+static unsigned long from_rtc_time(struct rtc_time *tm)
+{
+        return mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
+                      tm->tm_hour, tm->tm_min, tm->tm_sec);
+}
+
+#ifdef CONFIG_ADB_CUDA
+static unsigned long cuda_get_time(void)
+{
+        struct adb_request req;
+        unsigned long now;
+
+        if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0)
+                return 0;
+        while (!req.complete)
+                cuda_poll();
+        if (req.reply_len != 7)
+                printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
+                       req.reply_len);
+        now = (req.reply[3] << 24) + (req.reply[4] << 16)
+                + (req.reply[5] << 8) + req.reply[6];
+        return now - RTC_OFFSET;
+}
+
+#define cuda_get_rtc_time(tm)   to_rtc_time(cuda_get_time(), (tm))
+
+static int cuda_set_rtc_time(struct rtc_time *tm)
+{
+        unsigned int nowtime;
+        struct adb_request req;
+
+        nowtime = from_rtc_time(tm) + RTC_OFFSET;
+        if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
+                         nowtime >> 24, nowtime >> 16, nowtime >> 8,
+                         nowtime) < 0)
+                return -ENXIO;
+        while (!req.complete)
+                cuda_poll();
+        if ((req.reply_len != 3) && (req.reply_len != 7))
+                printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n",
+                       req.reply_len);
+        return 0;
+}
+
+#else
+#define cuda_get_time()         0
+#define cuda_get_rtc_time(tm)
+#define cuda_set_rtc_time(tm)   0
+#endif
+
+#ifdef CONFIG_ADB_PMU
+static unsigned long pmu_get_time(void)
+{
+        struct adb_request req;
+        unsigned long now;
+
+        if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
+                return 0;
+        pmu_wait_complete(&req);
+        if (req.reply_len != 4)
+                printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
+                       req.reply_len);
+        now = (req.reply[0] << 24) + (req.reply[1] << 16)
+                + (req.reply[2] << 8) + req.reply[3];
+        return now - RTC_OFFSET;
+}
+
+#define pmu_get_rtc_time(tm)    to_rtc_time(pmu_get_time(), (tm))
+
+static int pmu_set_rtc_time(struct rtc_time *tm)
+{
+        unsigned int nowtime;
+        struct adb_request req;
+
+        nowtime = from_rtc_time(tm) + RTC_OFFSET;
+        if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
+                        nowtime >> 16, nowtime >> 8, nowtime) < 0)
+                return -ENXIO;
+        pmu_wait_complete(&req);
+        if (req.reply_len != 0)
+                printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n",
+                       req.reply_len);
+        return 0;
+}
+
+#else
+#define pmu_get_time()          0
+#define pmu_get_rtc_time(tm)
+#define pmu_set_rtc_time(tm)    0
+#endif
+
+#ifdef CONFIG_PMAC_SMU
+static unsigned long smu_get_time(void)
+{
+        struct rtc_time tm;
+
+        if (smu_get_rtc_time(&tm, 1))
+                return 0;
+        return from_rtc_time(&tm);
+}
+
+#else
+#define smu_get_time()                  0
+#define smu_get_rtc_time(tm, spin)
+#define smu_set_rtc_time(tm, spin)      0
+#endif
+
+unsigned long pmac_get_boot_time(void)
+{
+        /* Get the time from the RTC, used only at boot time */
+        switch (sys_ctrler) {
+        case SYS_CTRLER_CUDA:
+                return cuda_get_time();
+        case SYS_CTRLER_PMU:
+                return pmu_get_time();
+        case SYS_CTRLER_SMU:
+                return smu_get_time();
+        default:
+                return 0;
+        }
+}
+
+void pmac_get_rtc_time(struct rtc_time *tm)
+{
+        /* Get the time from the RTC, used only at boot time */
+        switch (sys_ctrler) {
+        case SYS_CTRLER_CUDA:
+                cuda_get_rtc_time(tm);
+                break;
+        case SYS_CTRLER_PMU:
+                pmu_get_rtc_time(tm);
+                break;
+        case SYS_CTRLER_SMU:
+                smu_get_rtc_time(tm, 1);
+                break;
+        default:
+                ;
+        }
+}
+
+int pmac_set_rtc_time(struct rtc_time *tm)
+{
+        switch (sys_ctrler) {
+        case SYS_CTRLER_CUDA:
+                return cuda_set_rtc_time(tm);
+        case SYS_CTRLER_PMU:
+                return pmu_set_rtc_time(tm);
+        case SYS_CTRLER_SMU:
+                return smu_set_rtc_time(tm, 1);
+        default:
+                return -ENODEV;
+        }
+}
+
+#ifdef CONFIG_PPC32
+/*
+ * Calibrate the decrementer register using VIA timer 1.
+ * This is used both on powermacs and CHRP machines.
+ */
+int __init via_calibrate_decr(void)
+{
+        struct device_node *vias;
+        volatile unsigned char __iomem *via;
+        int count = VIA_TIMER_FREQ_6 / 100;
+        unsigned int dstart, dend;
+
+        vias = find_devices("via-cuda");
+        if (vias == 0)
+                vias = find_devices("via-pmu");
+        if (vias == 0)
+                vias = find_devices("via");
+        if (vias == 0 || vias->n_addrs == 0)
+                return 0;
+        via = ioremap(vias->addrs[0].address, vias->addrs[0].size);
+
+        /* set timer 1 for continuous interrupts */
+        out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
+        /* set the counter to a small value */
+        out_8(&via[T1CH], 2);
+        /* set the latch to `count' */
+        out_8(&via[T1LL], count);
+        out_8(&via[T1LH], count >> 8);
+        /* wait until it hits 0 */
+        while ((in_8(&via[IFR]) & T1_INT) == 0)
+                ;
+        dstart = get_dec();
+        /* clear the interrupt & wait until it hits 0 again */
+        in_8(&via[T1CL]);
+        while ((in_8(&via[IFR]) & T1_INT) == 0)
+                ;
+        dend = get_dec();
+
+        ppc_tb_freq = (dstart - dend) * 100 / 6;
+
+        iounmap(via);
+        
+        return 1;
+}
+#endif
+
+#ifdef CONFIG_PM
+/*
+ * Reset the time after a sleep.
+ */
+static int
+time_sleep_notify(struct pmu_sleep_notifier *self, int when)
+{
+        static unsigned long time_diff;
+        unsigned long flags;
+        unsigned long seq;
+        struct timespec tv;
+
+        switch (when) {
+        case PBOOK_SLEEP_NOW:
+                do {
+                        seq = read_seqbegin_irqsave(&xtime_lock, flags);
+                        time_diff = xtime.tv_sec - pmac_get_boot_time();
+                } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
+                break;
+        case PBOOK_WAKE:
+                tv.tv_sec = pmac_get_boot_time() + time_diff;
+                tv.tv_nsec = 0;
+                do_settimeofday(&tv);
+                break;
+        }
+        return PBOOK_SLEEP_OK;
+}
+
+static struct pmu_sleep_notifier time_sleep_notifier = {
+        time_sleep_notify, SLEEP_LEVEL_MISC,
+};
+#endif /* CONFIG_PM */
+
+/*
+ * Query the OF and get the decr frequency.
+ */
+void __init pmac_calibrate_decr(void)
+{
+#ifdef CONFIG_PM
+        /* XXX why here? */
+        pmu_register_sleep_notifier(&time_sleep_notifier);
+#endif /* CONFIG_PM */
+
+        generic_calibrate_decr();
+
+#ifdef CONFIG_PPC32
+        /* We assume MacRISC2 machines have correct device-tree
+         * calibration. That's better since the VIA itself seems
+         * to be slightly off. --BenH
+         */
+        if (!machine_is_compatible("MacRISC2") &&
+            !machine_is_compatible("MacRISC3") &&
+            !machine_is_compatible("MacRISC4"))
+                if (via_calibrate_decr())
+                        return;
+
+        /* Special case: QuickSilver G4s seem to have a badly calibrated
+         * timebase-frequency in OF, VIA is much better on these. We should
+         * probably implement calibration based on the KL timer on these
+         * machines anyway... -BenH
+         */
+        if (machine_is_compatible("PowerMac3,5"))
+                if (via_calibrate_decr())
+                        return;
+#endif
+}
diff --git a/arch/powerpc/platforms/prep/Kconfig b/arch/powerpc/platforms/prep/Kconfig
new file mode 100644
index 000000000000..673ac47a1626
--- /dev/null
+++ b/arch/powerpc/platforms/prep/Kconfig
@@ -0,0 +1,22 @@
+
+config PREP_RESIDUAL
+        bool "Support for PReP Residual Data"
+        depends on PPC_PREP
+        help
+          Some PReP systems have residual data passed to the kernel by the
+          firmware.  This allows detection of memory size, devices present and
+          other useful pieces of information.  Sometimes this information is
+          not present or incorrect, in which case it could lead to the machine 
+          behaving incorrectly.  If this happens, either disable PREP_RESIDUAL
+          or pass the 'noresidual' option to the kernel.
+
+          If you are running a PReP system, say Y here, otherwise say N.
+
+config PROC_PREPRESIDUAL
+        bool "Support for reading of PReP Residual Data in /proc"
+        depends on PREP_RESIDUAL && PROC_FS
+        help
+          Enabling this option will create a /proc/residual file which allows
+          you to get at the residual data on PReP systems.  You will need a tool
+          (lsresidual) to parse it.  If you aren't on a PReP system, you don't
+          want this.
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
new file mode 100644
index 000000000000..2d57f588151d
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -0,0 +1,42 @@
+
+config PPC_SPLPAR
+        depends on PPC_PSERIES
+        bool "Support for shared-processor logical partitions"
+        default n
+        help
+          Enabling this option will make the kernel run more efficiently
+          on logically-partitioned pSeries systems which use shared
+          processors, that is, which share physical processors between
+          two or more partitions.
+
+config HMT
+        bool "Hardware multithreading"
+        depends on SMP && PPC_PSERIES && BROKEN
+        help
+          This option enables hardware multithreading on RS64 cpus.
+          pSeries systems p620 and p660 have such a cpu type.
+
+config EEH
+        bool "PCI Extended Error Handling (EEH)" if EMBEDDED
+        depends on PPC_PSERIES
+        default y if !EMBEDDED
+
+config RTAS_PROC
+        bool "Proc interface to RTAS"
+        depends on PPC_RTAS
+        default y
+
+config RTAS_FLASH
+        tristate "Firmware flash interface"
+        depends on PPC64 && RTAS_PROC
+
+config SCANLOG
+        tristate "Scanlog dump interface"
+        depends on RTAS_PROC && PPC_PSERIES
+
+config LPARCFG
+        tristate "LPAR Configuration Data"
+        depends on PPC_PSERIES || PPC_ISERIES
+        help
+        Provide system capacity information via human readable
+        <key word>=<value> pairs through a /proc/ppc64/lparcfg interface.
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
new file mode 100644
index 000000000000..5ef494e3a70f
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -0,0 +1,5 @@
+obj-y                   := pci.o lpar.o hvCall.o nvram.o reconfig.o \
+                           setup.o iommu.o rtas-fw.o ras.o
+obj-$(CONFIG_SMP)       += smp.o
+obj-$(CONFIG_IBMVIO)    += vio.o
+obj-$(CONFIG_XICS)      += xics.o
diff --git a/arch/ppc64/kernel/pSeries_hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index 176e8da76466..176e8da76466 100644
--- a/arch/ppc64/kernel/pSeries_hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
diff --git a/arch/ppc64/kernel/pSeries_iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index d17f0108a032..9e90d41131d8 100644
--- a/arch/ppc64/kernel/pSeries_iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -46,7 +46,8 @@
 #include <asm/pSeries_reconfig.h>
 #include <asm/systemcfg.h>
 #include <asm/firmware.h>
-#include "pci.h"
+#include <asm/tce.h>
+#include <asm/ppc-pci.h>
 
 #define DBG(fmt...)
 
@@ -59,6 +60,9 @@ static void tce_build_pSeries(struct iommu_table *tbl, long index,
         union tce_entry t;
         union tce_entry *tp;
 
+        index <<= TCE_PAGE_FACTOR;
+        npages <<= TCE_PAGE_FACTOR;
+
         t.te_word = 0;
         t.te_rdwr = 1; // Read allowed 
 
@@ -69,11 +73,11 @@ static void tce_build_pSeries(struct iommu_table *tbl, long index,
 
         while (npages--) {
                 /* can't move this out since we might cross LMB boundary */
-                t.te_rpn = (virt_to_abs(uaddr)) >> PAGE_SHIFT;
+                t.te_rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
         
                 tp->te_word = t.te_word;
 
-                uaddr += PAGE_SIZE;
+                uaddr += TCE_PAGE_SIZE;
                 tp++;
         }
 }
@@ -84,6 +88,9 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
         union tce_entry t;
         union tce_entry *tp;
 
+        npages <<= TCE_PAGE_FACTOR;
+        index <<= TCE_PAGE_FACTOR;
+
         t.te_word = 0;
         tp  = ((union tce_entry *)tbl->it_base) + index;
                 
@@ -103,7 +110,7 @@ static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
         union tce_entry tce;
 
         tce.te_word = 0;
-        tce.te_rpn = (virt_to_abs(uaddr)) >> PAGE_SHIFT;
+        tce.te_rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
         tce.te_rdwr = 1;
         if (direction != DMA_TO_DEVICE)
                 tce.te_pciwr = 1;
@@ -136,6 +143,9 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
         union tce_entry tce, *tcep;
         long l, limit;
 
+        tcenum <<= TCE_PAGE_FACTOR;
+        npages <<= TCE_PAGE_FACTOR;
+
         if (npages == 1)
                 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
                                            direction);
@@ -155,7 +165,7 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
         }
 
         tce.te_word = 0;
-        tce.te_rpn = (virt_to_abs(uaddr)) >> PAGE_SHIFT;
+        tce.te_rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
         tce.te_rdwr = 1;
         if (direction != DMA_TO_DEVICE)
                 tce.te_pciwr = 1;
@@ -166,7 +176,7 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
                  * Set up the page with TCE data, looping through and setting
                  * the values.
                  */
-                limit = min_t(long, npages, PAGE_SIZE/sizeof(union tce_entry));
+                limit = min_t(long, npages, 4096/sizeof(union tce_entry));
 
                 for (l = 0; l < limit; l++) {
                         tcep[l] = tce;
@@ -196,6 +206,9 @@ static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages
         u64 rc;
         union tce_entry tce;
 
+        tcenum <<= TCE_PAGE_FACTOR;
+        npages <<= TCE_PAGE_FACTOR;
+
         tce.te_word = 0;
 
         while (npages--) {
@@ -221,6 +234,9 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
         u64 rc;
         union tce_entry tce;
 
+        tcenum <<= TCE_PAGE_FACTOR;
+        npages <<= TCE_PAGE_FACTOR;
+
         tce.te_word = 0;
 
         rc = plpar_tce_stuff((u64)tbl->it_index,
diff --git a/arch/ppc64/kernel/pSeries_lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index a6de83f2078f..268d8362dde7 100644
--- a/arch/ppc64/kernel/pSeries_lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -486,8 +486,7 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
  * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
  * lock.
  */
-void pSeries_lpar_flush_hash_range(unsigned long context, unsigned long number,
-                                   int local)
+void pSeries_lpar_flush_hash_range(unsigned long number, int local)
 {
         int i;
         unsigned long flags = 0;
@@ -498,7 +497,7 @@ void pSeries_lpar_flush_hash_range(unsigned long context, unsigned long number,
                 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
 
         for (i = 0; i < number; i++)
-                flush_hash_page(context, batch->addr[i], batch->pte[i], local);
+                flush_hash_page(batch->vaddr[i], batch->pte[i], local);
 
         if (lock_tlbie)
                 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
diff --git a/arch/ppc64/kernel/pSeries_nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 18abfb1f4e24..18abfb1f4e24 100644
--- a/arch/ppc64/kernel/pSeries_nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
diff --git a/arch/ppc64/kernel/pSeries_pci.c b/arch/powerpc/platforms/pseries/pci.c
index 928f8febdb3b..c198656a3bb5 100644
--- a/arch/ppc64/kernel/pSeries_pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -29,8 +29,7 @@
 
 #include <asm/pci-bridge.h>
 #include <asm/prom.h>
-
-#include "pci.h"
+#include <asm/ppc-pci.h>
 
 static int __devinitdata s7a_workaround = -1;
 
diff --git a/arch/ppc64/kernel/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 41b97dc9cc0a..6562ff4b0a82 100644
--- a/arch/ppc64/kernel/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -1,17 +1,16 @@
 /*
- * ras.c
  * Copyright (C) 2001 Dave Engebretsen IBM Corporation
- * 
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
@@ -19,7 +18,7 @@
 
 /* Change Activity:
  * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
- * End Change Activity 
+ * End Change Activity
  */
 
 #include <linux/errno.h>
@@ -323,7 +322,7 @@ static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
                 nonfatal = 1;
         }
 
-        log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
+        log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
 
         return nonfatal;
 }
diff --git a/arch/ppc64/kernel/pSeries_reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 58c61219d08e..58c61219d08e 100644
--- a/arch/ppc64/kernel/pSeries_reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
diff --git a/arch/powerpc/platforms/pseries/rtas-fw.c b/arch/powerpc/platforms/pseries/rtas-fw.c
new file mode 100644
index 000000000000..15d81d758ca0
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/rtas-fw.c
@@ -0,0 +1,138 @@
+/*
+ *
+ * Procedures for firmware flash updates on pSeries systems.
+ *
+ * Peter Bergner, IBM   March 2001.
+ * Copyright (C) 2001 IBM.
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+
+#include <stdarg.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include <asm/prom.h>
+#include <asm/rtas.h>
+#include <asm/semaphore.h>
+#include <asm/machdep.h>
+#include <asm/page.h>
+#include <asm/param.h>
+#include <asm/system.h>
+#include <asm/abs_addr.h>
+#include <asm/udbg.h>
+#include <asm/delay.h>
+#include <asm/uaccess.h>
+#include <asm/systemcfg.h>
+
+#include "rtas-fw.h"
+
+struct flash_block_list_header rtas_firmware_flash_list = {0, NULL};
+
+#define FLASH_BLOCK_LIST_VERSION (1UL)
+
+static void rtas_flash_firmware(void)
+{
+        unsigned long image_size;
+        struct flash_block_list *f, *next, *flist;
+        unsigned long rtas_block_list;
+        int i, status, update_token;
+
+        update_token = rtas_token("ibm,update-flash-64-and-reboot");
+        if (update_token == RTAS_UNKNOWN_SERVICE) {
+                printk(KERN_ALERT "FLASH: ibm,update-flash-64-and-reboot is not available -- not a service partition?\n");
+                printk(KERN_ALERT "FLASH: firmware will not be flashed\n");
+                return;
+        }
+
+        /* NOTE: the "first" block list is a global var with no data
+         * blocks in the kernel data segment.  We do this because
+         * we want to ensure this block_list addr is under 4GB.
+         */
+        rtas_firmware_flash_list.num_blocks = 0;
+        flist = (struct flash_block_list *)&rtas_firmware_flash_list;
+        rtas_block_list = virt_to_abs(flist);
+        if (rtas_block_list >= 4UL*1024*1024*1024) {
+                printk(KERN_ALERT "FLASH: kernel bug...flash list header addr above 4GB\n");
+                return;
+        }
+
+        printk(KERN_ALERT "FLASH: preparing saved firmware image for flash\n");
+        /* Update the block_list in place. */
+        image_size = 0;
+        for (f = flist; f; f = next) {
+                /* Translate data addrs to absolute */
+                for (i = 0; i < f->num_blocks; i++) {
+                        f->blocks[i].data = (char *)virt_to_abs(f->blocks[i].data);
+                        image_size += f->blocks[i].length;
+                }
+                next = f->next;
+                /* Don't translate NULL pointer for last entry */
+                if (f->next)
+                        f->next = (struct flash_block_list *)virt_to_abs(f->next);
+                else
+                        f->next = NULL;
+                /* make num_blocks into the version/length field */
+                f->num_blocks = (FLASH_BLOCK_LIST_VERSION << 56) | ((f->num_blocks+1)*16);
+        }
+
+        printk(KERN_ALERT "FLASH: flash image is %ld bytes\n", image_size);
+        printk(KERN_ALERT "FLASH: performing flash and reboot\n");
+        rtas_progress("Flashing        \n", 0x0);
+        rtas_progress("Please Wait...  ", 0x0);
+        printk(KERN_ALERT "FLASH: this will take several minutes.  Do not power off!\n");
+        status = rtas_call(update_token, 1, 1, NULL, rtas_block_list);
+        switch (status) {       /* should only get "bad" status */
+            case 0:
+                printk(KERN_ALERT "FLASH: success\n");
+                break;
+            case -1:
+                printk(KERN_ALERT "FLASH: hardware error.  Firmware may not be not flashed\n");
+                break;
+            case -3:
+                printk(KERN_ALERT "FLASH: image is corrupt or not correct for this platform.  Firmware not flashed\n");
+                break;
+            case -4:
+                printk(KERN_ALERT "FLASH: flash failed when partially complete.  System may not reboot\n");
+                break;
+            default:
+                printk(KERN_ALERT "FLASH: unknown flash return code %d\n", status);
+                break;
+        }
+}
+
+void rtas_flash_bypass_warning(void)
+{
+        printk(KERN_ALERT "FLASH: firmware flash requires a reboot\n");
+        printk(KERN_ALERT "FLASH: the firmware image will NOT be flashed\n");
+}
+
+
+void rtas_fw_restart(char *cmd)
+{
+        if (rtas_firmware_flash_list.next)
+                rtas_flash_firmware();
+        rtas_restart(cmd);
+}
+
+void rtas_fw_power_off(void)
+{
+        if (rtas_firmware_flash_list.next)
+                rtas_flash_bypass_warning();
+        rtas_power_off();
+}
+
+void rtas_fw_halt(void)
+{
+        if (rtas_firmware_flash_list.next)
+                rtas_flash_bypass_warning();
+        rtas_halt();
+}
+
+EXPORT_SYMBOL(rtas_firmware_flash_list);
diff --git a/arch/powerpc/platforms/pseries/rtas-fw.h b/arch/powerpc/platforms/pseries/rtas-fw.h
new file mode 100644
index 000000000000..e70fa69974a3
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/rtas-fw.h
@@ -0,0 +1,3 @@
+void rtas_fw_restart(char *cmd);
+void rtas_fw_power_off(void);
+void rtas_fw_halt(void);
diff --git a/arch/ppc64/kernel/pSeries_setup.c b/arch/powerpc/platforms/pseries/setup.c
index 3009701eb90d..10cb0f2d9b5b 100644
--- a/arch/ppc64/kernel/pSeries_setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/ppc/kernel/setup.c
+ *  64-bit pSeries and RS/6000 setup code.
  *
  *  Copyright (C) 1995  Linus Torvalds
  *  Adapted from 'alpha' version by Gary Thomas
@@ -59,13 +59,15 @@
 #include <asm/time.h>
 #include <asm/nvram.h>
 #include <asm/plpar_wrappers.h>
-#include <asm/xics.h>
+#include "xics.h"
 #include <asm/firmware.h>
 #include <asm/pmc.h>
+#include <asm/mpic.h>
+#include <asm/ppc-pci.h>
+#include <asm/i8259.h>
+#include <asm/udbg.h>
 
-#include "i8259.h"
-#include "mpic.h"
-#include "pci.h"
+#include "rtas-fw.h"
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -84,13 +86,12 @@ int fwnmi_active;  /* TRUE if an FWNMI handler is present */
 extern void pSeries_system_reset_exception(struct pt_regs *regs);
 extern int pSeries_machine_check_exception(struct pt_regs *regs);
 
-static int pseries_shared_idle(void);
-static int pseries_dedicated_idle(void);
+static void pseries_shared_idle(void);
+static void pseries_dedicated_idle(void);
 
-static volatile void __iomem * chrp_int_ack_special;
 struct mpic *pSeries_mpic;
 
-void pSeries_get_cpuinfo(struct seq_file *m)
+void pSeries_show_cpuinfo(struct seq_file *m)
 {
         struct device_node *root;
         const char *model = "";
@@ -119,19 +120,11 @@ static void __init fwnmi_init(void)
                 fwnmi_active = 1;
 }
 
-static int pSeries_irq_cascade(struct pt_regs *regs, void *data)
-{
-        if (chrp_int_ack_special)
-                return readb(chrp_int_ack_special);
-        else
-                return i8259_irq(smp_processor_id());
-}
-
 static void __init pSeries_init_mpic(void)
 {
         unsigned int *addrp;
         struct device_node *np;
-        int i;
+        unsigned long intack = 0;
 
         /* All ISUs are setup, complete initialization */
         mpic_init(pSeries_mpic);
@@ -142,16 +135,14 @@ static void __init pSeries_init_mpic(void)
                  get_property(np, "8259-interrupt-acknowledge", NULL)))
                 printk(KERN_ERR "Cannot find pci to get ack address\n");
         else
-                chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
+                intack = addrp[prom_n_addr_cells(np)-1];
         of_node_put(np);
 
         /* Setup the legacy interrupts & controller */
-        for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-        i8259_init(0);
+        i8259_init(intack, 0);
 
         /* Hook cascade to mpic */
-        mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
+        mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
 }
 
 static void __init pSeries_setup_mpic(void)
@@ -241,10 +232,6 @@ static void __init pSeries_setup_arch(void)
         find_and_init_phbs();
         eeh_init();
 
-#ifdef CONFIG_DUMMY_CONSOLE
-        conswitchp = &dummy_con;
-#endif
-
         pSeries_nvram_init();
 
         /* Choose an idle loop */
@@ -488,8 +475,8 @@ static inline void dedicated_idle_sleep(unsigned int cpu)
         }
 }
 
-static int pseries_dedicated_idle(void)
-{
+static void pseries_dedicated_idle(void)
+{ 
         long oldval;
         struct paca_struct *lpaca = get_paca();
         unsigned int cpu = smp_processor_id();
@@ -544,7 +531,7 @@ static int pseries_dedicated_idle(void)
         }
 }
 
-static int pseries_shared_idle(void)
+static void pseries_shared_idle(void)
 {
         struct paca_struct *lpaca = get_paca();
         unsigned int cpu = smp_processor_id();
@@ -586,8 +573,6 @@ static int pseries_shared_idle(void)
                 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
                         cpu_die();
         }
-
-        return 0;
 }
 
 static int pSeries_pci_probe_mode(struct pci_bus *bus)
@@ -601,14 +586,14 @@ struct machdep_calls __initdata pSeries_md = {
         .probe                  = pSeries_probe,
         .setup_arch             = pSeries_setup_arch,
         .init_early             = pSeries_init_early,
-        .get_cpuinfo            = pSeries_get_cpuinfo,
+        .show_cpuinfo           = pSeries_show_cpuinfo,
         .log_error              = pSeries_log_error,
         .pcibios_fixup          = pSeries_final_fixup,
         .pci_probe_mode         = pSeries_pci_probe_mode,
         .irq_bus_setup          = pSeries_irq_bus_setup,
-        .restart                = rtas_restart,
-        .power_off              = rtas_power_off,
-        .halt                   = rtas_halt,
+        .restart                = rtas_fw_restart,
+        .power_off              = rtas_fw_power_off,
+        .halt                   = rtas_fw_halt,
         .panic                  = rtas_os_term,
         .cpu_die                = pSeries_mach_cpu_die,
         .get_boot_time          = rtas_get_boot_time,
diff --git a/arch/ppc64/kernel/pSeries_smp.c b/arch/powerpc/platforms/pseries/smp.c
index d2c7e2c4733b..9c9458ddfc25 100644
--- a/arch/ppc64/kernel/pSeries_smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -1,5 +1,5 @@
 /*
- * SMP support for pSeries and BPA machines.
+ * SMP support for pSeries machines.
  *
  * Dave Engebretsen, Peter Bergner, and
  * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
@@ -39,16 +39,14 @@
 #include <asm/paca.h>
 #include <asm/time.h>
 #include <asm/machdep.h>
-#include <asm/xics.h>
+#include "xics.h"
 #include <asm/cputable.h>
 #include <asm/firmware.h>
 #include <asm/system.h>
 #include <asm/rtas.h>
 #include <asm/plpar_wrappers.h>
 #include <asm/pSeries_reconfig.h>
-
-#include "mpic.h"
-#include "bpa_iic.h"
+#include <asm/mpic.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -343,36 +341,6 @@ static void __devinit smp_xics_setup_cpu(int cpu)
 
 }
 #endif /* CONFIG_XICS */
-#ifdef CONFIG_BPA_IIC
-static void smp_iic_message_pass(int target, int msg)
-{
-        unsigned int i;
-
-        if (target < NR_CPUS) {
-                iic_cause_IPI(target, msg);
-        } else {
-                for_each_online_cpu(i) {
-                        if (target == MSG_ALL_BUT_SELF
-                            && i == smp_processor_id())
-                                continue;
-                        iic_cause_IPI(i, msg);
-                }
-        }
-}
-
-static int __init smp_iic_probe(void)
-{
-        iic_request_IPIs();
-
-        return cpus_weight(cpu_possible_map);
-}
-
-static void __devinit smp_iic_setup_cpu(int cpu)
-{
-        if (cpu != boot_cpuid)
-                iic_setup_cpu();
-}
-#endif /* CONFIG_BPA_IIC */
 
 static DEFINE_SPINLOCK(timebase_lock);
 static unsigned long timebase = 0;
@@ -444,15 +412,6 @@ static struct smp_ops_t pSeries_xics_smp_ops = {
         .cpu_bootable   = smp_pSeries_cpu_bootable,
 };
 #endif
-#ifdef CONFIG_BPA_IIC
-static struct smp_ops_t bpa_iic_smp_ops = {
-        .message_pass   = smp_iic_message_pass,
-        .probe          = smp_iic_probe,
-        .kick_cpu       = smp_pSeries_kick_cpu,
-        .setup_cpu      = smp_iic_setup_cpu,
-        .cpu_bootable   = smp_pSeries_cpu_bootable,
-};
-#endif
 
 /* This is called very early */
 void __init smp_init_pSeries(void)
@@ -472,11 +431,6 @@ void __init smp_init_pSeries(void)
                 smp_ops = &pSeries_xics_smp_ops;
                 break;
 #endif
-#ifdef CONFIG_BPA_IIC
-        case IC_BPA_IIC:
-                smp_ops = &bpa_iic_smp_ops;
-                break;
-#endif
         default:
                 panic("Invalid interrupt controller");
         }
diff --git a/arch/ppc64/kernel/pSeries_vio.c b/arch/powerpc/platforms/pseries/vio.c
index e0ae06f58f86..866379b80c09 100644
--- a/arch/ppc64/kernel/pSeries_vio.c
+++ b/arch/powerpc/platforms/pseries/vio.c
@@ -22,6 +22,7 @@
 #include <asm/prom.h>
 #include <asm/vio.h>
 #include <asm/hvcall.h>
+#include <asm/tce.h>
 
 extern struct subsystem devices_subsys; /* needed for vio_find_name() */
 
diff --git a/arch/ppc64/kernel/xics.c b/arch/powerpc/platforms/pseries/xics.c
index daf93885dcfa..c72c86f05cb6 100644
--- a/arch/ppc64/kernel/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -1,5 +1,5 @@
-/* 
- * arch/ppc64/kernel/xics.c
+/*
+ * arch/powerpc/platforms/pseries/xics.c
  *
  * Copyright 2000 IBM Corporation.
  *
@@ -25,11 +25,11 @@
 #include <asm/pgtable.h>
 #include <asm/smp.h>
 #include <asm/rtas.h>
-#include <asm/xics.h>
 #include <asm/hvcall.h>
 #include <asm/machdep.h>
+#include <asm/i8259.h>
 
-#include "i8259.h"
+#include "xics.h"
 
 static unsigned int xics_startup(unsigned int irq);
 static void xics_enable_irq(unsigned int irq);
@@ -62,7 +62,7 @@ static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
 /* Want a priority other than 0.  Various HW issues require this. */
 #define DEFAULT_PRIORITY        5
 
-/* 
+/*
  * Mark IPIs as higher priority so we can take them inside interrupts that
  * arent marked SA_INTERRUPT
  */
@@ -169,11 +169,11 @@ static inline long plpar_xirr(unsigned long *xirr_ret)
 static int pSeriesLP_xirr_info_get(int n_cpu)
 {
         unsigned long lpar_rc;
-        unsigned long return_value; 
+        unsigned long return_value;
 
         lpar_rc = plpar_xirr(&return_value);
         if (lpar_rc != H_Success)
-                panic(" bad return code xirr - rc = %lx \n", lpar_rc); 
+                panic(" bad return code xirr - rc = %lx \n", lpar_rc);
         return (int)return_value;
 }
 
@@ -185,7 +185,7 @@ static void pSeriesLP_xirr_info_set(int n_cpu, int value)
         lpar_rc = plpar_eoi(val64);
         if (lpar_rc != H_Success)
                 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
-                      val64); 
+                      val64);
 }
 
 void pSeriesLP_cppr_info(int n_cpu, u8 value)
@@ -194,7 +194,7 @@ void pSeriesLP_cppr_info(int n_cpu, u8 value)
 
         lpar_rc = plpar_cppr(value);
         if (lpar_rc != H_Success)
-                panic("bad return code cppr - rc = %lx\n", lpar_rc); 
+                panic("bad return code cppr - rc = %lx\n", lpar_rc);
 }
 
 static void pSeriesLP_qirr_info(int n_cpu , u8 value)
@@ -203,7 +203,7 @@ static void pSeriesLP_qirr_info(int n_cpu , u8 value)
 
         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
         if (lpar_rc != H_Success)
-                panic("bad return code qirr - rc = %lx\n", lpar_rc); 
+                panic("bad return code qirr - rc = %lx\n", lpar_rc);
 }
 
 xics_ops pSeriesLP_ops = {
@@ -366,7 +366,7 @@ int xics_get_irq(struct pt_regs *regs)
 
         /* for sanity, this had better be < NR_IRQS - 16 */
         if (vec == xics_irq_8259_cascade_real) {
-                irq = i8259_irq(cpu);
+                irq = i8259_irq(regs);
                 if (irq == -1) {
                         /* Spurious cascaded interrupt.  Still must ack xics */
                         xics_end_irq(irq_offset_up(xics_irq_8259_cascade));
@@ -462,7 +462,7 @@ void xics_init_IRQ(void)
         struct xics_interrupt_node {
                 unsigned long addr;
                 unsigned long size;
-        } intnodes[NR_CPUS]; 
+        } intnodes[NR_CPUS];
 
         ppc64_boot_msg(0x20, "XICS Init");
 
@@ -487,7 +487,7 @@ nextnode:
         ireg = (uint *)get_property(np, "reg", &ilen);
         if (!ireg)
                 panic("xics_init_IRQ: can't find interrupt reg property");
-        
+
         while (ilen) {
                 intnodes[indx].addr = (unsigned long)*ireg++ << 32;
                 ilen -= sizeof(uint);
@@ -555,7 +555,7 @@ nextnode:
                                 continue;
 
                         hard_id = get_hard_smp_processor_id(i);
-                        xics_per_cpu[i] = ioremap(intnodes[hard_id].addr, 
+                        xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
                                                   intnodes[hard_id].size);
                 }
 #else
@@ -589,7 +589,7 @@ static int __init xics_setup_i8259(void)
                                 no_action, 0, "8259 cascade", NULL))
                         printk(KERN_ERR "xics_setup_i8259: couldn't get 8259 "
                                         "cascade\n");
-                i8259_init(0);
+                i8259_init(0, 0);
         }
         return 0;
 }
diff --git a/arch/powerpc/platforms/pseries/xics.h b/arch/powerpc/platforms/pseries/xics.h
new file mode 100644
index 000000000000..e14c70868f1d
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/xics.h
@@ -0,0 +1,34 @@
+/*
+ * arch/powerpc/platforms/pseries/xics.h
+ *
+ * Copyright 2000 IBM Corporation.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _POWERPC_KERNEL_XICS_H
+#define _POWERPC_KERNEL_XICS_H
+
+#include <linux/cache.h>
+
+void xics_init_IRQ(void);
+int xics_get_irq(struct pt_regs *);
+void xics_setup_cpu(void);
+void xics_teardown_cpu(int secondary);
+void xics_cause_IPI(int cpu);
+void xics_request_IPIs(void);
+void xics_migrate_irqs_away(void);
+
+/* first argument is ignored for now*/
+void pSeriesLP_cppr_info(int n_cpu, u8 value);
+
+struct xics_ipi_struct {
+        volatile unsigned long value;
+} ____cacheline_aligned;
+
+extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
+
+#endif /* _POWERPC_KERNEL_XICS_H */
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
new file mode 100644
index 000000000000..8acd21dee05d
--- /dev/null
+++ b/arch/powerpc/sysdev/Makefile
@@ -0,0 +1,7 @@
+obj-$(CONFIG_MPIC)              += mpic.o
+obj-$(CONFIG_PPC_INDIRECT_PCI)  += indirect_pci.o
+obj-$(CONFIG_PPC_I8259)         += i8259.o
+obj-$(CONFIG_PPC_MPC106)        += grackle.o
+obj-$(CONFIG_BOOKE)             += dcr.o
+obj-$(CONFIG_40x)               += dcr.o
+obj-$(CONFIG_U3_DART)           += u3_iommu.o
diff --git a/arch/ppc/syslib/dcr.S b/arch/powerpc/sysdev/dcr.S
index 895f10243a43..895f10243a43 100644
--- a/arch/ppc/syslib/dcr.S
+++ b/arch/powerpc/sysdev/dcr.S
diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c
new file mode 100644
index 000000000000..b6ec793a23be
--- /dev/null
+++ b/arch/powerpc/sysdev/grackle.c
@@ -0,0 +1,64 @@
+/*
+ * Functions for setting up and using a MPC106 northbridge
+ * Extracted from arch/powerpc/platforms/powermac/pci.c.
+ *
+ * Copyright (C) 2003 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
+ * Copyright (C) 1997 Paul Mackerras (paulus@samba.org)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/grackle.h>
+
+#define GRACKLE_CFA(b, d, o)    (0x80 | ((b) << 8) | ((d) << 16) \
+                                 | (((o) & ~3) << 24))
+
+#define GRACKLE_PICR1_STG               0x00000040
+#define GRACKLE_PICR1_LOOPSNOOP         0x00000010
+
+/* N.B. this is called before bridges is initialized, so we can't
+   use grackle_pcibios_{read,write}_config_dword. */
+static inline void grackle_set_stg(struct pci_controller* bp, int enable)
+{
+        unsigned int val;
+
+        out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
+        val = in_le32(bp->cfg_data);
+        val = enable? (val | GRACKLE_PICR1_STG) :
+                (val & ~GRACKLE_PICR1_STG);
+        out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
+        out_le32(bp->cfg_data, val);
+        (void)in_le32(bp->cfg_data);
+}
+
+static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
+{
+        unsigned int val;
+
+        out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
+        val = in_le32(bp->cfg_data);
+        val = enable? (val | GRACKLE_PICR1_LOOPSNOOP) :
+                (val & ~GRACKLE_PICR1_LOOPSNOOP);
+        out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
+        out_le32(bp->cfg_data, val);
+        (void)in_le32(bp->cfg_data);
+}
+
+void __init setup_grackle(struct pci_controller *hose)
+{
+        setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
+        if (machine_is_compatible("AAPL,PowerBook1998"))
+                grackle_set_loop_snoop(hose, 1);
+#if 0   /* Disabled for now, HW problems ??? */
+        grackle_set_stg(hose, 1);
+#endif
+}
diff --git a/arch/ppc/syslib/i8259.c b/arch/powerpc/sysdev/i8259.c
index 5c7908c20e43..90bce6e0c191 100644
--- a/arch/ppc/syslib/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -1,18 +1,26 @@
+/*
+ * i8259 interrupt controller driver.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
 #include <linux/init.h>
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <asm/io.h>
 #include <asm/i8259.h>
 
-static volatile unsigned char *pci_intack; /* RO, gives us the irq vector */
+static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */
 
-unsigned char cached_8259[2] = { 0xff, 0xff };
+static unsigned char cached_8259[2] = { 0xff, 0xff };
 #define cached_A1 (cached_8259[0])
 #define cached_21 (cached_8259[1])
 
 static DEFINE_SPINLOCK(i8259_lock);
 
-int i8259_pic_irq_offset;
+static int i8259_pic_irq_offset;
 
 /*
  * Acknowledge the IRQ using either the PCI host bridge's interrupt
@@ -20,8 +28,7 @@ int i8259_pic_irq_offset;
  * which is called.  It should be noted that polling is broken on some
  * IBM and Motorola PReP boxes so we must use the int-ack feature on them.
  */
-int
-i8259_irq(struct pt_regs *regs)
+int i8259_irq(struct pt_regs *regs)
 {
         int irq;
 
@@ -29,7 +36,7 @@ i8259_irq(struct pt_regs *regs)
 
         /* Either int-ack or poll for the IRQ */
         if (pci_intack)
-                irq = *pci_intack;
+                irq = readb(pci_intack);
         else {
                 /* Perform an interrupt acknowledge cycle on controller 1. */
                 outb(0x0C, 0x20);               /* prepare for poll */
@@ -59,7 +66,12 @@ i8259_irq(struct pt_regs *regs)
         }
 
         spin_unlock(&i8259_lock);
-        return irq;
+        return irq + i8259_pic_irq_offset;
+}
+
+int i8259_irq_cascade(struct pt_regs *regs, void *unused)
+{
+        return i8259_irq(regs);
 }
 
 static void i8259_mask_and_ack_irq(unsigned int irq_nr)
@@ -67,20 +79,18 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr)
         unsigned long flags;
 
         spin_lock_irqsave(&i8259_lock, flags);
-        if ( irq_nr >= i8259_pic_irq_offset )
-                irq_nr -= i8259_pic_irq_offset;
-
+        irq_nr -= i8259_pic_irq_offset;
         if (irq_nr > 7) {
                 cached_A1 |= 1 << (irq_nr-8);
-                inb(0xA1); /* DUMMY */
-                outb(cached_A1,0xA1);
-                outb(0x20,0xA0); /* Non-specific EOI */
-                outb(0x20,0x20); /* Non-specific EOI to cascade */
+                inb(0xA1);      /* DUMMY */
+                outb(cached_A1, 0xA1);
+                outb(0x20, 0xA0);       /* Non-specific EOI */
+                outb(0x20, 0x20);       /* Non-specific EOI to cascade */
         } else {
                 cached_21 |= 1 << irq_nr;
-                inb(0x21); /* DUMMY */
-                outb(cached_21,0x21);
-                outb(0x20,0x20); /* Non-specific EOI */
+                inb(0x21);      /* DUMMY */
+                outb(cached_21, 0x21);
+                outb(0x20, 0x20);       /* Non-specific EOI */
         }
         spin_unlock_irqrestore(&i8259_lock, flags);
 }
@@ -96,9 +106,8 @@ static void i8259_mask_irq(unsigned int irq_nr)
         unsigned long flags;
 
         spin_lock_irqsave(&i8259_lock, flags);
-        if ( irq_nr >= i8259_pic_irq_offset )
-                irq_nr -= i8259_pic_irq_offset;
-        if ( irq_nr < 8 )
+        irq_nr -= i8259_pic_irq_offset;
+        if (irq_nr < 8)
                 cached_21 |= 1 << irq_nr;
         else
                 cached_A1 |= 1 << (irq_nr-8);
@@ -111,9 +120,8 @@ static void i8259_unmask_irq(unsigned int irq_nr)
         unsigned long flags;
 
         spin_lock_irqsave(&i8259_lock, flags);
-        if ( irq_nr >= i8259_pic_irq_offset )
-                irq_nr -= i8259_pic_irq_offset;
-        if ( irq_nr < 8 )
+        irq_nr -= i8259_pic_irq_offset;
+        if (irq_nr < 8)
                 cached_21 &= ~(1 << irq_nr);
         else
                 cached_A1 &= ~(1 << (irq_nr-8));
@@ -169,12 +177,14 @@ static struct irqaction i8259_irqaction = {
  * intack_addr - PCI interrupt acknowledge (real) address which will return
  *               the active irq from the 8259
  */
-void __init
-i8259_init(long intack_addr)
+void __init i8259_init(unsigned long intack_addr, int offset)
 {
         unsigned long flags;
+        int i;
 
         spin_lock_irqsave(&i8259_lock, flags);
+        i8259_pic_irq_offset = offset;
+
         /* init master interrupt controller */
         outb(0x11, 0x20); /* Start init sequence */
         outb(0x00, 0x21); /* Vector base */
@@ -198,11 +208,14 @@ i8259_init(long intack_addr)
         spin_unlock_irqrestore(&i8259_lock, flags);
 
         /* reserve our resources */
-        setup_irq( i8259_pic_irq_offset + 2, &i8259_irqaction);
+        setup_irq(offset + 2, &i8259_irqaction);
         request_resource(&ioport_resource, &pic1_iores);
         request_resource(&ioport_resource, &pic2_iores);
         request_resource(&ioport_resource, &pic_edgectrl_iores);
 
         if (intack_addr != 0)
                 pci_intack = ioremap(intack_addr, 1);
+
+        for (i = 0; i < NUM_ISA_INTERRUPTS; ++i)
+                irq_desc[offset + i].handler = &i8259_pic;
 }
diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index e71488469704..e71488469704 100644
--- a/arch/ppc/syslib/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
diff --git a/arch/ppc64/kernel/mpic.c b/arch/powerpc/sysdev/mpic.c
index 5f5bc73754d9..105f05341a41 100644
--- a/arch/ppc64/kernel/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1,5 +1,5 @@
 /*
- *  arch/ppc64/kernel/mpic.c
+ *  arch/powerpc/kernel/mpic.c
  *
  *  Driver for interrupt controllers following the OpenPIC standard, the
  *  common implementation beeing IBM's MPIC. This driver also can deal
@@ -31,8 +31,8 @@
 #include <asm/pgtable.h>
 #include <asm/irq.h>
 #include <asm/machdep.h>
-
-#include "mpic.h"
+#include <asm/mpic.h>
+#include <asm/smp.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) printk(fmt)
@@ -44,6 +44,9 @@ static struct mpic *mpics;
 static struct mpic *mpic_primary;
 static DEFINE_SPINLOCK(mpic_lock);
 
+#ifdef CONFIG_PPC32     /* XXX for now */
+#define distribute_irqs CONFIG_IRQ_ALL_CPUS
+#endif
 
 /*
  * Register accessor functions
@@ -355,7 +358,7 @@ static void mpic_enable_irq(unsigned int irq)
         struct mpic *mpic = mpic_from_irq(irq);
         unsigned int src = irq - mpic->irq_offset;
 
-        DBG("%s: enable_irq: %d (src %d)\n", mpic->name, irq, src);
+        DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
 
         mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
                        mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & ~MPIC_VECPRI_MASK);
@@ -480,6 +483,7 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr,
         if (mpic == NULL)
                 return NULL;
         
+
         memset(mpic, 0, sizeof(struct mpic));
         mpic->name = name;
 
@@ -506,7 +510,7 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr,
         mpic->senses_count = senses_count;
 
         /* Map the global registers */
-        mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x2000);
+        mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000);
         mpic->tmregs = mpic->gregs + ((MPIC_TIMER_BASE - MPIC_GREG_BASE) >> 2);
         BUG_ON(mpic->gregs == NULL);
 
@@ -644,7 +648,6 @@ void __init mpic_init(struct mpic *mpic)
                         continue;
                 irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU;
                 irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi;
-                
 #endif /* CONFIG_SMP */
         }
 
@@ -700,7 +703,7 @@ void __init mpic_init(struct mpic *mpic)
                 /* init hw */
                 mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri);
                 mpic_irq_write(i, MPIC_IRQ_DESTINATION,
-                               1 << get_hard_smp_processor_id(boot_cpuid));
+                               1 << hard_smp_processor_id());
 
                 /* init linux descriptors */
                 if (i < mpic->irq_count) {
@@ -792,6 +795,21 @@ void mpic_setup_this_cpu(void)
 #endif /* CONFIG_SMP */
 }
 
+int mpic_cpu_get_priority(void)
+{
+        struct mpic *mpic = mpic_primary;
+
+        return mpic_cpu_read(MPIC_CPU_CURRENT_TASK_PRI);
+}
+
+void mpic_cpu_set_priority(int prio)
+{
+        struct mpic *mpic = mpic_primary;
+
+        prio &= MPIC_CPU_TASKPRI_MASK;
+        mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, prio);
+}
+
 /*
  * XXX: someone who knows mpic should check this.
  * do we need to eoi the ipi including for kexec cpu here (see xics comments)?
@@ -885,4 +903,25 @@ void mpic_request_ipis(void)
 
         printk("IPIs requested... \n");
 }
+
+void smp_mpic_message_pass(int target, int msg)
+{
+        /* make sure we're sending something that translates to an IPI */
+        if ((unsigned int)msg > 3) {
+                printk("SMP %d: smp_message_pass: unknown msg %d\n",
+                       smp_processor_id(), msg);
+                return;
+        }
+        switch (target) {
+        case MSG_ALL:
+                mpic_send_ipi(msg, 0xffffffff);
+                break;
+        case MSG_ALL_BUT_SELF:
+                mpic_send_ipi(msg, 0xffffffff & ~(1 << smp_processor_id()));
+                break;
+        default:
+                mpic_send_ipi(msg, 1 << target);
+                break;
+        }
+}
 #endif /* CONFIG_SMP */
diff --git a/arch/ppc64/kernel/u3_iommu.c b/arch/powerpc/sysdev/u3_iommu.c
index 41ea09cb9ac7..fba871a1bda5 100644
--- a/arch/ppc64/kernel/u3_iommu.c
+++ b/arch/powerpc/sysdev/u3_iommu.c
@@ -44,39 +44,11 @@
 #include <asm/abs_addr.h>
 #include <asm/cacheflush.h>
 #include <asm/lmb.h>
-
-#include "pci.h"
+#include <asm/dart.h>
+#include <asm/ppc-pci.h>
 
 extern int iommu_force_on;
 
-/* physical base of DART registers */
-#define DART_BASE        0xf8033000UL
-
-/* Offset from base to control register */
-#define DARTCNTL   0
-/* Offset from base to exception register */
-#define DARTEXCP   0x10
-/* Offset from base to TLB tag registers */
-#define DARTTAG    0x1000
-
-
-/* Control Register fields */
-
-/* base address of table (pfn) */
-#define DARTCNTL_BASE_MASK    0xfffff
-#define DARTCNTL_BASE_SHIFT   12
-
-#define DARTCNTL_FLUSHTLB     0x400
-#define DARTCNTL_ENABLE       0x200
-
-/* size of table in pages */
-#define DARTCNTL_SIZE_MASK    0x1ff
-#define DARTCNTL_SIZE_SHIFT   0
-
-/* DART table fields */
-#define DARTMAP_VALID   0x80000000
-#define DARTMAP_RPNMASK 0x00ffffff
-
 /* Physical base address and size of the DART table */
 unsigned long dart_tablebase; /* exported to htab_initialize */
 static unsigned long dart_tablesize;
@@ -152,18 +124,21 @@ static void dart_build(struct iommu_table *tbl, long index,
 
         DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr);
 
+        index <<= DART_PAGE_FACTOR;
+        npages <<= DART_PAGE_FACTOR;
+
         dp = ((unsigned int*)tbl->it_base) + index;
         
         /* On U3, all memory is contigous, so we can move this
          * out of the loop.
          */
         while (npages--) {
-                rpn = virt_to_abs(uaddr) >> PAGE_SHIFT;
+                rpn = virt_to_abs(uaddr) >> DART_PAGE_SHIFT;
 
                 *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK);
 
                 rpn++;
-                uaddr += PAGE_SIZE;
+                uaddr += DART_PAGE_SIZE;
         }
 
         dart_dirty = 1;
@@ -181,6 +156,9 @@ static void dart_free(struct iommu_table *tbl, long index, long npages)
 
         DBG("dart: free at: %lx, %lx\n", index, npages);
 
+        index <<= DART_PAGE_FACTOR;
+        npages <<= DART_PAGE_FACTOR;
+
         dp  = ((unsigned int *)tbl->it_base) + index;
                 
         while (npages--)
@@ -209,10 +187,10 @@ static int dart_init(struct device_node *dart_node)
          * that to work around what looks like a problem with the HT bridge
          * prefetching into invalid pages and corrupting data
          */
-        tmp = lmb_alloc(PAGE_SIZE, PAGE_SIZE);
+        tmp = lmb_alloc(DART_PAGE_SIZE, DART_PAGE_SIZE);
         if (!tmp)
                 panic("U3-DART: Cannot allocate spare page!");
-        dart_emptyval = DARTMAP_VALID | ((tmp >> PAGE_SHIFT) & DARTMAP_RPNMASK);
+        dart_emptyval = DARTMAP_VALID | ((tmp >> DART_PAGE_SHIFT) & DARTMAP_RPNMASK);
 
         /* Map in DART registers. FIXME: Use device node to get base address */
         dart = ioremap(DART_BASE, 0x7000);
@@ -223,8 +201,8 @@ static int dart_init(struct device_node *dart_node)
          * table size and enable bit
          */
         regword = DARTCNTL_ENABLE | 
-                ((dart_tablebase >> PAGE_SHIFT) << DARTCNTL_BASE_SHIFT) |
-                (((dart_tablesize >> PAGE_SHIFT) & DARTCNTL_SIZE_MASK)
+                ((dart_tablebase >> DART_PAGE_SHIFT) << DARTCNTL_BASE_SHIFT) |
+                (((dart_tablesize >> DART_PAGE_SHIFT) & DARTCNTL_SIZE_MASK)
                                  << DARTCNTL_SIZE_SHIFT);
         dart_vbase = ioremap(virt_to_abs(dart_tablebase), dart_tablesize);
 
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
new file mode 100644
index 000000000000..79a784f0e7a9
--- /dev/null
+++ b/arch/powerpc/xmon/Makefile
@@ -0,0 +1,11 @@
+# Makefile for xmon
+
+ifdef CONFIG_PPC64
+EXTRA_CFLAGS += -mno-minimal-toc
+endif
+
+obj-$(CONFIG_8xx)       += start_8xx.o
+obj-$(CONFIG_6xx)       += start_32.o
+obj-$(CONFIG_4xx)       += start_32.o
+obj-$(CONFIG_PPC64)     += start_64.o
+obj-y                   += xmon.o ppc-dis.o ppc-opc.o subr_prf.o setjmp.o
diff --git a/arch/ppc64/xmon/ansidecl.h b/arch/powerpc/xmon/ansidecl.h
index c9b9f0929e9e..c9b9f0929e9e 100644
--- a/arch/ppc64/xmon/ansidecl.h
+++ b/arch/powerpc/xmon/ansidecl.h
diff --git a/arch/ppc64/xmon/nonstdio.h b/arch/powerpc/xmon/nonstdio.h
index 84211a21c6f4..84211a21c6f4 100644
--- a/arch/ppc64/xmon/nonstdio.h
+++ b/arch/powerpc/xmon/nonstdio.h
diff --git a/arch/ppc64/xmon/ppc-dis.c b/arch/powerpc/xmon/ppc-dis.c
index ac0a9d2427e0..ac0a9d2427e0 100644
--- a/arch/ppc64/xmon/ppc-dis.c
+++ b/arch/powerpc/xmon/ppc-dis.c
diff --git a/arch/ppc64/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c
index 5ee8fc32f824..5ee8fc32f824 100644
--- a/arch/ppc64/xmon/ppc-opc.c
+++ b/arch/powerpc/xmon/ppc-opc.c
diff --git a/arch/ppc64/xmon/ppc.h b/arch/powerpc/xmon/ppc.h
index 342237e8dd69..342237e8dd69 100644
--- a/arch/ppc64/xmon/ppc.h
+++ b/arch/powerpc/xmon/ppc.h
diff --git a/arch/powerpc/xmon/setjmp.S b/arch/powerpc/xmon/setjmp.S
new file mode 100644
index 000000000000..f8e40dfd2bff
--- /dev/null
+++ b/arch/powerpc/xmon/setjmp.S
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 1996 Paul Mackerras.
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ *
+ * NOTE: assert(sizeof(buf) > 23 * sizeof(long))
+ */
+#include <asm/processor.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+_GLOBAL(xmon_setjmp)
+        mflr    r0
+        STL     r0,0(r3)
+        STL     r1,SZL(r3)
+        STL     r2,2*SZL(r3)
+        mfcr    r0
+        STL     r0,3*SZL(r3)
+        STL     r13,4*SZL(r3)
+        STL     r14,5*SZL(r3)
+        STL     r15,6*SZL(r3)
+        STL     r16,7*SZL(r3)
+        STL     r17,8*SZL(r3)
+        STL     r18,9*SZL(r3)
+        STL     r19,10*SZL(r3)
+        STL     r20,11*SZL(r3)
+        STL     r21,12*SZL(r3)
+        STL     r22,13*SZL(r3)
+        STL     r23,14*SZL(r3)
+        STL     r24,15*SZL(r3)
+        STL     r25,16*SZL(r3)
+        STL     r26,17*SZL(r3)
+        STL     r27,18*SZL(r3)
+        STL     r28,19*SZL(r3)
+        STL     r29,20*SZL(r3)
+        STL     r30,21*SZL(r3)
+        STL     r31,22*SZL(r3)
+        li      r3,0
+        blr
+
+_GLOBAL(xmon_longjmp)
+        CMPI    r4,0
+        bne     1f
+        li      r4,1
+1:      LDL     r13,4*SZL(r3)
+        LDL     r14,5*SZL(r3)
+        LDL     r15,6*SZL(r3)
+        LDL     r16,7*SZL(r3)
+        LDL     r17,8*SZL(r3)
+        LDL     r18,9*SZL(r3)
+        LDL     r19,10*SZL(r3)
+        LDL     r20,11*SZL(r3)
+        LDL     r21,12*SZL(r3)
+        LDL     r22,13*SZL(r3)
+        LDL     r23,14*SZL(r3)
+        LDL     r24,15*SZL(r3)
+        LDL     r25,16*SZL(r3)
+        LDL     r26,17*SZL(r3)
+        LDL     r27,18*SZL(r3)
+        LDL     r28,19*SZL(r3)
+        LDL     r29,20*SZL(r3)
+        LDL     r30,21*SZL(r3)
+        LDL     r31,22*SZL(r3)
+        LDL     r0,3*SZL(r3)
+        mtcrf   0x38,r0
+        LDL     r0,0(r3)
+        LDL     r1,SZL(r3)
+        LDL     r2,2*SZL(r3)
+        mtlr    r0
+        mr      r3,r4
+        blr
+
+/*
+ * Grab the register values as they are now.
+ * This won't do a particularily good job because we really
+ * want our caller's caller's registers, and our caller has
+ * already executed its prologue.
+ * ToDo: We could reach back into the caller's save area to do
+ * a better job of representing the caller's state (note that
+ * that will be different for 32-bit and 64-bit, because of the
+ * different ABIs, though).
+ */
+_GLOBAL(xmon_save_regs)
+        STL     r0,0*SZL(r3)
+        STL     r2,2*SZL(r3)
+        STL     r3,3*SZL(r3)
+        STL     r4,4*SZL(r3)
+        STL     r5,5*SZL(r3)
+        STL     r6,6*SZL(r3)
+        STL     r7,7*SZL(r3)
+        STL     r8,8*SZL(r3)
+        STL     r9,9*SZL(r3)
+        STL     r10,10*SZL(r3)
+        STL     r11,11*SZL(r3)
+        STL     r12,12*SZL(r3)
+        STL     r13,13*SZL(r3)
+        STL     r14,14*SZL(r3)
+        STL     r15,15*SZL(r3)
+        STL     r16,16*SZL(r3)
+        STL     r17,17*SZL(r3)
+        STL     r18,18*SZL(r3)
+        STL     r19,19*SZL(r3)
+        STL     r20,20*SZL(r3)
+        STL     r21,21*SZL(r3)
+        STL     r22,22*SZL(r3)
+        STL     r23,23*SZL(r3)
+        STL     r24,24*SZL(r3)
+        STL     r25,25*SZL(r3)
+        STL     r26,26*SZL(r3)
+        STL     r27,27*SZL(r3)
+        STL     r28,28*SZL(r3)
+        STL     r29,29*SZL(r3)
+        STL     r30,30*SZL(r3)
+        STL     r31,31*SZL(r3)
+        /* go up one stack frame for SP */
+        LDL     r4,0(r1)
+        STL     r4,1*SZL(r3)
+        /* get caller's LR */
+        LDL     r0,LRSAVE(r4)
+        STL     r0,_NIP-STACK_FRAME_OVERHEAD(r3)
+        STL     r0,_LINK-STACK_FRAME_OVERHEAD(r3)
+        mfmsr   r0
+        STL     r0,_MSR-STACK_FRAME_OVERHEAD(r3)
+        mfctr   r0
+        STL     r0,_CTR-STACK_FRAME_OVERHEAD(r3)
+        mfxer   r0
+        STL     r0,_XER-STACK_FRAME_OVERHEAD(r3)
+        mfcr    r0
+        STL     r0,_CCR-STACK_FRAME_OVERHEAD(r3)
+        li      r0,0
+        STL     r0,_TRAP-STACK_FRAME_OVERHEAD(r3)
+        blr
diff --git a/arch/powerpc/xmon/start_32.c b/arch/powerpc/xmon/start_32.c
new file mode 100644
index 000000000000..69b658c0f760
--- /dev/null
+++ b/arch/powerpc/xmon/start_32.c
@@ -0,0 +1,624 @@
+/*
+ * Copyright (C) 1996 Paul Mackerras.
+ */
+#include <linux/config.h>
+#include <linux/string.h>
+#include <asm/machdep.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <linux/adb.h>
+#include <linux/pmu.h>
+#include <linux/cuda.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/sysrq.h>
+#include <linux/bitops.h>
+#include <asm/xmon.h>
+#include <asm/prom.h>
+#include <asm/bootx.h>
+#include <asm/machdep.h>
+#include <asm/errno.h>
+#include <asm/pmac_feature.h>
+#include <asm/processor.h>
+#include <asm/delay.h>
+#include <asm/btext.h>
+
+static volatile unsigned char __iomem *sccc, *sccd;
+unsigned int TXRDY, RXRDY, DLAB;
+static int xmon_expect(const char *str, unsigned int timeout);
+
+static int use_serial;
+static int use_screen;
+static int via_modem;
+static int xmon_use_sccb;
+static struct device_node *channel_node;
+
+#define TB_SPEED        25000000
+
+static inline unsigned int readtb(void)
+{
+        unsigned int ret;
+
+        asm volatile("mftb %0" : "=r" (ret) :);
+        return ret;
+}
+
+void buf_access(void)
+{
+        if (DLAB)
+                sccd[3] &= ~DLAB;       /* reset DLAB */
+}
+
+extern int adb_init(void);
+
+#ifdef CONFIG_PPC_CHRP
+/*
+ * This looks in the "ranges" property for the primary PCI host bridge
+ * to find the physical address of the start of PCI/ISA I/O space.
+ * It is basically a cut-down version of pci_process_bridge_OF_ranges.
+ */
+static unsigned long chrp_find_phys_io_base(void)
+{
+        struct device_node *node;
+        unsigned int *ranges;
+        unsigned long base = CHRP_ISA_IO_BASE;
+        int rlen = 0;
+        int np;
+
+        node = find_devices("isa");
+        if (node != NULL) {
+                node = node->parent;
+                if (node == NULL || node->type == NULL
+                    || strcmp(node->type, "pci") != 0)
+                        node = NULL;
+        }
+        if (node == NULL)
+                node = find_devices("pci");
+        if (node == NULL)
+                return base;
+
+        ranges = (unsigned int *) get_property(node, "ranges", &rlen);
+        np = prom_n_addr_cells(node) + 5;
+        while ((rlen -= np * sizeof(unsigned int)) >= 0) {
+                if ((ranges[0] >> 24) == 1 && ranges[2] == 0) {
+                        /* I/O space starting at 0, grab the phys base */
+                        base = ranges[np - 3];
+                        break;
+                }
+                ranges += np;
+        }
+        return base;
+}
+#endif /* CONFIG_PPC_CHRP */
+
+#ifdef CONFIG_MAGIC_SYSRQ
+static void sysrq_handle_xmon(int key, struct pt_regs *regs,
+                              struct tty_struct *tty)
+{
+        xmon(regs);
+}
+
+static struct sysrq_key_op sysrq_xmon_op =
+{
+        .handler =      sysrq_handle_xmon,
+        .help_msg =     "Xmon",
+        .action_msg =   "Entering xmon",
+};
+#endif
+
+void
+xmon_map_scc(void)
+{
+#ifdef CONFIG_PPC_MULTIPLATFORM
+        volatile unsigned char __iomem *base;
+
+        if (_machine == _MACH_Pmac) {
+                struct device_node *np;
+                unsigned long addr;
+#ifdef CONFIG_BOOTX_TEXT
+                if (!use_screen && !use_serial
+                    && !machine_is_compatible("iMac")) {
+                        /* see if there is a keyboard in the device tree
+                           with a parent of type "adb" */
+                        for (np = find_devices("keyboard"); np; np = np->next)
+                                if (np->parent && np->parent->type
+                                    && strcmp(np->parent->type, "adb") == 0)
+                                        break;
+
+                        /* needs to be hacked if xmon_printk is to be used
+                           from within find_via_pmu() */
+#ifdef CONFIG_ADB_PMU
+                        if (np != NULL && boot_text_mapped && find_via_pmu())
+                                use_screen = 1;
+#endif
+#ifdef CONFIG_ADB_CUDA
+                        if (np != NULL && boot_text_mapped && find_via_cuda())
+                                use_screen = 1;
+#endif
+                }
+                if (!use_screen && (np = find_devices("escc")) != NULL) {
+                        /*
+                         * look for the device node for the serial port
+                         * we're using and see if it says it has a modem
+                         */
+                        char *name = xmon_use_sccb? "ch-b": "ch-a";
+                        char *slots;
+                        int l;
+
+                        np = np->child;
+                        while (np != NULL && strcmp(np->name, name) != 0)
+                                np = np->sibling;
+                        if (np != NULL) {
+                                /* XXX should parse this properly */
+                                channel_node = np;
+                                slots = get_property(np, "slot-names", &l);
+                                if (slots != NULL && l >= 10
+                                    && strcmp(slots+4, "Modem") == 0)
+                                        via_modem = 1;
+                        }
+                }
+                btext_drawstring("xmon uses ");
+                if (use_screen)
+                        btext_drawstring("screen and keyboard\n");
+                else {
+                        if (via_modem)
+                                btext_drawstring("modem on ");
+                        btext_drawstring(xmon_use_sccb? "printer": "modem");
+                        btext_drawstring(" port\n");
+                }
+
+#endif /* CONFIG_BOOTX_TEXT */
+
+#ifdef CHRP_ESCC
+                addr = 0xc1013020;
+#else
+                addr = 0xf3013020;
+#endif
+                TXRDY = 4;
+                RXRDY = 1;
+        
+                np = find_devices("mac-io");
+                if (np && np->n_addrs)
+                        addr = np->addrs[0].address + 0x13020;
+                base = (volatile unsigned char *) ioremap(addr & PAGE_MASK, PAGE_SIZE);
+                sccc = base + (addr & ~PAGE_MASK);
+                sccd = sccc + 0x10;
+
+        } else {
+                base = (volatile unsigned char *) isa_io_base;
+
+#ifdef CONFIG_PPC_CHRP
+                if (_machine == _MACH_chrp)
+                        base = (volatile unsigned char __iomem *)
+                                ioremap(chrp_find_phys_io_base(), 0x1000);
+#endif
+
+                sccc = base + 0x3fd;
+                sccd = base + 0x3f8;
+                if (xmon_use_sccb) {
+                        sccc -= 0x100;
+                        sccd -= 0x100;
+                }
+                TXRDY = 0x20;
+                RXRDY = 1;
+                DLAB = 0x80;
+        }
+#elif defined(CONFIG_GEMINI)
+        /* should already be mapped by the kernel boot */
+        sccc = (volatile unsigned char __iomem *) 0xffeffb0d;
+        sccd = (volatile unsigned char __iomem *) 0xffeffb08;
+        TXRDY = 0x20;
+        RXRDY = 1;
+        DLAB = 0x80;
+#elif defined(CONFIG_405GP)
+        sccc = (volatile unsigned char __iomem *)0xef600305;
+        sccd = (volatile unsigned char __iomem *)0xef600300;
+        TXRDY = 0x20;
+        RXRDY = 1;
+        DLAB = 0x80;
+#endif /* platform */
+
+        register_sysrq_key('x', &sysrq_xmon_op);
+}
+
+static int scc_initialized = 0;
+
+void xmon_init_scc(void);
+extern void cuda_poll(void);
+
+static inline void do_poll_adb(void)
+{
+#ifdef CONFIG_ADB_PMU
+        if (sys_ctrler == SYS_CTRLER_PMU)
+                pmu_poll_adb();
+#endif /* CONFIG_ADB_PMU */
+#ifdef CONFIG_ADB_CUDA
+        if (sys_ctrler == SYS_CTRLER_CUDA)
+                cuda_poll();
+#endif /* CONFIG_ADB_CUDA */
+}
+
+int
+xmon_write(void *handle, void *ptr, int nb)
+{
+        char *p = ptr;
+        int i, c, ct;
+
+#ifdef CONFIG_SMP
+        static unsigned long xmon_write_lock;
+        int lock_wait = 1000000;
+        int locked;
+
+        while ((locked = test_and_set_bit(0, &xmon_write_lock)) != 0)
+                if (--lock_wait == 0)
+                        break;
+#endif
+
+#ifdef CONFIG_BOOTX_TEXT
+        if (use_screen) {
+                /* write it on the screen */
+                for (i = 0; i < nb; ++i)
+                        btext_drawchar(*p++);
+                goto out;
+        }
+#endif
+        if (!scc_initialized)
+                xmon_init_scc();
+        ct = 0;
+        for (i = 0; i < nb; ++i) {
+                while ((*sccc & TXRDY) == 0)
+                        do_poll_adb();
+                c = p[i];
+                if (c == '\n' && !ct) {
+                        c = '\r';
+                        ct = 1;
+                        --i;
+                } else {
+                        ct = 0;
+                }
+                buf_access();
+                *sccd = c;
+                eieio();
+        }
+
+ out:
+#ifdef CONFIG_SMP
+        if (!locked)
+                clear_bit(0, &xmon_write_lock);
+#endif
+        return nb;
+}
+
+int xmon_wants_key;
+int xmon_adb_keycode;
+
+#ifdef CONFIG_BOOTX_TEXT
+static int xmon_adb_shiftstate;
+
+static unsigned char xmon_keytab[128] =
+        "asdfhgzxcv\000bqwer"                           /* 0x00 - 0x0f */
+        "yt123465=97-80]o"                              /* 0x10 - 0x1f */
+        "u[ip\rlj'k;\\,/nm."                            /* 0x20 - 0x2f */
+        "\t `\177\0\033\0\0\0\0\0\0\0\0\0\0"            /* 0x30 - 0x3f */
+        "\0.\0*\0+\0\0\0\0\0/\r\0-\0"                   /* 0x40 - 0x4f */
+        "\0\0000123456789\0\0\0";                       /* 0x50 - 0x5f */
+
+static unsigned char xmon_shift_keytab[128] =
+        "ASDFHGZXCV\000BQWER"                           /* 0x00 - 0x0f */
+        "YT!@#$^%+(&_*)}O"                              /* 0x10 - 0x1f */
+        "U{IP\rLJ\"K:|<?NM>"                            /* 0x20 - 0x2f */
+        "\t ~\177\0\033\0\0\0\0\0\0\0\0\0\0"            /* 0x30 - 0x3f */
+        "\0.\0*\0+\0\0\0\0\0/\r\0-\0"                   /* 0x40 - 0x4f */
+        "\0\0000123456789\0\0\0";                       /* 0x50 - 0x5f */
+
+static int
+xmon_get_adb_key(void)
+{
+        int k, t, on;
+
+        xmon_wants_key = 1;
+        for (;;) {
+                xmon_adb_keycode = -1;
+                t = 0;
+                on = 0;
+                do {
+                        if (--t < 0) {
+                                on = 1 - on;
+                                btext_drawchar(on? 0xdb: 0x20);
+                                btext_drawchar('\b');
+                                t = 200000;
+                        }
+                        do_poll_adb();
+                } while (xmon_adb_keycode == -1);
+                k = xmon_adb_keycode;
+                if (on)
+                        btext_drawstring(" \b");
+
+                /* test for shift keys */
+                if ((k & 0x7f) == 0x38 || (k & 0x7f) == 0x7b) {
+                        xmon_adb_shiftstate = (k & 0x80) == 0;
+                        continue;
+                }
+                if (k >= 0x80)
+                        continue;       /* ignore up transitions */
+                k = (xmon_adb_shiftstate? xmon_shift_keytab: xmon_keytab)[k];
+                if (k != 0)
+                        break;
+        }
+        xmon_wants_key = 0;
+        return k;
+}
+#endif /* CONFIG_BOOTX_TEXT */
+
+int
+xmon_read(void *handle, void *ptr, int nb)
+{
+    char *p = ptr;
+    int i;
+
+#ifdef CONFIG_BOOTX_TEXT
+    if (use_screen) {
+        for (i = 0; i < nb; ++i)
+            *p++ = xmon_get_adb_key();
+        return i;
+    }
+#endif
+    if (!scc_initialized)
+        xmon_init_scc();
+    for (i = 0; i < nb; ++i) {
+        while ((*sccc & RXRDY) == 0)
+            do_poll_adb();
+        buf_access();
+        *p++ = *sccd;
+    }
+    return i;
+}
+
+int
+xmon_read_poll(void)
+{
+        if ((*sccc & RXRDY) == 0) {
+                do_poll_adb();
+                return -1;
+        }
+        buf_access();
+        return *sccd;
+}
+
+static unsigned char scc_inittab[] = {
+    13, 0,              /* set baud rate divisor */
+    12, 1,
+    14, 1,              /* baud rate gen enable, src=rtxc */
+    11, 0x50,           /* clocks = br gen */
+    5,  0xea,           /* tx 8 bits, assert DTR & RTS */
+    4,  0x46,           /* x16 clock, 1 stop */
+    3,  0xc1,           /* rx enable, 8 bits */
+};
+
+void
+xmon_init_scc(void)
+{
+        if ( _machine == _MACH_chrp )
+        {
+                sccd[3] = 0x83; eieio();        /* LCR = 8N1 + DLAB */
+                sccd[0] = 12; eieio();          /* DLL = 9600 baud */
+                sccd[1] = 0; eieio();
+                sccd[2] = 0; eieio();           /* FCR = 0 */
+                sccd[3] = 3; eieio();           /* LCR = 8N1 */
+                sccd[1] = 0; eieio();           /* IER = 0 */
+        }
+        else if ( _machine == _MACH_Pmac )
+        {
+                int i, x;
+
+                if (channel_node != 0)
+                        pmac_call_feature(
+                                PMAC_FTR_SCC_ENABLE,
+                                channel_node,
+                                PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
+                        printk(KERN_INFO "Serial port locked ON by debugger !\n");
+                if (via_modem && channel_node != 0) {
+                        unsigned int t0;
+
+                        pmac_call_feature(
+                                PMAC_FTR_MODEM_ENABLE,
+                                channel_node, 0, 1);
+                        printk(KERN_INFO "Modem powered up by debugger !\n");
+                        t0 = readtb();
+                        while (readtb() - t0 < 3*TB_SPEED)
+                                eieio();
+                }
+                /* use the B channel if requested */
+                if (xmon_use_sccb) {
+                        sccc = (volatile unsigned char *)
+                                ((unsigned long)sccc & ~0x20);
+                        sccd = sccc + 0x10;
+                }
+                for (i = 20000; i != 0; --i) {
+                        x = *sccc; eieio();
+                }
+                *sccc = 9; eieio();             /* reset A or B side */
+                *sccc = ((unsigned long)sccc & 0x20)? 0x80: 0x40; eieio();
+                for (i = 0; i < sizeof(scc_inittab); ++i) {
+                        *sccc = scc_inittab[i];
+                        eieio();
+                }
+        }
+        scc_initialized = 1;
+        if (via_modem) {
+                for (;;) {
+                        xmon_write(NULL, "ATE1V1\r", 7);
+                        if (xmon_expect("OK", 5)) {
+                                xmon_write(NULL, "ATA\r", 4);
+                                if (xmon_expect("CONNECT", 40))
+                                        break;
+                        }
+                        xmon_write(NULL, "+++", 3);
+                        xmon_expect("OK", 3);
+                }
+        }
+}
+
+void *xmon_stdin;
+void *xmon_stdout;
+void *xmon_stderr;
+
+int xmon_putc(int c, void *f)
+{
+    char ch = c;
+
+    if (c == '\n')
+        xmon_putc('\r', f);
+    return xmon_write(f, &ch, 1) == 1? c: -1;
+}
+
+int xmon_putchar(int c)
+{
+        return xmon_putc(c, xmon_stdout);
+}
+
+int xmon_fputs(char *str, void *f)
+{
+        int n = strlen(str);
+
+        return xmon_write(f, str, n) == n? 0: -1;
+}
+
+int
+xmon_readchar(void)
+{
+        char ch;
+
+        for (;;) {
+                switch (xmon_read(xmon_stdin, &ch, 1)) {
+                case 1:
+                        return ch;
+                case -1:
+                        xmon_printf("read(stdin) returned -1\r\n", 0, 0);
+                        return -1;
+                }
+        }
+}
+
+static char line[256];
+static char *lineptr;
+static int lineleft;
+
+int xmon_expect(const char *str, unsigned int timeout)
+{
+        int c;
+        unsigned int t0;
+
+        timeout *= TB_SPEED;
+        t0 = readtb();
+        do {
+                lineptr = line;
+                for (;;) {
+                        c = xmon_read_poll();
+                        if (c == -1) {
+                                if (readtb() - t0 > timeout)
+                                        return 0;
+                                continue;
+                        }
+                        if (c == '\n')
+                                break;
+                        if (c != '\r' && lineptr < &line[sizeof(line) - 1])
+                                *lineptr++ = c;
+                }
+                *lineptr = 0;
+        } while (strstr(line, str) == NULL);
+        return 1;
+}
+
+int
+xmon_getchar(void)
+{
+    int c;
+
+    if (lineleft == 0) {
+        lineptr = line;
+        for (;;) {
+            c = xmon_readchar();
+            if (c == -1 || c == 4)
+                break;
+            if (c == '\r' || c == '\n') {
+                *lineptr++ = '\n';
+                xmon_putchar('\n');
+                break;
+            }
+            switch (c) {
+            case 0177:
+            case '\b':
+                if (lineptr > line) {
+                    xmon_putchar('\b');
+                    xmon_putchar(' ');
+                    xmon_putchar('\b');
+                    --lineptr;
+                }
+                break;
+            case 'U' & 0x1F:
+                while (lineptr > line) {
+                    xmon_putchar('\b');
+                    xmon_putchar(' ');
+                    xmon_putchar('\b');
+                    --lineptr;
+                }
+                break;
+            default:
+                if (lineptr >= &line[sizeof(line) - 1])
+                    xmon_putchar('\a');
+                else {
+                    xmon_putchar(c);
+                    *lineptr++ = c;
+                }
+            }
+        }
+        lineleft = lineptr - line;
+        lineptr = line;
+    }
+    if (lineleft == 0)
+        return -1;
+    --lineleft;
+    return *lineptr++;
+}
+
+char *
+xmon_fgets(char *str, int nb, void *f)
+{
+    char *p;
+    int c;
+
+    for (p = str; p < str + nb - 1; ) {
+        c = xmon_getchar();
+        if (c == -1) {
+            if (p == str)
+                return NULL;
+            break;
+        }
+        *p++ = c;
+        if (c == '\n')
+            break;
+    }
+    *p = 0;
+    return str;
+}
+
+void
+xmon_enter(void)
+{
+#ifdef CONFIG_ADB_PMU
+        if (_machine == _MACH_Pmac) {
+                pmu_suspend();
+        }
+#endif
+}
+
+void
+xmon_leave(void)
+{
+#ifdef CONFIG_ADB_PMU
+        if (_machine == _MACH_Pmac) {
+                pmu_resume();
+        }
+#endif
+}
diff --git a/arch/ppc64/xmon/start.c b/arch/powerpc/xmon/start_64.c
index e50c158191e1..e50c158191e1 100644
--- a/arch/ppc64/xmon/start.c
+++ b/arch/powerpc/xmon/start_64.c
diff --git a/arch/powerpc/xmon/start_8xx.c b/arch/powerpc/xmon/start_8xx.c
new file mode 100644
index 000000000000..a48bd594cf61
--- /dev/null
+++ b/arch/powerpc/xmon/start_8xx.c
@@ -0,0 +1,287 @@
+/*
+ * Copyright (C) 1996 Paul Mackerras.
+ * Copyright (C) 2000 Dan Malek.
+ * Quick hack of Paul's code to make XMON work on 8xx processors.  Lots
+ * of assumptions, like the SMC1 is used, it has been initialized by the
+ * loader at some point, and we can just stuff and suck bytes.
+ * We rely upon the 8xx uart driver to support us, as the interface
+ * changes between boot up and operational phases of the kernel.
+ */
+#include <linux/string.h>
+#include <asm/machdep.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <linux/kernel.h>
+#include <asm/8xx_immap.h>
+#include <asm/mpc8xx.h>
+#include <asm/commproc.h>
+
+extern void xmon_printf(const char *fmt, ...);
+extern int xmon_8xx_write(char *str, int nb);
+extern int xmon_8xx_read_poll(void);
+extern int xmon_8xx_read_char(void);
+void prom_drawhex(uint);
+void prom_drawstring(const char *str);
+
+static int use_screen = 1; /* default */
+
+#define TB_SPEED        25000000
+
+static inline unsigned int readtb(void)
+{
+        unsigned int ret;
+
+        asm volatile("mftb %0" : "=r" (ret) :);
+        return ret;
+}
+
+void buf_access(void)
+{
+}
+
+void
+xmon_map_scc(void)
+{
+
+        cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
+        use_screen = 0;
+        
+        prom_drawstring("xmon uses serial port\n");
+}
+
+static int scc_initialized = 0;
+
+void xmon_init_scc(void);
+
+int
+xmon_write(void *handle, void *ptr, int nb)
+{
+        char *p = ptr;
+        int i, c, ct;
+
+        if (!scc_initialized)
+                xmon_init_scc();
+
+        return(xmon_8xx_write(ptr, nb));
+}
+
+int xmon_wants_key;
+
+int
+xmon_read(void *handle, void *ptr, int nb)
+{
+        char *p = ptr;
+        int i;
+
+        if (!scc_initialized)
+                xmon_init_scc();
+
+        for (i = 0; i < nb; ++i) {
+                *p++ = xmon_8xx_read_char();
+        }
+        return i;
+}
+
+int
+xmon_read_poll(void)
+{
+        return(xmon_8xx_read_poll());
+}
+
+void
+xmon_init_scc()
+{
+        scc_initialized = 1;
+}
+
+#if 0
+extern int (*prom_entry)(void *);
+
+int
+xmon_exit(void)
+{
+    struct prom_args {
+        char *service;
+    } args;
+
+    for (;;) {
+        args.service = "exit";
+        (*prom_entry)(&args);
+    }
+}
+#endif
+
+void *xmon_stdin;
+void *xmon_stdout;
+void *xmon_stderr;
+
+void
+xmon_init(void)
+{
+}
+
+int
+xmon_putc(int c, void *f)
+{
+    char ch = c;
+
+    if (c == '\n')
+        xmon_putc('\r', f);
+    return xmon_write(f, &ch, 1) == 1? c: -1;
+}
+
+int
+xmon_putchar(int c)
+{
+    return xmon_putc(c, xmon_stdout);
+}
+
+int
+xmon_fputs(char *str, void *f)
+{
+    int n = strlen(str);
+
+    return xmon_write(f, str, n) == n? 0: -1;
+}
+
+int
+xmon_readchar(void)
+{
+    char ch;
+
+    for (;;) {
+        switch (xmon_read(xmon_stdin, &ch, 1)) {
+        case 1:
+            return ch;
+        case -1:
+            xmon_printf("read(stdin) returned -1\r\n", 0, 0);
+            return -1;
+        }
+    }
+}
+
+static char line[256];
+static char *lineptr;
+static int lineleft;
+
+#if 0
+int xmon_expect(const char *str, unsigned int timeout)
+{
+        int c;
+        unsigned int t0;
+
+        timeout *= TB_SPEED;
+        t0 = readtb();
+        do {
+                lineptr = line;
+                for (;;) {
+                        c = xmon_read_poll();
+                        if (c == -1) {
+                                if (readtb() - t0 > timeout)
+                                        return 0;
+                                continue;
+                        }
+                        if (c == '\n')
+                                break;
+                        if (c != '\r' && lineptr < &line[sizeof(line) - 1])
+                                *lineptr++ = c;
+                }
+                *lineptr = 0;
+        } while (strstr(line, str) == NULL);
+        return 1;
+}
+#endif
+
+int
+xmon_getchar(void)
+{
+    int c;
+
+    if (lineleft == 0) {
+        lineptr = line;
+        for (;;) {
+            c = xmon_readchar();
+            if (c == -1 || c == 4)
+                break;
+            if (c == '\r' || c == '\n') {
+                *lineptr++ = '\n';
+                xmon_putchar('\n');
+                break;
+            }
+            switch (c) {
+            case 0177:
+            case '\b':
+                if (lineptr > line) {
+                    xmon_putchar('\b');
+                    xmon_putchar(' ');
+                    xmon_putchar('\b');
+                    --lineptr;
+                }
+                break;
+            case 'U' & 0x1F:
+                while (lineptr > line) {
+                    xmon_putchar('\b');
+                    xmon_putchar(' ');
+                    xmon_putchar('\b');
+                    --lineptr;
+                }
+                break;
+            default:
+                if (lineptr >= &line[sizeof(line) - 1])
+                    xmon_putchar('\a');
+                else {
+                    xmon_putchar(c);
+                    *lineptr++ = c;
+                }
+            }
+        }
+        lineleft = lineptr - line;
+        lineptr = line;
+    }
+    if (lineleft == 0)
+        return -1;
+    --lineleft;
+    return *lineptr++;
+}
+
+char *
+xmon_fgets(char *str, int nb, void *f)
+{
+    char *p;
+    int c;
+
+    for (p = str; p < str + nb - 1; ) {
+        c = xmon_getchar();
+        if (c == -1) {
+            if (p == str)
+                return 0;
+            break;
+        }
+        *p++ = c;
+        if (c == '\n')
+            break;
+    }
+    *p = 0;
+    return str;
+}
+
+void
+prom_drawhex(uint val)
+{
+        unsigned char buf[10];
+
+        int i;
+        for (i = 7;  i >= 0;  i--)
+        {
+                buf[i] = "0123456789abcdef"[val & 0x0f];
+                val >>= 4;
+        }
+        buf[8] = '\0';
+        xmon_fputs(buf, xmon_stdout);
+}
+
+void
+prom_drawstring(const char *str)
+{
+        xmon_fputs(str, xmon_stdout);
+}
diff --git a/arch/ppc64/xmon/subr_prf.c b/arch/powerpc/xmon/subr_prf.c
index 5242bd7d0959..b48738c6dd33 100644
--- a/arch/ppc64/xmon/subr_prf.c
+++ b/arch/powerpc/xmon/subr_prf.c
@@ -18,13 +18,13 @@
 
 #include <linux/kernel.h>
 #include <linux/string.h>
+#include <linux/module.h>
 #include <stdarg.h>
 #include "nonstdio.h"
 
 extern int xmon_write(void *, void *, int);
 
-void
-xmon_vfprintf(void *f, const char *fmt, va_list ap)
+void xmon_vfprintf(void *f, const char *fmt, va_list ap)
 {
         static char xmon_buf[2048];
         int n;
@@ -33,8 +33,7 @@ xmon_vfprintf(void *f, const char *fmt, va_list ap)
         xmon_write(f, xmon_buf, n);
 }
 
-void
-xmon_printf(const char *fmt, ...)
+void xmon_printf(const char *fmt, ...)
 {
         va_list ap;
 
@@ -42,9 +41,9 @@ xmon_printf(const char *fmt, ...)
         xmon_vfprintf(stdout, fmt, ap);
         va_end(ap);
 }
+EXPORT_SYMBOL(xmon_printf);
 
-void
-xmon_fprintf(void *f, const char *fmt, ...)
+void xmon_fprintf(void *f, const char *fmt, ...)
 {
         va_list ap;
 
diff --git a/arch/ppc64/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 74e63a886a69..1124f1146202 100644
--- a/arch/ppc64/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -17,25 +17,31 @@
 #include <linux/delay.h>
 #include <linux/kallsyms.h>
 #include <linux/cpumask.h>
+#include <linux/module.h>
 
 #include <asm/ptrace.h>
 #include <asm/string.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
+#include <asm/xmon.h>
+#ifdef CONFIG_PMAC_BACKLIGHT
+#include <asm/backlight.h>
+#endif
 #include <asm/processor.h>
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
 #include <asm/mmu_context.h>
-#include <asm/paca.h>
-#include <asm/ppcdebug.h>
 #include <asm/cputable.h>
 #include <asm/rtas.h>
 #include <asm/sstep.h>
 #include <asm/bug.h>
+
+#ifdef CONFIG_PPC64
 #include <asm/hvcall.h>
+#include <asm/paca.h>
+#endif
 
 #include "nonstdio.h"
-#include "privinst.h"
 
 #define scanhex xmon_scanhex
 #define skipbl  xmon_skipbl
@@ -58,7 +64,7 @@ static unsigned long ncsum = 4096;
 static int termch;
 static char tmpstr[128];
 
-#define JMP_BUF_LEN     (184/sizeof(long))
+#define JMP_BUF_LEN     23
 static long bus_error_jmp[JMP_BUF_LEN];
 static int catch_memory_errors;
 static long *xmon_fault_jmp[NR_CPUS];
@@ -130,23 +136,36 @@ static void cacheflush(void);
 static int  cpu_cmd(void);
 static void csum(void);
 static void bootcmds(void);
+static void proccall(void);
 void dump_segments(void);
 static void symbol_lookup(void);
 static void xmon_print_symbol(unsigned long address, const char *mid,
                               const char *after);
 static const char *getvecname(unsigned long vec);
 
-static void debug_trace(void);
-
 extern int print_insn_powerpc(unsigned long, unsigned long, int);
 extern void printf(const char *fmt, ...);
 extern void xmon_vfprintf(void *f, const char *fmt, va_list ap);
 extern int xmon_putc(int c, void *f);
 extern int putchar(int ch);
+
+extern void xmon_enter(void);
+extern void xmon_leave(void);
+
 extern int xmon_read_poll(void);
-extern int setjmp(long *);
-extern void longjmp(long *, int);
-extern unsigned long _ASR;
+extern long setjmp(long *);
+extern void longjmp(long *, long);
+extern void xmon_save_regs(struct pt_regs *);
+
+#ifdef CONFIG_PPC64
+#define REG             "%.16lx"
+#define REGS_PER_LINE   4
+#define LAST_VOLATILE   13
+#else
+#define REG             "%.8lx"
+#define REGS_PER_LINE   8
+#define LAST_VOLATILE   12
+#endif
 
 #define GETWORD(v)      (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
 
@@ -186,47 +205,45 @@ Commands:\n\
   ml    locate a block of memory\n\
   mz    zero a block of memory\n\
   mi    show information about memory allocation\n\
-  p     show the task list\n\
+  p     call a procedure\n\
   r     print registers\n\
   s     single step\n\
   S     print special registers\n\
   t     print backtrace\n\
-  T     Enable/Disable PPCDBG flags\n\
   x     exit monitor and recover\n\
-  X     exit monitor and dont recover\n\
-  u     dump segment table or SLB\n\
-  ?     help\n"
-  "\
-  zr    reboot\n\
+  X     exit monitor and dont recover\n"
+#ifdef CONFIG_PPC64
+"  u    dump segment table or SLB\n"
+#endif
+#ifdef CONFIG_PPC_STD_MMU_32
+"  u    dump segment registers\n"
+#endif
+"  ?    help\n"
+"  zr   reboot\n\
   zh    halt\n"
 ;
 
 static struct pt_regs *xmon_regs;
 
-extern inline void sync(void)
+static inline void sync(void)
 {
         asm volatile("sync; isync");
 }
 
-/* (Ref: 64-bit PowerPC ELF ABI Spplement; Ian Lance Taylor, Zembu Labs).
- A PPC stack frame looks like this:
-
- High Address
-    Back Chain
-    FP reg save area
-    GP reg save area
-    Local var space
-    Parameter save area         (SP+48)
-    TOC save area               (SP+40)
-    link editor doubleword      (SP+32)
-    compiler doubleword         (SP+24)
-    LR save                     (SP+16)
-    CR save                     (SP+8)
-    Back Chain                  (SP+0)
-
- Note that the LR (ret addr) may not be saved in the current frame if
- no functions have been called from the current function.
- */
+static inline void store_inst(void *p)
+{
+        asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
+}
+
+static inline void cflush(void *p)
+{
+        asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
+}
+
+static inline void cinval(void *p)
+{
+        asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
+}
 
 /*
  * Disable surveillance (the service processor watchdog function)
@@ -310,8 +327,8 @@ int xmon_core(struct pt_regs *regs, int fromipi)
         unsigned long timeout;
 #endif
 
-        msr = get_msr();
-        set_msrd(msr & ~MSR_EE);        /* disable interrupts */
+        msr = mfmsr();
+        mtmsr(msr & ~MSR_EE);   /* disable interrupts */
 
         bp = in_breakpoint_table(regs->nip, &offset);
         if (bp != NULL) {
@@ -487,7 +504,7 @@ int xmon_core(struct pt_regs *regs, int fromipi)
 
         insert_cpu_bpts();
 
-        set_msrd(msr);          /* restore interrupt enable */
+        mtmsr(msr);             /* restore interrupt enable */
 
         return cmd != 'X';
 }
@@ -497,56 +514,23 @@ int xmon(struct pt_regs *excp)
         struct pt_regs regs;
 
         if (excp == NULL) {
-                /* Ok, grab regs as they are now.
-                 This won't do a particularily good job because the
-                 prologue has already been executed.
-                 ToDo: We could reach back into the callers save
-                 area to do a better job of representing the
-                 caller's state.
-                 */
-                asm volatile ("std      0,0(%0)\n\
-                        std     1,8(%0)\n\
-                        std     2,16(%0)\n\
-                        std     3,24(%0)\n\
-                        std     4,32(%0)\n\
-                        std     5,40(%0)\n\
-                        std     6,48(%0)\n\
-                        std     7,56(%0)\n\
-                        std     8,64(%0)\n\
-                        std     9,72(%0)\n\
-                        std     10,80(%0)\n\
-                        std     11,88(%0)\n\
-                        std     12,96(%0)\n\
-                        std     13,104(%0)\n\
-                        std     14,112(%0)\n\
-                        std     15,120(%0)\n\
-                        std     16,128(%0)\n\
-                        std     17,136(%0)\n\
-                        std     18,144(%0)\n\
-                        std     19,152(%0)\n\
-                        std     20,160(%0)\n\
-                        std     21,168(%0)\n\
-                        std     22,176(%0)\n\
-                        std     23,184(%0)\n\
-                        std     24,192(%0)\n\
-                        std     25,200(%0)\n\
-                        std     26,208(%0)\n\
-                        std     27,216(%0)\n\
-                        std     28,224(%0)\n\
-                        std     29,232(%0)\n\
-                        std     30,240(%0)\n\
-                        std     31,248(%0)" : : "b" (&regs));
-
-                regs.nip = regs.link = ((unsigned long *)(regs.gpr[1]))[2];
-                regs.msr = get_msr();
-                regs.ctr = get_ctr();
-                regs.xer = get_xer();
-                regs.ccr = get_cr();
-                regs.trap = 0;
+                xmon_save_regs(&regs);
                 excp = &regs;
         }
         return xmon_core(excp, 0);
 }
+EXPORT_SYMBOL(xmon);
+
+irqreturn_t
+xmon_irq(int irq, void *d, struct pt_regs *regs)
+{
+        unsigned long flags;
+        local_irq_save(flags);
+        printf("Keyboard interrupt\n");
+        xmon(regs);
+        local_irq_restore(flags);
+        return IRQ_HANDLED;
+}
 
 int xmon_bpt(struct pt_regs *regs)
 {
@@ -718,7 +702,7 @@ static void insert_cpu_bpts(void)
         if (dabr.enabled)
                 set_dabr(dabr.address | (dabr.enabled & 7));
         if (iabr && cpu_has_feature(CPU_FTR_IABR))
-                set_iabr(iabr->address
+                mtspr(SPRN_IABR, iabr->address
                          | (iabr->enabled & (BP_IABR|BP_IABR_TE)));
 }
 
@@ -746,7 +730,7 @@ static void remove_cpu_bpts(void)
 {
         set_dabr(0);
         if (cpu_has_feature(CPU_FTR_IABR))
-                set_iabr(0);
+                mtspr(SPRN_IABR, 0);
 }
 
 /* Command interpreting routine */
@@ -830,9 +814,6 @@ cmds(struct pt_regs *excp)
                 case '?':
                         printf(help_string);
                         break;
-                case 'p':
-                        show_state();
-                        break;
                 case 'b':
                         bpt_cmds();
                         break;
@@ -846,12 +827,14 @@ cmds(struct pt_regs *excp)
                 case 'z':
                         bootcmds();
                         break;
-                case 'T':
-                        debug_trace();
+                case 'p':
+                        proccall();
                         break;
+#ifdef CONFIG_PPC_STD_MMU
                 case 'u':
                         dump_segments();
                         break;
+#endif
                 default:
                         printf("Unrecognized command: ");
                         do {
@@ -1070,6 +1053,7 @@ bpt_cmds(void)
 
         cmd = inchar();
         switch (cmd) {
+#ifndef CONFIG_8xx
         case 'd':       /* bd - hardware data breakpoint */
                 mode = 7;
                 cmd = inchar();
@@ -1111,6 +1095,7 @@ bpt_cmds(void)
                         iabr = bp;
                 }
                 break;
+#endif
 
         case 'c':
                 if (!scanhex(&a)) {
@@ -1152,7 +1137,7 @@ bpt_cmds(void)
                         /* print all breakpoints */
                         printf("   type            address\n");
                         if (dabr.enabled) {
-                                printf("   data   %.16lx  [", dabr.address);
+                                printf("   data   "REG"  [", dabr.address);
                                 if (dabr.enabled & 1)
                                         printf("r");
                                 if (dabr.enabled & 2)
@@ -1231,6 +1216,18 @@ static void get_function_bounds(unsigned long pc, unsigned long *startp,
 
 static int xmon_depth_to_print = 64;
 
+#ifdef CONFIG_PPC64
+#define LRSAVE_OFFSET           0x10
+#define REG_FRAME_MARKER        0x7265677368657265ul    /* "regshere" */
+#define MARKER_OFFSET           0x60
+#define REGS_OFFSET             0x70
+#else
+#define LRSAVE_OFFSET           4
+#define REG_FRAME_MARKER        0x72656773
+#define MARKER_OFFSET           8
+#define REGS_OFFSET             16
+#endif
+
 static void xmon_show_stack(unsigned long sp, unsigned long lr,
                             unsigned long pc)
 {
@@ -1247,7 +1244,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr,
                         break;
                 }
 
-                if (!mread(sp + 16, &ip, sizeof(unsigned long))
+                if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
                     || !mread(sp, &newsp, sizeof(unsigned long))) {
                         printf("Couldn't read stack frame at %lx\n", sp);
                         break;
@@ -1266,7 +1263,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr,
                         get_function_bounds(pc, &fnstart, &fnend);
                         nextip = 0;
                         if (newsp > sp)
-                                mread(newsp + 16, &nextip,
+                                mread(newsp + LRSAVE_OFFSET, &nextip,
                                       sizeof(unsigned long));
                         if (lr == ip) {
                                 if (lr < PAGE_OFFSET
@@ -1280,24 +1277,24 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr,
                                 xmon_print_symbol(lr, " ", "\n");
                         }
                         if (printip) {
-                                printf("[%.16lx] ", sp);
+                                printf("["REG"] ", sp);
                                 xmon_print_symbol(ip, " ", " (unreliable)\n");
                         }
                         pc = lr = 0;
 
                 } else {
-                        printf("[%.16lx] ", sp);
+                        printf("["REG"] ", sp);
                         xmon_print_symbol(ip, " ", "\n");
                 }
 
                 /* Look for "regshere" marker to see if this is
                    an exception frame. */
-                if (mread(sp + 0x60, &marker, sizeof(unsigned long))
-                    && marker == 0x7265677368657265ul) {
-                        if (mread(sp + 0x70, &regs, sizeof(regs))
+                if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
+                    && marker == REG_FRAME_MARKER) {
+                        if (mread(sp + REGS_OFFSET, &regs, sizeof(regs))
                             != sizeof(regs)) {
                                 printf("Couldn't read registers at %lx\n",
-                                       sp + 0x70);
+                                       sp + REGS_OFFSET);
                                 break;
                         }
                         printf("--- Exception: %lx %s at ", regs.trap,
@@ -1371,7 +1368,9 @@ void excprint(struct pt_regs *fp)
         }
 
         printf("  current = 0x%lx\n", current);
+#ifdef CONFIG_PPC64
         printf("  paca    = 0x%lx\n", get_paca());
+#endif
         if (current) {
                 printf("    pid   = %ld, comm = %s\n",
                        current->pid, current->comm);
@@ -1383,7 +1382,7 @@ void excprint(struct pt_regs *fp)
 
 void prregs(struct pt_regs *fp)
 {
-        int n;
+        int n, trap;
         unsigned long base;
         struct pt_regs regs;
 
@@ -1396,7 +1395,7 @@ void prregs(struct pt_regs *fp)
                         __delay(200);
                 } else {
                         catch_memory_errors = 0;
-                        printf("*** Error reading registers from %.16lx\n",
+                        printf("*** Error reading registers from "REG"\n",
                                base);
                         return;
                 }
@@ -1404,22 +1403,36 @@ void prregs(struct pt_regs *fp)
                 fp = &regs;
         }
 
+#ifdef CONFIG_PPC64
         if (FULL_REGS(fp)) {
                 for (n = 0; n < 16; ++n)
-                        printf("R%.2ld = %.16lx   R%.2ld = %.16lx\n",
+                        printf("R%.2ld = "REG"   R%.2ld = "REG"\n",
                                n, fp->gpr[n], n+16, fp->gpr[n+16]);
         } else {
                 for (n = 0; n < 7; ++n)
-                        printf("R%.2ld = %.16lx   R%.2ld = %.16lx\n",
+                        printf("R%.2ld = "REG"   R%.2ld = "REG"\n",
                                n, fp->gpr[n], n+7, fp->gpr[n+7]);
         }
+#else
+        for (n = 0; n < 32; ++n) {
+                printf("R%.2d = %.8x%s", n, fp->gpr[n],
+                       (n & 3) == 3? "\n": "   ");
+                if (n == 12 && !FULL_REGS(fp)) {
+                        printf("\n");
+                        break;
+                }
+        }
+#endif
         printf("pc  = ");
         xmon_print_symbol(fp->nip, " ", "\n");
         printf("lr  = ");
         xmon_print_symbol(fp->link, " ", "\n");
-        printf("msr = %.16lx   cr  = %.8lx\n", fp->msr, fp->ccr);
-        printf("ctr = %.16lx   xer = %.16lx   trap = %8lx\n",
+        printf("msr = "REG"   cr  = %.8lx\n", fp->msr, fp->ccr);
+        printf("ctr = "REG"   xer = "REG"   trap = %4lx\n",
                fp->ctr, fp->xer, fp->trap);
+        trap = TRAP(fp);
+        if (trap == 0x300 || trap == 0x380 || trap == 0x600)
+                printf("dar = "REG"   dsisr = %.8lx\n", fp->dar, fp->dsisr);
 }
 
 void cacheflush(void)
@@ -1519,8 +1532,7 @@ static unsigned long regno;
 extern char exc_prolog;
 extern char dec_exc;
 
-void
-super_regs(void)
+void super_regs(void)
 {
         int cmd;
         unsigned long val;
@@ -1536,12 +1548,14 @@ super_regs(void)
                 asm("mr %0,1" : "=r" (sp) :);
                 asm("mr %0,2" : "=r" (toc) :);
 
-                printf("msr  = %.16lx  sprg0= %.16lx\n", get_msr(), get_sprg0());
-                printf("pvr  = %.16lx  sprg1= %.16lx\n", get_pvr(), get_sprg1()); 
-                printf("dec  = %.16lx  sprg2= %.16lx\n", get_dec(), get_sprg2());
-                printf("sp   = %.16lx  sprg3= %.16lx\n", sp, get_sprg3());
-                printf("toc  = %.16lx  dar  = %.16lx\n", toc, get_dar());
-                printf("srr0 = %.16lx  srr1 = %.16lx\n", get_srr0(), get_srr1());
+                printf("msr  = "REG"  sprg0= "REG"\n",
+                       mfmsr(), mfspr(SPRN_SPRG0));
+                printf("pvr  = "REG"  sprg1= "REG"\n",
+                       mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 
+                printf("dec  = "REG"  sprg2= "REG"\n",
+                       mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
+                printf("sp   = "REG"  sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));
+                printf("toc  = "REG"  dar  = "REG"\n", toc, mfspr(SPRN_DAR));
 #ifdef CONFIG_PPC_ISERIES
                 // Dump out relevant Paca data areas.
                 printf("Paca: \n");
@@ -1578,11 +1592,6 @@ super_regs(void)
         case 'r':
                 printf("spr %lx = %lx\n", regno, read_spr(regno));
                 break;
-        case 'm':
-                val = get_msr();
-                scanhex(&val);
-                set_msrd(val);
-                break;
         }
         scannl();
 }
@@ -1604,13 +1613,13 @@ mread(unsigned long adrs, void *buf, int size)
                 q = (char *)buf;
                 switch (size) {
                 case 2:
-                        *(short *)q = *(short *)p;
+                        *(u16 *)q = *(u16 *)p;
                         break;
                 case 4:
-                        *(int *)q = *(int *)p;
+                        *(u32 *)q = *(u32 *)p;
                         break;
                 case 8:
-                        *(long *)q = *(long *)p;
+                        *(u64 *)q = *(u64 *)p;
                         break;
                 default:
                         for( ; n < size; ++n) {
@@ -1641,13 +1650,13 @@ mwrite(unsigned long adrs, void *buf, int size)
                 q = (char *) buf;
                 switch (size) {
                 case 2:
-                        *(short *)p = *(short *)q;
+                        *(u16 *)p = *(u16 *)q;
                         break;
                 case 4:
-                        *(int *)p = *(int *)q;
+                        *(u32 *)p = *(u32 *)q;
                         break;
                 case 8:
-                        *(long *)p = *(long *)q;
+                        *(u64 *)p = *(u64 *)q;
                         break;
                 default:
                         for ( ; n < size; ++n) {
@@ -1667,11 +1676,12 @@ mwrite(unsigned long adrs, void *buf, int size)
 }
 
 static int fault_type;
+static int fault_except;
 static char *fault_chars[] = { "--", "**", "##" };
 
-static int
-handle_fault(struct pt_regs *regs)
+static int handle_fault(struct pt_regs *regs)
 {
+        fault_except = TRAP(regs);
         switch (TRAP(regs)) {
         case 0x200:
                 fault_type = 0;
@@ -1960,7 +1970,7 @@ prdump(unsigned long adrs, long ndump)
         unsigned char temp[16];
 
         for (n = ndump; n > 0;) {
-                printf("%.16lx", adrs);
+                printf(REG, adrs);
                 putchar(' ');
                 r = n < 16? n: 16;
                 nr = mread(adrs, temp, r);
@@ -2008,7 +2018,7 @@ ppc_inst_dump(unsigned long adr, long count, int praddr)
                 if (nr == 0) {
                         if (praddr) {
                                 const char *x = fault_chars[fault_type];
-                                printf("%.16lx  %s%s%s%s\n", adr, x, x, x, x);
+                                printf(REG"  %s%s%s%s\n", adr, x, x, x, x);
                         }
                         break;
                 }
@@ -2023,7 +2033,7 @@ ppc_inst_dump(unsigned long adr, long count, int praddr)
                 dotted = 0;
                 last_inst = inst;
                 if (praddr)
-                        printf("%.16lx  %.8x", adr, inst);
+                        printf(REG"  %.8x", adr, inst);
                 printf("\t");
                 print_insn_powerpc(inst, adr, 0);       /* always returns 4 */
                 printf("\n");
@@ -2152,6 +2162,42 @@ memzcan(void)
                 printf("%.8x\n", a - mskip);
 }
 
+void proccall(void)
+{
+        unsigned long args[8];
+        unsigned long ret;
+        int i;
+        typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
+                        unsigned long, unsigned long, unsigned long,
+                        unsigned long, unsigned long, unsigned long);
+        callfunc_t func;
+
+        if (!scanhex(&adrs))
+                return;
+        if (termch != '\n')
+                termch = 0;
+        for (i = 0; i < 8; ++i)
+                args[i] = 0;
+        for (i = 0; i < 8; ++i) {
+                if (!scanhex(&args[i]) || termch == '\n')
+                        break;
+                termch = 0;
+        }
+        func = (callfunc_t) adrs;
+        ret = 0;
+        if (setjmp(bus_error_jmp) == 0) {
+                catch_memory_errors = 1;
+                sync();
+                ret = func(args[0], args[1], args[2], args[3],
+                           args[4], args[5], args[6], args[7]);
+                sync();
+                printf("return value is %x\n", ret);
+        } else {
+                printf("*** %x exception occurred\n", fault_except);
+        }
+        catch_memory_errors = 0;
+}
+
 /* Input scanning routines */
 int
 skipbl(void)
@@ -2174,7 +2220,12 @@ static char *regnames[N_PTREGS] = {
         "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
         "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
         "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
-        "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", "softe",
+        "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
+#ifdef CONFIG_PPC64
+        "softe",
+#else
+        "mq",
+#endif
         "trap", "dar", "dsisr", "res"
 };
 
@@ -2280,8 +2331,7 @@ scannl(void)
                 c = inchar();
 }
 
-int
-hexdigit(int c)
+int hexdigit(int c)
 {
         if( '0' <= c && c <= '9' )
                 return c - '0';
@@ -2378,7 +2428,7 @@ static void xmon_print_symbol(unsigned long address, const char *mid,
         const char *name = NULL;
         unsigned long offset, size;
 
-        printf("%.16lx", address);
+        printf(REG, address);
         if (setjmp(bus_error_jmp) == 0) {
                 catch_memory_errors = 1;
                 sync();
@@ -2399,55 +2449,7 @@ static void xmon_print_symbol(unsigned long address, const char *mid,
         printf("%s", after);
 }
 
-static void debug_trace(void)
-{
-        unsigned long val, cmd, on;
-
-        cmd = skipbl();
-        if (cmd == '\n') {
-                /* show current state */
-                unsigned long i;
-                printf("ppc64_debug_switch = 0x%lx\n", ppc64_debug_switch);
-                for (i = 0; i < PPCDBG_NUM_FLAGS ;i++) {
-                        on = PPCDBG_BITVAL(i) & ppc64_debug_switch;
-                        printf("%02x %s %12s   ", i, on ? "on " : "off",  trace_names[i] ? trace_names[i] : "");
-                        if (((i+1) % 3) == 0)
-                                printf("\n");
-                }
-                printf("\n");
-                return;
-        }
-        while (cmd != '\n') {
-                on = 1; /* default if no sign given */
-                while (cmd == '+' || cmd == '-') {
-                        on = (cmd == '+');
-                        cmd = inchar();
-                        if (cmd == ' ' || cmd == '\n') {  /* Turn on or off based on + or - */
-                                ppc64_debug_switch = on ? PPCDBG_ALL:PPCDBG_NONE;
-                                printf("Setting all values to %s...\n", on ? "on" : "off");
-                                if (cmd == '\n') return;
-                                else cmd = skipbl(); 
-                        }
-                        else
-                                termch = cmd;
-                }
-                termch = cmd;   /* not +/- ... let scanhex see it */
-                scanhex((void *)&val);
-                if (val >= 64) {
-                        printf("Value %x out of range:\n", val);
-                        return;
-                }
-                if (on) {
-                        ppc64_debug_switch |= PPCDBG_BITVAL(val);
-                        printf("enable debug %x %s\n", val, trace_names[val] ? trace_names[val] : "");
-                } else {
-                        ppc64_debug_switch &= ~PPCDBG_BITVAL(val);
-                        printf("disable debug %x %s\n", val, trace_names[val] ? trace_names[val] : "");
-                }
-                cmd = skipbl();
-        }
-}
-
+#ifdef CONFIG_PPC64
 static void dump_slb(void)
 {
         int i;
@@ -2484,6 +2486,27 @@ static void dump_stab(void)
         }
 }
 
+void dump_segments(void)
+{
+        if (cpu_has_feature(CPU_FTR_SLB))
+                dump_slb();
+        else
+                dump_stab();
+}
+#endif
+
+#ifdef CONFIG_PPC_STD_MMU_32
+void dump_segments(void)
+{
+        int i;
+
+        printf("sr0-15 =");
+        for (i = 0; i < 16; ++i)
+                printf(" %x", mfsrin(i));
+        printf("\n");
+}
+#endif
+
 void xmon_init(int enable)
 {
         if (enable) {
@@ -2504,11 +2527,3 @@ void xmon_init(int enable)
                 __debugger_fault_handler = NULL;
         }
 }
-
-void dump_segments(void)
-{
-        if (cpu_has_feature(CPU_FTR_SLB))
-                dump_slb();
-        else
-                dump_stab();
-}
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 11726e2a4ec8..b42789f8eb76 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq)
 {
         int cpm_vec = irq - CPM_IRQ_OFFSET;
 
-        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_vec);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec));
 }
 
 static void
@@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq)
 {
         int cpm_vec = irq - CPM_IRQ_OFFSET;
 
-        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << cpm_vec);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec));
 }
 
 static void
@@ -95,7 +95,7 @@ cpm_eoi(unsigned int irq)
 {
         int cpm_vec = irq - CPM_IRQ_OFFSET;
 
-        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr = (1 << cpm_vec);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec));
 }
 
 struct hw_interrupt_type cpm_pic = {
@@ -133,7 +133,7 @@ m8xx_cpm_reset(void)
          * manual recommends it.
          * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
          */
-        imp->im_siu_conf.sc_sdcr = 1;
+        out_be32(&imp->im_siu_conf.sc_sdcr, 1),
 
         /* Reclaim the DP memory for our use. */
         m8xx_cpm_dpinit();
@@ -178,10 +178,10 @@ cpm_interrupt_init(void)
 
         /* Initialize the CPM interrupt controller.
         */
-        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
+        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr,
             (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-                ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
-        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
+                ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0);
 
         /* install the CPM interrupt controller routines for the CPM
          * interrupt vectors
@@ -198,7 +198,7 @@ cpm_interrupt_init(void)
         if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
                 panic("Could not allocate CPM error IRQ!");
 
-        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
+        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN);
 }
 
 /*
@@ -212,8 +212,8 @@ cpm_get_irq(struct pt_regs *regs)
         /* Get the vector by setting the ACK bit and then reading
          * the register.
          */
-        ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1;
-        cpm_vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr;
+        out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1);
+        cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr);
         cpm_vec >>= 11;
 
         return cpm_vec;
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 776941c75672..114b90fdea24 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -568,6 +568,7 @@ config CHESTNUT
 
 config SPRUCE
         bool "IBM-Spruce"
+        select PPC_INDIRECT_PCI
 
 config HDPU
         bool "Sky-HDPU"
@@ -588,27 +589,35 @@ config EV64260
 
 config LOPEC
         bool "Motorola-LoPEC"
+        select PPC_I8259
 
 config MVME5100
         bool "Motorola-MVME5100"
+        select PPC_INDIRECT_PCI
 
 config PPLUS
         bool "Motorola-PowerPlus"
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
 
 config PRPMC750
         bool "Motorola-PrPMC750"
+        select PPC_INDIRECT_PCI
 
 config PRPMC800
         bool "Motorola-PrPMC800"
+        select PPC_INDIRECT_PCI
 
 config SANDPOINT
         bool "Motorola-Sandpoint"
+        select PPC_I8259
         help
           Select SANDPOINT if configuring for a Motorola Sandpoint X3
           (any flavor).
 
 config RADSTONE_PPC7D
         bool "Radstone Technology PPC7D board"
+        select PPC_I8259
 
 config PAL4
         bool "SBS-Palomar4"
@@ -616,6 +625,7 @@ config PAL4
 config GEMINI
         bool "Synergy-Gemini"
         depends on BROKEN
+        select PPC_INDIRECT_PCI
         help
           Select Gemini if configuring for a Synergy Microsystems' Gemini
           series Single Board Computer.  More information is available at:
@@ -747,13 +757,16 @@ config CPM2
           on it (826x, 827x, 8560).
 
 config PPC_CHRP
-        bool
+        bool "  Common Hardware Reference Platform (CHRP) based machines"
         depends on PPC_MULTIPLATFORM
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
         default y
 
 config PPC_PMAC
-        bool
+        bool "  Apple PowerMac based machines"
         depends on PPC_MULTIPLATFORM
+        select PPC_INDIRECT_PCI
         default y
 
 config PPC_PMAC64
@@ -762,8 +775,10 @@ config PPC_PMAC64
         default y
 
 config PPC_PREP
-        bool
+        bool "  PowerPC Reference Platform (PReP) based machines"
         depends on PPC_MULTIPLATFORM
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
         default y
 
 config PPC_OF
@@ -797,6 +812,7 @@ config MV64360		# Really MV64360 & MV64460
 config MV64X60
         bool
         depends on (GT64260 || MV64360)
+        select PPC_INDIRECT_PCI
         default y
 
 menu "Set bridge options"
@@ -845,6 +861,7 @@ config EPIC_SERIAL_MODE
 config MPC10X_BRIDGE
         bool
         depends on POWERPMC250 || LOPEC || SANDPOINT
+        select PPC_INDIRECT_PCI
         default y
 
 config MPC10X_OPENPIC
@@ -870,6 +887,7 @@ config HARRIER_STORE_GATHERING
 config MVME5100_IPMC761_PRESENT
         bool "MVME5100 configured with an IPMC761"
         depends on MVME5100
+        select PPC_I8259
 
 config SPRUCE_BAUD_33M
         bool "Spruce baud clock support"
@@ -1127,6 +1145,7 @@ menu "Bus options"
 config ISA
         bool "Support for ISA-bus hardware"
         depends on PPC_PREP || PPC_CHRP
+        select PPC_I8259
         help
           Find out whether you have ISA slots on your motherboard.  ISA is the
           name of a bus system, i.e. the way the CPU talks to the other stuff
@@ -1139,6 +1158,17 @@ config GENERIC_ISA_DMA
         depends on POWER3 || POWER4 || 6xx && !CPM2
         default y
 
+config PPC_I8259
+        bool
+        default y if 85xx
+        default n
+
+config PPC_INDIRECT_PCI
+        bool
+        depends on PCI
+        default y if 40x || 44x || 85xx || 83xx
+        default n
+
 config EISA
         bool
         help
@@ -1175,6 +1205,7 @@ config MPC83xx_PCI2
 config PCI_QSPAN
         bool "QSpan PCI"
         depends on !4xx && !CPM2 && 8xx
+        select PPC_I8259
         help
           Say Y here if you have a system based on a Motorola 8xx-series
           embedded processor with a QSPAN PCI interface, otherwise say N.
@@ -1182,6 +1213,7 @@ config PCI_QSPAN
 config PCI_8260
         bool
         depends on PCI && 8260
+        select PPC_INDIRECT_PCI
         default y
 
 config 8260_PCI9
@@ -1368,7 +1400,7 @@ endmenu
 
 source "lib/Kconfig"
 
-source "arch/ppc/oprofile/Kconfig"
+source "arch/powerpc/oprofile/Kconfig"
 
 source "arch/ppc/Kconfig.debug"
 
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 16e2675f3270..94d5716fa7c3 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -26,6 +26,10 @@ CPPFLAGS	+= -Iarch/$(ARCH) -Iarch/$(ARCH)/include
 AFLAGS          += -Iarch/$(ARCH)
 CFLAGS          += -Iarch/$(ARCH) -msoft-float -pipe \
                 -ffixed-r2 -mmultiple
+
+# No AltiVec instruction when building kernel
+CFLAGS          += $(call cc-option, -mno-altivec)
+
 CPP             = $(CC) -E $(CFLAGS)
 # Temporary hack until we have migrated to asm-powerpc
 LINUXINCLUDE    += -Iarch/$(ARCH)/include
@@ -57,10 +61,12 @@ head-$(CONFIG_FSL_BOOKE)	:= arch/ppc/kernel/head_fsl_booke.o
 
 head-$(CONFIG_6xx)              += arch/ppc/kernel/idle_6xx.o
 head-$(CONFIG_POWER4)           += arch/ppc/kernel/idle_power4.o
-head-$(CONFIG_PPC_FPU)          += arch/ppc/kernel/fpu.o
+head-$(CONFIG_PPC_FPU)          += arch/powerpc/kernel/fpu.o
 
-core-y                          += arch/ppc/kernel/ arch/ppc/platforms/ \
-                                   arch/ppc/mm/ arch/ppc/lib/ arch/ppc/syslib/
+core-y                          += arch/ppc/kernel/ arch/powerpc/kernel/ \
+                                   arch/ppc/platforms/ \
+                                   arch/ppc/mm/ arch/ppc/lib/ \
+                                   arch/ppc/syslib/ arch/powerpc/sysdev/
 core-$(CONFIG_4xx)              += arch/ppc/platforms/4xx/
 core-$(CONFIG_83xx)             += arch/ppc/platforms/83xx/
 core-$(CONFIG_85xx)             += arch/ppc/platforms/85xx/
@@ -71,7 +77,7 @@ drivers-$(CONFIG_8xx)		+= arch/ppc/8xx_io/
 drivers-$(CONFIG_4xx)           += arch/ppc/4xx_io/
 drivers-$(CONFIG_CPM2)          += arch/ppc/8260_io/
 
-drivers-$(CONFIG_OPROFILE)      += arch/ppc/oprofile/
+drivers-$(CONFIG_OPROFILE)      += arch/powerpc/oprofile/
 
 BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
 
diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c
index e060292ae2a7..13169a5c4339 100644
--- a/arch/ppc/boot/of1275/claim.c
+++ b/arch/ppc/boot/of1275/claim.c
@@ -29,6 +29,7 @@ claim(unsigned int virt, unsigned int size, unsigned int align)
     args.virt = virt;
     args.size = size;
     args.align = align;
+    args.ret = (void *) 0;
     (*of_prom_entry)(&args);
     return args.ret;
 }
diff --git a/arch/ppc/boot/openfirmware/chrpmain.c b/arch/ppc/boot/openfirmware/chrpmain.c
index effe4a0624b0..245dbd9fc120 100644
--- a/arch/ppc/boot/openfirmware/chrpmain.c
+++ b/arch/ppc/boot/openfirmware/chrpmain.c
@@ -78,7 +78,7 @@ boot(int a1, int a2, void *prom)
         begin_avail = avail_high = avail_ram;
         end_avail = scratch + sizeof(scratch);
         printf("gunzipping (0x%p <- 0x%p:0x%p)...", dst, im, im+len);
-        gunzip(dst, 0x400000, im, &len);
+        gunzip(dst, PROG_SIZE - PROG_START, im, &len);
         printf("done %u bytes\n\r", len);
         printf("%u bytes of heap consumed, max in use %u\n\r",
                avail_high - begin_avail, heap_max);
diff --git a/arch/ppc/boot/openfirmware/coffmain.c b/arch/ppc/boot/openfirmware/coffmain.c
index 04ba9d57e110..2da8855e2be0 100644
--- a/arch/ppc/boot/openfirmware/coffmain.c
+++ b/arch/ppc/boot/openfirmware/coffmain.c
@@ -38,7 +38,7 @@ static char heap[SCRATCH_SIZE];
 static unsigned long ram_start = 0;
 static unsigned long ram_end = 0x1000000;
 
-static unsigned long prog_start = 0x900000;
+static unsigned long prog_start = 0x800000;
 static unsigned long prog_size = 0x700000;
 
 typedef void (*kernel_start_t)(int, int, void *);
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index b1457a8a9c0f..b35346df1e37 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -1,6 +1,7 @@
 #
 # Makefile for the linux kernel.
 #
+ifneq ($(CONFIG_PPC_MERGE),y)
 
 extra-$(CONFIG_PPC_STD_MMU)     := head.o
 extra-$(CONFIG_40x)             := head_4xx.o
@@ -9,13 +10,12 @@ extra-$(CONFIG_FSL_BOOKE)	:= head_fsl_booke.o
 extra-$(CONFIG_8xx)             := head_8xx.o
 extra-$(CONFIG_6xx)             += idle_6xx.o
 extra-$(CONFIG_POWER4)          += idle_power4.o
-extra-$(CONFIG_PPC_FPU)         += fpu.o
 extra-y                         += vmlinux.lds
 
 obj-y                           := entry.o traps.o irq.o idle.o time.o misc.o \
-                                        process.o signal.o ptrace.o align.o \
-                                        semaphore.o syscalls.o setup.o \
-                                        cputable.o ppc_htab.o perfmon.o
+                                        process.o align.o \
+                                        setup.o \
+                                        ppc_htab.o
 obj-$(CONFIG_6xx)               += l2cr.o cpu_setup_6xx.o
 obj-$(CONFIG_SOFTWARE_SUSPEND)  += swsusp.o
 obj-$(CONFIG_POWER4)            += cpu_setup_power4.o
@@ -25,7 +25,6 @@ obj-$(CONFIG_PCI)		+= pci.o
 obj-$(CONFIG_KGDB)              += ppc-stub.o
 obj-$(CONFIG_SMP)               += smp.o smp-tbsync.o
 obj-$(CONFIG_TAU)               += temp.o
-obj-$(CONFIG_ALTIVEC)           += vecemu.o vector.o
 ifndef CONFIG_E200
 obj-$(CONFIG_FSL_BOOKE)         += perfmon_fsl_booke.o
 endif
@@ -35,3 +34,21 @@ ifndef CONFIG_MATH_EMULATION
 obj-$(CONFIG_8xx)               += softemu8xx.o
 endif
 
+# These are here while we do the architecture merge
+
+else
+obj-y                           := irq.o idle.o \
+                                        align.o
+obj-$(CONFIG_6xx)               += l2cr.o cpu_setup_6xx.o
+obj-$(CONFIG_SOFTWARE_SUSPEND)  += swsusp.o
+obj-$(CONFIG_MODULES)           += module.o
+obj-$(CONFIG_NOT_COHERENT_CACHE)        += dma-mapping.o
+obj-$(CONFIG_PCI)               += pci.o
+obj-$(CONFIG_KGDB)              += ppc-stub.o
+obj-$(CONFIG_SMP)               += smp.o smp-tbsync.o
+obj-$(CONFIG_TAU)               += temp.o
+ifndef CONFIG_E200
+obj-$(CONFIG_FSL_BOOKE)         += perfmon_fsl_booke.o
+endif
+obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
+endif
diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
index ff81da9598d8..ab398c4b70b6 100644
--- a/arch/ppc/kernel/align.c
+++ b/arch/ppc/kernel/align.c
@@ -375,7 +375,7 @@ fix_alignment(struct pt_regs *regs)
 #ifdef CONFIG_PPC_FPU
                 preempt_disable();
                 enable_kernel_fp();
-                cvt_fd(&data.f, &data.d, &current->thread.fpscr);
+                cvt_fd(&data.f, &data.d, &current->thread);
                 preempt_enable();
 #else
                 return 0;
@@ -385,7 +385,7 @@ fix_alignment(struct pt_regs *regs)
 #ifdef CONFIG_PPC_FPU
                 preempt_disable();
                 enable_kernel_fp();
-                cvt_df(&data.d, &data.f, &current->thread.fpscr);
+                cvt_df(&data.d, &data.f, &current->thread);
                 preempt_enable();
 #else
                 return 0;
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index d9ad1d776d0e..968261d69572 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -130,10 +130,10 @@ main(void)
         DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
         DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
 
+        DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror));
         DEFINE(TI_TASK, offsetof(struct thread_info, task));
         DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
         DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
-        DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
         DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
         DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
 
@@ -141,6 +141,7 @@ main(void)
         DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
         DEFINE(pbe_next, offsetof(struct pbe, next));
 
+        DEFINE(TASK_SIZE, TASK_SIZE);
         DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
         return 0;
 }
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index ba396438ede3..55ed7716636f 100644
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -17,8 +17,6 @@
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
 
-_GLOBAL(__setup_cpu_601)
-        blr
 _GLOBAL(__setup_cpu_603)
         b       setup_common_caches
 _GLOBAL(__setup_cpu_604)
@@ -292,10 +290,10 @@ _GLOBAL(__init_fpu_registers)
 #define CS_SIZE         32
 
         .data
-        .balign L1_CACHE_LINE_SIZE
+        .balign L1_CACHE_BYTES
 cpu_state_storage:
         .space  CS_SIZE
-        .balign L1_CACHE_LINE_SIZE,0
+        .balign L1_CACHE_BYTES,0
         .text
 
 /* Called in normal context to backup CPU 0 state. This
diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S
index 7e4fbb653724..d7bfd60e21fc 100644
--- a/arch/ppc/kernel/cpu_setup_power4.S
+++ b/arch/ppc/kernel/cpu_setup_power4.S
@@ -63,8 +63,6 @@ _GLOBAL(__970_cpu_preinit)
         isync
         blr
 
-_GLOBAL(__setup_cpu_power4)
-        blr
 _GLOBAL(__setup_cpu_ppc970)
         mfspr   r0,SPRN_HID0
         li      r11,5                   /* clear DOZE and SLEEP */
@@ -88,10 +86,10 @@ _GLOBAL(__setup_cpu_ppc970)
 #define CS_SIZE         32
 
         .data
-        .balign L1_CACHE_LINE_SIZE
+        .balign L1_CACHE_BYTES
 cpu_state_storage:      
         .space  CS_SIZE
-        .balign L1_CACHE_LINE_SIZE,0
+        .balign L1_CACHE_BYTES,0
         .text
         
 /* Called in normal context to backup CPU 0 state. This
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 03d4886869f3..f044edbb454f 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -200,9 +200,8 @@ _GLOBAL(DoSyscall)
         bl      do_show_syscall
 #endif /* SHOW_SYSCALLS */
         rlwinm  r10,r1,0,0,18   /* current_thread_info() */
-        lwz     r11,TI_LOCAL_FLAGS(r10)
-        rlwinm  r11,r11,0,~_TIFL_FORCE_NOERROR
-        stw     r11,TI_LOCAL_FLAGS(r10)
+        li      r11,0
+        stb     r11,TI_SC_NOERR(r10)
         lwz     r11,TI_FLAGS(r10)
         andi.   r11,r11,_TIF_SYSCALL_T_OR_A
         bne-    syscall_dotrace
@@ -227,8 +226,8 @@ ret_from_syscall:
         cmplw   0,r3,r11
         rlwinm  r12,r1,0,0,18   /* current_thread_info() */
         blt+    30f
-        lwz     r11,TI_LOCAL_FLAGS(r12)
-        andi.   r11,r11,_TIFL_FORCE_NOERROR
+        lbz     r11,TI_SC_NOERR(r12)
+        cmpwi   r11,0
         bne     30f
         neg     r3,r3
         lwz     r10,_CCR(r1)    /* Set SO bit in CR */
@@ -633,7 +632,8 @@ sigreturn_exit:
         rlwinm  r12,r1,0,0,18   /* current_thread_info() */
         lwz     r9,TI_FLAGS(r12)
         andi.   r0,r9,_TIF_SYSCALL_T_OR_A
-        bnel-   do_syscall_trace_leave
+        beq+    ret_from_except_full
+        bl      do_syscall_trace_leave
         /* fall through */
 
         .globl  ret_from_except_full
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index 1960fb8c259c..c5a890dca9cf 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -349,12 +349,12 @@ i##n:								\
 
 /* System reset */
 /* core99 pmac starts the seconary here by changing the vector, and
-   putting it back to what it was (UnknownException) when done.  */
+   putting it back to what it was (unknown_exception) when done.  */
 #if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
         . = 0x100
         b       __secondary_start_gemini
 #else
-        EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD)
+        EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
 #endif
 
 /* Machine check */
@@ -389,7 +389,7 @@ i##n:								\
         cmpwi   cr1,r4,0
         bne     cr1,1f
 #endif
-        EXC_XFER_STD(0x200, MachineCheckException)
+        EXC_XFER_STD(0x200, machine_check_exception)
 #ifdef CONFIG_PPC_CHRP
 1:      b       machine_check_in_rtas
 #endif
@@ -456,10 +456,10 @@ Alignment:
         mfspr   r5,SPRN_DSISR
         stw     r5,_DSISR(r11)
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_EE(0x600, AlignmentException)
+        EXC_XFER_EE(0x600, alignment_exception)
 
 /* Program check exception */
-        EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD)
+        EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
 
 /* Floating-point unavailable */
         . = 0x800
@@ -467,13 +467,13 @@ FPUnavailable:
         EXCEPTION_PROLOG
         bne     load_up_fpu             /* if from user, just load it up */
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_EE_LITE(0x800, KernelFP)
+        EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
 
 /* Decrementer */
         EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
 
-        EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
 
 /* System call */
         . = 0xc00
@@ -482,8 +482,8 @@ SystemCall:
         EXC_XFER_EE_LITE(0xc00, DoSyscall)
 
 /* Single step - not used on 601 */
-        EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD)
-        EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
+        EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
 
 /*
  * The Altivec unavailable trap is at 0x0f20.  Foo.
@@ -502,7 +502,7 @@ SystemCall:
 Trap_0f:
         EXCEPTION_PROLOG
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_EE(0xf00, UnknownException)
+        EXC_XFER_EE(0xf00, unknown_exception)
 
 /*
  * Handle TLB miss for instruction on 603/603e.
@@ -702,44 +702,44 @@ DataStoreTLBMiss:
         rfi
 
 #ifndef CONFIG_ALTIVEC
-#define AltivecAssistException  UnknownException
+#define altivec_assist_exception        unknown_exception
 #endif
 
-        EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE)
+        EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
         EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
-        EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
 #ifdef CONFIG_POWER4
-        EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1700, Trap_17, AltivecAssistException, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE)
         EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD)
 #else /* !CONFIG_POWER4 */
-        EXCEPTION(0x1600, Trap_16, AltivecAssistException, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
         EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
-        EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
 #endif /* CONFIG_POWER4 */
-        EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
         EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
-        EXCEPTION(0x2100, Trap_21, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2200, Trap_22, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2300, Trap_23, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2400, Trap_24, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2500, Trap_25, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2600, Trap_26, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2700, Trap_27, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2800, Trap_28, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2900, Trap_29, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2a00, Trap_2a, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2b00, Trap_2b, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2c00, Trap_2c, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2d00, Trap_2d, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2e00, Trap_2e, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x2f00, MOLTrampoline, UnknownException, EXC_XFER_EE_LITE)
+        EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
 
         .globl mol_trampoline
         .set mol_trampoline, i0x2f00
@@ -751,7 +751,7 @@ AltiVecUnavailable:
 #ifdef CONFIG_ALTIVEC
         bne     load_up_altivec         /* if from user, just load it up */
 #endif /* CONFIG_ALTIVEC */
-        EXC_XFER_EE_LITE(0xf20, AltivecUnavailException)
+        EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
 
 #ifdef CONFIG_PPC64BRIDGE
 DataAccess:
@@ -767,12 +767,12 @@ DataSegment:
         addi    r3,r1,STACK_FRAME_OVERHEAD
         mfspr   r4,SPRN_DAR
         stw     r4,_DAR(r11)
-        EXC_XFER_STD(0x380, UnknownException)
+        EXC_XFER_STD(0x380, unknown_exception)
 
 InstructionSegment:
         EXCEPTION_PROLOG
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_STD(0x480, UnknownException)
+        EXC_XFER_STD(0x480, unknown_exception)
 #endif /* CONFIG_PPC64BRIDGE */
 
 #ifdef CONFIG_ALTIVEC
@@ -804,7 +804,7 @@ load_up_altivec:
         beq     1f
         add     r4,r4,r6
         addi    r4,r4,THREAD    /* want THREAD of last_task_used_altivec */
-        SAVE_32VR(0,r10,r4)
+        SAVE_32VRS(0,r10,r4)
         mfvscr  vr0
         li      r10,THREAD_VSCR
         stvx    vr0,r10,r4
@@ -824,7 +824,7 @@ load_up_altivec:
         stw     r4,THREAD_USED_VR(r5)
         lvx     vr0,r10,r5
         mtvscr  vr0
-        REST_32VR(0,r10,r5)
+        REST_32VRS(0,r10,r5)
 #ifndef CONFIG_SMP
         subi    r4,r5,THREAD
         sub     r4,r4,r6
@@ -870,7 +870,7 @@ giveup_altivec:
         addi    r3,r3,THREAD            /* want THREAD of task */
         lwz     r5,PT_REGS(r3)
         cmpwi   0,r5,0
-        SAVE_32VR(0, r4, r3)
+        SAVE_32VRS(0, r4, r3)
         mfvscr  vr0
         li      r4,THREAD_VSCR
         stvx    vr0,r4,r3
@@ -916,7 +916,7 @@ relocate_kernel:
 copy_and_flush:
         addi    r5,r5,-4
         addi    r6,r6,-4
-4:      li      r0,L1_CACHE_LINE_SIZE/4
+4:      li      r0,L1_CACHE_BYTES/4
         mtctr   r0
 3:      addi    r6,r6,4                 /* copy a cache line */
         lwzx    r0,r6,r4
@@ -1059,7 +1059,6 @@ __secondary_start:
 
         lis     r3,-KERNELBASE@h
         mr      r4,r24
-        bl      identify_cpu
         bl      call_setup_cpu          /* Call setup_cpu for this CPU */
 #ifdef CONFIG_6xx
         lis     r3,-KERNELBASE@h
@@ -1109,11 +1108,6 @@ __secondary_start:
  * Those generic dummy functions are kept for CPUs not
  * included in CONFIG_6xx
  */
-_GLOBAL(__setup_cpu_power3)
-        blr
-_GLOBAL(__setup_cpu_generic)
-        blr
-
 #if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4)
 _GLOBAL(__save_cpu_setup)
         blr
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 599245b0407e..8b49679fad54 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -309,13 +309,13 @@ skpinv:	addi	r4,r4,1				/* Increment */
 
 interrupt_base:
         /* Critical Input Interrupt */
-        CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
+        CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
 
         /* Machine Check Interrupt */
 #ifdef CONFIG_440A
-        MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+        MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
 #else
-        CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
 #endif
 
         /* Data Storage Interrupt */
@@ -442,7 +442,7 @@ interrupt_base:
 #ifdef CONFIG_PPC_FPU
         FP_UNAVAILABLE_EXCEPTION
 #else
-        EXCEPTION(0x2010, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
 #endif
 
         /* System Call Interrupt */
@@ -451,21 +451,21 @@ interrupt_base:
         EXC_XFER_EE_LITE(0x0c00, DoSyscall)
 
         /* Auxillary Processor Unavailable Interrupt */
-        EXCEPTION(0x2020, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
 
         /* Decrementer Interrupt */
         DECREMENTER_EXCEPTION
 
         /* Fixed Internal Timer Interrupt */
         /* TODO: Add FIT support */
-        EXCEPTION(0x1010, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
 
         /* Watchdog Timer Interrupt */
         /* TODO: Add watchdog support */
 #ifdef CONFIG_BOOKE_WDT
         CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
 #else
-        CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException)
+        CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
 #endif
 
         /* Data TLB Error Interrupt */
@@ -743,14 +743,18 @@ _GLOBAL(set_context)
  * goes at the beginning of the data segment, which is page-aligned.
  */
         .data
-_GLOBAL(sdata)
-_GLOBAL(empty_zero_page)
+        .align  12
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
         .space  4096
 
 /*
  * To support >32-bit physical addresses, we use an 8KB pgdir.
  */
-_GLOBAL(swapper_pg_dir)
+        .globl  swapper_pg_dir
+swapper_pg_dir:
         .space  8192
 
 /* Reserved 4k for the critical exception stack & 4k for the machine
@@ -759,13 +763,15 @@ _GLOBAL(swapper_pg_dir)
         .align 12
 exception_stack_bottom:
         .space  BOOKE_EXCEPTION_STACK_SIZE
-_GLOBAL(exception_stack_top)
+        .globl  exception_stack_top
+exception_stack_top:
 
 /*
  * This space gets a copy of optional info passed to us by the bootstrap
  * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
  */
-_GLOBAL(cmd_line)
+        .globl  cmd_line
+cmd_line:
         .space  512
 
 /*
@@ -774,5 +780,3 @@ _GLOBAL(cmd_line)
  */
 abatron_pteptrs:
         .space  8
-
-
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
index 8562b807b37c..10c261c67021 100644
--- a/arch/ppc/kernel/head_4xx.S
+++ b/arch/ppc/kernel/head_4xx.S
@@ -245,12 +245,12 @@ label:
 /*
  * 0x0100 - Critical Interrupt Exception
  */
-        CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, UnknownException)
+        CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
 
 /*
  * 0x0200 - Machine Check Exception
  */
-        CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
 
 /*
  * 0x0300 - Data Storage Exception
@@ -405,7 +405,7 @@ label:
         mfspr   r4,SPRN_DEAR            /* Grab the DEAR and save it */
         stw     r4,_DEAR(r11)
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_EE(0x600, AlignmentException)
+        EXC_XFER_EE(0x600, alignment_exception)
 
 /* 0x0700 - Program Exception */
         START_EXCEPTION(0x0700, ProgramCheck)
@@ -413,21 +413,21 @@ label:
         mfspr   r4,SPRN_ESR             /* Grab the ESR and save it */
         stw     r4,_ESR(r11)
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_STD(0x700, ProgramCheckException)
+        EXC_XFER_STD(0x700, program_check_exception)
 
-        EXCEPTION(0x0800, Trap_08, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x0900, Trap_09, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x0A00, Trap_0A, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x0B00, Trap_0B, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
 
 /* 0x0C00 - System Call Exception */
         START_EXCEPTION(0x0C00, SystemCall)
         NORMAL_EXCEPTION_PROLOG
         EXC_XFER_EE_LITE(0xc00, DoSyscall)
 
-        EXCEPTION(0x0D00, Trap_0D, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x0E00, Trap_0E, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x0F00, Trap_0F, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
 
 /* 0x1000 - Programmable Interval Timer (PIT) Exception */
         START_EXCEPTION(0x1000, Decrementer)
@@ -444,14 +444,14 @@ label:
 
 /* 0x1010 - Fixed Interval Timer (FIT) Exception
 */
-        STND_EXCEPTION(0x1010,  FITException,           UnknownException)
+        STND_EXCEPTION(0x1010,  FITException,           unknown_exception)
 
 /* 0x1020 - Watchdog Timer (WDT) Exception
 */
 #ifdef CONFIG_BOOKE_WDT
         CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
 #else
-        CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException)
+        CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
 #endif
 #endif
 
@@ -656,25 +656,25 @@ label:
         mfspr   r10, SPRN_SPRG0
         b       InstructionAccess
 
-        EXCEPTION(0x1300, Trap_13, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1400, Trap_14, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
 #ifdef CONFIG_IBM405_ERR51
         /* 405GP errata 51 */
         START_EXCEPTION(0x1700, Trap_17)
         b DTLBMiss
 #else
-        EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
 #endif
-        EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1A00, Trap_1A, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1B00, Trap_1B, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1C00, Trap_1C, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1D00, Trap_1D, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1E00, Trap_1E, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1F00, Trap_1F, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
 
 /* Check for a single step debug exception while in an exception
  * handler before state has been saved.  This is to catch the case
@@ -988,10 +988,14 @@ _GLOBAL(set_context)
  * goes at the beginning of the data segment, which is page-aligned.
  */
         .data
-_GLOBAL(sdata)
-_GLOBAL(empty_zero_page)
+        .align  12
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
         .space  4096
-_GLOBAL(swapper_pg_dir)
+        .globl  swapper_pg_dir
+swapper_pg_dir:
         .space  4096
 
 
@@ -1001,12 +1005,14 @@ _GLOBAL(swapper_pg_dir)
 exception_stack_bottom:
         .space  4096
 critical_stack_top:
-_GLOBAL(exception_stack_top)
+        .globl  exception_stack_top
+exception_stack_top:
 
 /* This space gets a copy of optional info passed to us by the bootstrap
  * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
  */
-_GLOBAL(cmd_line)
+        .globl  cmd_line
+cmd_line:
         .space  512
 
 /* Room for two PTE pointers, usually the kernel and current user pointers
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index cb1a3a54a026..de0978742221 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -203,7 +203,7 @@ i##n:								\
                           ret_from_except)
 
 /* System reset */
-        EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD)
+        EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
 
 /* Machine check */
         . = 0x200
@@ -214,7 +214,7 @@ MachineCheck:
         mfspr r5,SPRN_DSISR
         stw r5,_DSISR(r11)
         addi r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_STD(0x200, MachineCheckException)
+        EXC_XFER_STD(0x200, machine_check_exception)
 
 /* Data access exception.
  * This is "never generated" by the MPC8xx.  We jump to it for other
@@ -252,20 +252,20 @@ Alignment:
         mfspr   r5,SPRN_DSISR
         stw     r5,_DSISR(r11)
         addi    r3,r1,STACK_FRAME_OVERHEAD
-        EXC_XFER_EE(0x600, AlignmentException)
+        EXC_XFER_EE(0x600, alignment_exception)
 
 /* Program check exception */
-        EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD)
+        EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
 
 /* No FPU on MPC8xx.  This exception is not supposed to happen.
 */
-        EXCEPTION(0x800, FPUnavailable, UnknownException, EXC_XFER_STD)
+        EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
 
 /* Decrementer */
         EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
 
-        EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
 
 /* System call */
         . = 0xc00
@@ -274,9 +274,9 @@ SystemCall:
         EXC_XFER_EE_LITE(0xc00, DoSyscall)
 
 /* Single step - not used on 601 */
-        EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD)
-        EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0xf00, Trap_0f, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
+        EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
 
 /* On the MPC8xx, this is a software emulation interrupt.  It occurs
  * for all unimplemented and illegal instructions.
@@ -540,22 +540,22 @@ DataTLBError:
 #endif
         b       DataAccess
 
-        EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
 
 /* On the MPC8xx, these next four traps are used for development
  * support of breakpoints and such.  Someday I will get around to
  * using them.
  */
-        EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE)
-        EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
+        EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
 
         . = 0x2000
 
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index 9342acf12e72..aeb349b47af3 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -335,7 +335,7 @@ label:
         mfspr   r4,SPRN_DEAR;           /* Grab the DEAR and save it */       \
         stw     r4,_DEAR(r11);                                                \
         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
-        EXC_XFER_EE(0x0600, AlignmentException)
+        EXC_XFER_EE(0x0600, alignment_exception)
 
 #define PROGRAM_EXCEPTION                                                     \
         START_EXCEPTION(Program)                                              \
@@ -343,7 +343,7 @@ label:
         mfspr   r4,SPRN_ESR;            /* Grab the ESR and save it */        \
         stw     r4,_ESR(r11);                                                 \
         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
-        EXC_XFER_STD(0x0700, ProgramCheckException)
+        EXC_XFER_STD(0x0700, program_check_exception)
 
 #define DECREMENTER_EXCEPTION                                                 \
         START_EXCEPTION(Decrementer)                                          \
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index 8e52e8408316..5063c603fad4 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -426,14 +426,14 @@ skpinv:	addi	r6,r6,1				/* Increment */
 
 interrupt_base:
         /* Critical Input Interrupt */
-        CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
+        CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
 
         /* Machine Check Interrupt */
 #ifdef CONFIG_E200
         /* no RFMCI, MCSRRs on E200 */
-        CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
 #else
-        MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+        MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
 #endif
 
         /* Data Storage Interrupt */
@@ -542,9 +542,9 @@ interrupt_base:
 #else
 #ifdef CONFIG_E200
         /* E200 treats 'normal' floating point instructions as FP Unavail exception */
-        EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE)
+        EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
 #else
-        EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
 #endif
 #endif
 
@@ -554,20 +554,20 @@ interrupt_base:
         EXC_XFER_EE_LITE(0x0c00, DoSyscall)
 
         /* Auxillary Processor Unavailable Interrupt */
-        EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
 
         /* Decrementer Interrupt */
         DECREMENTER_EXCEPTION
 
         /* Fixed Internal Timer Interrupt */
         /* TODO: Add FIT support */
-        EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
 
         /* Watchdog Timer Interrupt */
 #ifdef CONFIG_BOOKE_WDT
         CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
 #else
-        CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
+        CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
 #endif
 
         /* Data TLB Error Interrupt */
@@ -696,21 +696,21 @@ interrupt_base:
         addi    r3,r1,STACK_FRAME_OVERHEAD
         EXC_XFER_EE_LITE(0x2010, KernelSPE)
 #else
-        EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
 #endif /* CONFIG_SPE */
 
         /* SPE Floating Point Data */
 #ifdef CONFIG_SPE
         EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
 #else
-        EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
 #endif /* CONFIG_SPE */
 
         /* SPE Floating Point Round */
-        EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE)
+        EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
 
         /* Performance Monitor */
-        EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD)
+        EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
 
 
         /* Debug Interrupt */
@@ -853,7 +853,7 @@ load_up_spe:
         cmpi    0,r4,0
         beq     1f
         addi    r4,r4,THREAD    /* want THREAD of last_task_used_spe */
-        SAVE_32EVR(0,r10,r4)
+        SAVE_32EVRS(0,r10,r4)
         evxor   evr10, evr10, evr10     /* clear out evr10 */
         evmwumiaa evr10, evr10, evr10   /* evr10 <- ACC = 0 * 0 + ACC */
         li      r5,THREAD_ACC
@@ -873,7 +873,7 @@ load_up_spe:
         stw     r4,THREAD_USED_SPE(r5)
         evlddx  evr4,r10,r5
         evmra   evr4,evr4
-        REST_32EVR(0,r10,r5)
+        REST_32EVRS(0,r10,r5)
 #ifndef CONFIG_SMP
         subi    r4,r5,THREAD
         stw     r4,last_task_used_spe@l(r3)
@@ -963,7 +963,7 @@ _GLOBAL(giveup_spe)
         addi    r3,r3,THREAD            /* want THREAD of task */
         lwz     r5,PT_REGS(r3)
         cmpi    0,r5,0
-        SAVE_32EVR(0, r4, r3)
+        SAVE_32EVRS(0, r4, r3)
         evxor   evr6, evr6, evr6        /* clear out evr6 */
         evmwumiaa evr6, evr6, evr6      /* evr6 <- ACC = 0 * 0 + ACC */
         li      r4,THREAD_ACC
@@ -1028,10 +1028,14 @@ _GLOBAL(set_context)
  * goes at the beginning of the data segment, which is page-aligned.
  */
         .data
-_GLOBAL(sdata)
-_GLOBAL(empty_zero_page)
+        .align  12
+        .globl  sdata
+sdata:
+        .globl  empty_zero_page
+empty_zero_page:
         .space  4096
-_GLOBAL(swapper_pg_dir)
+        .globl  swapper_pg_dir
+swapper_pg_dir:
         .space  4096
 
 /* Reserved 4k for the critical exception stack & 4k for the machine
@@ -1040,13 +1044,15 @@ _GLOBAL(swapper_pg_dir)
         .align 12
 exception_stack_bottom:
         .space  BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
-_GLOBAL(exception_stack_top)
+        .globl  exception_stack_top
+exception_stack_top:
 
 /*
  * This space gets a copy of optional info passed to us by the bootstrap
  * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
  */
-_GLOBAL(cmd_line)
+        .globl  cmd_line
+cmd_line:
         .space  512
 
 /*
@@ -1055,4 +1061,3 @@ _GLOBAL(cmd_line)
  */
 abatron_pteptrs:
         .space  8
-
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
index fba29c876b62..11e5b44713f7 100644
--- a/arch/ppc/kernel/idle.c
+++ b/arch/ppc/kernel/idle.c
@@ -32,6 +32,7 @@
 #include <asm/cache.h>
 #include <asm/cputable.h>
 #include <asm/machdep.h>
+#include <asm/smp.h>
 
 void default_idle(void)
 {
@@ -74,7 +75,7 @@ void cpu_idle(void)
 /*
  * Register the sysctl to set/clear powersave_nap.
  */
-extern unsigned long powersave_nap;
+extern int powersave_nap;
 
 static ctl_table powersave_nap_ctl_table[]={
         {
diff --git a/arch/ppc/kernel/irq.c b/arch/ppc/kernel/irq.c
index 8843f3af230f..772e428aaa59 100644
--- a/arch/ppc/kernel/irq.c
+++ b/arch/ppc/kernel/irq.c
@@ -57,6 +57,7 @@
 #include <asm/cache.h>
 #include <asm/prom.h>
 #include <asm/ptrace.h>
+#include <asm/machdep.h>
 
 #define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
 
diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S
index 861115249b35..d7f4e982b539 100644
--- a/arch/ppc/kernel/l2cr.S
+++ b/arch/ppc/kernel/l2cr.S
@@ -203,7 +203,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
          * L1 icache
          */
         b       20f
-        .balign L1_CACHE_LINE_SIZE
+        .balign L1_CACHE_BYTES
 22:
         sync
         mtspr   SPRN_L2CR,r3
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 90d917d2e856..3056ede2424d 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -125,9 +125,8 @@ _GLOBAL(identify_cpu)
 1:
         addis   r6,r3,cur_cpu_spec@ha
         addi    r6,r6,cur_cpu_spec@l
-        slwi    r4,r4,2
         sub     r8,r8,r3
-        stwx    r8,r4,r6
+        stw     r8,0(r6)
         blr
 
 /*
@@ -186,19 +185,18 @@ _GLOBAL(do_cpu_ftr_fixups)
  *
  * Setup function is called with:
  *   r3 = data offset
- *   r4 = CPU number
- *   r5 = ptr to CPU spec (relocated)
+ *   r4 = ptr to CPU spec (relocated)
  */
 _GLOBAL(call_setup_cpu)
-        addis   r5,r3,cur_cpu_spec@ha
-        addi    r5,r5,cur_cpu_spec@l
-        slwi    r4,r24,2
-        lwzx    r5,r4,r5
+        addis   r4,r3,cur_cpu_spec@ha
+        addi    r4,r4,cur_cpu_spec@l
+        lwz     r4,0(r4)
+        add     r4,r4,r3
+        lwz     r5,CPU_SPEC_SETUP(r4)
+        cmpi    0,r5,0
         add     r5,r5,r3
-        lwz     r6,CPU_SPEC_SETUP(r5)
-        add     r6,r6,r3
-        mtctr   r6
-        mr      r4,r24
+        beqlr
+        mtctr   r5
         bctr
 
 #if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
@@ -273,134 +271,6 @@ _GLOBAL(low_choose_7447a_dfs)
 
 #endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
 
-/* void local_save_flags_ptr(unsigned long *flags) */
-_GLOBAL(local_save_flags_ptr)
-        mfmsr   r4
-        stw     r4,0(r3)
-        blr
-        /*
-         * Need these nops here for taking over save/restore to
-         * handle lost intrs
-         * -- Cort
-         */
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-_GLOBAL(local_save_flags_ptr_end)
-
-/* void local_irq_restore(unsigned long flags) */
-_GLOBAL(local_irq_restore)
-/*
- * Just set/clear the MSR_EE bit through restore/flags but do not
- * change anything else.  This is needed by the RT system and makes
- * sense anyway.
- *    -- Cort
- */
-        mfmsr   r4
-        /* Copy all except the MSR_EE bit from r4 (current MSR value)
-           to r3.  This is the sort of thing the rlwimi instruction is
-           designed for.  -- paulus. */
-        rlwimi  r3,r4,0,17,15
-         /* Check if things are setup the way we want _already_. */
-        cmpw    0,r3,r4
-        beqlr
-1:      SYNC
-        mtmsr   r3
-        SYNC
-        blr
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-_GLOBAL(local_irq_restore_end)
-
-_GLOBAL(local_irq_disable)
-        mfmsr   r0              /* Get current interrupt state */
-        rlwinm  r3,r0,16+1,32-1,31      /* Extract old value of 'EE' */
-        rlwinm  r0,r0,0,17,15   /* clear MSR_EE in r0 */
-        SYNC                    /* Some chip revs have problems here... */
-        mtmsr   r0              /* Update machine state */
-        blr                     /* Done */
-        /*
-         * Need these nops here for taking over save/restore to
-         * handle lost intrs
-         * -- Cort
-         */
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-_GLOBAL(local_irq_disable_end)
-
-_GLOBAL(local_irq_enable)
-        mfmsr   r3              /* Get current state */
-        ori     r3,r3,MSR_EE    /* Turn on 'EE' bit */
-        SYNC                    /* Some chip revs have problems here... */
-        mtmsr   r3              /* Update machine state */
-        blr
-        /*
-         * Need these nops here for taking over save/restore to
-         * handle lost intrs
-         * -- Cort
-         */
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-        nop
-_GLOBAL(local_irq_enable_end)
-
 /*
  * complement mask on the msr then "or" some values on.
  *     _nmask_and_or_msr(nmask, value_to_or)
@@ -628,21 +498,21 @@ _GLOBAL(flush_icache_range)
 BEGIN_FTR_SECTION
         blr                             /* for 601, do nothing */
 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
-        li      r5,L1_CACHE_LINE_SIZE-1
+        li      r5,L1_CACHE_BYTES-1
         andc    r3,r3,r5
         subf    r4,r3,r4
         add     r4,r4,r5
-        srwi.   r4,r4,LG_L1_CACHE_LINE_SIZE
+        srwi.   r4,r4,L1_CACHE_SHIFT
         beqlr
         mtctr   r4
         mr      r6,r3
 1:      dcbst   0,r3
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    1b
         sync                            /* wait for dcbst's to get to ram */
         mtctr   r4
 2:      icbi    0,r6
-        addi    r6,r6,L1_CACHE_LINE_SIZE
+        addi    r6,r6,L1_CACHE_BYTES
         bdnz    2b
         sync                            /* additional sync needed on g4 */
         isync
@@ -655,16 +525,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
  * clean_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(clean_dcache_range)
-        li      r5,L1_CACHE_LINE_SIZE-1
+        li      r5,L1_CACHE_BYTES-1
         andc    r3,r3,r5
         subf    r4,r3,r4
         add     r4,r4,r5
-        srwi.   r4,r4,LG_L1_CACHE_LINE_SIZE
+        srwi.   r4,r4,L1_CACHE_SHIFT
         beqlr
         mtctr   r4
 
 1:      dcbst   0,r3
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    1b
         sync                            /* wait for dcbst's to get to ram */
         blr
@@ -676,16 +546,16 @@ _GLOBAL(clean_dcache_range)
  * flush_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(flush_dcache_range)
-        li      r5,L1_CACHE_LINE_SIZE-1
+        li      r5,L1_CACHE_BYTES-1
         andc    r3,r3,r5
         subf    r4,r3,r4
         add     r4,r4,r5
-        srwi.   r4,r4,LG_L1_CACHE_LINE_SIZE
+        srwi.   r4,r4,L1_CACHE_SHIFT
         beqlr
         mtctr   r4
 
 1:      dcbf    0,r3
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    1b
         sync                            /* wait for dcbst's to get to ram */
         blr
@@ -698,16 +568,16 @@ _GLOBAL(flush_dcache_range)
  * invalidate_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(invalidate_dcache_range)
-        li      r5,L1_CACHE_LINE_SIZE-1
+        li      r5,L1_CACHE_BYTES-1
         andc    r3,r3,r5
         subf    r4,r3,r4
         add     r4,r4,r5
-        srwi.   r4,r4,LG_L1_CACHE_LINE_SIZE
+        srwi.   r4,r4,L1_CACHE_SHIFT
         beqlr
         mtctr   r4
 
 1:      dcbi    0,r3
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    1b
         sync                            /* wait for dcbi's to get to ram */
         blr
@@ -728,7 +598,7 @@ _GLOBAL(flush_dcache_all)
         mtctr   r4
         lis     r5, KERNELBASE@h
 1:      lwz     r3, 0(r5)               /* Load one word from every line */
-        addi    r5, r5, L1_CACHE_LINE_SIZE
+        addi    r5, r5, L1_CACHE_BYTES
         bdnz    1b
         blr
 #endif /* CONFIG_NOT_COHERENT_CACHE */
@@ -746,16 +616,16 @@ BEGIN_FTR_SECTION
         blr                                     /* for 601, do nothing */
 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
         rlwinm  r3,r3,0,0,19                    /* Get page base address */
-        li      r4,4096/L1_CACHE_LINE_SIZE      /* Number of lines in a page */
+        li      r4,4096/L1_CACHE_BYTES  /* Number of lines in a page */
         mtctr   r4
         mr      r6,r3
 0:      dcbst   0,r3                            /* Write line to ram */
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    0b
         sync
         mtctr   r4
 1:      icbi    0,r6
-        addi    r6,r6,L1_CACHE_LINE_SIZE
+        addi    r6,r6,L1_CACHE_BYTES
         bdnz    1b
         sync
         isync
@@ -778,16 +648,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
         mtmsr   r0
         isync
         rlwinm  r3,r3,0,0,19                    /* Get page base address */
-        li      r4,4096/L1_CACHE_LINE_SIZE      /* Number of lines in a page */
+        li      r4,4096/L1_CACHE_BYTES  /* Number of lines in a page */
         mtctr   r4
         mr      r6,r3
 0:      dcbst   0,r3                            /* Write line to ram */
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    0b
         sync
         mtctr   r4
 1:      icbi    0,r6
-        addi    r6,r6,L1_CACHE_LINE_SIZE
+        addi    r6,r6,L1_CACHE_BYTES
         bdnz    1b
         sync
         mtmsr   r10                             /* restore DR */
@@ -802,7 +672,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
  * void clear_pages(void *page, int order) ;
  */
 _GLOBAL(clear_pages)
-        li      r0,4096/L1_CACHE_LINE_SIZE
+        li      r0,4096/L1_CACHE_BYTES
         slw     r0,r0,r4
         mtctr   r0
 #ifdef CONFIG_8xx
@@ -814,7 +684,7 @@ _GLOBAL(clear_pages)
 #else
 1:      dcbz    0,r3
 #endif
-        addi    r3,r3,L1_CACHE_LINE_SIZE
+        addi    r3,r3,L1_CACHE_BYTES
         bdnz    1b
         blr
 
@@ -840,7 +710,7 @@ _GLOBAL(copy_page)
 
 #ifdef CONFIG_8xx
         /* don't use prefetch on 8xx */
-        li      r0,4096/L1_CACHE_LINE_SIZE
+        li      r0,4096/L1_CACHE_BYTES
         mtctr   r0
 1:      COPY_16_BYTES
         bdnz    1b
@@ -854,13 +724,13 @@ _GLOBAL(copy_page)
         li      r11,4
         mtctr   r0
 11:     dcbt    r11,r4
-        addi    r11,r11,L1_CACHE_LINE_SIZE
+        addi    r11,r11,L1_CACHE_BYTES
         bdnz    11b
 #else /* MAX_COPY_PREFETCH == 1 */
         dcbt    r5,r4
-        li      r11,L1_CACHE_LINE_SIZE+4
+        li      r11,L1_CACHE_BYTES+4
 #endif /* MAX_COPY_PREFETCH */
-        li      r0,4096/L1_CACHE_LINE_SIZE - MAX_COPY_PREFETCH
+        li      r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
         crclr   4*cr0+eq
 2:
         mtctr   r0
@@ -868,12 +738,12 @@ _GLOBAL(copy_page)
         dcbt    r11,r4
         dcbz    r5,r3
         COPY_16_BYTES
-#if L1_CACHE_LINE_SIZE >= 32
+#if L1_CACHE_BYTES >= 32
         COPY_16_BYTES
-#if L1_CACHE_LINE_SIZE >= 64
+#if L1_CACHE_BYTES >= 64
         COPY_16_BYTES
         COPY_16_BYTES
-#if L1_CACHE_LINE_SIZE >= 128
+#if L1_CACHE_BYTES >= 128
         COPY_16_BYTES
         COPY_16_BYTES
         COPY_16_BYTES
@@ -1098,33 +968,6 @@ _GLOBAL(_get_SP)
         blr
 
 /*
- * These are used in the alignment trap handler when emulating
- * single-precision loads and stores.
- * We restore and save the fpscr so the task gets the same result
- * and exceptions as if the cpu had performed the load or store.
- */
-
-#ifdef CONFIG_PPC_FPU
-_GLOBAL(cvt_fd)
-        lfd     0,-4(r5)        /* load up fpscr value */
-        mtfsf   0xff,0
-        lfs     0,0(r3)
-        stfd    0,0(r4)
-        mffs    0               /* save new fpscr value */
-        stfd    0,-4(r5)
-        blr
-
-_GLOBAL(cvt_df)
-        lfd     0,-4(r5)        /* load up fpscr value */
-        mtfsf   0xff,0
-        lfd     0,0(r3)
-        stfs    0,0(r4)
-        mffs    0               /* save new fpscr value */
-        stfd    0,-4(r5)
-        blr
-#endif
-
-/*
  * Create a kernel thread
  *   kernel_thread(fn, arg, flags)
  */
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 854e45beb387..e8f4e576750a 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -21,6 +21,7 @@
 #include <asm/byteorder.h>
 #include <asm/irq.h>
 #include <asm/uaccess.h>
+#include <asm/machdep.h>
 
 #undef DEBUG
 
@@ -53,7 +54,7 @@ static u8* pci_to_OF_bus_map;
 /* By default, we don't re-assign bus numbers. We do this only on
  * some pmacs
  */
-int pci_assign_all_busses;
+int pci_assign_all_buses;
 
 struct pci_controller* hose_head;
 struct pci_controller** hose_tail = &hose_head;
@@ -644,7 +645,7 @@ pcibios_alloc_controller(void)
 /*
  * Functions below are used on OpenFirmware machines.
  */
-static void __openfirmware
+static void
 make_one_node_map(struct device_node* node, u8 pci_bus)
 {
         int *bus_range;
@@ -678,7 +679,7 @@ make_one_node_map(struct device_node* node, u8 pci_bus)
         }
 }
         
-void __openfirmware
+void
 pcibios_make_OF_bus_map(void)
 {
         int i;
@@ -720,7 +721,7 @@ pcibios_make_OF_bus_map(void)
 
 typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
 
-static struct device_node* __openfirmware
+static struct device_node*
 scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data)
 {
         struct device_node* sub_node;
@@ -761,7 +762,7 @@ scan_OF_pci_childs_iterator(struct device_node* node, void* data)
         return 0;
 }
 
-static struct device_node* __openfirmware
+static struct device_node*
 scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn)
 {
         u8 filter_data[2] = {bus, dev_fn};
@@ -813,18 +814,20 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
         /* Now, lookup childs of the hose */
         return scan_OF_childs_for_device(node->child, busnr, devfn);
 }
+EXPORT_SYMBOL(pci_busdev_to_OF_node);
 
 struct device_node*
 pci_device_to_OF_node(struct pci_dev *dev)
 {
         return pci_busdev_to_OF_node(dev->bus, dev->devfn);
 }
+EXPORT_SYMBOL(pci_device_to_OF_node);
 
 /* This routine is meant to be used early during boot, when the
  * PCI bus numbers have not yet been assigned, and you need to
  * issue PCI config cycles to an OF device.
  * It could also be used to "fix" RTAS config cycles if you want
- * to set pci_assign_all_busses to 1 and still use RTAS for PCI
+ * to set pci_assign_all_buses to 1 and still use RTAS for PCI
  * config cycles.
  */
 struct pci_controller*
@@ -842,7 +845,7 @@ pci_find_hose_for_OF_device(struct device_node* node)
         return NULL;
 }
 
-static int __openfirmware
+static int
 find_OF_pci_device_filter(struct device_node* node, void* data)
 {
         return ((void *)node == data);
@@ -890,6 +893,7 @@ pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
         }
         return -ENODEV;
 }
+EXPORT_SYMBOL(pci_device_from_OF_node);
 
 void __init
 pci_process_bridge_OF_ranges(struct pci_controller *hose,
@@ -1030,6 +1034,10 @@ static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *att
 }
 static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
 
+#else /* CONFIG_PPC_OF */
+void pcibios_make_OF_bus_map(void)
+{
+}
 #endif /* CONFIG_PPC_OF */
 
 /* Add sysfs properties */
@@ -1262,12 +1270,12 @@ pcibios_init(void)
 
         /* Scan all of the recorded PCI controllers.  */
         for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
-                if (pci_assign_all_busses)
+                if (pci_assign_all_buses)
                         hose->first_busno = next_busno;
                 hose->last_busno = 0xff;
                 bus = pci_scan_bus(hose->first_busno, hose->ops, hose);
                 hose->last_busno = bus->subordinate;
-                if (pci_assign_all_busses || next_busno <= hose->last_busno)
+                if (pci_assign_all_buses || next_busno <= hose->last_busno)
                         next_busno = hose->last_busno + pcibios_assign_bus_offset;
         }
         pci_bus_count = next_busno;
@@ -1276,7 +1284,7 @@ pcibios_init(void)
          * numbers vs. kernel bus numbers since we may have to
          * remap them.
          */
-        if (pci_assign_all_busses && have_of)
+        if (pci_assign_all_buses && have_of)
                 pcibios_make_OF_bus_map();
 
         /* Do machine dependent PCI interrupt routing */
@@ -1586,16 +1594,17 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
  * above routine
  */
 pgprot_t pci_phys_mem_access_prot(struct file *file,
-                                  unsigned long offset,
+                                  unsigned long pfn,
                                   unsigned long size,
                                   pgprot_t protection)
 {
         struct pci_dev *pdev = NULL;
         struct resource *found = NULL;
         unsigned long prot = pgprot_val(protection);
+        unsigned long offset = pfn << PAGE_SHIFT;
         int i;
 
-        if (page_is_ram(offset >> PAGE_SHIFT))
+        if (page_is_ram(pfn))
                 return prot;
 
         prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c
deleted file mode 100644
index 22df9a596a0f..000000000000
--- a/arch/ppc/kernel/perfmon.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* kernel/perfmon.c
- * PPC 32 Performance Monitor Infrastructure
- *
- * Author: Andy Fleming
- * Copyright (c) 2004 Freescale Semiconductor, Inc
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/interrupt.h>
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/prctl.h>
-
-#include <asm/pgtable.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/reg.h>
-#include <asm/xmon.h>
-
-/* A lock to regulate grabbing the interrupt */
-DEFINE_SPINLOCK(perfmon_lock);
-
-#if defined (CONFIG_FSL_BOOKE) && !defined (CONFIG_E200)
-static void dummy_perf(struct pt_regs *regs)
-{
-        unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
-
-        pmgc0 &= ~PMGC0_PMIE;
-        mtpmr(PMRN_PMGC0, pmgc0);
-}
-
-#elif defined(CONFIG_6xx)
-/* Ensure exceptions are disabled */
-static void dummy_perf(struct pt_regs *regs)
-{
-        unsigned int mmcr0 = mfspr(SPRN_MMCR0);
-
-        mmcr0 &= ~MMCR0_PMXE;
-        mtspr(SPRN_MMCR0, mmcr0);
-}
-#else
-static void dummy_perf(struct pt_regs *regs)
-{
-}
-#endif
-
-void (*perf_irq)(struct pt_regs *) = dummy_perf;
-
-/* Grab the interrupt, if it's free.
- * Returns 0 on success, -1 if the interrupt is taken already */
-int request_perfmon_irq(void (*handler)(struct pt_regs *))
-{
-        int err = 0;
-
-        spin_lock(&perfmon_lock);
-
-        if (perf_irq == dummy_perf)
-                perf_irq = handler;
-        else {
-                pr_info("perfmon irq already handled by %p\n", perf_irq);
-                err = -1;
-        }
-
-        spin_unlock(&perfmon_lock);
-
-        return err;
-}
-
-void free_perfmon_irq(void)
-{
-        spin_lock(&perfmon_lock);
-
-        perf_irq = dummy_perf;
-
-        spin_unlock(&perfmon_lock);
-}
-
-EXPORT_SYMBOL(perf_irq);
-EXPORT_SYMBOL(request_perfmon_irq);
-EXPORT_SYMBOL(free_perfmon_irq);
diff --git a/arch/ppc/kernel/perfmon_fsl_booke.c b/arch/ppc/kernel/perfmon_fsl_booke.c
index 03526bfb0840..32455dfcc36b 100644
--- a/arch/ppc/kernel/perfmon_fsl_booke.c
+++ b/arch/ppc/kernel/perfmon_fsl_booke.c
@@ -32,7 +32,7 @@
 #include <asm/io.h>
 #include <asm/reg.h>
 #include <asm/xmon.h>
-#include <asm/perfmon.h>
+#include <asm/pmc.h>
 
 static inline u32 get_pmlca(int ctr);
 static inline void set_pmlca(int ctr, u32 pmlca);
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 88f6bb7b6964..ae24196d78f6 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -53,10 +53,10 @@
 
 extern void transfer_to_handler(void);
 extern void do_IRQ(struct pt_regs *regs);
-extern void MachineCheckException(struct pt_regs *regs);
-extern void AlignmentException(struct pt_regs *regs);
-extern void ProgramCheckException(struct pt_regs *regs);
-extern void SingleStepException(struct pt_regs *regs);
+extern void machine_check_exception(struct pt_regs *regs);
+extern void alignment_exception(struct pt_regs *regs);
+extern void program_check_exception(struct pt_regs *regs);
+extern void single_step_exception(struct pt_regs *regs);
 extern int do_signal(sigset_t *, struct pt_regs *);
 extern int pmac_newworld;
 extern int sys_sigreturn(struct pt_regs *regs);
@@ -72,10 +72,10 @@ EXPORT_SYMBOL(clear_user_page);
 EXPORT_SYMBOL(do_signal);
 EXPORT_SYMBOL(transfer_to_handler);
 EXPORT_SYMBOL(do_IRQ);
-EXPORT_SYMBOL(MachineCheckException);
-EXPORT_SYMBOL(AlignmentException);
-EXPORT_SYMBOL(ProgramCheckException);
-EXPORT_SYMBOL(SingleStepException);
+EXPORT_SYMBOL(machine_check_exception);
+EXPORT_SYMBOL(alignment_exception);
+EXPORT_SYMBOL(program_check_exception);
+EXPORT_SYMBOL(single_step_exception);
 EXPORT_SYMBOL(sys_sigreturn);
 EXPORT_SYMBOL(ppc_n_lost_interrupts);
 EXPORT_SYMBOL(ppc_lost_interrupts);
@@ -230,9 +230,6 @@ EXPORT_SYMBOL(find_all_nodes);
 EXPORT_SYMBOL(get_property);
 EXPORT_SYMBOL(request_OF_resource);
 EXPORT_SYMBOL(release_OF_resource);
-EXPORT_SYMBOL(pci_busdev_to_OF_node);
-EXPORT_SYMBOL(pci_device_to_OF_node);
-EXPORT_SYMBOL(pci_device_from_OF_node);
 EXPORT_SYMBOL(of_find_node_by_name);
 EXPORT_SYMBOL(of_find_node_by_type);
 EXPORT_SYMBOL(of_find_compatible_node);
@@ -272,16 +269,6 @@ EXPORT_SYMBOL(screen_info);
 #endif
 
 EXPORT_SYMBOL(__delay);
-#ifndef INLINE_IRQS
-EXPORT_SYMBOL(local_irq_enable);
-EXPORT_SYMBOL(local_irq_enable_end);
-EXPORT_SYMBOL(local_irq_disable);
-EXPORT_SYMBOL(local_irq_disable_end);
-EXPORT_SYMBOL(local_save_flags_ptr);
-EXPORT_SYMBOL(local_save_flags_ptr_end);
-EXPORT_SYMBOL(local_irq_restore);
-EXPORT_SYMBOL(local_irq_restore_end);
-#endif
 EXPORT_SYMBOL(timer_interrupt);
 EXPORT_SYMBOL(irq_desc);
 EXPORT_SYMBOL(tb_ticks_per_jiffy);
@@ -335,11 +322,6 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
 extern long *intercept_table;
 EXPORT_SYMBOL(intercept_table);
 #endif /* CONFIG_PPC_STD_MMU */
-EXPORT_SYMBOL(cur_cpu_spec);
-#ifdef CONFIG_PPC_PMAC
-extern unsigned long agp_special_page;
-EXPORT_SYMBOL(agp_special_page);
-#endif
 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
 EXPORT_SYMBOL(__mtdcr);
 EXPORT_SYMBOL(__mfdcr);
diff --git a/arch/ppc/kernel/process.c b/arch/ppc/kernel/process.c
index 82de66e4db6d..cb1c7b92f8c6 100644
--- a/arch/ppc/kernel/process.c
+++ b/arch/ppc/kernel/process.c
@@ -152,18 +152,66 @@ int check_stack(struct task_struct *tsk)
 }
 #endif /* defined(CHECK_STACK) */
 
-#ifdef CONFIG_ALTIVEC
-int
-dump_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs)
+/*
+ * Make sure the floating-point register state in the
+ * the thread_struct is up to date for task tsk.
+ */
+void flush_fp_to_thread(struct task_struct *tsk)
 {
-        if (regs->msr & MSR_VEC)
-                giveup_altivec(current);
-        memcpy(vrregs, &current->thread.vr[0], sizeof(*vrregs));
+        if (tsk->thread.regs) {
+                /*
+                 * We need to disable preemption here because if we didn't,
+                 * another process could get scheduled after the regs->msr
+                 * test but before we have finished saving the FP registers
+                 * to the thread_struct.  That process could take over the
+                 * FPU, and then when we get scheduled again we would store
+                 * bogus values for the remaining FP registers.
+                 */
+                preempt_disable();
+                if (tsk->thread.regs->msr & MSR_FP) {
+#ifdef CONFIG_SMP
+                        /*
+                         * This should only ever be called for current or
+                         * for a stopped child process.  Since we save away
+                         * the FP register state on context switch on SMP,
+                         * there is something wrong if a stopped child appears
+                         * to still have its FP state in the CPU registers.
+                         */
+                        BUG_ON(tsk != current);
+#endif
+                        giveup_fpu(current);
+                }
+                preempt_enable();
+        }
+}
+
+void enable_kernel_fp(void)
+{
+        WARN_ON(preemptible());
+
+#ifdef CONFIG_SMP
+        if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
+                giveup_fpu(current);
+        else
+                giveup_fpu(NULL);       /* just enables FP for kernel */
+#else
+        giveup_fpu(last_task_used_math);
+#endif /* CONFIG_SMP */
+}
+EXPORT_SYMBOL(enable_kernel_fp);
+
+int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
+{
+        preempt_disable();
+        if (tsk->thread.regs && (tsk->thread.regs->msr & MSR_FP))
+                giveup_fpu(tsk);
+        preempt_enable();
+        memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
         return 1;
 }
 
-void
-enable_kernel_altivec(void)
+#ifdef CONFIG_ALTIVEC
+void enable_kernel_altivec(void)
 {
         WARN_ON(preemptible());
 
@@ -177,19 +225,35 @@ enable_kernel_altivec(void)
 #endif /* __SMP __ */
 }
 EXPORT_SYMBOL(enable_kernel_altivec);
-#endif /* CONFIG_ALTIVEC */
 
-#ifdef CONFIG_SPE
-int
-dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
+/*
+ * Make sure the VMX/Altivec register state in the
+ * the thread_struct is up to date for task tsk.
+ */
+void flush_altivec_to_thread(struct task_struct *tsk)
 {
-        if (regs->msr & MSR_SPE)
-                giveup_spe(current);
-        /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
-        memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
+        if (tsk->thread.regs) {
+                preempt_disable();
+                if (tsk->thread.regs->msr & MSR_VEC) {
+#ifdef CONFIG_SMP
+                        BUG_ON(tsk != current);
+#endif
+                        giveup_altivec(current);
+                }
+                preempt_enable();
+        }
+}
+
+int dump_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs)
+{
+        if (regs->msr & MSR_VEC)
+                giveup_altivec(current);
+        memcpy(vrregs, &current->thread.vr[0], sizeof(*vrregs));
         return 1;
 }
+#endif /* CONFIG_ALTIVEC */
 
+#ifdef CONFIG_SPE
 void
 enable_kernel_spe(void)
 {
@@ -205,34 +269,30 @@ enable_kernel_spe(void)
 #endif /* __SMP __ */
 }
 EXPORT_SYMBOL(enable_kernel_spe);
-#endif /* CONFIG_SPE */
 
-void
-enable_kernel_fp(void)
+void flush_spe_to_thread(struct task_struct *tsk)
 {
-        WARN_ON(preemptible());
-
+        if (tsk->thread.regs) {
+                preempt_disable();
+                if (tsk->thread.regs->msr & MSR_SPE) {
 #ifdef CONFIG_SMP
-        if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
-                giveup_fpu(current);
-        else
-                giveup_fpu(NULL);       /* just enables FP for kernel */
-#else
-        giveup_fpu(last_task_used_math);
-#endif /* CONFIG_SMP */
+                        BUG_ON(tsk != current);
+#endif
+                        giveup_spe(current);
+                }
+                preempt_enable();
+        }
 }
-EXPORT_SYMBOL(enable_kernel_fp);
 
-int
-dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
+int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
 {
-        preempt_disable();
-        if (tsk->thread.regs && (tsk->thread.regs->msr & MSR_FP))
-                giveup_fpu(tsk);
-        preempt_enable();
-        memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
+        if (regs->msr & MSR_SPE)
+                giveup_spe(current);
+        /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
+        memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
         return 1;
 }
+#endif /* CONFIG_SPE */
 
 struct task_struct *__switch_to(struct task_struct *prev,
         struct task_struct *new)
@@ -287,11 +347,13 @@ struct task_struct *__switch_to(struct task_struct *prev,
 #endif /* CONFIG_SPE */
 #endif /* CONFIG_SMP */
 
+#ifdef CONFIG_ALTIVEC
         /* Avoid the trap.  On smp this this never happens since
          * we don't set last_task_used_altivec -- Cort
          */
         if (new->thread.regs && last_task_used_altivec == new)
                 new->thread.regs->msr |= MSR_VEC;
+#endif
 #ifdef CONFIG_SPE
         /* Avoid the trap.  On smp this this never happens since
          * we don't set last_task_used_spe
@@ -482,7 +544,7 @@ void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp)
                 last_task_used_spe = NULL;
 #endif
         memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
-        current->thread.fpscr = 0;
+        current->thread.fpscr.val = 0;
 #ifdef CONFIG_ALTIVEC
         memset(current->thread.vr, 0, sizeof(current->thread.vr));
         memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
@@ -557,14 +619,16 @@ int sys_clone(unsigned long clone_flags, unsigned long usp,
         return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
 }
 
-int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6,
+int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
+             unsigned long p4, unsigned long p5, unsigned long p6,
              struct pt_regs *regs)
 {
         CHECK_FULL_REGS(regs);
         return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
 }
 
-int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6,
+int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
+              unsigned long p4, unsigned long p5, unsigned long p6,
               struct pt_regs *regs)
 {
         CHECK_FULL_REGS(regs);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 545cfd0fab59..6bcb85d2b7fd 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md;
 unsigned long boot_mem_size;
 
 unsigned long ISA_DMA_THRESHOLD;
-unsigned long DMA_MODE_READ, DMA_MODE_WRITE;
+unsigned int DMA_MODE_READ;
+unsigned int DMA_MODE_WRITE;
 
 #ifdef CONFIG_PPC_MULTIPLATFORM
 int _machine = 0;
@@ -82,8 +83,18 @@ extern void pmac_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7);
 extern void chrp_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7);
+
+dev_t boot_dev;
 #endif /* CONFIG_PPC_MULTIPLATFORM */
 
+int have_of;
+EXPORT_SYMBOL(have_of);
+
+#ifdef __DO_IRQ_CANON
+int ppc_do_canonicalize_irqs;
+EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
+#endif
+
 #ifdef CONFIG_MAGIC_SYSRQ
 unsigned long SYSRQ_KEY = 0x54;
 #endif /* CONFIG_MAGIC_SYSRQ */
@@ -185,18 +196,18 @@ int show_cpuinfo(struct seq_file *m, void *v)
         seq_printf(m, "processor\t: %d\n", i);
         seq_printf(m, "cpu\t\t: ");
 
-        if (cur_cpu_spec[i]->pvr_mask)
-                seq_printf(m, "%s", cur_cpu_spec[i]->cpu_name);
+        if (cur_cpu_spec->pvr_mask)
+                seq_printf(m, "%s", cur_cpu_spec->cpu_name);
         else
                 seq_printf(m, "unknown (%08x)", pvr);
 #ifdef CONFIG_ALTIVEC
-        if (cur_cpu_spec[i]->cpu_features & CPU_FTR_ALTIVEC)
+        if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
                 seq_printf(m, ", altivec supported");
 #endif
         seq_printf(m, "\n");
 
 #ifdef CONFIG_TAU
-        if (cur_cpu_spec[i]->cpu_features & CPU_FTR_TAU) {
+        if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
 #ifdef CONFIG_TAU_AVERAGE
                 /* more straightforward, but potentially misleading */
                 seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
@@ -339,7 +350,7 @@ early_init(int r3, int r4, int r5)
  * Assume here that all clock rates are the same in a
  * smp system.  -- Cort
  */
-int __openfirmware
+int
 of_show_percpuinfo(struct seq_file *m, int i)
 {
         struct device_node *cpu_node;
@@ -404,11 +415,15 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                         _machine = _MACH_prep;
         }
 
+#ifdef CONFIG_PPC_PREP
         /* not much more to do here, if prep */
         if (_machine == _MACH_prep) {
                 prep_init(r3, r4, r5, r6, r7);
                 return;
         }
+#endif
+
+        have_of = 1;
 
         /* prom_init has already been called from __start */
         if (boot_infos)
@@ -479,12 +494,16 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif /* CONFIG_ADB */
 
         switch (_machine) {
+#ifdef CONFIG_PPC_PMAC
         case _MACH_Pmac:
                 pmac_init(r3, r4, r5, r6, r7);
                 break;
+#endif
+#ifdef CONFIG_PPC_CHRP
         case _MACH_chrp:
                 chrp_init(r3, r4, r5, r6, r7);
                 break;
+#endif
         }
 }
 
@@ -721,7 +740,7 @@ void __init setup_arch(char **cmdline_p)
 #endif
 
 #ifdef CONFIG_XMON
-        xmon_map_scc();
+        xmon_init(1);
         if (strstr(cmd_line, "xmon"))
                 xmon(NULL);
 #endif /* CONFIG_XMON */
@@ -745,12 +764,12 @@ void __init setup_arch(char **cmdline_p)
          * for a possibly more accurate value.
          */
         if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
-                dcache_bsize = cur_cpu_spec[0]->dcache_bsize;
-                icache_bsize = cur_cpu_spec[0]->icache_bsize;
+                dcache_bsize = cur_cpu_spec->dcache_bsize;
+                icache_bsize = cur_cpu_spec->icache_bsize;
                 ucache_bsize = 0;
         } else
                 ucache_bsize = dcache_bsize = icache_bsize
-                        = cur_cpu_spec[0]->dcache_bsize;
+                        = cur_cpu_spec->dcache_bsize;
 
         /* reboot on panic */
         panic_timeout = 180;
diff --git a/arch/ppc/kernel/signal.c b/arch/ppc/kernel/signal.c
deleted file mode 100644
index 2244bf91e593..000000000000
--- a/arch/ppc/kernel/signal.c
+++ /dev/null
@@ -1,771 +0,0 @@
-/*
- *  arch/ppc/kernel/signal.c
- *
- *  PowerPC version
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- *  Derived from "arch/i386/kernel/signal.c"
- *    Copyright (C) 1991, 1992 Linus Torvalds
- *    1997-11-28  Modified for POSIX.1b signals by Richard Henderson
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-#include <linux/stddef.h>
-#include <linux/elf.h>
-#include <linux/tty.h>
-#include <linux/binfmts.h>
-#include <linux/suspend.h>
-#include <asm/ucontext.h>
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/cacheflush.h>
-
-#undef DEBUG_SIG
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-extern void sigreturn_exit(struct pt_regs *);
-
-#define GP_REGS_SIZE    min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
-
-int do_signal(sigset_t *oldset, struct pt_regs *regs);
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-int
-sys_sigsuspend(old_sigset_t mask, int p2, int p3, int p4, int p6, int p7,
-               struct pt_regs *regs)
-{
-        sigset_t saveset;
-
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
-        saveset = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        regs->result = -EINTR;
-        regs->gpr[3] = EINTR;
-        regs->ccr |= 0x10000000;
-        while (1) {
-                current->state = TASK_INTERRUPTIBLE;
-                schedule();
-                if (do_signal(&saveset, regs))
-                        sigreturn_exit(regs);
-        }
-}
-
-int
-sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, int p3, int p4,
-                  int p6, int p7, struct pt_regs *regs)
-{
-        sigset_t saveset, newset;
-
-        /* XXX: Don't preclude handling different sized sigset_t's.  */
-        if (sigsetsize != sizeof(sigset_t))
-                return -EINVAL;
-
-        if (copy_from_user(&newset, unewset, sizeof(newset)))
-                return -EFAULT;
-        sigdelsetmask(&newset, ~_BLOCKABLE);
-
-        spin_lock_irq(&current->sighand->siglock);
-        saveset = current->blocked;
-        current->blocked = newset;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        regs->result = -EINTR;
-        regs->gpr[3] = EINTR;
-        regs->ccr |= 0x10000000;
-        while (1) {
-                current->state = TASK_INTERRUPTIBLE;
-                schedule();
-                if (do_signal(&saveset, regs))
-                        sigreturn_exit(regs);
-        }
-}
-
-
-int
-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, int r5,
-                int r6, int r7, int r8, struct pt_regs *regs)
-{
-        return do_sigaltstack(uss, uoss, regs->gpr[1]);
-}
-
-int
-sys_sigaction(int sig, const struct old_sigaction __user *act,
-              struct old_sigaction __user *oact)
-{
-        struct k_sigaction new_ka, old_ka;
-        int ret;
-
-        if (act) {
-                old_sigset_t mask;
-                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
-                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
-                        return -EFAULT;
-                __get_user(new_ka.sa.sa_flags, &act->sa_flags);
-                __get_user(mask, &act->sa_mask);
-                siginitset(&new_ka.sa.sa_mask, mask);
-        }
-
-        ret = do_sigaction(sig, (act? &new_ka: NULL), (oact? &old_ka: NULL));
-
-        if (!ret && oact) {
-                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
-                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
-                        return -EFAULT;
-                __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
-                __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
-        }
-
-        return ret;
-}
-
-/*
- * When we have signals to deliver, we set up on the
- * user stack, going down from the original stack pointer:
- *      a sigregs struct
- *      a sigcontext struct
- *      a gap of __SIGNAL_FRAMESIZE bytes
- *
- * Each of these things must be a multiple of 16 bytes in size.
- *
- */
-struct sigregs {
-        struct mcontext mctx;           /* all the register values */
-        /* Programs using the rs6000/xcoff abi can save up to 19 gp regs
-           and 18 fp regs below sp before decrementing it. */
-        int             abigap[56];
-};
-
-/* We use the mc_pad field for the signal return trampoline. */
-#define tramp   mc_pad
-
-/*
- *  When we have rt signals to deliver, we set up on the
- *  user stack, going down from the original stack pointer:
- *      one rt_sigframe struct (siginfo + ucontext + ABI gap)
- *      a gap of __SIGNAL_FRAMESIZE+16 bytes
- *  (the +16 is to get the siginfo and ucontext in the same
- *  positions as in older kernels).
- *
- *  Each of these things must be a multiple of 16 bytes in size.
- *
- */
-struct rt_sigframe
-{
-        struct siginfo info;
-        struct ucontext uc;
-        /* Programs using the rs6000/xcoff abi can save up to 19 gp regs
-           and 18 fp regs below sp before decrementing it. */
-        int             abigap[56];
-};
-
-/*
- * Save the current user registers on the user stack.
- * We only save the altivec/spe registers if the process has used
- * altivec/spe instructions at some point.
- */
-static int
-save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, int sigret)
-{
-        /* save general and floating-point registers */
-        CHECK_FULL_REGS(regs);
-        preempt_disable();
-        if (regs->msr & MSR_FP)
-                giveup_fpu(current);
-#ifdef CONFIG_ALTIVEC
-        if (current->thread.used_vr && (regs->msr & MSR_VEC))
-                giveup_altivec(current);
-#endif /* CONFIG_ALTIVEC */
-#ifdef CONFIG_SPE
-        if (current->thread.used_spe && (regs->msr & MSR_SPE))
-                giveup_spe(current);
-#endif /* CONFIG_ALTIVEC */
-        preempt_enable();
-
-        if (__copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE)
-            || __copy_to_user(&frame->mc_fregs, current->thread.fpr,
-                              ELF_NFPREG * sizeof(double)))
-                return 1;
-
-        current->thread.fpscr = 0;      /* turn off all fp exceptions */
-
-#ifdef CONFIG_ALTIVEC
-        /* save altivec registers */
-        if (current->thread.used_vr) {
-                if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
-                                   ELF_NVRREG * sizeof(vector128)))
-                        return 1;
-                /* set MSR_VEC in the saved MSR value to indicate that
-                   frame->mc_vregs contains valid data */
-                if (__put_user(regs->msr | MSR_VEC, &frame->mc_gregs[PT_MSR]))
-                        return 1;
-        }
-        /* else assert((regs->msr & MSR_VEC) == 0) */
-
-        /* We always copy to/from vrsave, it's 0 if we don't have or don't
-         * use altivec. Since VSCR only contains 32 bits saved in the least
-         * significant bits of a vector, we "cheat" and stuff VRSAVE in the
-         * most significant bits of that same vector. --BenH
-         */
-        if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
-                return 1;
-#endif /* CONFIG_ALTIVEC */
-
-#ifdef CONFIG_SPE
-        /* save spe registers */
-        if (current->thread.used_spe) {
-                if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
-                                   ELF_NEVRREG * sizeof(u32)))
-                        return 1;
-                /* set MSR_SPE in the saved MSR value to indicate that
-                   frame->mc_vregs contains valid data */
-                if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR]))
-                        return 1;
-        }
-        /* else assert((regs->msr & MSR_SPE) == 0) */
-
-        /* We always copy to/from spefscr */
-        if (__put_user(current->thread.spefscr, (u32 *)&frame->mc_vregs + ELF_NEVRREG))
-                return 1;
-#endif /* CONFIG_SPE */
-
-        if (sigret) {
-                /* Set up the sigreturn trampoline: li r0,sigret; sc */
-                if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
-                    || __put_user(0x44000002UL, &frame->tramp[1]))
-                        return 1;
-                flush_icache_range((unsigned long) &frame->tramp[0],
-                                   (unsigned long) &frame->tramp[2]);
-        }
-
-        return 0;
-}
-
-/*
- * Restore the current user register values from the user stack,
- * (except for MSR).
- */
-static int
-restore_user_regs(struct pt_regs *regs, struct mcontext __user *sr, int sig)
-{
-        unsigned long save_r2 = 0;
-#if defined(CONFIG_ALTIVEC) || defined(CONFIG_SPE)
-        unsigned long msr;
-#endif
-
-        /* backup/restore the TLS as we don't want it to be modified */
-        if (!sig)
-                save_r2 = regs->gpr[2];
-        /* copy up to but not including MSR */
-        if (__copy_from_user(regs, &sr->mc_gregs, PT_MSR * sizeof(elf_greg_t)))
-                return 1;
-        /* copy from orig_r3 (the word after the MSR) up to the end */
-        if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
-                             GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
-                return 1;
-        if (!sig)
-                regs->gpr[2] = save_r2;
-
-        /* force the process to reload the FP registers from
-           current->thread when it next does FP instructions */
-        regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
-        if (__copy_from_user(current->thread.fpr, &sr->mc_fregs,
-                             sizeof(sr->mc_fregs)))
-                return 1;
-
-#ifdef CONFIG_ALTIVEC
-        /* force the process to reload the altivec registers from
-           current->thread when it next does altivec instructions */
-        regs->msr &= ~MSR_VEC;
-        if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_VEC) != 0) {
-                /* restore altivec registers from the stack */
-                if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
-                                     sizeof(sr->mc_vregs)))
-                        return 1;
-        } else if (current->thread.used_vr)
-                memset(&current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
-
-        /* Always get VRSAVE back */
-        if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
-                return 1;
-#endif /* CONFIG_ALTIVEC */
-
-#ifdef CONFIG_SPE
-        /* force the process to reload the spe registers from
-           current->thread when it next does spe instructions */
-        regs->msr &= ~MSR_SPE;
-        if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_SPE) != 0) {
-                /* restore spe registers from the stack */
-                if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
-                                     ELF_NEVRREG * sizeof(u32)))
-                        return 1;
-        } else if (current->thread.used_spe)
-                memset(&current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
-
-        /* Always get SPEFSCR back */
-        if (__get_user(current->thread.spefscr, (u32 *)&sr->mc_vregs + ELF_NEVRREG))
-                return 1;
-#endif /* CONFIG_SPE */
-
-#ifndef CONFIG_SMP
-        preempt_disable();
-        if (last_task_used_math == current)
-                last_task_used_math = NULL;
-        if (last_task_used_altivec == current)
-                last_task_used_altivec = NULL;
-        if (last_task_used_spe == current)
-                last_task_used_spe = NULL;
-        preempt_enable();
-#endif
-        return 0;
-}
-
-/*
- * Restore the user process's signal mask
- */
-static void
-restore_sigmask(sigset_t *set)
-{
-        sigdelsetmask(set, ~_BLOCKABLE);
-        spin_lock_irq(&current->sighand->siglock);
-        current->blocked = *set;
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-}
-
-/*
- * Set up a signal frame for a "real-time" signal handler
- * (one which gets siginfo).
- */
-static void
-handle_rt_signal(unsigned long sig, struct k_sigaction *ka,
-                 siginfo_t *info, sigset_t *oldset, struct pt_regs * regs,
-                 unsigned long newsp)
-{
-        struct rt_sigframe __user *rt_sf;
-        struct mcontext __user *frame;
-        unsigned long origsp = newsp;
-
-        /* Set up Signal Frame */
-        /* Put a Real Time Context onto stack */
-        newsp -= sizeof(*rt_sf);
-        rt_sf = (struct rt_sigframe __user *) newsp;
-
-        /* create a stack frame for the caller of the handler */
-        newsp -= __SIGNAL_FRAMESIZE + 16;
-
-        if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp))
-                goto badframe;
-
-        /* Put the siginfo & fill in most of the ucontext */
-        if (copy_siginfo_to_user(&rt_sf->info, info)
-            || __put_user(0, &rt_sf->uc.uc_flags)
-            || __put_user(0, &rt_sf->uc.uc_link)
-            || __put_user(current->sas_ss_sp, &rt_sf->uc.uc_stack.ss_sp)
-            || __put_user(sas_ss_flags(regs->gpr[1]),
-                          &rt_sf->uc.uc_stack.ss_flags)
-            || __put_user(current->sas_ss_size, &rt_sf->uc.uc_stack.ss_size)
-            || __put_user(&rt_sf->uc.uc_mcontext, &rt_sf->uc.uc_regs)
-            || __copy_to_user(&rt_sf->uc.uc_sigmask, oldset, sizeof(*oldset)))
-                goto badframe;
-
-        /* Save user registers on the stack */
-        frame = &rt_sf->uc.uc_mcontext;
-        if (save_user_regs(regs, frame, __NR_rt_sigreturn))
-                goto badframe;
-
-        if (put_user(regs->gpr[1], (unsigned long __user *)newsp))
-                goto badframe;
-        regs->gpr[1] = newsp;
-        regs->gpr[3] = sig;
-        regs->gpr[4] = (unsigned long) &rt_sf->info;
-        regs->gpr[5] = (unsigned long) &rt_sf->uc;
-        regs->gpr[6] = (unsigned long) rt_sf;
-        regs->nip = (unsigned long) ka->sa.sa_handler;
-        regs->link = (unsigned long) frame->tramp;
-        regs->trap = 0;
-
-        return;
-
-badframe:
-#ifdef DEBUG_SIG
-        printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
-               regs, frame, newsp);
-#endif
-        force_sigsegv(sig, current);
-}
-
-static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
-{
-        sigset_t set;
-        struct mcontext __user *mcp;
-
-        if (__copy_from_user(&set, &ucp->uc_sigmask, sizeof(set))
-            || __get_user(mcp, &ucp->uc_regs))
-                return -EFAULT;
-        restore_sigmask(&set);
-        if (restore_user_regs(regs, mcp, sig))
-                return -EFAULT;
-
-        return 0;
-}
-
-int sys_swapcontext(struct ucontext __user *old_ctx,
-                    struct ucontext __user *new_ctx,
-                    int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
-{
-        unsigned char tmp;
-
-        /* Context size is for future use. Right now, we only make sure
-         * we are passed something we understand
-         */
-        if (ctx_size < sizeof(struct ucontext))
-                return -EINVAL;
-
-        if (old_ctx != NULL) {
-                if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx))
-                    || save_user_regs(regs, &old_ctx->uc_mcontext, 0)
-                    || __copy_to_user(&old_ctx->uc_sigmask,
-                                      &current->blocked, sizeof(sigset_t))
-                    || __put_user(&old_ctx->uc_mcontext, &old_ctx->uc_regs))
-                        return -EFAULT;
-        }
-        if (new_ctx == NULL)
-                return 0;
-        if (!access_ok(VERIFY_READ, new_ctx, sizeof(*new_ctx))
-            || __get_user(tmp, (u8 __user *) new_ctx)
-            || __get_user(tmp, (u8 __user *) (new_ctx + 1) - 1))
-                return -EFAULT;
-
-        /*
-         * If we get a fault copying the context into the kernel's
-         * image of the user's registers, we can't just return -EFAULT
-         * because the user's registers will be corrupted.  For instance
-         * the NIP value may have been updated but not some of the
-         * other registers.  Given that we have done the access_ok
-         * and successfully read the first and last bytes of the region
-         * above, this should only happen in an out-of-memory situation
-         * or if another thread unmaps the region containing the context.
-         * We kill the task with a SIGSEGV in this situation.
-         */
-        if (do_setcontext(new_ctx, regs, 0))
-                do_exit(SIGSEGV);
-        sigreturn_exit(regs);
-        /* doesn't actually return back to here */
-        return 0;
-}
-
-int sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
-                     struct pt_regs *regs)
-{
-        struct rt_sigframe __user *rt_sf;
-
-        /* Always make any pending restarted system calls return -EINTR */
-        current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
-        rt_sf = (struct rt_sigframe __user *)
-                (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
-        if (!access_ok(VERIFY_READ, rt_sf, sizeof(struct rt_sigframe)))
-                goto bad;
-        if (do_setcontext(&rt_sf->uc, regs, 1))
-                goto bad;
-
-        /*
-         * It's not clear whether or why it is desirable to save the
-         * sigaltstack setting on signal delivery and restore it on
-         * signal return.  But other architectures do this and we have
-         * always done it up until now so it is probably better not to
-         * change it.  -- paulus
-         */
-        do_sigaltstack(&rt_sf->uc.uc_stack, NULL, regs->gpr[1]);
-
-        sigreturn_exit(regs);           /* doesn't return here */
-        return 0;
-
- bad:
-        force_sig(SIGSEGV, current);
-        return 0;
-}
-
-int sys_debug_setcontext(struct ucontext __user *ctx,
-                         int ndbg, struct sig_dbg_op __user *dbg,
-                         int r6, int r7, int r8,
-                         struct pt_regs *regs)
-{
-        struct sig_dbg_op op;
-        int i;
-        unsigned long new_msr = regs->msr;
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
-        unsigned long new_dbcr0 = current->thread.dbcr0;
-#endif
-
-        for (i=0; i<ndbg; i++) {
-                if (__copy_from_user(&op, dbg, sizeof(op)))
-                        return -EFAULT;
-                switch (op.dbg_type) {
-                case SIG_DBG_SINGLE_STEPPING:
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
-                        if (op.dbg_value) {
-                                new_msr |= MSR_DE;
-                                new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
-                        } else {
-                                new_msr &= ~MSR_DE;
-                                new_dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
-                        }
-#else
-                        if (op.dbg_value)
-                                new_msr |= MSR_SE;
-                        else
-                                new_msr &= ~MSR_SE;
-#endif
-                        break;
-                case SIG_DBG_BRANCH_TRACING:
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
-                        return -EINVAL;
-#else
-                        if (op.dbg_value)
-                                new_msr |= MSR_BE;
-                        else
-                                new_msr &= ~MSR_BE;
-#endif
-                        break;
-
-                default:
-                        return -EINVAL;
-                }
-        }
-
-        /* We wait until here to actually install the values in the
-           registers so if we fail in the above loop, it will not
-           affect the contents of these registers.  After this point,
-           failure is a problem, anyway, and it's very unlikely unless
-           the user is really doing something wrong. */
-        regs->msr = new_msr;
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
-        current->thread.dbcr0 = new_dbcr0;
-#endif
-
-        /*
-         * If we get a fault copying the context into the kernel's
-         * image of the user's registers, we can't just return -EFAULT
-         * because the user's registers will be corrupted.  For instance
-         * the NIP value may have been updated but not some of the
-         * other registers.  Given that we have done the access_ok
-         * and successfully read the first and last bytes of the region
-         * above, this should only happen in an out-of-memory situation
-         * or if another thread unmaps the region containing the context.
-         * We kill the task with a SIGSEGV in this situation.
-         */
-        if (do_setcontext(ctx, regs, 1)) {
-                force_sig(SIGSEGV, current);
-                goto out;
-        }
-
-        /*
-         * It's not clear whether or why it is desirable to save the
-         * sigaltstack setting on signal delivery and restore it on
-         * signal return.  But other architectures do this and we have
-         * always done it up until now so it is probably better not to
-         * change it.  -- paulus
-         */
-        do_sigaltstack(&ctx->uc_stack, NULL, regs->gpr[1]);
-
-        sigreturn_exit(regs);
-        /* doesn't actually return back to here */
-
- out:
-        return 0;
-}
-
-/*
- * OK, we're invoking a handler
- */
-static void
-handle_signal(unsigned long sig, struct k_sigaction *ka,
-              siginfo_t *info, sigset_t *oldset, struct pt_regs * regs,
-              unsigned long newsp)
-{
-        struct sigcontext __user *sc;
-        struct sigregs __user *frame;
-        unsigned long origsp = newsp;
-
-        /* Set up Signal Frame */
-        newsp -= sizeof(struct sigregs);
-        frame = (struct sigregs __user *) newsp;
-
-        /* Put a sigcontext on the stack */
-        newsp -= sizeof(*sc);
-        sc = (struct sigcontext __user *) newsp;
-
-        /* create a stack frame for the caller of the handler */
-        newsp -= __SIGNAL_FRAMESIZE;
-
-        if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp))
-                goto badframe;
-
-#if _NSIG != 64
-#error "Please adjust handle_signal()"
-#endif
-        if (__put_user((unsigned long) ka->sa.sa_handler, &sc->handler)
-            || __put_user(oldset->sig[0], &sc->oldmask)
-            || __put_user(oldset->sig[1], &sc->_unused[3])
-            || __put_user((struct pt_regs __user *)frame, &sc->regs)
-            || __put_user(sig, &sc->signal))
-                goto badframe;
-
-        if (save_user_regs(regs, &frame->mctx, __NR_sigreturn))
-                goto badframe;
-
-        if (put_user(regs->gpr[1], (unsigned long __user *)newsp))
-                goto badframe;
-        regs->gpr[1] = newsp;
-        regs->gpr[3] = sig;
-        regs->gpr[4] = (unsigned long) sc;
-        regs->nip = (unsigned long) ka->sa.sa_handler;
-        regs->link = (unsigned long) frame->mctx.tramp;
-        regs->trap = 0;
-
-        return;
-
-badframe:
-#ifdef DEBUG_SIG
-        printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
-               regs, frame, newsp);
-#endif
-        force_sigsegv(sig, current);
-}
-
-/*
- * Do a signal return; undo the signal stack.
- */
-int sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
-                  struct pt_regs *regs)
-{
-        struct sigcontext __user *sc;
-        struct sigcontext sigctx;
-        struct mcontext __user *sr;
-        sigset_t set;
-
-        /* Always make any pending restarted system calls return -EINTR */
-        current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
-        sc = (struct sigcontext __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
-        if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
-                goto badframe;
-
-        set.sig[0] = sigctx.oldmask;
-        set.sig[1] = sigctx._unused[3];
-        restore_sigmask(&set);
-
-        sr = (struct mcontext __user *) sigctx.regs;
-        if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
-            || restore_user_regs(regs, sr, 1))
-                goto badframe;
-
-        sigreturn_exit(regs);           /* doesn't return */
-        return 0;
-
-badframe:
-        force_sig(SIGSEGV, current);
-        return 0;
-}
-
-/*
- * Note that 'init' is a special process: it doesn't get signals it doesn't
- * want to handle. Thus you cannot kill init even with a SIGKILL even by
- * mistake.
- */
-int do_signal(sigset_t *oldset, struct pt_regs *regs)
-{
-        siginfo_t info;
-        struct k_sigaction ka;
-        unsigned long frame, newsp;
-        int signr, ret;
-
-        if (try_to_freeze()) {
-                signr = 0;
-                if (!signal_pending(current))
-                        goto no_signal;
-        }
-
-        if (!oldset)
-                oldset = &current->blocked;
-
-        newsp = frame = 0;
-
-        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
- no_signal:
-        if (TRAP(regs) == 0x0C00                /* System Call! */
-            && regs->ccr & 0x10000000           /* error signalled */
-            && ((ret = regs->gpr[3]) == ERESTARTSYS
-                || ret == ERESTARTNOHAND || ret == ERESTARTNOINTR
-                || ret == ERESTART_RESTARTBLOCK)) {
-
-                if (signr > 0
-                    && (ret == ERESTARTNOHAND || ret == ERESTART_RESTARTBLOCK
-                        || (ret == ERESTARTSYS
-                            && !(ka.sa.sa_flags & SA_RESTART)))) {
-                        /* make the system call return an EINTR error */
-                        regs->result = -EINTR;
-                        regs->gpr[3] = EINTR;
-                        /* note that the cr0.SO bit is already set */
-                } else {
-                        regs->nip -= 4; /* Back up & retry system call */
-                        regs->result = 0;
-                        regs->trap = 0;
-                        if (ret == ERESTART_RESTARTBLOCK)
-                                regs->gpr[0] = __NR_restart_syscall;
-                        else
-                                regs->gpr[3] = regs->orig_gpr3;
-                }
-        }
-
-        if (signr == 0)
-                return 0;               /* no signals delivered */
-
-        if ((ka.sa.sa_flags & SA_ONSTACK) && current->sas_ss_size
-            && !on_sig_stack(regs->gpr[1]))
-                newsp = current->sas_ss_sp + current->sas_ss_size;
-        else
-                newsp = regs->gpr[1];
-        newsp &= ~0xfUL;
-
-        /* Whee!  Actually deliver the signal.  */
-        if (ka.sa.sa_flags & SA_SIGINFO)
-                handle_rt_signal(signr, &ka, &info, oldset, regs, newsp);
-        else
-                handle_signal(signr, &ka, &info, oldset, regs, newsp);
-
-        spin_lock_irq(&current->sighand->siglock);
-        sigorsets(&current->blocked,&current->blocked,&ka.sa.sa_mask);
-        if (!(ka.sa.sa_flags & SA_NODEFER))
-                sigaddset(&current->blocked, signr);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        return 1;
-}
-
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index 726fe7ce1747..bc5bf1124836 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -34,11 +34,11 @@
 #include <asm/thread_info.h>
 #include <asm/tlbflush.h>
 #include <asm/xmon.h>
+#include <asm/machdep.h>
 
 volatile int smp_commenced;
 int smp_tb_synchronized;
 struct cpuinfo_PPC cpu_data[NR_CPUS];
-struct klock_info_struct klock_info = { KLOCK_CLEAR, 0 };
 atomic_t ipi_recv;
 atomic_t ipi_sent;
 cpumask_t cpu_online_map;
@@ -51,7 +51,7 @@ EXPORT_SYMBOL(cpu_online_map);
 EXPORT_SYMBOL(cpu_possible_map);
 
 /* SMP operations for this machine */
-static struct smp_ops_t *smp_ops;
+struct smp_ops_t *smp_ops;
 
 /* all cpu mappings are 1-1 -- Cort */
 volatile unsigned long cpu_callin_map[NR_CPUS];
@@ -74,11 +74,11 @@ extern void __save_cpu_setup(void);
 #define PPC_MSG_XMON_BREAK      3
 
 static inline void
-smp_message_pass(int target, int msg, unsigned long data, int wait)
+smp_message_pass(int target, int msg)
 {
-        if (smp_ops){
+        if (smp_ops) {
                 atomic_inc(&ipi_sent);
-                smp_ops->message_pass(target,msg,data,wait);
+                smp_ops->message_pass(target, msg);
         }
 }
 
@@ -119,7 +119,7 @@ void smp_message_recv(int msg, struct pt_regs *regs)
 void smp_send_tlb_invalidate(int cpu)
 {
         if ( PVR_VER(mfspr(SPRN_PVR)) == 8 )
-                smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB, 0, 0);
+                smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB);
 }
 
 void smp_send_reschedule(int cpu)
@@ -135,13 +135,13 @@ void smp_send_reschedule(int cpu)
          */
         /* This is only used if `cpu' is running an idle task,
            so it will reschedule itself anyway... */
-        smp_message_pass(cpu, PPC_MSG_RESCHEDULE, 0, 0);
+        smp_message_pass(cpu, PPC_MSG_RESCHEDULE);
 }
 
 #ifdef CONFIG_XMON
 void smp_send_xmon_break(int cpu)
 {
-        smp_message_pass(cpu, PPC_MSG_XMON_BREAK, 0, 0);
+        smp_message_pass(cpu, PPC_MSG_XMON_BREAK);
 }
 #endif /* CONFIG_XMON */
 
@@ -224,7 +224,7 @@ static int __smp_call_function(void (*func) (void *info), void *info,
         spin_lock(&call_lock);
         call_data = &data;
         /* Send a message to all other CPUs and wait for them to respond */
-        smp_message_pass(target, PPC_MSG_CALL_FUNCTION, 0, 0);
+        smp_message_pass(target, PPC_MSG_CALL_FUNCTION);
 
         /* Wait for response */
         timeout = 1000000;
@@ -294,7 +294,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         smp_store_cpu_info(smp_processor_id());
         cpu_callin_map[smp_processor_id()] = 1;
 
-        smp_ops = ppc_md.smp_ops;
         if (smp_ops == NULL) {
                 printk("SMP not supported on this machine.\n");
                 return;
@@ -308,9 +307,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         /* Backup CPU 0 state */
         __save_cpu_setup();
 
-        if (smp_ops->space_timers)
-                smp_ops->space_timers(num_cpus);
-
         for_each_cpu(cpu) {
                 if (cpu == smp_processor_id())
                         continue;
diff --git a/arch/ppc/kernel/syscalls.c b/arch/ppc/kernel/syscalls.c
deleted file mode 100644
index 127f040de9de..000000000000
--- a/arch/ppc/kernel/syscalls.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/*
- * arch/ppc/kernel/sys_ppc.c
- *
- *  PowerPC version
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Derived from "arch/i386/kernel/sys_i386.c"
- * Adapted from the i386 version by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- * and Paul Mackerras (paulus@cs.anu.edu.au).
- *
- * This file contains various random system calls that
- * have a non-standard calling sequence on the Linux/PPC
- * platform.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/stat.h>
-#include <linux/syscalls.h>
-#include <linux/mman.h>
-#include <linux/sys.h>
-#include <linux/ipc.h>
-#include <linux/utsname.h>
-#include <linux/file.h>
-#include <linux/unistd.h>
-
-#include <asm/uaccess.h>
-#include <asm/ipc.h>
-#include <asm/semaphore.h>
-
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-int
-sys_ipc (uint call, int first, int second, int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        ret = -ENOSYS;
-        switch (call) {
-        case SEMOP:
-                ret = sys_semtimedop (first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-                break;
-        case SEMTIMEDOP:
-                ret = sys_semtimedop (first, (struct sembuf __user *)ptr,
-                                      second, (const struct timespec __user *) fifth);
-                break;
-        case SEMGET:
-                ret = sys_semget (first, second, third);
-                break;
-        case SEMCTL: {
-                union semun fourth;
-
-                if (!ptr)
-                        break;
-                if ((ret = access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT)
-                    || (ret = get_user(fourth.__pad, (void __user *__user *)ptr)))
-                        break;
-                ret = sys_semctl (first, second, third, fourth);
-                break;
-                }
-        case MSGSND:
-                ret = sys_msgsnd (first, (struct msgbuf __user *) ptr, second, third);
-                break;
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-
-                        if (!ptr)
-                                break;
-                        if ((ret = access_ok(VERIFY_READ, ptr, sizeof(tmp)) ? 0 : -EFAULT)
-                            || (ret = copy_from_user(&tmp,
-                                        (struct ipc_kludge __user *) ptr,
-                                        sizeof (tmp)) ? -EFAULT : 0))
-                                break;
-                        ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp,
-                                          third);
-                        break;
-                        }
-                default:
-                        ret = sys_msgrcv (first, (struct msgbuf __user *) ptr,
-                                          second, fifth, third);
-                        break;
-                }
-                break;
-        case MSGGET:
-                ret = sys_msgget ((key_t) first, second);
-                break;
-        case MSGCTL:
-                ret = sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-                break;
-        case SHMAT: {
-                ulong raddr;
-
-                if ((ret = access_ok(VERIFY_WRITE, (ulong __user *) third,
-                                       sizeof(ulong)) ? 0 : -EFAULT))
-                        break;
-                ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                if (ret)
-                        break;
-                ret = put_user (raddr, (ulong __user *) third);
-                break;
-                }
-        case SHMDT:
-                ret = sys_shmdt ((char __user *)ptr);
-                break;
-        case SHMGET:
-                ret = sys_shmget (first, second, third);
-                break;
-        case SHMCTL:
-                ret = sys_shmctl (first, second, (struct shmid_ds __user *) ptr);
-                break;
-        }
-
-        return ret;
-}
-
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way unix traditionally does this, though.
- */
-int sys_pipe(int __user *fildes)
-{
-        int fd[2];
-        int error;
-
-        error = do_pipe(fd);
-        if (!error) {
-                if (copy_to_user(fildes, fd, 2*sizeof(int)))
-                        error = -EFAULT;
-        }
-        return error;
-}
-
-static inline unsigned long
-do_mmap2(unsigned long addr, size_t len,
-         unsigned long prot, unsigned long flags,
-         unsigned long fd, unsigned long pgoff)
-{
-        struct file * file = NULL;
-        int ret = -EBADF;
-
-        flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-        if (!(flags & MAP_ANONYMOUS)) {
-                if (!(file = fget(fd)))
-                        goto out;
-        }
-
-        down_write(&current->mm->mmap_sem);
-        ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-        up_write(&current->mm->mmap_sem);
-        if (file)
-                fput(file);
-out:
-        return ret;
-}
-
-unsigned long sys_mmap2(unsigned long addr, size_t len,
-                        unsigned long prot, unsigned long flags,
-                        unsigned long fd, unsigned long pgoff)
-{
-        return do_mmap2(addr, len, prot, flags, fd, pgoff);
-}
-
-unsigned long sys_mmap(unsigned long addr, size_t len,
-                       unsigned long prot, unsigned long flags,
-                       unsigned long fd, off_t offset)
-{
-        int err = -EINVAL;
-
-        if (offset & ~PAGE_MASK)
-                goto out;
-
-        err = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
-out:
-        return err;
-}
-
-/*
- * Due to some executables calling the wrong select we sometimes
- * get wrong args.  This determines how the args are being passed
- * (a single ptr to them all args passed) then calls
- * sys_select() with the appropriate args. -- Cort
- */
-int
-ppc_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timeval __user *tvp)
-{
-        if ( (unsigned long)n >= 4096 )
-        {
-                unsigned long __user *buffer = (unsigned long __user *)n;
-                if (!access_ok(VERIFY_READ, buffer, 5*sizeof(unsigned long))
-                    || __get_user(n, buffer)
-                    || __get_user(inp, ((fd_set __user * __user *)(buffer+1)))
-                    || __get_user(outp, ((fd_set  __user * __user *)(buffer+2)))
-                    || __get_user(exp, ((fd_set  __user * __user *)(buffer+3)))
-                    || __get_user(tvp, ((struct timeval  __user * __user *)(buffer+4))))
-                        return -EFAULT;
-        }
-        return sys_select(n, inp, outp, exp, tvp);
-}
-
-int sys_uname(struct old_utsname __user * name)
-{
-        int err = -EFAULT;
-
-        down_read(&uts_sem);
-        if (name && !copy_to_user(name, &system_utsname, sizeof (*name)))
-                err = 0;
-        up_read(&uts_sem);
-        return err;
-}
-
-int sys_olduname(struct oldold_utsname __user * name)
-{
-        int error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-        error = __copy_to_user(&name->sysname,&system_utsname.sysname,__OLD_UTS_LEN);
-        error -= __put_user(0,name->sysname+__OLD_UTS_LEN);
-        error -= __copy_to_user(&name->nodename,&system_utsname.nodename,__OLD_UTS_LEN);
-        error -= __put_user(0,name->nodename+__OLD_UTS_LEN);
-        error -= __copy_to_user(&name->release,&system_utsname.release,__OLD_UTS_LEN);
-        error -= __put_user(0,name->release+__OLD_UTS_LEN);
-        error -= __copy_to_user(&name->version,&system_utsname.version,__OLD_UTS_LEN);
-        error -= __put_user(0,name->version+__OLD_UTS_LEN);
-        error -= __copy_to_user(&name->machine,&system_utsname.machine,__OLD_UTS_LEN);
-        error = __put_user(0,name->machine+__OLD_UTS_LEN);
-        up_read(&uts_sem);
-
-        error = error ? -EFAULT : 0;
-        return error;
-}
-
-/*
- * We put the arguments in a different order so we only use 6
- * registers for arguments, rather than 7 as sys_fadvise64_64 needs
- * (because `offset' goes in r5/r6).
- */
-long ppc_fadvise64_64(int fd, int advice, loff_t offset, loff_t len)
-{
-        return sys_fadvise64_64(fd, offset, len, advice);
-}
diff --git a/arch/ppc/kernel/time.c b/arch/ppc/kernel/time.c
index 22d7fd1e0aea..53ea723af60a 100644
--- a/arch/ppc/kernel/time.c
+++ b/arch/ppc/kernel/time.c
@@ -66,11 +66,6 @@
 
 #include <asm/time.h>
 
-/* XXX false sharing with below? */
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 unsigned long disarm_decr[NR_CPUS];
 
 extern struct timezone sys_tz;
@@ -121,6 +116,15 @@ unsigned long profile_pc(struct pt_regs *regs)
 EXPORT_SYMBOL(profile_pc);
 #endif
 
+void wakeup_decrementer(void)
+{
+        set_dec(tb_ticks_per_jiffy);
+        /* No currently-supported powerbook has a 601,
+         * so use get_tbl, not native
+         */
+        last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
+}
+
 /*
  * timer_interrupt - gets called when the decrementer overflows,
  * with interrupts disabled.
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 961ede87be72..f265b81e7008 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -41,9 +41,14 @@
 #ifdef CONFIG_PMAC_BACKLIGHT
 #include <asm/backlight.h>
 #endif
-#include <asm/perfmon.h>
+#include <asm/pmc.h>
 
 #ifdef CONFIG_XMON
+extern int xmon_bpt(struct pt_regs *regs);
+extern int xmon_sstep(struct pt_regs *regs);
+extern int xmon_iabr_match(struct pt_regs *regs);
+extern int xmon_dabr_match(struct pt_regs *regs);
+
 void (*debugger)(struct pt_regs *regs) = xmon;
 int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
 int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
@@ -74,7 +79,7 @@ void (*debugger_fault_handler)(struct pt_regs *regs);
 
 DEFINE_SPINLOCK(die_lock);
 
-void die(const char * str, struct pt_regs * fp, long err)
+int die(const char * str, struct pt_regs * fp, long err)
 {
         static int die_counter;
         int nl = 0;
@@ -232,7 +237,7 @@ platform_machine_check(struct pt_regs *regs)
 {
 }
 
-void MachineCheckException(struct pt_regs *regs)
+void machine_check_exception(struct pt_regs *regs)
 {
         unsigned long reason = get_mc_reason(regs);
 
@@ -393,14 +398,14 @@ void SMIException(struct pt_regs *regs)
 #endif
 }
 
-void UnknownException(struct pt_regs *regs)
+void unknown_exception(struct pt_regs *regs)
 {
         printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx    %s\n",
                regs->nip, regs->msr, regs->trap, print_tainted());
         _exception(SIGTRAP, regs, 0, 0);
 }
 
-void InstructionBreakpoint(struct pt_regs *regs)
+void instruction_breakpoint_exception(struct pt_regs *regs)
 {
         if (debugger_iabr_match(regs))
                 return;
@@ -575,7 +580,7 @@ extern struct bug_entry __start___bug_table[], __stop___bug_table[];
 #define module_find_bug(x)      NULL
 #endif
 
-static struct bug_entry *find_bug(unsigned long bugaddr)
+struct bug_entry *find_bug(unsigned long bugaddr)
 {
         struct bug_entry *bug;
 
@@ -622,7 +627,7 @@ int check_bug_trap(struct pt_regs *regs)
         return 0;
 }
 
-void ProgramCheckException(struct pt_regs *regs)
+void program_check_exception(struct pt_regs *regs)
 {
         unsigned int reason = get_reason(regs);
         extern int do_mathemu(struct pt_regs *regs);
@@ -654,7 +659,7 @@ void ProgramCheckException(struct pt_regs *regs)
                         giveup_fpu(current);
                 preempt_enable();
 
-                fpscr = current->thread.fpscr;
+                fpscr = current->thread.fpscr.val;
                 fpscr &= fpscr << 22;   /* mask summary bits with enables */
                 if (fpscr & FPSCR_VX)
                         code = FPE_FLTINV;
@@ -701,7 +706,7 @@ void ProgramCheckException(struct pt_regs *regs)
                 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
 }
 
-void SingleStepException(struct pt_regs *regs)
+void single_step_exception(struct pt_regs *regs)
 {
         regs->msr &= ~(MSR_SE | MSR_BE);  /* Turn off 'trace' bits */
         if (debugger_sstep(regs))
@@ -709,7 +714,7 @@ void SingleStepException(struct pt_regs *regs)
         _exception(SIGTRAP, regs, TRAP_TRACE, 0);
 }
 
-void AlignmentException(struct pt_regs *regs)
+void alignment_exception(struct pt_regs *regs)
 {
         int fixed;
 
@@ -814,7 +819,18 @@ void TAUException(struct pt_regs *regs)
 }
 #endif /* CONFIG_INT_TAU */
 
-void AltivecUnavailException(struct pt_regs *regs)
+/*
+ * FP unavailable trap from kernel - print a message, but let
+ * the task use FP in the kernel until it returns to user mode.
+ */
+void kernel_fp_unavailable_exception(struct pt_regs *regs)
+{
+        regs->msr |= MSR_FP;
+        printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n",
+               current, regs->nip);
+}
+
+void altivec_unavailable_exception(struct pt_regs *regs)
 {
         static int kernel_altivec_count;
 
@@ -835,7 +851,7 @@ void AltivecUnavailException(struct pt_regs *regs)
 }
 
 #ifdef CONFIG_ALTIVEC
-void AltivecAssistException(struct pt_regs *regs)
+void altivec_assist_exception(struct pt_regs *regs)
 {
         int err;
 
@@ -872,7 +888,7 @@ void AltivecAssistException(struct pt_regs *regs)
 #endif /* CONFIG_ALTIVEC */
 
 #ifdef CONFIG_E500
-void PerformanceMonitorException(struct pt_regs *regs)
+void performance_monitor_exception(struct pt_regs *regs)
 {
         perf_irq(regs);
 }
diff --git a/arch/ppc/kernel/vector.S b/arch/ppc/kernel/vector.S
deleted file mode 100644
index 82a21346bf80..000000000000
--- a/arch/ppc/kernel/vector.S
+++ /dev/null
@@ -1,217 +0,0 @@
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-
-/*
- * The routines below are in assembler so we can closely control the
- * usage of floating-point registers.  These routines must be called
- * with preempt disabled.
- */
-        .data
-fpzero:
-        .long   0
-fpone:
-        .long   0x3f800000      /* 1.0 in single-precision FP */
-fphalf:
-        .long   0x3f000000      /* 0.5 in single-precision FP */
-
-        .text
-/*
- * Internal routine to enable floating point and set FPSCR to 0.
- * Don't call it from C; it doesn't use the normal calling convention.
- */
-fpenable:
-        mfmsr   r10
-        ori     r11,r10,MSR_FP
-        mtmsr   r11
-        isync
-        stfd    fr0,24(r1)
-        stfd    fr1,16(r1)
-        stfd    fr31,8(r1)
-        lis     r11,fpzero@ha
-        mffs    fr31
-        lfs     fr1,fpzero@l(r11)
-        mtfsf   0xff,fr1
-        blr
-
-fpdisable:
-        mtfsf   0xff,fr31
-        lfd     fr31,8(r1)
-        lfd     fr1,16(r1)
-        lfd     fr0,24(r1)
-        mtmsr   r10
-        isync
-        blr
-
-/*
- * Vector add, floating point.
- */
-        .globl  vaddfp
-vaddfp:
-        stwu    r1,-32(r1)
-        mflr    r0
-        stw     r0,36(r1)
-        bl      fpenable
-        li      r0,4
-        mtctr   r0
-        li      r6,0
-1:      lfsx    fr0,r4,r6
-        lfsx    fr1,r5,r6
-        fadds   fr0,fr0,fr1
-        stfsx   fr0,r3,r6
-        addi    r6,r6,4
-        bdnz    1b
-        bl      fpdisable
-        lwz     r0,36(r1)
-        mtlr    r0
-        addi    r1,r1,32
-        blr
-
-/*
- * Vector subtract, floating point.
- */
-        .globl  vsubfp
-vsubfp:
-        stwu    r1,-32(r1)
-        mflr    r0
-        stw     r0,36(r1)
-        bl      fpenable
-        li      r0,4
-        mtctr   r0
-        li      r6,0
-1:      lfsx    fr0,r4,r6
-        lfsx    fr1,r5,r6
-        fsubs   fr0,fr0,fr1
-        stfsx   fr0,r3,r6
-        addi    r6,r6,4
-        bdnz    1b
-        bl      fpdisable
-        lwz     r0,36(r1)
-        mtlr    r0
-        addi    r1,r1,32
-        blr
-
-/*
- * Vector multiply and add, floating point.
- */
-        .globl  vmaddfp
-vmaddfp:
-        stwu    r1,-48(r1)
-        mflr    r0
-        stw     r0,52(r1)
-        bl      fpenable
-        stfd    fr2,32(r1)
-        li      r0,4
-        mtctr   r0
-        li      r7,0
-1:      lfsx    fr0,r4,r7
-        lfsx    fr1,r5,r7
-        lfsx    fr2,r6,r7
-        fmadds  fr0,fr0,fr2,fr1
-        stfsx   fr0,r3,r7
-        addi    r7,r7,4
-        bdnz    1b
-        lfd     fr2,32(r1)
-        bl      fpdisable
-        lwz     r0,52(r1)
-        mtlr    r0
-        addi    r1,r1,48
-        blr
-
-/*
- * Vector negative multiply and subtract, floating point.
- */
-        .globl  vnmsubfp
-vnmsubfp:
-        stwu    r1,-48(r1)
-        mflr    r0
-        stw     r0,52(r1)
-        bl      fpenable
-        stfd    fr2,32(r1)
-        li      r0,4
-        mtctr   r0
-        li      r7,0
-1:      lfsx    fr0,r4,r7
-        lfsx    fr1,r5,r7
-        lfsx    fr2,r6,r7
-        fnmsubs fr0,fr0,fr2,fr1
-        stfsx   fr0,r3,r7
-        addi    r7,r7,4
-        bdnz    1b
-        lfd     fr2,32(r1)
-        bl      fpdisable
-        lwz     r0,52(r1)
-        mtlr    r0
-        addi    r1,r1,48
-        blr
-
-/*
- * Vector reciprocal estimate.  We just compute 1.0/x.
- * r3 -> destination, r4 -> source.
- */
-        .globl  vrefp
-vrefp:
-        stwu    r1,-32(r1)
-        mflr    r0
-        stw     r0,36(r1)
-        bl      fpenable
-        lis     r9,fpone@ha
-        li      r0,4
-        lfs     fr1,fpone@l(r9)
-        mtctr   r0
-        li      r6,0
-1:      lfsx    fr0,r4,r6
-        fdivs   fr0,fr1,fr0
-        stfsx   fr0,r3,r6
-        addi    r6,r6,4
-        bdnz    1b
-        bl      fpdisable
-        lwz     r0,36(r1)
-        mtlr    r0
-        addi    r1,r1,32
-        blr
-
-/*
- * Vector reciprocal square-root estimate, floating point.
- * We use the frsqrte instruction for the initial estimate followed
- * by 2 iterations of Newton-Raphson to get sufficient accuracy.
- * r3 -> destination, r4 -> source.
- */
-        .globl  vrsqrtefp
-vrsqrtefp:
-        stwu    r1,-48(r1)
-        mflr    r0
-        stw     r0,52(r1)
-        bl      fpenable
-        stfd    fr2,32(r1)
-        stfd    fr3,40(r1)
-        stfd    fr4,48(r1)
-        stfd    fr5,56(r1)
-        lis     r9,fpone@ha
-        lis     r8,fphalf@ha
-        li      r0,4
-        lfs     fr4,fpone@l(r9)
-        lfs     fr5,fphalf@l(r8)
-        mtctr   r0
-        li      r6,0
-1:      lfsx    fr0,r4,r6
-        frsqrte fr1,fr0         /* r = frsqrte(s) */
-        fmuls   fr3,fr1,fr0     /* r * s */
-        fmuls   fr2,fr1,fr5     /* r * 0.5 */
-        fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
-        fmadds  fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
-        fmuls   fr3,fr1,fr0     /* r * s */
-        fmuls   fr2,fr1,fr5     /* r * 0.5 */
-        fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
-        fmadds  fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
-        stfsx   fr1,r3,r6
-        addi    r6,r6,4
-        bdnz    1b
-        lfd     fr5,56(r1)
-        lfd     fr4,48(r1)
-        lfd     fr3,40(r1)
-        lfd     fr2,32(r1)
-        bl      fpdisable
-        lwz     r0,36(r1)
-        mtlr    r0
-        addi    r1,r1,32
-        blr
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S
index 17d2db7e537d..09c6525cfa61 100644
--- a/arch/ppc/kernel/vmlinux.lds.S
+++ b/arch/ppc/kernel/vmlinux.lds.S
@@ -149,32 +149,6 @@ SECTIONS
 
   . = ALIGN(4096);
   _sextratext = .;
-  __pmac_begin = .;
-  .pmac.text : { *(.pmac.text) }
-  .pmac.data : { *(.pmac.data) }
-  . = ALIGN(4096);
-  __pmac_end = .;
-
-  . = ALIGN(4096);
-  __prep_begin = .;
-  .prep.text : { *(.prep.text) }
-  .prep.data : { *(.prep.data) }
-  . = ALIGN(4096);
-  __prep_end = .;
-
-  . = ALIGN(4096);
-  __chrp_begin = .;
-  .chrp.text : { *(.chrp.text) }
-  .chrp.data : { *(.chrp.data) }
-  . = ALIGN(4096);
-  __chrp_end = .;
-
-  . = ALIGN(4096);
-  __openfirmware_begin = .;
-  .openfirmware.text : { *(.openfirmware.text) }
-  .openfirmware.data : { *(.openfirmware.data) }
-  . = ALIGN(4096);
-  __openfirmware_end = .;
   _eextratext = .;
 
   __bss_start = .;
diff --git a/arch/ppc/lib/string.S b/arch/ppc/lib/string.S
index 36c9b97fd92a..2e258c49e8be 100644
--- a/arch/ppc/lib/string.S
+++ b/arch/ppc/lib/string.S
@@ -65,9 +65,9 @@
         .stabs  "arch/ppc/lib/",N_SO,0,0,0f
         .stabs  "string.S",N_SO,0,0,0f
 
-CACHELINE_BYTES = L1_CACHE_LINE_SIZE
-LG_CACHELINE_BYTES = LG_L1_CACHE_LINE_SIZE
-CACHELINE_MASK = (L1_CACHE_LINE_SIZE-1)
+CACHELINE_BYTES = L1_CACHE_BYTES
+LG_CACHELINE_BYTES = L1_CACHE_SHIFT
+CACHELINE_MASK = (L1_CACHE_BYTES-1)
 
 _GLOBAL(strcpy)
         addi    r5,r3,-1
@@ -265,12 +265,12 @@ _GLOBAL(cacheable_memcpy)
         dcbz    r11,r6
 #endif
         COPY_16_BYTES
-#if L1_CACHE_LINE_SIZE >= 32
+#if L1_CACHE_BYTES >= 32
         COPY_16_BYTES
-#if L1_CACHE_LINE_SIZE >= 64
+#if L1_CACHE_BYTES >= 64
         COPY_16_BYTES
         COPY_16_BYTES
-#if L1_CACHE_LINE_SIZE >= 128
+#if L1_CACHE_BYTES >= 128
         COPY_16_BYTES
         COPY_16_BYTES
         COPY_16_BYTES
@@ -485,12 +485,12 @@ _GLOBAL(__copy_tofrom_user)
         .text
 /* the main body of the cacheline loop */
         COPY_16_BYTES_WITHEX(0)
-#if L1_CACHE_LINE_SIZE >= 32
+#if L1_CACHE_BYTES >= 32
         COPY_16_BYTES_WITHEX(1)
-#if L1_CACHE_LINE_SIZE >= 64
+#if L1_CACHE_BYTES >= 64
         COPY_16_BYTES_WITHEX(2)
         COPY_16_BYTES_WITHEX(3)
-#if L1_CACHE_LINE_SIZE >= 128
+#if L1_CACHE_BYTES >= 128
         COPY_16_BYTES_WITHEX(4)
         COPY_16_BYTES_WITHEX(5)
         COPY_16_BYTES_WITHEX(6)
@@ -544,12 +544,12 @@ _GLOBAL(__copy_tofrom_user)
  * 104f (if in read part) or 105f (if in write part), after updating r5
  */
         COPY_16_BYTES_EXCODE(0)
-#if L1_CACHE_LINE_SIZE >= 32
+#if L1_CACHE_BYTES >= 32
         COPY_16_BYTES_EXCODE(1)
-#if L1_CACHE_LINE_SIZE >= 64
+#if L1_CACHE_BYTES >= 64
         COPY_16_BYTES_EXCODE(2)
         COPY_16_BYTES_EXCODE(3)
-#if L1_CACHE_LINE_SIZE >= 128
+#if L1_CACHE_BYTES >= 128
         COPY_16_BYTES_EXCODE(4)
         COPY_16_BYTES_EXCODE(5)
         COPY_16_BYTES_EXCODE(6)
diff --git a/arch/ppc/math-emu/sfp-machine.h b/arch/ppc/math-emu/sfp-machine.h
index 686e06d29186..4b17d83cfcdd 100644
--- a/arch/ppc/math-emu/sfp-machine.h
+++ b/arch/ppc/math-emu/sfp-machine.h
@@ -166,7 +166,7 @@ extern int  fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);
 #include <linux/kernel.h>
 #include <linux/sched.h>
 
-#define __FPU_FPSCR     (current->thread.fpscr)
+#define __FPU_FPSCR     (current->thread.fpscr.val)
 
 /* We only actually write to the destination register
  * if exceptions signalled (if any) will not trap.
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index f421a4b337f6..99b48abd3296 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -69,15 +69,12 @@ int init_bootmem_done;
 int boot_mapsize;
 #ifdef CONFIG_PPC_PMAC
 unsigned long agp_special_page;
+EXPORT_SYMBOL(agp_special_page);
 #endif
 
 extern char _end[];
 extern char etext[], _stext[];
 extern char __init_begin, __init_end;
-extern char __prep_begin, __prep_end;
-extern char __chrp_begin, __chrp_end;
-extern char __pmac_begin, __pmac_end;
-extern char __openfirmware_begin, __openfirmware_end;
 
 #ifdef CONFIG_HIGHMEM
 pte_t *kmap_pte;
@@ -167,14 +164,6 @@ void free_initmem(void)
 
         printk ("Freeing unused kernel memory:");
         FREESEC(init);
-        if (_machine != _MACH_Pmac)
-                FREESEC(pmac);
-        if (_machine != _MACH_chrp)
-                FREESEC(chrp);
-        if (_machine != _MACH_prep)
-                FREESEC(prep);
-        if (!have_of)
-                FREESEC(openfirmware);
         printk("\n");
         ppc_md.progress = NULL;
 #undef FREESEC
@@ -648,18 +637,16 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
  */
 int page_is_ram(unsigned long pfn)
 {
-        unsigned long paddr = (pfn << PAGE_SHIFT);
-
-        return paddr < __pa(high_memory);
+        return pfn < max_pfn;
 }
 
-pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
+pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
                               unsigned long size, pgprot_t vma_prot)
 {
         if (ppc_md.phys_mem_access_prot)
-                return ppc_md.phys_mem_access_prot(file, addr, size, vma_prot);
+                return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
 
-        if (!page_is_ram(addr >> PAGE_SHIFT))
+        if (!page_is_ram(pfn))
                 vma_prot = __pgprot(pgprot_val(vma_prot)
                                     | _PAGE_GUARDED | _PAGE_NO_CACHE);
         return vma_prot;
diff --git a/arch/ppc/oprofile/common.c b/arch/ppc/oprofile/common.c
deleted file mode 100644
index 3169c67abea7..000000000000
--- a/arch/ppc/oprofile/common.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * PPC 32 oprofile support
- * Based on PPC64 oprofile support
- * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * Copyright (C) Freescale Semiconductor, Inc 2004
- *
- * Author: Andy Fleming
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/oprofile.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/errno.h>
-#include <asm/ptrace.h>
-#include <asm/system.h>
-#include <asm/perfmon.h>
-#include <asm/cputable.h>
-
-#include "op_impl.h"
-
-static struct op_ppc32_model *model;
-
-static struct op_counter_config ctr[OP_MAX_COUNTER];
-static struct op_system_config sys;
-
-static void op_handle_interrupt(struct pt_regs *regs)
-{
-        model->handle_interrupt(regs, ctr);
-}
-
-static int op_ppc32_setup(void)
-{
-        /* Install our interrupt handler into the existing hook.  */
-        if(request_perfmon_irq(&op_handle_interrupt))
-                return -EBUSY;
-
-        mb();
-
-        /* Pre-compute the values to stuff in the hardware registers.  */
-        model->reg_setup(ctr, &sys, model->num_counters);
-
-#if 0
-        /* FIXME: Make multi-cpu work */
-        /* Configure the registers on all cpus.  */
-        on_each_cpu(model->reg_setup, NULL, 0, 1);
-#endif
-
-        return 0;
-}
-
-static void op_ppc32_shutdown(void)
-{
-        mb();
-
-        /* Remove our interrupt handler. We may be removing this module. */
-        free_perfmon_irq();
-}
-
-static void op_ppc32_cpu_start(void *dummy)
-{
-        model->start(ctr);
-}
-
-static int op_ppc32_start(void)
-{
-        on_each_cpu(op_ppc32_cpu_start, NULL, 0, 1);
-        return 0;
-}
-
-static inline void op_ppc32_cpu_stop(void *dummy)
-{
-        model->stop();
-}
-
-static void op_ppc32_stop(void)
-{
-        on_each_cpu(op_ppc32_cpu_stop, NULL, 0, 1);
-}
-
-static int op_ppc32_create_files(struct super_block *sb, struct dentry *root)
-{
-        int i;
-
-        for (i = 0; i < model->num_counters; ++i) {
-                struct dentry *dir;
-                char buf[3];
-
-                snprintf(buf, sizeof buf, "%d", i);
-                dir = oprofilefs_mkdir(sb, root, buf);
-
-                oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
-                oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
-                oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
-                oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
-                oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
-
-                /* FIXME: Not sure if this is used */
-                oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
-        }
-
-        oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel);
-        oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user);
-
-        /* Default to tracing both kernel and user */
-        sys.enable_kernel = 1;
-        sys.enable_user = 1;
-
-        return 0;
-}
-
-static struct oprofile_operations oprof_ppc32_ops = {
-        .create_files   = op_ppc32_create_files,
-        .setup          = op_ppc32_setup,
-        .shutdown       = op_ppc32_shutdown,
-        .start          = op_ppc32_start,
-        .stop           = op_ppc32_stop,
-        .cpu_type       = NULL          /* To be filled in below. */
-};
-
-int __init oprofile_arch_init(struct oprofile_operations *ops)
-{
-        char *name;
-        int cpu_id = smp_processor_id();
-
-#ifdef CONFIG_FSL_BOOKE
-        model = &op_model_fsl_booke;
-#else
-        return -ENODEV;
-#endif
-
-        name = kmalloc(32, GFP_KERNEL);
-
-        if (NULL == name)
-                return -ENOMEM;
-
-        sprintf(name, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name);
-
-        oprof_ppc32_ops.cpu_type = name;
-
-        model->num_counters = cur_cpu_spec[cpu_id]->num_pmcs;
-
-        *ops = oprof_ppc32_ops;
-
-        printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
-               oprof_ppc32_ops.cpu_type);
-
-        return 0;
-}
-
-void oprofile_arch_exit(void)
-{
-        kfree(oprof_ppc32_ops.cpu_type);
-        oprof_ppc32_ops.cpu_type = NULL;
-}
diff --git a/arch/ppc/oprofile/op_impl.h b/arch/ppc/oprofile/op_impl.h
deleted file mode 100644
index bc336dc971e3..000000000000
--- a/arch/ppc/oprofile/op_impl.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * Based on alpha version.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef OP_IMPL_H
-#define OP_IMPL_H 1
-
-#define OP_MAX_COUNTER 8
-
-/* Per-counter configuration as set via oprofilefs.  */
-struct op_counter_config {
-        unsigned long enabled;
-        unsigned long event;
-        unsigned long count;
-        unsigned long kernel;
-        unsigned long user;
-        unsigned long unit_mask;
-};
-
-/* System-wide configuration as set via oprofilefs.  */
-struct op_system_config {
-        unsigned long enable_kernel;
-        unsigned long enable_user;
-};
-
-/* Per-arch configuration */
-struct op_ppc32_model {
-        void (*reg_setup) (struct op_counter_config *,
-                           struct op_system_config *,
-                           int num_counters);
-        void (*start) (struct op_counter_config *);
-        void (*stop) (void);
-        void (*handle_interrupt) (struct pt_regs *,
-                                  struct op_counter_config *);
-        int num_counters;
-};
-
-#endif /* OP_IMPL_H */
diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c
index 78a403b48dba..159b228eca1e 100644
--- a/arch/ppc/platforms/4xx/bamboo.c
+++ b/arch/ppc/platforms/4xx/bamboo.c
@@ -51,7 +51,7 @@
 #include <syslib/gen550.h>
 #include <syslib/ibm440gx_common.h>
 
-bd_t __res;
+extern bd_t __res;
 
 static struct ibm44x_clocks clocks __initdata;
 
@@ -425,17 +425,7 @@ bamboo_setup_arch(void)
 void __init platform_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7)
 {
-        parse_bootinfo(find_bootinfo());
-
-        /*
-         * If we were passed in a board information, copy it into the
-         * residual data area.
-         */
-        if (r3)
-                __res = *(bd_t *)(r3 + KERNELBASE);
-
-
-        ibm44x_platform_init();
+        ibm44x_platform_init(r3, r4, r5, r6, r7);
 
         ppc_md.setup_arch = bamboo_setup_arch;
         ppc_md.show_cpuinfo = bamboo_show_cpuinfo;
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index 27b778ab903b..64ebae19cdbb 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -54,7 +54,7 @@
 #include <syslib/gen550.h>
 #include <syslib/ibm440gp_common.h>
 
-bd_t __res;
+extern bd_t __res;
 
 static struct ibm44x_clocks clocks __initdata;
 
@@ -90,7 +90,7 @@ ebony_calibrate_decr(void)
          * on Rev. C silicon then errata forces us to
          * use the internal clock.
          */
-        if (strcmp(cur_cpu_spec[0]->cpu_name, "440GP Rev. B") == 0)
+        if (strcmp(cur_cpu_spec->cpu_name, "440GP Rev. B") == 0)
                 freq = EBONY_440GP_RB_SYSCLK;
         else
                 freq = EBONY_440GP_RC_SYSCLK;
@@ -317,16 +317,7 @@ ebony_setup_arch(void)
 void __init platform_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7)
 {
-        parse_bootinfo(find_bootinfo());
-
-        /*
-         * If we were passed in a board information, copy it into the
-         * residual data area.
-         */
-        if (r3)
-                __res = *(bd_t *)(r3 + KERNELBASE);
-
-        ibm44x_platform_init();
+        ibm44x_platform_init(r3, r4, r5, r6, r7);
 
         ppc_md.setup_arch = ebony_setup_arch;
         ppc_md.show_cpuinfo = ebony_show_cpuinfo;
diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c
index 16d953bda22c..d810b736d9bf 100644
--- a/arch/ppc/platforms/4xx/luan.c
+++ b/arch/ppc/platforms/4xx/luan.c
@@ -52,7 +52,7 @@
 #include <syslib/ibm440gx_common.h>
 #include <syslib/ibm440sp_common.h>
 
-bd_t __res;
+extern bd_t __res;
 
 static struct ibm44x_clocks clocks __initdata;
 
@@ -355,16 +355,7 @@ luan_setup_arch(void)
 void __init platform_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7)
 {
-        parse_bootinfo(find_bootinfo());
-
-        /*
-         * If we were passed in a board information, copy it into the
-         * residual data area.
-         */
-        if (r3)
-                __res = *(bd_t *)(r3 + KERNELBASE);
-
-        ibm44x_platform_init();
+        ibm44x_platform_init(r3, r4, r5, r6, r7);
 
         ppc_md.setup_arch = luan_setup_arch;
         ppc_md.show_cpuinfo = luan_show_cpuinfo;
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 506949c5dd29..73b2c98158f6 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -52,7 +52,7 @@
 #include <syslib/gen550.h>
 #include <syslib/ibm440gx_common.h>
 
-bd_t __res;
+extern bd_t __res;
 
 static struct ibm44x_clocks clocks __initdata;
 
@@ -286,6 +286,15 @@ ocotea_setup_arch(void)
 
         ibm440gx_tah_enable();
 
+        /*
+         * Determine various clocks.
+         * To be completely correct we should get SysClk
+         * from FPGA, because it can be changed by on-board switches
+         * --ebs
+         */
+        ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
+        ocp_sys_info.opb_bus_freq = clocks.opb;
+
         /* Setup TODC access */
         TODC_INIT(TODC_TYPE_DS1743,
                         0,
@@ -324,25 +333,7 @@ static void __init ocotea_init(void)
 void __init platform_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7)
 {
-        parse_bootinfo(find_bootinfo());
-
-        /*
-         * If we were passed in a board information, copy it into the
-         * residual data area.
-         */
-        if (r3)
-                __res = *(bd_t *)(r3 + KERNELBASE);
-
-        /*
-         * Determine various clocks.
-         * To be completely correct we should get SysClk
-         * from FPGA, because it can be changed by on-board switches
-         * --ebs
-         */
-        ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
-        ocp_sys_info.opb_bus_freq = clocks.opb;
-
-        ibm44x_platform_init();
+        ibm44x_platform_init(r3, r4, r5, r6, r7);
 
         ppc_md.setup_arch = ocotea_setup_arch;
         ppc_md.show_cpuinfo = ocotea_show_cpuinfo;
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index 1584cd77a9ef..58e44c042535 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -19,7 +19,6 @@
 
 #include <linux/config.h>
 #include <linux/init.h>
-#include <linux/seq_file.h>
 #include <syslib/ppc83xx_setup.h>
 #include <asm/ppcboot.h>
 
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index 7dc8a68acfd0..7e952c1228cb 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -52,6 +52,10 @@
 
 #include <syslib/ppc85xx_setup.h>
 
+static const char *GFAR_PHY_0 = "phy0:0";
+static const char *GFAR_PHY_1 = "phy0:1";
+static const char *GFAR_PHY_3 = "phy0:3";
+
 /* ************************************************************************
  *
  * Setup the architecture
@@ -63,6 +67,7 @@ mpc8540ads_setup_arch(void)
         bd_t *binfo = (bd_t *) __res;
         unsigned int freq;
         struct gianfar_platform_data *pdata;
+        struct gianfar_mdio_data *mdata;
 
         /* get the core frequency */
         freq = binfo->bi_intfreq;
@@ -89,34 +94,35 @@ mpc8540ads_setup_arch(void)
         invalidate_tlbcam_entry(num_tlbcam_entries - 1);
 #endif
 
+        /* setup the board related info for the MDIO bus */
+        mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
+
+        mdata->irq[0] = MPC85xx_IRQ_EXT5;
+        mdata->irq[1] = MPC85xx_IRQ_EXT5;
+        mdata->irq[2] = -1;
+        mdata->irq[3] = MPC85xx_IRQ_EXT5;
+        mdata->irq[31] = -1;
+        mdata->paddr += binfo->bi_immr_base;
+
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 0;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_0;
                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 1;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_1;
                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
         if (pdata) {
                 pdata->board_flags = 0;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 3;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_3;
                 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
         }
 
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
index 8841fd7da6ee..208433f1e93a 100644
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8560_ads.c
@@ -56,6 +56,10 @@
 #include <syslib/ppc85xx_setup.h>
 
 
+static const char *GFAR_PHY_0 = "phy0:0";
+static const char *GFAR_PHY_1 = "phy0:1";
+static const char *GFAR_PHY_3 = "phy0:3";
+
 /* ************************************************************************
  *
  * Setup the architecture
@@ -68,6 +72,7 @@ mpc8560ads_setup_arch(void)
         bd_t *binfo = (bd_t *) __res;
         unsigned int freq;
         struct gianfar_platform_data *pdata;
+        struct gianfar_mdio_data *mdata;
 
         cpm2_reset();
 
@@ -86,24 +91,28 @@ mpc8560ads_setup_arch(void)
         mpc85xx_setup_hose();
 #endif
 
+        /* setup the board related info for the MDIO bus */
+        mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
+
+        mdata->irq[0] = MPC85xx_IRQ_EXT5;
+        mdata->irq[1] = MPC85xx_IRQ_EXT5;
+        mdata->irq[2] = -1;
+        mdata->irq[3] = MPC85xx_IRQ_EXT5;
+        mdata->irq[31] = -1;
+        mdata->paddr += binfo->bi_immr_base;
+
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 0;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_0;
                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 1;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_1;
                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
         }
 
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
index 3875e839cff7..84acf6e8d45e 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
@@ -19,7 +19,6 @@
 
 #include <linux/config.h>
 #include <linux/init.h>
-#include <linux/seq_file.h>
 #include <asm/ppcboot.h>
 
 #define BOARD_CCSRBAR           ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
index 9f9039498ae5..a21156967a5e 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -173,10 +173,7 @@ mpc85xx_cds_init_IRQ(void)
 #ifdef CONFIG_PCI
         openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
 
-        for (i = 0; i < NUM_8259_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-
-        i8259_init(0);
+        i8259_init(0, 0);
 #endif
 
 #ifdef CONFIG_CPM2
@@ -394,6 +391,9 @@ mpc85xx_cds_pcibios_fixup(void)
 
 TODC_ALLOC();
 
+static const char *GFAR_PHY_0 = "phy0:0";
+static const char *GFAR_PHY_1 = "phy0:1";
+
 /* ************************************************************************
  *
  * Setup the architecture
@@ -405,6 +405,7 @@ mpc85xx_cds_setup_arch(void)
         bd_t *binfo = (bd_t *) __res;
         unsigned int freq;
         struct gianfar_platform_data *pdata;
+        struct gianfar_mdio_data *mdata;
 
         /* get the core frequency */
         freq = binfo->bi_intfreq;
@@ -448,44 +449,42 @@ mpc85xx_cds_setup_arch(void)
         invalidate_tlbcam_entry(num_tlbcam_entries - 1);
 #endif
 
+        /* setup the board related info for the MDIO bus */
+        mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
+
+        mdata->irq[0] = MPC85xx_IRQ_EXT5;
+        mdata->irq[1] = MPC85xx_IRQ_EXT5;
+        mdata->irq[2] = -1;
+        mdata->irq[3] = -1;
+        mdata->irq[31] = -1;
+        mdata->paddr += binfo->bi_immr_base;
+
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 0;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_0;
                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 1;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_1;
                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 0;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_0;
                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 1;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_1;
                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
         }
 
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
index c76760a781c1..b4ee1707a836 100644
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ b/arch/ppc/platforms/85xx/sbc8560.c
@@ -91,6 +91,9 @@ sbc8560_early_serial_map(void)
 }
 #endif
 
+static const char *GFAR_PHY_25 = "phy0:25";
+static const char *GFAR_PHY_26 = "phy0:26";
+
 /* ************************************************************************
  *
  * Setup the architecture
@@ -102,6 +105,7 @@ sbc8560_setup_arch(void)
         bd_t *binfo = (bd_t *) __res;
         unsigned int freq;
         struct gianfar_platform_data *pdata;
+        struct gianfar_mdio_data *mdata;
 
         /* get the core frequency */
         freq = binfo->bi_intfreq;
@@ -126,24 +130,26 @@ sbc8560_setup_arch(void)
         invalidate_tlbcam_entry(num_tlbcam_entries - 1);
 #endif
 
+        /* setup the board related info for the MDIO bus */
+        mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
+
+        mdata->irq[25] = MPC85xx_IRQ_EXT6;
+        mdata->irq[26] = MPC85xx_IRQ_EXT7;
+        mdata->irq[31] = -1;
+        mdata->paddr += binfo->bi_immr_base;
+
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT6;
-                pdata->phyid = 25;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_25;
                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
         if (pdata) {
                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-                pdata->interruptPHY = MPC85xx_IRQ_EXT7;
-                pdata->phyid = 26;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_26;
                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
         }
 
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
index 20940f4044f4..1e1b85f8193a 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ b/arch/ppc/platforms/85xx/stx_gp3.c
@@ -91,6 +91,9 @@ static u8 gp3_openpic_initsenses[] __initdata = {
         0x0,                            /* External 11: */
 };
 
+static const char *GFAR_PHY_2 = "phy0:2";
+static const char *GFAR_PHY_4 = "phy0:4";
+
 /*
  * Setup the architecture
  */
@@ -100,6 +103,7 @@ gp3_setup_arch(void)
         bd_t *binfo = (bd_t *) __res;
         unsigned int freq;
         struct gianfar_platform_data *pdata;
+        struct gianfar_mdio_data *mdata;
 
         cpm2_reset();
 
@@ -118,23 +122,26 @@ gp3_setup_arch(void)
         mpc85xx_setup_hose();
 #endif
 
+        /* setup the board related info for the MDIO bus */
+        mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
+
+        mdata->irq[2] = MPC85xx_IRQ_EXT5;
+        mdata->irq[4] = MPC85xx_IRQ_EXT5;
+        mdata->irq[31] = -1;
+        mdata->paddr += binfo->bi_immr_base;
+
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
         if (pdata) {
         /*      pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 2;
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_2;
                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
         }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
         if (pdata) {
         /*      pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
-                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-                pdata->phyid = 4;
-                /* fixup phy address */
-                pdata->phy_reg_addr += binfo->bi_immr_base;
+                pdata->bus_id = GFAR_PHY_4;
                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
         }
 
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
index 7bcc6c35a417..95fdf4b0680b 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -21,7 +21,6 @@
 
 #include <linux/config.h>
 #include <linux/init.h>
-#include <linux/seq_file.h>
 #include <asm/ppcboot.h>
 
 #define BOARD_CCSRBAR           ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index ff7452e5d8e5..7c5cdabf6f3c 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -14,6 +14,9 @@ obj-$(CONFIG_PPC_PMAC)		+= pmac_pic.o pmac_setup.o pmac_time.o \
                                         pmac_low_i2c.o pmac_cache.o
 obj-$(CONFIG_PPC_CHRP)          += chrp_setup.o chrp_time.o chrp_pci.o \
                                         chrp_pegasos_eth.o
+ifeq ($(CONFIG_PPC_CHRP),y)
+obj-$(CONFIG_NVRAM)             += chrp_nvram.o
+endif
 obj-$(CONFIG_PPC_PREP)          += prep_pci.o prep_setup.o
 ifeq ($(CONFIG_PPC_PMAC),y)
 obj-$(CONFIG_NVRAM)             += pmac_nvram.o
diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c
index df6ff98c023a..48a4a510d598 100644
--- a/arch/ppc/platforms/chestnut.c
+++ b/arch/ppc/platforms/chestnut.c
@@ -541,7 +541,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 
         ppc_md.setup_arch = chestnut_setup_arch;
         ppc_md.show_cpuinfo = chestnut_show_cpuinfo;
-        ppc_md.irq_canonicalize = NULL;
         ppc_md.init_IRQ = mv64360_init_irq;
         ppc_md.get_irq = mv64360_get_irq;
         ppc_md.init = NULL;
diff --git a/arch/ppc/platforms/chrp_nvram.c b/arch/ppc/platforms/chrp_nvram.c
new file mode 100644
index 000000000000..465ba9b090ef
--- /dev/null
+++ b/arch/ppc/platforms/chrp_nvram.c
@@ -0,0 +1,83 @@
+/*
+ *  c 2001 PPC 64 Team, IBM Corp
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ *
+ * /dev/nvram driver for PPC
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <asm/uaccess.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+
+static unsigned int nvram_size;
+static unsigned char nvram_buf[4];
+static DEFINE_SPINLOCK(nvram_lock);
+
+static unsigned char chrp_nvram_read(int addr)
+{
+        unsigned long done, flags;
+        unsigned char ret;
+
+        if (addr >= nvram_size) {
+                printk(KERN_DEBUG "%s: read addr %d > nvram_size %u\n",
+                       current->comm, addr, nvram_size);
+                return 0xff;
+        }
+        spin_lock_irqsave(&nvram_lock, flags);
+        if ((call_rtas("nvram-fetch", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
+                ret = 0xff;
+        else
+                ret = nvram_buf[0];
+        spin_unlock_irqrestore(&nvram_lock, flags);
+
+        return ret;
+}
+
+static void chrp_nvram_write(int addr, unsigned char val)
+{
+        unsigned long done, flags;
+
+        if (addr >= nvram_size) {
+                printk(KERN_DEBUG "%s: write addr %d > nvram_size %u\n",
+                       current->comm, addr, nvram_size);
+                return;
+        }
+        spin_lock_irqsave(&nvram_lock, flags);
+        nvram_buf[0] = val;
+        if ((call_rtas("nvram-store", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
+                printk(KERN_DEBUG "rtas IO error storing 0x%02x at %d", val, addr);
+        spin_unlock_irqrestore(&nvram_lock, flags);
+}
+
+void __init chrp_nvram_init(void)
+{
+        struct device_node *nvram;
+        unsigned int *nbytes_p, proplen;
+
+        nvram = of_find_node_by_type(NULL, "nvram");
+        if (nvram == NULL)
+                return;
+
+        nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen);
+        if (nbytes_p == NULL || proplen != sizeof(unsigned int))
+                return;
+
+        nvram_size = *nbytes_p;
+
+        printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size);
+        of_node_put(nvram);
+
+        ppc_md.nvram_read_val = chrp_nvram_read;
+        ppc_md.nvram_write_val = chrp_nvram_write;
+
+        return;
+}
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 7d3fbb5c5db2..bd047aac01b1 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -29,7 +29,7 @@ void __iomem *gg2_pci_config_base;
  * limit the bus number to 3 bits
  */
 
-int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
+int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
                            int len, u32 *val)
 {
         volatile void __iomem *cfg_data;
@@ -56,7 +56,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
         return PCIBIOS_SUCCESSFUL;
 }
 
-int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
+int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
                             int len, u32 val)
 {
         volatile void __iomem *cfg_data;
@@ -92,7 +92,7 @@ static struct pci_ops gg2_pci_ops =
 /*
  * Access functions for PCI config space using RTAS calls.
  */
-int __chrp
+int
 rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                  int len, u32 *val)
 {
@@ -108,7 +108,7 @@ rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
         return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
 }
 
-int __chrp
+int
 rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                   int len, u32 val)
 {
@@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
                 printk ("RTAS supporting Pegasos OF not found, please upgrade"
                         " your firmware\n");
         }
-        pci_assign_all_busses = 1;
+        pci_assign_all_buses = 1;
 }
 
 void __init
diff --git a/arch/ppc/platforms/chrp_pegasos_eth.c b/arch/ppc/platforms/chrp_pegasos_eth.c
index cad5bfa153b2..a9052305c35d 100644
--- a/arch/ppc/platforms/chrp_pegasos_eth.c
+++ b/arch/ppc/platforms/chrp_pegasos_eth.c
@@ -17,7 +17,20 @@
 #include <linux/mv643xx.h>
 #include <linux/pci.h>
 
-/* Pegasos 2 specific Marvell MV 64361 gigabit ethernet port setup */
+#define PEGASOS2_MARVELL_REGBASE                (0xf1000000)
+#define PEGASOS2_MARVELL_REGSIZE                (0x00004000)
+#define PEGASOS2_SRAM_BASE                      (0xf2000000)
+#define PEGASOS2_SRAM_SIZE                      (256*1024)
+
+#define PEGASOS2_SRAM_BASE_ETH0                 (PEGASOS2_SRAM_BASE)
+#define PEGASOS2_SRAM_BASE_ETH1                 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) )
+
+
+#define PEGASOS2_SRAM_RXRING_SIZE               (PEGASOS2_SRAM_SIZE/4)
+#define PEGASOS2_SRAM_TXRING_SIZE               (PEGASOS2_SRAM_SIZE/4)
+
+#undef BE_VERBOSE
+
 static struct resource mv643xx_eth_shared_resources[] = {
         [0] = {
                 .name   = "ethernet shared base",
@@ -44,7 +57,16 @@ static struct resource mv643xx_eth0_resources[] = {
         },
 };
 
-static struct mv643xx_eth_platform_data eth0_pd;
+
+static struct mv643xx_eth_platform_data eth0_pd = {
+        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
+        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
+        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
+
+        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
+        .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
+        .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
+};
 
 static struct platform_device eth0_device = {
         .name           = MV643XX_ETH_NAME,
@@ -65,7 +87,15 @@ static struct resource mv643xx_eth1_resources[] = {
         },
 };
 
-static struct mv643xx_eth_platform_data eth1_pd;
+static struct mv643xx_eth_platform_data eth1_pd = {
+        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
+        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
+        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
+
+        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE,
+        .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
+        .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
+};
 
 static struct platform_device eth1_device = {
         .name           = MV643XX_ETH_NAME,
@@ -83,9 +113,62 @@ static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
         &eth1_device,
 };
 
+/***********/
+/***********/
+#define MV_READ(offset,val)     { val = readl(mv643xx_reg_base + offset); }
+#define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset)
+
+static void __iomem *mv643xx_reg_base;
+
+static int Enable_SRAM(void)
+{
+        u32 ALong;
+
+        if (mv643xx_reg_base == NULL)
+                mv643xx_reg_base = ioremap(PEGASOS2_MARVELL_REGBASE,
+                                        PEGASOS2_MARVELL_REGSIZE);
+
+        if (mv643xx_reg_base == NULL)
+                return -ENOMEM;
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: register remapped from %p to %p\n",
+                (void *)PEGASOS2_MARVELL_REGBASE, (void *)mv643xx_reg_base);
+#endif
+
+        MV_WRITE(MV64340_SRAM_CONFIG, 0);
 
-int
-mv643xx_eth_add_pds(void)
+        MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16);
+
+        MV_READ(MV64340_BASE_ADDR_ENABLE, ALong);
+        ALong &= ~(1 << 19);
+        MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong);
+
+        ALong = 0x02;
+        ALong |= PEGASOS2_SRAM_BASE & 0xffff0000;
+        MV_WRITE(MV643XX_ETH_BAR_4, ALong);
+
+        MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000);
+
+        MV_READ(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
+        ALong &= ~(1 << 4);
+        MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: register unmapped\n");
+        printk("Pegasos II/Marvell MV64361: SRAM at %p, size=%x\n", (void*) PEGASOS2_SRAM_BASE, PEGASOS2_SRAM_SIZE);
+#endif
+
+        iounmap(mv643xx_reg_base);
+        mv643xx_reg_base = NULL;
+
+        return 1;
+}
+
+
+/***********/
+/***********/
+int mv643xx_eth_add_pds(void)
 {
         int ret = 0;
         static struct pci_device_id pci_marvell_mv64360[] = {
@@ -93,9 +176,38 @@ mv643xx_eth_add_pds(void)
                 { }
         };
 
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: init\n");
+#endif
+
         if (pci_dev_present(pci_marvell_mv64360)) {
-                ret = platform_add_devices(mv643xx_eth_pd_devs, ARRAY_SIZE(mv643xx_eth_pd_devs));
+                ret = platform_add_devices(mv643xx_eth_pd_devs,
+                                ARRAY_SIZE(mv643xx_eth_pd_devs));
+
+                if ( Enable_SRAM() < 0)
+                {
+                        eth0_pd.tx_sram_addr = 0;
+                        eth0_pd.tx_sram_size = 0;
+                        eth0_pd.rx_sram_addr = 0;
+                        eth0_pd.rx_sram_size = 0;
+
+                        eth1_pd.tx_sram_addr = 0;
+                        eth1_pd.tx_sram_size = 0;
+                        eth1_pd.rx_sram_addr = 0;
+                        eth1_pd.rx_sram_size = 0;
+
+#ifdef BE_VERBOSE
+                        printk("Pegasos II/Marvell MV64361: Can't enable the "
+                                "SRAM\n");
+#endif
+                }
         }
+
+#ifdef BE_VERBOSE
+        printk("Pegasos II/Marvell MV64361: init is over\n");
+#endif
+
         return ret;
 }
+
 device_initcall(mv643xx_eth_add_pds);
diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c
index 66346f0de7ec..f1b70ab3c6fd 100644
--- a/arch/ppc/platforms/chrp_setup.c
+++ b/arch/ppc/platforms/chrp_setup.c
@@ -104,7 +104,7 @@ static const char *gg2_cachemodes[4] = {
         "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
 };
 
-int __chrp
+int
 chrp_show_cpuinfo(struct seq_file *m)
 {
         int i, sdramen;
@@ -302,7 +302,7 @@ void __init chrp_setup_arch(void)
         pci_create_OF_bus_map();
 }
 
-void __chrp
+void
 chrp_event_scan(void)
 {
         unsigned char log[1024];
@@ -313,7 +313,7 @@ chrp_event_scan(void)
         ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
 }
 
-void __chrp
+void
 chrp_restart(char *cmd)
 {
         printk("RTAS system-reboot returned %d\n",
@@ -321,7 +321,7 @@ chrp_restart(char *cmd)
         for (;;);
 }
 
-void __chrp
+void
 chrp_power_off(void)
 {
         /* allow power on only with power button press */
@@ -330,20 +330,12 @@ chrp_power_off(void)
         for (;;);
 }
 
-void __chrp
+void
 chrp_halt(void)
 {
         chrp_power_off();
 }
 
-u_int __chrp
-chrp_irq_canonicalize(u_int irq)
-{
-        if (irq == 2)
-                return 9;
-        return irq;
-}
-
 /*
  * Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
  * Then checks if it has an interrupt-ranges property.  If it does then
@@ -444,9 +436,7 @@ void __init chrp_init_IRQ(void)
                                        i8259_irq);
 
         }
-        for (i = 0; i < NUM_8259_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-        i8259_init(chrp_int_ack);
+        i8259_init(chrp_int_ack, 0);
 
 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
         /* see if there is a keyboard in the device tree
@@ -464,8 +454,7 @@ void __init
 chrp_init2(void)
 {
 #ifdef CONFIG_NVRAM
-// XX replace this in a more saner way
-//      pmac_nvram_init();
+        chrp_nvram_init();
 #endif
 
         request_region(0x20,0x20,"pic1");
@@ -499,6 +488,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
         DMA_MODE_READ = 0x44;
         DMA_MODE_WRITE = 0x48;
         isa_io_base = CHRP_ISA_IO_BASE;         /* default value */
+        ppc_do_canonicalize_irqs = 1;
 
         if (root)
                 machine = get_property(root, "model", NULL);
@@ -517,7 +507,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ppc_md.show_percpuinfo = of_show_percpuinfo;
         ppc_md.show_cpuinfo   = chrp_show_cpuinfo;
 
-        ppc_md.irq_canonicalize = chrp_irq_canonicalize;
         ppc_md.init_IRQ       = chrp_init_IRQ;
         if (_chrp_type == _CHRP_Pegasos)
                 ppc_md.get_irq        = i8259_irq;
@@ -561,7 +550,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif
 
 #ifdef CONFIG_SMP
-        ppc_md.smp_ops = &chrp_smp_ops;
+        smp_ops = &chrp_smp_ops;
 #endif /* CONFIG_SMP */
 
         /*
@@ -571,7 +560,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
         if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
 }
 
-void __chrp
+void
 rtas_display_progress(char *s, unsigned short hex)
 {
         int width;
@@ -598,7 +587,7 @@ rtas_display_progress(char *s, unsigned short hex)
         call_rtas( "display-character", 1, 1, NULL, ' ' );
 }
 
-void __chrp
+void
 rtas_indicator_progress(char *s, unsigned short hex)
 {
         call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c
index 0ea1f7d9e46a..97e539557ecb 100644
--- a/arch/ppc/platforms/chrp_smp.c
+++ b/arch/ppc/platforms/chrp_smp.c
@@ -31,6 +31,7 @@
 #include <asm/residual.h>
 #include <asm/time.h>
 #include <asm/open_pic.h>
+#include <asm/machdep.h>
 
 extern unsigned long smp_chrp_cpu_nr;
 
@@ -88,7 +89,7 @@ smp_chrp_take_timebase(void)
 }
 
 /* CHRP with openpic */
-struct smp_ops_t chrp_smp_ops __chrpdata = {
+struct smp_ops_t chrp_smp_ops = {
         .message_pass = smp_openpic_message_pass,
         .probe = smp_chrp_probe,
         .kick_cpu = smp_chrp_kick_cpu,
diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c
index 6037ce7796f5..29d074c305f0 100644
--- a/arch/ppc/platforms/chrp_time.c
+++ b/arch/ppc/platforms/chrp_time.c
@@ -52,7 +52,7 @@ long __init chrp_time_init(void)
         return 0;
 }
 
-int __chrp chrp_cmos_clock_read(int addr)
+int chrp_cmos_clock_read(int addr)
 {
         if (nvram_as1 != 0)
                 outb(addr>>8, nvram_as1);
@@ -60,7 +60,7 @@ int __chrp chrp_cmos_clock_read(int addr)
         return (inb(nvram_data));
 }
 
-void __chrp chrp_cmos_clock_write(unsigned long val, int addr)
+void chrp_cmos_clock_write(unsigned long val, int addr)
 {
         if (nvram_as1 != 0)
                 outb(addr>>8, nvram_as1);
@@ -72,7 +72,7 @@ void __chrp chrp_cmos_clock_write(unsigned long val, int addr)
 /*
  * Set the hardware clock. -- Cort
  */
-int __chrp chrp_set_rtc_time(unsigned long nowtime)
+int chrp_set_rtc_time(unsigned long nowtime)
 {
         unsigned char save_control, save_freq_select;
         struct rtc_time tm;
@@ -118,7 +118,7 @@ int __chrp chrp_set_rtc_time(unsigned long nowtime)
         return 0;
 }
 
-unsigned long __chrp chrp_get_rtc_time(void)
+unsigned long chrp_get_rtc_time(void)
 {
         unsigned int year, mon, day, hour, min, sec;
         int uip, i;
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
index 9811a8a52c25..53388a1c334f 100644
--- a/arch/ppc/platforms/ev64360.c
+++ b/arch/ppc/platforms/ev64360.c
@@ -35,6 +35,7 @@
 #include <asm/bootinfo.h>
 #include <asm/ppcboot.h>
 #include <asm/mv64x60.h>
+#include <asm/machdep.h>
 #include <platforms/ev64360.h>
 
 #define BOARD_VENDOR    "Marvell"
diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
index b60c56450b67..a48fb8d723e4 100644
--- a/arch/ppc/platforms/fads.h
+++ b/arch/ppc/platforms/fads.h
@@ -25,6 +25,8 @@
 
 #if defined(CONFIG_MPC86XADS)
 
+#define BOARD_CHIP_NAME "MPC86X"
+
 /* U-Boot maps BCSR to 0xff080000 */
 #define BCSR_ADDR               ((uint)0xff080000)
 
diff --git a/arch/ppc/platforms/gemini_setup.c b/arch/ppc/platforms/gemini_setup.c
index 3a5ff9fb71d6..729897c59033 100644
--- a/arch/ppc/platforms/gemini_setup.c
+++ b/arch/ppc/platforms/gemini_setup.c
@@ -35,6 +35,7 @@
 #include <asm/time.h>
 #include <asm/open_pic.h>
 #include <asm/bootinfo.h>
+#include <asm/machdep.h>
 
 void gemini_find_bridges(void);
 static int gemini_get_clock_speed(void);
@@ -555,7 +556,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 
         ppc_md.setup_arch = gemini_setup_arch;
         ppc_md.show_cpuinfo = gemini_show_cpuinfo;
-        ppc_md.irq_canonicalize = NULL;
         ppc_md.init_IRQ = gemini_init_IRQ;
         ppc_md.get_irq = openpic_get_irq;
         ppc_md.init = NULL;
@@ -575,6 +575,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup;
 
 #ifdef CONFIG_SMP
-        ppc_md.smp_ops = &gemini_smp_ops;
+        smp_ops = &gemini_smp_ops;
 #endif /* CONFIG_SMP */
 }
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
index ff3796860123..b6a66d5e9d83 100644
--- a/arch/ppc/platforms/hdpu.c
+++ b/arch/ppc/platforms/hdpu.c
@@ -609,11 +609,6 @@ static void parse_bootinfo(unsigned long r3,
 }
 
 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
-static int hdpu_ide_check_region(ide_ioreg_t from, unsigned int extent)
-{
-        return check_region(from, extent);
-}
-
 static void
 hdpu_ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
 {
@@ -753,7 +748,7 @@ static int smp_hdpu_probe(void)
 }
 
 static void
-smp_hdpu_message_pass(int target, int msg, unsigned long data, int wait)
+smp_hdpu_message_pass(int target, int msg)
 {
         if (msg > 0x3) {
                 printk("SMP %d: smp_message_pass: unknown msg %d\n",
@@ -949,7 +944,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif                          /* CONFIG_SERIAL_TEXT_DEBUG */
 
 #ifdef CONFIG_SMP
-        ppc_md.smp_ops = &hdpu_smp_ops;
+        smp_ops = &hdpu_smp_ops;
 #endif                          /* CONFIG_SMP */
 
 #if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 2b53afae0e9c..a301c5ac58dd 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -42,6 +42,7 @@
 #include <asm/ppcboot.h>
 #include <asm/mv64x60.h>
 #include <platforms/katana.h>
+#include <asm/machdep.h>
 
 static struct mv64x60_handle    bh;
 static katana_id_t              katana_id;
@@ -520,7 +521,7 @@ katana_fixup_resources(struct pci_dev *dev)
 {
         u16     v16;
 
-        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_LINE_SIZE>>2);
+        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES>>2);
 
         pci_read_config_word(dev, PCI_COMMAND, &v16);
         v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK;
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index b604cf8b3cae..d44cc991179f 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -35,6 +35,7 @@
 #include <asm/io.h>
 #include <asm/mpc52xx.h>
 #include <asm/ppc_sys.h>
+#include <asm/machdep.h>
 
 #include <syslib/mpc52xx_pci.h>
 
diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c
index a5569525e0af..06d247c23b82 100644
--- a/arch/ppc/platforms/lopec.c
+++ b/arch/ppc/platforms/lopec.c
@@ -144,15 +144,6 @@ lopec_show_cpuinfo(struct seq_file *m)
         return 0;
 }
 
-static u32
-lopec_irq_canonicalize(u32 irq)
-{
-        if (irq == 2)
-                return 9;
-        else
-                return irq;
-}
-
 static void
 lopec_restart(char *cmd)
 {
@@ -276,15 +267,11 @@ lopec_init_IRQ(void)
         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
                         &i8259_irq);
 
-        /* Map i8259 interrupts */
-        for(i = 0; i < NUM_8259_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-
         /*
          * The EPIC allows for a read in the range of 0xFEF00000 ->
          * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
          */
-        i8259_init(0xfef00000);
+        i8259_init(0xfef00000, 0);
 }
 
 static int __init
@@ -379,10 +366,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ISA_DMA_THRESHOLD = 0x00ffffff;
         DMA_MODE_READ = 0x44;
         DMA_MODE_WRITE = 0x48;
+        ppc_do_canonicalize_irqs = 1;
 
         ppc_md.setup_arch = lopec_setup_arch;
         ppc_md.show_cpuinfo = lopec_show_cpuinfo;
-        ppc_md.irq_canonicalize = lopec_irq_canonicalize;
         ppc_md.init_IRQ = lopec_init_IRQ;
         ppc_md.get_irq = openpic_get_irq;
 
diff --git a/arch/ppc/platforms/mpc885ads.h b/arch/ppc/platforms/mpc885ads.h
index eb386635b0fd..a80b7d116b49 100644
--- a/arch/ppc/platforms/mpc885ads.h
+++ b/arch/ppc/platforms/mpc885ads.h
@@ -88,5 +88,7 @@
 #define SICR_ENET_MASK  ((uint)0x00ff0000)
 #define SICR_ENET_CLKRT ((uint)0x002c0000)
 
+#define BOARD_CHIP_NAME "MPC885"
+
 #endif /* __ASM_MPC885ADS_H__ */
 #endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/mvme5100.c b/arch/ppc/platforms/mvme5100.c
index ce2ce88c8033..108eb182dddc 100644
--- a/arch/ppc/platforms/mvme5100.c
+++ b/arch/ppc/platforms/mvme5100.c
@@ -223,11 +223,7 @@ mvme5100_init_IRQ(void)
         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
                         &i8259_irq);
 
-        /* Map i8259 interrupts. */
-        for (i = 0; i < NUM_8259_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-
-        i8259_init(0);
+        i8259_init(0, 0);
 #else
         openpic_init(0);
 #endif
diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c
index 12446b93e38c..f93a3f871932 100644
--- a/arch/ppc/platforms/pal4_setup.c
+++ b/arch/ppc/platforms/pal4_setup.c
@@ -28,6 +28,7 @@
 #include <asm/io.h>
 #include <asm/todc.h>
 #include <asm/bootinfo.h>
+#include <asm/machdep.h>
 
 #include <syslib/cpc700.h>
 
diff --git a/arch/ppc/platforms/pmac_backlight.c b/arch/ppc/platforms/pmac_backlight.c
index ed2b1cebc19a..8be2f7d071f0 100644
--- a/arch/ppc/platforms/pmac_backlight.c
+++ b/arch/ppc/platforms/pmac_backlight.c
@@ -37,7 +37,7 @@ static int backlight_req_enable = -1;
 static void backlight_callback(void *);
 static DECLARE_WORK(backlight_work, backlight_callback, NULL);
 
-void __pmac register_backlight_controller(struct backlight_controller *ctrler,
+void register_backlight_controller(struct backlight_controller *ctrler,
                                           void *data, char *type)
 {
         struct device_node* bk_node;
@@ -99,7 +99,7 @@ void __pmac register_backlight_controller(struct backlight_controller *ctrler,
 }
 EXPORT_SYMBOL(register_backlight_controller);
 
-void __pmac unregister_backlight_controller(struct backlight_controller
+void unregister_backlight_controller(struct backlight_controller
                                             *ctrler, void *data)
 {
         /* We keep the current backlight level (for now) */
@@ -108,7 +108,7 @@ void __pmac unregister_backlight_controller(struct backlight_controller
 }
 EXPORT_SYMBOL(unregister_backlight_controller);
 
-static int __pmac __set_backlight_enable(int enable)
+static int __set_backlight_enable(int enable)
 {
         int rc;
 
@@ -122,7 +122,7 @@ static int __pmac __set_backlight_enable(int enable)
         release_console_sem();
         return rc;
 }
-int __pmac set_backlight_enable(int enable)
+int set_backlight_enable(int enable)
 {
         if (!backlighter)
                 return -ENODEV;
@@ -133,7 +133,7 @@ int __pmac set_backlight_enable(int enable)
 
 EXPORT_SYMBOL(set_backlight_enable);
 
-int __pmac get_backlight_enable(void)
+int get_backlight_enable(void)
 {
         if (!backlighter)
                 return -ENODEV;
@@ -141,7 +141,7 @@ int __pmac get_backlight_enable(void)
 }
 EXPORT_SYMBOL(get_backlight_enable);
 
-static int __pmac __set_backlight_level(int level)
+static int __set_backlight_level(int level)
 {
         int rc = 0;
 
@@ -165,7 +165,7 @@ static int __pmac __set_backlight_level(int level)
         }
         return rc;
 }
-int __pmac set_backlight_level(int level)
+int set_backlight_level(int level)
 {
         if (!backlighter)
                 return -ENODEV;
@@ -176,7 +176,7 @@ int __pmac set_backlight_level(int level)
 
 EXPORT_SYMBOL(set_backlight_level);
 
-int __pmac get_backlight_level(void)
+int get_backlight_level(void)
 {
         if (!backlighter)
                 return -ENODEV;
diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
index d4bc5f67ec53..fba7e4d7c0bf 100644
--- a/arch/ppc/platforms/pmac_cpufreq.c
+++ b/arch/ppc/platforms/pmac_cpufreq.c
@@ -136,7 +136,7 @@ static inline void debug_calc_bogomips(void)
 
 /* Switch CPU speed under 750FX CPU control
  */
-static int __pmac cpu_750fx_cpu_speed(int low_speed)
+static int cpu_750fx_cpu_speed(int low_speed)
 {
         u32 hid2;
 
@@ -172,7 +172,7 @@ static int __pmac cpu_750fx_cpu_speed(int low_speed)
         return 0;
 }
 
-static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
+static unsigned int cpu_750fx_get_cpu_speed(void)
 {
         if (mfspr(SPRN_HID1) & HID1_PS)
                 return low_freq;
@@ -181,7 +181,7 @@ static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
 }
 
 /* Switch CPU speed using DFS */
-static int __pmac dfs_set_cpu_speed(int low_speed)
+static int dfs_set_cpu_speed(int low_speed)
 {
         if (low_speed == 0) {
                 /* ramping up, set voltage first */
@@ -205,7 +205,7 @@ static int __pmac dfs_set_cpu_speed(int low_speed)
         return 0;
 }
 
-static unsigned int __pmac dfs_get_cpu_speed(void)
+static unsigned int dfs_get_cpu_speed(void)
 {
         if (mfspr(SPRN_HID1) & HID1_DFS)
                 return low_freq;
@@ -216,7 +216,7 @@ static unsigned int __pmac dfs_get_cpu_speed(void)
 
 /* Switch CPU speed using slewing GPIOs
  */
-static int __pmac gpios_set_cpu_speed(int low_speed)
+static int gpios_set_cpu_speed(int low_speed)
 {
         int gpio, timeout = 0;
 
@@ -258,7 +258,7 @@ static int __pmac gpios_set_cpu_speed(int low_speed)
 
 /* Switch CPU speed under PMU control
  */
-static int __pmac pmu_set_cpu_speed(int low_speed)
+static int pmu_set_cpu_speed(int low_speed)
 {
         struct adb_request req;
         unsigned long save_l2cr;
@@ -354,7 +354,7 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
         return 0;
 }
 
-static int __pmac do_set_cpu_speed(int speed_mode, int notify)
+static int do_set_cpu_speed(int speed_mode, int notify)
 {
         struct cpufreq_freqs freqs;
         unsigned long l3cr;
@@ -391,17 +391,17 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
         return 0;
 }
 
-static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu)
+static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
 {
         return cur_freq;
 }
 
-static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
+static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
 }
 
-static int __pmac pmac_cpufreq_target(  struct cpufreq_policy *policy,
+static int pmac_cpufreq_target( struct cpufreq_policy *policy,
                                         unsigned int target_freq,
                                         unsigned int relation)
 {
@@ -414,13 +414,13 @@ static int __pmac pmac_cpufreq_target(	struct cpufreq_policy *policy,
         return do_set_cpu_speed(newstate, 1);
 }
 
-unsigned int __pmac pmac_get_one_cpufreq(int i)
+unsigned int pmac_get_one_cpufreq(int i)
 {
         /* Supports only one CPU for now */
         return (i == 0) ? cur_freq : 0;
 }
 
-static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
+static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
 {
         if (policy->cpu != 0)
                 return -ENODEV;
@@ -433,7 +433,7 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
         return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
 }
 
-static u32 __pmac read_gpio(struct device_node *np)
+static u32 read_gpio(struct device_node *np)
 {
         u32 *reg = (u32 *)get_property(np, "reg", NULL);
         u32 offset;
@@ -452,7 +452,7 @@ static u32 __pmac read_gpio(struct device_node *np)
         return offset;
 }
 
-static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
+static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
 {
         /* Ok, this could be made a bit smarter, but let's be robust for now. We
          * always force a speed change to high speed before sleep, to make sure
@@ -468,7 +468,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message
         return 0;
 }
 
-static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
+static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
 {
         /* If we resume, first check if we have a get() function */
         if (get_speed_proc)
@@ -501,7 +501,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
 };
 
 
-static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
+static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
 {
         struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
                                                                 "voltage-gpio");
@@ -593,7 +593,7 @@ static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
         return 0;
 }
 
-static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
+static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
 {
         struct device_node *volt_gpio_np;
 
@@ -620,7 +620,7 @@ static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
         return 0;
 }
 
-static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode)
+static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
 {
         struct device_node *volt_gpio_np;
         u32 pvr, *value;
diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c
index dd6d45ae0501..58884a63ebdb 100644
--- a/arch/ppc/platforms/pmac_feature.c
+++ b/arch/ppc/platforms/pmac_feature.c
@@ -63,7 +63,7 @@ extern struct device_node *k2_skiplist[2];
  * We use a single global lock to protect accesses. Each driver has
  * to take care of its own locking
  */
-static DEFINE_SPINLOCK(feature_lock  __pmacdata);
+static DEFINE_SPINLOCK(feature_lock);
 
 #define LOCK(flags)     spin_lock_irqsave(&feature_lock, flags);
 #define UNLOCK(flags)   spin_unlock_irqrestore(&feature_lock, flags);
@@ -72,9 +72,9 @@ static DEFINE_SPINLOCK(feature_lock  __pmacdata);
 /*
  * Instance of some macio stuffs
  */
-struct macio_chip macio_chips[MAX_MACIO_CHIPS]  __pmacdata;
+struct macio_chip macio_chips[MAX_MACIO_CHIPS];
 
-struct macio_chip* __pmac macio_find(struct device_node* child, int type)
+struct macio_chip* macio_find(struct device_node* child, int type)
 {
         while(child) {
                 int     i;
@@ -89,7 +89,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type)
 }
 EXPORT_SYMBOL_GPL(macio_find);
 
-static const char* macio_names[] __pmacdata =
+static const char* macio_names[] =
 {
         "Unknown",
         "Grand Central",
@@ -116,10 +116,10 @@ static const char* macio_names[] __pmacdata =
 #define UN_BIS(r,v)     (UN_OUT((r), UN_IN(r) | (v)))
 #define UN_BIC(r,v)     (UN_OUT((r), UN_IN(r) & ~(v)))
 
-static struct device_node* uninorth_node __pmacdata;
-static u32 __iomem * uninorth_base __pmacdata;
-static u32 uninorth_rev __pmacdata;
-static int uninorth_u3 __pmacdata;
+static struct device_node* uninorth_node;
+static u32 __iomem * uninorth_base;
+static u32 uninorth_rev;
+static int uninorth_u3;
 static void __iomem *u3_ht;
 
 /*
@@ -142,13 +142,13 @@ struct pmac_mb_def
         struct feature_table_entry*     features;
         unsigned long                   board_flags;
 };
-static struct pmac_mb_def pmac_mb __pmacdata;
+static struct pmac_mb_def pmac_mb;
 
 /*
  * Here are the chip specific feature functions
  */
 
-static inline int __pmac
+static inline int
 simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
 {
         struct macio_chip*      macio;
@@ -170,7 +170,7 @@ simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int
 
 #ifndef CONFIG_POWER4
 
-static long __pmac
+static long
 ohare_htw_scc_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -263,21 +263,21 @@ ohare_htw_scc_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 ohare_floppy_enable(struct device_node* node, long param, long value)
 {
         return simple_feature_tweak(node, macio_ohare,
                 OHARE_FCR, OH_FLOPPY_ENABLE, value);
 }
 
-static long __pmac
+static long
 ohare_mesh_enable(struct device_node* node, long param, long value)
 {
         return simple_feature_tweak(node, macio_ohare,
                 OHARE_FCR, OH_MESH_ENABLE, value);
 }
 
-static long __pmac
+static long
 ohare_ide_enable(struct device_node* node, long param, long value)
 {
         switch(param) {
@@ -298,7 +298,7 @@ ohare_ide_enable(struct device_node* node, long param, long value)
         }
 }
 
-static long __pmac
+static long
 ohare_ide_reset(struct device_node* node, long param, long value)
 {
         switch(param) {
@@ -313,7 +313,7 @@ ohare_ide_reset(struct device_node* node, long param, long value)
         }
 }
 
-static long __pmac
+static long
 ohare_sleep_state(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio = &macio_chips[0];
@@ -329,7 +329,7 @@ ohare_sleep_state(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 heathrow_modem_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -373,7 +373,7 @@ heathrow_modem_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 heathrow_floppy_enable(struct device_node* node, long param, long value)
 {
         return simple_feature_tweak(node, macio_unknown,
@@ -382,7 +382,7 @@ heathrow_floppy_enable(struct device_node* node, long param, long value)
                 value);
 }
 
-static long __pmac
+static long
 heathrow_mesh_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -411,7 +411,7 @@ heathrow_mesh_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 heathrow_ide_enable(struct device_node* node, long param, long value)
 {
         switch(param) {
@@ -426,7 +426,7 @@ heathrow_ide_enable(struct device_node* node, long param, long value)
         }
 }
 
-static long __pmac
+static long
 heathrow_ide_reset(struct device_node* node, long param, long value)
 {
         switch(param) {
@@ -441,7 +441,7 @@ heathrow_ide_reset(struct device_node* node, long param, long value)
         }
 }
 
-static long __pmac
+static long
 heathrow_bmac_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -470,7 +470,7 @@ heathrow_bmac_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 heathrow_sound_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -501,16 +501,16 @@ heathrow_sound_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static u32 save_fcr[6] __pmacdata;
-static u32 save_mbcr __pmacdata;
-static u32 save_gpio_levels[2] __pmacdata;
-static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata;
-static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata;
-static u32 save_unin_clock_ctl __pmacdata;
-static struct dbdma_regs save_dbdma[13] __pmacdata;
-static struct dbdma_regs save_alt_dbdma[13] __pmacdata;
+static u32 save_fcr[6];
+static u32 save_mbcr;
+static u32 save_gpio_levels[2];
+static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
+static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
+static u32 save_unin_clock_ctl;
+static struct dbdma_regs save_dbdma[13];
+static struct dbdma_regs save_alt_dbdma[13];
 
-static void __pmac
+static void
 dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
 {
         int i;
@@ -527,7 +527,7 @@ dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
         }
 }
 
-static void __pmac
+static void
 dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
 {
         int i;
@@ -547,7 +547,7 @@ dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
         }
 }
 
-static void __pmac
+static void
 heathrow_sleep(struct macio_chip* macio, int secondary)
 {
         if (secondary) {
@@ -580,7 +580,7 @@ heathrow_sleep(struct macio_chip* macio, int secondary)
         (void)MACIO_IN32(HEATHROW_FCR);
 }
 
-static void __pmac
+static void
 heathrow_wakeup(struct macio_chip* macio, int secondary)
 {
         if (secondary) {
@@ -605,7 +605,7 @@ heathrow_wakeup(struct macio_chip* macio, int secondary)
         }
 }
 
-static long __pmac
+static long
 heathrow_sleep_state(struct device_node* node, long param, long value)
 {
         if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
@@ -622,7 +622,7 @@ heathrow_sleep_state(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_scc_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -723,7 +723,7 @@ core99_scc_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_modem_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -775,7 +775,7 @@ core99_modem_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 pangea_modem_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -830,7 +830,7 @@ pangea_modem_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_ata100_enable(struct device_node* node, long value)
 {
         unsigned long flags;
@@ -860,7 +860,7 @@ core99_ata100_enable(struct device_node* node, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_ide_enable(struct device_node* node, long param, long value)
 {
         /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
@@ -883,7 +883,7 @@ core99_ide_enable(struct device_node* node, long param, long value)
         }
 }
 
-static long __pmac
+static long
 core99_ide_reset(struct device_node* node, long param, long value)
 {
         switch(param) {
@@ -901,7 +901,7 @@ core99_ide_reset(struct device_node* node, long param, long value)
         }
 }
 
-static long __pmac
+static long
 core99_gmac_enable(struct device_node* node, long param, long value)
 {
         unsigned long flags;
@@ -918,7 +918,7 @@ core99_gmac_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_gmac_phy_reset(struct device_node* node, long param, long value)
 {
         unsigned long flags;
@@ -943,7 +943,7 @@ core99_gmac_phy_reset(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_sound_chip_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -973,7 +973,7 @@ core99_sound_chip_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_airport_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip*      macio;
@@ -1060,7 +1060,7 @@ core99_airport_enable(struct device_node* node, long param, long value)
 }
 
 #ifdef CONFIG_SMP
-static long __pmac
+static long
 core99_reset_cpu(struct device_node* node, long param, long value)
 {
         unsigned int reset_io = 0;
@@ -1104,7 +1104,7 @@ core99_reset_cpu(struct device_node* node, long param, long value)
 }
 #endif /* CONFIG_SMP */
 
-static long __pmac
+static long
 core99_usb_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip* macio;
@@ -1257,7 +1257,7 @@ core99_usb_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_firewire_enable(struct device_node* node, long param, long value)
 {
         unsigned long flags;
@@ -1284,7 +1284,7 @@ core99_firewire_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 core99_firewire_cable_power(struct device_node* node, long param, long value)
 {
         unsigned long flags;
@@ -1315,7 +1315,7 @@ core99_firewire_cable_power(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 intrepid_aack_delay_enable(struct device_node* node, long param, long value)
 {
         unsigned long flags;
@@ -1336,7 +1336,7 @@ intrepid_aack_delay_enable(struct device_node* node, long param, long value)
 
 #endif /* CONFIG_POWER4 */
 
-static long __pmac
+static long
 core99_read_gpio(struct device_node* node, long param, long value)
 {
         struct macio_chip* macio = &macio_chips[0];
@@ -1345,7 +1345,7 @@ core99_read_gpio(struct device_node* node, long param, long value)
 }
 
 
-static long __pmac
+static long
 core99_write_gpio(struct device_node* node, long param, long value)
 {
         struct macio_chip* macio = &macio_chips[0];
@@ -1356,7 +1356,7 @@ core99_write_gpio(struct device_node* node, long param, long value)
 
 #ifdef CONFIG_POWER4
 
-static long __pmac
+static long
 g5_gmac_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip* macio = &macio_chips[0];
@@ -1380,7 +1380,7 @@ g5_gmac_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 g5_fw_enable(struct device_node* node, long param, long value)
 {
         struct macio_chip* macio = &macio_chips[0];
@@ -1403,7 +1403,7 @@ g5_fw_enable(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 g5_mpic_enable(struct device_node* node, long param, long value)
 {
         unsigned long flags;
@@ -1419,7 +1419,7 @@ g5_mpic_enable(struct device_node* node, long param, long value)
 }
 
 #ifdef CONFIG_SMP
-static long __pmac
+static long
 g5_reset_cpu(struct device_node* node, long param, long value)
 {
         unsigned int reset_io = 0;
@@ -1465,7 +1465,7 @@ g5_reset_cpu(struct device_node* node, long param, long value)
  * This takes the second CPU off the bus on dual CPU machines
  * running UP
  */
-void __pmac g5_phy_disable_cpu1(void)
+void g5_phy_disable_cpu1(void)
 {
         UN_OUT(U3_API_PHY_CONFIG_1, 0);
 }
@@ -1474,7 +1474,7 @@ void __pmac g5_phy_disable_cpu1(void)
 
 #ifndef CONFIG_POWER4
 
-static void __pmac
+static void
 keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
 {
         u32 temp;
@@ -1528,7 +1528,7 @@ keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
 }
 
-static void __pmac
+static void
 pangea_shutdown(struct macio_chip* macio, int sleep_mode)
 {
         u32 temp;
@@ -1562,7 +1562,7 @@ pangea_shutdown(struct macio_chip* macio, int sleep_mode)
         (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
 }
 
-static void __pmac
+static void
 intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
 {
         u32 temp;
@@ -1591,7 +1591,7 @@ intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
 }
 
 
-void __pmac pmac_tweak_clock_spreading(int enable)
+void pmac_tweak_clock_spreading(int enable)
 {
         struct macio_chip* macio = &macio_chips[0];
 
@@ -1698,7 +1698,7 @@ void __pmac pmac_tweak_clock_spreading(int enable)
 }
 
 
-static int __pmac
+static int
 core99_sleep(void)
 {
         struct macio_chip* macio;
@@ -1791,7 +1791,7 @@ core99_sleep(void)
         return 0;
 }
 
-static int __pmac
+static int
 core99_wake_up(void)
 {
         struct macio_chip* macio;
@@ -1854,7 +1854,7 @@ core99_wake_up(void)
         return 0;
 }
 
-static long __pmac
+static long
 core99_sleep_state(struct device_node* node, long param, long value)
 {
         /* Param == 1 means to enter the "fake sleep" mode that is
@@ -1884,7 +1884,7 @@ core99_sleep_state(struct device_node* node, long param, long value)
 
 #endif /* CONFIG_POWER4 */
 
-static long __pmac
+static long
 generic_dev_can_wake(struct device_node* node, long param, long value)
 {
         /* Todo: eventually check we are really dealing with on-board
@@ -1896,7 +1896,7 @@ generic_dev_can_wake(struct device_node* node, long param, long value)
         return 0;
 }
 
-static long __pmac
+static long
 generic_get_mb_info(struct device_node* node, long param, long value)
 {
         switch(param) {
@@ -1919,7 +1919,7 @@ generic_get_mb_info(struct device_node* node, long param, long value)
 
 /* Used on any machine
  */
-static struct feature_table_entry any_features[]  __pmacdata = {
+static struct feature_table_entry any_features[] = {
         { PMAC_FTR_GET_MB_INFO,         generic_get_mb_info },
         { PMAC_FTR_DEVICE_CAN_WAKE,     generic_dev_can_wake },
         { 0, NULL }
@@ -1931,7 +1931,7 @@ static struct feature_table_entry any_features[]  __pmacdata = {
  * 2400,3400 and 3500 series powerbooks. Some older desktops seem
  * to have issues with turning on/off those asic cells
  */
-static struct feature_table_entry ohare_features[]  __pmacdata = {
+static struct feature_table_entry ohare_features[] = {
         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
         { PMAC_FTR_SWIM3_ENABLE,        ohare_floppy_enable },
         { PMAC_FTR_MESH_ENABLE,         ohare_mesh_enable },
@@ -1945,7 +1945,7 @@ static struct feature_table_entry ohare_features[]  __pmacdata = {
  * Separated as some features couldn't be properly tested
  * and the serial port control bits appear to confuse it.
  */
-static struct feature_table_entry heathrow_desktop_features[]  __pmacdata = {
+static struct feature_table_entry heathrow_desktop_features[] = {
         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
         { PMAC_FTR_MESH_ENABLE,         heathrow_mesh_enable },
         { PMAC_FTR_IDE_ENABLE,          heathrow_ide_enable },
@@ -1957,7 +1957,7 @@ static struct feature_table_entry heathrow_desktop_features[]  __pmacdata = {
 /* Heathrow based laptop, that is the Wallstreet and mainstreet
  * powerbooks.
  */
-static struct feature_table_entry heathrow_laptop_features[]  __pmacdata = {
+static struct feature_table_entry heathrow_laptop_features[] = {
         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
@@ -1973,7 +1973,7 @@ static struct feature_table_entry heathrow_laptop_features[]  __pmacdata = {
 /* Paddington based machines
  * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
  */
-static struct feature_table_entry paddington_features[]  __pmacdata = {
+static struct feature_table_entry paddington_features[] = {
         { PMAC_FTR_SCC_ENABLE,          ohare_htw_scc_enable },
         { PMAC_FTR_MODEM_ENABLE,        heathrow_modem_enable },
         { PMAC_FTR_SWIM3_ENABLE,        heathrow_floppy_enable },
@@ -1991,7 +1991,7 @@ static struct feature_table_entry paddington_features[]  __pmacdata = {
  * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
  * used on iBook2 & iMac "flow power".
  */
-static struct feature_table_entry core99_features[]  __pmacdata = {
+static struct feature_table_entry core99_features[] = {
         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
         { PMAC_FTR_MODEM_ENABLE,        core99_modem_enable },
         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
@@ -2014,7 +2014,7 @@ static struct feature_table_entry core99_features[]  __pmacdata = {
 
 /* RackMac
  */
-static struct feature_table_entry rackmac_features[]  __pmacdata = {
+static struct feature_table_entry rackmac_features[] = {
         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
         { PMAC_FTR_IDE_RESET,           core99_ide_reset },
@@ -2034,7 +2034,7 @@ static struct feature_table_entry rackmac_features[]  __pmacdata = {
 
 /* Pangea features
  */
-static struct feature_table_entry pangea_features[]  __pmacdata = {
+static struct feature_table_entry pangea_features[] = {
         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
@@ -2054,7 +2054,7 @@ static struct feature_table_entry pangea_features[]  __pmacdata = {
 
 /* Intrepid features
  */
-static struct feature_table_entry intrepid_features[]  __pmacdata = {
+static struct feature_table_entry intrepid_features[] = {
         { PMAC_FTR_SCC_ENABLE,          core99_scc_enable },
         { PMAC_FTR_MODEM_ENABLE,        pangea_modem_enable },
         { PMAC_FTR_IDE_ENABLE,          core99_ide_enable },
@@ -2077,7 +2077,7 @@ static struct feature_table_entry intrepid_features[]  __pmacdata = {
 
 /* G5 features
  */
-static struct feature_table_entry g5_features[]  __pmacdata = {
+static struct feature_table_entry g5_features[] = {
         { PMAC_FTR_GMAC_ENABLE,         g5_gmac_enable },
         { PMAC_FTR_1394_ENABLE,         g5_fw_enable },
         { PMAC_FTR_ENABLE_MPIC,         g5_mpic_enable },
@@ -2091,7 +2091,7 @@ static struct feature_table_entry g5_features[]  __pmacdata = {
 
 #endif /* CONFIG_POWER4 */
 
-static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
+static struct pmac_mb_def pmac_mb_defs[] = {
 #ifndef CONFIG_POWER4
         /*
          * Desktops
@@ -2356,7 +2356,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
 /*
  * The toplevel feature_call callback
  */
-long __pmac
+long
 pmac_do_feature_call(unsigned int selector, ...)
 {
         struct device_node* node;
@@ -2939,8 +2939,8 @@ void __init pmac_check_ht_link(void)
  * Early video resume hook
  */
 
-static void (*pmac_early_vresume_proc)(void *data) __pmacdata;
-static void *pmac_early_vresume_data __pmacdata;
+static void (*pmac_early_vresume_proc)(void *data);
+static void *pmac_early_vresume_data;
 
 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
 {
@@ -2953,7 +2953,7 @@ void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
 }
 EXPORT_SYMBOL(pmac_set_early_video_resume);
 
-void __pmac pmac_call_early_video_resume(void)
+void pmac_call_early_video_resume(void)
 {
         if (pmac_early_vresume_proc)
                 pmac_early_vresume_proc(pmac_early_vresume_data);
@@ -2963,11 +2963,11 @@ void __pmac pmac_call_early_video_resume(void)
  * AGP related suspend/resume code
  */
 
-static struct pci_dev *pmac_agp_bridge __pmacdata;
-static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata;
-static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata;
+static struct pci_dev *pmac_agp_bridge;
+static int (*pmac_agp_suspend)(struct pci_dev *bridge);
+static int (*pmac_agp_resume)(struct pci_dev *bridge);
 
-void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
+void pmac_register_agp_pm(struct pci_dev *bridge,
                                  int (*suspend)(struct pci_dev *bridge),
                                  int (*resume)(struct pci_dev *bridge))
 {
@@ -2984,7 +2984,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
 }
 EXPORT_SYMBOL(pmac_register_agp_pm);
 
-void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
+void pmac_suspend_agp_for_card(struct pci_dev *dev)
 {
         if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
                 return;
@@ -2994,7 +2994,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
 }
 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
 
-void __pmac pmac_resume_agp_for_card(struct pci_dev *dev)
+void pmac_resume_agp_for_card(struct pci_dev *dev)
 {
         if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
                 return;
diff --git a/arch/ppc/platforms/pmac_nvram.c b/arch/ppc/platforms/pmac_nvram.c
index c9de64205996..8c9b008c7226 100644
--- a/arch/ppc/platforms/pmac_nvram.c
+++ b/arch/ppc/platforms/pmac_nvram.c
@@ -88,17 +88,17 @@ extern int system_running;
 static int (*core99_write_bank)(int bank, u8* datas);
 static int (*core99_erase_bank)(int bank);
 
-static char *nvram_image __pmacdata;
+static char *nvram_image;
 
 
-static unsigned char __pmac core99_nvram_read_byte(int addr)
+static unsigned char core99_nvram_read_byte(int addr)
 {
         if (nvram_image == NULL)
                 return 0xff;
         return nvram_image[addr];
 }
 
-static void __pmac core99_nvram_write_byte(int addr, unsigned char val)
+static void core99_nvram_write_byte(int addr, unsigned char val)
 {
         if (nvram_image == NULL)
                 return;
@@ -106,18 +106,18 @@ static void __pmac core99_nvram_write_byte(int addr, unsigned char val)
 }
 
 
-static unsigned char __openfirmware direct_nvram_read_byte(int addr)
+static unsigned char direct_nvram_read_byte(int addr)
 {
         return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]);
 }
 
-static void __openfirmware direct_nvram_write_byte(int addr, unsigned char val)
+static void direct_nvram_write_byte(int addr, unsigned char val)
 {
         out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val);
 }
 
 
-static unsigned char __pmac indirect_nvram_read_byte(int addr)
+static unsigned char indirect_nvram_read_byte(int addr)
 {
         unsigned char val;
         unsigned long flags;
@@ -130,7 +130,7 @@ static unsigned char __pmac indirect_nvram_read_byte(int addr)
         return val;
 }
 
-static void __pmac indirect_nvram_write_byte(int addr, unsigned char val)
+static void indirect_nvram_write_byte(int addr, unsigned char val)
 {
         unsigned long flags;
 
@@ -143,13 +143,13 @@ static void __pmac indirect_nvram_write_byte(int addr, unsigned char val)
 
 #ifdef CONFIG_ADB_PMU
 
-static void __pmac pmu_nvram_complete(struct adb_request *req)
+static void pmu_nvram_complete(struct adb_request *req)
 {
         if (req->arg)
                 complete((struct completion *)req->arg);
 }
 
-static unsigned char __pmac pmu_nvram_read_byte(int addr)
+static unsigned char pmu_nvram_read_byte(int addr)
 {
         struct adb_request req;
         DECLARE_COMPLETION(req_complete); 
@@ -165,7 +165,7 @@ static unsigned char __pmac pmu_nvram_read_byte(int addr)
         return req.reply[0];
 }
 
-static void __pmac pmu_nvram_write_byte(int addr, unsigned char val)
+static void pmu_nvram_write_byte(int addr, unsigned char val)
 {
         struct adb_request req;
         DECLARE_COMPLETION(req_complete); 
@@ -183,7 +183,7 @@ static void __pmac pmu_nvram_write_byte(int addr, unsigned char val)
 #endif /* CONFIG_ADB_PMU */
 
 
-static u8 __pmac chrp_checksum(struct chrp_header* hdr)
+static u8 chrp_checksum(struct chrp_header* hdr)
 {
         u8 *ptr;
         u16 sum = hdr->signature;
@@ -194,7 +194,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
         return sum;
 }
 
-static u32 __pmac core99_calc_adler(u8 *buffer)
+static u32 core99_calc_adler(u8 *buffer)
 {
         int cnt;
         u32 low, high;
@@ -216,7 +216,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
         return (high << 16) | low;
 }
 
-static u32 __pmac core99_check(u8* datas)
+static u32 core99_check(u8* datas)
 {
         struct core99_header* hdr99 = (struct core99_header*)datas;
 
@@ -235,7 +235,7 @@ static u32 __pmac core99_check(u8* datas)
         return hdr99->generation;
 }
 
-static int __pmac sm_erase_bank(int bank)
+static int sm_erase_bank(int bank)
 {
         int stat, i;
         unsigned long timeout;
@@ -267,7 +267,7 @@ static int __pmac sm_erase_bank(int bank)
         return 0;
 }
 
-static int __pmac sm_write_bank(int bank, u8* datas)
+static int sm_write_bank(int bank, u8* datas)
 {
         int i, stat = 0;
         unsigned long timeout;
@@ -302,7 +302,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
         return 0;
 }
 
-static int __pmac amd_erase_bank(int bank)
+static int amd_erase_bank(int bank)
 {
         int i, stat = 0;
         unsigned long timeout;
@@ -349,7 +349,7 @@ static int __pmac amd_erase_bank(int bank)
         return 0;
 }
 
-static int __pmac amd_write_bank(int bank, u8* datas)
+static int amd_write_bank(int bank, u8* datas)
 {
         int i, stat = 0;
         unsigned long timeout;
@@ -430,7 +430,7 @@ static void __init lookup_partitions(void)
         DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]);
 }
 
-static void __pmac core99_nvram_sync(void)
+static void core99_nvram_sync(void)
 {
         struct core99_header* hdr99;
         unsigned long flags;
@@ -554,12 +554,12 @@ void __init pmac_nvram_init(void)
         lookup_partitions();
 }
 
-int __pmac pmac_get_partition(int partition)
+int pmac_get_partition(int partition)
 {
         return nvram_partitions[partition];
 }
 
-u8 __pmac pmac_xpram_read(int xpaddr)
+u8 pmac_xpram_read(int xpaddr)
 {
         int offset = nvram_partitions[pmac_nvram_XPRAM];
 
@@ -569,7 +569,7 @@ u8 __pmac pmac_xpram_read(int xpaddr)
         return ppc_md.nvram_read_val(xpaddr + offset);
 }
 
-void __pmac pmac_xpram_write(int xpaddr, u8 data)
+void pmac_xpram_write(int xpaddr, u8 data)
 {
         int offset = nvram_partitions[pmac_nvram_XPRAM];
 
diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c
index 719fb49fe2bc..786295b6ddd0 100644
--- a/arch/ppc/platforms/pmac_pci.c
+++ b/arch/ppc/platforms/pmac_pci.c
@@ -141,7 +141,7 @@ fixup_bus_range(struct device_node *bridge)
         |(((unsigned long)(off)) & 0xFCUL) \
         |1UL)
 
-static void volatile __iomem * __pmac
+static void volatile __iomem *
 macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
 {
         unsigned int caddr;
@@ -162,7 +162,7 @@ macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
         return hose->cfg_data + offset;
 }
 
-static int __pmac
+static int
 macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                     int len, u32 *val)
 {
@@ -190,7 +190,7 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
         return PCIBIOS_SUCCESSFUL;
 }
 
-static int __pmac
+static int
 macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                      int len, u32 val)
 {
@@ -230,7 +230,7 @@ static struct pci_ops macrisc_pci_ops =
 /*
  * Verifiy that a specific (bus, dev_fn) exists on chaos
  */
-static int __pmac
+static int
 chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
 {
         struct device_node *np;
@@ -252,7 +252,7 @@ chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
         return PCIBIOS_SUCCESSFUL;
 }
 
-static int __pmac
+static int
 chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                   int len, u32 *val)
 {
@@ -264,7 +264,7 @@ chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
         return macrisc_read_config(bus, devfn, offset, len, val);
 }
 
-static int __pmac
+static int
 chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                    int len, u32 val)
 {
@@ -294,7 +294,7 @@ static struct pci_ops chaos_pci_ops =
                 + (((unsigned long)bus) << 16) \
                 + 0x01000000UL)
 
-static void volatile __iomem * __pmac
+static void volatile __iomem *
 u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
 {
         if (bus == hose->first_busno) {
@@ -307,7 +307,7 @@ u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
                 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
 }
 
-static int __pmac
+static int
 u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                     int len, u32 *val)
 {
@@ -357,7 +357,7 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
         return PCIBIOS_SUCCESSFUL;
 }
 
-static int __pmac
+static int
 u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                      int len, u32 val)
 {
@@ -575,7 +575,7 @@ pmac_find_bridges(void)
          * some offset between bus number and domains for now when we
          * assign all busses should help for now
          */
-        if (pci_assign_all_busses)
+        if (pci_assign_all_buses)
                 pcibios_assign_bus_offset = 0x10;
 
 #ifdef CONFIG_POWER4 
@@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
 static int __init
 setup_uninorth(struct pci_controller* hose, struct reg_property* addr)
 {
-        pci_assign_all_busses = 1;
+        pci_assign_all_buses = 1;
         has_uninorth = 1;
         hose->ops = &macrisc_pci_ops;
         hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
@@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr)
 {
         /* On G5, we move AGP up to high bus number so we don't need
          * to reassign bus numbers for HT. If we ever have P2P bridges
-         * on AGP, we'll have to move pci_assign_all_busses to the
+         * on AGP, we'll have to move pci_assign_all_buses to the
          * pci_controller structure so we enable it for AGP and not for
          * HT childs.
          * We hard code the address because of the different size of
@@ -899,7 +899,7 @@ pmac_pcibios_fixup(void)
         pcibios_fixup_OF_interrupts();
 }
 
-int __pmac
+int
 pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
 {
         struct device_node* node;
@@ -1096,7 +1096,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
  * Disable second function on K2-SATA, it's broken
  * and disable IO BARs on first one
  */
-void __pmac pmac_pci_fixup_k2_sata(struct pci_dev* dev)
+void pmac_pci_fixup_k2_sata(struct pci_dev* dev)
 {
         int i;
         u16 cmd;
diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c
index 2ce058895e03..9f2d95ea8564 100644
--- a/arch/ppc/platforms/pmac_pic.c
+++ b/arch/ppc/platforms/pmac_pic.c
@@ -35,6 +35,7 @@
 #include <asm/open_pic.h>
 #include <asm/xmon.h>
 #include <asm/pmac_feature.h>
+#include <asm/machdep.h>
 
 #include "pmac_pic.h"
 
@@ -53,7 +54,7 @@ struct pmac_irq_hw {
 };
 
 /* Default addresses */
-static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = {
+static volatile struct pmac_irq_hw *pmac_irq_hw[4] = {
         (struct pmac_irq_hw *) 0xf3000020,
         (struct pmac_irq_hw *) 0xf3000010,
         (struct pmac_irq_hw *) 0xf4000020,
@@ -64,22 +65,22 @@ static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = {
 #define OHARE_LEVEL_MASK        0x1ff00000
 #define HEATHROW_LEVEL_MASK     0x1ff00000
 
-static int max_irqs __pmacdata;
-static int max_real_irqs __pmacdata;
-static u32 level_mask[4] __pmacdata;
+static int max_irqs;
+static int max_real_irqs;
+static u32 level_mask[4];
 
-static DEFINE_SPINLOCK(pmac_pic_lock __pmacdata);
+static DEFINE_SPINLOCK(pmac_pic_lock);
 
 
 #define GATWICK_IRQ_POOL_SIZE        10
-static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE] __pmacdata;
+static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
 
 /*
  * Mark an irq as "lost".  This is only used on the pmac
  * since it can lose interrupts (see pmac_set_irq_mask).
  * -- Cort
  */
-void __pmac
+void
 __set_lost(unsigned long irq_nr, int nokick)
 {
         if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
@@ -89,7 +90,7 @@ __set_lost(unsigned long irq_nr, int nokick)
         }
 }
 
-static void __pmac
+static void
 pmac_mask_and_ack_irq(unsigned int irq_nr)
 {
         unsigned long bit = 1UL << (irq_nr & 0x1f);
@@ -114,7 +115,7 @@ pmac_mask_and_ack_irq(unsigned int irq_nr)
         spin_unlock_irqrestore(&pmac_pic_lock, flags);
 }
 
-static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
+static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
 {
         unsigned long bit = 1UL << (irq_nr & 0x1f);
         int i = irq_nr >> 5;
@@ -147,7 +148,7 @@ static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
 /* When an irq gets requested for the first client, if it's an
  * edge interrupt, we clear any previous one on the controller
  */
-static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr)
+static unsigned int pmac_startup_irq(unsigned int irq_nr)
 {
         unsigned long bit = 1UL << (irq_nr & 0x1f);
         int i = irq_nr >> 5;
@@ -160,20 +161,20 @@ static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr)
         return 0;
 }
 
-static void __pmac pmac_mask_irq(unsigned int irq_nr)
+static void pmac_mask_irq(unsigned int irq_nr)
 {
         clear_bit(irq_nr, ppc_cached_irq_mask);
         pmac_set_irq_mask(irq_nr, 0);
         mb();
 }
 
-static void __pmac pmac_unmask_irq(unsigned int irq_nr)
+static void pmac_unmask_irq(unsigned int irq_nr)
 {
         set_bit(irq_nr, ppc_cached_irq_mask);
         pmac_set_irq_mask(irq_nr, 0);
 }
 
-static void __pmac pmac_end_irq(unsigned int irq_nr)
+static void pmac_end_irq(unsigned int irq_nr)
 {
         if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
             && irq_desc[irq_nr].action) {
diff --git a/arch/ppc/platforms/pmac_setup.c b/arch/ppc/platforms/pmac_setup.c
index d6356f480d90..55d2beffe560 100644
--- a/arch/ppc/platforms/pmac_setup.c
+++ b/arch/ppc/platforms/pmac_setup.c
@@ -122,7 +122,7 @@ extern struct smp_ops_t psurge_smp_ops;
 extern struct smp_ops_t core99_smp_ops;
 #endif /* CONFIG_SMP */
 
-static int __pmac
+static int
 pmac_show_cpuinfo(struct seq_file *m)
 {
         struct device_node *np;
@@ -226,7 +226,7 @@ pmac_show_cpuinfo(struct seq_file *m)
         return 0;
 }
 
-static int __openfirmware
+static int
 pmac_show_percpuinfo(struct seq_file *m, int i)
 {
 #ifdef CONFIG_CPU_FREQ_PMAC
@@ -330,9 +330,9 @@ pmac_setup_arch(void)
 #ifdef CONFIG_SMP
         /* Check for Core99 */
         if (find_devices("uni-n") || find_devices("u3"))
-                ppc_md.smp_ops = &core99_smp_ops;
+                smp_ops = &core99_smp_ops;
         else
-                ppc_md.smp_ops = &psurge_smp_ops;
+                smp_ops = &psurge_smp_ops;
 #endif /* CONFIG_SMP */
 
         pci_create_OF_bus_map();
@@ -447,7 +447,7 @@ static int pmac_pm_enter(suspend_state_t state)
         enable_kernel_fp();
 
 #ifdef CONFIG_ALTIVEC
-        if (cur_cpu_spec[0]->cpu_features & CPU_FTR_ALTIVEC)
+        if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
                 enable_kernel_altivec();
 #endif /* CONFIG_ALTIVEC */
 
@@ -485,7 +485,7 @@ static int pmac_late_init(void)
 late_initcall(pmac_late_init);
 
 /* can't be __init - can be called whenever a disk is first accessed */
-void __pmac
+void
 note_bootable_part(dev_t dev, int part, int goodness)
 {
         static int found_boot = 0;
@@ -511,7 +511,7 @@ note_bootable_part(dev_t dev, int part, int goodness)
         }
 }
 
-static void __pmac
+static void
 pmac_restart(char *cmd)
 {
 #ifdef CONFIG_ADB_CUDA
@@ -536,7 +536,7 @@ pmac_restart(char *cmd)
         }
 }
 
-static void __pmac
+static void
 pmac_power_off(void)
 {
 #ifdef CONFIG_ADB_CUDA
@@ -561,7 +561,7 @@ pmac_power_off(void)
         }
 }
 
-static void __pmac
+static void
 pmac_halt(void)
 {
    pmac_power_off();
@@ -661,7 +661,6 @@ pmac_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ppc_md.setup_arch     = pmac_setup_arch;
         ppc_md.show_cpuinfo   = pmac_show_cpuinfo;
         ppc_md.show_percpuinfo = pmac_show_percpuinfo;
-        ppc_md.irq_canonicalize = NULL;
         ppc_md.init_IRQ       = pmac_pic_init;
         ppc_md.get_irq        = pmac_get_irq; /* Changed later on ... */
 
diff --git a/arch/ppc/platforms/pmac_sleep.S b/arch/ppc/platforms/pmac_sleep.S
index 88419c77ac43..22b113d19b24 100644
--- a/arch/ppc/platforms/pmac_sleep.S
+++ b/arch/ppc/platforms/pmac_sleep.S
@@ -387,10 +387,10 @@ turn_on_mmu:
 #endif /* defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ) */
 
         .section .data
-        .balign L1_CACHE_LINE_SIZE
+        .balign L1_CACHE_BYTES
 sleep_storage:
         .long 0
-        .balign L1_CACHE_LINE_SIZE, 0
+        .balign L1_CACHE_BYTES, 0
 
 #endif /* CONFIG_6xx */
         .section .text
diff --git a/arch/ppc/platforms/pmac_smp.c b/arch/ppc/platforms/pmac_smp.c
index 794a23994b82..26ff26238f03 100644
--- a/arch/ppc/platforms/pmac_smp.c
+++ b/arch/ppc/platforms/pmac_smp.c
@@ -186,7 +186,7 @@ static inline void psurge_clr_ipi(int cpu)
  */
 static unsigned long psurge_smp_message[NR_CPUS];
 
-void __pmac psurge_smp_message_recv(struct pt_regs *regs)
+void psurge_smp_message_recv(struct pt_regs *regs)
 {
         int cpu = smp_processor_id();
         int msg;
@@ -203,14 +203,13 @@ void __pmac psurge_smp_message_recv(struct pt_regs *regs)
                         smp_message_recv(msg, regs);
 }
 
-irqreturn_t __pmac psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
+irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
 {
         psurge_smp_message_recv(regs);
         return IRQ_HANDLED;
 }
 
-static void __pmac smp_psurge_message_pass(int target, int msg, unsigned long data,
-                                           int wait)
+static void smp_psurge_message_pass(int target, int msg)
 {
         int i;
 
@@ -629,7 +628,7 @@ void smp_core99_give_timebase(void)
 
 
 /* PowerSurge-style Macs */
-struct smp_ops_t psurge_smp_ops __pmacdata = {
+struct smp_ops_t psurge_smp_ops = {
         .message_pass   = smp_psurge_message_pass,
         .probe          = smp_psurge_probe,
         .kick_cpu       = smp_psurge_kick_cpu,
@@ -639,7 +638,7 @@ struct smp_ops_t psurge_smp_ops __pmacdata = {
 };
 
 /* Core99 Macs (dual G4s) */
-struct smp_ops_t core99_smp_ops __pmacdata = {
+struct smp_ops_t core99_smp_ops = {
         .message_pass   = smp_openpic_message_pass,
         .probe          = smp_core99_probe,
         .kick_cpu       = smp_core99_kick_cpu,
diff --git a/arch/ppc/platforms/pmac_time.c b/arch/ppc/platforms/pmac_time.c
index efb819f9490d..edb9fcc64790 100644
--- a/arch/ppc/platforms/pmac_time.c
+++ b/arch/ppc/platforms/pmac_time.c
@@ -77,7 +77,7 @@ pmac_time_init(void)
 #endif
 }
 
-unsigned long __pmac
+unsigned long
 pmac_get_rtc_time(void)
 {
 #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -118,7 +118,7 @@ pmac_get_rtc_time(void)
         return 0;
 }
 
-int __pmac
+int
 pmac_set_rtc_time(unsigned long nowtime)
 {
 #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -210,7 +210,7 @@ via_calibrate_decr(void)
 /*
  * Reset the time after a sleep.
  */
-static int __pmac
+static int
 time_sleep_notify(struct pmu_sleep_notifier *self, int when)
 {
         static unsigned long time_diff;
@@ -235,7 +235,7 @@ time_sleep_notify(struct pmu_sleep_notifier *self, int when)
         return PBOOK_SLEEP_OK;
 }
 
-static struct pmu_sleep_notifier time_sleep_notifier __pmacdata = {
+static struct pmu_sleep_notifier time_sleep_notifier = {
         time_sleep_notify, SLEEP_LEVEL_MISC,
 };
 #endif /* CONFIG_PM */
diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c
index e70aae20d6f9..22bd40cfb092 100644
--- a/arch/ppc/platforms/pplus.c
+++ b/arch/ppc/platforms/pplus.c
@@ -646,14 +646,6 @@ static void pplus_power_off(void)
         pplus_halt();
 }
 
-static unsigned int pplus_irq_canonicalize(u_int irq)
-{
-        if (irq == 2)
-                return 9;
-        else
-                return irq;
-}
-
 static void __init pplus_init_IRQ(void)
 {
         int i;
@@ -673,10 +665,7 @@ static void __init pplus_init_IRQ(void)
                 ppc_md.get_irq = openpic_get_irq;
         }
 
-        for (i = 0; i < NUM_8259_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-
-        i8259_init(0);
+        i8259_init(0, 0);
 
         if (ppc_md.progress)
                 ppc_md.progress("init_irq: exit", 0);
@@ -872,10 +861,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ISA_DMA_THRESHOLD = 0x00ffffff;
         DMA_MODE_READ = 0x44;
         DMA_MODE_WRITE = 0x48;
+        ppc_do_canonicalize_irqs = 1;
 
         ppc_md.setup_arch = pplus_setup_arch;
         ppc_md.show_cpuinfo = pplus_show_cpuinfo;
-        ppc_md.irq_canonicalize = pplus_irq_canonicalize;
         ppc_md.init_IRQ = pplus_init_IRQ;
         /* this gets changed later on if we have an OpenPIC -- Cort */
         ppc_md.get_irq = i8259_irq;
@@ -911,6 +900,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
 #endif
 #ifdef CONFIG_SMP
-        ppc_md.smp_ops = &pplus_smp_ops;
+        smp_ops = &pplus_smp_ops;
 #endif                          /* CONFIG_SMP */
 }
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
index 4760cb64251d..e50b9996848c 100644
--- a/arch/ppc/platforms/prep_pci.c
+++ b/arch/ppc/platforms/prep_pci.c
@@ -43,7 +43,7 @@ static unsigned long	*ProcInfo;
 /* Tables for known hardware */
 
 /* Motorola PowerStackII - Utah */
-static char Utah_pci_IRQ_map[23] __prepdata =
+static char Utah_pci_IRQ_map[23] =
 {
         0,   /* Slot 0  - unused */
         0,   /* Slot 1  - unused */
@@ -72,7 +72,7 @@ static char Utah_pci_IRQ_map[23] __prepdata =
         0,   /* Slot 22 - unused */
 };
 
-static char Utah_pci_IRQ_routes[] __prepdata =
+static char Utah_pci_IRQ_routes[] =
 {
         0,   /* Line 0 - Unused */
         9,   /* Line 1 */
@@ -84,7 +84,7 @@ static char Utah_pci_IRQ_routes[] __prepdata =
 
 /* Motorola PowerStackII - Omaha */
 /* no integrated SCSI or ethernet */
-static char Omaha_pci_IRQ_map[23] __prepdata =
+static char Omaha_pci_IRQ_map[23] =
 {
         0,   /* Slot 0  - unused */
         0,   /* Slot 1  - unused */
@@ -111,7 +111,7 @@ static char Omaha_pci_IRQ_map[23] __prepdata =
         0,
 };
 
-static char Omaha_pci_IRQ_routes[] __prepdata =
+static char Omaha_pci_IRQ_routes[] =
 {
         0,   /* Line 0 - Unused */
         9,   /* Line 1 */
@@ -121,7 +121,7 @@ static char Omaha_pci_IRQ_routes[] __prepdata =
 };
 
 /* Motorola PowerStack */
-static char Blackhawk_pci_IRQ_map[19] __prepdata =
+static char Blackhawk_pci_IRQ_map[19] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -144,7 +144,7 @@ static char Blackhawk_pci_IRQ_map[19] __prepdata =
         3,      /* Slot P5 */
 };
 
-static char Blackhawk_pci_IRQ_routes[] __prepdata =
+static char Blackhawk_pci_IRQ_routes[] =
 {
         0,      /* Line 0 - Unused */
         9,      /* Line 1 */
@@ -154,7 +154,7 @@ static char Blackhawk_pci_IRQ_routes[] __prepdata =
 };
 
 /* Motorola Mesquite */
-static char Mesquite_pci_IRQ_map[23] __prepdata =
+static char Mesquite_pci_IRQ_map[23] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -182,7 +182,7 @@ static char Mesquite_pci_IRQ_map[23] __prepdata =
 };
 
 /* Motorola Sitka */
-static char Sitka_pci_IRQ_map[21] __prepdata =
+static char Sitka_pci_IRQ_map[21] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -208,7 +208,7 @@ static char Sitka_pci_IRQ_map[21] __prepdata =
 };
 
 /* Motorola MTX */
-static char MTX_pci_IRQ_map[23] __prepdata =
+static char MTX_pci_IRQ_map[23] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -237,7 +237,7 @@ static char MTX_pci_IRQ_map[23] __prepdata =
 
 /* Motorola MTX Plus */
 /* Secondary bus interrupt routing is not supported yet */
-static char MTXplus_pci_IRQ_map[23] __prepdata =
+static char MTXplus_pci_IRQ_map[23] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -264,13 +264,13 @@ static char MTXplus_pci_IRQ_map[23] __prepdata =
         0,      /* Slot 22 - unused */
 };
 
-static char Raven_pci_IRQ_routes[] __prepdata =
+static char Raven_pci_IRQ_routes[] =
 {
         0,      /* This is a dummy structure */
 };
 
 /* Motorola MVME16xx */
-static char Genesis_pci_IRQ_map[16] __prepdata =
+static char Genesis_pci_IRQ_map[16] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -290,7 +290,7 @@ static char Genesis_pci_IRQ_map[16] __prepdata =
         0,      /* Slot 15 - unused */
 };
 
-static char Genesis_pci_IRQ_routes[] __prepdata =
+static char Genesis_pci_IRQ_routes[] =
 {
         0,      /* Line 0 - Unused */
         10,     /* Line 1 */
@@ -299,7 +299,7 @@ static char Genesis_pci_IRQ_routes[] __prepdata =
         15      /* Line 4 */
 };
 
-static char Genesis2_pci_IRQ_map[23] __prepdata =
+static char Genesis2_pci_IRQ_map[23] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -327,7 +327,7 @@ static char Genesis2_pci_IRQ_map[23] __prepdata =
 };
 
 /* Motorola Series-E */
-static char Comet_pci_IRQ_map[23] __prepdata =
+static char Comet_pci_IRQ_map[23] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -354,7 +354,7 @@ static char Comet_pci_IRQ_map[23] __prepdata =
         0,
 };
 
-static char Comet_pci_IRQ_routes[] __prepdata =
+static char Comet_pci_IRQ_routes[] =
 {
         0,      /* Line 0 - Unused */
         10,     /* Line 1 */
@@ -364,7 +364,7 @@ static char Comet_pci_IRQ_routes[] __prepdata =
 };
 
 /* Motorola Series-EX */
-static char Comet2_pci_IRQ_map[23] __prepdata =
+static char Comet2_pci_IRQ_map[23] =
 {
         0,      /* Slot 0  - unused */
         0,      /* Slot 1  - unused */
@@ -391,7 +391,7 @@ static char Comet2_pci_IRQ_map[23] __prepdata =
         0,
 };
 
-static char Comet2_pci_IRQ_routes[] __prepdata =
+static char Comet2_pci_IRQ_routes[] =
 {
         0,      /* Line 0 - Unused */
         10,     /* Line 1 */
@@ -405,7 +405,7 @@ static char Comet2_pci_IRQ_routes[] __prepdata =
  * This is actually based on the Carolina motherboard
  * -- Cort
  */
-static char ibm8xx_pci_IRQ_map[23] __prepdata = {
+static char ibm8xx_pci_IRQ_map[23] = {
         0, /* Slot 0  - unused */
         0, /* Slot 1  - unused */
         0, /* Slot 2  - unused */
@@ -431,7 +431,7 @@ static char ibm8xx_pci_IRQ_map[23] __prepdata = {
         2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
 };
 
-static char ibm8xx_pci_IRQ_routes[] __prepdata = {
+static char ibm8xx_pci_IRQ_routes[] = {
         0,      /* Line 0 - unused */
         15,     /* Line 1 */
         15,     /* Line 2 */
@@ -443,7 +443,7 @@ static char ibm8xx_pci_IRQ_routes[] __prepdata = {
  * a 6015 ibm board
  * -- Cort
  */
-static char ibm6015_pci_IRQ_map[23] __prepdata = {
+static char ibm6015_pci_IRQ_map[23] = {
         0, /* Slot 0  - unused */
         0, /* Slot 1  - unused */
         0, /* Slot 2  - unused */
@@ -469,7 +469,7 @@ static char ibm6015_pci_IRQ_map[23] __prepdata = {
         2, /* Slot 22 -  */
 };
 
-static char ibm6015_pci_IRQ_routes[] __prepdata = {
+static char ibm6015_pci_IRQ_routes[] = {
         0,      /* Line 0 - unused */
         13,     /* Line 1 */
         15,     /* Line 2 */
@@ -479,7 +479,7 @@ static char ibm6015_pci_IRQ_routes[] __prepdata = {
 
 
 /* IBM Nobis and Thinkpad 850 */
-static char Nobis_pci_IRQ_map[23] __prepdata ={
+static char Nobis_pci_IRQ_map[23] ={
         0, /* Slot 0  - unused */
         0, /* Slot 1  - unused */
         0, /* Slot 2  - unused */
@@ -498,7 +498,7 @@ static char Nobis_pci_IRQ_map[23] __prepdata ={
         0, /* Slot 15 - unused */
 };
 
-static char Nobis_pci_IRQ_routes[] __prepdata = {
+static char Nobis_pci_IRQ_routes[] = {
         0, /* Line 0 - Unused */
         13, /* Line 1 */
         13, /* Line 2 */
@@ -510,7 +510,7 @@ static char Nobis_pci_IRQ_routes[] __prepdata = {
  * IBM RS/6000 43p/140  -- paulus
  * XXX we should get all this from the residual data
  */
-static char ibm43p_pci_IRQ_map[23] __prepdata = {
+static char ibm43p_pci_IRQ_map[23] = {
         0, /* Slot 0  - unused */
         0, /* Slot 1  - unused */
         0, /* Slot 2  - unused */
@@ -536,7 +536,7 @@ static char ibm43p_pci_IRQ_map[23] __prepdata = {
         1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
 };
 
-static char ibm43p_pci_IRQ_routes[] __prepdata = {
+static char ibm43p_pci_IRQ_routes[] = {
         0,      /* Line 0 - unused */
         15,     /* Line 1 */
         15,     /* Line 2 */
@@ -559,7 +559,7 @@ struct powerplus_irq_list
  * are routed to OpenPIC inputs 5-8.  These values are offset by
  * 16 in the table to reflect the Linux kernel interrupt value.
  */
-struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata =
+struct powerplus_irq_list Powerplus_pci_IRQ_list =
 {
         {25, 26, 27, 28},
         {21, 22, 23, 24}
@@ -572,7 +572,7 @@ struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata =
  * are routed to OpenPIC inputs 12-15. These values are offset by
  * 16 in the table to reflect the Linux kernel interrupt value.
  */
-struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata =
+struct powerplus_irq_list Mesquite_pci_IRQ_list =
 {
         {24, 25, 26, 27},
         {28, 29, 30, 31}
@@ -582,7 +582,7 @@ struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata =
  * This table represents the standard PCI swizzle defined in the
  * PCI bus specification.
  */
-static unsigned char prep_pci_intpins[4][4] __prepdata =
+static unsigned char prep_pci_intpins[4][4] =
 {
         { 1, 2, 3, 4},  /* Buses 0, 4, 8, ... */
         { 2, 3, 4, 1},  /* Buses 1, 5, 9, ... */
@@ -622,7 +622,7 @@ static unsigned char prep_pci_intpins[4][4] __prepdata =
 #define MIN_DEVNR       11
 #define MAX_DEVNR       22
 
-static int __prep
+static int
 prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
                  int len, u32 *val)
 {
@@ -652,7 +652,7 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
         return PCIBIOS_SUCCESSFUL;
 }
 
-static int __prep
+static int
 prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                   int len, u32 val)
 {
@@ -804,7 +804,7 @@ struct mot_info {
         void            (*map_non0_bus)(struct pci_dev *);      /* For boards with more than bus 0 devices. */
         struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */
         unsigned char   secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */
-} mot_info[] __prepdata = {
+} mot_info[] = {
         {0x300, 0x00, 0x00, "MVME 2400",                        Genesis2_pci_IRQ_map,   Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
         {0x010, 0x00, 0x00, "Genesis",                          Genesis_pci_IRQ_map,    Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
         {0x020, 0x00, 0x00, "Powerstack (Series E)",            Comet_pci_IRQ_map,      Comet_pci_IRQ_routes, NULL, NULL, 0x00},
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index bc926be95472..067d7d53b81e 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -89,9 +89,6 @@ extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi
 #define cached_21       (((char *)(ppc_cached_irq_mask))[3])
 #define cached_A1       (((char *)(ppc_cached_irq_mask))[2])
 
-/* for the mac fs */
-dev_t boot_dev;
-
 #ifdef CONFIG_SOUND_CS4232
 long ppc_cs4232_dma, ppc_cs4232_dma2;
 #endif
@@ -173,7 +170,7 @@ prep_carolina_enable_l2(void)
 }
 
 /* cpuinfo code common to all IBM PReP */
-static void __prep
+static void
 prep_ibm_cpuinfo(struct seq_file *m)
 {
         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -209,14 +206,14 @@ prep_ibm_cpuinfo(struct seq_file *m)
         }
 }
 
-static int __prep
+static int
 prep_gen_cpuinfo(struct seq_file *m)
 {
         prep_ibm_cpuinfo(m);
         return 0;
 }
 
-static int __prep
+static int
 prep_sandalfoot_cpuinfo(struct seq_file *m)
 {
         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -243,7 +240,7 @@ prep_sandalfoot_cpuinfo(struct seq_file *m)
         return 0;
 }
 
-static int __prep
+static int
 prep_thinkpad_cpuinfo(struct seq_file *m)
 {
         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -314,7 +311,7 @@ prep_thinkpad_cpuinfo(struct seq_file *m)
         return 0;
 }
 
-static int __prep
+static int
 prep_carolina_cpuinfo(struct seq_file *m)
 {
         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -350,7 +347,7 @@ prep_carolina_cpuinfo(struct seq_file *m)
         return 0;
 }
 
-static int __prep
+static int
 prep_tiger1_cpuinfo(struct seq_file *m)
 {
         unsigned int l2_reg = inb(PREP_IBM_L2INFO);
@@ -393,7 +390,7 @@ prep_tiger1_cpuinfo(struct seq_file *m)
 
 
 /* Used by all Motorola PReP */
-static int __prep
+static int
 prep_mot_cpuinfo(struct seq_file *m)
 {
         unsigned int cachew = *((unsigned char *)CACHECRBA);
@@ -454,7 +451,7 @@ no_l2:
         return 0;
 }
 
-static void __prep
+static void
 prep_restart(char *cmd)
 {
 #define PREP_SP92       0x92    /* Special Port 92 */
@@ -473,7 +470,7 @@ prep_restart(char *cmd)
 #undef PREP_SP92
 }
 
-static void __prep
+static void
 prep_halt(void)
 {
         local_irq_disable(); /* no interrupts */
@@ -488,7 +485,7 @@ prep_halt(void)
 /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
  * known about it, so we can't power down.
  */
-static void __prep
+static void
 prep_carrera_poweroff(void)
 {
         prep_halt();
@@ -501,7 +498,7 @@ prep_carrera_poweroff(void)
  * somewhat in the IBM Carolina Technical Specification.
  * -Hollis
  */
-static void __prep
+static void
 utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
 {
         /*
@@ -539,7 +536,7 @@ utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
         udelay(100);                            /* important: let controller recover */
 }
 
-static void __prep
+static void
 prep_sig750_poweroff(void)
 {
         /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
@@ -554,7 +551,7 @@ prep_sig750_poweroff(void)
         /* not reached */
 }
 
-static int __prep
+static int
 prep_show_percpuinfo(struct seq_file *m, int i)
 {
         /* PREP's without residual data will give incorrect values here */
@@ -700,12 +697,12 @@ prep_set_bat(void)
 /*
  * IBM 3-digit status LED
  */
-static unsigned int ibm_statusled_base __prepdata;
+static unsigned int ibm_statusled_base;
 
-static void __prep
+static void
 ibm_statusled_progress(char *s, unsigned short hex);
 
-static int __prep
+static int
 ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
                     void * dummy3)
 {
@@ -713,13 +710,13 @@ ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
         return NOTIFY_DONE;
 }
 
-static struct notifier_block ibm_statusled_block __prepdata = {
+static struct notifier_block ibm_statusled_block = {
         ibm_statusled_panic,
         NULL,
         INT_MAX /* try to do it first */
 };
 
-static void __prep
+static void
 ibm_statusled_progress(char *s, unsigned short hex)
 {
         static int notifier_installed;
@@ -945,19 +942,6 @@ prep_calibrate_decr(void)
                 todc_calibrate_decr();
 }
 
-static unsigned int __prep
-prep_irq_canonicalize(u_int irq)
-{
-        if (irq == 2)
-        {
-                return 9;
-        }
-        else
-        {
-                return irq;
-        }
-}
-
 static void __init
 prep_init_IRQ(void)
 {
@@ -970,11 +954,9 @@ prep_init_IRQ(void)
                 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
                                        i8259_irq);
         }
-        for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
-                irq_desc[i].handler = &i8259_pic;
 
         if (have_residual_data) {
-                i8259_init(residual_isapic_addr());
+                i8259_init(residual_isapic_addr(), 0);
                 return;
         }
 
@@ -985,18 +967,18 @@ prep_init_IRQ(void)
         if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
                         && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
                                 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
-                i8259_init(0);
+                i8259_init(0, 0);
         else
                 /* PCI interrupt ack address given in section 6.1.8 of the
                  * PReP specification. */
-                i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR);
+                i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
 }
 
 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 /*
  * IDE stuff.
  */
-static int __prep
+static int
 prep_ide_default_irq(unsigned long base)
 {
         switch (base) {
@@ -1010,7 +992,7 @@ prep_ide_default_irq(unsigned long base)
         }
 }
 
-static unsigned long __prep
+static unsigned long
 prep_ide_default_io_base(int index)
 {
         switch (index) {
@@ -1055,7 +1037,7 @@ smp_prep_setup_cpu(int cpu_nr)
                 do_openpic_setup_cpu();
 }
 
-static struct smp_ops_t prep_smp_ops __prepdata = {
+static struct smp_ops_t prep_smp_ops = {
         smp_openpic_message_pass,
         smp_prep_probe,
         smp_prep_kick_cpu,
@@ -1113,6 +1095,7 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ISA_DMA_THRESHOLD = 0x00ffffff;
         DMA_MODE_READ = 0x44;
         DMA_MODE_WRITE = 0x48;
+        ppc_do_canonicalize_irqs = 1;
 
         /* figure out what kind of prep workstation we are */
         if (have_residual_data) {
@@ -1139,7 +1122,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ppc_md.setup_arch     = prep_setup_arch;
         ppc_md.show_percpuinfo = prep_show_percpuinfo;
         ppc_md.show_cpuinfo   = NULL; /* set in prep_setup_arch() */
-        ppc_md.irq_canonicalize = prep_irq_canonicalize;
         ppc_md.init_IRQ       = prep_init_IRQ;
         /* this gets changed later on if we have an OpenPIC -- Cort */
         ppc_md.get_irq        = i8259_irq;
@@ -1176,6 +1158,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif
 
 #ifdef CONFIG_SMP
-        ppc_md.smp_ops           = &prep_smp_ops;
+        smp_ops                  = &prep_smp_ops;
 #endif /* CONFIG_SMP */
 }
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
index 0376c8cff5d1..6f97911c330d 100644
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ b/arch/ppc/platforms/radstone_ppc7d.c
@@ -514,13 +514,9 @@ static void __init ppc7d_init_irq(void)
         int irq;
 
         pr_debug("%s\n", __FUNCTION__);
-        i8259_init(0);
+        i8259_init(0, 0);
         mv64360_init_irq();
 
-        /* IRQ 0..15 are handled by the cascaded 8259's of the Ali1535 */
-        for (irq = 0; irq < 16; irq++) {
-                irq_desc[irq].handler = &i8259_pic;
-        }
         /* IRQs 5,6,9,10,11,14,15 are level sensitive */
         irq_desc[5].status |= IRQ_LEVEL;
         irq_desc[6].status |= IRQ_LEVEL;
@@ -1183,18 +1179,18 @@ static void __init ppc7d_setup_arch(void)
                 ROOT_DEV = Root_HDA1;
 #endif
 
-        if ((cur_cpu_spec[0]->cpu_features & CPU_FTR_SPEC7450) ||
-            (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR))
+        if ((cur_cpu_spec->cpu_features & CPU_FTR_SPEC7450) ||
+            (cur_cpu_spec->cpu_features & CPU_FTR_L3CR))
                 /* 745x is different.  We only want to pass along enable. */
                 _set_L2CR(L2CR_L2E);
-        else if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L2CR)
+        else if (cur_cpu_spec->cpu_features & CPU_FTR_L2CR)
                 /* All modules have 1MB of L2.  We also assume that an
                  * L2 divisor of 3 will work.
                  */
                 _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3
                           | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF);
 
-        if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR)
+        if (cur_cpu_spec->cpu_features & CPU_FTR_L3CR)
                 /* No L3 cache */
                 _set_L3CR(0);
 
@@ -1424,6 +1420,7 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ppc_md.setup_arch = ppc7d_setup_arch;
         ppc_md.init = ppc7d_init2;
         ppc_md.show_cpuinfo = ppc7d_show_cpuinfo;
+        /* XXX this is broken... */
         ppc_md.irq_canonicalize = ppc7d_irq_canonicalize;
         ppc_md.init_IRQ = ppc7d_init_irq;
         ppc_md.get_irq = ppc7d_get_irq;
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
index 0f84ca603612..c9911601cfdf 100644
--- a/arch/ppc/platforms/residual.c
+++ b/arch/ppc/platforms/residual.c
@@ -47,7 +47,7 @@
 #include <asm/ide.h>
 
 
-unsigned char __res[sizeof(RESIDUAL)] __prepdata = {0,};
+unsigned char __res[sizeof(RESIDUAL)] = {0,};
 RESIDUAL *res = (RESIDUAL *)&__res;
 
 char * PnP_BASE_TYPES[] __initdata = {
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index 5232283c1974..9eeed3572309 100644
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -494,27 +494,10 @@ sandpoint_init_IRQ(void)
                         i8259_irq);
 
         /*
-         * openpic_init() has set up irq_desc[16-31] to be openpic
-         * interrupts.  We need to set irq_desc[0-15] to be i8259
-         * interrupts.
-         */
-        for(i=0; i < NUM_8259_INTERRUPTS; i++)
-                irq_desc[i].handler = &i8259_pic;
-
-        /*
          * The EPIC allows for a read in the range of 0xFEF00000 ->
          * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
          */
-        i8259_init(0xfef00000);
-}
-
-static u32
-sandpoint_irq_canonicalize(u32 irq)
-{
-        if (irq == 2)
-                return 9;
-        else
-                return irq;
+        i8259_init(0xfef00000, 0);
 }
 
 static unsigned long __init
@@ -727,10 +710,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
         ISA_DMA_THRESHOLD = 0x00ffffff;
         DMA_MODE_READ = 0x44;
         DMA_MODE_WRITE = 0x48;
+        ppc_do_canonicalize_irqs = 1;
 
         ppc_md.setup_arch = sandpoint_setup_arch;
         ppc_md.show_cpuinfo = sandpoint_show_cpuinfo;
-        ppc_md.irq_canonicalize = sandpoint_irq_canonicalize;
         ppc_md.init_IRQ = sandpoint_init_IRQ;
         ppc_md.get_irq = openpic_get_irq;
 
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index b8d08f33f7ee..b4ef15b45c4a 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -31,52 +31,49 @@ obj-$(CONFIG_GEN_RTC)		+= todc_time.o
 obj-$(CONFIG_PPC4xx_DMA)        += ppc4xx_dma.o
 obj-$(CONFIG_PPC4xx_EDMA)       += ppc4xx_sgdma.o
 ifeq ($(CONFIG_40x),y)
-obj-$(CONFIG_PCI)               += indirect_pci.o pci_auto.o ppc405_pci.o
+obj-$(CONFIG_PCI)               += pci_auto.o ppc405_pci.o
 endif
 endif
 obj-$(CONFIG_8xx)               += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \
                                    ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o
-ifeq ($(CONFIG_8xx),y)
-obj-$(CONFIG_PCI)               += qspan_pci.o i8259.o
-endif
-obj-$(CONFIG_PPC_OF)            += prom_init.o prom.o of_device.o
-obj-$(CONFIG_PPC_PMAC)          += open_pic.o indirect_pci.o
+obj-$(CONFIG_PCI_QSPAN)         += qspan_pci.o
+obj-$(CONFIG_PPC_OF)            += prom_init.o prom.o
+obj-$(CONFIG_PPC_PMAC)          += open_pic.o
 obj-$(CONFIG_POWER4)            += open_pic2.o
-obj-$(CONFIG_PPC_CHRP)          += open_pic.o indirect_pci.o i8259.o
-obj-$(CONFIG_PPC_PREP)          += open_pic.o indirect_pci.o i8259.o todc_time.o
-obj-$(CONFIG_BAMBOO)            += indirect_pci.o pci_auto.o todc_time.o
+obj-$(CONFIG_PPC_CHRP)          += open_pic.o
+obj-$(CONFIG_PPC_PREP)          += open_pic.o todc_time.o
+obj-$(CONFIG_BAMBOO)            += pci_auto.o todc_time.o
 obj-$(CONFIG_CPCI690)           += todc_time.o pci_auto.o
-obj-$(CONFIG_EBONY)             += indirect_pci.o pci_auto.o todc_time.o
+obj-$(CONFIG_EBONY)             += pci_auto.o todc_time.o
 obj-$(CONFIG_EV64260)           += todc_time.o pci_auto.o
 obj-$(CONFIG_CHESTNUT)          += mv64360_pic.o pci_auto.o
-obj-$(CONFIG_GEMINI)            += open_pic.o indirect_pci.o
+obj-$(CONFIG_GEMINI)            += open_pic.o
 obj-$(CONFIG_GT64260)           += gt64260_pic.o
-obj-$(CONFIG_LOPEC)             += i8259.o pci_auto.o todc_time.o
+obj-$(CONFIG_LOPEC)             += pci_auto.o todc_time.o
 obj-$(CONFIG_HDPU)              += pci_auto.o
-obj-$(CONFIG_LUAN)              += indirect_pci.o pci_auto.o todc_time.o
+obj-$(CONFIG_LUAN)              += pci_auto.o todc_time.o
 obj-$(CONFIG_KATANA)            += pci_auto.o
 obj-$(CONFIG_MV64360)           += mv64360_pic.o
-obj-$(CONFIG_MV64X60)           += mv64x60.o mv64x60_win.o indirect_pci.o
-obj-$(CONFIG_MVME5100)          += open_pic.o todc_time.o indirect_pci.o \
+obj-$(CONFIG_MV64X60)           += mv64x60.o mv64x60_win.o
+obj-$(CONFIG_MVME5100)          += open_pic.o todc_time.o \
                                         pci_auto.o hawk_common.o
-obj-$(CONFIG_MVME5100_IPMC761_PRESENT)  += i8259.o
-obj-$(CONFIG_OCOTEA)            += indirect_pci.o pci_auto.o todc_time.o
+obj-$(CONFIG_OCOTEA)            += pci_auto.o todc_time.o
 obj-$(CONFIG_PAL4)              += cpc700_pic.o
 obj-$(CONFIG_POWERPMC250)       += pci_auto.o
-obj-$(CONFIG_PPLUS)             += hawk_common.o open_pic.o i8259.o \
-                                   indirect_pci.o todc_time.o pci_auto.o
-obj-$(CONFIG_PRPMC750)          += open_pic.o indirect_pci.o pci_auto.o \
+obj-$(CONFIG_PPLUS)             += hawk_common.o open_pic.o \
+                                   todc_time.o pci_auto.o
+obj-$(CONFIG_PRPMC750)          += open_pic.o pci_auto.o \
                                         hawk_common.o
 obj-$(CONFIG_HARRIER)           += harrier.o
-obj-$(CONFIG_PRPMC800)          += open_pic.o indirect_pci.o pci_auto.o
-obj-$(CONFIG_RADSTONE_PPC7D)    += i8259.o pci_auto.o
-obj-$(CONFIG_SANDPOINT)         += i8259.o pci_auto.o todc_time.o
+obj-$(CONFIG_PRPMC800)          += open_pic.o pci_auto.o
+obj-$(CONFIG_RADSTONE_PPC7D)    += pci_auto.o
+obj-$(CONFIG_SANDPOINT)         += pci_auto.o todc_time.o
 obj-$(CONFIG_SBC82xx)           += todc_time.o
-obj-$(CONFIG_SPRUCE)            += cpc700_pic.o indirect_pci.o pci_auto.o \
+obj-$(CONFIG_SPRUCE)            += cpc700_pic.o pci_auto.o \
                                    todc_time.o
 obj-$(CONFIG_8260)              += m8260_setup.o pq2_devices.o pq2_sys.o \
                                    ppc_sys.o
-obj-$(CONFIG_PCI_8260)          += m82xx_pci.o indirect_pci.o pci_auto.o
+obj-$(CONFIG_PCI_8260)          += m82xx_pci.o pci_auto.o
 obj-$(CONFIG_8260_PCI9)         += m8260_pci_erratum9.o
 obj-$(CONFIG_CPM2)              += cpm2_common.o cpm2_pic.o
 ifeq ($(CONFIG_PPC_GEN550),y)
@@ -87,20 +84,18 @@ ifeq ($(CONFIG_SERIAL_MPSC_CONSOLE),y)
 obj-$(CONFIG_SERIAL_TEXT_DEBUG) += mv64x60_dbg.o
 endif
 obj-$(CONFIG_BOOTX_TEXT)        += btext.o
-obj-$(CONFIG_MPC10X_BRIDGE)     += mpc10x_common.o indirect_pci.o ppc_sys.o
+obj-$(CONFIG_MPC10X_BRIDGE)     += mpc10x_common.o ppc_sys.o
 obj-$(CONFIG_MPC10X_OPENPIC)    += open_pic.o
-obj-$(CONFIG_40x)               += dcr.o
-obj-$(CONFIG_BOOKE)             += dcr.o
 obj-$(CONFIG_85xx)              += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
-                                        ppc_sys.o i8259.o mpc85xx_sys.o \
+                                        ppc_sys.o mpc85xx_sys.o \
                                         mpc85xx_devices.o
 ifeq ($(CONFIG_85xx),y)
-obj-$(CONFIG_PCI)               += indirect_pci.o pci_auto.o
+obj-$(CONFIG_PCI)               += pci_auto.o
 endif
 obj-$(CONFIG_83xx)              += ipic.o ppc83xx_setup.o ppc_sys.o \
                                         mpc83xx_sys.o mpc83xx_devices.o
 ifeq ($(CONFIG_83xx),y)
-obj-$(CONFIG_PCI)               += indirect_pci.o pci_auto.o
+obj-$(CONFIG_PCI)               += pci_auto.o
 endif
 obj-$(CONFIG_MPC8548_CDS)       += todc_time.o
 obj-$(CONFIG_MPC8555_CDS)       += todc_time.o
diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c
index 7734f6836174..12fa83e6774a 100644
--- a/arch/ppc/syslib/btext.c
+++ b/arch/ppc/syslib/btext.c
@@ -53,8 +53,8 @@ extern char *klimit;
  * chrp only uses it during early boot.
  */
 #ifdef CONFIG_XMON
-#define BTEXT   __pmac
-#define BTDATA  __pmacdata
+#define BTEXT
+#define BTDATA
 #else
 #define BTEXT   __init
 #define BTDATA  __initdata
@@ -187,7 +187,7 @@ btext_setup_display(int width, int height, int depth, int pitch,
  *    changes.
  */
 
-void __openfirmware
+void
 map_boot_text(void)
 {
         unsigned long base, offset, size;
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index 44aa87385451..f97b3a9abd1e 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -45,6 +45,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <asm/mv64x60.h>
+#include <asm/machdep.h>
 
 #define CPU_INTR_STR    "gt64260 cpu interface error"
 #define PCI0_INTR_STR   "gt64260 pci 0 error"
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index 0bb919859b8b..c36db279b43d 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -236,9 +236,9 @@ void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p)
         /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C,
            enable it on all other revisions
          */
-        if (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. A") == 0 ||
-                        strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. B") == 0
-                        || (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. C")
+        if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 ||
+                        strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0
+                        || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C")
                                 == 0 && p->cpu > 667000000))
                 ibm440gx_l2c_disable();
         else
diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c
index 7612e0623f99..5152c8e41340 100644
--- a/arch/ppc/syslib/ibm44x_common.c
+++ b/arch/ppc/syslib/ibm44x_common.c
@@ -27,9 +27,14 @@
 #include <asm/time.h>
 #include <asm/ppc4xx_pic.h>
 #include <asm/param.h>
+#include <asm/bootinfo.h>
+#include <asm/ppcboot.h>
 
 #include <syslib/gen550.h>
 
+/* Global Variables */
+bd_t __res;
+
 phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
 {
         phys_addr_t page_4gb = 0;
@@ -150,8 +155,36 @@ static unsigned long __init ibm44x_find_end_of_memory(void)
         return mem_size;
 }
 
-void __init ibm44x_platform_init(void)
+void __init ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                                 unsigned long r6, unsigned long r7)
 {
+        parse_bootinfo(find_bootinfo());
+
+        /*
+         * If we were passed in a board information, copy it into the
+         * residual data area.
+         */
+        if (r3)
+                __res = *(bd_t *)(r3 + KERNELBASE);
+
+#if defined(CONFIG_BLK_DEV_INITRD)
+        /*
+         * If the init RAM disk has been configured in, and there's a valid
+         * starting address for it, set it up.
+         */
+        if (r4) {
+                initrd_start = r4 + KERNELBASE;
+                initrd_end = r5 + KERNELBASE;
+        }
+#endif  /* CONFIG_BLK_DEV_INITRD */
+
+        /* Copy the kernel command line arguments to a safe place. */
+
+        if (r6) {
+                *(char *) (r7 + KERNELBASE) = 0;
+                strcpy(cmd_line, (char *) (r6 + KERNELBASE));
+        }
+
         ppc_md.init_IRQ = ppc4xx_pic_init;
         ppc_md.find_end_of_memory = ibm44x_find_end_of_memory;
         ppc_md.restart = ibm44x_restart;
@@ -178,7 +211,7 @@ void __init ibm44x_platform_init(void)
 #endif
 }
 
-/* Called from MachineCheckException */
+/* Called from machine_check_exception */
 void platform_machine_check(struct pt_regs *regs)
 {
         printk("PLB0: BEAR=0x%08x%08x ACR=  0x%08x BESR= 0x%08x\n",
diff --git a/arch/ppc/syslib/ibm44x_common.h b/arch/ppc/syslib/ibm44x_common.h
index c16b6a5ac6ab..b25a8995e4e9 100644
--- a/arch/ppc/syslib/ibm44x_common.h
+++ b/arch/ppc/syslib/ibm44x_common.h
@@ -36,7 +36,8 @@ struct ibm44x_clocks {
 };
 
 /* common 44x platform init */
-void ibm44x_platform_init(void) __init;
+void ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                          unsigned long r6, unsigned long r7) __init;
 
 /* initialize decrementer and tick-related variables */
 void ibm44x_calibrate_decr(unsigned int freq) __init;
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
index 8f80a42dfdb7..76a2aa4ce65e 100644
--- a/arch/ppc/syslib/m8260_setup.c
+++ b/arch/ppc/syslib/m8260_setup.c
@@ -62,6 +62,10 @@ m8260_setup_arch(void)
         if (initrd_start)
                 ROOT_DEV = Root_RAM0;
 #endif
+
+        identify_ppc_sys_by_name_and_id(BOARD_CHIP_NAME,
+                                in_be32(CPM_MAP_ADDR + CPM_IMMR_OFFSET));
+
         m82xx_board_setup();
 }
 
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index 9db58c587b46..1d1c3956c1ae 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -302,11 +302,11 @@ pq2ads_setup_pci(struct pci_controller *hose)
 
 void __init pq2_find_bridges(void)
 {
-        extern int pci_assign_all_busses;
+        extern int pci_assign_all_buses;
         struct pci_controller * hose;
         int host_bridge;
 
-        pci_assign_all_busses = 1;
+        pci_assign_all_buses = 1;
 
         hose = pcibios_alloc_controller();
 
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 4c888da89b3c..97ffbc70574f 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -144,12 +144,12 @@ void __init m8xx_calibrate_decr(void)
         int freq, fp, divisor;
 
         /* Unlock the SCCR. */
-        ((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = ~KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = KAPWR_KEY;
+        out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, ~KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY);
 
         /* Force all 8xx processors to use divide by 16 processor clock. */
-        ((volatile immap_t *)IMAP_ADDR)->im_clkrst.car_sccr |= 0x02000000;
-
+        out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr,
+                in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr)|0x02000000);
         /* Processor frequency is MHz.
          * The value 'fp' is the number of decrementer ticks per second.
          */
@@ -175,28 +175,24 @@ void __init m8xx_calibrate_decr(void)
          * we guarantee the registers are locked, then we unlock them
          * for our use.
          */
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = ~KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = ~KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk    = ~KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk =  KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck =  KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk    =  KAPWR_KEY;
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, ~KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, ~KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, ~KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY);
 
         /* Disable the RTC one second and alarm interrupts. */
-        ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc &=
-                                                ~(RTCSC_SIE | RTCSC_ALE);
+        out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
         /* Enable the RTC */
-        ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc |=
-                                                (RTCSC_RTF | RTCSC_RTE);
+        out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
 
         /* Enabling the decrementer also enables the timebase interrupts
          * (or from the other point of view, to get decrementer interrupts
          * we have to enable the timebase).  The decrementer interrupt
          * is wired into the vector table, nothing to do here for that.
          */
-        ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_tbscr =
-                                ((mk_int_int_mask(DEC_INTERRUPT) << 8) |
-                                         (TBSCR_TBF | TBSCR_TBE));
+        out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_tbscr, (mk_int_int_mask(DEC_INTERRUPT) << 8) | (TBSCR_TBF | TBSCR_TBE));
 
         if (setup_irq(DEC_INTERRUPT, &tbint_irqaction))
                 panic("Could not allocate timer IRQ!");
@@ -216,9 +212,9 @@ void __init m8xx_calibrate_decr(void)
 static int
 m8xx_set_rtc_time(unsigned long time)
 {
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = KAPWR_KEY;
-        ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtc = time;
-        ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = ~KAPWR_KEY;
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, KAPWR_KEY);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc, time);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, ~KAPWR_KEY);
         return(0);
 }
 
@@ -226,7 +222,7 @@ static unsigned long
 m8xx_get_rtc_time(void)
 {
         /* Get time from the RTC. */
-        return((unsigned long)(((immap_t *)IMAP_ADDR)->im_sit.sit_rtc));
+        return (unsigned long) in_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc);
 }
 
 static void
@@ -235,13 +231,13 @@ m8xx_restart(char *cmd)
         __volatile__ unsigned char dummy;
 
         local_irq_disable();
-        ((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080;
+        out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr) | 0x00000080);
 
         /* Clear the ME bit in MSR to cause checkstop on machine check
         */
         mtmsr(mfmsr() & ~0x1000);
 
-        dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0];
+        dummy = in_8(&((immap_t *)IMAP_ADDR)->im_clkrst.res[0]);
         printk("Restart failed\n");
         while(1);
 }
@@ -306,8 +302,7 @@ m8xx_init_IRQ(void)
         i8259_init(0);
 
         /* The i8259 cascade interrupt must be level sensitive. */
-        ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel &=
-                ~(0x80000000 >> ISA_BRIDGE_INT);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel & ~(0x80000000 >> ISA_BRIDGE_INT)));
 
         if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction))
                 enable_irq(ISA_BRIDGE_INT);
@@ -404,9 +399,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                 strcpy(cmd_line, (char *)(r6+KERNELBASE));
         }
 
+        identify_ppc_sys_by_name(BOARD_CHIP_NAME);
+
         ppc_md.setup_arch               = m8xx_setup_arch;
         ppc_md.show_percpuinfo          = m8xx_show_percpuinfo;
-        ppc_md.irq_canonicalize = NULL;
         ppc_md.init_IRQ                 = m8xx_init_IRQ;
         ppc_md.get_irq                  = m8xx_get_irq;
         ppc_md.init                     = NULL;
diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c
index 2ddc857e7fc7..c5ac5ce5d7d2 100644
--- a/arch/ppc/syslib/m8xx_wdt.c
+++ b/arch/ppc/syslib/m8xx_wdt.c
@@ -29,8 +29,8 @@ void m8xx_wdt_reset(void)
 {
         volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
 
-        imap->im_siu_conf.sc_swsr = 0x556c;     /* write magic1 */
-        imap->im_siu_conf.sc_swsr = 0xaa39;     /* write magic2 */
+        out_be16(imap->im_siu_conf.sc_swsr, 0x556c);    /* write magic1 */
+        out_be16(imap->im_siu_conf.sc_swsr, 0xaa39);    /* write magic2 */
 }
 
 static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
@@ -39,7 +39,7 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
 
         m8xx_wdt_reset();
 
-        imap->im_sit.sit_piscr |= PISCR_PS;     /* clear irq */
+        out_be16(imap->im_sit.sit_piscr, in_be16(imap->im_sit.sit_piscr | PISCR_PS));   /* clear irq */
 
         return IRQ_HANDLED;
 }
@@ -51,7 +51,7 @@ void __init m8xx_wdt_handler_install(bd_t * binfo)
         u32 sypcr;
         u32 pitrtclk;
 
-        sypcr = imap->im_siu_conf.sc_sypcr;
+        sypcr = in_be32(imap->im_siu_conf.sc_sypcr);
 
         if (!(sypcr & 0x04)) {
                 printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n",
@@ -87,9 +87,9 @@ void __init m8xx_wdt_handler_install(bd_t * binfo)
         else
                 pitc = pitrtclk * wdt_timeout / binfo->bi_intfreq / 2;
 
-        imap->im_sit.sit_pitc = pitc << 16;
-        imap->im_sit.sit_piscr =
-            (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE;
+        out_be32(imap->im_sit.sit_pitc, pitc << 16);
+
+        out_be16(imap->im_sit.sit_piscr, (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE);
 
         if (setup_irq(PIT_INTERRUPT, &m8xx_wdt_irqaction))
                 panic("m8xx_wdt: error setting up the watchdog irq!");
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
index 59cf3e8bd1a0..4ac19080eb85 100644
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ b/arch/ppc/syslib/mpc52xx_pci.c
@@ -21,6 +21,7 @@
 #include "mpc52xx_pci.h"
 
 #include <asm/delay.h>
+#include <asm/machdep.h>
 
 
 static int
@@ -181,7 +182,7 @@ mpc52xx_find_bridges(void)
         struct mpc52xx_pci __iomem *pci_regs;
         struct pci_controller *hose;
 
-        pci_assign_all_busses = 1;
+        pci_assign_all_buses = 1;
 
         pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE);
         if (!pci_regs)
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index 95b3b8a7f0ba..dbf8acac507f 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -21,6 +21,7 @@
 #include <asm/mpc83xx.h>
 #include <asm/irq.h>
 #include <asm/ppc_sys.h>
+#include <asm/machdep.h>
 
 /* We use offsets for IORESOURCE_MEM since we do not know at compile time
  * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
index bbc5ac0de878..2ede677a0a53 100644
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ b/arch/ppc/syslib/mpc85xx_devices.c
@@ -25,19 +25,20 @@
 /* We use offsets for IORESOURCE_MEM since we do not know at compile time
  * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
  */
+struct gianfar_mdio_data mpc85xx_mdio_pdata = {
+        .paddr = MPC85xx_MIIM_OFFSET,
+};
 
 static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
         .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
             FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
             FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
         .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
             FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
             FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
@@ -46,7 +47,6 @@ static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
             FSL_GIANFAR_DEV_HAS_MULTI_INTR |
             FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
             FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
@@ -55,7 +55,6 @@ static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
             FSL_GIANFAR_DEV_HAS_MULTI_INTR |
             FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
             FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
@@ -64,7 +63,6 @@ static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
             FSL_GIANFAR_DEV_HAS_MULTI_INTR |
             FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
             FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
@@ -73,11 +71,10 @@ static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
             FSL_GIANFAR_DEV_HAS_MULTI_INTR |
             FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
             FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_fec_pdata = {
-        .phy_reg_addr = MPC85xx_ENET1_OFFSET,
+        .device_flags = 0,
 };
 
 static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
@@ -719,6 +716,12 @@ struct platform_device ppc_sys_platform_devices[] = {
                         },
                 },
         },
+        [MPC85xx_MDIO] = {
+                .name = "fsl-gianfar_mdio",
+                .id = 0,
+                .dev.platform_data = &mpc85xx_mdio_pdata,
+                .num_resources = 0,
+        },
 };
 
 static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c
index 6e3184ab354f..cb68d8c58348 100644
--- a/arch/ppc/syslib/mpc85xx_sys.c
+++ b/arch/ppc/syslib/mpc85xx_sys.c
@@ -24,19 +24,19 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                 .ppc_sys_name   = "8540",
                 .mask           = 0xFFFF0000,
                 .value          = 0x80300000,
-                .num_devices    = 10,
+                .num_devices    = 11,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_FEC, MPC85xx_IIC1,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
-                        MPC85xx_PERFMON, MPC85xx_DUART,
+                        MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8560",
                 .mask           = 0xFFFF0000,
                 .value          = 0x80700000,
-                .num_devices    = 19,
+                .num_devices    = 20,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -45,14 +45,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                         MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
                         MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3, MPC85xx_CPM_SCC4,
                         MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_FCC3,
-                        MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2,
+                        MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8541",
                 .mask           = 0xFFFF0000,
                 .value          = 0x80720000,
-                .num_devices    = 13,
+                .num_devices    = 14,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -60,13 +60,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                         MPC85xx_PERFMON, MPC85xx_DUART,
                         MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
                         MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8541E",
                 .mask           = 0xFFFF0000,
                 .value          = 0x807A0000,
-                .num_devices    = 14,
+                .num_devices    = 15,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -74,13 +75,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                         MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
                         MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
                         MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8555",
                 .mask           = 0xFFFF0000,
                 .value          = 0x80710000,
-                .num_devices    = 19,
+                .num_devices    = 20,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -91,13 +93,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                         MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
                         MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
                         MPC85xx_CPM_USB,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8555E",
                 .mask           = 0xFFFF0000,
                 .value          = 0x80790000,
-                .num_devices    = 20,
+                .num_devices    = 21,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -108,6 +111,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                         MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
                         MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
                         MPC85xx_CPM_USB,
+                        MPC85xx_MDIO,
                 },
         },
         /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */
@@ -115,104 +119,112 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                 .ppc_sys_name   = "8548E",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80390010,
-                .num_devices    = 13,
+                .num_devices    = 14,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
                         MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8548",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80310010,
-                .num_devices    = 12,
+                .num_devices    = 13,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
                         MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8547E",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80390010,
-                .num_devices    = 13,
+                .num_devices    = 14,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
                         MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8547",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80310010,
-                .num_devices    = 12,
+                .num_devices    = 13,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
                         MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8545E",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80390010,
-                .num_devices    = 11,
+                .num_devices    = 12,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2,
                         MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8545",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80310010,
-                .num_devices    = 10,
+                .num_devices    = 11,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2,
                         MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8543E",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x803A0010,
-                .num_devices    = 11,
+                .num_devices    = 12,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2,
                         MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
+                        MPC85xx_MDIO,
                 },
         },
         {
                 .ppc_sys_name   = "8543",
                 .mask           = 0xFFFF00F0,
                 .value          = 0x80320010,
-                .num_devices    = 10,
+                .num_devices    = 11,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC85xx_eTSEC1, MPC85xx_eTSEC2,
                         MPC85xx_IIC1, MPC85xx_IIC2,
                         MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
                         MPC85xx_PERFMON, MPC85xx_DUART,
+                        MPC85xx_MDIO,
                 },
         },
         {       /* default match */
diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c
index a532ccc861c0..3cc27d29e3af 100644
--- a/arch/ppc/syslib/mpc8xx_sys.c
+++ b/arch/ppc/syslib/mpc8xx_sys.c
@@ -24,7 +24,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                 .ppc_sys_name   = "MPC86X",
                 .mask           = 0xFFFFFFFF,
                 .value          = 0x00000000,
-                .num_devices    = 2,
+                .num_devices    = 7,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC8xx_CPM_FEC1,
@@ -40,7 +40,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                 .ppc_sys_name   = "MPC885",
                 .mask           = 0xFFFFFFFF,
                 .value          = 0x00000000,
-                .num_devices    = 3,
+                .num_devices    = 8,
                 .device_list    = (enum ppc_sys_devices[])
                 {
                         MPC8xx_CPM_FEC1,
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 8356da4678a2..58b0aa813e85 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -48,6 +48,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <asm/mv64x60.h>
+#include <asm/machdep.h>
 
 #ifdef CONFIG_IRQ_ALL_CPUS
 #error "The mv64360 does not support distribution of IRQs on all CPUs"
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 4849850a59ed..a781c50d2f4c 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -1304,7 +1304,7 @@ mv64x60_config_pci_params(struct pci_controller *hose,
         early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val);
 
         /* Set latency timer, cache line size, clear BIST */
-        u16_val = (pi->latency_timer << 8) | (L1_CACHE_LINE_SIZE >> 2);
+        u16_val = (pi->latency_timer << 8) | (L1_CACHE_BYTES >> 2);
         early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val);
 
         mv64x60_pci_exclude_bridge = save_exclude;
diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c
index 2927c7adf5e5..fa5b2e45e0ca 100644
--- a/arch/ppc/syslib/mv64x60_dbg.c
+++ b/arch/ppc/syslib/mv64x60_dbg.c
@@ -24,6 +24,7 @@
 #include <linux/irq.h>
 #include <asm/delay.h>
 #include <asm/mv64x60.h>
+#include <asm/machdep.h>
 
 
 #if defined(CONFIG_SERIAL_TEXT_DEBUG)
diff --git a/arch/ppc/syslib/of_device.c b/arch/ppc/syslib/of_device.c
deleted file mode 100644
index 93c7231ea709..000000000000
--- a/arch/ppc/syslib/of_device.c
+++ /dev/null
@@ -1,276 +0,0 @@
-#include <linux/config.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/mod_devicetable.h>
-#include <asm/errno.h>
-#include <asm/of_device.h>
-
-/**
- * of_match_device - Tell if an of_device structure has a matching
- * of_match structure
- * @ids: array of of device match structures to search in
- * @dev: the of device structure to match against
- *
- * Used by a driver to check whether an of_device present in the
- * system is in its list of supported devices.
- */
-const struct of_device_id * of_match_device(const struct of_device_id *matches,
-                                        const struct of_device *dev)
-{
-        if (!dev->node)
-                return NULL;
-        while (matches->name[0] || matches->type[0] || matches->compatible[0]) {
-                int match = 1;
-                if (matches->name[0])
-                        match &= dev->node->name
-                                && !strcmp(matches->name, dev->node->name);
-                if (matches->type[0])
-                        match &= dev->node->type
-                                && !strcmp(matches->type, dev->node->type);
-                if (matches->compatible[0])
-                        match &= device_is_compatible(dev->node,
-                                matches->compatible);
-                if (match)
-                        return matches;
-                matches++;
-        }
-        return NULL;
-}
-
-static int of_platform_bus_match(struct device *dev, struct device_driver *drv)
-{
-        struct of_device * of_dev = to_of_device(dev);
-        struct of_platform_driver * of_drv = to_of_platform_driver(drv);
-        const struct of_device_id * matches = of_drv->match_table;
-
-        if (!matches)
-                return 0;
-
-        return of_match_device(matches, of_dev) != NULL;
-}
-
-struct of_device *of_dev_get(struct of_device *dev)
-{
-        struct device *tmp;
-
-        if (!dev)
-                return NULL;
-        tmp = get_device(&dev->dev);
-        if (tmp)
-                return to_of_device(tmp);
-        else
-                return NULL;
-}
-
-void of_dev_put(struct of_device *dev)
-{
-        if (dev)
-                put_device(&dev->dev);
-}
-
-
-static int of_device_probe(struct device *dev)
-{
-        int error = -ENODEV;
-        struct of_platform_driver *drv;
-        struct of_device *of_dev;
-        const struct of_device_id *match;
-
-        drv = to_of_platform_driver(dev->driver);
-        of_dev = to_of_device(dev);
-
-        if (!drv->probe)
-                return error;
-
-        of_dev_get(of_dev);
-
-        match = of_match_device(drv->match_table, of_dev);
-        if (match)
-                error = drv->probe(of_dev, match);
-        if (error)
-                of_dev_put(of_dev);
-
-        return error;
-}
-
-static int of_device_remove(struct device *dev)
-{
-        struct of_device * of_dev = to_of_device(dev);
-        struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
-
-        if (dev->driver && drv->remove)
-                drv->remove(of_dev);
-        return 0;
-}
-
-static int of_device_suspend(struct device *dev, pm_message_t state)
-{
-        struct of_device * of_dev = to_of_device(dev);
-        struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
-        int error = 0;
-
-        if (dev->driver && drv->suspend)
-                error = drv->suspend(of_dev, state);
-        return error;
-}
-
-static int of_device_resume(struct device * dev)
-{
-        struct of_device * of_dev = to_of_device(dev);
-        struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
-        int error = 0;
-
-        if (dev->driver && drv->resume)
-                error = drv->resume(of_dev);
-        return error;
-}
-
-struct bus_type of_platform_bus_type = {
-       .name    = "of_platform",
-       .match   = of_platform_bus_match,
-       .suspend = of_device_suspend,
-       .resume  = of_device_resume,
-};
-
-static int __init of_bus_driver_init(void)
-{
-        return bus_register(&of_platform_bus_type);
-}
-
-postcore_initcall(of_bus_driver_init);
-
-int of_register_driver(struct of_platform_driver *drv)
-{
-        int count = 0;
-
-        /* initialize common driver fields */
-        drv->driver.name = drv->name;
-        drv->driver.bus = &of_platform_bus_type;
-        drv->driver.probe = of_device_probe;
-        drv->driver.remove = of_device_remove;
-
-        /* register with core */
-        count = driver_register(&drv->driver);
-        return count ? count : 1;
-}
-
-void of_unregister_driver(struct of_platform_driver *drv)
-{
-        driver_unregister(&drv->driver);
-}
-
-
-static ssize_t dev_show_devspec(struct device *dev, struct device_attribute *attr, char *buf)
-{
-        struct of_device *ofdev;
-
-        ofdev = to_of_device(dev);
-        return sprintf(buf, "%s", ofdev->node->full_name);
-}
-
-static DEVICE_ATTR(devspec, S_IRUGO, dev_show_devspec, NULL);
-
-/**
- * of_release_dev - free an of device structure when all users of it are finished.
- * @dev: device that's been disconnected
- *
- * Will be called only by the device core when all users of this of device are
- * done.
- */
-void of_release_dev(struct device *dev)
-{
-        struct of_device *ofdev;
-
-        ofdev = to_of_device(dev);
-        of_node_put(ofdev->node);
-        kfree(ofdev);
-}
-
-int of_device_register(struct of_device *ofdev)
-{
-        int rc;
-        struct of_device **odprop;
-
-        BUG_ON(ofdev->node == NULL);
-
-        odprop = (struct of_device **)get_property(ofdev->node, "linux,device", NULL);
-        if (!odprop) {
-                struct property *new_prop;
-        
-                new_prop = kmalloc(sizeof(struct property) + sizeof(struct of_device *),
-                        GFP_KERNEL);
-                if (new_prop == NULL)
-                        return -ENOMEM;
-                new_prop->name = "linux,device";
-                new_prop->length = sizeof(sizeof(struct of_device *));
-                new_prop->value = (unsigned char *)&new_prop[1];
-                odprop = (struct of_device **)new_prop->value;
-                *odprop = NULL;
-                prom_add_property(ofdev->node, new_prop);
-        }
-        *odprop = ofdev;
-
-        rc = device_register(&ofdev->dev);
-        if (rc)
-                return rc;
-
-        device_create_file(&ofdev->dev, &dev_attr_devspec);
-
-        return 0;
-}
-
-void of_device_unregister(struct of_device *ofdev)
-{
-        struct of_device **odprop;
-
-        device_remove_file(&ofdev->dev, &dev_attr_devspec);
-
-        odprop = (struct of_device **)get_property(ofdev->node, "linux,device", NULL);
-        if (odprop)
-                *odprop = NULL;
-
-        device_unregister(&ofdev->dev);
-}
-
-struct of_device* of_platform_device_create(struct device_node *np,
-                                            const char *bus_id,
-                                            struct device *parent)
-{
-        struct of_device *dev;
-        u32 *reg;
-
-        dev = kmalloc(sizeof(*dev), GFP_KERNEL);
-        if (!dev)
-                return NULL;
-        memset(dev, 0, sizeof(*dev));
-
-        dev->node = of_node_get(np);
-        dev->dma_mask = 0xffffffffUL;
-        dev->dev.dma_mask = &dev->dma_mask;
-        dev->dev.parent = parent;
-        dev->dev.bus = &of_platform_bus_type;
-        dev->dev.release = of_release_dev;
-
-        reg = (u32 *)get_property(np, "reg", NULL);
-        strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE);
-
-        if (of_device_register(dev) != 0) {
-                kfree(dev);
-                return NULL;
-        }
-
-        return dev;
-}
-
-EXPORT_SYMBOL(of_match_device);
-EXPORT_SYMBOL(of_platform_bus_type);
-EXPORT_SYMBOL(of_register_driver);
-EXPORT_SYMBOL(of_unregister_driver);
-EXPORT_SYMBOL(of_device_register);
-EXPORT_SYMBOL(of_device_unregister);
-EXPORT_SYMBOL(of_dev_get);
-EXPORT_SYMBOL(of_dev_put);
-EXPORT_SYMBOL(of_platform_device_create);
-EXPORT_SYMBOL(of_release_dev);
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 1cf5de21a3fd..894779712b46 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -23,6 +23,7 @@
 #include <asm/sections.h>
 #include <asm/open_pic.h>
 #include <asm/i8259.h>
+#include <asm/machdep.h>
 
 #include "open_pic_defs.h"
 
@@ -889,7 +890,7 @@ openpic_get_irq(struct pt_regs *regs)
 
 #ifdef CONFIG_SMP
 void
-smp_openpic_message_pass(int target, int msg, unsigned long data, int wait)
+smp_openpic_message_pass(int target, int msg)
 {
         cpumask_t mask = CPU_MASK_ALL;
         /* make sure we're sending something that translates to an IPI */
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
index 16cff91d9f41..1c40049b9a45 100644
--- a/arch/ppc/syslib/open_pic2.c
+++ b/arch/ppc/syslib/open_pic2.c
@@ -27,6 +27,7 @@
 #include <asm/sections.h>
 #include <asm/open_pic.h>
 #include <asm/i8259.h>
+#include <asm/machdep.h>
 
 #include "open_pic_defs.h"
 
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index ce4d1deb86e9..c46043c47225 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -26,6 +26,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <asm/ppc4xx_pic.h>
+#include <asm/machdep.h>
 
 /* Function Prototypes */
 
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
index 40086212b9c3..0b435633a0d1 100644
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -25,6 +25,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <asm/ppc4xx_pic.h>
+#include <asm/machdep.h>
 
 /* See comment in include/arch-ppc/ppc4xx_pic.h
  * for more info about these two variables
diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c
index bf83240689dc..e83a83fd95e1 100644
--- a/arch/ppc/syslib/ppc4xx_setup.c
+++ b/arch/ppc/syslib/ppc4xx_setup.c
@@ -278,7 +278,7 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */
 }
 
-/* Called from MachineCheckException */
+/* Called from machine_check_exception */
 void platform_machine_check(struct pt_regs *regs)
 {
 #if defined(DCRN_PLB0_BEAR)
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index 890484e576e7..4da168a6ad03 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -40,6 +40,7 @@
 #include <asm/ppc_sys.h>
 #include <asm/kgdb.h>
 #include <asm/delay.h>
+#include <asm/machdep.h>
 
 #include <syslib/ppc83xx_setup.h>
 #if defined(CONFIG_PCI)
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index 832b8bf99ae7..de2f90576577 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -29,6 +29,7 @@
 #include <asm/mmu.h>
 #include <asm/ppc_sys.h>
 #include <asm/kgdb.h>
+#include <asm/machdep.h>
 
 #include <syslib/ppc85xx_setup.h>
 
diff --git a/arch/ppc/syslib/ppc8xx_pic.c b/arch/ppc/syslib/ppc8xx_pic.c
index d3b01c6c97de..3e6f51a61d46 100644
--- a/arch/ppc/syslib/ppc8xx_pic.c
+++ b/arch/ppc/syslib/ppc8xx_pic.c
@@ -6,6 +6,7 @@
 #include <linux/signal.h>
 #include <linux/interrupt.h>
 #include <asm/irq.h>
+#include <asm/io.h>
 #include <asm/8xx_immap.h>
 #include <asm/mpc8xx.h>
 #include "ppc8xx_pic.h"
@@ -29,8 +30,7 @@ static void m8xx_mask_irq(unsigned int irq_nr)
         word = irq_nr >> 5;
 
         ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
-        ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
-                                                ppc_cached_irq_mask[word];
+        out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
 }
 
 static void m8xx_unmask_irq(unsigned int irq_nr)
@@ -41,8 +41,7 @@ static void m8xx_unmask_irq(unsigned int irq_nr)
         word = irq_nr >> 5;
 
         ppc_cached_irq_mask[word] |= (1 << (31-bit));
-        ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
-                                                ppc_cached_irq_mask[word];
+        out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
 }
 
 static void m8xx_end_irq(unsigned int irq_nr)
@@ -55,8 +54,7 @@ static void m8xx_end_irq(unsigned int irq_nr)
                 word = irq_nr >> 5;
 
                 ppc_cached_irq_mask[word] |= (1 << (31-bit));
-                ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
-                        ppc_cached_irq_mask[word];
+                out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
         }
 }
 
@@ -69,9 +67,8 @@ static void m8xx_mask_and_ack(unsigned int irq_nr)
         word = irq_nr >> 5;
 
         ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
-        ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
-                                                ppc_cached_irq_mask[word];
-        ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 1 << (31-bit);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
+        out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend, 1 << (31-bit));
 }
 
 struct hw_interrupt_type ppc8xx_pic = {
@@ -93,7 +90,7 @@ m8xx_get_irq(struct pt_regs *regs)
         /* For MPC8xx, read the SIVEC register and shift the bits down
          * to get the irq number.
          */
-        irq = ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26;
+        irq = in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec) >> 26;
 
         /*
          * When we read the sivec without an interrupt to process, we will
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index 52ba0c68078d..62ee86e80711 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -69,6 +69,9 @@ static int __init find_chip_by_name_and_id(char *name, u32 id)
                         matched[j++] = i;
                 i++;
         }
+
+        ret = i;
+
         if (j != 0) {
                 for (i = 0; i < j; i++) {
                         if ((ppc_sys_specs[matched[i]].mask & id) ==
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
index 1d3869768f96..6f88ba93412b 100644
--- a/arch/ppc/syslib/pq2_devices.c
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -18,6 +18,7 @@
 #include <asm/cpm2.h>
 #include <asm/irq.h>
 #include <asm/ppc_sys.h>
+#include <asm/machdep.h>
 
 struct platform_device ppc_sys_platform_devices[] = {
         [MPC82xx_CPM_FCC1] = {
diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c
index 8599850ca772..2c6364d9641f 100644
--- a/arch/ppc/syslib/prep_nvram.c
+++ b/arch/ppc/syslib/prep_nvram.c
@@ -22,14 +22,14 @@
 static char nvramData[MAX_PREP_NVRAM];
 static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0];
 
-unsigned char __prep prep_nvram_read_val(int addr)
+unsigned char prep_nvram_read_val(int addr)
 {
         outb(addr, PREP_NVRAM_AS0);
         outb(addr>>8, PREP_NVRAM_AS1);
         return inb(PREP_NVRAM_DATA);
 }
 
-void __prep prep_nvram_write_val(int           addr,
+void prep_nvram_write_val(int           addr,
                           unsigned char val)
 {
         outb(addr, PREP_NVRAM_AS0);
@@ -81,8 +81,7 @@ void __init init_prep_nvram(void)
         }
 }
 
-__prep
-char __prep *prep_nvram_get_var(const char *name)
+char *prep_nvram_get_var(const char *name)
 {
         char *cp;
         int  namelen;
@@ -101,8 +100,7 @@ char __prep *prep_nvram_get_var(const char *name)
         return NULL;
 }
 
-__prep
-char __prep *prep_nvram_first_var(void)
+char *prep_nvram_first_var(void)
 {
         if (nvram->Header.GELength == 0) {
                 return NULL;
@@ -112,8 +110,7 @@ char __prep *prep_nvram_first_var(void)
         }
 }
 
-__prep
-char __prep *prep_nvram_next_var(char *name)
+char *prep_nvram_next_var(char *name)
 {
         char *cp;
 
diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c
index 2c64ed627475..278da6ee62ea 100644
--- a/arch/ppc/syslib/prom.c
+++ b/arch/ppc/syslib/prom.c
@@ -89,7 +89,7 @@ extern char cmd_line[512];	/* XXX */
 extern boot_infos_t *boot_infos;
 unsigned long dev_tree_size;
 
-void __openfirmware
+void
 phys_call_rtas(int service, int nargs, int nret, ...)
 {
         va_list list;
@@ -862,7 +862,7 @@ find_type_devices(const char *type)
 /*
  * Returns all nodes linked together
  */
-struct device_node * __openfirmware
+struct device_node *
 find_all_nodes(void)
 {
         struct device_node *head, **prevp, *np;
@@ -1165,7 +1165,7 @@ get_property(struct device_node *np, const char *name, int *lenp)
 /*
  * Add a property to a node
  */
-void __openfirmware
+void
 prom_add_property(struct device_node* np, struct property* prop)
 {
         struct property **next = &np->properties;
@@ -1177,7 +1177,7 @@ prom_add_property(struct device_node* np, struct property* prop)
 }
 
 /* I quickly hacked that one, check against spec ! */
-static inline unsigned long __openfirmware
+static inline unsigned long
 bus_space_to_resource_flags(unsigned int bus_space)
 {
         u8 space = (bus_space >> 24) & 0xf;
@@ -1194,7 +1194,7 @@ bus_space_to_resource_flags(unsigned int bus_space)
         }
 }
 
-static struct resource* __openfirmware
+static struct resource*
 find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
 {
         unsigned long mask;
@@ -1224,7 +1224,7 @@ find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
  * or other nodes attached to the root node. Ultimately, put some
  * link to resources in the OF node.
  */
-struct resource* __openfirmware
+struct resource*
 request_OF_resource(struct device_node* node, int index, const char* name_postfix)
 {
         struct pci_dev* pcidev;
@@ -1280,7 +1280,7 @@ fail:
         return NULL;
 }
 
-int __openfirmware
+int
 release_OF_resource(struct device_node* node, int index)
 {
         struct pci_dev* pcidev;
@@ -1346,7 +1346,7 @@ release_OF_resource(struct device_node* node, int index)
 }
 
 #if 0
-void __openfirmware
+void
 print_properties(struct device_node *np)
 {
         struct property *pp;
@@ -1400,7 +1400,7 @@ print_properties(struct device_node *np)
 static DEFINE_SPINLOCK(rtas_lock);
 
 /* this can be called after setup -- Cort */
-int __openfirmware
+int
 call_rtas(const char *service, int nargs, int nret,
           unsigned long *outputs, ...)
 {
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index 2cbcad278cef..47f04c71fe9c 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -17,6 +17,7 @@
 #include <asm/io.h>
 #include <asm/xparameters.h>
 #include <asm/ibm4xx.h>
+#include <asm/machdep.h>
 
 /* No one else should require these constants, so define them locally here. */
 #define ISR 0                   /* Interrupt Status Register */
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
index 507d4eeffe07..98612d420346 100644
--- a/arch/ppc/xmon/start.c
+++ b/arch/ppc/xmon/start.c
@@ -478,8 +478,9 @@ void *xmon_stdout;
 void *xmon_stderr;
 
 void
-xmon_init(void)
+xmon_init(int arg)
 {
+        xmon_map_scc();
 }
 
 int
diff --git a/arch/ppc/xmon/xmon.c b/arch/ppc/xmon/xmon.c
index be7869e39465..66bfaa3211a2 100644
--- a/arch/ppc/xmon/xmon.c
+++ b/arch/ppc/xmon/xmon.c
@@ -148,9 +148,14 @@ Commands:\n\
   r     print registers\n\
   S     print special registers\n\
   t     print backtrace\n\
-  la    lookup address in system.map\n\
-  ls    lookup symbol in system.map\n\
+  la    lookup address\n\
+  ls    lookup symbol\n\
+  C     checksum\n\
+  p     call function with arguments\n\
+  T     print time\n\
   x     exit monitor\n\
+  zr    reboot\n\
+  zh    halt\n\
 ";
 
 static int xmon_trace[NR_CPUS];
diff --git a/arch/ppc64/Kconfig b/arch/ppc64/Kconfig
index c658650af429..42677cc96508 100644
--- a/arch/ppc64/Kconfig
+++ b/arch/ppc64/Kconfig
@@ -10,6 +10,9 @@ config MMU
         bool
         default y
 
+config PPC_STD_MMU
+        def_bool y
+
 config UID16
         bool
 
@@ -120,6 +123,11 @@ config MPIC
         bool
         default y
 
+config PPC_I8259
+        depends on PPC_PSERIES
+        bool
+        default y
+
 config BPA_IIC
         depends on PPC_BPA
         bool
@@ -186,6 +194,12 @@ config BOOTX_TEXT
           Say Y here to see progress messages from the boot firmware in text
           mode. Requires an Open Firmware compatible video card.
 
+config POWER4
+        def_bool y
+
+config PPC_FPU
+        def_bool y
+
 config POWER4_ONLY
         bool "Optimize for POWER4"
         default n
@@ -234,6 +248,10 @@ config HMT
           This option enables hardware multithreading on RS64 cpus.
           pSeries systems p620 and p660 have such a cpu type.
 
+config NUMA
+        bool "NUMA support"
+        default y if SMP && PPC_PSERIES
+
 config ARCH_SELECT_MEMORY_MODEL
         def_bool y
 
@@ -249,9 +267,6 @@ config ARCH_DISCONTIGMEM_DEFAULT
         def_bool y
         depends on ARCH_DISCONTIGMEM_ENABLE
 
-config ARCH_FLATMEM_ENABLE
-        def_bool y
-
 config ARCH_SPARSEMEM_ENABLE
         def_bool y
         depends on ARCH_DISCONTIGMEM_ENABLE
@@ -274,10 +289,6 @@ config NODES_SPAN_OTHER_NODES
         def_bool y
         depends on NEED_MULTIPLE_NODES
 
-config NUMA
-        bool "NUMA support"
-        default y if DISCONTIGMEM || SPARSEMEM
-
 config SCHED_SMT
         bool "SMT (Hyperthreading) scheduler support"
         depends on SMP
@@ -307,6 +318,11 @@ config PPC_RTAS
         depends on PPC_PSERIES || PPC_BPA
         default y
 
+config RTAS_ERROR_LOGGING
+        bool
+        depends on PPC_RTAS
+        default y
+
 config RTAS_PROC
         bool "Proc interface to RTAS"
         depends on PPC_RTAS
@@ -357,7 +373,6 @@ config HOTPLUG_CPU
 
 config PROC_DEVICETREE
         bool "Support for Open Firmware device tree in /proc"
-        depends on !PPC_ISERIES
         help
           This option adds a device-tree directory under /proc which contains
           an image of the device tree that the kernel copies from Open
@@ -461,7 +476,7 @@ config VIOPATH
         depends on VIOCONS || VIODASD || VIOCD || VIOTAPE || VETH
         default y
 
-source "arch/ppc64/oprofile/Kconfig"
+source "arch/powerpc/oprofile/Kconfig"
 
 source "arch/ppc64/Kconfig.debug"
 
diff --git a/arch/ppc64/Makefile b/arch/ppc64/Makefile
index 521c2a5a2862..fdbd6f44adc0 100644
--- a/arch/ppc64/Makefile
+++ b/arch/ppc64/Makefile
@@ -75,17 +75,25 @@ else
         CFLAGS += $(call cc-option,-mtune=power4)
 endif
 
+# No AltiVec instruction when building kernel
+CFLAGS  += $(call cc-option, -mno-altivec)
+
 # Enable unit-at-a-time mode when possible. It shrinks the
 # kernel considerably.
 CFLAGS += $(call cc-option,-funit-at-a-time)
 
 head-y := arch/ppc64/kernel/head.o
+head-y += arch/powerpc/kernel/fpu.o
+head-y += arch/powerpc/kernel/entry_64.o
 
 libs-y                          += arch/ppc64/lib/
-core-y                          += arch/ppc64/kernel/
-core-y                          += arch/ppc64/mm/
-core-$(CONFIG_XMON)             += arch/ppc64/xmon/
-drivers-$(CONFIG_OPROFILE)      += arch/ppc64/oprofile/
+core-y                          += arch/ppc64/kernel/ arch/powerpc/kernel/
+core-y                          += arch/powerpc/mm/
+core-y                          += arch/powerpc/sysdev/
+core-y                          += arch/powerpc/platforms/
+core-y                          += arch/powerpc/lib/
+core-$(CONFIG_XMON)             += arch/powerpc/xmon/
+drivers-$(CONFIG_OPROFILE)      += arch/powerpc/oprofile/
 
 boot := arch/ppc64/boot
 
@@ -100,7 +108,7 @@ $(boottargets-y): vmlinux
 bootimage-$(CONFIG_PPC_PSERIES) := $(boot)/zImage
 bootimage-$(CONFIG_PPC_PMAC) := vmlinux
 bootimage-$(CONFIG_PPC_MAPLE) := $(boot)/zImage
-bootimage-$(CONFIG_PPC_BPA) := zImage
+bootimage-$(CONFIG_PPC_BPA) := $(boot)/zImage
 bootimage-$(CONFIG_PPC_ISERIES) := vmlinux
 BOOTIMAGE := $(bootimage-y)
 install: vmlinux
diff --git a/arch/ppc64/boot/Makefile b/arch/ppc64/boot/Makefile
index 33fdc8710891..301bc1536c49 100644
--- a/arch/ppc64/boot/Makefile
+++ b/arch/ppc64/boot/Makefile
@@ -22,15 +22,46 @@
 
 
 HOSTCC          := gcc
-BOOTCFLAGS      := $(HOSTCFLAGS) -fno-builtin -nostdinc -isystem $(shell $(CROSS32CC) -print-file-name=include)
+BOOTCFLAGS      := $(HOSTCFLAGS) -fno-builtin -nostdinc -isystem $(shell $(CROSS32CC) -print-file-name=include) -fPIC
 BOOTAFLAGS      := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc
-BOOTLFLAGS      := -Ttext 0x00400000 -e _start -T $(srctree)/$(src)/zImage.lds
+BOOTLFLAGS      := -T $(srctree)/$(src)/zImage.lds
 OBJCOPYFLAGS    := contents,alloc,load,readonly,data
 
-src-boot := crt0.S string.S prom.c main.c zlib.c imagesize.c div64.S
+zlib       := infblock.c infcodes.c inffast.c inflate.c inftrees.c infutil.c
+zlibheader := infblock.h infcodes.h inffast.h inftrees.h infutil.h
+zliblinuxheader := zlib.h zconf.h zutil.h
+
+$(addprefix $(obj)/,$(zlib) main.o): $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
+#$(addprefix $(obj)/,main.o): $(addprefix $(obj)/,zlib.h)
+
+src-boot := string.S prom.c main.c div64.S crt0.S
+src-boot += $(zlib)
 src-boot := $(addprefix $(obj)/, $(src-boot))
 obj-boot := $(addsuffix .o, $(basename $(src-boot)))
 
+BOOTCFLAGS      += -I$(obj) -I$(srctree)/$(obj)
+
+quiet_cmd_copy_zlib = COPY    $@
+      cmd_copy_zlib = sed "s@__attribute_used__@@;s@<linux/\([^>]\+\).*@\"\1\"@" $< > $@
+
+quiet_cmd_copy_zlibheader = COPY    $@
+      cmd_copy_zlibheader = sed "s@<linux/\([^>]\+\).*@\"\1\"@" $< > $@
+# stddef.h for NULL
+quiet_cmd_copy_zliblinuxheader = COPY    $@
+      cmd_copy_zliblinuxheader = sed "s@<linux/string.h>@\"string.h\"@;s@<linux/kernel.h>@<stddef.h>@;s@<linux/\([^>]\+\).*@\"\1\"@" $< > $@
+
+$(addprefix $(obj)/,$(zlib)): $(obj)/%: $(srctree)/lib/zlib_inflate/%
+        $(call cmd,copy_zlib)
+
+$(addprefix $(obj)/,$(zlibheader)): $(obj)/%: $(srctree)/lib/zlib_inflate/%
+        $(call cmd,copy_zlibheader)
+
+$(addprefix $(obj)/,$(zliblinuxheader)): $(obj)/%: $(srctree)/include/linux/%
+        $(call cmd,copy_zliblinuxheader)
+
+clean-files := $(zlib) $(zlibheader) $(zliblinuxheader)
+
+
 quiet_cmd_bootcc = BOOTCC  $@
       cmd_bootcc = $(CROSS32CC) -Wp,-MD,$(depfile) $(BOOTCFLAGS) -c -o $@ $<
 
@@ -56,7 +87,7 @@ src-sec = $(foreach section, $(1), $(patsubst %,$(obj)/kernel-%.c, $(section)))
 gz-sec  = $(foreach section, $(1), $(patsubst %,$(obj)/kernel-%.gz, $(section)))
 
 hostprogs-y             := addnote addRamDisk
-targets                 += zImage.vmode zImage.initrd.vmode zImage zImage.initrd imagesize.c \
+targets                 += zImage.vmode zImage.initrd.vmode zImage zImage.initrd \
                            $(patsubst $(obj)/%,%, $(call obj-sec, $(required) $(initrd))) \
                            $(patsubst $(obj)/%,%, $(call src-sec, $(required) $(initrd))) \
                            $(patsubst $(obj)/%,%, $(call gz-sec, $(required) $(initrd))) \
@@ -69,9 +100,9 @@ quiet_cmd_ramdisk = RAMDISK $@
 quiet_cmd_stripvm = STRIP   $@
       cmd_stripvm = $(STRIP) -s $< -o $@
 
-vmlinux.strip: vmlinux FORCE
+vmlinux.strip: vmlinux
         $(call if_changed,stripvm)
-$(obj)/vmlinux.initrd: vmlinux.strip $(obj)/addRamDisk $(obj)/ramdisk.image.gz FORCE
+$(obj)/vmlinux.initrd: vmlinux.strip $(obj)/addRamDisk $(obj)/ramdisk.image.gz
         $(call if_changed,ramdisk)
 
 quiet_cmd_addsection = ADDSEC  $@
@@ -79,48 +110,38 @@ quiet_cmd_addsection = ADDSEC  $@
                 --add-section=.kernel:$(strip $(patsubst $(obj)/kernel-%.o,%, $@))=$(patsubst %.o,%.gz, $@) \
                 --set-section-flags=.kernel:$(strip $(patsubst $(obj)/kernel-%.o,%, $@))=$(OBJCOPYFLAGS)
 
-quiet_cmd_imagesize = GENSIZE $@
-      cmd_imagesize = ls -l vmlinux.strip | \
-                awk '{printf "/* generated -- do not edit! */\n" "unsigned long vmlinux_filesize = %d;\n", $$5}' \
-                > $(obj)/imagesize.c && \
-                $(CROSS_COMPILE)nm -n vmlinux | tail -n 1 | \
-                awk '{printf "unsigned long vmlinux_memsize = 0x%s;\n", substr($$1,8)}' >> $(obj)/imagesize.c
-
 quiet_cmd_addnote = ADDNOTE $@
       cmd_addnote = $(obj)/addnote $@
 
-$(call gz-sec, $(required)): $(obj)/kernel-%.gz: % FORCE
+$(call gz-sec, $(required)): $(obj)/kernel-%.gz: %
         $(call if_changed,gzip)
 
 $(obj)/kernel-initrd.gz: $(obj)/ramdisk.image.gz
         cp -f $(obj)/ramdisk.image.gz $@
 
-$(call src-sec, $(required) $(initrd)): $(obj)/kernel-%.c: $(obj)/kernel-%.gz FORCE
+$(call src-sec, $(required) $(initrd)): $(obj)/kernel-%.c: $(obj)/kernel-%.gz
         @touch $@
 
-$(call obj-sec, $(required) $(initrd)): $(obj)/kernel-%.o: $(obj)/kernel-%.c FORCE
+$(call obj-sec, $(required) $(initrd)): $(obj)/kernel-%.o: $(obj)/kernel-%.c
         $(call if_changed_dep,bootcc)
         $(call cmd,addsection)
 
 $(obj)/zImage.vmode: obj-boot += $(call obj-sec, $(required))
-$(obj)/zImage.vmode: $(call obj-sec, $(required)) $(obj-boot) FORCE
+$(obj)/zImage.vmode: $(call obj-sec, $(required)) $(obj-boot) $(srctree)/$(src)/zImage.lds
         $(call cmd,bootld,$(obj-boot))
 
 $(obj)/zImage.initrd.vmode: obj-boot += $(call obj-sec, $(required) $(initrd))
-$(obj)/zImage.initrd.vmode: $(call obj-sec, $(required) $(initrd)) $(obj-boot) FORCE
+$(obj)/zImage.initrd.vmode: $(call obj-sec, $(required) $(initrd)) $(obj-boot) $(srctree)/$(src)/zImage.lds
         $(call cmd,bootld,$(obj-boot))
 
-$(obj)/zImage: $(obj)/zImage.vmode $(obj)/addnote FORCE
+$(obj)/zImage: $(obj)/zImage.vmode $(obj)/addnote
         @cp -f $< $@
         $(call if_changed,addnote)
 
-$(obj)/zImage.initrd: $(obj)/zImage.initrd.vmode $(obj)/addnote FORCE
+$(obj)/zImage.initrd: $(obj)/zImage.initrd.vmode $(obj)/addnote
         @cp -f $< $@
         $(call if_changed,addnote)
 
-$(obj)/imagesize.c: vmlinux.strip
-        $(call cmd,imagesize)
-
 install: $(CONFIGURE) $(BOOTIMAGE)
         sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" "$(BOOTIMAGE)"
 
diff --git a/arch/ppc64/boot/crt0.S b/arch/ppc64/boot/crt0.S
index 3861e7f9cf19..9cc442263939 100644
--- a/arch/ppc64/boot/crt0.S
+++ b/arch/ppc64/boot/crt0.S
@@ -12,11 +12,40 @@
 #include "ppc_asm.h"
 
         .text
-        .globl  _start
-_start:
+        .globl  _zimage_start
+_zimage_start:
+        bl      reloc_offset
+
+reloc_offset:
+        mflr    r0
+        lis     r9,reloc_offset@ha
+        addi    r9,r9,reloc_offset@l
+        subf.   r0,r9,r0
+        beq     clear_caches
+
+reloc_got2:
+        lis     r9,__got2_start@ha
+        addi    r9,r9,__got2_start@l
+        lis     r8,__got2_end@ha
+        addi    r8,r8,__got2_end@l
+        subf.   r8,r9,r8
+        beq     clear_caches
+        srwi.   r8,r8,2
+        mtctr   r8
+        add     r9,r0,r9
+reloc_got2_loop:
+        lwz     r8,0(r9)
+        add     r8,r8,r0
+        stw     r8,0(r9)
+        addi    r9,r9,4
+        bdnz    reloc_got2_loop
+
+clear_caches:
         lis     r9,_start@h
+        add     r9,r0,r9
         lis     r8,_etext@ha
         addi    r8,r8,_etext@l
+        add     r8,r0,r8
 1:      dcbf    r0,r9
         icbi    r0,r9
         addi    r9,r9,0x20
@@ -25,24 +54,6 @@ _start:
         sync
         isync
 
-        ## Clear out the BSS as per ANSI C requirements
-
-        lis     r7,_end@ha
-        addi    r7,r7,_end@l            # r7 = &_end 
-        lis     r8,__bss_start@ha       # 
-        addi    r8,r8,__bss_start@l     # r8 = &_bss_start
-
-        ## Determine how large an area, in number of words, to clear
-
-        subf    r7,r8,r7                # r7 = &_end - &_bss_start + 1 
-        addi    r7,r7,3                 # r7 += 3 
-        srwi.   r7,r7,2                 # r7 = size in words.
-        beq     3f                      # If the size is zero, don't bother
-        addi    r8,r8,-4                # r8 -= 4 
-        mtctr   r7                      # SPRN_CTR = number of words to clear
-        li      r0,0                    # r0 = 0
-2:      stwu    r0,4(r8)                # Clear out a word
-        bdnz    2b                      # Keep clearing until done
-3:
+        mr      r6,r1
         b       start
 
diff --git a/arch/ppc64/boot/install.sh b/arch/ppc64/boot/install.sh
index cb2d6626b555..eacce9590816 100644
--- a/arch/ppc64/boot/install.sh
+++ b/arch/ppc64/boot/install.sh
@@ -28,7 +28,7 @@ if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}i
 # Default install
 
 # this should work for both the pSeries zImage and the iSeries vmlinux.sm
-image_name=`basename $5`
+image_name=`basename $2`
 
 if [ -f $4/$image_name ]; then
         mv $4/$image_name $4/$image_name.old
diff --git a/arch/ppc64/boot/main.c b/arch/ppc64/boot/main.c
index f7ec19a2d0b0..c1dc876bccab 100644
--- a/arch/ppc64/boot/main.c
+++ b/arch/ppc64/boot/main.c
@@ -17,7 +17,6 @@
 #include "prom.h"
 #include "zlib.h"
 
-static void gunzip(void *, int, unsigned char *, int *);
 extern void flush_cache(void *, unsigned long);
 
 
@@ -26,31 +25,26 @@ extern void flush_cache(void *, unsigned long);
 #define RAM_END         (512<<20) // Fixme: use OF */
 #define ONE_MB          0x100000
 
-static char *avail_ram;
-static char *begin_avail, *end_avail;
-static char *avail_high;
-static unsigned int heap_use;
-static unsigned int heap_max;
-
 extern char _start[];
+extern char __bss_start[];
 extern char _end[];
 extern char _vmlinux_start[];
 extern char _vmlinux_end[];
 extern char _initrd_start[];
 extern char _initrd_end[];
-extern unsigned long vmlinux_filesize;
-extern unsigned long vmlinux_memsize;
 
 struct addr_range {
         unsigned long addr;
         unsigned long size;
         unsigned long memsize;
 };
-static struct addr_range vmlinux = {0, 0, 0};
-static struct addr_range vmlinuz = {0, 0, 0};
-static struct addr_range initrd  = {0, 0, 0};
+static struct addr_range vmlinux;
+static struct addr_range vmlinuz;
+static struct addr_range initrd;
+
+static char scratch[46912];     /* scratch space for gunzip, from zlib_inflate_workspacesize() */
+static char elfheader[256];
 
-static char scratch[128<<10];   /* 128kB of scratch space for gunzip */
 
 typedef void (*kernel_entry_t)( unsigned long,
                                 unsigned long,
@@ -62,6 +56,63 @@ typedef void (*kernel_entry_t)( unsigned long,
 
 static unsigned long claim_base;
 
+#define HEAD_CRC        2
+#define EXTRA_FIELD     4
+#define ORIG_NAME       8
+#define COMMENT         0x10
+#define RESERVED        0xe0
+
+static void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
+{
+        z_stream s;
+        int r, i, flags;
+
+        /* skip header */
+        i = 10;
+        flags = src[3];
+        if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
+                printf("bad gzipped data\n\r");
+                exit();
+        }
+        if ((flags & EXTRA_FIELD) != 0)
+                i = 12 + src[10] + (src[11] << 8);
+        if ((flags & ORIG_NAME) != 0)
+                while (src[i++] != 0)
+                        ;
+        if ((flags & COMMENT) != 0)
+                while (src[i++] != 0)
+                        ;
+        if ((flags & HEAD_CRC) != 0)
+                i += 2;
+        if (i >= *lenp) {
+                printf("gunzip: ran out of data in header\n\r");
+                exit();
+        }
+
+        if (zlib_inflate_workspacesize() > sizeof(scratch)) {
+                printf("gunzip needs more mem\n");
+                exit();
+        }
+        memset(&s, 0, sizeof(s));
+        s.workspace = scratch;
+        r = zlib_inflateInit2(&s, -MAX_WBITS);
+        if (r != Z_OK) {
+                printf("inflateInit2 returned %d\n\r", r);
+                exit();
+        }
+        s.next_in = src + i;
+        s.avail_in = *lenp - i;
+        s.next_out = dst;
+        s.avail_out = dstlen;
+        r = zlib_inflate(&s, Z_FULL_FLUSH);
+        if (r != Z_OK && r != Z_STREAM_END) {
+                printf("inflate returned %d msg: %s\n\r", r, s.msg);
+                exit();
+        }
+        *lenp = s.next_out - (unsigned char *) dst;
+        zlib_inflateEnd(&s);
+}
+
 static unsigned long try_claim(unsigned long size)
 {
         unsigned long addr = 0;
@@ -80,13 +131,16 @@ static unsigned long try_claim(unsigned long size)
         return addr;
 }
 
-void start(unsigned long a1, unsigned long a2, void *promptr)
+void start(unsigned long a1, unsigned long a2, void *promptr, void *sp)
 {
         unsigned long i;
+        int len;
         kernel_entry_t kernel_entry;
         Elf64_Ehdr *elf64;
         Elf64_Phdr *elf64ph;
 
+        memset(__bss_start, 0, _end - __bss_start);
+
         prom = (int (*)(void *)) promptr;
         chosen_handle = finddevice("/chosen");
         if (chosen_handle == (void *) -1)
@@ -97,7 +151,7 @@ void start(unsigned long a1, unsigned long a2, void *promptr)
         if (getprop(chosen_handle, "stdin", &stdin, sizeof(stdin)) != 4)
                 exit();
 
-        printf("\n\rzImage starting: loaded at 0x%lx\n\r", (unsigned long) _start);
+        printf("\n\rzImage starting: loaded at 0x%p (sp: 0x%p)\n\r", _start, sp);
 
         /*
          * The first available claim_base must be above the end of the
@@ -118,25 +172,45 @@ void start(unsigned long a1, unsigned long a2, void *promptr)
                 claim_base = PROG_START;
 #endif
 
-        /*
-         * Now we try to claim some memory for the kernel itself
-         * our "vmlinux_memsize" is the memory footprint in RAM, _HOWEVER_, what
-         * our Makefile stuffs in is an image containing all sort of junk including
-         * an ELF header. We need to do some calculations here to find the right
-         * size... In practice we add 1Mb, that is enough, but we should really
-         * consider fixing the Makefile to put a _raw_ kernel in there !
-         */
-        vmlinux_memsize += ONE_MB;
-        printf("Allocating 0x%lx bytes for kernel ...\n\r", vmlinux_memsize);
-        vmlinux.addr = try_claim(vmlinux_memsize);
+        vmlinuz.addr = (unsigned long)_vmlinux_start;
+        vmlinuz.size = (unsigned long)(_vmlinux_end - _vmlinux_start);
+
+        /* gunzip the ELF header of the kernel */
+        if (*(unsigned short *)vmlinuz.addr == 0x1f8b) {
+                len = vmlinuz.size;
+                gunzip(elfheader, sizeof(elfheader),
+                                (unsigned char *)vmlinuz.addr, &len);
+        } else
+                memcpy(elfheader, (const void *)vmlinuz.addr, sizeof(elfheader));
+
+        elf64 = (Elf64_Ehdr *)elfheader;
+        if ( elf64->e_ident[EI_MAG0]  != ELFMAG0        ||
+             elf64->e_ident[EI_MAG1]  != ELFMAG1        ||
+             elf64->e_ident[EI_MAG2]  != ELFMAG2        ||
+             elf64->e_ident[EI_MAG3]  != ELFMAG3        ||
+             elf64->e_ident[EI_CLASS] != ELFCLASS64     ||
+             elf64->e_ident[EI_DATA]  != ELFDATA2MSB    ||
+             elf64->e_type            != ET_EXEC        ||
+             elf64->e_machine         != EM_PPC64 )
+        {
+                printf("Error: not a valid PPC64 ELF file!\n\r");
+                exit();
+        }
+
+        elf64ph = (Elf64_Phdr *)((unsigned long)elf64 +
+                                (unsigned long)elf64->e_phoff);
+        for(i=0; i < (unsigned int)elf64->e_phnum ;i++,elf64ph++) {
+                if (elf64ph->p_type == PT_LOAD && elf64ph->p_offset != 0)
+                        break;
+        }
+        vmlinux.size = (unsigned long)elf64ph->p_filesz;
+        vmlinux.memsize = (unsigned long)elf64ph->p_memsz;
+        printf("Allocating 0x%lx bytes for kernel ...\n\r", vmlinux.memsize);
+        vmlinux.addr = try_claim(vmlinux.memsize);
         if (vmlinux.addr == 0) {
                 printf("Can't allocate memory for kernel image !\n\r");
                 exit();
         }
-        vmlinuz.addr = (unsigned long)_vmlinux_start;
-        vmlinuz.size = (unsigned long)(_vmlinux_end - _vmlinux_start);
-        vmlinux.size = PAGE_ALIGN(vmlinux_filesize);
-        vmlinux.memsize = vmlinux_memsize;
 
         /*
          * Now we try to claim memory for the initrd (and copy it there)
@@ -160,49 +234,22 @@ void start(unsigned long a1, unsigned long a2, void *promptr)
 
         /* Eventually gunzip the kernel */
         if (*(unsigned short *)vmlinuz.addr == 0x1f8b) {
-                int len;
-                avail_ram = scratch;
-                begin_avail = avail_high = avail_ram;
-                end_avail = scratch + sizeof(scratch);
                 printf("gunzipping (0x%lx <- 0x%lx:0x%0lx)...",
                        vmlinux.addr, vmlinuz.addr, vmlinuz.addr+vmlinuz.size);
                 len = vmlinuz.size;
-                gunzip((void *)vmlinux.addr, vmlinux.size,
+                gunzip((void *)vmlinux.addr, vmlinux.memsize,
                         (unsigned char *)vmlinuz.addr, &len);
                 printf("done 0x%lx bytes\n\r", len);
-                printf("0x%x bytes of heap consumed, max in use 0x%x\n\r",
-                       (unsigned)(avail_high - begin_avail), heap_max);
         } else {
                 memmove((void *)vmlinux.addr,(void *)vmlinuz.addr,vmlinuz.size);
         }
 
         /* Skip over the ELF header */
-        elf64 = (Elf64_Ehdr *)vmlinux.addr;
-        if ( elf64->e_ident[EI_MAG0]  != ELFMAG0        ||
-             elf64->e_ident[EI_MAG1]  != ELFMAG1        ||
-             elf64->e_ident[EI_MAG2]  != ELFMAG2        ||
-             elf64->e_ident[EI_MAG3]  != ELFMAG3        ||
-             elf64->e_ident[EI_CLASS] != ELFCLASS64     ||
-             elf64->e_ident[EI_DATA]  != ELFDATA2MSB    ||
-             elf64->e_type            != ET_EXEC        ||
-             elf64->e_machine         != EM_PPC64 )
-        {
-                printf("Error: not a valid PPC64 ELF file!\n\r");
-                exit();
-        }
-
-        elf64ph = (Elf64_Phdr *)((unsigned long)elf64 +
-                                (unsigned long)elf64->e_phoff);
-        for(i=0; i < (unsigned int)elf64->e_phnum ;i++,elf64ph++) {
-                if (elf64ph->p_type == PT_LOAD && elf64ph->p_offset != 0)
-                        break;
-        }
 #ifdef DEBUG
         printf("... skipping 0x%lx bytes of ELF header\n\r",
                         (unsigned long)elf64ph->p_offset);
 #endif
         vmlinux.addr += (unsigned long)elf64ph->p_offset;
-        vmlinux.size -= (unsigned long)elf64ph->p_offset;
 
         flush_cache((void *)vmlinux.addr, vmlinux.size);
 
@@ -225,108 +272,3 @@ void start(unsigned long a1, unsigned long a2, void *promptr)
         exit();
 }
 
-struct memchunk {
-        unsigned int size;
-        unsigned int pad;
-        struct memchunk *next;
-};
-
-static struct memchunk *freechunks;
-
-void *zalloc(void *x, unsigned items, unsigned size)
-{
-        void *p;
-        struct memchunk **mpp, *mp;
-
-        size *= items;
-        size = _ALIGN(size, sizeof(struct memchunk));
-        heap_use += size;
-        if (heap_use > heap_max)
-                heap_max = heap_use;
-        for (mpp = &freechunks; (mp = *mpp) != 0; mpp = &mp->next) {
-                if (mp->size == size) {
-                        *mpp = mp->next;
-                        return mp;
-                }
-        }
-        p = avail_ram;
-        avail_ram += size;
-        if (avail_ram > avail_high)
-                avail_high = avail_ram;
-        if (avail_ram > end_avail) {
-                printf("oops... out of memory\n\r");
-                pause();
-        }
-        return p;
-}
-
-void zfree(void *x, void *addr, unsigned nb)
-{
-        struct memchunk *mp = addr;
-
-        nb = _ALIGN(nb, sizeof(struct memchunk));
-        heap_use -= nb;
-        if (avail_ram == addr + nb) {
-                avail_ram = addr;
-                return;
-        }
-        mp->size = nb;
-        mp->next = freechunks;
-        freechunks = mp;
-}
-
-#define HEAD_CRC        2
-#define EXTRA_FIELD     4
-#define ORIG_NAME       8
-#define COMMENT         0x10
-#define RESERVED        0xe0
-
-#define DEFLATED        8
-
-static void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
-{
-        z_stream s;
-        int r, i, flags;
-
-        /* skip header */
-        i = 10;
-        flags = src[3];
-        if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
-                printf("bad gzipped data\n\r");
-                exit();
-        }
-        if ((flags & EXTRA_FIELD) != 0)
-                i = 12 + src[10] + (src[11] << 8);
-        if ((flags & ORIG_NAME) != 0)
-                while (src[i++] != 0)
-                        ;
-        if ((flags & COMMENT) != 0)
-                while (src[i++] != 0)
-                        ;
-        if ((flags & HEAD_CRC) != 0)
-                i += 2;
-        if (i >= *lenp) {
-                printf("gunzip: ran out of data in header\n\r");
-                exit();
-        }
-
-        s.zalloc = zalloc;
-        s.zfree = zfree;
-        r = inflateInit2(&s, -MAX_WBITS);
-        if (r != Z_OK) {
-                printf("inflateInit2 returned %d\n\r", r);
-                exit();
-        }
-        s.next_in = src + i;
-        s.avail_in = *lenp - i;
-        s.next_out = dst;
-        s.avail_out = dstlen;
-        r = inflate(&s, Z_FINISH);
-        if (r != Z_OK && r != Z_STREAM_END) {
-                printf("inflate returned %d msg: %s\n\r", r, s.msg);
-                exit();
-        }
-        *lenp = s.next_out - (unsigned char *) dst;
-        inflateEnd(&s);
-}
-
diff --git a/arch/ppc64/boot/string.S b/arch/ppc64/boot/string.S
index 7ade87ae7718..b1eeaed7db17 100644
--- a/arch/ppc64/boot/string.S
+++ b/arch/ppc64/boot/string.S
@@ -104,7 +104,7 @@ memmove:
 
         .globl  memcpy
 memcpy:
-        rlwinm. r7,r5,32-3,3,31         /* r0 = r5 >> 3 */
+        rlwinm. r7,r5,32-3,3,31         /* r7 = r5 >> 3 */
         addi    r6,r3,-4
         addi    r4,r4,-4
         beq     2f                      /* if less than 8 bytes to do */
@@ -146,7 +146,7 @@ memcpy:
 
         .globl  backwards_memcpy
 backwards_memcpy:
-        rlwinm. r7,r5,32-3,3,31         /* r0 = r5 >> 3 */
+        rlwinm. r7,r5,32-3,3,31         /* r7 = r5 >> 3 */
         add     r6,r3,r5
         add     r4,r4,r5
         beq     2f
diff --git a/arch/ppc64/boot/string.h b/arch/ppc64/boot/string.h
index 9289258bcbd6..9fdff1cc0d70 100644
--- a/arch/ppc64/boot/string.h
+++ b/arch/ppc64/boot/string.h
@@ -1,5 +1,6 @@
 #ifndef _PPC_BOOT_STRING_H_
 #define _PPC_BOOT_STRING_H_
+#include <stddef.h>
 
 extern char *strcpy(char *dest, const char *src);
 extern char *strncpy(char *dest, const char *src, size_t n);
diff --git a/arch/ppc64/boot/zImage.lds b/arch/ppc64/boot/zImage.lds
index 8fe5e7071f54..4b6bb3ffe3dc 100644
--- a/arch/ppc64/boot/zImage.lds
+++ b/arch/ppc64/boot/zImage.lds
@@ -1,62 +1,24 @@
 OUTPUT_ARCH(powerpc:common)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
+ENTRY(_zimage_start)
 SECTIONS
 {
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)      }
-  .dynsym        : { *(.dynsym)        }
-  .dynstr        : { *(.dynstr)        }
-  .rel.text      : { *(.rel.text)      }
-  .rela.text     : { *(.rela.text)     }
-  .rel.data      : { *(.rel.data)      }
-  .rela.data     : { *(.rela.data)     }
-  .rel.rodata    : { *(.rel.rodata)    }
-  .rela.rodata   : { *(.rela.rodata)   }
-  .rel.got       : { *(.rel.got)       }
-  .rela.got      : { *(.rela.got)      }
-  .rel.ctors     : { *(.rel.ctors) }
-  .rela.ctors    : { *(.rela.ctors)    }
-  .rel.dtors     : { *(.rel.dtors) }
-  .rela.dtors    : { *(.rela.dtors)    }
-  .rel.bss       : { *(.rel.bss)       }
-  .rela.bss      : { *(.rela.bss)      }
-  .rel.plt       : { *(.rel.plt)       }
-  .rela.plt      : { *(.rela.plt)      }
-  .plt : { *(.plt) }
+  . = (4*1024*1024);
+  _start = .;
   .text      :
   {
     *(.text)
     *(.fixup)
-    *(.got1)
   }
-  . = ALIGN(4096);
   _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-  }
-  .kstrtab   : { *(.kstrtab) }
-  __vermagic : { *(__vermagic) }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-  /* Read-write section, merged into data segment: */
   . = ALIGN(4096);
   .data    :
   {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.got.plt) *(.got)
-    *(.dynamic)
-    CONSTRUCTORS
+    *(.rodata*)
+    *(.data*)
+    *(.sdata*)
+    __got2_start = .;
+    *(.got2)
+    __got2_end = .;
   }
 
   . = ALIGN(4096);
@@ -71,20 +33,14 @@ SECTIONS
 
   . = ALIGN(4096);
   _edata  =  .;
-  PROVIDE (edata = .);
-
-  .fixup   : { *(.fixup) }
 
   . = ALIGN(4096);
   __bss_start = .;
   .bss       :
   {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
+   *(.sbss)
    *(.bss)
-   *(COMMON)
   }
   . = ALIGN(4096);
   _end = . ;
-  PROVIDE (end = .);
 }
diff --git a/arch/ppc64/boot/zlib.c b/arch/ppc64/boot/zlib.c
deleted file mode 100644
index 0d910cd2079d..000000000000
--- a/arch/ppc64/boot/zlib.c
+++ /dev/null
@@ -1,2195 +0,0 @@
-/*
- * This file is derived from various .h and .c files from the zlib-0.95
- * distribution by Jean-loup Gailly and Mark Adler, with some additions
- * by Paul Mackerras to aid in implementing Deflate compression and
- * decompression for PPP packets.  See zlib.h for conditions of
- * distribution and use.
- *
- * Changes that have been made include:
- * - changed functions not used outside this file to "local"
- * - added minCompression parameter to deflateInit2
- * - added Z_PACKET_FLUSH (see zlib.h for details)
- * - added inflateIncomp
- *
-  Copyright (C) 1995 Jean-loup Gailly and Mark Adler
-
-  This software is provided 'as-is', without any express or implied
-  warranty.  In no event will the authors be held liable for any damages
-  arising from the use of this software.
-
-  Permission is granted to anyone to use this software for any purpose,
-  including commercial applications, and to alter it and redistribute it
-  freely, subject to the following restrictions:
-
-  1. The origin of this software must not be misrepresented; you must not
-     claim that you wrote the original software. If you use this software
-     in a product, an acknowledgment in the product documentation would be
-     appreciated but is not required.
-  2. Altered source versions must be plainly marked as such, and must not be
-     misrepresented as being the original software.
-  3. This notice may not be removed or altered from any source distribution.
-
-  Jean-loup Gailly        Mark Adler
-  gzip@prep.ai.mit.edu    madler@alumni.caltech.edu
-
- *
- * 
- */
-
-/*+++++*/
-/* zutil.h -- internal interface and configuration of the compression library
- * Copyright (C) 1995 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-/* From: zutil.h,v 1.9 1995/05/03 17:27:12 jloup Exp */
-
-#define _Z_UTIL_H
-
-#include "zlib.h"
-
-#ifndef local
-#  define local static
-#endif
-/* compile with -Dlocal if your debugger can't find static symbols */
-
-#define FAR
-
-typedef unsigned char  uch;
-typedef uch FAR uchf;
-typedef unsigned short ush;
-typedef ush FAR ushf;
-typedef unsigned long  ulg;
-
-extern char *z_errmsg[]; /* indexed by 1-zlib_error */
-
-#define ERR_RETURN(strm,err) return (strm->msg=z_errmsg[1-err], err)
-/* To be used only when the state is known to be valid */
-
-#ifndef NULL
-#define NULL    ((void *) 0)
-#endif
-
-        /* common constants */
-
-#define DEFLATED   8
-
-#ifndef DEF_WBITS
-#  define DEF_WBITS MAX_WBITS
-#endif
-/* default windowBits for decompression. MAX_WBITS is for compression only */
-
-#if MAX_MEM_LEVEL >= 8
-#  define DEF_MEM_LEVEL 8
-#else
-#  define DEF_MEM_LEVEL  MAX_MEM_LEVEL
-#endif
-/* default memLevel */
-
-#define STORED_BLOCK 0
-#define STATIC_TREES 1
-#define DYN_TREES    2
-/* The three kinds of block type */
-
-#define MIN_MATCH  3
-#define MAX_MATCH  258
-/* The minimum and maximum match lengths */
-
-         /* functions */
-
-extern void *memcpy(void *, const void *, unsigned long);
-#define zmemcpy memcpy
-
-/* Diagnostic functions */
-#ifdef DEBUG_ZLIB
-#  include "stdio.h"
-#  ifndef verbose
-#    define verbose 0
-#  endif
-#  define Assert(cond,msg) {if(!(cond)) z_error(msg);}
-#  define Trace(x) fprintf x
-#  define Tracev(x) {if (verbose) fprintf x ;}
-#  define Tracevv(x) {if (verbose>1) fprintf x ;}
-#  define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-#  define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-#else
-#  define Assert(cond,msg)
-#  define Trace(x)
-#  define Tracev(x)
-#  define Tracevv(x)
-#  define Tracec(c,x)
-#  define Tracecv(c,x)
-#endif
-
-
-typedef uLong (*check_func) OF((uLong check, Bytef *buf, uInt len));
-
-/* voidpf zcalloc OF((voidpf opaque, unsigned items, unsigned size)); */
-/* void   zcfree  OF((voidpf opaque, voidpf ptr)); */
-
-#define ZALLOC(strm, items, size) \
-           (*((strm)->zalloc))((strm)->opaque, (items), (size))
-#define ZFREE(strm, addr, size) \
-           (*((strm)->zfree))((strm)->opaque, (voidpf)(addr), (size))
-#define TRY_FREE(s, p, n) {if (p) ZFREE(s, p, n);}
-
-/* deflate.h -- internal compression state
- * Copyright (C) 1995 Jean-loup Gailly
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-/*+++++*/
-/* infblock.h -- header to use infblock.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-struct inflate_blocks_state;
-typedef struct inflate_blocks_state FAR inflate_blocks_statef;
-
-local inflate_blocks_statef * inflate_blocks_new OF((
-    z_stream *z,
-    check_func c,               /* check function */
-    uInt w));                   /* window size */
-
-local int inflate_blocks OF((
-    inflate_blocks_statef *,
-    z_stream *,
-    int));                      /* initial return code */
-
-local void inflate_blocks_reset OF((
-    inflate_blocks_statef *,
-    z_stream *,
-    uLongf *));                  /* check value on output */
-
-local int inflate_blocks_free OF((
-    inflate_blocks_statef *,
-    z_stream *,
-    uLongf *));                  /* check value on output */
-
-local int inflate_addhistory OF((
-    inflate_blocks_statef *,
-    z_stream *));
-
-local int inflate_packet_flush OF((
-    inflate_blocks_statef *));
-
-/*+++++*/
-/* inftrees.h -- header to use inftrees.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-/* Huffman code lookup table entry--this entry is four bytes for machines
-   that have 16-bit pointers (e.g. PC's in the small or medium model). */
-
-typedef struct inflate_huft_s FAR inflate_huft;
-
-struct inflate_huft_s {
-  union {
-    struct {
-      Byte Exop;        /* number of extra bits or operation */
-      Byte Bits;        /* number of bits in this code or subcode */
-    } what;
-    uInt Nalloc;        /* number of these allocated here */
-    Bytef *pad;         /* pad structure to a power of 2 (4 bytes for */
-  } word;               /*  16-bit, 8 bytes for 32-bit machines) */
-  union {
-    uInt Base;          /* literal, length base, or distance base */
-    inflate_huft *Next; /* pointer to next level of table */
-  } more;
-};
-
-#ifdef DEBUG_ZLIB
-  local uInt inflate_hufts;
-#endif
-
-local int inflate_trees_bits OF((
-    uIntf *,                    /* 19 code lengths */
-    uIntf *,                    /* bits tree desired/actual depth */
-    inflate_huft * FAR *,       /* bits tree result */
-    z_stream *));               /* for zalloc, zfree functions */
-
-local int inflate_trees_dynamic OF((
-    uInt,                       /* number of literal/length codes */
-    uInt,                       /* number of distance codes */
-    uIntf *,                    /* that many (total) code lengths */
-    uIntf *,                    /* literal desired/actual bit depth */
-    uIntf *,                    /* distance desired/actual bit depth */
-    inflate_huft * FAR *,       /* literal/length tree result */
-    inflate_huft * FAR *,       /* distance tree result */
-    z_stream *));               /* for zalloc, zfree functions */
-
-local int inflate_trees_fixed OF((
-    uIntf *,                    /* literal desired/actual bit depth */
-    uIntf *,                    /* distance desired/actual bit depth */
-    inflate_huft * FAR *,       /* literal/length tree result */
-    inflate_huft * FAR *));     /* distance tree result */
-
-local int inflate_trees_free OF((
-    inflate_huft *,             /* tables to free */
-    z_stream *));               /* for zfree function */
-
-
-/*+++++*/
-/* infcodes.h -- header to use infcodes.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-struct inflate_codes_state;
-typedef struct inflate_codes_state FAR inflate_codes_statef;
-
-local inflate_codes_statef *inflate_codes_new OF((
-    uInt, uInt,
-    inflate_huft *, inflate_huft *,
-    z_stream *));
-
-local int inflate_codes OF((
-    inflate_blocks_statef *,
-    z_stream *,
-    int));
-
-local void inflate_codes_free OF((
-    inflate_codes_statef *,
-    z_stream *));
-
-
-/*+++++*/
-/* inflate.c -- zlib interface to inflate modules
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* inflate private state */
-struct internal_state {
-
-  /* mode */
-  enum {
-      METHOD,   /* waiting for method byte */
-      FLAG,     /* waiting for flag byte */
-      BLOCKS,   /* decompressing blocks */
-      CHECK4,   /* four check bytes to go */
-      CHECK3,   /* three check bytes to go */
-      CHECK2,   /* two check bytes to go */
-      CHECK1,   /* one check byte to go */
-      DONE,     /* finished check, done */
-      BAD}      /* got an error--stay here */
-    mode;               /* current inflate mode */
-
-  /* mode dependent information */
-  union {
-    uInt method;        /* if FLAGS, method byte */
-    struct {
-      uLong was;                /* computed check value */
-      uLong need;               /* stream check value */
-    } check;            /* if CHECK, check values to compare */
-    uInt marker;        /* if BAD, inflateSync's marker bytes count */
-  } sub;        /* submode */
-
-  /* mode independent information */
-  int  nowrap;          /* flag for no wrapper */
-  uInt wbits;           /* log2(window size)  (8..15, defaults to 15) */
-  inflate_blocks_statef 
-    *blocks;            /* current inflate_blocks state */
-
-};
-
-
-int inflateReset(
-        z_stream *z
-)
-{
-  uLong c;
-
-  if (z == Z_NULL || z->state == Z_NULL)
-    return Z_STREAM_ERROR;
-  z->total_in = z->total_out = 0;
-  z->msg = Z_NULL;
-  z->state->mode = z->state->nowrap ? BLOCKS : METHOD;
-  inflate_blocks_reset(z->state->blocks, z, &c);
-  Trace((stderr, "inflate: reset\n"));
-  return Z_OK;
-}
-
-
-int inflateEnd(
-        z_stream *z
-)
-{
-  uLong c;
-
-  if (z == Z_NULL || z->state == Z_NULL || z->zfree == Z_NULL)
-    return Z_STREAM_ERROR;
-  if (z->state->blocks != Z_NULL)
-    inflate_blocks_free(z->state->blocks, z, &c);
-  ZFREE(z, z->state, sizeof(struct internal_state));
-  z->state = Z_NULL;
-  Trace((stderr, "inflate: end\n"));
-  return Z_OK;
-}
-
-
-int inflateInit2(
-        z_stream *z,
-        int w
-)
-{
-  /* initialize state */
-  if (z == Z_NULL)
-    return Z_STREAM_ERROR;
-/*  if (z->zalloc == Z_NULL) z->zalloc = zcalloc; */
-/*  if (z->zfree == Z_NULL) z->zfree = zcfree; */
-  if ((z->state = (struct internal_state FAR *)
-       ZALLOC(z,1,sizeof(struct internal_state))) == Z_NULL)
-    return Z_MEM_ERROR;
-  z->state->blocks = Z_NULL;
-
-  /* handle undocumented nowrap option (no zlib header or check) */
-  z->state->nowrap = 0;
-  if (w < 0)
-  {
-    w = - w;
-    z->state->nowrap = 1;
-  }
-
-  /* set window size */
-  if (w < 8 || w > 15)
-  {
-    inflateEnd(z);
-    return Z_STREAM_ERROR;
-  }
-  z->state->wbits = (uInt)w;
-
-  /* create inflate_blocks state */
-  if ((z->state->blocks =
-       inflate_blocks_new(z, z->state->nowrap ? Z_NULL : adler32, 1 << w))
-      == Z_NULL)
-  {
-    inflateEnd(z);
-    return Z_MEM_ERROR;
-  }
-  Trace((stderr, "inflate: allocated\n"));
-
-  /* reset state */
-  inflateReset(z);
-  return Z_OK;
-}
-
-
-int inflateInit(
-        z_stream *z
-)
-{
-  return inflateInit2(z, DEF_WBITS);
-}
-
-
-#define NEEDBYTE {if(z->avail_in==0)goto empty;r=Z_OK;}
-#define NEXTBYTE (z->avail_in--,z->total_in++,*z->next_in++)
-
-int inflate(
-        z_stream *z,
-        int f   
-)
-{
-  int r;
-  uInt b;
-
-  if (z == Z_NULL || z->next_in == Z_NULL)
-    return Z_STREAM_ERROR;
-  r = Z_BUF_ERROR;
-  while (1) switch (z->state->mode)
-  {
-    case METHOD:
-      NEEDBYTE
-      if (((z->state->sub.method = NEXTBYTE) & 0xf) != DEFLATED)
-      {
-        z->state->mode = BAD;
-        z->msg = "unknown compression method";
-        z->state->sub.marker = 5;       /* can't try inflateSync */
-        break;
-      }
-      if ((z->state->sub.method >> 4) + 8 > z->state->wbits)
-      {
-        z->state->mode = BAD;
-        z->msg = "invalid window size";
-        z->state->sub.marker = 5;       /* can't try inflateSync */
-        break;
-      }
-      z->state->mode = FLAG;
-    case FLAG:
-      NEEDBYTE
-      if ((b = NEXTBYTE) & 0x20)
-      {
-        z->state->mode = BAD;
-        z->msg = "invalid reserved bit";
-        z->state->sub.marker = 5;       /* can't try inflateSync */
-        break;
-      }
-      if (((z->state->sub.method << 8) + b) % 31)
-      {
-        z->state->mode = BAD;
-        z->msg = "incorrect header check";
-        z->state->sub.marker = 5;       /* can't try inflateSync */
-        break;
-      }
-      Trace((stderr, "inflate: zlib header ok\n"));
-      z->state->mode = BLOCKS;
-    case BLOCKS:
-      r = inflate_blocks(z->state->blocks, z, r);
-      if (f == Z_PACKET_FLUSH && z->avail_in == 0 && z->avail_out != 0)
-          r = inflate_packet_flush(z->state->blocks);
-      if (r == Z_DATA_ERROR)
-      {
-        z->state->mode = BAD;
-        z->state->sub.marker = 0;       /* can try inflateSync */
-        break;
-      }
-      if (r != Z_STREAM_END)
-        return r;
-      r = Z_OK;
-      inflate_blocks_reset(z->state->blocks, z, &z->state->sub.check.was);
-      if (z->state->nowrap)
-      {
-        z->state->mode = DONE;
-        break;
-      }
-      z->state->mode = CHECK4;
-    case CHECK4:
-      NEEDBYTE
-      z->state->sub.check.need = (uLong)NEXTBYTE << 24;
-      z->state->mode = CHECK3;
-    case CHECK3:
-      NEEDBYTE
-      z->state->sub.check.need += (uLong)NEXTBYTE << 16;
-      z->state->mode = CHECK2;
-    case CHECK2:
-      NEEDBYTE
-      z->state->sub.check.need += (uLong)NEXTBYTE << 8;
-      z->state->mode = CHECK1;
-    case CHECK1:
-      NEEDBYTE
-      z->state->sub.check.need += (uLong)NEXTBYTE;
-
-      if (z->state->sub.check.was != z->state->sub.check.need)
-      {
-        z->state->mode = BAD;
-        z->msg = "incorrect data check";
-        z->state->sub.marker = 5;       /* can't try inflateSync */
-        break;
-      }
-      Trace((stderr, "inflate: zlib check ok\n"));
-      z->state->mode = DONE;
-    case DONE:
-      return Z_STREAM_END;
-    case BAD:
-      return Z_DATA_ERROR;
-    default:
-      return Z_STREAM_ERROR;
-  }
-
- empty:
-  if (f != Z_PACKET_FLUSH)
-    return r;
-  z->state->mode = BAD;
-  z->state->sub.marker = 0;       /* can try inflateSync */
-  return Z_DATA_ERROR;
-}
-
-/*
- * This subroutine adds the data at next_in/avail_in to the output history
- * without performing any output.  The output buffer must be "caught up";
- * i.e. no pending output (hence s->read equals s->write), and the state must
- * be BLOCKS (i.e. we should be willing to see the start of a series of
- * BLOCKS).  On exit, the output will also be caught up, and the checksum
- * will have been updated if need be.
- */
-
-int inflateIncomp(
-        z_stream *z
-)
-{
-    if (z->state->mode != BLOCKS)
-        return Z_DATA_ERROR;
-    return inflate_addhistory(z->state->blocks, z);
-}
-
-
-int inflateSync(
-        z_stream *z
-)
-{
-  uInt n;       /* number of bytes to look at */
-  Bytef *p;     /* pointer to bytes */
-  uInt m;       /* number of marker bytes found in a row */
-  uLong r, w;   /* temporaries to save total_in and total_out */
-
-  /* set up */
-  if (z == Z_NULL || z->state == Z_NULL)
-    return Z_STREAM_ERROR;
-  if (z->state->mode != BAD)
-  {
-    z->state->mode = BAD;
-    z->state->sub.marker = 0;
-  }
-  if ((n = z->avail_in) == 0)
-    return Z_BUF_ERROR;
-  p = z->next_in;
-  m = z->state->sub.marker;
-
-  /* search */
-  while (n && m < 4)
-  {
-    if (*p == (Byte)(m < 2 ? 0 : 0xff))
-      m++;
-    else if (*p)
-      m = 0;
-    else
-      m = 4 - m;
-    p++, n--;
-  }
-
-  /* restore */
-  z->total_in += p - z->next_in;
-  z->next_in = p;
-  z->avail_in = n;
-  z->state->sub.marker = m;
-
-  /* return no joy or set up to restart on a new block */
-  if (m != 4)
-    return Z_DATA_ERROR;
-  r = z->total_in;  w = z->total_out;
-  inflateReset(z);
-  z->total_in = r;  z->total_out = w;
-  z->state->mode = BLOCKS;
-  return Z_OK;
-}
-
-#undef NEEDBYTE
-#undef NEXTBYTE
-
-/*+++++*/
-/* infutil.h -- types and macros common to blocks and codes
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-/* inflate blocks semi-private state */
-struct inflate_blocks_state {
-
-  /* mode */
-  enum {
-      TYPE,     /* get type bits (3, including end bit) */
-      LENS,     /* get lengths for stored */
-      STORED,   /* processing stored block */
-      TABLE,    /* get table lengths */
-      BTREE,    /* get bit lengths tree for a dynamic block */
-      DTREE,    /* get length, distance trees for a dynamic block */
-      CODES,    /* processing fixed or dynamic block */
-      DRY,      /* output remaining window bytes */
-      DONEB,     /* finished last block, done */
-      BADB}      /* got a data error--stuck here */
-    mode;               /* current inflate_block mode */
-
-  /* mode dependent information */
-  union {
-    uInt left;          /* if STORED, bytes left to copy */
-    struct {
-      uInt table;               /* table lengths (14 bits) */
-      uInt index;               /* index into blens (or border) */
-      uIntf *blens;             /* bit lengths of codes */
-      uInt bb;                  /* bit length tree depth */
-      inflate_huft *tb;         /* bit length decoding tree */
-      int nblens;               /* # elements allocated at blens */
-    } trees;            /* if DTREE, decoding info for trees */
-    struct {
-      inflate_huft *tl, *td;    /* trees to free */
-      inflate_codes_statef 
-         *codes;
-    } decode;           /* if CODES, current state */
-  } sub;                /* submode */
-  uInt last;            /* true if this block is the last block */
-
-  /* mode independent information */
-  uInt bitk;            /* bits in bit buffer */
-  uLong bitb;           /* bit buffer */
-  Bytef *window;        /* sliding window */
-  Bytef *end;           /* one byte after sliding window */
-  Bytef *read;          /* window read pointer */
-  Bytef *write;         /* window write pointer */
-  check_func checkfn;   /* check function */
-  uLong check;          /* check on output */
-
-};
-
-
-/* defines for inflate input/output */
-/*   update pointers and return */
-#define UPDBITS {s->bitb=b;s->bitk=k;}
-#define UPDIN {z->avail_in=n;z->total_in+=p-z->next_in;z->next_in=p;}
-#define UPDOUT {s->write=q;}
-#define UPDATE {UPDBITS UPDIN UPDOUT}
-#define LEAVE {UPDATE return inflate_flush(s,z,r);}
-/*   get bytes and bits */
-#define LOADIN {p=z->next_in;n=z->avail_in;b=s->bitb;k=s->bitk;}
-#define NEEDBYTE {if(n)r=Z_OK;else LEAVE}
-#define NEXTBYTE (n--,*p++)
-#define NEEDBITS(j) {while(k<(j)){NEEDBYTE;b|=((uLong)NEXTBYTE)<<k;k+=8;}}
-#define DUMPBITS(j) {b>>=(j);k-=(j);}
-/*   output bytes */
-#define WAVAIL (q<s->read?s->read-q-1:s->end-q)
-#define LOADOUT {q=s->write;m=WAVAIL;}
-#define WRAP {if(q==s->end&&s->read!=s->window){q=s->window;m=WAVAIL;}}
-#define FLUSH {UPDOUT r=inflate_flush(s,z,r); LOADOUT}
-#define NEEDOUT {if(m==0){WRAP if(m==0){FLUSH WRAP if(m==0) LEAVE}}r=Z_OK;}
-#define OUTBYTE(a) {*q++=(Byte)(a);m--;}
-/*   load local pointers */
-#define LOAD {LOADIN LOADOUT}
-
-/* And'ing with mask[n] masks the lower n bits */
-local uInt inflate_mask[] = {
-    0x0000,
-    0x0001, 0x0003, 0x0007, 0x000f, 0x001f, 0x003f, 0x007f, 0x00ff,
-    0x01ff, 0x03ff, 0x07ff, 0x0fff, 0x1fff, 0x3fff, 0x7fff, 0xffff
-};
-
-/* copy as much as possible from the sliding window to the output area */
-local int inflate_flush OF((
-    inflate_blocks_statef *,
-    z_stream *,
-    int));
-
-/*+++++*/
-/* inffast.h -- header to use inffast.c
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* WARNING: this file should *not* be used by applications. It is
-   part of the implementation of the compression library and is
-   subject to change. Applications should only use zlib.h.
- */
-
-local int inflate_fast OF((
-    uInt,
-    uInt,
-    inflate_huft *,
-    inflate_huft *,
-    inflate_blocks_statef *,
-    z_stream *));
-
-
-/*+++++*/
-/* infblock.c -- interpret and process block types to last block
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* Table for deflate from PKZIP's appnote.txt. */
-local uInt border[] = { /* Order of the bit length code lengths */
-        16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
-
-/*
-   Notes beyond the 1.93a appnote.txt:
-
-   1. Distance pointers never point before the beginning of the output
-      stream.
-   2. Distance pointers can point back across blocks, up to 32k away.
-   3. There is an implied maximum of 7 bits for the bit length table and
-      15 bits for the actual data.
-   4. If only one code exists, then it is encoded using one bit.  (Zero
-      would be more efficient, but perhaps a little confusing.)  If two
-      codes exist, they are coded using one bit each (0 and 1).
-   5. There is no way of sending zero distance codes--a dummy must be
-      sent if there are none.  (History: a pre 2.0 version of PKZIP would
-      store blocks with no distance codes, but this was discovered to be
-      too harsh a criterion.)  Valid only for 1.93a.  2.04c does allow
-      zero distance codes, which is sent as one code of zero bits in
-      length.
-   6. There are up to 286 literal/length codes.  Code 256 represents the
-      end-of-block.  Note however that the static length tree defines
-      288 codes just to fill out the Huffman codes.  Codes 286 and 287
-      cannot be used though, since there is no length base or extra bits
-      defined for them.  Similarily, there are up to 30 distance codes.
-      However, static trees define 32 codes (all 5 bits) to fill out the
-      Huffman codes, but the last two had better not show up in the data.
-   7. Unzip can check dynamic Huffman blocks for complete code sets.
-      The exception is that a single code would not be complete (see #4).
-   8. The five bits following the block type is really the number of
-      literal codes sent minus 257.
-   9. Length codes 8,16,16 are interpreted as 13 length codes of 8 bits
-      (1+6+6).  Therefore, to output three times the length, you output
-      three codes (1+1+1), whereas to output four times the same length,
-      you only need two codes (1+3).  Hmm.
-  10. In the tree reconstruction algorithm, Code = Code + Increment
-      only if BitLength(i) is not zero.  (Pretty obvious.)
-  11. Correction: 4 Bits: # of Bit Length codes - 4     (4 - 19)
-  12. Note: length code 284 can represent 227-258, but length code 285
-      really is 258.  The last length deserves its own, short code
-      since it gets used a lot in very redundant files.  The length
-      258 is special since 258 - 3 (the min match length) is 255.
-  13. The literal/length and distance code bit lengths are read as a
-      single stream of lengths.  It is possible (and advantageous) for
-      a repeat code (16, 17, or 18) to go across the boundary between
-      the two sets of lengths.
- */
-
-
-local void inflate_blocks_reset(
-        inflate_blocks_statef *s,
-        z_stream *z,
-        uLongf *c
-)
-{
-  if (s->checkfn != Z_NULL)
-    *c = s->check;
-  if (s->mode == BTREE || s->mode == DTREE)
-    ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt));
-  if (s->mode == CODES)
-  {
-    inflate_codes_free(s->sub.decode.codes, z);
-    inflate_trees_free(s->sub.decode.td, z);
-    inflate_trees_free(s->sub.decode.tl, z);
-  }
-  s->mode = TYPE;
-  s->bitk = 0;
-  s->bitb = 0;
-  s->read = s->write = s->window;
-  if (s->checkfn != Z_NULL)
-    s->check = (*s->checkfn)(0L, Z_NULL, 0);
-  Trace((stderr, "inflate:   blocks reset\n"));
-}
-
-
-local inflate_blocks_statef *inflate_blocks_new(
-        z_stream *z,
-        check_func c,
-        uInt w
-)
-{
-  inflate_blocks_statef *s;
-
-  if ((s = (inflate_blocks_statef *)ZALLOC
-       (z,1,sizeof(struct inflate_blocks_state))) == Z_NULL)
-    return s;
-  if ((s->window = (Bytef *)ZALLOC(z, 1, w)) == Z_NULL)
-  {
-    ZFREE(z, s, sizeof(struct inflate_blocks_state));
-    return Z_NULL;
-  }
-  s->end = s->window + w;
-  s->checkfn = c;
-  s->mode = TYPE;
-  Trace((stderr, "inflate:   blocks allocated\n"));
-  inflate_blocks_reset(s, z, &s->check);
-  return s;
-}
-
-
-local int inflate_blocks(
-        inflate_blocks_statef *s,
-        z_stream *z,
-        int r
-)
-{
-  uInt t;               /* temporary storage */
-  uLong b;              /* bit buffer */
-  uInt k;               /* bits in bit buffer */
-  Bytef *p;             /* input data pointer */
-  uInt n;               /* bytes available there */
-  Bytef *q;             /* output window write pointer */
-  uInt m;               /* bytes to end of window or read pointer */
-
-  /* copy input/output information to locals (UPDATE macro restores) */
-  LOAD
-
-  /* process input based on current state */
-  while (1) switch (s->mode)
-  {
-    case TYPE:
-      NEEDBITS(3)
-      t = (uInt)b & 7;
-      s->last = t & 1;
-      switch (t >> 1)
-      {
-        case 0:                         /* stored */
-          Trace((stderr, "inflate:     stored block%s\n",
-                 s->last ? " (last)" : ""));
-          DUMPBITS(3)
-          t = k & 7;                    /* go to byte boundary */
-          DUMPBITS(t)
-          s->mode = LENS;               /* get length of stored block */
-          break;
-        case 1:                         /* fixed */
-          Trace((stderr, "inflate:     fixed codes block%s\n",
-                 s->last ? " (last)" : ""));
-          {
-            uInt bl, bd;
-            inflate_huft *tl, *td;
-
-            inflate_trees_fixed(&bl, &bd, &tl, &td);
-            s->sub.decode.codes = inflate_codes_new(bl, bd, tl, td, z);
-            if (s->sub.decode.codes == Z_NULL)
-            {
-              r = Z_MEM_ERROR;
-              LEAVE
-            }
-            s->sub.decode.tl = Z_NULL;  /* don't try to free these */
-            s->sub.decode.td = Z_NULL;
-          }
-          DUMPBITS(3)
-          s->mode = CODES;
-          break;
-        case 2:                         /* dynamic */
-          Trace((stderr, "inflate:     dynamic codes block%s\n",
-                 s->last ? " (last)" : ""));
-          DUMPBITS(3)
-          s->mode = TABLE;
-          break;
-        case 3:                         /* illegal */
-          DUMPBITS(3)
-          s->mode = BADB;
-          z->msg = "invalid block type";
-          r = Z_DATA_ERROR;
-          LEAVE
-      }
-      break;
-    case LENS:
-      NEEDBITS(32)
-      if (((~b) >> 16) != (b & 0xffff))
-      {
-        s->mode = BADB;
-        z->msg = "invalid stored block lengths";
-        r = Z_DATA_ERROR;
-        LEAVE
-      }
-      s->sub.left = (uInt)b & 0xffff;
-      b = k = 0;                      /* dump bits */
-      Tracev((stderr, "inflate:       stored length %u\n", s->sub.left));
-      s->mode = s->sub.left ? STORED : TYPE;
-      break;
-    case STORED:
-      if (n == 0)
-        LEAVE
-      NEEDOUT
-      t = s->sub.left;
-      if (t > n) t = n;
-      if (t > m) t = m;
-      zmemcpy(q, p, t);
-      p += t;  n -= t;
-      q += t;  m -= t;
-      if ((s->sub.left -= t) != 0)
-        break;
-      Tracev((stderr, "inflate:       stored end, %lu total out\n",
-              z->total_out + (q >= s->read ? q - s->read :
-              (s->end - s->read) + (q - s->window))));
-      s->mode = s->last ? DRY : TYPE;
-      break;
-    case TABLE:
-      NEEDBITS(14)
-      s->sub.trees.table = t = (uInt)b & 0x3fff;
-#ifndef PKZIP_BUG_WORKAROUND
-      if ((t & 0x1f) > 29 || ((t >> 5) & 0x1f) > 29)
-      {
-        s->mode = BADB;
-        z->msg = "too many length or distance symbols";
-        r = Z_DATA_ERROR;
-        LEAVE
-      }
-#endif
-      t = 258 + (t & 0x1f) + ((t >> 5) & 0x1f);
-      if (t < 19)
-        t = 19;
-      if ((s->sub.trees.blens = (uIntf*)ZALLOC(z, t, sizeof(uInt))) == Z_NULL)
-      {
-        r = Z_MEM_ERROR;
-        LEAVE
-      }
-      s->sub.trees.nblens = t;
-      DUMPBITS(14)
-      s->sub.trees.index = 0;
-      Tracev((stderr, "inflate:       table sizes ok\n"));
-      s->mode = BTREE;
-    case BTREE:
-      while (s->sub.trees.index < 4 + (s->sub.trees.table >> 10))
-      {
-        NEEDBITS(3)
-        s->sub.trees.blens[border[s->sub.trees.index++]] = (uInt)b & 7;
-        DUMPBITS(3)
-      }
-      while (s->sub.trees.index < 19)
-        s->sub.trees.blens[border[s->sub.trees.index++]] = 0;
-      s->sub.trees.bb = 7;
-      t = inflate_trees_bits(s->sub.trees.blens, &s->sub.trees.bb,
-                             &s->sub.trees.tb, z);
-      if (t != Z_OK)
-      {
-        r = t;
-        if (r == Z_DATA_ERROR)
-          s->mode = BADB;
-        LEAVE
-      }
-      s->sub.trees.index = 0;
-      Tracev((stderr, "inflate:       bits tree ok\n"));
-      s->mode = DTREE;
-    case DTREE:
-      while (t = s->sub.trees.table,
-             s->sub.trees.index < 258 + (t & 0x1f) + ((t >> 5) & 0x1f))
-      {
-        inflate_huft *h;
-        uInt i, j, c;
-
-        t = s->sub.trees.bb;
-        NEEDBITS(t)
-        h = s->sub.trees.tb + ((uInt)b & inflate_mask[t]);
-        t = h->word.what.Bits;
-        c = h->more.Base;
-        if (c < 16)
-        {
-          DUMPBITS(t)
-          s->sub.trees.blens[s->sub.trees.index++] = c;
-        }
-        else /* c == 16..18 */
-        {
-          i = c == 18 ? 7 : c - 14;
-          j = c == 18 ? 11 : 3;
-          NEEDBITS(t + i)
-          DUMPBITS(t)
-          j += (uInt)b & inflate_mask[i];
-          DUMPBITS(i)
-          i = s->sub.trees.index;
-          t = s->sub.trees.table;
-          if (i + j > 258 + (t & 0x1f) + ((t >> 5) & 0x1f) ||
-              (c == 16 && i < 1))
-          {
-            s->mode = BADB;
-            z->msg = "invalid bit length repeat";
-            r = Z_DATA_ERROR;
-            LEAVE
-          }
-          c = c == 16 ? s->sub.trees.blens[i - 1] : 0;
-          do {
-            s->sub.trees.blens[i++] = c;
-          } while (--j);
-          s->sub.trees.index = i;
-        }
-      }
-      inflate_trees_free(s->sub.trees.tb, z);
-      s->sub.trees.tb = Z_NULL;
-      {
-        uInt bl, bd;
-        inflate_huft *tl, *td;
-        inflate_codes_statef *c;
-
-        bl = 9;         /* must be <= 9 for lookahead assumptions */
-        bd = 6;         /* must be <= 9 for lookahead assumptions */
-        t = s->sub.trees.table;
-        t = inflate_trees_dynamic(257 + (t & 0x1f), 1 + ((t >> 5) & 0x1f),
-                                  s->sub.trees.blens, &bl, &bd, &tl, &td, z);
-        if (t != Z_OK)
-        {
-          if (t == (uInt)Z_DATA_ERROR)
-            s->mode = BADB;
-          r = t;
-          LEAVE
-        }
-        Tracev((stderr, "inflate:       trees ok\n"));
-        if ((c = inflate_codes_new(bl, bd, tl, td, z)) == Z_NULL)
-        {
-          inflate_trees_free(td, z);
-          inflate_trees_free(tl, z);
-          r = Z_MEM_ERROR;
-          LEAVE
-        }
-        ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt));
-        s->sub.decode.codes = c;
-        s->sub.decode.tl = tl;
-        s->sub.decode.td = td;
-      }
-      s->mode = CODES;
-    case CODES:
-      UPDATE
-      if ((r = inflate_codes(s, z, r)) != Z_STREAM_END)
-        return inflate_flush(s, z, r);
-      r = Z_OK;
-      inflate_codes_free(s->sub.decode.codes, z);
-      inflate_trees_free(s->sub.decode.td, z);
-      inflate_trees_free(s->sub.decode.tl, z);
-      LOAD
-      Tracev((stderr, "inflate:       codes end, %lu total out\n",
-              z->total_out + (q >= s->read ? q - s->read :
-              (s->end - s->read) + (q - s->window))));
-      if (!s->last)
-      {
-        s->mode = TYPE;
-        break;
-      }
-      if (k > 7)              /* return unused byte, if any */
-      {
-        Assert(k < 16, "inflate_codes grabbed too many bytes")
-        k -= 8;
-        n++;
-        p--;                    /* can always return one */
-      }
-      s->mode = DRY;
-    case DRY:
-      FLUSH
-      if (s->read != s->write)
-        LEAVE
-      s->mode = DONEB;
-    case DONEB:
-      r = Z_STREAM_END;
-      LEAVE
-    case BADB:
-      r = Z_DATA_ERROR;
-      LEAVE
-    default:
-      r = Z_STREAM_ERROR;
-      LEAVE
-  }
-}
-
-
-local int inflate_blocks_free(
-        inflate_blocks_statef *s,
-        z_stream *z,
-        uLongf *c
-)
-{
-  inflate_blocks_reset(s, z, c);
-  ZFREE(z, s->window, s->end - s->window);
-  ZFREE(z, s, sizeof(struct inflate_blocks_state));
-  Trace((stderr, "inflate:   blocks freed\n"));
-  return Z_OK;
-}
-
-/*
- * This subroutine adds the data at next_in/avail_in to the output history
- * without performing any output.  The output buffer must be "caught up";
- * i.e. no pending output (hence s->read equals s->write), and the state must
- * be BLOCKS (i.e. we should be willing to see the start of a series of
- * BLOCKS).  On exit, the output will also be caught up, and the checksum
- * will have been updated if need be.
- */
-local int inflate_addhistory(
-        inflate_blocks_statef *s,
-        z_stream *z
-)
-{
-    uLong b;              /* bit buffer */  /* NOT USED HERE */
-    uInt k;               /* bits in bit buffer */ /* NOT USED HERE */
-    uInt t;               /* temporary storage */
-    Bytef *p;             /* input data pointer */
-    uInt n;               /* bytes available there */
-    Bytef *q;             /* output window write pointer */
-    uInt m;               /* bytes to end of window or read pointer */
-
-    if (s->read != s->write)
-        return Z_STREAM_ERROR;
-    if (s->mode != TYPE)
-        return Z_DATA_ERROR;
-
-    /* we're ready to rock */
-    LOAD
-    /* while there is input ready, copy to output buffer, moving
-     * pointers as needed.
-     */
-    while (n) {
-        t = n;  /* how many to do */
-        /* is there room until end of buffer? */
-        if (t > m) t = m;
-        /* update check information */
-        if (s->checkfn != Z_NULL)
-            s->check = (*s->checkfn)(s->check, q, t);
-        zmemcpy(q, p, t);
-        q += t;
-        p += t;
-        n -= t;
-        z->total_out += t;
-        s->read = q;    /* drag read pointer forward */
-/*      WRAP  */        /* expand WRAP macro by hand to handle s->read */
-        if (q == s->end) {
-            s->read = q = s->window;
-            m = WAVAIL;
-        }
-    }
-    UPDATE
-    return Z_OK;
-}
-
-
-/*
- * At the end of a Deflate-compressed PPP packet, we expect to have seen
- * a `stored' block type value but not the (zero) length bytes.
- */
-local int inflate_packet_flush(
-        inflate_blocks_statef *s
-)
-{
-    if (s->mode != LENS)
-        return Z_DATA_ERROR;
-    s->mode = TYPE;
-    return Z_OK;
-}
-
-
-/*+++++*/
-/* inftrees.c -- generate Huffman trees for efficient decoding
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* simplify the use of the inflate_huft type with some defines */
-#define base more.Base
-#define next more.Next
-#define exop word.what.Exop
-#define bits word.what.Bits
-
-
-local int huft_build OF((
-    uIntf *,            /* code lengths in bits */
-    uInt,               /* number of codes */
-    uInt,               /* number of "simple" codes */
-    uIntf *,            /* list of base values for non-simple codes */
-    uIntf *,            /* list of extra bits for non-simple codes */
-    inflate_huft * FAR*,/* result: starting table */
-    uIntf *,            /* maximum lookup bits (returns actual) */
-    z_stream *));       /* for zalloc function */
-
-local voidpf falloc OF((
-    voidpf,             /* opaque pointer (not used) */
-    uInt,               /* number of items */
-    uInt));             /* size of item */
-
-local void ffree OF((
-    voidpf q,           /* opaque pointer (not used) */
-    voidpf p,           /* what to free (not used) */
-    uInt n));           /* number of bytes (not used) */
-
-/* Tables for deflate from PKZIP's appnote.txt. */
-local uInt cplens[] = { /* Copy lengths for literal codes 257..285 */
-        3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
-        35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
-        /* actually lengths - 2; also see note #13 above about 258 */
-local uInt cplext[] = { /* Extra bits for literal codes 257..285 */
-        0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2,
-        3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 192, 192}; /* 192==invalid */
-local uInt cpdist[] = { /* Copy offsets for distance codes 0..29 */
-        1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
-        257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
-        8193, 12289, 16385, 24577};
-local uInt cpdext[] = { /* Extra bits for distance codes */
-        0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6,
-        7, 7, 8, 8, 9, 9, 10, 10, 11, 11,
-        12, 12, 13, 13};
-
-/*
-   Huffman code decoding is performed using a multi-level table lookup.
-   The fastest way to decode is to simply build a lookup table whose
-   size is determined by the longest code.  However, the time it takes
-   to build this table can also be a factor if the data being decoded
-   is not very long.  The most common codes are necessarily the
-   shortest codes, so those codes dominate the decoding time, and hence
-   the speed.  The idea is you can have a shorter table that decodes the
-   shorter, more probable codes, and then point to subsidiary tables for
-   the longer codes.  The time it costs to decode the longer codes is
-   then traded against the time it takes to make longer tables.
-
-   This results of this trade are in the variables lbits and dbits
-   below.  lbits is the number of bits the first level table for literal/
-   length codes can decode in one step, and dbits is the same thing for
-   the distance codes.  Subsequent tables are also less than or equal to
-   those sizes.  These values may be adjusted either when all of the
-   codes are shorter than that, in which case the longest code length in
-   bits is used, or when the shortest code is *longer* than the requested
-   table size, in which case the length of the shortest code in bits is
-   used.
-
-   There are two different values for the two tables, since they code a
-   different number of possibilities each.  The literal/length table
-   codes 286 possible values, or in a flat code, a little over eight
-   bits.  The distance table codes 30 possible values, or a little less
-   than five bits, flat.  The optimum values for speed end up being
-   about one bit more than those, so lbits is 8+1 and dbits is 5+1.
-   The optimum values may differ though from machine to machine, and
-   possibly even between compilers.  Your mileage may vary.
- */
-
-
-/* If BMAX needs to be larger than 16, then h and x[] should be uLong. */
-#define BMAX 15         /* maximum bit length of any code */
-#define N_MAX 288       /* maximum number of codes in any set */
-
-#ifdef DEBUG_ZLIB
-  uInt inflate_hufts;
-#endif
-
-local int huft_build(
-        uIntf *b,               /* code lengths in bits (all assumed <= BMAX) */
-        uInt n,                 /* number of codes (assumed <= N_MAX) */
-        uInt s,                 /* number of simple-valued codes (0..s-1) */
-        uIntf *d,               /* list of base values for non-simple codes */
-        uIntf *e,               /* list of extra bits for non-simple codes */
-        inflate_huft * FAR *t,  /* result: starting table */
-        uIntf *m,               /* maximum lookup bits, returns actual */
-        z_stream *zs            /* for zalloc function */
-)
-/* Given a list of code lengths and a maximum table size, make a set of
-   tables to decode that set of codes.  Return Z_OK on success, Z_BUF_ERROR
-   if the given code set is incomplete (the tables are still built in this
-   case), Z_DATA_ERROR if the input is invalid (all zero length codes or an
-   over-subscribed set of lengths), or Z_MEM_ERROR if not enough memory. */
-{
-
-  uInt a;                       /* counter for codes of length k */
-  uInt c[BMAX+1];               /* bit length count table */
-  uInt f;                       /* i repeats in table every f entries */
-  int g;                        /* maximum code length */
-  int h;                        /* table level */
-  register uInt i;              /* counter, current code */
-  register uInt j;              /* counter */
-  register int k;               /* number of bits in current code */
-  int l;                        /* bits per table (returned in m) */
-  register uIntf *p;            /* pointer into c[], b[], or v[] */
-  inflate_huft *q;              /* points to current table */
-  struct inflate_huft_s r;      /* table entry for structure assignment */
-  inflate_huft *u[BMAX];        /* table stack */
-  uInt v[N_MAX];                /* values in order of bit length */
-  register int w;               /* bits before this table == (l * h) */
-  uInt x[BMAX+1];               /* bit offsets, then code stack */
-  uIntf *xp;                    /* pointer into x */
-  int y;                        /* number of dummy codes added */
-  uInt z;                       /* number of entries in current table */
-
-
-  /* Generate counts for each bit length */
-  p = c;
-#define C0 *p++ = 0;
-#define C2 C0 C0 C0 C0
-#define C4 C2 C2 C2 C2
-  C4                            /* clear c[]--assume BMAX+1 is 16 */
-  p = b;  i = n;
-  do {
-    c[*p++]++;                  /* assume all entries <= BMAX */
-  } while (--i);
-  if (c[0] == n)                /* null input--all zero length codes */
-  {
-    *t = (inflate_huft *)Z_NULL;
-    *m = 0;
-    return Z_DATA_ERROR;
-  }
-
-
-  /* Find minimum and maximum length, bound *m by those */
-  l = *m;
-  for (j = 1; j <= BMAX; j++)
-    if (c[j])
-      break;
-  k = j;                        /* minimum code length */
-  if ((uInt)l < j)
-    l = j;
-  for (i = BMAX; i; i--)
-    if (c[i])
-      break;
-  g = i;                        /* maximum code length */
-  if ((uInt)l > i)
-    l = i;
-  *m = l;
-
-
-  /* Adjust last length count to fill out codes, if needed */
-  for (y = 1 << j; j < i; j++, y <<= 1)
-    if ((y -= c[j]) < 0)
-      return Z_DATA_ERROR;
-  if ((y -= c[i]) < 0)
-    return Z_DATA_ERROR;
-  c[i] += y;
-
-
-  /* Generate starting offsets into the value table for each length */
-  x[1] = j = 0;
-  p = c + 1;  xp = x + 2;
-  while (--i) {                 /* note that i == g from above */
-    *xp++ = (j += *p++);
-  }
-
-
-  /* Make a table of values in order of bit lengths */
-  p = b;  i = 0;
-  do {
-    if ((j = *p++) != 0)
-      v[x[j]++] = i;
-  } while (++i < n);
-  n = x[g];                     /* set n to length of v */
-
-
-  /* Generate the Huffman codes and for each, make the table entries */
-  x[0] = i = 0;                 /* first Huffman code is zero */
-  p = v;                        /* grab values in bit order */
-  h = -1;                       /* no tables yet--level -1 */
-  w = -l;                       /* bits decoded == (l * h) */
-  u[0] = (inflate_huft *)Z_NULL;        /* just to keep compilers happy */
-  q = (inflate_huft *)Z_NULL;   /* ditto */
-  z = 0;                        /* ditto */
-
-  /* go through the bit lengths (k already is bits in shortest code) */
-  for (; k <= g; k++)
-  {
-    a = c[k];
-    while (a--)
-    {
-      /* here i is the Huffman code of length k bits for value *p */
-      /* make tables up to required level */
-      while (k > w + l)
-      {
-        h++;
-        w += l;                 /* previous table always l bits */
-
-        /* compute minimum size table less than or equal to l bits */
-        z = (z = g - w) > (uInt)l ? l : z;      /* table size upper limit */
-        if ((f = 1 << (j = k - w)) > a + 1)     /* try a k-w bit table */
-        {                       /* too few codes for k-w bit table */
-          f -= a + 1;           /* deduct codes from patterns left */
-          xp = c + k;
-          if (j < z)
-            while (++j < z)     /* try smaller tables up to z bits */
-            {
-              if ((f <<= 1) <= *++xp)
-                break;          /* enough codes to use up j bits */
-              f -= *xp;         /* else deduct codes from patterns */
-            }
-        }
-        z = 1 << j;             /* table entries for j-bit table */
-
-        /* allocate and link in new table */
-        if ((q = (inflate_huft *)ZALLOC
-             (zs,z + 1,sizeof(inflate_huft))) == Z_NULL)
-        {
-          if (h)
-            inflate_trees_free(u[0], zs);
-          return Z_MEM_ERROR;   /* not enough memory */
-        }
-        q->word.Nalloc = z + 1;
-#ifdef DEBUG_ZLIB
-        inflate_hufts += z + 1;
-#endif
-        *t = q + 1;             /* link to list for huft_free() */
-        *(t = &(q->next)) = Z_NULL;
-        u[h] = ++q;             /* table starts after link */
-
-        /* connect to last table, if there is one */
-        if (h)
-        {
-          x[h] = i;             /* save pattern for backing up */
-          r.bits = (Byte)l;     /* bits to dump before this table */
-          r.exop = (Byte)j;     /* bits in this table */
-          r.next = q;           /* pointer to this table */
-          j = i >> (w - l);     /* (get around Turbo C bug) */
-          u[h-1][j] = r;        /* connect to last table */
-        }
-      }
-
-      /* set up table entry in r */
-      r.bits = (Byte)(k - w);
-      if (p >= v + n)
-        r.exop = 128 + 64;      /* out of values--invalid code */
-      else if (*p < s)
-      {
-        r.exop = (Byte)(*p < 256 ? 0 : 32 + 64);     /* 256 is end-of-block */
-        r.base = *p++;          /* simple code is just the value */
-      }
-      else
-      {
-        r.exop = (Byte)e[*p - s] + 16 + 64; /* non-simple--look up in lists */
-        r.base = d[*p++ - s];
-      }
-
-      /* fill code-like entries with r */
-      f = 1 << (k - w);
-      for (j = i >> w; j < z; j += f)
-        q[j] = r;
-
-      /* backwards increment the k-bit code i */
-      for (j = 1 << (k - 1); i & j; j >>= 1)
-        i ^= j;
-      i ^= j;
-
-      /* backup over finished tables */
-      while ((i & ((1 << w) - 1)) != x[h])
-      {
-        h--;                    /* don't need to update q */
-        w -= l;
-      }
-    }
-  }
-
-
-  /* Return Z_BUF_ERROR if we were given an incomplete table */
-  return y != 0 && g != 1 ? Z_BUF_ERROR : Z_OK;
-}
-
-
-local int inflate_trees_bits(
-        uIntf *c,               /* 19 code lengths */
-        uIntf *bb,              /* bits tree desired/actual depth */
-        inflate_huft * FAR *tb, /* bits tree result */
-        z_stream *z             /* for zfree function */
-)
-{
-  int r;
-
-  r = huft_build(c, 19, 19, (uIntf*)Z_NULL, (uIntf*)Z_NULL, tb, bb, z);
-  if (r == Z_DATA_ERROR)
-    z->msg = "oversubscribed dynamic bit lengths tree";
-  else if (r == Z_BUF_ERROR)
-  {
-    inflate_trees_free(*tb, z);
-    z->msg = "incomplete dynamic bit lengths tree";
-    r = Z_DATA_ERROR;
-  }
-  return r;
-}
-
-
-local int inflate_trees_dynamic(
-        uInt nl,                /* number of literal/length codes */
-        uInt nd,                /* number of distance codes */
-        uIntf *c,               /* that many (total) code lengths */
-        uIntf *bl,              /* literal desired/actual bit depth */
-        uIntf *bd,              /* distance desired/actual bit depth */
-        inflate_huft * FAR *tl, /* literal/length tree result */
-        inflate_huft * FAR *td, /* distance tree result */
-        z_stream *z             /* for zfree function */
-)
-{
-  int r;
-
-  /* build literal/length tree */
-  if ((r = huft_build(c, nl, 257, cplens, cplext, tl, bl, z)) != Z_OK)
-  {
-    if (r == Z_DATA_ERROR)
-      z->msg = "oversubscribed literal/length tree";
-    else if (r == Z_BUF_ERROR)
-    {
-      inflate_trees_free(*tl, z);
-      z->msg = "incomplete literal/length tree";
-      r = Z_DATA_ERROR;
-    }
-    return r;
-  }
-
-  /* build distance tree */
-  if ((r = huft_build(c + nl, nd, 0, cpdist, cpdext, td, bd, z)) != Z_OK)
-  {
-    if (r == Z_DATA_ERROR)
-      z->msg = "oversubscribed literal/length tree";
-    else if (r == Z_BUF_ERROR) {
-#ifdef PKZIP_BUG_WORKAROUND
-      r = Z_OK;
-    }
-#else
-      inflate_trees_free(*td, z);
-      z->msg = "incomplete literal/length tree";
-      r = Z_DATA_ERROR;
-    }
-    inflate_trees_free(*tl, z);
-    return r;
-#endif
-  }
-
-  /* done */
-  return Z_OK;
-}
-
-
-/* build fixed tables only once--keep them here */
-local int fixed_lock = 0;
-local int fixed_built = 0;
-#define FIXEDH 530      /* number of hufts used by fixed tables */
-local uInt fixed_left = FIXEDH;
-local inflate_huft fixed_mem[FIXEDH];
-local uInt fixed_bl;
-local uInt fixed_bd;
-local inflate_huft *fixed_tl;
-local inflate_huft *fixed_td;
-
-
-local voidpf falloc(
-        voidpf q,       /* opaque pointer (not used) */
-        uInt n,         /* number of items */
-        uInt s          /* size of item */
-)
-{
-  Assert(s == sizeof(inflate_huft) && n <= fixed_left,
-         "inflate_trees falloc overflow");
-  if (q) s++; /* to make some compilers happy */
-  fixed_left -= n;
-  return (voidpf)(fixed_mem + fixed_left);
-}
-
-
-local void ffree(
-        voidpf q,
-        voidpf p,
-        uInt n
-)
-{
-  Assert(0, "inflate_trees ffree called!");
-  if (q) q = p; /* to make some compilers happy */
-}
-
-
-local int inflate_trees_fixed(
-        uIntf *bl,               /* literal desired/actual bit depth */
-        uIntf *bd,               /* distance desired/actual bit depth */
-        inflate_huft * FAR *tl,  /* literal/length tree result */
-        inflate_huft * FAR *td   /* distance tree result */
-)
-{
-  /* build fixed tables if not built already--lock out other instances */
-  while (++fixed_lock > 1)
-    fixed_lock--;
-  if (!fixed_built)
-  {
-    int k;              /* temporary variable */
-    unsigned c[288];    /* length list for huft_build */
-    z_stream z;         /* for falloc function */
-
-    /* set up fake z_stream for memory routines */
-    z.zalloc = falloc;
-    z.zfree = ffree;
-    z.opaque = Z_NULL;
-
-    /* literal table */
-    for (k = 0; k < 144; k++)
-      c[k] = 8;
-    for (; k < 256; k++)
-      c[k] = 9;
-    for (; k < 280; k++)
-      c[k] = 7;
-    for (; k < 288; k++)
-      c[k] = 8;
-    fixed_bl = 7;
-    huft_build(c, 288, 257, cplens, cplext, &fixed_tl, &fixed_bl, &z);
-
-    /* distance table */
-    for (k = 0; k < 30; k++)
-      c[k] = 5;
-    fixed_bd = 5;
-    huft_build(c, 30, 0, cpdist, cpdext, &fixed_td, &fixed_bd, &z);
-
-    /* done */
-    fixed_built = 1;
-  }
-  fixed_lock--;
-  *bl = fixed_bl;
-  *bd = fixed_bd;
-  *tl = fixed_tl;
-  *td = fixed_td;
-  return Z_OK;
-}
-
-
-local int inflate_trees_free(
-        inflate_huft *t,        /* table to free */
-        z_stream *z             /* for zfree function */
-)
-/* Free the malloc'ed tables built by huft_build(), which makes a linked
-   list of the tables it made, with the links in a dummy first entry of
-   each table. */
-{
-  register inflate_huft *p, *q;
-
-  /* Go through linked list, freeing from the malloced (t[-1]) address. */
-  p = t;
-  while (p != Z_NULL)
-  {
-    q = (--p)->next;
-    ZFREE(z, p, p->word.Nalloc * sizeof(inflate_huft));
-    p = q;
-  } 
-  return Z_OK;
-}
-
-/*+++++*/
-/* infcodes.c -- process literals and length/distance pairs
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* simplify the use of the inflate_huft type with some defines */
-#define base more.Base
-#define next more.Next
-#define exop word.what.Exop
-#define bits word.what.Bits
-
-/* inflate codes private state */
-struct inflate_codes_state {
-
-  /* mode */
-  enum {        /* waiting for "i:"=input, "o:"=output, "x:"=nothing */
-      START,    /* x: set up for LEN */
-      LEN,      /* i: get length/literal/eob next */
-      LENEXT,   /* i: getting length extra (have base) */
-      DIST,     /* i: get distance next */
-      DISTEXT,  /* i: getting distance extra */
-      COPY,     /* o: copying bytes in window, waiting for space */
-      LIT,      /* o: got literal, waiting for output space */
-      WASH,     /* o: got eob, possibly still output waiting */
-      END,      /* x: got eob and all data flushed */
-      BADCODE}  /* x: got error */
-    mode;               /* current inflate_codes mode */
-
-  /* mode dependent information */
-  uInt len;
-  union {
-    struct {
-      inflate_huft *tree;       /* pointer into tree */
-      uInt need;                /* bits needed */
-    } code;             /* if LEN or DIST, where in tree */
-    uInt lit;           /* if LIT, literal */
-    struct {
-      uInt get;                 /* bits to get for extra */
-      uInt dist;                /* distance back to copy from */
-    } copy;             /* if EXT or COPY, where and how much */
-  } sub;                /* submode */
-
-  /* mode independent information */
-  Byte lbits;           /* ltree bits decoded per branch */
-  Byte dbits;           /* dtree bits decoder per branch */
-  inflate_huft *ltree;          /* literal/length/eob tree */
-  inflate_huft *dtree;          /* distance tree */
-
-};
-
-
-local inflate_codes_statef *inflate_codes_new(
-        uInt bl,
-        uInt bd,
-        inflate_huft *tl,
-        inflate_huft *td,
-        z_stream *z
-)
-{
-  inflate_codes_statef *c;
-
-  if ((c = (inflate_codes_statef *)
-       ZALLOC(z,1,sizeof(struct inflate_codes_state))) != Z_NULL)
-  {
-    c->mode = START;
-    c->lbits = (Byte)bl;
-    c->dbits = (Byte)bd;
-    c->ltree = tl;
-    c->dtree = td;
-    Tracev((stderr, "inflate:       codes new\n"));
-  }
-  return c;
-}
-
-
-local int inflate_codes(
-        inflate_blocks_statef *s,
-        z_stream *z,
-        int r
-)
-{
-  uInt j;               /* temporary storage */
-  inflate_huft *t;      /* temporary pointer */
-  uInt e;               /* extra bits or operation */
-  uLong b;              /* bit buffer */
-  uInt k;               /* bits in bit buffer */
-  Bytef *p;             /* input data pointer */
-  uInt n;               /* bytes available there */
-  Bytef *q;             /* output window write pointer */
-  uInt m;               /* bytes to end of window or read pointer */
-  Bytef *f;             /* pointer to copy strings from */
-  inflate_codes_statef *c = s->sub.decode.codes;  /* codes state */
-
-  /* copy input/output information to locals (UPDATE macro restores) */
-  LOAD
-
-  /* process input and output based on current state */
-  while (1) switch (c->mode)
-  {             /* waiting for "i:"=input, "o:"=output, "x:"=nothing */
-    case START:         /* x: set up for LEN */
-#ifndef SLOW
-      if (m >= 258 && n >= 10)
-      {
-        UPDATE
-        r = inflate_fast(c->lbits, c->dbits, c->ltree, c->dtree, s, z);
-        LOAD
-        if (r != Z_OK)
-        {
-          c->mode = r == Z_STREAM_END ? WASH : BADCODE;
-          break;
-        }
-      }
-#endif /* !SLOW */
-      c->sub.code.need = c->lbits;
-      c->sub.code.tree = c->ltree;
-      c->mode = LEN;
-    case LEN:           /* i: get length/literal/eob next */
-      j = c->sub.code.need;
-      NEEDBITS(j)
-      t = c->sub.code.tree + ((uInt)b & inflate_mask[j]);
-      DUMPBITS(t->bits)
-      e = (uInt)(t->exop);
-      if (e == 0)               /* literal */
-      {
-        c->sub.lit = t->base;
-        Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
-                 "inflate:         literal '%c'\n" :
-                 "inflate:         literal 0x%02x\n", t->base));
-        c->mode = LIT;
-        break;
-      }
-      if (e & 16)               /* length */
-      {
-        c->sub.copy.get = e & 15;
-        c->len = t->base;
-        c->mode = LENEXT;
-        break;
-      }
-      if ((e & 64) == 0)        /* next table */
-      {
-        c->sub.code.need = e;
-        c->sub.code.tree = t->next;
-        break;
-      }
-      if (e & 32)               /* end of block */
-      {
-        Tracevv((stderr, "inflate:         end of block\n"));
-        c->mode = WASH;
-        break;
-      }
-      c->mode = BADCODE;        /* invalid code */
-      z->msg = "invalid literal/length code";
-      r = Z_DATA_ERROR;
-      LEAVE
-    case LENEXT:        /* i: getting length extra (have base) */
-      j = c->sub.copy.get;
-      NEEDBITS(j)
-      c->len += (uInt)b & inflate_mask[j];
-      DUMPBITS(j)
-      c->sub.code.need = c->dbits;
-      c->sub.code.tree = c->dtree;
-      Tracevv((stderr, "inflate:         length %u\n", c->len));
-      c->mode = DIST;
-    case DIST:          /* i: get distance next */
-      j = c->sub.code.need;
-      NEEDBITS(j)
-      t = c->sub.code.tree + ((uInt)b & inflate_mask[j]);
-      DUMPBITS(t->bits)
-      e = (uInt)(t->exop);
-      if (e & 16)               /* distance */
-      {
-        c->sub.copy.get = e & 15;
-        c->sub.copy.dist = t->base;
-        c->mode = DISTEXT;
-        break;
-      }
-      if ((e & 64) == 0)        /* next table */
-      {
-        c->sub.code.need = e;
-        c->sub.code.tree = t->next;
-        break;
-      }
-      c->mode = BADCODE;        /* invalid code */
-      z->msg = "invalid distance code";
-      r = Z_DATA_ERROR;
-      LEAVE
-    case DISTEXT:       /* i: getting distance extra */
-      j = c->sub.copy.get;
-      NEEDBITS(j)
-      c->sub.copy.dist += (uInt)b & inflate_mask[j];
-      DUMPBITS(j)
-      Tracevv((stderr, "inflate:         distance %u\n", c->sub.copy.dist));
-      c->mode = COPY;
-    case COPY:          /* o: copying bytes in window, waiting for space */
-#ifndef __TURBOC__ /* Turbo C bug for following expression */
-      f = (uInt)(q - s->window) < c->sub.copy.dist ?
-          s->end - (c->sub.copy.dist - (q - s->window)) :
-          q - c->sub.copy.dist;
-#else
-      f = q - c->sub.copy.dist;
-      if ((uInt)(q - s->window) < c->sub.copy.dist)
-        f = s->end - (c->sub.copy.dist - (q - s->window));
-#endif
-      while (c->len)
-      {
-        NEEDOUT
-        OUTBYTE(*f++)
-        if (f == s->end)
-          f = s->window;
-        c->len--;
-      }
-      c->mode = START;
-      break;
-    case LIT:           /* o: got literal, waiting for output space */
-      NEEDOUT
-      OUTBYTE(c->sub.lit)
-      c->mode = START;
-      break;
-    case WASH:          /* o: got eob, possibly more output */
-      FLUSH
-      if (s->read != s->write)
-        LEAVE
-      c->mode = END;
-    case END:
-      r = Z_STREAM_END;
-      LEAVE
-    case BADCODE:       /* x: got error */
-      r = Z_DATA_ERROR;
-      LEAVE
-    default:
-      r = Z_STREAM_ERROR;
-      LEAVE
-  }
-}
-
-
-local void inflate_codes_free(
-        inflate_codes_statef *c,
-        z_stream *z
-)
-{
-  ZFREE(z, c, sizeof(struct inflate_codes_state));
-  Tracev((stderr, "inflate:       codes free\n"));
-}
-
-/*+++++*/
-/* inflate_util.c -- data and routines common to blocks and codes
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* copy as much as possible from the sliding window to the output area */
-local int inflate_flush(
-        inflate_blocks_statef *s,
-        z_stream *z,
-        int r
-)
-{
-  uInt n;
-  Bytef *p, *q;
-
-  /* local copies of source and destination pointers */
-  p = z->next_out;
-  q = s->read;
-
-  /* compute number of bytes to copy as far as end of window */
-  n = (uInt)((q <= s->write ? s->write : s->end) - q);
-  if (n > z->avail_out) n = z->avail_out;
-  if (n && r == Z_BUF_ERROR) r = Z_OK;
-
-  /* update counters */
-  z->avail_out -= n;
-  z->total_out += n;
-
-  /* update check information */
-  if (s->checkfn != Z_NULL)
-    s->check = (*s->checkfn)(s->check, q, n);
-
-  /* copy as far as end of window */
-  zmemcpy(p, q, n);
-  p += n;
-  q += n;
-
-  /* see if more to copy at beginning of window */
-  if (q == s->end)
-  {
-    /* wrap pointers */
-    q = s->window;
-    if (s->write == s->end)
-      s->write = s->window;
-
-    /* compute bytes to copy */
-    n = (uInt)(s->write - q);
-    if (n > z->avail_out) n = z->avail_out;
-    if (n && r == Z_BUF_ERROR) r = Z_OK;
-
-    /* update counters */
-    z->avail_out -= n;
-    z->total_out += n;
-
-    /* update check information */
-    if (s->checkfn != Z_NULL)
-      s->check = (*s->checkfn)(s->check, q, n);
-
-    /* copy */
-    zmemcpy(p, q, n);
-    p += n;
-    q += n;
-  }
-
-  /* update pointers */
-  z->next_out = p;
-  s->read = q;
-
-  /* done */
-  return r;
-}
-
-
-/*+++++*/
-/* inffast.c -- process literals and length/distance pairs fast
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* simplify the use of the inflate_huft type with some defines */
-#define base more.Base
-#define next more.Next
-#define exop word.what.Exop
-#define bits word.what.Bits
-
-/* macros for bit input with no checking and for returning unused bytes */
-#define GRABBITS(j) {while(k<(j)){b|=((uLong)NEXTBYTE)<<k;k+=8;}}
-#define UNGRAB {n+=(c=k>>3);p-=c;k&=7;}
-
-/* Called with number of bytes left to write in window at least 258
-   (the maximum string length) and number of input bytes available
-   at least ten.  The ten bytes are six bytes for the longest length/
-   distance pair plus four bytes for overloading the bit buffer. */
-
-local int inflate_fast(
-        uInt bl,
-        uInt bd,
-        inflate_huft *tl,
-        inflate_huft *td,
-        inflate_blocks_statef *s,
-        z_stream *z
-)
-{
-  inflate_huft *t;      /* temporary pointer */
-  uInt e;               /* extra bits or operation */
-  uLong b;              /* bit buffer */
-  uInt k;               /* bits in bit buffer */
-  Bytef *p;             /* input data pointer */
-  uInt n;               /* bytes available there */
-  Bytef *q;             /* output window write pointer */
-  uInt m;               /* bytes to end of window or read pointer */
-  uInt ml;              /* mask for literal/length tree */
-  uInt md;              /* mask for distance tree */
-  uInt c;               /* bytes to copy */
-  uInt d;               /* distance back to copy from */
-  Bytef *r;             /* copy source pointer */
-
-  /* load input, output, bit values */
-  LOAD
-
-  /* initialize masks */
-  ml = inflate_mask[bl];
-  md = inflate_mask[bd];
-
-  /* do until not enough input or output space for fast loop */
-  do {                          /* assume called with m >= 258 && n >= 10 */
-    /* get literal/length code */
-    GRABBITS(20)                /* max bits for literal/length code */
-    if ((e = (t = tl + ((uInt)b & ml))->exop) == 0)
-    {
-      DUMPBITS(t->bits)
-      Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
-                "inflate:         * literal '%c'\n" :
-                "inflate:         * literal 0x%02x\n", t->base));
-      *q++ = (Byte)t->base;
-      m--;
-      continue;
-    }
-    do {
-      DUMPBITS(t->bits)
-      if (e & 16)
-      {
-        /* get extra bits for length */
-        e &= 15;
-        c = t->base + ((uInt)b & inflate_mask[e]);
-        DUMPBITS(e)
-        Tracevv((stderr, "inflate:         * length %u\n", c));
-
-        /* decode distance base of block to copy */
-        GRABBITS(15);           /* max bits for distance code */
-        e = (t = td + ((uInt)b & md))->exop;
-        do {
-          DUMPBITS(t->bits)
-          if (e & 16)
-          {
-            /* get extra bits to add to distance base */
-            e &= 15;
-            GRABBITS(e)         /* get extra bits (up to 13) */
-            d = t->base + ((uInt)b & inflate_mask[e]);
-            DUMPBITS(e)
-            Tracevv((stderr, "inflate:         * distance %u\n", d));
-
-            /* do the copy */
-            m -= c;
-            if ((uInt)(q - s->window) >= d)     /* offset before dest */
-            {                                   /*  just copy */
-              r = q - d;
-              *q++ = *r++;  c--;        /* minimum count is three, */
-              *q++ = *r++;  c--;        /*  so unroll loop a little */
-            }
-            else                        /* else offset after destination */
-            {
-              e = d - (q - s->window);  /* bytes from offset to end */
-              r = s->end - e;           /* pointer to offset */
-              if (c > e)                /* if source crosses, */
-              {
-                c -= e;                 /* copy to end of window */
-                do {
-                  *q++ = *r++;
-                } while (--e);
-                r = s->window;          /* copy rest from start of window */
-              }
-            }
-            do {                        /* copy all or what's left */
-              *q++ = *r++;
-            } while (--c);
-            break;
-          }
-          else if ((e & 64) == 0)
-            e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop;
-          else
-          {
-            z->msg = "invalid distance code";
-            UNGRAB
-            UPDATE
-            return Z_DATA_ERROR;
-          }
-        } while (1);
-        break;
-      }
-      if ((e & 64) == 0)
-      {
-        if ((e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop) == 0)
-        {
-          DUMPBITS(t->bits)
-          Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
-                    "inflate:         * literal '%c'\n" :
-                    "inflate:         * literal 0x%02x\n", t->base));
-          *q++ = (Byte)t->base;
-          m--;
-          break;
-        }
-      }
-      else if (e & 32)
-      {
-        Tracevv((stderr, "inflate:         * end of block\n"));
-        UNGRAB
-        UPDATE
-        return Z_STREAM_END;
-      }
-      else
-      {
-        z->msg = "invalid literal/length code";
-        UNGRAB
-        UPDATE
-        return Z_DATA_ERROR;
-      }
-    } while (1);
-  } while (m >= 258 && n >= 10);
-
-  /* not enough input or output--restore pointers and return */
-  UNGRAB
-  UPDATE
-  return Z_OK;
-}
-
-
-/*+++++*/
-/* zutil.c -- target dependent utility functions for the compression library
- * Copyright (C) 1995 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* From: zutil.c,v 1.8 1995/05/03 17:27:12 jloup Exp */
-
-char *zlib_version = ZLIB_VERSION;
-
-char *z_errmsg[] = {
-"stream end",          /* Z_STREAM_END    1 */
-"",                    /* Z_OK            0 */
-"file error",          /* Z_ERRNO        (-1) */
-"stream error",        /* Z_STREAM_ERROR (-2) */
-"data error",          /* Z_DATA_ERROR   (-3) */
-"insufficient memory", /* Z_MEM_ERROR    (-4) */
-"buffer error",        /* Z_BUF_ERROR    (-5) */
-""};
-
-
-/*+++++*/
-/* adler32.c -- compute the Adler-32 checksum of a data stream
- * Copyright (C) 1995 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* From: adler32.c,v 1.6 1995/05/03 17:27:08 jloup Exp */
-
-#define BASE 65521L /* largest prime smaller than 65536 */
-#define NMAX 5552
-/* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
-
-#define DO1(buf)  {s1 += *buf++; s2 += s1;}
-#define DO2(buf)  DO1(buf); DO1(buf);
-#define DO4(buf)  DO2(buf); DO2(buf);
-#define DO8(buf)  DO4(buf); DO4(buf);
-#define DO16(buf) DO8(buf); DO8(buf);
-
-/* ========================================================================= */
-uLong adler32(
-        uLong adler,
-        Bytef *buf,
-        uInt len
-)
-{
-    unsigned long s1 = adler & 0xffff;
-    unsigned long s2 = (adler >> 16) & 0xffff;
-    int k;
-
-    if (buf == Z_NULL) return 1L;
-
-    while (len > 0) {
-        k = len < NMAX ? len : NMAX;
-        len -= k;
-        while (k >= 16) {
-            DO16(buf);
-            k -= 16;
-        }
-        if (k != 0) do {
-            DO1(buf);
-        } while (--k);
-        s1 %= BASE;
-        s2 %= BASE;
-    }
-    return (s2 << 16) | s1;
-}
diff --git a/arch/ppc64/boot/zlib.h b/arch/ppc64/boot/zlib.h
deleted file mode 100644
index f0b996c6864f..000000000000
--- a/arch/ppc64/boot/zlib.h
+++ /dev/null
@@ -1,432 +0,0 @@
-/*              */
-
-/*
- * This file is derived from zlib.h and zconf.h from the zlib-0.95
- * distribution by Jean-loup Gailly and Mark Adler, with some additions
- * by Paul Mackerras to aid in implementing Deflate compression and
- * decompression for PPP packets.
- */
-
-/*
- *  ==FILEVERSION 960122==
- *
- * This marker is used by the Linux installation script to determine
- * whether an up-to-date version of this file is already installed.
- */
-
-/* zlib.h -- interface of the 'zlib' general purpose compression library
-  version 0.95, Aug 16th, 1995.
-
-  Copyright (C) 1995 Jean-loup Gailly and Mark Adler
-
-  This software is provided 'as-is', without any express or implied
-  warranty.  In no event will the authors be held liable for any damages
-  arising from the use of this software.
-
-  Permission is granted to anyone to use this software for any purpose,
-  including commercial applications, and to alter it and redistribute it
-  freely, subject to the following restrictions:
-
-  1. The origin of this software must not be misrepresented; you must not
-     claim that you wrote the original software. If you use this software
-     in a product, an acknowledgment in the product documentation would be
-     appreciated but is not required.
-  2. Altered source versions must be plainly marked as such, and must not be
-     misrepresented as being the original software.
-  3. This notice may not be removed or altered from any source distribution.
-
-  Jean-loup Gailly        Mark Adler
-  gzip@prep.ai.mit.edu    madler@alumni.caltech.edu
- */
-
-#ifndef _ZLIB_H
-#define _ZLIB_H
-
-/* #include "zconf.h" */        /* included directly here */
-
-/* zconf.h -- configuration of the zlib compression library
- * Copyright (C) 1995 Jean-loup Gailly.
- * For conditions of distribution and use, see copyright notice in zlib.h 
- */
-
-/* From: zconf.h,v 1.12 1995/05/03 17:27:12 jloup Exp */
-
-/*
-     The library does not install any signal handler. It is recommended to
-  add at least a handler for SIGSEGV when decompressing; the library checks
-  the consistency of the input data whenever possible but may go nuts
-  for some forms of corrupted input.
- */
-
-/*
- * Compile with -DMAXSEG_64K if the alloc function cannot allocate more
- * than 64k bytes at a time (needed on systems with 16-bit int).
- * Compile with -DUNALIGNED_OK if it is OK to access shorts or ints
- * at addresses which are not a multiple of their size.
- * Under DOS, -DFAR=far or -DFAR=__far may be needed.
- */
-
-#ifndef STDC
-#  if defined(MSDOS) || defined(__STDC__) || defined(__cplusplus)
-#    define STDC
-#  endif
-#endif
-
-#ifdef  __MWERKS__ /* Metrowerks CodeWarrior declares fileno() in unix.h */
-#  include <unix.h>
-#endif
-
-/* Maximum value for memLevel in deflateInit2 */
-#ifndef MAX_MEM_LEVEL
-#  ifdef MAXSEG_64K
-#    define MAX_MEM_LEVEL 8
-#  else
-#    define MAX_MEM_LEVEL 9
-#  endif
-#endif
-
-#ifndef FAR
-#  define FAR
-#endif
-
-/* Maximum value for windowBits in deflateInit2 and inflateInit2 */
-#ifndef MAX_WBITS
-#  define MAX_WBITS   15 /* 32K LZ77 window */
-#endif
-
-/* The memory requirements for deflate are (in bytes):
-            1 << (windowBits+2)   +  1 << (memLevel+9)
- that is: 128K for windowBits=15  +  128K for memLevel = 8  (default values)
- plus a few kilobytes for small objects. For example, if you want to reduce
- the default memory requirements from 256K to 128K, compile with
-     make CFLAGS="-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7"
- Of course this will generally degrade compression (there's no free lunch).
-
-   The memory requirements for inflate are (in bytes) 1 << windowBits
- that is, 32K for windowBits=15 (default value) plus a few kilobytes
- for small objects.
-*/
-
-                        /* Type declarations */
-
-#ifndef OF /* function prototypes */
-#  ifdef STDC
-#    define OF(args)  args
-#  else
-#    define OF(args)  ()
-#  endif
-#endif
-
-typedef unsigned char  Byte;  /* 8 bits */
-typedef unsigned int   uInt;  /* 16 bits or more */
-typedef unsigned long  uLong; /* 32 bits or more */
-
-typedef Byte FAR Bytef;
-typedef char FAR charf;
-typedef int FAR intf;
-typedef uInt FAR uIntf;
-typedef uLong FAR uLongf;
-
-#ifdef STDC
-   typedef void FAR *voidpf;
-   typedef void     *voidp;
-#else
-   typedef Byte FAR *voidpf;
-   typedef Byte     *voidp;
-#endif
-
-/* end of original zconf.h */
-
-#define ZLIB_VERSION "0.95P"
-
-/* 
-     The 'zlib' compression library provides in-memory compression and
-  decompression functions, including integrity checks of the uncompressed
-  data.  This version of the library supports only one compression method
-  (deflation) but other algorithms may be added later and will have the same
-  stream interface.
-
-     For compression the application must provide the output buffer and
-  may optionally provide the input buffer for optimization. For decompression,
-  the application must provide the input buffer and may optionally provide
-  the output buffer for optimization.
-
-     Compression can be done in a single step if the buffers are large
-  enough (for example if an input file is mmap'ed), or can be done by
-  repeated calls of the compression function.  In the latter case, the
-  application must provide more input and/or consume the output
-  (providing more output space) before each call.
-*/
-
-typedef voidpf (*alloc_func) OF((voidpf opaque, uInt items, uInt size));
-typedef void   (*free_func)  OF((voidpf opaque, voidpf address, uInt nbytes));
-
-struct internal_state;
-
-typedef struct z_stream_s {
-    Bytef    *next_in;  /* next input byte */
-    uInt     avail_in;  /* number of bytes available at next_in */
-    uLong    total_in;  /* total nb of input bytes read so far */
-
-    Bytef    *next_out; /* next output byte should be put there */
-    uInt     avail_out; /* remaining free space at next_out */
-    uLong    total_out; /* total nb of bytes output so far */
-
-    char     *msg;      /* last error message, NULL if no error */
-    struct internal_state FAR *state; /* not visible by applications */
-
-    alloc_func zalloc;  /* used to allocate the internal state */
-    free_func  zfree;   /* used to free the internal state */
-    voidp      opaque;  /* private data object passed to zalloc and zfree */
-
-    Byte     data_type; /* best guess about the data type: ascii or binary */
-
-} z_stream;
-
-/*
-   The application must update next_in and avail_in when avail_in has
-   dropped to zero. It must update next_out and avail_out when avail_out
-   has dropped to zero. The application must initialize zalloc, zfree and
-   opaque before calling the init function. All other fields are set by the
-   compression library and must not be updated by the application.
-
-   The opaque value provided by the application will be passed as the first
-   parameter for calls of zalloc and zfree. This can be useful for custom
-   memory management. The compression library attaches no meaning to the
-   opaque value.
-
-   zalloc must return Z_NULL if there is not enough memory for the object.
-   On 16-bit systems, the functions zalloc and zfree must be able to allocate
-   exactly 65536 bytes, but will not be required to allocate more than this
-   if the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS,
-   pointers returned by zalloc for objects of exactly 65536 bytes *must*
-   have their offset normalized to zero. The default allocation function
-   provided by this library ensures this (see zutil.c). To reduce memory
-   requirements and avoid any allocation of 64K objects, at the expense of
-   compression ratio, compile the library with -DMAX_WBITS=14 (see zconf.h).
-
-   The fields total_in and total_out can be used for statistics or
-   progress reports. After compression, total_in holds the total size of
-   the uncompressed data and may be saved for use in the decompressor
-   (particularly if the decompressor wants to decompress everything in
-   a single step).
-*/
-
-                        /* constants */
-
-#define Z_NO_FLUSH      0
-#define Z_PARTIAL_FLUSH 1
-#define Z_FULL_FLUSH    2
-#define Z_SYNC_FLUSH    3 /* experimental: partial_flush + byte align */
-#define Z_FINISH        4
-#define Z_PACKET_FLUSH  5
-/* See deflate() below for the usage of these constants */
-
-#define Z_OK            0
-#define Z_STREAM_END    1
-#define Z_ERRNO        (-1)
-#define Z_STREAM_ERROR (-2)
-#define Z_DATA_ERROR   (-3)
-#define Z_MEM_ERROR    (-4)
-#define Z_BUF_ERROR    (-5)
-/* error codes for the compression/decompression functions */
-
-#define Z_BEST_SPEED             1
-#define Z_BEST_COMPRESSION       9
-#define Z_DEFAULT_COMPRESSION  (-1)
-/* compression levels */
-
-#define Z_FILTERED            1
-#define Z_HUFFMAN_ONLY        2
-#define Z_DEFAULT_STRATEGY    0
-
-#define Z_BINARY   0
-#define Z_ASCII    1
-#define Z_UNKNOWN  2
-/* Used to set the data_type field */
-
-#define Z_NULL  0  /* for initializing zalloc, zfree, opaque */
-
-extern char *zlib_version;
-/* The application can compare zlib_version and ZLIB_VERSION for consistency.
-   If the first character differs, the library code actually used is
-   not compatible with the zlib.h header file used by the application.
- */
-
-                        /* basic functions */
-
-extern int inflateInit OF((z_stream *strm));
-/* 
-     Initializes the internal stream state for decompression. The fields
-   zalloc and zfree must be initialized before by the caller.  If zalloc and
-   zfree are set to Z_NULL, inflateInit updates them to use default allocation
-   functions.
-
-     inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not
-   enough memory.  msg is set to null if there is no error message.
-   inflateInit does not perform any decompression: this will be done by
-   inflate().
-*/
-
-
-extern int inflate OF((z_stream *strm, int flush));
-/*
-  Performs one or both of the following actions:
-
-  - Decompress more input starting at next_in and update next_in and avail_in
-    accordingly. If not all input can be processed (because there is not
-    enough room in the output buffer), next_in is updated and processing
-    will resume at this point for the next call of inflate().
-
-  - Provide more output starting at next_out and update next_out and avail_out
-    accordingly.  inflate() always provides as much output as possible
-    (until there is no more input data or no more space in the output buffer).
-
-  Before the call of inflate(), the application should ensure that at least
-  one of the actions is possible, by providing more input and/or consuming
-  more output, and updating the next_* and avail_* values accordingly.
-  The application can consume the uncompressed output when it wants, for
-  example when the output buffer is full (avail_out == 0), or after each
-  call of inflate().
-
-    If the parameter flush is set to Z_PARTIAL_FLUSH or Z_PACKET_FLUSH,
-  inflate flushes as much output as possible to the output buffer. The
-  flushing behavior of inflate is not specified for values of the flush
-  parameter other than Z_PARTIAL_FLUSH, Z_PACKET_FLUSH or Z_FINISH, but the
-  current implementation actually flushes as much output as possible
-  anyway.  For Z_PACKET_FLUSH, inflate checks that once all the input data
-  has been consumed, it is expecting to see the length field of a stored
-  block; if not, it returns Z_DATA_ERROR.
-
-    inflate() should normally be called until it returns Z_STREAM_END or an
-  error. However if all decompression is to be performed in a single step
-  (a single call of inflate), the parameter flush should be set to
-  Z_FINISH. In this case all pending input is processed and all pending
-  output is flushed; avail_out must be large enough to hold all the
-  uncompressed data. (The size of the uncompressed data may have been saved
-  by the compressor for this purpose.) The next operation on this stream must
-  be inflateEnd to deallocate the decompression state. The use of Z_FINISH
-  is never required, but can be used to inform inflate that a faster routine
-  may be used for the single inflate() call.
-
-    inflate() returns Z_OK if some progress has been made (more input
-  processed or more output produced), Z_STREAM_END if the end of the
-  compressed data has been reached and all uncompressed output has been
-  produced, Z_DATA_ERROR if the input data was corrupted, Z_STREAM_ERROR if
-  the stream structure was inconsistent (for example if next_in or next_out
-  was NULL), Z_MEM_ERROR if there was not enough memory, Z_BUF_ERROR if no
-  progress is possible or if there was not enough room in the output buffer
-  when Z_FINISH is used. In the Z_DATA_ERROR case, the application may then
-  call inflateSync to look for a good compression block.  */
-
-
-extern int inflateEnd OF((z_stream *strm));
-/*
-     All dynamically allocated data structures for this stream are freed.
-   This function discards any unprocessed input and does not flush any
-   pending output.
-
-     inflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state
-   was inconsistent. In the error case, msg may be set but then points to a
-   static string (which must not be deallocated).
-*/
-
-                        /* advanced functions */
-
-extern int inflateInit2 OF((z_stream *strm,
-                            int  windowBits));
-/*   
-     This is another version of inflateInit with more compression options. The
-   fields next_out, zalloc and zfree must be initialized before by the caller.
-
-     The windowBits parameter is the base two logarithm of the maximum window
-   size (the size of the history buffer).  It should be in the range 8..15 for
-   this version of the library (the value 16 will be allowed soon). The
-   default value is 15 if inflateInit is used instead. If a compressed stream
-   with a larger window size is given as input, inflate() will return with
-   the error code Z_DATA_ERROR instead of trying to allocate a larger window.
-
-     If next_out is not null, the library will use this buffer for the history
-   buffer; the buffer must either be large enough to hold the entire output
-   data, or have at least 1<<windowBits bytes.  If next_out is null, the
-   library will allocate its own buffer (and leave next_out null). next_in
-   need not be provided here but must be provided by the application for the
-   next call of inflate().
-
-     If the history buffer is provided by the application, next_out must
-   never be changed by the application since the decompressor maintains
-   history information inside this buffer from call to call; the application
-   can only reset next_out to the beginning of the history buffer when
-   avail_out is zero and all output has been consumed.
-
-      inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was
-   not enough memory, Z_STREAM_ERROR if a parameter is invalid (such as
-   windowBits < 8). msg is set to null if there is no error message.
-   inflateInit2 does not perform any decompression: this will be done by
-   inflate().
-*/
-
-extern int inflateSync OF((z_stream *strm));
-/* 
-    Skips invalid compressed data until the special marker (see deflate()
-  above) can be found, or until all available input is skipped. No output
-  is provided.
-
-    inflateSync returns Z_OK if the special marker has been found, Z_BUF_ERROR
-  if no more input was provided, Z_DATA_ERROR if no marker has been found,
-  or Z_STREAM_ERROR if the stream structure was inconsistent. In the success
-  case, the application may save the current current value of total_in which
-  indicates where valid compressed data was found. In the error case, the
-  application may repeatedly call inflateSync, providing more input each time,
-  until success or end of the input data.
-*/
-
-extern int inflateReset OF((z_stream *strm));
-/*
-     This function is equivalent to inflateEnd followed by inflateInit,
-   but does not free and reallocate all the internal decompression state.
-   The stream will keep attributes that may have been set by inflateInit2.
-
-      inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source
-   stream state was inconsistent (such as zalloc or state being NULL).
-*/
-
-extern int inflateIncomp OF((z_stream *strm));
-/*
-     This function adds the data at next_in (avail_in bytes) to the output
-   history without performing any output.  There must be no pending output,
-   and the decompressor must be expecting to see the start of a block.
-   Calling this function is equivalent to decompressing a stored block
-   containing the data at next_in (except that the data is not output).
-*/
-
-                        /* checksum functions */
-
-/*
-     This function is not related to compression but is exported
-   anyway because it might be useful in applications using the
-   compression library.
-*/
-
-extern uLong adler32 OF((uLong adler, Bytef *buf, uInt len));
-
-/*
-     Update a running Adler-32 checksum with the bytes buf[0..len-1] and
-   return the updated checksum. If buf is NULL, this function returns
-   the required initial value for the checksum.
-   An Adler-32 checksum is almost as reliable as a CRC32 but can be computed
-   much faster. Usage example:
-
-     uLong adler = adler32(0L, Z_NULL, 0);
-
-     while (read_buffer(buffer, length) != EOF) {
-       adler = adler32(adler, buffer, length);
-     }
-     if (adler != original_adler) error();
-*/
-
-#ifndef _Z_UTIL_H
-    struct internal_state {int dummy;}; /* hack for buggy compilers */
-#endif
-
-#endif /* _ZLIB_H */
diff --git a/arch/ppc64/defconfig b/arch/ppc64/defconfig
index 37c157c93cef..e79fd60bc122 100644
--- a/arch/ppc64/defconfig
+++ b/arch/ppc64/defconfig
@@ -1318,7 +1318,7 @@ CONFIG_MSDOS_PARTITION=y
 #
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_737=m
 CONFIG_NLS_CODEPAGE_775=m
 CONFIG_NLS_CODEPAGE_850=m
@@ -1342,7 +1342,7 @@ CONFIG_NLS_ISO8859_8=m
 CONFIG_NLS_CODEPAGE_1250=m
 CONFIG_NLS_CODEPAGE_1251=m
 CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_ISO8859_2=m
 CONFIG_NLS_ISO8859_3=m
 CONFIG_NLS_ISO8859_4=m
diff --git a/arch/ppc64/kernel/HvLpEvent.c b/arch/ppc64/kernel/HvLpEvent.c
deleted file mode 100644
index 90032b138902..000000000000
--- a/arch/ppc64/kernel/HvLpEvent.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright 2001 Mike Corrigan IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <asm/system.h>
-#include <asm/iSeries/HvLpEvent.h>
-#include <asm/iSeries/HvCallEvent.h>
-#include <asm/iSeries/ItLpNaca.h>
-
-/* Array of LpEvent handler functions */
-LpEventHandler lpEventHandler[HvLpEvent_Type_NumTypes];
-unsigned lpEventHandlerPaths[HvLpEvent_Type_NumTypes];
-
-/* Register a handler for an LpEvent type */
-
-int HvLpEvent_registerHandler( HvLpEvent_Type eventType, LpEventHandler handler )
-{
-        int rc = 1;
-        if ( eventType < HvLpEvent_Type_NumTypes ) {
-                lpEventHandler[eventType] = handler;
-                rc = 0;
-        }
-        return rc;
-        
-}
-
-int HvLpEvent_unregisterHandler( HvLpEvent_Type eventType )
-{
-        int rc = 1;
-
-        might_sleep();
-
-        if ( eventType < HvLpEvent_Type_NumTypes ) {
-                if ( !lpEventHandlerPaths[eventType] ) {
-                        lpEventHandler[eventType] = NULL;
-                        rc = 0;
-
-                        /* We now sleep until all other CPUs have scheduled. This ensures that
-                         * the deletion is seen by all other CPUs, and that the deleted handler
-                         * isn't still running on another CPU when we return. */
-                        synchronize_rcu();
-                }
-        }
-        return rc;
-}
-EXPORT_SYMBOL(HvLpEvent_registerHandler);
-EXPORT_SYMBOL(HvLpEvent_unregisterHandler);
-
-/* (lpIndex is the partition index of the target partition.  
- * needed only for VirtualIo, VirtualLan and SessionMgr.  Zero
- * indicates to use our partition index - for the other types)
- */
-int HvLpEvent_openPath( HvLpEvent_Type eventType, HvLpIndex lpIndex )
-{
-        int rc = 1;
-        if ( eventType < HvLpEvent_Type_NumTypes &&
-             lpEventHandler[eventType] ) {
-                if ( lpIndex == 0 )
-                        lpIndex = itLpNaca.xLpIndex;
-                HvCallEvent_openLpEventPath( lpIndex, eventType );
-                ++lpEventHandlerPaths[eventType];
-                rc = 0;
-        }
-        return rc;
-}
-
-int HvLpEvent_closePath( HvLpEvent_Type eventType, HvLpIndex lpIndex )
-{
-        int rc = 1;
-        if ( eventType < HvLpEvent_Type_NumTypes &&
-             lpEventHandler[eventType] &&
-             lpEventHandlerPaths[eventType] ) {
-                if ( lpIndex == 0 )
-                        lpIndex = itLpNaca.xLpIndex;
-                HvCallEvent_closeLpEventPath( lpIndex, eventType );
-                --lpEventHandlerPaths[eventType];
-                rc = 0;
-        }
-        return rc;
-}
-
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index ae60eb1193c6..327c08ce4291 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -2,36 +2,34 @@
 # Makefile for the linux ppc64 kernel.
 #
 
+ifneq ($(CONFIG_PPC_MERGE),y)
+
 EXTRA_CFLAGS    += -mno-minimal-toc
 extra-y         := head.o vmlinux.lds
 
-obj-y               :=  setup.o entry.o traps.o irq.o idle.o dma.o \
-                        time.o process.o signal.o syscalls.o misc.o ptrace.o \
-                        align.o semaphore.o bitops.o pacaData.o \
-                        udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \
-                        ptrace32.o signal32.o rtc.o init_task.o \
-                        lmb.o cputable.o cpu_setup_power4.o idle_power4.o \
-                        iommu.o sysfs.o vdso.o pmc.o firmware.o
-obj-y += vdso32/ vdso64/
+obj-y               :=  misc.o prom.o
+
+endif
 
-obj-$(CONFIG_PPC_OF) += of_device.o
+obj-y               +=  irq.o idle.o dma.o \
+                        signal.o \
+                        align.o bitops.o pacaData.o \
+                        udbg.o ioctl32.o \
+                        rtc.o \
+                        cpu_setup_power4.o \
+                        iommu.o sysfs.o vdso.o firmware.o
+obj-y += vdso32/ vdso64/
 
-pci-obj-$(CONFIG_PPC_ISERIES)   += iSeries_pci.o iSeries_irq.o \
-                                iSeries_VpdInfo.o
 pci-obj-$(CONFIG_PPC_MULTIPLATFORM)     += pci_dn.o pci_direct_iommu.o
 
 obj-$(CONFIG_PCI)       += pci.o pci_iommu.o iomap.o $(pci-obj-y)
 
-obj-$(CONFIG_PPC_ISERIES) += HvCall.o HvLpConfig.o LparData.o \
-                             iSeries_setup.o ItLpQueue.o hvCall.o \
-                             mf.o HvLpEvent.o iSeries_proc.o iSeries_htab.o \
-                             iSeries_iommu.o
-
-obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o prom_init.o prom.o
+obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o
+ifneq ($(CONFIG_PPC_MERGE),y)
+obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
+endif
 
-obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
-                             pSeries_nvram.o rtasd.o ras.o pSeries_reconfig.o \
-                             pSeries_setup.o pSeries_iommu.o udbg_16550.o
+obj-$(CONFIG_PPC_PSERIES) += rtasd.o udbg_16550.o
 
 obj-$(CONFIG_PPC_BPA) += bpa_setup.o bpa_iommu.o bpa_nvram.o \
                          bpa_iic.o spider-pic.o
@@ -41,45 +39,36 @@ obj-$(CONFIG_EEH)		+= eeh.o
 obj-$(CONFIG_PROC_FS)           += proc_ppc64.o
 obj-$(CONFIG_RTAS_FLASH)        += rtas_flash.o
 obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_MODULES)           += module.o ppc_ksyms.o
-obj-$(CONFIG_PPC_RTAS)          += rtas.o rtas_pci.o
+obj-$(CONFIG_MODULES)           += module.o
+ifneq ($(CONFIG_PPC_MERGE),y)
+obj-$(CONFIG_MODULES)           += ppc_ksyms.o
+endif
+obj-$(CONFIG_PPC_RTAS)          += rtas_pci.o
 obj-$(CONFIG_RTAS_PROC)         += rtas-proc.o
 obj-$(CONFIG_SCANLOG)           += scanlog.o
-obj-$(CONFIG_VIOPATH)           += viopath.o
 obj-$(CONFIG_LPARCFG)           += lparcfg.o
 obj-$(CONFIG_HVC_CONSOLE)       += hvconsole.o
+ifneq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_BOOTX_TEXT)        += btext.o
+endif
 obj-$(CONFIG_HVCS)              += hvcserver.o
 
-vio-obj-$(CONFIG_PPC_PSERIES)   += pSeries_vio.o
-vio-obj-$(CONFIG_PPC_ISERIES)   += iSeries_vio.o
-obj-$(CONFIG_IBMVIO)            += vio.o $(vio-obj-y)
-obj-$(CONFIG_XICS)              += xics.o
-obj-$(CONFIG_MPIC)              += mpic.o
+obj-$(CONFIG_PPC_PMAC)          += udbg_scc.o
 
-obj-$(CONFIG_PPC_PMAC)          += pmac_setup.o pmac_feature.o pmac_pci.o \
-                                   pmac_time.o pmac_nvram.o pmac_low_i2c.o \
-                                   udbg_scc.o
-
-obj-$(CONFIG_PPC_MAPLE)         += maple_setup.o maple_pci.o maple_time.o \
-                                   udbg_16550.o
-
-obj-$(CONFIG_U3_DART)           += u3_iommu.o
+obj-$(CONFIG_PPC_MAPLE)         += udbg_16550.o
 
 ifdef CONFIG_SMP
-obj-$(CONFIG_PPC_PMAC)          += pmac_smp.o smp-tbsync.o
-obj-$(CONFIG_PPC_ISERIES)       += iSeries_smp.o
-obj-$(CONFIG_PPC_PSERIES)       += pSeries_smp.o
-obj-$(CONFIG_PPC_BPA)           += pSeries_smp.o
+obj-$(CONFIG_PPC_PMAC)          += smp-tbsync.o
 obj-$(CONFIG_PPC_MAPLE)         += smp-tbsync.o
 endif
 
-obj-$(CONFIG_ALTIVEC)           += vecemu.o vector.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 
 CFLAGS_ioctl32.o += -Ifs/
 
+ifneq ($(CONFIG_PPC_MERGE),y)
 ifeq ($(CONFIG_PPC_ISERIES),y)
-arch/ppc64/kernel/head.o: arch/ppc64/kernel/lparmap.s
-AFLAGS_head.o += -Iarch/ppc64/kernel
+arch/ppc64/kernel/head.o: arch/powerpc/kernel/lparmap.s
+AFLAGS_head.o += -Iarch/powerpc/kernel
+endif
 endif
diff --git a/arch/ppc64/kernel/align.c b/arch/ppc64/kernel/align.c
index 330e7ef81427..256d5b592aa1 100644
--- a/arch/ppc64/kernel/align.c
+++ b/arch/ppc64/kernel/align.c
@@ -313,7 +313,7 @@ fix_alignment(struct pt_regs *regs)
                                 /* Doing stfs, have to convert to single */
                                 preempt_disable();
                                 enable_kernel_fp();
-                                cvt_df(&current->thread.fpr[reg], (float *)&data.v[4], &current->thread.fpscr);
+                                cvt_df(&current->thread.fpr[reg], (float *)&data.v[4], &current->thread);
                                 disable_kernel_fp();
                                 preempt_enable();
                         }
@@ -349,7 +349,7 @@ fix_alignment(struct pt_regs *regs)
                                 /* Doing lfs, have to convert to double */
                                 preempt_disable();
                                 enable_kernel_fp();
-                                cvt_fd((float *)&data.v[4], &current->thread.fpr[reg], &current->thread.fpscr);
+                                cvt_fd((float *)&data.v[4], &current->thread.fpr[reg], &current->thread);
                                 disable_kernel_fp();
                                 preempt_enable();
                         }
diff --git a/arch/ppc64/kernel/asm-offsets.c b/arch/ppc64/kernel/asm-offsets.c
index 1ff4fa05a973..5e6046cb414e 100644
--- a/arch/ppc64/kernel/asm-offsets.c
+++ b/arch/ppc64/kernel/asm-offsets.c
@@ -46,8 +46,6 @@
 int main(void)
 {
         /* thread struct on stack */
-        DEFINE(THREAD_SHIFT, THREAD_SHIFT);
-        DEFINE(THREAD_SIZE, THREAD_SIZE);
         DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
         DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
         DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror));
@@ -77,6 +75,7 @@ int main(void)
         DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
         DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
         DEFINE(PLATFORM, offsetof(struct systemcfg, platform));
+        DEFINE(PLATFORM_LPAR, PLATFORM_LPAR);
 
         /* paca */
         DEFINE(PACA_SIZE, sizeof(struct paca_struct));
diff --git a/arch/ppc64/kernel/bpa_iommu.c b/arch/ppc64/kernel/bpa_iommu.c
index 5f2460090e03..da1b4b7a3269 100644
--- a/arch/ppc64/kernel/bpa_iommu.c
+++ b/arch/ppc64/kernel/bpa_iommu.c
@@ -39,8 +39,8 @@
 #include <asm/pmac_feature.h>
 #include <asm/abs_addr.h>
 #include <asm/system.h>
+#include <asm/ppc-pci.h>
 
-#include "pci.h"
 #include "bpa_iommu.h"
 
 static inline unsigned long 
diff --git a/arch/ppc64/kernel/bpa_setup.c b/arch/ppc64/kernel/bpa_setup.c
index 57b3db66f458..c2dc8f282eb8 100644
--- a/arch/ppc64/kernel/bpa_setup.c
+++ b/arch/ppc64/kernel/bpa_setup.c
@@ -43,8 +43,9 @@
 #include <asm/time.h>
 #include <asm/nvram.h>
 #include <asm/cputable.h>
+#include <asm/ppc-pci.h>
+#include <asm/irq.h>
 
-#include "pci.h"
 #include "bpa_iic.h"
 #include "bpa_iommu.h"
 
@@ -54,7 +55,7 @@
 #define DBG(fmt...)
 #endif
 
-void bpa_get_cpuinfo(struct seq_file *m)
+void bpa_show_cpuinfo(struct seq_file *m)
 {
         struct device_node *root;
         const char *model = "";
@@ -128,7 +129,7 @@ struct machdep_calls __initdata bpa_md = {
         .probe                  = bpa_probe,
         .setup_arch             = bpa_setup_arch,
         .init_early             = bpa_init_early,
-        .get_cpuinfo            = bpa_get_cpuinfo,
+        .show_cpuinfo           = bpa_show_cpuinfo,
         .restart                = rtas_restart,
         .power_off              = rtas_power_off,
         .halt                   = rtas_halt,
diff --git a/arch/ppc64/kernel/btext.c b/arch/ppc64/kernel/btext.c
index b6fbfbe9032d..506a37885c5c 100644
--- a/arch/ppc64/kernel/btext.c
+++ b/arch/ppc64/kernel/btext.c
@@ -18,6 +18,7 @@
 #include <asm/io.h>
 #include <asm/lmb.h>
 #include <asm/processor.h>
+#include <asm/udbg.h>
 
 #undef NO_SCROLL
 
@@ -131,6 +132,47 @@ int btext_initialize(struct device_node *np)
         return 0;
 }
 
+static void btext_putc(unsigned char c)
+{
+        btext_drawchar(c);
+}
+
+void __init init_boot_display(void)
+{
+        char *name;
+        struct device_node *np = NULL; 
+        int rc = -ENODEV;
+
+        printk("trying to initialize btext ...\n");
+
+        name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
+        if (name != NULL) {
+                np = of_find_node_by_path(name);
+                if (np != NULL) {
+                        if (strcmp(np->type, "display") != 0) {
+                                printk("boot stdout isn't a display !\n");
+                                of_node_put(np);
+                                np = NULL;
+                        }
+                }
+        }
+        if (np)
+                rc = btext_initialize(np);
+        if (rc) {
+                for (np = NULL; (np = of_find_node_by_type(np, "display"));) {
+                        if (get_property(np, "linux,opened", NULL)) {
+                                printk("trying %s ...\n", np->full_name);
+                                rc = btext_initialize(np);
+                                printk("result: %d\n", rc);
+                        }
+                        if (rc == 0)
+                                break;
+                }
+        }
+        if (rc == 0 && udbg_putc == NULL)
+                udbg_putc = btext_putc;
+}
+
 
 /* Calc the base address of a given point (x,y) */
 static unsigned char * calc_base(int x, int y)
diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c
deleted file mode 100644
index 8831a28c3c4e..000000000000
--- a/arch/ppc64/kernel/cputable.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/*
- *  arch/ppc64/kernel/cputable.c
- *
- *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
- *
- *  Modifications for ppc64:
- *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/string.h>
-#include <linux/sched.h>
-#include <linux/threads.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <asm/oprofile_impl.h>
-#include <asm/cputable.h>
-
-struct cpu_spec* cur_cpu_spec = NULL;
-EXPORT_SYMBOL(cur_cpu_spec);
-
-/* NOTE:
- * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
- * the responsibility of the appropriate CPU save/restore functions to
- * eventually copy these settings over. Those save/restore aren't yet
- * part of the cputable though. That has to be fixed for both ppc32
- * and ppc64
- */
-extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
-
-
-/* We only set the altivec features if the kernel was compiled with altivec
- * support
- */
-#ifdef CONFIG_ALTIVEC
-#define CPU_FTR_ALTIVEC_COMP    CPU_FTR_ALTIVEC
-#define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
-#else
-#define CPU_FTR_ALTIVEC_COMP    0
-#define PPC_FEATURE_HAS_ALTIVEC_COMP    0
-#endif
-
-struct cpu_spec cpu_specs[] = {
-        {       /* Power3 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00400000,
-                .cpu_name               = "POWER3 (630)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
-                .cpu_user_features = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/power3",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* Power3+ */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00410000,
-                .cpu_name               = "POWER3 (630+)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/power3",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* Northstar */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00330000,
-                .cpu_name               = "RS64-II (northstar)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-                        CPU_FTR_MMCRA | CPU_FTR_CTRL,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* Pulsar */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00340000,
-                .cpu_name               = "RS64-III (pulsar)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-                        CPU_FTR_MMCRA | CPU_FTR_CTRL,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* I-star */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00360000,
-                .cpu_name               = "RS64-III (icestar)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-                        CPU_FTR_MMCRA | CPU_FTR_CTRL,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* S-star */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00370000,
-                .cpu_name               = "RS64-IV (sstar)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-                        CPU_FTR_MMCRA | CPU_FTR_CTRL,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power3,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* Power4 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00350000,
-                .cpu_name               = "POWER4 (gp)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power4,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/power4",
-                .oprofile_model         = &op_model_rs64,
-#endif
-        },
-        {       /* Power4+ */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00380000,
-                .cpu_name               = "POWER4+ (gq)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_power4,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/power4",
-                .oprofile_model         = &op_model_power4,
-#endif
-        },
-        {       /* PPC970 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00390000,
-                .cpu_name               = "PPC970",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-                        CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
-                .cpu_user_features      = COMMON_USER_PPC64 |
-                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_ppc970,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/970",
-                .oprofile_model         = &op_model_power4,
-#endif
-        },
-        {       /* PPC970FX */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x003c0000,
-                .cpu_name               = "PPC970FX",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-                        CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
-                .cpu_user_features      = COMMON_USER_PPC64 |
-                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .cpu_setup              = __setup_cpu_ppc970,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/970",
-                .oprofile_model         = &op_model_power4,
-#endif
-        },
-        {       /* PPC970MP */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00440000,
-                .cpu_name               = "PPC970MP",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-                        CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
-                .cpu_user_features      = COMMON_USER_PPC64 |
-                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .cpu_setup              = __setup_cpu_ppc970,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/970",
-                .oprofile_model         = &op_model_power4,
-#endif
-        },
-        {       /* Power5 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x003a0000,
-                .cpu_name               = "POWER5 (gr)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
-                        CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
-                        CPU_FTR_MMCRA_SIHV,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 6,
-                .cpu_setup              = __setup_cpu_power4,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/power5",
-                .oprofile_model         = &op_model_power4,
-#endif
-        },
-        {       /* Power5 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x003b0000,
-                .cpu_name               = "POWER5 (gs)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
-                        CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
-                        CPU_FTR_MMCRA_SIHV,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 6,
-                .cpu_setup              = __setup_cpu_power4,
-#ifdef CONFIG_OPROFILE
-                .oprofile_cpu_type      = "ppc64/power5",
-                .oprofile_model         = &op_model_power4,
-#endif
-        },
-        {       /* BE DD1.x */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00700000,
-                .cpu_name               = "Broadband Engine",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-                        CPU_FTR_SMT,
-                .cpu_user_features      = COMMON_USER_PPC64 |
-                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .cpu_setup              = __setup_cpu_be,
-        },
-        {       /* default match */
-                .pvr_mask               = 0x00000000,
-                .pvr_value              = 0x00000000,
-                .cpu_name               = "POWER4 (compatible)",
-                .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                        CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-                        CPU_FTR_PPCAS_ARCH_V2,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 6,
-                .cpu_setup              = __setup_cpu_power4,
-        }
-};
diff --git a/arch/ppc64/kernel/eeh.c b/arch/ppc64/kernel/eeh.c
index ba93fd731222..035d1b14a207 100644
--- a/arch/ppc64/kernel/eeh.c
+++ b/arch/ppc64/kernel/eeh.c
@@ -33,7 +33,7 @@
 #include <asm/rtas.h>
 #include <asm/atomic.h>
 #include <asm/systemcfg.h>
-#include "pci.h"
+#include <asm/ppc-pci.h>
 
 #undef DEBUG
 
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 72c61041151a..929f9f42cf7a 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -36,6 +36,7 @@
 #include <asm/setup.h>
 #include <asm/hvcall.h>
 #include <asm/iSeries/LparMap.h>
+#include <asm/thread_info.h>
 
 #ifdef CONFIG_PPC_ISERIES
 #define DO_SOFT_DISABLE
@@ -80,7 +81,7 @@ _stext:
 _GLOBAL(__start)
         /* NOP this out unconditionally */
 BEGIN_FTR_SECTION
-        b .__start_initialization_multiplatform
+        b       .__start_initialization_multiplatform
 END_FTR_SECTION(0, 1)
 #endif /* CONFIG_PPC_MULTIPLATFORM */
 
@@ -201,22 +202,22 @@ exception_marker:
 #define EX_CCR          60
 
 #define EXCEPTION_PROLOG_PSERIES(area, label)                           \
-        mfspr   r13,SPRG3;              /* get paca address into r13 */ \
+        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
         std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
         std     r10,area+EX_R10(r13);                                   \
         std     r11,area+EX_R11(r13);                                   \
         std     r12,area+EX_R12(r13);                                   \
-        mfspr   r9,SPRG1;                                               \
+        mfspr   r9,SPRN_SPRG1;                                          \
         std     r9,area+EX_R13(r13);                                    \
         mfcr    r9;                                                     \
         clrrdi  r12,r13,32;             /* get high part of &label */   \
         mfmsr   r10;                                                    \
-        mfspr   r11,SRR0;               /* save SRR0 */                 \
+        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
         ori     r12,r12,(label)@l;      /* virt addr of handler */      \
         ori     r10,r10,MSR_IR|MSR_DR|MSR_RI;                           \
-        mtspr   SRR0,r12;                                               \
-        mfspr   r12,SRR1;               /* and SRR1 */                  \
-        mtspr   SRR1,r10;                                               \
+        mtspr   SPRN_SRR0,r12;                                          \
+        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mtspr   SPRN_SRR1,r10;                                          \
         rfid;                                                           \
         b       .       /* prevent speculative execution */
 
@@ -225,12 +226,12 @@ exception_marker:
  * This code runs with relocation on.
  */
 #define EXCEPTION_PROLOG_ISERIES_1(area)                                \
-        mfspr   r13,SPRG3;              /* get paca address into r13 */ \
+        mfspr   r13,SPRN_SPRG3;         /* get paca address into r13 */ \
         std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
         std     r10,area+EX_R10(r13);                                   \
         std     r11,area+EX_R11(r13);                                   \
         std     r12,area+EX_R12(r13);                                   \
-        mfspr   r9,SPRG1;                                               \
+        mfspr   r9,SPRN_SPRG1;                                          \
         std     r9,area+EX_R13(r13);                                    \
         mfcr    r9
 
@@ -283,7 +284,7 @@ exception_marker:
         std     r9,_LINK(r1);                                              \
         mfctr   r10;                    /* save CTR in stackframe       */ \
         std     r10,_CTR(r1);                                              \
-        mfspr   r11,XER;                /* save XER in stackframe       */ \
+        mfspr   r11,SPRN_XER;           /* save XER in stackframe       */ \
         std     r11,_XER(r1);                                              \
         li      r9,(n)+1;                                                  \
         std     r9,_TRAP(r1);           /* set trap number              */ \
@@ -300,7 +301,7 @@ exception_marker:
         .globl label##_pSeries;                         \
 label##_pSeries:                                        \
         HMT_MEDIUM;                                     \
-        mtspr   SPRG1,r13;              /* save r13 */  \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
         RUNLATCH_ON(r13);                               \
         EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
 
@@ -308,7 +309,7 @@ label##_pSeries:					\
         .globl label##_iSeries;                         \
 label##_iSeries:                                        \
         HMT_MEDIUM;                                     \
-        mtspr   SPRG1,r13;              /* save r13 */  \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */  \
         RUNLATCH_ON(r13);                               \
         EXCEPTION_PROLOG_ISERIES_1(area);               \
         EXCEPTION_PROLOG_ISERIES_2;                     \
@@ -318,7 +319,7 @@ label##_iSeries:					\
         .globl label##_iSeries;                                         \
 label##_iSeries:                                                        \
         HMT_MEDIUM;                                                     \
-        mtspr   SPRG1,r13;              /* save r13 */                  \
+        mtspr   SPRN_SPRG1,r13;         /* save r13 */                  \
         RUNLATCH_ON(r13);                                               \
         EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN);                         \
         lbz     r10,PACAPROCENABLED(r13);                               \
@@ -388,7 +389,7 @@ __start_interrupts:
         . = 0x200
 _machine_check_pSeries:
         HMT_MEDIUM
-        mtspr   SPRG1,r13               /* save r13 */
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
         RUNLATCH_ON(r13)
         EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
 
@@ -396,18 +397,18 @@ _machine_check_pSeries:
         .globl data_access_pSeries
 data_access_pSeries:
         HMT_MEDIUM
-        mtspr   SPRG1,r13
+        mtspr   SPRN_SPRG1,r13
 BEGIN_FTR_SECTION
-        mtspr   SPRG2,r12
-        mfspr   r13,DAR
-        mfspr   r12,DSISR
+        mtspr   SPRN_SPRG2,r12
+        mfspr   r13,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
         srdi    r13,r13,60
         rlwimi  r13,r12,16,0x20
         mfcr    r12
         cmpwi   r13,0x2c
         beq     .do_stab_bolted_pSeries
         mtcrf   0x80,r12
-        mfspr   r12,SPRG2
+        mfspr   r12,SPRN_SPRG2
 END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
         EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
 
@@ -415,19 +416,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
         .globl data_access_slb_pSeries
 data_access_slb_pSeries:
         HMT_MEDIUM
-        mtspr   SPRG1,r13
+        mtspr   SPRN_SPRG1,r13
         RUNLATCH_ON(r13)
-        mfspr   r13,SPRG3               /* get paca address into r13 */
+        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
         std     r9,PACA_EXSLB+EX_R9(r13)        /* save r9 - r12 */
         std     r10,PACA_EXSLB+EX_R10(r13)
         std     r11,PACA_EXSLB+EX_R11(r13)
         std     r12,PACA_EXSLB+EX_R12(r13)
         std     r3,PACA_EXSLB+EX_R3(r13)
-        mfspr   r9,SPRG1
+        mfspr   r9,SPRN_SPRG1
         std     r9,PACA_EXSLB+EX_R13(r13)
         mfcr    r9
-        mfspr   r12,SRR1                /* and SRR1 */
-        mfspr   r3,DAR
+        mfspr   r12,SPRN_SRR1           /* and SRR1 */
+        mfspr   r3,SPRN_DAR
         b       .do_slb_miss            /* Rel. branch works in real mode */
 
         STD_EXCEPTION_PSERIES(0x400, instruction_access)
@@ -436,19 +437,19 @@ data_access_slb_pSeries:
         .globl instruction_access_slb_pSeries
 instruction_access_slb_pSeries:
         HMT_MEDIUM
-        mtspr   SPRG1,r13
+        mtspr   SPRN_SPRG1,r13
         RUNLATCH_ON(r13)
-        mfspr   r13,SPRG3               /* get paca address into r13 */
+        mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
         std     r9,PACA_EXSLB+EX_R9(r13)        /* save r9 - r12 */
         std     r10,PACA_EXSLB+EX_R10(r13)
         std     r11,PACA_EXSLB+EX_R11(r13)
         std     r12,PACA_EXSLB+EX_R12(r13)
         std     r3,PACA_EXSLB+EX_R3(r13)
-        mfspr   r9,SPRG1
+        mfspr   r9,SPRN_SPRG1
         std     r9,PACA_EXSLB+EX_R13(r13)
         mfcr    r9
-        mfspr   r12,SRR1                /* and SRR1 */
-        mfspr   r3,SRR0                 /* SRR0 is faulting address */
+        mfspr   r12,SPRN_SRR1           /* and SRR1 */
+        mfspr   r3,SPRN_SRR0                    /* SRR0 is faulting address */
         b       .do_slb_miss            /* Rel. branch works in real mode */
 
         STD_EXCEPTION_PSERIES(0x500, hardware_interrupt)
@@ -466,15 +467,15 @@ system_call_pSeries:
         RUNLATCH_ON(r9)
         mr      r9,r13
         mfmsr   r10
-        mfspr   r13,SPRG3
-        mfspr   r11,SRR0
+        mfspr   r13,SPRN_SPRG3
+        mfspr   r11,SPRN_SRR0
         clrrdi  r12,r13,32
         oris    r12,r12,system_call_common@h
         ori     r12,r12,system_call_common@l
-        mtspr   SRR0,r12
+        mtspr   SPRN_SRR0,r12
         ori     r10,r10,MSR_IR|MSR_DR|MSR_RI
-        mfspr   r12,SRR1
-        mtspr   SRR1,r10
+        mfspr   r12,SPRN_SRR1
+        mtspr   SPRN_SRR1,r10
         rfid
         b       .       /* prevent speculative execution */
 
@@ -504,25 +505,25 @@ system_call_pSeries:
         .align  7
 _GLOBAL(do_stab_bolted_pSeries)
         mtcrf   0x80,r12
-        mfspr   r12,SPRG2
+        mfspr   r12,SPRN_SPRG2
         EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
 
 /*
  * Vectors for the FWNMI option.  Share common code.
  */
-      .globl system_reset_fwnmi
+        .globl system_reset_fwnmi
 system_reset_fwnmi:
-      HMT_MEDIUM
-      mtspr   SPRG1,r13               /* save r13 */
-      RUNLATCH_ON(r13)
-      EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        RUNLATCH_ON(r13)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
 
-      .globl machine_check_fwnmi
+        .globl machine_check_fwnmi
 machine_check_fwnmi:
-      HMT_MEDIUM
-      mtspr   SPRG1,r13               /* save r13 */
-      RUNLATCH_ON(r13)
-      EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
+        HMT_MEDIUM
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
+        RUNLATCH_ON(r13)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
 
 #ifdef CONFIG_PPC_ISERIES
 /***  ISeries-LPAR interrupt handlers ***/
@@ -531,18 +532,18 @@ machine_check_fwnmi:
 
         .globl data_access_iSeries
 data_access_iSeries:
-        mtspr   SPRG1,r13
+        mtspr   SPRN_SPRG1,r13
 BEGIN_FTR_SECTION
-        mtspr   SPRG2,r12
-        mfspr   r13,DAR
-        mfspr   r12,DSISR
+        mtspr   SPRN_SPRG2,r12
+        mfspr   r13,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
         srdi    r13,r13,60
         rlwimi  r13,r12,16,0x20
         mfcr    r12
         cmpwi   r13,0x2c
         beq     .do_stab_bolted_iSeries
         mtcrf   0x80,r12
-        mfspr   r12,SPRG2
+        mfspr   r12,SPRN_SPRG2
 END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
         EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
         EXCEPTION_PROLOG_ISERIES_2
@@ -550,25 +551,25 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
 
 .do_stab_bolted_iSeries:
         mtcrf   0x80,r12
-        mfspr   r12,SPRG2
+        mfspr   r12,SPRN_SPRG2
         EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
         EXCEPTION_PROLOG_ISERIES_2
         b       .do_stab_bolted
 
         .globl  data_access_slb_iSeries
 data_access_slb_iSeries:
-        mtspr   SPRG1,r13               /* save r13 */
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
         EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
         std     r3,PACA_EXSLB+EX_R3(r13)
         ld      r12,PACALPPACA+LPPACASRR1(r13)
-        mfspr   r3,DAR
+        mfspr   r3,SPRN_DAR
         b       .do_slb_miss
 
         STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
 
         .globl  instruction_access_slb_iSeries
 instruction_access_slb_iSeries:
-        mtspr   SPRG1,r13               /* save r13 */
+        mtspr   SPRN_SPRG1,r13          /* save r13 */
         EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
         std     r3,PACA_EXSLB+EX_R3(r13)
         ld      r12,PACALPPACA+LPPACASRR1(r13)
@@ -586,7 +587,7 @@ instruction_access_slb_iSeries:
         .globl  system_call_iSeries
 system_call_iSeries:
         mr      r9,r13
-        mfspr   r13,SPRG3
+        mfspr   r13,SPRN_SPRG3
         EXCEPTION_PROLOG_ISERIES_2
         b       system_call_common
 
@@ -596,7 +597,7 @@ system_call_iSeries:
 
         .globl system_reset_iSeries
 system_reset_iSeries:
-        mfspr   r13,SPRG3               /* Get paca address */
+        mfspr   r13,SPRN_SPRG3          /* Get paca address */
         mfmsr   r24
         ori     r24,r24,MSR_RI
         mtmsrd  r24                     /* RI on */
@@ -639,7 +640,7 @@ iSeries_secondary_smp_loop:
 #endif /* CONFIG_SMP */
         li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
         sc                              /* Invoke the hypervisor via a system call */
-        mfspr   r13,SPRG3               /* Put r13 back ???? */
+        mfspr   r13,SPRN_SPRG3          /* Put r13 back ???? */
         b       1b                      /* If SMP not configured, secondaries
                                          * loop forever */
 
@@ -656,8 +657,8 @@ hardware_interrupt_iSeries_masked:
         mtcrf   0x80,r9         /* Restore regs */
         ld      r11,PACALPPACA+LPPACASRR0(r13)
         ld      r12,PACALPPACA+LPPACASRR1(r13)
-        mtspr   SRR0,r11
-        mtspr   SRR1,r12
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
         ld      r9,PACA_EXGEN+EX_R9(r13)
         ld      r10,PACA_EXGEN+EX_R10(r13)
         ld      r11,PACA_EXGEN+EX_R11(r13)
@@ -713,8 +714,8 @@ bad_stack:
         std     r10,GPR1(r1)
         std     r11,_NIP(r1)
         std     r12,_MSR(r1)
-        mfspr   r11,DAR
-        mfspr   r12,DSISR
+        mfspr   r11,SPRN_DAR
+        mfspr   r12,SPRN_DSISR
         std     r11,_DAR(r1)
         std     r12,_DSISR(r1)
         mflr    r10
@@ -746,6 +747,7 @@ bad_stack:
  * any task or sent any task a signal, you should use
  * ret_from_except or ret_from_except_lite instead of this.
  */
+        .globl  fast_exception_return
 fast_exception_return:
         ld      r12,_MSR(r1)
         ld      r11,_NIP(r1)
@@ -766,8 +768,8 @@ fast_exception_return:
         clrrdi  r10,r10,2               /* clear RI (LE is 0 already) */
         mtmsrd  r10,1
 
-        mtspr   SRR1,r12
-        mtspr   SRR0,r11
+        mtspr   SPRN_SRR1,r12
+        mtspr   SPRN_SRR0,r11
         REST_4GPRS(10, r1)
         ld      r1,GPR1(r1)
         rfid
@@ -788,9 +790,9 @@ unrecov_fer:
         .globl data_access_common
 data_access_common:
         RUNLATCH_ON(r10)                /* It wont fit in the 0x300 handler */
-        mfspr   r10,DAR
+        mfspr   r10,SPRN_DAR
         std     r10,PACA_EXGEN+EX_DAR(r13)
-        mfspr   r10,DSISR
+        mfspr   r10,SPRN_DSISR
         stw     r10,PACA_EXGEN+EX_DSISR(r13)
         EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
         ld      r3,PACA_EXGEN+EX_DAR(r13)
@@ -821,9 +823,9 @@ hardware_interrupt_entry:
         .align  7
         .globl alignment_common
 alignment_common:
-        mfspr   r10,DAR
+        mfspr   r10,SPRN_DAR
         std     r10,PACA_EXGEN+EX_DAR(r13)
-        mfspr   r10,DSISR
+        mfspr   r10,SPRN_DSISR
         stw     r10,PACA_EXGEN+EX_DSISR(r13)
         EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
         ld      r3,PACA_EXGEN+EX_DAR(r13)
@@ -857,62 +859,6 @@ fp_unavailable_common:
         bl      .kernel_fp_unavailable_exception
         BUG_OPCODE
 
-/*
- * load_up_fpu(unused, unused, tsk)
- * Disable FP for the task which had the FPU previously,
- * and save its floating-point registers in its thread_struct.
- * Enables the FPU for use in the kernel on return.
- * On SMP we know the fpu is free, since we give it up every
- * switch (ie, no lazy save of the FP registers).
- * On entry: r13 == 'current' && last_task_used_math != 'current'
- */
-_STATIC(load_up_fpu)
-        mfmsr   r5                      /* grab the current MSR */
-        ori     r5,r5,MSR_FP
-        mtmsrd  r5                      /* enable use of fpu now */
-        isync
-/*
- * For SMP, we don't do lazy FPU switching because it just gets too
- * horrendously complex, especially when a task switches from one CPU
- * to another.  Instead we call giveup_fpu in switch_to.
- *
- */
-#ifndef CONFIG_SMP
-        ld      r3,last_task_used_math@got(r2)
-        ld      r4,0(r3)
-        cmpdi   0,r4,0
-        beq     1f
-        /* Save FP state to last_task_used_math's THREAD struct */
-        addi    r4,r4,THREAD
-        SAVE_32FPRS(0, r4)
-        mffs    fr0
-        stfd    fr0,THREAD_FPSCR(r4)
-        /* Disable FP for last_task_used_math */
-        ld      r5,PT_REGS(r4)
-        ld      r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-        li      r6,MSR_FP|MSR_FE0|MSR_FE1
-        andc    r4,r4,r6
-        std     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-1:
-#endif /* CONFIG_SMP */
-        /* enable use of FP after return */
-        ld      r4,PACACURRENT(r13)
-        addi    r5,r4,THREAD            /* Get THREAD */
-        ld      r4,THREAD_FPEXC_MODE(r5)
-        ori     r12,r12,MSR_FP
-        or      r12,r12,r4
-        std     r12,_MSR(r1)
-        lfd     fr0,THREAD_FPSCR(r5)
-        mtfsf   0xff,fr0
-        REST_32FPRS(0, r5)
-#ifndef CONFIG_SMP
-        /* Update last_task_used_math to 'current' */
-        subi    r4,r5,THREAD            /* Back to 'current' */
-        std     r4,0(r3)
-#endif /* CONFIG_SMP */
-        /* restore registers and return */
-        b       fast_exception_return
-
         .align  7
         .globl altivec_unavailable_common
 altivec_unavailable_common:
@@ -1120,7 +1066,7 @@ _GLOBAL(do_stab_bolted)
 
         /* Hash to the primary group */
         ld      r10,PACASTABVIRT(r13)
-        mfspr   r11,DAR
+        mfspr   r11,SPRN_DAR
         srdi    r11,r11,28
         rldimi  r10,r11,7,52    /* r10 = first ste of the group */
 
@@ -1162,7 +1108,7 @@ _GLOBAL(do_stab_bolted)
 2:      std     r9,8(r10)       /* Store the vsid part of the ste       */
         eieio
 
-        mfspr   r11,DAR         /* Get the new esid                     */
+        mfspr   r11,SPRN_DAR            /* Get the new esid                     */
         clrrdi  r11,r11,28      /* Permits a full 32b of ESID           */
         ori     r11,r11,0x90    /* Turn on valid and kp                 */
         std     r11,0(r10)      /* Put new entry back into the stab     */
@@ -1182,8 +1128,8 @@ _GLOBAL(do_stab_bolted)
         clrrdi  r10,r10,2
         mtmsrd  r10,1
 
-        mtspr   SRR0,r11
-        mtspr   SRR1,r12
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
         ld      r9,PACA_EXSLB+EX_R9(r13)
         ld      r10,PACA_EXSLB+EX_R10(r13)
         ld      r11,PACA_EXSLB+EX_R11(r13)
@@ -1229,8 +1175,8 @@ _GLOBAL(do_slb_miss)
 .machine        pop
 
 #ifdef CONFIG_PPC_ISERIES
-        mtspr   SRR0,r11
-        mtspr   SRR1,r12
+        mtspr   SPRN_SRR0,r11
+        mtspr   SPRN_SRR1,r12
 #endif /* CONFIG_PPC_ISERIES */
         ld      r9,PACA_EXSLB+EX_R9(r13)
         ld      r10,PACA_EXSLB+EX_R10(r13)
@@ -1253,7 +1199,7 @@ unrecov_slb:
  *
  * On iSeries, the hypervisor must fill in at least one entry before
  * we get control (with relocate on).  The address is give to the hv
- * as a page number (see xLparMap in LparData.c), so this must be at a
+ * as a page number (see xLparMap in lpardata.c), so this must be at a
  * fixed address (the linker can't compute (u64)&initial_stab >>
  * PAGE_SHIFT).
  */
@@ -1316,7 +1262,7 @@ _GLOBAL(pSeries_secondary_smp_init)
         mr      r3,r24                  /* not found, copy phys to r3    */
         b       .kexec_wait             /* next kernel might do better   */
 
-2:      mtspr   SPRG3,r13               /* Save vaddr of paca in SPRG3   */
+2:      mtspr   SPRN_SPRG3,r13          /* Save vaddr of paca in SPRG3   */
         /* From now on, r24 is expected to be logical cpuid */
         mr      r24,r5
 3:      HMT_LOW
@@ -1364,6 +1310,7 @@ _STATIC(__start_initialization_iSeries)
         addi    r2,r2,0x4000
 
         bl      .iSeries_early_setup
+        bl      .early_setup
 
         /* relocation is on at this point */
 
@@ -1554,20 +1501,17 @@ copy_to_here:
         .section ".text";
         .align 2 ;
 
-        .globl  pmac_secondary_start_1  
-pmac_secondary_start_1: 
-        li      r24, 1
-        b       .pmac_secondary_start
-        
-        .globl pmac_secondary_start_2
-pmac_secondary_start_2: 
-        li      r24, 2
-        b       .pmac_secondary_start
-        
-        .globl pmac_secondary_start_3
-pmac_secondary_start_3:
-        li      r24, 3
-        b       .pmac_secondary_start
+        .globl  __secondary_start_pmac_0
+__secondary_start_pmac_0:
+        /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
+        li      r24,0
+        b       1f
+        li      r24,1
+        b       1f
+        li      r24,2
+        b       1f
+        li      r24,3
+1:
         
 _GLOBAL(pmac_secondary_start)
         /* turn on 64-bit mode */
@@ -1586,7 +1530,7 @@ _GLOBAL(pmac_secondary_start)
         LOADADDR(r4, paca)               /* Get base vaddr of paca array        */
         mulli   r13,r24,PACA_SIZE        /* Calculate vaddr of right paca */
         add     r13,r13,r4              /* for this processor.          */
-        mtspr   SPRG3,r13                /* Save vaddr of paca in SPRG3 */
+        mtspr   SPRN_SPRG3,r13           /* Save vaddr of paca in SPRG3 */
 
         /* Create a temp kernel stack for use before relocation is on.  */
         ld      r1,PACAEMERGSP(r13)
@@ -1621,7 +1565,7 @@ _GLOBAL(__secondary_start)
         /* Initialize the page table pointer register. */
         LOADADDR(r6,_SDR1)
         ld      r6,0(r6)                /* get the value of _SDR1        */
-        mtspr   SDR1,r6                 /* set the htab location         */
+        mtspr   SPRN_SDR1,r6                    /* set the htab location         */
 #endif
         /* Initialize the first segment table (or SLB) entry             */
         ld      r3,PACASTABVIRT(r13)    /* get addr of segment table     */
@@ -1650,7 +1594,7 @@ _GLOBAL(__secondary_start)
         lwz     r3,PLATFORM(r3)         /* r3 = platform flags           */
         andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
         beq     98f                     /* branch if result is 0  */
-        mfspr   r3,PVR
+        mfspr   r3,SPRN_PVR
         srwi    r3,r3,16
         cmpwi   r3,0x37                 /* SStar  */
         beq     97f
@@ -1674,8 +1618,8 @@ _GLOBAL(__secondary_start)
 #ifdef DO_SOFT_DISABLE
         ori     r4,r4,MSR_EE
 #endif
-        mtspr   SRR0,r3
-        mtspr   SRR1,r4
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
         rfid
         b       .       /* prevent speculative execution */
 
@@ -1737,7 +1681,7 @@ _STATIC(start_here_multiplatform)
 
 #ifdef CONFIG_HMT
         /* Start up the second thread on cpu 0 */
-        mfspr   r3,PVR
+        mfspr   r3,SPRN_PVR
         srwi    r3,r3,16
         cmpwi   r3,0x34                 /* Pulsar  */
         beq     90f
@@ -1797,7 +1741,7 @@ _STATIC(start_here_multiplatform)
         mulli   r13,r27,PACA_SIZE       /* Calculate vaddr of right paca */
         add     r13,r13,r24             /* for this processor.           */
         sub     r13,r13,r26             /* convert to physical addr      */
-        mtspr   SPRG3,r13               /* PPPBBB: Temp... -Peter */
+        mtspr   SPRN_SPRG3,r13          /* PPPBBB: Temp... -Peter */
         
         /* Do very early kernel initializations, including initial hash table,
          * stab and slb setup before we turn on relocation.     */
@@ -1814,7 +1758,7 @@ _STATIC(start_here_multiplatform)
         lwz     r3,PLATFORM(r3)         /* r3 = platform flags */
         andi.   r3,r3,PLATFORM_LPAR     /* Test if bit 0 is set (LPAR bit) */
         beq     98f                     /* branch if result is 0  */
-        mfspr   r3,PVR
+        mfspr   r3,SPRN_PVR
         srwi    r3,r3,16
         cmpwi   r3,0x37                 /* SStar */
         beq     97f
@@ -1838,12 +1782,12 @@ _STATIC(start_here_multiplatform)
         LOADADDR(r6,_SDR1)              /* Only if NOT LPAR */
         sub     r6,r6,r26
         ld      r6,0(r6)                /* get the value of _SDR1 */
-        mtspr   SDR1,r6                 /* set the htab location  */
+        mtspr   SPRN_SDR1,r6                    /* set the htab location  */
 98: 
         LOADADDR(r3,.start_here_common)
         SET_REG_TO_CONST(r4, MSR_KERNEL)
-        mtspr   SRR0,r3
-        mtspr   SRR1,r4
+        mtspr   SPRN_SRR0,r3
+        mtspr   SPRN_SRR1,r4
         rfid
         b       .       /* prevent speculative execution */
 #endif /* CONFIG_PPC_MULTIPLATFORM */
@@ -1874,7 +1818,7 @@ _STATIC(start_here_common)
         LOADADDR(r24, paca)             /* Get base vaddr of paca array  */
         mulli   r13,r26,PACA_SIZE       /* Calculate vaddr of right paca */
         add     r13,r13,r24             /* for this processor.           */
-        mtspr   SPRG3,r13
+        mtspr   SPRN_SPRG3,r13
 
         /* ptr to current */
         LOADADDR(r4,init_task)
@@ -1901,7 +1845,7 @@ _STATIC(start_here_common)
 _GLOBAL(hmt_init)
 #ifdef CONFIG_HMT
         LOADADDR(r5, hmt_thread_data)
-        mfspr   r7,PVR
+        mfspr   r7,SPRN_PVR
         srwi    r7,r7,16
         cmpwi   r7,0x34                 /* Pulsar  */
         beq     90f
@@ -1910,10 +1854,10 @@ _GLOBAL(hmt_init)
         cmpwi   r7,0x37                 /* SStar   */
         beq     91f
         b       101f
-90:     mfspr   r6,PIR
+90:     mfspr   r6,SPRN_PIR
         andi.   r6,r6,0x1f
         b       92f
-91:     mfspr   r6,PIR
+91:     mfspr   r6,SPRN_PIR
         andi.   r6,r6,0x3ff
 92:     sldi    r4,r24,3
         stwx    r6,r5,r4
@@ -1924,8 +1868,8 @@ __hmt_secondary_hold:
         LOADADDR(r5, hmt_thread_data)
         clrldi  r5,r5,4
         li      r7,0
-        mfspr   r6,PIR
-        mfspr   r8,PVR
+        mfspr   r6,SPRN_PIR
+        mfspr   r8,SPRN_PVR
         srwi    r8,r8,16
         cmpwi   r8,0x34
         bne     93f
@@ -1951,39 +1895,41 @@ __hmt_secondary_hold:
 _GLOBAL(hmt_start_secondary)
         LOADADDR(r4,__hmt_secondary_hold)
         clrldi  r4,r4,4
-        mtspr   NIADORM, r4
-        mfspr   r4, MSRDORM
+        mtspr   SPRN_NIADORM, r4
+        mfspr   r4, SPRN_MSRDORM
         li      r5, -65
         and     r4, r4, r5
-        mtspr   MSRDORM, r4
+        mtspr   SPRN_MSRDORM, r4
         lis     r4,0xffef
         ori     r4,r4,0x7403
-        mtspr   TSC, r4
+        mtspr   SPRN_TSC, r4
         li      r4,0x1f4
-        mtspr   TST, r4
-        mfspr   r4, HID0
+        mtspr   SPRN_TST, r4
+        mfspr   r4, SPRN_HID0
         ori     r4, r4, 0x1
-        mtspr   HID0, r4
+        mtspr   SPRN_HID0, r4
         mfspr   r4, SPRN_CTRLF
         oris    r4, r4, 0x40
         mtspr   SPRN_CTRLT, r4
         blr
 #endif
 
-#if defined(CONFIG_KEXEC) || (defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES))
+#if defined(CONFIG_KEXEC) || defined(CONFIG_SMP)
 _GLOBAL(smp_release_cpus)
         /* All secondary cpus are spinning on a common
          * spinloop, release them all now so they can start
          * to spin on their individual paca spinloops.
          * For non SMP kernels, the secondary cpus never
          * get out of the common spinloop.
+         * XXX This does nothing useful on iSeries, secondaries are
+         * already waiting on their paca.
          */
         li      r3,1
         LOADADDR(r5,__secondary_hold_spinloop)
         std     r3,0(r5)
         sync
         blr
-#endif /* CONFIG_SMP && !CONFIG_PPC_ISERIES */
+#endif /* CONFIG_SMP */
 
 
 /*
@@ -1992,7 +1938,7 @@ _GLOBAL(smp_release_cpus)
  */
         .section ".bss"
 
-        .align  12
+        .align  PAGE_SHIFT
 
         .globl  empty_zero_page
 empty_zero_page:
diff --git a/arch/ppc64/kernel/hvcserver.c b/arch/ppc64/kernel/hvcserver.c
index bde8f42da854..4d584172055a 100644
--- a/arch/ppc64/kernel/hvcserver.c
+++ b/arch/ppc64/kernel/hvcserver.c
@@ -22,6 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/module.h>
+#include <linux/slab.h>
+
 #include <asm/hvcall.h>
 #include <asm/hvcserver.h>
 #include <asm/io.h>
diff --git a/arch/ppc64/kernel/i8259.c b/arch/ppc64/kernel/i8259.c
deleted file mode 100644
index 74dcfd68fc75..000000000000
--- a/arch/ppc64/kernel/i8259.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * c 2001 PPC64 Team, IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/cache.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <asm/io.h>
-#include <asm/ppcdebug.h>
-#include "i8259.h"
-
-unsigned char cached_8259[2] = { 0xff, 0xff };
-#define cached_A1 (cached_8259[0])
-#define cached_21 (cached_8259[1])
-
-static  __cacheline_aligned_in_smp DEFINE_SPINLOCK(i8259_lock);
-
-static int i8259_pic_irq_offset;
-static int i8259_present;
-
-int i8259_irq(int cpu)
-{
-        int irq;
-        
-        spin_lock/*_irqsave*/(&i8259_lock/*, flags*/);
-        /*
-         * Perform an interrupt acknowledge cycle on controller 1
-         */                                                             
-        outb(0x0C, 0x20);
-        irq = inb(0x20) & 7;                                   
-        if (irq == 2)                                                     
-        {                                                                   
-                /*                                     
-                 * Interrupt is cascaded so perform interrupt
-                 * acknowledge on controller 2
-                 */
-                outb(0x0C, 0xA0);                      
-                irq = (inb(0xA0) & 7) + 8;
-        }
-        else if (irq==7)                                
-        {
-                /*                               
-                 * This may be a spurious interrupt
-                 *                         
-                 * Read the interrupt status register. If the most
-                 * significant bit is not set then there is no valid
-                 * interrupt
-                 */
-                outb(0x0b, 0x20);
-                if(~inb(0x20)&0x80) {
-                        spin_unlock/*_irqrestore*/(&i8259_lock/*, flags*/);
-                        return -1;
-                }
-        }
-        spin_unlock/*_irqrestore*/(&i8259_lock/*, flags*/);
-        return irq;
-}
-
-static void i8259_mask_and_ack_irq(unsigned int irq_nr)
-{
-        unsigned long flags;
-        
-        spin_lock_irqsave(&i8259_lock, flags);
-        if ( irq_nr >= i8259_pic_irq_offset )
-                irq_nr -= i8259_pic_irq_offset;
-
-        if (irq_nr > 7) {                                                   
-                cached_A1 |= 1 << (irq_nr-8);                                   
-                inb(0xA1);      /* DUMMY */                                     
-                outb(cached_A1,0xA1);                                           
-                outb(0x20,0xA0);        /* Non-specific EOI */             
-                outb(0x20,0x20);        /* Non-specific EOI to cascade */
-        } else {                                                            
-                cached_21 |= 1 << irq_nr;                                   
-                inb(0x21);      /* DUMMY */                                 
-                outb(cached_21,0x21);
-                outb(0x20,0x20);        /* Non-specific EOI */                 
-        }                                                                
-        spin_unlock_irqrestore(&i8259_lock, flags);
-}
-
-static void i8259_set_irq_mask(int irq_nr)
-{
-        outb(cached_A1,0xA1);
-        outb(cached_21,0x21);
-}
-
-static void i8259_mask_irq(unsigned int irq_nr)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&i8259_lock, flags);
-        if ( irq_nr >= i8259_pic_irq_offset )
-                irq_nr -= i8259_pic_irq_offset;
-        if ( irq_nr < 8 )
-                cached_21 |= 1 << irq_nr;
-        else
-                cached_A1 |= 1 << (irq_nr-8);
-        i8259_set_irq_mask(irq_nr);
-        spin_unlock_irqrestore(&i8259_lock, flags);
-}
-
-static void i8259_unmask_irq(unsigned int irq_nr)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&i8259_lock, flags);
-        if ( irq_nr >= i8259_pic_irq_offset )
-                irq_nr -= i8259_pic_irq_offset;
-        if ( irq_nr < 8 )
-                cached_21 &= ~(1 << irq_nr);
-        else
-                cached_A1 &= ~(1 << (irq_nr-8));
-        i8259_set_irq_mask(irq_nr);
-        spin_unlock_irqrestore(&i8259_lock, flags);
-}
-
-static void i8259_end_irq(unsigned int irq)
-{
-        if (!(get_irq_desc(irq)->status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
-            get_irq_desc(irq)->action)
-                i8259_unmask_irq(irq);
-}
-
-struct hw_interrupt_type i8259_pic = {
-        .typename = " i8259    ",
-        .enable = i8259_unmask_irq,
-        .disable = i8259_mask_irq,
-        .ack = i8259_mask_and_ack_irq,
-        .end = i8259_end_irq,
-};
-
-void __init i8259_init(int offset)
-{
-        unsigned long flags;
-        
-        spin_lock_irqsave(&i8259_lock, flags);
-        i8259_pic_irq_offset = offset;
-        i8259_present = 1;
-        /* init master interrupt controller */
-        outb(0x11, 0x20); /* Start init sequence */
-        outb(0x00, 0x21); /* Vector base */
-        outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */
-        outb(0x01, 0x21); /* Select 8086 mode */
-        outb(0xFF, 0x21); /* Mask all */
-        /* init slave interrupt controller */
-        outb(0x11, 0xA0); /* Start init sequence */
-        outb(0x08, 0xA1); /* Vector base */
-        outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
-        outb(0x01, 0xA1); /* Select 8086 mode */
-        outb(0xFF, 0xA1); /* Mask all */
-        outb(cached_A1, 0xA1);
-        outb(cached_21, 0x21);
-        spin_unlock_irqrestore(&i8259_lock, flags);
-        
-}
-
-static int i8259_request_cascade(void)
-{
-        if (!i8259_present)
-                return -ENODEV;
-
-        request_irq( i8259_pic_irq_offset + 2, no_action, SA_INTERRUPT,
-                     "82c59 secondary cascade", NULL );
-
-        return 0;
-}
-
-arch_initcall(i8259_request_cascade);
diff --git a/arch/ppc64/kernel/i8259.h b/arch/ppc64/kernel/i8259.h
deleted file mode 100644
index f74764ba0bfa..000000000000
--- a/arch/ppc64/kernel/i8259.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * c 2001 PPC 64 Team, IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef _PPC_KERNEL_i8259_H
-#define _PPC_KERNEL_i8259_H
-
-extern struct hw_interrupt_type i8259_pic;
-
-extern void i8259_init(int offset);
-extern int i8259_irq(int);
-
-#endif /* _PPC_KERNEL_i8259_H */
diff --git a/arch/ppc64/kernel/idle.c b/arch/ppc64/kernel/idle.c
index 954395d42636..8abd2ad92832 100644
--- a/arch/ppc64/kernel/idle.c
+++ b/arch/ppc64/kernel/idle.c
@@ -31,7 +31,7 @@
 
 extern void power4_idle(void);
 
-int default_idle(void)
+void default_idle(void)
 {
         long oldval;
         unsigned int cpu = smp_processor_id();
@@ -64,11 +64,9 @@ int default_idle(void)
                 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
                         cpu_die();
         }
-
-        return 0;
 }
 
-int native_idle(void)
+void native_idle(void)
 {
         while (1) {
                 ppc64_runlatch_off();
@@ -85,8 +83,6 @@ int native_idle(void)
                     system_state == SYSTEM_RUNNING)
                         cpu_die();
         }
-
-        return 0;
 }
 
 void cpu_idle(void)
diff --git a/arch/ppc64/kernel/ioctl32.c b/arch/ppc64/kernel/ioctl32.c
index a8005db23ec5..ba4a899045c2 100644
--- a/arch/ppc64/kernel/ioctl32.c
+++ b/arch/ppc64/kernel/ioctl32.c
@@ -39,9 +39,7 @@ IOCTL_TABLE_START
 #include <linux/compat_ioctl.h>
 #define DECLARES
 #include "compat_ioctl.c"
-COMPATIBLE_IOCTL(TIOCSTART)
-COMPATIBLE_IOCTL(TIOCSTOP)
-COMPATIBLE_IOCTL(TIOCSLTC)
+
 /* Little p (/dev/rtc, /dev/envctrl, etc.) */
 COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */
 COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */
diff --git a/arch/ppc64/kernel/kprobes.c b/arch/ppc64/kernel/kprobes.c
index 9c6facc24f70..ed876a5178ae 100644
--- a/arch/ppc64/kernel/kprobes.c
+++ b/arch/ppc64/kernel/kprobes.c
@@ -395,7 +395,6 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
                 if (post_kprobe_handler(args->regs))
                         ret = NOTIFY_STOP;
                 break;
-        case DIE_GPF:
         case DIE_PAGE_FAULT:
                 if (kprobe_running() &&
                     kprobe_fault_handler(args->regs, args->trapnr))
diff --git a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S
index e7241ad80a08..077507ffbab8 100644
--- a/arch/ppc64/kernel/misc.S
+++ b/arch/ppc64/kernel/misc.S
@@ -28,6 +28,7 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/cputable.h>
+#include <asm/thread_info.h>
 
         .text
 
@@ -64,44 +65,6 @@ _GLOBAL(get_srr1)
 _GLOBAL(get_sp)
         mr      r3,r1
         blr
-                
-#ifdef CONFIG_PPC_ISERIES
-/* unsigned long local_save_flags(void) */
-_GLOBAL(local_get_flags)
-        lbz     r3,PACAPROCENABLED(r13)
-        blr
-
-/* unsigned long local_irq_disable(void) */
-_GLOBAL(local_irq_disable)
-        lbz     r3,PACAPROCENABLED(r13)
-        li      r4,0
-        stb     r4,PACAPROCENABLED(r13)
-        blr                     /* Done */
-
-/* void local_irq_restore(unsigned long flags) */       
-_GLOBAL(local_irq_restore)
-        lbz     r5,PACAPROCENABLED(r13)
-         /* Check if things are setup the way we want _already_. */
-        cmpw    0,r3,r5
-        beqlr
-        /* are we enabling interrupts? */
-        cmpdi   0,r3,0
-        stb     r3,PACAPROCENABLED(r13)
-        beqlr
-        /* Check pending interrupts */
-        /*   A decrementer, IPI or PMC interrupt may have occurred
-         *   while we were in the hypervisor (which enables) */
-        ld      r4,PACALPPACA+LPPACAANYINT(r13)
-        cmpdi   r4,0
-        beqlr
-
-        /*
-         * Handle pending interrupts in interrupt context
-         */
-        li      r0,0x5555
-        sc
-        blr
-#endif /* CONFIG_PPC_ISERIES */
 
 #ifdef CONFIG_IRQSTACKS
 _GLOBAL(call_do_softirq)
@@ -329,7 +292,7 @@ _GLOBAL(__flush_dcache_icache)
 
 /* Flush the dcache */
         ld      r7,PPC64_CACHES@toc(r2)
-        clrrdi  r3,r3,12                    /* Page align */
+        clrrdi  r3,r3,PAGE_SHIFT                    /* Page align */
         lwz     r4,DCACHEL1LINESPERPAGE(r7)     /* Get # dcache lines per page */
         lwz     r5,DCACHEL1LINESIZE(r7)         /* Get dcache line size */
         mr      r6,r3
@@ -488,25 +451,6 @@ _GLOBAL(_outsl_ns)
         sync
         blr     
 
-
-_GLOBAL(cvt_fd)
-        lfd     0,0(r5)         /* load up fpscr value */
-        mtfsf   0xff,0
-        lfs     0,0(r3)
-        stfd    0,0(r4)
-        mffs    0               /* save new fpscr value */
-        stfd    0,0(r5)
-        blr
-
-_GLOBAL(cvt_df)
-        lfd     0,0(r5)         /* load up fpscr value */
-        mtfsf   0xff,0
-        lfd     0,0(r3)
-        stfs    0,0(r4)
-        mffs    0               /* save new fpscr value */
-        stfd    0,0(r5)
-        blr
-
 /*
  * identify_cpu and calls setup_cpu
  * In:  r3 = base of the cpu_specs array
@@ -692,38 +636,6 @@ _GLOBAL(disable_kernel_fp)
         isync
         blr
 
-/*
- * giveup_fpu(tsk)
- * Disable FP for the task given as the argument,
- * and save the floating-point registers in its thread_struct.
- * Enables the FPU for use in the kernel on return.
- */
-_GLOBAL(giveup_fpu)
-        mfmsr   r5
-        ori     r5,r5,MSR_FP
-        mtmsrd  r5                      /* enable use of fpu now */
-        isync
-        cmpdi   0,r3,0
-        beqlr-                          /* if no previous owner, done */
-        addi    r3,r3,THREAD            /* want THREAD of task */
-        ld      r5,PT_REGS(r3)
-        cmpdi   0,r5,0
-        SAVE_32FPRS(0, r3)
-        mffs    fr0
-        stfd    fr0,THREAD_FPSCR(r3)
-        beq     1f
-        ld      r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-        li      r3,MSR_FP|MSR_FE0|MSR_FE1
-        andc    r4,r4,r3                /* disable FP for previous task */
-        std     r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-1:
-#ifndef CONFIG_SMP
-        li      r5,0
-        ld      r4,last_task_used_math@got(r2)
-        std     r5,0(r4)
-#endif /* CONFIG_SMP */
-        blr
-
 #ifdef CONFIG_ALTIVEC
 
 #if 0 /* this has no callers for now */
@@ -778,6 +690,13 @@ _GLOBAL(giveup_altivec)
 _GLOBAL(__setup_cpu_power3)
         blr
 
+_GLOBAL(execve)
+        li      r0,__NR_execve
+        sc
+        bnslr
+        neg     r3,r3
+        blr
+
 /* kexec_wait(phys_cpu)
  *
  * wait for the flag to change, indicating this kernel is going away but
@@ -948,566 +867,3 @@ _GLOBAL(kexec_sequence)
         li      r5,0
         blr     /* image->start(physid, image->start, 0); */
 #endif /* CONFIG_KEXEC */
-
-/* Why isn't this a) automatic, b) written in 'C'? */   
-        .balign 8
-_GLOBAL(sys_call_table32)
-        .llong .sys_restart_syscall     /* 0 */
-        .llong .sys_exit
-        .llong .ppc_fork
-        .llong .sys_read
-        .llong .sys_write
-        .llong .compat_sys_open         /* 5 */
-        .llong .sys_close
-        .llong .sys32_waitpid
-        .llong .sys32_creat
-        .llong .sys_link
-        .llong .sys_unlink              /* 10 */
-        .llong .sys32_execve
-        .llong .sys_chdir
-        .llong .compat_sys_time
-        .llong .sys_mknod
-        .llong .sys_chmod               /* 15 */
-        .llong .sys_lchown
-        .llong .sys_ni_syscall          /* old break syscall */
-        .llong .sys_ni_syscall          /* old stat syscall */
-        .llong .ppc32_lseek
-        .llong .sys_getpid              /* 20 */
-        .llong .compat_sys_mount
-        .llong .sys_oldumount
-        .llong .sys_setuid
-        .llong .sys_getuid
-        .llong .compat_sys_stime        /* 25 */
-        .llong .sys32_ptrace
-        .llong .sys_alarm
-        .llong .sys_ni_syscall          /* old fstat syscall */
-        .llong .sys32_pause
-        .llong .compat_sys_utime                /* 30 */
-        .llong .sys_ni_syscall          /* old stty syscall */
-        .llong .sys_ni_syscall          /* old gtty syscall */
-        .llong .sys32_access
-        .llong .sys32_nice
-        .llong .sys_ni_syscall          /* 35 - old ftime syscall */
-        .llong .sys_sync
-        .llong .sys32_kill
-        .llong .sys_rename
-        .llong .sys32_mkdir
-        .llong .sys_rmdir               /* 40 */
-        .llong .sys_dup
-        .llong .sys_pipe
-        .llong .compat_sys_times
-        .llong .sys_ni_syscall          /* old prof syscall */
-        .llong .sys_brk                 /* 45 */
-        .llong .sys_setgid
-        .llong .sys_getgid
-        .llong .sys_signal
-        .llong .sys_geteuid
-        .llong .sys_getegid             /* 50 */
-        .llong .sys_acct
-        .llong .sys_umount
-        .llong .sys_ni_syscall          /* old lock syscall */
-        .llong .compat_sys_ioctl
-        .llong .compat_sys_fcntl                /* 55 */
-        .llong .sys_ni_syscall          /* old mpx syscall */
-        .llong .sys32_setpgid
-        .llong .sys_ni_syscall          /* old ulimit syscall */
-        .llong .sys32_olduname
-        .llong .sys32_umask             /* 60 */
-        .llong .sys_chroot
-        .llong .sys_ustat
-        .llong .sys_dup2
-        .llong .sys_getppid
-        .llong .sys_getpgrp             /* 65 */
-        .llong .sys_setsid
-        .llong .sys32_sigaction
-        .llong .sys_sgetmask
-        .llong .sys32_ssetmask
-        .llong .sys_setreuid            /* 70 */
-        .llong .sys_setregid
-        .llong .ppc32_sigsuspend
-        .llong .compat_sys_sigpending
-        .llong .sys32_sethostname
-        .llong .compat_sys_setrlimit            /* 75 */
-        .llong .compat_sys_old_getrlimit
-        .llong .compat_sys_getrusage
-        .llong .sys32_gettimeofday
-        .llong .sys32_settimeofday
-        .llong .sys32_getgroups         /* 80 */
-        .llong .sys32_setgroups
-        .llong .sys_ni_syscall          /* old select syscall */
-        .llong .sys_symlink
-        .llong .sys_ni_syscall          /* old lstat syscall */
-        .llong .sys32_readlink          /* 85 */
-        .llong .sys_uselib
-        .llong .sys_swapon
-        .llong .sys_reboot
-        .llong .old32_readdir
-        .llong .sys_mmap                /* 90 */
-        .llong .sys_munmap
-        .llong .sys_truncate
-        .llong .sys_ftruncate
-        .llong .sys_fchmod
-        .llong .sys_fchown              /* 95 */
-        .llong .sys32_getpriority
-        .llong .sys32_setpriority
-        .llong .sys_ni_syscall          /* old profil syscall */
-        .llong .compat_sys_statfs
-        .llong .compat_sys_fstatfs              /* 100 */
-        .llong .sys_ni_syscall          /* old ioperm syscall */
-        .llong .compat_sys_socketcall
-        .llong .sys32_syslog
-        .llong .compat_sys_setitimer
-        .llong .compat_sys_getitimer            /* 105 */
-        .llong .compat_sys_newstat
-        .llong .compat_sys_newlstat
-        .llong .compat_sys_newfstat
-        .llong .sys32_uname
-        .llong .sys_ni_syscall          /* 110 old iopl syscall */
-        .llong .sys_vhangup
-        .llong .sys_ni_syscall          /* old idle syscall */
-        .llong .sys_ni_syscall          /* old vm86 syscall */
-        .llong .compat_sys_wait4
-        .llong .sys_swapoff             /* 115 */
-        .llong .sys32_sysinfo
-        .llong .sys32_ipc
-        .llong .sys_fsync
-        .llong .ppc32_sigreturn
-        .llong .ppc_clone               /* 120 */
-        .llong .sys32_setdomainname
-        .llong .ppc64_newuname
-        .llong .sys_ni_syscall          /* old modify_ldt syscall */
-        .llong .sys32_adjtimex
-        .llong .sys_mprotect            /* 125 */
-        .llong .compat_sys_sigprocmask
-        .llong .sys_ni_syscall          /* old create_module syscall */
-        .llong .sys_init_module
-        .llong .sys_delete_module
-        .llong .sys_ni_syscall          /* 130 old get_kernel_syms syscall */
-        .llong .sys_quotactl
-        .llong .sys32_getpgid
-        .llong .sys_fchdir
-        .llong .sys_bdflush
-        .llong .sys32_sysfs             /* 135 */
-        .llong .ppc64_personality
-        .llong .sys_ni_syscall          /* for afs_syscall */
-        .llong .sys_setfsuid
-        .llong .sys_setfsgid
-        .llong .sys_llseek              /* 140 */
-        .llong .sys32_getdents
-        .llong .ppc32_select
-        .llong .sys_flock
-        .llong .sys_msync
-        .llong .compat_sys_readv        /* 145 */
-        .llong .compat_sys_writev
-        .llong .sys32_getsid
-        .llong .sys_fdatasync
-        .llong .sys32_sysctl
-        .llong .sys_mlock               /* 150 */
-        .llong .sys_munlock
-        .llong .sys_mlockall
-        .llong .sys_munlockall
-        .llong .sys32_sched_setparam
-        .llong .sys32_sched_getparam    /* 155 */
-        .llong .sys32_sched_setscheduler
-        .llong .sys32_sched_getscheduler
-        .llong .sys_sched_yield
-        .llong .sys32_sched_get_priority_max
-        .llong .sys32_sched_get_priority_min  /* 160 */
-        .llong .sys32_sched_rr_get_interval
-        .llong .compat_sys_nanosleep
-        .llong .sys_mremap
-        .llong .sys_setresuid
-        .llong .sys_getresuid           /* 165 */
-        .llong .sys_ni_syscall          /* old query_module syscall */
-        .llong .sys_poll
-        .llong .compat_sys_nfsservctl
-        .llong .sys_setresgid
-        .llong .sys_getresgid           /* 170 */
-        .llong .sys32_prctl
-        .llong .ppc32_rt_sigreturn
-        .llong .sys32_rt_sigaction
-        .llong .sys32_rt_sigprocmask
-        .llong .sys32_rt_sigpending     /* 175 */
-        .llong .compat_sys_rt_sigtimedwait
-        .llong .sys32_rt_sigqueueinfo
-        .llong .ppc32_rt_sigsuspend
-        .llong .sys32_pread64
-        .llong .sys32_pwrite64          /* 180 */
-        .llong .sys_chown
-        .llong .sys_getcwd
-        .llong .sys_capget
-        .llong .sys_capset
-        .llong .sys32_sigaltstack       /* 185 */
-        .llong .sys32_sendfile
-        .llong .sys_ni_syscall          /* reserved for streams1 */
-        .llong .sys_ni_syscall          /* reserved for streams2 */
-        .llong .ppc_vfork
-        .llong .compat_sys_getrlimit            /* 190 */
-        .llong .sys32_readahead
-        .llong .sys32_mmap2
-        .llong .sys32_truncate64
-        .llong .sys32_ftruncate64
-        .llong .sys_stat64              /* 195 */
-        .llong .sys_lstat64
-        .llong .sys_fstat64
-        .llong .sys32_pciconfig_read
-        .llong .sys32_pciconfig_write
-        .llong .sys32_pciconfig_iobase  /* 200 - pciconfig_iobase */
-        .llong .sys_ni_syscall          /* reserved for MacOnLinux */
-        .llong .sys_getdents64
-        .llong .sys_pivot_root
-        .llong .compat_sys_fcntl64
-        .llong .sys_madvise             /* 205 */
-        .llong .sys_mincore
-        .llong .sys_gettid
-        .llong .sys_tkill
-        .llong .sys_setxattr
-        .llong .sys_lsetxattr           /* 210 */
-        .llong .sys_fsetxattr
-        .llong .sys_getxattr
-        .llong .sys_lgetxattr
-        .llong .sys_fgetxattr
-        .llong .sys_listxattr           /* 215 */
-        .llong .sys_llistxattr
-        .llong .sys_flistxattr
-        .llong .sys_removexattr
-        .llong .sys_lremovexattr
-        .llong .sys_fremovexattr        /* 220 */
-        .llong .compat_sys_futex
-        .llong .compat_sys_sched_setaffinity
-        .llong .compat_sys_sched_getaffinity
-        .llong .sys_ni_syscall
-        .llong .sys_ni_syscall          /* 225 - reserved for tux */
-        .llong .sys32_sendfile64
-        .llong .compat_sys_io_setup
-        .llong .sys_io_destroy
-        .llong .compat_sys_io_getevents
-        .llong .compat_sys_io_submit
-        .llong .sys_io_cancel
-        .llong .sys_set_tid_address
-        .llong .ppc32_fadvise64
-        .llong .sys_exit_group
-        .llong .ppc32_lookup_dcookie    /* 235 */
-        .llong .sys_epoll_create
-        .llong .sys_epoll_ctl
-        .llong .sys_epoll_wait
-        .llong .sys_remap_file_pages
-        .llong .ppc32_timer_create      /* 240 */
-        .llong .compat_sys_timer_settime
-        .llong .compat_sys_timer_gettime
-        .llong .sys_timer_getoverrun
-        .llong .sys_timer_delete
-        .llong .compat_sys_clock_settime        /* 245 */
-        .llong .compat_sys_clock_gettime
-        .llong .compat_sys_clock_getres
-        .llong .compat_sys_clock_nanosleep
-        .llong .ppc32_swapcontext
-        .llong .sys32_tgkill            /* 250 */
-        .llong .sys32_utimes
-        .llong .compat_sys_statfs64
-        .llong .compat_sys_fstatfs64
-        .llong .ppc32_fadvise64_64      /* 32bit only fadvise64_64 */
-        .llong .ppc_rtas                /* 255 */
-        .llong .sys_ni_syscall          /* 256 reserved for sys_debug_setcontext */
-        .llong .sys_ni_syscall          /* 257 reserved for vserver */
-        .llong .sys_ni_syscall          /* 258 reserved for new sys_remap_file_pages */
-        .llong .compat_sys_mbind
-        .llong .compat_sys_get_mempolicy        /* 260 */
-        .llong .compat_sys_set_mempolicy
-        .llong .compat_sys_mq_open
-        .llong .sys_mq_unlink
-        .llong .compat_sys_mq_timedsend
-        .llong .compat_sys_mq_timedreceive /* 265 */
-        .llong .compat_sys_mq_notify
-        .llong .compat_sys_mq_getsetattr
-        .llong .compat_sys_kexec_load
-        .llong .sys32_add_key
-        .llong .sys32_request_key       /* 270 */
-        .llong .compat_sys_keyctl
-        .llong .compat_sys_waitid
-        .llong .sys32_ioprio_set
-        .llong .sys32_ioprio_get
-        .llong .sys_inotify_init        /* 275 */
-        .llong .sys_inotify_add_watch
-        .llong .sys_inotify_rm_watch
-
-        .balign 8
-_GLOBAL(sys_call_table)
-        .llong .sys_restart_syscall     /* 0 */
-        .llong .sys_exit
-        .llong .ppc_fork
-        .llong .sys_read
-        .llong .sys_write
-        .llong .sys_open                /* 5 */
-        .llong .sys_close
-        .llong .sys_waitpid
-        .llong .sys_creat
-        .llong .sys_link
-        .llong .sys_unlink              /* 10 */
-        .llong .sys_execve
-        .llong .sys_chdir
-        .llong .sys64_time
-        .llong .sys_mknod
-        .llong .sys_chmod               /* 15 */
-        .llong .sys_lchown
-        .llong .sys_ni_syscall          /* old break syscall */
-        .llong .sys_ni_syscall          /* old stat syscall */
-        .llong .sys_lseek
-        .llong .sys_getpid              /* 20 */
-        .llong .sys_mount
-        .llong .sys_ni_syscall          /* old umount syscall */
-        .llong .sys_setuid
-        .llong .sys_getuid
-        .llong .sys_stime               /* 25 */
-        .llong .sys_ptrace
-        .llong .sys_alarm
-        .llong .sys_ni_syscall          /* old fstat syscall */
-        .llong .sys_pause
-        .llong .sys_utime               /* 30 */
-        .llong .sys_ni_syscall          /* old stty syscall */
-        .llong .sys_ni_syscall          /* old gtty syscall */
-        .llong .sys_access
-        .llong .sys_nice
-        .llong .sys_ni_syscall          /* 35 - old ftime syscall */
-        .llong .sys_sync
-        .llong .sys_kill
-        .llong .sys_rename
-        .llong .sys_mkdir
-        .llong .sys_rmdir               /* 40 */
-        .llong .sys_dup
-        .llong .sys_pipe
-        .llong .sys_times
-        .llong .sys_ni_syscall          /* old prof syscall */
-        .llong .sys_brk                 /* 45 */
-        .llong .sys_setgid
-        .llong .sys_getgid
-        .llong .sys_signal
-        .llong .sys_geteuid
-        .llong .sys_getegid             /* 50 */
-        .llong .sys_acct
-        .llong .sys_umount
-        .llong .sys_ni_syscall          /* old lock syscall */
-        .llong .sys_ioctl
-        .llong .sys_fcntl               /* 55 */
-        .llong .sys_ni_syscall          /* old mpx syscall */
-        .llong .sys_setpgid
-        .llong .sys_ni_syscall          /* old ulimit syscall */
-        .llong .sys_ni_syscall          /* old uname syscall */
-        .llong .sys_umask               /* 60 */
-        .llong .sys_chroot
-        .llong .sys_ustat
-        .llong .sys_dup2
-        .llong .sys_getppid
-        .llong .sys_getpgrp             /* 65 */
-        .llong .sys_setsid
-        .llong .sys_ni_syscall
-        .llong .sys_sgetmask
-        .llong .sys_ssetmask
-        .llong .sys_setreuid            /* 70 */
-        .llong .sys_setregid
-        .llong .sys_ni_syscall
-        .llong .sys_ni_syscall
-        .llong .sys_sethostname
-        .llong .sys_setrlimit           /* 75 */
-        .llong .sys_ni_syscall          /* old getrlimit syscall */
-        .llong .sys_getrusage
-        .llong .sys_gettimeofday
-        .llong .sys_settimeofday
-        .llong .sys_getgroups           /* 80 */
-        .llong .sys_setgroups
-        .llong .sys_ni_syscall          /* old select syscall */
-        .llong .sys_symlink
-        .llong .sys_ni_syscall          /* old lstat syscall */
-        .llong .sys_readlink            /* 85 */
-        .llong .sys_uselib
-        .llong .sys_swapon
-        .llong .sys_reboot
-        .llong .sys_ni_syscall          /* old readdir syscall */
-        .llong .sys_mmap                /* 90 */
-        .llong .sys_munmap
-        .llong .sys_truncate
-        .llong .sys_ftruncate
-        .llong .sys_fchmod
-        .llong .sys_fchown              /* 95 */
-        .llong .sys_getpriority
-        .llong .sys_setpriority
-        .llong .sys_ni_syscall          /* old profil syscall holder */
-        .llong .sys_statfs
-        .llong .sys_fstatfs             /* 100 */
-        .llong .sys_ni_syscall          /* old ioperm syscall */
-        .llong .sys_socketcall
-        .llong .sys_syslog
-        .llong .sys_setitimer
-        .llong .sys_getitimer           /* 105 */
-        .llong .sys_newstat
-        .llong .sys_newlstat
-        .llong .sys_newfstat
-        .llong .sys_ni_syscall          /* old uname syscall */
-        .llong .sys_ni_syscall          /* 110 old iopl syscall */
-        .llong .sys_vhangup
-        .llong .sys_ni_syscall          /* old idle syscall */
-        .llong .sys_ni_syscall          /* old vm86 syscall */
-        .llong .sys_wait4
-        .llong .sys_swapoff             /* 115 */
-        .llong .sys_sysinfo
-        .llong .sys_ipc
-        .llong .sys_fsync
-        .llong .sys_ni_syscall
-        .llong .ppc_clone               /* 120 */
-        .llong .sys_setdomainname
-        .llong .ppc64_newuname
-        .llong .sys_ni_syscall          /* old modify_ldt syscall */
-        .llong .sys_adjtimex
-        .llong .sys_mprotect            /* 125 */
-        .llong .sys_ni_syscall
-        .llong .sys_ni_syscall          /* old create_module syscall */
-        .llong .sys_init_module
-        .llong .sys_delete_module
-        .llong .sys_ni_syscall          /* 130 old get_kernel_syms syscall */
-        .llong .sys_quotactl
-        .llong .sys_getpgid
-        .llong .sys_fchdir
-        .llong .sys_bdflush
-        .llong .sys_sysfs               /* 135 */
-        .llong .ppc64_personality
-        .llong .sys_ni_syscall          /* for afs_syscall */
-        .llong .sys_setfsuid
-        .llong .sys_setfsgid
-        .llong .sys_llseek              /* 140 */
-        .llong .sys_getdents
-        .llong .sys_select
-        .llong .sys_flock
-        .llong .sys_msync
-        .llong .sys_readv               /* 145 */
-        .llong .sys_writev
-        .llong .sys_getsid
-        .llong .sys_fdatasync
-        .llong .sys_sysctl
-        .llong .sys_mlock               /* 150 */
-        .llong .sys_munlock
-        .llong .sys_mlockall
-        .llong .sys_munlockall
-        .llong .sys_sched_setparam
-        .llong .sys_sched_getparam      /* 155 */
-        .llong .sys_sched_setscheduler
-        .llong .sys_sched_getscheduler
-        .llong .sys_sched_yield
-        .llong .sys_sched_get_priority_max
-        .llong .sys_sched_get_priority_min  /* 160 */
-        .llong .sys_sched_rr_get_interval
-        .llong .sys_nanosleep
-        .llong .sys_mremap
-        .llong .sys_setresuid
-        .llong .sys_getresuid           /* 165 */
-        .llong .sys_ni_syscall          /* old query_module syscall */
-        .llong .sys_poll
-        .llong .sys_nfsservctl
-        .llong .sys_setresgid
-        .llong .sys_getresgid           /* 170 */
-        .llong .sys_prctl
-        .llong .ppc64_rt_sigreturn
-        .llong .sys_rt_sigaction
-        .llong .sys_rt_sigprocmask      
-        .llong .sys_rt_sigpending       /* 175 */
-        .llong .sys_rt_sigtimedwait
-        .llong .sys_rt_sigqueueinfo
-        .llong .ppc64_rt_sigsuspend
-        .llong .sys_pread64
-        .llong .sys_pwrite64            /* 180 */
-        .llong .sys_chown
-        .llong .sys_getcwd
-        .llong .sys_capget
-        .llong .sys_capset
-        .llong .sys_sigaltstack         /* 185 */
-        .llong .sys_sendfile64
-        .llong .sys_ni_syscall          /* reserved for streams1 */
-        .llong .sys_ni_syscall          /* reserved for streams2 */
-        .llong .ppc_vfork
-        .llong .sys_getrlimit           /* 190 */
-        .llong .sys_readahead
-        .llong .sys_ni_syscall          /* 32bit only mmap2 */
-        .llong .sys_ni_syscall          /* 32bit only truncate64 */
-        .llong .sys_ni_syscall          /* 32bit only ftruncate64 */
-        .llong .sys_ni_syscall          /* 195 - 32bit only stat64 */
-        .llong .sys_ni_syscall          /* 32bit only lstat64 */
-        .llong .sys_ni_syscall          /* 32bit only fstat64 */
-        .llong .sys_pciconfig_read
-        .llong .sys_pciconfig_write
-        .llong .sys_pciconfig_iobase    /* 200 - pciconfig_iobase */
-        .llong .sys_ni_syscall          /* reserved for MacOnLinux */
-        .llong .sys_getdents64
-        .llong .sys_pivot_root
-        .llong .sys_ni_syscall          /* 32bit only fcntl64 */
-        .llong .sys_madvise             /* 205 */
-        .llong .sys_mincore
-        .llong .sys_gettid
-        .llong .sys_tkill
-        .llong .sys_setxattr
-        .llong .sys_lsetxattr           /* 210 */
-        .llong .sys_fsetxattr
-        .llong .sys_getxattr
-        .llong .sys_lgetxattr
-        .llong .sys_fgetxattr
-        .llong .sys_listxattr           /* 215 */
-        .llong .sys_llistxattr
-        .llong .sys_flistxattr
-        .llong .sys_removexattr
-        .llong .sys_lremovexattr
-        .llong .sys_fremovexattr        /* 220 */
-        .llong .sys_futex
-        .llong .sys_sched_setaffinity
-        .llong .sys_sched_getaffinity
-        .llong .sys_ni_syscall
-        .llong .sys_ni_syscall          /* 225 - reserved for tux */
-        .llong .sys_ni_syscall          /* 32bit only sendfile64 */
-        .llong .sys_io_setup
-        .llong .sys_io_destroy
-        .llong .sys_io_getevents
-        .llong .sys_io_submit           /* 230 */
-        .llong .sys_io_cancel
-        .llong .sys_set_tid_address
-        .llong .sys_fadvise64
-        .llong .sys_exit_group
-        .llong .sys_lookup_dcookie      /* 235 */
-        .llong .sys_epoll_create
-        .llong .sys_epoll_ctl
-        .llong .sys_epoll_wait
-        .llong .sys_remap_file_pages
-        .llong .sys_timer_create        /* 240 */
-        .llong .sys_timer_settime
-        .llong .sys_timer_gettime
-        .llong .sys_timer_getoverrun
-        .llong .sys_timer_delete
-        .llong .sys_clock_settime       /* 245 */
-        .llong .sys_clock_gettime
-        .llong .sys_clock_getres
-        .llong .sys_clock_nanosleep
-        .llong .ppc64_swapcontext
-        .llong .sys_tgkill              /* 250 */
-        .llong .sys_utimes
-        .llong .sys_statfs64
-        .llong .sys_fstatfs64
-        .llong .sys_ni_syscall          /* 32bit only fadvise64_64 */
-        .llong .ppc_rtas                /* 255 */
-        .llong .sys_ni_syscall          /* 256 reserved for sys_debug_setcontext */
-        .llong .sys_ni_syscall          /* 257 reserved for vserver */
-        .llong .sys_ni_syscall          /* 258 reserved for new sys_remap_file_pages */
-        .llong .sys_mbind
-        .llong .sys_get_mempolicy       /* 260 */
-        .llong .sys_set_mempolicy
-        .llong .sys_mq_open
-        .llong .sys_mq_unlink
-        .llong .sys_mq_timedsend
-        .llong .sys_mq_timedreceive     /* 265 */
-        .llong .sys_mq_notify
-        .llong .sys_mq_getsetattr
-        .llong .sys_kexec_load
-        .llong .sys_add_key
-        .llong .sys_request_key         /* 270 */
-        .llong .sys_keyctl
-        .llong .sys_waitid
-        .llong .sys_ioprio_set
-        .llong .sys_ioprio_get
-        .llong .sys_inotify_init        /* 275 */
-        .llong .sys_inotify_add_watch
-        .llong .sys_inotify_rm_watch
diff --git a/arch/ppc64/kernel/mpic.h b/arch/ppc64/kernel/mpic.h
deleted file mode 100644
index ca78a7f10528..000000000000
--- a/arch/ppc64/kernel/mpic.h
+++ /dev/null
@@ -1,273 +0,0 @@
-#include <linux/irq.h>
-
-/*
- * Global registers
- */
-
-#define MPIC_GREG_BASE                  0x01000
-
-#define MPIC_GREG_FEATURE_0             0x00000
-#define         MPIC_GREG_FEATURE_LAST_SRC_MASK         0x07ff0000
-#define         MPIC_GREG_FEATURE_LAST_SRC_SHIFT        16
-#define         MPIC_GREG_FEATURE_LAST_CPU_MASK         0x00001f00
-#define         MPIC_GREG_FEATURE_LAST_CPU_SHIFT        8
-#define         MPIC_GREG_FEATURE_VERSION_MASK          0xff
-#define MPIC_GREG_FEATURE_1             0x00010
-#define MPIC_GREG_GLOBAL_CONF_0         0x00020
-#define         MPIC_GREG_GCONF_RESET                   0x80000000
-#define         MPIC_GREG_GCONF_8259_PTHROU_DIS         0x20000000
-#define         MPIC_GREG_GCONF_BASE_MASK               0x000fffff
-#define MPIC_GREG_GLOBAL_CONF_1         0x00030
-#define MPIC_GREG_VENDOR_0              0x00040
-#define MPIC_GREG_VENDOR_1              0x00050
-#define MPIC_GREG_VENDOR_2              0x00060
-#define MPIC_GREG_VENDOR_3              0x00070
-#define MPIC_GREG_VENDOR_ID             0x00080
-#define         MPIC_GREG_VENDOR_ID_STEPPING_MASK       0x00ff0000
-#define         MPIC_GREG_VENDOR_ID_STEPPING_SHIFT      16
-#define         MPIC_GREG_VENDOR_ID_DEVICE_ID_MASK      0x0000ff00
-#define         MPIC_GREG_VENDOR_ID_DEVICE_ID_SHIFT     8
-#define         MPIC_GREG_VENDOR_ID_VENDOR_ID_MASK      0x000000ff
-#define MPIC_GREG_PROCESSOR_INIT        0x00090
-#define MPIC_GREG_IPI_VECTOR_PRI_0      0x000a0
-#define MPIC_GREG_IPI_VECTOR_PRI_1      0x000b0
-#define MPIC_GREG_IPI_VECTOR_PRI_2      0x000c0
-#define MPIC_GREG_IPI_VECTOR_PRI_3      0x000d0
-#define MPIC_GREG_SPURIOUS              0x000e0
-#define MPIC_GREG_TIMER_FREQ            0x000f0
-
-/*
- *
- * Timer registers
- */
-#define MPIC_TIMER_BASE                 0x01100
-#define MPIC_TIMER_STRIDE               0x40
-
-#define MPIC_TIMER_CURRENT_CNT          0x00000
-#define MPIC_TIMER_BASE_CNT             0x00010
-#define MPIC_TIMER_VECTOR_PRI           0x00020
-#define MPIC_TIMER_DESTINATION          0x00030
-
-/*
- * Per-Processor registers
- */
-
-#define MPIC_CPU_THISBASE               0x00000
-#define MPIC_CPU_BASE                   0x20000
-#define MPIC_CPU_STRIDE                 0x01000
-
-#define MPIC_CPU_IPI_DISPATCH_0         0x00040
-#define MPIC_CPU_IPI_DISPATCH_1         0x00050
-#define MPIC_CPU_IPI_DISPATCH_2         0x00060
-#define MPIC_CPU_IPI_DISPATCH_3         0x00070
-#define MPIC_CPU_CURRENT_TASK_PRI       0x00080
-#define         MPIC_CPU_TASKPRI_MASK                   0x0000000f
-#define MPIC_CPU_WHOAMI                 0x00090
-#define         MPIC_CPU_WHOAMI_MASK                    0x0000001f
-#define MPIC_CPU_INTACK                 0x000a0
-#define MPIC_CPU_EOI                    0x000b0
-
-/*
- * Per-source registers
- */
-
-#define MPIC_IRQ_BASE                   0x10000
-#define MPIC_IRQ_STRIDE                 0x00020
-#define MPIC_IRQ_VECTOR_PRI             0x00000
-#define         MPIC_VECPRI_MASK                        0x80000000
-#define         MPIC_VECPRI_ACTIVITY                    0x40000000      /* Read Only */
-#define         MPIC_VECPRI_PRIORITY_MASK               0x000f0000
-#define         MPIC_VECPRI_PRIORITY_SHIFT              16
-#define         MPIC_VECPRI_VECTOR_MASK                 0x000007ff
-#define         MPIC_VECPRI_POLARITY_POSITIVE           0x00800000
-#define         MPIC_VECPRI_POLARITY_NEGATIVE           0x00000000
-#define         MPIC_VECPRI_POLARITY_MASK               0x00800000
-#define         MPIC_VECPRI_SENSE_LEVEL                 0x00400000
-#define         MPIC_VECPRI_SENSE_EDGE                  0x00000000
-#define         MPIC_VECPRI_SENSE_MASK                  0x00400000
-#define MPIC_IRQ_DESTINATION            0x00010
-
-#define MPIC_MAX_IRQ_SOURCES    2048
-#define MPIC_MAX_CPUS           32
-#define MPIC_MAX_ISU            32
-
-/*
- * Special vector numbers (internal use only)
- */
-#define MPIC_VEC_SPURRIOUS      255
-#define MPIC_VEC_IPI_3          254
-#define MPIC_VEC_IPI_2          253
-#define MPIC_VEC_IPI_1          252
-#define MPIC_VEC_IPI_0          251
-
-/* unused */
-#define MPIC_VEC_TIMER_3        250
-#define MPIC_VEC_TIMER_2        249
-#define MPIC_VEC_TIMER_1        248
-#define MPIC_VEC_TIMER_0        247
-
-/* Type definition of the cascade handler */
-typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data);
-
-#ifdef CONFIG_MPIC_BROKEN_U3
-/* Fixup table entry */
-struct mpic_irq_fixup
-{
-        u8 __iomem      *base;
-        unsigned int   irq;
-};
-#endif /* CONFIG_MPIC_BROKEN_U3 */
-
-
-/* The instance data of a given MPIC */
-struct mpic
-{
-        /* The "linux" controller struct */
-        hw_irq_controller       hc_irq;
-#ifdef CONFIG_SMP
-        hw_irq_controller       hc_ipi;
-#endif
-        const char              *name;
-        /* Flags */
-        unsigned int            flags;
-        /* How many irq sources in a given ISU */
-        unsigned int            isu_size;
-        unsigned int            isu_shift;
-        unsigned int            isu_mask;
-        /* Offset of irq vector numbers */
-        unsigned int            irq_offset;     
-        unsigned int            irq_count;
-        /* Offset of ipi vector numbers */
-        unsigned int            ipi_offset;
-        /* Number of sources */
-        unsigned int            num_sources;
-        /* Number of CPUs */
-        unsigned int            num_cpus;
-        /* cascade handler */
-        mpic_cascade_t          cascade;
-        void                    *cascade_data;
-        unsigned int            cascade_vec;
-        /* senses array */
-        unsigned char           *senses;
-        unsigned int            senses_count;
-
-#ifdef CONFIG_MPIC_BROKEN_U3
-        /* The fixup table */
-        struct mpic_irq_fixup   *fixups;
-        spinlock_t              fixup_lock;
-#endif
-
-        /* The various ioremap'ed bases */
-        volatile u32 __iomem    *gregs;
-        volatile u32 __iomem    *tmregs;
-        volatile u32 __iomem    *cpuregs[MPIC_MAX_CPUS];
-        volatile u32 __iomem    *isus[MPIC_MAX_ISU];
-
-        /* link */
-        struct mpic             *next;
-};
-
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
- */
-#define MPIC_PRIMARY                    0x00000001
-/* Set this for a big-endian MPIC */
-#define MPIC_BIG_ENDIAN                 0x00000002
-/* Broken U3 MPIC */
-#define MPIC_BROKEN_U3                  0x00000004
-/* Broken IPI registers (autodetected) */
-#define MPIC_BROKEN_IPI                 0x00000008
-/* MPIC wants a reset */
-#define MPIC_WANTS_RESET                0x00000010
-
-/* Allocate the controller structure and setup the linux irq descs
- * for the range if interrupts passed in. No HW initialization is
- * actually performed.
- * 
- * @phys_addr:  physial base address of the MPIC
- * @flags:      flags, see constants above
- * @isu_size:   number of interrupts in an ISU. Use 0 to use a
- *              standard ISU-less setup (aka powermac)
- * @irq_offset: first irq number to assign to this mpic
- * @irq_count:  number of irqs to use with this mpic IRQ sources. Pass 0
- *              to match the number of sources
- * @ipi_offset: first irq number to assign to this mpic IPI sources,
- *              used only on primary mpic
- * @senses:     array of sense values
- * @senses_num: number of entries in the array
- *
- * Note about the sense array. If none is passed, all interrupts are
- * setup to be level negative unless MPIC_BROKEN_U3 is set in which
- * case they are edge positive (and the array is ignored anyway).
- * The values in the array start at the first source of the MPIC,
- * that is senses[0] correspond to linux irq "irq_offset".
- */
-extern struct mpic *mpic_alloc(unsigned long phys_addr,
-                               unsigned int flags,
-                               unsigned int isu_size,
-                               unsigned int irq_offset,
-                               unsigned int irq_count,
-                               unsigned int ipi_offset,
-                               unsigned char *senses,
-                               unsigned int senses_num,
-                               const char *name);
-
-/* Assign ISUs, to call before mpic_init()
- *
- * @mpic:       controller structure as returned by mpic_alloc()
- * @isu_num:    ISU number
- * @phys_addr:  physical address of the ISU
- */
-extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
-                            unsigned long phys_addr);
-
-/* Initialize the controller. After this has been called, none of the above
- * should be called again for this mpic
- */
-extern void mpic_init(struct mpic *mpic);
-
-/* Setup a cascade. Currently, only one cascade is supported this
- * way, though you can always do a normal request_irq() and add
- * other cascades this way. You should call this _after_ having
- * added all the ISUs
- *
- * @irq_no:     "linux" irq number of the cascade (that is offset'ed vector)
- * @handler:    cascade handler function
- */
-extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder,
-                               void *data);
-
-/*
- * All of the following functions must only be used after the
- * ISUs have been assigned and the controller fully initialized
- * with mpic_init()
- */
-
-
-/* Change/Read the priority of an interrupt. Default is 8 for irqs and
- * 10 for IPIs. You can call this on both IPIs and IRQ numbers, but the
- * IPI number is then the offset'ed (linux irq number mapped to the IPI)
- */
-extern void mpic_irq_set_priority(unsigned int irq, unsigned int pri);
-extern unsigned int mpic_irq_get_priority(unsigned int irq);
-
-/* Setup a non-boot CPU */
-extern void mpic_setup_this_cpu(void);
-
-/* Clean up for kexec (or cpu offline or ...) */
-extern void mpic_teardown_this_cpu(int secondary);
-
-/* Request IPIs on primary mpic */
-extern void mpic_request_ipis(void);
-
-/* Send an IPI (non offseted number 0..3) */
-extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask);
-
-/* Fetch interrupt from a given mpic */
-extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs);
-/* This one gets to the primary mpic */
-extern int mpic_get_irq(struct pt_regs *regs);
-
-/* global mpic for pSeries */
-extern struct mpic *pSeries_mpic;
diff --git a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c
index ff4be1da69d5..3d2106b022a1 100644
--- a/arch/ppc64/kernel/pci.c
+++ b/arch/ppc64/kernel/pci.c
@@ -31,8 +31,7 @@
 #include <asm/irq.h>
 #include <asm/machdep.h>
 #include <asm/udbg.h>
-
-#include "pci.h"
+#include <asm/ppc-pci.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -727,16 +726,17 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
  * above routine
  */
 pgprot_t pci_phys_mem_access_prot(struct file *file,
-                                  unsigned long offset,
+                                  unsigned long pfn,
                                   unsigned long size,
                                   pgprot_t protection)
 {
         struct pci_dev *pdev = NULL;
         struct resource *found = NULL;
         unsigned long prot = pgprot_val(protection);
+        unsigned long offset = pfn << PAGE_SHIFT;
         int i;
 
-        if (page_is_ram(offset >> PAGE_SHIFT))
+        if (page_is_ram(pfn))
                 return __pgprot(prot);
 
         prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
@@ -881,9 +881,9 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
 }
 
 void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
-                                            struct device_node *dev)
+                                            struct device_node *dev, int prim)
 {
-        unsigned int *ranges;
+        unsigned int *ranges, pci_space;
         unsigned long size;
         int rlen = 0;
         int memno = 0;
@@ -906,16 +906,39 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
         ranges = (unsigned int *) get_property(dev, "ranges", &rlen);
         while ((rlen -= np * sizeof(unsigned int)) >= 0) {
                 res = NULL;
-                pci_addr = (unsigned long)ranges[1] << 32 | ranges[2];
+                pci_space = ranges[0];
+                pci_addr = ((unsigned long)ranges[1] << 32) | ranges[2];
 
                 cpu_phys_addr = ranges[3];
-                if (na == 2)
-                        cpu_phys_addr = cpu_phys_addr << 32 | ranges[4];
+                if (na >= 2)
+                        cpu_phys_addr = (cpu_phys_addr << 32) | ranges[4];
 
-                size = (unsigned long)ranges[na+3] << 32 | ranges[na+4];
+                size = ((unsigned long)ranges[na+3] << 32) | ranges[na+4];
+                ranges += np;
                 if (size == 0)
                         continue;
-                switch ((ranges[0] >> 24) & 0x3) {
+
+                /* Now consume following elements while they are contiguous */
+                while (rlen >= np * sizeof(unsigned int)) {
+                        unsigned long addr, phys;
+
+                        if (ranges[0] != pci_space)
+                                break;
+                        addr = ((unsigned long)ranges[1] << 32) | ranges[2];
+                        phys = ranges[3];
+                        if (na >= 2)
+                                phys = (phys << 32) | ranges[4];
+                        if (addr != pci_addr + size ||
+                            phys != cpu_phys_addr + size)
+                                break;
+
+                        size += ((unsigned long)ranges[na+3] << 32)
+                                | ranges[na+4];
+                        ranges += np;
+                        rlen -= np * sizeof(unsigned int);
+                }
+
+                switch ((pci_space >> 24) & 0x3) {
                 case 1:         /* I/O space */
                         hose->io_base_phys = cpu_phys_addr;
                         hose->pci_io_size = size;
@@ -949,7 +972,6 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
                         res->sibling = NULL;
                         res->child = NULL;
                 }
-                ranges += np;
         }
 }
 
diff --git a/arch/ppc64/kernel/pci.h b/arch/ppc64/kernel/pci.h
deleted file mode 100644
index 5eb2cc320566..000000000000
--- a/arch/ppc64/kernel/pci.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * c 2001 PPC 64 Team, IBM Corp
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- */
-#ifndef __PPC_KERNEL_PCI_H__
-#define __PPC_KERNEL_PCI_H__
-
-#include <linux/pci.h>
-#include <asm/pci-bridge.h>
-
-extern unsigned long isa_io_base;
-
-extern void pci_setup_pci_controller(struct pci_controller *hose);
-extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
-extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
-
-
-extern struct list_head hose_list;
-extern int global_phb_number;
-
-extern unsigned long find_and_init_phbs(void);
-
-extern struct pci_dev *ppc64_isabridge_dev;     /* may be NULL if no ISA bus */
-
-/* PCI device_node operations */
-struct device_node;
-typedef void *(*traverse_func)(struct device_node *me, void *data);
-void *traverse_pci_devices(struct device_node *start, traverse_func pre,
-                void *data);
-
-void pci_devs_phb_init(void);
-void pci_devs_phb_init_dynamic(struct pci_controller *phb);
-
-/* PCI address cache management routines */
-void pci_addr_cache_insert_device(struct pci_dev *dev);
-void pci_addr_cache_remove_device(struct pci_dev *dev);
-
-/* From rtas_pci.h */
-void init_pci_config_tokens (void);
-unsigned long get_phb_buid (struct device_node *);
-
-/* From pSeries_pci.h */
-extern void pSeries_final_fixup(void);
-extern void pSeries_irq_bus_setup(struct pci_bus *bus);
-
-extern unsigned long pci_probe_only;
-extern unsigned long pci_assign_all_buses;
-extern int pci_read_irq_line(struct pci_dev *pci_dev);
-
-#endif /* __PPC_KERNEL_PCI_H__ */
diff --git a/arch/ppc64/kernel/pci_direct_iommu.c b/arch/ppc64/kernel/pci_direct_iommu.c
index 54055c81017a..e1a32f802c0b 100644
--- a/arch/ppc64/kernel/pci_direct_iommu.c
+++ b/arch/ppc64/kernel/pci_direct_iommu.c
@@ -27,8 +27,7 @@
 #include <asm/machdep.h>
 #include <asm/pmac_feature.h>
 #include <asm/abs_addr.h>
-
-#include "pci.h"
+#include <asm/ppc-pci.h>
 
 static void *pci_direct_alloc_coherent(struct device *hwdev, size_t size,
                                    dma_addr_t *dma_handle, gfp_t flag)
diff --git a/arch/ppc64/kernel/pci_dn.c b/arch/ppc64/kernel/pci_dn.c
index a86389d07d57..493bbe43f5b4 100644
--- a/arch/ppc64/kernel/pci_dn.c
+++ b/arch/ppc64/kernel/pci_dn.c
@@ -30,8 +30,7 @@
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
 #include <asm/pSeries_reconfig.h>
-
-#include "pci.h"
+#include <asm/ppc-pci.h>
 
 /*
  * Traverse_func that inits the PCI fields of the device node.
diff --git a/arch/ppc64/kernel/pci_iommu.c b/arch/ppc64/kernel/pci_iommu.c
index d9e33b7d4203..bdf15dbbf4f0 100644
--- a/arch/ppc64/kernel/pci_iommu.c
+++ b/arch/ppc64/kernel/pci_iommu.c
@@ -1,8 +1,8 @@
 /*
  * arch/ppc64/kernel/pci_iommu.c
  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
- * 
- * Rewrite, cleanup, new allocation schemes: 
+ *
+ * Rewrite, cleanup, new allocation schemes:
  * Copyright (C) 2004 Olof Johansson, IBM Corporation
  *
  * Dynamic DMA mapping support, platform-independent parts.
@@ -11,19 +11,18 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  */
 
 
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/slab.h>
@@ -37,11 +36,7 @@
 #include <asm/iommu.h>
 #include <asm/pci-bridge.h>
 #include <asm/machdep.h>
-#include "pci.h"
-
-#ifdef CONFIG_PPC_ISERIES
-#include <asm/iSeries/iSeries_pci.h>
-#endif /* CONFIG_PPC_ISERIES */
+#include <asm/ppc-pci.h>
 
 /*
  * We can use ->sysdata directly and avoid the extra work in
@@ -61,13 +56,7 @@ static inline struct iommu_table *devnode_table(struct device *dev)
         } else
                 pdev = to_pci_dev(dev);
 
-#ifdef CONFIG_PPC_ISERIES
-        return ISERIES_DEVNODE(pdev)->iommu_table;
-#endif /* CONFIG_PPC_ISERIES */
-
-#ifdef CONFIG_PPC_MULTIPLATFORM
         return PCI_DN(PCI_GET_DN(pdev))->iommu_table;
-#endif /* CONFIG_PPC_MULTIPLATFORM */
 }
 
 
diff --git a/arch/ppc64/kernel/pmac.h b/arch/ppc64/kernel/pmac.h
deleted file mode 100644
index 40e1c5030f74..000000000000
--- a/arch/ppc64/kernel/pmac.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef __PMAC_H__
-#define __PMAC_H__
-
-#include <linux/pci.h>
-#include <linux/ide.h>
-
-/*
- * Declaration for the various functions exported by the
- * pmac_* files. Mostly for use by pmac_setup
- */
-
-extern void pmac_get_boot_time(struct rtc_time *tm);
-extern void pmac_get_rtc_time(struct rtc_time *tm);
-extern int  pmac_set_rtc_time(struct rtc_time *tm);
-extern void pmac_read_rtc_time(void);
-extern void pmac_calibrate_decr(void);
-
-extern void pmac_pcibios_fixup(void);
-extern void pmac_pci_init(void);
-extern void pmac_setup_pci_dma(void);
-extern void pmac_check_ht_link(void);
-
-extern void pmac_setup_smp(void);
-
-extern unsigned long pmac_ide_get_base(int index);
-extern void pmac_ide_init_hwif_ports(hw_regs_t *hw,
-        unsigned long data_port, unsigned long ctrl_port, int *irq);
-
-extern void pmac_nvram_init(void);
-
-#endif /* __PMAC_H__ */
diff --git a/arch/ppc64/kernel/pmac_feature.c b/arch/ppc64/kernel/pmac_feature.c
deleted file mode 100644
index eb4e6c3f694d..000000000000
--- a/arch/ppc64/kernel/pmac_feature.c
+++ /dev/null
@@ -1,767 +0,0 @@
-/*
- *  arch/ppc/platforms/pmac_feature.c
- *
- *  Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
- *                          Ben. Herrenschmidt (benh@kernel.crashing.org)
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- *  TODO:
- *
- *   - Replace mdelay with some schedule loop if possible
- *   - Shorten some obfuscated delays on some routines (like modem
- *     power)
- *   - Refcount some clocks (see darwin)
- *   - Split split split...
- *
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/adb.h>
-#include <linux/pmu.h>
-#include <linux/ioport.h>
-#include <linux/pci.h>
-#include <asm/sections.h>
-#include <asm/errno.h>
-#include <asm/keylargo.h>
-#include <asm/uninorth.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/machdep.h>
-#include <asm/pmac_feature.h>
-#include <asm/dbdma.h>
-#include <asm/pci-bridge.h>
-#include <asm/pmac_low_i2c.h>
-
-#undef DEBUG_FEATURE
-
-#ifdef DEBUG_FEATURE
-#define DBG(fmt...) printk(KERN_DEBUG fmt)
-#else
-#define DBG(fmt...)
-#endif
-
-/*
- * We use a single global lock to protect accesses. Each driver has
- * to take care of its own locking
- */
-static DEFINE_SPINLOCK(feature_lock  __pmacdata);
-
-#define LOCK(flags)     spin_lock_irqsave(&feature_lock, flags);
-#define UNLOCK(flags)   spin_unlock_irqrestore(&feature_lock, flags);
-
-
-/*
- * Instance of some macio stuffs
- */
-struct macio_chip macio_chips[MAX_MACIO_CHIPS]  __pmacdata;
-
-struct macio_chip* __pmac macio_find(struct device_node* child, int type)
-{
-        while(child) {
-                int     i;
-
-                for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
-                        if (child == macio_chips[i].of_node &&
-                            (!type || macio_chips[i].type == type))
-                                return &macio_chips[i];
-                child = child->parent;
-        }
-        return NULL;
-}
-EXPORT_SYMBOL_GPL(macio_find);
-
-static const char* macio_names[] __pmacdata =
-{
-        "Unknown",
-        "Grand Central",
-        "OHare",
-        "OHareII",
-        "Heathrow",
-        "Gatwick",
-        "Paddington",
-        "Keylargo",
-        "Pangea",
-        "Intrepid",
-        "K2"
-};
-
-
-
-/*
- * Uninorth reg. access. Note that Uni-N regs are big endian
- */
-
-#define UN_REG(r)       (uninorth_base + ((r) >> 2))
-#define UN_IN(r)        (in_be32(UN_REG(r)))
-#define UN_OUT(r,v)     (out_be32(UN_REG(r), (v)))
-#define UN_BIS(r,v)     (UN_OUT((r), UN_IN(r) | (v)))
-#define UN_BIC(r,v)     (UN_OUT((r), UN_IN(r) & ~(v)))
-
-static struct device_node* uninorth_node __pmacdata;
-static u32* uninorth_base __pmacdata;
-static u32 uninorth_rev __pmacdata;
-static void *u3_ht;
-
-extern struct device_node *k2_skiplist[2];
-
-/*
- * For each motherboard family, we have a table of functions pointers
- * that handle the various features.
- */
-
-typedef long (*feature_call)(struct device_node* node, long param, long value);
-
-struct feature_table_entry {
-        unsigned int    selector;
-        feature_call    function;
-};
-
-struct pmac_mb_def
-{
-        const char*                     model_string;
-        const char*                     model_name;
-        int                             model_id;
-        struct feature_table_entry*     features;
-        unsigned long                   board_flags;
-};
-static struct pmac_mb_def pmac_mb __pmacdata;
-
-/*
- * Here are the chip specific feature functions
- */
-
-
-static long __pmac g5_read_gpio(struct device_node* node, long param, long value)
-{
-        struct macio_chip* macio = &macio_chips[0];
-
-        return MACIO_IN8(param);
-}
-
-
-static long __pmac g5_write_gpio(struct device_node* node, long param, long value)
-{
-        struct macio_chip* macio = &macio_chips[0];
-
-        MACIO_OUT8(param, (u8)(value & 0xff));
-        return 0;
-}
-
-static long __pmac g5_gmac_enable(struct device_node* node, long param, long value)
-{
-        struct macio_chip* macio = &macio_chips[0];
-        unsigned long flags;
-
-        if (node == NULL)
-                return -ENODEV;
-
-        LOCK(flags);
-        if (value) {
-                MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
-                mb();
-                k2_skiplist[0] = NULL;
-        } else {
-                k2_skiplist[0] = node;
-                mb();
-                MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
-        }
-        
-        UNLOCK(flags);
-        mdelay(1);
-
-        return 0;
-}
-
-static long __pmac g5_fw_enable(struct device_node* node, long param, long value)
-{
-        struct macio_chip* macio = &macio_chips[0];
-        unsigned long flags;
-
-        if (node == NULL)
-                return -ENODEV;
-
-        LOCK(flags);
-        if (value) {
-                MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
-                mb();
-                k2_skiplist[1] = NULL;
-        } else {
-                k2_skiplist[1] = node;
-                mb();
-                MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
-        }
-        
-        UNLOCK(flags);
-        mdelay(1);
-
-        return 0;
-}
-
-static long __pmac g5_mpic_enable(struct device_node* node, long param, long value)
-{
-        unsigned long flags;
-
-        if (node->parent == NULL || strcmp(node->parent->name, "u3"))
-                return 0;
-
-        LOCK(flags);
-        UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
-        UNLOCK(flags);
-
-        return 0;
-}
-
-static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long value)
-{
-        struct macio_chip* macio = &macio_chips[0];
-        struct device_node *phy;
-        int need_reset;
-
-        /*
-         * We must not reset the combo PHYs, only the BCM5221 found in
-         * the iMac G5.
-         */
-        phy = of_get_next_child(node, NULL);
-        if (!phy)
-                return -ENODEV;
-        need_reset = device_is_compatible(phy, "B5221");
-        of_node_put(phy);
-        if (!need_reset)
-                return 0;
-
-        /* PHY reset is GPIO 29, not in device-tree unfortunately */
-        MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
-                   KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
-        /* Thankfully, this is now always called at a time when we can
-         * schedule by sungem.
-         */
-        msleep(10);
-        MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
-
-        return 0;
-}
-
-static long __pmac g5_i2s_enable(struct device_node *node, long param, long value)
-{
-        /* Very crude implementation for now */
-        struct macio_chip* macio = &macio_chips[0];
-        unsigned long flags;
-
-        if (value == 0)
-                return 0; /* don't disable yet */
-
-        LOCK(flags);
-        MACIO_BIS(KEYLARGO_FCR3, KL3_CLK45_ENABLE | KL3_CLK49_ENABLE |
-                  KL3_I2S0_CLK18_ENABLE);
-        udelay(10);
-        MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_I2S0_CELL_ENABLE |
-                  K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE);
-        udelay(10);
-        MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_I2S0_RESET);
-        UNLOCK(flags);
-        udelay(10);
-
-        return 0;
-}
-
-
-#ifdef CONFIG_SMP
-static long __pmac g5_reset_cpu(struct device_node* node, long param, long value)
-{
-        unsigned int reset_io = 0;
-        unsigned long flags;
-        struct macio_chip* macio;
-        struct device_node* np;
-
-        macio = &macio_chips[0];
-        if (macio->type != macio_keylargo2)
-                return -ENODEV;
-
-        np = find_path_device("/cpus");
-        if (np == NULL)
-                return -ENODEV;
-        for (np = np->child; np != NULL; np = np->sibling) {
-                u32* num = (u32 *)get_property(np, "reg", NULL);
-                u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
-                if (num == NULL || rst == NULL)
-                        continue;
-                if (param == *num) {
-                        reset_io = *rst;
-                        break;
-                }
-        }
-        if (np == NULL || reset_io == 0)
-                return -ENODEV;
-
-        LOCK(flags);
-        MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
-        (void)MACIO_IN8(reset_io);
-        udelay(1);
-        MACIO_OUT8(reset_io, 0);
-        (void)MACIO_IN8(reset_io);
-        UNLOCK(flags);
-
-        return 0;
-}
-#endif /* CONFIG_SMP */
-
-/*
- * This can be called from pmac_smp so isn't static
- *
- * This takes the second CPU off the bus on dual CPU machines
- * running UP
- */
-void __pmac g5_phy_disable_cpu1(void)
-{
-        UN_OUT(U3_API_PHY_CONFIG_1, 0);
-}
-
-static long __pmac generic_get_mb_info(struct device_node* node, long param, long value)
-{
-        switch(param) {
-                case PMAC_MB_INFO_MODEL:
-                        return pmac_mb.model_id;
-                case PMAC_MB_INFO_FLAGS:
-                        return pmac_mb.board_flags;
-                case PMAC_MB_INFO_NAME:                 
-                        /* hack hack hack... but should work */
-                        *((const char **)value) = pmac_mb.model_name;
-                        return 0;
-        }
-        return -EINVAL;
-}
-
-
-/*
- * Table definitions
- */
-
-/* Used on any machine
- */
-static struct feature_table_entry any_features[]  __pmacdata = {
-        { PMAC_FTR_GET_MB_INFO,         generic_get_mb_info },
-        { 0, NULL }
-};
-
-/* G5 features
- */
-static struct feature_table_entry g5_features[]  __pmacdata = {
-        { PMAC_FTR_GMAC_ENABLE,         g5_gmac_enable },
-        { PMAC_FTR_1394_ENABLE,         g5_fw_enable },
-        { PMAC_FTR_ENABLE_MPIC,         g5_mpic_enable },
-        { PMAC_FTR_READ_GPIO,           g5_read_gpio },
-        { PMAC_FTR_WRITE_GPIO,          g5_write_gpio },
-        { PMAC_FTR_GMAC_PHY_RESET,      g5_eth_phy_reset },
-        { PMAC_FTR_SOUND_CHIP_ENABLE,   g5_i2s_enable },
-#ifdef CONFIG_SMP
-        { PMAC_FTR_RESET_CPU,           g5_reset_cpu },
-#endif /* CONFIG_SMP */
-        { 0, NULL }
-};
-
-static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
-        {       "PowerMac7,2",                  "PowerMac G5",
-                PMAC_TYPE_POWERMAC_G5,          g5_features,
-                0,
-        },
-        {       "PowerMac7,3",                  "PowerMac G5",
-                PMAC_TYPE_POWERMAC_G5,          g5_features,
-                0,
-        },
-        {       "PowerMac8,1",                  "iMac G5",
-                PMAC_TYPE_IMAC_G5,              g5_features,
-                0,
-        },
-        {       "PowerMac9,1",                  "PowerMac G5",
-                PMAC_TYPE_POWERMAC_G5_U3L,      g5_features,
-                0,
-        },
-        {       "RackMac3,1",                   "XServe G5",
-                PMAC_TYPE_XSERVE_G5,            g5_features,
-                0,
-        },
-};
-
-/*
- * The toplevel feature_call callback
- */
-long __pmac pmac_do_feature_call(unsigned int selector, ...)
-{
-        struct device_node* node;
-        long param, value;
-        int i;
-        feature_call func = NULL;
-        va_list args;
-
-        if (pmac_mb.features)
-                for (i=0; pmac_mb.features[i].function; i++)
-                        if (pmac_mb.features[i].selector == selector) {
-                                func = pmac_mb.features[i].function;
-                                break;
-                        }
-        if (!func)
-                for (i=0; any_features[i].function; i++)
-                        if (any_features[i].selector == selector) {
-                                func = any_features[i].function;
-                                break;
-                        }
-        if (!func)
-                return -ENODEV;
-
-        va_start(args, selector);
-        node = (struct device_node*)va_arg(args, void*);
-        param = va_arg(args, long);
-        value = va_arg(args, long);
-        va_end(args);
-
-        return func(node, param, value);
-}
-
-static int __init probe_motherboard(void)
-{
-        int i;
-        struct macio_chip* macio = &macio_chips[0];
-        const char* model = NULL;
-        struct device_node *dt;
-
-        /* Lookup known motherboard type in device-tree. First try an
-         * exact match on the "model" property, then try a "compatible"
-         * match is none is found.
-         */
-        dt = find_devices("device-tree");
-        if (dt != NULL)
-                model = (const char *) get_property(dt, "model", NULL);
-        for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
-            if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
-                pmac_mb = pmac_mb_defs[i];
-                goto found;
-            }
-        }
-        for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
-            if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
-                pmac_mb = pmac_mb_defs[i];
-                goto found;
-            }
-        }
-
-        /* Fallback to selection depending on mac-io chip type */
-        switch(macio->type) {
-        case macio_keylargo2:
-                pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
-                pmac_mb.model_name = "Unknown K2-based";
-                pmac_mb.features = g5_features;
-                
-        default:
-                return -ENODEV;
-        }
-found:
-        /* Check for "mobile" machine */
-        if (model && (strncmp(model, "PowerBook", 9) == 0
-                   || strncmp(model, "iBook", 5) == 0))
-                pmac_mb.board_flags |= PMAC_MB_MOBILE;
-
-
-        printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
-        return 0;
-}
-
-/* Initialize the Core99 UniNorth host bridge and memory controller
- */
-static void __init probe_uninorth(void)
-{
-        uninorth_node = of_find_node_by_name(NULL, "u3");
-        if (uninorth_node && uninorth_node->n_addrs > 0) {
-                /* Small hack until I figure out if parsing in prom.c is correct. I should
-                 * get rid of those pre-parsed junk anyway
-                 */
-                unsigned long address = uninorth_node->addrs[0].address;
-                uninorth_base = ioremap(address, 0x40000);
-                uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
-                u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
-        } else
-                uninorth_node = NULL;
-
-        if (!uninorth_node)
-                return;
-
-        printk(KERN_INFO "Found U3 memory controller & host bridge, revision: %d\n",
-               uninorth_rev);
-        printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
-
-}
-
-static void __init probe_one_macio(const char* name, const char* compat, int type)
-{
-        struct device_node*     node;
-        int                     i;
-        volatile u32*           base;
-        u32*                    revp;
-
-        node = find_devices(name);
-        if (!node || !node->n_addrs)
-                return;
-        if (compat)
-                do {
-                        if (device_is_compatible(node, compat))
-                                break;
-                        node = node->next;
-                } while (node);
-        if (!node)
-                return;
-        for(i=0; i<MAX_MACIO_CHIPS; i++) {
-                if (!macio_chips[i].of_node)
-                        break;
-                if (macio_chips[i].of_node == node)
-                        return;
-        }
-        if (i >= MAX_MACIO_CHIPS) {
-                printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
-                printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
-                return;
-        }
-        base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size);
-        if (!base) {
-                printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
-                return;
-        }
-        if (type == macio_keylargo) {
-                u32* did = (u32 *)get_property(node, "device-id", NULL);
-                if (*did == 0x00000025)
-                        type = macio_pangea;
-                if (*did == 0x0000003e)
-                        type = macio_intrepid;
-        }
-        macio_chips[i].of_node  = node;
-        macio_chips[i].type     = type;
-        macio_chips[i].base     = base;
-        macio_chips[i].flags    = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
-        macio_chips[i].name     = macio_names[type];
-        revp = (u32 *)get_property(node, "revision-id", NULL);
-        if (revp)
-                macio_chips[i].rev = *revp;
-        printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
-                macio_names[type], macio_chips[i].rev, macio_chips[i].base);
-}
-
-static int __init
-probe_macios(void)
-{
-        probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
-
-        macio_chips[0].lbus.index = 0;
-        macio_chips[1].lbus.index = 1;
-
-        return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
-}
-
-static void __init
-set_initial_features(void)
-{
-        struct device_node *np;
-
-        if (macio_chips[0].type == macio_keylargo2) {
-#ifndef CONFIG_SMP
-                /* On SMP machines running UP, we have the second CPU eating
-                 * bus cycles. We need to take it off the bus. This is done
-                 * from pmac_smp for SMP kernels running on one CPU
-                 */
-                np = of_find_node_by_type(NULL, "cpu");
-                if (np != NULL)
-                        np = of_find_node_by_type(np, "cpu");
-                if (np != NULL) {
-                        g5_phy_disable_cpu1();
-                        of_node_put(np);
-                }
-#endif /* CONFIG_SMP */
-                /* Enable GMAC for now for PCI probing. It will be disabled
-                 * later on after PCI probe
-                 */
-                np = of_find_node_by_name(NULL, "ethernet");
-                while(np) {
-                        if (device_is_compatible(np, "K2-GMAC"))
-                                g5_gmac_enable(np, 0, 1);
-                        np = of_find_node_by_name(np, "ethernet");
-                }
-
-                /* Enable FW before PCI probe. Will be disabled later on
-                 * Note: We should have a batter way to check that we are
-                 * dealing with uninorth internal cell and not a PCI cell
-                 * on the external PCI. The code below works though.
-                 */
-                np = of_find_node_by_name(NULL, "firewire");
-                while(np) {
-                        if (device_is_compatible(np, "pci106b,5811")) {
-                                macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
-                                g5_fw_enable(np, 0, 1);
-                        }
-                        np = of_find_node_by_name(np, "firewire");
-                }
-        }
-}
-
-void __init
-pmac_feature_init(void)
-{
-        /* Detect the UniNorth memory controller */
-        probe_uninorth();
-
-        /* Probe mac-io controllers */
-        if (probe_macios()) {
-                printk(KERN_WARNING "No mac-io chip found\n");
-                return;
-        }
-
-        /* Setup low-level i2c stuffs */
-        pmac_init_low_i2c();
-
-        /* Probe machine type */
-        if (probe_motherboard())
-                printk(KERN_WARNING "Unknown PowerMac !\n");
-
-        /* Set some initial features (turn off some chips that will
-         * be later turned on)
-         */
-        set_initial_features();
-}
-
-int __init pmac_feature_late_init(void)
-{
-#if 0
-        struct device_node* np;
-
-        /* Request some resources late */
-        if (uninorth_node)
-                request_OF_resource(uninorth_node, 0, NULL);
-        np = find_devices("hammerhead");
-        if (np)
-                request_OF_resource(np, 0, NULL);
-        np = find_devices("interrupt-controller");
-        if (np)
-                request_OF_resource(np, 0, NULL);
-#endif
-        return 0;
-}
-
-device_initcall(pmac_feature_late_init);
-
-#if 0
-static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
-{
-        int     freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
-        int     bits[8] = { 8,16,0,32,2,4,0,0 };
-        int     freq = (frq >> 8) & 0xf;
-
-        if (freqs[freq] == 0)
-                printk("%s: Unknown HT link frequency %x\n", name, freq);
-        else
-                printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
-                       name, freqs[freq],
-                       bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
-}
-#endif
-
-void __init pmac_check_ht_link(void)
-{
-#if 0 /* Disabled for now */
-        u32     ufreq, freq, ucfg, cfg;
-        struct device_node *pcix_node;
-        struct pci_dn *pdn;
-        u8      px_bus, px_devfn;
-        struct pci_controller *px_hose;
-
-        (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
-        ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
-        ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
-        dump_HT_speeds("U3 HyperTransport", cfg, freq);
-
-        pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
-        if (pcix_node == NULL) {
-                printk("No PCI-X bridge found\n");
-                return;
-        }
-        pdn = pcix_node->data;
-        px_hose = pdn->phb;
-        px_bus = pdn->busno;
-        px_devfn = pdn->devfn;
-        
-        early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
-        early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
-        dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
-        early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
-        early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
-        dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
-#endif
-}
-
-/*
- * Early video resume hook
- */
-
-static void (*pmac_early_vresume_proc)(void *data) __pmacdata;
-static void *pmac_early_vresume_data __pmacdata;
-
-void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
-{
-        if (_machine != _MACH_Pmac)
-                return;
-        preempt_disable();
-        pmac_early_vresume_proc = proc;
-        pmac_early_vresume_data = data;
-        preempt_enable();
-}
-EXPORT_SYMBOL(pmac_set_early_video_resume);
-
-
-/*
- * AGP related suspend/resume code
- */
-
-static struct pci_dev *pmac_agp_bridge __pmacdata;
-static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata;
-static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata;
-
-void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
-                                 int (*suspend)(struct pci_dev *bridge),
-                                 int (*resume)(struct pci_dev *bridge))
-{
-        if (suspend || resume) {
-                pmac_agp_bridge = bridge;
-                pmac_agp_suspend = suspend;
-                pmac_agp_resume = resume;
-                return;
-        }
-        if (bridge != pmac_agp_bridge)
-                return;
-        pmac_agp_suspend = pmac_agp_resume = NULL;
-        return;
-}
-EXPORT_SYMBOL(pmac_register_agp_pm);
-
-void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
-{
-        if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
-                return;
-        if (pmac_agp_bridge->bus != dev->bus)
-                return;
-        pmac_agp_suspend(pmac_agp_bridge);
-}
-EXPORT_SYMBOL(pmac_suspend_agp_for_card);
-
-void __pmac pmac_resume_agp_for_card(struct pci_dev *dev)
-{
-        if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
-                return;
-        if (pmac_agp_bridge->bus != dev->bus)
-                return;
-        pmac_agp_resume(pmac_agp_bridge);
-}
-EXPORT_SYMBOL(pmac_resume_agp_for_card);
diff --git a/arch/ppc64/kernel/pmac_pci.c b/arch/ppc64/kernel/pmac_pci.c
deleted file mode 100644
index dc40a0cad0b4..000000000000
--- a/arch/ppc64/kernel/pmac_pci.c
+++ /dev/null
@@ -1,793 +0,0 @@
-/*
- * Support for PCI bridges found on Power Macintoshes.
- * At present the "bandit" and "chaos" bridges are supported.
- * Fortunately you access configuration space in the same
- * way with either bridge.
- *
- * Copyright (C) 2003 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
- * Copyright (C) 1997 Paul Mackerras (paulus@samba.org)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-
-#include <asm/sections.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/pmac_feature.h>
-#include <asm/iommu.h>
-
-#include "pci.h"
-#include "pmac.h"
-
-#define DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/* XXX Could be per-controller, but I don't think we risk anything by
- * assuming we won't have both UniNorth and Bandit */
-static int has_uninorth;
-static struct pci_controller *u3_agp;
-struct device_node *k2_skiplist[2];
-
-static int __init fixup_one_level_bus_range(struct device_node *node, int higher)
-{
-        for (; node != 0;node = node->sibling) {
-                int * bus_range;
-                unsigned int *class_code;
-                int len;
-
-                /* For PCI<->PCI bridges or CardBus bridges, we go down */
-                class_code = (unsigned int *) get_property(node, "class-code", NULL);
-                if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
-                        (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
-                        continue;
-                bus_range = (int *) get_property(node, "bus-range", &len);
-                if (bus_range != NULL && len > 2 * sizeof(int)) {
-                        if (bus_range[1] > higher)
-                                higher = bus_range[1];
-                }
-                higher = fixup_one_level_bus_range(node->child, higher);
-        }
-        return higher;
-}
-
-/* This routine fixes the "bus-range" property of all bridges in the
- * system since they tend to have their "last" member wrong on macs
- *
- * Note that the bus numbers manipulated here are OF bus numbers, they
- * are not Linux bus numbers.
- */
-static void __init fixup_bus_range(struct device_node *bridge)
-{
-        int * bus_range;
-        int len;
-
-        /* Lookup the "bus-range" property for the hose */
-        bus_range = (int *) get_property(bridge, "bus-range", &len);
-        if (bus_range == NULL || len < 2 * sizeof(int)) {
-                printk(KERN_WARNING "Can't get bus-range for %s\n",
-                               bridge->full_name);
-                return;
-        }
-        bus_range[1] = fixup_one_level_bus_range(bridge->child, bus_range[1]);
-}
-
-/*
- * Apple MacRISC (U3, UniNorth, Bandit, Chaos) PCI controllers.
- *
- * The "Bandit" version is present in all early PCI PowerMacs,
- * and up to the first ones using Grackle. Some machines may
- * have 2 bandit controllers (2 PCI busses).
- *
- * "Chaos" is used in some "Bandit"-type machines as a bridge
- * for the separate display bus. It is accessed the same
- * way as bandit, but cannot be probed for devices. It therefore
- * has its own config access functions.
- *
- * The "UniNorth" version is present in all Core99 machines
- * (iBook, G4, new IMacs, and all the recent Apple machines).
- * It contains 3 controllers in one ASIC.
- *
- * The U3 is the bridge used on G5 machines. It contains on
- * AGP bus which is dealt with the old UniNorth access routines
- * and an HyperTransport bus which uses its own set of access
- * functions.
- */
-
-#define MACRISC_CFA0(devfn, off)        \
-        ((1 << (unsigned long)PCI_SLOT(dev_fn)) \
-        | (((unsigned long)PCI_FUNC(dev_fn)) << 8) \
-        | (((unsigned long)(off)) & 0xFCUL))
-
-#define MACRISC_CFA1(bus, devfn, off)   \
-        ((((unsigned long)(bus)) << 16) \
-        |(((unsigned long)(devfn)) << 8) \
-        |(((unsigned long)(off)) & 0xFCUL) \
-        |1UL)
-
-static unsigned long __pmac macrisc_cfg_access(struct pci_controller* hose,
-                                               u8 bus, u8 dev_fn, u8 offset)
-{
-        unsigned int caddr;
-
-        if (bus == hose->first_busno) {
-                if (dev_fn < (11 << 3))
-                        return 0;
-                caddr = MACRISC_CFA0(dev_fn, offset);
-        } else
-                caddr = MACRISC_CFA1(bus, dev_fn, offset);
-
-        /* Uninorth will return garbage if we don't read back the value ! */
-        do {
-                out_le32(hose->cfg_addr, caddr);
-        } while (in_le32(hose->cfg_addr) != caddr);
-
-        offset &= has_uninorth ? 0x07 : 0x03;
-        return ((unsigned long)hose->cfg_data) + offset;
-}
-
-static int __pmac macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
-                                      int offset, int len, u32 *val)
-{
-        struct pci_controller *hose;
-        unsigned long addr;
-
-        hose = pci_bus_to_host(bus);
-        if (hose == NULL)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-
-        addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
-        if (!addr)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        /*
-         * Note: the caller has already checked that offset is
-         * suitably aligned and that len is 1, 2 or 4.
-         */
-        switch (len) {
-        case 1:
-                *val = in_8((u8 *)addr);
-                break;
-        case 2:
-                *val = in_le16((u16 *)addr);
-                break;
-        default:
-                *val = in_le32((u32 *)addr);
-                break;
-        }
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static int __pmac macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
-                                       int offset, int len, u32 val)
-{
-        struct pci_controller *hose;
-        unsigned long addr;
-
-        hose = pci_bus_to_host(bus);
-        if (hose == NULL)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-
-        addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
-        if (!addr)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        /*
-         * Note: the caller has already checked that offset is
-         * suitably aligned and that len is 1, 2 or 4.
-         */
-        switch (len) {
-        case 1:
-                out_8((u8 *)addr, val);
-                (void) in_8((u8 *)addr);
-                break;
-        case 2:
-                out_le16((u16 *)addr, val);
-                (void) in_le16((u16 *)addr);
-                break;
-        default:
-                out_le32((u32 *)addr, val);
-                (void) in_le32((u32 *)addr);
-                break;
-        }
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops macrisc_pci_ops =
-{
-        macrisc_read_config,
-        macrisc_write_config
-};
-
-/*
- * These versions of U3 HyperTransport config space access ops do not
- * implement self-view of the HT host yet
- */
-
-/*
- * This function deals with some "special cases" devices.
- *
- *  0 -> No special case
- *  1 -> Skip the device but act as if the access was successfull
- *       (return 0xff's on reads, eventually, cache config space
- *       accesses in a later version)
- * -1 -> Hide the device (unsuccessful acess)
- */
-static int u3_ht_skip_device(struct pci_controller *hose,
-                             struct pci_bus *bus, unsigned int devfn)
-{
-        struct device_node *busdn, *dn;
-        int i;
-
-        /* We only allow config cycles to devices that are in OF device-tree
-         * as we are apparently having some weird things going on with some
-         * revs of K2 on recent G5s
-         */
-        if (bus->self)
-                busdn = pci_device_to_OF_node(bus->self);
-        else
-                busdn = hose->arch_data;
-        for (dn = busdn->child; dn; dn = dn->sibling)
-                if (dn->data && PCI_DN(dn)->devfn == devfn)
-                        break;
-        if (dn == NULL)
-                return -1;
-
-        /*
-         * When a device in K2 is powered down, we die on config
-         * cycle accesses. Fix that here.
-         */
-        for (i=0; i<2; i++)
-                if (k2_skiplist[i] == dn)
-                        return 1;
-
-        return 0;
-}
-
-#define U3_HT_CFA0(devfn, off)          \
-                ((((unsigned long)devfn) << 8) | offset)
-#define U3_HT_CFA1(bus, devfn, off)     \
-                (U3_HT_CFA0(devfn, off) \
-                + (((unsigned long)bus) << 16) \
-                + 0x01000000UL)
-
-static unsigned long __pmac u3_ht_cfg_access(struct pci_controller* hose,
-                                             u8 bus, u8 devfn, u8 offset)
-{
-        if (bus == hose->first_busno) {
-                /* For now, we don't self probe U3 HT bridge */
-                if (PCI_SLOT(devfn) == 0)
-                        return 0;
-                return ((unsigned long)hose->cfg_data) + U3_HT_CFA0(devfn, offset);
-        } else
-                return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset);
-}
-
-static int __pmac u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
-                                    int offset, int len, u32 *val)
-{
-        struct pci_controller *hose;
-        unsigned long addr;
-
-
-        hose = pci_bus_to_host(bus);      
-        if (hose == NULL)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-
-        addr = u3_ht_cfg_access(hose, bus->number, devfn, offset);
-        if (!addr)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-
-        switch (u3_ht_skip_device(hose, bus, devfn)) {
-        case 0:
-                break;
-        case 1:
-                switch (len) {
-                case 1:
-                        *val = 0xff; break;
-                case 2:
-                        *val = 0xffff; break;
-                default:
-                        *val = 0xfffffffful; break;
-                }
-                return PCIBIOS_SUCCESSFUL;
-        default:
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        }
-
-        /*
-         * Note: the caller has already checked that offset is
-         * suitably aligned and that len is 1, 2 or 4.
-         */
-        switch (len) {
-        case 1:
-                *val = in_8((u8 *)addr);
-                break;
-        case 2:
-                *val = in_le16((u16 *)addr);
-                break;
-        default:
-                *val = in_le32((u32 *)addr);
-                break;
-        }
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static int __pmac u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
-                                     int offset, int len, u32 val)
-{
-        struct pci_controller *hose;
-        unsigned long addr;
-
-        hose = pci_bus_to_host(bus);
-        if (hose == NULL)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-
-        addr = u3_ht_cfg_access(hose, bus->number, devfn, offset);
-        if (!addr)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-
-        switch (u3_ht_skip_device(hose, bus, devfn)) {
-        case 0:
-                break;
-        case 1:
-                return PCIBIOS_SUCCESSFUL;
-        default:
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        }
-
-        /*
-         * Note: the caller has already checked that offset is
-         * suitably aligned and that len is 1, 2 or 4.
-         */
-        switch (len) {
-        case 1:
-                out_8((u8 *)addr, val);
-                (void) in_8((u8 *)addr);
-                break;
-        case 2:
-                out_le16((u16 *)addr, val);
-                (void) in_le16((u16 *)addr);
-                break;
-        default:
-                out_le32((u32 *)addr, val);
-                (void) in_le32((u32 *)addr);
-                break;
-        }
-        return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops u3_ht_pci_ops =
-{
-        u3_ht_read_config,
-        u3_ht_write_config
-};
-
-static void __init setup_u3_agp(struct pci_controller* hose)
-{
-        /* On G5, we move AGP up to high bus number so we don't need
-         * to reassign bus numbers for HT. If we ever have P2P bridges
-         * on AGP, we'll have to move pci_assign_all_busses to the
-         * pci_controller structure so we enable it for AGP and not for
-         * HT childs.
-         * We hard code the address because of the different size of
-         * the reg address cell, we shall fix that by killing struct
-         * reg_property and using some accessor functions instead
-         */
-        hose->first_busno = 0xf0;
-        hose->last_busno = 0xff;
-        has_uninorth = 1;
-        hose->ops = &macrisc_pci_ops;
-        hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);
-        hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);
-
-        u3_agp = hose;
-}
-
-static void __init setup_u3_ht(struct pci_controller* hose)
-{
-        struct device_node *np = (struct device_node *)hose->arch_data;
-        int i, cur;
-
-        hose->ops = &u3_ht_pci_ops;
-
-        /* We hard code the address because of the different size of
-         * the reg address cell, we shall fix that by killing struct
-         * reg_property and using some accessor functions instead
-         */
-        hose->cfg_data = (volatile unsigned char *)ioremap(0xf2000000, 0x02000000);
-
-        /*
-         * /ht node doesn't expose a "ranges" property, so we "remove" regions that
-         * have been allocated to AGP. So far, this version of the code doesn't assign
-         * any of the 0xfxxxxxxx "fine" memory regions to /ht.
-         * We need to fix that sooner or later by either parsing all child "ranges"
-         * properties or figuring out the U3 address space decoding logic and
-         * then read it's configuration register (if any).
-         */
-        hose->io_base_phys = 0xf4000000;
-        hose->io_base_virt = ioremap(hose->io_base_phys, 0x00400000);
-        isa_io_base = pci_io_base = (unsigned long) hose->io_base_virt;
-        hose->io_resource.name = np->full_name;
-        hose->io_resource.start = 0;
-        hose->io_resource.end = 0x003fffff;
-        hose->io_resource.flags = IORESOURCE_IO;
-        hose->pci_mem_offset = 0;
-        hose->first_busno = 0;
-        hose->last_busno = 0xef;
-        hose->mem_resources[0].name = np->full_name;
-        hose->mem_resources[0].start = 0x80000000;
-        hose->mem_resources[0].end = 0xefffffff;
-        hose->mem_resources[0].flags = IORESOURCE_MEM;
-
-        if (u3_agp == NULL) {
-                DBG("U3 has no AGP, using full resource range\n");
-                return;
-        }
-
-        /* We "remove" the AGP resources from the resources allocated to HT, that
-         * is we create "holes". However, that code does assumptions that so far
-         * happen to be true (cross fingers...), typically that resources in the
-         * AGP node are properly ordered
-         */
-        cur = 0;
-        for (i=0; i<3; i++) {
-                struct resource *res = &u3_agp->mem_resources[i];
-                if (res->flags != IORESOURCE_MEM)
-                        continue;
-                /* We don't care about "fine" resources */
-                if (res->start >= 0xf0000000)
-                        continue;
-                /* Check if it's just a matter of "shrinking" us in one direction */
-                if (hose->mem_resources[cur].start == res->start) {
-                        DBG("U3/HT: shrink start of %d, %08lx -> %08lx\n",
-                            cur, hose->mem_resources[cur].start, res->end + 1);
-                        hose->mem_resources[cur].start = res->end + 1;
-                        continue;
-                }
-                if (hose->mem_resources[cur].end == res->end) {
-                        DBG("U3/HT: shrink end of %d, %08lx -> %08lx\n",
-                            cur, hose->mem_resources[cur].end, res->start - 1);
-                        hose->mem_resources[cur].end = res->start - 1;
-                        continue;
-                }
-                /* No, it's not the case, we need a hole */
-                if (cur == 2) {
-                        /* not enough resources for a hole, we drop part of the range */
-                        printk(KERN_WARNING "Running out of resources for /ht host !\n");
-                        hose->mem_resources[cur].end = res->start - 1;
-                        continue;
-                }               
-                cur++;
-                DBG("U3/HT: hole, %d end at %08lx, %d start at %08lx\n",
-                    cur-1, res->start - 1, cur, res->end + 1);
-                hose->mem_resources[cur].name = np->full_name;
-                hose->mem_resources[cur].flags = IORESOURCE_MEM;
-                hose->mem_resources[cur].start = res->end + 1;
-                hose->mem_resources[cur].end = hose->mem_resources[cur-1].end;
-                hose->mem_resources[cur-1].end = res->start - 1;
-        }
-}
-
-static void __init pmac_process_bridge_OF_ranges(struct pci_controller *hose,
-                           struct device_node *dev, int primary)
-{
-        static unsigned int static_lc_ranges[2024];
-        unsigned int *dt_ranges, *lc_ranges, *ranges, *prev;
-        unsigned int size;
-        int rlen = 0, orig_rlen;
-        int memno = 0;
-        struct resource *res;
-        int np, na = prom_n_addr_cells(dev);
-
-        np = na + 5;
-
-        /* First we try to merge ranges to fix a problem with some pmacs
-         * that can have more than 3 ranges, fortunately using contiguous
-         * addresses -- BenH
-         */
-        dt_ranges = (unsigned int *) get_property(dev, "ranges", &rlen);
-        if (!dt_ranges)
-                return;
-        /*      lc_ranges = alloc_bootmem(rlen);*/
-        lc_ranges = static_lc_ranges;
-        if (!lc_ranges)
-                return; /* what can we do here ? */
-        memcpy(lc_ranges, dt_ranges, rlen);
-        orig_rlen = rlen;
-
-        /* Let's work on a copy of the "ranges" property instead of damaging
-         * the device-tree image in memory
-         */
-        ranges = lc_ranges;
-        prev = NULL;
-        while ((rlen -= np * sizeof(unsigned int)) >= 0) {
-                if (prev) {
-                        if (prev[0] == ranges[0] && prev[1] == ranges[1] &&
-                                (prev[2] + prev[na+4]) == ranges[2] &&
-                                (prev[na+2] + prev[na+4]) == ranges[na+2]) {
-                                prev[na+4] += ranges[na+4];
-                                ranges[0] = 0;
-                                ranges += np;
-                                continue;
-                        }
-                }
-                prev = ranges;
-                ranges += np;
-        }
-
-        /*
-         * The ranges property is laid out as an array of elements,
-         * each of which comprises:
-         *   cells 0 - 2:       a PCI address
-         *   cells 3 or 3+4:    a CPU physical address
-         *                      (size depending on dev->n_addr_cells)
-         *   cells 4+5 or 5+6:  the size of the range
-         */
-        ranges = lc_ranges;
-        rlen = orig_rlen;
-        while (ranges && (rlen -= np * sizeof(unsigned int)) >= 0) {
-                res = NULL;
-                size = ranges[na+4];
-                switch (ranges[0] >> 24) {
-                case 1:         /* I/O space */
-                        if (ranges[2] != 0)
-                                break;
-                        hose->io_base_phys = ranges[na+2];
-                        /* limit I/O space to 16MB */
-                        if (size > 0x01000000)
-                                size = 0x01000000;
-                        hose->io_base_virt = ioremap(ranges[na+2], size);
-                        if (primary)
-                                isa_io_base = (unsigned long) hose->io_base_virt;
-                        res = &hose->io_resource;
-                        res->flags = IORESOURCE_IO;
-                        res->start = ranges[2];
-                        break;
-                case 2:         /* memory space */
-                        memno = 0;
-                        if (ranges[1] == 0 && ranges[2] == 0
-                            && ranges[na+4] <= (16 << 20)) {
-                                /* 1st 16MB, i.e. ISA memory area */
-#if 0
-                                if (primary)
-                                        isa_mem_base = ranges[na+2];
-#endif
-                                memno = 1;
-                        }
-                        while (memno < 3 && hose->mem_resources[memno].flags)
-                                ++memno;
-                        if (memno == 0)
-                                hose->pci_mem_offset = ranges[na+2] - ranges[2];
-                        if (memno < 3) {
-                                res = &hose->mem_resources[memno];
-                                res->flags = IORESOURCE_MEM;
-                                res->start = ranges[na+2];
-                        }
-                        break;
-                }
-                if (res != NULL) {
-                        res->name = dev->full_name;
-                        res->end = res->start + size - 1;
-                        res->parent = NULL;
-                        res->sibling = NULL;
-                        res->child = NULL;
-                }
-                ranges += np;
-        }
-}
-
-/*
- * We assume that if we have a G3 powermac, we have one bridge called
- * "pci" (a MPC106) and no bandit or chaos bridges, and contrariwise,
- * if we have one or more bandit or chaos bridges, we don't have a MPC106.
- */
-static int __init add_bridge(struct device_node *dev)
-{
-        int len;
-        struct pci_controller *hose;
-        char* disp_name;
-        int *bus_range;
-        int primary = 1;
-        struct property *of_prop;
-
-        DBG("Adding PCI host bridge %s\n", dev->full_name);
-
-        bus_range = (int *) get_property(dev, "bus-range", &len);
-        if (bus_range == NULL || len < 2 * sizeof(int)) {
-                printk(KERN_WARNING "Can't get bus-range for %s, assume bus 0\n",
-                        dev->full_name);
-        }
-
-        hose = alloc_bootmem(sizeof(struct pci_controller));
-        if (hose == NULL)
-                return -ENOMEM;
-        pci_setup_pci_controller(hose);
-
-        hose->arch_data = dev;
-        hose->first_busno = bus_range ? bus_range[0] : 0;
-        hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
-        of_prop = alloc_bootmem(sizeof(struct property) +
-                                sizeof(hose->global_number));
-        if (of_prop) {
-                memset(of_prop, 0, sizeof(struct property));
-                of_prop->name = "linux,pci-domain";
-                of_prop->length = sizeof(hose->global_number);
-                of_prop->value = (unsigned char *)&of_prop[1];
-                memcpy(of_prop->value, &hose->global_number, sizeof(hose->global_number));
-                prom_add_property(dev, of_prop);
-        }
-
-        disp_name = NULL;
-        if (device_is_compatible(dev, "u3-agp")) {
-                setup_u3_agp(hose);
-                disp_name = "U3-AGP";
-                primary = 0;
-        } else if (device_is_compatible(dev, "u3-ht")) {
-                setup_u3_ht(hose);
-                disp_name = "U3-HT";
-                primary = 1;
-        }
-        printk(KERN_INFO "Found %s PCI host bridge. Firmware bus number: %d->%d\n",
-                disp_name, hose->first_busno, hose->last_busno);
-
-        /* Interpret the "ranges" property */
-        /* This also maps the I/O region and sets isa_io/mem_base */
-        pmac_process_bridge_OF_ranges(hose, dev, primary);
-
-        /* Fixup "bus-range" OF property */
-        fixup_bus_range(dev);
-
-        return 0;
-}
-
-/*
- * We use our own read_irq_line here because PCI_INTERRUPT_PIN is
- * crap on some of Apple ASICs. We unconditionally use the Open Firmware
- * interrupt number as this is always right.
- */
-static int pmac_pci_read_irq_line(struct pci_dev *pci_dev)
-{
-        struct device_node *node;
-
-        node = pci_device_to_OF_node(pci_dev);
-        if (node == NULL)
-                return -1;
-        if (node->n_intrs == 0)
-                return -1;
-        pci_dev->irq = node->intrs[0].line;
-        pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq);
-
-        return 0;
-}
-
-void __init pmac_pcibios_fixup(void)
-{
-        struct pci_dev *dev = NULL;
-
-        for_each_pci_dev(dev)
-                pmac_pci_read_irq_line(dev);
-}
-
-static void __init pmac_fixup_phb_resources(void)
-{
-        struct pci_controller *hose, *tmp;
-        
-        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
-                unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base;
-                hose->io_resource.start += offset;
-                hose->io_resource.end += offset;
-                printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n",
-                       hose->global_number,
-                       hose->io_resource.start, hose->io_resource.end);
-        }
-}
-
-void __init pmac_pci_init(void)
-{
-        struct device_node *np, *root;
-        struct device_node *ht = NULL;
-
-        /* Probe root PCI hosts, that is on U3 the AGP host and the
-         * HyperTransport host. That one is actually "kept" around
-         * and actually added last as it's resource management relies
-         * on the AGP resources to have been setup first
-         */
-        root = of_find_node_by_path("/");
-        if (root == NULL) {
-                printk(KERN_CRIT "pmac_find_bridges: can't find root of device tree\n");
-                return;
-        }
-        for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) {
-                if (np->name == NULL)
-                        continue;
-                if (strcmp(np->name, "pci") == 0) {
-                        if (add_bridge(np) == 0)
-                                of_node_get(np);
-                }
-                if (strcmp(np->name, "ht") == 0) {
-                        of_node_get(np);
-                        ht = np;
-                }
-        }
-        of_node_put(root);
-
-        /* Now setup the HyperTransport host if we found any
-         */
-        if (ht && add_bridge(ht) != 0)
-                of_node_put(ht);
-
-        /* Fixup the IO resources on our host bridges as the common code
-         * does it only for childs of the host bridges
-         */
-        pmac_fixup_phb_resources();
-
-        /* Setup the linkage between OF nodes and PHBs */ 
-        pci_devs_phb_init();
-
-        /* Fixup the PCI<->OF mapping for U3 AGP due to bus renumbering. We
-         * assume there is no P2P bridge on the AGP bus, which should be a
-         * safe assumptions hopefully.
-         */
-        if (u3_agp) {
-                struct device_node *np = u3_agp->arch_data;
-                PCI_DN(np)->busno = 0xf0;
-                for (np = np->child; np; np = np->sibling)
-                        PCI_DN(np)->busno = 0xf0;
-        }
-
-        pmac_check_ht_link();
-
-        /* Tell pci.c to not use the common resource allocation mecanism */
-        pci_probe_only = 1;
-        
-        /* Allow all IO */
-        io_page_mask = -1;
-}
-
-/*
- * Disable second function on K2-SATA, it's broken
- * and disable IO BARs on first one
- */
-static void fixup_k2_sata(struct pci_dev* dev)
-{
-        int i;
-        u16 cmd;
-
-        if (PCI_FUNC(dev->devfn) > 0) {
-                pci_read_config_word(dev, PCI_COMMAND, &cmd);
-                cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
-                pci_write_config_word(dev, PCI_COMMAND, cmd);
-                for (i = 0; i < 6; i++) {
-                        dev->resource[i].start = dev->resource[i].end = 0;
-                        dev->resource[i].flags = 0;
-                        pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, 0);
-                }
-        } else {
-                pci_read_config_word(dev, PCI_COMMAND, &cmd);
-                cmd &= ~PCI_COMMAND_IO;
-                pci_write_config_word(dev, PCI_COMMAND, cmd);
-                for (i = 0; i < 5; i++) {
-                        dev->resource[i].start = dev->resource[i].end = 0;
-                        dev->resource[i].flags = 0;
-                        pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, 0);
-                }
-        }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, fixup_k2_sata);
-
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
deleted file mode 100644
index fa8121d53b89..000000000000
--- a/arch/ppc64/kernel/pmac_setup.c
+++ /dev/null
@@ -1,525 +0,0 @@
-/*
- *  arch/ppc/platforms/setup.c
- *
- *  PowerPC version
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- *  Adapted for Power Macintosh by Paul Mackerras
- *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
- *
- *  Derived from "arch/alpha/kernel/setup.c"
- *    Copyright (C) 1995 Linus Torvalds
- *
- *  Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-
-/*
- * bootup setup stuff..
- */
-
-#undef DEBUG
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/tty.h>
-#include <linux/string.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/vt_kern.h>
-#include <linux/console.h>
-#include <linux/ide.h>
-#include <linux/pci.h>
-#include <linux/adb.h>
-#include <linux/cuda.h>
-#include <linux/pmu.h>
-#include <linux/irq.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/bitops.h>
-
-#include <asm/processor.h>
-#include <asm/sections.h>
-#include <asm/prom.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/pci-bridge.h>
-#include <asm/iommu.h>
-#include <asm/machdep.h>
-#include <asm/dma.h>
-#include <asm/btext.h>
-#include <asm/cputable.h>
-#include <asm/pmac_feature.h>
-#include <asm/time.h>
-#include <asm/of_device.h>
-#include <asm/lmb.h>
-#include <asm/smu.h>
-#include <asm/pmc.h>
-
-#include "pmac.h"
-#include "mpic.h"
-
-#ifdef DEBUG
-#define DBG(fmt...) udbg_printf(fmt)
-#else
-#define DBG(fmt...)
-#endif
-
-static int current_root_goodness = -1;
-#define DEFAULT_ROOT_DEVICE Root_SDA1   /* sda1 - slightly silly choice */
-
-extern  int powersave_nap;
-int sccdbg;
-
-sys_ctrler_t sys_ctrler;
-EXPORT_SYMBOL(sys_ctrler);
-
-#ifdef CONFIG_PMAC_SMU
-unsigned long smu_cmdbuf_abs;
-EXPORT_SYMBOL(smu_cmdbuf_abs);
-#endif
-
-extern void udbg_init_scc(struct device_node *np);
-
-static void __pmac pmac_show_cpuinfo(struct seq_file *m)
-{
-        struct device_node *np;
-        char *pp;
-        int plen;
-        char* mbname;
-        int mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
-                                        PMAC_MB_INFO_MODEL, 0);
-        unsigned int mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
-                                                 PMAC_MB_INFO_FLAGS, 0);
-
-        if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
-                              (long)&mbname) != 0)
-                mbname = "Unknown";
-        
-        /* find motherboard type */
-        seq_printf(m, "machine\t\t: ");
-        np = of_find_node_by_path("/");
-        if (np != NULL) {
-                pp = (char *) get_property(np, "model", NULL);
-                if (pp != NULL)
-                        seq_printf(m, "%s\n", pp);
-                else
-                        seq_printf(m, "PowerMac\n");
-                pp = (char *) get_property(np, "compatible", &plen);
-                if (pp != NULL) {
-                        seq_printf(m, "motherboard\t:");
-                        while (plen > 0) {
-                                int l = strlen(pp) + 1;
-                                seq_printf(m, " %s", pp);
-                                plen -= l;
-                                pp += l;
-                        }
-                        seq_printf(m, "\n");
-                }
-                of_node_put(np);
-        } else
-                seq_printf(m, "PowerMac\n");
-
-        /* print parsed model */
-        seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
-        seq_printf(m, "pmac flags\t: %08x\n", mbflags);
-
-        /* Indicate newworld */
-        seq_printf(m, "pmac-generation\t: NewWorld\n");
-}
-
-
-static void __init pmac_setup_arch(void)
-{
-        /* init to some ~sane value until calibrate_delay() runs */
-        loops_per_jiffy = 50000000;
-
-        /* Probe motherboard chipset */
-        pmac_feature_init();
-#if 0
-        /* Lock-enable the SCC channel used for debug */
-        if (sccdbg) {
-                np = of_find_node_by_name(NULL, "escc");
-                if (np)
-                        pmac_call_feature(PMAC_FTR_SCC_ENABLE, np,
-                                          PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
-        }
-#endif
-        /* We can NAP */
-        powersave_nap = 1;
-
-#ifdef CONFIG_ADB_PMU
-        /* Initialize the PMU if any */
-        find_via_pmu();
-#endif
-#ifdef CONFIG_PMAC_SMU
-        /* Initialize the SMU if any */
-        smu_init();
-#endif
-
-        /* Init NVRAM access */
-        pmac_nvram_init();
-
-        /* Setup SMP callback */
-#ifdef CONFIG_SMP
-        pmac_setup_smp();
-#endif
-
-        /* Lookup PCI hosts */
-        pmac_pci_init();
-
-#ifdef CONFIG_DUMMY_CONSOLE
-        conswitchp = &dummy_con;
-#endif
-
-        printk(KERN_INFO "Using native/NAP idle loop\n");
-}
-
-#ifdef CONFIG_SCSI
-void note_scsi_host(struct device_node *node, void *host)
-{
-        /* Obsolete */
-}
-#endif
-
-
-static int initializing = 1;
-
-static int pmac_late_init(void)
-{
-        initializing = 0;
-        return 0;
-}
-
-late_initcall(pmac_late_init);
-
-/* can't be __init - can be called whenever a disk is first accessed */
-void __pmac note_bootable_part(dev_t dev, int part, int goodness)
-{
-        extern dev_t boot_dev;
-        char *p;
-
-        if (!initializing)
-                return;
-        if ((goodness <= current_root_goodness) &&
-            ROOT_DEV != DEFAULT_ROOT_DEVICE)
-                return;
-        p = strstr(saved_command_line, "root=");
-        if (p != NULL && (p == saved_command_line || p[-1] == ' '))
-                return;
-
-        if (!boot_dev || dev == boot_dev) {
-                ROOT_DEV = dev + part;
-                boot_dev = 0;
-                current_root_goodness = goodness;
-        }
-}
-
-static void __pmac pmac_restart(char *cmd)
-{
-        switch(sys_ctrler) {
-#ifdef CONFIG_ADB_PMU
-        case SYS_CTRLER_PMU:
-                pmu_restart();
-                break;
-#endif
-
-#ifdef CONFIG_PMAC_SMU
-        case SYS_CTRLER_SMU:
-                smu_restart();
-                break;
-#endif
-        default:
-                ;
-        }
-}
-
-static void __pmac pmac_power_off(void)
-{
-        switch(sys_ctrler) {
-#ifdef CONFIG_ADB_PMU
-        case SYS_CTRLER_PMU:
-                pmu_shutdown();
-                break;
-#endif
-#ifdef CONFIG_PMAC_SMU
-        case SYS_CTRLER_SMU:
-                smu_shutdown();
-                break;
-#endif
-        default:
-                ;
-        }
-}
-
-static void __pmac pmac_halt(void)
-{
-        pmac_power_off();
-}
-
-#ifdef CONFIG_BOOTX_TEXT
-static void btext_putc(unsigned char c)
-{
-        btext_drawchar(c);
-}
-
-static void __init init_boot_display(void)
-{
-        char *name;
-        struct device_node *np = NULL; 
-        int rc = -ENODEV;
-
-        printk("trying to initialize btext ...\n");
-
-        name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
-        if (name != NULL) {
-                np = of_find_node_by_path(name);
-                if (np != NULL) {
-                        if (strcmp(np->type, "display") != 0) {
-                                printk("boot stdout isn't a display !\n");
-                                of_node_put(np);
-                                np = NULL;
-                        }
-                }
-        }
-        if (np)
-                rc = btext_initialize(np);
-        if (rc == 0)
-                return;
-
-        for (np = NULL; (np = of_find_node_by_type(np, "display"));) {
-                if (get_property(np, "linux,opened", NULL)) {
-                        printk("trying %s ...\n", np->full_name);
-                        rc = btext_initialize(np);
-                        printk("result: %d\n", rc);
-                }
-                if (rc == 0)
-                        return;
-        }
-}
-#endif /* CONFIG_BOOTX_TEXT */
-
-/* 
- * Early initialization.
- */
-static void __init pmac_init_early(void)
-{
-        DBG(" -> pmac_init_early\n");
-
-        /* Initialize hash table, from now on, we can take hash faults
-         * and call ioremap
-         */
-        hpte_init_native();
-
-        /* Init SCC */
-        if (strstr(cmd_line, "sccdbg")) {
-                sccdbg = 1;
-                udbg_init_scc(NULL);
-        }
-#ifdef CONFIG_BOOTX_TEXT
-        else {
-                init_boot_display();
-
-                udbg_putc = btext_putc;
-        }
-#endif /* CONFIG_BOOTX_TEXT */
-
-        /* Setup interrupt mapping options */
-        ppc64_interrupt_controller = IC_OPEN_PIC;
-
-        iommu_init_early_u3();
-
-        DBG(" <- pmac_init_early\n");
-}
-
-static int pmac_u3_cascade(struct pt_regs *regs, void *data)
-{
-        return mpic_get_one_irq((struct mpic *)data, regs);
-}
-
-static __init void pmac_init_IRQ(void)
-{
-        struct device_node *irqctrler  = NULL;
-        struct device_node *irqctrler2 = NULL;
-        struct device_node *np = NULL;
-        struct mpic *mpic1, *mpic2;
-
-        /* We first try to detect Apple's new Core99 chipset, since mac-io
-         * is quite different on those machines and contains an IBM MPIC2.
-         */
-        while ((np = of_find_node_by_type(np, "open-pic")) != NULL) {
-                struct device_node *parent = of_get_parent(np);
-                if (parent && !strcmp(parent->name, "u3"))
-                        irqctrler2 = of_node_get(np);
-                else
-                        irqctrler = of_node_get(np);
-                of_node_put(parent);
-        }
-        if (irqctrler != NULL && irqctrler->n_addrs > 0) {
-                unsigned char senses[128];
-
-                printk(KERN_INFO "PowerMac using OpenPIC irq controller at 0x%08x\n",
-                       (unsigned int)irqctrler->addrs[0].address);
-
-                prom_get_irq_senses(senses, 0, 128);
-                mpic1 = mpic_alloc(irqctrler->addrs[0].address,
-                                   MPIC_PRIMARY | MPIC_WANTS_RESET,
-                                   0, 0, 128, 256, senses, 128, " K2-MPIC  ");
-                BUG_ON(mpic1 == NULL);
-                mpic_init(mpic1);               
-
-                if (irqctrler2 != NULL && irqctrler2->n_intrs > 0 &&
-                    irqctrler2->n_addrs > 0) {
-                        printk(KERN_INFO "Slave OpenPIC at 0x%08x hooked on IRQ %d\n",
-                               (u32)irqctrler2->addrs[0].address,
-                               irqctrler2->intrs[0].line);
-
-                        pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0);
-                        prom_get_irq_senses(senses, 128, 128 + 128);
-
-                        /* We don't need to set MPIC_BROKEN_U3 here since we don't have
-                         * hypertransport interrupts routed to it
-                         */
-                        mpic2 = mpic_alloc(irqctrler2->addrs[0].address,
-                                           MPIC_BIG_ENDIAN | MPIC_WANTS_RESET,
-                                           0, 128, 128, 0, senses, 128, " U3-MPIC  ");
-                        BUG_ON(mpic2 == NULL);
-                        mpic_init(mpic2);
-                        mpic_setup_cascade(irqctrler2->intrs[0].line,
-                                           pmac_u3_cascade, mpic2);
-                }
-        }
-        of_node_put(irqctrler);
-        of_node_put(irqctrler2);
-}
-
-static void __init pmac_progress(char *s, unsigned short hex)
-{
-        if (sccdbg) {
-                udbg_puts(s);
-                udbg_puts("\n");
-        }
-#ifdef CONFIG_BOOTX_TEXT
-        else if (boot_text_mapped) {
-                btext_drawstring(s);
-                btext_drawstring("\n");
-        }
-#endif /* CONFIG_BOOTX_TEXT */
-}
-
-/*
- * pmac has no legacy IO, anything calling this function has to
- * fail or bad things will happen
- */
-static int pmac_check_legacy_ioport(unsigned int baseport)
-{
-        return -ENODEV;
-}
-
-static int __init pmac_declare_of_platform_devices(void)
-{
-        struct device_node *np, *npp;
-
-        npp = of_find_node_by_name(NULL, "u3");
-        if (npp) {
-                for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
-                        if (strncmp(np->name, "i2c", 3) == 0) {
-                                of_platform_device_create(np, "u3-i2c", NULL);
-                                of_node_put(np);
-                                break;
-                        }
-                }
-                of_node_put(npp);
-        }
-        npp = of_find_node_by_type(NULL, "smu");
-        if (npp) {
-                of_platform_device_create(npp, "smu", NULL);
-                of_node_put(npp);
-        }
-
-        return 0;
-}
-
-device_initcall(pmac_declare_of_platform_devices);
-
-/*
- * Called very early, MMU is off, device-tree isn't unflattened
- */
-static int __init pmac_probe(int platform)
-{
-        if (platform != PLATFORM_POWERMAC)
-                return 0;
-        /*
-         * On U3, the DART (iommu) must be allocated now since it
-         * has an impact on htab_initialize (due to the large page it
-         * occupies having to be broken up so the DART itself is not
-         * part of the cacheable linar mapping
-         */
-        alloc_u3_dart_table();
-
-#ifdef CONFIG_PMAC_SMU
-        /*
-         * SMU based G5s need some memory below 2Gb, at least the current
-         * driver needs that. We have to allocate it now. We allocate 4k
-         * (1 small page) for now.
-         */
-        smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
-#endif /* CONFIG_PMAC_SMU */
-
-        return 1;
-}
-
-static int pmac_probe_mode(struct pci_bus *bus)
-{
-        struct device_node *node = bus->sysdata;
-
-        /* We need to use normal PCI probing for the AGP bus,
-           since the device for the AGP bridge isn't in the tree. */
-        if (bus->self == NULL && device_is_compatible(node, "u3-agp"))
-                return PCI_PROBE_NORMAL;
-
-        return PCI_PROBE_DEVTREE;
-}
-
-struct machdep_calls __initdata pmac_md = {
-#ifdef CONFIG_HOTPLUG_CPU
-        .cpu_die                = generic_mach_cpu_die,
-#endif
-        .probe                  = pmac_probe,
-        .setup_arch             = pmac_setup_arch,
-        .init_early             = pmac_init_early,
-        .get_cpuinfo            = pmac_show_cpuinfo,
-        .init_IRQ               = pmac_init_IRQ,
-        .get_irq                = mpic_get_irq,
-        .pcibios_fixup          = pmac_pcibios_fixup,
-        .pci_probe_mode         = pmac_probe_mode,
-        .restart                = pmac_restart,
-        .power_off              = pmac_power_off,
-        .halt                   = pmac_halt,
-        .get_boot_time          = pmac_get_boot_time,
-        .set_rtc_time           = pmac_set_rtc_time,
-        .get_rtc_time           = pmac_get_rtc_time,
-        .calibrate_decr         = pmac_calibrate_decr,
-        .feature_call           = pmac_do_feature_call,
-        .progress               = pmac_progress,
-        .check_legacy_ioport    = pmac_check_legacy_ioport,
-        .idle_loop              = native_idle,
-        .enable_pmcs            = power4_enable_pmcs,
-};
diff --git a/arch/ppc64/kernel/pmac_smp.c b/arch/ppc64/kernel/pmac_smp.c
deleted file mode 100644
index a23de37227bf..000000000000
--- a/arch/ppc64/kernel/pmac_smp.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/*
- * SMP support for power macintosh.
- *
- * We support both the old "powersurge" SMP architecture
- * and the current Core99 (G4 PowerMac) machines.
- *
- * Note that we don't support the very first rev. of
- * Apple/DayStar 2 CPUs board, the one with the funky
- * watchdog. Hopefully, none of these should be there except
- * maybe internally to Apple. I should probably still add some
- * code to detect this card though and disable SMP. --BenH.
- *
- * Support Macintosh G4 SMP by Troy Benjegerdes (hozer@drgw.net)
- * and Ben Herrenschmidt <benh@kernel.crashing.org>.
- *
- * Support for DayStar quad CPU cards
- * Copyright (C) XLR8, Inc. 1994-2000
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-
-#undef DEBUG
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/errno.h>
-#include <linux/irq.h>
-
-#include <asm/ptrace.h>
-#include <asm/atomic.h>
-#include <asm/irq.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/sections.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/machdep.h>
-#include <asm/pmac_feature.h>
-#include <asm/time.h>
-#include <asm/cacheflush.h>
-#include <asm/keylargo.h>
-#include <asm/pmac_low_i2c.h>
-
-#include "mpic.h"
-
-#ifdef DEBUG
-#define DBG(fmt...) udbg_printf(fmt)
-#else
-#define DBG(fmt...)
-#endif
-
-extern void pmac_secondary_start_1(void);
-extern void pmac_secondary_start_2(void);
-extern void pmac_secondary_start_3(void);
-
-extern struct smp_ops_t *smp_ops;
-
-static void (*pmac_tb_freeze)(int freeze);
-static struct device_node *pmac_tb_clock_chip_host;
-static u8 pmac_tb_pulsar_addr;
-static DEFINE_SPINLOCK(timebase_lock);
-static unsigned long timebase;
-
-static void smp_core99_cypress_tb_freeze(int freeze)
-{
-        u8 data;
-        int rc;
-
-        /* Strangely, the device-tree says address is 0xd2, but darwin
-         * accesses 0xd0 ...
-         */
-        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_combined);
-        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
-                               0xd0 | pmac_low_i2c_read,
-                               0x81, &data, 1);
-        if (rc != 0)
-                goto bail;
-
-        data = (data & 0xf3) | (freeze ? 0x00 : 0x0c);
-
-        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_stdsub);
-        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
-                               0xd0 | pmac_low_i2c_write,
-                               0x81, &data, 1);
-
- bail:
-        if (rc != 0) {
-                printk("Cypress Timebase %s rc: %d\n",
-                       freeze ? "freeze" : "unfreeze", rc);
-                panic("Timebase freeze failed !\n");
-        }
-}
-
-static void smp_core99_pulsar_tb_freeze(int freeze)
-{
-        u8 data;
-        int rc;
-
-        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_combined);
-        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
-                               pmac_tb_pulsar_addr | pmac_low_i2c_read,
-                               0x2e, &data, 1);
-        if (rc != 0)
-                goto bail;
-
-        data = (data & 0x88) | (freeze ? 0x11 : 0x22);
-
-        pmac_low_i2c_setmode(pmac_tb_clock_chip_host, pmac_low_i2c_mode_stdsub);
-        rc = pmac_low_i2c_xfer(pmac_tb_clock_chip_host,
-                               pmac_tb_pulsar_addr | pmac_low_i2c_write,
-                               0x2e, &data, 1);
- bail:
-        if (rc != 0) {
-                printk(KERN_ERR "Pulsar Timebase %s rc: %d\n",
-                       freeze ? "freeze" : "unfreeze", rc);
-                panic("Timebase freeze failed !\n");
-        }
-}
-
-
-static void smp_core99_give_timebase(void)
-{
-        /* Open i2c bus for synchronous access */
-        if (pmac_low_i2c_open(pmac_tb_clock_chip_host, 0))
-                panic("Can't open i2c for TB sync !\n");
-
-        spin_lock(&timebase_lock);
-        (*pmac_tb_freeze)(1);
-        mb();
-        timebase = get_tb();
-        spin_unlock(&timebase_lock);
-
-        while (timebase)
-                barrier();
-
-        spin_lock(&timebase_lock);
-        (*pmac_tb_freeze)(0);
-        spin_unlock(&timebase_lock);
-
-        /* Close i2c bus */
-        pmac_low_i2c_close(pmac_tb_clock_chip_host);
-}
-
-
-static void __devinit smp_core99_take_timebase(void)
-{
-        while (!timebase)
-                barrier();
-        spin_lock(&timebase_lock);
-        set_tb(timebase >> 32, timebase & 0xffffffff);
-        timebase = 0;
-        spin_unlock(&timebase_lock);
-}
-
-
-static int __init smp_core99_probe(void)
-{
-        struct device_node *cpus;       
-        struct device_node *cc; 
-        int ncpus = 0;
-
-        /* Maybe use systemconfiguration here ? */
-        if (ppc_md.progress) ppc_md.progress("smp_core99_probe", 0x345);
-
-        /* Count CPUs in the device-tree */
-        for (cpus = NULL; (cpus = of_find_node_by_type(cpus, "cpu")) != NULL;)
-                ++ncpus;
-
-        printk(KERN_INFO "PowerMac SMP probe found %d cpus\n", ncpus);
-
-        /* Nothing more to do if less than 2 of them */
-        if (ncpus <= 1)
-                return 1;
-
-        /* HW sync only on these platforms */
-        if (!machine_is_compatible("PowerMac7,2") &&
-            !machine_is_compatible("PowerMac7,3") &&
-            !machine_is_compatible("RackMac3,1"))
-                goto nohwsync;
-
-        /* Look for the clock chip */
-        for (cc = NULL; (cc = of_find_node_by_name(cc, "i2c-hwclock")) != NULL;) {
-                struct device_node *p = of_get_parent(cc);
-                u32 *reg;
-                int ok;
-                ok = p && device_is_compatible(p, "uni-n-i2c");
-                if (!ok)
-                        goto next;
-                reg = (u32 *)get_property(cc, "reg", NULL);
-                if (reg == NULL)
-                        goto next;
-                switch (*reg) {
-                case 0xd2:
-                        if (device_is_compatible(cc, "pulsar-legacy-slewing")) {
-                                pmac_tb_freeze = smp_core99_pulsar_tb_freeze;
-                                pmac_tb_pulsar_addr = 0xd2;
-                                printk(KERN_INFO "Timebase clock is Pulsar chip\n");
-                        } else if (device_is_compatible(cc, "cy28508")) {
-                                pmac_tb_freeze = smp_core99_cypress_tb_freeze;
-                                printk(KERN_INFO "Timebase clock is Cypress chip\n");
-                        }
-                        break;
-                case 0xd4:
-                        pmac_tb_freeze = smp_core99_pulsar_tb_freeze;
-                        pmac_tb_pulsar_addr = 0xd4;
-                        printk(KERN_INFO "Timebase clock is Pulsar chip\n");
-                        break;
-                }
-                if (pmac_tb_freeze != NULL) {
-                        pmac_tb_clock_chip_host = p;
-                        smp_ops->give_timebase = smp_core99_give_timebase;
-                        smp_ops->take_timebase = smp_core99_take_timebase;
-                        of_node_put(cc);
-                        of_node_put(p);
-                        break;
-                }
-        next:
-                of_node_put(p);
-        }
-
- nohwsync:
-        mpic_request_ipis();
-
-        return ncpus;
-}
-
-static void __init smp_core99_kick_cpu(int nr)
-{
-        int save_vector, j;
-        unsigned long new_vector;
-        unsigned long flags;
-        volatile unsigned int *vector
-                 = ((volatile unsigned int *)(KERNELBASE+0x100));
-
-        if (nr < 1 || nr > 3)
-                return;
-        if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu", 0x346);
-
-        local_irq_save(flags);
-        local_irq_disable();
-
-        /* Save reset vector */
-        save_vector = *vector;
-
-        /* Setup fake reset vector that does    
-         *   b .pmac_secondary_start - KERNELBASE
-         */
-        switch(nr) {
-        case 1:
-                new_vector = (unsigned long)pmac_secondary_start_1;
-                break;
-        case 2:
-                new_vector = (unsigned long)pmac_secondary_start_2;
-                break;                  
-        case 3:
-        default:
-                new_vector = (unsigned long)pmac_secondary_start_3;
-                break;
-        }
-        *vector = 0x48000002 + (new_vector - KERNELBASE);
-
-        /* flush data cache and inval instruction cache */
-        flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
-
-        /* Put some life in our friend */
-        pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0);
-        paca[nr].cpu_start = 1;
-
-        /* FIXME: We wait a bit for the CPU to take the exception, I should
-         * instead wait for the entry code to set something for me. Well,
-         * ideally, all that crap will be done in prom.c and the CPU left
-         * in a RAM-based wait loop like CHRP.
-         */
-        for (j = 1; j < 1000000; j++)
-                mb();
-
-        /* Restore our exception vector */
-        *vector = save_vector;
-        flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
-
-        local_irq_restore(flags);
-        if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
-}
-
-static void __init smp_core99_setup_cpu(int cpu_nr)
-{
-        /* Setup MPIC */
-        mpic_setup_this_cpu();
-
-        if (cpu_nr == 0) {
-                extern void g5_phy_disable_cpu1(void);
-
-                /* If we didn't start the second CPU, we must take
-                 * it off the bus
-                 */
-                if (num_online_cpus() < 2)              
-                        g5_phy_disable_cpu1();
-                if (ppc_md.progress) ppc_md.progress("smp_core99_setup_cpu 0 done", 0x349);
-        }
-}
-
-struct smp_ops_t core99_smp_ops __pmacdata = {
-        .message_pass   = smp_mpic_message_pass,
-        .probe          = smp_core99_probe,
-        .kick_cpu       = smp_core99_kick_cpu,
-        .setup_cpu      = smp_core99_setup_cpu,
-        .give_timebase  = smp_generic_give_timebase,
-        .take_timebase  = smp_generic_take_timebase,
-};
-
-void __init pmac_setup_smp(void)
-{
-        smp_ops = &core99_smp_ops;
-#ifdef CONFIG_HOTPLUG_CPU
-        smp_ops->cpu_enable = generic_cpu_enable;
-        smp_ops->cpu_disable = generic_cpu_disable;
-        smp_ops->cpu_die = generic_cpu_die;
-#endif
-}
diff --git a/arch/ppc64/kernel/pmac_time.c b/arch/ppc64/kernel/pmac_time.c
deleted file mode 100644
index 41bbb8c59697..000000000000
--- a/arch/ppc64/kernel/pmac_time.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/*
- * Support for periodic interrupts (100 per second) and for getting
- * the current time from the RTC on Power Macintoshes.
- *
- * We use the decrementer register for our periodic interrupts.
- *
- * Paul Mackerras       August 1996.
- * Copyright (C) 1996 Paul Mackerras.
- * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
- *
- */
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/time.h>
-#include <linux/adb.h>
-#include <linux/pmu.h>
-#include <linux/interrupt.h>
-
-#include <asm/sections.h>
-#include <asm/prom.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-#include <asm/nvram.h>
-#include <asm/smu.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/* Apparently the RTC stores seconds since 1 Jan 1904 */
-#define RTC_OFFSET      2082844800
-
-/*
- * Calibrate the decrementer frequency with the VIA timer 1.
- */
-#define VIA_TIMER_FREQ_6        4700000 /* time 1 frequency * 6 */
-
-extern struct timezone sys_tz;
-extern void to_tm(int tim, struct rtc_time * tm);
-
-void __pmac pmac_get_rtc_time(struct rtc_time *tm)
-{
-        switch(sys_ctrler) {
-#ifdef CONFIG_ADB_PMU
-        case SYS_CTRLER_PMU: {
-                /* TODO: Move that to a function in the PMU driver */
-                struct adb_request req;
-                unsigned int now;
-
-                if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
-                        return;
-                pmu_wait_complete(&req);
-                if (req.reply_len != 4)
-                        printk(KERN_ERR "pmac_get_rtc_time: PMU returned a %d"
-                               " bytes reply\n", req.reply_len);
-                now = (req.reply[0] << 24) + (req.reply[1] << 16)
-                        + (req.reply[2] << 8) + req.reply[3];
-                DBG("get: %u -> %u\n", (int)now, (int)(now - RTC_OFFSET));
-                now -= RTC_OFFSET;
-
-                to_tm(now, tm);
-                tm->tm_year -= 1900;
-                tm->tm_mon -= 1;
-        
-                DBG("-> tm_mday: %d, tm_mon: %d, tm_year: %d, %d:%02d:%02d\n",
-                    tm->tm_mday, tm->tm_mon, tm->tm_year,
-                    tm->tm_hour, tm->tm_min, tm->tm_sec);
-                break;
-        }
-#endif /* CONFIG_ADB_PMU */
-
-#ifdef CONFIG_PMAC_SMU
-        case SYS_CTRLER_SMU:
-                smu_get_rtc_time(tm, 1);
-                break;
-#endif /* CONFIG_PMAC_SMU */
-        default:
-                ;
-        }
-}
-
-int __pmac pmac_set_rtc_time(struct rtc_time *tm)
-{
-        switch(sys_ctrler) {
-#ifdef CONFIG_ADB_PMU
-        case SYS_CTRLER_PMU: {
-                /* TODO: Move that to a function in the PMU driver */
-                struct adb_request req;
-                unsigned int nowtime;
-
-                DBG("set: tm_mday: %d, tm_mon: %d, tm_year: %d,"
-                    " %d:%02d:%02d\n",
-                    tm->tm_mday, tm->tm_mon, tm->tm_year,
-                    tm->tm_hour, tm->tm_min, tm->tm_sec);
-
-                nowtime = mktime(tm->tm_year + 1900, tm->tm_mon + 1,
-                                 tm->tm_mday, tm->tm_hour, tm->tm_min,
-                                 tm->tm_sec);
-
-                DBG("-> %u -> %u\n", (int)nowtime,
-                    (int)(nowtime + RTC_OFFSET));
-                nowtime += RTC_OFFSET;
-
-                if (pmu_request(&req, NULL, 5, PMU_SET_RTC,
-                                nowtime >> 24, nowtime >> 16,
-                                nowtime >> 8, nowtime) < 0)
-                        return -ENXIO;
-                pmu_wait_complete(&req);
-                if (req.reply_len != 0)
-                        printk(KERN_ERR "pmac_set_rtc_time: PMU returned a %d"
-                               " bytes reply\n", req.reply_len);
-                return 0;
-        }
-#endif /* CONFIG_ADB_PMU */
-
-#ifdef CONFIG_PMAC_SMU
-        case SYS_CTRLER_SMU:
-                return smu_set_rtc_time(tm, 1);
-#endif /* CONFIG_PMAC_SMU */
-        default:
-                return -ENODEV;
-        }
-}
-
-void __init pmac_get_boot_time(struct rtc_time *tm)
-{
-        pmac_get_rtc_time(tm);
-
-#ifdef disabled__CONFIG_NVRAM
-        s32 delta = 0;
-        int dst;
-        
-        delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
-        delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
-        delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
-        if (delta & 0x00800000UL)
-                delta |= 0xFF000000UL;
-        dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
-        printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
-                dst ? "on" : "off");
-#endif
-}
-
-/*
- * Query the OF and get the decr frequency.
- * FIXME: merge this with generic_calibrate_decr
- */
-void __init pmac_calibrate_decr(void)
-{
-        struct device_node *cpu;
-        unsigned int freq, *fp;
-        struct div_result divres;
-
-        /*
-         * The cpu node should have a timebase-frequency property
-         * to tell us the rate at which the decrementer counts.
-         */
-        cpu = find_type_devices("cpu");
-        if (cpu == 0)
-                panic("can't find cpu node in time_init");
-        fp = (unsigned int *) get_property(cpu, "timebase-frequency", NULL);
-        if (fp == 0)
-                panic("can't get cpu timebase frequency");
-        freq = *fp;
-        printk("time_init: decrementer frequency = %u.%.6u MHz\n",
-               freq/1000000, freq%1000000);
-        tb_ticks_per_jiffy = freq / HZ;
-        tb_ticks_per_sec = tb_ticks_per_jiffy * HZ;
-        tb_ticks_per_usec = freq / 1000000;
-        tb_to_us = mulhwu_scale_factor(freq, 1000000);
-        div128_by_32( 1024*1024, 0, tb_ticks_per_sec, &divres );
-        tb_to_xs = divres.result_low;
-        ppc_tb_freq = freq;
-
-        fp = (unsigned int *)get_property(cpu, "clock-frequency", NULL);
-        if (fp == 0)
-                panic("can't get cpu processor frequency");
-        ppc_proc_freq = *fp;
-
-        setup_default_decr();
-}
-
diff --git a/arch/ppc64/kernel/ppc_ksyms.c b/arch/ppc64/kernel/ppc_ksyms.c
index 705742f4eec6..84006e26342c 100644
--- a/arch/ppc64/kernel/ppc_ksyms.c
+++ b/arch/ppc64/kernel/ppc_ksyms.c
@@ -19,7 +19,6 @@
 #include <asm/hw_irq.h>
 #include <asm/abs_addr.h>
 #include <asm/cacheflush.h>
-#include <asm/iSeries/HvCallSc.h>
 
 EXPORT_SYMBOL(strcpy);
 EXPORT_SYMBOL(strncpy);
@@ -46,17 +45,6 @@ EXPORT_SYMBOL(__strnlen_user);
 
 EXPORT_SYMBOL(reloc_offset);
 
-#ifdef CONFIG_PPC_ISERIES
-EXPORT_SYMBOL(HvCall0);
-EXPORT_SYMBOL(HvCall1);
-EXPORT_SYMBOL(HvCall2);
-EXPORT_SYMBOL(HvCall3);
-EXPORT_SYMBOL(HvCall4);
-EXPORT_SYMBOL(HvCall5);
-EXPORT_SYMBOL(HvCall6);
-EXPORT_SYMBOL(HvCall7);
-#endif
-
 EXPORT_SYMBOL(_insb);
 EXPORT_SYMBOL(_outsb);
 EXPORT_SYMBOL(_insw);
@@ -77,14 +65,6 @@ EXPORT_SYMBOL(giveup_altivec);
 EXPORT_SYMBOL(__flush_icache_range);
 EXPORT_SYMBOL(flush_dcache_range);
 
-#ifdef CONFIG_SMP
-#ifdef CONFIG_PPC_ISERIES
-EXPORT_SYMBOL(local_get_flags);
-EXPORT_SYMBOL(local_irq_disable);
-EXPORT_SYMBOL(local_irq_restore);
-#endif
-#endif
-
 EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL(memmove);
diff --git a/arch/ppc64/kernel/prom.c b/arch/ppc64/kernel/prom.c
index 7035deb6de92..97bfceb5353b 100644
--- a/arch/ppc64/kernel/prom.c
+++ b/arch/ppc64/kernel/prom.c
@@ -46,7 +46,6 @@
 #include <asm/pgtable.h>
 #include <asm/pci.h>
 #include <asm/iommu.h>
-#include <asm/bootinfo.h>
 #include <asm/ppcdebug.h>
 #include <asm/btext.h>
 #include <asm/sections.h>
@@ -78,11 +77,14 @@ typedef int interpret_func(struct device_node *, unsigned long *,
 extern struct rtas_t rtas;
 extern struct lmb lmb;
 extern unsigned long klimit;
+extern unsigned long memory_limit;
 
 static int __initdata dt_root_addr_cells;
 static int __initdata dt_root_size_cells;
 static int __initdata iommu_is_off;
 int __initdata iommu_force_on;
+unsigned long tce_alloc_start, tce_alloc_end;
+
 typedef u32 cell_t;
 
 #if 0
@@ -1063,7 +1065,6 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
 {
         u32 *prop;
         u64 *prop64;
-        extern unsigned long memory_limit, tce_alloc_start, tce_alloc_end;
 
         DBG("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
 
@@ -1237,7 +1238,7 @@ void __init early_init_devtree(void *params)
         lmb_init();
         scan_flat_dt(early_init_dt_scan_root, NULL);
         scan_flat_dt(early_init_dt_scan_memory, NULL);
-        lmb_enforce_memory_limit();
+        lmb_enforce_memory_limit(memory_limit);
         lmb_analyze();
         systemcfg->physicalMemorySize = lmb_phys_mem_size();
         lmb_reserve(0, __pa(klimit));
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index f252670874a4..69924ba4d7d9 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -44,7 +44,6 @@
 #include <asm/pgtable.h>
 #include <asm/pci.h>
 #include <asm/iommu.h>
-#include <asm/bootinfo.h>
 #include <asm/ppcdebug.h>
 #include <asm/btext.h>
 #include <asm/sections.h>
diff --git a/arch/ppc64/kernel/ptrace.c b/arch/ppc64/kernel/ptrace.c
deleted file mode 100644
index b1c044ca5756..000000000000
--- a/arch/ppc64/kernel/ptrace.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- *  linux/arch/ppc64/kernel/ptrace.c
- *
- *  PowerPC version
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- *  Derived from "arch/m68k/kernel/ptrace.c"
- *  Copyright (C) 1994 by Hamish Macdonald
- *  Taken from linux/kernel/ptrace.c and modified for M680x0.
- *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
- *
- * Modified by Cort Dougan (cort@hq.fsmlabs.com)
- * and Paul Mackerras (paulus@linuxcare.com.au).
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License.  See the file README.legal in the main directory of
- * this archive for more details.
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/errno.h>
-#include <linux/ptrace.h>
-#include <linux/user.h>
-#include <linux/security.h>
-#include <linux/audit.h>
-#include <linux/seccomp.h>
-#include <linux/signal.h>
-
-#include <asm/uaccess.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/ptrace-common.h>
-
-/*
- * does not yet catch signals sent when the child dies.
- * in exit.c or in signal.c.
- */
-
-/*
- * Called by kernel/ptrace.c when detaching..
- *
- * Make sure single step bits etc are not set.
- */
-void ptrace_disable(struct task_struct *child)
-{
-        /* make sure the single step bit is not set. */
-        clear_single_step(child);
-}
-
-int sys_ptrace(long request, long pid, long addr, long data)
-{
-        struct task_struct *child;
-        int ret = -EPERM;
-
-        lock_kernel();
-        if (request == PTRACE_TRACEME) {
-                /* are we already being traced? */
-                if (current->ptrace & PT_PTRACED)
-                        goto out;
-                ret = security_ptrace(current->parent, current);
-                if (ret)
-                        goto out;
-                /* set the ptrace bit in the process flags. */
-                current->ptrace |= PT_PTRACED;
-                ret = 0;
-                goto out;
-        }
-        ret = -ESRCH;
-        read_lock(&tasklist_lock);
-        child = find_task_by_pid(pid);
-        if (child)
-                get_task_struct(child);
-        read_unlock(&tasklist_lock);
-        if (!child)
-                goto out;
-
-        ret = -EPERM;
-        if (pid == 1)           /* you may not mess with init */
-                goto out_tsk;
-
-        if (request == PTRACE_ATTACH) {
-                ret = ptrace_attach(child);
-                goto out_tsk;
-        }
-
-        ret = ptrace_check_attach(child, request == PTRACE_KILL);
-        if (ret < 0)
-                goto out_tsk;
-
-        switch (request) {
-        /* when I and D space are separate, these will need to be fixed. */
-        case PTRACE_PEEKTEXT: /* read word at location addr. */ 
-        case PTRACE_PEEKDATA: {
-                unsigned long tmp;
-                int copied;
-
-                copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
-                ret = -EIO;
-                if (copied != sizeof(tmp))
-                        break;
-                ret = put_user(tmp,(unsigned long __user *) data);
-                break;
-        }
-
-        /* read the word at location addr in the USER area. */
-        case PTRACE_PEEKUSR: {
-                unsigned long index;
-                unsigned long tmp;
-
-                ret = -EIO;
-                /* convert to index and check */
-                index = (unsigned long) addr >> 3;
-                if ((addr & 7) || (index > PT_FPSCR))
-                        break;
-
-                if (index < PT_FPR0) {
-                        tmp = get_reg(child, (int)index);
-                } else {
-                        flush_fp_to_thread(child);
-                        tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
-                }
-                ret = put_user(tmp,(unsigned long __user *) data);
-                break;
-        }
-
-        /* If I and D space are separate, this will have to be fixed. */
-        case PTRACE_POKETEXT: /* write the word at location addr. */
-        case PTRACE_POKEDATA:
-                ret = 0;
-                if (access_process_vm(child, addr, &data, sizeof(data), 1)
-                                == sizeof(data))
-                        break;
-                ret = -EIO;
-                break;
-
-        /* write the word at location addr in the USER area */
-        case PTRACE_POKEUSR: {
-                unsigned long index;
-
-                ret = -EIO;
-                /* convert to index and check */
-                index = (unsigned long) addr >> 3;
-                if ((addr & 7) || (index > PT_FPSCR))
-                        break;
-
-                if (index == PT_ORIG_R3)
-                        break;
-                if (index < PT_FPR0) {
-                        ret = put_reg(child, index, data);
-                } else {
-                        flush_fp_to_thread(child);
-                        ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
-                        ret = 0;
-                }
-                break;
-        }
-
-        case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT: { /* restart after signal. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* make sure the single step bit is not set. */
-                clear_single_step(child);
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL: {
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                /* make sure the single step bit is not set. */
-                clear_single_step(child);
-                wake_up_process(child);
-                break;
-        }
-
-        case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                set_single_step(child);
-                child->exit_code = data;
-                /* give it a chance to run. */
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-        case PTRACE_GET_DEBUGREG: {
-                ret = -EINVAL;
-                /* We only support one DABR and no IABRS at the moment */
-                if (addr > 0)
-                        break;
-                ret = put_user(child->thread.dabr,
-                               (unsigned long __user *)data);
-                break;
-        }
-
-        case PTRACE_SET_DEBUGREG:
-                ret = ptrace_set_debugreg(child, addr, data);
-                break;
-
-        case PTRACE_DETACH:
-                ret = ptrace_detach(child, data);
-                break;
-
-        case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
-                int i;
-                unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
-                unsigned long __user *tmp = (unsigned long __user *)addr;
-
-                for (i = 0; i < 32; i++) {
-                        ret = put_user(*reg, tmp);
-                        if (ret)
-                                break;
-                        reg++;
-                        tmp++;
-                }
-                break;
-        }
-
-        case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
-                int i;
-                unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
-                unsigned long __user *tmp = (unsigned long __user *)addr;
-
-                for (i = 0; i < 32; i++) {
-                        ret = get_user(*reg, tmp);
-                        if (ret)
-                                break;
-                        reg++;
-                        tmp++;
-                }
-                break;
-        }
-
-        case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */
-                int i;
-                unsigned long *reg = &((unsigned long *)child->thread.fpr)[0];
-                unsigned long __user *tmp = (unsigned long __user *)addr;
-
-                flush_fp_to_thread(child);
-
-                for (i = 0; i < 32; i++) {
-                        ret = put_user(*reg, tmp);
-                        if (ret)
-                                break;
-                        reg++;
-                        tmp++;
-                }
-                break;
-        }
-
-        case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */
-                int i;
-                unsigned long *reg = &((unsigned long *)child->thread.fpr)[0];
-                unsigned long __user *tmp = (unsigned long __user *)addr;
-
-                flush_fp_to_thread(child);
-
-                for (i = 0; i < 32; i++) {
-                        ret = get_user(*reg, tmp);
-                        if (ret)
-                                break;
-                        reg++;
-                        tmp++;
-                }
-                break;
-        }
-
-#ifdef CONFIG_ALTIVEC
-        case PTRACE_GETVRREGS:
-                /* Get the child altivec register state. */
-                flush_altivec_to_thread(child);
-                ret = get_vrregs((unsigned long __user *)data, child);
-                break;
-
-        case PTRACE_SETVRREGS:
-                /* Set the child altivec register state. */
-                flush_altivec_to_thread(child);
-                ret = set_vrregs(child, (unsigned long __user *)data);
-                break;
-#endif
-
-        default:
-                ret = ptrace_request(child, request, addr, data);
-                break;
-        }
-out_tsk:
-        put_task_struct(child);
-out:
-        unlock_kernel();
-        return ret;
-}
-
-static void do_syscall_trace(void)
-{
-        /* the 0x80 provides a way for the tracing parent to distinguish
-           between a syscall stop and SIGTRAP delivery */
-        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
-                                 ? 0x80 : 0));
-
-        /*
-         * this isn't the same as continuing with a signal, but it will do
-         * for normal use.  strace only continues with a signal if the
-         * stopping signal is not SIGTRAP.  -brl
-         */
-        if (current->exit_code) {
-                send_sig(current->exit_code, current, 1);
-                current->exit_code = 0;
-        }
-}
-
-void do_syscall_trace_enter(struct pt_regs *regs)
-{
-        secure_computing(regs->gpr[0]);
-
-        if (test_thread_flag(TIF_SYSCALL_TRACE)
-            && (current->ptrace & PT_PTRACED))
-                do_syscall_trace();
-
-        if (unlikely(current->audit_context))
-                audit_syscall_entry(current,
-                                    test_thread_flag(TIF_32BIT)?AUDIT_ARCH_PPC:AUDIT_ARCH_PPC64,
-                                    regs->gpr[0],
-                                    regs->gpr[3], regs->gpr[4],
-                                    regs->gpr[5], regs->gpr[6]);
-
-}
-
-void do_syscall_trace_leave(struct pt_regs *regs)
-{
-        if (unlikely(current->audit_context))
-                audit_syscall_exit(current, 
-                                   (regs->ccr&0x1000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
-                                   regs->result);
-
-        if ((test_thread_flag(TIF_SYSCALL_TRACE)
-             || test_thread_flag(TIF_SINGLESTEP))
-            && (current->ptrace & PT_PTRACED))
-                do_syscall_trace();
-}
diff --git a/arch/ppc64/kernel/rtas-proc.c b/arch/ppc64/kernel/rtas-proc.c
index 1f3ff860fdf0..5bdd5b079d96 100644
--- a/arch/ppc64/kernel/rtas-proc.c
+++ b/arch/ppc64/kernel/rtas-proc.c
@@ -23,6 +23,7 @@
 #include <linux/init.h>
 #include <linux/seq_file.h>
 #include <linux/bitops.h>
+#include <linux/rtc.h>
 
 #include <asm/uaccess.h>
 #include <asm/processor.h>
diff --git a/arch/ppc64/kernel/rtas_pci.c b/arch/ppc64/kernel/rtas_pci.c
index 4a9719b48abe..3ad15c90fbbd 100644
--- a/arch/ppc64/kernel/rtas_pci.c
+++ b/arch/ppc64/kernel/rtas_pci.c
@@ -38,9 +38,8 @@
 #include <asm/pci-bridge.h>
 #include <asm/iommu.h>
 #include <asm/rtas.h>
-
-#include "mpic.h"
-#include "pci.h"
+#include <asm/mpic.h>
+#include <asm/ppc-pci.h>
 
 /* RTAS tokens */
 static int read_pci_config;
@@ -401,7 +400,7 @@ unsigned long __init find_and_init_phbs(void)
                 if (!phb)
                         continue;
 
-                pci_process_bridge_OF_ranges(phb, node);
+                pci_process_bridge_OF_ranges(phb, node, 0);
                 pci_setup_phb_io(phb, index == 0);
 #ifdef CONFIG_PPC_PSERIES
                 if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
@@ -451,7 +450,7 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
         if (!phb)
                 return NULL;
 
-        pci_process_bridge_OF_ranges(phb, dn);
+        pci_process_bridge_OF_ranges(phb, dn, primary);
 
         pci_setup_phb_io_dynamic(phb, primary);
         of_node_put(root);
diff --git a/arch/ppc64/kernel/rtc.c b/arch/ppc64/kernel/rtc.c
index 6ff52bc61325..79e7ed2858dd 100644
--- a/arch/ppc64/kernel/rtc.c
+++ b/arch/ppc64/kernel/rtc.c
@@ -43,11 +43,8 @@
 #include <asm/time.h>
 #include <asm/rtas.h>
 
-#include <asm/iSeries/mf.h>
 #include <asm/machdep.h>
 
-extern int piranha_simulator;
-
 /*
  *      We sponge a minor off of the misc major. No need slurping
  *      up another valuable major dev number for this. If you add
@@ -265,44 +262,10 @@ static int rtc_read_proc(char *page, char **start, off_t off,
         return len;
 }
 
-#ifdef CONFIG_PPC_ISERIES
-/*
- * Get the RTC from the virtual service processor
- * This requires flowing LpEvents to the primary partition
- */
-void iSeries_get_rtc_time(struct rtc_time *rtc_tm)
-{
-        if (piranha_simulator)
-                return;
-
-        mf_get_rtc(rtc_tm);
-        rtc_tm->tm_mon--;
-}
-
-/*
- * Set the RTC in the virtual service processor
- * This requires flowing LpEvents to the primary partition
- */
-int iSeries_set_rtc_time(struct rtc_time *tm)
-{
-        mf_set_rtc(tm);
-        return 0;
-}
-
-void iSeries_get_boot_time(struct rtc_time *tm)
-{
-        if ( piranha_simulator )
-                return;
-
-        mf_get_boot_rtc(tm);
-        tm->tm_mon  -= 1;
-}
-#endif
-
 #ifdef CONFIG_PPC_RTAS
 #define MAX_RTC_WAIT 5000       /* 5 sec */
 #define RTAS_CLOCK_BUSY (-2)
-void rtas_get_boot_time(struct rtc_time *rtc_tm)
+unsigned long rtas_get_boot_time(void)
 {
         int ret[8];
         int error, wait_time;
@@ -322,15 +285,10 @@ void rtas_get_boot_time(struct rtc_time *rtc_tm)
         if (error != 0 && printk_ratelimit()) {
                 printk(KERN_WARNING "error: reading the clock failed (%d)\n",
                         error);
-                return;
+                return 0;
         }
 
-        rtc_tm->tm_sec = ret[5];
-        rtc_tm->tm_min = ret[4];
-        rtc_tm->tm_hour = ret[3];
-        rtc_tm->tm_mday = ret[2];
-        rtc_tm->tm_mon = ret[1] - 1;
-        rtc_tm->tm_year = ret[0] - 1900;
+        return mktime(ret[0], ret[1], ret[2], ret[3], ret[4], ret[5]);
 }
 
 /* NOTE: get_rtc_time will get an error if executed in interrupt context
diff --git a/arch/ppc64/kernel/signal.c b/arch/ppc64/kernel/signal.c
index 347112cca3c0..ec9d0984b6a0 100644
--- a/arch/ppc64/kernel/signal.c
+++ b/arch/ppc64/kernel/signal.c
@@ -133,7 +133,7 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
         flush_fp_to_thread(current);
 
         /* Make sure signal doesn't get spurrious FP exceptions */
-        current->thread.fpscr = 0;
+        current->thread.fpscr.val = 0;
 
 #ifdef CONFIG_ALTIVEC
         err |= __put_user(v_regs, &sc->v_regs);
diff --git a/arch/ppc64/kernel/smp.c b/arch/ppc64/kernel/smp.c
index 793b562da653..017c12919832 100644
--- a/arch/ppc64/kernel/smp.c
+++ b/arch/ppc64/kernel/smp.c
@@ -45,8 +45,7 @@
 #include <asm/cputable.h>
 #include <asm/system.h>
 #include <asm/abs_addr.h>
-
-#include "mpic.h"
+#include <asm/mpic.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -70,28 +69,6 @@ void smp_call_function_interrupt(void);
 int smt_enabled_at_boot = 1;
 
 #ifdef CONFIG_MPIC
-void smp_mpic_message_pass(int target, int msg)
-{
-        /* make sure we're sending something that translates to an IPI */
-        if ( msg > 0x3 ){
-                printk("SMP %d: smp_message_pass: unknown msg %d\n",
-                       smp_processor_id(), msg);
-                return;
-        }
-        switch ( target )
-        {
-        case MSG_ALL:
-                mpic_send_ipi(msg, 0xffffffff);
-                break;
-        case MSG_ALL_BUT_SELF:
-                mpic_send_ipi(msg, 0xffffffff & ~(1 << smp_processor_id()));
-                break;
-        default:
-                mpic_send_ipi(msg, 1 << target);
-                break;
-        }
-}
-
 int __init smp_mpic_probe(void)
 {
         int nr_cpus;
@@ -128,21 +105,6 @@ void __devinit smp_generic_kick_cpu(int nr)
 
 #endif /* CONFIG_MPIC */
 
-static void __init smp_space_timers(unsigned int max_cpus)
-{
-        int i;
-        unsigned long offset = tb_ticks_per_jiffy / max_cpus;
-        unsigned long previous_tb = paca[boot_cpuid].next_jiffy_update_tb;
-
-        for_each_cpu(i) {
-                if (i != boot_cpuid) {
-                        paca[i].next_jiffy_update_tb =
-                                previous_tb + offset;
-                        previous_tb = paca[i].next_jiffy_update_tb;
-                }
-        }
-}
-
 void smp_message_recv(int msg, struct pt_regs *regs)
 {
         switch(msg) {
diff --git a/arch/ppc64/kernel/traps.c b/arch/ppc64/kernel/traps.c
deleted file mode 100644
index 7467ae508e6e..000000000000
--- a/arch/ppc64/kernel/traps.c
+++ /dev/null
@@ -1,568 +0,0 @@
-/*
- *  linux/arch/ppc64/kernel/traps.c
- *
- *  Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- *  Modified by Cort Dougan (cort@cs.nmt.edu)
- *  and Paul Mackerras (paulus@cs.anu.edu.au)
- */
-
-/*
- * This file handles the architecture-dependent parts of hardware exceptions
- */
-
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/kprobes.h>
-#include <asm/kdebug.h>
-
-#include <asm/pgtable.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/ppcdebug.h>
-#include <asm/rtas.h>
-#include <asm/systemcfg.h>
-#include <asm/machdep.h>
-#include <asm/pmc.h>
-
-#ifdef CONFIG_DEBUGGER
-int (*__debugger)(struct pt_regs *regs);
-int (*__debugger_ipi)(struct pt_regs *regs);
-int (*__debugger_bpt)(struct pt_regs *regs);
-int (*__debugger_sstep)(struct pt_regs *regs);
-int (*__debugger_iabr_match)(struct pt_regs *regs);
-int (*__debugger_dabr_match)(struct pt_regs *regs);
-int (*__debugger_fault_handler)(struct pt_regs *regs);
-
-EXPORT_SYMBOL(__debugger);
-EXPORT_SYMBOL(__debugger_ipi);
-EXPORT_SYMBOL(__debugger_bpt);
-EXPORT_SYMBOL(__debugger_sstep);
-EXPORT_SYMBOL(__debugger_iabr_match);
-EXPORT_SYMBOL(__debugger_dabr_match);
-EXPORT_SYMBOL(__debugger_fault_handler);
-#endif
-
-struct notifier_block *ppc64_die_chain;
-static DEFINE_SPINLOCK(die_notifier_lock);
-
-int register_die_notifier(struct notifier_block *nb)
-{
-        int err = 0;
-        unsigned long flags;
-
-        spin_lock_irqsave(&die_notifier_lock, flags);
-        err = notifier_chain_register(&ppc64_die_chain, nb);
-        spin_unlock_irqrestore(&die_notifier_lock, flags);
-        return err;
-}
-
-/*
- * Trap & Exception support
- */
-
-static DEFINE_SPINLOCK(die_lock);
-
-int die(const char *str, struct pt_regs *regs, long err)
-{
-        static int die_counter;
-        int nl = 0;
-
-        if (debugger(regs))
-                return 1;
-
-        console_verbose();
-        spin_lock_irq(&die_lock);
-        bust_spinlocks(1);
-        printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
-#ifdef CONFIG_PREEMPT
-        printk("PREEMPT ");
-        nl = 1;
-#endif
-#ifdef CONFIG_SMP
-        printk("SMP NR_CPUS=%d ", NR_CPUS);
-        nl = 1;
-#endif
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        printk("DEBUG_PAGEALLOC ");
-        nl = 1;
-#endif
-#ifdef CONFIG_NUMA
-        printk("NUMA ");
-        nl = 1;
-#endif
-        switch(systemcfg->platform) {
-                case PLATFORM_PSERIES:
-                        printk("PSERIES ");
-                        nl = 1;
-                        break;
-                case PLATFORM_PSERIES_LPAR:
-                        printk("PSERIES LPAR ");
-                        nl = 1;
-                        break;
-                case PLATFORM_ISERIES_LPAR:
-                        printk("ISERIES LPAR ");
-                        nl = 1;
-                        break;
-                case PLATFORM_POWERMAC:
-                        printk("POWERMAC ");
-                        nl = 1;
-                        break;
-                case PLATFORM_BPA:
-                        printk("BPA ");
-                        nl = 1;
-                        break;
-        }
-        if (nl)
-                printk("\n");
-        print_modules();
-        show_regs(regs);
-        bust_spinlocks(0);
-        spin_unlock_irq(&die_lock);
-
-        if (in_interrupt())
-                panic("Fatal exception in interrupt");
-
-        if (panic_on_oops) {
-                printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
-                ssleep(5);
-                panic("Fatal exception");
-        }
-        do_exit(SIGSEGV);
-
-        return 0;
-}
-
-void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
-{
-        siginfo_t info;
-
-        if (!user_mode(regs)) {
-                if (die("Exception in kernel mode", regs, signr))
-                        return;
-        }
-
-        memset(&info, 0, sizeof(info));
-        info.si_signo = signr;
-        info.si_code = code;
-        info.si_addr = (void __user *) addr;
-        force_sig_info(signr, &info, current);
-}
-
-void system_reset_exception(struct pt_regs *regs)
-{
-        /* See if any machine dependent calls */
-        if (ppc_md.system_reset_exception)
-                ppc_md.system_reset_exception(regs);
-
-        die("System Reset", regs, 0);
-
-        /* Must die if the interrupt is not recoverable */
-        if (!(regs->msr & MSR_RI))
-                panic("Unrecoverable System Reset");
-
-        /* What should we do here? We could issue a shutdown or hard reset. */
-}
-
-void machine_check_exception(struct pt_regs *regs)
-{
-        int recover = 0;
-
-        /* See if any machine dependent calls */
-        if (ppc_md.machine_check_exception)
-                recover = ppc_md.machine_check_exception(regs);
-
-        if (recover)
-                return;
-
-        if (debugger_fault_handler(regs))
-                return;
-        die("Machine check", regs, 0);
-
-        /* Must die if the interrupt is not recoverable */
-        if (!(regs->msr & MSR_RI))
-                panic("Unrecoverable Machine check");
-}
-
-void unknown_exception(struct pt_regs *regs)
-{
-        printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
-               regs->nip, regs->msr, regs->trap);
-
-        _exception(SIGTRAP, regs, 0, 0);
-}
-
-void instruction_breakpoint_exception(struct pt_regs *regs)
-{
-        if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
-                                        5, SIGTRAP) == NOTIFY_STOP)
-                return;
-        if (debugger_iabr_match(regs))
-                return;
-        _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
-}
-
-void __kprobes single_step_exception(struct pt_regs *regs)
-{
-        regs->msr &= ~MSR_SE;  /* Turn off 'trace' bit */
-
-        if (notify_die(DIE_SSTEP, "single_step", regs, 5,
-                                        5, SIGTRAP) == NOTIFY_STOP)
-                return;
-        if (debugger_sstep(regs))
-                return;
-
-        _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
-}
-
-/*
- * After we have successfully emulated an instruction, we have to
- * check if the instruction was being single-stepped, and if so,
- * pretend we got a single-step exception.  This was pointed out
- * by Kumar Gala.  -- paulus
- */
-static inline void emulate_single_step(struct pt_regs *regs)
-{
-        if (regs->msr & MSR_SE)
-                single_step_exception(regs);
-}
-
-static void parse_fpe(struct pt_regs *regs)
-{
-        int code = 0;
-        unsigned long fpscr;
-
-        flush_fp_to_thread(current);
-
-        fpscr = current->thread.fpscr;
-
-        /* Invalid operation */
-        if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
-                code = FPE_FLTINV;
-
-        /* Overflow */
-        else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
-                code = FPE_FLTOVF;
-
-        /* Underflow */
-        else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
-                code = FPE_FLTUND;
-
-        /* Divide by zero */
-        else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
-                code = FPE_FLTDIV;
-
-        /* Inexact result */
-        else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
-                code = FPE_FLTRES;
-
-        _exception(SIGFPE, regs, code, regs->nip);
-}
-
-/*
- * Illegal instruction emulation support.  Return non-zero if we can't
- * emulate, or -EFAULT if the associated memory access caused an access
- * fault.  Return zero on success.
- */
-
-#define INST_MFSPR_PVR          0x7c1f42a6
-#define INST_MFSPR_PVR_MASK     0xfc1fffff
-
-#define INST_DCBA               0x7c0005ec
-#define INST_DCBA_MASK          0x7c0007fe
-
-#define INST_MCRXR              0x7c000400
-#define INST_MCRXR_MASK         0x7c0007fe
-
-static int emulate_instruction(struct pt_regs *regs)
-{
-        unsigned int instword;
-
-        if (!user_mode(regs))
-                return -EINVAL;
-
-        CHECK_FULL_REGS(regs);
-
-        if (get_user(instword, (unsigned int __user *)(regs->nip)))
-                return -EFAULT;
-
-        /* Emulate the mfspr rD, PVR. */
-        if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
-                unsigned int rd;
-
-                rd = (instword >> 21) & 0x1f;
-                regs->gpr[rd] = mfspr(SPRN_PVR);
-                return 0;
-        }
-
-        /* Emulating the dcba insn is just a no-op.  */
-        if ((instword & INST_DCBA_MASK) == INST_DCBA) {
-                static int warned;
-
-                if (!warned) {
-                        printk(KERN_WARNING
-                               "process %d (%s) uses obsolete 'dcba' insn\n",
-                               current->pid, current->comm);
-                        warned = 1;
-                }
-                return 0;
-        }
-
-        /* Emulate the mcrxr insn.  */
-        if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
-                static int warned;
-                unsigned int shift;
-
-                if (!warned) {
-                        printk(KERN_WARNING
-                               "process %d (%s) uses obsolete 'mcrxr' insn\n",
-                               current->pid, current->comm);
-                        warned = 1;
-                }
-
-                shift = (instword >> 21) & 0x1c;
-                regs->ccr &= ~(0xf0000000 >> shift);
-                regs->ccr |= (regs->xer & 0xf0000000) >> shift;
-                regs->xer &= ~0xf0000000;
-                return 0;
-        }
-
-        return -EINVAL;
-}
-
-/*
- * Look through the list of trap instructions that are used for BUG(),
- * BUG_ON() and WARN_ON() and see if we hit one.  At this point we know
- * that the exception was caused by a trap instruction of some kind.
- * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
- * otherwise.
- */
-extern struct bug_entry __start___bug_table[], __stop___bug_table[];
-
-#ifndef CONFIG_MODULES
-#define module_find_bug(x)      NULL
-#endif
-
-struct bug_entry *find_bug(unsigned long bugaddr)
-{
-        struct bug_entry *bug;
-
-        for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
-                if (bugaddr == bug->bug_addr)
-                        return bug;
-        return module_find_bug(bugaddr);
-}
-
-static int
-check_bug_trap(struct pt_regs *regs)
-{
-        struct bug_entry *bug;
-        unsigned long addr;
-
-        if (regs->msr & MSR_PR)
-                return 0;       /* not in kernel */
-        addr = regs->nip;       /* address of trap instruction */
-        if (addr < PAGE_OFFSET)
-                return 0;
-        bug = find_bug(regs->nip);
-        if (bug == NULL)
-                return 0;
-        if (bug->line & BUG_WARNING_TRAP) {
-                /* this is a WARN_ON rather than BUG/BUG_ON */
-                printk(KERN_ERR "Badness in %s at %s:%d\n",
-                       bug->function, bug->file,
-                      (unsigned int)bug->line & ~BUG_WARNING_TRAP);
-                show_stack(current, (void *)regs->gpr[1]);
-                return 1;
-        }
-        printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
-               bug->function, bug->file, (unsigned int)bug->line);
-        return 0;
-}
-
-void __kprobes program_check_exception(struct pt_regs *regs)
-{
-        if (debugger_fault_handler(regs))
-                return;
-
-        if (regs->msr & 0x100000) {
-                /* IEEE FP exception */
-                parse_fpe(regs);
-        } else if (regs->msr & 0x20000) {
-                /* trap exception */
-
-                if (notify_die(DIE_BPT, "breakpoint", regs, 5,
-                                        5, SIGTRAP) == NOTIFY_STOP)
-                        return;
-                if (debugger_bpt(regs))
-                        return;
-
-                if (check_bug_trap(regs)) {
-                        regs->nip += 4;
-                        return;
-                }
-                _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
-
-        } else {
-                /* Privileged or illegal instruction; try to emulate it. */
-                switch (emulate_instruction(regs)) {
-                case 0:
-                        regs->nip += 4;
-                        emulate_single_step(regs);
-                        break;
-
-                case -EFAULT:
-                        _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
-                        break;
-
-                default:
-                        if (regs->msr & 0x40000)
-                                /* priveleged */
-                                _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
-                        else
-                                /* illegal */
-                                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-                        break;
-                }
-        }
-}
-
-void kernel_fp_unavailable_exception(struct pt_regs *regs)
-{
-        printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
-                          "%lx at %lx\n", regs->trap, regs->nip);
-        die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
-}
-
-void altivec_unavailable_exception(struct pt_regs *regs)
-{
-        if (user_mode(regs)) {
-                /* A user program has executed an altivec instruction,
-                   but this kernel doesn't support altivec. */
-                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-                return;
-        }
-        printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
-                          "%lx at %lx\n", regs->trap, regs->nip);
-        die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
-}
-
-extern perf_irq_t perf_irq;
-
-void performance_monitor_exception(struct pt_regs *regs)
-{
-        perf_irq(regs);
-}
-
-void alignment_exception(struct pt_regs *regs)
-{
-        int fixed;
-
-        fixed = fix_alignment(regs);
-
-        if (fixed == 1) {
-                regs->nip += 4; /* skip over emulated instruction */
-                emulate_single_step(regs);
-                return;
-        }
-
-        /* Operand address was bad */   
-        if (fixed == -EFAULT) {
-                if (user_mode(regs)) {
-                        _exception(SIGSEGV, regs, SEGV_MAPERR, regs->dar);
-                } else {
-                        /* Search exception table */
-                        bad_page_fault(regs, regs->dar, SIGSEGV);
-                }
-
-                return;
-        }
-
-        _exception(SIGBUS, regs, BUS_ADRALN, regs->nip);
-}
-
-#ifdef CONFIG_ALTIVEC
-void altivec_assist_exception(struct pt_regs *regs)
-{
-        int err;
-        siginfo_t info;
-
-        if (!user_mode(regs)) {
-                printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
-                       " at %lx\n", regs->nip);
-                die("Kernel VMX/Altivec assist exception", regs, SIGILL);
-        }
-
-        flush_altivec_to_thread(current);
-
-        err = emulate_altivec(regs);
-        if (err == 0) {
-                regs->nip += 4;         /* skip emulated instruction */
-                emulate_single_step(regs);
-                return;
-        }
-
-        if (err == -EFAULT) {
-                /* got an error reading the instruction */
-                info.si_signo = SIGSEGV;
-                info.si_errno = 0;
-                info.si_code = SEGV_MAPERR;
-                info.si_addr = (void __user *) regs->nip;
-                force_sig_info(SIGSEGV, &info, current);
-        } else {
-                /* didn't recognize the instruction */
-                /* XXX quick hack for now: set the non-Java bit in the VSCR */
-                if (printk_ratelimit())
-                        printk(KERN_ERR "Unrecognized altivec instruction "
-                               "in %s at %lx\n", current->comm, regs->nip);
-                current->thread.vscr.u[3] |= 0x10000;
-        }
-}
-#endif /* CONFIG_ALTIVEC */
-
-/*
- * We enter here if we get an unrecoverable exception, that is, one
- * that happened at a point where the RI (recoverable interrupt) bit
- * in the MSR is 0.  This indicates that SRR0/1 are live, and that
- * we therefore lost state by taking this exception.
- */
-void unrecoverable_exception(struct pt_regs *regs)
-{
-        printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
-               regs->trap, regs->nip);
-        die("Unrecoverable exception", regs, SIGABRT);
-}
-
-/*
- * We enter here if we discover during exception entry that we are
- * running in supervisor mode with a userspace value in the stack pointer.
- */
-void kernel_bad_stack(struct pt_regs *regs)
-{
-        printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
-               regs->gpr[1], regs->nip);
-        die("Bad kernel stack pointer", regs, SIGABRT);
-}
-
-void __init trap_init(void)
-{
-}
diff --git a/arch/ppc64/kernel/vdso64/sigtramp.S b/arch/ppc64/kernel/vdso64/sigtramp.S
index 8ae8f205e470..31b604ab56de 100644
--- a/arch/ppc64/kernel/vdso64/sigtramp.S
+++ b/arch/ppc64/kernel/vdso64/sigtramp.S
@@ -15,6 +15,7 @@
 #include <asm/ppc_asm.h>
 #include <asm/unistd.h>
 #include <asm/vdso.h>
+#include <asm/ptrace.h>         /* XXX for __SIGNAL_FRAMESIZE */
 
         .text
 
diff --git a/arch/ppc64/kernel/vecemu.c b/arch/ppc64/kernel/vecemu.c
deleted file mode 100644
index cb207629f21f..000000000000
--- a/arch/ppc64/kernel/vecemu.c
+++ /dev/null
@@ -1,346 +0,0 @@
-/*
- * Routines to emulate some Altivec/VMX instructions, specifically
- * those that can trap when given denormalized operands in Java mode.
- */
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <asm/ptrace.h>
-#include <asm/processor.h>
-#include <asm/uaccess.h>
-
-/* Functions in vector.S */
-extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
-extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b);
-extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
-extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
-extern void vrefp(vector128 *dst, vector128 *src);
-extern void vrsqrtefp(vector128 *dst, vector128 *src);
-extern void vexptep(vector128 *dst, vector128 *src);
-
-static unsigned int exp2s[8] = {
-        0x800000,
-        0x8b95c2,
-        0x9837f0,
-        0xa5fed7,
-        0xb504f3,
-        0xc5672a,
-        0xd744fd,
-        0xeac0c7
-};
-
-/*
- * Computes an estimate of 2^x.  The `s' argument is the 32-bit
- * single-precision floating-point representation of x.
- */
-static unsigned int eexp2(unsigned int s)
-{
-        int exp, pwr;
-        unsigned int mant, frac;
-
-        /* extract exponent field from input */
-        exp = ((s >> 23) & 0xff) - 127;
-        if (exp > 7) {
-                /* check for NaN input */
-                if (exp == 128 && (s & 0x7fffff) != 0)
-                        return s | 0x400000;    /* return QNaN */
-                /* 2^-big = 0, 2^+big = +Inf */
-                return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */
-        }
-        if (exp < -23)
-                return 0x3f800000;      /* 1.0 */
-
-        /* convert to fixed point integer in 9.23 representation */
-        pwr = (s & 0x7fffff) | 0x800000;
-        if (exp > 0)
-                pwr <<= exp;
-        else
-                pwr >>= -exp;
-        if (s & 0x80000000)
-                pwr = -pwr;
-
-        /* extract integer part, which becomes exponent part of result */
-        exp = (pwr >> 23) + 126;
-        if (exp >= 254)
-                return 0x7f800000;
-        if (exp < -23)
-                return 0;
-
-        /* table lookup on top 3 bits of fraction to get mantissa */
-        mant = exp2s[(pwr >> 20) & 7];
-
-        /* linear interpolation using remaining 20 bits of fraction */
-        asm("mulhwu %0,%1,%2" : "=r" (frac)
-            : "r" (pwr << 12), "r" (0x172b83ff));
-        asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant));
-        mant += frac;
-
-        if (exp >= 0)
-                return mant + (exp << 23);
-
-        /* denormalized result */
-        exp = -exp;
-        mant += 1 << (exp - 1);
-        return mant >> exp;
-}
-
-/*
- * Computes an estimate of log_2(x).  The `s' argument is the 32-bit
- * single-precision floating-point representation of x.
- */
-static unsigned int elog2(unsigned int s)
-{
-        int exp, mant, lz, frac;
-
-        exp = s & 0x7f800000;
-        mant = s & 0x7fffff;
-        if (exp == 0x7f800000) {        /* Inf or NaN */
-                if (mant != 0)
-                        s |= 0x400000;  /* turn NaN into QNaN */
-                return s;
-        }
-        if ((exp | mant) == 0)          /* +0 or -0 */
-                return 0xff800000;      /* return -Inf */
-
-        if (exp == 0) {
-                /* denormalized */
-                asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant));
-                mant <<= lz - 8;
-                exp = (-118 - lz) << 23;
-        } else {
-                mant |= 0x800000;
-                exp -= 127 << 23;
-        }
-
-        if (mant >= 0xb504f3) {                         /* 2^0.5 * 2^23 */
-                exp |= 0x400000;                        /* 0.5 * 2^23 */
-                asm("mulhwu %0,%1,%2" : "=r" (mant)
-                    : "r" (mant), "r" (0xb504f334));    /* 2^-0.5 * 2^32 */
-        }
-        if (mant >= 0x9837f0) {                         /* 2^0.25 * 2^23 */
-                exp |= 0x200000;                        /* 0.25 * 2^23 */
-                asm("mulhwu %0,%1,%2" : "=r" (mant)
-                    : "r" (mant), "r" (0xd744fccb));    /* 2^-0.25 * 2^32 */
-        }
-        if (mant >= 0x8b95c2) {                         /* 2^0.125 * 2^23 */
-                exp |= 0x100000;                        /* 0.125 * 2^23 */
-                asm("mulhwu %0,%1,%2" : "=r" (mant)
-                    : "r" (mant), "r" (0xeac0c6e8));    /* 2^-0.125 * 2^32 */
-        }
-        if (mant > 0x800000) {                          /* 1.0 * 2^23 */
-                /* calculate (mant - 1) * 1.381097463 */
-                /* 1.381097463 == 0.125 / (2^0.125 - 1) */
-                asm("mulhwu %0,%1,%2" : "=r" (frac)
-                    : "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a));
-                exp += frac;
-        }
-        s = exp & 0x80000000;
-        if (exp != 0) {
-                if (s)
-                        exp = -exp;
-                asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp));
-                lz = 8 - lz;
-                if (lz > 0)
-                        exp >>= lz;
-                else if (lz < 0)
-                        exp <<= -lz;
-                s += ((lz + 126) << 23) + exp;
-        }
-        return s;
-}
-
-#define VSCR_SAT        1
-
-static int ctsxs(unsigned int x, int scale, unsigned int *vscrp)
-{
-        int exp, mant;
-
-        exp = (x >> 23) & 0xff;
-        mant = x & 0x7fffff;
-        if (exp == 255 && mant != 0)
-                return 0;               /* NaN -> 0 */
-        exp = exp - 127 + scale;
-        if (exp < 0)
-                return 0;               /* round towards zero */
-        if (exp >= 31) {
-                /* saturate, unless the result would be -2^31 */
-                if (x + (scale << 23) != 0xcf000000)
-                        *vscrp |= VSCR_SAT;
-                return (x & 0x80000000)? 0x80000000: 0x7fffffff;
-        }
-        mant |= 0x800000;
-        mant = (mant << 7) >> (30 - exp);
-        return (x & 0x80000000)? -mant: mant;
-}
-
-static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp)
-{
-        int exp;
-        unsigned int mant;
-
-        exp = (x >> 23) & 0xff;
-        mant = x & 0x7fffff;
-        if (exp == 255 && mant != 0)
-                return 0;               /* NaN -> 0 */
-        exp = exp - 127 + scale;
-        if (exp < 0)
-                return 0;               /* round towards zero */
-        if (x & 0x80000000) {
-                /* negative => saturate to 0 */
-                *vscrp |= VSCR_SAT;
-                return 0;
-        }
-        if (exp >= 32) {
-                /* saturate */
-                *vscrp |= VSCR_SAT;
-                return 0xffffffff;
-        }
-        mant |= 0x800000;
-        mant = (mant << 8) >> (31 - exp);
-        return mant;
-}
-
-/* Round to floating integer, towards 0 */
-static unsigned int rfiz(unsigned int x)
-{
-        int exp;
-
-        exp = ((x >> 23) & 0xff) - 127;
-        if (exp == 128 && (x & 0x7fffff) != 0)
-                return x | 0x400000;    /* NaN -> make it a QNaN */
-        if (exp >= 23)
-                return x;               /* it's an integer already (or Inf) */
-        if (exp < 0)
-                return x & 0x80000000;  /* |x| < 1.0 rounds to 0 */
-        return x & ~(0x7fffff >> exp);
-}
-
-/* Round to floating integer, towards +/- Inf */
-static unsigned int rfii(unsigned int x)
-{
-        int exp, mask;
-
-        exp = ((x >> 23) & 0xff) - 127;
-        if (exp == 128 && (x & 0x7fffff) != 0)
-                return x | 0x400000;    /* NaN -> make it a QNaN */
-        if (exp >= 23)
-                return x;               /* it's an integer already (or Inf) */
-        if ((x & 0x7fffffff) == 0)
-                return x;               /* +/-0 -> +/-0 */
-        if (exp < 0)
-                /* 0 < |x| < 1.0 rounds to +/- 1.0 */
-                return (x & 0x80000000) | 0x3f800000;
-        mask = 0x7fffff >> exp;
-        /* mantissa overflows into exponent - that's OK,
-           it can't overflow into the sign bit */
-        return (x + mask) & ~mask;
-}
-
-/* Round to floating integer, to nearest */
-static unsigned int rfin(unsigned int x)
-{
-        int exp, half;
-
-        exp = ((x >> 23) & 0xff) - 127;
-        if (exp == 128 && (x & 0x7fffff) != 0)
-                return x | 0x400000;    /* NaN -> make it a QNaN */
-        if (exp >= 23)
-                return x;               /* it's an integer already (or Inf) */
-        if (exp < -1)
-                return x & 0x80000000;  /* |x| < 0.5 -> +/-0 */
-        if (exp == -1)
-                /* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */
-                return (x & 0x80000000) | 0x3f800000;
-        half = 0x400000 >> exp;
-        /* add 0.5 to the magnitude and chop off the fraction bits */
-        return (x + half) & ~(0x7fffff >> exp);
-}
-
-int
-emulate_altivec(struct pt_regs *regs)
-{
-        unsigned int instr, i;
-        unsigned int va, vb, vc, vd;
-        vector128 *vrs;
-
-        if (get_user(instr, (unsigned int __user *) regs->nip))
-                return -EFAULT;
-        if ((instr >> 26) != 4)
-                return -EINVAL;         /* not an altivec instruction */
-        vd = (instr >> 21) & 0x1f;
-        va = (instr >> 16) & 0x1f;
-        vb = (instr >> 11) & 0x1f;
-        vc = (instr >> 6) & 0x1f;
-
-        vrs = current->thread.vr;
-        switch (instr & 0x3f) {
-        case 10:
-                switch (vc) {
-                case 0: /* vaddfp */
-                        vaddfp(&vrs[vd], &vrs[va], &vrs[vb]);
-                        break;
-                case 1: /* vsubfp */
-                        vsubfp(&vrs[vd], &vrs[va], &vrs[vb]);
-                        break;
-                case 4: /* vrefp */
-                        vrefp(&vrs[vd], &vrs[vb]);
-                        break;
-                case 5: /* vrsqrtefp */
-                        vrsqrtefp(&vrs[vd], &vrs[vb]);
-                        break;
-                case 6: /* vexptefp */
-                        for (i = 0; i < 4; ++i)
-                                vrs[vd].u[i] = eexp2(vrs[vb].u[i]);
-                        break;
-                case 7: /* vlogefp */
-                        for (i = 0; i < 4; ++i)
-                                vrs[vd].u[i] = elog2(vrs[vb].u[i]);
-                        break;
-                case 8:         /* vrfin */
-                        for (i = 0; i < 4; ++i)
-                                vrs[vd].u[i] = rfin(vrs[vb].u[i]);
-                        break;
-                case 9:         /* vrfiz */
-                        for (i = 0; i < 4; ++i)
-                                vrs[vd].u[i] = rfiz(vrs[vb].u[i]);
-                        break;
-                case 10:        /* vrfip */
-                        for (i = 0; i < 4; ++i) {
-                                u32 x = vrs[vb].u[i];
-                                x = (x & 0x80000000)? rfiz(x): rfii(x);
-                                vrs[vd].u[i] = x;
-                        }
-                        break;
-                case 11:        /* vrfim */
-                        for (i = 0; i < 4; ++i) {
-                                u32 x = vrs[vb].u[i];
-                                x = (x & 0x80000000)? rfii(x): rfiz(x);
-                                vrs[vd].u[i] = x;
-                        }
-                        break;
-                case 14:        /* vctuxs */
-                        for (i = 0; i < 4; ++i)
-                                vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
-                                                &current->thread.vscr.u[3]);
-                        break;
-                case 15:        /* vctsxs */
-                        for (i = 0; i < 4; ++i)
-                                vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
-                                                &current->thread.vscr.u[3]);
-                        break;
-                default:
-                        return -EINVAL;
-                }
-                break;
-        case 46:        /* vmaddfp */
-                vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
-                break;
-        case 47:        /* vnmsubfp */
-                vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
-                break;
-        default:
-                return -EINVAL;
-        }
-
-        return 0;
-}
diff --git a/arch/ppc64/kernel/vmlinux.lds.S b/arch/ppc64/kernel/vmlinux.lds.S
index 0306510bc4ff..022f220e772f 100644
--- a/arch/ppc64/kernel/vmlinux.lds.S
+++ b/arch/ppc64/kernel/vmlinux.lds.S
@@ -1,3 +1,4 @@
+#include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
 
 OUTPUT_ARCH(powerpc:common64)
@@ -17,7 +18,7 @@ SECTIONS
         LOCK_TEXT
         KPROBES_TEXT
         *(.fixup)
-        . = ALIGN(4096);
+        . = ALIGN(PAGE_SIZE);
         _etext = .;
         }
 
@@ -43,7 +44,7 @@ SECTIONS
 
 
   /* will be freed after init */
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   __init_begin = .;
 
   .init.text : {
@@ -83,7 +84,7 @@ SECTIONS
 
   SECURITY_INIT
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   .init.ramfs : {
         __initramfs_start = .;
         *(.init.ramfs)
@@ -96,18 +97,22 @@ SECTIONS
         __per_cpu_end = .;
         }
 
+  . = ALIGN(PAGE_SIZE);
   . = ALIGN(16384);
   __init_end = .;
   /* freed after init ends here */
 
 
   /* Read/write sections */
+  . = ALIGN(PAGE_SIZE);
   . = ALIGN(16384);
+  _sdata = .;
   /* The initial task and kernel stack */
   .data.init_task : {
         *(.data.init_task)
         }
 
+  . = ALIGN(PAGE_SIZE);
   .data.page_aligned : {
         *(.data.page_aligned)
         }
@@ -129,18 +134,18 @@ SECTIONS
         __toc_start = .;
         *(.got)
         *(.toc)
-        . = ALIGN(4096);
+        . = ALIGN(PAGE_SIZE);
         _edata = .;
         }
 
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   .bss : {
         __bss_start = .;
         *(.bss)
         __bss_stop = .;
         }
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   _end = . ;
 }
diff --git a/arch/ppc64/lib/Makefile b/arch/ppc64/lib/Makefile
index 0b6e967de948..42d5295bf345 100644
--- a/arch/ppc64/lib/Makefile
+++ b/arch/ppc64/lib/Makefile
@@ -2,17 +2,4 @@
 # Makefile for ppc64-specific library files..
 #
 
-lib-y := checksum.o string.o strcase.o
-lib-y += copypage.o memcpy.o copyuser.o usercopy.o
-
-# Lock primitives are defined as no-ops in include/linux/spinlock.h
-# for non-SMP configs. Don't build the real versions.
-
-lib-$(CONFIG_SMP) += locks.o
-
-# e2a provides EBCDIC to ASCII conversions.
-ifdef CONFIG_PPC_ISERIES
-obj-y += e2a.o
-endif
-
-lib-$(CONFIG_DEBUG_KERNEL) += sstep.o
+lib-y := string.o
diff --git a/arch/ppc64/lib/string.S b/arch/ppc64/lib/string.S
index 813587e5c2ec..e21a0038a4d6 100644
--- a/arch/ppc64/lib/string.S
+++ b/arch/ppc64/lib/string.S
@@ -65,112 +65,6 @@ _GLOBAL(strlen)
         subf    r3,r3,r4
         blr
 
-_GLOBAL(memset)
-        neg     r0,r3
-        rlwimi  r4,r4,8,16,23
-        andi.   r0,r0,7                 /* # bytes to be 8-byte aligned */
-        rlwimi  r4,r4,16,0,15
-        cmplw   cr1,r5,r0               /* do we get that far? */
-        rldimi  r4,r4,32,0
-        mtcrf   1,r0
-        mr      r6,r3
-        blt     cr1,8f
-        beq+    3f                      /* if already 8-byte aligned */
-        subf    r5,r0,r5
-        bf      31,1f
-        stb     r4,0(r6)
-        addi    r6,r6,1
-1:      bf      30,2f
-        sth     r4,0(r6)
-        addi    r6,r6,2
-2:      bf      29,3f
-        stw     r4,0(r6)
-        addi    r6,r6,4
-3:      srdi.   r0,r5,6
-        clrldi  r5,r5,58
-        mtctr   r0
-        beq     5f
-4:      std     r4,0(r6)
-        std     r4,8(r6)
-        std     r4,16(r6)
-        std     r4,24(r6)
-        std     r4,32(r6)
-        std     r4,40(r6)
-        std     r4,48(r6)
-        std     r4,56(r6)
-        addi    r6,r6,64
-        bdnz    4b
-5:      srwi.   r0,r5,3
-        clrlwi  r5,r5,29
-        mtcrf   1,r0
-        beq     8f
-        bf      29,6f
-        std     r4,0(r6)
-        std     r4,8(r6)
-        std     r4,16(r6)
-        std     r4,24(r6)
-        addi    r6,r6,32
-6:      bf      30,7f
-        std     r4,0(r6)
-        std     r4,8(r6)
-        addi    r6,r6,16
-7:      bf      31,8f
-        std     r4,0(r6)
-        addi    r6,r6,8
-8:      cmpwi   r5,0
-        mtcrf   1,r5
-        beqlr+
-        bf      29,9f
-        stw     r4,0(r6)
-        addi    r6,r6,4
-9:      bf      30,10f
-        sth     r4,0(r6)
-        addi    r6,r6,2
-10:     bflr    31
-        stb     r4,0(r6)
-        blr
-
-_GLOBAL(memmove)
-        cmplw   0,r3,r4
-        bgt     .backwards_memcpy
-        b       .memcpy
-
-_GLOBAL(backwards_memcpy)
-        rlwinm. r7,r5,32-3,3,31         /* r0 = r5 >> 3 */
-        add     r6,r3,r5
-        add     r4,r4,r5
-        beq     2f
-        andi.   r0,r6,3
-        mtctr   r7
-        bne     5f
-1:      lwz     r7,-4(r4)
-        lwzu    r8,-8(r4)
-        stw     r7,-4(r6)
-        stwu    r8,-8(r6)
-        bdnz    1b
-        andi.   r5,r5,7
-2:      cmplwi  0,r5,4
-        blt     3f
-        lwzu    r0,-4(r4)
-        subi    r5,r5,4
-        stwu    r0,-4(r6)
-3:      cmpwi   0,r5,0
-        beqlr
-        mtctr   r5
-4:      lbzu    r0,-1(r4)
-        stbu    r0,-1(r6)
-        bdnz    4b
-        blr
-5:      mtctr   r0
-6:      lbzu    r7,-1(r4)
-        stbu    r7,-1(r6)
-        bdnz    6b
-        subf    r5,r0,r5
-        rlwinm. r7,r5,32-3,3,31
-        beq     2b
-        mtctr   r7
-        b       1b
-        
 _GLOBAL(memcmp)
         cmpwi   0,r5,0
         ble-    2f
diff --git a/arch/ppc64/mm/Makefile b/arch/ppc64/mm/Makefile
deleted file mode 100644
index 3695d00d347f..000000000000
--- a/arch/ppc64/mm/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the linux ppc-specific parts of the memory manager.
-#
-
-EXTRA_CFLAGS += -mno-minimal-toc
-
-obj-y := fault.o init.o imalloc.o hash_utils.o hash_low.o tlb.o \
-        slb_low.o slb.o stab.o mmap.o
-obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o
-obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
-obj-$(CONFIG_PPC_MULTIPLATFORM) += hash_native.o
diff --git a/arch/ppc64/mm/init.c b/arch/ppc64/mm/init.c
deleted file mode 100644
index e2bd7776622f..000000000000
--- a/arch/ppc64/mm/init.c
+++ /dev/null
@@ -1,950 +0,0 @@
-/*
- *  PowerPC version 
- *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
- *    Copyright (C) 1996 Paul Mackerras
- *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- *  Derived from "arch/i386/mm/init.c"
- *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
- *
- *  Dave Engebretsen <engebret@us.ibm.com>
- *      Rework for PPC64 port.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/config.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/stddef.h>
-#include <linux/vmalloc.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/idr.h>
-#include <linux/nodemask.h>
-#include <linux/module.h>
-
-#include <asm/pgalloc.h>
-#include <asm/page.h>
-#include <asm/prom.h>
-#include <asm/lmb.h>
-#include <asm/rtas.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/uaccess.h>
-#include <asm/smp.h>
-#include <asm/machdep.h>
-#include <asm/tlb.h>
-#include <asm/eeh.h>
-#include <asm/processor.h>
-#include <asm/mmzone.h>
-#include <asm/cputable.h>
-#include <asm/ppcdebug.h>
-#include <asm/sections.h>
-#include <asm/system.h>
-#include <asm/iommu.h>
-#include <asm/abs_addr.h>
-#include <asm/vdso.h>
-#include <asm/imalloc.h>
-
-#if PGTABLE_RANGE > USER_VSID_RANGE
-#warning Limited user VSID range means pagetable space is wasted
-#endif
-
-#if (TASK_SIZE_USER64 < PGTABLE_RANGE) && (TASK_SIZE_USER64 < USER_VSID_RANGE)
-#warning TASK_SIZE is smaller than it needs to be.
-#endif
-
-int mem_init_done;
-unsigned long ioremap_bot = IMALLOC_BASE;
-static unsigned long phbs_io_bot = PHBS_IO_BASE;
-
-extern pgd_t swapper_pg_dir[];
-extern struct task_struct *current_set[NR_CPUS];
-
-unsigned long klimit = (unsigned long)_end;
-
-unsigned long _SDR1=0;
-unsigned long _ASR=0;
-
-/* max amount of RAM to use */
-unsigned long __max_memory;
-
-/* info on what we think the IO hole is */
-unsigned long   io_hole_start;
-unsigned long   io_hole_size;
-
-void show_mem(void)
-{
-        unsigned long total = 0, reserved = 0;
-        unsigned long shared = 0, cached = 0;
-        struct page *page;
-        pg_data_t *pgdat;
-        unsigned long i;
-
-        printk("Mem-info:\n");
-        show_free_areas();
-        printk("Free swap:       %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
-        for_each_pgdat(pgdat) {
-                unsigned long flags;
-                pgdat_resize_lock(pgdat, &flags);
-                for (i = 0; i < pgdat->node_spanned_pages; i++) {
-                        page = pgdat_page_nr(pgdat, i);
-                        total++;
-                        if (PageReserved(page))
-                                reserved++;
-                        else if (PageSwapCache(page))
-                                cached++;
-                        else if (page_count(page))
-                                shared += page_count(page) - 1;
-                }
-                pgdat_resize_unlock(pgdat, &flags);
-        }
-        printk("%ld pages of RAM\n", total);
-        printk("%ld reserved pages\n", reserved);
-        printk("%ld pages shared\n", shared);
-        printk("%ld pages swap cached\n", cached);
-}
-
-#ifdef CONFIG_PPC_ISERIES
-
-void __iomem *ioremap(unsigned long addr, unsigned long size)
-{
-        return (void __iomem *)addr;
-}
-
-extern void __iomem *__ioremap(unsigned long addr, unsigned long size,
-                       unsigned long flags)
-{
-        return (void __iomem *)addr;
-}
-
-void iounmap(volatile void __iomem *addr)
-{
-        return;
-}
-
-#else
-
-/*
- * map_io_page currently only called by __ioremap
- * map_io_page adds an entry to the ioremap page table
- * and adds an entry to the HPT, possibly bolting it
- */
-static int map_io_page(unsigned long ea, unsigned long pa, int flags)
-{
-        pgd_t *pgdp;
-        pud_t *pudp;
-        pmd_t *pmdp;
-        pte_t *ptep;
-        unsigned long vsid;
-
-        if (mem_init_done) {
-                pgdp = pgd_offset_k(ea);
-                pudp = pud_alloc(&init_mm, pgdp, ea);
-                if (!pudp)
-                        return -ENOMEM;
-                pmdp = pmd_alloc(&init_mm, pudp, ea);
-                if (!pmdp)
-                        return -ENOMEM;
-                ptep = pte_alloc_kernel(pmdp, ea);
-                if (!ptep)
-                        return -ENOMEM;
-                set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
-                                                          __pgprot(flags)));
-        } else {
-                unsigned long va, vpn, hash, hpteg;
-
-                /*
-                 * If the mm subsystem is not fully up, we cannot create a
-                 * linux page table entry for this mapping.  Simply bolt an
-                 * entry in the hardware page table.
-                 */
-                vsid = get_kernel_vsid(ea);
-                va = (vsid << 28) | (ea & 0xFFFFFFF);
-                vpn = va >> PAGE_SHIFT;
-
-                hash = hpt_hash(vpn, 0);
-
-                hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
-
-                /* Panic if a pte grpup is full */
-                if (ppc_md.hpte_insert(hpteg, va, pa >> PAGE_SHIFT,
-                                       HPTE_V_BOLTED,
-                                       _PAGE_NO_CACHE|_PAGE_GUARDED|PP_RWXX)
-                    == -1) {
-                        panic("map_io_page: could not insert mapping");
-                }
-        }
-        return 0;
-}
-
-
-static void __iomem * __ioremap_com(unsigned long addr, unsigned long pa,
-                            unsigned long ea, unsigned long size,
-                            unsigned long flags)
-{
-        unsigned long i;
-
-        if ((flags & _PAGE_PRESENT) == 0)
-                flags |= pgprot_val(PAGE_KERNEL);
-
-        for (i = 0; i < size; i += PAGE_SIZE)
-                if (map_io_page(ea+i, pa+i, flags))
-                        return NULL;
-
-        return (void __iomem *) (ea + (addr & ~PAGE_MASK));
-}
-
-
-void __iomem *
-ioremap(unsigned long addr, unsigned long size)
-{
-        return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED);
-}
-
-void __iomem * __ioremap(unsigned long addr, unsigned long size,
-                         unsigned long flags)
-{
-        unsigned long pa, ea;
-        void __iomem *ret;
-
-        /*
-         * Choose an address to map it to.
-         * Once the imalloc system is running, we use it.
-         * Before that, we map using addresses going
-         * up from ioremap_bot.  imalloc will use
-         * the addresses from ioremap_bot through
-         * IMALLOC_END
-         * 
-         */
-        pa = addr & PAGE_MASK;
-        size = PAGE_ALIGN(addr + size) - pa;
-
-        if (size == 0)
-                return NULL;
-
-        if (mem_init_done) {
-                struct vm_struct *area;
-                area = im_get_free_area(size);
-                if (area == NULL)
-                        return NULL;
-                ea = (unsigned long)(area->addr);
-                ret = __ioremap_com(addr, pa, ea, size, flags);
-                if (!ret)
-                        im_free(area->addr);
-        } else {
-                ea = ioremap_bot;
-                ret = __ioremap_com(addr, pa, ea, size, flags);
-                if (ret)
-                        ioremap_bot += size;
-        }
-        return ret;
-}
-
-#define IS_PAGE_ALIGNED(_val) ((_val) == ((_val) & PAGE_MASK))
-
-int __ioremap_explicit(unsigned long pa, unsigned long ea,
-                       unsigned long size, unsigned long flags)
-{
-        struct vm_struct *area;
-        void __iomem *ret;
-        
-        /* For now, require page-aligned values for pa, ea, and size */
-        if (!IS_PAGE_ALIGNED(pa) || !IS_PAGE_ALIGNED(ea) ||
-            !IS_PAGE_ALIGNED(size)) {
-                printk(KERN_ERR "unaligned value in %s\n", __FUNCTION__);
-                return 1;
-        }
-        
-        if (!mem_init_done) {
-                /* Two things to consider in this case:
-                 * 1) No records will be kept (imalloc, etc) that the region
-                 *    has been remapped
-                 * 2) It won't be easy to iounmap() the region later (because
-                 *    of 1)
-                 */
-                ;
-        } else {
-                area = im_get_area(ea, size,
-                        IM_REGION_UNUSED|IM_REGION_SUBSET|IM_REGION_EXISTS);
-                if (area == NULL) {
-                        /* Expected when PHB-dlpar is in play */
-                        return 1;
-                }
-                if (ea != (unsigned long) area->addr) {
-                        printk(KERN_ERR "unexpected addr return from "
-                               "im_get_area\n");
-                        return 1;
-                }
-        }
-        
-        ret = __ioremap_com(pa, pa, ea, size, flags);
-        if (ret == NULL) {
-                printk(KERN_ERR "ioremap_explicit() allocation failure !\n");
-                return 1;
-        }
-        if (ret != (void *) ea) {
-                printk(KERN_ERR "__ioremap_com() returned unexpected addr\n");
-                return 1;
-        }
-
-        return 0;
-}
-
-/*  
- * Unmap an IO region and remove it from imalloc'd list.
- * Access to IO memory should be serialized by driver.
- * This code is modeled after vmalloc code - unmap_vm_area()
- *
- * XXX  what about calls before mem_init_done (ie python_countermeasures())
- */
-void iounmap(volatile void __iomem *token)
-{
-        void *addr;
-
-        if (!mem_init_done)
-                return;
-        
-        addr = (void *) ((unsigned long __force) token & PAGE_MASK);
-
-        im_free(addr);
-}
-
-static int iounmap_subset_regions(unsigned long addr, unsigned long size)
-{
-        struct vm_struct *area;
-
-        /* Check whether subsets of this region exist */
-        area = im_get_area(addr, size, IM_REGION_SUPERSET);
-        if (area == NULL)
-                return 1;
-
-        while (area) {
-                iounmap((void __iomem *) area->addr);
-                area = im_get_area(addr, size,
-                                IM_REGION_SUPERSET);
-        }
-
-        return 0;
-}
-
-int iounmap_explicit(volatile void __iomem *start, unsigned long size)
-{
-        struct vm_struct *area;
-        unsigned long addr;
-        int rc;
-        
-        addr = (unsigned long __force) start & PAGE_MASK;
-
-        /* Verify that the region either exists or is a subset of an existing
-         * region.  In the latter case, split the parent region to create 
-         * the exact region 
-         */
-        area = im_get_area(addr, size, 
-                            IM_REGION_EXISTS | IM_REGION_SUBSET);
-        if (area == NULL) {
-                /* Determine whether subset regions exist.  If so, unmap */
-                rc = iounmap_subset_regions(addr, size);
-                if (rc) {
-                        printk(KERN_ERR
-                               "%s() cannot unmap nonexistent range 0x%lx\n",
-                                __FUNCTION__, addr);
-                        return 1;
-                }
-        } else {
-                iounmap((void __iomem *) area->addr);
-        }
-        /*
-         * FIXME! This can't be right:
-        iounmap(area->addr);
-         * Maybe it should be "iounmap(area);"
-         */
-        return 0;
-}
-
-#endif
-
-EXPORT_SYMBOL(ioremap);
-EXPORT_SYMBOL(__ioremap);
-EXPORT_SYMBOL(iounmap);
-
-void free_initmem(void)
-{
-        unsigned long addr;
-
-        addr = (unsigned long)__init_begin;
-        for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) {
-                memset((void *)addr, 0xcc, PAGE_SIZE);
-                ClearPageReserved(virt_to_page(addr));
-                set_page_count(virt_to_page(addr), 1);
-                free_page(addr);
-                totalram_pages++;
-        }
-        printk ("Freeing unused kernel memory: %luk freed\n",
-                ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10);
-}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
-        if (start < end)
-                printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
-        for (; start < end; start += PAGE_SIZE) {
-                ClearPageReserved(virt_to_page(start));
-                set_page_count(virt_to_page(start), 1);
-                free_page(start);
-                totalram_pages++;
-        }
-}
-#endif
-
-static DEFINE_SPINLOCK(mmu_context_lock);
-static DEFINE_IDR(mmu_context_idr);
-
-int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
-{
-        int index;
-        int err;
-
-again:
-        if (!idr_pre_get(&mmu_context_idr, GFP_KERNEL))
-                return -ENOMEM;
-
-        spin_lock(&mmu_context_lock);
-        err = idr_get_new_above(&mmu_context_idr, NULL, 1, &index);
-        spin_unlock(&mmu_context_lock);
-
-        if (err == -EAGAIN)
-                goto again;
-        else if (err)
-                return err;
-
-        if (index > MAX_CONTEXT) {
-                idr_remove(&mmu_context_idr, index);
-                return -ENOMEM;
-        }
-
-        mm->context.id = index;
-
-        return 0;
-}
-
-void destroy_context(struct mm_struct *mm)
-{
-        spin_lock(&mmu_context_lock);
-        idr_remove(&mmu_context_idr, mm->context.id);
-        spin_unlock(&mmu_context_lock);
-
-        mm->context.id = NO_CONTEXT;
-}
-
-/*
- * Do very early mm setup.
- */
-void __init mm_init_ppc64(void)
-{
-#ifndef CONFIG_PPC_ISERIES
-        unsigned long i;
-#endif
-
-        ppc64_boot_msg(0x100, "MM Init");
-
-        /* This is the story of the IO hole... please, keep seated,
-         * unfortunately, we are out of oxygen masks at the moment.
-         * So we need some rough way to tell where your big IO hole
-         * is. On pmac, it's between 2G and 4G, on POWER3, it's around
-         * that area as well, on POWER4 we don't have one, etc...
-         * We need that as a "hint" when sizing the TCE table on POWER3
-         * So far, the simplest way that seem work well enough for us it
-         * to just assume that the first discontinuity in our physical
-         * RAM layout is the IO hole. That may not be correct in the future
-         * (and isn't on iSeries but then we don't care ;)
-         */
-
-#ifndef CONFIG_PPC_ISERIES
-        for (i = 1; i < lmb.memory.cnt; i++) {
-                unsigned long base, prevbase, prevsize;
-
-                prevbase = lmb.memory.region[i-1].base;
-                prevsize = lmb.memory.region[i-1].size;
-                base = lmb.memory.region[i].base;
-                if (base > (prevbase + prevsize)) {
-                        io_hole_start = prevbase + prevsize;
-                        io_hole_size = base  - (prevbase + prevsize);
-                        break;
-                }
-        }
-#endif /* CONFIG_PPC_ISERIES */
-        if (io_hole_start)
-                printk("IO Hole assumed to be %lx -> %lx\n",
-                       io_hole_start, io_hole_start + io_hole_size - 1);
-
-        ppc64_boot_msg(0x100, "MM Init Done");
-}
-
-/*
- * This is called by /dev/mem to know if a given address has to
- * be mapped non-cacheable or not
- */
-int page_is_ram(unsigned long pfn)
-{
-        int i;
-        unsigned long paddr = (pfn << PAGE_SHIFT);
-
-        for (i=0; i < lmb.memory.cnt; i++) {
-                unsigned long base;
-
-                base = lmb.memory.region[i].base;
-
-                if ((paddr >= base) &&
-                        (paddr < (base + lmb.memory.region[i].size))) {
-                        return 1;
-                }
-        }
-
-        return 0;
-}
-EXPORT_SYMBOL(page_is_ram);
-
-/*
- * Initialize the bootmem system and give it all the memory we
- * have available.
- */
-#ifndef CONFIG_NEED_MULTIPLE_NODES
-void __init do_init_bootmem(void)
-{
-        unsigned long i;
-        unsigned long start, bootmap_pages;
-        unsigned long total_pages = lmb_end_of_DRAM() >> PAGE_SHIFT;
-        int boot_mapsize;
-
-        /*
-         * Find an area to use for the bootmem bitmap.  Calculate the size of
-         * bitmap required as (Total Memory) / PAGE_SIZE / BITS_PER_BYTE.
-         * Add 1 additional page in case the address isn't page-aligned.
-         */
-        bootmap_pages = bootmem_bootmap_pages(total_pages);
-
-        start = lmb_alloc(bootmap_pages<<PAGE_SHIFT, PAGE_SIZE);
-        BUG_ON(!start);
-
-        boot_mapsize = init_bootmem(start >> PAGE_SHIFT, total_pages);
-
-        max_pfn = max_low_pfn;
-
-        /* Add all physical memory to the bootmem map, mark each area
-         * present.
-         */
-        for (i=0; i < lmb.memory.cnt; i++)
-                free_bootmem(lmb.memory.region[i].base,
-                             lmb_size_bytes(&lmb.memory, i));
-
-        /* reserve the sections we're already using */
-        for (i=0; i < lmb.reserved.cnt; i++)
-                reserve_bootmem(lmb.reserved.region[i].base,
-                                lmb_size_bytes(&lmb.reserved, i));
-
-        for (i=0; i < lmb.memory.cnt; i++)
-                memory_present(0, lmb_start_pfn(&lmb.memory, i),
-                               lmb_end_pfn(&lmb.memory, i));
-}
-
-/*
- * paging_init() sets up the page tables - in fact we've already done this.
- */
-void __init paging_init(void)
-{
-        unsigned long zones_size[MAX_NR_ZONES];
-        unsigned long zholes_size[MAX_NR_ZONES];
-        unsigned long total_ram = lmb_phys_mem_size();
-        unsigned long top_of_ram = lmb_end_of_DRAM();
-
-        printk(KERN_INFO "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
-               top_of_ram, total_ram);
-        printk(KERN_INFO "Memory hole size: %ldMB\n",
-               (top_of_ram - total_ram) >> 20);
-        /*
-         * All pages are DMA-able so we put them all in the DMA zone.
-         */
-        memset(zones_size, 0, sizeof(zones_size));
-        memset(zholes_size, 0, sizeof(zholes_size));
-
-        zones_size[ZONE_DMA] = top_of_ram >> PAGE_SHIFT;
-        zholes_size[ZONE_DMA] = (top_of_ram - total_ram) >> PAGE_SHIFT;
-
-        free_area_init_node(0, NODE_DATA(0), zones_size,
-                            __pa(PAGE_OFFSET) >> PAGE_SHIFT, zholes_size);
-}
-#endif /* ! CONFIG_NEED_MULTIPLE_NODES */
-
-static struct kcore_list kcore_vmem;
-
-static int __init setup_kcore(void)
-{
-        int i;
-
-        for (i=0; i < lmb.memory.cnt; i++) {
-                unsigned long base, size;
-                struct kcore_list *kcore_mem;
-
-                base = lmb.memory.region[i].base;
-                size = lmb.memory.region[i].size;
-
-                /* GFP_ATOMIC to avoid might_sleep warnings during boot */
-                kcore_mem = kmalloc(sizeof(struct kcore_list), GFP_ATOMIC);
-                if (!kcore_mem)
-                        panic("mem_init: kmalloc failed\n");
-
-                kclist_add(kcore_mem, __va(base), size);
-        }
-
-        kclist_add(&kcore_vmem, (void *)VMALLOC_START, VMALLOC_END-VMALLOC_START);
-
-        return 0;
-}
-module_init(setup_kcore);
-
-void __init mem_init(void)
-{
-#ifdef CONFIG_NEED_MULTIPLE_NODES
-        int nid;
-#endif
-        pg_data_t *pgdat;
-        unsigned long i;
-        struct page *page;
-        unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
-
-        num_physpages = max_low_pfn;    /* RAM is assumed contiguous */
-        high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
-
-#ifdef CONFIG_NEED_MULTIPLE_NODES
-        for_each_online_node(nid) {
-                if (NODE_DATA(nid)->node_spanned_pages != 0) {
-                        printk("freeing bootmem node %x\n", nid);
-                        totalram_pages +=
-                                free_all_bootmem_node(NODE_DATA(nid));
-                }
-        }
-#else
-        max_mapnr = num_physpages;
-        totalram_pages += free_all_bootmem();
-#endif
-
-        for_each_pgdat(pgdat) {
-                unsigned long flags;
-                pgdat_resize_lock(pgdat, &flags);
-                for (i = 0; i < pgdat->node_spanned_pages; i++) {
-                        page = pgdat_page_nr(pgdat, i);
-                        if (PageReserved(page))
-                                reservedpages++;
-                }
-                pgdat_resize_unlock(pgdat, &flags);
-        }
-
-        codesize = (unsigned long)&_etext - (unsigned long)&_stext;
-        initsize = (unsigned long)&__init_end - (unsigned long)&__init_begin;
-        datasize = (unsigned long)&_edata - (unsigned long)&__init_end;
-        bsssize = (unsigned long)&__bss_stop - (unsigned long)&__bss_start;
-
-        printk(KERN_INFO "Memory: %luk/%luk available (%luk kernel code, "
-               "%luk reserved, %luk data, %luk bss, %luk init)\n",
-                (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
-                num_physpages << (PAGE_SHIFT-10),
-                codesize >> 10,
-                reservedpages << (PAGE_SHIFT-10),
-                datasize >> 10,
-                bsssize >> 10,
-                initsize >> 10);
-
-        mem_init_done = 1;
-
-        /* Initialize the vDSO */
-        vdso_init();
-}
-
-/*
- * This is called when a page has been modified by the kernel.
- * It just marks the page as not i-cache clean.  We do the i-cache
- * flush later when the page is given to a user process, if necessary.
- */
-void flush_dcache_page(struct page *page)
-{
-        if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
-                return;
-        /* avoid an atomic op if possible */
-        if (test_bit(PG_arch_1, &page->flags))
-                clear_bit(PG_arch_1, &page->flags);
-}
-EXPORT_SYMBOL(flush_dcache_page);
-
-void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
-{
-        clear_page(page);
-
-        if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
-                return;
-        /*
-         * We shouldnt have to do this, but some versions of glibc
-         * require it (ld.so assumes zero filled pages are icache clean)
-         * - Anton
-         */
-
-        /* avoid an atomic op if possible */
-        if (test_bit(PG_arch_1, &pg->flags))
-                clear_bit(PG_arch_1, &pg->flags);
-}
-EXPORT_SYMBOL(clear_user_page);
-
-void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
-                    struct page *pg)
-{
-        copy_page(vto, vfrom);
-
-        /*
-         * We should be able to use the following optimisation, however
-         * there are two problems.
-         * Firstly a bug in some versions of binutils meant PLT sections
-         * were not marked executable.
-         * Secondly the first word in the GOT section is blrl, used
-         * to establish the GOT address. Until recently the GOT was
-         * not marked executable.
-         * - Anton
-         */
-#if 0
-        if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
-                return;
-#endif
-
-        if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
-                return;
-
-        /* avoid an atomic op if possible */
-        if (test_bit(PG_arch_1, &pg->flags))
-                clear_bit(PG_arch_1, &pg->flags);
-}
-
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
-                             unsigned long addr, int len)
-{
-        unsigned long maddr;
-
-        maddr = (unsigned long)page_address(page) + (addr & ~PAGE_MASK);
-        flush_icache_range(maddr, maddr + len);
-}
-EXPORT_SYMBOL(flush_icache_user_range);
-
-/*
- * This is called at the end of handling a user page fault, when the
- * fault has been handled by updating a PTE in the linux page tables.
- * We use it to preload an HPTE into the hash table corresponding to
- * the updated linux PTE.
- * 
- * This must always be called with the mm->page_table_lock held
- */
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long ea,
-                      pte_t pte)
-{
-        unsigned long vsid;
-        void *pgdir;
-        pte_t *ptep;
-        int local = 0;
-        cpumask_t tmp;
-        unsigned long flags;
-
-        /* handle i-cache coherency */
-        if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE) &&
-            !cpu_has_feature(CPU_FTR_NOEXECUTE)) {
-                unsigned long pfn = pte_pfn(pte);
-                if (pfn_valid(pfn)) {
-                        struct page *page = pfn_to_page(pfn);
-                        if (!PageReserved(page)
-                            && !test_bit(PG_arch_1, &page->flags)) {
-                                __flush_dcache_icache(page_address(page));
-                                set_bit(PG_arch_1, &page->flags);
-                        }
-                }
-        }
-
-        /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
-        if (!pte_young(pte))
-                return;
-
-        pgdir = vma->vm_mm->pgd;
-        if (pgdir == NULL)
-                return;
-
-        ptep = find_linux_pte(pgdir, ea);
-        if (!ptep)
-                return;
-
-        vsid = get_vsid(vma->vm_mm->context.id, ea);
-
-        local_irq_save(flags);
-        tmp = cpumask_of_cpu(smp_processor_id());
-        if (cpus_equal(vma->vm_mm->cpu_vm_mask, tmp))
-                local = 1;
-
-        __hash_page(ea, 0, vsid, ptep, 0x300, local);
-        local_irq_restore(flags);
-}
-
-void __iomem * reserve_phb_iospace(unsigned long size)
-{
-        void __iomem *virt_addr;
-                
-        if (phbs_io_bot >= IMALLOC_BASE) 
-                panic("reserve_phb_iospace(): phb io space overflow\n");
-                        
-        virt_addr = (void __iomem *) phbs_io_bot;
-        phbs_io_bot += size;
-
-        return virt_addr;
-}
-
-static void zero_ctor(void *addr, kmem_cache_t *cache, unsigned long flags)
-{
-        memset(addr, 0, kmem_cache_size(cache));
-}
-
-static const int pgtable_cache_size[2] = {
-        PTE_TABLE_SIZE, PMD_TABLE_SIZE
-};
-static const char *pgtable_cache_name[ARRAY_SIZE(pgtable_cache_size)] = {
-        "pgd_pte_cache", "pud_pmd_cache",
-};
-
-kmem_cache_t *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)];
-
-void pgtable_cache_init(void)
-{
-        int i;
-
-        BUILD_BUG_ON(PTE_TABLE_SIZE != pgtable_cache_size[PTE_CACHE_NUM]);
-        BUILD_BUG_ON(PMD_TABLE_SIZE != pgtable_cache_size[PMD_CACHE_NUM]);
-        BUILD_BUG_ON(PUD_TABLE_SIZE != pgtable_cache_size[PUD_CACHE_NUM]);
-        BUILD_BUG_ON(PGD_TABLE_SIZE != pgtable_cache_size[PGD_CACHE_NUM]);
-
-        for (i = 0; i < ARRAY_SIZE(pgtable_cache_size); i++) {
-                int size = pgtable_cache_size[i];
-                const char *name = pgtable_cache_name[i];
-
-                pgtable_cache[i] = kmem_cache_create(name,
-                                                     size, size,
-                                                     SLAB_HWCACHE_ALIGN
-                                                     | SLAB_MUST_HWCACHE_ALIGN,
-                                                     zero_ctor,
-                                                     NULL);
-                if (! pgtable_cache[i])
-                        panic("pgtable_cache_init(): could not create %s!\n",
-                              name);
-        }
-}
-
-pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
-                              unsigned long size, pgprot_t vma_prot)
-{
-        if (ppc_md.phys_mem_access_prot)
-                return ppc_md.phys_mem_access_prot(file, addr, size, vma_prot);
-
-        if (!page_is_ram(addr >> PAGE_SHIFT))
-                vma_prot = __pgprot(pgprot_val(vma_prot)
-                                    | _PAGE_GUARDED | _PAGE_NO_CACHE);
-        return vma_prot;
-}
-EXPORT_SYMBOL(phys_mem_access_prot);
-
-#ifdef CONFIG_MEMORY_HOTPLUG
-
-void online_page(struct page *page)
-{
-        ClearPageReserved(page);
-        free_cold_page(page);
-        totalram_pages++;
-        num_physpages++;
-}
-
-/*
- * This works only for the non-NUMA case.  Later, we'll need a lookup
- * to convert from real physical addresses to nid, that doesn't use
- * pfn_to_nid().
- */
-int __devinit add_memory(u64 start, u64 size)
-{
-        struct pglist_data *pgdata = NODE_DATA(0);
-        struct zone *zone;
-        unsigned long start_pfn = start >> PAGE_SHIFT;
-        unsigned long nr_pages = size >> PAGE_SHIFT;
-
-        /* this should work for most non-highmem platforms */
-        zone = pgdata->node_zones;
-
-        return __add_pages(zone, start_pfn, nr_pages);
-
-        return 0;
-}
-
-/*
- * First pass at this code will check to determine if the remove
- * request is within the RMO.  Do not allow removal within the RMO.
- */
-int __devinit remove_memory(u64 start, u64 size)
-{
-        struct zone *zone;
-        unsigned long start_pfn, end_pfn, nr_pages;
-
-        start_pfn = start >> PAGE_SHIFT;
-        nr_pages = size >> PAGE_SHIFT;
-        end_pfn = start_pfn + nr_pages;
-
-        printk("%s(): Attempting to remove memoy in range "
-                        "%lx to %lx\n", __func__, start, start+size);
-        /*
-         * check for range within RMO
-         */
-        zone = page_zone(pfn_to_page(start_pfn));
-
-        printk("%s(): memory will be removed from "
-                        "the %s zone\n", __func__, zone->name);
-
-        /*
-         * not handling removing memory ranges that
-         * overlap multiple zones yet
-         */
-        if (end_pfn > (zone->zone_start_pfn + zone->spanned_pages))
-                goto overlap;
-
-        /* make sure it is NOT in RMO */
-        if ((start < lmb.rmo_size) || ((start+size) < lmb.rmo_size)) {
-                printk("%s(): range to be removed must NOT be in RMO!\n",
-                        __func__);
-                goto in_rmo;
-        }
-
-        return __remove_pages(zone, start_pfn, nr_pages);
-
-overlap:
-        printk("%s(): memory range to be removed overlaps "
-                "multiple zones!!!\n", __func__);
-in_rmo:
-        return -1;
-}
-#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/ppc64/oprofile/Kconfig b/arch/ppc64/oprofile/Kconfig
deleted file mode 100644
index 5ade19801b97..000000000000
--- a/arch/ppc64/oprofile/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
-
-menu "Profiling support"
-        depends on EXPERIMENTAL
-
-config PROFILING
-        bool "Profiling support (EXPERIMENTAL)"
-        help
-          Say Y here to enable the extended profiling support mechanisms used
-          by profilers such as OProfile.
-          
-
-config OPROFILE
-        tristate "OProfile system profiling (EXPERIMENTAL)"
-        depends on PROFILING
-        help
-          OProfile is a profiling system capable of profiling the
-          whole system, include the kernel, kernel modules, libraries,
-          and applications.
-
-          If unsure, say N.
-
-endmenu
-
diff --git a/arch/ppc64/oprofile/Makefile b/arch/ppc64/oprofile/Makefile
deleted file mode 100644
index 162dbf06c142..000000000000
--- a/arch/ppc64/oprofile/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-obj-$(CONFIG_OPROFILE) += oprofile.o
-
-DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
-                oprof.o cpu_buffer.o buffer_sync.o \
-                event_buffer.o oprofile_files.o \
-                oprofilefs.o oprofile_stats.o \
-                timer_int.o )
-
-oprofile-y := $(DRIVER_OBJS) common.o op_model_rs64.o op_model_power4.o
diff --git a/arch/ppc64/xmon/Makefile b/arch/ppc64/xmon/Makefile
deleted file mode 100644
index fb21a7088d3e..000000000000
--- a/arch/ppc64/xmon/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-# Makefile for xmon
-
-EXTRA_CFLAGS += -mno-minimal-toc
-
-obj-y := start.o xmon.o ppc-dis.o ppc-opc.o subr_prf.o setjmp.o
diff --git a/arch/ppc64/xmon/setjmp.S b/arch/ppc64/xmon/setjmp.S
deleted file mode 100644
index 30ee643d557c..000000000000
--- a/arch/ppc64/xmon/setjmp.S
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (C) 1996 Paul Mackerras.
- *
- *      This program is free software; you can redistribute it and/or
- *      modify it under the terms of the GNU General Public License
- *      as published by the Free Software Foundation; either version
- *      2 of the License, or (at your option) any later version.
- *
- * NOTE: assert(sizeof(buf) > 184)
- */
-#include <asm/processor.h>
-#include <asm/ppc_asm.h>
-
-_GLOBAL(xmon_setjmp)
-        mflr    r0
-        std     r0,0(r3)
-        std     r1,8(r3)
-        std     r2,16(r3)
-        mfcr    r0
-        std     r0,24(r3)
-        std     r13,32(r3)
-        std     r14,40(r3)
-        std     r15,48(r3)
-        std     r16,56(r3)
-        std     r17,64(r3)
-        std     r18,72(r3)
-        std     r19,80(r3)
-        std     r20,88(r3)
-        std     r21,96(r3)
-        std     r22,104(r3)
-        std     r23,112(r3)
-        std     r24,120(r3)
-        std     r25,128(r3)
-        std     r26,136(r3)
-        std     r27,144(r3)
-        std     r28,152(r3)
-        std     r29,160(r3)
-        std     r30,168(r3)
-        std     r31,176(r3)
-        li      r3,0
-        blr
-
-_GLOBAL(xmon_longjmp)
-        cmpdi   r4,0
-        bne     1f
-        li      r4,1
-1:      ld      r13,32(r3)
-        ld      r14,40(r3)
-        ld      r15,48(r3)
-        ld      r16,56(r3)
-        ld      r17,64(r3)
-        ld      r18,72(r3)
-        ld      r19,80(r3)
-        ld      r20,88(r3)
-        ld      r21,96(r3)
-        ld      r22,104(r3)
-        ld      r23,112(r3)
-        ld      r24,120(r3)
-        ld      r25,128(r3)
-        ld      r26,136(r3)
-        ld      r27,144(r3)
-        ld      r28,152(r3)
-        ld      r29,160(r3)
-        ld      r30,168(r3)
-        ld      r31,176(r3)
-        ld      r0,24(r3)
-        mtcrf   56,r0
-        ld      r0,0(r3)
-        ld      r1,8(r3)
-        ld      r2,16(r3)
-        mtlr    r0
-        mr      r3,r4
-        blr
diff --git a/arch/s390/kernel/compat_ioctl.c b/arch/s390/kernel/compat_ioctl.c
index 24a1e9f069a7..6504c4e69986 100644
--- a/arch/s390/kernel/compat_ioctl.c
+++ b/arch/s390/kernel/compat_ioctl.c
@@ -18,6 +18,8 @@
 #include <asm/dasd.h>
 #include <asm/cmb.h>
 #include <asm/tape390.h>
+#include <asm/ccwdev.h>
+#include "../../../drivers/s390/char/raw3270.h"
 
 static int do_ioctl32_pointer(unsigned int fd, unsigned int cmd,
                                 unsigned long arg, struct file *f)
@@ -62,6 +64,13 @@ COMPATIBLE_IOCTL(BIODASDCMFENABLE)
 COMPATIBLE_IOCTL(BIODASDCMFDISABLE)
 COMPATIBLE_IOCTL(BIODASDREADALLCMB)
 
+COMPATIBLE_IOCTL(TUBICMD)
+COMPATIBLE_IOCTL(TUBOCMD)
+COMPATIBLE_IOCTL(TUBGETI)
+COMPATIBLE_IOCTL(TUBGETO)
+COMPATIBLE_IOCTL(TUBSETMOD)
+COMPATIBLE_IOCTL(TUBGETMOD)
+
 COMPATIBLE_IOCTL(TAPE390_DISPLAY)
 
 /* s390 doesn't need handlers here */
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 55654b6e16dc..039354d72348 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -485,7 +485,9 @@ start:
 #
         .org  0x10000
 startup:basr  %r13,0                     # get base
-.LPG1:  lctl  %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
+.LPG1:  l     %r1, .Lget_ipl_device_addr-.LPG1(%r13)
+        basr  %r14, %r1
+        lctl  %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
         la    %r12,_pstart-.LPG1(%r13)   # pointer to parameter area
                                          # move IPL device to lowcore
         mvc   __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
@@ -560,6 +562,9 @@ startup:basr  %r13,0                     # get base
         mr    %r2,%r1                   # mem size in bytes in %r3
         b     .Lfchunk-.LPG1(%r13)
 
+        .align 4
+.Lget_ipl_device_addr:
+        .long .Lget_ipl_device
 .Lpmask:
         .byte 0
 .align 8
@@ -755,6 +760,63 @@ _pstart:
         .global _pend
 _pend:  
 
+.Lget_ipl_device:
+        basr  %r12,0
+.LPG2:  l     %r1,0xb8                  # get sid
+        sll   %r1,15                    # test if subchannel is enabled
+        srl   %r1,31
+        ltr   %r1,%r1
+        bz    0(%r14)                   # subchannel disabled
+        l     %r1,0xb8
+        la    %r5,.Lipl_schib-.LPG2(%r12)
+        stsch 0(%r5)                    # get schib of subchannel
+        bnz   0(%r14)                   # schib not available
+        tm    5(%r5),0x01               # devno valid?
+        bno   0(%r14)
+        la    %r6,ipl_parameter_flags-.LPG2(%r12)
+        oi    3(%r6),0x01               # set flag
+        la    %r2,ipl_devno-.LPG2(%r12)
+        mvc   0(2,%r2),6(%r5)           # store devno
+        tm    4(%r5),0x80               # qdio capable device?
+        bno   0(%r14)
+        oi    3(%r6),0x02               # set flag
+
+        # copy ipl parameters
+
+        lhi   %r0,4096
+        l     %r2,20(%r0)               # get address of parameter list
+        lhi   %r3,IPL_PARMBLOCK_ORIGIN
+        st    %r3,20(%r0)
+        lhi   %r4,1
+        cr    %r2,%r3                   # start parameters < destination ?
+        jl    0f
+        lhi   %r1,1                     # copy direction is upwards
+        j     1f
+0:      lhi   %r1,-1                    # copy direction is downwards
+        ar    %r2,%r0
+        ar    %r3,%r0
+        ar    %r2,%r1
+        ar    %r3,%r1
+1:      mvc   0(1,%r3),0(%r2)           # finally copy ipl parameters
+        ar    %r3,%r1
+        ar    %r2,%r1
+        sr    %r0,%r4
+        jne   1b
+        b     0(%r14)
+
+        .align 4
+.Lipl_schib:
+        .rept 13
+        .long 0
+        .endr
+
+        .globl ipl_parameter_flags
+ipl_parameter_flags:
+        .long 0
+        .globl ipl_devno
+ipl_devno:
+        .word 0
+
 #ifdef CONFIG_SHARED_KERNEL
         .org   0x100000
 #endif
@@ -764,11 +826,11 @@ _pend:
 #
         .globl _stext
 _stext: basr  %r13,0                    # get base
-.LPG2:
+.LPG3:
 #
 # Setup stack
 #
-        l     %r15,.Linittu-.LPG2(%r13)
+        l     %r15,.Linittu-.LPG3(%r13)
         mvc   __LC_CURRENT(4),__TI_task(%r15)
         ahi   %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
         st    %r15,__LC_KERNEL_STACK    # set end of kernel stack
@@ -782,8 +844,8 @@ _stext:	basr  %r13,0                    # get base
         lctl   %c0,%c15,0(%r15)
 
 #
-        lam    0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
-        l      %r14,.Lstart-.LPG2(%r13)
+        lam    0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
+        l      %r14,.Lstart-.LPG3(%r13)
         basr   %r14,%r14                # call start_kernel
 #
 # We returned from start_kernel ?!? PANIK
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index c9ff0404c875..193aafa72f54 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -484,6 +484,8 @@ start:
 startup:basr  %r13,0                     # get base
 .LPG1:  sll   %r13,1                     # remove high order bit
         srl   %r13,1
+        l     %r1,.Lget_ipl_device_addr-.LPG1(%r13)
+        basr  %r14,%r1
         lhi   %r1,1                      # mode 1 = esame
         slr   %r0,%r0                    # set cpuid to zero
         sigp  %r1,%r0,0x12               # switch to esame mode
@@ -556,6 +558,9 @@ startup:basr  %r13,0                     # get base
         mlgr  %r2,%r1                   # mem size in bytes in %r3
         b     .Lfchunk-.LPG1(%r13)
 
+        .align 4
+.Lget_ipl_device_addr:
+        .long .Lget_ipl_device
 .Lpmask:
         .byte 0
         .align 8
@@ -746,6 +751,63 @@ _pstart:
         .global _pend
 _pend:  
 
+.Lget_ipl_device:
+        basr  %r12,0
+.LPG2:  l     %r1,0xb8                  # get sid
+        sll   %r1,15                    # test if subchannel is enabled
+        srl   %r1,31
+        ltr   %r1,%r1
+        bz    0(%r14)                   # subchannel disabled
+        l     %r1,0xb8
+        la    %r5,.Lipl_schib-.LPG2(%r12)
+        stsch 0(%r5)                    # get schib of subchannel
+        bnz   0(%r14)                   # schib not available
+        tm    5(%r5),0x01               # devno valid?
+        bno   0(%r14)
+        la    %r6,ipl_parameter_flags-.LPG2(%r12)
+        oi    3(%r6),0x01               # set flag
+        la    %r2,ipl_devno-.LPG2(%r12)
+        mvc   0(2,%r2),6(%r5)           # store devno
+        tm    4(%r5),0x80               # qdio capable device?
+        bno   0(%r14)
+        oi    3(%r6),0x02               # set flag
+
+        # copy ipl parameters
+
+        lhi   %r0,4096
+        l     %r2,20(%r0)               # get address of parameter list
+        lhi   %r3,IPL_PARMBLOCK_ORIGIN
+        st    %r3,20(%r0)
+        lhi   %r4,1
+        cr    %r2,%r3                   # start parameters < destination ?
+        jl    0f
+        lhi   %r1,1                     # copy direction is upwards
+        j     1f
+0:      lhi   %r1,-1                    # copy direction is downwards
+        ar    %r2,%r0
+        ar    %r3,%r0
+        ar    %r2,%r1
+        ar    %r3,%r1
+1:      mvc   0(1,%r3),0(%r2)           # finally copy ipl parameters
+        ar    %r3,%r1
+        ar    %r2,%r1
+        sr    %r0,%r4
+        jne   1b
+        b     0(%r14)
+
+        .align 4
+.Lipl_schib:
+        .rept 13
+        .long 0
+        .endr
+
+        .globl ipl_parameter_flags
+ipl_parameter_flags:
+        .long 0
+        .globl ipl_devno
+ipl_devno:
+        .word 0
+
 #ifdef CONFIG_SHARED_KERNEL
         .org   0x100000
 #endif
@@ -755,7 +817,7 @@ _pend:
 #
         .globl _stext
 _stext: basr  %r13,0                    # get base
-.LPG2:
+.LPG3:
 #
 # Setup stack
 #
@@ -774,7 +836,7 @@ _stext:	basr  %r13,0                    # get base
         lctlg  %c0,%c15,0(%r15)
 
 #
-        lam    0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
+        lam    0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
         brasl  %r14,start_kernel        # go to C code
 #
 # We returned from start_kernel ?!? PANIK
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 5204778b8e5e..31e7b19348b7 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -36,6 +36,7 @@
 #include <linux/console.h>
 #include <linux/seq_file.h>
 #include <linux/kernel_stat.h>
+#include <linux/device.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -685,3 +686,188 @@ struct seq_operations cpuinfo_op = {
         .show   = show_cpuinfo,
 };
 
+#define DEFINE_IPL_ATTR(_name, _format, _value)                 \
+static ssize_t ipl_##_name##_show(struct subsystem *subsys,     \
+                char *page)                                     \
+{                                                               \
+        return sprintf(page, _format, _value);                  \
+}                                                               \
+static struct subsys_attribute ipl_##_name##_attr =             \
+        __ATTR(_name, S_IRUGO, ipl_##_name##_show, NULL);
+
+DEFINE_IPL_ATTR(wwpn, "0x%016llx\n", (unsigned long long)
+                IPL_PARMBLOCK_START->fcp.wwpn);
+DEFINE_IPL_ATTR(lun, "0x%016llx\n", (unsigned long long)
+                IPL_PARMBLOCK_START->fcp.lun);
+DEFINE_IPL_ATTR(bootprog, "%lld\n", (unsigned long long)
+                IPL_PARMBLOCK_START->fcp.bootprog);
+DEFINE_IPL_ATTR(br_lba, "%lld\n", (unsigned long long)
+                IPL_PARMBLOCK_START->fcp.br_lba);
+
+enum ipl_type_type {
+        ipl_type_unknown,
+        ipl_type_ccw,
+        ipl_type_fcp,
+};
+
+static enum ipl_type_type
+get_ipl_type(void)
+{
+        struct ipl_parameter_block *ipl = IPL_PARMBLOCK_START;
+
+        if (!IPL_DEVNO_VALID)
+                return ipl_type_unknown;
+        if (!IPL_PARMBLOCK_VALID)
+                return ipl_type_ccw;
+        if (ipl->hdr.header.version > IPL_MAX_SUPPORTED_VERSION)
+                return ipl_type_unknown;
+        if (ipl->fcp.pbt != IPL_TYPE_FCP)
+                return ipl_type_unknown;
+        return ipl_type_fcp;
+}
+
+static ssize_t
+ipl_type_show(struct subsystem *subsys, char *page)
+{
+        switch (get_ipl_type()) {
+        case ipl_type_ccw:
+                return sprintf(page, "ccw\n");
+        case ipl_type_fcp:
+                return sprintf(page, "fcp\n");
+        default:
+                return sprintf(page, "unknown\n");
+        }
+}
+
+static struct subsys_attribute ipl_type_attr = __ATTR_RO(ipl_type);
+
+static ssize_t
+ipl_device_show(struct subsystem *subsys, char *page)
+{
+        struct ipl_parameter_block *ipl = IPL_PARMBLOCK_START;
+
+        switch (get_ipl_type()) {
+        case ipl_type_ccw:
+                return sprintf(page, "0.0.%04x\n", ipl_devno);
+        case ipl_type_fcp:
+                return sprintf(page, "0.0.%04x\n", ipl->fcp.devno);
+        default:
+                return 0;
+        }
+}
+
+static struct subsys_attribute ipl_device_attr =
+        __ATTR(device, S_IRUGO, ipl_device_show, NULL);
+
+static struct attribute *ipl_fcp_attrs[] = {
+        &ipl_type_attr.attr,
+        &ipl_device_attr.attr,
+        &ipl_wwpn_attr.attr,
+        &ipl_lun_attr.attr,
+        &ipl_bootprog_attr.attr,
+        &ipl_br_lba_attr.attr,
+        NULL,
+};
+
+static struct attribute_group ipl_fcp_attr_group = {
+        .attrs = ipl_fcp_attrs,
+};
+
+static struct attribute *ipl_ccw_attrs[] = {
+        &ipl_type_attr.attr,
+        &ipl_device_attr.attr,
+        NULL,
+};
+
+static struct attribute_group ipl_ccw_attr_group = {
+        .attrs = ipl_ccw_attrs,
+};
+
+static struct attribute *ipl_unknown_attrs[] = {
+        &ipl_type_attr.attr,
+        NULL,
+};
+
+static struct attribute_group ipl_unknown_attr_group = {
+        .attrs = ipl_unknown_attrs,
+};
+
+static ssize_t
+ipl_parameter_read(struct kobject *kobj, char *buf, loff_t off, size_t count)
+{
+        unsigned int size = IPL_PARMBLOCK_SIZE;
+
+        if (off > size)
+                return 0;
+        if (off + count > size)
+                count = size - off;
+
+        memcpy(buf, (void *) IPL_PARMBLOCK_START + off, count);
+        return count;
+}
+
+static struct bin_attribute ipl_parameter_attr = {
+        .attr = {
+                .name = "binary_parameter",
+                .mode = S_IRUGO,
+                .owner = THIS_MODULE,
+        },
+        .size = PAGE_SIZE,
+        .read = &ipl_parameter_read,
+};
+
+static ssize_t
+ipl_scp_data_read(struct kobject *kobj, char *buf, loff_t off, size_t count)
+{
+        unsigned int size =  IPL_PARMBLOCK_START->fcp.scp_data_len;
+        void *scp_data = &IPL_PARMBLOCK_START->fcp.scp_data;
+
+        if (off > size)
+                return 0;
+        if (off + count > size)
+                count = size - off;
+
+        memcpy(buf, scp_data + off, count);
+        return count;
+}
+
+static struct bin_attribute ipl_scp_data_attr = {
+        .attr = {
+                .name = "scp_data",
+                .mode = S_IRUGO,
+                .owner = THIS_MODULE,
+        },
+        .size = PAGE_SIZE,
+        .read = &ipl_scp_data_read,
+};
+
+static decl_subsys(ipl, NULL, NULL);
+
+static int __init
+ipl_device_sysfs_register(void) {
+        int rc;
+
+        rc = firmware_register(&ipl_subsys);
+        if (rc)
+                return rc;
+
+        switch (get_ipl_type()) {
+        case ipl_type_ccw:
+                sysfs_create_group(&ipl_subsys.kset.kobj, &ipl_ccw_attr_group);
+                break;
+        case ipl_type_fcp:
+                sysfs_create_group(&ipl_subsys.kset.kobj, &ipl_fcp_attr_group);
+                sysfs_create_bin_file(&ipl_subsys.kset.kobj,
+                                      &ipl_parameter_attr);
+                sysfs_create_bin_file(&ipl_subsys.kset.kobj,
+                                      &ipl_scp_data_attr);
+                break;
+        default:
+                sysfs_create_group(&ipl_subsys.kset.kobj,
+                                   &ipl_unknown_attr_group);
+                break;
+        }
+        return 0;
+}
+
+__initcall(ipl_device_sysfs_register);
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index 2fd75da15495..9a1d95894f3d 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -49,10 +49,6 @@
 
 #define TICK_SIZE tick
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 static ext_int_info_t ext_int_info_cc;
 static u64 init_timer_cc;
 static u64 jiffies_timer_cc;
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index fa0726507b3d..22a895ecb7a4 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -24,7 +24,6 @@
 #include <asm/s390_ext.h>
 #include <asm/timer.h>
 
-#define VTIMER_MAGIC (TIMER_MAGIC + 1)
 static ext_int_info_t ext_int_info_timer;
 DEFINE_PER_CPU(struct vtimer_queue, virt_cpu_timer);
 
@@ -277,20 +276,12 @@ static void do_cpu_timer_interrupt(struct pt_regs *regs, __u16 error_code)
 
 void init_virt_timer(struct vtimer_list *timer)
 {
-        timer->magic = VTIMER_MAGIC;
         timer->function = NULL;
         INIT_LIST_HEAD(&timer->entry);
         spin_lock_init(&timer->lock);
 }
 EXPORT_SYMBOL(init_virt_timer);
 
-static inline int check_vtimer(struct vtimer_list *timer)
-{
-        if (timer->magic != VTIMER_MAGIC)
-                return -EINVAL;
-        return 0;
-}
-
 static inline int vtimer_pending(struct vtimer_list *timer)
 {
         return (!list_empty(&timer->entry));
@@ -346,7 +337,7 @@ static void internal_add_vtimer(struct vtimer_list *timer)
 
 static inline int prepare_vtimer(struct vtimer_list *timer)
 {
-        if (check_vtimer(timer) || !timer->function) {
+        if (!timer->function) {
                 printk("add_virt_timer: uninitialized timer\n");
                 return -EINVAL;
         }
@@ -414,7 +405,7 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires)
         unsigned long flags;
         int cpu;
 
-        if (check_vtimer(timer) || !timer->function) {
+        if (!timer->function) {
                 printk("mod_virt_timer: uninitialized timer\n");
                 return  -EINVAL;
         }
@@ -481,11 +472,6 @@ int del_virt_timer(struct vtimer_list *timer)
         unsigned long flags;
         struct vtimer_queue *vt_list;
 
-        if (check_vtimer(timer)) {
-                printk("del_virt_timer: timer not initialized\n");
-                return -EINVAL;
-        }
-
         /* check if timer is pending */
         if (!vtimer_pending(timer))
                 return 0;
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
index 71a6d4e7809f..6e3b58bd8795 100644
--- a/arch/sh/drivers/dma/dma-sysfs.c
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -13,6 +13,7 @@
 #include <linux/init.h>
 #include <linux/sysdev.h>
 #include <linux/module.h>
+#include <linux/string.h>
 #include <asm/dma.h>
 
 static struct sysdev_class dma_sysclass = {
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index e0b384bef55f..47abf6e49dfb 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/cpumask.h>
 #include <linux/smp.h>
+#include <linux/sched.h>        /* set_cpus_allowed() */
 
 #include <asm/processor.h>
 #include <asm/watchdog.h>
diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c
index b28919b65682..1fbe5a428e31 100644
--- a/arch/sh/kernel/ptrace.c
+++ b/arch/sh/kernel/ptrace.c
@@ -80,7 +80,7 @@ void ptrace_disable(struct task_struct *child)
         /* nothing to do.. */
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         struct user * dummy = NULL;
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 02ca69918d7c..671b876416bf 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -56,10 +56,6 @@ extern unsigned long wall_jiffies;
 #define TICK_SIZE (tick_nsec / 1000)
 DEFINE_SPINLOCK(tmu0_lock);
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 /* XXX: Can we initialize this in a routine somewhere?  Dreamcast doesn't want
  * these routines anywhere... */
 #ifdef CONFIG_SH_RTC
diff --git a/arch/sh64/kernel/ptrace.c b/arch/sh64/kernel/ptrace.c
index fd2000956dae..71f2eec00b99 100644
--- a/arch/sh64/kernel/ptrace.c
+++ b/arch/sh64/kernel/ptrace.c
@@ -121,7 +121,7 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
         return 0;
 }
 
-asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
+asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         extern void poke_real_address_q(unsigned long long addr, unsigned long long data);
diff --git a/arch/sh64/kernel/time.c b/arch/sh64/kernel/time.c
index 43e395a14f49..870fe5327e09 100644
--- a/arch/sh64/kernel/time.c
+++ b/arch/sh64/kernel/time.c
@@ -116,8 +116,6 @@
 
 extern unsigned long wall_jiffies;
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
 static unsigned long tmu_base, rtc_base;
 unsigned long cprc_base;
 
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 36a40697b8d6..25e31d5ec99b 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -497,8 +497,8 @@ static void pcic_map_pci_device(struct linux_pcic *pcic,
                                  * CheerIO makes a similar conversion.
                                  * See ebus.c for details.
                                  *
-                                 * Note that check_region()/request_region()
-                                 * work for these devices.
+                                 * Note that request_region()
+                                 * works for these devices.
                                  *
                                  * XXX Neat trick, but it's a *bad* idea
                                  * to shit into regions like that.
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 279a62627c10..24814d58f9e1 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -45,10 +45,6 @@
 
 extern unsigned long wall_jiffies;
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 DEFINE_SPINLOCK(rtc_lock);
 enum sparc_clock_type sp_clock_typ;
 DEFINE_SPINLOCK(mostek_lock);
diff --git a/arch/sparc64/kernel/ioctl32.c b/arch/sparc64/kernel/ioctl32.c
index 43fc3173d480..e6a00325075a 100644
--- a/arch/sparc64/kernel/ioctl32.c
+++ b/arch/sparc64/kernel/ioctl32.c
@@ -475,9 +475,6 @@ IOCTL_TABLE_START
 #include <linux/compat_ioctl.h>
 #define DECLARES
 #include "compat_ioctl.c"
-COMPATIBLE_IOCTL(TIOCSTART)
-COMPATIBLE_IOCTL(TIOCSTOP)
-COMPATIBLE_IOCTL(TIOCSLTC)
 COMPATIBLE_IOCTL(FBIOGTYPE)
 COMPATIBLE_IOCTL(FBIOSATTR)
 COMPATIBLE_IOCTL(FBIOGATTR)
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index 3f08a32f51a1..38c5525087a2 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -55,10 +55,6 @@ unsigned long ds1287_regs = 0UL;
 
 extern unsigned long wall_jiffies;
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 static void __iomem *mstk48t08_regs;
 static void __iomem *mstk48t59_regs;
 
diff --git a/arch/um/Kconfig b/arch/um/Kconfig
index 684e1f8b2755..cd06ed7d842d 100644
--- a/arch/um/Kconfig
+++ b/arch/um/Kconfig
@@ -27,10 +27,6 @@ config UID16
         bool
         default y
 
-config RWSEM_GENERIC_SPINLOCK
-        bool
-        default y
-
 config GENERIC_CALIBRATE_DELAY
         bool
         default y
@@ -40,6 +36,12 @@ config IRQ_RELEASE_METHOD
         bool
         default y
 
+menu "Host processor type and features"
+
+source "arch/i386/Kconfig.cpu"
+
+endmenu
+
 menu "UML-specific options"
 
 config MODE_TT
diff --git a/arch/um/Kconfig.x86_64 b/arch/um/Kconfig.x86_64
index bd35e59419c8..aae19bc4b06a 100644
--- a/arch/um/Kconfig.x86_64
+++ b/arch/um/Kconfig.x86_64
@@ -6,6 +6,11 @@ config 64BIT
         bool
         default y
 
+#XXX: this is so in the underlying arch, but it's wrong!!!
+config RWSEM_GENERIC_SPINLOCK
+        bool
+        default y
+
 config SEMAPHORE_SLEEPERS
         bool
         default y
diff --git a/arch/um/Makefile-i386 b/arch/um/Makefile-i386
index 2ee8a2858117..aef7c50f8e13 100644
--- a/arch/um/Makefile-i386
+++ b/arch/um/Makefile-i386
@@ -29,6 +29,12 @@ endif
 
 CFLAGS += -U__$(SUBARCH)__ -U$(SUBARCH)
 
-ifneq ($(CONFIG_GPROF),y)
-ARCH_CFLAGS += -DUM_FASTCALL
-endif
+# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y.
+include $(srctree)/arch/i386/Makefile.cpu
+
+# prevent gcc from keeping the stack 16 byte aligned. Taken from i386.
+cflags-y += $(call cc-option,-mpreferred-stack-boundary=2)
+
+CFLAGS += $(cflags-y)
+USER_CFLAGS += $(cflags-y)
+
diff --git a/arch/um/include/sysdep-i386/syscalls.h b/arch/um/include/sysdep-i386/syscalls.h
index a0d5b74d3731..57bd79efbee3 100644
--- a/arch/um/include/sysdep-i386/syscalls.h
+++ b/arch/um/include/sysdep-i386/syscalls.h
@@ -11,7 +11,6 @@ typedef long syscall_handler_t(struct pt_regs);
 /* Not declared on x86, incompatible declarations on x86_64, so these have
  * to go here rather than in sys_call_table.c
  */
-extern syscall_handler_t sys_ptrace;
 extern syscall_handler_t sys_rt_sigaction;
 
 extern syscall_handler_t old_mmap_i386;
diff --git a/arch/um/kernel/time_kern.c b/arch/um/kernel/time_kern.c
index 4e08f7545d63..020ca79b8d33 100644
--- a/arch/um/kernel/time_kern.c
+++ b/arch/um/kernel/time_kern.c
@@ -22,10 +22,6 @@
 #include "mode.h"
 #include "os.h"
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 int hz(void)
 {
         return(HZ);
diff --git a/arch/v850/kernel/ptrace.c b/arch/v850/kernel/ptrace.c
index 4726b87f5e5a..d6077ff47d22 100644
--- a/arch/v850/kernel/ptrace.c
+++ b/arch/v850/kernel/ptrace.c
@@ -113,7 +113,7 @@ static int set_single_step (struct task_struct *t, int val)
         return 1;
 }
 
-int sys_ptrace(long request, long pid, long addr, long data)
+long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int rval;
diff --git a/arch/v850/kernel/time.c b/arch/v850/kernel/time.c
index ea3fd8844ff0..c1e85c2aef65 100644
--- a/arch/v850/kernel/time.c
+++ b/arch/v850/kernel/time.c
@@ -26,10 +26,6 @@
 
 #include "mach.h"
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 #define TICK_SIZE       (tick_nsec / 1000)
 
 /*
diff --git a/arch/x86_64/ia32/ia32_ioctl.c b/arch/x86_64/ia32/ia32_ioctl.c
index 419758f19ca4..4ba0e293d5e5 100644
--- a/arch/x86_64/ia32/ia32_ioctl.c
+++ b/arch/x86_64/ia32/ia32_ioctl.c
@@ -12,40 +12,11 @@
 #define INCLUDES
 #include <linux/syscalls.h>
 #include "compat_ioctl.c"
-#include <asm/mtrr.h>
 #include <asm/ia32.h>
 
 #define CODE
 #include "compat_ioctl.c"
   
-#ifndef TIOCGDEV
-#define TIOCGDEV       _IOR('T',0x32, unsigned int)
-#endif
-static int tiocgdev(unsigned fd, unsigned cmd,  unsigned int __user *ptr) 
-{ 
-
-        struct file *file;
-        struct tty_struct *real_tty;
-        int fput_needed, ret;
-
-        file = fget_light(fd, &fput_needed);
-        if (!file)
-                return -EBADF;
-
-        ret = -EINVAL;
-        if (file->f_op->ioctl != tty_ioctl)
-                goto out;
-        real_tty = (struct tty_struct *)file->private_data;
-        if (!real_tty)  
-                goto out;
-
-        ret = put_user(new_encode_dev(tty_devnum(real_tty)), ptr); 
-
-out:
-        fput_light(file, fput_needed);
-        return ret;
-} 
-
 #define RTC_IRQP_READ32 _IOR('p', 0x0b, unsigned int)    /* Read IRQ rate   */
 #define RTC_IRQP_SET32  _IOW('p', 0x0c, unsigned int)    /* Set IRQ rate    */
 #define RTC_EPOCH_READ32        _IOR('p', 0x0d, unsigned)        /* Read epoch      */
@@ -85,90 +56,6 @@ static int rtc32_ioctl(unsigned fd, unsigned cmd, unsigned long arg)
         return sys_ioctl(fd,cmd,arg); 
 } 
 
-/* /proc/mtrr ioctls */
-
-
-struct mtrr_sentry32
-{
-    compat_ulong_t base;    /*  Base address     */
-    compat_uint_t size;    /*  Size of region   */
-    compat_uint_t type;     /*  Type of region   */
-};
-
-struct mtrr_gentry32
-{
-    compat_ulong_t regnum;   /*  Register number  */
-    compat_uint_t base;    /*  Base address     */
-    compat_uint_t size;    /*  Size of region   */
-    compat_uint_t type;     /*  Type of region   */
-};
-
-#define MTRR_IOCTL_BASE 'M'
-
-#define MTRRIOC32_ADD_ENTRY        _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry32)
-#define MTRRIOC32_SET_ENTRY        _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry32)
-#define MTRRIOC32_DEL_ENTRY        _IOW(MTRR_IOCTL_BASE,  2, struct mtrr_sentry32)
-#define MTRRIOC32_GET_ENTRY        _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
-#define MTRRIOC32_KILL_ENTRY       _IOW(MTRR_IOCTL_BASE,  4, struct mtrr_sentry32)
-#define MTRRIOC32_ADD_PAGE_ENTRY   _IOW(MTRR_IOCTL_BASE,  5, struct mtrr_sentry32)
-#define MTRRIOC32_SET_PAGE_ENTRY   _IOW(MTRR_IOCTL_BASE,  6, struct mtrr_sentry32)
-#define MTRRIOC32_DEL_PAGE_ENTRY   _IOW(MTRR_IOCTL_BASE,  7, struct mtrr_sentry32)
-#define MTRRIOC32_GET_PAGE_ENTRY   _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
-#define MTRRIOC32_KILL_PAGE_ENTRY  _IOW(MTRR_IOCTL_BASE,  9, struct mtrr_sentry32)
-
-
-static int mtrr_ioctl32(unsigned int fd, unsigned int cmd, unsigned long arg)
-{ 
-        struct mtrr_gentry g;
-        struct mtrr_sentry s;
-        int get = 0, err = 0; 
-        struct mtrr_gentry32 __user *g32 = (struct mtrr_gentry32 __user *)arg; 
-        mm_segment_t oldfs = get_fs(); 
-
-        switch (cmd) { 
-#define SET(x) case MTRRIOC32_ ## x ## _ENTRY: cmd = MTRRIOC_ ## x ## _ENTRY; break 
-#define GET(x) case MTRRIOC32_ ## x ## _ENTRY: cmd = MTRRIOC_ ## x ## _ENTRY; get=1; break
-                SET(ADD);
-                SET(SET); 
-                SET(DEL);
-                GET(GET); 
-                SET(KILL);
-                SET(ADD_PAGE); 
-                SET(SET_PAGE); 
-                SET(DEL_PAGE); 
-                GET(GET_PAGE); 
-                SET(KILL_PAGE); 
-        } 
-        
-        if (get) { 
-                err = get_user(g.regnum, &g32->regnum);
-                err |= get_user(g.base, &g32->base);
-                err |= get_user(g.size, &g32->size);
-                err |= get_user(g.type, &g32->type); 
-
-                arg = (unsigned long)&g; 
-        } else { 
-                struct mtrr_sentry32 __user *s32 = (struct mtrr_sentry32 __user *)arg;
-                err = get_user(s.base, &s32->base);
-                err |= get_user(s.size, &s32->size);
-                err |= get_user(s.type, &s32->type);
-
-                arg = (unsigned long)&s; 
-        } 
-        if (err) return err;
-        
-        set_fs(KERNEL_DS); 
-        err = sys_ioctl(fd, cmd, arg); 
-        set_fs(oldfs); 
-                
-        if (!err && get) { 
-                err = put_user(g.base, &g32->base);
-                err |= put_user(g.size, &g32->size);
-                err |= put_user(g.regnum, &g32->regnum);
-                err |= put_user(g.type, &g32->type); 
-        } 
-        return err;
-} 
 
 #define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl_trans_handler_t)(handler) }, 
 #define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL(cmd,sys_ioctl)
@@ -185,7 +72,6 @@ COMPATIBLE_IOCTL(0x4B51)   /* KDSHWCLK - not in the kernel, but don't complain *
 COMPATIBLE_IOCTL(FIOQSIZE)
 
 /* And these ioctls need translation */
-HANDLE_IOCTL(TIOCGDEV, tiocgdev)
 /* realtime device */
 HANDLE_IOCTL(RTC_IRQP_READ,  rtc32_ioctl)
 HANDLE_IOCTL(RTC_IRQP_READ32,rtc32_ioctl)
@@ -193,17 +79,6 @@ HANDLE_IOCTL(RTC_IRQP_SET32, rtc32_ioctl)
 HANDLE_IOCTL(RTC_EPOCH_READ32, rtc32_ioctl)
 HANDLE_IOCTL(RTC_EPOCH_SET32, rtc32_ioctl)
 /* take care of sizeof(sizeof()) breakage */
-/* mtrr */
-HANDLE_IOCTL(MTRRIOC32_ADD_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_SET_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_DEL_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_GET_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_KILL_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_ADD_PAGE_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_SET_PAGE_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_DEL_PAGE_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_GET_PAGE_ENTRY, mtrr_ioctl32)
-HANDLE_IOCTL(MTRRIOC32_KILL_PAGE_ENTRY, mtrr_ioctl32)
 }; 
 
 int ioctl_table_size = ARRAY_SIZE(ioctl_start);
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index b2a238b5a17e..c6c9791d77c1 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -494,7 +494,7 @@ void invalidate_interrupt7(void);
 void thermal_interrupt(void);
 void i8254_timer_resume(void);
 
-static void setup_timer(void)
+static void setup_timer_hardware(void)
 {
         outb_p(0x34,0x43);              /* binary, mode 2, LSB/MSB, ch 0 */
         udelay(10);
@@ -505,13 +505,13 @@ static void setup_timer(void)
 
 static int timer_resume(struct sys_device *dev)
 {
-        setup_timer();
+        setup_timer_hardware();
         return 0;
 }
 
 void i8254_timer_resume(void)
 {
-        setup_timer();
+        setup_timer_hardware();
 }
 
 static struct sysdev_class timer_sysclass = {
@@ -594,7 +594,7 @@ void __init init_IRQ(void)
          * Set the clock to HZ Hz, we already have a valid
          * vector now:
          */
-        setup_timer();
+        setup_timer_hardware();
 
         if (!acpi_ioapic)
                 setup_irq(2, &irq2);
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index cb28df14ff6f..da0bc3e7bdf5 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -1213,7 +1213,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 
                 /* Intel-defined (#2) */
-                "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+                "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
diff --git a/arch/x86_64/kernel/suspend.c b/arch/x86_64/kernel/suspend.c
index f066c6ab3618..fd2bef780882 100644
--- a/arch/x86_64/kernel/suspend.c
+++ b/arch/x86_64/kernel/suspend.c
@@ -63,13 +63,12 @@ void save_processor_state(void)
         __save_processor_state(&saved_context);
 }
 
-static void
-do_fpu_end(void)
+static void do_fpu_end(void)
 {
-        /* restore FPU regs if necessary */
-        /* Do it out of line so that gcc does not move cr0 load to some stupid place */
-        kernel_fpu_end();
-        mxcsr_feature_mask_init();
+        /*
+         * Restore FPU regs if necessary
+         */
+        kernel_fpu_end();
 }
 
 void __restore_processor_state(struct saved_context *ctxt)
@@ -148,57 +147,7 @@ extern int restore_image(void);
 
 pgd_t *temp_level4_pgt;
 
-static void **pages;
-
-static inline void *__add_page(void)
-{
-        void **c;
-
-        c = (void **)get_usable_page(GFP_ATOMIC);
-        if (c) {
-                *c = pages;
-                pages = c;
-        }
-        return c;
-}
-
-static inline void *__next_page(void)
-{
-        void **c;
-
-        c = pages;
-        if (c) {
-                pages = *c;
-                *c = NULL;
-        }
-        return c;
-}
-
-/*
- * Try to allocate as many usable pages as needed and daisy chain them.
- * If one allocation fails, free the pages allocated so far
- */
-static int alloc_usable_pages(unsigned long n)
-{
-        void *p;
-
-        pages = NULL;
-        do
-                if (!__add_page())
-                        break;
-        while (--n);
-        if (n) {
-                p = __next_page();
-                while (p) {
-                        free_page((unsigned long)p);
-                        p = __next_page();
-                }
-                return -ENOMEM;
-        }
-        return 0;
-}
-
-static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
+static int res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
 {
         long i, j;
 
@@ -212,7 +161,9 @@ static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long e
                 if (paddr >= end)
                         break;
 
-                pmd = (pmd_t *)__next_page();
+                pmd = (pmd_t *)get_safe_page(GFP_ATOMIC);
+                if (!pmd)
+                        return -ENOMEM;
                 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
                 for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) {
                         unsigned long pe;
@@ -224,13 +175,17 @@ static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long e
                         set_pmd(pmd, __pmd(pe));
                 }
         }
+        return 0;
 }
 
-static void set_up_temporary_mappings(void)
+static int set_up_temporary_mappings(void)
 {
         unsigned long start, end, next;
+        int error;
 
-        temp_level4_pgt = (pgd_t *)__next_page();
+        temp_level4_pgt = (pgd_t *)get_safe_page(GFP_ATOMIC);
+        if (!temp_level4_pgt)
+                return -ENOMEM;
 
         /* It is safe to reuse the original kernel mapping */
         set_pgd(temp_level4_pgt + pgd_index(__START_KERNEL_map),
@@ -241,29 +196,27 @@ static void set_up_temporary_mappings(void)
         end = (unsigned long)pfn_to_kaddr(end_pfn);
 
         for (; start < end; start = next) {
-                pud_t *pud = (pud_t *)__next_page();
+                pud_t *pud = (pud_t *)get_safe_page(GFP_ATOMIC);
+                if (!pud)
+                        return -ENOMEM;
                 next = start + PGDIR_SIZE;
                 if (next > end)
                         next = end;
-                res_phys_pud_init(pud, __pa(start), __pa(next));
+                if ((error = res_phys_pud_init(pud, __pa(start), __pa(next))))
+                        return error;
                 set_pgd(temp_level4_pgt + pgd_index(start),
                         mk_kernel_pgd(__pa(pud)));
         }
+        return 0;
 }
 
 int swsusp_arch_resume(void)
 {
-        unsigned long n;
+        int error;
 
-        n = ((end_pfn << PAGE_SHIFT) + PUD_SIZE - 1) >> PUD_SHIFT;
-        n += (n + PTRS_PER_PUD - 1) / PTRS_PER_PUD + 1;
-        pr_debug("swsusp_arch_resume(): pages needed = %lu\n", n);
-        if (alloc_usable_pages(n)) {
-                free_eaten_memory();
-                return -ENOMEM;
-        }
         /* We have got enough memory and from now on we cannot recover */
-        set_up_temporary_mappings();
+        if ((error = set_up_temporary_mappings()))
+                return error;
         restore_image();
         return 0;
 }
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 703acde2a1a5..fdaddc4e5284 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -42,10 +42,6 @@
 #include <asm/apic.h>
 #endif
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-
-EXPORT_SYMBOL(jiffies_64);
-
 #ifdef CONFIG_CPU_FREQ
 static void cpufreq_delayed_get(void);
 #endif
@@ -481,9 +477,9 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 static unsigned int cyc2ns_scale;
 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
 
-static inline void set_cyc2ns_scale(unsigned long cpu_mhz)
+static inline void set_cyc2ns_scale(unsigned long cpu_khz)
 {
-        cyc2ns_scale = (1000 << CYC2NS_SCALE_FACTOR)/cpu_mhz;
+        cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
 }
 
 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
@@ -655,7 +651,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
                         vxtime.tsc_quot = (1000L << 32) / cpu_khz;
         }
         
-        set_cyc2ns_scale(cpu_khz_ref / 1000);
+        set_cyc2ns_scale(cpu_khz_ref);
 
         return 0;
 }
@@ -939,7 +935,7 @@ void __init time_init(void)
         rdtscll_sync(&vxtime.last_tsc);
         setup_irq(0, &irq0);
 
-        set_cyc2ns_scale(cpu_khz / 1000);
+        set_cyc2ns_scale(cpu_khz);
 
 #ifndef CONFIG_SMP
         time_init_gtod();
@@ -1093,6 +1089,7 @@ static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
 static unsigned long PIE_count;
 
 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
+static unsigned int hpet_t1_cmp; /* cached comparator register */
 
 int is_hpet_enabled(void)
 {
@@ -1129,10 +1126,12 @@ int hpet_rtc_timer_init(void)
         cnt = hpet_readl(HPET_COUNTER);
         cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
         hpet_writel(cnt, HPET_T1_CMP);
+        hpet_t1_cmp = cnt;
         local_irq_restore(flags);
 
         cfg = hpet_readl(HPET_T1_CFG);
-        cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
+        cfg &= ~HPET_TN_PERIODIC;
+        cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
         hpet_writel(cfg, HPET_T1_CFG);
 
         return 1;
@@ -1142,8 +1141,12 @@ static void hpet_rtc_timer_reinit(void)
 {
         unsigned int cfg, cnt;
 
-        if (!(PIE_on | AIE_on | UIE_on))
+        if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
+                cfg = hpet_readl(HPET_T1_CFG);
+                cfg &= ~HPET_TN_ENABLE;
+                hpet_writel(cfg, HPET_T1_CFG);
                 return;
+        }
 
         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
                 hpet_rtc_int_freq = PIE_freq;
@@ -1151,15 +1154,10 @@ static void hpet_rtc_timer_reinit(void)
                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 
         /* It is more accurate to use the comparator value than current count.*/
-        cnt = hpet_readl(HPET_T1_CMP);
+        cnt = hpet_t1_cmp;
         cnt += hpet_tick*HZ/hpet_rtc_int_freq;
         hpet_writel(cnt, HPET_T1_CMP);
-
-        cfg = hpet_readl(HPET_T1_CFG);
-        cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
-        hpet_writel(cfg, HPET_T1_CFG);
-
-        return;
+        hpet_t1_cmp = cnt;
 }
 
 /*
diff --git a/arch/xtensa/kernel/platform.c b/arch/xtensa/kernel/platform.c
index 03674daabc66..a17930747f20 100644
--- a/arch/xtensa/kernel/platform.c
+++ b/arch/xtensa/kernel/platform.c
@@ -18,6 +18,7 @@
 #include <linux/time.h>
 #include <asm/platform.h>
 #include <asm/timex.h>
+#include <asm/param.h>          /* HZ */
 
 #define _F(r,f,a,b)                                                     \
         r __platform_##f a b;                                           \
diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c
index 2659efdd4e99..14460743de07 100644
--- a/arch/xtensa/kernel/ptrace.c
+++ b/arch/xtensa/kernel/ptrace.c
@@ -45,7 +45,7 @@ void ptrace_disable(struct task_struct *child)
         /* Nothing to do.. */
 }
 
-int sys_ptrace(long request, long pid, long addr, long data)
+long sys_ptrace(long request, long pid, long addr, long data)
 {
         struct task_struct *child;
         int ret = -EPERM;
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 8e423d1335ce..cb6e38ed2b1d 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -29,9 +29,6 @@
 
 extern volatile unsigned long wall_jiffies;
 
-u64 jiffies_64 = INITIAL_JIFFIES;
-EXPORT_SYMBOL(jiffies_64);
-
 spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
 EXPORT_SYMBOL(rtc_lock);