diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-12 16:17:27 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-12 16:17:27 -0400 |
commit | 947ec0b0c1e7e80eef4fe64f7763a06d0cf04d2e (patch) | |
tree | 29547b6975d58c3b252f08dc6c2dbda3b9adfa88 /arch | |
parent | c53567ad4528b6efefc3fc22a354d20f6226a098 (diff) | |
parent | 5818a6e2519b34cd6d0220d89f5729ab2725e1bf (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6:
PM: Add empty suspend/resume device irq functions
PM/Hibernate: Move NVS routines into a seperate file (v2).
PM/Hibernate: Rename disk.c to hibernate.c
PM: Separate suspend to RAM functionality from core
Driver Core: Rework platform suspend/resume, print warning
PM: Remove device_type suspend()/resume()
PM/Hibernate: Move memory shrinking to snapshot.c (rev. 2)
PM/Suspend: Do not shrink memory before suspend
PM: Remove bus_type suspend_late()/resume_early() V2
PM core: rename suspend and resume functions
PM: Rename device_power_down/up()
PM: Remove unused asm/suspend.h
x86: unify power/cpu_(32|64).c
x86: unify power/cpu_(32|64) copyright notes
x86: unify power/cpu_(32|64) regarding restoring processor state
x86: unify power/cpu_(32|64) regarding saving processor state
x86: unify power/cpu_(32|64) global variables
x86: unify power/cpu_(32|64) headers
PM: Warn if interrupts are enabled during suspend-resume of sysdevs
PM/ACPI/x86: Fix sparse warning in arch/x86/kernel/acpi/sleep.c
Diffstat (limited to 'arch')
-rw-r--r-- | arch/alpha/include/asm/suspend.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/suspend.h | 4 | ||||
-rw-r--r-- | arch/ia64/include/asm/suspend.h | 1 | ||||
-rw-r--r-- | arch/m68k/include/asm/suspend.h | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/suspend.h | 6 | ||||
-rw-r--r-- | arch/s390/include/asm/suspend.h | 5 | ||||
-rw-r--r-- | arch/um/include/asm/suspend.h | 4 | ||||
-rw-r--r-- | arch/x86/kernel/acpi/sleep.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/apm_32.c | 14 | ||||
-rw-r--r-- | arch/x86/power/Makefile | 2 | ||||
-rw-r--r-- | arch/x86/power/cpu.c (renamed from arch/x86/power/cpu_64.c) | 165 | ||||
-rw-r--r-- | arch/x86/power/cpu_32.c | 148 |
12 files changed, 134 insertions, 229 deletions
diff --git a/arch/alpha/include/asm/suspend.h b/arch/alpha/include/asm/suspend.h deleted file mode 100644 index c7042d575851..000000000000 --- a/arch/alpha/include/asm/suspend.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ALPHA_SUSPEND_H | ||
2 | #define __ALPHA_SUSPEND_H | ||
3 | |||
4 | /* Dummy include. */ | ||
5 | |||
6 | #endif /* __ALPHA_SUSPEND_H */ | ||
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h deleted file mode 100644 index cf0d0bdee74d..000000000000 --- a/arch/arm/include/asm/suspend.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _ASMARM_SUSPEND_H | ||
2 | #define _ASMARM_SUSPEND_H | ||
3 | |||
4 | #endif | ||
diff --git a/arch/ia64/include/asm/suspend.h b/arch/ia64/include/asm/suspend.h deleted file mode 100644 index b05bbb6074e2..000000000000 --- a/arch/ia64/include/asm/suspend.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* dummy (must be non-empty to prevent prejudicial removal...) */ | ||
diff --git a/arch/m68k/include/asm/suspend.h b/arch/m68k/include/asm/suspend.h deleted file mode 100644 index 57b3ddb4d269..000000000000 --- a/arch/m68k/include/asm/suspend.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _M68K_SUSPEND_H | ||
2 | #define _M68K_SUSPEND_H | ||
3 | |||
4 | /* Dummy include. */ | ||
5 | |||
6 | #endif /* _M68K_SUSPEND_H */ | ||
diff --git a/arch/mips/include/asm/suspend.h b/arch/mips/include/asm/suspend.h deleted file mode 100644 index 2562f8f9be0e..000000000000 --- a/arch/mips/include/asm/suspend.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SUSPEND_H | ||
2 | #define __ASM_SUSPEND_H | ||
3 | |||
4 | /* Somewhen... Maybe :-) */ | ||
5 | |||
6 | #endif /* __ASM_SUSPEND_H */ | ||
diff --git a/arch/s390/include/asm/suspend.h b/arch/s390/include/asm/suspend.h deleted file mode 100644 index 1f34580e67a7..000000000000 --- a/arch/s390/include/asm/suspend.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | #ifndef __ASM_S390_SUSPEND_H | ||
2 | #define __ASM_S390_SUSPEND_H | ||
3 | |||
4 | #endif | ||
5 | |||
diff --git a/arch/um/include/asm/suspend.h b/arch/um/include/asm/suspend.h deleted file mode 100644 index f4e8e007f468..000000000000 --- a/arch/um/include/asm/suspend.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef __UM_SUSPEND_H | ||
2 | #define __UM_SUSPEND_H | ||
3 | |||
4 | #endif | ||
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index 7c243a2c5115..ca93638ba430 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c | |||
@@ -104,7 +104,7 @@ int acpi_save_state_mem(void) | |||
104 | initial_gs = per_cpu_offset(smp_processor_id()); | 104 | initial_gs = per_cpu_offset(smp_processor_id()); |
105 | #endif | 105 | #endif |
106 | initial_code = (unsigned long)wakeup_long64; | 106 | initial_code = (unsigned long)wakeup_long64; |
107 | saved_magic = 0x123456789abcdef0; | 107 | saved_magic = 0x123456789abcdef0L; |
108 | #endif /* CONFIG_64BIT */ | 108 | #endif /* CONFIG_64BIT */ |
109 | 109 | ||
110 | return 0; | 110 | return 0; |
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index 49e0939bac42..79302e9a33a4 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c | |||
@@ -1233,9 +1233,9 @@ static int suspend(int vetoable) | |||
1233 | int err; | 1233 | int err; |
1234 | struct apm_user *as; | 1234 | struct apm_user *as; |
1235 | 1235 | ||
1236 | device_suspend(PMSG_SUSPEND); | 1236 | dpm_suspend_start(PMSG_SUSPEND); |
1237 | 1237 | ||
1238 | device_power_down(PMSG_SUSPEND); | 1238 | dpm_suspend_noirq(PMSG_SUSPEND); |
1239 | 1239 | ||
1240 | local_irq_disable(); | 1240 | local_irq_disable(); |
1241 | sysdev_suspend(PMSG_SUSPEND); | 1241 | sysdev_suspend(PMSG_SUSPEND); |
@@ -1259,9 +1259,9 @@ static int suspend(int vetoable) | |||
1259 | sysdev_resume(); | 1259 | sysdev_resume(); |
1260 | local_irq_enable(); | 1260 | local_irq_enable(); |
1261 | 1261 | ||
1262 | device_power_up(PMSG_RESUME); | 1262 | dpm_resume_noirq(PMSG_RESUME); |
1263 | 1263 | ||
1264 | device_resume(PMSG_RESUME); | 1264 | dpm_resume_end(PMSG_RESUME); |
1265 | queue_event(APM_NORMAL_RESUME, NULL); | 1265 | queue_event(APM_NORMAL_RESUME, NULL); |
1266 | spin_lock(&user_list_lock); | 1266 | spin_lock(&user_list_lock); |
1267 | for (as = user_list; as != NULL; as = as->next) { | 1267 | for (as = user_list; as != NULL; as = as->next) { |
@@ -1277,7 +1277,7 @@ static void standby(void) | |||
1277 | { | 1277 | { |
1278 | int err; | 1278 | int err; |
1279 | 1279 | ||
1280 | device_power_down(PMSG_SUSPEND); | 1280 | dpm_suspend_noirq(PMSG_SUSPEND); |
1281 | 1281 | ||
1282 | local_irq_disable(); | 1282 | local_irq_disable(); |
1283 | sysdev_suspend(PMSG_SUSPEND); | 1283 | sysdev_suspend(PMSG_SUSPEND); |
@@ -1291,7 +1291,7 @@ static void standby(void) | |||
1291 | sysdev_resume(); | 1291 | sysdev_resume(); |
1292 | local_irq_enable(); | 1292 | local_irq_enable(); |
1293 | 1293 | ||
1294 | device_power_up(PMSG_RESUME); | 1294 | dpm_resume_noirq(PMSG_RESUME); |
1295 | } | 1295 | } |
1296 | 1296 | ||
1297 | static apm_event_t get_event(void) | 1297 | static apm_event_t get_event(void) |
@@ -1376,7 +1376,7 @@ static void check_events(void) | |||
1376 | ignore_bounce = 1; | 1376 | ignore_bounce = 1; |
1377 | if ((event != APM_NORMAL_RESUME) | 1377 | if ((event != APM_NORMAL_RESUME) |
1378 | || (ignore_normal_resume == 0)) { | 1378 | || (ignore_normal_resume == 0)) { |
1379 | device_resume(PMSG_RESUME); | 1379 | dpm_resume_end(PMSG_RESUME); |
1380 | queue_event(event, NULL); | 1380 | queue_event(event, NULL); |
1381 | } | 1381 | } |
1382 | ignore_normal_resume = 0; | 1382 | ignore_normal_resume = 0; |
diff --git a/arch/x86/power/Makefile b/arch/x86/power/Makefile index 58b32db33125..de2abbd07544 100644 --- a/arch/x86/power/Makefile +++ b/arch/x86/power/Makefile | |||
@@ -3,5 +3,5 @@ | |||
3 | nostackp := $(call cc-option, -fno-stack-protector) | 3 | nostackp := $(call cc-option, -fno-stack-protector) |
4 | CFLAGS_cpu_$(BITS).o := $(nostackp) | 4 | CFLAGS_cpu_$(BITS).o := $(nostackp) |
5 | 5 | ||
6 | obj-$(CONFIG_PM_SLEEP) += cpu_$(BITS).o | 6 | obj-$(CONFIG_PM_SLEEP) += cpu.o |
7 | obj-$(CONFIG_HIBERNATION) += hibernate_$(BITS).o hibernate_asm_$(BITS).o | 7 | obj-$(CONFIG_HIBERNATION) += hibernate_$(BITS).o hibernate_asm_$(BITS).o |
diff --git a/arch/x86/power/cpu_64.c b/arch/x86/power/cpu.c index 5343540f2607..d277ef1eea51 100644 --- a/arch/x86/power/cpu_64.c +++ b/arch/x86/power/cpu.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Suspend and hibernation support for x86-64 | 2 | * Suspend support specific for i386/x86-64. |
3 | * | 3 | * |
4 | * Distribute under GPLv2 | 4 | * Distribute under GPLv2 |
5 | * | 5 | * |
@@ -8,18 +8,28 @@ | |||
8 | * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> | 8 | * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/smp.h> | ||
12 | #include <linux/suspend.h> | 11 | #include <linux/suspend.h> |
13 | #include <asm/proto.h> | 12 | #include <linux/smp.h> |
14 | #include <asm/page.h> | 13 | |
15 | #include <asm/pgtable.h> | 14 | #include <asm/pgtable.h> |
15 | #include <asm/proto.h> | ||
16 | #include <asm/mtrr.h> | 16 | #include <asm/mtrr.h> |
17 | #include <asm/page.h> | ||
18 | #include <asm/mce.h> | ||
17 | #include <asm/xcr.h> | 19 | #include <asm/xcr.h> |
18 | #include <asm/suspend.h> | 20 | #include <asm/suspend.h> |
19 | 21 | ||
20 | static void fix_processor_context(void); | 22 | #ifdef CONFIG_X86_32 |
23 | static struct saved_context saved_context; | ||
21 | 24 | ||
25 | unsigned long saved_context_ebx; | ||
26 | unsigned long saved_context_esp, saved_context_ebp; | ||
27 | unsigned long saved_context_esi, saved_context_edi; | ||
28 | unsigned long saved_context_eflags; | ||
29 | #else | ||
30 | /* CONFIG_X86_64 */ | ||
22 | struct saved_context saved_context; | 31 | struct saved_context saved_context; |
32 | #endif | ||
23 | 33 | ||
24 | /** | 34 | /** |
25 | * __save_processor_state - save CPU registers before creating a | 35 | * __save_processor_state - save CPU registers before creating a |
@@ -38,19 +48,35 @@ struct saved_context saved_context; | |||
38 | */ | 48 | */ |
39 | static void __save_processor_state(struct saved_context *ctxt) | 49 | static void __save_processor_state(struct saved_context *ctxt) |
40 | { | 50 | { |
51 | #ifdef CONFIG_X86_32 | ||
52 | mtrr_save_fixed_ranges(NULL); | ||
53 | #endif | ||
41 | kernel_fpu_begin(); | 54 | kernel_fpu_begin(); |
42 | 55 | ||
43 | /* | 56 | /* |
44 | * descriptor tables | 57 | * descriptor tables |
45 | */ | 58 | */ |
59 | #ifdef CONFIG_X86_32 | ||
60 | store_gdt(&ctxt->gdt); | ||
61 | store_idt(&ctxt->idt); | ||
62 | #else | ||
63 | /* CONFIG_X86_64 */ | ||
46 | store_gdt((struct desc_ptr *)&ctxt->gdt_limit); | 64 | store_gdt((struct desc_ptr *)&ctxt->gdt_limit); |
47 | store_idt((struct desc_ptr *)&ctxt->idt_limit); | 65 | store_idt((struct desc_ptr *)&ctxt->idt_limit); |
66 | #endif | ||
48 | store_tr(ctxt->tr); | 67 | store_tr(ctxt->tr); |
49 | 68 | ||
50 | /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */ | 69 | /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */ |
51 | /* | 70 | /* |
52 | * segment registers | 71 | * segment registers |
53 | */ | 72 | */ |
73 | #ifdef CONFIG_X86_32 | ||
74 | savesegment(es, ctxt->es); | ||
75 | savesegment(fs, ctxt->fs); | ||
76 | savesegment(gs, ctxt->gs); | ||
77 | savesegment(ss, ctxt->ss); | ||
78 | #else | ||
79 | /* CONFIG_X86_64 */ | ||
54 | asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds)); | 80 | asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds)); |
55 | asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); | 81 | asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); |
56 | asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); | 82 | asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); |
@@ -62,30 +88,87 @@ static void __save_processor_state(struct saved_context *ctxt) | |||
62 | rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); | 88 | rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); |
63 | mtrr_save_fixed_ranges(NULL); | 89 | mtrr_save_fixed_ranges(NULL); |
64 | 90 | ||
91 | rdmsrl(MSR_EFER, ctxt->efer); | ||
92 | #endif | ||
93 | |||
65 | /* | 94 | /* |
66 | * control registers | 95 | * control registers |
67 | */ | 96 | */ |
68 | rdmsrl(MSR_EFER, ctxt->efer); | ||
69 | ctxt->cr0 = read_cr0(); | 97 | ctxt->cr0 = read_cr0(); |
70 | ctxt->cr2 = read_cr2(); | 98 | ctxt->cr2 = read_cr2(); |
71 | ctxt->cr3 = read_cr3(); | 99 | ctxt->cr3 = read_cr3(); |
100 | #ifdef CONFIG_X86_32 | ||
101 | ctxt->cr4 = read_cr4_safe(); | ||
102 | #else | ||
103 | /* CONFIG_X86_64 */ | ||
72 | ctxt->cr4 = read_cr4(); | 104 | ctxt->cr4 = read_cr4(); |
73 | ctxt->cr8 = read_cr8(); | 105 | ctxt->cr8 = read_cr8(); |
106 | #endif | ||
74 | } | 107 | } |
75 | 108 | ||
109 | /* Needed by apm.c */ | ||
76 | void save_processor_state(void) | 110 | void save_processor_state(void) |
77 | { | 111 | { |
78 | __save_processor_state(&saved_context); | 112 | __save_processor_state(&saved_context); |
79 | } | 113 | } |
114 | #ifdef CONFIG_X86_32 | ||
115 | EXPORT_SYMBOL(save_processor_state); | ||
116 | #endif | ||
80 | 117 | ||
81 | static void do_fpu_end(void) | 118 | static void do_fpu_end(void) |
82 | { | 119 | { |
83 | /* | 120 | /* |
84 | * Restore FPU regs if necessary | 121 | * Restore FPU regs if necessary. |
85 | */ | 122 | */ |
86 | kernel_fpu_end(); | 123 | kernel_fpu_end(); |
87 | } | 124 | } |
88 | 125 | ||
126 | static void fix_processor_context(void) | ||
127 | { | ||
128 | int cpu = smp_processor_id(); | ||
129 | struct tss_struct *t = &per_cpu(init_tss, cpu); | ||
130 | |||
131 | set_tss_desc(cpu, t); /* | ||
132 | * This just modifies memory; should not be | ||
133 | * necessary. But... This is necessary, because | ||
134 | * 386 hardware has concept of busy TSS or some | ||
135 | * similar stupidity. | ||
136 | */ | ||
137 | |||
138 | #ifdef CONFIG_X86_64 | ||
139 | get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9; | ||
140 | |||
141 | syscall_init(); /* This sets MSR_*STAR and related */ | ||
142 | #endif | ||
143 | load_TR_desc(); /* This does ltr */ | ||
144 | load_LDT(¤t->active_mm->context); /* This does lldt */ | ||
145 | |||
146 | /* | ||
147 | * Now maybe reload the debug registers | ||
148 | */ | ||
149 | if (current->thread.debugreg7) { | ||
150 | #ifdef CONFIG_X86_32 | ||
151 | set_debugreg(current->thread.debugreg0, 0); | ||
152 | set_debugreg(current->thread.debugreg1, 1); | ||
153 | set_debugreg(current->thread.debugreg2, 2); | ||
154 | set_debugreg(current->thread.debugreg3, 3); | ||
155 | /* no 4 and 5 */ | ||
156 | set_debugreg(current->thread.debugreg6, 6); | ||
157 | set_debugreg(current->thread.debugreg7, 7); | ||
158 | #else | ||
159 | /* CONFIG_X86_64 */ | ||
160 | loaddebug(¤t->thread, 0); | ||
161 | loaddebug(¤t->thread, 1); | ||
162 | loaddebug(¤t->thread, 2); | ||
163 | loaddebug(¤t->thread, 3); | ||
164 | /* no 4 and 5 */ | ||
165 | loaddebug(¤t->thread, 6); | ||
166 | loaddebug(¤t->thread, 7); | ||
167 | #endif | ||
168 | } | ||
169 | |||
170 | } | ||
171 | |||
89 | /** | 172 | /** |
90 | * __restore_processor_state - restore the contents of CPU registers saved | 173 | * __restore_processor_state - restore the contents of CPU registers saved |
91 | * by __save_processor_state() | 174 | * by __save_processor_state() |
@@ -96,9 +179,16 @@ static void __restore_processor_state(struct saved_context *ctxt) | |||
96 | /* | 179 | /* |
97 | * control registers | 180 | * control registers |
98 | */ | 181 | */ |
182 | /* cr4 was introduced in the Pentium CPU */ | ||
183 | #ifdef CONFIG_X86_32 | ||
184 | if (ctxt->cr4) | ||
185 | write_cr4(ctxt->cr4); | ||
186 | #else | ||
187 | /* CONFIG X86_64 */ | ||
99 | wrmsrl(MSR_EFER, ctxt->efer); | 188 | wrmsrl(MSR_EFER, ctxt->efer); |
100 | write_cr8(ctxt->cr8); | 189 | write_cr8(ctxt->cr8); |
101 | write_cr4(ctxt->cr4); | 190 | write_cr4(ctxt->cr4); |
191 | #endif | ||
102 | write_cr3(ctxt->cr3); | 192 | write_cr3(ctxt->cr3); |
103 | write_cr2(ctxt->cr2); | 193 | write_cr2(ctxt->cr2); |
104 | write_cr0(ctxt->cr0); | 194 | write_cr0(ctxt->cr0); |
@@ -107,13 +197,31 @@ static void __restore_processor_state(struct saved_context *ctxt) | |||
107 | * now restore the descriptor tables to their proper values | 197 | * now restore the descriptor tables to their proper values |
108 | * ltr is done i fix_processor_context(). | 198 | * ltr is done i fix_processor_context(). |
109 | */ | 199 | */ |
200 | #ifdef CONFIG_X86_32 | ||
201 | load_gdt(&ctxt->gdt); | ||
202 | load_idt(&ctxt->idt); | ||
203 | #else | ||
204 | /* CONFIG_X86_64 */ | ||
110 | load_gdt((const struct desc_ptr *)&ctxt->gdt_limit); | 205 | load_gdt((const struct desc_ptr *)&ctxt->gdt_limit); |
111 | load_idt((const struct desc_ptr *)&ctxt->idt_limit); | 206 | load_idt((const struct desc_ptr *)&ctxt->idt_limit); |
112 | 207 | #endif | |
113 | 208 | ||
114 | /* | 209 | /* |
115 | * segment registers | 210 | * segment registers |
116 | */ | 211 | */ |
212 | #ifdef CONFIG_X86_32 | ||
213 | loadsegment(es, ctxt->es); | ||
214 | loadsegment(fs, ctxt->fs); | ||
215 | loadsegment(gs, ctxt->gs); | ||
216 | loadsegment(ss, ctxt->ss); | ||
217 | |||
218 | /* | ||
219 | * sysenter MSRs | ||
220 | */ | ||
221 | if (boot_cpu_has(X86_FEATURE_SEP)) | ||
222 | enable_sep_cpu(); | ||
223 | #else | ||
224 | /* CONFIG_X86_64 */ | ||
117 | asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds)); | 225 | asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds)); |
118 | asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); | 226 | asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); |
119 | asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); | 227 | asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); |
@@ -123,6 +231,7 @@ static void __restore_processor_state(struct saved_context *ctxt) | |||
123 | wrmsrl(MSR_FS_BASE, ctxt->fs_base); | 231 | wrmsrl(MSR_FS_BASE, ctxt->fs_base); |
124 | wrmsrl(MSR_GS_BASE, ctxt->gs_base); | 232 | wrmsrl(MSR_GS_BASE, ctxt->gs_base); |
125 | wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); | 233 | wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); |
234 | #endif | ||
126 | 235 | ||
127 | /* | 236 | /* |
128 | * restore XCR0 for xsave capable cpu's. | 237 | * restore XCR0 for xsave capable cpu's. |
@@ -134,41 +243,17 @@ static void __restore_processor_state(struct saved_context *ctxt) | |||
134 | 243 | ||
135 | do_fpu_end(); | 244 | do_fpu_end(); |
136 | mtrr_ap_init(); | 245 | mtrr_ap_init(); |
246 | |||
247 | #ifdef CONFIG_X86_32 | ||
248 | mcheck_init(&boot_cpu_data); | ||
249 | #endif | ||
137 | } | 250 | } |
138 | 251 | ||
252 | /* Needed by apm.c */ | ||
139 | void restore_processor_state(void) | 253 | void restore_processor_state(void) |
140 | { | 254 | { |
141 | __restore_processor_state(&saved_context); | 255 | __restore_processor_state(&saved_context); |
142 | } | 256 | } |
143 | 257 | #ifdef CONFIG_X86_32 | |
144 | static void fix_processor_context(void) | 258 | EXPORT_SYMBOL(restore_processor_state); |
145 | { | 259 | #endif |
146 | int cpu = smp_processor_id(); | ||
147 | struct tss_struct *t = &per_cpu(init_tss, cpu); | ||
148 | |||
149 | /* | ||
150 | * This just modifies memory; should not be necessary. But... This | ||
151 | * is necessary, because 386 hardware has concept of busy TSS or some | ||
152 | * similar stupidity. | ||
153 | */ | ||
154 | set_tss_desc(cpu, t); | ||
155 | |||
156 | get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9; | ||
157 | |||
158 | syscall_init(); /* This sets MSR_*STAR and related */ | ||
159 | load_TR_desc(); /* This does ltr */ | ||
160 | load_LDT(¤t->active_mm->context); /* This does lldt */ | ||
161 | |||
162 | /* | ||
163 | * Now maybe reload the debug registers | ||
164 | */ | ||
165 | if (current->thread.debugreg7){ | ||
166 | loaddebug(¤t->thread, 0); | ||
167 | loaddebug(¤t->thread, 1); | ||
168 | loaddebug(¤t->thread, 2); | ||
169 | loaddebug(¤t->thread, 3); | ||
170 | /* no 4 and 5 */ | ||
171 | loaddebug(¤t->thread, 6); | ||
172 | loaddebug(¤t->thread, 7); | ||
173 | } | ||
174 | } | ||
diff --git a/arch/x86/power/cpu_32.c b/arch/x86/power/cpu_32.c deleted file mode 100644 index ce702c5b3a2c..000000000000 --- a/arch/x86/power/cpu_32.c +++ /dev/null | |||
@@ -1,148 +0,0 @@ | |||
1 | /* | ||
2 | * Suspend support specific for i386. | ||
3 | * | ||
4 | * Distribute under GPLv2 | ||
5 | * | ||
6 | * Copyright (c) 2002 Pavel Machek <pavel@suse.cz> | ||
7 | * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> | ||
8 | */ | ||
9 | |||
10 | #include <linux/module.h> | ||
11 | #include <linux/suspend.h> | ||
12 | #include <asm/mtrr.h> | ||
13 | #include <asm/mce.h> | ||
14 | #include <asm/xcr.h> | ||
15 | #include <asm/suspend.h> | ||
16 | |||
17 | static struct saved_context saved_context; | ||
18 | |||
19 | unsigned long saved_context_ebx; | ||
20 | unsigned long saved_context_esp, saved_context_ebp; | ||
21 | unsigned long saved_context_esi, saved_context_edi; | ||
22 | unsigned long saved_context_eflags; | ||
23 | |||
24 | static void __save_processor_state(struct saved_context *ctxt) | ||
25 | { | ||
26 | mtrr_save_fixed_ranges(NULL); | ||
27 | kernel_fpu_begin(); | ||
28 | |||
29 | /* | ||
30 | * descriptor tables | ||
31 | */ | ||
32 | store_gdt(&ctxt->gdt); | ||
33 | store_idt(&ctxt->idt); | ||
34 | store_tr(ctxt->tr); | ||
35 | |||
36 | /* | ||
37 | * segment registers | ||
38 | */ | ||
39 | savesegment(es, ctxt->es); | ||
40 | savesegment(fs, ctxt->fs); | ||
41 | savesegment(gs, ctxt->gs); | ||
42 | savesegment(ss, ctxt->ss); | ||
43 | |||
44 | /* | ||
45 | * control registers | ||
46 | */ | ||
47 | ctxt->cr0 = read_cr0(); | ||
48 | ctxt->cr2 = read_cr2(); | ||
49 | ctxt->cr3 = read_cr3(); | ||
50 | ctxt->cr4 = read_cr4_safe(); | ||
51 | } | ||
52 | |||
53 | /* Needed by apm.c */ | ||
54 | void save_processor_state(void) | ||
55 | { | ||
56 | __save_processor_state(&saved_context); | ||
57 | } | ||
58 | EXPORT_SYMBOL(save_processor_state); | ||
59 | |||
60 | static void do_fpu_end(void) | ||
61 | { | ||
62 | /* | ||
63 | * Restore FPU regs if necessary. | ||
64 | */ | ||
65 | kernel_fpu_end(); | ||
66 | } | ||
67 | |||
68 | static void fix_processor_context(void) | ||
69 | { | ||
70 | int cpu = smp_processor_id(); | ||
71 | struct tss_struct *t = &per_cpu(init_tss, cpu); | ||
72 | |||
73 | set_tss_desc(cpu, t); /* | ||
74 | * This just modifies memory; should not be | ||
75 | * necessary. But... This is necessary, because | ||
76 | * 386 hardware has concept of busy TSS or some | ||
77 | * similar stupidity. | ||
78 | */ | ||
79 | |||
80 | load_TR_desc(); /* This does ltr */ | ||
81 | load_LDT(¤t->active_mm->context); /* This does lldt */ | ||
82 | |||
83 | /* | ||
84 | * Now maybe reload the debug registers | ||
85 | */ | ||
86 | if (current->thread.debugreg7) { | ||
87 | set_debugreg(current->thread.debugreg0, 0); | ||
88 | set_debugreg(current->thread.debugreg1, 1); | ||
89 | set_debugreg(current->thread.debugreg2, 2); | ||
90 | set_debugreg(current->thread.debugreg3, 3); | ||
91 | /* no 4 and 5 */ | ||
92 | set_debugreg(current->thread.debugreg6, 6); | ||
93 | set_debugreg(current->thread.debugreg7, 7); | ||
94 | } | ||
95 | |||
96 | } | ||
97 | |||
98 | static void __restore_processor_state(struct saved_context *ctxt) | ||
99 | { | ||
100 | /* | ||
101 | * control registers | ||
102 | */ | ||
103 | /* cr4 was introduced in the Pentium CPU */ | ||
104 | if (ctxt->cr4) | ||
105 | write_cr4(ctxt->cr4); | ||
106 | write_cr3(ctxt->cr3); | ||
107 | write_cr2(ctxt->cr2); | ||
108 | write_cr0(ctxt->cr0); | ||
109 | |||
110 | /* | ||
111 | * now restore the descriptor tables to their proper values | ||
112 | * ltr is done i fix_processor_context(). | ||
113 | */ | ||
114 | load_gdt(&ctxt->gdt); | ||
115 | load_idt(&ctxt->idt); | ||
116 | |||
117 | /* | ||
118 | * segment registers | ||
119 | */ | ||
120 | loadsegment(es, ctxt->es); | ||
121 | loadsegment(fs, ctxt->fs); | ||
122 | loadsegment(gs, ctxt->gs); | ||
123 | loadsegment(ss, ctxt->ss); | ||
124 | |||
125 | /* | ||
126 | * sysenter MSRs | ||
127 | */ | ||
128 | if (boot_cpu_has(X86_FEATURE_SEP)) | ||
129 | enable_sep_cpu(); | ||
130 | |||
131 | /* | ||
132 | * restore XCR0 for xsave capable cpu's. | ||
133 | */ | ||
134 | if (cpu_has_xsave) | ||
135 | xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask); | ||
136 | |||
137 | fix_processor_context(); | ||
138 | do_fpu_end(); | ||
139 | mtrr_ap_init(); | ||
140 | mcheck_init(&boot_cpu_data); | ||
141 | } | ||
142 | |||
143 | /* Needed by apm.c */ | ||
144 | void restore_processor_state(void) | ||
145 | { | ||
146 | __restore_processor_state(&saved_context); | ||
147 | } | ||
148 | EXPORT_SYMBOL(restore_processor_state); | ||