diff options
author | Scott Wood <scottwood@freescale.com> | 2007-09-14 15:22:36 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-10-03 21:36:35 -0400 |
commit | fb533d0c5a9783ecafa9a177bace6384c47282a9 (patch) | |
tree | 7be09cf401674b176455530ab4fec98bf9681751 /arch | |
parent | ccf0d68e835003f19d5a9463d5a8c1e092d3a31a (diff) |
[POWERPC] 8xx: Infrastructure code cleanup.
1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kernel is about to
use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files
to sysdev/commproc.h.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/8xx/m8xx_setup.c | 90 | ||||
-rw-r--r-- | arch/powerpc/platforms/8xx/mpc86xads.h | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/8xx/mpc86xads_setup.c | 10 | ||||
-rw-r--r-- | arch/powerpc/platforms/8xx/mpc885ads.h | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/8xx/mpc885ads_setup.c | 10 | ||||
-rw-r--r-- | arch/powerpc/sysdev/commproc.c | 67 | ||||
-rw-r--r-- | arch/powerpc/sysdev/commproc.h | 12 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpc8xx_pic.c | 19 |
8 files changed, 81 insertions, 133 deletions
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c index b2b98dd8be6a..d35eda80e9e6 100644 --- a/arch/powerpc/platforms/8xx/m8xx_setup.c +++ b/arch/powerpc/platforms/8xx/m8xx_setup.c | |||
@@ -10,57 +10,33 @@ | |||
10 | * bootup setup stuff.. | 10 | * bootup setup stuff.. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
16 | #include <linux/mm.h> | ||
17 | #include <linux/stddef.h> | ||
18 | #include <linux/unistd.h> | ||
19 | #include <linux/ptrace.h> | ||
20 | #include <linux/slab.h> | 14 | #include <linux/slab.h> |
21 | #include <linux/user.h> | ||
22 | #include <linux/a.out.h> | ||
23 | #include <linux/tty.h> | ||
24 | #include <linux/major.h> | ||
25 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
26 | #include <linux/reboot.h> | ||
27 | #include <linux/init.h> | 16 | #include <linux/init.h> |
28 | #include <linux/initrd.h> | ||
29 | #include <linux/ioport.h> | ||
30 | #include <linux/bootmem.h> | ||
31 | #include <linux/seq_file.h> | ||
32 | #include <linux/root_dev.h> | ||
33 | #include <linux/time.h> | 17 | #include <linux/time.h> |
34 | #include <linux/rtc.h> | 18 | #include <linux/rtc.h> |
35 | #include <linux/fsl_devices.h> | ||
36 | 19 | ||
37 | #include <asm/mmu.h> | ||
38 | #include <asm/reg.h> | ||
39 | #include <asm/io.h> | 20 | #include <asm/io.h> |
40 | #include <asm/pgtable.h> | ||
41 | #include <asm/mpc8xx.h> | 21 | #include <asm/mpc8xx.h> |
42 | #include <asm/8xx_immap.h> | 22 | #include <asm/8xx_immap.h> |
43 | #include <asm/machdep.h> | ||
44 | #include <asm/time.h> | ||
45 | #include <asm/prom.h> | 23 | #include <asm/prom.h> |
46 | #include <asm/fs_pd.h> | 24 | #include <asm/fs_pd.h> |
47 | #include <mm/mmu_decl.h> | 25 | #include <mm/mmu_decl.h> |
48 | 26 | ||
49 | #include "sysdev/mpc8xx_pic.h" | 27 | #include <sysdev/mpc8xx_pic.h> |
28 | #include <sysdev/commproc.h> | ||
50 | 29 | ||
51 | #ifdef CONFIG_PCMCIA_M8XX | 30 | #ifdef CONFIG_PCMCIA_M8XX |
52 | struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; | 31 | struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; |
53 | #endif | 32 | #endif |
54 | 33 | ||
55 | void m8xx_calibrate_decr(void); | 34 | void m8xx_calibrate_decr(void); |
56 | #ifdef CONFIG_8xx_WDT | ||
57 | extern void m8xx_wdt_handler_install(bd_t *bp); | ||
58 | #endif | ||
59 | extern int cpm_pic_init(void); | 35 | extern int cpm_pic_init(void); |
60 | extern int cpm_get_irq(void); | 36 | extern int cpm_get_irq(void); |
61 | 37 | ||
62 | /* A place holder for time base interrupts, if they are ever enabled. */ | 38 | /* A place holder for time base interrupts, if they are ever enabled. */ |
63 | irqreturn_t timebase_interrupt(int irq, void * dev) | 39 | static irqreturn_t timebase_interrupt(int irq, void *dev) |
64 | { | 40 | { |
65 | printk ("timebase_interrupt()\n"); | 41 | printk ("timebase_interrupt()\n"); |
66 | 42 | ||
@@ -77,7 +53,7 @@ static struct irqaction tbint_irqaction = { | |||
77 | void __init __attribute__ ((weak)) | 53 | void __init __attribute__ ((weak)) |
78 | init_internal_rtc(void) | 54 | init_internal_rtc(void) |
79 | { | 55 | { |
80 | sit8xx_t *sys_tmr = (sit8xx_t *) immr_map(im_sit); | 56 | sit8xx_t __iomem *sys_tmr = immr_map(im_sit); |
81 | 57 | ||
82 | /* Disable the RTC one second and alarm interrupts. */ | 58 | /* Disable the RTC one second and alarm interrupts. */ |
83 | clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); | 59 | clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); |
@@ -116,13 +92,13 @@ static int __init get_freq(char *name, unsigned long *val) | |||
116 | void __init mpc8xx_calibrate_decr(void) | 92 | void __init mpc8xx_calibrate_decr(void) |
117 | { | 93 | { |
118 | struct device_node *cpu; | 94 | struct device_node *cpu; |
119 | cark8xx_t *clk_r1; | 95 | cark8xx_t __iomem *clk_r1; |
120 | car8xx_t *clk_r2; | 96 | car8xx_t __iomem *clk_r2; |
121 | sitk8xx_t *sys_tmr1; | 97 | sitk8xx_t __iomem *sys_tmr1; |
122 | sit8xx_t *sys_tmr2; | 98 | sit8xx_t __iomem *sys_tmr2; |
123 | int irq, virq; | 99 | int irq, virq; |
124 | 100 | ||
125 | clk_r1 = (cark8xx_t *) immr_map(im_clkrstk); | 101 | clk_r1 = immr_map(im_clkrstk); |
126 | 102 | ||
127 | /* Unlock the SCCR. */ | 103 | /* Unlock the SCCR. */ |
128 | out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); | 104 | out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); |
@@ -130,7 +106,7 @@ void __init mpc8xx_calibrate_decr(void) | |||
130 | immr_unmap(clk_r1); | 106 | immr_unmap(clk_r1); |
131 | 107 | ||
132 | /* Force all 8xx processors to use divide by 16 processor clock. */ | 108 | /* Force all 8xx processors to use divide by 16 processor clock. */ |
133 | clk_r2 = (car8xx_t *) immr_map(im_clkrst); | 109 | clk_r2 = immr_map(im_clkrst); |
134 | setbits32(&clk_r2->car_sccr, 0x02000000); | 110 | setbits32(&clk_r2->car_sccr, 0x02000000); |
135 | immr_unmap(clk_r2); | 111 | immr_unmap(clk_r2); |
136 | 112 | ||
@@ -164,7 +140,7 @@ void __init mpc8xx_calibrate_decr(void) | |||
164 | * we guarantee the registers are locked, then we unlock them | 140 | * we guarantee the registers are locked, then we unlock them |
165 | * for our use. | 141 | * for our use. |
166 | */ | 142 | */ |
167 | sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk); | 143 | sys_tmr1 = immr_map(im_sitk); |
168 | out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY); | 144 | out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY); |
169 | out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY); | 145 | out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY); |
170 | out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY); | 146 | out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY); |
@@ -184,20 +160,13 @@ void __init mpc8xx_calibrate_decr(void) | |||
184 | virq= irq_of_parse_and_map(cpu, 0); | 160 | virq= irq_of_parse_and_map(cpu, 0); |
185 | irq = irq_map[virq].hwirq; | 161 | irq = irq_map[virq].hwirq; |
186 | 162 | ||
187 | sys_tmr2 = (sit8xx_t *) immr_map(im_sit); | 163 | sys_tmr2 = immr_map(im_sit); |
188 | out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | | 164 | out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | |
189 | (TBSCR_TBF | TBSCR_TBE)); | 165 | (TBSCR_TBF | TBSCR_TBE)); |
190 | immr_unmap(sys_tmr2); | 166 | immr_unmap(sys_tmr2); |
191 | 167 | ||
192 | if (setup_irq(virq, &tbint_irqaction)) | 168 | if (setup_irq(virq, &tbint_irqaction)) |
193 | panic("Could not allocate timer IRQ!"); | 169 | panic("Could not allocate timer IRQ!"); |
194 | |||
195 | #ifdef CONFIG_8xx_WDT | ||
196 | /* Install watchdog timer handler early because it might be | ||
197 | * already enabled by the bootloader | ||
198 | */ | ||
199 | m8xx_wdt_handler_install(binfo); | ||
200 | #endif | ||
201 | } | 170 | } |
202 | 171 | ||
203 | /* The RTC on the MPC8xx is an internal register. | 172 | /* The RTC on the MPC8xx is an internal register. |
@@ -207,12 +176,12 @@ void __init mpc8xx_calibrate_decr(void) | |||
207 | 176 | ||
208 | int mpc8xx_set_rtc_time(struct rtc_time *tm) | 177 | int mpc8xx_set_rtc_time(struct rtc_time *tm) |
209 | { | 178 | { |
210 | sitk8xx_t *sys_tmr1; | 179 | sitk8xx_t __iomem *sys_tmr1; |
211 | sit8xx_t *sys_tmr2; | 180 | sit8xx_t __iomem *sys_tmr2; |
212 | int time; | 181 | int time; |
213 | 182 | ||
214 | sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk); | 183 | sys_tmr1 = immr_map(im_sitk); |
215 | sys_tmr2 = (sit8xx_t *) immr_map(im_sit); | 184 | sys_tmr2 = immr_map(im_sit); |
216 | time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday, | 185 | time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday, |
217 | tm->tm_hour, tm->tm_min, tm->tm_sec); | 186 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
218 | 187 | ||
@@ -228,7 +197,7 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm) | |||
228 | void mpc8xx_get_rtc_time(struct rtc_time *tm) | 197 | void mpc8xx_get_rtc_time(struct rtc_time *tm) |
229 | { | 198 | { |
230 | unsigned long data; | 199 | unsigned long data; |
231 | sit8xx_t *sys_tmr = (sit8xx_t *) immr_map(im_sit); | 200 | sit8xx_t __iomem *sys_tmr = immr_map(im_sit); |
232 | 201 | ||
233 | /* Get time from the RTC. */ | 202 | /* Get time from the RTC. */ |
234 | data = in_be32(&sys_tmr->sit_rtc); | 203 | data = in_be32(&sys_tmr->sit_rtc); |
@@ -241,8 +210,7 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm) | |||
241 | 210 | ||
242 | void mpc8xx_restart(char *cmd) | 211 | void mpc8xx_restart(char *cmd) |
243 | { | 212 | { |
244 | __volatile__ unsigned char dummy; | 213 | car8xx_t __iomem *clk_r = immr_map(im_clkrst); |
245 | car8xx_t * clk_r = (car8xx_t *) immr_map(im_clkrst); | ||
246 | 214 | ||
247 | 215 | ||
248 | local_irq_disable(); | 216 | local_irq_disable(); |
@@ -252,26 +220,8 @@ void mpc8xx_restart(char *cmd) | |||
252 | */ | 220 | */ |
253 | mtmsr(mfmsr() & ~0x1000); | 221 | mtmsr(mfmsr() & ~0x1000); |
254 | 222 | ||
255 | dummy = in_8(&clk_r->res[0]); | 223 | in_8(&clk_r->res[0]); |
256 | printk("Restart failed\n"); | 224 | panic("Restart failed\n"); |
257 | while(1); | ||
258 | } | ||
259 | |||
260 | void mpc8xx_show_cpuinfo(struct seq_file *m) | ||
261 | { | ||
262 | struct device_node *root; | ||
263 | uint memsize = total_memory; | ||
264 | const char *model = ""; | ||
265 | |||
266 | seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n"); | ||
267 | |||
268 | root = of_find_node_by_path("/"); | ||
269 | if (root) | ||
270 | model = of_get_property(root, "model", NULL); | ||
271 | seq_printf(m, "Machine\t\t: %s\n", model); | ||
272 | of_node_put(root); | ||
273 | |||
274 | seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); | ||
275 | } | 225 | } |
276 | 226 | ||
277 | static void cpm_cascade(unsigned int irq, struct irq_desc *desc) | 227 | static void cpm_cascade(unsigned int irq, struct irq_desc *desc) |
diff --git a/arch/powerpc/platforms/8xx/mpc86xads.h b/arch/powerpc/platforms/8xx/mpc86xads.h index dd10cd20b6a7..cffa194ccf1f 100644 --- a/arch/powerpc/platforms/8xx/mpc86xads.h +++ b/arch/powerpc/platforms/8xx/mpc86xads.h | |||
@@ -29,9 +29,6 @@ | |||
29 | #define CFG_PHYDEV_ADDR ((uint)0xff0a0000) | 29 | #define CFG_PHYDEV_ADDR ((uint)0xff0a0000) |
30 | #define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) | 30 | #define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) |
31 | 31 | ||
32 | #define IMAP_ADDR (get_immrbase()) | ||
33 | #define IMAP_SIZE ((uint)(64 * 1024)) | ||
34 | |||
35 | #define MPC8xx_CPM_OFFSET (0x9c0) | 32 | #define MPC8xx_CPM_OFFSET (0x9c0) |
36 | #define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) | 33 | #define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) |
37 | #define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver | 34 | #define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver |
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c index 8f64f48698ab..49012835f453 100644 --- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c | |||
@@ -37,14 +37,7 @@ | |||
37 | #include <asm/fs_pd.h> | 37 | #include <asm/fs_pd.h> |
38 | #include <asm/prom.h> | 38 | #include <asm/prom.h> |
39 | 39 | ||
40 | extern void cpm_reset(void); | 40 | #include <sysdev/commproc.h> |
41 | extern void mpc8xx_show_cpuinfo(struct seq_file*); | ||
42 | extern void mpc8xx_restart(char *cmd); | ||
43 | extern void mpc8xx_calibrate_decr(void); | ||
44 | extern int mpc8xx_set_rtc_time(struct rtc_time *tm); | ||
45 | extern void mpc8xx_get_rtc_time(struct rtc_time *tm); | ||
46 | extern void m8xx_pic_init(void); | ||
47 | extern unsigned int mpc8xx_get_irq(void); | ||
48 | 41 | ||
49 | static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi); | 42 | static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi); |
50 | static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi); | 43 | static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi); |
@@ -277,7 +270,6 @@ define_machine(mpc86x_ads) { | |||
277 | .probe = mpc86xads_probe, | 270 | .probe = mpc86xads_probe, |
278 | .setup_arch = mpc86xads_setup_arch, | 271 | .setup_arch = mpc86xads_setup_arch, |
279 | .init_IRQ = m8xx_pic_init, | 272 | .init_IRQ = m8xx_pic_init, |
280 | .show_cpuinfo = mpc8xx_show_cpuinfo, | ||
281 | .get_irq = mpc8xx_get_irq, | 273 | .get_irq = mpc8xx_get_irq, |
282 | .restart = mpc8xx_restart, | 274 | .restart = mpc8xx_restart, |
283 | .calibrate_decr = mpc8xx_calibrate_decr, | 275 | .calibrate_decr = mpc8xx_calibrate_decr, |
diff --git a/arch/powerpc/platforms/8xx/mpc885ads.h b/arch/powerpc/platforms/8xx/mpc885ads.h index 14db12417064..a21e528f26c6 100644 --- a/arch/powerpc/platforms/8xx/mpc885ads.h +++ b/arch/powerpc/platforms/8xx/mpc885ads.h | |||
@@ -29,9 +29,6 @@ | |||
29 | #define CFG_PHYDEV_ADDR ((uint)0xff0a0000) | 29 | #define CFG_PHYDEV_ADDR ((uint)0xff0a0000) |
30 | #define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) | 30 | #define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300)) |
31 | 31 | ||
32 | #define IMAP_ADDR (get_immrbase()) | ||
33 | #define IMAP_SIZE ((uint)(64 * 1024)) | ||
34 | |||
35 | #define MPC8xx_CPM_OFFSET (0x9c0) | 32 | #define MPC8xx_CPM_OFFSET (0x9c0) |
36 | #define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) | 33 | #define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET) |
37 | #define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver | 34 | #define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver |
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c index a1dab4cfd3de..bad08683f7ae 100644 --- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c | |||
@@ -38,14 +38,7 @@ | |||
38 | #include <asm/fs_pd.h> | 38 | #include <asm/fs_pd.h> |
39 | #include <asm/prom.h> | 39 | #include <asm/prom.h> |
40 | 40 | ||
41 | extern void cpm_reset(void); | 41 | #include <sysdev/commproc.h> |
42 | extern void mpc8xx_show_cpuinfo(struct seq_file *); | ||
43 | extern void mpc8xx_restart(char *cmd); | ||
44 | extern void mpc8xx_calibrate_decr(void); | ||
45 | extern int mpc8xx_set_rtc_time(struct rtc_time *tm); | ||
46 | extern void mpc8xx_get_rtc_time(struct rtc_time *tm); | ||
47 | extern void m8xx_pic_init(void); | ||
48 | extern unsigned int mpc8xx_get_irq(void); | ||
49 | 42 | ||
50 | static void init_smc1_uart_ioports(struct fs_uart_platform_info *fpi); | 43 | static void init_smc1_uart_ioports(struct fs_uart_platform_info *fpi); |
51 | static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi); | 44 | static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi); |
@@ -430,7 +423,6 @@ define_machine(mpc885_ads) | |||
430 | .probe = mpc885ads_probe, | 423 | .probe = mpc885ads_probe, |
431 | .setup_arch = mpc885ads_setup_arch, | 424 | .setup_arch = mpc885ads_setup_arch, |
432 | .init_IRQ = m8xx_pic_init, | 425 | .init_IRQ = m8xx_pic_init, |
433 | .show_cpuinfo = mpc8xx_show_cpuinfo, | ||
434 | .get_irq = mpc8xx_get_irq, | 426 | .get_irq = mpc8xx_get_irq, |
435 | .restart = mpc8xx_restart, | 427 | .restart = mpc8xx_restart, |
436 | .calibrate_decr = mpc8xx_calibrate_decr, | 428 | .calibrate_decr = mpc8xx_calibrate_decr, |
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c index 160a8b49bdea..f8f3741acd87 100644 --- a/arch/powerpc/sysdev/commproc.c +++ b/arch/powerpc/sysdev/commproc.c | |||
@@ -47,8 +47,9 @@ | |||
47 | static void m8xx_cpm_dpinit(void); | 47 | static void m8xx_cpm_dpinit(void); |
48 | static uint host_buffer; /* One page of host buffer */ | 48 | static uint host_buffer; /* One page of host buffer */ |
49 | static uint host_end; /* end + 1 */ | 49 | static uint host_end; /* end + 1 */ |
50 | cpm8xx_t *cpmp; /* Pointer to comm processor space */ | 50 | cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */ |
51 | cpic8xx_t *cpic_reg; | 51 | immap_t __iomem *mpc8xx_immr; |
52 | static cpic8xx_t __iomem *cpic_reg; | ||
52 | 53 | ||
53 | static struct irq_host *cpm_pic_host; | 54 | static struct irq_host *cpm_pic_host; |
54 | 55 | ||
@@ -133,16 +134,19 @@ unsigned int cpm_pic_init(void) | |||
133 | 134 | ||
134 | pr_debug("cpm_pic_init\n"); | 135 | pr_debug("cpm_pic_init\n"); |
135 | 136 | ||
136 | np = of_find_compatible_node(NULL, "cpm-pic", "CPM"); | 137 | np = of_find_compatible_node(NULL, NULL, "fsl,cpm1-pic"); |
138 | if (np == NULL) | ||
139 | np = of_find_compatible_node(NULL, "cpm-pic", "CPM"); | ||
137 | if (np == NULL) { | 140 | if (np == NULL) { |
138 | printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n"); | 141 | printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n"); |
139 | return sirq; | 142 | return sirq; |
140 | } | 143 | } |
144 | |||
141 | ret = of_address_to_resource(np, 0, &res); | 145 | ret = of_address_to_resource(np, 0, &res); |
142 | if (ret) | 146 | if (ret) |
143 | goto end; | 147 | goto end; |
144 | 148 | ||
145 | cpic_reg = (void *)ioremap(res.start, res.end - res.start + 1); | 149 | cpic_reg = ioremap(res.start, res.end - res.start + 1); |
146 | if (cpic_reg == NULL) | 150 | if (cpic_reg == NULL) |
147 | goto end; | 151 | goto end; |
148 | 152 | ||
@@ -165,14 +169,16 @@ unsigned int cpm_pic_init(void) | |||
165 | sirq = NO_IRQ; | 169 | sirq = NO_IRQ; |
166 | goto end; | 170 | goto end; |
167 | } | 171 | } |
168 | of_node_put(np); | ||
169 | 172 | ||
170 | /* Install our own error handler. */ | 173 | /* Install our own error handler. */ |
171 | np = of_find_node_by_type(NULL, "cpm"); | 174 | np = of_find_compatible_node(NULL, NULL, "fsl,cpm1"); |
175 | if (np == NULL) | ||
176 | np = of_find_node_by_type(NULL, "cpm"); | ||
172 | if (np == NULL) { | 177 | if (np == NULL) { |
173 | printk(KERN_ERR "CPM PIC init: can not find cpm node\n"); | 178 | printk(KERN_ERR "CPM PIC init: can not find cpm node\n"); |
174 | goto end; | 179 | goto end; |
175 | } | 180 | } |
181 | |||
176 | eirq = irq_of_parse_and_map(np, 0); | 182 | eirq = irq_of_parse_and_map(np, 0); |
177 | if (eirq == NO_IRQ) | 183 | if (eirq == NO_IRQ) |
178 | goto end; | 184 | goto end; |
@@ -189,21 +195,28 @@ end: | |||
189 | 195 | ||
190 | void cpm_reset(void) | 196 | void cpm_reset(void) |
191 | { | 197 | { |
192 | cpm8xx_t *commproc; | 198 | sysconf8xx_t __iomem *siu_conf; |
193 | sysconf8xx_t *siu_conf; | ||
194 | 199 | ||
195 | commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); | 200 | mpc8xx_immr = ioremap(get_immrbase(), 0x4000); |
201 | if (!mpc8xx_immr) { | ||
202 | printk(KERN_CRIT "Could not map IMMR\n"); | ||
203 | return; | ||
204 | } | ||
196 | 205 | ||
197 | #ifdef CONFIG_UCODE_PATCH | 206 | cpmp = &mpc8xx_immr->im_cpm; |
207 | |||
208 | #ifndef CONFIG_PPC_EARLY_DEBUG_CPM | ||
198 | /* Perform a reset. | 209 | /* Perform a reset. |
199 | */ | 210 | */ |
200 | out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); | 211 | out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); |
201 | 212 | ||
202 | /* Wait for it. | 213 | /* Wait for it. |
203 | */ | 214 | */ |
204 | while (in_be16(&commproc->cp_cpcr) & CPM_CR_FLG); | 215 | while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG); |
216 | #endif | ||
205 | 217 | ||
206 | cpm_load_patch(commproc); | 218 | #ifdef CONFIG_UCODE_PATCH |
219 | cpm_load_patch(cpmp); | ||
207 | #endif | 220 | #endif |
208 | 221 | ||
209 | /* Set SDMA Bus Request priority 5. | 222 | /* Set SDMA Bus Request priority 5. |
@@ -212,16 +225,12 @@ void cpm_reset(void) | |||
212 | * manual recommends it. | 225 | * manual recommends it. |
213 | * Bit 25, FAM can also be set to use FEC aggressive mode (860T). | 226 | * Bit 25, FAM can also be set to use FEC aggressive mode (860T). |
214 | */ | 227 | */ |
215 | siu_conf = (sysconf8xx_t*)immr_map(im_siu_conf); | 228 | siu_conf = immr_map(im_siu_conf); |
216 | out_be32(&siu_conf->sc_sdcr, 1); | 229 | out_be32(&siu_conf->sc_sdcr, 1); |
217 | immr_unmap(siu_conf); | 230 | immr_unmap(siu_conf); |
218 | 231 | ||
219 | /* Reclaim the DP memory for our use. */ | 232 | /* Reclaim the DP memory for our use. */ |
220 | m8xx_cpm_dpinit(); | 233 | m8xx_cpm_dpinit(); |
221 | |||
222 | /* Tell everyone where the comm processor resides. | ||
223 | */ | ||
224 | cpmp = commproc; | ||
225 | } | 234 | } |
226 | 235 | ||
227 | /* We used to do this earlier, but have to postpone as long as possible | 236 | /* We used to do this earlier, but have to postpone as long as possible |
@@ -271,20 +280,20 @@ m8xx_cpm_hostalloc(uint size) | |||
271 | void | 280 | void |
272 | cpm_setbrg(uint brg, uint rate) | 281 | cpm_setbrg(uint brg, uint rate) |
273 | { | 282 | { |
274 | volatile uint *bp; | 283 | u32 __iomem *bp; |
275 | 284 | ||
276 | /* This is good enough to get SMCs running..... | 285 | /* This is good enough to get SMCs running..... |
277 | */ | 286 | */ |
278 | bp = (uint *)&cpmp->cp_brgc1; | 287 | bp = &cpmp->cp_brgc1; |
279 | bp += brg; | 288 | bp += brg; |
280 | /* The BRG has a 12-bit counter. For really slow baud rates (or | 289 | /* The BRG has a 12-bit counter. For really slow baud rates (or |
281 | * really fast processors), we may have to further divide by 16. | 290 | * really fast processors), we may have to further divide by 16. |
282 | */ | 291 | */ |
283 | if (((BRG_UART_CLK / rate) - 1) < 4096) | 292 | if (((BRG_UART_CLK / rate) - 1) < 4096) |
284 | *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN; | 293 | out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN); |
285 | else | 294 | else |
286 | *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | | 295 | out_be32(bp, (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | |
287 | CPM_BRG_EN | CPM_BRG_DIV16; | 296 | CPM_BRG_EN | CPM_BRG_DIV16); |
288 | } | 297 | } |
289 | 298 | ||
290 | /* | 299 | /* |
@@ -299,15 +308,15 @@ static rh_block_t cpm_boot_dpmem_rh_block[16]; | |||
299 | static rh_info_t cpm_dpmem_info; | 308 | static rh_info_t cpm_dpmem_info; |
300 | 309 | ||
301 | #define CPM_DPMEM_ALIGNMENT 8 | 310 | #define CPM_DPMEM_ALIGNMENT 8 |
302 | static u8 *dpram_vbase; | 311 | static u8 __iomem *dpram_vbase; |
303 | static uint dpram_pbase; | 312 | static phys_addr_t dpram_pbase; |
304 | 313 | ||
305 | void m8xx_cpm_dpinit(void) | 314 | static void m8xx_cpm_dpinit(void) |
306 | { | 315 | { |
307 | spin_lock_init(&cpm_dpmem_lock); | 316 | spin_lock_init(&cpm_dpmem_lock); |
308 | 317 | ||
309 | dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); | 318 | dpram_vbase = cpmp->cp_dpmem; |
310 | dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem; | 319 | dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem); |
311 | 320 | ||
312 | /* Initialize the info header */ | 321 | /* Initialize the info header */ |
313 | rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT, | 322 | rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT, |
@@ -383,7 +392,7 @@ void *cpm_dpram_addr(unsigned long offset) | |||
383 | } | 392 | } |
384 | EXPORT_SYMBOL(cpm_dpram_addr); | 393 | EXPORT_SYMBOL(cpm_dpram_addr); |
385 | 394 | ||
386 | uint cpm_dpram_phys(u8* addr) | 395 | uint cpm_dpram_phys(u8 *addr) |
387 | { | 396 | { |
388 | return (dpram_pbase + (uint)(addr - dpram_vbase)); | 397 | return (dpram_pbase + (uint)(addr - dpram_vbase)); |
389 | } | 398 | } |
diff --git a/arch/powerpc/sysdev/commproc.h b/arch/powerpc/sysdev/commproc.h new file mode 100644 index 000000000000..9155ba467274 --- /dev/null +++ b/arch/powerpc/sysdev/commproc.h | |||
@@ -0,0 +1,12 @@ | |||
1 | #ifndef _POWERPC_SYSDEV_COMMPROC_H | ||
2 | #define _POWERPC_SYSDEV_COMMPROC_H | ||
3 | |||
4 | extern void cpm_reset(void); | ||
5 | extern void mpc8xx_restart(char *cmd); | ||
6 | extern void mpc8xx_calibrate_decr(void); | ||
7 | extern int mpc8xx_set_rtc_time(struct rtc_time *tm); | ||
8 | extern void mpc8xx_get_rtc_time(struct rtc_time *tm); | ||
9 | extern void m8xx_pic_init(void); | ||
10 | extern unsigned int mpc8xx_get_irq(void); | ||
11 | |||
12 | #endif | ||
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 565156ae65bc..7aa4ff5f5ec8 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c | |||
@@ -22,7 +22,7 @@ extern int cpm_get_irq(struct pt_regs *regs); | |||
22 | static struct irq_host *mpc8xx_pic_host; | 22 | static struct irq_host *mpc8xx_pic_host; |
23 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 23 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
24 | static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | 24 | static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
25 | static sysconf8xx_t *siu_reg; | 25 | static sysconf8xx_t __iomem *siu_reg; |
26 | 26 | ||
27 | int cpm_get_irq(struct pt_regs *regs); | 27 | int cpm_get_irq(struct pt_regs *regs); |
28 | 28 | ||
@@ -159,13 +159,14 @@ static struct irq_host_ops mpc8xx_pic_host_ops = { | |||
159 | int mpc8xx_pic_init(void) | 159 | int mpc8xx_pic_init(void) |
160 | { | 160 | { |
161 | struct resource res; | 161 | struct resource res; |
162 | struct device_node *np = NULL; | 162 | struct device_node *np; |
163 | int ret; | 163 | int ret; |
164 | 164 | ||
165 | np = of_find_node_by_type(np, "mpc8xx-pic"); | 165 | np = of_find_compatible_node(NULL, NULL, "fsl,pq1-pic"); |
166 | 166 | if (np == NULL) | |
167 | np = of_find_node_by_type(NULL, "mpc8xx-pic"); | ||
167 | if (np == NULL) { | 168 | if (np == NULL) { |
168 | printk(KERN_ERR "Could not find open-pic node\n"); | 169 | printk(KERN_ERR "Could not find fsl,pq1-pic node\n"); |
169 | return -ENOMEM; | 170 | return -ENOMEM; |
170 | } | 171 | } |
171 | 172 | ||
@@ -173,11 +174,9 @@ int mpc8xx_pic_init(void) | |||
173 | if (ret) | 174 | if (ret) |
174 | goto out; | 175 | goto out; |
175 | 176 | ||
176 | siu_reg = (void *)ioremap(res.start, res.end - res.start + 1); | 177 | siu_reg = ioremap(res.start, res.end - res.start + 1); |
177 | if (siu_reg == NULL) { | 178 | if (siu_reg == NULL) |
178 | ret = -EINVAL; | 179 | return -EINVAL; |
179 | goto out; | ||
180 | } | ||
181 | 180 | ||
182 | mpc8xx_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR, | 181 | mpc8xx_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR, |
183 | 64, &mpc8xx_pic_host_ops, 64); | 182 | 64, &mpc8xx_pic_host_ops, 64); |