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authorKrzysztof Helt <krzysztof.h1@wp.pl>2007-10-16 04:29:01 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 12:43:17 -0400
commite92e739514baed2be83cfb269db003c73dd885c2 (patch)
tree722f158a6ba32d4266b4067e01eba7482e5c5130 /arch
parent93d11f5a15020a514e522e678b2b3e7a1bc01f86 (diff)
s3c2410fb: remove lcdcon2 and lcdcon3 register fields
This patch removes unused lcdcon2 and lcdcon3 register value from the s3c2410fb_display structure. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/mach-amlm5900.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c18
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c10
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c24
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c10
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c8
6 files changed, 0 insertions, 72 deletions
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 4c958b7c09d5..c4754226874d 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -184,8 +184,6 @@ static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
184 .lower_margin = 0, 184 .lower_margin = 0,
185 185
186 .lcdcon1 = 0x00008225, 186 .lcdcon1 = 0x00008225,
187 .lcdcon2 = 0x0027c000,
188 .lcdcon4 = 0x00000002,
189 .lcdcon5 = 0x00000001, 187 .lcdcon5 = 0x00000001,
190}; 188};
191 189
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index e9c9df078925..61d5b2a2874c 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -485,8 +485,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
485 .bpp = 4, 485 .bpp = 4,
486 486
487 .lcdcon1 = 0x00000176, 487 .lcdcon1 = 0x00000176,
488 .lcdcon2 = 0x1d77c7c2,
489 .lcdcon4 = 0x00000057,
490 .lcdcon5 = 0x00014b02, 488 .lcdcon5 = 0x00014b02,
491 }, 489 },
492 { 490 {
@@ -505,8 +503,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
505 .vsync_len = 3, 503 .vsync_len = 3,
506 504
507 .lcdcon1 = 0x00000176, 505 .lcdcon1 = 0x00000176,
508 .lcdcon2 = 0x1d77c7c2,
509 .lcdcon4 = 0x00000057,
510 .lcdcon5 = 0x00014b02, 506 .lcdcon5 = 0x00014b02,
511 }, 507 },
512 { 508 {
@@ -525,8 +521,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
525 .vsync_len = 3, 521 .vsync_len = 3,
526 522
527 .lcdcon1 = 0x00000176, 523 .lcdcon1 = 0x00000176,
528 .lcdcon2 = 0x1d77c7c2,
529 .lcdcon4 = 0x00000057,
530 .lcdcon5 = 0x00014b02, 524 .lcdcon5 = 0x00014b02,
531 }, 525 },
532 { 526 {
@@ -545,8 +539,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
545 .vsync_len = 3, 539 .vsync_len = 3,
546 540
547 .lcdcon1 = 0x00000176, 541 .lcdcon1 = 0x00000176,
548 .lcdcon2 = 0x1d77c7c2,
549 .lcdcon4 = 0x00000057,
550 .lcdcon5 = 0x00014b02, 542 .lcdcon5 = 0x00014b02,
551 }, 543 },
552 { 544 {
@@ -565,8 +557,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
565 .vsync_len = 3, 557 .vsync_len = 3,
566 558
567 .lcdcon1 = 0x00000176, 559 .lcdcon1 = 0x00000176,
568 .lcdcon2 = 0x1d77c7c2,
569 .lcdcon4 = 0x00000057,
570 .lcdcon5 = 0x00014b02, 560 .lcdcon5 = 0x00014b02,
571 }, 561 },
572 { 562 {
@@ -585,8 +575,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
585 .vsync_len = 3, 575 .vsync_len = 3,
586 576
587 .lcdcon1 = 0x00000176, 577 .lcdcon1 = 0x00000176,
588 .lcdcon2 = 0x1d77c7c2,
589 .lcdcon4 = 0x00000057,
590 .lcdcon5 = 0x00014b02, 578 .lcdcon5 = 0x00014b02,
591 }, 579 },
592 { 580 {
@@ -605,8 +593,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
605 .vsync_len = 3, 593 .vsync_len = 3,
606 594
607 .lcdcon1 = 0x00000176, 595 .lcdcon1 = 0x00000176,
608 .lcdcon2 = 0x1d77c7c2,
609 .lcdcon4 = 0x00000057,
610 .lcdcon5 = 0x00014b02, 596 .lcdcon5 = 0x00014b02,
611 }, 597 },
612 { 598 {
@@ -625,8 +611,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
625 .vsync_len = 3, 611 .vsync_len = 3,
626 612
627 .lcdcon1 = 0x00000176, 613 .lcdcon1 = 0x00000176,
628 .lcdcon2 = 0x1d77c7c2,
629 .lcdcon4 = 0x00000057,
630 .lcdcon5 = 0x00014b02, 614 .lcdcon5 = 0x00014b02,
631 }, 615 },
632 { 616 {
@@ -645,8 +629,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = {
645 .vsync_len = 3, 629 .vsync_len = 3,
646 630
647 .lcdcon1 = 0x00000176, 631 .lcdcon1 = 0x00000176,
648 .lcdcon2 = 0x1d77c7c2,
649 .lcdcon4 = 0x00000057,
650 .lcdcon5 = 0x00014b02, 632 .lcdcon5 = 0x00014b02,
651 }, 633 },
652}; 634};
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index c0933b6c71b5..78dfc7d4270f 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -138,14 +138,6 @@ static struct s3c2410fb_display h1940_lcd __initdata = {
138 S3C2410_LCDCON1_TFT | \ 138 S3C2410_LCDCON1_TFT | \
139 S3C2410_LCDCON1_CLKVAL(0x0C), 139 S3C2410_LCDCON1_CLKVAL(0x0C),
140 140
141 .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \
142 S3C2410_LCDCON2_LINEVAL(319) | \
143 S3C2410_LCDCON2_VFPD(6) | \
144 S3C2410_LCDCON2_VSPW(0),
145
146 .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \
147 S3C2410_LCDCON4_HSPW(3),
148
149 .lcdcon5= S3C2410_LCDCON5_FRM565 | \ 141 .lcdcon5= S3C2410_LCDCON5_FRM565 | \
150 S3C2410_LCDCON5_INVVLINE | \ 142 S3C2410_LCDCON5_INVVLINE | \
151 S3C2410_LCDCON5_HWSWP, 143 S3C2410_LCDCON5_HWSWP,
@@ -165,8 +157,6 @@ static struct s3c2410fb_display h1940_lcd __initdata = {
165}; 157};
166 158
167static struct s3c2410fb_mach_info h1940_fb_info __initdata = { 159static struct s3c2410fb_mach_info h1940_fb_info __initdata = {
168 .fixed_syncs = 1,
169
170 .displays = &h1940_lcd, 160 .displays = &h1940_lcd,
171 .num_displays = 1, 161 .num_displays = 1,
172 .default_display = 0, 162 .default_display = 0,
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 50c0939a2492..ac94d561b6c9 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -102,14 +102,6 @@ static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
102 S3C2410_LCDCON1_TFT | 102 S3C2410_LCDCON1_TFT |
103 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */ 103 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
104 104
105 .lcdcon2 = S3C2410_LCDCON2_VBPD(18) | /* 19 */
106 S3C2410_LCDCON2_LINEVAL(479) |
107 S3C2410_LCDCON2_VFPD(10) | /* 11 */
108 S3C2410_LCDCON2_VSPW(14), /* 15 */
109
110 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
111 S3C2410_LCDCON4_HSPW(95), /* 96 */
112
113 .lcdcon5 = S3C2410_LCDCON5_FRM565 | 105 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
114 S3C2410_LCDCON5_INVVLINE | 106 S3C2410_LCDCON5_INVVLINE |
115 S3C2410_LCDCON5_INVVFRAME | 107 S3C2410_LCDCON5_INVVFRAME |
@@ -136,14 +128,6 @@ static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
136 S3C2410_LCDCON1_TFT | 128 S3C2410_LCDCON1_TFT |
137 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */ 129 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
138 130
139 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) | /* 2 */
140 S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
141 S3C2410_LCDCON2_VFPD(3) | /* 4 */
142 S3C2410_LCDCON2_VSPW(1), /* 2 */
143
144 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
145 S3C2410_LCDCON4_HSPW(7), /* 8 */
146
147 .lcdcon5 = S3C2410_LCDCON5_FRM565 | 131 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
148 S3C2410_LCDCON5_INVVLINE | 132 S3C2410_LCDCON5_INVVLINE |
149 S3C2410_LCDCON5_INVVFRAME | 133 S3C2410_LCDCON5_INVVFRAME |
@@ -169,14 +153,6 @@ static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
169 S3C2410_LCDCON1_TFT | 153 S3C2410_LCDCON1_TFT |
170 S3C2410_LCDCON1_CLKVAL(0x04), 154 S3C2410_LCDCON1_CLKVAL(0x04),
171 155
172 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
173 S3C2410_LCDCON2_LINEVAL(319) |
174 S3C2410_LCDCON2_VFPD(6) |
175 S3C2410_LCDCON2_VSPW(3),
176
177 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
178 S3C2410_LCDCON4_HSPW(3),
179
180 .lcdcon5 = S3C2410_LCDCON5_FRM565 | 156 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
181 S3C2410_LCDCON5_INVVLINE | 157 S3C2410_LCDCON5_INVVLINE |
182 S3C2410_LCDCON5_INVVFRAME | 158 S3C2410_LCDCON5_INVVFRAME |
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index da68b1fe923c..f26adeaf1e74 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -115,14 +115,6 @@ static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
115 S3C2410_LCDCON1_TFT | \ 115 S3C2410_LCDCON1_TFT | \
116 S3C2410_LCDCON1_CLKVAL(0x0C), 116 S3C2410_LCDCON1_CLKVAL(0x0C),
117 117
118 .lcdcon2 = S3C2410_LCDCON2_VBPD(5) | \
119 S3C2410_LCDCON2_LINEVAL(319) | \
120 S3C2410_LCDCON2_VFPD(6) | \
121 S3C2410_LCDCON2_VSPW(2),
122
123 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) | \
124 S3C2410_LCDCON4_HSPW(7),
125
126 .lcdcon5 = S3C2410_LCDCON5_INVVLINE | 118 .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
127 S3C2410_LCDCON5_FRM565 | 119 S3C2410_LCDCON5_FRM565 |
128 S3C2410_LCDCON5_HWSWP, 120 S3C2410_LCDCON5_HWSWP,
@@ -159,8 +151,6 @@ static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
159 .gpdcon_mask = 0xffc0fff0, 151 .gpdcon_mask = 0xffc0fff0,
160 .gpdup = 0x0000faff, 152 .gpdup = 0x0000faff,
161 .gpdup_mask = 0xffffffff, 153 .gpdup_mask = 0xffffffff,
162
163 .fixed_syncs = 1,
164}; 154};
165 155
166static struct mtd_partition rx3715_nand_part[] = { 156static struct mtd_partition rx3715_nand_part[] = {
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 2919e6bf02af..840a480c40de 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -109,14 +109,6 @@ static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
109 S3C2410_LCDCON1_TFT | 109 S3C2410_LCDCON1_TFT |
110 S3C2410_LCDCON1_CLKVAL(0x04), 110 S3C2410_LCDCON1_CLKVAL(0x04),
111 111
112 .lcdcon2 = S3C2410_LCDCON2_VBPD(7) |
113 S3C2410_LCDCON2_LINEVAL(319) |
114 S3C2410_LCDCON2_VFPD(6) |
115 S3C2410_LCDCON2_VSPW(3),
116
117 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
118 S3C2410_LCDCON4_HSPW(3),
119
120 .lcdcon5 = S3C2410_LCDCON5_FRM565 | 112 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
121 S3C2410_LCDCON5_INVVLINE | 113 S3C2410_LCDCON5_INVVLINE |
122 S3C2410_LCDCON5_INVVFRAME | 114 S3C2410_LCDCON5_INVVFRAME |