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authorMasato Noguchi <Masato.Noguchi@jp.sony.com>2007-07-20 15:39:40 -0400
committerArnd Bergmann <arnd@klappe.arndb.de>2007-07-20 15:41:58 -0400
commitcf17df223c8cd56a92f34162f2a362eec9f4b157 (patch)
tree9318e893c0ae9466ccd6e774ac8c2f220c4771c3 /arch
parenta103f347a5ae2735b9bf0a725a36c34be3f24c88 (diff)
[CELL] spufs: dont halt decrementer at restore step 47
No need to halt the SPE decrementer at context restore step 47, it will be done in step 7. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index c970b14bf7db..27ffdae98e5a 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -974,13 +974,13 @@ static inline void terminate_spu_app(struct spu_state *csa, struct spu *spu)
974 */ 974 */
975} 975}
976 976
977static inline void suspend_mfc(struct spu_state *csa, struct spu *spu) 977static inline void suspend_mfc_and_halt_decr(struct spu_state *csa,
978 struct spu *spu)
978{ 979{
979 struct spu_priv2 __iomem *priv2 = spu->priv2; 980 struct spu_priv2 __iomem *priv2 = spu->priv2;
980 981
981 /* Restore, Step 7: 982 /* Restore, Step 7:
982 * Restore, Step 47. 983 * Write MFC_Cntl[Dh,Sc,Sm]='1','1','0' to suspend
983 * Write MFC_Cntl[Dh,Sc]='1','1' to suspend
984 * the queue and halt the decrementer. 984 * the queue and halt the decrementer.
985 */ 985 */
986 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE | 986 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE |
@@ -1397,6 +1397,18 @@ static inline void restore_ls_16kb(struct spu_state *csa, struct spu *spu)
1397 send_mfc_dma(spu, addr, ls_offset, size, tag, rclass, cmd); 1397 send_mfc_dma(spu, addr, ls_offset, size, tag, rclass, cmd);
1398} 1398}
1399 1399
1400static inline void suspend_mfc(struct spu_state *csa, struct spu *spu)
1401{
1402 struct spu_priv2 __iomem *priv2 = spu->priv2;
1403
1404 /* Restore, Step 47.
1405 * Write MFC_Cntl[Sc,Sm]='1','0' to suspend
1406 * the queue.
1407 */
1408 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
1409 eieio();
1410}
1411
1400static inline void clear_interrupts(struct spu_state *csa, struct spu *spu) 1412static inline void clear_interrupts(struct spu_state *csa, struct spu *spu)
1401{ 1413{
1402 /* Restore, Step 49: 1414 /* Restore, Step 49:
@@ -1926,7 +1938,7 @@ static void harvest(struct spu_state *prev, struct spu *spu)
1926 set_switch_pending(prev, spu); /* Step 5. */ 1938 set_switch_pending(prev, spu); /* Step 5. */
1927 stop_spu_isolate(spu); /* NEW. */ 1939 stop_spu_isolate(spu); /* NEW. */
1928 remove_other_spu_access(prev, spu); /* Step 6. */ 1940 remove_other_spu_access(prev, spu); /* Step 6. */
1929 suspend_mfc(prev, spu); /* Step 7. */ 1941 suspend_mfc_and_halt_decr(prev, spu); /* Step 7. */
1930 wait_suspend_mfc_complete(prev, spu); /* Step 8. */ 1942 wait_suspend_mfc_complete(prev, spu); /* Step 8. */
1931 if (!suspend_spe(prev, spu)) /* Step 9. */ 1943 if (!suspend_spe(prev, spu)) /* Step 9. */
1932 clear_spu_status(prev, spu); /* Step 10. */ 1944 clear_spu_status(prev, spu); /* Step 10. */