Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial

9 files changed, 7 insertions, 299 deletions

diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index bd900b7ab33c..92ff5dc07351 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -184,7 +184,7 @@ static void __init omap_perseus2_map_io(void)
         omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
 
         /*
-         * Ethernet support trough the debug board
+         * Ethernet support through the debug board
          * CS1 timings setup
          */
         omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
diff --git a/arch/i386/kernel/cpu/changelog b/arch/i386/kernel/cpu/changelog
deleted file mode 100644
index cef76b80a710..000000000000
--- a/arch/i386/kernel/cpu/changelog
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- *  Enhanced CPU type detection by Mike Jagdis, Patrick St. Jean
- *  and Martin Mares, November 1997.
- *
- *  Force Cyrix 6x86(MX) and M II processors to report MTRR capability
- *  and Cyrix "coma bug" recognition by
- *  Zoltán Böszörményi <zboszor@mail.externet.hu> February 1999.
- * 
- *  Force Centaur C6 processors to report MTRR capability.
- *  Bart Hartgers <bart@etpmod.phys.tue.nl>, May 1999.
- *
- *  Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
- *
- *  IDT Winchip tweaks, misc clean ups.
- *  Dave Jones <davej@suse.de>, August 1999
- *
- *  Better detection of Centaur/IDT WinChip models.
- *  Bart Hartgers <bart@etpmod.phys.tue.nl>, August 1999.
- *
- *  Cleaned up cache-detection code
- *  Dave Jones <davej@suse.de>, October 1999
- *
- *  Added proper L2 cache detection for Coppermine
- *  Dragan Stancevic <visitor@valinux.com>, October 1999
- *
- *  Added the original array for capability flags but forgot to credit 
- *  myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
- *  Jauder Ho <jauderho@carumba.com>, January 2000
- *
- *  Detection for Celeron coppermine, identify_cpu() overhauled,
- *  and a few other clean ups.
- *  Dave Jones <davej@suse.de>, April 2000
- *
- *  Pentium III FXSR, SSE support
- *  General FPU state handling cleanups
- *  Gareth Hughes <gareth@valinux.com>, May 2000
- *
- *  Added proper Cascades CPU and L2 cache detection for Cascades
- *  and 8-way type cache happy bunch from Intel:^)
- *  Dragan Stancevic <visitor@valinux.com>, May 2000 
- *
- *  Forward port AMD Duron errata T13 from 2.2.17pre
- *  Dave Jones <davej@suse.de>, August 2000
- *
- *  Forward port lots of fixes/improvements from 2.2.18pre
- *  Cyrix III, Pentium IV support.
- *  Dave Jones <davej@suse.de>, October 2000
- *
- *  Massive cleanup of CPU detection and bug handling;
- *  Transmeta CPU detection,
- *  H. Peter Anvin <hpa@zytor.com>, November 2000
- *
- *  VIA C3 Support.
- *  Dave Jones <davej@suse.de>, March 2001
- *
- *  AMD Athlon/Duron/Thunderbird bluesmoke support.
- *  Dave Jones <davej@suse.de>, April 2001.
- *
- *  CacheSize bug workaround updates for AMD, Intel & VIA Cyrix.
- *  Dave Jones <davej@suse.de>, September, October 2001.
- *
- */
-
diff --git a/arch/i386/kernel/cpu/mtrr/changelog b/arch/i386/kernel/cpu/mtrr/changelog
deleted file mode 100644
index af1368535955..000000000000
--- a/arch/i386/kernel/cpu/mtrr/changelog
+++ /dev/null
@@ -1,229 +0,0 @@
-    ChangeLog
-
-    Prehistory Martin Tischhäuser <martin@ikcbarka.fzk.de>
-               Initial register-setting code (from proform-1.0).
-    19971216   Richard Gooch <rgooch@atnf.csiro.au>
-               Original version for /proc/mtrr interface, SMP-safe.
-  v1.0
-    19971217   Richard Gooch <rgooch@atnf.csiro.au>
-               Bug fix for ioctls()'s.
-               Added sample code in Documentation/mtrr.txt
-  v1.1
-    19971218   Richard Gooch <rgooch@atnf.csiro.au>
-               Disallow overlapping regions.
-    19971219   Jens Maurer <jmaurer@menuett.rhein-main.de>
-               Register-setting fixups.
-  v1.2
-    19971222   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixups for kernel 2.1.75.
-  v1.3
-    19971229   David Wragg <dpw@doc.ic.ac.uk>
-               Register-setting fixups and conformity with Intel conventions.
-    19971229   Richard Gooch <rgooch@atnf.csiro.au>
-               Cosmetic changes and wrote this ChangeLog ;-)
-    19980106   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixups for kernel 2.1.78.
-  v1.4
-    19980119   David Wragg <dpw@doc.ic.ac.uk>
-               Included passive-release enable code (elsewhere in PCI setup).
-  v1.5
-    19980131   Richard Gooch <rgooch@atnf.csiro.au>
-               Replaced global kernel lock with private spinlock.
-  v1.6
-    19980201   Richard Gooch <rgooch@atnf.csiro.au>
-               Added wait for other CPUs to complete changes.
-  v1.7
-    19980202   Richard Gooch <rgooch@atnf.csiro.au>
-               Bug fix in definition of <set_mtrr> for UP.
-  v1.8
-    19980319   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixups for kernel 2.1.90.
-    19980323   Richard Gooch <rgooch@atnf.csiro.au>
-               Move SMP BIOS fixup before secondary CPUs call <calibrate_delay>
-  v1.9
-    19980325   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixed test for overlapping regions: confused by adjacent regions
-    19980326   Richard Gooch <rgooch@atnf.csiro.au>
-               Added wbinvd in <set_mtrr_prepare>.
-    19980401   Richard Gooch <rgooch@atnf.csiro.au>
-               Bug fix for non-SMP compilation.
-    19980418   David Wragg <dpw@doc.ic.ac.uk>
-               Fixed-MTRR synchronisation for SMP and use atomic operations
-               instead of spinlocks.
-    19980418   Richard Gooch <rgooch@atnf.csiro.au>
-               Differentiate different MTRR register classes for BIOS fixup.
-  v1.10
-    19980419   David Wragg <dpw@doc.ic.ac.uk>
-               Bug fix in variable MTRR synchronisation.
-  v1.11
-    19980419   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixups for kernel 2.1.97.
-  v1.12
-    19980421   Richard Gooch <rgooch@atnf.csiro.au>
-               Safer synchronisation across CPUs when changing MTRRs.
-  v1.13
-    19980423   Richard Gooch <rgooch@atnf.csiro.au>
-               Bugfix for SMP systems without MTRR support.
-  v1.14
-    19980427   Richard Gooch <rgooch@atnf.csiro.au>
-               Trap calls to <mtrr_add> and <mtrr_del> on non-MTRR machines.
-  v1.15
-    19980427   Richard Gooch <rgooch@atnf.csiro.au>
-               Use atomic bitops for setting SMP change mask.
-  v1.16
-    19980428   Richard Gooch <rgooch@atnf.csiro.au>
-               Removed spurious diagnostic message.
-  v1.17
-    19980429   Richard Gooch <rgooch@atnf.csiro.au>
-               Moved register-setting macros into this file.
-               Moved setup code from init/main.c to i386-specific areas.
-  v1.18
-    19980502   Richard Gooch <rgooch@atnf.csiro.au>
-               Moved MTRR detection outside conditionals in <mtrr_init>.
-  v1.19
-    19980502   Richard Gooch <rgooch@atnf.csiro.au>
-               Documentation improvement: mention Pentium II and AGP.
-  v1.20
-    19980521   Richard Gooch <rgooch@atnf.csiro.au>
-               Only manipulate interrupt enable flag on local CPU.
-               Allow enclosed uncachable regions.
-  v1.21
-    19980611   Richard Gooch <rgooch@atnf.csiro.au>
-               Always define <main_lock>.
-  v1.22
-    19980901   Richard Gooch <rgooch@atnf.csiro.au>
-               Removed module support in order to tidy up code.
-               Added sanity check for <mtrr_add>/<mtrr_del> before <mtrr_init>.
-               Created addition queue for prior to SMP commence.
-  v1.23
-    19980902   Richard Gooch <rgooch@atnf.csiro.au>
-               Ported patch to kernel 2.1.120-pre3.
-  v1.24
-    19980910   Richard Gooch <rgooch@atnf.csiro.au>
-               Removed sanity checks and addition queue: Linus prefers an OOPS.
-  v1.25
-    19981001   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixed harmless compiler warning in include/asm-i386/mtrr.h
-               Fixed version numbering and history for v1.23 -> v1.24.
-  v1.26
-    19990118   Richard Gooch <rgooch@atnf.csiro.au>
-               Added devfs support.
-  v1.27
-    19990123   Richard Gooch <rgooch@atnf.csiro.au>
-               Changed locking to spin with reschedule.
-               Made use of new <smp_call_function>.
-  v1.28
-    19990201   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Extended the driver to be able to use Cyrix style ARRs.
-    19990204   Richard Gooch <rgooch@atnf.csiro.au>
-               Restructured Cyrix support.
-  v1.29
-    19990204   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Refined ARR support: enable MAPEN in set_mtrr_prepare()
-               and disable MAPEN in set_mtrr_done().
-    19990205   Richard Gooch <rgooch@atnf.csiro.au>
-               Minor cleanups.
-  v1.30
-    19990208   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Protect plain 6x86s (and other processors without the
-               Page Global Enable feature) against accessing CR4 in
-               set_mtrr_prepare() and set_mtrr_done().
-    19990210   Richard Gooch <rgooch@atnf.csiro.au>
-               Turned <set_mtrr_up> and <get_mtrr> into function pointers.
-  v1.31
-    19990212   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Major rewrite of cyrix_arr_init(): do not touch ARRs,
-               leave them as the BIOS have set them up.
-               Enable usage of all 8 ARRs.
-               Avoid multiplications by 3 everywhere and other
-               code clean ups/speed ups.
-    19990213   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Set up other Cyrix processors identical to the boot cpu.
-               Since Cyrix don't support Intel APIC, this is l'art pour l'art.
-               Weigh ARRs by size:
-               If size <= 32M is given, set up ARR# we were given.
-               If size >  32M is given, set up ARR7 only if it is free,
-               fail otherwise.
-    19990214   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Also check for size >= 256K if we are to set up ARR7,
-               mtrr_add() returns the value it gets from set_mtrr()
-    19990218   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Remove Cyrix "coma bug" workaround from here.
-               Moved to linux/arch/i386/kernel/setup.c and
-               linux/include/asm-i386/bugs.h
-    19990228   Richard Gooch <rgooch@atnf.csiro.au>
-               Added MTRRIOC_KILL_ENTRY ioctl(2)
-               Trap for counter underflow in <mtrr_file_del>.
-               Trap for 4 MiB aligned regions for PPro, stepping <= 7.
-    19990301   Richard Gooch <rgooch@atnf.csiro.au>
-               Created <get_free_region> hook.
-    19990305   Richard Gooch <rgooch@atnf.csiro.au>
-               Temporarily disable AMD support now MTRR capability flag is set.
-  v1.32
-    19990308   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Adjust my changes (19990212-19990218) to Richard Gooch's
-               latest changes. (19990228-19990305)
-  v1.33
-    19990309   Richard Gooch <rgooch@atnf.csiro.au>
-               Fixed typo in <printk> message.
-    19990310   Richard Gooch <rgooch@atnf.csiro.au>
-               Support K6-II/III based on Alan Cox's <alan@redhat.com> patches.
-  v1.34
-    19990511   Bart Hartgers <bart@etpmod.phys.tue.nl>
-               Support Centaur C6 MCR's.
-    19990512   Richard Gooch <rgooch@atnf.csiro.au>
-               Minor cleanups.
-  v1.35
-    19990707   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Check whether ARR3 is protected in cyrix_get_free_region()
-               and mtrr_del(). The code won't attempt to delete or change it
-               from now on if the BIOS protected ARR3. It silently skips ARR3
-               in cyrix_get_free_region() or returns with an error code from
-               mtrr_del().
-    19990711   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Reset some bits in the CCRs in cyrix_arr_init() to disable SMM
-               if ARR3 isn't protected. This is needed because if SMM is active
-               and ARR3 isn't protected then deleting and setting ARR3 again
-               may lock up the processor. With SMM entirely disabled, it does
-               not happen.
-    19990812   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Rearrange switch() statements so the driver accomodates to
-               the fact that the AMD Athlon handles its MTRRs the same way
-               as Intel does.
-    19990814   Zoltán Böszörményi <zboszor@mail.externet.hu>
-               Double check for Intel in mtrr_add()'s big switch() because
-               that revision check is only valid for Intel CPUs.
-    19990819   Alan Cox <alan@redhat.com>
-               Tested Zoltan's changes on a pre production Athlon - 100%
-               success.
-    19991008   Manfred Spraul <manfreds@colorfullife.com>
-               replaced spin_lock_reschedule() with a normal semaphore.
-  v1.36
-    20000221   Richard Gooch <rgooch@atnf.csiro.au>
-               Compile fix if procfs and devfs not enabled.
-               Formatting changes.
-  v1.37
-    20001109   H. Peter Anvin <hpa@zytor.com>
-               Use the new centralized CPU feature detects.
-
-  v1.38
-    20010309   Dave Jones <davej@suse.de>
-               Add support for Cyrix III.
-
-  v1.39
-    20010312   Dave Jones <davej@suse.de>
-               Ugh, I broke AMD support.
-               Reworked fix by Troels Walsted Hansen <troels@thule.no>
-
-  v1.40
-    20010327   Dave Jones <davej@suse.de>
-               Adapted Cyrix III support to include VIA C3.
-
-  v2.0
-    20020306   Patrick Mochel <mochel@osdl.org>
-               Split mtrr.c -> mtrr/*.c
-               Converted to Linux Kernel Coding Style
-               Fixed several minor nits in form
-               Moved some SMP-only functions out, so they can be used
-                for power management in the future.
-               TODO: Fix user interface cruft.
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 977ee3adaf2d..34ab0daec3a7 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -972,7 +972,7 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
 #endif
 
 #ifdef CONFIG_PPC_RTAS
-        /* To help early debugging via the front panel, we retreive a minimal
+        /* To help early debugging via the front panel, we retrieve a minimal
          * set of RTAS infos now if available
          */
         {
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 4283fa33f784..ae2e2a31a705 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -632,7 +632,7 @@ void rtas_stop_self(void)
 }
 
 /*
- * Call early during boot, before mem init or bootmem, to retreive the RTAS
+ * Call early during boot, before mem init or bootmem, to retrieve the RTAS
  * informations from the device-tree and allocate the RMO buffer for userland
  * accesses.
  */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 98e9f0595dd8..81567e931260 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -438,7 +438,7 @@ void __init setup_system(void)
 
         /*
          * Fill the ppc64_caches & systemcfg structures with informations
-         * retreived from the device-tree. Need to be called before
+         * retrieved from the device-tree. Need to be called before
          * finish_device_tree() since the later requires some of the
          * informations filled up here to properly parse the interrupt
          * tree.
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 5bb433cbe41b..149351a84b94 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -368,7 +368,7 @@ static unsigned long __init htab_get_table_size(void)
         unsigned long mem_size, rnd_mem_size, pteg_count;
 
         /* If hash size isn't already provided by the platform, we try to
-         * retreive it from the device-tree. If it's not there neither, we
+         * retrieve it from the device-tree. If it's not there neither, we
          * calculate it now based on the total RAM size
          */
         if (ppc64_pft_size == 0)
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c
index a4b50c4109c2..a415e8d2f7af 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_64.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_64.c
@@ -80,7 +80,7 @@ static struct freq_attr* g5_cpu_freqs_attr[] = {
 };
 
 /* Power mode data is an array of the 32 bits PCR values to use for
- * the various frequencies, retreived from the device-tree
+ * the various frequencies, retrieved from the device-tree
  */
 static u32 *g5_pmode_data;
 static int g5_pmode_max;
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index cb6e38ed2b1d..937d81f62f43 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -201,7 +201,7 @@ again:
         if ((signed long)(get_ccount() - next) > 0)
                 goto again;
 
-        /* Allow platform to do something usefull (Wdog). */
+        /* Allow platform to do something useful (Wdog). */
 
         platform_heartbeat();