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authorRuss Anderson <rja@sgi.com>2006-09-18 19:37:15 -0400
committerTony Luck <tony.luck@intel.com>2006-09-26 18:20:35 -0400
commit8f9e146732dcba5161dad3747ee73be1f8c13133 (patch)
tree463488a8c6c2ca1e5b74a6b80bdd8d1699e8bec7 /arch
parent43ed3baf623410b3fa6ca14a9d3f6deca3493c56 (diff)
[IA64] ar.fpsr not set on MCA/INIT kernel entry
When entering the kernel due to an MCA or INIT, ar.fpsr (ar40) was not getting set to the kernel default value (remaining at the user value). The effect depends on the user setting of ar.fpsr. In the test case, the effect was addresses printing with strange hex values. Setting ar.fpsr in ia64_set_kernel_registers sets it for both the MCA and INIT paths. The user value of ar.fpsr is correctly saved (in ia64_state_save) and restored (in ia64_state_restore). Below is an example of output with very strange hex values. Anyone know the value of hex 'g'? :-) Processes interrupted by INIT - 0 (cpu 14 task 0xdfffg55g7a4c6gA) Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/kernel/mca_asm.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S
index ee3ff76c8a35..c6b607c00dee 100644
--- a/arch/ia64/kernel/mca_asm.S
+++ b/arch/ia64/kernel/mca_asm.S
@@ -1062,6 +1062,10 @@ ia64_set_kernel_registers:
1062 mov cr.itir=r18 1062 mov cr.itir=r18
1063 mov cr.ifa=r13 1063 mov cr.ifa=r13
1064 mov r20=IA64_TR_CURRENT_STACK 1064 mov r20=IA64_TR_CURRENT_STACK
1065
1066 movl r17=FPSR_DEFAULT
1067 ;;
1068 mov.m ar.fpsr=r17 // set ar.fpsr to kernel default value
1065 ;; 1069 ;;
1066 itr.d dtr[r20]=r21 1070 itr.d dtr[r20]=r21
1067 ;; 1071 ;;