diff options
author | H. Peter Anvin <hpa@zytor.com> | 2008-01-30 07:33:02 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:33:02 -0500 |
commit | 88089519f302f1296b4739be45699f06f728ec31 (patch) | |
tree | a0ffb023be68d0b83503e77ba4a9d9b43acea88b /arch | |
parent | c4d9ba6da9f050ebb7e0d70769e3dca0fd45334f (diff) |
x86 setup: initialize LDTR and TR to make life easier to Intel VT
Intel VT doesn't like to engage when the protected-mode state isn't
fully initialized. Make life easier for it by initializing LDTR (to
null) and TR (to a dummy hunk of low memory which will never actually
be touched.)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/boot/pm.c | 4 | ||||
-rw-r--r-- | arch/x86/boot/pmjump.S | 7 |
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c index 09fb342cc62e..b23cbdc7d547 100644 --- a/arch/x86/boot/pm.c +++ b/arch/x86/boot/pm.c | |||
@@ -121,6 +121,10 @@ static void setup_gdt(void) | |||
121 | [GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff), | 121 | [GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff), |
122 | /* DS: data, read/write, 4 GB, base 0 */ | 122 | /* DS: data, read/write, 4 GB, base 0 */ |
123 | [GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff), | 123 | [GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff), |
124 | /* TSS: 32-bit tss, 104 bytes, base 4096 */ | ||
125 | /* We only have a TSS here to keep Intel VT happy; | ||
126 | we don't actually use it for anything. */ | ||
127 | [GDT_ENTRY_BOOT_TSS] = GDT_ENTRY(0x0089, 4096, 103), | ||
124 | }; | 128 | }; |
125 | /* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead | 129 | /* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead |
126 | of the gdt_ptr contents. Thus, make it static so it will | 130 | of the gdt_ptr contents. Thus, make it static so it will |
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S index ef0da1f2c7fd..f7153d0d476e 100644 --- a/arch/x86/boot/pmjump.S +++ b/arch/x86/boot/pmjump.S | |||
@@ -36,6 +36,7 @@ protected_mode_jump: | |||
36 | addl %ebx, 2f | 36 | addl %ebx, 2f |
37 | 37 | ||
38 | movw $__BOOT_DS, %cx | 38 | movw $__BOOT_DS, %cx |
39 | movw $__BOOT_TSS, %di | ||
39 | 40 | ||
40 | movl %cr0, %edx | 41 | movl %cr0, %edx |
41 | orb $1, %dl # Protected mode (PE) bit | 42 | orb $1, %dl # Protected mode (PE) bit |
@@ -63,6 +64,9 @@ in_pm32: | |||
63 | # a valid stack if some debugging hack wants to use it. | 64 | # a valid stack if some debugging hack wants to use it. |
64 | addl %ebx, %esp | 65 | addl %ebx, %esp |
65 | 66 | ||
67 | # Set up TR to make Intel VT happy | ||
68 | ltr %di | ||
69 | |||
66 | # Clear registers to allow for future extensions to the | 70 | # Clear registers to allow for future extensions to the |
67 | # 32-bit boot protocol | 71 | # 32-bit boot protocol |
68 | xorl %ecx, %ecx | 72 | xorl %ecx, %ecx |
@@ -71,6 +75,9 @@ in_pm32: | |||
71 | xorl %ebp, %ebp | 75 | xorl %ebp, %ebp |
72 | xorl %edi, %edi | 76 | xorl %edi, %edi |
73 | 77 | ||
78 | # Set up LDTR to make Intel VT happy | ||
79 | lldt %cx | ||
80 | |||
74 | jmpl *%eax # Jump to the 32-bit entrypoint | 81 | jmpl *%eax # Jump to the 32-bit entrypoint |
75 | 82 | ||
76 | .size in_pm32, .-in_pm32 | 83 | .size in_pm32, .-in_pm32 |