diff options
author | Valentine Barshak <vbarshak@ru.mvista.com> | 2007-09-21 10:46:57 -0400 |
---|---|---|
committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-10-03 08:20:17 -0400 |
commit | 8112753bb2c0045398c89d0647792b39805f6d40 (patch) | |
tree | 5a818e51c96b9cc0d0cd733838554037339a8559 /arch | |
parent | 84e3ad5b91ed51db7513a54ad7ed652ab0ca4ba1 (diff) |
[POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx
The PowerPC 440EP(x) FPU init is currently done in head_44x
under ifdefs. Since we should support more then one board
in the same kernel, we move FPU initialization code from head_44x
to cpu_setup_44x and add cpu_setup callbacks for 440EP(x).
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_44x.S | 14 | ||||
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 6 | ||||
-rw-r--r-- | arch/powerpc/kernel/head_44x.S | 10 |
3 files changed, 20 insertions, 10 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S index 6a6e6c71ad6f..c790634d946b 100644 --- a/arch/powerpc/kernel/cpu_setup_44x.S +++ b/arch/powerpc/kernel/cpu_setup_44x.S | |||
@@ -17,3 +17,17 @@ | |||
17 | #include <asm/cputable.h> | 17 | #include <asm/cputable.h> |
18 | #include <asm/ppc_asm.h> | 18 | #include <asm/ppc_asm.h> |
19 | 19 | ||
20 | _GLOBAL(__setup_cpu_440ep) | ||
21 | b __init_fpu_44x | ||
22 | _GLOBAL(__setup_cpu_440epx) | ||
23 | b __init_fpu_44x | ||
24 | |||
25 | /* enable APU between CPU and FPU */ | ||
26 | _GLOBAL(__init_fpu_44x) | ||
27 | mfspr r3,SPRN_CCR0 | ||
28 | /* Clear DAPUIB flag in CCR0 */ | ||
29 | rlwinm r3,r3,0,12,10 | ||
30 | mtspr SPRN_CCR0,r3 | ||
31 | isync | ||
32 | blr | ||
33 | |||
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 8711499f5a02..94d98190e19a 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -31,6 +31,8 @@ EXPORT_SYMBOL(cur_cpu_spec); | |||
31 | * and ppc64 | 31 | * and ppc64 |
32 | */ | 32 | */ |
33 | #ifdef CONFIG_PPC32 | 33 | #ifdef CONFIG_PPC32 |
34 | extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); | ||
35 | extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); | ||
34 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); | 36 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); |
35 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); | 37 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); |
36 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); | 38 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); |
@@ -1111,6 +1113,7 @@ static struct cpu_spec cpu_specs[] = { | |||
1111 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, | 1113 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
1112 | .icache_bsize = 32, | 1114 | .icache_bsize = 32, |
1113 | .dcache_bsize = 32, | 1115 | .dcache_bsize = 32, |
1116 | .cpu_setup = __setup_cpu_440ep, | ||
1114 | .platform = "ppc440", | 1117 | .platform = "ppc440", |
1115 | }, | 1118 | }, |
1116 | { | 1119 | { |
@@ -1121,6 +1124,7 @@ static struct cpu_spec cpu_specs[] = { | |||
1121 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, | 1124 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
1122 | .icache_bsize = 32, | 1125 | .icache_bsize = 32, |
1123 | .dcache_bsize = 32, | 1126 | .dcache_bsize = 32, |
1127 | .cpu_setup = __setup_cpu_440ep, | ||
1124 | .platform = "ppc440", | 1128 | .platform = "ppc440", |
1125 | }, | 1129 | }, |
1126 | { /* 440EPX */ | 1130 | { /* 440EPX */ |
@@ -1131,6 +1135,8 @@ static struct cpu_spec cpu_specs[] = { | |||
1131 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, | 1135 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
1132 | .icache_bsize = 32, | 1136 | .icache_bsize = 32, |
1133 | .dcache_bsize = 32, | 1137 | .dcache_bsize = 32, |
1138 | .cpu_setup = __setup_cpu_440epx, | ||
1139 | .platform = "ppc440", | ||
1134 | }, | 1140 | }, |
1135 | { /* 440GRX */ | 1141 | { /* 440GRX */ |
1136 | .pvr_mask = 0xf0000ffb, | 1142 | .pvr_mask = 0xf0000ffb, |
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index c6a510bdefd4..864d63fbb204 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S | |||
@@ -217,16 +217,6 @@ skpinv: addi r4,r4,1 /* Increment */ | |||
217 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ | 217 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ |
218 | mtspr SPRN_IVPR,r4 | 218 | mtspr SPRN_IVPR,r4 |
219 | 219 | ||
220 | #if defined(CONFIG_440EP) || defined(CONFIG_440EPX) | ||
221 | /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */ | ||
222 | mfspr r2,SPRN_CCR0 | ||
223 | lis r3,0xffef | ||
224 | ori r3,r3,0xffff | ||
225 | and r2,r2,r3 | ||
226 | mtspr SPRN_CCR0,r2 | ||
227 | isync | ||
228 | #endif | ||
229 | |||
230 | /* | 220 | /* |
231 | * This is where the main kernel code starts. | 221 | * This is where the main kernel code starts. |
232 | */ | 222 | */ |