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authorKumar Gala <galak@kernel.crashing.org>2007-02-17 17:04:23 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-02-17 17:06:27 -0500
commit520948796335111cf91970efabca7e5d064db344 (patch)
tree60be45c7b1ab1a56c842acf49802cbbaa4f0686b /arch
parent975b89399679dcf8587288d46d3f21d4286af167 (diff)
[POWERPC] 85xx: Cleaned up platform dts files
* Fixed up top level compatible property for all boards * Removed explicit linux,phandle usage. Use references and labels now * Fixed phy-phandles for TSEC3/4 in mpc8548cds.dts Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts142
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts108
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts129
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts108
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts157
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts96
6 files changed, 333 insertions, 407 deletions
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 5f41c1f7a5f3..3c0917fa791c 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8540ADS"; 14 model = "MPC8540ADS";
15 compatible = "MPC85xxADS"; 15 compatible = "MPC8540ADS", "MPC85xxADS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8540@0 { 24 PowerPC,8540@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <0>; // 166 MHz 32 bus-frequency = <0>; // 166 MHz
35 clock-frequency = <0>; // 825 MHz, from uboot 33 clock-frequency = <0>; // 825 MHz, from uboot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 08000000>; // 128M at 0x0 40 reg = <00000000 08000000>; // 128M at 0x0
45 }; 41 };
46 42
@@ -58,7 +54,7 @@
58 compatible = "fsl-i2c"; 54 compatible = "fsl-i2c";
59 reg = <3000 100>; 55 reg = <3000 100>;
60 interrupts = <1b 2>; 56 interrupts = <1b 2>;
61 interrupt-parent = <40000>; 57 interrupt-parent = <&mpic>;
62 dfsrr; 58 dfsrr;
63 }; 59 };
64 60
@@ -68,24 +64,20 @@
68 device_type = "mdio"; 64 device_type = "mdio";
69 compatible = "gianfar"; 65 compatible = "gianfar";
70 reg = <24520 20>; 66 reg = <24520 20>;
71 linux,phandle = <24520>; 67 phy0: ethernet-phy@0 {
72 ethernet-phy@0 { 68 interrupt-parent = <&mpic>;
73 linux,phandle = <2452000>;
74 interrupt-parent = <40000>;
75 interrupts = <35 1>; 69 interrupts = <35 1>;
76 reg = <0>; 70 reg = <0>;
77 device_type = "ethernet-phy"; 71 device_type = "ethernet-phy";
78 }; 72 };
79 ethernet-phy@1 { 73 phy1: ethernet-phy@1 {
80 linux,phandle = <2452001>; 74 interrupt-parent = <&mpic>;
81 interrupt-parent = <40000>;
82 interrupts = <35 1>; 75 interrupts = <35 1>;
83 reg = <1>; 76 reg = <1>;
84 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
85 }; 78 };
86 ethernet-phy@3 { 79 phy3: ethernet-phy@3 {
87 linux,phandle = <2452003>; 80 interrupt-parent = <&mpic>;
88 interrupt-parent = <40000>;
89 interrupts = <37 1>; 81 interrupts = <37 1>;
90 reg = <3>; 82 reg = <3>;
91 device_type = "ethernet-phy"; 83 device_type = "ethernet-phy";
@@ -102,8 +94,8 @@
102 address = [ 00 E0 0C 00 73 00 ]; 94 address = [ 00 E0 0C 00 73 00 ];
103 local-mac-address = [ 00 E0 0C 00 73 00 ]; 95 local-mac-address = [ 00 E0 0C 00 73 00 ];
104 interrupts = <d 2 e 2 12 2>; 96 interrupts = <d 2 e 2 12 2>;
105 interrupt-parent = <40000>; 97 interrupt-parent = <&mpic>;
106 phy-handle = <2452000>; 98 phy-handle = <&phy0>;
107 }; 99 };
108 100
109 ethernet@25000 { 101 ethernet@25000 {
@@ -116,8 +108,8 @@
116 address = [ 00 E0 0C 00 73 01 ]; 108 address = [ 00 E0 0C 00 73 01 ];
117 local-mac-address = [ 00 E0 0C 00 73 01 ]; 109 local-mac-address = [ 00 E0 0C 00 73 01 ];
118 interrupts = <13 2 14 2 18 2>; 110 interrupts = <13 2 14 2 18 2>;
119 interrupt-parent = <40000>; 111 interrupt-parent = <&mpic>;
120 phy-handle = <2452001>; 112 phy-handle = <&phy1>;
121 }; 113 };
122 114
123 ethernet@26000 { 115 ethernet@26000 {
@@ -130,8 +122,8 @@
130 address = [ 00 E0 0C 00 73 02 ]; 122 address = [ 00 E0 0C 00 73 02 ];
131 local-mac-address = [ 00 E0 0C 00 73 02 ]; 123 local-mac-address = [ 00 E0 0C 00 73 02 ];
132 interrupts = <19 2>; 124 interrupts = <19 2>;
133 interrupt-parent = <40000>; 125 interrupt-parent = <&mpic>;
134 phy-handle = <2452003>; 126 phy-handle = <&phy3>;
135 }; 127 };
136 128
137 serial@4500 { 129 serial@4500 {
@@ -140,7 +132,7 @@
140 reg = <4500 100>; // reg base, size 132 reg = <4500 100>; // reg base, size
141 clock-frequency = <0>; // should we fill in in uboot? 133 clock-frequency = <0>; // should we fill in in uboot?
142 interrupts = <1a 2>; 134 interrupts = <1a 2>;
143 interrupt-parent = <40000>; 135 interrupt-parent = <&mpic>;
144 }; 136 };
145 137
146 serial@4600 { 138 serial@4600 {
@@ -149,85 +141,84 @@
149 reg = <4600 100>; // reg base, size 141 reg = <4600 100>; // reg base, size
150 clock-frequency = <0>; // should we fill in in uboot? 142 clock-frequency = <0>; // should we fill in in uboot?
151 interrupts = <1a 2>; 143 interrupts = <1a 2>;
152 interrupt-parent = <40000>; 144 interrupt-parent = <&mpic>;
153 }; 145 };
154 pci@8000 { 146 pci@8000 {
155 linux,phandle = <8000>;
156 interrupt-map-mask = <f800 0 0 7>; 147 interrupt-map-mask = <f800 0 0 7>;
157 interrupt-map = < 148 interrupt-map = <
158 149
159 /* IDSEL 0x02 */ 150 /* IDSEL 0x02 */
160 1000 0 0 1 40000 31 1 151 1000 0 0 1 &mpic 31 1
161 1000 0 0 2 40000 32 1 152 1000 0 0 2 &mpic 32 1
162 1000 0 0 3 40000 33 1 153 1000 0 0 3 &mpic 33 1
163 1000 0 0 4 40000 34 1 154 1000 0 0 4 &mpic 34 1
164 155
165 /* IDSEL 0x03 */ 156 /* IDSEL 0x03 */
166 1800 0 0 1 40000 34 1 157 1800 0 0 1 &mpic 34 1
167 1800 0 0 2 40000 31 1 158 1800 0 0 2 &mpic 31 1
168 1800 0 0 3 40000 32 1 159 1800 0 0 3 &mpic 32 1
169 1800 0 0 4 40000 33 1 160 1800 0 0 4 &mpic 33 1
170 161
171 /* IDSEL 0x04 */ 162 /* IDSEL 0x04 */
172 2000 0 0 1 40000 33 1 163 2000 0 0 1 &mpic 33 1
173 2000 0 0 2 40000 34 1 164 2000 0 0 2 &mpic 34 1
174 2000 0 0 3 40000 31 1 165 2000 0 0 3 &mpic 31 1
175 2000 0 0 4 40000 32 1 166 2000 0 0 4 &mpic 32 1
176 167
177 /* IDSEL 0x05 */ 168 /* IDSEL 0x05 */
178 2800 0 0 1 40000 32 1 169 2800 0 0 1 &mpic 32 1
179 2800 0 0 2 40000 33 1 170 2800 0 0 2 &mpic 33 1
180 2800 0 0 3 40000 34 1 171 2800 0 0 3 &mpic 34 1
181 2800 0 0 4 40000 31 1 172 2800 0 0 4 &mpic 31 1
182 173
183 /* IDSEL 0x0c */ 174 /* IDSEL 0x0c */
184 6000 0 0 1 40000 31 1 175 6000 0 0 1 &mpic 31 1
185 6000 0 0 2 40000 32 1 176 6000 0 0 2 &mpic 32 1
186 6000 0 0 3 40000 33 1 177 6000 0 0 3 &mpic 33 1
187 6000 0 0 4 40000 34 1 178 6000 0 0 4 &mpic 34 1
188 179
189 /* IDSEL 0x0d */ 180 /* IDSEL 0x0d */
190 6800 0 0 1 40000 34 1 181 6800 0 0 1 &mpic 34 1
191 6800 0 0 2 40000 31 1 182 6800 0 0 2 &mpic 31 1
192 6800 0 0 3 40000 32 1 183 6800 0 0 3 &mpic 32 1
193 6800 0 0 4 40000 33 1 184 6800 0 0 4 &mpic 33 1
194 185
195 /* IDSEL 0x0e */ 186 /* IDSEL 0x0e */
196 7000 0 0 1 40000 33 1 187 7000 0 0 1 &mpic 33 1
197 7000 0 0 2 40000 34 1 188 7000 0 0 2 &mpic 34 1
198 7000 0 0 3 40000 31 1 189 7000 0 0 3 &mpic 31 1
199 7000 0 0 4 40000 32 1 190 7000 0 0 4 &mpic 32 1
200 191
201 /* IDSEL 0x0f */ 192 /* IDSEL 0x0f */
202 7800 0 0 1 40000 32 1 193 7800 0 0 1 &mpic 32 1
203 7800 0 0 2 40000 33 1 194 7800 0 0 2 &mpic 33 1
204 7800 0 0 3 40000 34 1 195 7800 0 0 3 &mpic 34 1
205 7800 0 0 4 40000 31 1 196 7800 0 0 4 &mpic 31 1
206 197
207 /* IDSEL 0x12 */ 198 /* IDSEL 0x12 */
208 9000 0 0 1 40000 31 1 199 9000 0 0 1 &mpic 31 1
209 9000 0 0 2 40000 32 1 200 9000 0 0 2 &mpic 32 1
210 9000 0 0 3 40000 33 1 201 9000 0 0 3 &mpic 33 1
211 9000 0 0 4 40000 34 1 202 9000 0 0 4 &mpic 34 1
212 203
213 /* IDSEL 0x13 */ 204 /* IDSEL 0x13 */
214 9800 0 0 1 40000 34 1 205 9800 0 0 1 &mpic 34 1
215 9800 0 0 2 40000 31 1 206 9800 0 0 2 &mpic 31 1
216 9800 0 0 3 40000 32 1 207 9800 0 0 3 &mpic 32 1
217 9800 0 0 4 40000 33 1 208 9800 0 0 4 &mpic 33 1
218 209
219 /* IDSEL 0x14 */ 210 /* IDSEL 0x14 */
220 a000 0 0 1 40000 33 1 211 a000 0 0 1 &mpic 33 1
221 a000 0 0 2 40000 34 1 212 a000 0 0 2 &mpic 34 1
222 a000 0 0 3 40000 31 1 213 a000 0 0 3 &mpic 31 1
223 a000 0 0 4 40000 32 1 214 a000 0 0 4 &mpic 32 1
224 215
225 /* IDSEL 0x15 */ 216 /* IDSEL 0x15 */
226 a800 0 0 1 40000 32 1 217 a800 0 0 1 &mpic 32 1
227 a800 0 0 2 40000 33 1 218 a800 0 0 2 &mpic 33 1
228 a800 0 0 3 40000 34 1 219 a800 0 0 3 &mpic 34 1
229 a800 0 0 4 40000 31 1>; 220 a800 0 0 4 &mpic 31 1>;
230 interrupt-parent = <40000>; 221 interrupt-parent = <&mpic>;
231 interrupts = <08 2>; 222 interrupts = <08 2>;
232 bus-range = <0 0>; 223 bus-range = <0 0>;
233 ranges = <02000000 0 80000000 80000000 0 20000000 224 ranges = <02000000 0 80000000 80000000 0 20000000
@@ -241,8 +232,7 @@
241 device_type = "pci"; 232 device_type = "pci";
242 }; 233 };
243 234
244 pic@40000 { 235 mpic: pic@40000 {
245 linux,phandle = <40000>;
246 clock-frequency = <0>; 236 clock-frequency = <0>;
247 interrupt-controller; 237 interrupt-controller;
248 #address-cells = <0>; 238 #address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 7be0bc659e1c..2a1ae760ab3a 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8541CDS"; 14 model = "MPC8541CDS";
15 compatible = "MPC85xxCDS"; 15 compatible = "MPC8541CDS", "MPC85xxCDS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8541@0 { 24 PowerPC,8541@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <0>; // 166 MHz 32 bus-frequency = <0>; // 166 MHz
35 clock-frequency = <0>; // 825 MHz, from uboot 33 clock-frequency = <0>; // 825 MHz, from uboot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 08000000>; // 128M at 0x0 40 reg = <00000000 08000000>; // 128M at 0x0
45 }; 41 };
46 42
@@ -58,7 +54,7 @@
58 compatible = "fsl-i2c"; 54 compatible = "fsl-i2c";
59 reg = <3000 100>; 55 reg = <3000 100>;
60 interrupts = <1b 2>; 56 interrupts = <1b 2>;
61 interrupt-parent = <40000>; 57 interrupt-parent = <&mpic>;
62 dfsrr; 58 dfsrr;
63 }; 59 };
64 60
@@ -68,17 +64,14 @@
68 device_type = "mdio"; 64 device_type = "mdio";
69 compatible = "gianfar"; 65 compatible = "gianfar";
70 reg = <24520 20>; 66 reg = <24520 20>;
71 linux,phandle = <24520>; 67 phy0: ethernet-phy@0 {
72 ethernet-phy@0 { 68 interrupt-parent = <&mpic>;
73 linux,phandle = <2452000>;
74 interrupt-parent = <40000>;
75 interrupts = <35 0>; 69 interrupts = <35 0>;
76 reg = <0>; 70 reg = <0>;
77 device_type = "ethernet-phy"; 71 device_type = "ethernet-phy";
78 }; 72 };
79 ethernet-phy@1 { 73 phy1: ethernet-phy@1 {
80 linux,phandle = <2452001>; 74 interrupt-parent = <&mpic>;
81 interrupt-parent = <40000>;
82 interrupts = <35 0>; 75 interrupts = <35 0>;
83 reg = <1>; 76 reg = <1>;
84 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
@@ -94,8 +87,8 @@
94 reg = <24000 1000>; 87 reg = <24000 1000>;
95 local-mac-address = [ 00 E0 0C 00 73 00 ]; 88 local-mac-address = [ 00 E0 0C 00 73 00 ];
96 interrupts = <d 2 e 2 12 2>; 89 interrupts = <d 2 e 2 12 2>;
97 interrupt-parent = <40000>; 90 interrupt-parent = <&mpic>;
98 phy-handle = <2452000>; 91 phy-handle = <&phy0>;
99 }; 92 };
100 93
101 ethernet@25000 { 94 ethernet@25000 {
@@ -107,8 +100,8 @@
107 reg = <25000 1000>; 100 reg = <25000 1000>;
108 local-mac-address = [ 00 E0 0C 00 73 01 ]; 101 local-mac-address = [ 00 E0 0C 00 73 01 ];
109 interrupts = <13 2 14 2 18 2>; 102 interrupts = <13 2 14 2 18 2>;
110 interrupt-parent = <40000>; 103 interrupt-parent = <&mpic>;
111 phy-handle = <2452001>; 104 phy-handle = <&phy1>;
112 }; 105 };
113 106
114 serial@4500 { 107 serial@4500 {
@@ -117,7 +110,7 @@
117 reg = <4500 100>; // reg base, size 110 reg = <4500 100>; // reg base, size
118 clock-frequency = <0>; // should we fill in in uboot? 111 clock-frequency = <0>; // should we fill in in uboot?
119 interrupts = <1a 2>; 112 interrupts = <1a 2>;
120 interrupt-parent = <40000>; 113 interrupt-parent = <&mpic>;
121 }; 114 };
122 115
123 serial@4600 { 116 serial@4600 {
@@ -126,57 +119,56 @@
126 reg = <4600 100>; // reg base, size 119 reg = <4600 100>; // reg base, size
127 clock-frequency = <0>; // should we fill in in uboot? 120 clock-frequency = <0>; // should we fill in in uboot?
128 interrupts = <1a 2>; 121 interrupts = <1a 2>;
129 interrupt-parent = <40000>; 122 interrupt-parent = <&mpic>;
130 }; 123 };
131 124
132 pci@8000 { 125 pci1: pci@8000 {
133 linux,phandle = <8000>;
134 interrupt-map-mask = <1f800 0 0 7>; 126 interrupt-map-mask = <1f800 0 0 7>;
135 interrupt-map = < 127 interrupt-map = <
136 128
137 /* IDSEL 0x10 */ 129 /* IDSEL 0x10 */
138 08000 0 0 1 40000 30 1 130 08000 0 0 1 &mpic 30 1
139 08000 0 0 2 40000 31 1 131 08000 0 0 2 &mpic 31 1
140 08000 0 0 3 40000 32 1 132 08000 0 0 3 &mpic 32 1
141 08000 0 0 4 40000 33 1 133 08000 0 0 4 &mpic 33 1
142 134
143 /* IDSEL 0x11 */ 135 /* IDSEL 0x11 */
144 08800 0 0 1 40000 30 1 136 08800 0 0 1 &mpic 30 1
145 08800 0 0 2 40000 31 1 137 08800 0 0 2 &mpic 31 1
146 08800 0 0 3 40000 32 1 138 08800 0 0 3 &mpic 32 1
147 08800 0 0 4 40000 33 1 139 08800 0 0 4 &mpic 33 1
148 140
149 /* IDSEL 0x12 (Slot 1) */ 141 /* IDSEL 0x12 (Slot 1) */
150 09000 0 0 1 40000 30 1 142 09000 0 0 1 &mpic 30 1
151 09000 0 0 2 40000 31 1 143 09000 0 0 2 &mpic 31 1
152 09000 0 0 3 40000 32 1 144 09000 0 0 3 &mpic 32 1
153 09000 0 0 4 40000 33 1 145 09000 0 0 4 &mpic 33 1
154 146
155 /* IDSEL 0x13 (Slot 2) */ 147 /* IDSEL 0x13 (Slot 2) */
156 09800 0 0 1 40000 31 1 148 09800 0 0 1 &mpic 31 1
157 09800 0 0 2 40000 32 1 149 09800 0 0 2 &mpic 32 1
158 09800 0 0 3 40000 33 1 150 09800 0 0 3 &mpic 33 1
159 09800 0 0 4 40000 30 1 151 09800 0 0 4 &mpic 30 1
160 152
161 /* IDSEL 0x14 (Slot 3) */ 153 /* IDSEL 0x14 (Slot 3) */
162 0a000 0 0 1 40000 32 1 154 0a000 0 0 1 &mpic 32 1
163 0a000 0 0 2 40000 33 1 155 0a000 0 0 2 &mpic 33 1
164 0a000 0 0 3 40000 30 1 156 0a000 0 0 3 &mpic 30 1
165 0a000 0 0 4 40000 31 1 157 0a000 0 0 4 &mpic 31 1
166 158
167 /* IDSEL 0x15 (Slot 4) */ 159 /* IDSEL 0x15 (Slot 4) */
168 0a800 0 0 1 40000 33 1 160 0a800 0 0 1 &mpic 33 1
169 0a800 0 0 2 40000 30 1 161 0a800 0 0 2 &mpic 30 1
170 0a800 0 0 3 40000 31 1 162 0a800 0 0 3 &mpic 31 1
171 0a800 0 0 4 40000 32 1 163 0a800 0 0 4 &mpic 32 1
172 164
173 /* Bus 1 (Tundra Bridge) */ 165 /* Bus 1 (Tundra Bridge) */
174 /* IDSEL 0x12 (ISA bridge) */ 166 /* IDSEL 0x12 (ISA bridge) */
175 19000 0 0 1 40000 30 1 167 19000 0 0 1 &mpic 30 1
176 19000 0 0 2 40000 31 1 168 19000 0 0 2 &mpic 31 1
177 19000 0 0 3 40000 32 1 169 19000 0 0 3 &mpic 32 1
178 19000 0 0 4 40000 33 1>; 170 19000 0 0 4 &mpic 33 1>;
179 interrupt-parent = <40000>; 171 interrupt-parent = <&mpic>;
180 interrupts = <08 2>; 172 interrupts = <08 2>;
181 bus-range = <0 0>; 173 bus-range = <0 0>;
182 ranges = <02000000 0 80000000 80000000 0 20000000 174 ranges = <02000000 0 80000000 80000000 0 20000000
@@ -200,21 +192,20 @@
200 compatible = "chrp,iic"; 192 compatible = "chrp,iic";
201 big-endian; 193 big-endian;
202 interrupts = <1>; 194 interrupts = <1>;
203 interrupt-parent = <8000>; 195 interrupt-parent = <&pci1>;
204 }; 196 };
205 }; 197 };
206 198
207 pci@9000 { 199 pci@9000 {
208 linux,phandle = <9000>;
209 interrupt-map-mask = <f800 0 0 7>; 200 interrupt-map-mask = <f800 0 0 7>;
210 interrupt-map = < 201 interrupt-map = <
211 202
212 /* IDSEL 0x15 */ 203 /* IDSEL 0x15 */
213 a800 0 0 1 40000 3b 1 204 a800 0 0 1 &mpic 3b 1
214 a800 0 0 2 40000 3b 1 205 a800 0 0 2 &mpic 3b 1
215 a800 0 0 3 40000 3b 1 206 a800 0 0 3 &mpic 3b 1
216 a800 0 0 4 40000 3b 1>; 207 a800 0 0 4 &mpic 3b 1>;
217 interrupt-parent = <40000>; 208 interrupt-parent = <&mpic>;
218 interrupts = <09 2>; 209 interrupts = <09 2>;
219 bus-range = <0 0>; 210 bus-range = <0 0>;
220 ranges = <02000000 0 a0000000 a0000000 0 20000000 211 ranges = <02000000 0 a0000000 a0000000 0 20000000
@@ -228,8 +219,7 @@
228 device_type = "pci"; 219 device_type = "pci";
229 }; 220 };
230 221
231 pic@40000 { 222 mpic: pic@40000 {
232 linux,phandle = <40000>;
233 clock-frequency = <0>; 223 clock-frequency = <0>;
234 interrupt-controller; 224 interrupt-controller;
235 #address-cells = <0>; 225 #address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 893d7957c174..7eb5d81d5eec 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8548CDS"; 14 model = "MPC8548CDS";
15 compatible = "MPC85xxCDS"; 15 compatible = "MPC8548CDS", "MPC85xxCDS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8548@0 { 24 PowerPC,8548@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <0>; // 166 MHz 32 bus-frequency = <0>; // 166 MHz
35 clock-frequency = <0>; // 825 MHz, from uboot 33 clock-frequency = <0>; // 825 MHz, from uboot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 08000000>; // 128M at 0x0 40 reg = <00000000 08000000>; // 128M at 0x0
45 }; 41 };
46 42
@@ -58,7 +54,7 @@
58 compatible = "fsl-i2c"; 54 compatible = "fsl-i2c";
59 reg = <3000 100>; 55 reg = <3000 100>;
60 interrupts = <1b 2>; 56 interrupts = <1b 2>;
61 interrupt-parent = <40000>; 57 interrupt-parent = <&mpic>;
62 dfsrr; 58 dfsrr;
63 }; 59 };
64 60
@@ -68,32 +64,26 @@
68 device_type = "mdio"; 64 device_type = "mdio";
69 compatible = "gianfar"; 65 compatible = "gianfar";
70 reg = <24520 20>; 66 reg = <24520 20>;
71 linux,phandle = <24520>; 67 phy0: ethernet-phy@0 {
72 ethernet-phy@0 { 68 interrupt-parent = <&mpic>;
73 linux,phandle = <2452000>;
74 interrupt-parent = <40000>;
75 interrupts = <35 0>; 69 interrupts = <35 0>;
76 reg = <0>; 70 reg = <0>;
77 device_type = "ethernet-phy"; 71 device_type = "ethernet-phy";
78 }; 72 };
79 ethernet-phy@1 { 73 phy1: ethernet-phy@1 {
80 linux,phandle = <2452001>; 74 interrupt-parent = <&mpic>;
81 interrupt-parent = <40000>;
82 interrupts = <35 0>; 75 interrupts = <35 0>;
83 reg = <1>; 76 reg = <1>;
84 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
85 }; 78 };
86 79 phy2: ethernet-phy@2 {
87 ethernet-phy@2 { 80 interrupt-parent = <&mpic>;
88 linux,phandle = <2452002>;
89 interrupt-parent = <40000>;
90 interrupts = <35 0>; 81 interrupts = <35 0>;
91 reg = <2>; 82 reg = <2>;
92 device_type = "ethernet-phy"; 83 device_type = "ethernet-phy";
93 }; 84 };
94 ethernet-phy@3 { 85 phy3: ethernet-phy@3 {
95 linux,phandle = <2452003>; 86 interrupt-parent = <&mpic>;
96 interrupt-parent = <40000>;
97 interrupts = <35 0>; 87 interrupts = <35 0>;
98 reg = <3>; 88 reg = <3>;
99 device_type = "ethernet-phy"; 89 device_type = "ethernet-phy";
@@ -109,8 +99,8 @@
109 reg = <24000 1000>; 99 reg = <24000 1000>;
110 local-mac-address = [ 00 E0 0C 00 73 00 ]; 100 local-mac-address = [ 00 E0 0C 00 73 00 ];
111 interrupts = <d 2 e 2 12 2>; 101 interrupts = <d 2 e 2 12 2>;
112 interrupt-parent = <40000>; 102 interrupt-parent = <&mpic>;
113 phy-handle = <2452000>; 103 phy-handle = <&phy0>;
114 }; 104 };
115 105
116 ethernet@25000 { 106 ethernet@25000 {
@@ -122,10 +112,11 @@
122 reg = <25000 1000>; 112 reg = <25000 1000>;
123 local-mac-address = [ 00 E0 0C 00 73 01 ]; 113 local-mac-address = [ 00 E0 0C 00 73 01 ];
124 interrupts = <13 2 14 2 18 2>; 114 interrupts = <13 2 14 2 18 2>;
125 interrupt-parent = <40000>; 115 interrupt-parent = <&mpic>;
126 phy-handle = <2452001>; 116 phy-handle = <&phy1>;
127 }; 117 };
128 118
119/* eTSEC 3/4 are currently broken
129 ethernet@26000 { 120 ethernet@26000 {
130 #address-cells = <1>; 121 #address-cells = <1>;
131 #size-cells = <0>; 122 #size-cells = <0>;
@@ -135,11 +126,10 @@
135 reg = <26000 1000>; 126 reg = <26000 1000>;
136 local-mac-address = [ 00 E0 0C 00 73 02 ]; 127 local-mac-address = [ 00 E0 0C 00 73 02 ];
137 interrupts = <f 2 10 2 11 2>; 128 interrupts = <f 2 10 2 11 2>;
138 interrupt-parent = <40000>; 129 interrupt-parent = <&mpic>;
139 phy-handle = <2452001>; 130 phy-handle = <&phy2>;
140 }; 131 };
141 132
142/* eTSEC 4 is currently broken
143 ethernet@27000 { 133 ethernet@27000 {
144 #address-cells = <1>; 134 #address-cells = <1>;
145 #size-cells = <0>; 135 #size-cells = <0>;
@@ -149,8 +139,8 @@
149 reg = <27000 1000>; 139 reg = <27000 1000>;
150 local-mac-address = [ 00 E0 0C 00 73 03 ]; 140 local-mac-address = [ 00 E0 0C 00 73 03 ];
151 interrupts = <15 2 16 2 17 2>; 141 interrupts = <15 2 16 2 17 2>;
152 interrupt-parent = <40000>; 142 interrupt-parent = <&mpic>;
153 phy-handle = <2452001>; 143 phy-handle = <&phy3>;
154 }; 144 };
155 */ 145 */
156 146
@@ -160,7 +150,7 @@
160 reg = <4500 100>; // reg base, size 150 reg = <4500 100>; // reg base, size
161 clock-frequency = <0>; // should we fill in in uboot? 151 clock-frequency = <0>; // should we fill in in uboot?
162 interrupts = <1a 2>; 152 interrupts = <1a 2>;
163 interrupt-parent = <40000>; 153 interrupt-parent = <&mpic>;
164 }; 154 };
165 155
166 serial@4600 { 156 serial@4600 {
@@ -169,57 +159,56 @@
169 reg = <4600 100>; // reg base, size 159 reg = <4600 100>; // reg base, size
170 clock-frequency = <0>; // should we fill in in uboot? 160 clock-frequency = <0>; // should we fill in in uboot?
171 interrupts = <1a 2>; 161 interrupts = <1a 2>;
172 interrupt-parent = <40000>; 162 interrupt-parent = <&mpic>;
173 }; 163 };
174 164
175 pci@8000 { 165 pci1: pci@8000 {
176 linux,phandle = <8000>;
177 interrupt-map-mask = <1f800 0 0 7>; 166 interrupt-map-mask = <1f800 0 0 7>;
178 interrupt-map = < 167 interrupt-map = <
179 168
180 /* IDSEL 0x10 */ 169 /* IDSEL 0x10 */
181 08000 0 0 1 40000 30 1 170 08000 0 0 1 &mpic 30 1
182 08000 0 0 2 40000 31 1 171 08000 0 0 2 &mpic 31 1
183 08000 0 0 3 40000 32 1 172 08000 0 0 3 &mpic 32 1
184 08000 0 0 4 40000 33 1 173 08000 0 0 4 &mpic 33 1
185 174
186 /* IDSEL 0x11 */ 175 /* IDSEL 0x11 */
187 08800 0 0 1 40000 30 1 176 08800 0 0 1 &mpic 30 1
188 08800 0 0 2 40000 31 1 177 08800 0 0 2 &mpic 31 1
189 08800 0 0 3 40000 32 1 178 08800 0 0 3 &mpic 32 1
190 08800 0 0 4 40000 33 1 179 08800 0 0 4 &mpic 33 1
191 180
192 /* IDSEL 0x12 (Slot 1) */ 181 /* IDSEL 0x12 (Slot 1) */
193 09000 0 0 1 40000 30 1 182 09000 0 0 1 &mpic 30 1
194 09000 0 0 2 40000 31 1 183 09000 0 0 2 &mpic 31 1
195 09000 0 0 3 40000 32 1 184 09000 0 0 3 &mpic 32 1
196 09000 0 0 4 40000 33 1 185 09000 0 0 4 &mpic 33 1
197 186
198 /* IDSEL 0x13 (Slot 2) */ 187 /* IDSEL 0x13 (Slot 2) */
199 09800 0 0 1 40000 31 1 188 09800 0 0 1 &mpic 31 1
200 09800 0 0 2 40000 32 1 189 09800 0 0 2 &mpic 32 1
201 09800 0 0 3 40000 33 1 190 09800 0 0 3 &mpic 33 1
202 09800 0 0 4 40000 30 1 191 09800 0 0 4 &mpic 30 1
203 192
204 /* IDSEL 0x14 (Slot 3) */ 193 /* IDSEL 0x14 (Slot 3) */
205 0a000 0 0 1 40000 32 1 194 0a000 0 0 1 &mpic 32 1
206 0a000 0 0 2 40000 33 1 195 0a000 0 0 2 &mpic 33 1
207 0a000 0 0 3 40000 30 1 196 0a000 0 0 3 &mpic 30 1
208 0a000 0 0 4 40000 31 1 197 0a000 0 0 4 &mpic 31 1
209 198
210 /* IDSEL 0x15 (Slot 4) */ 199 /* IDSEL 0x15 (Slot 4) */
211 0a800 0 0 1 40000 33 1 200 0a800 0 0 1 &mpic 33 1
212 0a800 0 0 2 40000 30 1 201 0a800 0 0 2 &mpic 30 1
213 0a800 0 0 3 40000 31 1 202 0a800 0 0 3 &mpic 31 1
214 0a800 0 0 4 40000 32 1 203 0a800 0 0 4 &mpic 32 1
215 204
216 /* Bus 1 (Tundra Bridge) */ 205 /* Bus 1 (Tundra Bridge) */
217 /* IDSEL 0x12 (ISA bridge) */ 206 /* IDSEL 0x12 (ISA bridge) */
218 19000 0 0 1 40000 30 1 207 19000 0 0 1 &mpic 30 1
219 19000 0 0 2 40000 31 1 208 19000 0 0 2 &mpic 31 1
220 19000 0 0 3 40000 32 1 209 19000 0 0 3 &mpic 32 1
221 19000 0 0 4 40000 33 1>; 210 19000 0 0 4 &mpic 33 1>;
222 interrupt-parent = <40000>; 211 interrupt-parent = <&mpic>;
223 interrupts = <08 2>; 212 interrupts = <08 2>;
224 bus-range = <0 0>; 213 bus-range = <0 0>;
225 ranges = <02000000 0 80000000 80000000 0 20000000 214 ranges = <02000000 0 80000000 80000000 0 20000000
@@ -243,21 +232,20 @@
243 compatible = "chrp,iic"; 232 compatible = "chrp,iic";
244 big-endian; 233 big-endian;
245 interrupts = <1>; 234 interrupts = <1>;
246 interrupt-parent = <8000>; 235 interrupt-parent = <&pci1>;
247 }; 236 };
248 }; 237 };
249 238
250 pci@9000 { 239 pci@9000 {
251 linux,phandle = <9000>;
252 interrupt-map-mask = <f800 0 0 7>; 240 interrupt-map-mask = <f800 0 0 7>;
253 interrupt-map = < 241 interrupt-map = <
254 242
255 /* IDSEL 0x15 */ 243 /* IDSEL 0x15 */
256 a800 0 0 1 40000 3b 1 244 a800 0 0 1 &mpic 3b 1
257 a800 0 0 2 40000 3b 1 245 a800 0 0 2 &mpic 3b 1
258 a800 0 0 3 40000 3b 1 246 a800 0 0 3 &mpic 3b 1
259 a800 0 0 4 40000 3b 1>; 247 a800 0 0 4 &mpic 3b 1>;
260 interrupt-parent = <40000>; 248 interrupt-parent = <&mpic>;
261 interrupts = <09 2>; 249 interrupts = <09 2>;
262 bus-range = <0 0>; 250 bus-range = <0 0>;
263 ranges = <02000000 0 a0000000 a0000000 0 20000000 251 ranges = <02000000 0 a0000000 a0000000 0 20000000
@@ -271,8 +259,7 @@
271 device_type = "pci"; 259 device_type = "pci";
272 }; 260 };
273 261
274 pic@40000 { 262 mpic: pic@40000 {
275 linux,phandle = <40000>;
276 clock-frequency = <0>; 263 clock-frequency = <0>;
277 interrupt-controller; 264 interrupt-controller;
278 #address-cells = <0>; 265 #address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 118f5a887651..5f9c102a0ab4 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8555CDS"; 14 model = "MPC8555CDS";
15 compatible = "MPC85xxCDS"; 15 compatible = "MPC8555CDS", "MPC85xxCDS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8555@0 { 24 PowerPC,8555@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <0>; // 166 MHz 32 bus-frequency = <0>; // 166 MHz
35 clock-frequency = <0>; // 825 MHz, from uboot 33 clock-frequency = <0>; // 825 MHz, from uboot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 08000000>; // 128M at 0x0 40 reg = <00000000 08000000>; // 128M at 0x0
45 }; 41 };
46 42
@@ -58,7 +54,7 @@
58 compatible = "fsl-i2c"; 54 compatible = "fsl-i2c";
59 reg = <3000 100>; 55 reg = <3000 100>;
60 interrupts = <1b 2>; 56 interrupts = <1b 2>;
61 interrupt-parent = <40000>; 57 interrupt-parent = <&mpic>;
62 dfsrr; 58 dfsrr;
63 }; 59 };
64 60
@@ -68,17 +64,14 @@
68 device_type = "mdio"; 64 device_type = "mdio";
69 compatible = "gianfar"; 65 compatible = "gianfar";
70 reg = <24520 20>; 66 reg = <24520 20>;
71 linux,phandle = <24520>; 67 phy0: ethernet-phy@0 {
72 ethernet-phy@0 { 68 interrupt-parent = <&mpic>;
73 linux,phandle = <2452000>;
74 interrupt-parent = <40000>;
75 interrupts = <35 0>; 69 interrupts = <35 0>;
76 reg = <0>; 70 reg = <0>;
77 device_type = "ethernet-phy"; 71 device_type = "ethernet-phy";
78 }; 72 };
79 ethernet-phy@1 { 73 phy1: ethernet-phy@1 {
80 linux,phandle = <2452001>; 74 interrupt-parent = <&mpic>;
81 interrupt-parent = <40000>;
82 interrupts = <35 0>; 75 interrupts = <35 0>;
83 reg = <1>; 76 reg = <1>;
84 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
@@ -94,8 +87,8 @@
94 reg = <24000 1000>; 87 reg = <24000 1000>;
95 local-mac-address = [ 00 E0 0C 00 73 00 ]; 88 local-mac-address = [ 00 E0 0C 00 73 00 ];
96 interrupts = <0d 2 0e 2 12 2>; 89 interrupts = <0d 2 0e 2 12 2>;
97 interrupt-parent = <40000>; 90 interrupt-parent = <&mpic>;
98 phy-handle = <2452000>; 91 phy-handle = <&phy0>;
99 }; 92 };
100 93
101 ethernet@25000 { 94 ethernet@25000 {
@@ -107,8 +100,8 @@
107 reg = <25000 1000>; 100 reg = <25000 1000>;
108 local-mac-address = [ 00 E0 0C 00 73 01 ]; 101 local-mac-address = [ 00 E0 0C 00 73 01 ];
109 interrupts = <13 2 14 2 18 2>; 102 interrupts = <13 2 14 2 18 2>;
110 interrupt-parent = <40000>; 103 interrupt-parent = <&mpic>;
111 phy-handle = <2452001>; 104 phy-handle = <&phy1>;
112 }; 105 };
113 106
114 serial@4500 { 107 serial@4500 {
@@ -117,7 +110,7 @@
117 reg = <4500 100>; // reg base, size 110 reg = <4500 100>; // reg base, size
118 clock-frequency = <0>; // should we fill in in uboot? 111 clock-frequency = <0>; // should we fill in in uboot?
119 interrupts = <1a 2>; 112 interrupts = <1a 2>;
120 interrupt-parent = <40000>; 113 interrupt-parent = <&mpic>;
121 }; 114 };
122 115
123 serial@4600 { 116 serial@4600 {
@@ -126,57 +119,56 @@
126 reg = <4600 100>; // reg base, size 119 reg = <4600 100>; // reg base, size
127 clock-frequency = <0>; // should we fill in in uboot? 120 clock-frequency = <0>; // should we fill in in uboot?
128 interrupts = <1a 2>; 121 interrupts = <1a 2>;
129 interrupt-parent = <40000>; 122 interrupt-parent = <&mpic>;
130 }; 123 };
131 124
132 pci@8000 { 125 pci1: pci@8000 {
133 linux,phandle = <8000>;
134 interrupt-map-mask = <1f800 0 0 7>; 126 interrupt-map-mask = <1f800 0 0 7>;
135 interrupt-map = < 127 interrupt-map = <
136 128
137 /* IDSEL 0x10 */ 129 /* IDSEL 0x10 */
138 08000 0 0 1 40000 30 1 130 08000 0 0 1 &mpic 30 1
139 08000 0 0 2 40000 31 1 131 08000 0 0 2 &mpic 31 1
140 08000 0 0 3 40000 32 1 132 08000 0 0 3 &mpic 32 1
141 08000 0 0 4 40000 33 1 133 08000 0 0 4 &mpic 33 1
142 134
143 /* IDSEL 0x11 */ 135 /* IDSEL 0x11 */
144 08800 0 0 1 40000 30 1 136 08800 0 0 1 &mpic 30 1
145 08800 0 0 2 40000 31 1 137 08800 0 0 2 &mpic 31 1
146 08800 0 0 3 40000 32 1 138 08800 0 0 3 &mpic 32 1
147 08800 0 0 4 40000 33 1 139 08800 0 0 4 &mpic 33 1
148 140
149 /* IDSEL 0x12 (Slot 1) */ 141 /* IDSEL 0x12 (Slot 1) */
150 09000 0 0 1 40000 30 1 142 09000 0 0 1 &mpic 30 1
151 09000 0 0 2 40000 31 1 143 09000 0 0 2 &mpic 31 1
152 09000 0 0 3 40000 32 1 144 09000 0 0 3 &mpic 32 1
153 09000 0 0 4 40000 33 1 145 09000 0 0 4 &mpic 33 1
154 146
155 /* IDSEL 0x13 (Slot 2) */ 147 /* IDSEL 0x13 (Slot 2) */
156 09800 0 0 1 40000 31 1 148 09800 0 0 1 &mpic 31 1
157 09800 0 0 2 40000 32 1 149 09800 0 0 2 &mpic 32 1
158 09800 0 0 3 40000 33 1 150 09800 0 0 3 &mpic 33 1
159 09800 0 0 4 40000 30 1 151 09800 0 0 4 &mpic 30 1
160 152
161 /* IDSEL 0x14 (Slot 3) */ 153 /* IDSEL 0x14 (Slot 3) */
162 0a000 0 0 1 40000 32 1 154 0a000 0 0 1 &mpic 32 1
163 0a000 0 0 2 40000 33 1 155 0a000 0 0 2 &mpic 33 1
164 0a000 0 0 3 40000 30 1 156 0a000 0 0 3 &mpic 30 1
165 0a000 0 0 4 40000 31 1 157 0a000 0 0 4 &mpic 31 1
166 158
167 /* IDSEL 0x15 (Slot 4) */ 159 /* IDSEL 0x15 (Slot 4) */
168 0a800 0 0 1 40000 33 1 160 0a800 0 0 1 &mpic 33 1
169 0a800 0 0 2 40000 30 1 161 0a800 0 0 2 &mpic 30 1
170 0a800 0 0 3 40000 31 1 162 0a800 0 0 3 &mpic 31 1
171 0a800 0 0 4 40000 32 1 163 0a800 0 0 4 &mpic 32 1
172 164
173 /* Bus 1 (Tundra Bridge) */ 165 /* Bus 1 (Tundra Bridge) */
174 /* IDSEL 0x12 (ISA bridge) */ 166 /* IDSEL 0x12 (ISA bridge) */
175 19000 0 0 1 40000 30 1 167 19000 0 0 1 &mpic 30 1
176 19000 0 0 2 40000 31 1 168 19000 0 0 2 &mpic 31 1
177 19000 0 0 3 40000 32 1 169 19000 0 0 3 &mpic 32 1
178 19000 0 0 4 40000 33 1>; 170 19000 0 0 4 &mpic 33 1>;
179 interrupt-parent = <40000>; 171 interrupt-parent = <&mpic>;
180 interrupts = <08 2>; 172 interrupts = <08 2>;
181 bus-range = <0 0>; 173 bus-range = <0 0>;
182 ranges = <02000000 0 80000000 80000000 0 20000000 174 ranges = <02000000 0 80000000 80000000 0 20000000
@@ -200,21 +192,20 @@
200 compatible = "chrp,iic"; 192 compatible = "chrp,iic";
201 big-endian; 193 big-endian;
202 interrupts = <1>; 194 interrupts = <1>;
203 interrupt-parent = <8000>; 195 interrupt-parent = <&pci1>;
204 }; 196 };
205 }; 197 };
206 198
207 pci@9000 { 199 pci@9000 {
208 linux,phandle = <9000>;
209 interrupt-map-mask = <f800 0 0 7>; 200 interrupt-map-mask = <f800 0 0 7>;
210 interrupt-map = < 201 interrupt-map = <
211 202
212 /* IDSEL 0x15 */ 203 /* IDSEL 0x15 */
213 a800 0 0 1 40000 3b 1 204 a800 0 0 1 &mpic 3b 1
214 a800 0 0 2 40000 3b 1 205 a800 0 0 2 &mpic 3b 1
215 a800 0 0 3 40000 3b 1 206 a800 0 0 3 &mpic 3b 1
216 a800 0 0 4 40000 3b 1>; 207 a800 0 0 4 &mpic 3b 1>;
217 interrupt-parent = <40000>; 208 interrupt-parent = <&mpic>;
218 interrupts = <09 2>; 209 interrupts = <09 2>;
219 bus-range = <0 0>; 210 bus-range = <0 0>;
220 ranges = <02000000 0 a0000000 a0000000 0 20000000 211 ranges = <02000000 0 a0000000 a0000000 0 20000000
@@ -228,8 +219,7 @@
228 device_type = "pci"; 219 device_type = "pci";
229 }; 220 };
230 221
231 pic@40000 { 222 mpic: pic@40000 {
232 linux,phandle = <40000>;
233 clock-frequency = <0>; 223 clock-frequency = <0>;
234 interrupt-controller; 224 interrupt-controller;
235 #address-cells = <0>; 225 #address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index c74d6ebc5c8a..10502638b0e9 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8560ADS"; 14 model = "MPC8560ADS";
15 compatible = "MPC85xxADS"; 15 compatible = "MPC8560ADS", "MPC85xxADS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8560@0 { 24 PowerPC,8560@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <13ab6680>; 32 bus-frequency = <13ab6680>;
35 clock-frequency = <312c8040>; 33 clock-frequency = <312c8040>;
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 10000000>; 40 reg = <00000000 10000000>;
45 }; 41 };
46 42
@@ -57,33 +53,28 @@
57 device_type = "mdio"; 53 device_type = "mdio";
58 compatible = "gianfar"; 54 compatible = "gianfar";
59 reg = <24520 20>; 55 reg = <24520 20>;
60 linux,phandle = <24520>;
61 #address-cells = <1>; 56 #address-cells = <1>;
62 #size-cells = <0>; 57 #size-cells = <0>;
63 ethernet-phy@0 { 58 phy0: ethernet-phy@0 {
64 linux,phandle = <2452000>; 59 interrupt-parent = <&mpic>;
65 interrupt-parent = <40000>;
66 interrupts = <35 1>; 60 interrupts = <35 1>;
67 reg = <0>; 61 reg = <0>;
68 device_type = "ethernet-phy"; 62 device_type = "ethernet-phy";
69 }; 63 };
70 ethernet-phy@1 { 64 phy1: ethernet-phy@1 {
71 linux,phandle = <2452001>; 65 interrupt-parent = <&mpic>;
72 interrupt-parent = <40000>;
73 interrupts = <35 1>; 66 interrupts = <35 1>;
74 reg = <1>; 67 reg = <1>;
75 device_type = "ethernet-phy"; 68 device_type = "ethernet-phy";
76 }; 69 };
77 ethernet-phy@2 { 70 phy2: ethernet-phy@2 {
78 linux,phandle = <2452002>; 71 interrupt-parent = <&mpic>;
79 interrupt-parent = <40000>;
80 interrupts = <37 1>; 72 interrupts = <37 1>;
81 reg = <2>; 73 reg = <2>;
82 device_type = "ethernet-phy"; 74 device_type = "ethernet-phy";
83 }; 75 };
84 ethernet-phy@3 { 76 phy3: ethernet-phy@3 {
85 linux,phandle = <2452003>; 77 interrupt-parent = <&mpic>;
86 interrupt-parent = <40000>;
87 interrupts = <37 1>; 78 interrupts = <37 1>;
88 reg = <3>; 79 reg = <3>;
89 device_type = "ethernet-phy"; 80 device_type = "ethernet-phy";
@@ -97,8 +88,8 @@
97 reg = <24000 1000>; 88 reg = <24000 1000>;
98 address = [ 00 00 0C 00 00 FD ]; 89 address = [ 00 00 0C 00 00 FD ];
99 interrupts = <d 2 e 2 12 2>; 90 interrupts = <d 2 e 2 12 2>;
100 interrupt-parent = <40000>; 91 interrupt-parent = <&mpic>;
101 phy-handle = <2452000>; 92 phy-handle = <&phy0>;
102 }; 93 };
103 94
104 ethernet@25000 { 95 ethernet@25000 {
@@ -110,12 +101,11 @@
110 reg = <25000 1000>; 101 reg = <25000 1000>;
111 address = [ 00 00 0C 00 01 FD ]; 102 address = [ 00 00 0C 00 01 FD ];
112 interrupts = <13 2 14 2 18 2>; 103 interrupts = <13 2 14 2 18 2>;
113 interrupt-parent = <40000>; 104 interrupt-parent = <&mpic>;
114 phy-handle = <2452001>; 105 phy-handle = <&phy1>;
115 }; 106 };
116 107
117 pci@8000 { 108 pci@8000 {
118 linux,phandle = <8000>;
119 #interrupt-cells = <1>; 109 #interrupt-cells = <1>;
120 #size-cells = <2>; 110 #size-cells = <2>;
121 #address-cells = <3>; 111 #address-cells = <3>;
@@ -127,96 +117,94 @@
127 interrupt-map = < 117 interrupt-map = <
128 118
129 /* IDSEL 0x2 */ 119 /* IDSEL 0x2 */
130 1000 0 0 1 40000 31 1 120 1000 0 0 1 &mpic 31 1
131 1000 0 0 2 40000 32 1 121 1000 0 0 2 &mpic 32 1
132 1000 0 0 3 40000 33 1 122 1000 0 0 3 &mpic 33 1
133 1000 0 0 4 40000 34 1 123 1000 0 0 4 &mpic 34 1
134 124
135 /* IDSEL 0x3 */ 125 /* IDSEL 0x3 */
136 1800 0 0 1 40000 34 1 126 1800 0 0 1 &mpic 34 1
137 1800 0 0 2 40000 31 1 127 1800 0 0 2 &mpic 31 1
138 1800 0 0 3 40000 32 1 128 1800 0 0 3 &mpic 32 1
139 1800 0 0 4 40000 33 1 129 1800 0 0 4 &mpic 33 1
140 130
141 /* IDSEL 0x4 */ 131 /* IDSEL 0x4 */
142 2000 0 0 1 40000 33 1 132 2000 0 0 1 &mpic 33 1
143 2000 0 0 2 40000 34 1 133 2000 0 0 2 &mpic 34 1
144 2000 0 0 3 40000 31 1 134 2000 0 0 3 &mpic 31 1
145 2000 0 0 4 40000 32 1 135 2000 0 0 4 &mpic 32 1
146 136
147 /* IDSEL 0x5 */ 137 /* IDSEL 0x5 */
148 2800 0 0 1 40000 32 1 138 2800 0 0 1 &mpic 32 1
149 2800 0 0 2 40000 33 1 139 2800 0 0 2 &mpic 33 1
150 2800 0 0 3 40000 34 1 140 2800 0 0 3 &mpic 34 1
151 2800 0 0 4 40000 31 1 141 2800 0 0 4 &mpic 31 1
152 142
153 /* IDSEL 12 */ 143 /* IDSEL 12 */
154 6000 0 0 1 40000 31 1 144 6000 0 0 1 &mpic 31 1
155 6000 0 0 2 40000 32 1 145 6000 0 0 2 &mpic 32 1
156 6000 0 0 3 40000 33 1 146 6000 0 0 3 &mpic 33 1
157 6000 0 0 4 40000 34 1 147 6000 0 0 4 &mpic 34 1
158 148
159 /* IDSEL 13 */ 149 /* IDSEL 13 */
160 6800 0 0 1 40000 34 1 150 6800 0 0 1 &mpic 34 1
161 6800 0 0 2 40000 31 1 151 6800 0 0 2 &mpic 31 1
162 6800 0 0 3 40000 32 1 152 6800 0 0 3 &mpic 32 1
163 6800 0 0 4 40000 33 1 153 6800 0 0 4 &mpic 33 1
164 154
165 /* IDSEL 14*/ 155 /* IDSEL 14*/
166 7000 0 0 1 40000 33 1 156 7000 0 0 1 &mpic 33 1
167 7000 0 0 2 40000 34 1 157 7000 0 0 2 &mpic 34 1
168 7000 0 0 3 40000 31 1 158 7000 0 0 3 &mpic 31 1
169 7000 0 0 4 40000 32 1 159 7000 0 0 4 &mpic 32 1
170 160
171 /* IDSEL 15 */ 161 /* IDSEL 15 */
172 7800 0 0 1 40000 32 1 162 7800 0 0 1 &mpic 32 1
173 7800 0 0 2 40000 33 1 163 7800 0 0 2 &mpic 33 1
174 7800 0 0 3 40000 34 1 164 7800 0 0 3 &mpic 34 1
175 7800 0 0 4 40000 31 1 165 7800 0 0 4 &mpic 31 1
176 166
177 /* IDSEL 18 */ 167 /* IDSEL 18 */
178 9000 0 0 1 40000 31 1 168 9000 0 0 1 &mpic 31 1
179 9000 0 0 2 40000 32 1 169 9000 0 0 2 &mpic 32 1
180 9000 0 0 3 40000 33 1 170 9000 0 0 3 &mpic 33 1
181 9000 0 0 4 40000 34 1 171 9000 0 0 4 &mpic 34 1
182 172
183 /* IDSEL 19 */ 173 /* IDSEL 19 */
184 9800 0 0 1 40000 34 1 174 9800 0 0 1 &mpic 34 1
185 9800 0 0 2 40000 31 1 175 9800 0 0 2 &mpic 31 1
186 9800 0 0 3 40000 32 1 176 9800 0 0 3 &mpic 32 1
187 9800 0 0 4 40000 33 1 177 9800 0 0 4 &mpic 33 1
188 178
189 /* IDSEL 20 */ 179 /* IDSEL 20 */
190 a000 0 0 1 40000 33 1 180 a000 0 0 1 &mpic 33 1
191 a000 0 0 2 40000 34 1 181 a000 0 0 2 &mpic 34 1
192 a000 0 0 3 40000 31 1 182 a000 0 0 3 &mpic 31 1
193 a000 0 0 4 40000 32 1 183 a000 0 0 4 &mpic 32 1
194 184
195 /* IDSEL 21 */ 185 /* IDSEL 21 */
196 a800 0 0 1 40000 32 1 186 a800 0 0 1 &mpic 32 1
197 a800 0 0 2 40000 33 1 187 a800 0 0 2 &mpic 33 1
198 a800 0 0 3 40000 34 1 188 a800 0 0 3 &mpic 34 1
199 a800 0 0 4 40000 31 1>; 189 a800 0 0 4 &mpic 31 1>;
200 190
201 interrupt-parent = <40000>; 191 interrupt-parent = <&mpic>;
202 interrupts = <8 0>; 192 interrupts = <8 0>;
203 bus-range = <0 0>; 193 bus-range = <0 0>;
204 ranges = <02000000 0 80000000 80000000 0 20000000 194 ranges = <02000000 0 80000000 80000000 0 20000000
205 01000000 0 00000000 e2000000 0 01000000>; 195 01000000 0 00000000 e2000000 0 01000000>;
206 }; 196 };
207 197
208 pic@40000 { 198 mpic: pic@40000 {
209 linux,phandle = <40000>;
210 interrupt-controller; 199 interrupt-controller;
211 #address-cells = <0>; 200 #address-cells = <0>;
212 #interrupt-cells = <2>; 201 #interrupt-cells = <2>;
213 reg = <40000 20100>; 202 reg = <40000 40000>;
214 built-in; 203 built-in;
215 device_type = "open-pic"; 204 device_type = "open-pic";
216 }; 205 };
217 206
218 cpm@e0000000 { 207 cpm@e0000000 {
219 linux,phandle = <e0000000>;
220 #address-cells = <1>; 208 #address-cells = <1>;
221 #size-cells = <1>; 209 #size-cells = <1>;
222 #interrupt-cells = <2>; 210 #interrupt-cells = <2>;
@@ -227,13 +215,12 @@
227 command-proc = <919c0>; 215 command-proc = <919c0>;
228 brg-frequency = <9d5b340>; 216 brg-frequency = <9d5b340>;
229 217
230 pic@90c00 { 218 cpmpic: pic@90c00 {
231 linux,phandle = <90c00>;
232 interrupt-controller; 219 interrupt-controller;
233 #address-cells = <0>; 220 #address-cells = <0>;
234 #interrupt-cells = <2>; 221 #interrupt-cells = <2>;
235 interrupts = <1e 0>; 222 interrupts = <1e 0>;
236 interrupt-parent = <40000>; 223 interrupt-parent = <&mpic>;
237 reg = <90c00 80>; 224 reg = <90c00 80>;
238 built-in; 225 built-in;
239 device_type = "cpm-pic"; 226 device_type = "cpm-pic";
@@ -250,7 +237,7 @@
250 tx-clock = <1>; 237 tx-clock = <1>;
251 current-speed = <1c200>; 238 current-speed = <1c200>;
252 interrupts = <28 8>; 239 interrupts = <28 8>;
253 interrupt-parent = <90c00>; 240 interrupt-parent = <&cpmpic>;
254 }; 241 };
255 242
256 scc@91a20 { 243 scc@91a20 {
@@ -264,7 +251,7 @@
264 tx-clock = <2>; 251 tx-clock = <2>;
265 current-speed = <1c200>; 252 current-speed = <1c200>;
266 interrupts = <29 8>; 253 interrupts = <29 8>;
267 interrupt-parent = <90c00>; 254 interrupt-parent = <&cpmpic>;
268 }; 255 };
269 256
270 fcc@91320 { 257 fcc@91320 {
@@ -278,8 +265,8 @@
278 rx-clock = <15>; 265 rx-clock = <15>;
279 tx-clock = <16>; 266 tx-clock = <16>;
280 interrupts = <21 8>; 267 interrupts = <21 8>;
281 interrupt-parent = <90c00>; 268 interrupt-parent = <&cpmpic>;
282 phy-handle = <2452002>; 269 phy-handle = <&phy2>;
283 }; 270 };
284 271
285 fcc@91340 { 272 fcc@91340 {
@@ -293,8 +280,8 @@
293 rx-clock = <17>; 280 rx-clock = <17>;
294 tx-clock = <18>; 281 tx-clock = <18>;
295 interrupts = <22 8>; 282 interrupts = <22 8>;
296 interrupt-parent = <90c00>; 283 interrupt-parent = <&cpmpic>;
297 phy-handle = <2452003>; 284 phy-handle = <&phy3>;
298 }; 285 };
299 }; 286 };
300 }; 287 };
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 06d24653e422..bf49d8c997b9 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -16,16 +16,14 @@
16 16
17/ { 17/ {
18 model = "MPC8568EMDS"; 18 model = "MPC8568EMDS";
19 compatible = "MPC85xxMDS"; 19 compatible = "MPC8568EMDS", "MPC85xxMDS";
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 linux,phandle = <100>;
23 22
24 cpus { 23 cpus {
25 #cpus = <1>; 24 #cpus = <1>;
26 #address-cells = <1>; 25 #address-cells = <1>;
27 #size-cells = <0>; 26 #size-cells = <0>;
28 linux,phandle = <200>;
29 27
30 PowerPC,8568@0 { 28 PowerPC,8568@0 {
31 device_type = "cpu"; 29 device_type = "cpu";
@@ -38,13 +36,11 @@
38 bus-frequency = <0>; 36 bus-frequency = <0>;
39 clock-frequency = <0>; 37 clock-frequency = <0>;
40 32-bit; 38 32-bit;
41 linux,phandle = <201>;
42 }; 39 };
43 }; 40 };
44 41
45 memory { 42 memory {
46 device_type = "memory"; 43 device_type = "memory";
47 linux,phandle = <300>;
48 reg = <00000000 10000000>; 44 reg = <00000000 10000000>;
49 }; 45 };
50 46
@@ -67,7 +63,7 @@
67 compatible = "fsl-i2c"; 63 compatible = "fsl-i2c";
68 reg = <3000 100>; 64 reg = <3000 100>;
69 interrupts = <1b 2>; 65 interrupts = <1b 2>;
70 interrupt-parent = <40000>; 66 interrupt-parent = <&mpic>;
71 dfsrr; 67 dfsrr;
72 }; 68 };
73 69
@@ -76,7 +72,7 @@
76 compatible = "fsl-i2c"; 72 compatible = "fsl-i2c";
77 reg = <3100 100>; 73 reg = <3100 100>;
78 interrupts = <1b 2>; 74 interrupts = <1b 2>;
79 interrupt-parent = <40000>; 75 interrupt-parent = <&mpic>;
80 dfsrr; 76 dfsrr;
81 }; 77 };
82 78
@@ -86,32 +82,26 @@
86 device_type = "mdio"; 82 device_type = "mdio";
87 compatible = "gianfar"; 83 compatible = "gianfar";
88 reg = <24520 20>; 84 reg = <24520 20>;
89 linux,phandle = <24520>; 85 phy0: ethernet-phy@0 {
90 ethernet-phy@0 { 86 interrupt-parent = <&mpic>;
91 linux,phandle = <2452000>;
92 interrupt-parent = <40000>;
93 interrupts = <31 1>; 87 interrupts = <31 1>;
94 reg = <0>; 88 reg = <0>;
95 device_type = "ethernet-phy"; 89 device_type = "ethernet-phy";
96 }; 90 };
97 ethernet-phy@1 { 91 phy1: ethernet-phy@1 {
98 linux,phandle = <2452001>; 92 interrupt-parent = <&mpic>;
99 interrupt-parent = <40000>;
100 interrupts = <32 1>; 93 interrupts = <32 1>;
101 reg = <1>; 94 reg = <1>;
102 device_type = "ethernet-phy"; 95 device_type = "ethernet-phy";
103 }; 96 };
104 97 phy2: ethernet-phy@2 {
105 ethernet-phy@2 { 98 interrupt-parent = <&mpic>;
106 linux,phandle = <2452002>;
107 interrupt-parent = <40000>;
108 interrupts = <31 1>; 99 interrupts = <31 1>;
109 reg = <2>; 100 reg = <2>;
110 device_type = "ethernet-phy"; 101 device_type = "ethernet-phy";
111 }; 102 };
112 ethernet-phy@3 { 103 phy3: ethernet-phy@3 {
113 linux,phandle = <2452003>; 104 interrupt-parent = <&mpic>;
114 interrupt-parent = <40000>;
115 interrupts = <32 1>; 105 interrupts = <32 1>;
116 reg = <3>; 106 reg = <3>;
117 device_type = "ethernet-phy"; 107 device_type = "ethernet-phy";
@@ -127,8 +117,8 @@
127 reg = <24000 1000>; 117 reg = <24000 1000>;
128 mac-address = [ 00 00 00 00 00 00 ]; 118 mac-address = [ 00 00 00 00 00 00 ];
129 interrupts = <d 2 e 2 12 2>; 119 interrupts = <d 2 e 2 12 2>;
130 interrupt-parent = <40000>; 120 interrupt-parent = <&mpic>;
131 phy-handle = <2452002>; 121 phy-handle = <&phy2>;
132 }; 122 };
133 123
134 ethernet@25000 { 124 ethernet@25000 {
@@ -140,8 +130,8 @@
140 reg = <25000 1000>; 130 reg = <25000 1000>;
141 mac-address = [ 00 00 00 00 00 00]; 131 mac-address = [ 00 00 00 00 00 00];
142 interrupts = <13 2 14 2 18 2>; 132 interrupts = <13 2 14 2 18 2>;
143 interrupt-parent = <40000>; 133 interrupt-parent = <&mpic>;
144 phy-handle = <2452003>; 134 phy-handle = <&phy3>;
145 }; 135 };
146 136
147 serial@4500 { 137 serial@4500 {
@@ -150,7 +140,7 @@
150 reg = <4500 100>; 140 reg = <4500 100>;
151 clock-frequency = <0>; 141 clock-frequency = <0>;
152 interrupts = <1a 2>; 142 interrupts = <1a 2>;
153 interrupt-parent = <40000>; 143 interrupt-parent = <&mpic>;
154 }; 144 };
155 145
156 serial@4600 { 146 serial@4600 {
@@ -159,7 +149,7 @@
159 reg = <4600 100>; 149 reg = <4600 100>;
160 clock-frequency = <0>; 150 clock-frequency = <0>;
161 interrupts = <1a 2>; 151 interrupts = <1a 2>;
162 interrupt-parent = <40000>; 152 interrupt-parent = <&mpic>;
163 }; 153 };
164 154
165 crypto@30000 { 155 crypto@30000 {
@@ -168,15 +158,14 @@
168 compatible = "talitos"; 158 compatible = "talitos";
169 reg = <30000 f000>; 159 reg = <30000 f000>;
170 interrupts = <1d 2>; 160 interrupts = <1d 2>;
171 interrupt-parent = <40000>; 161 interrupt-parent = <&mpic>;
172 num-channels = <4>; 162 num-channels = <4>;
173 channel-fifo-len = <18>; 163 channel-fifo-len = <18>;
174 exec-units-mask = <000000fe>; 164 exec-units-mask = <000000fe>;
175 descriptor-types-mask = <012b0ebf>; 165 descriptor-types-mask = <012b0ebf>;
176 }; 166 };
177 167
178 pic@40000 { 168 mpic: pic@40000 {
179 linux,phandle = <40000>;
180 clock-frequency = <0>; 169 clock-frequency = <0>;
181 interrupt-controller; 170 interrupt-controller;
182 #address-cells = <0>; 171 #address-cells = <0>;
@@ -192,8 +181,7 @@
192 device_type = "par_io"; 181 device_type = "par_io";
193 num-ports = <7>; 182 num-ports = <7>;
194 183
195 ucc_pin@01 { 184 pio1: ucc_pin@01 {
196 linux,phandle = <e010001>;
197 pio-map = < 185 pio-map = <
198 /* port pin dir open_drain assignment has_irq */ 186 /* port pin dir open_drain assignment has_irq */
199 4 0a 1 0 2 0 /* TxD0 */ 187 4 0a 1 0 2 0 /* TxD0 */
@@ -220,8 +208,7 @@
220 4 13 1 0 2 0 /* GTX_CLK */ 208 4 13 1 0 2 0 /* GTX_CLK */
221 1 1f 2 0 3 0>; /* GTX125 */ 209 1 1f 2 0 3 0>; /* GTX125 */
222 }; 210 };
223 ucc_pin@02 { 211 pio2: ucc_pin@02 {
224 linux,phandle = <e010002>;
225 pio-map = < 212 pio-map = <
226 /* port pin dir open_drain assignment has_irq */ 213 /* port pin dir open_drain assignment has_irq */
227 5 0a 1 0 2 0 /* TxD0 */ 214 5 0a 1 0 2 0 /* TxD0 */
@@ -277,7 +264,7 @@
277 compatible = "fsl_spi"; 264 compatible = "fsl_spi";
278 reg = <4c0 40>; 265 reg = <4c0 40>;
279 interrupts = <2>; 266 interrupts = <2>;
280 interrupt-parent = <80>; 267 interrupt-parent = <&qeic>;
281 mode = "cpu"; 268 mode = "cpu";
282 }; 269 };
283 270
@@ -286,7 +273,7 @@
286 compatible = "fsl_spi"; 273 compatible = "fsl_spi";
287 reg = <500 40>; 274 reg = <500 40>;
288 interrupts = <1>; 275 interrupts = <1>;
289 interrupt-parent = <80>; 276 interrupt-parent = <&qeic>;
290 mode = "cpu"; 277 mode = "cpu";
291 }; 278 };
292 279
@@ -297,12 +284,12 @@
297 device-id = <1>; 284 device-id = <1>;
298 reg = <2000 200>; 285 reg = <2000 200>;
299 interrupts = <20>; 286 interrupts = <20>;
300 interrupt-parent = <80>; 287 interrupt-parent = <&qeic>;
301 mac-address = [ 00 04 9f 00 23 23 ]; 288 mac-address = [ 00 04 9f 00 23 23 ];
302 rx-clock = <0>; 289 rx-clock = <0>;
303 tx-clock = <19>; 290 tx-clock = <19>;
304 phy-handle = <212000>; 291 phy-handle = <&qe_phy0>;
305 pio-handle = <e010001>; 292 pio-handle = <&pio1>;
306 }; 293 };
307 294
308 ucc@3000 { 295 ucc@3000 {
@@ -312,12 +299,12 @@
312 device-id = <2>; 299 device-id = <2>;
313 reg = <3000 200>; 300 reg = <3000 200>;
314 interrupts = <21>; 301 interrupts = <21>;
315 interrupt-parent = <80>; 302 interrupt-parent = <&qeic>;
316 mac-address = [ 00 11 22 33 44 55 ]; 303 mac-address = [ 00 11 22 33 44 55 ];
317 rx-clock = <0>; 304 rx-clock = <0>;
318 tx-clock = <14>; 305 tx-clock = <14>;
319 phy-handle = <212001>; 306 phy-handle = <&qe_phy1>;
320 pio-handle = <e010002>; 307 pio-handle = <&pio2>;
321 }; 308 };
322 309
323 mdio@2120 { 310 mdio@2120 {
@@ -329,33 +316,29 @@
329 316
330 /* These are the same PHYs as on 317 /* These are the same PHYs as on
331 * gianfar's MDIO bus */ 318 * gianfar's MDIO bus */
332 ethernet-phy@00 { 319 qe_phy0: ethernet-phy@00 {
333 linux,phandle = <212000>; 320 interrupt-parent = <&mpic>;
334 interrupt-parent = <40000>;
335 interrupts = <31 1>; 321 interrupts = <31 1>;
336 reg = <0>; 322 reg = <0>;
337 device_type = "ethernet-phy"; 323 device_type = "ethernet-phy";
338 interface = <6>; //ENET_1000_GMII 324 interface = <6>; //ENET_1000_GMII
339 }; 325 };
340 ethernet-phy@01 { 326 qe_phy1: ethernet-phy@01 {
341 linux,phandle = <212001>; 327 interrupt-parent = <&mpic>;
342 interrupt-parent = <40000>;
343 interrupts = <32 1>; 328 interrupts = <32 1>;
344 reg = <1>; 329 reg = <1>;
345 device_type = "ethernet-phy"; 330 device_type = "ethernet-phy";
346 interface = <6>; 331 interface = <6>;
347 }; 332 };
348 ethernet-phy@02 { 333 qe_phy2: ethernet-phy@02 {
349 linux,phandle = <212002>; 334 interrupt-parent = <&mpic>;
350 interrupt-parent = <40000>;
351 interrupts = <31 1>; 335 interrupts = <31 1>;
352 reg = <2>; 336 reg = <2>;
353 device_type = "ethernet-phy"; 337 device_type = "ethernet-phy";
354 interface = <6>; //ENET_1000_GMII 338 interface = <6>; //ENET_1000_GMII
355 }; 339 };
356 ethernet-phy@03 { 340 qe_phy3: ethernet-phy@03 {
357 linux,phandle = <212003>; 341 interrupt-parent = <&mpic>;
358 interrupt-parent = <40000>;
359 interrupts = <32 1>; 342 interrupts = <32 1>;
360 reg = <3>; 343 reg = <3>;
361 device_type = "ethernet-phy"; 344 device_type = "ethernet-phy";
@@ -363,8 +346,7 @@
363 }; 346 };
364 }; 347 };
365 348
366 qeic@80 { 349 qeic: qeic@80 {
367 linux,phandle = <80>;
368 interrupt-controller; 350 interrupt-controller;
369 device_type = "qeic"; 351 device_type = "qeic";
370 #address-cells = <0>; 352 #address-cells = <0>;
@@ -373,7 +355,7 @@
373 built-in; 355 built-in;
374 big-endian; 356 big-endian;
375 interrupts = <1e 2 1e 2>; //high:30 low:30 357 interrupts = <1e 2 1e 2>; //high:30 low:30
376 interrupt-parent = <40000>; 358 interrupt-parent = <&mpic>;
377 }; 359 };
378 360
379 }; 361 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-29 07:28:49 -0500