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authorPaul Mundt <lethal@linux-sh.org>2007-11-19 04:57:03 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:18:47 -0500
commit3eeffb32049d4b43b01211a79496cfdaac0c33ad (patch)
treebe6ff10fa38bc5c65f74c3e6fd0b9586ef33ff4e /arch
parent249cfea914002baac0af4b080306e6b820cd86b2 (diff)
sh: Split out tlb-flush in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/mm/Makefile_322
-rw-r--r--arch/sh/mm/Makefile_642
-rw-r--r--arch/sh/mm/tlb-flush_32.c (renamed from arch/sh/mm/tlb-flush.c)0
-rw-r--r--arch/sh/mm/tlb-flush_64.c (renamed from arch/sh64/mm/fault.c)205
4 files changed, 41 insertions, 168 deletions
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
index b43884269c2a..9ea379303742 100644
--- a/arch/sh/mm/Makefile_32
+++ b/arch/sh/mm/Makefile_32
@@ -12,7 +12,7 @@ obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
12endif 12endif
13 13
14mmu-y := tlb-nommu.o pg-nommu.o 14mmu-y := tlb-nommu.o pg-nommu.o
15mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \ 15mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush_32.o \
16 ioremap_32.o 16 ioremap_32.o
17 17
18obj-y += $(mmu-y) 18obj-y += $(mmu-y)
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index 177f92863e4e..ec8deaa17909 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -5,7 +5,7 @@
5obj-y := init.o extable_64.o consistent.o 5obj-y := init.o extable_64.o consistent.o
6 6
7mmu-y := tlb-nommu.o pg-nommu.o 7mmu-y := tlb-nommu.o pg-nommu.o
8mmu-$(CONFIG_MMU) := ioremap_64.o 8mmu-$(CONFIG_MMU) := ioremap_64.o tlb-flush_64.o
9 9
10obj-y += $(mmu-y) 10obj-y += $(mmu-y)
11 11
diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlb-flush_32.c
index 6f45c1f8a7fe..6f45c1f8a7fe 100644
--- a/arch/sh/mm/tlb-flush.c
+++ b/arch/sh/mm/tlb-flush_32.c
diff --git a/arch/sh64/mm/fault.c b/arch/sh/mm/tlb-flush_64.c
index 7c79a1ba8059..2a98c9ec88ff 100644
--- a/arch/sh64/mm/fault.c
+++ b/arch/sh/mm/tlb-flush_64.c
@@ -1,16 +1,14 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mm/tlb-flush_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/fault.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes) 5 * Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes)
10 * Copyright (C) 2003 Paul Mundt 6 * Copyright (C) 2003 Paul Mundt
11 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
12 */ 11 */
13
14#include <linux/signal.h> 12#include <linux/signal.h>
15#include <linux/rwsem.h> 13#include <linux/rwsem.h>
16#include <linux/sched.h> 14#include <linux/sched.h>
@@ -23,39 +21,12 @@
23#include <linux/mm.h> 21#include <linux/mm.h>
24#include <linux/smp.h> 22#include <linux/smp.h>
25#include <linux/interrupt.h> 23#include <linux/interrupt.h>
26
27#include <asm/system.h> 24#include <asm/system.h>
28#include <asm/io.h> 25#include <asm/io.h>
29#include <asm/tlb.h> 26#include <asm/tlb.h>
30#include <asm/uaccess.h> 27#include <asm/uaccess.h>
31#include <asm/pgalloc.h> 28#include <asm/pgalloc.h>
32#include <asm/mmu_context.h> 29#include <asm/mmu_context.h>
33#include <asm/registers.h> /* required by inline asm statements */
34
35#if defined(CONFIG_SH64_PROC_TLB)
36#include <linux/init.h>
37#include <linux/proc_fs.h>
38/* Count numbers of tlb refills in each region */
39static unsigned long long calls_to_update_mmu_cache = 0ULL;
40static unsigned long long calls_to_flush_tlb_page = 0ULL;
41static unsigned long long calls_to_flush_tlb_range = 0ULL;
42static unsigned long long calls_to_flush_tlb_mm = 0ULL;
43static unsigned long long calls_to_flush_tlb_all = 0ULL;
44unsigned long long calls_to_do_slow_page_fault = 0ULL;
45unsigned long long calls_to_do_fast_page_fault = 0ULL;
46
47/* Count size of ranges for flush_tlb_range */
48static unsigned long long flush_tlb_range_1 = 0ULL;
49static unsigned long long flush_tlb_range_2 = 0ULL;
50static unsigned long long flush_tlb_range_3_4 = 0ULL;
51static unsigned long long flush_tlb_range_5_7 = 0ULL;
52static unsigned long long flush_tlb_range_8_11 = 0ULL;
53static unsigned long long flush_tlb_range_12_15 = 0ULL;
54static unsigned long long flush_tlb_range_16_up = 0ULL;
55
56static unsigned long long page_not_present = 0ULL;
57
58#endif
59 30
60extern void die(const char *,struct pt_regs *,long); 31extern void die(const char *,struct pt_regs *,long);
61 32
@@ -87,29 +58,27 @@ static inline void print_task(struct task_struct *tsk)
87static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address) 58static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address)
88{ 59{
89 pgd_t *dir; 60 pgd_t *dir;
61 pud_t *pud;
90 pmd_t *pmd; 62 pmd_t *pmd;
91 pte_t *pte; 63 pte_t *pte;
92 pte_t entry; 64 pte_t entry;
93 65
94 dir = pgd_offset(mm, address); 66 dir = pgd_offset(mm, address);
95 if (pgd_none(*dir)) { 67 if (pgd_none(*dir))
96 return NULL; 68 return NULL;
97 }
98 69
99 pmd = pmd_offset(dir, address); 70 pud = pud_offset(dir, address);
100 if (pmd_none(*pmd)) { 71 if (pud_none(*pud))
72 return NULL;
73
74 pmd = pmd_offset(pud, address);
75 if (pmd_none(*pmd))
101 return NULL; 76 return NULL;
102 }
103 77
104 pte = pte_offset_kernel(pmd, address); 78 pte = pte_offset_kernel(pmd, address);
105 entry = *pte; 79 entry = *pte;
106 80 if (pte_none(entry) || !pte_present(entry))
107 if (pte_none(entry)) {
108 return NULL; 81 return NULL;
109 }
110 if (!pte_present(entry)) {
111 return NULL;
112 }
113 82
114 return pte; 83 return pte;
115} 84}
@@ -129,10 +98,6 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
129 pte_t *pte; 98 pte_t *pte;
130 int fault; 99 int fault;
131 100
132#if defined(CONFIG_SH64_PROC_TLB)
133 ++calls_to_do_slow_page_fault;
134#endif
135
136 /* SIM 101 /* SIM
137 * Note this is now called with interrupts still disabled 102 * Note this is now called with interrupts still disabled
138 * This is to cope with being called for a missing IO port 103 * This is to cope with being called for a missing IO port
@@ -355,16 +320,9 @@ do_sigbus:
355 goto no_context; 320 goto no_context;
356} 321}
357 322
358
359void flush_tlb_all(void);
360
361void update_mmu_cache(struct vm_area_struct * vma, 323void update_mmu_cache(struct vm_area_struct * vma,
362 unsigned long address, pte_t pte) 324 unsigned long address, pte_t pte)
363{ 325{
364#if defined(CONFIG_SH64_PROC_TLB)
365 ++calls_to_update_mmu_cache;
366#endif
367
368 /* 326 /*
369 * This appears to get called once for every pte entry that gets 327 * This appears to get called once for every pte entry that gets
370 * established => I don't think it's efficient to try refilling the 328 * established => I don't think it's efficient to try refilling the
@@ -378,40 +336,29 @@ void update_mmu_cache(struct vm_area_struct * vma,
378 */ 336 */
379} 337}
380 338
381static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 339void local_flush_tlb_one(unsigned long asid, unsigned long page)
382{ 340{
383 unsigned long long match, pteh=0, lpage; 341 unsigned long long match, pteh=0, lpage;
384 unsigned long tlb; 342 unsigned long tlb;
385 struct mm_struct *mm;
386
387 mm = vma->vm_mm;
388
389 if (mm->context == NO_CONTEXT)
390 return;
391 343
392 /* 344 /*
393 * Sign-extend based on neff. 345 * Sign-extend based on neff.
394 */ 346 */
395 lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page; 347 lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page;
396 match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID; 348 match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
397 match |= lpage; 349 match |= lpage;
398 350
399 /* Do ITLB : don't bother for pages in non-exectutable VMAs */ 351 for_each_itlb_entry(tlb) {
400 if (vma->vm_flags & VM_EXEC) { 352 asm volatile ("getcfg %1, 0, %0"
401 for_each_itlb_entry(tlb) { 353 : "=r" (pteh)
402 asm volatile ("getcfg %1, 0, %0" 354 : "r" (tlb) );
403 : "=r" (pteh)
404 : "r" (tlb) );
405
406 if (pteh == match) {
407 __flush_tlb_slot(tlb);
408 break;
409 }
410 355
356 if (pteh == match) {
357 __flush_tlb_slot(tlb);
358 break;
411 } 359 }
412 } 360 }
413 361
414 /* Do DTLB : any page could potentially be in here. */
415 for_each_dtlb_entry(tlb) { 362 for_each_dtlb_entry(tlb) {
416 asm volatile ("getcfg %1, 0, %0" 363 asm volatile ("getcfg %1, 0, %0"
417 : "=r" (pteh) 364 : "=r" (pteh)
@@ -425,52 +372,29 @@ static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
425 } 372 }
426} 373}
427 374
428void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 375void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
429{ 376{
430 unsigned long flags; 377 unsigned long flags;
431 378
432#if defined(CONFIG_SH64_PROC_TLB)
433 ++calls_to_flush_tlb_page;
434#endif
435
436 if (vma->vm_mm) { 379 if (vma->vm_mm) {
437 page &= PAGE_MASK; 380 page &= PAGE_MASK;
438 local_irq_save(flags); 381 local_irq_save(flags);
439 __flush_tlb_page(vma, page); 382 local_flush_tlb_one(get_asid(), page);
440 local_irq_restore(flags); 383 local_irq_restore(flags);
441 } 384 }
442} 385}
443 386
444void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 387void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
445 unsigned long end) 388 unsigned long end)
446{ 389{
447 unsigned long flags; 390 unsigned long flags;
448 unsigned long long match, pteh=0, pteh_epn, pteh_low; 391 unsigned long long match, pteh=0, pteh_epn, pteh_low;
449 unsigned long tlb; 392 unsigned long tlb;
393 unsigned int cpu = smp_processor_id();
450 struct mm_struct *mm; 394 struct mm_struct *mm;
451 395
452 mm = vma->vm_mm; 396 mm = vma->vm_mm;
453 397 if (cpu_context(cpu, mm) == NO_CONTEXT)
454#if defined(CONFIG_SH64_PROC_TLB)
455 ++calls_to_flush_tlb_range;
456
457 {
458 unsigned long size = (end - 1) - start;
459 size >>= 12; /* divide by PAGE_SIZE */
460 size++; /* end=start+4096 => 1 page */
461 switch (size) {
462 case 1 : flush_tlb_range_1++; break;
463 case 2 : flush_tlb_range_2++; break;
464 case 3 ... 4 : flush_tlb_range_3_4++; break;
465 case 5 ... 7 : flush_tlb_range_5_7++; break;
466 case 8 ... 11 : flush_tlb_range_8_11++; break;
467 case 12 ... 15 : flush_tlb_range_12_15++; break;
468 default : flush_tlb_range_16_up++; break;
469 }
470 }
471#endif
472
473 if (mm->context == NO_CONTEXT)
474 return; 398 return;
475 399
476 local_irq_save(flags); 400 local_irq_save(flags);
@@ -478,7 +402,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
478 start &= PAGE_MASK; 402 start &= PAGE_MASK;
479 end &= PAGE_MASK; 403 end &= PAGE_MASK;
480 404
481 match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID; 405 match = (cpu_asid(cpu, mm) << PTEH_ASID_SHIFT) | PTEH_VALID;
482 406
483 /* Flush ITLB */ 407 /* Flush ITLB */
484 for_each_itlb_entry(tlb) { 408 for_each_itlb_entry(tlb) {
@@ -509,94 +433,43 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
509 local_irq_restore(flags); 433 local_irq_restore(flags);
510} 434}
511 435
512void flush_tlb_mm(struct mm_struct *mm) 436void local_flush_tlb_mm(struct mm_struct *mm)
513{ 437{
514 unsigned long flags; 438 unsigned long flags;
439 unsigned int cpu = smp_processor_id();
515 440
516#if defined(CONFIG_SH64_PROC_TLB) 441 if (cpu_context(cpu, mm) == NO_CONTEXT)
517 ++calls_to_flush_tlb_mm;
518#endif
519
520 if (mm->context == NO_CONTEXT)
521 return; 442 return;
522 443
523 local_irq_save(flags); 444 local_irq_save(flags);
524 445
525 mm->context=NO_CONTEXT; 446 cpu_context(cpu, mm) = NO_CONTEXT;
526 if(mm==current->mm) 447 if (mm == current->mm)
527 activate_context(mm); 448 activate_context(mm, cpu);
528 449
529 local_irq_restore(flags); 450 local_irq_restore(flags);
530
531} 451}
532 452
533void flush_tlb_all(void) 453void local_flush_tlb_all(void)
534{ 454{
535 /* Invalidate all, including shared pages, excluding fixed TLBs */ 455 /* Invalidate all, including shared pages, excluding fixed TLBs */
536
537 unsigned long flags, tlb; 456 unsigned long flags, tlb;
538 457
539#if defined(CONFIG_SH64_PROC_TLB)
540 ++calls_to_flush_tlb_all;
541#endif
542
543 local_irq_save(flags); 458 local_irq_save(flags);
544 459
545 /* Flush each ITLB entry */ 460 /* Flush each ITLB entry */
546 for_each_itlb_entry(tlb) { 461 for_each_itlb_entry(tlb)
547 __flush_tlb_slot(tlb); 462 __flush_tlb_slot(tlb);
548 }
549 463
550 /* Flush each DTLB entry */ 464 /* Flush each DTLB entry */
551 for_each_dtlb_entry(tlb) { 465 for_each_dtlb_entry(tlb)
552 __flush_tlb_slot(tlb); 466 __flush_tlb_slot(tlb);
553 }
554 467
555 local_irq_restore(flags); 468 local_irq_restore(flags);
556} 469}
557 470
558void flush_tlb_kernel_range(unsigned long start, unsigned long end) 471void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
559{ 472{
560 /* FIXME: Optimize this later.. */ 473 /* FIXME: Optimize this later.. */
561 flush_tlb_all(); 474 flush_tlb_all();
562} 475}
563
564#if defined(CONFIG_SH64_PROC_TLB)
565/* Procfs interface to read the performance information */
566
567static int
568tlb_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data)
569{
570 int len=0;
571 len += sprintf(buf+len, "do_fast_page_fault called %12lld times\n", calls_to_do_fast_page_fault);
572 len += sprintf(buf+len, "do_slow_page_fault called %12lld times\n", calls_to_do_slow_page_fault);
573 len += sprintf(buf+len, "update_mmu_cache called %12lld times\n", calls_to_update_mmu_cache);
574 len += sprintf(buf+len, "flush_tlb_page called %12lld times\n", calls_to_flush_tlb_page);
575 len += sprintf(buf+len, "flush_tlb_range called %12lld times\n", calls_to_flush_tlb_range);
576 len += sprintf(buf+len, "flush_tlb_mm called %12lld times\n", calls_to_flush_tlb_mm);
577 len += sprintf(buf+len, "flush_tlb_all called %12lld times\n", calls_to_flush_tlb_all);
578 len += sprintf(buf+len, "flush_tlb_range_sizes\n"
579 " 1 : %12lld\n"
580 " 2 : %12lld\n"
581 " 3 - 4 : %12lld\n"
582 " 5 - 7 : %12lld\n"
583 " 8 - 11 : %12lld\n"
584 "12 - 15 : %12lld\n"
585 "16+ : %12lld\n",
586 flush_tlb_range_1, flush_tlb_range_2, flush_tlb_range_3_4,
587 flush_tlb_range_5_7, flush_tlb_range_8_11, flush_tlb_range_12_15,
588 flush_tlb_range_16_up);
589 len += sprintf(buf+len, "page not present %12lld times\n", page_not_present);
590 *eof = 1;
591 return len;
592}
593
594static int __init register_proc_tlb(void)
595{
596 create_proc_read_entry("tlb", 0, NULL, tlb_proc_info, NULL);
597 return 0;
598}
599
600__initcall(register_proc_tlb);
601
602#endif