aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorCatalin Marinas <catalin.marinas@arm.com>2007-02-14 13:18:09 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-15 09:51:21 -0500
commit3edf22ab34e1fdffc8c0c7c7b7da4d0aebdba118 (patch)
treeded29b4b8f5d624fcc226ef2b8b009838126fe91 /arch
parentb3a1bde4db9889feb116330bff21214811c940e4 (diff)
[ARM] 4190/2: Add the secondary GIC support for the RealView/EB
MPCore platform This patch adds the registration of the secondary GIC on the baseboard, together with the IRQ chaining setup. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-realview/realview_eb.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index b6a6f68cb699..00139143dcc1 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -57,7 +57,21 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
57 .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE), 57 .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
58 .length = SZ_4K, 58 .length = SZ_4K,
59 .type = MT_DEVICE, 59 .type = MT_DEVICE,
60 },
61#ifdef CONFIG_REALVIEW_MPCORE
62 {
63 .virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
60 }, { 67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 },
73#endif
74 {
61 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), 75 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
62 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), 76 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
63 .length = SZ_4K, 77 .length = SZ_4K,
@@ -145,6 +159,11 @@ static void __init gic_init_irq(void)
145#endif 159#endif
146 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29); 160 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
147 gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE)); 161 gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
162#ifdef CONFIG_REALVIEW_MPCORE
163 gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
164 gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
165 gic_cascade_irq(1, IRQ_EB_IRQ1);
166#endif
148} 167}
149 168
150static void __init realview_eb_init(void) 169static void __init realview_eb_init(void)