diff options
author | Greg Ungerer <gerg@uclinux.org> | 2009-04-30 08:03:43 -0400 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2009-06-10 23:09:10 -0400 |
commit | 384feb91319766298c6358f23f54873d44c9d8cb (patch) | |
tree | c5d87c43cd16ae0646f10956aeff7c7f9540b2a7 /arch | |
parent | 6f5aa7ce38dfb9c04eecac1222fc4b2521f02b83 (diff) |
m68knommu: add CPU reset code for the 532x ColdFire
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/m68k/include/asm/m532xsim.h | 12 | ||||
-rw-r--r-- | arch/m68knommu/platform/532x/config.c | 12 |
2 files changed, 21 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index ce603451b55e..eb7fd4448947 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h | |||
@@ -127,6 +127,18 @@ | |||
127 | 127 | ||
128 | /********************************************************************* | 128 | /********************************************************************* |
129 | * | 129 | * |
130 | * Reset Controller Module | ||
131 | * | ||
132 | *********************************************************************/ | ||
133 | |||
134 | #define MCF_RCR 0xFC0A0000 | ||
135 | #define MCF_RSR 0xFC0A0001 | ||
136 | |||
137 | #define MCF_RCR_SWRESET 0x80 /* Software reset bit */ | ||
138 | #define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */ | ||
139 | |||
140 | /********************************************************************* | ||
141 | * | ||
130 | * Inter-IC (I2C) Module | 142 | * Inter-IC (I2C) Module |
131 | * | 143 | * |
132 | *********************************************************************/ | 144 | *********************************************************************/ |
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c index 591f2f801134..cdb761971f7a 100644 --- a/arch/m68knommu/platform/532x/config.c +++ b/arch/m68knommu/platform/532x/config.c | |||
@@ -31,8 +31,6 @@ | |||
31 | 31 | ||
32 | /***************************************************************************/ | 32 | /***************************************************************************/ |
33 | 33 | ||
34 | void coldfire_reset(void); | ||
35 | |||
36 | extern unsigned int mcf_timervector; | 34 | extern unsigned int mcf_timervector; |
37 | extern unsigned int mcf_profilevector; | 35 | extern unsigned int mcf_profilevector; |
38 | extern unsigned int mcf_timerlevel; | 36 | extern unsigned int mcf_timerlevel; |
@@ -164,6 +162,14 @@ void mcf_settimericr(unsigned int timer, unsigned int level) | |||
164 | 162 | ||
165 | /***************************************************************************/ | 163 | /***************************************************************************/ |
166 | 164 | ||
165 | static void m532x_cpu_reset(void) | ||
166 | { | ||
167 | local_irq_disable(); | ||
168 | __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); | ||
169 | } | ||
170 | |||
171 | /***************************************************************************/ | ||
172 | |||
167 | void __init config_BSP(char *commandp, int size) | 173 | void __init config_BSP(char *commandp, int size) |
168 | { | 174 | { |
169 | mcf_setimr(MCFSIM_IMR_MASKALL); | 175 | mcf_setimr(MCFSIM_IMR_MASKALL); |
@@ -181,7 +187,7 @@ void __init config_BSP(char *commandp, int size) | |||
181 | 187 | ||
182 | mcf_timervector = 64+32; | 188 | mcf_timervector = 64+32; |
183 | mcf_profilevector = 64+33; | 189 | mcf_profilevector = 64+33; |
184 | mach_reset = coldfire_reset; | 190 | mach_reset = m532x_cpu_reset; |
185 | 191 | ||
186 | #ifdef CONFIG_BDM_DISABLE | 192 | #ifdef CONFIG_BDM_DISABLE |
187 | /* | 193 | /* |