diff options
author | Luke Browning <lukebrowning@us.ibm.com> | 2008-06-05 05:30:25 -0400 |
---|---|---|
committer | Jeremy Kerr <jk@ozlabs.org> | 2008-06-16 00:35:00 -0400 |
commit | 1f64643aa5f5a17f1723f7ea0f17b7a3a8f632b3 (patch) | |
tree | fbefce858013d3b53e48b5d3aa1b640025743241 /arch | |
parent | d84050f48ebba73994b93ccf61cea2364dac8d75 (diff) |
powerpc/spufs: remove class_0_dsisr from spu exception handling
According to the CBEA, the SPU dsisr is not updated for class 0
exceptions.
spu_stopped() is testing the dsisr that was passed to it from the class
0 exception handler, so we return a false positive here.
This patch cleans up the interrupt handler and erroneous tests in
spu_stopped. It also removes the fields from the csa since it is not
needed to process class 0 events.
Signed-off-by: Luke Browning <lukebrowning@us.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/cell/spu_base.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/spufs/run.c | 5 | ||||
-rw-r--r-- | arch/powerpc/xmon/xmon.c | 1 |
3 files changed, 0 insertions, 8 deletions
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 70c660121ec4..96b5f0f1c11e 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c | |||
@@ -324,14 +324,12 @@ spu_irq_class_0(int irq, void *data) | |||
324 | stat = spu_int_stat_get(spu, 0) & mask; | 324 | stat = spu_int_stat_get(spu, 0) & mask; |
325 | 325 | ||
326 | spu->class_0_pending |= stat; | 326 | spu->class_0_pending |= stat; |
327 | spu->class_0_dsisr = spu_mfc_dsisr_get(spu); | ||
328 | spu->class_0_dar = spu_mfc_dar_get(spu); | 327 | spu->class_0_dar = spu_mfc_dar_get(spu); |
329 | spin_unlock(&spu->register_lock); | 328 | spin_unlock(&spu->register_lock); |
330 | 329 | ||
331 | spu->stop_callback(spu, 0); | 330 | spu->stop_callback(spu, 0); |
332 | 331 | ||
333 | spu->class_0_pending = 0; | 332 | spu->class_0_pending = 0; |
334 | spu->class_0_dsisr = 0; | ||
335 | spu->class_0_dar = 0; | 333 | spu->class_0_dar = 0; |
336 | 334 | ||
337 | spu_int_stat_clear(spu, 0, stat); | 335 | spu_int_stat_clear(spu, 0, stat); |
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c index 0046bcfe495a..f7edba6cb795 100644 --- a/arch/powerpc/platforms/cell/spufs/run.c +++ b/arch/powerpc/platforms/cell/spufs/run.c | |||
@@ -27,7 +27,6 @@ void spufs_stop_callback(struct spu *spu, int irq) | |||
27 | switch(irq) { | 27 | switch(irq) { |
28 | case 0 : | 28 | case 0 : |
29 | ctx->csa.class_0_pending = spu->class_0_pending; | 29 | ctx->csa.class_0_pending = spu->class_0_pending; |
30 | ctx->csa.class_0_dsisr = spu->class_0_dsisr; | ||
31 | ctx->csa.class_0_dar = spu->class_0_dar; | 30 | ctx->csa.class_0_dar = spu->class_0_dar; |
32 | break; | 31 | break; |
33 | case 1 : | 32 | case 1 : |
@@ -69,10 +68,6 @@ top: | |||
69 | if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags)) | 68 | if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags)) |
70 | return 1; | 69 | return 1; |
71 | 70 | ||
72 | dsisr = ctx->csa.class_0_dsisr; | ||
73 | if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) | ||
74 | return 1; | ||
75 | |||
76 | dsisr = ctx->csa.class_1_dsisr; | 71 | dsisr = ctx->csa.class_1_dsisr; |
77 | if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) | 72 | if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) |
78 | return 1; | 73 | return 1; |
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 1702de9395ee..bfcf70ee8959 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
@@ -2844,7 +2844,6 @@ static void dump_spu_fields(struct spu *spu) | |||
2844 | DUMP_FIELD(spu, "0x%lx", flags); | 2844 | DUMP_FIELD(spu, "0x%lx", flags); |
2845 | DUMP_FIELD(spu, "%d", class_0_pending); | 2845 | DUMP_FIELD(spu, "%d", class_0_pending); |
2846 | DUMP_FIELD(spu, "0x%lx", class_0_dar); | 2846 | DUMP_FIELD(spu, "0x%lx", class_0_dar); |
2847 | DUMP_FIELD(spu, "0x%lx", class_0_dsisr); | ||
2848 | DUMP_FIELD(spu, "0x%lx", class_1_dar); | 2847 | DUMP_FIELD(spu, "0x%lx", class_1_dar); |
2849 | DUMP_FIELD(spu, "0x%lx", class_1_dsisr); | 2848 | DUMP_FIELD(spu, "0x%lx", class_1_dsisr); |
2850 | DUMP_FIELD(spu, "0x%lx", irqs[0]); | 2849 | DUMP_FIELD(spu, "0x%lx", irqs[0]); |