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authorIngo Molnar <mingo@elte.hu>2009-01-30 20:16:04 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-30 22:21:21 -0500
commited74ca6d5a3e57eb0969d4e14e46cf9f88d25d3f (patch)
treedf50a7c182a216e00338fa5c1ffe97cd38624dfc /arch
parent647ad94fc0479e33958cb4d0e20e241c0bcf599c (diff)
x86, voyager: move Voyager-specific defines to voyager.h
They dont belong into the generic headers. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/hw_irq.h10
-rw-r--r--arch/x86/include/asm/irq_vectors.h35
-rw-r--r--arch/x86/include/asm/voyager.h42
3 files changed, 42 insertions, 45 deletions
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 415507973968..3ef2bded97ac 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -84,16 +84,6 @@ extern atomic_t irq_mis_count;
84/* EISA */ 84/* EISA */
85extern void eisa_set_level_irq(unsigned int irq); 85extern void eisa_set_level_irq(unsigned int irq);
86 86
87/* Voyager functions */
88extern asmlinkage void vic_cpi_interrupt(void);
89extern asmlinkage void vic_sys_interrupt(void);
90extern asmlinkage void vic_cmn_interrupt(void);
91extern asmlinkage void qic_timer_interrupt(void);
92extern asmlinkage void qic_invalidate_interrupt(void);
93extern asmlinkage void qic_reschedule_interrupt(void);
94extern asmlinkage void qic_enable_irq_interrupt(void);
95extern asmlinkage void qic_call_function_interrupt(void);
96
97/* SMP */ 87/* SMP */
98extern void smp_apic_timer_interrupt(struct pt_regs *); 88extern void smp_apic_timer_interrupt(struct pt_regs *);
99extern void smp_spurious_interrupt(struct pt_regs *); 89extern void smp_spurious_interrupt(struct pt_regs *);
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 2601fd108c7d..067d22ffb3ec 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -135,39 +135,4 @@
135 135
136#endif 136#endif
137 137
138/* Voyager specific defines */
139/* These define the CPIs we use in linux */
140#define VIC_CPI_LEVEL0 0
141#define VIC_CPI_LEVEL1 1
142/* now the fake CPIs */
143#define VIC_TIMER_CPI 2
144#define VIC_INVALIDATE_CPI 3
145#define VIC_RESCHEDULE_CPI 4
146#define VIC_ENABLE_IRQ_CPI 5
147#define VIC_CALL_FUNCTION_CPI 6
148#define VIC_CALL_FUNCTION_SINGLE_CPI 7
149
150/* Now the QIC CPIs: Since we don't need the two initial levels,
151 * these are 2 less than the VIC CPIs */
152#define QIC_CPI_OFFSET 1
153#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
154#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
155#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
156#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
157#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
158#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
159
160#define VIC_START_FAKE_CPI VIC_TIMER_CPI
161#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
162
163/* this is the SYS_INT CPI. */
164#define VIC_SYS_INT 8
165#define VIC_CMN_INT 15
166
167/* This is the boot CPI for alternate processors. It gets overwritten
168 * by the above once the system has activated all available processors */
169#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
170#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
171
172
173#endif /* _ASM_X86_IRQ_VECTORS_H */ 138#endif /* _ASM_X86_IRQ_VECTORS_H */
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
index b3e647307625..c1635d43616f 100644
--- a/arch/x86/include/asm/voyager.h
+++ b/arch/x86/include/asm/voyager.h
@@ -527,3 +527,45 @@ extern void voyager_smp_intr_init(void);
527#define VOYAGER_PSI_SUBREAD 2 527#define VOYAGER_PSI_SUBREAD 2
528#define VOYAGER_PSI_SUBWRITE 3 528#define VOYAGER_PSI_SUBWRITE 3
529extern void voyager_cat_psi(__u8, __u16, __u8 *); 529extern void voyager_cat_psi(__u8, __u16, __u8 *);
530
531/* These define the CPIs we use in linux */
532#define VIC_CPI_LEVEL0 0
533#define VIC_CPI_LEVEL1 1
534/* now the fake CPIs */
535#define VIC_TIMER_CPI 2
536#define VIC_INVALIDATE_CPI 3
537#define VIC_RESCHEDULE_CPI 4
538#define VIC_ENABLE_IRQ_CPI 5
539#define VIC_CALL_FUNCTION_CPI 6
540#define VIC_CALL_FUNCTION_SINGLE_CPI 7
541
542/* Now the QIC CPIs: Since we don't need the two initial levels,
543 * these are 2 less than the VIC CPIs */
544#define QIC_CPI_OFFSET 1
545#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
546#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
547#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
548#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
549#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
550#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
551
552#define VIC_START_FAKE_CPI VIC_TIMER_CPI
553#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
554
555/* this is the SYS_INT CPI. */
556#define VIC_SYS_INT 8
557#define VIC_CMN_INT 15
558
559/* This is the boot CPI for alternate processors. It gets overwritten
560 * by the above once the system has activated all available processors */
561#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
562#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
563
564extern asmlinkage void vic_cpi_interrupt(void);
565extern asmlinkage void vic_sys_interrupt(void);
566extern asmlinkage void vic_cmn_interrupt(void);
567extern asmlinkage void qic_timer_interrupt(void);
568extern asmlinkage void qic_invalidate_interrupt(void);
569extern asmlinkage void qic_reschedule_interrupt(void);
570extern asmlinkage void qic_enable_irq_interrupt(void);
571extern asmlinkage void qic_call_function_interrupt(void);