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authorCatalin Marinas <catalin.marinas@arm.com>2008-12-01 09:54:57 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2008-12-01 09:54:57 -0500
commitebac6546df7e8bd17f66f029c616ea9ee3c595ae (patch)
tree98801f44053407dc2990b16fbcfdbc5cb770416c /arch
parent4c3ea3717103ffcccfaebedb98c2dadfb54e0482 (diff)
RealView: Use only the shadow mapping of ARM11MPCore local timers
All the cases where the local timer for a CPU is accessed happen on the corresponding current CPU, hence no need to access the per-CPU local timer mappings. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/smp.h6
-rw-r--r--arch/arm/kernel/smp.c4
-rw-r--r--arch/arm/mach-realview/core.c2
-rw-r--r--arch/arm/mach-realview/core.h3
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h6
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h3
-rw-r--r--arch/arm/mach-realview/localtimer.c44
-rw-r--r--arch/arm/mach-realview/platsmp.c2
-rw-r--r--arch/arm/mach-realview/realview_eb.c3
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c3
10 files changed, 32 insertions, 44 deletions
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 727b5c042e52..fad70da5911d 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void);
114/* 114/*
115 * Stop a local timer interrupt. 115 * Stop a local timer interrupt.
116 */ 116 */
117extern void local_timer_stop(unsigned int cpu); 117extern void local_timer_stop(void);
118 118
119/* 119/*
120 * Platform provides this to acknowledge a local timer IRQ 120 * Platform provides this to acknowledge a local timer IRQ
@@ -123,7 +123,7 @@ extern int local_timer_ack(void);
123 123
124#else 124#else
125 125
126static inline void local_timer_stop(unsigned int cpu) 126static inline void local_timer_stop(void)
127{ 127{
128} 128}
129 129
@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu)
132/* 132/*
133 * Setup a local timer interrupt for a CPU. 133 * Setup a local timer interrupt for a CPU.
134 */ 134 */
135extern void local_timer_setup(unsigned int cpu); 135extern void local_timer_setup(void);
136 136
137/* 137/*
138 * show local interrupt info 138 * show local interrupt info
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index e42a749a56dd..019237d21622 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -181,7 +181,7 @@ int __cpuexit __cpu_disable(void)
181 /* 181 /*
182 * Stop the local timer for this CPU. 182 * Stop the local timer for this CPU.
183 */ 183 */
184 local_timer_stop(cpu); 184 local_timer_stop();
185 185
186 /* 186 /*
187 * Flush user cache and TLB mappings, and then remove this CPU 187 * Flush user cache and TLB mappings, and then remove this CPU
@@ -284,7 +284,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
284 /* 284 /*
285 * Setup local timer for this CPU. 285 * Setup local timer for this CPU.
286 */ 286 */
287 local_timer_setup(cpu); 287 local_timer_setup();
288 288
289 calibrate_delay(); 289 calibrate_delay();
290 290
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index ccd3abdfa4c6..b62799262c6f 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -629,7 +629,7 @@ void __init realview_timer_init(unsigned int timer_irq)
629 * The dummy clock device has to be registered before the main device 629 * The dummy clock device has to be registered before the main device
630 * so that the latter will broadcast the clock events 630 * so that the latter will broadcast the clock events
631 */ 631 */
632 local_timer_setup(smp_processor_id()); 632 local_timer_setup();
633#endif 633#endif
634 634
635 /* 635 /*
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 3cea92c70d8f..3d97a4c84000 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -52,8 +52,7 @@ extern struct clk realview_clcd_clk;
52extern struct clcd_board clcd_plat_data; 52extern struct clcd_board clcd_plat_data;
53extern void __iomem *gic_cpu_base_addr; 53extern void __iomem *gic_cpu_base_addr;
54#ifdef CONFIG_LOCAL_TIMERS 54#ifdef CONFIG_LOCAL_TIMERS
55extern void __iomem *twd_base_addr; 55extern void __iomem *twd_base;
56extern unsigned int twd_size;
57#endif 56#endif
58extern void __iomem *timer0_va_base; 57extern void __iomem *timer0_va_base;
59extern void __iomem *timer1_va_base; 58extern void __iomem *timer1_va_base;
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index e1a6df29eaf6..cdbf551fd3de 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100700 52#define REALVIEW_EB11MP_TWD_BASE 0x10100600
53#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
54#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ 53#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
55#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ 54#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ 55#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
57#else 56#else
58#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ 57#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
59#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ 58#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
60#define REALVIEW_EB11MP_TWD_BASE 0x1F000700 59#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
61#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
62#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ 60#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
63#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ 61#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
64#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e58631e..53ea0e7a1267 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
77 */ 77 */
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ 78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ 79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000700 80#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
81#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
82#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
83#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
84 83
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 44d178cd5733..9019ef2e5611 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -38,18 +38,14 @@ void local_timer_interrupt(void)
38 38
39#ifdef CONFIG_LOCAL_TIMERS 39#ifdef CONFIG_LOCAL_TIMERS
40 40
41#define TWD_BASE(cpu) (twd_base_addr + (cpu) * twd_size)
42
43/* set up by the platform code */ 41/* set up by the platform code */
44void __iomem *twd_base_addr; 42void __iomem *twd_base;
45unsigned int twd_size;
46 43
47static unsigned long mpcore_timer_rate; 44static unsigned long mpcore_timer_rate;
48 45
49static void local_timer_set_mode(enum clock_event_mode mode, 46static void local_timer_set_mode(enum clock_event_mode mode,
50 struct clock_event_device *clk) 47 struct clock_event_device *clk)
51{ 48{
52 void __iomem *base = TWD_BASE(smp_processor_id());
53 unsigned long ctrl; 49 unsigned long ctrl;
54 50
55 switch(mode) { 51 switch(mode) {
@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode,
68 ctrl = 0; 64 ctrl = 0;
69 } 65 }
70 66
71 __raw_writel(ctrl, base + TWD_TIMER_CONTROL); 67 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
72} 68}
73 69
74static int local_timer_set_next_event(unsigned long evt, 70static int local_timer_set_next_event(unsigned long evt,
75 struct clock_event_device *unused) 71 struct clock_event_device *unused)
76{ 72{
77 void __iomem *base = TWD_BASE(smp_processor_id()); 73 unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
78 unsigned long ctrl = __raw_readl(base + TWD_TIMER_CONTROL);
79 74
80 __raw_writel(evt, base + TWD_TIMER_COUNTER); 75 __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
81 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, base + TWD_TIMER_CONTROL); 76 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
82 77
83 return 0; 78 return 0;
84} 79}
@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt,
91 */ 86 */
92int local_timer_ack(void) 87int local_timer_ack(void)
93{ 88{
94 void __iomem *base = TWD_BASE(smp_processor_id()); 89 if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
95 90 __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
96 if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
97 __raw_writel(1, base + TWD_TIMER_INTSTAT);
98 return 1; 91 return 1;
99 } 92 }
100 93
101 return 0; 94 return 0;
102} 95}
103 96
104static void __cpuinit twd_calibrate_rate(unsigned int cpu) 97static void __cpuinit twd_calibrate_rate(void)
105{ 98{
106 void __iomem *base = TWD_BASE(cpu);
107 unsigned long load, count; 99 unsigned long load, count;
108 u64 waitjiffies; 100 u64 waitjiffies;
109 101
@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
124 waitjiffies += 5; 116 waitjiffies += 5;
125 117
126 /* enable, no interrupt or reload */ 118 /* enable, no interrupt or reload */
127 __raw_writel(0x1, base + TWD_TIMER_CONTROL); 119 __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
128 120
129 /* maximum value */ 121 /* maximum value */
130 __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER); 122 __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
131 123
132 while (get_jiffies_64() < waitjiffies) 124 while (get_jiffies_64() < waitjiffies)
133 udelay(10); 125 udelay(10);
134 126
135 count = __raw_readl(base + TWD_TIMER_COUNTER); 127 count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
136 128
137 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); 129 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
138 130
@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
142 134
143 load = mpcore_timer_rate / HZ; 135 load = mpcore_timer_rate / HZ;
144 136
145 __raw_writel(load, base + TWD_TIMER_LOAD); 137 __raw_writel(load, twd_base + TWD_TIMER_LOAD);
146} 138}
147 139
148/* 140/*
149 * Setup the local clock events for a CPU. 141 * Setup the local clock events for a CPU.
150 */ 142 */
151void __cpuinit local_timer_setup(unsigned int cpu) 143void __cpuinit local_timer_setup(void)
152{ 144{
145 unsigned int cpu = smp_processor_id();
153 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 146 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
154 unsigned long flags; 147 unsigned long flags;
155 148
156 twd_calibrate_rate(cpu); 149 twd_calibrate_rate();
157 150
158 clk->name = "local_timer"; 151 clk->name = "local_timer";
159 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 152 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu)
178/* 171/*
179 * take a local timer down 172 * take a local timer down
180 */ 173 */
181void __cpuexit local_timer_stop(unsigned int cpu) 174void __cpuexit local_timer_stop(void)
182{ 175{
183 __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL); 176 __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
184} 177}
185 178
186#else /* CONFIG_LOCAL_TIMERS */ 179#else /* CONFIG_LOCAL_TIMERS */
@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
190{ 183{
191} 184}
192 185
193void __cpuinit local_timer_setup(unsigned int cpu) 186void __cpuinit local_timer_setup(void)
194{ 187{
188 unsigned int cpu = smp_processor_id();
195 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 189 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
196 190
197 clk->name = "dummy_timer"; 191 clk->name = "dummy_timer";
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 8dcb085dca4e..faeb01c76f66 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -238,7 +238,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
238 if ((machine_is_realview_eb() && 238 if ((machine_is_realview_eb() &&
239 (core_tile_eb11mp() || core_tile_a9mp())) || 239 (core_tile_eb11mp() || core_tile_a9mp())) ||
240 machine_is_realview_pb11mp()) 240 machine_is_realview_pb11mp())
241 local_timer_setup(cpu); 241 local_timer_setup();
242#endif 242#endif
243 243
244 /* 244 /*
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 3adb53562985..66dc2561c8c7 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -344,8 +344,7 @@ static void __init realview_eb_timer_init(void)
344 344
345 if (core_tile_eb11mp() || core_tile_a9mp()) { 345 if (core_tile_eb11mp() || core_tile_a9mp()) {
346#ifdef CONFIG_LOCAL_TIMERS 346#ifdef CONFIG_LOCAL_TIMERS
347 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); 347 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
348 twd_size = REALVIEW_EB11MP_TWD_SIZE;
349#endif 348#endif
350 timer_irq = IRQ_EB11MP_TIMER0_1; 349 timer_irq = IRQ_EB11MP_TIMER0_1;
351 } else 350 } else
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 8a27cd0a4741..ba0fb33811aa 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -292,8 +292,7 @@ static void __init realview_pb11mp_timer_init(void)
292 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; 292 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
293 293
294#ifdef CONFIG_LOCAL_TIMERS 294#ifdef CONFIG_LOCAL_TIMERS
295 twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE); 295 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
296 twd_size = REALVIEW_TC11MP_TWD_SIZE;
297#endif 296#endif
298 realview_timer_init(IRQ_TC11MP_TIMER0_1); 297 realview_timer_init(IRQ_TC11MP_TIMER0_1);
299} 298}