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authorJean-Christop PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-02-24 22:20:40 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-27 15:57:46 -0500
commitc633c3cfcf41efe720020553aa3d4782fa0b9bd5 (patch)
treeb7de4fc54682dcbf1c89ca8374a55ce3851be685 /arch
parent22b61a11fd4e6d7a48d694ce350331bebc0394ed (diff)
[ARM] 5412/1: XSCALE: add ice dcc support
SCALE: add ice dcc support Tested on the ixp425 with the ice PEEDI Ack-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig.debug2
-rw-r--r--arch/arm/boot/compressed/head.S6
-rw-r--r--arch/arm/boot/compressed/misc.c15
-rw-r--r--arch/arm/kernel/debug.S27
4 files changed, 49 insertions, 1 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 35f8db35f442..a71fd941ade7 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -77,7 +77,7 @@ config DEBUG_ICEDCC
77 Say Y here if you want the debug print routines to direct their 77 Say Y here if you want the debug print routines to direct their
78 output to the EmbeddedICE macrocell's DCC channel using 78 output to the EmbeddedICE macrocell's DCC channel using
79 co-processor 14. This is known to work on the ARM9 style ICE 79 co-processor 14. This is known to work on the ARM9 style ICE
80 channel. 80 channel and on the XScale with the PEEDI.
81 81
82 It does include a timeout to ensure that the system does not 82 It does include a timeout to ensure that the system does not
83 totally freeze when there is nothing connected to read. 83 totally freeze when there is nothing connected to read.
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 77d614232d81..d1b678dc120b 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -27,6 +27,12 @@
27 .macro writeb, ch, rb 27 .macro writeb, ch, rb
28 mcr p14, 0, \ch, c0, c5, 0 28 mcr p14, 0, \ch, c0, c5, 0
29 .endm 29 .endm
30#elif defined(CONFIG_CPU_XSCALE)
31 .macro loadsp, rb
32 .endm
33 .macro writeb, ch, rb
34 mcr p14, 0, \ch, c8, c0, 0
35 .endm
30#else 36#else
31 .macro loadsp, rb 37 .macro loadsp, rb
32 .endm 38 .endm
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 3fc08413fff0..393c81641314 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -46,6 +46,21 @@ static void icedcc_putc(int ch)
46 46
47 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); 47 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
48} 48}
49#elif defined(CONFIG_CPU_XSCALE)
50
51static void icedcc_putc(int ch)
52{
53 int status, i = 0x4000000;
54
55 do {
56 if (--i < 0)
57 return;
58
59 asm volatile ("mrc p14, 0, %0, c14, c0, 0" : "=r" (status));
60 } while (status & (1 << 28));
61
62 asm("mcr p14, 0, %0, c8, c0, 0" : : "r" (ch));
63}
49 64
50#else 65#else
51 66
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index f53c58290543..b121b6053cce 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -49,6 +49,33 @@
491002: 491002:
50 .endm 50 .endm
51 51
52#elif defined(CONFIG_CPU_XSCALE)
53
54 .macro addruart, rx
55 .endm
56
57 .macro senduart, rd, rx
58 mcr p14, 0, \rd, c8, c0, 0
59 .endm
60
61 .macro busyuart, rd, rx
621001:
63 mrc p14, 0, \rx, c14, c0, 0
64 tst \rx, #0x10000000
65 beq 1001b
66 .endm
67
68 .macro waituart, rd, rx
69 mov \rd, #0x10000000
701001:
71 subs \rd, \rd, #1
72 bmi 1002f
73 mrc p14, 0, \rx, c14, c0, 0
74 tst \rx, #0x10000000
75 bne 1001b
761002:
77 .endm
78
52#else 79#else
53 80
54 .macro addruart, rx 81 .macro addruart, rx