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authorMichael Ellerman <michael@ellerman.id.au>2007-05-07 22:58:37 -0400
committerPaul Mackerras <paulus@samba.org>2007-05-07 23:46:48 -0400
commit05af7bd2d75e5098021864d83fbb831111755fa0 (patch)
treec5319ce0410fdf732679175fa5a4df25cbb0e830 /arch
parenta7de7c74227edda719b257eb15aecd73790ff894 (diff)
[POWERPC] MPIC U3/U4 MSI backend
MPIC U3/U4 MSI backend. Based on code from Segher, heavily hacked by me. This only deals with MSI on U3/U4 MPICs, aka. CPC 9x5. If we find a U3/U4 then we enable this backend, ie. take over the ppc_md MSI hooks. We might need more elaborate logic in future to decide which backend is enabled. We need our own irq_chip so that we can do MSI masking/unmasking on the device itself. We also need to mask explicitly on shutdown to make sure we don't get bitten by lazy-disable semantics. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/sysdev/Makefile2
-rw-r--r--arch/powerpc/sysdev/mpic.c12
-rw-r--r--arch/powerpc/sysdev/mpic.h11
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c186
4 files changed, 205 insertions, 6 deletions
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a1702053297b..d16167977ff0 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -2,7 +2,7 @@ ifeq ($(CONFIG_PPC64),y)
2EXTRA_CFLAGS += -mno-minimal-toc 2EXTRA_CFLAGS += -mno-minimal-toc
3endif 3endif
4 4
5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o 5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o
6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) 6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
7 7
8obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o 8obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index fc0428aea0c0..4fd2bec89916 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -618,7 +618,7 @@ static irqreturn_t mpic_ipi_action(int irq, void *dev_id)
618 */ 618 */
619 619
620 620
621static void mpic_unmask_irq(unsigned int irq) 621void mpic_unmask_irq(unsigned int irq)
622{ 622{
623 unsigned int loops = 100000; 623 unsigned int loops = 100000;
624 struct mpic *mpic = mpic_from_irq(irq); 624 struct mpic *mpic = mpic_from_irq(irq);
@@ -638,7 +638,7 @@ static void mpic_unmask_irq(unsigned int irq)
638 } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK); 638 } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
639} 639}
640 640
641static void mpic_mask_irq(unsigned int irq) 641void mpic_mask_irq(unsigned int irq)
642{ 642{
643 unsigned int loops = 100000; 643 unsigned int loops = 100000;
644 struct mpic *mpic = mpic_from_irq(irq); 644 struct mpic *mpic = mpic_from_irq(irq);
@@ -659,7 +659,7 @@ static void mpic_mask_irq(unsigned int irq)
659 } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK)); 659 } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
660} 660}
661 661
662static void mpic_end_irq(unsigned int irq) 662void mpic_end_irq(unsigned int irq)
663{ 663{
664 struct mpic *mpic = mpic_from_irq(irq); 664 struct mpic *mpic = mpic_from_irq(irq);
665 665
@@ -792,7 +792,7 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
792 } 792 }
793} 793}
794 794
795static int mpic_set_irq_type(unsigned int virq, unsigned int flow_type) 795int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
796{ 796{
797 struct mpic *mpic = mpic_from_irq(virq); 797 struct mpic *mpic = mpic_from_irq(virq);
798 unsigned int src = mpic_irq_to_hw(virq); 798 unsigned int src = mpic_irq_to_hw(virq);
@@ -1203,8 +1203,10 @@ void __init mpic_init(struct mpic *mpic)
1203 1203
1204 /* Do the HT PIC fixups on U3 broken mpic */ 1204 /* Do the HT PIC fixups on U3 broken mpic */
1205 DBG("MPIC flags: %x\n", mpic->flags); 1205 DBG("MPIC flags: %x\n", mpic->flags);
1206 if ((mpic->flags & MPIC_U3_HT_IRQS) && (mpic->flags & MPIC_PRIMARY)) 1206 if ((mpic->flags & MPIC_U3_HT_IRQS) && (mpic->flags & MPIC_PRIMARY)) {
1207 mpic_scan_ht_pics(mpic); 1207 mpic_scan_ht_pics(mpic);
1208 mpic_u3msi_init(mpic);
1209 }
1208 1210
1209 for (i = 0; i < mpic->num_sources; i++) { 1211 for (i = 0; i < mpic->num_sources; i++) {
1210 /* start with vector = source number, and masked */ 1212 /* start with vector = source number, and masked */
diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
index 87cb2aea2fb4..3a1c3d2c594d 100644
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -16,12 +16,23 @@ extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
16extern int mpic_msi_init_allocator(struct mpic *mpic); 16extern int mpic_msi_init_allocator(struct mpic *mpic);
17extern irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num); 17extern irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num);
18extern void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num); 18extern void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num);
19extern int mpic_u3msi_init(struct mpic *mpic);
19#else 20#else
20static inline void mpic_msi_reserve_hwirq(struct mpic *mpic, 21static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
21 irq_hw_number_t hwirq) 22 irq_hw_number_t hwirq)
22{ 23{
23 return; 24 return;
24} 25}
26
27static inline int mpic_u3msi_init(struct mpic *mpic)
28{
29 return -1;
30}
25#endif 31#endif
26 32
33extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
34extern void mpic_end_irq(unsigned int irq);
35extern void mpic_mask_irq(unsigned int irq);
36extern void mpic_unmask_irq(unsigned int irq);
37
27#endif /* _POWERPC_SYSDEV_MPIC_H */ 38#endif /* _POWERPC_SYSDEV_MPIC_H */
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
new file mode 100644
index 000000000000..305b864c25d9
--- /dev/null
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -0,0 +1,186 @@
1/*
2 * Copyright 2006, Segher Boessenkool, IBM Corporation.
3 * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; version 2 of the
8 * License.
9 *
10 */
11
12#include <linux/irq.h>
13#include <linux/bootmem.h>
14#include <linux/msi.h>
15#include <asm/mpic.h>
16#include <asm/prom.h>
17#include <asm/hw_irq.h>
18#include <asm/ppc-pci.h>
19
20#include "mpic.h"
21
22/* A bit ugly, can we get this from the pci_dev somehow? */
23static struct mpic *msi_mpic;
24
25static void mpic_u3msi_mask_irq(unsigned int irq)
26{
27 mask_msi_irq(irq);
28 mpic_mask_irq(irq);
29}
30
31static void mpic_u3msi_unmask_irq(unsigned int irq)
32{
33 mpic_unmask_irq(irq);
34 unmask_msi_irq(irq);
35}
36
37static struct irq_chip mpic_u3msi_chip = {
38 .shutdown = mpic_u3msi_mask_irq,
39 .mask = mpic_u3msi_mask_irq,
40 .unmask = mpic_u3msi_unmask_irq,
41 .eoi = mpic_end_irq,
42 .set_type = mpic_set_irq_type,
43 .typename = "MPIC-U3MSI",
44};
45
46static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos)
47{
48 u8 flags;
49 u32 tmp;
50 u64 addr;
51
52 pci_read_config_byte(pdev, pos + HT_MSI_FLAGS, &flags);
53
54 if (flags & HT_MSI_FLAGS_FIXED)
55 return HT_MSI_FIXED_ADDR;
56
57 pci_read_config_dword(pdev, pos + HT_MSI_ADDR_LO, &tmp);
58 addr = tmp & HT_MSI_ADDR_LO_MASK;
59 pci_read_config_dword(pdev, pos + HT_MSI_ADDR_HI, &tmp);
60 addr = addr | ((u64)tmp << 32);
61
62 return addr;
63}
64
65static u64 find_ht_magic_addr(struct pci_dev *pdev)
66{
67 struct pci_bus *bus;
68 unsigned int pos;
69
70 for (bus = pdev->bus; bus; bus = bus->parent) {
71 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING);
72 if (pos)
73 return read_ht_magic_addr(bus->self, pos);
74 }
75
76 return 0;
77}
78
79static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
80{
81 if (type == PCI_CAP_ID_MSIX)
82 pr_debug("u3msi: MSI-X untested, trying anyway.\n");
83
84 /* If we can't find a magic address then MSI ain't gonna work */
85 if (find_ht_magic_addr(pdev) == 0) {
86 pr_debug("u3msi: no magic address found for %s\n",
87 pci_name(pdev));
88 return -ENXIO;
89 }
90
91 return 0;
92}
93
94static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
95{
96 struct msi_desc *entry;
97
98 list_for_each_entry(entry, &pdev->msi_list, list) {
99 if (entry->irq == NO_IRQ)
100 continue;
101
102 set_irq_msi(entry->irq, NULL);
103 mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq), 1);
104 irq_dispose_mapping(entry->irq);
105 }
106
107 return;
108}
109
110static void u3msi_compose_msi_msg(struct pci_dev *pdev, int virq,
111 struct msi_msg *msg)
112{
113 u64 addr;
114
115 addr = find_ht_magic_addr(pdev);
116 msg->address_lo = addr & 0xFFFFFFFF;
117 msg->address_hi = addr >> 32;
118 msg->data = virq_to_hw(virq);
119
120 pr_debug("u3msi: allocated virq 0x%x (hw 0x%lx) at address 0x%lx\n",
121 virq, virq_to_hw(virq), addr);
122}
123
124static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
125{
126 irq_hw_number_t hwirq;
127 int rc;
128 unsigned int virq;
129 struct msi_desc *entry;
130 struct msi_msg msg;
131
132 list_for_each_entry(entry, &pdev->msi_list, list) {
133 hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1);
134 if (hwirq < 0) {
135 rc = hwirq;
136 pr_debug("u3msi: failed allocating hwirq\n");
137 goto out_free;
138 }
139
140 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
141 if (virq == NO_IRQ) {
142 pr_debug("u3msi: failed mapping hwirq 0x%lx\n", hwirq);
143 mpic_msi_free_hwirqs(msi_mpic, hwirq, 1);
144 rc = -ENOSPC;
145 goto out_free;
146 }
147
148 set_irq_msi(virq, entry);
149 set_irq_chip(virq, &mpic_u3msi_chip);
150 set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
151
152 u3msi_compose_msi_msg(pdev, virq, &msg);
153 write_msi_msg(virq, &msg);
154
155 hwirq++;
156 }
157
158 return 0;
159
160 out_free:
161 u3msi_teardown_msi_irqs(pdev);
162 return rc;
163}
164
165int mpic_u3msi_init(struct mpic *mpic)
166{
167 int rc;
168
169 rc = mpic_msi_init_allocator(mpic);
170 if (rc) {
171 pr_debug("u3msi: Error allocating bitmap!\n");
172 return rc;
173 }
174
175 pr_debug("u3msi: Registering MPIC U3 MSI callbacks.\n");
176
177 BUG_ON(msi_mpic);
178 msi_mpic = mpic;
179
180 WARN_ON(ppc_md.setup_msi_irqs);
181 ppc_md.setup_msi_irqs = u3msi_setup_msi_irqs;
182 ppc_md.teardown_msi_irqs = u3msi_teardown_msi_irqs;
183 ppc_md.msi_check_device = u3msi_msi_check_device;
184
185 return 0;
186}