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authorYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>2009-08-27 09:57:26 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-08-27 21:19:13 -0400
commite79d57479c86e388051244e1f17851a0e63d1ff0 (patch)
tree7f390ec63d97c82e16bb342c62f9d260b5145644 /arch
parentf840dd5e7424a0c8a7166fc3e87798d0e44d3ce7 (diff)
sh: sh7785lcr: fix prototype board on 32bit MMU mode.
Fix up PCA9564 resources on 32bit MMU mode using prototype board. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Tested-by: Raul Porcel <armin76@gentoo.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/boards/Kconfig7
-rw-r--r--arch/sh/boards/board-sh7785lcr.c18
-rw-r--r--arch/sh/include/mach-common/mach/sh7785lcr.h2
-rw-r--r--arch/sh/tools/mach-types1
4 files changed, 28 insertions, 0 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index b66f6d16523e..ee5bb200c715 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -171,6 +171,13 @@ config SH_SH7785LCR_29BIT_PHYSMAPS
171 DIP switch(S2-5). If you set the DIP switch for S2-5 = ON, 171 DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
172 you can access all on-board device in 29bit address mode. 172 you can access all on-board device in 29bit address mode.
173 173
174config SH_SH7785LCR_PT
175 bool "SH7785LCR prototype board on 32-bit MMU mode"
176 depends on SH_SH7785LCR && 32BIT
177 default n
178 help
179 If you use prototype board, this option is enabled.
180
174config SH_URQUELL 181config SH_URQUELL
175 bool "Urquell" 182 bool "Urquell"
176 depends on CPU_SUBTYPE_SH7786 183 depends on CPU_SUBTYPE_SH7786
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 42410a15d255..726427c3522b 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -223,6 +223,19 @@ static struct platform_device sm501_device = {
223 .resource = sm501_resources, 223 .resource = sm501_resources,
224}; 224};
225 225
226static struct resource i2c_proto_resources[] = {
227 [0] = {
228 .start = PCA9564_PROTO_32BIT_ADDR,
229 .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
230 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
231 },
232 [1] = {
233 .start = 12,
234 .end = 12,
235 .flags = IORESOURCE_IRQ,
236 },
237};
238
226static struct resource i2c_resources[] = { 239static struct resource i2c_resources[] = {
227 [0] = { 240 [0] = {
228 .start = PCA9564_ADDR, 241 .start = PCA9564_ADDR,
@@ -271,6 +284,11 @@ static int __init sh7785lcr_devices_setup(void)
271 i2c_register_board_info(0, sh7785lcr_i2c_devices, 284 i2c_register_board_info(0, sh7785lcr_i2c_devices,
272 ARRAY_SIZE(sh7785lcr_i2c_devices)); 285 ARRAY_SIZE(sh7785lcr_i2c_devices));
273 286
287 if (mach_is_sh7785lcr_pt()) {
288 i2c_device.resource = &i2c_proto_resources;
289 i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
290 }
291
274 return platform_add_devices(sh7785lcr_devices, 292 return platform_add_devices(sh7785lcr_devices,
275 ARRAY_SIZE(sh7785lcr_devices)); 293 ARRAY_SIZE(sh7785lcr_devices));
276} 294}
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h
index 90011d435f30..1292ae5c21b3 100644
--- a/arch/sh/include/mach-common/mach/sh7785lcr.h
+++ b/arch/sh/include/mach-common/mach/sh7785lcr.h
@@ -35,6 +35,8 @@
35#define PCA9564_ADDR 0x06000000 /* I2C */ 35#define PCA9564_ADDR 0x06000000 /* I2C */
36#define PCA9564_SIZE 0x00000100 36#define PCA9564_SIZE 0x00000100
37 37
38#define PCA9564_PROTO_32BIT_ADDR 0x14000000
39
38#define SM107_MEM_ADDR 0x10000000 40#define SM107_MEM_ADDR 0x10000000
39#define SM107_MEM_SIZE 0x00e00000 41#define SM107_MEM_SIZE 0x00e00000
40#define SM107_REG_ADDR 0x13e00000 42#define SM107_REG_ADDR 0x13e00000
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index b57362879e0e..6639b25d8d57 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -53,6 +53,7 @@ RSK7203 SH_RSK7203
53AP325RXA SH_AP325RXA 53AP325RXA SH_AP325RXA
54SH7763RDP SH_SH7763RDP 54SH7763RDP SH_SH7763RDP
55SH7785LCR SH_SH7785LCR 55SH7785LCR SH_SH7785LCR
56SH7785LCR_PT SH_SH7785LCR_PT
56URQUELL SH_URQUELL 57URQUELL SH_URQUELL
57ESPT SH_ESPT 58ESPT SH_ESPT
58POLARIS SH_POLARIS 59POLARIS SH_POLARIS