diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-09 20:56:18 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-02-16 22:52:52 -0500 |
commit | d76b782775f1a9e5cd20eabe95e49ba9e03415b0 (patch) | |
tree | 7c2f0108b7b64ee554146d42d9b66819df48a643 /arch | |
parent | 5180f5e036574cb71cbd366fb5e94aac454ce771 (diff) |
ARM: S5P6442: Cleanup map.h file
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s5p6442/include/mach/map.h | 69 |
1 files changed, 37 insertions, 32 deletions
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 203dd5a18bd5..058dab4482a1 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h | 1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h |
2 | * | 2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
5 | * | 5 | * |
6 | * S5P6442 - Memory map definitions | 6 | * S5P6442 - Memory map definitions |
@@ -16,56 +16,61 @@ | |||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
18 | 18 | ||
19 | #define S5P6442_PA_CHIPID (0xE0000000) | 19 | #define S5P6442_PA_SDRAM 0x20000000 |
20 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
21 | 20 | ||
22 | #define S5P6442_PA_SYSCON (0xE0100000) | 21 | #define S5P6442_PA_I2S0 0xC0B00000 |
23 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | 22 | #define S5P6442_PA_I2S1 0xF2200000 |
24 | 23 | ||
25 | #define S5P6442_PA_GPIO (0xE0200000) | 24 | #define S5P6442_PA_CHIPID 0xE0000000 |
26 | 25 | ||
27 | #define S5P6442_PA_VIC0 (0xE4000000) | 26 | #define S5P6442_PA_SYSCON 0xE0100000 |
28 | #define S5P6442_PA_VIC1 (0xE4100000) | ||
29 | #define S5P6442_PA_VIC2 (0xE4200000) | ||
30 | 27 | ||
31 | #define S5P6442_PA_SROMC (0xE7000000) | 28 | #define S5P6442_PA_GPIO 0xE0200000 |
32 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
33 | 29 | ||
34 | #define S5P6442_PA_MDMA 0xE8000000 | 30 | #define S5P6442_PA_VIC0 0xE4000000 |
35 | #define S5P6442_PA_PDMA 0xE9000000 | 31 | #define S5P6442_PA_VIC1 0xE4100000 |
32 | #define S5P6442_PA_VIC2 0xE4200000 | ||
36 | 33 | ||
37 | #define S5P6442_PA_TIMER (0xEA000000) | 34 | #define S5P6442_PA_SROMC 0xE7000000 |
38 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
39 | 35 | ||
40 | #define S5P6442_PA_SYSTIMER (0xEA100000) | 36 | #define S5P6442_PA_MDMA 0xE8000000 |
37 | #define S5P6442_PA_PDMA 0xE9000000 | ||
41 | 38 | ||
42 | #define S5P6442_PA_WATCHDOG (0xEA200000) | 39 | #define S5P6442_PA_TIMER 0xEA000000 |
43 | 40 | ||
44 | #define S5P6442_PA_UART (0xEC000000) | 41 | #define S5P6442_PA_SYSTIMER 0xEA100000 |
45 | 42 | ||
46 | #define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) | 43 | #define S5P6442_PA_WATCHDOG 0xEA200000 |
47 | #define S5P_PA_UART1 (S5P6442_PA_UART + 0x400) | ||
48 | #define S5P_PA_UART2 (S5P6442_PA_UART + 0x800) | ||
49 | #define S5P_SZ_UART SZ_256 | ||
50 | 44 | ||
51 | #define S5P6442_PA_IIC0 (0xEC100000) | 45 | #define S5P6442_PA_UART 0xEC000000 |
52 | 46 | ||
53 | #define S5P6442_PA_SDRAM (0x20000000) | 47 | #define S5P6442_PA_IIC0 0xEC100000 |
54 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
55 | 48 | ||
56 | #define S5P6442_PA_SPI 0xEC300000 | 49 | #define S5P6442_PA_SPI 0xEC300000 |
57 | 50 | ||
58 | /* I2S */ | ||
59 | #define S5P6442_PA_I2S0 0xC0B00000 | ||
60 | #define S5P6442_PA_I2S1 0xF2200000 | ||
61 | |||
62 | /* PCM */ | ||
63 | #define S5P6442_PA_PCM0 0xF2400000 | 51 | #define S5P6442_PA_PCM0 0xF2400000 |
64 | #define S5P6442_PA_PCM1 0xF2500000 | 52 | #define S5P6442_PA_PCM1 0xF2500000 |
65 | 53 | ||
66 | /* compatibiltiy defines. */ | 54 | /* Compatibiltiy Defines */ |
55 | |||
56 | #define S3C_PA_IIC S5P6442_PA_IIC0 | ||
67 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG | 57 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG |
58 | |||
59 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
60 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
61 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
62 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | ||
63 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
64 | |||
65 | /* UART */ | ||
66 | |||
68 | #define S3C_PA_UART S5P6442_PA_UART | 67 | #define S3C_PA_UART S5P6442_PA_UART |
69 | #define S3C_PA_IIC S5P6442_PA_IIC0 | 68 | |
69 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
70 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
71 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
72 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
73 | |||
74 | #define S5P_SZ_UART SZ_256 | ||
70 | 75 | ||
71 | #endif /* __ASM_ARCH_MAP_H */ | 76 | #endif /* __ASM_ARCH_MAP_H */ |