aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2008-11-28 04:51:23 -0500
committerPaul Mackerras <paulus@samba.org>2008-11-30 17:40:18 -0500
commitcc353c30bbdb84f4317a6c149ebb11cde2232e40 (patch)
tree114558272ac12498546e3b19ba069a21e153a40f /arch
parentd015fe9951641b2d869a7ae4a690be2a05a9dc7f (diff)
powerpc/mpic: Don't reset affinity for secondary MPIC on boot
Kexec/kdump currently fails on the IBM QS2x blades when the kexec happens on a CPU other than the initial boot CPU. It turns out that this is the result of mpic_init trying to set affinity of each interrupt vector to the current boot CPU. As far as I can tell, the same problem is likely to exist on any secondary MPIC, because they have to deliver interrupts to the first output all the time. There are two potential solutions for this: either not set up affinity at all for secondary MPICs, or assume that a single CPU output is connected to the upstream interrupt controller and hardcode affinity to that per architecture. This patch implements the second approach, defaulting to the first output. Currently, all known secondary MPICs are routed to their upstream port using the first destination, so we hardcode that. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/sysdev/mpic.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index f6299cca7814..b24e1d085557 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1271,6 +1271,7 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
1271void __init mpic_init(struct mpic *mpic) 1271void __init mpic_init(struct mpic *mpic)
1272{ 1272{
1273 int i; 1273 int i;
1274 int cpu;
1274 1275
1275 BUG_ON(mpic->num_sources == 0); 1276 BUG_ON(mpic->num_sources == 0);
1276 1277
@@ -1313,6 +1314,11 @@ void __init mpic_init(struct mpic *mpic)
1313 1314
1314 mpic_pasemi_msi_init(mpic); 1315 mpic_pasemi_msi_init(mpic);
1315 1316
1317 if (mpic->flags & MPIC_PRIMARY)
1318 cpu = hard_smp_processor_id();
1319 else
1320 cpu = 0;
1321
1316 for (i = 0; i < mpic->num_sources; i++) { 1322 for (i = 0; i < mpic->num_sources; i++) {
1317 /* start with vector = source number, and masked */ 1323 /* start with vector = source number, and masked */
1318 u32 vecpri = MPIC_VECPRI_MASK | i | 1324 u32 vecpri = MPIC_VECPRI_MASK | i |
@@ -1323,8 +1329,7 @@ void __init mpic_init(struct mpic *mpic)
1323 continue; 1329 continue;
1324 /* init hw */ 1330 /* init hw */
1325 mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); 1331 mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
1326 mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1332 mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu);
1327 1 << hard_smp_processor_id());
1328 } 1333 }
1329 1334
1330 /* Init spurious vector */ 1335 /* Init spurious vector */