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authorNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>2008-06-06 04:04:08 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-28 05:10:29 -0400
commitc63847a3621d2bac054f5709783860ecabd0ee7e (patch)
treea04e0aca07d0a672a56b1611544f7d2da0b621e4 /arch
parent04e917b606ffe6ec10fb75c21447162cba31f6b6 (diff)
sh: Add SCIF2 support for SH7763.
SH7763 has 3 SCIF device. Current code supports SCIF0 and 1. SCIF0 and 1 are same register constitution, but only SCIF2 is different. I added support of SCIF2. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index f189a559462b..3b278df8a53b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006 Paul Mundt
5 * Copyright (C) 2007 Yoshihiro Shimoda 5 * Copyright (C) 2007 Yoshihiro Shimoda
6 * Copyright (C) 2008 Nobuhiro Iwamatsu
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -56,6 +57,11 @@ static struct plat_sci_port sci_platform_data[] = {
56 .type = PORT_SCIF, 57 .type = PORT_SCIF,
57 .irqs = { 76, 77, 79, 78 }, 58 .irqs = { 76, 77, 79, 78 },
58 }, { 59 }, {
60 .mapbase = 0xffe10000,
61 .flags = UPF_BOOT_AUTOCONF,
62 .type = PORT_SCIF,
63 .irqs = { 104, 105, 107, 106 },
64 }, {
59 .flags = 0, 65 .flags = 0,
60 } 66 }
61}; 67};
@@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = {
208 INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), 214 INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
209 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), 215 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
210 INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), 216 INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
211 INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20), 217 INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
212 INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60), 218 INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
213 INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0), 219 INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
214 INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0), 220 INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
215}; 221};