diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-23 11:03:09 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-23 11:03:09 -0400 |
commit | b0dcb4a91ddb79f2e213205cf8d86b467f8559c7 (patch) | |
tree | 4e39332805ae940963bf09efd22c6949bbe793b6 /arch | |
parent | 59fcbddaff6f862cc1584b488866d9c4a5579085 (diff) | |
parent | 345953cf9a44b19c98f8c0fe6ca7724202bcdb94 (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc:
powerpc/mm: Fix Respect _PAGE_COHERENT on classic ppc32 SW TLB load machines
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/kernel/head_32.S | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index 7db2e42d97a2..d794a637e421 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
@@ -513,6 +513,9 @@ InstructionTLBMiss: | |||
513 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ | 513 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ |
514 | ori r1,r1,0xe04 /* clear out reserved bits */ | 514 | ori r1,r1,0xe04 /* clear out reserved bits */ |
515 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ | 515 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ |
516 | BEGIN_FTR_SECTION | ||
517 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
518 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
516 | mtspr SPRN_RPA,r1 | 519 | mtspr SPRN_RPA,r1 |
517 | mfspr r3,SPRN_IMISS | 520 | mfspr r3,SPRN_IMISS |
518 | tlbli r3 | 521 | tlbli r3 |
@@ -587,6 +590,9 @@ DataLoadTLBMiss: | |||
587 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ | 590 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ |
588 | ori r1,r1,0xe04 /* clear out reserved bits */ | 591 | ori r1,r1,0xe04 /* clear out reserved bits */ |
589 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ | 592 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ |
593 | BEGIN_FTR_SECTION | ||
594 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
595 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
590 | mtspr SPRN_RPA,r1 | 596 | mtspr SPRN_RPA,r1 |
591 | mfspr r3,SPRN_DMISS | 597 | mfspr r3,SPRN_DMISS |
592 | tlbld r3 | 598 | tlbld r3 |
@@ -655,6 +661,9 @@ DataStoreTLBMiss: | |||
655 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 661 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ |
656 | li r1,0xe05 /* clear out reserved bits & PP lsb */ | 662 | li r1,0xe05 /* clear out reserved bits & PP lsb */ |
657 | andc r1,r3,r1 /* PP = user? 2: 0 */ | 663 | andc r1,r3,r1 /* PP = user? 2: 0 */ |
664 | BEGIN_FTR_SECTION | ||
665 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
666 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
658 | mtspr SPRN_RPA,r1 | 667 | mtspr SPRN_RPA,r1 |
659 | mfspr r3,SPRN_DMISS | 668 | mfspr r3,SPRN_DMISS |
660 | tlbld r3 | 669 | tlbld r3 |