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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2009-09-21 04:40:37 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-09-30 15:46:59 -0400
commit8813d33ee03eee04eb2a8130658d591767d9f4fe (patch)
treeff803f2b8e1cc3b30a13dbf4263236dcde76316c /arch
parentb265158399ad825411f3d471cacc46b00d0e4841 (diff)
MIPS: Loongson2: Fix typo "enalbe" -> "enable"
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Yanhua <yanh@lemote.com> Cc: Robert Richter <robert.richter@amd.com> Acked-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/oprofile/op_model_loongson2.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
index 655cb8dec340..deed1d5d4982 100644
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -44,7 +44,7 @@ static struct loongson2_register_config {
44 unsigned int ctrl; 44 unsigned int ctrl;
45 unsigned long long reset_counter1; 45 unsigned long long reset_counter1;
46 unsigned long long reset_counter2; 46 unsigned long long reset_counter2;
47 int cnt1_enalbed, cnt2_enalbed; 47 int cnt1_enabled, cnt2_enabled;
48} reg; 48} reg;
49 49
50DEFINE_SPINLOCK(sample_lock); 50DEFINE_SPINLOCK(sample_lock);
@@ -81,8 +81,8 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
81 81
82 reg.ctrl = ctrl; 82 reg.ctrl = ctrl;
83 83
84 reg.cnt1_enalbed = cfg[0].enabled; 84 reg.cnt1_enabled = cfg[0].enabled;
85 reg.cnt2_enalbed = cfg[1].enabled; 85 reg.cnt2_enabled = cfg[1].enabled;
86 86
87} 87}
88 88
@@ -99,7 +99,7 @@ static void loongson2_cpu_setup(void *args)
99static void loongson2_cpu_start(void *args) 99static void loongson2_cpu_start(void *args)
100{ 100{
101 /* Start all counters on current CPU */ 101 /* Start all counters on current CPU */
102 if (reg.cnt1_enalbed || reg.cnt2_enalbed) 102 if (reg.cnt1_enabled || reg.cnt2_enabled)
103 write_c0_perfctrl(reg.ctrl); 103 write_c0_perfctrl(reg.ctrl);
104} 104}
105 105
@@ -125,7 +125,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
125 */ 125 */
126 126
127 /* Check whether the irq belongs to me */ 127 /* Check whether the irq belongs to me */
128 enabled = reg.cnt1_enalbed | reg.cnt2_enalbed; 128 enabled = reg.cnt1_enabled | reg.cnt2_enabled;
129 if (!enabled) 129 if (!enabled)
130 return IRQ_NONE; 130 return IRQ_NONE;
131 131
@@ -136,12 +136,12 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
136 spin_lock_irqsave(&sample_lock, flags); 136 spin_lock_irqsave(&sample_lock, flags);
137 137
138 if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) { 138 if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
139 if (reg.cnt1_enalbed) 139 if (reg.cnt1_enabled)
140 oprofile_add_sample(regs, 0); 140 oprofile_add_sample(regs, 0);
141 counter1 = reg.reset_counter1; 141 counter1 = reg.reset_counter1;
142 } 142 }
143 if (counter2 & LOONGSON2_PERFCNT_OVERFLOW) { 143 if (counter2 & LOONGSON2_PERFCNT_OVERFLOW) {
144 if (reg.cnt2_enalbed) 144 if (reg.cnt2_enabled)
145 oprofile_add_sample(regs, 1); 145 oprofile_add_sample(regs, 1);
146 counter2 = reg.reset_counter2; 146 counter2 = reg.reset_counter2;
147 } 147 }