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authorIngo Molnar <mingo@elte.hu>2009-04-08 12:04:48 -0400
committerIngo Molnar <mingo@elte.hu>2009-04-08 12:04:52 -0400
commit280ff388b1b7a818a64af4c789299e62c0d3c094 (patch)
treed63877375029eb895131a37d2eeeac306cc6c7f0 /arch
parentc5da9a2bb24a7928c39495cdabf98d3f7931bde5 (diff)
parent577c9c456f0e1371cbade38eaf91ae8e8a308555 (diff)
Merge commit 'v2.6.30-rc1' into x86/urgent
Merge reason: fix to be queued up depends on upstream facilities Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-davinci/board-evm.c4
-rw-r--r--arch/arm/mach-davinci/usb.c4
-rw-r--r--arch/arm/mach-iop13xx/setup.c8
-rw-r--r--arch/arm/mach-iop13xx/tpmi.c10
-rw-r--r--arch/arm/mach-kirkwood/common.c10
-rw-r--r--arch/arm/mach-mx1/Makefile3
-rw-r--r--arch/arm/mach-mx1/devices.c2
-rw-r--r--arch/arm/mach-mx1/ksym_mx1.c18
-rw-r--r--arch/arm/mach-mx1/mx1_camera_fiq.S35
-rw-r--r--arch/arm/mach-mx3/clock.c2
-rw-r--r--arch/arm/mach-orion5x/common.c6
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx_spi.h1
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c3
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c3
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c3
-rw-r--r--arch/arm/plat-iop/adma.c8
-rw-r--r--arch/arm/plat-mxc/include/mach/i2c.h25
-rw-r--r--arch/arm/plat-mxc/include/mach/memory.h8
-rw-r--r--arch/arm/plat-mxc/include/mach/mx1_camera.h35
-rw-r--r--arch/arm/plat-s3c/dev-i2c0.c7
-rw-r--r--arch/arm/plat-s3c/dev-i2c1.c7
-rw-r--r--arch/arm/plat-s3c/include/plat/iic.h33
-rw-r--r--arch/avr32/boards/hammerhead/flash.c4
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c8
-rw-r--r--arch/blackfin/include/asm/bfin5xx_spi.h5
-rw-r--r--arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h10
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h36
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h29
-rw-r--r--arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h37
-rw-r--r--arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h10
-rw-r--r--arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h117
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h29
-rw-r--r--arch/cris/include/asm/ioctls.h5
-rw-r--r--arch/cris/include/asm/rs485.h8
-rw-r--r--arch/cris/include/asm/termios.h1
-rw-r--r--arch/ia64/kernel/pci-dma.c6
-rw-r--r--arch/ia64/sn/pci/pci_dma.c2
-rw-r--r--arch/mips/alchemy/common/platform.c30
-rw-r--r--arch/mips/alchemy/devboards/pb1200/platform.c4
-rw-r--r--arch/mips/nxp/pnx833x/common/platform.c12
-rw-r--r--arch/mips/nxp/pnx8550/common/platform.c8
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_usb.c8
-rw-r--r--arch/powerpc/Kconfig3
-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts4
-rw-r--r--arch/powerpc/boot/dts/pq2fads.dts20
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts4
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts4
-rw-r--r--arch/powerpc/boot/dts/socrates.dts9
-rw-r--r--arch/powerpc/boot/dts/stx_gp3_8560.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts4
-rw-r--r--arch/powerpc/configs/pseries_defconfig2
-rw-r--r--arch/powerpc/include/asm/lppaca.h2
-rw-r--r--arch/powerpc/include/asm/mpic.h12
-rw-r--r--arch/powerpc/include/asm/ps3fb.h1
-rw-r--r--arch/powerpc/include/asm/pte-common.h6
-rw-r--r--arch/powerpc/include/asm/reg.h30
-rw-r--r--arch/powerpc/include/asm/reg_booke.h30
-rw-r--r--arch/powerpc/include/asm/rtas.h3
-rw-r--r--arch/powerpc/include/asm/sfp-machine.h6
-rw-r--r--arch/powerpc/include/asm/systbl.h3
-rw-r--r--arch/powerpc/include/asm/unistd.h4
-rw-r--r--arch/powerpc/kernel/dma.c2
-rw-r--r--arch/powerpc/kernel/fpu.S5
-rw-r--r--arch/powerpc/kernel/ftrace.c4
-rw-r--r--arch/powerpc/kernel/irq.c4
-rw-r--r--arch/powerpc/kernel/lparcfg.c16
-rw-r--r--arch/powerpc/kernel/misc_64.S8
-rw-r--r--arch/powerpc/kernel/of_platform.c2
-rw-r--r--arch/powerpc/kernel/prom_init.c18
-rw-r--r--arch/powerpc/kernel/ptrace32.c15
-rw-r--r--arch/powerpc/kernel/setup-common.c1
-rw-r--r--arch/powerpc/platforms/cell/iommu.c2
-rw-r--r--arch/powerpc/platforms/iseries/iommu.c4
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c2
-rw-r--r--arch/powerpc/sysdev/mpic.c34
-rw-r--r--arch/x86/include/asm/dma-mapping.h6
-rw-r--r--arch/x86/kernel/ftrace.c1
-rw-r--r--arch/x86/kernel/pci-dma.c8
-rw-r--r--arch/x86/kernel/pci-nommu.c2
82 files changed, 504 insertions, 397 deletions
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c
index 38b6a9ce2a93..0b97a528902b 100644
--- a/arch/arm/mach-davinci/board-evm.c
+++ b/arch/arm/mach-davinci/board-evm.c
@@ -118,7 +118,7 @@ static struct resource ide_resources[] = {
118 }, 118 },
119}; 119};
120 120
121static u64 ide_dma_mask = DMA_32BIT_MASK; 121static u64 ide_dma_mask = DMA_BIT_MASK(32);
122 122
123static struct platform_device ide_dev = { 123static struct platform_device ide_dev = {
124 .name = "palm_bk3710", 124 .name = "palm_bk3710",
@@ -127,7 +127,7 @@ static struct platform_device ide_dev = {
127 .num_resources = ARRAY_SIZE(ide_resources), 127 .num_resources = ARRAY_SIZE(ide_resources),
128 .dev = { 128 .dev = {
129 .dma_mask = &ide_dma_mask, 129 .dma_mask = &ide_dma_mask,
130 .coherent_dma_mask = DMA_32BIT_MASK, 130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 }, 131 },
132}; 132};
133 133
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 69680784448a..2429b79f6da2 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -64,7 +64,7 @@ static struct resource usb_resources[] = {
64 }, 64 },
65}; 65};
66 66
67static u64 usb_dmamask = DMA_32BIT_MASK; 67static u64 usb_dmamask = DMA_BIT_MASK(32);
68 68
69static struct platform_device usb_dev = { 69static struct platform_device usb_dev = {
70 .name = "musb_hdrc", 70 .name = "musb_hdrc",
@@ -72,7 +72,7 @@ static struct platform_device usb_dev = {
72 .dev = { 72 .dev = {
73 .platform_data = &usb_data, 73 .platform_data = &usb_data,
74 .dma_mask = &usb_dmamask, 74 .dma_mask = &usb_dmamask,
75 .coherent_dma_mask = DMA_32BIT_MASK, 75 .coherent_dma_mask = DMA_BIT_MASK(32),
76 }, 76 },
77 .resource = usb_resources, 77 .resource = usb_resources,
78 .num_resources = ARRAY_SIZE(usb_resources), 78 .num_resources = ARRAY_SIZE(usb_resources),
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index cfd4d2e6dacd..bee42c609df6 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -307,7 +307,7 @@ static struct resource iop13xx_adma_2_resources[] = {
307 } 307 }
308}; 308};
309 309
310static u64 iop13xx_adma_dmamask = DMA_64BIT_MASK; 310static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(64);
311static struct iop_adma_platform_data iop13xx_adma_0_data = { 311static struct iop_adma_platform_data iop13xx_adma_0_data = {
312 .hw_id = 0, 312 .hw_id = 0,
313 .pool_size = PAGE_SIZE, 313 .pool_size = PAGE_SIZE,
@@ -331,7 +331,7 @@ static struct platform_device iop13xx_adma_0_channel = {
331 .resource = iop13xx_adma_0_resources, 331 .resource = iop13xx_adma_0_resources,
332 .dev = { 332 .dev = {
333 .dma_mask = &iop13xx_adma_dmamask, 333 .dma_mask = &iop13xx_adma_dmamask,
334 .coherent_dma_mask = DMA_64BIT_MASK, 334 .coherent_dma_mask = DMA_BIT_MASK(64),
335 .platform_data = (void *) &iop13xx_adma_0_data, 335 .platform_data = (void *) &iop13xx_adma_0_data,
336 }, 336 },
337}; 337};
@@ -343,7 +343,7 @@ static struct platform_device iop13xx_adma_1_channel = {
343 .resource = iop13xx_adma_1_resources, 343 .resource = iop13xx_adma_1_resources,
344 .dev = { 344 .dev = {
345 .dma_mask = &iop13xx_adma_dmamask, 345 .dma_mask = &iop13xx_adma_dmamask,
346 .coherent_dma_mask = DMA_64BIT_MASK, 346 .coherent_dma_mask = DMA_BIT_MASK(64),
347 .platform_data = (void *) &iop13xx_adma_1_data, 347 .platform_data = (void *) &iop13xx_adma_1_data,
348 }, 348 },
349}; 349};
@@ -355,7 +355,7 @@ static struct platform_device iop13xx_adma_2_channel = {
355 .resource = iop13xx_adma_2_resources, 355 .resource = iop13xx_adma_2_resources,
356 .dev = { 356 .dev = {
357 .dma_mask = &iop13xx_adma_dmamask, 357 .dma_mask = &iop13xx_adma_dmamask,
358 .coherent_dma_mask = DMA_64BIT_MASK, 358 .coherent_dma_mask = DMA_BIT_MASK(64),
359 .platform_data = (void *) &iop13xx_adma_2_data, 359 .platform_data = (void *) &iop13xx_adma_2_data,
360 }, 360 },
361}; 361};
diff --git a/arch/arm/mach-iop13xx/tpmi.c b/arch/arm/mach-iop13xx/tpmi.c
index c6af1e1bee32..6fdad7a0425a 100644
--- a/arch/arm/mach-iop13xx/tpmi.c
+++ b/arch/arm/mach-iop13xx/tpmi.c
@@ -151,7 +151,7 @@ static struct resource iop13xx_tpmi_3_resources[] = {
151 } 151 }
152}; 152};
153 153
154u64 iop13xx_tpmi_mask = DMA_64BIT_MASK; 154u64 iop13xx_tpmi_mask = DMA_BIT_MASK(64);
155static struct platform_device iop13xx_tpmi_0_device = { 155static struct platform_device iop13xx_tpmi_0_device = {
156 .name = "iop-tpmi", 156 .name = "iop-tpmi",
157 .id = 0, 157 .id = 0,
@@ -159,7 +159,7 @@ static struct platform_device iop13xx_tpmi_0_device = {
159 .resource = iop13xx_tpmi_0_resources, 159 .resource = iop13xx_tpmi_0_resources,
160 .dev = { 160 .dev = {
161 .dma_mask = &iop13xx_tpmi_mask, 161 .dma_mask = &iop13xx_tpmi_mask,
162 .coherent_dma_mask = DMA_64BIT_MASK, 162 .coherent_dma_mask = DMA_BIT_MASK(64),
163 }, 163 },
164}; 164};
165 165
@@ -170,7 +170,7 @@ static struct platform_device iop13xx_tpmi_1_device = {
170 .resource = iop13xx_tpmi_1_resources, 170 .resource = iop13xx_tpmi_1_resources,
171 .dev = { 171 .dev = {
172 .dma_mask = &iop13xx_tpmi_mask, 172 .dma_mask = &iop13xx_tpmi_mask,
173 .coherent_dma_mask = DMA_64BIT_MASK, 173 .coherent_dma_mask = DMA_BIT_MASK(64),
174 }, 174 },
175}; 175};
176 176
@@ -181,7 +181,7 @@ static struct platform_device iop13xx_tpmi_2_device = {
181 .resource = iop13xx_tpmi_2_resources, 181 .resource = iop13xx_tpmi_2_resources,
182 .dev = { 182 .dev = {
183 .dma_mask = &iop13xx_tpmi_mask, 183 .dma_mask = &iop13xx_tpmi_mask,
184 .coherent_dma_mask = DMA_64BIT_MASK, 184 .coherent_dma_mask = DMA_BIT_MASK(64),
185 }, 185 },
186}; 186};
187 187
@@ -192,7 +192,7 @@ static struct platform_device iop13xx_tpmi_3_device = {
192 .resource = iop13xx_tpmi_3_resources, 192 .resource = iop13xx_tpmi_3_resources,
193 .dev = { 193 .dev = {
194 .dma_mask = &iop13xx_tpmi_mask, 194 .dma_mask = &iop13xx_tpmi_mask,
195 .coherent_dma_mask = DMA_64BIT_MASK, 195 .coherent_dma_mask = DMA_BIT_MASK(64),
196 }, 196 },
197}; 197};
198 198
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 3d2fae846512..16dc9ea08393 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -508,7 +508,7 @@ static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
508 .dram = &kirkwood_mbus_dram_info, 508 .dram = &kirkwood_mbus_dram_info,
509}; 509};
510 510
511static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK; 511static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
512 512
513 513
514/***************************************************************************** 514/*****************************************************************************
@@ -559,7 +559,7 @@ static struct platform_device kirkwood_xor00_channel = {
559 .resource = kirkwood_xor00_resources, 559 .resource = kirkwood_xor00_resources,
560 .dev = { 560 .dev = {
561 .dma_mask = &kirkwood_xor_dmamask, 561 .dma_mask = &kirkwood_xor_dmamask,
562 .coherent_dma_mask = DMA_64BIT_MASK, 562 .coherent_dma_mask = DMA_BIT_MASK(64),
563 .platform_data = (void *)&kirkwood_xor00_data, 563 .platform_data = (void *)&kirkwood_xor00_data,
564 }, 564 },
565}; 565};
@@ -585,7 +585,7 @@ static struct platform_device kirkwood_xor01_channel = {
585 .resource = kirkwood_xor01_resources, 585 .resource = kirkwood_xor01_resources,
586 .dev = { 586 .dev = {
587 .dma_mask = &kirkwood_xor_dmamask, 587 .dma_mask = &kirkwood_xor_dmamask,
588 .coherent_dma_mask = DMA_64BIT_MASK, 588 .coherent_dma_mask = DMA_BIT_MASK(64),
589 .platform_data = (void *)&kirkwood_xor01_data, 589 .platform_data = (void *)&kirkwood_xor01_data,
590 }, 590 },
591}; 591};
@@ -657,7 +657,7 @@ static struct platform_device kirkwood_xor10_channel = {
657 .resource = kirkwood_xor10_resources, 657 .resource = kirkwood_xor10_resources,
658 .dev = { 658 .dev = {
659 .dma_mask = &kirkwood_xor_dmamask, 659 .dma_mask = &kirkwood_xor_dmamask,
660 .coherent_dma_mask = DMA_64BIT_MASK, 660 .coherent_dma_mask = DMA_BIT_MASK(64),
661 .platform_data = (void *)&kirkwood_xor10_data, 661 .platform_data = (void *)&kirkwood_xor10_data,
662 }, 662 },
663}; 663};
@@ -683,7 +683,7 @@ static struct platform_device kirkwood_xor11_channel = {
683 .resource = kirkwood_xor11_resources, 683 .resource = kirkwood_xor11_resources,
684 .dev = { 684 .dev = {
685 .dma_mask = &kirkwood_xor_dmamask, 685 .dma_mask = &kirkwood_xor_dmamask,
686 .coherent_dma_mask = DMA_64BIT_MASK, 686 .coherent_dma_mask = DMA_BIT_MASK(64),
687 .platform_data = (void *)&kirkwood_xor11_data, 687 .platform_data = (void *)&kirkwood_xor11_data,
688 }, 688 },
689}; 689};
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
index 82f1309568ef..7f86fe073ec6 100644
--- a/arch/arm/mach-mx1/Makefile
+++ b/arch/arm/mach-mx1/Makefile
@@ -6,6 +6,9 @@
6 6
7obj-y += generic.o clock.o devices.o 7obj-y += generic.o clock.o devices.o
8 8
9# Support for CMOS sensor interface
10obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
11
9# Specific board support 12# Specific board support
10obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o 13obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o
11obj-$(CONFIG_MACH_SCB9328) += scb9328.o \ No newline at end of file 14obj-$(CONFIG_MACH_SCB9328) += scb9328.o \ No newline at end of file
diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c
index 97f42d96d7a1..76d1ffb48079 100644
--- a/arch/arm/mach-mx1/devices.c
+++ b/arch/arm/mach-mx1/devices.c
@@ -44,7 +44,7 @@ static struct resource imx_csi_resources[] = {
44static u64 imx_csi_dmamask = 0xffffffffUL; 44static u64 imx_csi_dmamask = 0xffffffffUL;
45 45
46struct platform_device imx_csi_device = { 46struct platform_device imx_csi_device = {
47 .name = "imx-csi", 47 .name = "mx1-camera",
48 .id = 0, /* This is used to put cameras on this interface */ 48 .id = 0, /* This is used to put cameras on this interface */
49 .dev = { 49 .dev = {
50 .dma_mask = &imx_csi_dmamask, 50 .dma_mask = &imx_csi_dmamask,
diff --git a/arch/arm/mach-mx1/ksym_mx1.c b/arch/arm/mach-mx1/ksym_mx1.c
new file mode 100644
index 000000000000..b09ee12a4ff0
--- /dev/null
+++ b/arch/arm/mach-mx1/ksym_mx1.c
@@ -0,0 +1,18 @@
1/*
2 * Exported ksyms of ARCH_MX1
3 *
4 * Copyright (C) 2008, Darius Augulis <augulis.darius@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/module.h>
13
14#include <mach/mx1_camera.h>
15
16/* IMX camera FIQ handler */
17EXPORT_SYMBOL(mx1_camera_sof_fiq_start);
18EXPORT_SYMBOL(mx1_camera_sof_fiq_end);
diff --git a/arch/arm/mach-mx1/mx1_camera_fiq.S b/arch/arm/mach-mx1/mx1_camera_fiq.S
new file mode 100644
index 000000000000..9c69aa65bf17
--- /dev/null
+++ b/arch/arm/mach-mx1/mx1_camera_fiq.S
@@ -0,0 +1,35 @@
1/*
2 * Copyright (C) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
3 *
4 * Based on linux/arch/arm/lib/floppydma.S
5 * Copyright (C) 1995, 1996 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/linkage.h>
12#include <asm/assembler.h>
13
14 .text
15 .global mx1_camera_sof_fiq_end
16 .global mx1_camera_sof_fiq_start
17mx1_camera_sof_fiq_start:
18 @ enable dma
19 ldr r12, [r9]
20 orr r12, r12, #0x00000001
21 str r12, [r9]
22 @ unmask DMA interrupt
23 ldr r12, [r8]
24 bic r12, r12, r13
25 str r12, [r8]
26 @ disable SOF interrupt
27 ldr r12, [r10]
28 bic r12, r12, #0x00010000
29 str r12, [r10]
30 @ clear SOF flag
31 mov r12, #0x00010000
32 str r12, [r11]
33 @ return from FIQ
34 subs pc, lr, #4
35mx1_camera_sof_fiq_end:
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index ca46f4801c3d..9957a11533a4 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -533,7 +533,7 @@ static struct clk_lookup lookups[] __initdata = {
533 _REGISTER_CLOCK(NULL, "kpp", kpp_clk) 533 _REGISTER_CLOCK(NULL, "kpp", kpp_clk)
534 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) 534 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)
535 _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) 535 _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)
536 _REGISTER_CLOCK("mx3-camera.0", "csi", csi_clk) 536 _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
537 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) 537 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
538 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) 538 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
539 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) 539 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 68cc3efae567..6af99ddabdfb 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -463,7 +463,7 @@ static struct platform_device orion5x_xor_shared = {
463 .resource = orion5x_xor_shared_resources, 463 .resource = orion5x_xor_shared_resources,
464}; 464};
465 465
466static u64 orion5x_xor_dmamask = DMA_32BIT_MASK; 466static u64 orion5x_xor_dmamask = DMA_BIT_MASK(32);
467 467
468static struct resource orion5x_xor0_resources[] = { 468static struct resource orion5x_xor0_resources[] = {
469 [0] = { 469 [0] = {
@@ -486,7 +486,7 @@ static struct platform_device orion5x_xor0_channel = {
486 .resource = orion5x_xor0_resources, 486 .resource = orion5x_xor0_resources,
487 .dev = { 487 .dev = {
488 .dma_mask = &orion5x_xor_dmamask, 488 .dma_mask = &orion5x_xor_dmamask,
489 .coherent_dma_mask = DMA_64BIT_MASK, 489 .coherent_dma_mask = DMA_BIT_MASK(64),
490 .platform_data = (void *)&orion5x_xor0_data, 490 .platform_data = (void *)&orion5x_xor0_data,
491 }, 491 },
492}; 492};
@@ -512,7 +512,7 @@ static struct platform_device orion5x_xor1_channel = {
512 .resource = orion5x_xor1_resources, 512 .resource = orion5x_xor1_resources,
513 .dev = { 513 .dev = {
514 .dma_mask = &orion5x_xor_dmamask, 514 .dma_mask = &orion5x_xor_dmamask,
515 .coherent_dma_mask = DMA_64BIT_MASK, 515 .coherent_dma_mask = DMA_BIT_MASK(64),
516 .platform_data = (void *)&orion5x_xor1_data, 516 .platform_data = (void *)&orion5x_xor1_data,
517 }, 517 },
518}; 518};
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h b/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
index 2206cb61a9f9..b87cecd9bbdc 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
@@ -38,6 +38,7 @@ struct pxa2xx_spi_chip {
38 u8 dma_burst_size; 38 u8 dma_burst_size;
39 u32 timeout; 39 u32 timeout;
40 u8 enable_loopback; 40 u8 enable_loopback;
41 int gpio_cs;
41 void (*cs_control)(u32 command); 42 void (*cs_control)(u32 command);
42}; 43};
43 44
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 01bd76725b92..4389c160f7d0 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -409,8 +409,7 @@ static struct platform_device bast_sio = {
409static struct s3c2410_platform_i2c __initdata bast_i2c_info = { 409static struct s3c2410_platform_i2c __initdata bast_i2c_info = {
410 .flags = 0, 410 .flags = 0,
411 .slave_addr = 0x10, 411 .slave_addr = 0x10,
412 .bus_freq = 100*1000, 412 .frequency = 100*1000,
413 .max_freq = 130*1000,
414}; 413};
415 414
416/* Asix AX88796 10/100 ethernet controller */ 415/* Asix AX88796 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 05a5e877b49b..2b83f8707710 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -340,8 +340,7 @@ static struct platform_device *n35_devices[] __initdata = {
340static struct s3c2410_platform_i2c n30_i2ccfg = { 340static struct s3c2410_platform_i2c n30_i2ccfg = {
341 .flags = 0, 341 .flags = 0,
342 .slave_addr = 0x10, 342 .slave_addr = 0x10,
343 .bus_freq = 10*1000, 343 .frequency = 10*1000,
344 .max_freq = 10*1000,
345}; 344};
346 345
347/* Lots of hardcoded stuff, but it sets up the hardware in a useful 346/* Lots of hardcoded stuff, but it sets up the hardware in a useful
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 72c266aee141..332bd3263eaf 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -453,8 +453,7 @@ static struct spi_board_info __initdata jive_spi_devs[] = {
453/* I2C bus and device configuration. */ 453/* I2C bus and device configuration. */
454 454
455static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = { 455static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
456 .max_freq = 80 * 1000, 456 .frequency = 80 * 1000,
457 .bus_freq = 50 * 1000,
458 .flags = S3C_IICFLG_FILTER, 457 .flags = S3C_IICFLG_FILTER,
459 .sda_delay = 2, 458 .sda_delay = 2,
460}; 459};
diff --git a/arch/arm/plat-iop/adma.c b/arch/arm/plat-iop/adma.c
index f72420821619..3c127aabe214 100644
--- a/arch/arm/plat-iop/adma.c
+++ b/arch/arm/plat-iop/adma.c
@@ -119,7 +119,7 @@ static struct resource iop3xx_aau_resources[] = {
119 } 119 }
120}; 120};
121 121
122static u64 iop3xx_adma_dmamask = DMA_32BIT_MASK; 122static u64 iop3xx_adma_dmamask = DMA_BIT_MASK(32);
123 123
124static struct iop_adma_platform_data iop3xx_dma_0_data = { 124static struct iop_adma_platform_data iop3xx_dma_0_data = {
125 .hw_id = DMA0_ID, 125 .hw_id = DMA0_ID,
@@ -143,7 +143,7 @@ struct platform_device iop3xx_dma_0_channel = {
143 .resource = iop3xx_dma_0_resources, 143 .resource = iop3xx_dma_0_resources,
144 .dev = { 144 .dev = {
145 .dma_mask = &iop3xx_adma_dmamask, 145 .dma_mask = &iop3xx_adma_dmamask,
146 .coherent_dma_mask = DMA_64BIT_MASK, 146 .coherent_dma_mask = DMA_BIT_MASK(64),
147 .platform_data = (void *) &iop3xx_dma_0_data, 147 .platform_data = (void *) &iop3xx_dma_0_data,
148 }, 148 },
149}; 149};
@@ -155,7 +155,7 @@ struct platform_device iop3xx_dma_1_channel = {
155 .resource = iop3xx_dma_1_resources, 155 .resource = iop3xx_dma_1_resources,
156 .dev = { 156 .dev = {
157 .dma_mask = &iop3xx_adma_dmamask, 157 .dma_mask = &iop3xx_adma_dmamask,
158 .coherent_dma_mask = DMA_64BIT_MASK, 158 .coherent_dma_mask = DMA_BIT_MASK(64),
159 .platform_data = (void *) &iop3xx_dma_1_data, 159 .platform_data = (void *) &iop3xx_dma_1_data,
160 }, 160 },
161}; 161};
@@ -167,7 +167,7 @@ struct platform_device iop3xx_aau_channel = {
167 .resource = iop3xx_aau_resources, 167 .resource = iop3xx_aau_resources,
168 .dev = { 168 .dev = {
169 .dma_mask = &iop3xx_adma_dmamask, 169 .dma_mask = &iop3xx_adma_dmamask,
170 .coherent_dma_mask = DMA_64BIT_MASK, 170 .coherent_dma_mask = DMA_BIT_MASK(64),
171 .platform_data = (void *) &iop3xx_aau_data, 171 .platform_data = (void *) &iop3xx_aau_data,
172 }, 172 },
173}; 173};
diff --git a/arch/arm/plat-mxc/include/mach/i2c.h b/arch/arm/plat-mxc/include/mach/i2c.h
new file mode 100644
index 000000000000..4a5dc5c6d8e8
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/i2c.h
@@ -0,0 +1,25 @@
1/*
2 * i2c.h - i.MX I2C driver header file
3 *
4 * Copyright (c) 2008, Darius Augulis <augulis.darius@gmail.com>
5 *
6 * This file is released under the GPLv2
7 */
8
9#ifndef __ASM_ARCH_I2C_H_
10#define __ASM_ARCH_I2C_H_
11
12/**
13 * struct imxi2c_platform_data - structure of platform data for MXC I2C driver
14 * @init: Initialise gpio's and other board specific things
15 * @exit: Free everything initialised by @init
16 * @bitrate: Bus speed measured in Hz
17 *
18 **/
19struct imxi2c_platform_data {
20 int (*init)(struct device *dev);
21 void (*exit)(struct device *dev);
22 int bitrate;
23};
24
25#endif /* __ASM_ARCH_I2C_H_ */
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index e0783e619580..eca37d09f3f8 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -24,4 +24,12 @@
24#define PHYS_OFFSET UL(0x80000000) 24#define PHYS_OFFSET UL(0x80000000)
25#endif 25#endif
26 26
27#if defined(CONFIG_MX1_VIDEO)
28/*
29 * Increase size of DMA-consistent memory region.
30 * This is required for i.MX camera driver to capture at least four VGA frames.
31 */
32#define CONSISTENT_DMA_SIZE SZ_4M
33#endif /* CONFIG_MX1_VIDEO */
34
27#endif /* __ASM_ARCH_MXC_MEMORY_H__ */ 35#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1_camera.h b/arch/arm/plat-mxc/include/mach/mx1_camera.h
new file mode 100644
index 000000000000..4fd6c70314b4
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx1_camera.h
@@ -0,0 +1,35 @@
1/*
2 * mx1_camera.h - i.MX1/i.MXL camera driver header file
3 *
4 * Copyright (c) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
6 *
7 * Based on PXA camera.h file:
8 * Copyright (C) 2003, Intel Corporation
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#ifndef __ASM_ARCH_CAMERA_H_
17#define __ASM_ARCH_CAMERA_H_
18
19#define MX1_CAMERA_DATA_HIGH 1
20#define MX1_CAMERA_PCLK_RISING 2
21#define MX1_CAMERA_VSYNC_HIGH 4
22
23extern unsigned char mx1_camera_sof_fiq_start, mx1_camera_sof_fiq_end;
24
25/**
26 * struct mx1_camera_pdata - i.MX1/i.MXL camera platform data
27 * @mclk_10khz: master clock frequency in 10kHz units
28 * @flags: MX1 camera platform flags
29 */
30struct mx1_camera_pdata {
31 unsigned long mclk_10khz;
32 unsigned long flags;
33};
34
35#endif /* __ASM_ARCH_CAMERA_H_ */
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-s3c/dev-i2c0.c
index fe327074037e..428372868fbb 100644
--- a/arch/arm/plat-s3c/dev-i2c0.c
+++ b/arch/arm/plat-s3c/dev-i2c0.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c/dev-i2c0.c 1/* linux/arch/arm/plat-s3c/dev-i2c0.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008,2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 5 * http://armlinux.simtec.co.uk/
6 * 6 *
@@ -50,9 +50,8 @@ struct platform_device s3c_device_i2c0 = {
50static struct s3c2410_platform_i2c default_i2c_data0 __initdata = { 50static struct s3c2410_platform_i2c default_i2c_data0 __initdata = {
51 .flags = 0, 51 .flags = 0,
52 .slave_addr = 0x10, 52 .slave_addr = 0x10,
53 .bus_freq = 100*1000, 53 .frequency = 100*1000,
54 .max_freq = 400*1000, 54 .sda_delay = 100,
55 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
56}; 55};
57 56
58void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) 57void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-s3c/dev-i2c1.c
index 2387fbf57af6..8349c462788c 100644
--- a/arch/arm/plat-s3c/dev-i2c1.c
+++ b/arch/arm/plat-s3c/dev-i2c1.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c/dev-i2c1.c 1/* linux/arch/arm/plat-s3c/dev-i2c1.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008,2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 5 * http://armlinux.simtec.co.uk/
6 * 6 *
@@ -47,9 +47,8 @@ static struct s3c2410_platform_i2c default_i2c_data1 __initdata = {
47 .flags = 0, 47 .flags = 0,
48 .bus_num = 1, 48 .bus_num = 1,
49 .slave_addr = 0x10, 49 .slave_addr = 0x10,
50 .bus_freq = 100*1000, 50 .frequency = 100*1000,
51 .max_freq = 400*1000, 51 .sda_delay = 100,
52 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
53}; 52};
54 53
55void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) 54void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-s3c/include/plat/iic.h
index dc1dfcb9bc6c..67450f115748 100644
--- a/arch/arm/plat-s3c/include/plat/iic.h
+++ b/arch/arm/plat-s3c/include/plat/iic.h
@@ -1,9 +1,9 @@
1/* arch/arm/mach-s3c2410/include/mach/iic.h 1/* arch/arm/plat-s3c/include/plat/iic.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright 2004,2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C2410 - I2C Controller platfrom_device info 6 * S3C - I2C Controller platform_device info
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
@@ -15,19 +15,24 @@
15 15
16#define S3C_IICFLG_FILTER (1<<0) /* enable s3c2440 filter */ 16#define S3C_IICFLG_FILTER (1<<0) /* enable s3c2440 filter */
17 17
18/* Notes: 18/**
19 * 1) All frequencies are expressed in Hz 19 * struct s3c2410_platform_i2c - Platform data for s3c I2C.
20 * 2) A value of zero is `do not care` 20 * @bus_num: The bus number to use (if possible).
21*/ 21 * @flags: Any flags for the I2C bus (E.g. S3C_IICFLK_FILTER).
22 22 * @slave_addr: The I2C address for the slave device (if enabled).
23 * @frequency: The desired frequency in Hz of the bus. This is
24 * guaranteed to not be exceeded. If the caller does
25 * not care, use zero and the driver will select a
26 * useful default.
27 * @sda_delay: The delay (in ns) applied to SDA edges.
28 * @cfg_gpio: A callback to configure the pins for I2C operation.
29 */
23struct s3c2410_platform_i2c { 30struct s3c2410_platform_i2c {
24 int bus_num; /* bus number to use */ 31 int bus_num;
25 unsigned int flags; 32 unsigned int flags;
26 unsigned int slave_addr; /* slave address for controller */ 33 unsigned int slave_addr;
27 unsigned long bus_freq; /* standard bus frequency */ 34 unsigned long frequency;
28 unsigned long max_freq; /* max frequency for the bus */ 35 unsigned int sda_delay;
29 unsigned long min_freq; /* min frequency for the bus */
30 unsigned int sda_delay; /* pclks (s3c2440 only) */
31 36
32 void (*cfg_gpio)(struct platform_device *dev); 37 void (*cfg_gpio)(struct platform_device *dev);
33}; 38};
diff --git a/arch/avr32/boards/hammerhead/flash.c b/arch/avr32/boards/hammerhead/flash.c
index 559bbcb03f9b..776c3cb9b6e4 100644
--- a/arch/avr32/boards/hammerhead/flash.c
+++ b/arch/avr32/boards/hammerhead/flash.c
@@ -280,13 +280,13 @@ static struct resource hh_fpga0_resource[] = {
280 }, 280 },
281}; 281};
282 282
283static u64 hh_fpga0_dma_mask = DMA_32BIT_MASK; 283static u64 hh_fpga0_dma_mask = DMA_BIT_MASK(32);
284static struct platform_device hh_fpga0_device = { 284static struct platform_device hh_fpga0_device = {
285 .name = "hh_fpga", 285 .name = "hh_fpga",
286 .id = 0, 286 .id = 0,
287 .dev = { 287 .dev = {
288 .dma_mask = &hh_fpga0_dma_mask, 288 .dma_mask = &hh_fpga0_dma_mask,
289 .coherent_dma_mask = DMA_32BIT_MASK, 289 .coherent_dma_mask = DMA_BIT_MASK(32),
290 }, 290 },
291 .resource = hh_fpga0_resource, 291 .resource = hh_fpga0_resource,
292 .num_resources = ARRAY_SIZE(hh_fpga0_resource), 292 .num_resources = ARRAY_SIZE(hh_fpga0_resource),
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 7cc653798327..eb9d4dc2e86d 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -60,26 +60,26 @@
60 * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. 60 * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
61 */ 61 */
62#define DEFINE_DEV(_name, _id) \ 62#define DEFINE_DEV(_name, _id) \
63static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ 63static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
64static struct platform_device _name##_id##_device = { \ 64static struct platform_device _name##_id##_device = { \
65 .name = #_name, \ 65 .name = #_name, \
66 .id = _id, \ 66 .id = _id, \
67 .dev = { \ 67 .dev = { \
68 .dma_mask = &_name##_id##_dma_mask, \ 68 .dma_mask = &_name##_id##_dma_mask, \
69 .coherent_dma_mask = DMA_32BIT_MASK, \ 69 .coherent_dma_mask = DMA_BIT_MASK(32), \
70 }, \ 70 }, \
71 .resource = _name##_id##_resource, \ 71 .resource = _name##_id##_resource, \
72 .num_resources = ARRAY_SIZE(_name##_id##_resource), \ 72 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
73} 73}
74#define DEFINE_DEV_DATA(_name, _id) \ 74#define DEFINE_DEV_DATA(_name, _id) \
75static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ 75static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
76static struct platform_device _name##_id##_device = { \ 76static struct platform_device _name##_id##_device = { \
77 .name = #_name, \ 77 .name = #_name, \
78 .id = _id, \ 78 .id = _id, \
79 .dev = { \ 79 .dev = { \
80 .dma_mask = &_name##_id##_dma_mask, \ 80 .dma_mask = &_name##_id##_dma_mask, \
81 .platform_data = &_name##_id##_data, \ 81 .platform_data = &_name##_id##_data, \
82 .coherent_dma_mask = DMA_32BIT_MASK, \ 82 .coherent_dma_mask = DMA_BIT_MASK(32), \
83 }, \ 83 }, \
84 .resource = _name##_id##_resource, \ 84 .resource = _name##_id##_resource, \
85 .num_resources = ARRAY_SIZE(_name##_id##_resource), \ 85 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index 0292d58f9362..aaeb4df10d57 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -11,6 +11,8 @@
11#ifndef _SPI_CHANNEL_H_ 11#ifndef _SPI_CHANNEL_H_
12#define _SPI_CHANNEL_H_ 12#define _SPI_CHANNEL_H_
13 13
14#define MIN_SPI_BAUD_VAL 2
15
14#define SPI_READ 0 16#define SPI_READ 0
15#define SPI_WRITE 1 17#define SPI_WRITE 1
16 18
@@ -122,6 +124,9 @@ struct bfin5xx_spi_chip {
122 u8 bits_per_word; 124 u8 bits_per_word;
123 u8 cs_change_per_word; 125 u8 cs_change_per_word;
124 u16 cs_chg_udelay; /* Some devices require 16-bit delays */ 126 u16 cs_chg_udelay; /* Some devices require 16-bit delays */
127 u32 cs_gpio;
128 /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
129 u16 idle_tx_val;
125}; 130};
126 131
127#endif /* _SPI_CHANNEL_H_ */ 132#endif /* _SPI_CHANNEL_H_ */
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
index e21c1c3e4ec7..0fb2ce5d840e 100644
--- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) 56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) 60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61 61
@@ -87,6 +87,7 @@
87struct bfin_serial_port { 87struct bfin_serial_port {
88 struct uart_port port; 88 struct uart_port port;
89 unsigned int old_status; 89 unsigned int old_status;
90 int status_irq;
90 unsigned int lsr; 91 unsigned int lsr;
91#ifdef CONFIG_SERIAL_BFIN_DMA 92#ifdef CONFIG_SERIAL_BFIN_DMA
92 int tx_done; 93 int tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
125struct bfin_serial_res { 126struct bfin_serial_res {
126 unsigned long uart_base_addr; 127 unsigned long uart_base_addr;
127 int uart_irq; 128 int uart_irq;
129 int uart_status_irq;
128#ifdef CONFIG_SERIAL_BFIN_DMA 130#ifdef CONFIG_SERIAL_BFIN_DMA
129 unsigned int uart_tx_dma_channel; 131 unsigned int uart_tx_dma_channel;
130 unsigned int uart_rx_dma_channel; 132 unsigned int uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
140 { 142 {
141 0xFFC00400, 143 0xFFC00400,
142 IRQ_UART0_RX, 144 IRQ_UART0_RX,
145 IRQ_UART0_ERROR,
143#ifdef CONFIG_SERIAL_BFIN_DMA 146#ifdef CONFIG_SERIAL_BFIN_DMA
144 CH_UART0_TX, 147 CH_UART0_TX,
145 CH_UART0_RX, 148 CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 { 157 {
155 0xFFC02000, 158 0xFFC02000,
156 IRQ_UART1_RX, 159 IRQ_UART1_RX,
160 IRQ_UART1_ERROR,
157#ifdef CONFIG_SERIAL_BFIN_DMA 161#ifdef CONFIG_SERIAL_BFIN_DMA
158 CH_UART1_TX, 162 CH_UART1_TX,
159 CH_UART1_RX, 163 CH_UART1_RX,
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
index e8c41fd842b5..a625659dd67f 100644
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) 56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) 60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61 61
@@ -87,6 +87,7 @@
87struct bfin_serial_port { 87struct bfin_serial_port {
88 struct uart_port port; 88 struct uart_port port;
89 unsigned int old_status; 89 unsigned int old_status;
90 int status_irq;
90 unsigned int lsr; 91 unsigned int lsr;
91#ifdef CONFIG_SERIAL_BFIN_DMA 92#ifdef CONFIG_SERIAL_BFIN_DMA
92 int tx_done; 93 int tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
125struct bfin_serial_res { 126struct bfin_serial_res {
126 unsigned long uart_base_addr; 127 unsigned long uart_base_addr;
127 int uart_irq; 128 int uart_irq;
129 int uart_status_irq;
128#ifdef CONFIG_SERIAL_BFIN_DMA 130#ifdef CONFIG_SERIAL_BFIN_DMA
129 unsigned int uart_tx_dma_channel; 131 unsigned int uart_tx_dma_channel;
130 unsigned int uart_rx_dma_channel; 132 unsigned int uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
140 { 142 {
141 0xFFC00400, 143 0xFFC00400,
142 IRQ_UART0_RX, 144 IRQ_UART0_RX,
145 IRQ_UART0_ERROR,
143#ifdef CONFIG_SERIAL_BFIN_DMA 146#ifdef CONFIG_SERIAL_BFIN_DMA
144 CH_UART0_TX, 147 CH_UART0_TX,
145 CH_UART0_RX, 148 CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 { 157 {
155 0xFFC02000, 158 0xFFC02000,
156 IRQ_UART1_RX, 159 IRQ_UART1_RX,
160 IRQ_UART1_ERROR,
157#ifdef CONFIG_SERIAL_BFIN_DMA 161#ifdef CONFIG_SERIAL_BFIN_DMA
158 CH_UART1_TX, 162 CH_UART1_TX,
159 CH_UART1_RX, 163 CH_UART1_RX,
@@ -167,29 +171,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
167}; 171};
168 172
169#define DRIVER_NAME "bfin-uart" 173#define DRIVER_NAME "bfin-uart"
170
171static void bfin_serial_hw_init(struct bfin_serial_port *uart)
172{
173
174#ifdef CONFIG_SERIAL_BFIN_UART0
175 peripheral_request(P_UART0_TX, DRIVER_NAME);
176 peripheral_request(P_UART0_RX, DRIVER_NAME);
177#endif
178
179#ifdef CONFIG_SERIAL_BFIN_UART1
180 peripheral_request(P_UART1_TX, DRIVER_NAME);
181 peripheral_request(P_UART1_RX, DRIVER_NAME);
182#endif
183
184#ifdef CONFIG_SERIAL_BFIN_CTSRTS
185 if (uart->cts_pin >= 0) {
186 gpio_request(uart->cts_pin, DRIVER_NAME);
187 gpio_direction_input(uart->cts_pin);
188 }
189
190 if (uart->rts_pin >= 0) {
191 gpio_request(uart->rts_pin, DRIVER_NAME);
192 gpio_direction_output(uart->rts_pin, 0);
193 }
194#endif
195}
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index 5f517f53b0fd..a3789d7ccf8c 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) 56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) 60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61 61
@@ -74,6 +74,7 @@
74struct bfin_serial_port { 74struct bfin_serial_port {
75 struct uart_port port; 75 struct uart_port port;
76 unsigned int old_status; 76 unsigned int old_status;
77 int status_irq;
77 unsigned int lsr; 78 unsigned int lsr;
78#ifdef CONFIG_SERIAL_BFIN_DMA 79#ifdef CONFIG_SERIAL_BFIN_DMA
79 int tx_done; 80 int tx_done;
@@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
116struct bfin_serial_res { 117struct bfin_serial_res {
117 unsigned long uart_base_addr; 118 unsigned long uart_base_addr;
118 int uart_irq; 119 int uart_irq;
120 int uart_status_irq;
119#ifdef CONFIG_SERIAL_BFIN_DMA 121#ifdef CONFIG_SERIAL_BFIN_DMA
120 unsigned int uart_tx_dma_channel; 122 unsigned int uart_tx_dma_channel;
121 unsigned int uart_rx_dma_channel; 123 unsigned int uart_rx_dma_channel;
@@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
130 { 132 {
131 0xFFC00400, 133 0xFFC00400,
132 IRQ_UART_RX, 134 IRQ_UART_RX,
135 IRQ_UART_ERROR,
133#ifdef CONFIG_SERIAL_BFIN_DMA 136#ifdef CONFIG_SERIAL_BFIN_DMA
134 CH_UART_TX, 137 CH_UART_TX,
135 CH_UART_RX, 138 CH_UART_RX,
@@ -142,23 +145,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
142}; 145};
143 146
144#define DRIVER_NAME "bfin-uart" 147#define DRIVER_NAME "bfin-uart"
145
146static void bfin_serial_hw_init(struct bfin_serial_port *uart)
147{
148
149#ifdef CONFIG_SERIAL_BFIN_UART0
150 peripheral_request(P_UART0_TX, DRIVER_NAME);
151 peripheral_request(P_UART0_RX, DRIVER_NAME);
152#endif
153
154#ifdef CONFIG_SERIAL_BFIN_CTSRTS
155 if (uart->cts_pin >= 0) {
156 gpio_request(uart->cts_pin, DRIVER_NAME);
157 gpio_direction_input(uart->cts_pin);
158 }
159 if (uart->rts_pin >= 0) {
160 gpio_request(uart->rts_pin, DRIVER_NAME);
161 gpio_direction_output(uart->rts_pin, 0);
162 }
163#endif
164}
diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
index 9e34700844a2..b86662fb9de7 100644
--- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) 56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) 60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61 61
@@ -87,6 +87,7 @@
87struct bfin_serial_port { 87struct bfin_serial_port {
88 struct uart_port port; 88 struct uart_port port;
89 unsigned int old_status; 89 unsigned int old_status;
90 int status_irq;
90 unsigned int lsr; 91 unsigned int lsr;
91#ifdef CONFIG_SERIAL_BFIN_DMA 92#ifdef CONFIG_SERIAL_BFIN_DMA
92 int tx_done; 93 int tx_done;
@@ -99,7 +100,6 @@ struct bfin_serial_port {
99 struct work_struct tx_dma_workqueue; 100 struct work_struct tx_dma_workqueue;
100#endif 101#endif
101#ifdef CONFIG_SERIAL_BFIN_CTSRTS 102#ifdef CONFIG_SERIAL_BFIN_CTSRTS
102 struct timer_list cts_timer;
103 int cts_pin; 103 int cts_pin;
104 int rts_pin; 104 int rts_pin;
105#endif 105#endif
@@ -125,6 +125,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
125struct bfin_serial_res { 125struct bfin_serial_res {
126 unsigned long uart_base_addr; 126 unsigned long uart_base_addr;
127 int uart_irq; 127 int uart_irq;
128 int uart_status_irq;
128#ifdef CONFIG_SERIAL_BFIN_DMA 129#ifdef CONFIG_SERIAL_BFIN_DMA
129 unsigned int uart_tx_dma_channel; 130 unsigned int uart_tx_dma_channel;
130 unsigned int uart_rx_dma_channel; 131 unsigned int uart_rx_dma_channel;
@@ -140,6 +141,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
140 { 141 {
141 0xFFC00400, 142 0xFFC00400,
142 IRQ_UART0_RX, 143 IRQ_UART0_RX,
144 IRQ_UART0_ERROR,
143#ifdef CONFIG_SERIAL_BFIN_DMA 145#ifdef CONFIG_SERIAL_BFIN_DMA
144 CH_UART0_TX, 146 CH_UART0_TX,
145 CH_UART0_RX, 147 CH_UART0_RX,
@@ -154,6 +156,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 { 156 {
155 0xFFC02000, 157 0xFFC02000,
156 IRQ_UART1_RX, 158 IRQ_UART1_RX,
159 IRQ_UART1_ERROR,
157#ifdef CONFIG_SERIAL_BFIN_DMA 160#ifdef CONFIG_SERIAL_BFIN_DMA
158 CH_UART1_TX, 161 CH_UART1_TX,
159 CH_UART1_RX, 162 CH_UART1_RX,
@@ -167,29 +170,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
167}; 170};
168 171
169#define DRIVER_NAME "bfin-uart" 172#define DRIVER_NAME "bfin-uart"
170
171static void bfin_serial_hw_init(struct bfin_serial_port *uart)
172{
173
174#ifdef CONFIG_SERIAL_BFIN_UART0
175 peripheral_request(P_UART0_TX, DRIVER_NAME);
176 peripheral_request(P_UART0_RX, DRIVER_NAME);
177#endif
178
179#ifdef CONFIG_SERIAL_BFIN_UART1
180 peripheral_request(P_UART1_TX, DRIVER_NAME);
181 peripheral_request(P_UART1_RX, DRIVER_NAME);
182#endif
183
184#ifdef CONFIG_SERIAL_BFIN_CTSRTS
185 if (uart->cts_pin >= 0) {
186 gpio_request(uart->cts_pin, DRIVER_NAME);
187 gpio_direction_input(uart->cts_pin);
188 }
189
190 if (uart->rts_pin >= 0) {
191 gpio_request(uart->rts_pin, DRIVER_NAME);
192 gpio_direction_output(uart->rts_pin, 0);
193 }
194#endif
195}
diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
index 3c2811ebecdd..c536551eb4b8 100644
--- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) 56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) 60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61 61
@@ -87,6 +87,7 @@
87struct bfin_serial_port { 87struct bfin_serial_port {
88 struct uart_port port; 88 struct uart_port port;
89 unsigned int old_status; 89 unsigned int old_status;
90 int status_irq;
90 unsigned int lsr; 91 unsigned int lsr;
91#ifdef CONFIG_SERIAL_BFIN_DMA 92#ifdef CONFIG_SERIAL_BFIN_DMA
92 int tx_done; 93 int tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
125struct bfin_serial_res { 126struct bfin_serial_res {
126 unsigned long uart_base_addr; 127 unsigned long uart_base_addr;
127 int uart_irq; 128 int uart_irq;
129 int uart_status_irq;
128#ifdef CONFIG_SERIAL_BFIN_DMA 130#ifdef CONFIG_SERIAL_BFIN_DMA
129 unsigned int uart_tx_dma_channel; 131 unsigned int uart_tx_dma_channel;
130 unsigned int uart_rx_dma_channel; 132 unsigned int uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
140 { 142 {
141 0xFFC00400, 143 0xFFC00400,
142 IRQ_UART0_RX, 144 IRQ_UART0_RX,
145 IRQ_UART0_ERROR,
143#ifdef CONFIG_SERIAL_BFIN_DMA 146#ifdef CONFIG_SERIAL_BFIN_DMA
144 CH_UART0_TX, 147 CH_UART0_TX,
145 CH_UART0_RX, 148 CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 { 157 {
155 0xFFC02000, 158 0xFFC02000,
156 IRQ_UART1_RX, 159 IRQ_UART1_RX,
160 IRQ_UART1_ERROR,
157#ifdef CONFIG_SERIAL_BFIN_DMA 161#ifdef CONFIG_SERIAL_BFIN_DMA
158 CH_UART1_TX, 162 CH_UART1_TX,
159 CH_UART1_RX, 163 CH_UART1_RX,
diff --git a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
index c05e79cba257..2d1b5fa3cca0 100644
--- a/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf548/include/mach/bfin_serial_5xx.h
@@ -46,41 +46,27 @@
46#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 46#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
47#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 47#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
48#define UART_SET_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_SET),v) 48#define UART_SET_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_SET),v)
49#define UART_CLEAR_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v) 49#define UART_CLEAR_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v)
50#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 50#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
51#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v) 51#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v)
52#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 52#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
53#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1) 53#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
54#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 54#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
55#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v) 55#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
56#define UART_CLEAR_SCTS(uart) bfin_write16(((uart)->port.membase + OFFSET_MSR),SCTS)
56 57
57#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ 58#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */
58#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ 59#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */
59 60
60#define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS) 61#define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS)
61#define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS)) 62#define UART_DISABLE_RTS(x) UART_PUT_MCR(x, UART_GET_MCR(x) & ~(ARTS|MRTS))
62#define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS)) 63#define UART_ENABLE_RTS(x) UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS | ARTS)
63#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) 64#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
64#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) 65#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
65 66
66#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS) 67#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) || \
67# define CONFIG_SERIAL_BFIN_CTSRTS 68 defined(CONFIG_BFIN_UART2_CTSRTS) || defined(CONFIG_BFIN_UART3_CTSRTS)
68 69# define CONFIG_SERIAL_BFIN_HARD_CTSRTS
69# ifndef CONFIG_UART0_CTS_PIN
70# define CONFIG_UART0_CTS_PIN -1
71# endif
72
73# ifndef CONFIG_UART0_RTS_PIN
74# define CONFIG_UART0_RTS_PIN -1
75# endif
76
77# ifndef CONFIG_UART2_CTS_PIN
78# define CONFIG_UART2_CTS_PIN -1
79# endif
80
81# ifndef CONFIG_UART2_RTS_PIN
82# define CONFIG_UART2_RTS_PIN -1
83# endif
84#endif 70#endif
85 71
86#define BFIN_UART_TX_FIFO_SIZE 2 72#define BFIN_UART_TX_FIFO_SIZE 2
@@ -91,6 +77,7 @@
91struct bfin_serial_port { 77struct bfin_serial_port {
92 struct uart_port port; 78 struct uart_port port;
93 unsigned int old_status; 79 unsigned int old_status;
80 int status_irq;
94#ifdef CONFIG_SERIAL_BFIN_DMA 81#ifdef CONFIG_SERIAL_BFIN_DMA
95 int tx_done; 82 int tx_done;
96 int tx_count; 83 int tx_count;
@@ -101,23 +88,24 @@ struct bfin_serial_port {
101 unsigned int rx_dma_channel; 88 unsigned int rx_dma_channel;
102 struct work_struct tx_dma_workqueue; 89 struct work_struct tx_dma_workqueue;
103#endif 90#endif
104#ifdef CONFIG_SERIAL_BFIN_CTSRTS 91#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
105 struct timer_list cts_timer; 92 int scts;
106 int cts_pin; 93 int cts_pin;
107 int rts_pin; 94 int rts_pin;
108#endif 95#endif
109}; 96};
110 97
111struct bfin_serial_res { 98struct bfin_serial_res {
112 unsigned long uart_base_addr; 99 unsigned long uart_base_addr;
113 int uart_irq; 100 int uart_irq;
101 int uart_status_irq;
114#ifdef CONFIG_SERIAL_BFIN_DMA 102#ifdef CONFIG_SERIAL_BFIN_DMA
115 unsigned int uart_tx_dma_channel; 103 unsigned int uart_tx_dma_channel;
116 unsigned int uart_rx_dma_channel; 104 unsigned int uart_rx_dma_channel;
117#endif 105#endif
118#ifdef CONFIG_SERIAL_BFIN_CTSRTS 106#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
119 int uart_cts_pin; 107 int uart_cts_pin;
120 int uart_rts_pin; 108 int uart_rts_pin;
121#endif 109#endif
122}; 110};
123 111
@@ -126,13 +114,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
126 { 114 {
127 0xFFC00400, 115 0xFFC00400,
128 IRQ_UART0_RX, 116 IRQ_UART0_RX,
117 IRQ_UART0_ERROR,
129#ifdef CONFIG_SERIAL_BFIN_DMA 118#ifdef CONFIG_SERIAL_BFIN_DMA
130 CH_UART0_TX, 119 CH_UART0_TX,
131 CH_UART0_RX, 120 CH_UART0_RX,
132#endif 121#endif
133#ifdef CONFIG_SERIAL_BFIN_CTSRTS 122#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
134 CONFIG_UART0_CTS_PIN, 123 0,
135 CONFIG_UART0_RTS_PIN, 124 0,
136#endif 125#endif
137 }, 126 },
138#endif 127#endif
@@ -140,13 +129,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
140 { 129 {
141 0xFFC02000, 130 0xFFC02000,
142 IRQ_UART1_RX, 131 IRQ_UART1_RX,
132 IRQ_UART1_ERROR,
143#ifdef CONFIG_SERIAL_BFIN_DMA 133#ifdef CONFIG_SERIAL_BFIN_DMA
144 CH_UART1_TX, 134 CH_UART1_TX,
145 CH_UART1_RX, 135 CH_UART1_RX,
146#endif 136#endif
147#ifdef CONFIG_SERIAL_BFIN_CTSRTS 137#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
148 0, 138 GPIO_PE10,
149 0, 139 GPIO_PE9,
150#endif 140#endif
151 }, 141 },
152#endif 142#endif
@@ -154,13 +144,14 @@ struct bfin_serial_res bfin_serial_resource[] = {
154 { 144 {
155 0xFFC02100, 145 0xFFC02100,
156 IRQ_UART2_RX, 146 IRQ_UART2_RX,
147 IRQ_UART2_ERROR,
157#ifdef CONFIG_SERIAL_BFIN_DMA 148#ifdef CONFIG_SERIAL_BFIN_DMA
158 CH_UART2_TX, 149 CH_UART2_TX,
159 CH_UART2_RX, 150 CH_UART2_RX,
160#endif 151#endif
161#ifdef CONFIG_SERIAL_BFIN_CTSRTS 152#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
162 CONFIG_UART2_CTS_PIN, 153 0,
163 CONFIG_UART2_RTS_PIN, 154 0,
164#endif 155#endif
165 }, 156 },
166#endif 157#endif
@@ -168,61 +159,17 @@ struct bfin_serial_res bfin_serial_resource[] = {
168 { 159 {
169 0xFFC03100, 160 0xFFC03100,
170 IRQ_UART3_RX, 161 IRQ_UART3_RX,
162 IRQ_UART3_ERROR,
171#ifdef CONFIG_SERIAL_BFIN_DMA 163#ifdef CONFIG_SERIAL_BFIN_DMA
172 CH_UART3_TX, 164 CH_UART3_TX,
173 CH_UART3_RX, 165 CH_UART3_RX,
174#endif 166#endif
175#ifdef CONFIG_SERIAL_BFIN_CTSRTS 167#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
176 0, 168 GPIO_PB3,
177 0, 169 GPIO_PB2,
178#endif 170#endif
179 }, 171 },
180#endif 172#endif
181}; 173};
182 174
183#define DRIVER_NAME "bfin-uart" 175#define DRIVER_NAME "bfin-uart"
184
185static void bfin_serial_hw_init(struct bfin_serial_port *uart)
186{
187#ifdef CONFIG_SERIAL_BFIN_UART0
188 peripheral_request(P_UART0_TX, DRIVER_NAME);
189 peripheral_request(P_UART0_RX, DRIVER_NAME);
190#endif
191
192#ifdef CONFIG_SERIAL_BFIN_UART1
193 peripheral_request(P_UART1_TX, DRIVER_NAME);
194 peripheral_request(P_UART1_RX, DRIVER_NAME);
195
196#ifdef CONFIG_BFIN_UART1_CTSRTS
197 peripheral_request(P_UART1_RTS, DRIVER_NAME);
198 peripheral_request(P_UART1_CTS, DRIVER_NAME);
199#endif
200#endif
201
202#ifdef CONFIG_SERIAL_BFIN_UART2
203 peripheral_request(P_UART2_TX, DRIVER_NAME);
204 peripheral_request(P_UART2_RX, DRIVER_NAME);
205#endif
206
207#ifdef CONFIG_SERIAL_BFIN_UART3
208 peripheral_request(P_UART3_TX, DRIVER_NAME);
209 peripheral_request(P_UART3_RX, DRIVER_NAME);
210
211#ifdef CONFIG_BFIN_UART3_CTSRTS
212 peripheral_request(P_UART3_RTS, DRIVER_NAME);
213 peripheral_request(P_UART3_CTS, DRIVER_NAME);
214#endif
215#endif
216 SSYNC();
217#ifdef CONFIG_SERIAL_BFIN_CTSRTS
218 if (uart->cts_pin >= 0) {
219 gpio_request(uart->cts_pin, DRIVER_NAME);
220 gpio_direction_input(uart->cts_pin);
221 }
222
223 if (uart->rts_pin >= 0) {
224 gpio_request(uart->rts_pin, DRIVER_NAME);
225 gpio_direction_output(uart->rts_pin, 0);
226 }
227#endif
228}
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
index ca8c5f645209..a1b50878553f 100644
--- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) 56#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) 57#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) 58#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) 59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) 60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61 61
@@ -74,6 +74,7 @@
74struct bfin_serial_port { 74struct bfin_serial_port {
75 struct uart_port port; 75 struct uart_port port;
76 unsigned int old_status; 76 unsigned int old_status;
77 int status_irq;
77 unsigned int lsr; 78 unsigned int lsr;
78#ifdef CONFIG_SERIAL_BFIN_DMA 79#ifdef CONFIG_SERIAL_BFIN_DMA
79 int tx_done; 80 int tx_done;
@@ -116,6 +117,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
116struct bfin_serial_res { 117struct bfin_serial_res {
117 unsigned long uart_base_addr; 118 unsigned long uart_base_addr;
118 int uart_irq; 119 int uart_irq;
120 int uart_status_irq;
119#ifdef CONFIG_SERIAL_BFIN_DMA 121#ifdef CONFIG_SERIAL_BFIN_DMA
120 unsigned int uart_tx_dma_channel; 122 unsigned int uart_tx_dma_channel;
121 unsigned int uart_rx_dma_channel; 123 unsigned int uart_rx_dma_channel;
@@ -130,6 +132,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
130 { 132 {
131 0xFFC00400, 133 0xFFC00400,
132 IRQ_UART_RX, 134 IRQ_UART_RX,
135 IRQ_UART_ERROR,
133#ifdef CONFIG_SERIAL_BFIN_DMA 136#ifdef CONFIG_SERIAL_BFIN_DMA
134 CH_UART_TX, 137 CH_UART_TX,
135 CH_UART_RX, 138 CH_UART_RX,
@@ -142,23 +145,3 @@ struct bfin_serial_res bfin_serial_resource[] = {
142}; 145};
143 146
144#define DRIVER_NAME "bfin-uart" 147#define DRIVER_NAME "bfin-uart"
145
146static void bfin_serial_hw_init(struct bfin_serial_port *uart)
147{
148
149#ifdef CONFIG_SERIAL_BFIN_UART0
150 peripheral_request(P_UART0_TX, DRIVER_NAME);
151 peripheral_request(P_UART0_RX, DRIVER_NAME);
152#endif
153
154#ifdef CONFIG_SERIAL_BFIN_CTSRTS
155 if (uart->cts_pin >= 0) {
156 gpio_request(uart->cts_pin, DRIVER_NAME);
157 gpio_direction_input(uart->cts_pin);
158 }
159 if (uart->rts_pin >= 0) {
160 gpio_request(uart->rts_pin, DRIVER_NAME);
161 gpio_direction_output(uart->rts_pin, 0);
162 }
163#endif
164}
diff --git a/arch/cris/include/asm/ioctls.h b/arch/cris/include/asm/ioctls.h
index 4f4e52531fa0..35bbc181598a 100644
--- a/arch/cris/include/asm/ioctls.h
+++ b/arch/cris/include/asm/ioctls.h
@@ -74,8 +74,9 @@
74#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ 74#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
75#define FIOQSIZE 0x5460 75#define FIOQSIZE 0x5460
76 76
77#define TIOCSERSETRS485 0x5461 /* enable rs-485 */ 77#define TIOCSERSETRS485 0x5461 /* enable rs-485 (deprecated) */
78#define TIOCSERWRRS485 0x5462 /* write rs-485 */ 78#define TIOCSERWRRS485 0x5462 /* write rs-485 */
79#define TIOCSRS485 0x5463 /* enable rs-485 */
79 80
80/* Used for packet mode */ 81/* Used for packet mode */
81#define TIOCPKT_DATA 0 82#define TIOCPKT_DATA 0
diff --git a/arch/cris/include/asm/rs485.h b/arch/cris/include/asm/rs485.h
index c331c51b0c2b..ad40f9fbcb8a 100644
--- a/arch/cris/include/asm/rs485.h
+++ b/arch/cris/include/asm/rs485.h
@@ -1,15 +1,13 @@
1/* RS-485 structures */ 1/* RS-485 structures */
2 2
3/* RS-485 support */ 3/* Used with ioctl() TIOCSERSETRS485 for backward compatibility!
4/* Used with ioctl() TIOCSERSETRS485 */ 4 * XXX: Do not use it for new code!
5 */
5struct rs485_control { 6struct rs485_control {
6 unsigned short rts_on_send; 7 unsigned short rts_on_send;
7 unsigned short rts_after_sent; 8 unsigned short rts_after_sent;
8 unsigned long delay_rts_before_send; 9 unsigned long delay_rts_before_send;
9 unsigned short enabled; 10 unsigned short enabled;
10#ifdef __KERNEL__
11 int disable_serial_loopback;
12#endif
13}; 11};
14 12
15/* Used with ioctl() TIOCSERWRRS485 */ 13/* Used with ioctl() TIOCSERWRRS485 */
diff --git a/arch/cris/include/asm/termios.h b/arch/cris/include/asm/termios.h
index b0124e6c2e41..1265109f4ce3 100644
--- a/arch/cris/include/asm/termios.h
+++ b/arch/cris/include/asm/termios.h
@@ -4,6 +4,7 @@
4#include <asm/termbits.h> 4#include <asm/termbits.h>
5#include <asm/ioctls.h> 5#include <asm/ioctls.h>
6#include <asm/rs485.h> 6#include <asm/rs485.h>
7#include <linux/serial.h>
7 8
8struct winsize { 9struct winsize {
9 unsigned short ws_row; 10 unsigned short ws_row;
diff --git a/arch/ia64/kernel/pci-dma.c b/arch/ia64/kernel/pci-dma.c
index e4cb443bb988..eb987386f691 100644
--- a/arch/ia64/kernel/pci-dma.c
+++ b/arch/ia64/kernel/pci-dma.c
@@ -37,7 +37,7 @@ int force_iommu __read_mostly;
37 to i386. */ 37 to i386. */
38struct device fallback_dev = { 38struct device fallback_dev = {
39 .init_name = "fallback device", 39 .init_name = "fallback device",
40 .coherent_dma_mask = DMA_32BIT_MASK, 40 .coherent_dma_mask = DMA_BIT_MASK(32),
41 .dma_mask = &fallback_dev.coherent_dma_mask, 41 .dma_mask = &fallback_dev.coherent_dma_mask,
42}; 42};
43 43
@@ -75,7 +75,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
75 /* Copied from i386. Doesn't make much sense, because it will 75 /* Copied from i386. Doesn't make much sense, because it will
76 only work for pci_alloc_coherent. 76 only work for pci_alloc_coherent.
77 The caller just has to use GFP_DMA in this case. */ 77 The caller just has to use GFP_DMA in this case. */
78 if (mask < DMA_24BIT_MASK) 78 if (mask < DMA_BIT_MASK(24))
79 return 0; 79 return 0;
80 80
81 /* Tell the device to use SAC when IOMMU force is on. This 81 /* Tell the device to use SAC when IOMMU force is on. This
@@ -90,7 +90,7 @@ int iommu_dma_supported(struct device *dev, u64 mask)
90 SAC for these. Assume all masks <= 40 bits are of this 90 SAC for these. Assume all masks <= 40 bits are of this
91 type. Normally this doesn't make any difference, but gives 91 type. Normally this doesn't make any difference, but gives
92 more gentle handling of IOMMU overflow. */ 92 more gentle handling of IOMMU overflow. */
93 if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) { 93 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
94 dev_info(dev, "Force SAC with mask %lx\n", mask); 94 dev_info(dev, "Force SAC with mask %lx\n", mask);
95 return 0; 95 return 0;
96 } 96 }
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index 8c130e8f00e1..d876423e4e75 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -349,7 +349,7 @@ static int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
349 349
350u64 sn_dma_get_required_mask(struct device *dev) 350u64 sn_dma_get_required_mask(struct device *dev)
351{ 351{
352 return DMA_64BIT_MASK; 352 return DMA_BIT_MASK(64);
353} 353}
354EXPORT_SYMBOL_GPL(sn_dma_get_required_mask); 354EXPORT_SYMBOL_GPL(sn_dma_get_required_mask);
355 355
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 5c76c6448e04..117f99f70649 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -80,14 +80,14 @@ static struct resource au1xxx_usb_ohci_resources[] = {
80}; 80};
81 81
82/* The dmamask must be set for OHCI to work */ 82/* The dmamask must be set for OHCI to work */
83static u64 ohci_dmamask = DMA_32BIT_MASK; 83static u64 ohci_dmamask = DMA_BIT_MASK(32);
84 84
85static struct platform_device au1xxx_usb_ohci_device = { 85static struct platform_device au1xxx_usb_ohci_device = {
86 .name = "au1xxx-ohci", 86 .name = "au1xxx-ohci",
87 .id = 0, 87 .id = 0,
88 .dev = { 88 .dev = {
89 .dma_mask = &ohci_dmamask, 89 .dma_mask = &ohci_dmamask,
90 .coherent_dma_mask = DMA_32BIT_MASK, 90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 }, 91 },
92 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources), 92 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
93 .resource = au1xxx_usb_ohci_resources, 93 .resource = au1xxx_usb_ohci_resources,
@@ -109,14 +109,14 @@ static struct resource au1100_lcd_resources[] = {
109 } 109 }
110}; 110};
111 111
112static u64 au1100_lcd_dmamask = DMA_32BIT_MASK; 112static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
113 113
114static struct platform_device au1100_lcd_device = { 114static struct platform_device au1100_lcd_device = {
115 .name = "au1100-lcd", 115 .name = "au1100-lcd",
116 .id = 0, 116 .id = 0,
117 .dev = { 117 .dev = {
118 .dma_mask = &au1100_lcd_dmamask, 118 .dma_mask = &au1100_lcd_dmamask,
119 .coherent_dma_mask = DMA_32BIT_MASK, 119 .coherent_dma_mask = DMA_BIT_MASK(32),
120 }, 120 },
121 .num_resources = ARRAY_SIZE(au1100_lcd_resources), 121 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
122 .resource = au1100_lcd_resources, 122 .resource = au1100_lcd_resources,
@@ -138,14 +138,14 @@ static struct resource au1xxx_usb_ehci_resources[] = {
138 }, 138 },
139}; 139};
140 140
141static u64 ehci_dmamask = DMA_32BIT_MASK; 141static u64 ehci_dmamask = DMA_BIT_MASK(32);
142 142
143static struct platform_device au1xxx_usb_ehci_device = { 143static struct platform_device au1xxx_usb_ehci_device = {
144 .name = "au1xxx-ehci", 144 .name = "au1xxx-ehci",
145 .id = 0, 145 .id = 0,
146 .dev = { 146 .dev = {
147 .dma_mask = &ehci_dmamask, 147 .dma_mask = &ehci_dmamask,
148 .coherent_dma_mask = DMA_32BIT_MASK, 148 .coherent_dma_mask = DMA_BIT_MASK(32),
149 }, 149 },
150 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources), 150 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
151 .resource = au1xxx_usb_ehci_resources, 151 .resource = au1xxx_usb_ehci_resources,
@@ -165,14 +165,14 @@ static struct resource au1xxx_usb_gdt_resources[] = {
165 }, 165 },
166}; 166};
167 167
168static u64 udc_dmamask = DMA_32BIT_MASK; 168static u64 udc_dmamask = DMA_BIT_MASK(32);
169 169
170static struct platform_device au1xxx_usb_gdt_device = { 170static struct platform_device au1xxx_usb_gdt_device = {
171 .name = "au1xxx-udc", 171 .name = "au1xxx-udc",
172 .id = 0, 172 .id = 0,
173 .dev = { 173 .dev = {
174 .dma_mask = &udc_dmamask, 174 .dma_mask = &udc_dmamask,
175 .coherent_dma_mask = DMA_32BIT_MASK, 175 .coherent_dma_mask = DMA_BIT_MASK(32),
176 }, 176 },
177 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources), 177 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
178 .resource = au1xxx_usb_gdt_resources, 178 .resource = au1xxx_usb_gdt_resources,
@@ -192,14 +192,14 @@ static struct resource au1xxx_usb_otg_resources[] = {
192 }, 192 },
193}; 193};
194 194
195static u64 uoc_dmamask = DMA_32BIT_MASK; 195static u64 uoc_dmamask = DMA_BIT_MASK(32);
196 196
197static struct platform_device au1xxx_usb_otg_device = { 197static struct platform_device au1xxx_usb_otg_device = {
198 .name = "au1xxx-uoc", 198 .name = "au1xxx-uoc",
199 .id = 0, 199 .id = 0,
200 .dev = { 200 .dev = {
201 .dma_mask = &uoc_dmamask, 201 .dma_mask = &uoc_dmamask,
202 .coherent_dma_mask = DMA_32BIT_MASK, 202 .coherent_dma_mask = DMA_BIT_MASK(32),
203 }, 203 },
204 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources), 204 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
205 .resource = au1xxx_usb_otg_resources, 205 .resource = au1xxx_usb_otg_resources,
@@ -218,20 +218,20 @@ static struct resource au1200_lcd_resources[] = {
218 } 218 }
219}; 219};
220 220
221static u64 au1200_lcd_dmamask = DMA_32BIT_MASK; 221static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
222 222
223static struct platform_device au1200_lcd_device = { 223static struct platform_device au1200_lcd_device = {
224 .name = "au1200-lcd", 224 .name = "au1200-lcd",
225 .id = 0, 225 .id = 0,
226 .dev = { 226 .dev = {
227 .dma_mask = &au1200_lcd_dmamask, 227 .dma_mask = &au1200_lcd_dmamask,
228 .coherent_dma_mask = DMA_32BIT_MASK, 228 .coherent_dma_mask = DMA_BIT_MASK(32),
229 }, 229 },
230 .num_resources = ARRAY_SIZE(au1200_lcd_resources), 230 .num_resources = ARRAY_SIZE(au1200_lcd_resources),
231 .resource = au1200_lcd_resources, 231 .resource = au1200_lcd_resources,
232}; 232};
233 233
234static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK; 234static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
235 235
236extern struct au1xmmc_platform_data au1xmmc_platdata[2]; 236extern struct au1xmmc_platform_data au1xmmc_platdata[2];
237 237
@@ -263,7 +263,7 @@ static struct platform_device au1200_mmc0_device = {
263 .id = 0, 263 .id = 0,
264 .dev = { 264 .dev = {
265 .dma_mask = &au1xxx_mmc_dmamask, 265 .dma_mask = &au1xxx_mmc_dmamask,
266 .coherent_dma_mask = DMA_32BIT_MASK, 266 .coherent_dma_mask = DMA_BIT_MASK(32),
267 .platform_data = &au1xmmc_platdata[0], 267 .platform_data = &au1xmmc_platdata[0],
268 }, 268 },
269 .num_resources = ARRAY_SIZE(au1200_mmc0_resources), 269 .num_resources = ARRAY_SIZE(au1200_mmc0_resources),
@@ -299,7 +299,7 @@ static struct platform_device au1200_mmc1_device = {
299 .id = 1, 299 .id = 1,
300 .dev = { 300 .dev = {
301 .dma_mask = &au1xxx_mmc_dmamask, 301 .dma_mask = &au1xxx_mmc_dmamask,
302 .coherent_dma_mask = DMA_32BIT_MASK, 302 .coherent_dma_mask = DMA_BIT_MASK(32),
303 .platform_data = &au1xmmc_platdata[1], 303 .platform_data = &au1xmmc_platdata[1],
304 }, 304 },
305 .num_resources = ARRAY_SIZE(au1200_mmc1_resources), 305 .num_resources = ARRAY_SIZE(au1200_mmc1_resources),
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
index 0d68e1985ffd..b93dff4a6789 100644
--- a/arch/mips/alchemy/devboards/pb1200/platform.c
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -119,14 +119,14 @@ static struct resource ide_resources[] = {
119 } 119 }
120}; 120};
121 121
122static u64 ide_dmamask = DMA_32BIT_MASK; 122static u64 ide_dmamask = DMA_BIT_MASK(32);
123 123
124static struct platform_device ide_device = { 124static struct platform_device ide_device = {
125 .name = "au1200-ide", 125 .name = "au1200-ide",
126 .id = 0, 126 .id = 0,
127 .dev = { 127 .dev = {
128 .dma_mask = &ide_dmamask, 128 .dma_mask = &ide_dmamask,
129 .coherent_dma_mask = DMA_32BIT_MASK, 129 .coherent_dma_mask = DMA_BIT_MASK(32),
130 }, 130 },
131 .num_resources = ARRAY_SIZE(ide_resources), 131 .num_resources = ARRAY_SIZE(ide_resources),
132 .resource = ide_resources 132 .resource = ide_resources
diff --git a/arch/mips/nxp/pnx833x/common/platform.c b/arch/mips/nxp/pnx833x/common/platform.c
index b1ccbcc18f78..01f8345a2069 100644
--- a/arch/mips/nxp/pnx833x/common/platform.c
+++ b/arch/mips/nxp/pnx833x/common/platform.c
@@ -42,7 +42,7 @@
42#include <irq-mapping.h> 42#include <irq-mapping.h>
43#include <pnx833x.h> 43#include <pnx833x.h>
44 44
45static u64 uart_dmamask = DMA_32BIT_MASK; 45static u64 uart_dmamask = DMA_BIT_MASK(32);
46 46
47static struct resource pnx833x_uart_resources[] = { 47static struct resource pnx833x_uart_resources[] = {
48 [0] = { 48 [0] = {
@@ -101,14 +101,14 @@ static struct platform_device pnx833x_uart_device = {
101 .id = -1, 101 .id = -1,
102 .dev = { 102 .dev = {
103 .dma_mask = &uart_dmamask, 103 .dma_mask = &uart_dmamask,
104 .coherent_dma_mask = DMA_32BIT_MASK, 104 .coherent_dma_mask = DMA_BIT_MASK(32),
105 .platform_data = pnx8xxx_ports, 105 .platform_data = pnx8xxx_ports,
106 }, 106 },
107 .num_resources = ARRAY_SIZE(pnx833x_uart_resources), 107 .num_resources = ARRAY_SIZE(pnx833x_uart_resources),
108 .resource = pnx833x_uart_resources, 108 .resource = pnx833x_uart_resources,
109}; 109};
110 110
111static u64 ehci_dmamask = DMA_32BIT_MASK; 111static u64 ehci_dmamask = DMA_BIT_MASK(32);
112 112
113static struct resource pnx833x_usb_ehci_resources[] = { 113static struct resource pnx833x_usb_ehci_resources[] = {
114 [0] = { 114 [0] = {
@@ -128,7 +128,7 @@ static struct platform_device pnx833x_usb_ehci_device = {
128 .id = -1, 128 .id = -1,
129 .dev = { 129 .dev = {
130 .dma_mask = &ehci_dmamask, 130 .dma_mask = &ehci_dmamask,
131 .coherent_dma_mask = DMA_32BIT_MASK, 131 .coherent_dma_mask = DMA_BIT_MASK(32),
132 }, 132 },
133 .num_resources = ARRAY_SIZE(pnx833x_usb_ehci_resources), 133 .num_resources = ARRAY_SIZE(pnx833x_usb_ehci_resources),
134 .resource = pnx833x_usb_ehci_resources, 134 .resource = pnx833x_usb_ehci_resources,
@@ -198,7 +198,7 @@ static struct platform_device pnx833x_i2c1_device = {
198}; 198};
199#endif 199#endif
200 200
201static u64 ethernet_dmamask = DMA_32BIT_MASK; 201static u64 ethernet_dmamask = DMA_BIT_MASK(32);
202 202
203static struct resource pnx833x_ethernet_resources[] = { 203static struct resource pnx833x_ethernet_resources[] = {
204 [0] = { 204 [0] = {
@@ -218,7 +218,7 @@ static struct platform_device pnx833x_ethernet_device = {
218 .id = -1, 218 .id = -1,
219 .dev = { 219 .dev = {
220 .dma_mask = &ethernet_dmamask, 220 .dma_mask = &ethernet_dmamask,
221 .coherent_dma_mask = DMA_32BIT_MASK, 221 .coherent_dma_mask = DMA_BIT_MASK(32),
222 }, 222 },
223 .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources), 223 .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
224 .resource = pnx833x_ethernet_resources, 224 .resource = pnx833x_ethernet_resources,
diff --git a/arch/mips/nxp/pnx8550/common/platform.c b/arch/mips/nxp/pnx8550/common/platform.c
index 21d2955359b3..5264cc09a27b 100644
--- a/arch/mips/nxp/pnx8550/common/platform.c
+++ b/arch/mips/nxp/pnx8550/common/platform.c
@@ -92,16 +92,16 @@ struct pnx8xxx_port pnx8xxx_ports[] = {
92}; 92};
93 93
94/* The dmamask must be set for OHCI to work */ 94/* The dmamask must be set for OHCI to work */
95static u64 ohci_dmamask = DMA_32BIT_MASK; 95static u64 ohci_dmamask = DMA_BIT_MASK(32);
96 96
97static u64 uart_dmamask = DMA_32BIT_MASK; 97static u64 uart_dmamask = DMA_BIT_MASK(32);
98 98
99static struct platform_device pnx8550_usb_ohci_device = { 99static struct platform_device pnx8550_usb_ohci_device = {
100 .name = "pnx8550-ohci", 100 .name = "pnx8550-ohci",
101 .id = -1, 101 .id = -1,
102 .dev = { 102 .dev = {
103 .dma_mask = &ohci_dmamask, 103 .dma_mask = &ohci_dmamask,
104 .coherent_dma_mask = DMA_32BIT_MASK, 104 .coherent_dma_mask = DMA_BIT_MASK(32),
105 }, 105 },
106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources), 106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
107 .resource = pnx8550_usb_ohci_resources, 107 .resource = pnx8550_usb_ohci_resources,
@@ -112,7 +112,7 @@ static struct platform_device pnx8550_uart_device = {
112 .id = -1, 112 .id = -1,
113 .dev = { 113 .dev = {
114 .dma_mask = &uart_dmamask, 114 .dma_mask = &uart_dmamask,
115 .coherent_dma_mask = DMA_32BIT_MASK, 115 .coherent_dma_mask = DMA_BIT_MASK(32),
116 .platform_data = pnx8xxx_ports, 116 .platform_data = pnx8xxx_ports,
117 }, 117 },
118 .num_resources = ARRAY_SIZE(pnx8550_uart_resources), 118 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_usb.c b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
index f7ca4f582331..0ee01e359dd8 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_usb.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
@@ -49,14 +49,14 @@ static struct resource msp_usbhost_resources [] = {
49 }, 49 },
50}; 50};
51 51
52static u64 msp_usbhost_dma_mask = DMA_32BIT_MASK; 52static u64 msp_usbhost_dma_mask = DMA_BIT_MASK(32);
53 53
54static struct platform_device msp_usbhost_device = { 54static struct platform_device msp_usbhost_device = {
55 .name = "pmcmsp-ehci", 55 .name = "pmcmsp-ehci",
56 .id = 0, 56 .id = 0,
57 .dev = { 57 .dev = {
58 .dma_mask = &msp_usbhost_dma_mask, 58 .dma_mask = &msp_usbhost_dma_mask,
59 .coherent_dma_mask = DMA_32BIT_MASK, 59 .coherent_dma_mask = DMA_BIT_MASK(32),
60 }, 60 },
61 .num_resources = ARRAY_SIZE(msp_usbhost_resources), 61 .num_resources = ARRAY_SIZE(msp_usbhost_resources),
62 .resource = msp_usbhost_resources, 62 .resource = msp_usbhost_resources,
@@ -77,14 +77,14 @@ static struct resource msp_usbdev_resources [] = {
77 }, 77 },
78}; 78};
79 79
80static u64 msp_usbdev_dma_mask = DMA_32BIT_MASK; 80static u64 msp_usbdev_dma_mask = DMA_BIT_MASK(32);
81 81
82static struct platform_device msp_usbdev_device = { 82static struct platform_device msp_usbdev_device = {
83 .name = "msp71xx_udc", 83 .name = "msp71xx_udc",
84 .id = 0, 84 .id = 0,
85 .dev = { 85 .dev = {
86 .dma_mask = &msp_usbdev_dma_mask, 86 .dma_mask = &msp_usbdev_dma_mask,
87 .coherent_dma_mask = DMA_32BIT_MASK, 87 .coherent_dma_mask = DMA_BIT_MASK(32),
88 }, 88 },
89 .num_resources = ARRAY_SIZE(msp_usbdev_resources), 89 .num_resources = ARRAY_SIZE(msp_usbdev_resources),
90 .resource = msp_usbdev_resources, 90 .resource = msp_usbdev_resources,
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9e08d8a69fdf..5b50e1ac6179 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -316,7 +316,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
316 316
317config KEXEC 317config KEXEC
318 bool "kexec system call (EXPERIMENTAL)" 318 bool "kexec system call (EXPERIMENTAL)"
319 depends on BOOK3S && EXPERIMENTAL 319 depends on PPC_BOOK3S && EXPERIMENTAL
320 help 320 help
321 kexec is a system call that implements the ability to shutdown your 321 kexec is a system call that implements the ability to shutdown your
322 current kernel, and to start another kernel. It is like a reboot 322 current kernel, and to start another kernel. It is like a reboot
@@ -775,6 +775,7 @@ config LOWMEM_CAM_NUM_BOOL
775 Say N here unless you know what you are doing. 775 Say N here unless you know what you are doing.
776 776
777config LOWMEM_CAM_NUM 777config LOWMEM_CAM_NUM
778 depends on FSL_BOOKE
778 int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL 779 int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
779 default 3 780 default 3
780 781
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 308fe7c29dea..c9cfd374bffb 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -57,14 +57,14 @@
57 bus-frequency = <0>; /* Fixed by bootwrapper */ 57 bus-frequency = <0>; /* Fixed by bootwrapper */
58 58
59 memory-controller@2000 { 59 memory-controller@2000 {
60 compatible = "fsl,8540-memory-controller"; 60 compatible = "fsl,mpc8540-memory-controller";
61 reg = <0x2000 0x1000>; 61 reg = <0x2000 0x1000>;
62 interrupt-parent = <&mpic>; 62 interrupt-parent = <&mpic>;
63 interrupts = <0x12 0x2>; 63 interrupts = <0x12 0x2>;
64 }; 64 };
65 65
66 L2: l2-cache-controller@20000 { 66 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller"; 67 compatible = "fsl,mpc8540-l2-cache-controller";
68 reg = <0x20000 0x1000>; 68 reg = <0x20000 0x1000>;
69 cache-line-size = <0x20>; /* 32 bytes */ 69 cache-line-size = <0x20>; /* 32 bytes */
70 cache-size = <0x40000>; /* L2, 256K */ 70 cache-size = <0x40000>; /* L2, 256K */
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index b2d61091b36d..0bb669376743 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -17,6 +17,14 @@
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
20 cpus { 28 cpus {
21 #address-cells = <1>; 29 #address-cells = <1>;
22 #size-cells = <0>; 30 #size-cells = <0>;
@@ -45,7 +53,7 @@
45 #size-cells = <1>; 53 #size-cells = <1>;
46 reg = <0xf0010100 0x60>; 54 reg = <0xf0010100 0x60>;
47 55
48 ranges = <0x0 0x0 0xfe000000 0x800000 56 ranges = <0x0 0x0 0xff800000 0x800000
49 0x1 0x0 0xf4500000 0x8000 57 0x1 0x0 0xf4500000 0x8000
50 0x8 0x0 0xf8200000 0x8000>; 58 0x8 0x0 0xf8200000 0x8000>;
51 59
@@ -71,7 +79,7 @@
71 }; 79 };
72 }; 80 };
73 81
74 pci@f0010800 { 82 pci0: pci@f0010800 {
75 device_type = "pci"; 83 device_type = "pci";
76 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; 84 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
77 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; 85 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
@@ -142,7 +150,7 @@
142 reg = <0x119f0 0x10 0x115f0 0x10>; 150 reg = <0x119f0 0x10 0x115f0 0x10>;
143 }; 151 };
144 152
145 serial@11a00 { 153 serial0: serial@11a00 {
146 device_type = "serial"; 154 device_type = "serial";
147 compatible = "fsl,mpc8280-scc-uart", 155 compatible = "fsl,mpc8280-scc-uart",
148 "fsl,cpm2-scc-uart"; 156 "fsl,cpm2-scc-uart";
@@ -153,7 +161,7 @@
153 fsl,cpm-command = <0x800000>; 161 fsl,cpm-command = <0x800000>;
154 }; 162 };
155 163
156 serial@11a20 { 164 serial1: serial@11a20 {
157 device_type = "serial"; 165 device_type = "serial";
158 compatible = "fsl,mpc8280-scc-uart", 166 compatible = "fsl,mpc8280-scc-uart",
159 "fsl,cpm2-scc-uart"; 167 "fsl,cpm2-scc-uart";
@@ -164,7 +172,7 @@
164 fsl,cpm-command = <0x4a00000>; 172 fsl,cpm-command = <0x4a00000>;
165 }; 173 };
166 174
167 ethernet@11320 { 175 enet0: ethernet@11320 {
168 device_type = "network"; 176 device_type = "network";
169 compatible = "fsl,mpc8280-fcc-enet", 177 compatible = "fsl,mpc8280-fcc-enet",
170 "fsl,cpm2-fcc-enet"; 178 "fsl,cpm2-fcc-enet";
@@ -176,7 +184,7 @@
176 fsl,cpm-command = <0x16200300>; 184 fsl,cpm-command = <0x16200300>;
177 }; 185 };
178 186
179 ethernet@11340 { 187 enet1: ethernet@11340 {
180 device_type = "network"; 188 device_type = "network";
181 compatible = "fsl,mpc8280-fcc-enet", 189 compatible = "fsl,mpc8280-fcc-enet",
182 "fsl,cpm2-fcc-enet"; 190 "fsl,cpm2-fcc-enet";
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 9c5079fec4f2..b1f1416ac998 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -156,14 +156,14 @@
156 compatible = "simple-bus"; 156 compatible = "simple-bus";
157 157
158 memory-controller@2000 { 158 memory-controller@2000 {
159 compatible = "fsl,8548-memory-controller"; 159 compatible = "fsl,mpc8548-memory-controller";
160 reg = <0x2000 0x1000>; 160 reg = <0x2000 0x1000>;
161 interrupt-parent = <&mpic>; 161 interrupt-parent = <&mpic>;
162 interrupts = <0x12 0x2>; 162 interrupts = <0x12 0x2>;
163 }; 163 };
164 164
165 L2: l2-cache-controller@20000 { 165 L2: l2-cache-controller@20000 {
166 compatible = "fsl,8548-l2-cache-controller"; 166 compatible = "fsl,mpc8548-l2-cache-controller";
167 reg = <0x20000 0x1000>; 167 reg = <0x20000 0x1000>;
168 cache-line-size = <0x20>; // 32 bytes 168 cache-line-size = <0x20>; // 32 bytes
169 cache-size = <0x80000>; // L2, 512K 169 cache-size = <0x80000>; // L2, 512K
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index b772405a9a0a..c4564b81e473 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -61,14 +61,14 @@
61 clock-frequency = <0>; 61 clock-frequency = <0>;
62 62
63 memory-controller@2000 { 63 memory-controller@2000 {
64 compatible = "fsl,8560-memory-controller"; 64 compatible = "fsl,mpc8560-memory-controller";
65 reg = <0x2000 0x1000>; 65 reg = <0x2000 0x1000>;
66 interrupt-parent = <&mpic>; 66 interrupt-parent = <&mpic>;
67 interrupts = <0x12 0x2>; 67 interrupts = <0x12 0x2>;
68 }; 68 };
69 69
70 L2: l2-cache-controller@20000 { 70 L2: l2-cache-controller@20000 {
71 compatible = "fsl,8560-l2-cache-controller"; 71 compatible = "fsl,mpc8560-l2-cache-controller";
72 reg = <0x20000 0x1000>; 72 reg = <0x20000 0x1000>;
73 cache-line-size = <0x20>; // 32 bytes 73 cache-line-size = <0x20>; // 32 bytes
74 cache-size = <0x40000>; // L2, 256K 74 cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
index b8d0fc6f0042..7a6ae75a1e57 100644
--- a/arch/powerpc/boot/dts/socrates.dts
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -52,6 +52,7 @@
52 soc8544@e0000000 { 52 soc8544@e0000000 {
53 #address-cells = <1>; 53 #address-cells = <1>;
54 #size-cells = <1>; 54 #size-cells = <1>;
55 device_type = "soc";
55 56
56 ranges = <0x00000000 0xe0000000 0x00100000>; 57 ranges = <0x00000000 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M 58 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
@@ -78,11 +79,11 @@
78 #address-cells = <1>; 79 #address-cells = <1>;
79 #size-cells = <0>; 80 #size-cells = <0>;
80 cell-index = <0>; 81 cell-index = <0>;
81 compatible = "fsl-i2c"; 82 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
82 reg = <0x3000 0x100>; 83 reg = <0x3000 0x100>;
83 interrupts = <43 2>; 84 interrupts = <43 2>;
84 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
85 dfsrr; 86 fsl,preserve-clocking;
86 87
87 dtt@28 { 88 dtt@28 {
88 compatible = "winbond,w83782d"; 89 compatible = "winbond,w83782d";
@@ -110,11 +111,11 @@
110 #address-cells = <1>; 111 #address-cells = <1>;
111 #size-cells = <0>; 112 #size-cells = <0>;
112 cell-index = <1>; 113 cell-index = <1>;
113 compatible = "fsl-i2c"; 114 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
114 reg = <0x3100 0x100>; 115 reg = <0x3100 0x100>;
115 interrupts = <43 2>; 116 interrupts = <43 2>;
116 interrupt-parent = <&mpic>; 117 interrupt-parent = <&mpic>;
117 dfsrr; 118 fsl,preserve-clocking;
118 }; 119 };
119 120
120 enet0: ethernet@24000 { 121 enet0: ethernet@24000 {
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index 8b173957fb5f..ea6b15152de3 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -57,14 +57,14 @@
57 compatible = "fsl,mpc8560-immr", "simple-bus"; 57 compatible = "fsl,mpc8560-immr", "simple-bus";
58 58
59 memory-controller@2000 { 59 memory-controller@2000 {
60 compatible = "fsl,8540-memory-controller"; 60 compatible = "fsl,mpc8540-memory-controller";
61 reg = <0x2000 0x1000>; 61 reg = <0x2000 0x1000>;
62 interrupt-parent = <&mpic>; 62 interrupt-parent = <&mpic>;
63 interrupts = <18 2>; 63 interrupts = <18 2>;
64 }; 64 };
65 65
66 L2: l2-cache-controller@20000 { 66 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller"; 67 compatible = "fsl,mpc8540-l2-cache-controller";
68 reg = <0x20000 0x1000>; 68 reg = <0x20000 0x1000>;
69 cache-line-size = <32>; 69 cache-line-size = <32>;
70 cache-size = <0x40000>; // L2, 256K 70 cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index ac9413a29f9f..231bae756637 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -59,14 +59,14 @@
59 compatible = "fsl,mpc8540-immr", "simple-bus"; 59 compatible = "fsl,mpc8540-immr", "simple-bus";
60 60
61 memory-controller@2000 { 61 memory-controller@2000 {
62 compatible = "fsl,8540-memory-controller"; 62 compatible = "fsl,mpc8540-memory-controller";
63 reg = <0x2000 0x1000>; 63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>; 64 interrupt-parent = <&mpic>;
65 interrupts = <18 2>; 65 interrupts = <18 2>;
66 }; 66 };
67 67
68 L2: l2-cache-controller@20000 { 68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,8540-l2-cache-controller"; 69 compatible = "fsl,mpc8540-l2-cache-controller";
70 reg = <0x20000 0x1000>; 70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>; 71 cache-line-size = <32>;
72 cache-size = <0x40000>; // L2, 256K 72 cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index c71bb5dd5e5e..4356a1f08295 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -58,14 +58,14 @@
58 compatible = "fsl,mpc8541-immr", "simple-bus"; 58 compatible = "fsl,mpc8541-immr", "simple-bus";
59 59
60 memory-controller@2000 { 60 memory-controller@2000 {
61 compatible = "fsl,8540-memory-controller"; 61 compatible = "fsl,mpc8540-memory-controller";
62 reg = <0x2000 0x1000>; 62 reg = <0x2000 0x1000>;
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <18 2>; 64 interrupts = <18 2>;
65 }; 65 };
66 66
67 L2: l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller"; 68 compatible = "fsl,mpc8540-l2-cache-controller";
69 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; 70 cache-line-size = <32>;
71 cache-size = <0x40000>; // L2, 256K 71 cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index a133ded6dddb..06d366ebbda3 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -58,14 +58,14 @@
58 compatible = "fsl,mpc8555-immr", "simple-bus"; 58 compatible = "fsl,mpc8555-immr", "simple-bus";
59 59
60 memory-controller@2000 { 60 memory-controller@2000 {
61 compatible = "fsl,8540-memory-controller"; 61 compatible = "fsl,mpc8540-memory-controller";
62 reg = <0x2000 0x1000>; 62 reg = <0x2000 0x1000>;
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <18 2>; 64 interrupts = <18 2>;
65 }; 65 };
66 66
67 L2: l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller"; 68 compatible = "fsl,mpc8540-l2-cache-controller";
69 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; 70 cache-line-size = <32>;
71 cache-size = <0x40000>; // L2, 256K 71 cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 649e2e576267..feff915e0492 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -60,14 +60,14 @@
60 compatible = "fsl,mpc8560-immr", "simple-bus"; 60 compatible = "fsl,mpc8560-immr", "simple-bus";
61 61
62 memory-controller@2000 { 62 memory-controller@2000 {
63 compatible = "fsl,8540-memory-controller"; 63 compatible = "fsl,mpc8540-memory-controller";
64 reg = <0x2000 0x1000>; 64 reg = <0x2000 0x1000>;
65 interrupt-parent = <&mpic>; 65 interrupt-parent = <&mpic>;
66 interrupts = <18 2>; 66 interrupts = <18 2>;
67 }; 67 };
68 68
69 L2: l2-cache-controller@20000 { 69 L2: l2-cache-controller@20000 {
70 compatible = "fsl,8540-l2-cache-controller"; 70 compatible = "fsl,mpc8540-l2-cache-controller";
71 reg = <0x20000 0x1000>; 71 reg = <0x20000 0x1000>;
72 cache-line-size = <32>; 72 cache-line-size = <32>;
73 cache-size = <0x40000>; // L2, 256K 73 cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 61b100849715..f1889abb89b1 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -95,7 +95,7 @@ CONFIG_CGROUP_CPUACCT=y
95CONFIG_SYSFS_DEPRECATED=y 95CONFIG_SYSFS_DEPRECATED=y
96CONFIG_SYSFS_DEPRECATED_V2=y 96CONFIG_SYSFS_DEPRECATED_V2=y
97CONFIG_PROC_PID_CPUSET=y 97CONFIG_PROC_PID_CPUSET=y
98# CONFIG_RELAY is not set 98CONFIG_RELAY=y
99CONFIG_NAMESPACES=y 99CONFIG_NAMESPACES=y
100# CONFIG_UTS_NS is not set 100# CONFIG_UTS_NS is not set
101# CONFIG_IPC_NS is not set 101# CONFIG_IPC_NS is not set
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 68235f7e4a8f..d2a65e8ca6ae 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -125,7 +125,7 @@ struct lppaca {
125 // NOTE: This value will ALWAYS be zero for dedicated processors and 125 // NOTE: This value will ALWAYS be zero for dedicated processors and
126 // will NEVER be zero for shared processors (ie, initialized to a 1). 126 // will NEVER be zero for shared processors (ie, initialized to a 1).
127 volatile u32 yield_count; // PLIC increments each dispatchx00-x03 127 volatile u32 yield_count; // PLIC increments each dispatchx00-x03
128 u32 reserved6; 128 volatile u32 dispersion_count; // dispatch changed phys cpu x04-x07
129 volatile u64 cmo_faults; // CMO page fault count x08-x0F 129 volatile u64 cmo_faults; // CMO page fault count x08-x0F
130 volatile u64 cmo_fault_time; // CMO page fault time x10-x17 130 volatile u64 cmo_fault_time; // CMO page fault time x10-x17
131 u8 reserved7[104]; // Reserved x18-x7F 131 u8 reserved7[104]; // Reserved x18-x7F
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c2ccca53b991..a002682f3a6d 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -22,6 +22,14 @@
22#define MPIC_GREG_FEATURE_1 0x00010 22#define MPIC_GREG_FEATURE_1 0x00010
23#define MPIC_GREG_GLOBAL_CONF_0 0x00020 23#define MPIC_GREG_GLOBAL_CONF_0 0x00020
24#define MPIC_GREG_GCONF_RESET 0x80000000 24#define MPIC_GREG_GCONF_RESET 0x80000000
25/* On the FSL mpic implementations the Mode field is expand to be
26 * 2 bits wide:
27 * 0b00 = pass through (interrupts routed to IRQ0)
28 * 0b01 = Mixed mode
29 * 0b10 = reserved
30 * 0b11 = External proxy / coreint
31 */
32#define MPIC_GREG_GCONF_COREINT 0x60000000
25#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 33#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
26#define MPIC_GREG_GCONF_NO_BIAS 0x10000000 34#define MPIC_GREG_GCONF_NO_BIAS 0x10000000
27#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff 35#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
@@ -357,6 +365,8 @@ struct mpic
357#define MPIC_BROKEN_FRR_NIRQS 0x00000800 365#define MPIC_BROKEN_FRR_NIRQS 0x00000800
358/* Destination only supports a single CPU at a time */ 366/* Destination only supports a single CPU at a time */
359#define MPIC_SINGLE_DEST_CPU 0x00001000 367#define MPIC_SINGLE_DEST_CPU 0x00001000
368/* Enable CoreInt delivery of interrupts */
369#define MPIC_ENABLE_COREINT 0x00002000
360 370
361/* MPIC HW modification ID */ 371/* MPIC HW modification ID */
362#define MPIC_REGSET_MASK 0xf0000000 372#define MPIC_REGSET_MASK 0xf0000000
@@ -470,6 +480,8 @@ extern void mpic_end_irq(unsigned int irq);
470extern unsigned int mpic_get_one_irq(struct mpic *mpic); 480extern unsigned int mpic_get_one_irq(struct mpic *mpic);
471/* This one gets from the primary mpic */ 481/* This one gets from the primary mpic */
472extern unsigned int mpic_get_irq(void); 482extern unsigned int mpic_get_irq(void);
483/* This one gets from the primary mpic via CoreInt*/
484extern unsigned int mpic_get_coreint_irq(void);
473/* Fetch Machine Check interrupt from primary mpic */ 485/* Fetch Machine Check interrupt from primary mpic */
474extern unsigned int mpic_get_mcirq(void); 486extern unsigned int mpic_get_mcirq(void);
475 487
diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/asm/ps3fb.h
index 90dbefb8cfc4..e7233a849680 100644
--- a/arch/powerpc/include/asm/ps3fb.h
+++ b/arch/powerpc/include/asm/ps3fb.h
@@ -21,7 +21,6 @@
21 21
22#include <linux/types.h> 22#include <linux/types.h>
23#include <linux/ioctl.h> 23#include <linux/ioctl.h>
24#include <linux/types.h>
25 24
26/* ioctl */ 25/* ioctl */
27#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */ 26#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index d9740e886801..a7e210b6b48c 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -151,9 +151,11 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
151 _PAGE_NO_CACHE) 151 _PAGE_NO_CACHE)
152#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \ 152#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
153 _PAGE_NO_CACHE | _PAGE_GUARDED) 153 _PAGE_NO_CACHE | _PAGE_GUARDED)
154#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC) 154#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC | \
155 _PAGE_HWEXEC)
155#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO) 156#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
156#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC) 157#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC | \
158 _PAGE_HWEXEC)
157 159
158/* Protection used for kernel text. We want the debuggers to be able to 160/* Protection used for kernel text. We want the debuggers to be able to
159 * set breakpoints anywhere, so don't write protect the kernel text 161 * set breakpoints anywhere, so don't write protect the kernel text
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c9ff1ec97479..e8018d540e87 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -143,6 +143,36 @@
143#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ 143#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */
144#define FPSCR_RN 0x00000003 /* FPU rounding control */ 144#define FPSCR_RN 0x00000003 /* FPU rounding control */
145 145
146/* Bit definitions for SPEFSCR. */
147#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */
148#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */
149#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */
150#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */
151#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */
152#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */
153#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */
154#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */
155#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */
156#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */
157#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */
158#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */
159#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */
160#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */
161#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */
162#define SPEFSCR_OV 0x00004000 /* Integer overflow */
163#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */
164#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */
165#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */
166#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */
167#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */
168#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */
169#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */
170#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */
171#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */
172#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */
173#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */
174#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
175
146/* Special Purpose Registers (SPRNs)*/ 176/* Special Purpose Registers (SPRNs)*/
147#define SPRN_CTR 0x009 /* Count Register */ 177#define SPRN_CTR 0x009 /* Count Register */
148#define SPRN_DSCR 0x11 178#define SPRN_DSCR 0x11
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index a56f4d61aa72..601ddbc46002 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -423,36 +423,6 @@
423#define SGR_NORMAL 0 /* Speculative fetching allowed. */ 423#define SGR_NORMAL 0 /* Speculative fetching allowed. */
424#define SGR_GUARDED 1 /* Speculative fetching disallowed. */ 424#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
425 425
426/* Bit definitions for SPEFSCR. */
427#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */
428#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */
429#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */
430#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */
431#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */
432#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */
433#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */
434#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */
435#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */
436#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */
437#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */
438#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */
439#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */
440#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */
441#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */
442#define SPEFSCR_OV 0x00004000 /* Integer overflow */
443#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */
444#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */
445#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */
446#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */
447#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */
448#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */
449#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */
450#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */
451#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */
452#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */
453#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */
454#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
455
456/* 426/*
457 * The IBM-403 is an even more odd special case, as it is much 427 * The IBM-403 is an even more odd special case, as it is much
458 * older than the IBM-405 series. We put these down here incase someone 428 * older than the IBM-405 series. We put these down here incase someone
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 0aa0315fb7e8..01c12339b304 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -68,7 +68,8 @@ struct rtas_t {
68#define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */ 68#define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */
69#define RTAS_POWERMGM_EVENTS 0x20000000 /* set bit 2 */ 69#define RTAS_POWERMGM_EVENTS 0x20000000 /* set bit 2 */
70#define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */ 70#define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */
71#define RTAS_EVENT_SCAN_ALL_EVENTS 0xf0000000 71#define RTAS_IO_EVENTS 0x08000000 /* set bit 4 */
72#define RTAS_EVENT_SCAN_ALL_EVENTS 0xffffffff
72 73
73/* RTAS event severity */ 74/* RTAS event severity */
74#define RTAS_SEVERITY_FATAL 0x5 75#define RTAS_SEVERITY_FATAL 0x5
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index 3d9f831c3c55..3a7a67a0d006 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -29,9 +29,9 @@
29 29
30/* basic word size definitions */ 30/* basic word size definitions */
31#define _FP_W_TYPE_SIZE 32 31#define _FP_W_TYPE_SIZE 32
32#define _FP_W_TYPE unsigned long 32#define _FP_W_TYPE unsigned int
33#define _FP_WS_TYPE signed long 33#define _FP_WS_TYPE signed int
34#define _FP_I_TYPE long 34#define _FP_I_TYPE int
35 35
36#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) 36#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
37#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) 37#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index fe166491e9dc..d98a30dfd41c 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -322,3 +322,6 @@ SYSCALL_SPU(epoll_create1)
322SYSCALL_SPU(dup3) 322SYSCALL_SPU(dup3)
323SYSCALL_SPU(pipe2) 323SYSCALL_SPU(pipe2)
324SYSCALL(inotify_init1) 324SYSCALL(inotify_init1)
325SYSCALL(ni_syscall)
326COMPAT_SYS_SPU(preadv)
327COMPAT_SYS_SPU(pwritev)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index e07d0c76ed77..3f06f8ec81c5 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -341,10 +341,12 @@
341#define __NR_dup3 316 341#define __NR_dup3 316
342#define __NR_pipe2 317 342#define __NR_pipe2 317
343#define __NR_inotify_init1 318 343#define __NR_inotify_init1 318
344#define __NR_preadv 320
345#define __NR_pwritev 321
344 346
345#ifdef __KERNEL__ 347#ifdef __KERNEL__
346 348
347#define __NR_syscalls 319 349#define __NR_syscalls 322
348 350
349#define __NR__exit __NR_exit 351#define __NR__exit __NR_exit
350#define NR_syscalls __NR_syscalls 352#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 1c5c8a6fc129..53c7788cba78 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -94,7 +94,7 @@ static int dma_direct_dma_supported(struct device *dev, u64 mask)
94 * done via some global so platforms can set the limit in case 94 * done via some global so platforms can set the limit in case
95 * they have limited DMA windows 95 * they have limited DMA windows
96 */ 96 */
97 return mask >= DMA_32BIT_MASK; 97 return mask >= DMA_BIT_MASK(32);
98#else 98#else
99 return 1; 99 return 1;
100#endif 100#endif
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index a088c064ae40..2436df33c6f4 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -145,6 +145,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
145 beq 1f 145 beq 1f
146 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 146 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
147 li r3,MSR_FP|MSR_FE0|MSR_FE1 147 li r3,MSR_FP|MSR_FE0|MSR_FE1
148#ifdef CONFIG_VSX
149BEGIN_FTR_SECTION
150 oris r3,r3,MSR_VSX@h
151END_FTR_SECTION_IFSET(CPU_FTR_VSX)
152#endif
148 andc r4,r4,r3 /* disable FP for previous task */ 153 andc r4,r4,r3 /* disable FP for previous task */
149 PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 154 PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
1501: 1551:
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 5455943f16aa..70e2a736be1f 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -293,7 +293,7 @@ __ftrace_make_nop(struct module *mod,
293 if (tramp & 0x8000) 293 if (tramp & 0x8000)
294 tramp -= 0x10000; 294 tramp -= 0x10000;
295 295
296 pr_debug(" %x ", tramp); 296 pr_debug(" %lx ", tramp);
297 297
298 if (tramp != addr) { 298 if (tramp != addr) {
299 printk(KERN_ERR 299 printk(KERN_ERR
@@ -564,7 +564,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
564 if (unlikely(atomic_read(&current->tracing_graph_pause))) 564 if (unlikely(atomic_read(&current->tracing_graph_pause)))
565 return; 565 return;
566 566
567#if CONFIG_PPC64 567#ifdef CONFIG_PPC64
568 /* non core kernel code needs to save and restore the TOC */ 568 /* non core kernel code needs to save and restore the TOC */
569 if (REGION_ID(self_addr) != KERNEL_REGION_ID) 569 if (REGION_ID(self_addr) != KERNEL_REGION_ID)
570 return_hooker = (unsigned long)&mod_return_to_handler; 570 return_hooker = (unsigned long)&mod_return_to_handler;
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 5576147e57b6..8c1a4966867e 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -672,11 +672,13 @@ unsigned int irq_create_mapping(struct irq_host *host,
672 return NO_IRQ; 672 return NO_IRQ;
673 } 673 }
674 } 674 }
675 pr_debug("irq: -> obtained virq %d\n", virq);
676 675
677 if (irq_setup_virq(host, virq, hwirq)) 676 if (irq_setup_virq(host, virq, hwirq))
678 return NO_IRQ; 677 return NO_IRQ;
679 678
679 printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n",
680 hwirq, host->of_node ? host->of_node->full_name : "null", virq);
681
680 return virq; 682 return virq;
681} 683}
682EXPORT_SYMBOL_GPL(irq_create_mapping); 684EXPORT_SYMBOL_GPL(irq_create_mapping);
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 182e0f642f36..78b3f7840ade 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -434,6 +434,21 @@ static void pseries_cmo_data(struct seq_file *m)
434 seq_printf(m, "cmo_page_size=%lu\n", cmo_get_page_size()); 434 seq_printf(m, "cmo_page_size=%lu\n", cmo_get_page_size());
435} 435}
436 436
437static void splpar_dispatch_data(struct seq_file *m)
438{
439 int cpu;
440 unsigned long dispatches = 0;
441 unsigned long dispatch_dispersions = 0;
442
443 for_each_possible_cpu(cpu) {
444 dispatches += lppaca[cpu].yield_count;
445 dispatch_dispersions += lppaca[cpu].dispersion_count;
446 }
447
448 seq_printf(m, "dispatches=%lu\n", dispatches);
449 seq_printf(m, "dispatch_dispersions=%lu\n", dispatch_dispersions);
450}
451
437static int pseries_lparcfg_data(struct seq_file *m, void *v) 452static int pseries_lparcfg_data(struct seq_file *m, void *v)
438{ 453{
439 int partition_potential_processors; 454 int partition_potential_processors;
@@ -460,6 +475,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)
460 parse_ppp_data(m); 475 parse_ppp_data(m);
461 parse_mpp_data(m); 476 parse_mpp_data(m);
462 pseries_cmo_data(m); 477 pseries_cmo_data(m);
478 splpar_dispatch_data(m);
463 479
464 seq_printf(m, "purr=%ld\n", get_purr()); 480 seq_printf(m, "purr=%ld\n", get_purr());
465 } else { /* non SPLPAR case */ 481 } else { /* non SPLPAR case */
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 3053fe5c62f2..b9530b2395a2 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -495,7 +495,15 @@ _GLOBAL(giveup_altivec)
495 stvx vr0,r4,r3 495 stvx vr0,r4,r3
496 beq 1f 496 beq 1f
497 ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) 497 ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
498#ifdef CONFIG_VSX
499BEGIN_FTR_SECTION
500 lis r3,(MSR_VEC|MSR_VSX)@h
501FTR_SECTION_ELSE
502 lis r3,MSR_VEC@h
503ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX)
504#else
498 lis r3,MSR_VEC@h 505 lis r3,MSR_VEC@h
506#endif
499 andc r4,r4,r3 /* disable FP for previous task */ 507 andc r4,r4,r3 /* disable FP for previous task */
500 std r4,_MSR-STACK_FRAME_OVERHEAD(r5) 508 std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
5011: 5091:
diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c
index 3f37a6e62771..87df428e3588 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -76,7 +76,7 @@ struct of_device* of_platform_device_create(struct device_node *np,
76 return NULL; 76 return NULL;
77 77
78 dev->dma_mask = 0xffffffffUL; 78 dev->dma_mask = 0xffffffffUL;
79 dev->dev.coherent_dma_mask = DMA_32BIT_MASK; 79 dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
80 80
81 dev->dev.bus = &of_platform_bus_type; 81 dev->dev.bus = &of_platform_bus_type;
82 82
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 2e026c0407d4..2f0e64b53642 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -614,7 +614,7 @@ static unsigned char ibm_architecture_vec[] = {
614 W(0xffffffff), /* virt_base */ 614 W(0xffffffff), /* virt_base */
615 W(0xffffffff), /* virt_size */ 615 W(0xffffffff), /* virt_size */
616 W(0xffffffff), /* load_base */ 616 W(0xffffffff), /* load_base */
617 W(64), /* 128MB min RMA */ 617 W(64), /* 64MB min RMA */
618 W(0xffffffff), /* full client load */ 618 W(0xffffffff), /* full client load */
619 0, /* min RMA percentage of total RAM */ 619 0, /* min RMA percentage of total RAM */
620 48, /* max log_2(hash table size) */ 620 48, /* max log_2(hash table size) */
@@ -732,15 +732,17 @@ static void __init prom_send_capabilities(void)
732 root = call_prom("open", 1, 1, ADDR("/")); 732 root = call_prom("open", 1, 1, ADDR("/"));
733 if (root != 0) { 733 if (root != 0) {
734 /* try calling the ibm,client-architecture-support method */ 734 /* try calling the ibm,client-architecture-support method */
735 prom_printf("Calling ibm,client-architecture...");
735 if (call_prom_ret("call-method", 3, 2, &ret, 736 if (call_prom_ret("call-method", 3, 2, &ret,
736 ADDR("ibm,client-architecture-support"), 737 ADDR("ibm,client-architecture-support"),
737 root, 738 root,
738 ADDR(ibm_architecture_vec)) == 0) { 739 ADDR(ibm_architecture_vec)) == 0) {
739 /* the call exists... */ 740 /* the call exists... */
740 if (ret) 741 if (ret)
741 prom_printf("WARNING: ibm,client-architecture" 742 prom_printf("\nWARNING: ibm,client-architecture"
742 "-support call FAILED!\n"); 743 "-support call FAILED!\n");
743 call_prom("close", 1, 0, root); 744 call_prom("close", 1, 0, root);
745 prom_printf(" done\n");
744 return; 746 return;
745 } 747 }
746 call_prom("close", 1, 0, root); 748 call_prom("close", 1, 0, root);
@@ -1083,7 +1085,7 @@ static void __init prom_instantiate_rtas(void)
1083 return; 1085 return;
1084 } 1086 }
1085 1087
1086 prom_printf("instantiating rtas at 0x%x ...", base); 1088 prom_printf("instantiating rtas at 0x%x...", base);
1087 1089
1088 if (call_prom_ret("call-method", 3, 2, &entry, 1090 if (call_prom_ret("call-method", 3, 2, &entry,
1089 ADDR("instantiate-rtas"), 1091 ADDR("instantiate-rtas"),
@@ -1495,7 +1497,7 @@ static int __init prom_find_machine_type(void)
1495 return PLATFORM_GENERIC; 1497 return PLATFORM_GENERIC;
1496 x = prom_getproplen(rtas, "ibm,hypertas-functions"); 1498 x = prom_getproplen(rtas, "ibm,hypertas-functions");
1497 if (x != PROM_ERROR) { 1499 if (x != PROM_ERROR) {
1498 prom_printf("Hypertas detected, assuming LPAR !\n"); 1500 prom_debug("Hypertas detected, assuming LPAR !\n");
1499 return PLATFORM_PSERIES_LPAR; 1501 return PLATFORM_PSERIES_LPAR;
1500 } 1502 }
1501 return PLATFORM_PSERIES; 1503 return PLATFORM_PSERIES;
@@ -1544,7 +1546,7 @@ static void __init prom_check_displays(void)
1544 }; 1546 };
1545 const unsigned char *clut; 1547 const unsigned char *clut;
1546 1548
1547 prom_printf("Looking for displays\n"); 1549 prom_debug("Looking for displays\n");
1548 for (node = 0; prom_next_node(&node); ) { 1550 for (node = 0; prom_next_node(&node); ) {
1549 memset(type, 0, sizeof(type)); 1551 memset(type, 0, sizeof(type));
1550 prom_getprop(node, "device_type", type, sizeof(type)); 1552 prom_getprop(node, "device_type", type, sizeof(type));
@@ -1562,7 +1564,7 @@ static void __init prom_check_displays(void)
1562 if (call_prom("package-to-path", 3, 1, node, path, 1564 if (call_prom("package-to-path", 3, 1, node, path,
1563 PROM_SCRATCH_SIZE-10) == PROM_ERROR) 1565 PROM_SCRATCH_SIZE-10) == PROM_ERROR)
1564 continue; 1566 continue;
1565 prom_printf("found display : %s, opening ... ", path); 1567 prom_printf("found display : %s, opening... ", path);
1566 1568
1567 ih = call_prom("open", 1, 1, path); 1569 ih = call_prom("open", 1, 1, path);
1568 if (ih == 0) { 1570 if (ih == 0) {
@@ -2387,7 +2389,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2387 /* 2389 /*
2388 * Now finally create the flattened device-tree 2390 * Now finally create the flattened device-tree
2389 */ 2391 */
2390 prom_printf("copying OF device tree ...\n"); 2392 prom_printf("copying OF device tree...\n");
2391 flatten_device_tree(); 2393 flatten_device_tree();
2392 2394
2393 /* 2395 /*
@@ -2402,7 +2404,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2402 * Call OF "quiesce" method to shut down pending DMA's from 2404 * Call OF "quiesce" method to shut down pending DMA's from
2403 * devices etc... 2405 * devices etc...
2404 */ 2406 */
2405 prom_printf("Calling quiesce ...\n"); 2407 prom_printf("Calling quiesce...\n");
2406 call_prom("quiesce", 0, 0); 2408 call_prom("quiesce", 0, 0);
2407 2409
2408 /* 2410 /*
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 197d49c790ad..297632cba047 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -67,7 +67,8 @@ static long compat_ptrace_old(struct task_struct *child, long request,
67/* Macros to workout the correct index for the FPR in the thread struct */ 67/* Macros to workout the correct index for the FPR in the thread struct */
68#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) 68#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
69#define FPRHALF(i) (((i) - PT_FPR0) & 1) 69#define FPRHALF(i) (((i) - PT_FPR0) & 1)
70#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i) 70#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) * 2 + FPRHALF(i)
71#define FPRINDEX_3264(i) (TS_FPRWIDTH * ((i) - PT_FPR0))
71 72
72long compat_arch_ptrace(struct task_struct *child, compat_long_t request, 73long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
73 compat_ulong_t caddr, compat_ulong_t cdata) 74 compat_ulong_t caddr, compat_ulong_t cdata)
@@ -168,8 +169,9 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
168 CHECK_FULL_REGS(child->thread.regs); 169 CHECK_FULL_REGS(child->thread.regs);
169 if (numReg >= PT_FPR0) { 170 if (numReg >= PT_FPR0) {
170 flush_fp_to_thread(child); 171 flush_fp_to_thread(child);
171 tmp = ((unsigned long int *)child->thread.fpr) 172 /* get 64 bit FPR */
172 [FPRINDEX(numReg)]; 173 tmp = ((u64 *)child->thread.fpr)
174 [FPRINDEX_3264(numReg)];
173 } else { /* register within PT_REGS struct */ 175 } else { /* register within PT_REGS struct */
174 tmp = ptrace_get_reg(child, numReg); 176 tmp = ptrace_get_reg(child, numReg);
175 } 177 }
@@ -262,8 +264,13 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
262 freg = (freg & 0xfffffffful) | (data << 32); 264 freg = (freg & 0xfffffffful) | (data << 32);
263 ret = ptrace_put_reg(child, numReg, freg); 265 ret = ptrace_put_reg(child, numReg, freg);
264 } else { 266 } else {
267 u64 *tmp;
265 flush_fp_to_thread(child); 268 flush_fp_to_thread(child);
266 ((unsigned int *)child->thread.regs)[index] = data; 269 /* get 64 bit FPR ... */
270 tmp = &(((u64 *)child->thread.fpr)
271 [FPRINDEX_3264(numReg)]);
272 /* ... write the 32 bit part we want */
273 ((u32 *)tmp)[index % 2] = data;
267 ret = 0; 274 ret = 0;
268 } 275 }
269 break; 276 break;
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 9774f9fed96e..02fed27af7f6 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -36,7 +36,6 @@
36#include <linux/percpu.h> 36#include <linux/percpu.h>
37#include <linux/lmb.h> 37#include <linux/lmb.h>
38#include <linux/of_platform.h> 38#include <linux/of_platform.h>
39#include <linux/platform_device.h>
40#include <asm/io.h> 39#include <asm/io.h>
41#include <asm/prom.h> 40#include <asm/prom.h>
42#include <asm/processor.h> 41#include <asm/processor.h>
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 5744527a7f2a..bed4690de394 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -644,7 +644,7 @@ static void dma_fixed_unmap_sg(struct device *dev, struct scatterlist *sg,
644 644
645static int dma_fixed_dma_supported(struct device *dev, u64 mask) 645static int dma_fixed_dma_supported(struct device *dev, u64 mask)
646{ 646{
647 return mask == DMA_64BIT_MASK; 647 return mask == DMA_BIT_MASK(64);
648} 648}
649 649
650static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask); 650static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask);
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 6ed75bffc8ab..ff43f1fd8343 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -202,7 +202,7 @@ static struct iommu_table vio_iommu_table;
202void *iseries_hv_alloc(size_t size, dma_addr_t *dma_handle, gfp_t flag) 202void *iseries_hv_alloc(size_t size, dma_addr_t *dma_handle, gfp_t flag)
203{ 203{
204 return iommu_alloc_coherent(NULL, &vio_iommu_table, size, dma_handle, 204 return iommu_alloc_coherent(NULL, &vio_iommu_table, size, dma_handle,
205 DMA_32BIT_MASK, flag, -1); 205 DMA_BIT_MASK(32), flag, -1);
206} 206}
207EXPORT_SYMBOL_GPL(iseries_hv_alloc); 207EXPORT_SYMBOL_GPL(iseries_hv_alloc);
208 208
@@ -217,7 +217,7 @@ dma_addr_t iseries_hv_map(void *vaddr, size_t size,
217{ 217{
218 return iommu_map_page(NULL, &vio_iommu_table, virt_to_page(vaddr), 218 return iommu_map_page(NULL, &vio_iommu_table, virt_to_page(vaddr),
219 (unsigned long)vaddr % PAGE_SIZE, size, 219 (unsigned long)vaddr % PAGE_SIZE, size,
220 DMA_32BIT_MASK, direction, NULL); 220 DMA_BIT_MASK(32), direction, NULL);
221} 221}
222 222
223void iseries_hv_unmap(dma_addr_t dma_handle, size_t size, 223void iseries_hv_unmap(dma_addr_t dma_handle, size_t size,
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index a705fffbb498..9a73d0238639 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -689,7 +689,7 @@ static void ps3_ioc0_unmap_sg(struct device *_dev, struct scatterlist *sg,
689 689
690static int ps3_dma_supported(struct device *_dev, u64 mask) 690static int ps3_dma_supported(struct device *_dev, u64 mask)
691{ 691{
692 return mask >= DMA_32BIT_MASK; 692 return mask >= DMA_BIT_MASK(32);
693} 693}
694 694
695static struct dma_mapping_ops ps3_sb_dma_ops = { 695static struct dma_mapping_ops ps3_sb_dma_ops = {
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 532e205303a2..21b956701596 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1170,6 +1170,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1170 mb(); 1170 mb();
1171 } 1171 }
1172 1172
1173 /* CoreInt */
1174 if (flags & MPIC_ENABLE_COREINT)
1175 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1176 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
1177 | MPIC_GREG_GCONF_COREINT);
1178
1173 if (flags & MPIC_ENABLE_MCK) 1179 if (flags & MPIC_ENABLE_MCK)
1174 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), 1180 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
1175 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) 1181 mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
@@ -1525,6 +1531,34 @@ unsigned int mpic_get_irq(void)
1525 return mpic_get_one_irq(mpic); 1531 return mpic_get_one_irq(mpic);
1526} 1532}
1527 1533
1534unsigned int mpic_get_coreint_irq(void)
1535{
1536#ifdef CONFIG_BOOKE
1537 struct mpic *mpic = mpic_primary;
1538 u32 src;
1539
1540 BUG_ON(mpic == NULL);
1541
1542 src = mfspr(SPRN_EPR);
1543
1544 if (unlikely(src == mpic->spurious_vec)) {
1545 if (mpic->flags & MPIC_SPV_EOI)
1546 mpic_eoi(mpic);
1547 return NO_IRQ;
1548 }
1549 if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
1550 if (printk_ratelimit())
1551 printk(KERN_WARNING "%s: Got protected source %d !\n",
1552 mpic->name, (int)src);
1553 return NO_IRQ;
1554 }
1555
1556 return irq_linear_revmap(mpic->irqhost, src);
1557#else
1558 return NO_IRQ;
1559#endif
1560}
1561
1528unsigned int mpic_get_mcirq(void) 1562unsigned int mpic_get_mcirq(void)
1529{ 1563{
1530 struct mpic *mpic = mpic_primary; 1564 struct mpic *mpic = mpic_primary;
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index cea7b74963e9..f82fdc412c64 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -238,7 +238,7 @@ static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
238 238
239 dma_mask = dev->coherent_dma_mask; 239 dma_mask = dev->coherent_dma_mask;
240 if (!dma_mask) 240 if (!dma_mask)
241 dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK; 241 dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
242 242
243 return dma_mask; 243 return dma_mask;
244} 244}
@@ -247,10 +247,10 @@ static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
247{ 247{
248 unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp); 248 unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
249 249
250 if (dma_mask <= DMA_24BIT_MASK) 250 if (dma_mask <= DMA_BIT_MASK(24))
251 gfp |= GFP_DMA; 251 gfp |= GFP_DMA;
252#ifdef CONFIG_X86_64 252#ifdef CONFIG_X86_64
253 if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA)) 253 if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
254 gfp |= GFP_DMA32; 254 gfp |= GFP_DMA32;
255#endif 255#endif
256 return gfp; 256 return gfp;
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 61df77532120..70a10ca100f6 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -20,7 +20,6 @@
20 20
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <asm/ftrace.h> 22#include <asm/ftrace.h>
23#include <linux/ftrace.h>
24#include <asm/nops.h> 23#include <asm/nops.h>
25#include <asm/nmi.h> 24#include <asm/nmi.h>
26 25
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 90f5b9ef5def..745579bc8256 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -40,7 +40,7 @@ EXPORT_SYMBOL(bad_dma_address);
40 to older i386. */ 40 to older i386. */
41struct device x86_dma_fallback_dev = { 41struct device x86_dma_fallback_dev = {
42 .init_name = "fallback device", 42 .init_name = "fallback device",
43 .coherent_dma_mask = DMA_32BIT_MASK, 43 .coherent_dma_mask = DMA_BIT_MASK(32),
44 .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask, 44 .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
45}; 45};
46EXPORT_SYMBOL(x86_dma_fallback_dev); 46EXPORT_SYMBOL(x86_dma_fallback_dev);
@@ -148,7 +148,7 @@ again:
148 if (!is_buffer_dma_capable(dma_mask, addr, size)) { 148 if (!is_buffer_dma_capable(dma_mask, addr, size)) {
149 __free_pages(page, get_order(size)); 149 __free_pages(page, get_order(size));
150 150
151 if (dma_mask < DMA_32BIT_MASK && !(flag & GFP_DMA)) { 151 if (dma_mask < DMA_BIT_MASK(32) && !(flag & GFP_DMA)) {
152 flag = (flag & ~GFP_DMA32) | GFP_DMA; 152 flag = (flag & ~GFP_DMA32) | GFP_DMA;
153 goto again; 153 goto again;
154 } 154 }
@@ -243,7 +243,7 @@ int dma_supported(struct device *dev, u64 mask)
243 /* Copied from i386. Doesn't make much sense, because it will 243 /* Copied from i386. Doesn't make much sense, because it will
244 only work for pci_alloc_coherent. 244 only work for pci_alloc_coherent.
245 The caller just has to use GFP_DMA in this case. */ 245 The caller just has to use GFP_DMA in this case. */
246 if (mask < DMA_24BIT_MASK) 246 if (mask < DMA_BIT_MASK(24))
247 return 0; 247 return 0;
248 248
249 /* Tell the device to use SAC when IOMMU force is on. This 249 /* Tell the device to use SAC when IOMMU force is on. This
@@ -258,7 +258,7 @@ int dma_supported(struct device *dev, u64 mask)
258 SAC for these. Assume all masks <= 40 bits are of this 258 SAC for these. Assume all masks <= 40 bits are of this
259 type. Normally this doesn't make any difference, but gives 259 type. Normally this doesn't make any difference, but gives
260 more gentle handling of IOMMU overflow. */ 260 more gentle handling of IOMMU overflow. */
261 if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) { 261 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
262 dev_info(dev, "Force SAC with mask %Lx\n", mask); 262 dev_info(dev, "Force SAC with mask %Lx\n", mask);
263 return 0; 263 return 0;
264 } 264 }
diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c
index c6d703b39326..71d412a09f30 100644
--- a/arch/x86/kernel/pci-nommu.c
+++ b/arch/x86/kernel/pci-nommu.c
@@ -15,7 +15,7 @@ static int
15check_addr(char *name, struct device *hwdev, dma_addr_t bus, size_t size) 15check_addr(char *name, struct device *hwdev, dma_addr_t bus, size_t size)
16{ 16{
17 if (hwdev && !is_buffer_dma_capable(*hwdev->dma_mask, bus, size)) { 17 if (hwdev && !is_buffer_dma_capable(*hwdev->dma_mask, bus, size)) {
18 if (*hwdev->dma_mask >= DMA_32BIT_MASK) 18 if (*hwdev->dma_mask >= DMA_BIT_MASK(32))
19 printk(KERN_ERR 19 printk(KERN_ERR
20 "nommu_%s: overflow %Lx+%zu of device mask %Lx\n", 20 "nommu_%s: overflow %Lx+%zu of device mask %Lx\n",
21 name, (long long)bus, size, 21 name, (long long)bus, size,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 05:44:04 -0500