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authorPaul Mundt <lethal@linux-sh.org>2009-03-06 05:21:02 -0500
committerPaul Mundt <lethal@linux-sh.org>2009-03-06 05:21:02 -0500
commitedab56f4c90f45ba4e61d06d3fc9658da4e94bde (patch)
treeffcf4aef7590be3ce56152938844b154cad01bde /arch
parent56d604defa91684509ac842317ea14501f224299 (diff)
sh: multiple vectors per irq - sh7720.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c68
1 files changed, 23 insertions, 45 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index f807a21b066c..003874a2fd2a 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -2,6 +2,7 @@
2 * SH7720 Setup 2 * SH7720 Setup
3 * 3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas 4 * Copyright (C) 2007 Markus Brunner, Mark Jonas
5 * Copyright (C) 2009 Paul Mundt
5 * 6 *
6 * Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c: 7 * Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
7 * 8 *
@@ -26,17 +27,7 @@ static struct resource rtc_resources[] = {
26 .flags = IORESOURCE_IO, 27 .flags = IORESOURCE_IO,
27 }, 28 },
28 [1] = { 29 [1] = {
29 /* Period IRQ */ 30 /* Shared Period/Carry/Alarm IRQ */
30 .start = 21,
31 .flags = IORESOURCE_IRQ,
32 },
33 [2] = {
34 /* Carry IRQ */
35 .start = 22,
36 .flags = IORESOURCE_IRQ,
37 },
38 [3] = {
39 /* Alarm IRQ */
40 .start = 20, 31 .start = 20,
41 .flags = IORESOURCE_IRQ, 32 .flags = IORESOURCE_IRQ,
42 }, 33 },
@@ -150,62 +141,49 @@ enum {
150 UNUSED = 0, 141 UNUSED = 0,
151 142
152 /* interrupt sources */ 143 /* interrupt sources */
153 TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI, 144 TMU0, TMU1, TMU2, RTC,
154 WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND, 145 WDT, REF_RCMI, SIM,
155 IRQ0, IRQ1, IRQ2, IRQ3, 146 IRQ0, IRQ1, IRQ2, IRQ3,
156 USBF_SPD, TMU_SUNI, IRQ5, IRQ4, 147 USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
157 DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL, 148 DMAC1, LCDC, SSL,
158 ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT, 149 ADC, DMAC2, USBFI, CMT,
159 SCIF0, SCIF1, 150 SCIF0, SCIF1,
160 PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC, 151 PINT07, PINT815, TPU, IIC,
161 SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC, 152 SIOF0, SIOF1, MMC, PCC,
162 USBHI, AFEIF, 153 USBHI, AFEIF,
163 H_UDI, 154 H_UDI,
164 /* interrupt groups */
165 TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC,
166}; 155};
167 156
168static struct intc_vect vectors[] __initdata = { 157static struct intc_vect vectors[] __initdata = {
169 /* IRQ0->5 are handled in setup-sh3.c */ 158 /* IRQ0->5 are handled in setup-sh3.c */
170 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 159 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
171 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), 160 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480),
172 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), 161 INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0),
173 INTC_VECT(SIM_ERI, 0x4e0), INTC_VECT(SIM_RXI, 0x500), 162 INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500),
174 INTC_VECT(SIM_TXI, 0x520), INTC_VECT(SIM_TEND, 0x540), 163 INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540),
175 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580), 164 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
176 /* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0), 165 /* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0),
177 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800), 166 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1, 0x800),
178 INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840), 167 INTC_VECT(DMAC1, 0x820), INTC_VECT(DMAC1, 0x840),
179 INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900), 168 INTC_VECT(DMAC1, 0x860), INTC_VECT(LCDC, 0x900),
180#if defined(CONFIG_CPU_SUBTYPE_SH7720) 169#if defined(CONFIG_CPU_SUBTYPE_SH7720)
181 INTC_VECT(SSL, 0x980), 170 INTC_VECT(SSL, 0x980),
182#endif 171#endif
183 INTC_VECT(USBFI0, 0xa20), INTC_VECT(USBFI1, 0xa40), 172 INTC_VECT(USBFI, 0xa20), INTC_VECT(USBFI, 0xa40),
184 INTC_VECT(USBHI, 0xa60), 173 INTC_VECT(USBHI, 0xa60),
185 INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0), 174 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
186 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00), 175 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00),
187 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80), 176 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80),
188 INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00), 177 INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00),
189 INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU0, 0xd80), 178 INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU, 0xd80),
190 INTC_VECT(TPU1, 0xda0), INTC_VECT(TPU2, 0xdc0), 179 INTC_VECT(TPU, 0xda0), INTC_VECT(TPU, 0xdc0),
191 INTC_VECT(TPU3, 0xde0), INTC_VECT(IIC, 0xe00), 180 INTC_VECT(TPU, 0xde0), INTC_VECT(IIC, 0xe00),
192 INTC_VECT(MMCI0, 0xe80), INTC_VECT(MMCI1, 0xea0), 181 INTC_VECT(MMC, 0xe80), INTC_VECT(MMC, 0xea0),
193 INTC_VECT(MMCI2, 0xec0), INTC_VECT(MMCI3, 0xee0), 182 INTC_VECT(MMC, 0xec0), INTC_VECT(MMC, 0xee0),
194 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60), 183 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
195 INTC_VECT(AFEIF, 0xfe0), 184 INTC_VECT(AFEIF, 0xfe0),
196}; 185};
197 186
198static struct intc_group groups[] __initdata = {
199 INTC_GROUP(TMU, TMU0, TMU1, TMU2),
200 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
201 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
202 INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3),
203 INTC_GROUP(USBFI, USBFI0, USBFI1),
204 INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5),
205 INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3),
206 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
207};
208
209static struct intc_prio_reg prio_registers[] __initdata = { 187static struct intc_prio_reg prio_registers[] __initdata = {
210 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 188 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
211 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, 189 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
@@ -219,7 +197,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
219 { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } }, 197 { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
220}; 198};
221 199
222static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, 200static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
223 NULL, prio_registers, NULL); 201 NULL, prio_registers, NULL);
224 202
225void __init plat_irq_setup(void) 203void __init plat_irq_setup(void)