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authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-29 21:20:41 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-29 21:20:41 -0500
commite914e3f48d0f3978d1561ae3668908e4c0262acf (patch)
tree6f5af7a5edaf28e8a4f99bbd353a2c9d51bf3534 /arch
parent1d494f36d1fde04188341bf3d3b1a14cdf6fb2c9 (diff)
parent5efa906486b14c607dd981504fd21b05b867ea1f (diff)
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull more ARM updates from Russell King: "Some further changes for this merge window: - fix bug building with gcc 4.6.4 and EABI. - fix pgtbl macro with some LPAE configurations - fix initrd override - FDT was overriding the command line, and it should be the other way around. - fix byteswap of instructions in undefined instruction handler - add basic support for SolidRun Hummingboard and Cubox-i boards" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: fix building with gcc 4.6.4 ARM: 7941/2: Fix incorrect FDT initrd parameter override ARM: 7947/1: Make pgtbl macro more robust ARM: 7946/1: asm: __und_usr_thumb need byteswap instructions in BE case ARM: 7930/1: Introduce atomic MMIO modify ARM: imx: initial SolidRun Cubox-i support ARM: imx: initial SolidRun HummingBoard support
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/imx6dl-cubox-i.dts12
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts167
-rw-r--r--arch/arm/boot/dts/imx6q-cubox-i.dts16
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi143
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi62
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom.dtsi33
-rw-r--r--arch/arm/include/asm/io.h6
-rw-r--r--arch/arm/kernel/entry-armv.S2
-rw-r--r--arch/arm/kernel/head.S3
-rw-r--r--arch/arm/kernel/io.c35
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c35
-rw-r--r--arch/arm/mm/init.c3
14 files changed, 519 insertions, 3 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 23d5e3946589..08a9ef58d9c3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -96,7 +96,7 @@ tune-$(CONFIG_CPU_V6K) =$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
96tune-y := $(tune-y) 96tune-y := $(tune-y)
97 97
98ifeq ($(CONFIG_AEABI),y) 98ifeq ($(CONFIG_AEABI),y)
99CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork 99CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork -mfpu=vfp
100else 100else
101CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) 101CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
102endif 102endif
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ede21c16fdc0..b9d6a8b485e0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -152,10 +152,13 @@ dtb-$(CONFIG_ARCH_MXC) += \
152 imx53-mba53.dtb \ 152 imx53-mba53.dtb \
153 imx53-qsb.dtb \ 153 imx53-qsb.dtb \
154 imx53-smd.dtb \ 154 imx53-smd.dtb \
155 imx6dl-cubox-i.dtb \
156 imx6dl-hummingboard.dtb \
155 imx6dl-sabreauto.dtb \ 157 imx6dl-sabreauto.dtb \
156 imx6dl-sabresd.dtb \ 158 imx6dl-sabresd.dtb \
157 imx6dl-wandboard.dtb \ 159 imx6dl-wandboard.dtb \
158 imx6q-arm2.dtb \ 160 imx6q-arm2.dtb \
161 imx6q-cubox-i.dtb \
159 imx6q-phytec-pbab01.dtb \ 162 imx6q-phytec-pbab01.dtb \
160 imx6q-sabreauto.dtb \ 163 imx6q-sabreauto.dtb \
161 imx6q-sabrelite.dtb \ 164 imx6q-sabrelite.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts
new file mode 100644
index 000000000000..58aa8f2b0f26
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-cubox-i.dts
@@ -0,0 +1,12 @@
1/*
2 * Copyright (C) 2014 Russell King
3 */
4/dts-v1/;
5
6#include "imx6dl.dtsi"
7#include "imx6qdl-cubox-i.dtsi"
8
9/ {
10 model = "SolidRun Cubox-i Solo/DualLite";
11 compatible = "solidrun,cubox-i/dl", "fsl,imx6dl";
12};
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
new file mode 100644
index 000000000000..fd8fc7cd53f3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -0,0 +1,167 @@
1/*
2 * Copyright (C) 2013,2014 Russell King
3 */
4/dts-v1/;
5
6#include "imx6dl.dtsi"
7#include "imx6qdl-microsom.dtsi"
8#include "imx6qdl-microsom-ar8035.dtsi"
9
10/ {
11 model = "SolidRun HummingBoard DL/Solo";
12 compatible = "solidrun,hummingboard", "fsl,imx6dl";
13
14 ir_recv: ir-receiver {
15 compatible = "gpio-ir-receiver";
16 gpios = <&gpio1 2 1>;
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_hummingboard_gpio1_2>;
19 };
20
21 regulators {
22 compatible = "simple-bus";
23
24 reg_3p3v: 3p3v {
25 compatible = "regulator-fixed";
26 regulator-name = "3P3V";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 regulator-always-on;
30 };
31
32 reg_usbh1_vbus: usb-h1-vbus {
33 compatible = "regulator-fixed";
34 enable-active-high;
35 gpio = <&gpio1 0 0>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
38 regulator-name = "usb_h1_vbus";
39 regulator-min-microvolt = <5000000>;
40 regulator-max-microvolt = <5000000>;
41 };
42
43 reg_usbotg_vbus: usb-otg-vbus {
44 compatible = "regulator-fixed";
45 enable-active-high;
46 gpio = <&gpio3 22 0>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
49 regulator-name = "usb_otg_vbus";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
52 };
53 };
54
55 codec: spdif-transmitter {
56 compatible = "linux,spdif-dit";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_hummingboard_spdif>;
59 };
60
61 sound-spdif {
62 compatible = "fsl,imx-audio-spdif";
63 model = "imx-spdif";
64 /* IMX6 doesn't implement this yet */
65 spdif-controller = <&spdif>;
66 spdif-out;
67 };
68};
69
70&can1 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
73 status = "okay";
74};
75
76&i2c1 {
77 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
79
80 /*
81 * Not fitted on Carrier-1 board... yet
82 status = "okay";
83
84 rtc: pcf8523@68 {
85 compatible = "nxp,pcf8523";
86 reg = <0x68>;
87 };
88 */
89};
90
91&iomuxc {
92 hummingboard {
93 pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
94 fsl,pins = <
95 MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
96 MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
97 >;
98 };
99
100 pinctrl_hummingboard_gpio1_2: hummingboard-gpio1_2 {
101 fsl,pins = <
102 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
103 >;
104 };
105
106 pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
107 fsl,pins = <
108 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
109 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
110 >;
111 };
112
113 pinctrl_hummingboard_spdif: hummingboard-spdif {
114 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
115 };
116
117 pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
118 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
119 };
120
121 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
122 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
123 };
124
125 pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
126 fsl,pins = <
127 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
128 >;
129 };
130
131 pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
132 fsl,pins = <
133 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
134 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
135 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
136 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
137 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
138 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
139 >;
140 };
141 };
142};
143
144&spdif {
145 status = "okay";
146};
147
148&usbh1 {
149 vbus-supply = <&reg_usbh1_vbus>;
150 status = "okay";
151};
152
153&usbotg {
154 vbus-supply = <&reg_usbotg_vbus>;
155 status = "okay";
156};
157
158&usdhc2 {
159 pinctrl-names = "default";
160 pinctrl-0 = <
161 &pinctrl_hummingboard_usdhc2_aux
162 &pinctrl_hummingboard_usdhc2
163 >;
164 vmmc-supply = <&reg_3p3v>;
165 cd-gpios = <&gpio1 4 0>;
166 status = "okay";
167};
diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts
new file mode 100644
index 000000000000..bc5f31e3e892
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-cubox-i.dts
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2014 Russell King
3 */
4/dts-v1/;
5
6#include "imx6q.dtsi"
7#include "imx6qdl-cubox-i.dtsi"
8
9/ {
10 model = "SolidRun Cubox-i Dual/Quad";
11 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
12};
13
14&sata {
15 status = "okay";
16};
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
new file mode 100644
index 000000000000..64daa3b311f6
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -0,0 +1,143 @@
1/*
2 * Copyright (C) 2014 Russell King
3 */
4#include "imx6qdl-microsom.dtsi"
5#include "imx6qdl-microsom-ar8035.dtsi"
6
7/ {
8 ir_recv: ir-receiver {
9 compatible = "gpio-ir-receiver";
10 gpios = <&gpio3 9 1>;
11 pinctrl-names = "default";
12 pinctrl-0 = <&pinctrl_cubox_i_ir>;
13 };
14
15 regulators {
16 compatible = "simple-bus";
17
18 reg_3p3v: 3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
24 };
25
26 reg_usbh1_vbus: usb-h1-vbus {
27 compatible = "regulator-fixed";
28 enable-active-high;
29 gpio = <&gpio1 0 0>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
32 regulator-name = "usb_h1_vbus";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
35 };
36
37 reg_usbotg_vbus: usb-otg-vbus {
38 compatible = "regulator-fixed";
39 enable-active-high;
40 gpio = <&gpio3 22 0>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
43 regulator-name = "usb_otg_vbus";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 };
47 };
48
49 codec: spdif-transmitter {
50 compatible = "linux,spdif-dit";
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_cubox_i_spdif>;
53 };
54
55 sound-spdif {
56 compatible = "fsl,imx-audio-spdif";
57 model = "imx-spdif";
58 /* IMX6 doesn't implement this yet */
59 spdif-controller = <&spdif>;
60 spdif-out;
61 };
62};
63
64&i2c3 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_cubox_i_i2c3>;
67
68 status = "okay";
69
70 rtc: pcf8523@68 {
71 compatible = "nxp,pcf8523";
72 reg = <0x68>;
73 };
74};
75
76&iomuxc {
77 cubox_i {
78 pinctrl_cubox_i_i2c3: cubox-i-i2c3 {
79 fsl,pins = <
80 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
81 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
82 >;
83 };
84
85 pinctrl_cubox_i_ir: cubox-i-ir {
86 fsl,pins = <
87 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
88 >;
89 };
90
91 pinctrl_cubox_i_spdif: cubox-i-spdif {
92 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
93 };
94
95 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
96 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
97 };
98
99 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
100 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
101 };
102
103 pinctrl_cubox_i_usdhc2_aux: cubox-i-usdhc2-aux {
104 fsl,pins = <
105 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
106 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
107 >;
108 };
109
110 pinctrl_cubox_i_usdhc2: cubox-i-usdhc2 {
111 fsl,pins = <
112 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
113 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
114 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
115 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
116 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
117 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
118 >;
119 };
120 };
121};
122
123&spdif {
124 status = "okay";
125};
126
127&usbh1 {
128 vbus-supply = <&reg_usbh1_vbus>;
129 status = "okay";
130};
131
132&usbotg {
133 vbus-supply = <&reg_usbotg_vbus>;
134 status = "okay";
135};
136
137&usdhc2 {
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
140 vmmc-supply = <&reg_3p3v>;
141 cd-gpios = <&gpio1 4 0>;
142 status = "okay";
143};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
new file mode 100644
index 000000000000..a3cb2fff8f61
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -0,0 +1,62 @@
1/*
2 * Copyright (C) 2013,2014 Russell King
3 *
4 * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
5 * MicroSOM.
6 */
7&fec {
8 pinctrl-names = "default";
9 pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
10 phy-mode = "rgmii";
11 phy-reset-duration = <2>;
12 phy-reset-gpios = <&gpio4 15 0>;
13 status = "okay";
14};
15
16&iomuxc {
17 enet {
18 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
19 fsl,pins = <
20 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
21 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
22 /* AR8035 reset */
23 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
24 /* AR8035 interrupt */
25 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
26 /* GPIO16 -> AR8035 25MHz */
27 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
28 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
29 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
30 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
31 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
32 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
33 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
34 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
35 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
36 /* AR8035 pin strapping: IO voltage: pull up */
37 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
38 /* AR8035 pin strapping: PHYADDR#0: pull down */
39 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
40 /* AR8035 pin strapping: PHYADDR#1: pull down */
41 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
42 /* AR8035 pin strapping: MODE#1: pull up */
43 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
44 /* AR8035 pin strapping: MODE#3: pull up */
45 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
46 /* AR8035 pin strapping: MODE#0: pull down */
47 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
48
49 /*
50 * As the RMII pins are also connected to RGMII
51 * so that an AR8030 can be placed, set these
52 * to high-z with the same pulls as above.
53 * Use the GPIO settings to avoid changing the
54 * input select registers.
55 */
56 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x03000
57 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
58 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
59 >;
60 };
61 };
62};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
new file mode 100644
index 000000000000..d729d0b15f25
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -0,0 +1,33 @@
1/*
2 * Copyright (C) 2013,2014 Russell King
3 */
4
5&iomuxc {
6 microsom {
7 pinctrl_microsom_uart1: microsom-uart1 {
8 fsl,pins = <
9 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
11 >;
12 };
13
14 pinctrl_microsom_usbotg: microsom-usbotg {
15 /*
16 * Similar to pinctrl_usbotg_2, but we want it
17 * pulled down for a fixed host connection.
18 */
19 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
20 };
21 };
22};
23
24&uart1 {
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_microsom_uart1>;
27 status = "okay";
28};
29
30&usbotg {
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_microsom_usbotg>;
33};
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index fbeb39c869e9..8aa4cca74501 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -38,6 +38,12 @@
38#define isa_bus_to_virt phys_to_virt 38#define isa_bus_to_virt phys_to_virt
39 39
40/* 40/*
41 * Atomic MMIO-wide IO modify
42 */
43extern void atomic_io_modify(void __iomem *reg, u32 mask, u32 set);
44extern void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set);
45
46/*
41 * Generic IO read/write. These perform native-endian accesses. Note 47 * Generic IO read/write. These perform native-endian accesses. Note
42 * that some architectures will want to re-define __raw_{read,write}w. 48 * that some architectures will want to re-define __raw_{read,write}w.
43 */ 49 */
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index b3fb8c9e1ff2..1879e8dd2acc 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -451,9 +451,11 @@ __und_usr_thumb:
451 .arch armv6t2 451 .arch armv6t2
452#endif 452#endif
4532: ldrht r5, [r4] 4532: ldrht r5, [r4]
454ARM_BE8(rev16 r5, r5) @ little endian instruction
454 cmp r5, #0xe800 @ 32bit instruction if xx != 0 455 cmp r5, #0xe800 @ 32bit instruction if xx != 0
455 blo __und_usr_fault_16 @ 16bit undefined instruction 456 blo __und_usr_fault_16 @ 16bit undefined instruction
4563: ldrht r0, [r2] 4573: ldrht r0, [r2]
458ARM_BE8(rev16 r0, r0) @ little endian instruction
457 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 459 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
458 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update 460 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update
459 orr r0, r0, r5, lsl #16 461 orr r0, r0, r5, lsl #16
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 32f317e5828a..914616e0bdcd 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -52,7 +52,8 @@
52 .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE 52 .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
53 53
54 .macro pgtbl, rd, phys 54 .macro pgtbl, rd, phys
55 add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE 55 add \rd, \phys, #TEXT_OFFSET
56 sub \rd, \rd, #PG_DIR_SIZE
56 .endm 57 .endm
57 58
58/* 59/*
diff --git a/arch/arm/kernel/io.c b/arch/arm/kernel/io.c
index dcd5b4d86143..9203cf883330 100644
--- a/arch/arm/kernel/io.c
+++ b/arch/arm/kernel/io.c
@@ -1,6 +1,41 @@
1#include <linux/export.h> 1#include <linux/export.h>
2#include <linux/types.h> 2#include <linux/types.h>
3#include <linux/io.h> 3#include <linux/io.h>
4#include <linux/spinlock.h>
5
6static DEFINE_RAW_SPINLOCK(__io_lock);
7
8/*
9 * Generic atomic MMIO modify.
10 *
11 * Allows thread-safe access to registers shared by unrelated subsystems.
12 * The access is protected by a single MMIO-wide lock.
13 */
14void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set)
15{
16 unsigned long flags;
17 u32 value;
18
19 raw_spin_lock_irqsave(&__io_lock, flags);
20 value = readl_relaxed(reg) & ~mask;
21 value |= (set & mask);
22 writel_relaxed(value, reg);
23 raw_spin_unlock_irqrestore(&__io_lock, flags);
24}
25EXPORT_SYMBOL(atomic_io_modify_relaxed);
26
27void atomic_io_modify(void __iomem *reg, u32 mask, u32 set)
28{
29 unsigned long flags;
30 u32 value;
31
32 raw_spin_lock_irqsave(&__io_lock, flags);
33 value = readl_relaxed(reg) & ~mask;
34 value |= (set & mask);
35 writel(value, reg);
36 raw_spin_unlock_irqrestore(&__io_lock, flags);
37}
38EXPORT_SYMBOL(atomic_io_modify);
4 39
5/* 40/*
6 * Copy data from IO memory space to "real" memory space. 41 * Copy data from IO memory space to "real" memory space.
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index d2ea6e60ea7b..76e5db4fce35 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -133,6 +133,39 @@ static int ar8031_phy_fixup(struct phy_device *dev)
133 133
134#define PHY_ID_AR8031 0x004dd074 134#define PHY_ID_AR8031 0x004dd074
135 135
136static int ar8035_phy_fixup(struct phy_device *dev)
137{
138 u16 val;
139
140 /* Ar803x phy SmartEEE feature cause link status generates glitch,
141 * which cause ethernet link down/up issue, so disable SmartEEE
142 */
143 phy_write(dev, 0xd, 0x3);
144 phy_write(dev, 0xe, 0x805d);
145 phy_write(dev, 0xd, 0x4003);
146
147 val = phy_read(dev, 0xe);
148 phy_write(dev, 0xe, val & ~(1 << 8));
149
150 /*
151 * Enable 125MHz clock from CLK_25M on the AR8031. This
152 * is fed in to the IMX6 on the ENET_REF_CLK (V22) pad.
153 * Also, introduce a tx clock delay.
154 *
155 * This is the same as is the AR8031 fixup.
156 */
157 ar8031_phy_fixup(dev);
158
159 /*check phy power*/
160 val = phy_read(dev, 0x0);
161 if (val & BMCR_PDOWN)
162 phy_write(dev, 0x0, val & ~BMCR_PDOWN);
163
164 return 0;
165}
166
167#define PHY_ID_AR8035 0x004dd072
168
136static void __init imx6q_enet_phy_init(void) 169static void __init imx6q_enet_phy_init(void)
137{ 170{
138 if (IS_BUILTIN(CONFIG_PHYLIB)) { 171 if (IS_BUILTIN(CONFIG_PHYLIB)) {
@@ -142,6 +175,8 @@ static void __init imx6q_enet_phy_init(void)
142 ksz9031rn_phy_fixup); 175 ksz9031rn_phy_fixup);
143 phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff, 176 phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
144 ar8031_phy_fixup); 177 ar8031_phy_fixup);
178 phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
179 ar8035_phy_fixup);
145 } 180 }
146} 181}
147 182
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index f57fb338cc8a..804d61566a53 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -290,10 +290,11 @@ void __init arm_memblock_init(struct meminfo *mi,
290#endif 290#endif
291#ifdef CONFIG_BLK_DEV_INITRD 291#ifdef CONFIG_BLK_DEV_INITRD
292 /* FDT scan will populate initrd_start */ 292 /* FDT scan will populate initrd_start */
293 if (initrd_start) { 293 if (initrd_start && !phys_initrd_size) {
294 phys_initrd_start = __virt_to_phys(initrd_start); 294 phys_initrd_start = __virt_to_phys(initrd_start);
295 phys_initrd_size = initrd_end - initrd_start; 295 phys_initrd_size = initrd_end - initrd_start;
296 } 296 }
297 initrd_start = initrd_end = 0;
297 if (phys_initrd_size && 298 if (phys_initrd_size &&
298 !memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) { 299 !memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) {
299 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region - disabling initrd\n", 300 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region - disabling initrd\n",
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 22:20:16 -0500