diff options
author | Markos Chandras <markos.chandras@imgtec.com> | 2014-04-08 07:47:10 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-30 09:54:38 -0400 |
commit | e8ef868b470984064c23ce4bf2cd4c0167e1fbe5 (patch) | |
tree | ebff68814737f98b1fc0da98d971d8e01375e95b /arch | |
parent | 390363ed77c05f4971254bebc96554afb79dd453 (diff) |
MIPS: uasm: Add sltu uasm instruction
It will be used later on by bpf-jit
[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6731/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/uasm.h | 1 | ||||
-rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 1 | ||||
-rw-r--r-- | arch/mips/mm/uasm-micromips.c | 1 | ||||
-rw-r--r-- | arch/mips/mm/uasm-mips.c | 1 | ||||
-rw-r--r-- | arch/mips/mm/uasm.c | 3 |
5 files changed, 6 insertions, 1 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h index abf0845f5007..090f7503e421 100644 --- a/arch/mips/include/asm/uasm.h +++ b/arch/mips/include/asm/uasm.h | |||
@@ -144,6 +144,7 @@ Ip_u2s3u1(_sd); | |||
144 | Ip_u2u1u3(_sll); | 144 | Ip_u2u1u3(_sll); |
145 | Ip_u3u2u1(_sllv); | 145 | Ip_u3u2u1(_sllv); |
146 | Ip_u2u1s3(_sltiu); | 146 | Ip_u2u1s3(_sltiu); |
147 | Ip_u3u1u2(_sltu); | ||
147 | Ip_u2u1u3(_sra); | 148 | Ip_u2u1u3(_sra); |
148 | Ip_u2u1u3(_srl); | 149 | Ip_u2u1u3(_srl); |
149 | Ip_u3u2u1(_srlv); | 150 | Ip_u3u2u1(_srlv); |
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index a7f6a16fd26c..c78d235f86ee 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h | |||
@@ -261,6 +261,7 @@ enum mm_32a_minor_op { | |||
261 | mm_and_op = 0x250, | 261 | mm_and_op = 0x250, |
262 | mm_or32_op = 0x290, | 262 | mm_or32_op = 0x290, |
263 | mm_xor32_op = 0x310, | 263 | mm_xor32_op = 0x310, |
264 | mm_sltu_op = 0x390, | ||
264 | }; | 265 | }; |
265 | 266 | ||
266 | /* | 267 | /* |
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c index e81649a0551b..260ca1b26504 100644 --- a/arch/mips/mm/uasm-micromips.c +++ b/arch/mips/mm/uasm-micromips.c | |||
@@ -99,6 +99,7 @@ static struct insn insn_table_MM[] = { | |||
99 | { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD }, | 99 | { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD }, |
100 | { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, | 100 | { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, |
101 | { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, | 101 | { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, |
102 | { insn_sltu, M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD }, | ||
102 | { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, | 103 | { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, |
103 | { insn_srl, M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD }, | 104 | { insn_srl, M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD }, |
104 | { insn_srlv, M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD }, | 105 | { insn_srlv, M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD }, |
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c index 8231d7ddeccd..ad1701c4727d 100644 --- a/arch/mips/mm/uasm-mips.c +++ b/arch/mips/mm/uasm-mips.c | |||
@@ -107,6 +107,7 @@ static struct insn insn_table[] = { | |||
107 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, | 107 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, |
108 | { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, | 108 | { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, |
109 | { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, | 109 | { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, |
110 | { insn_sltu, M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD }, | ||
110 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, | 111 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, |
111 | { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, | 112 | { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, |
112 | { insn_srlv, M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD }, | 113 | { insn_srlv, M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD }, |
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 3a3d8a21cd56..e0738fa514bc 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c | |||
@@ -53,7 +53,7 @@ enum opcode { | |||
53 | insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, | 53 | insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, |
54 | insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, | 54 | insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, |
55 | insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_sltiu, | 55 | insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_sltiu, |
56 | insn_sra, insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, | 56 | insn_sltu, insn_sra, insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, |
57 | insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, | 57 | insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, |
58 | insn_xor, insn_xori, insn_yield, | 58 | insn_xor, insn_xori, insn_yield, |
59 | }; | 59 | }; |
@@ -285,6 +285,7 @@ I_u2s3u1(_sd) | |||
285 | I_u2u1u3(_sll) | 285 | I_u2u1u3(_sll) |
286 | I_u3u2u1(_sllv) | 286 | I_u3u2u1(_sllv) |
287 | I_u2u1s3(_sltiu) | 287 | I_u2u1s3(_sltiu) |
288 | I_u3u1u2(_sltu) | ||
288 | I_u2u1u3(_sra) | 289 | I_u2u1u3(_sra) |
289 | I_u2u1u3(_srl) | 290 | I_u2u1u3(_srl) |
290 | I_u3u2u1(_srlv) | 291 | I_u3u2u1(_srlv) |