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authorLinus Torvalds <torvalds@linux-foundation.org>2013-10-03 00:48:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-10-03 00:48:32 -0400
commite6e7fb1ffc875adf2dd36d4a135b8d7addda0aea (patch)
tree1d7371ef6d6ffb0287cbed7b644daa2b992a0c2e /arch
parent164a2c58227bcd509db95920e849e914e9512204 (diff)
parent6a98b2ffc7cf8a84a18d8666185c29b7e0e631e9 (diff)
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "We have a fairly large batch of fixes this time around, mostly just due to various platforms all having a fix or two more than usual. Worth pointing out are: - A fix for EDMA on Davinci/OMAP where channel allocation broke with the DT conversion. Due to some miscommunication we didn't understand the impact of the breakage, so we were pushing back on it for 3.12, but it sounds like it's actually breaking quite a few people out there. - A bunch of fixes for Marvell platforms, some straggling fixes for merge window fallout and some fixes for a couple of the platforms (Netgear RN102 in particular). - A fix for a race between multi-cluster power management and cpu hotplug on Versatile Express. And a bunch of other smaller fixes that all add up. We'll be switching over into stricter regressions-only mode from here on out" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits) ARM: multi_v7_defconfig: add SDHCI for i.MX bus: mvebu-mbus: Fix optional pcie-mem/io-aperture properties ARM: mvebu: add missing DT Mbus ranges and relocate PCIe DT nodes for RN102 ARM: at91: sam9g45: shutdown ddr1 too when rebooting MAINTAINERS: ARM: SIRF: use kernel.org mail box MAINTAINERS: ARM: SIRF: add missed drivers into maintain list ARM: edma: Fix clearing of unused list for DT DMA resources ARM: vexpress: tc2: fix hotplug/idle/kexec race on cluster power down ARM: dts: sirf: fix interrupt and dma prop of VIP for prima2 and atlas6 ARM: dts: sirf: fix the ranges of peri-iobrg of prima2 ARM: dts: makefile: build atlas6-evb.dtb for ARCH_ATLAS6 ARM: dts: sirf: fix fifosize, clks, dma channels for UART ARM: mvebu: Add DT entry for ReadyNAS 102 to use gpio-poweroff driver ARM: mvebu: fix ReadyNAS 102 Power button GPIO to make it active high ARM: mach-integrator: Add stub for pci_v3_early_init() for !CONFIG_PCI ARM: shmobile: Remove #gpio-ranges-cells DT property gpio: rcar: Remove #gpio-range-cells DT property usage ARM: shmobile: armadillo: fixup ether pinctrl naming ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/armada-370-netgear-rn102.dts49
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi11
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi6
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi12
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi3
-rw-r--r--arch/arm/boot/dts/prima2.dtsi27
-rw-r--r--arch/arm/boot/dts/r8a73a4.dtsi6
-rw-r--r--arch/arm/boot/dts/r8a7778.dtsi1
-rw-r--r--arch/arm/boot/dts/r8a7779.dtsi1
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi9
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi6
-rw-r--r--arch/arm/common/edma.c38
-rw-r--r--arch/arm/configs/multi_v7_defconfig1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45_reset.S8
-rw-r--r--arch/arm/mach-at91/at91x40_time.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/include/mach/serial.h4
-rw-r--r--arch/arm/mach-integrator/pci_v3.h7
-rw-r--r--arch/arm/mach-mvebu/coherency.c8
-rw-r--r--arch/arm/mach-mvebu/pmsu.c1
-rw-r--r--arch/arm/mach-mvebu/system-controller.c1
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c4
-rw-r--r--arch/arm/mach-shmobile/board-lager.c27
-rw-r--r--arch/arm/mach-vexpress/tc2_pm.c11
27 files changed, 196 insertions, 55 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e95af3f5433b..802720e3e8fd 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
41dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb 41dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
42dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb 42dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
43 43
44dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
45
44dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb 46dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
45dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ 47dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
46 bcm28155-ap.dtb 48 bcm28155-ap.dtb
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index 05e4485a8225..8ac2ac1f69cc 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -27,6 +27,25 @@
27 }; 27 };
28 28
29 soc { 29 soc {
30 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
31 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
32
33 pcie-controller {
34 status = "okay";
35
36 /* Connected to Marvell SATA controller */
37 pcie@1,0 {
38 /* Port 0, Lane 0 */
39 status = "okay";
40 };
41
42 /* Connected to FL1009 USB 3.0 controller */
43 pcie@2,0 {
44 /* Port 1, Lane 0 */
45 status = "okay";
46 };
47 };
48
30 internal-regs { 49 internal-regs {
31 serial@12000 { 50 serial@12000 {
32 clock-frequency = <200000000>; 51 clock-frequency = <200000000>;
@@ -57,6 +76,11 @@
57 marvell,pins = "mpp56"; 76 marvell,pins = "mpp56";
58 marvell,function = "gpio"; 77 marvell,function = "gpio";
59 }; 78 };
79
80 poweroff: poweroff {
81 marvell,pins = "mpp8";
82 marvell,function = "gpio";
83 };
60 }; 84 };
61 85
62 mdio { 86 mdio {
@@ -89,22 +113,6 @@
89 pwm_polarity = <0>; 113 pwm_polarity = <0>;
90 }; 114 };
91 }; 115 };
92
93 pcie-controller {
94 status = "okay";
95
96 /* Connected to Marvell SATA controller */
97 pcie@1,0 {
98 /* Port 0, Lane 0 */
99 status = "okay";
100 };
101
102 /* Connected to FL1009 USB 3.0 controller */
103 pcie@2,0 {
104 /* Port 1, Lane 0 */
105 status = "okay";
106 };
107 };
108 }; 116 };
109 }; 117 };
110 118
@@ -160,7 +168,7 @@
160 button@1 { 168 button@1 {
161 label = "Power Button"; 169 label = "Power Button";
162 linux,code = <116>; /* KEY_POWER */ 170 linux,code = <116>; /* KEY_POWER */
163 gpios = <&gpio1 30 1>; 171 gpios = <&gpio1 30 0>;
164 }; 172 };
165 173
166 button@2 { 174 button@2 {
@@ -176,4 +184,11 @@
176 }; 184 };
177 }; 185 };
178 186
187 gpio_poweroff {
188 compatible = "gpio-poweroff";
189 pinctrl-0 = <&poweroff>;
190 pinctrl-names = "default";
191 gpios = <&gpio0 8 1>;
192 };
193
179}; 194};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index def125c0eeaa..3058522f5aad 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -70,6 +70,8 @@
70 70
71 timer@20300 { 71 timer@20300 {
72 compatible = "marvell,armada-xp-timer"; 72 compatible = "marvell,armada-xp-timer";
73 clocks = <&coreclk 2>, <&refclk>;
74 clock-names = "nbclk", "fixed";
73 }; 75 };
74 76
75 coreclk: mvebu-sar@18230 { 77 coreclk: mvebu-sar@18230 {
@@ -169,4 +171,13 @@
169 }; 171 };
170 }; 172 };
171 }; 173 };
174
175 clocks {
176 /* 25 MHz reference crystal */
177 refclk: oscillator {
178 compatible = "fixed-clock";
179 #clock-cells = <0>;
180 clock-frequency = <25000000>;
181 };
182 };
172}; 183};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index cf78ac0b04b1..e74dc15efa9d 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -190,12 +190,12 @@
190 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ 190 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
191 }; 191 };
192 192
193 pinctrl_uart2_rts: uart2_rts-0 { 193 pinctrl_usart2_rts: usart2_rts-0 {
194 atmel,pins = 194 atmel,pins =
195 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ 195 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
196 }; 196 };
197 197
198 pinctrl_uart2_cts: uart2_cts-0 { 198 pinctrl_usart2_cts: usart2_cts-0 {
199 atmel,pins = 199 atmel,pins =
200 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ 200 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
201 }; 201 };
@@ -556,6 +556,7 @@
556 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 556 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
557 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; 557 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
558 dma-names = "rxtx"; 558 dma-names = "rxtx";
559 pinctrl-names = "default";
559 #address-cells = <1>; 560 #address-cells = <1>;
560 #size-cells = <0>; 561 #size-cells = <0>;
561 status = "disabled"; 562 status = "disabled";
@@ -567,6 +568,7 @@
567 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 568 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
568 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; 569 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
569 dma-names = "rxtx"; 570 dma-names = "rxtx";
571 pinctrl-names = "default";
570 #address-cells = <1>; 572 #address-cells = <1>;
571 #size-cells = <0>; 573 #size-cells = <0>;
572 status = "disabled"; 574 status = "disabled";
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 8678e0c11119..6db4f81d4795 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -181,6 +181,8 @@
181 interrupts = <17>; 181 interrupts = <17>;
182 fifosize = <128>; 182 fifosize = <128>;
183 clocks = <&clks 13>; 183 clocks = <&clks 13>;
184 sirf,uart-dma-rx-channel = <21>;
185 sirf,uart-dma-tx-channel = <2>;
184 }; 186 };
185 187
186 uart1: uart@b0060000 { 188 uart1: uart@b0060000 {
@@ -199,6 +201,8 @@
199 interrupts = <19>; 201 interrupts = <19>;
200 fifosize = <128>; 202 fifosize = <128>;
201 clocks = <&clks 15>; 203 clocks = <&clks 15>;
204 sirf,uart-dma-rx-channel = <6>;
205 sirf,uart-dma-tx-channel = <7>;
202 }; 206 };
203 207
204 usp0: usp@b0080000 { 208 usp0: usp@b0080000 {
@@ -206,7 +210,10 @@
206 compatible = "sirf,prima2-usp"; 210 compatible = "sirf,prima2-usp";
207 reg = <0xb0080000 0x10000>; 211 reg = <0xb0080000 0x10000>;
208 interrupts = <20>; 212 interrupts = <20>;
213 fifosize = <128>;
209 clocks = <&clks 28>; 214 clocks = <&clks 28>;
215 sirf,usp-dma-rx-channel = <17>;
216 sirf,usp-dma-tx-channel = <18>;
210 }; 217 };
211 218
212 usp1: usp@b0090000 { 219 usp1: usp@b0090000 {
@@ -214,7 +221,10 @@
214 compatible = "sirf,prima2-usp"; 221 compatible = "sirf,prima2-usp";
215 reg = <0xb0090000 0x10000>; 222 reg = <0xb0090000 0x10000>;
216 interrupts = <21>; 223 interrupts = <21>;
224 fifosize = <128>;
217 clocks = <&clks 29>; 225 clocks = <&clks 29>;
226 sirf,usp-dma-rx-channel = <14>;
227 sirf,usp-dma-tx-channel = <15>;
218 }; 228 };
219 229
220 dmac0: dma-controller@b00b0000 { 230 dmac0: dma-controller@b00b0000 {
@@ -237,6 +247,8 @@
237 compatible = "sirf,prima2-vip"; 247 compatible = "sirf,prima2-vip";
238 reg = <0xb00C0000 0x10000>; 248 reg = <0xb00C0000 0x10000>;
239 clocks = <&clks 31>; 249 clocks = <&clks 31>;
250 interrupts = <14>;
251 sirf,vip-dma-rx-channel = <16>;
240 }; 252 };
241 253
242 spi0: spi@b00d0000 { 254 spi0: spi@b00d0000 {
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index cf7aeaf89e9c..1335b2e1bed4 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -13,6 +13,7 @@
13 cpu@0 { 13 cpu@0 {
14 device_type = "cpu"; 14 device_type = "cpu";
15 compatible = "marvell,feroceon"; 15 compatible = "marvell,feroceon";
16 reg = <0>;
16 clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; 17 clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
17 clock-names = "cpu_clk", "ddrclk", "powersave"; 18 clock-names = "cpu_clk", "ddrclk", "powersave";
18 }; 19 };
@@ -167,7 +168,7 @@
167 xor@60900 { 168 xor@60900 {
168 compatible = "marvell,orion-xor"; 169 compatible = "marvell,orion-xor";
169 reg = <0x60900 0x100 170 reg = <0x60900 0x100
170 0xd0B00 0x100>; 171 0x60B00 0x100>;
171 status = "okay"; 172 status = "okay";
172 clocks = <&gate_clk 16>; 173 clocks = <&gate_clk 16>;
173 174
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index bbeb623fc2c6..27ed9f5144bc 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -171,7 +171,8 @@
171 compatible = "simple-bus"; 171 compatible = "simple-bus";
172 #address-cells = <1>; 172 #address-cells = <1>;
173 #size-cells = <1>; 173 #size-cells = <1>;
174 ranges = <0xb0000000 0xb0000000 0x180000>; 174 ranges = <0xb0000000 0xb0000000 0x180000>,
175 <0x56000000 0x56000000 0x1b00000>;
175 176
176 timer@b0020000 { 177 timer@b0020000 {
177 compatible = "sirf,prima2-tick"; 178 compatible = "sirf,prima2-tick";
@@ -196,25 +197,32 @@
196 uart0: uart@b0050000 { 197 uart0: uart@b0050000 {
197 cell-index = <0>; 198 cell-index = <0>;
198 compatible = "sirf,prima2-uart"; 199 compatible = "sirf,prima2-uart";
199 reg = <0xb0050000 0x10000>; 200 reg = <0xb0050000 0x1000>;
200 interrupts = <17>; 201 interrupts = <17>;
202 fifosize = <128>;
201 clocks = <&clks 13>; 203 clocks = <&clks 13>;
204 sirf,uart-dma-rx-channel = <21>;
205 sirf,uart-dma-tx-channel = <2>;
202 }; 206 };
203 207
204 uart1: uart@b0060000 { 208 uart1: uart@b0060000 {
205 cell-index = <1>; 209 cell-index = <1>;
206 compatible = "sirf,prima2-uart"; 210 compatible = "sirf,prima2-uart";
207 reg = <0xb0060000 0x10000>; 211 reg = <0xb0060000 0x1000>;
208 interrupts = <18>; 212 interrupts = <18>;
213 fifosize = <32>;
209 clocks = <&clks 14>; 214 clocks = <&clks 14>;
210 }; 215 };
211 216
212 uart2: uart@b0070000 { 217 uart2: uart@b0070000 {
213 cell-index = <2>; 218 cell-index = <2>;
214 compatible = "sirf,prima2-uart"; 219 compatible = "sirf,prima2-uart";
215 reg = <0xb0070000 0x10000>; 220 reg = <0xb0070000 0x1000>;
216 interrupts = <19>; 221 interrupts = <19>;
222 fifosize = <128>;
217 clocks = <&clks 15>; 223 clocks = <&clks 15>;
224 sirf,uart-dma-rx-channel = <6>;
225 sirf,uart-dma-tx-channel = <7>;
218 }; 226 };
219 227
220 usp0: usp@b0080000 { 228 usp0: usp@b0080000 {
@@ -222,7 +230,10 @@
222 compatible = "sirf,prima2-usp"; 230 compatible = "sirf,prima2-usp";
223 reg = <0xb0080000 0x10000>; 231 reg = <0xb0080000 0x10000>;
224 interrupts = <20>; 232 interrupts = <20>;
233 fifosize = <128>;
225 clocks = <&clks 28>; 234 clocks = <&clks 28>;
235 sirf,usp-dma-rx-channel = <17>;
236 sirf,usp-dma-tx-channel = <18>;
226 }; 237 };
227 238
228 usp1: usp@b0090000 { 239 usp1: usp@b0090000 {
@@ -230,7 +241,10 @@
230 compatible = "sirf,prima2-usp"; 241 compatible = "sirf,prima2-usp";
231 reg = <0xb0090000 0x10000>; 242 reg = <0xb0090000 0x10000>;
232 interrupts = <21>; 243 interrupts = <21>;
244 fifosize = <128>;
233 clocks = <&clks 29>; 245 clocks = <&clks 29>;
246 sirf,usp-dma-rx-channel = <14>;
247 sirf,usp-dma-tx-channel = <15>;
234 }; 248 };
235 249
236 usp2: usp@b00a0000 { 250 usp2: usp@b00a0000 {
@@ -238,7 +252,10 @@
238 compatible = "sirf,prima2-usp"; 252 compatible = "sirf,prima2-usp";
239 reg = <0xb00a0000 0x10000>; 253 reg = <0xb00a0000 0x10000>;
240 interrupts = <22>; 254 interrupts = <22>;
255 fifosize = <128>;
241 clocks = <&clks 30>; 256 clocks = <&clks 30>;
257 sirf,usp-dma-rx-channel = <10>;
258 sirf,usp-dma-tx-channel = <11>;
242 }; 259 };
243 260
244 dmac0: dma-controller@b00b0000 { 261 dmac0: dma-controller@b00b0000 {
@@ -261,6 +278,8 @@
261 compatible = "sirf,prima2-vip"; 278 compatible = "sirf,prima2-vip";
262 reg = <0xb00C0000 0x10000>; 279 reg = <0xb00C0000 0x10000>;
263 clocks = <&clks 31>; 280 clocks = <&clks 31>;
281 interrupts = <14>;
282 sirf,vip-dma-rx-channel = <16>;
264 }; 283 };
265 284
266 spi0: spi@b00d0000 { 285 spi0: spi@b00d0000 {
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6c26caa880f2..658fcc537576 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -193,7 +193,7 @@
193 }; 193 };
194 194
195 sdhi0: sdhi@ee100000 { 195 sdhi0: sdhi@ee100000 {
196 compatible = "renesas,r8a73a4-sdhi"; 196 compatible = "renesas,sdhi-r8a73a4";
197 reg = <0 0xee100000 0 0x100>; 197 reg = <0 0xee100000 0 0x100>;
198 interrupt-parent = <&gic>; 198 interrupt-parent = <&gic>;
199 interrupts = <0 165 4>; 199 interrupts = <0 165 4>;
@@ -202,7 +202,7 @@
202 }; 202 };
203 203
204 sdhi1: sdhi@ee120000 { 204 sdhi1: sdhi@ee120000 {
205 compatible = "renesas,r8a73a4-sdhi"; 205 compatible = "renesas,sdhi-r8a73a4";
206 reg = <0 0xee120000 0 0x100>; 206 reg = <0 0xee120000 0 0x100>;
207 interrupt-parent = <&gic>; 207 interrupt-parent = <&gic>;
208 interrupts = <0 166 4>; 208 interrupts = <0 166 4>;
@@ -211,7 +211,7 @@
211 }; 211 };
212 212
213 sdhi2: sdhi@ee140000 { 213 sdhi2: sdhi@ee140000 {
214 compatible = "renesas,r8a73a4-sdhi"; 214 compatible = "renesas,sdhi-r8a73a4";
215 reg = <0 0xee140000 0 0x100>; 215 reg = <0 0xee140000 0 0x100>;
216 interrupt-parent = <&gic>; 216 interrupt-parent = <&gic>;
217 interrupts = <0 167 4>; 217 interrupts = <0 167 4>;
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 45ac404ab6d8..3577aba82583 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -96,6 +96,5 @@
96 pfc: pfc@fffc0000 { 96 pfc: pfc@fffc0000 {
97 compatible = "renesas,pfc-r8a7778"; 97 compatible = "renesas,pfc-r8a7778";
98 reg = <0xfffc000 0x118>; 98 reg = <0xfffc000 0x118>;
99 #gpio-range-cells = <3>;
100 }; 99 };
101}; 100};
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 23a62447359c..ebbe507fcbfa 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -188,7 +188,6 @@
188 pfc: pfc@fffc0000 { 188 pfc: pfc@fffc0000 {
189 compatible = "renesas,pfc-r8a7779"; 189 compatible = "renesas,pfc-r8a7779";
190 reg = <0xfffc0000 0x23c>; 190 reg = <0xfffc0000 0x23c>;
191 #gpio-range-cells = <3>;
192 }; 191 };
193 192
194 thermal@ffc48000 { 193 thermal@ffc48000 {
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 3b879e7c697c..413b4c29e782 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -148,11 +148,10 @@
148 pfc: pfc@e6060000 { 148 pfc: pfc@e6060000 {
149 compatible = "renesas,pfc-r8a7790"; 149 compatible = "renesas,pfc-r8a7790";
150 reg = <0 0xe6060000 0 0x250>; 150 reg = <0 0xe6060000 0 0x250>;
151 #gpio-range-cells = <3>;
152 }; 151 };
153 152
154 sdhi0: sdhi@ee100000 { 153 sdhi0: sdhi@ee100000 {
155 compatible = "renesas,r8a7790-sdhi"; 154 compatible = "renesas,sdhi-r8a7790";
156 reg = <0 0xee100000 0 0x100>; 155 reg = <0 0xee100000 0 0x100>;
157 interrupt-parent = <&gic>; 156 interrupt-parent = <&gic>;
158 interrupts = <0 165 4>; 157 interrupts = <0 165 4>;
@@ -161,7 +160,7 @@
161 }; 160 };
162 161
163 sdhi1: sdhi@ee120000 { 162 sdhi1: sdhi@ee120000 {
164 compatible = "renesas,r8a7790-sdhi"; 163 compatible = "renesas,sdhi-r8a7790";
165 reg = <0 0xee120000 0 0x100>; 164 reg = <0 0xee120000 0 0x100>;
166 interrupt-parent = <&gic>; 165 interrupt-parent = <&gic>;
167 interrupts = <0 166 4>; 166 interrupts = <0 166 4>;
@@ -170,7 +169,7 @@
170 }; 169 };
171 170
172 sdhi2: sdhi@ee140000 { 171 sdhi2: sdhi@ee140000 {
173 compatible = "renesas,r8a7790-sdhi"; 172 compatible = "renesas,sdhi-r8a7790";
174 reg = <0 0xee140000 0 0x100>; 173 reg = <0 0xee140000 0 0x100>;
175 interrupt-parent = <&gic>; 174 interrupt-parent = <&gic>;
176 interrupts = <0 167 4>; 175 interrupts = <0 167 4>;
@@ -179,7 +178,7 @@
179 }; 178 };
180 179
181 sdhi3: sdhi@ee160000 { 180 sdhi3: sdhi@ee160000 {
182 compatible = "renesas,r8a7790-sdhi"; 181 compatible = "renesas,sdhi-r8a7790";
183 reg = <0 0xee160000 0 0x100>; 182 reg = <0 0xee160000 0 0x100>;
184 interrupt-parent = <&gic>; 183 interrupt-parent = <&gic>;
185 interrupts = <0 168 4>; 184 interrupts = <0 168 4>;
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index ba59a5875a10..3955c7606a6f 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -196,7 +196,7 @@
196 }; 196 };
197 197
198 sdhi0: sdhi@ee100000 { 198 sdhi0: sdhi@ee100000 {
199 compatible = "renesas,r8a7740-sdhi"; 199 compatible = "renesas,sdhi-r8a7740";
200 reg = <0xee100000 0x100>; 200 reg = <0xee100000 0x100>;
201 interrupt-parent = <&gic>; 201 interrupt-parent = <&gic>;
202 interrupts = <0 83 4 202 interrupts = <0 83 4
@@ -208,7 +208,7 @@
208 208
209 /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ 209 /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
210 sdhi1: sdhi@ee120000 { 210 sdhi1: sdhi@ee120000 {
211 compatible = "renesas,r8a7740-sdhi"; 211 compatible = "renesas,sdhi-r8a7740";
212 reg = <0xee120000 0x100>; 212 reg = <0xee120000 0x100>;
213 interrupt-parent = <&gic>; 213 interrupt-parent = <&gic>;
214 interrupts = <0 88 4 214 interrupts = <0 88 4
@@ -219,7 +219,7 @@
219 }; 219 };
220 220
221 sdhi2: sdhi@ee140000 { 221 sdhi2: sdhi@ee140000 {
222 compatible = "renesas,r8a7740-sdhi"; 222 compatible = "renesas,sdhi-r8a7740";
223 reg = <0xee140000 0x100>; 223 reg = <0xee140000 0x100>;
224 interrupt-parent = <&gic>; 224 interrupt-parent = <&gic>;
225 interrupts = <0 104 4 225 interrupts = <0 104 4
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 117f955a2a06..8e1a0245907f 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = {
269 .ccnt = 1, 269 .ccnt = 1,
270}; 270};
271 271
272static const struct of_device_id edma_of_ids[] = {
273 { .compatible = "ti,edma3", },
274 {}
275};
276
272/*****************************************************************************/ 277/*****************************************************************************/
273 278
274static void map_dmach_queue(unsigned ctlr, unsigned ch_no, 279static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
@@ -560,14 +565,38 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
560static int prepare_unused_channel_list(struct device *dev, void *data) 565static int prepare_unused_channel_list(struct device *dev, void *data)
561{ 566{
562 struct platform_device *pdev = to_platform_device(dev); 567 struct platform_device *pdev = to_platform_device(dev);
563 int i, ctlr; 568 int i, count, ctlr;
569 struct of_phandle_args dma_spec;
564 570
571 if (dev->of_node) {
572 count = of_property_count_strings(dev->of_node, "dma-names");
573 if (count < 0)
574 return 0;
575 for (i = 0; i < count; i++) {
576 if (of_parse_phandle_with_args(dev->of_node, "dmas",
577 "#dma-cells", i,
578 &dma_spec))
579 continue;
580
581 if (!of_match_node(edma_of_ids, dma_spec.np)) {
582 of_node_put(dma_spec.np);
583 continue;
584 }
585
586 clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]),
587 edma_cc[0]->edma_unused);
588 of_node_put(dma_spec.np);
589 }
590 return 0;
591 }
592
593 /* For non-OF case */
565 for (i = 0; i < pdev->num_resources; i++) { 594 for (i = 0; i < pdev->num_resources; i++) {
566 if ((pdev->resource[i].flags & IORESOURCE_DMA) && 595 if ((pdev->resource[i].flags & IORESOURCE_DMA) &&
567 (int)pdev->resource[i].start >= 0) { 596 (int)pdev->resource[i].start >= 0) {
568 ctlr = EDMA_CTLR(pdev->resource[i].start); 597 ctlr = EDMA_CTLR(pdev->resource[i].start);
569 clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), 598 clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
570 edma_cc[ctlr]->edma_unused); 599 edma_cc[ctlr]->edma_unused);
571 } 600 }
572 } 601 }
573 602
@@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev)
1762 return 0; 1791 return 0;
1763} 1792}
1764 1793
1765static const struct of_device_id edma_of_ids[] = {
1766 { .compatible = "ti,edma3", },
1767 {}
1768};
1769
1770static struct platform_driver edma_driver = { 1794static struct platform_driver edma_driver = {
1771 .driver = { 1795 .driver = {
1772 .name = "edma", 1796 .name = "edma",
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index f3935b46df29..119fc378fc52 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -135,6 +135,7 @@ CONFIG_MMC=y
135CONFIG_MMC_ARMMMCI=y 135CONFIG_MMC_ARMMMCI=y
136CONFIG_MMC_SDHCI=y 136CONFIG_MMC_SDHCI=y
137CONFIG_MMC_SDHCI_PLTFM=y 137CONFIG_MMC_SDHCI_PLTFM=y
138CONFIG_MMC_SDHCI_ESDHC_IMX=y
138CONFIG_MMC_SDHCI_TEGRA=y 139CONFIG_MMC_SDHCI_TEGRA=y
139CONFIG_MMC_SDHCI_SPEAR=y 140CONFIG_MMC_SDHCI_SPEAR=y
140CONFIG_MMC_OMAP=y 141CONFIG_MMC_OMAP=y
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 180b3024bec3..f607deb40f4d 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
93 93
94static struct irqaction at91rm9200_timer_irq = { 94static struct irqaction at91rm9200_timer_irq = {
95 .name = "at91_tick", 95 .name = "at91_tick",
96 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 96 .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
97 .handler = at91rm9200_timer_interrupt, 97 .handler = at91rm9200_timer_interrupt,
98 .irq = NR_IRQS_LEGACY + AT91_ID_SYS, 98 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
99}; 99};
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 3a4bc2e1a65e..bb392320a0dd 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
171 171
172static struct irqaction at91sam926x_pit_irq = { 172static struct irqaction at91sam926x_pit_irq = {
173 .name = "at91_tick", 173 .name = "at91_tick",
174 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 174 .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
175 .handler = at91sam926x_pit_interrupt, 175 .handler = at91sam926x_pit_interrupt,
176 .irq = NR_IRQS_LEGACY + AT91_ID_SYS, 176 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
177}; 177};
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
index 721a1a34dd1d..c40c1e2ef80f 100644
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ b/arch/arm/mach-at91/at91sam9g45_reset.S
@@ -16,11 +16,17 @@
16#include "at91_rstc.h" 16#include "at91_rstc.h"
17 .arm 17 .arm
18 18
19/*
20 * at91_ramc_base is an array void*
21 * init at NULL if only one DDR controler is present in or DT
22 */
19 .globl at91sam9g45_restart 23 .globl at91sam9g45_restart
20 24
21at91sam9g45_restart: 25at91sam9g45_restart:
22 ldr r5, =at91_ramc_base @ preload constants 26 ldr r5, =at91_ramc_base @ preload constants
23 ldr r0, [r5] 27 ldr r0, [r5]
28 ldr r5, [r5, #4] @ ddr1
29 cmp r5, #0
24 ldr r4, =at91_rstc_base 30 ldr r4, =at91_rstc_base
25 ldr r1, [r4] 31 ldr r1, [r4]
26 32
@@ -30,6 +36,8 @@ at91sam9g45_restart:
30 36
31 .balign 32 @ align to cache line 37 .balign 32 @ align to cache line
32 38
39 strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
40 strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
33 str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access 41 str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
34 str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 42 str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
35 str r4, [r1, #AT91_RSTC_CR] @ reset processor 43 str r4, [r1, #AT91_RSTC_CR] @ reset processor
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index 2919eba41ff4..c0e637adf65d 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
57 57
58static struct irqaction at91x40_timer_irq = { 58static struct irqaction at91x40_timer_irq = {
59 .name = "at91_tick", 59 .name = "at91_tick",
60 .flags = IRQF_DISABLED | IRQF_TIMER, 60 .flags = IRQF_TIMER,
61 .handler = at91x40_timer_interrupt 61 .handler = at91x40_timer_interrupt
62}; 62};
63 63
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 92b7f770615a..4078ba93776b 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = {
176 .context = (void *)0x7f00, 176 .context = (void *)0x7f00,
177}; 177};
178 178
179static struct snd_platform_data dm365_evm_snd_data = { 179static struct snd_platform_data dm365_evm_snd_data __maybe_unused = {
180 .asp_chan_q = EVENTQ_3, 180 .asp_chan_q = EVENTQ_3,
181}; 181};
182 182
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 52b8571b2e70..ce402cd21fa0 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -15,8 +15,6 @@
15 15
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17 17
18#include <linux/platform_device.h>
19
20#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) 18#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
21#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) 19#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
22#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) 20#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
@@ -39,6 +37,8 @@
39#define UART_DM646X_SCR_TX_WATERMARK 0x08 37#define UART_DM646X_SCR_TX_WATERMARK 0x08
40 38
41#ifndef __ASSEMBLY__ 39#ifndef __ASSEMBLY__
40#include <linux/platform_device.h>
41
42extern int davinci_serial_init(struct platform_device *); 42extern int davinci_serial_init(struct platform_device *);
43#endif 43#endif
44 44
diff --git a/arch/arm/mach-integrator/pci_v3.h b/arch/arm/mach-integrator/pci_v3.h
index 755fd29fed4a..06a9e2e7d007 100644
--- a/arch/arm/mach-integrator/pci_v3.h
+++ b/arch/arm/mach-integrator/pci_v3.h
@@ -1,2 +1,9 @@
1/* Simple oneliner include to the PCIv3 early init */ 1/* Simple oneliner include to the PCIv3 early init */
2#ifdef CONFIG_PCI
2extern int pci_v3_early_init(void); 3extern int pci_v3_early_init(void);
4#else
5static inline int pci_v3_early_init(void)
6{
7 return 0;
8}
9#endif
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 4c24303ec481..58adf2fd9cfc 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -140,6 +140,7 @@ int __init coherency_init(void)
140 coherency_base = of_iomap(np, 0); 140 coherency_base = of_iomap(np, 0);
141 coherency_cpu_base = of_iomap(np, 1); 141 coherency_cpu_base = of_iomap(np, 1);
142 set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); 142 set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
143 of_node_put(np);
143 } 144 }
144 145
145 return 0; 146 return 0;
@@ -147,9 +148,14 @@ int __init coherency_init(void)
147 148
148static int __init coherency_late_init(void) 149static int __init coherency_late_init(void)
149{ 150{
150 if (of_find_matching_node(NULL, of_coherency_table)) 151 struct device_node *np;
152
153 np = of_find_matching_node(NULL, of_coherency_table);
154 if (np) {
151 bus_register_notifier(&platform_bus_type, 155 bus_register_notifier(&platform_bus_type,
152 &mvebu_hwcc_platform_nb); 156 &mvebu_hwcc_platform_nb);
157 of_node_put(np);
158 }
153 return 0; 159 return 0;
154} 160}
155 161
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 3cc4bef6401c..27fc4f049474 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void)
67 pr_info("Initializing Power Management Service Unit\n"); 67 pr_info("Initializing Power Management Service Unit\n");
68 pmsu_mp_base = of_iomap(np, 0); 68 pmsu_mp_base = of_iomap(np, 0);
69 pmsu_reset_base = of_iomap(np, 1); 69 pmsu_reset_base = of_iomap(np, 1);
70 of_node_put(np);
70 } 71 }
71 72
72 return 0; 73 return 0;
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index f875124ff4f9..5175083cdb34 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void)
98 BUG_ON(!match); 98 BUG_ON(!match);
99 system_controller_base = of_iomap(np, 0); 99 system_controller_base = of_iomap(np, 0);
100 mvebu_sc = (struct mvebu_system_controller *)match->data; 100 mvebu_sc = (struct mvebu_system_controller *)match->data;
101 of_node_put(np);
101 } 102 }
102 103
103 return 0; 104 return 0;
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 5bd1479d3deb..7f8f6076d360 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
1108 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740", 1108 PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
1109 "fsib_mclk_in", "fsib"), 1109 "fsib_mclk_in", "fsib"),
1110 /* GETHER */ 1110 /* GETHER */
1111 PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740", 1111 PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
1112 "gether_mii", "gether"), 1112 "gether_mii", "gether"),
1113 PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740", 1113 PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
1114 "gether_int", "gether"), 1114 "gether_int", "gether"),
1115 /* HDMI */ 1115 /* HDMI */
1116 PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740", 1116 PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index ffb6f0ac7606..5930af8d434f 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -29,6 +29,7 @@
29#include <linux/pinctrl/machine.h> 29#include <linux/pinctrl/machine.h>
30#include <linux/platform_data/gpio-rcar.h> 30#include <linux/platform_data/gpio-rcar.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/phy.h>
32#include <linux/regulator/fixed.h> 33#include <linux/regulator/fixed.h>
33#include <linux/regulator/machine.h> 34#include <linux/regulator/machine.h>
34#include <linux/sh_eth.h> 35#include <linux/sh_eth.h>
@@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
155 &ether_pdata, sizeof(ether_pdata)); 156 &ether_pdata, sizeof(ether_pdata));
156} 157}
157 158
159/*
160 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
161 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
162 * 14-15. We have to set them back to 01 from the default 00 value each time
163 * the PHY is reset. It's also important because the PHY's LED0 signal is
164 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
165 * bounce on and off after each packet, which we apparently want to avoid.
166 */
167static int lager_ksz8041_fixup(struct phy_device *phydev)
168{
169 u16 phyctrl1 = phy_read(phydev, 0x1e);
170
171 phyctrl1 &= ~0xc000;
172 phyctrl1 |= 0x4000;
173 return phy_write(phydev, 0x1e, phyctrl1);
174}
175
176static void __init lager_init(void)
177{
178 lager_add_standard_devices();
179
180 phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
181}
182
158static const char *lager_boards_compat_dt[] __initdata = { 183static const char *lager_boards_compat_dt[] __initdata = {
159 "renesas,lager", 184 "renesas,lager",
160 NULL, 185 NULL,
@@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
163DT_MACHINE_START(LAGER_DT, "lager") 188DT_MACHINE_START(LAGER_DT, "lager")
164 .init_early = r8a7790_init_delay, 189 .init_early = r8a7790_init_delay,
165 .init_time = r8a7790_timer_init, 190 .init_time = r8a7790_timer_init,
166 .init_machine = lager_add_standard_devices, 191 .init_machine = lager_init,
167 .dt_compat = lager_boards_compat_dt, 192 .dt_compat = lager_boards_compat_dt,
168MACHINE_END 193MACHINE_END
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c
index 7aeb5d60e484..e6eb48192912 100644
--- a/arch/arm/mach-vexpress/tc2_pm.c
+++ b/arch/arm/mach-vexpress/tc2_pm.c
@@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency)
131 } else 131 } else
132 BUG(); 132 BUG();
133 133
134 /*
135 * If the CPU is committed to power down, make sure
136 * the power controller will be in charge of waking it
137 * up upon IRQ, ie IRQ lines are cut from GIC CPU IF
138 * to the CPU by disabling the GIC CPU IF to prevent wfi
139 * from completing execution behind power controller back
140 */
141 if (!skip_wfi)
142 gic_cpu_if_down();
143
134 if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { 144 if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
135 arch_spin_unlock(&tc2_pm_lock); 145 arch_spin_unlock(&tc2_pm_lock);
136 146
@@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency)
231 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); 241 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
232 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 242 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
233 ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point)); 243 ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
234 gic_cpu_if_down();
235 tc2_pm_down(residency); 244 tc2_pm_down(residency);
236} 245}
237 246
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-21 21:47:25 -0500