aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-04-18 18:44:29 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-04-18 18:44:29 -0400
commite024f69de9bd5b2686019f2491b779044cf89707 (patch)
treeba0bd62ea40e54123911b01007895e5afc192033 /arch
parent96fd2d57b8252e16dfacf8941f7a74a6119197f5 (diff)
parent893b66c39da812e7dd0d7b32aa0633e5d90d950c (diff)
Merge branch 'for-39-rc4' of git://codeaurora.org/quic/kernel/davidb/linux-msm
* 'for-39-rc4' of git://codeaurora.org/quic/kernel/davidb/linux-msm: msm: timer: fix missing return value msm: Remove extraneous ffa device check
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c5
-rw-r--r--arch/arm/mach-msm/timer.c2
2 files changed, 2 insertions, 5 deletions
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 7f568611547e..6a96911b0ad5 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -160,10 +160,7 @@ static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
160 160
161static void __init qsd8x50_init_mmc(void) 161static void __init qsd8x50_init_mmc(void)
162{ 162{
163 if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) 163 vreg_mmc = vreg_get(NULL, "gp5");
164 vreg_mmc = vreg_get(NULL, "gp6");
165 else
166 vreg_mmc = vreg_get(NULL, "gp5");
167 164
168 if (IS_ERR(vreg_mmc)) { 165 if (IS_ERR(vreg_mmc)) {
169 pr_err("vreg get for vreg_mmc failed (%ld)\n", 166 pr_err("vreg get for vreg_mmc failed (%ld)\n",
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 56f920c55b6a..38b95e949d13 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -269,7 +269,7 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
269 269
270 /* Use existing clock_event for cpu 0 */ 270 /* Use existing clock_event for cpu 0 */
271 if (!smp_processor_id()) 271 if (!smp_processor_id())
272 return; 272 return 0;
273 273
274 writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); 274 writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
275 275